mirror of
https://github.com/pret/pmd-sky.git
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Merge pull request #262 from SethBarberee/NitroSDK_split
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NitroSDK split
This commit is contained in:
AnonymousRandomPerson
@@ -17,8 +17,8 @@
|
||||
.public GeomSetVertexCoord16
|
||||
.public GetAllBaseForms
|
||||
.public GetWindow
|
||||
.public MemcpyFast
|
||||
.public MemsetFast
|
||||
.public MI_CpuCopy8
|
||||
.public MI_CpuFill8
|
||||
.public MONSTER_DATA_TABLE_PTR
|
||||
.public OS_IRQTable
|
||||
.public ov29_02353530
|
||||
@@ -30,10 +30,10 @@
|
||||
.public sub_0201BD80
|
||||
.public sub_0202760C
|
||||
.public sub_0202796C_JP
|
||||
.public sub_0207A238
|
||||
.public sub_0207A244
|
||||
.public sub_0207A300
|
||||
.public sub_0207A324
|
||||
.public DC_InvalidateAll
|
||||
.public DC_StoreAll
|
||||
.public DC_WaitWriteBufferEmpty
|
||||
.public IC_InvalidateAll
|
||||
.public sub_02080EF0
|
||||
.public sub_02080F30
|
||||
.public TRIG_TABLE
|
||||
|
||||
@@ -36,7 +36,7 @@
|
||||
.public sub_0207A048
|
||||
.public sub_0207A0CC
|
||||
.public sub_0207A164
|
||||
.public sub_0207B930
|
||||
.public OS_ResetSystem
|
||||
.public sub_02083434
|
||||
.public sub_02083450
|
||||
.public sub_0208346C
|
||||
|
||||
@@ -101,7 +101,7 @@
|
||||
.public sub_0200B76C
|
||||
.public sub_020184A8
|
||||
.public sub_02078900
|
||||
.public sub_0207A324
|
||||
.public IC_InvalidateAll
|
||||
.public sub_0207BE6C
|
||||
.public sub_0207BF04
|
||||
.public sub_0207BFA4
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
#pragma once
|
||||
.public ArrayFill32Fast
|
||||
.public MTi_CpuClearFast
|
||||
.public Debug_Print0
|
||||
.public G3X_ClearFifo
|
||||
.public G3X_Init
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
#pragma once
|
||||
.public ArrayFill32Fast
|
||||
.public MTi_CpuClearFast
|
||||
.public CART_REMOVED_IMG_DATA
|
||||
.public DC_FlushRange
|
||||
.public DecompressAtFromMemoryPointer
|
||||
|
||||
@@ -262,8 +262,8 @@
|
||||
.public _022A5970
|
||||
.public _s32_div_f
|
||||
.public _u32_div_f
|
||||
.public ArrayCopy32
|
||||
.public ArrayFill32
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public AUDIO_COMMANDS_BUFFER
|
||||
.public BagHasExclusiveItemTypeForMonster
|
||||
.public CopyAndInterleave
|
||||
@@ -467,7 +467,7 @@
|
||||
.public sub_0206F5C8
|
||||
.public sub_0207C9C4
|
||||
.public sub_0207C9E4
|
||||
.public sub_0207CC10
|
||||
.public SND_Init
|
||||
.public TEAM_MEMBER_TABLE_PTR
|
||||
.public UnloadFile
|
||||
.public vsprintf
|
||||
|
||||
@@ -514,7 +514,7 @@
|
||||
.public sub_0205FC20
|
||||
.public sub_0206637C
|
||||
.public sub_02079094
|
||||
.public sub_0207B9EC
|
||||
.public OS_GetMacAddress
|
||||
.public sub_0208346C
|
||||
.public sub_0208347C
|
||||
.public sub_02083A18
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
#pragma once
|
||||
.public _020B09B0
|
||||
.public ArrayCopy32
|
||||
.public ArrayFill32
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public MemAlloc
|
||||
.public MemFree
|
||||
.public MemZero
|
||||
|
||||
@@ -91,7 +91,7 @@
|
||||
.public sub_020756E8
|
||||
.public sub_0207A7EC
|
||||
.public sub_0207A8F4
|
||||
.public sub_0207AD54
|
||||
.public sub_0207AEF4
|
||||
.public sub_0207AFF0
|
||||
.public OS_InitTick
|
||||
.public OS_SetTick
|
||||
.public OS_InitAlarm
|
||||
.public WAN_TABLE
|
||||
|
||||
@@ -26,7 +26,7 @@
|
||||
.public _fmul
|
||||
.public _s32_div_f
|
||||
.public _u32_div_f
|
||||
.public ArrayFill32Fast
|
||||
.public MTi_CpuClearFast
|
||||
.public DC_FlushRange
|
||||
.public DRIVER_WORK
|
||||
.public Dse_SetError
|
||||
@@ -56,7 +56,7 @@
|
||||
.public DseVoice_UpdateHardware
|
||||
.public DseVoice_UpdateParameters
|
||||
.public FileInit
|
||||
.public GetTimer0Control
|
||||
.public OS_GetTickLo
|
||||
.public OS_SleepThread
|
||||
.public OS_WakeupThreadDirect
|
||||
.public SMD_EVENTS_FUN_TABLE
|
||||
@@ -67,7 +67,7 @@
|
||||
.public sub_02072BB8
|
||||
.public sub_02079800
|
||||
.public sub_02079B14
|
||||
.public sub_0207A300
|
||||
.public DC_WaitWriteBufferEmpty
|
||||
.public sub_0207C8B8
|
||||
.public sub_0207C8E0
|
||||
.public sub_0207C944
|
||||
|
||||
@@ -34,17 +34,17 @@
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public _022B999C
|
||||
.public _022B99A0
|
||||
.public _022B99B0
|
||||
.public OSi_TimerReserved
|
||||
.public OSi_UseTick
|
||||
.public OSi_UseAlarm
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
.public _s32_div_f
|
||||
.public _secure
|
||||
.public ArrayCopy16
|
||||
.public ArrayCopy32
|
||||
.public ArrayFill32
|
||||
.public MTi_CpuCopy16
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public AtomicExchange
|
||||
.public CARD_Init
|
||||
.public ClearIrqFlag
|
||||
@@ -81,7 +81,6 @@
|
||||
.public sub_0206F808
|
||||
.public sub_0206FD88
|
||||
.public sub_0206FDE0
|
||||
.public sub_0207BAC8
|
||||
.public sub_0207BC4C
|
||||
.public sub_0207BCCC
|
||||
.public sub_0207BDA8
|
||||
|
||||
@@ -3,8 +3,8 @@
|
||||
.public _022BB5F8
|
||||
.public EnableIrqFlag
|
||||
.public FileInit
|
||||
.public MemcpyFast
|
||||
.public MemsetFast
|
||||
.public MI_CpuCopy8
|
||||
.public MI_CpuFill8
|
||||
.public OS_SleepThread
|
||||
.public SetIrqFlag
|
||||
.public sub_020798D8
|
||||
|
||||
@@ -47,9 +47,9 @@
|
||||
.public _022BCA74
|
||||
.public _f2d
|
||||
.public _ll_udiv
|
||||
.public ArrayCopy32
|
||||
.public ArrayFill32
|
||||
.public ArrayFill32Fast
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public MTi_CpuClearFast
|
||||
.public CopyAndInterleave
|
||||
.public DC_FlushAll
|
||||
.public DC_FlushRange
|
||||
@@ -57,8 +57,8 @@
|
||||
.public EnableIrqFlag
|
||||
.public FileInit
|
||||
.public GetIrqFlag
|
||||
.public MemcpyFast
|
||||
.public MemsetFast
|
||||
.public MI_CpuCopy8
|
||||
.public MI_CpuFill8
|
||||
.public MI_DmaCopy16
|
||||
.public MI_StopDma
|
||||
.public MIi_UncompressBackward
|
||||
@@ -86,15 +86,15 @@
|
||||
.public sub_02079024
|
||||
.public sub_020798D8
|
||||
.public sub_02079A64
|
||||
.public sub_0207A2C0
|
||||
.public sub_0207A300
|
||||
.public sub_0207A324
|
||||
.public sub_0207A330
|
||||
.public sub_0207AACC
|
||||
.public sub_0207AB00
|
||||
.public sub_0207ADCC
|
||||
.public DC_StoreRange
|
||||
.public DC_WaitWriteBufferEmpty
|
||||
.public IC_InvalidateAll
|
||||
.public IC_InvalidateRange
|
||||
.public OS_GetDTCMAddress
|
||||
.public OS_SetDPermissionsForProtectionRegion
|
||||
.public OS_IsTickAvailable
|
||||
.public sub_0207B854
|
||||
.public sub_0207C750
|
||||
.public MTi_CardDmaCopy32
|
||||
.public sub_0207ED88
|
||||
.public sub_0207EDF4
|
||||
.public sub_0207EF2C
|
||||
|
||||
@@ -20,12 +20,12 @@
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||||
.public _start_AutoloadDoneCallback
|
||||
.public _u32_div_f
|
||||
.public abs
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||||
.public ArrayCopy16
|
||||
.public ArrayCopy32
|
||||
.public ArrayCopy32Fast
|
||||
.public ArrayFill16
|
||||
.public ArrayFill32
|
||||
.public ArrayFill32Fast
|
||||
.public MTi_CpuCopy16
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuCopy32Fast
|
||||
.public MTi_CpuClear16
|
||||
.public MTi_CpuClear32
|
||||
.public MTi_CpuClearFast
|
||||
.public Crypto_RC4Encrypt
|
||||
.public CRYPTO_RC4Init
|
||||
.public DC_FlushRange
|
||||
@@ -48,12 +48,12 @@
|
||||
.public MemAlloc
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||||
.public memcmp
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||||
.public memcpy
|
||||
.public MemcpyFast
|
||||
.public MI_CpuCopy8
|
||||
.public MemcpySimple
|
||||
.public MemFree
|
||||
.public memmove
|
||||
.public memset
|
||||
.public MemsetFast
|
||||
.public MI_CpuFill8
|
||||
.public MemZero
|
||||
.public MI_DmaCopy16
|
||||
.public OS_InitMutex
|
||||
@@ -1123,18 +1123,18 @@
|
||||
.public sub_0207A048
|
||||
.public sub_0207A0CC
|
||||
.public sub_0207A164
|
||||
.public sub_0207A2C0
|
||||
.public sub_0207A300
|
||||
.public sub_0207AD54
|
||||
.public sub_0207ADCC
|
||||
.public sub_0207AE44
|
||||
.public sub_0207AFF0
|
||||
.public sub_0207B030
|
||||
.public sub_0207B040
|
||||
.public sub_0207B17C
|
||||
.public DC_StoreRange
|
||||
.public DC_WaitWriteBufferEmpty
|
||||
.public OS_InitTick
|
||||
.public OS_IsTickAvailable
|
||||
.public OS_GetTick
|
||||
.public OS_InitAlarm
|
||||
.public OS_IsAlarmAvailable
|
||||
.public OS_CreateAlarm
|
||||
.public OS_SetAlarm
|
||||
.public sub_0207B1E8
|
||||
.public sub_0207B854
|
||||
.public sub_0207B9EC
|
||||
.public OS_GetMacAddress
|
||||
.public sub_0207BB50
|
||||
.public sub_0207BC4C
|
||||
.public sub_0207EDB4
|
||||
|
||||
@@ -5,7 +5,7 @@
|
||||
.public _u32_div_f
|
||||
.public _ull_mod
|
||||
.public AllocateTemp1024ByteBufferFromPool
|
||||
.public ArrayCopy32
|
||||
.public MTi_CpuCopy32
|
||||
.public BAG_ITEMS_PTR_MIRROR
|
||||
.public BitstreamDebug
|
||||
.public CardBackupError
|
||||
|
||||
@@ -5,12 +5,12 @@
|
||||
.public _s32_div_f
|
||||
.public _u32_div_f
|
||||
.public _ull_mod
|
||||
.public ArrayCopy16
|
||||
.public ArrayCopy32
|
||||
.public ArrayCopy32Fast
|
||||
.public ArrayFill16
|
||||
.public ArrayFill32
|
||||
.public ArrayFill32Fast
|
||||
.public MTi_CpuCopy16
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuCopy32Fast
|
||||
.public MTi_CpuClear16
|
||||
.public MTi_CpuClear32
|
||||
.public MTi_CpuClearFast
|
||||
.public bind
|
||||
.public ClearIrqFlag
|
||||
.public CloseVeneer
|
||||
@@ -82,10 +82,10 @@
|
||||
.public MemAlloc
|
||||
.public memcmp
|
||||
.public memcpy
|
||||
.public MemcpyFast
|
||||
.public MI_CpuCopy8
|
||||
.public MemFree
|
||||
.public memset
|
||||
.public MemsetFast
|
||||
.public MI_CpuFill8
|
||||
.public OS_DisableIrqMask
|
||||
.public OS_EnableIrqMask
|
||||
.public OS_GetLockID
|
||||
@@ -133,7 +133,7 @@
|
||||
.public ov00_022C759C
|
||||
.public ov00_022C75D8
|
||||
.public ov00_022CEF10
|
||||
.public ov00_022CF674
|
||||
.public SOC_Startup
|
||||
.public ov00_022CF7E8
|
||||
.public ov00_022CF8F8
|
||||
.public ov00_022CF918
|
||||
@@ -192,16 +192,16 @@
|
||||
.public sub_02079E74
|
||||
.public sub_0207A048
|
||||
.public sub_0207A0CC
|
||||
.public sub_0207A2C0
|
||||
.public sub_0207ADCC
|
||||
.public sub_0207AE44
|
||||
.public sub_0207B030
|
||||
.public sub_0207B040
|
||||
.public sub_0207B17C
|
||||
.public DC_StoreRange
|
||||
.public OS_IsTickAvailable
|
||||
.public OS_GetTick
|
||||
.public OS_IsAlarmAvailable
|
||||
.public OS_CreateAlarm
|
||||
.public OS_SetAlarm
|
||||
.public sub_0207B1E8
|
||||
.public sub_0207B854
|
||||
.public sub_0207B860
|
||||
.public sub_0207B9EC
|
||||
.public OS_GetMacAddress
|
||||
.public sub_0207C650
|
||||
.public sub_0207C7DC
|
||||
.public sub_0207C7FC
|
||||
@@ -217,7 +217,7 @@
|
||||
.public sub_0207CB14
|
||||
.public sub_0207CB34
|
||||
.public sub_0207CB54
|
||||
.public sub_0207CC10
|
||||
.public SND_Init
|
||||
.public sub_0207CD44
|
||||
.public sub_0207CF14
|
||||
.public sub_0207D0D0
|
||||
|
||||
@@ -13,9 +13,9 @@
|
||||
.public GetPressedButtons
|
||||
.public InitPreprocessorArgs
|
||||
.public MemAlloc
|
||||
.public MemcpyFast
|
||||
.public MI_CpuCopy8
|
||||
.public MemFree
|
||||
.public MemsetFast
|
||||
.public MI_CpuFill8
|
||||
.public MemZero
|
||||
.public ov00_022BF2C4
|
||||
.public ov00_022BF640
|
||||
@@ -63,7 +63,7 @@
|
||||
.public sub_02046BE8
|
||||
.public sub_02046C78
|
||||
.public sub_02046D20
|
||||
.public sub_0207B9EC
|
||||
.public OS_GetMacAddress
|
||||
.public sub_0207F6C4
|
||||
.public sub_0207F70C
|
||||
.public WaitForever2
|
||||
|
||||
20
asm/itcm.s
20
asm/itcm.s
@@ -893,7 +893,7 @@ EnqueueRender3dTexture: ; 0x01FF8CAC
|
||||
mov r0, r5
|
||||
mov r1, r4
|
||||
mov r2, #0x28
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
mov r0, #3
|
||||
strh r0, [r4]
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
@@ -909,7 +909,7 @@ EnqueueRender3dTiling: ; 0x01FF8CDC
|
||||
mov r0, r5
|
||||
mov r1, r4
|
||||
mov r2, #0x34
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
mov r0, #2
|
||||
strh r0, [r4]
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
@@ -924,7 +924,7 @@ NewRender3dRectangle: ; 0x01FF8D0C
|
||||
ldmeqia sp!, {r4, pc}
|
||||
mov r1, #0
|
||||
mov r2, #0x26
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
mov r1, #0
|
||||
mov r0, r4
|
||||
strh r1, [r4]
|
||||
@@ -940,7 +940,7 @@ NewRender3dQuadrilateral: ; 0x01FF8D3C
|
||||
ldmeqia sp!, {r4, pc}
|
||||
mov r1, #0
|
||||
mov r2, #0x26
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
mov r1, #1
|
||||
mov r0, r4
|
||||
strh r1, [r4]
|
||||
@@ -956,7 +956,7 @@ NewRender3dTexture: ; 0x01FF8D6C
|
||||
ldmeqia sp!, {r4, pc}
|
||||
mov r1, #0
|
||||
mov r2, #0x28
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
mov r1, #3
|
||||
mov r0, r4
|
||||
strh r1, [r4]
|
||||
@@ -972,7 +972,7 @@ NewRender3dTiling: ; 0x01FF8D9C
|
||||
ldmeqia sp!, {r4, pc}
|
||||
mov r1, #0
|
||||
mov r2, #0x34
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
mov r1, #2
|
||||
mov r0, r4
|
||||
strh r1, [r4]
|
||||
@@ -2048,12 +2048,12 @@ _01FF990C:
|
||||
ldr sl, [r0, #0x1c]
|
||||
bl EnableIrqFlag
|
||||
mov fp, r0
|
||||
bl sub_0207A244
|
||||
bl sub_0207A238
|
||||
bl DC_StoreAll
|
||||
bl DC_InvalidateAll
|
||||
mov r0, fp
|
||||
bl SetIrqFlag
|
||||
bl sub_0207A324
|
||||
bl sub_0207A300
|
||||
bl IC_InvalidateAll
|
||||
bl DC_WaitWriteBufferEmpty
|
||||
add r5, r5, r4
|
||||
cmp r5, #0x8000
|
||||
bhs _01FF9964
|
||||
|
||||
@@ -167,7 +167,7 @@ sub_02002448: ; 0x02002448
|
||||
str r2, [r3]
|
||||
bl Debug_Print0
|
||||
mov r0, r4
|
||||
bl sub_0207B930
|
||||
bl OS_ResetSystem
|
||||
bl sub_02079C14
|
||||
_02002490:
|
||||
bl WaitForInterrupt
|
||||
|
||||
@@ -309,7 +309,7 @@ _020041A4:
|
||||
bl Debug_FatalError
|
||||
_020041C4:
|
||||
bl FileRom_InitDataTransfer
|
||||
bl sub_0207A324
|
||||
bl IC_InvalidateAll
|
||||
bl DC_FlushAll
|
||||
cmp r4, #0x24
|
||||
addls pc, pc, r4, lsl #2
|
||||
|
||||
@@ -171,24 +171,24 @@ sub_02008DAC: ; 0x02008DAC
|
||||
mov r0, #0
|
||||
mov r1, #0x6800000
|
||||
mov r2, #0xa4000
|
||||
bl ArrayFill32Fast
|
||||
bl MTi_CpuClearFast
|
||||
bl GX_DisableBankForLCDC
|
||||
mov r0, #0xc0
|
||||
mov r1, #0x7000000
|
||||
mov r2, #0x400
|
||||
bl ArrayFill32Fast
|
||||
bl MTi_CpuClearFast
|
||||
mov r0, #0
|
||||
mov r1, #0x5000000
|
||||
mov r2, #0x400
|
||||
bl ArrayFill32Fast
|
||||
bl MTi_CpuClearFast
|
||||
mov r0, #0xc0
|
||||
ldr r1, _02008EC4 ; =0x07000400
|
||||
mov r2, #0x400
|
||||
bl ArrayFill32Fast
|
||||
bl MTi_CpuClearFast
|
||||
mov r0, #0
|
||||
ldr r1, _02008EC8 ; =0x05000400
|
||||
mov r2, #0x400
|
||||
bl ArrayFill32Fast
|
||||
bl MTi_CpuClearFast
|
||||
mov r1, #0x100
|
||||
ldr r0, _02008ECC ; =_022A37A0
|
||||
str r1, [r0, #4]
|
||||
|
||||
@@ -409,23 +409,23 @@ sub_0200B76C: ; 0x0200B76C
|
||||
mov r0, #0
|
||||
mov r1, #0x6800000
|
||||
mov r2, #0xa4000
|
||||
bl ArrayFill32Fast
|
||||
bl MTi_CpuClearFast
|
||||
mov r0, #0xc0
|
||||
mov r1, #0x7000000
|
||||
mov r2, #0x400
|
||||
bl ArrayFill32Fast
|
||||
bl MTi_CpuClearFast
|
||||
mov r0, #0
|
||||
mov r1, #0x5000000
|
||||
mov r2, #0x400
|
||||
bl ArrayFill32Fast
|
||||
bl MTi_CpuClearFast
|
||||
mov r0, #0xc0
|
||||
ldr r1, _0200B87C ; =0x07000400
|
||||
mov r2, #0x400
|
||||
bl ArrayFill32Fast
|
||||
bl MTi_CpuClearFast
|
||||
mov r0, #0
|
||||
ldr r1, _0200B880 ; =0x05000400
|
||||
mov r2, #0x400
|
||||
bl ArrayFill32Fast
|
||||
bl MTi_CpuClearFast
|
||||
bl sub_02019304
|
||||
mov r4, r0
|
||||
ldr r1, _0200B884 ; =CART_REMOVED_IMG_DATA
|
||||
|
||||
@@ -5464,7 +5464,7 @@ InitSoundSystem: ; 0x02018C28
|
||||
ldr r0, _02018E44 ; =_020AFB28
|
||||
mov r1, #4
|
||||
bl sub_02002CAC
|
||||
bl sub_0207CC10
|
||||
bl SND_Init
|
||||
ldr r0, _02018E48 ; =0x0000FFFF
|
||||
mov r1, #0
|
||||
bl sub_0207C9C4
|
||||
@@ -7715,7 +7715,7 @@ ExecuteCopyToFlatVramCommand: ; 0x0201AB0C
|
||||
mov r0, r1
|
||||
ldr r1, [ip, #8]
|
||||
ldr r2, [ip]
|
||||
bl ArrayCopy32
|
||||
bl MTi_CpuCopy32
|
||||
ldmia sp!, {r3, pc}
|
||||
_0201AB40:
|
||||
cmp r0, #1
|
||||
@@ -7738,7 +7738,7 @@ _0201AB7C:
|
||||
ldr r1, [ip, #8]
|
||||
ldr r2, [ip]
|
||||
mov r0, #0
|
||||
bl ArrayFill32
|
||||
bl MTi_CpuClear32
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end ExecuteCopyToFlatVramCommand
|
||||
|
||||
|
||||
@@ -16921,10 +16921,10 @@ sub_0204A190: ; 0x0204A190
|
||||
|
||||
arm_func_start sub_0204A198
|
||||
sub_0204A198: ; 0x0204A198
|
||||
ldr ip, _0204A1A0 ; =sub_0207B9EC
|
||||
ldr ip, _0204A1A0 ; =OS_GetMacAddress
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_0204A1A0: .word sub_0207B9EC
|
||||
_0204A1A0: .word OS_GetMacAddress
|
||||
arm_func_end sub_0204A198
|
||||
|
||||
arm_func_start sub_0204A1A4
|
||||
|
||||
@@ -368,7 +368,7 @@ _02051CE4:
|
||||
bne _02051D10
|
||||
ldr r1, [r2, #8]
|
||||
ldr r2, [r2]
|
||||
bl ArrayCopy32
|
||||
bl MTi_CpuCopy32
|
||||
b _02051D30
|
||||
_02051D10:
|
||||
cmp r1, #1
|
||||
@@ -379,7 +379,7 @@ _02051D20:
|
||||
ldr r1, [r2, #8]
|
||||
ldr r2, [r2]
|
||||
mov r0, r8
|
||||
bl ArrayFill32
|
||||
bl MTi_CpuClear32
|
||||
_02051D30:
|
||||
add r0, r6, #1
|
||||
mov r0, r0, lsl #0x10
|
||||
|
||||
@@ -2067,11 +2067,11 @@ _0206C410:
|
||||
mvn r0, #0x1d
|
||||
ldmia sp!, {r4, pc}
|
||||
_0206C430:
|
||||
bl sub_0207AD54
|
||||
bl OS_InitTick
|
||||
mov r0, #0
|
||||
mov r1, r0
|
||||
bl sub_0207AEF4
|
||||
bl sub_0207AFF0
|
||||
bl OS_SetTick
|
||||
bl OS_InitAlarm
|
||||
ldr r0, _0206C5F8 ; =DRIVER_WORK
|
||||
mov r3, #0
|
||||
strh r3, [r0, #2]
|
||||
|
||||
@@ -73,7 +73,7 @@ _0206CA5C:
|
||||
mov r1, r4
|
||||
mov r2, lr
|
||||
strh ip, [r5]
|
||||
bl ArrayFill32Fast
|
||||
bl MTi_CpuClearFast
|
||||
mov r0, r4
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
@@ -165,7 +165,7 @@ _0206CB9C:
|
||||
mov r1, r4
|
||||
mov r2, r6
|
||||
strh ip, [r3]
|
||||
bl ArrayFill32Fast
|
||||
bl MTi_CpuClearFast
|
||||
mov r0, r4
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
|
||||
.align 2, 0
|
||||
@@ -4036,7 +4036,7 @@ sub_0206FE5C: ; 0x0206FE5C
|
||||
ldr r1, [r5, #0xc]
|
||||
ldr r2, [r5]
|
||||
mov r0, #0
|
||||
bl ArrayFill32Fast
|
||||
bl MTi_CpuClearFast
|
||||
ldr r0, [r5, #0xc]
|
||||
ldr r1, [r5]
|
||||
bl DC_FlushRange
|
||||
@@ -4881,7 +4881,7 @@ _020709B4:
|
||||
mov r0, r8
|
||||
mov r1, sl
|
||||
bl DC_FlushRange
|
||||
bl sub_0207A300
|
||||
bl DC_WaitWriteBufferEmpty
|
||||
cmp r7, #0
|
||||
moveq r0, fp
|
||||
movne r0, #0
|
||||
@@ -5348,7 +5348,7 @@ _02071030:
|
||||
ldrsb r0, [r5, #0xd0]
|
||||
cmp r0, #1
|
||||
bne _020710D0
|
||||
bl GetTimer0Control
|
||||
bl OS_GetTickLo
|
||||
ldr r2, [r8, #0xec8]
|
||||
ldr r1, [r8, #0xecc]
|
||||
sub sl, r0, r2
|
||||
@@ -5411,7 +5411,7 @@ _02071118:
|
||||
ldrsb r0, [r5, #0xd0]
|
||||
cmp r0, #1
|
||||
bne _02071030
|
||||
bl GetTimer0Control
|
||||
bl OS_GetTickLo
|
||||
str r0, [r8, #0xecc]
|
||||
b _02071030
|
||||
_02071148:
|
||||
|
||||
7872
asm/main_02075600.s
7872
asm/main_02075600.s
File diff suppressed because it is too large
Load Diff
@@ -1,12 +0,0 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207B854.inc"
|
||||
|
||||
.text
|
||||
|
||||
; https://decomp.me/scratch/5f50V
|
||||
arm_func_start sub_0207B854
|
||||
sub_0207B854: ; 0x0207B854
|
||||
subs r0, r0, #4
|
||||
bhs sub_0207B854
|
||||
bx lr
|
||||
arm_func_end sub_0207B854
|
||||
@@ -1,292 +0,0 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207B87C.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start OS_InitReset
|
||||
OS_InitReset: ; 0x0207B87C
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr r0, _0207B8C8 ; =_022B99D0
|
||||
ldrh r1, [r0, #2]
|
||||
cmp r1, #0
|
||||
ldmneia sp!, {r3, r4, r5, pc}
|
||||
mov r1, #1
|
||||
strh r1, [r0, #2]
|
||||
bl PXI_Init
|
||||
mov r5, #0xc
|
||||
mov r4, #1
|
||||
_0207B8A4:
|
||||
mov r0, r5
|
||||
mov r1, r4
|
||||
bl PXI_IsCallbackReady
|
||||
cmp r0, #0
|
||||
beq _0207B8A4
|
||||
ldr r1, _0207B8CC ; =sub_0207B8D0
|
||||
mov r0, #0xc
|
||||
bl PXI_SetFifoRecvCallback
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_0207B8C8: .word _022B99D0
|
||||
_0207B8CC: .word sub_0207B8D0
|
||||
arm_func_end OS_InitReset
|
||||
|
||||
arm_func_start sub_0207B8D0
|
||||
sub_0207B8D0: ; 0x0207B8D0
|
||||
stmdb sp!, {r3, lr}
|
||||
and r0, r1, #0x7f00
|
||||
mov r0, r0, lsl #8
|
||||
mov r0, r0, lsr #0x10
|
||||
cmp r0, #0x10
|
||||
bne _0207B8F8
|
||||
ldr r0, _0207B900 ; =_022B99D0
|
||||
mov r1, #1
|
||||
strh r1, [r0]
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207B8F8:
|
||||
bl WaitForever2
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207B900: .word _022B99D0
|
||||
arm_func_end sub_0207B8D0
|
||||
|
||||
arm_func_start sub_0207B904
|
||||
sub_0207B904: ; 0x0207B904
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r6, r0, lsl #8
|
||||
mov r5, #0xc
|
||||
mov r4, #0
|
||||
_0207B914:
|
||||
mov r0, r5
|
||||
mov r1, r6
|
||||
mov r2, r4
|
||||
bl PXI_SendWordByFifo
|
||||
cmp r0, #0
|
||||
bne _0207B914
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
arm_func_end sub_0207B904
|
||||
|
||||
arm_func_start sub_0207B930
|
||||
sub_0207B930: ; 0x0207B930
|
||||
stmdb sp!, {r4, lr}
|
||||
ldr r1, _0207B9C0 ; =0x027FFC40
|
||||
mov r4, r0
|
||||
ldrh r0, [r1]
|
||||
cmp r0, #2
|
||||
moveq r0, #1
|
||||
movne r0, #0
|
||||
cmp r0, #0
|
||||
beq _0207B958
|
||||
bl WaitForever2
|
||||
_0207B958:
|
||||
bl OS_GetLockID
|
||||
mov r0, r0, lsl #0x10
|
||||
mov r0, r0, lsr #0x10
|
||||
bl sub_02083434
|
||||
ldr r0, _0207B9C4 ; =0x00000000
|
||||
bl MI_StopDma
|
||||
ldr r0, _0207B9C8 ; =0x00000001
|
||||
bl MI_StopDma
|
||||
ldr r0, _0207B9CC ; =0x00000002
|
||||
bl MI_StopDma
|
||||
ldr r0, _0207B9D0 ; =0x00000003
|
||||
bl MI_StopDma
|
||||
ldr r0, _0207B9D4 ; =0x00040000
|
||||
bl OS_SetIrqMask
|
||||
ldr r0, _0207B9D8 ; =0xFFFBFFFF
|
||||
bl OS_ResetRequestIrqMask
|
||||
ldr r1, _0207B9DC ; =0x027FFC20
|
||||
ldr r0, _0207B9E0 ; =0x00000010
|
||||
str r4, [r1]
|
||||
bl sub_0207B904
|
||||
ldr r0, _0207B9E4 ; =0x027E3F80
|
||||
ldr r1, _0207B9E8 ; =0x00000800
|
||||
sub r0, r0, r1
|
||||
mov sp, r0
|
||||
bl sub_01FF97CC
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207B9C0: .word 0x027FFC40
|
||||
_0207B9C4: .word 0x00000000
|
||||
_0207B9C8: .word 0x00000001
|
||||
_0207B9CC: .word 0x00000002
|
||||
_0207B9D0: .word 0x00000003
|
||||
_0207B9D4: .word 0x00040000
|
||||
_0207B9D8: .word 0xFFFBFFFF
|
||||
_0207B9DC: .word 0x027FFC20
|
||||
_0207B9E0: .word 0x00000010
|
||||
_0207B9E4: .word 0x027E3F80
|
||||
_0207B9E8: .word 0x00000800
|
||||
arm_func_end sub_0207B930
|
||||
|
||||
arm_func_start sub_0207B9EC
|
||||
sub_0207B9EC: ; 0x0207B9EC
|
||||
ldr ip, _0207BA00 ; =MemcpyFast
|
||||
mov r1, r0
|
||||
ldr r0, _0207BA04 ; =0x027FFCF4
|
||||
mov r2, #6
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_0207BA00: .word MemcpyFast
|
||||
_0207BA04: .word 0x027FFCF4
|
||||
arm_func_end sub_0207B9EC
|
||||
|
||||
arm_func_start GetDsFirmwareUserSettings
|
||||
GetDsFirmwareUserSettings: ; 0x0207BA08
|
||||
stmdb sp!, {r4, lr}
|
||||
ldr ip, _0207BA88 ; =0x027FFC80
|
||||
mov r4, r0
|
||||
ldrh r2, [ip, #0x64]
|
||||
add r0, ip, #6
|
||||
add r1, r4, #4
|
||||
mov r2, r2, lsl #0x1d
|
||||
mov r2, r2, lsr #0x1d
|
||||
strb r2, [r4]
|
||||
ldrb r3, [ip, #2]
|
||||
mov r2, #0x14
|
||||
mov r3, r3, lsl #0x1c
|
||||
mov r3, r3, lsr #0x1c
|
||||
strb r3, [r4, #1]
|
||||
ldrb r3, [ip, #3]
|
||||
strb r3, [r4, #2]
|
||||
ldrb r3, [ip, #4]
|
||||
strb r3, [r4, #3]
|
||||
ldrb r3, [ip, #0x1a]
|
||||
strh r3, [r4, #0x1a]
|
||||
ldrb r3, [ip, #0x50]
|
||||
strh r3, [r4, #0x52]
|
||||
bl ArrayCopy16
|
||||
ldr r0, _0207BA88 ; =0x027FFC80
|
||||
add r1, r4, #0x1c
|
||||
add r0, r0, #0x1c
|
||||
mov r2, #0x34
|
||||
bl ArrayCopy16
|
||||
mov r0, #0
|
||||
strh r0, [r4, #0x18]
|
||||
strh r0, [r4, #0x50]
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207BA88: .word 0x027FFC80
|
||||
arm_func_end GetDsFirmwareUserSettings
|
||||
|
||||
arm_func_start CountLeadingZeros
|
||||
CountLeadingZeros: ; 0x0207BA8C
|
||||
clz r0, r0
|
||||
bx lr
|
||||
arm_func_end CountLeadingZeros
|
||||
|
||||
arm_func_start OSi_InitVramExclusive
|
||||
OSi_InitVramExclusive: ; 0x0207BA94
|
||||
ldr r0, _0207BAC0 ; =_022B99D4
|
||||
mov r3, #0
|
||||
str r3, [r0]
|
||||
ldr r0, _0207BAC4 ; =_022B99D8
|
||||
mov r2, r3
|
||||
_0207BAA8:
|
||||
mov r1, r3, lsl #1
|
||||
add r3, r3, #1
|
||||
strh r2, [r0, r1]
|
||||
cmp r3, #9
|
||||
blt _0207BAA8
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207BAC0: .word _022B99D4
|
||||
_0207BAC4: .word _022B99D8
|
||||
arm_func_end OSi_InitVramExclusive
|
||||
|
||||
arm_func_start sub_0207BAC8
|
||||
sub_0207BAC8: ; 0x0207BAC8
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
|
||||
mov r5, r0
|
||||
mov sl, r1
|
||||
bl EnableIrqFlag
|
||||
ldr r4, _0207BB44 ; =_022B99D4
|
||||
ldr r1, _0207BB48 ; =0x000001FF
|
||||
ldr r2, [r4]
|
||||
mov sb, r0
|
||||
and r0, r5, r2
|
||||
ldr r6, _0207BB4C ; =_022B99D8
|
||||
and r8, r0, r1
|
||||
mov r7, #1
|
||||
mov r5, #0
|
||||
_0207BAFC:
|
||||
mov r0, r8
|
||||
bl CountLeadingZeros
|
||||
rsbs r2, r0, #0x1f
|
||||
bmi _0207BB38
|
||||
mov r1, r2, lsl #1
|
||||
ldrh r0, [r6, r1]
|
||||
mvn r2, r7, lsl r2
|
||||
cmp sl, r0
|
||||
and r8, r8, r2
|
||||
bne _0207BAFC
|
||||
ldr r0, [r4]
|
||||
strh r5, [r6, r1]
|
||||
and r0, r0, r2
|
||||
str r0, [r4]
|
||||
b _0207BAFC
|
||||
_0207BB38:
|
||||
mov r0, sb
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
|
||||
.align 2, 0
|
||||
_0207BB44: .word _022B99D4
|
||||
_0207BB48: .word 0x000001FF
|
||||
_0207BB4C: .word _022B99D8
|
||||
arm_func_end sub_0207BAC8
|
||||
|
||||
arm_func_start sub_0207BB50
|
||||
sub_0207BB50: ; 0x0207BB50
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
ldr r1, _0207BC10 ; =0x04000006
|
||||
mov r5, r0
|
||||
ldrh r6, [r1]
|
||||
ldr r4, _0207BC14 ; =0x027FFC00
|
||||
bl GetTimer0Control
|
||||
orr r0, r0, r6, lsl #16
|
||||
str r0, [r5]
|
||||
ldr r1, _0207BC18 ; =_022B99A8
|
||||
ldrh ip, [r4, #0xf8]
|
||||
ldr r3, [r1]
|
||||
ldr r2, [r1, #4]
|
||||
mov r0, r4
|
||||
eor r2, r3, ip, lsl #16
|
||||
str r2, [r5, #4]
|
||||
ldr r2, [r1]
|
||||
ldr r3, [r0, #0x3c]
|
||||
ldr r2, [r1, #4]
|
||||
ldr r1, [r4, #0xf4]
|
||||
ldr ip, _0207BC1C ; =0x04000600
|
||||
eor r1, r2, r1
|
||||
eor r2, r3, r1
|
||||
str r2, [r5, #8]
|
||||
ldr r1, [ip]
|
||||
eor r1, r2, r1
|
||||
str r1, [r5, #8]
|
||||
ldr r2, [r0, #0x1e8]
|
||||
add r1, r0, #0x300
|
||||
str r2, [r5, #0xc]
|
||||
ldr r3, [r0, #0x1ec]
|
||||
sub r2, ip, #0x4d0
|
||||
str r3, [r5, #0x10]
|
||||
ldr r3, [r0, #0x390]
|
||||
ldrh r4, [r1, #0x94]
|
||||
add r0, r0, #0x3a8
|
||||
eor r3, r3, r4, lsl #16
|
||||
str r3, [r5, #0x14]
|
||||
ldrh r4, [r1, #0xaa]
|
||||
ldrh r3, [r1, #0xac]
|
||||
orr r3, r3, r4, lsl #16
|
||||
str r3, [r5, #0x18]
|
||||
ldrh r2, [r2]
|
||||
ldrh r0, [r0]
|
||||
ldrh r1, [r1, #0x98]
|
||||
orr r0, r2, r0
|
||||
orr r0, r0, r1, lsl #16
|
||||
str r0, [r5, #0x1c]
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_0207BC10: .word 0x04000006
|
||||
_0207BC14: .word 0x027FFC00
|
||||
_0207BC18: .word _022B99A8
|
||||
_0207BC1C: .word 0x04000600
|
||||
arm_func_end sub_0207BB50
|
||||
@@ -37,7 +37,7 @@ sub_0207E8A4: ; 0x0207E8A4
|
||||
ldr r0, [r0, #0x28]
|
||||
add r0, r0, r2
|
||||
mov r2, r3
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end sub_0207E8A4
|
||||
@@ -49,7 +49,7 @@ sub_0207E8C0: ; 0x0207E8C0
|
||||
mov r0, r1
|
||||
add r1, ip, r2
|
||||
mov r2, r3
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end sub_0207E8C0
|
||||
@@ -59,7 +59,7 @@ sub_0207E8E0: ; 0x0207E8E0
|
||||
stmdb sp!, {r3, lr}
|
||||
mov r0, r2
|
||||
mov r2, r3
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end sub_0207E8E0
|
||||
@@ -397,7 +397,7 @@ sub_0207ED88: ; 0x0207ED88
|
||||
mov r1, #0
|
||||
mov r2, #0x5c
|
||||
mov r4, r0
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
mov r0, #0
|
||||
str r0, [r4, #0x10]
|
||||
str r0, [r4, #0xc]
|
||||
@@ -648,7 +648,7 @@ sub_0207F05C: ; 0x0207F05C
|
||||
ldr r2, [r7, #0x30]
|
||||
mov r0, r5
|
||||
mov r1, #0
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
_0207F0E8:
|
||||
add r0, sp, #4
|
||||
bl sub_0207F70C
|
||||
@@ -675,7 +675,7 @@ _0207F0F0:
|
||||
ldr r2, [r7, #0x38]
|
||||
mov r0, r5
|
||||
mov r1, #0
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
_0207F14C:
|
||||
add r0, sp, #4
|
||||
bl sub_0207F70C
|
||||
|
||||
@@ -227,14 +227,14 @@ sub_0207FB40: ; 0x0207FB40
|
||||
add r6, r5, r1
|
||||
mov r0, r4
|
||||
mov r1, r6
|
||||
bl sub_0207A330
|
||||
bl IC_InvalidateRange
|
||||
mov r0, r4
|
||||
mov r1, r6
|
||||
bl DC_InvalidateRange
|
||||
add r0, r4, r5
|
||||
sub r2, r6, r5
|
||||
mov r1, #0
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
arm_func_end sub_0207FB40
|
||||
|
||||
@@ -340,7 +340,7 @@ GetOverlayInfo: ; 0x0207FC9C
|
||||
mov r1, r5
|
||||
add r0, ip, r3
|
||||
mov r2, #0x20
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
add r0, sp, #0x18
|
||||
str r4, [r5, #0x20]
|
||||
bl FileInit
|
||||
@@ -440,11 +440,11 @@ sub_0207FE28: ; 0x0207FE28
|
||||
add r0, sp, #0x44
|
||||
mov r1, #0
|
||||
mov r2, #0x14
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
ldr r2, _0207FEB8 ; =_020B2BB8
|
||||
add r1, sp, #4
|
||||
ldmia r2, {r0, r2}
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
ldr r3, _0207FEB8 ; =_020B2BB8
|
||||
mov r1, r6
|
||||
ldr ip, [r3, #4]
|
||||
@@ -510,7 +510,7 @@ _0207FF2C:
|
||||
ldr r0, [r5, #4]
|
||||
mov r2, r4
|
||||
mov r1, #0
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
bl WaitForever2
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
_0207FF4C:
|
||||
@@ -695,14 +695,14 @@ MD5_Update: ; 0x0208013C
|
||||
add r1, r6, #0x18
|
||||
mov r0, r5
|
||||
add r1, r1, ip
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
_02080190:
|
||||
add r1, r6, #0x18
|
||||
mov r0, r5
|
||||
mov r2, r7
|
||||
add r1, r1, ip
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
mov r0, r6
|
||||
bl sub_020802BC
|
||||
sub r4, r4, r7
|
||||
@@ -715,7 +715,7 @@ _020801C4:
|
||||
mov r0, r7
|
||||
mov r2, r5
|
||||
add r1, r6, #0x18
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
mov r0, r6
|
||||
add r7, r7, #0x40
|
||||
bl sub_020802BC
|
||||
@@ -727,7 +727,7 @@ _020801EC:
|
||||
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
mov r0, r7
|
||||
add r1, r6, #0x18
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
arm_func_end MD5_Update
|
||||
|
||||
@@ -753,7 +753,7 @@ MD5_Digest: ; 0x02080204
|
||||
bhs _02080268
|
||||
add r0, r4, #0x18
|
||||
add r0, r0, r3
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
mov r0, r4
|
||||
bl sub_020802BC
|
||||
mov r3, #0
|
||||
@@ -765,7 +765,7 @@ _02080268:
|
||||
add r0, r0, r3
|
||||
sub r2, r2, #8
|
||||
mov r1, #0
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
_02080284:
|
||||
str r7, [r4, #0x50]
|
||||
mov r0, r4
|
||||
@@ -774,11 +774,11 @@ _02080284:
|
||||
mov r0, r4
|
||||
mov r1, r5
|
||||
mov r2, #0x10
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
mov r0, r4
|
||||
mov r1, #0
|
||||
mov r2, #0x58
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_020802B8: .word _020B2BC0
|
||||
@@ -1083,7 +1083,7 @@ sub_020806C0: ; 0x020806C0
|
||||
mov r0, sb
|
||||
mov r2, r4
|
||||
add r1, r6, r1
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
ldr r1, _02080810 ; =_020B2D88
|
||||
mov r0, sl
|
||||
ldr r3, [r1]
|
||||
@@ -1099,7 +1099,7 @@ _02080758:
|
||||
mov r0, sb
|
||||
mov r2, r8
|
||||
add r1, r6, r1
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
ldr r0, [sl, #0x1c]
|
||||
add r0, r0, r8
|
||||
str r0, [sl, #0x1c]
|
||||
@@ -1127,7 +1127,7 @@ _020807BC:
|
||||
mov r0, sb
|
||||
mov r1, r6
|
||||
mov r2, r5
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
ldr r3, [r4]
|
||||
mov r0, sl
|
||||
mov r1, r6
|
||||
@@ -1144,7 +1144,7 @@ _020807F0:
|
||||
mov r0, sb
|
||||
mov r1, r6
|
||||
mov r2, r8
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
.align 2, 0
|
||||
_02080810: .word _020B2D88
|
||||
@@ -1281,7 +1281,7 @@ _020808D4:
|
||||
add r1, sp, #0x10
|
||||
mov r2, #4
|
||||
str r0, [r3, #0x1c]
|
||||
bl ArrayFill32
|
||||
bl MTi_CpuClear32
|
||||
ldmia sp!, {r4, r5, r6, lr}
|
||||
add sp, sp, #0x10
|
||||
bx lr
|
||||
@@ -3047,7 +3047,7 @@ sub_020820E8: ; 0x020820E8
|
||||
ldr r0, _02082314 ; =0x003FFFFF
|
||||
bl OS_DisableIrqMask
|
||||
str r0, [sp, #4]
|
||||
bl sub_0207ADCC
|
||||
bl OS_IsTickAvailable
|
||||
cmp r0, #0
|
||||
movne r0, #8
|
||||
moveq r0, r4
|
||||
@@ -4409,7 +4409,7 @@ CARDi_InitCommon: ; 0x02083248
|
||||
str r0, [r4, #0xc]
|
||||
str r0, [r4, #0x18]
|
||||
str r1, [r4]
|
||||
bl ArrayFill32Fast
|
||||
bl MTi_CpuClearFast
|
||||
ldr r0, _02083340 ; =_022BB780
|
||||
mov r1, #0x60
|
||||
bl DC_FlushRange
|
||||
@@ -4426,7 +4426,7 @@ CARDi_InitCommon: ; 0x02083248
|
||||
ldr r0, _02083348 ; =0x027FFE00
|
||||
mov r2, #0x160
|
||||
sub r1, r0, #0x380
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
_020832BC:
|
||||
mov r2, #0
|
||||
mov r0, #4
|
||||
@@ -4611,7 +4611,7 @@ sub_020834A4: ; 0x020834A4
|
||||
mov r1, #0
|
||||
add r0, r4, #0x18
|
||||
mov r2, #0x48
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
ldr r0, _0208380C ; =0x0000203F
|
||||
str r5, [r4, #4]
|
||||
str r0, [r4, #0x58]
|
||||
@@ -4913,11 +4913,11 @@ _020838F0:
|
||||
ldr r0, [sb, #0x1c]
|
||||
mov r1, r6
|
||||
mov r2, r8
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
mov r0, r6
|
||||
mov r1, r8
|
||||
bl DC_FlushRange
|
||||
bl sub_0207A300
|
||||
bl DC_WaitWriteBufferEmpty
|
||||
ldr r0, [sb]
|
||||
str r6, [r0, #0xc]
|
||||
ldr r1, [sb, #0x20]
|
||||
@@ -4953,7 +4953,7 @@ _0208397C:
|
||||
ldr r1, [sb, #0x20]
|
||||
mov r0, r6
|
||||
mov r2, r8
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
_02083994:
|
||||
ldr r0, [sb, #0x1c]
|
||||
add r0, r0, r8
|
||||
@@ -5214,7 +5214,7 @@ CARDi_ReadFromCache: ; 0x02083C8C
|
||||
ldr r1, [r4, #0x20]
|
||||
mov r2, r5
|
||||
add r0, r0, r3
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
ldr r2, [r4, #0x1c]
|
||||
ldr r1, [r4, #0x20]
|
||||
ldr r0, [r4, #0x24]
|
||||
@@ -5273,7 +5273,7 @@ sub_02083D78: ; 0x02083D78
|
||||
ldr r2, [r4, #0x20]
|
||||
mov r3, #0x200
|
||||
ldr r5, _02083DC4 ; =_022BBE20
|
||||
bl sub_0207C750
|
||||
bl MTi_CardDmaCopy32
|
||||
ldr r1, [r4, #0x1c]
|
||||
mov r0, r1, lsr #8
|
||||
orr r0, r0, #0xb7000000
|
||||
@@ -5368,7 +5368,7 @@ sub_02083E9C: ; 0x02083E9C
|
||||
_02083ED4:
|
||||
cmp r1, #0
|
||||
beq _02083F28
|
||||
bl sub_0207AACC
|
||||
bl OS_GetDTCMAddress
|
||||
ldr r1, _02084018 ; =CopyAndInterleave
|
||||
add r3, sb, r5
|
||||
cmp r3, r1
|
||||
@@ -5417,10 +5417,10 @@ _02083F44:
|
||||
bhs _02083F94
|
||||
mov r0, sb
|
||||
mov r1, r5
|
||||
bl sub_0207A330
|
||||
bl IC_InvalidateRange
|
||||
b _02083F98
|
||||
_02083F94:
|
||||
bl sub_0207A324
|
||||
bl IC_InvalidateAll
|
||||
_02083F98:
|
||||
ldr r0, [r4, #0x11c]
|
||||
cmp r5, r0
|
||||
@@ -5430,16 +5430,16 @@ _02083F98:
|
||||
sub sb, sb, sl
|
||||
mov r0, sb
|
||||
mov r1, #0x20
|
||||
bl sub_0207A2C0
|
||||
bl DC_StoreRange
|
||||
add r0, sb, r5
|
||||
mov r1, #0x20
|
||||
bl sub_0207A2C0
|
||||
bl DC_StoreRange
|
||||
add r5, r5, #0x20
|
||||
_02083FCC:
|
||||
mov r0, sb
|
||||
mov r1, r5
|
||||
bl DC_InvalidateRange
|
||||
bl sub_0207A300
|
||||
bl DC_WaitWriteBufferEmpty
|
||||
b _02083FE4
|
||||
_02083FE0:
|
||||
bl DC_FlushAll
|
||||
@@ -5811,7 +5811,7 @@ _02084478:
|
||||
ldr r0, [sl]
|
||||
mov r1, #0x60
|
||||
bl DC_FlushRange
|
||||
bl sub_0207A300
|
||||
bl DC_WaitWriteBufferEmpty
|
||||
mov r7, #0xb
|
||||
mov r6, #1
|
||||
mov r5, r7
|
||||
@@ -6279,7 +6279,7 @@ sub_02084A04: ; 0x02084A04
|
||||
movne r1, #0x1000
|
||||
moveq r1, #0x5000
|
||||
mov r0, #0xf000
|
||||
bl sub_0207AB00
|
||||
bl OS_SetDPermissionsForProtectionRegion
|
||||
_02084A3C:
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
@@ -6436,7 +6436,7 @@ _02084C60:
|
||||
ldr r0, _02084CEC ; =0xFFFF0020
|
||||
ldr r1, _02084CF0 ; =_022BC084
|
||||
mov r2, #0x9c
|
||||
bl ArrayCopy32
|
||||
bl MTi_CpuCopy32
|
||||
bl DC_FlushAll
|
||||
ldr r0, _02084CDC ; =_022BC080
|
||||
add r0, r0, #0xfe000000
|
||||
@@ -6585,12 +6585,12 @@ _02084E2C: .word _022BC650
|
||||
|
||||
arm_func_start sub_02084E30
|
||||
sub_02084E30: ; 0x02084E30
|
||||
ldr ip, _02084E40 ; =MemsetFast
|
||||
ldr ip, _02084E40 ; =MI_CpuFill8
|
||||
mov r1, #0
|
||||
mov r2, #0x24
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02084E40: .word MemsetFast
|
||||
_02084E40: .word MI_CpuFill8
|
||||
arm_func_end sub_02084E30
|
||||
|
||||
arm_func_start sub_02084E44
|
||||
@@ -6608,7 +6608,7 @@ _02084E68:
|
||||
mov r0, r6
|
||||
mov r1, r5
|
||||
mov r2, fp
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
bl EnableIrqFlag
|
||||
ldr r1, [r8, #0xc0]
|
||||
mov r7, r0
|
||||
@@ -6895,10 +6895,10 @@ sub_020851AC: ; 0x020851AC
|
||||
add r1, sp, #0
|
||||
add r0, r4, #0x50
|
||||
mov r2, #8
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
add r0, sp, #0
|
||||
mov r1, #8
|
||||
bl sub_0207A2C0
|
||||
bl DC_StoreRange
|
||||
ldr r0, [r4, #0x44]
|
||||
cmp r0, #0
|
||||
bne _02085230
|
||||
@@ -7443,7 +7443,7 @@ _020858D0:
|
||||
mov r7, sl
|
||||
mov fp, sl
|
||||
str r3, [sp, #8]
|
||||
bl ArrayFill32
|
||||
bl MTi_CpuClear32
|
||||
ldrsb r0, [r8, #1]!
|
||||
cmp r0, #0x5e
|
||||
moveq r0, sl
|
||||
|
||||
@@ -267,17 +267,17 @@ _022B98F8:
|
||||
.global _022B991C
|
||||
_022B991C:
|
||||
.space 0x80
|
||||
.global _022B999C
|
||||
_022B999C:
|
||||
.global OSi_TimerReserved
|
||||
OSi_TimerReserved:
|
||||
.space 0x4
|
||||
.global _022B99A0
|
||||
_022B99A0:
|
||||
.global OSi_UseTick
|
||||
OSi_UseTick:
|
||||
.space 0x8
|
||||
.global _022B99A8
|
||||
_022B99A8:
|
||||
.space 0x8
|
||||
.global _022B99B0
|
||||
_022B99B0:
|
||||
.global OSi_UseAlarm
|
||||
OSi_UseAlarm:
|
||||
.space 0xC
|
||||
.global _022B99BC
|
||||
_022B99BC:
|
||||
@@ -285,11 +285,11 @@ _022B99BC:
|
||||
.global _022B99D0
|
||||
_022B99D0:
|
||||
.space 0x4
|
||||
.global _022B99D4
|
||||
_022B99D4:
|
||||
.global OSi_vramExclusive
|
||||
OSi_vramExclusive:
|
||||
.space 0x4
|
||||
.global _022B99D8
|
||||
_022B99D8:
|
||||
.global OSi_vramLockId
|
||||
OSi_vramLockId:
|
||||
.space 0x14
|
||||
.global _022B99EC
|
||||
_022B99EC:
|
||||
|
||||
1064
asm/overlay_00.s
1064
asm/overlay_00.s
File diff suppressed because it is too large
Load Diff
@@ -559,7 +559,7 @@ ov01_02329BC8: ; 0x02329BC8
|
||||
mov r2, #0x40
|
||||
ldr r0, [r1, #0x4c]
|
||||
ldr r1, [r1, #0x20]
|
||||
bl ArrayCopy32
|
||||
bl MTi_CpuCopy32
|
||||
ldr r0, _02329C2C ; =ov01_0233C240
|
||||
ldrh r1, [r0, #6]
|
||||
ldr r0, [r0, #0x20]
|
||||
|
||||
296
asm/overlay_02.s
296
asm/overlay_02.s
File diff suppressed because it is too large
Load Diff
@@ -511,7 +511,7 @@ _0233CF8C:
|
||||
strb r3, [r4, #0x15]
|
||||
add r1, r4, #0x16
|
||||
mov r2, r3, lsl #1
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
ldrb r1, [r4, #0x14]
|
||||
ldr r0, _0233D0E0 ; =ov08_0233EC28
|
||||
mov r3, #0
|
||||
@@ -1139,7 +1139,7 @@ ov08_0233D788: ; 0x0233D788
|
||||
mov r2, #0x16
|
||||
ldr r1, [r1, #4]
|
||||
add r1, r1, #0x34
|
||||
bl MemcpyFast
|
||||
bl MI_CpuCopy8
|
||||
_0233D7FC:
|
||||
ldr r0, _0233D814 ; =ov08_0233EC28
|
||||
ldr r1, [r0, #4]
|
||||
@@ -1534,7 +1534,7 @@ ov08_0233DC98: ; 0x0233DC98
|
||||
stmdb sp!, {r3, lr}
|
||||
sub sp, sp, #8
|
||||
add r0, sp, #0
|
||||
bl sub_0207B9EC
|
||||
bl OS_GetMacAddress
|
||||
ldr r1, _0233DD44 ; =0x027FFC3C
|
||||
ldrh r0, [sp]
|
||||
ldr r2, [r1]
|
||||
@@ -1811,15 +1811,15 @@ ov08_0233DFF8: ; 0x0233DFF8
|
||||
ldr r0, _0233E0E4 ; =ov08_0234AE00
|
||||
mov r2, #0x400
|
||||
strh r1, [r3, #4]
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
ldr r0, _0233E0E8 ; =ov08_0234AD40
|
||||
mov r1, #0
|
||||
mov r2, #0xc0
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
ldr r0, _0233E0EC ; =ov08_0234ACD4
|
||||
mov r1, #0
|
||||
mov r2, #0x18
|
||||
bl MemsetFast
|
||||
bl MI_CpuFill8
|
||||
ldr r1, _0233E0E0 ; =ov08_0234AC80
|
||||
mov r2, #0
|
||||
mov r0, #3
|
||||
|
||||
@@ -77,7 +77,7 @@ PRECOMPILE_OBJ_DIR := $(dir $(PRECOMPILE_OBJ))
|
||||
PRECOMPILE_DEPFILE := $(BUILD_DIR)/precompile/global.d
|
||||
|
||||
# Directories
|
||||
LIB_SUBDIRS := DSE
|
||||
LIB_SUBDIRS := DSE NitroSDK
|
||||
SRC_SUBDIR := src
|
||||
ASM_SUBDIR := asm
|
||||
LIB_SRC_SUBDIR := lib/src $(LIB_SUBDIRS:%=lib/%/src)
|
||||
|
||||
@@ -1,6 +0,0 @@
|
||||
#ifndef PMDSKY_MAIN_0207B860_H
|
||||
#define PMDSKY_MAIN_0207B860_H
|
||||
|
||||
void sub_0207B860();
|
||||
|
||||
#endif //PMDSKY_MAIN_0207B860_H
|
||||
121
lib/NitroSDK/asm/fx_cp.s
Normal file
121
lib/NitroSDK/asm/fx_cp.s
Normal file
@@ -0,0 +1,121 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/fx_cp.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start FX_Div
|
||||
FX_Div: ; 0x02075B38
|
||||
stmdb sp!, {r3, lr}
|
||||
bl FX_DivAsync
|
||||
bl FX_GetDivResult
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end FX_Div
|
||||
|
||||
arm_func_start FX_GetDivResultFx64c
|
||||
FX_GetDivResultFx64c: ; 0x02075B48
|
||||
ldr r1, _02075B64 ; =0x04000280
|
||||
_02075B4C:
|
||||
ldrh r0, [r1]
|
||||
tst r0, #0x8000
|
||||
bne _02075B4C
|
||||
ldr r1, _02075B68 ; =0x040002A0
|
||||
ldmia r1, {r0, r1}
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02075B64: .word 0x04000280
|
||||
_02075B68: .word 0x040002A0
|
||||
arm_func_end FX_GetDivResultFx64c
|
||||
|
||||
arm_func_start FX_GetDivResult
|
||||
FX_GetDivResult: ; 0x02075B6C
|
||||
ldr r1, _02075B9C ; =0x04000280
|
||||
_02075B70:
|
||||
ldrh r0, [r1]
|
||||
tst r0, #0x8000
|
||||
bne _02075B70
|
||||
ldr r0, _02075BA0 ; =0x040002A0
|
||||
ldr r1, [r0]
|
||||
ldr r0, [r0, #4]
|
||||
adds r2, r1, #0x80000
|
||||
adc r1, r0, #0
|
||||
mov r0, r2, lsr #0x14
|
||||
orr r0, r0, r1, lsl #12
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02075B9C: .word 0x04000280
|
||||
_02075BA0: .word 0x040002A0
|
||||
arm_func_end FX_GetDivResult
|
||||
|
||||
arm_func_start FX_InvAsync
|
||||
FX_InvAsync: ; 0x02075BA4
|
||||
ldr r2, _02075BD0 ; =0x04000280
|
||||
mov r1, #1
|
||||
strh r1, [r2]
|
||||
mov r1, #0
|
||||
str r1, [r2, #0x10]
|
||||
mov r1, #0x1000
|
||||
str r1, [r2, #0x14]
|
||||
str r0, [r2, #0x18]
|
||||
mov r0, #0
|
||||
str r0, [r2, #0x1c]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02075BD0: .word 0x04000280
|
||||
arm_func_end FX_InvAsync
|
||||
|
||||
arm_func_start FX_DivAsync
|
||||
FX_DivAsync: ; 0x02075BD4
|
||||
ldr r3, _02075BF8 ; =0x04000280
|
||||
mov r2, #1
|
||||
strh r2, [r3]
|
||||
mov r2, #0
|
||||
str r2, [r3, #0x10]
|
||||
str r0, [r3, #0x14]
|
||||
str r1, [r3, #0x18]
|
||||
str r2, [r3, #0x1c]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02075BF8: .word 0x04000280
|
||||
arm_func_end FX_DivAsync
|
||||
|
||||
arm_func_start FX_DivS32
|
||||
FX_DivS32: ; 0x02075BFC
|
||||
ldr r2, _02075C30 ; =0x04000280
|
||||
mov r3, #0
|
||||
strh r3, [r2]
|
||||
str r0, [r2, #0x10]
|
||||
str r1, [r2, #0x18]
|
||||
mov r0, r3
|
||||
str r0, [r2, #0x1c]
|
||||
_02075C18:
|
||||
ldrh r0, [r2]
|
||||
tst r0, #0x8000
|
||||
bne _02075C18
|
||||
ldr r0, _02075C34 ; =0x040002A0
|
||||
ldr r0, [r0]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02075C30: .word 0x04000280
|
||||
_02075C34: .word 0x040002A0
|
||||
arm_func_end FX_DivS32
|
||||
|
||||
arm_func_start FX_ModS32
|
||||
FX_ModS32: ; 0x02075C38
|
||||
ldr r2, _02075C6C ; =0x04000280
|
||||
mov r3, #0
|
||||
strh r3, [r2]
|
||||
str r0, [r2, #0x10]
|
||||
str r1, [r2, #0x18]
|
||||
mov r0, r3
|
||||
str r0, [r2, #0x1c]
|
||||
_02075C54:
|
||||
ldrh r0, [r2]
|
||||
tst r0, #0x8000
|
||||
bne _02075C54
|
||||
ldr r0, _02075C70 ; =0x040002A8
|
||||
ldr r0, [r0]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02075C6C: .word 0x04000280
|
||||
_02075C70: .word 0x040002A8
|
||||
arm_func_end FX_ModS32
|
||||
306
lib/NitroSDK/asm/fx_vec.s
Normal file
306
lib/NitroSDK/asm/fx_vec.s
Normal file
@@ -0,0 +1,306 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/fx_vec.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start VEC_DotProduct
|
||||
VEC_DotProduct: ; 0x02075C74
|
||||
stmdb sp!, {r4, lr}
|
||||
ldr r3, [r0, #4]
|
||||
ldr r2, [r1, #4]
|
||||
ldr ip, [r0]
|
||||
smull r4, lr, r3, r2
|
||||
ldr r2, [r1]
|
||||
ldr r3, [r0, #8]
|
||||
smlal r4, lr, ip, r2
|
||||
ldr r0, [r1, #8]
|
||||
smlal r4, lr, r3, r0
|
||||
adds r0, r4, #0x800
|
||||
adc r1, lr, #0
|
||||
mov r0, r0, lsr #0xc
|
||||
orr r0, r0, r1, lsl #20
|
||||
ldmia sp!, {r4, pc}
|
||||
arm_func_end VEC_DotProduct
|
||||
|
||||
arm_func_start VEC_CrossProduct
|
||||
VEC_CrossProduct: ; 0x02075CB0
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||||
ldmia r0, {r5, lr}
|
||||
ldr r6, [r1, #8]
|
||||
ldr r0, [r0, #8]
|
||||
ldmia r1, {r4, ip}
|
||||
smull r8, r7, lr, r6
|
||||
smull r3, r1, r0, ip
|
||||
subs r3, r8, r3
|
||||
sbc r1, r7, r1
|
||||
adds r3, r3, #0x800
|
||||
smull r8, r7, r0, r4
|
||||
smull r6, r0, r5, r6
|
||||
adc r1, r1, #0
|
||||
subs r6, r8, r6
|
||||
mov r3, r3, lsr #0xc
|
||||
orr r3, r3, r1, lsl #20
|
||||
sbc r7, r7, r0
|
||||
adds r0, r6, #0x800
|
||||
smull ip, r6, r5, ip
|
||||
adc r5, r7, #0
|
||||
smull r4, r1, lr, r4
|
||||
mov r7, r0, lsr #0xc
|
||||
subs r4, ip, r4
|
||||
sbc r0, r6, r1
|
||||
adds r1, r4, #0x800
|
||||
str r3, [r2]
|
||||
orr r7, r7, r5, lsl #20
|
||||
adc r0, r0, #0
|
||||
mov r1, r1, lsr #0xc
|
||||
str r7, [r2, #4]
|
||||
orr r1, r1, r0, lsl #20
|
||||
str r1, [r2, #8]
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
arm_func_end VEC_CrossProduct
|
||||
|
||||
arm_func_start VEC_Normalize
|
||||
VEC_Normalize: ; 0x02075D34
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
|
||||
ldr r2, [r0, #4]
|
||||
ldr r3, [r0]
|
||||
smull r6, r5, r2, r2
|
||||
smlal r6, r5, r3, r3
|
||||
ldr r2, [r0, #8]
|
||||
ldr r4, _02075E40 ; =0x04000280
|
||||
smlal r6, r5, r2, r2
|
||||
mov r3, #2
|
||||
strh r3, [r4]
|
||||
mov r3, #0
|
||||
str r3, [r4, #0x10]
|
||||
mov r3, #0x1000000
|
||||
str r3, [r4, #0x14]
|
||||
str r6, [r4, #0x18]
|
||||
mov r2, r5, lsl #2
|
||||
str r5, [r4, #0x1c]
|
||||
mov r3, #1
|
||||
strh r3, [r4, #0x30]
|
||||
mov r3, r6, lsl #2
|
||||
str r3, [r4, #0x38]
|
||||
orr r2, r2, r6, lsr #30
|
||||
str r2, [r4, #0x3c]
|
||||
_02075D90:
|
||||
ldrh r2, [r4, #0x30]
|
||||
tst r2, #0x8000
|
||||
bne _02075D90
|
||||
ldr r2, _02075E44 ; =0x040002B4
|
||||
ldr ip, [r2]
|
||||
sub r3, r2, #0x34
|
||||
_02075DA8:
|
||||
ldrh r2, [r3]
|
||||
tst r2, #0x8000
|
||||
bne _02075DA8
|
||||
ldr sb, _02075E48 ; =0x040002A0
|
||||
ldr r5, [r0]
|
||||
ldr r8, [sb]
|
||||
mov r7, ip, asr #0x1f
|
||||
umull r3, r2, r8, ip
|
||||
umull r6, lr, r3, r5
|
||||
mov r4, r5, asr #0x1f
|
||||
mla r2, r8, r7, r2
|
||||
ldr r7, [sb, #4]
|
||||
mla lr, r3, r4, lr
|
||||
mla r2, r7, ip, r2
|
||||
mla lr, r2, r5, lr
|
||||
adds r4, r6, #0
|
||||
adc r4, lr, #0x1000
|
||||
mov r4, r4, asr #0xd
|
||||
str r4, [r1]
|
||||
ldr ip, [r0, #4]
|
||||
umull r5, lr, r3, ip
|
||||
mov r4, ip, asr #0x1f
|
||||
mla lr, r3, r4, lr
|
||||
mla lr, r2, ip, lr
|
||||
adds r4, r5, #0
|
||||
adc r4, lr, #0x1000
|
||||
mov r4, r4, asr #0xd
|
||||
str r4, [r1, #4]
|
||||
ldr ip, [r0, #8]
|
||||
umull r4, lr, r3, ip
|
||||
mov r0, ip, asr #0x1f
|
||||
mla lr, r3, r0, lr
|
||||
mla lr, r2, ip, lr
|
||||
adds r0, r4, #0
|
||||
adc r0, lr, #0x1000
|
||||
mov r0, r0, asr #0xd
|
||||
str r0, [r1, #8]
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
|
||||
.align 2, 0
|
||||
_02075E40: .word 0x04000280
|
||||
_02075E44: .word 0x040002B4
|
||||
_02075E48: .word 0x040002A0
|
||||
arm_func_end VEC_Normalize
|
||||
|
||||
arm_func_start VEC_Distance
|
||||
VEC_Distance: ; 0x02075E4C
|
||||
stmdb sp!, {r4, lr}
|
||||
ldr r3, [r0, #4]
|
||||
ldr r2, [r1, #4]
|
||||
ldr r4, [r0]
|
||||
sub r2, r3, r2
|
||||
smull ip, r3, r2, r2
|
||||
ldr lr, [r1]
|
||||
ldr r2, [r0, #8]
|
||||
sub r4, r4, lr
|
||||
ldr r0, [r1, #8]
|
||||
smlal ip, r3, r4, r4
|
||||
sub r0, r2, r0
|
||||
smlal ip, r3, r0, r0
|
||||
mov r0, r3, lsl #2
|
||||
ldr r2, _02075EC0 ; =0x040002B0
|
||||
mov r1, #1
|
||||
strh r1, [r2]
|
||||
mov r1, ip, lsl #2
|
||||
str r1, [r2, #8]
|
||||
orr r0, r0, ip, lsr #30
|
||||
str r0, [r2, #0xc]
|
||||
_02075EA0:
|
||||
ldrh r0, [r2]
|
||||
tst r0, #0x8000
|
||||
bne _02075EA0
|
||||
ldr r0, _02075EC4 ; =0x040002B4
|
||||
ldr r0, [r0]
|
||||
add r0, r0, #1
|
||||
mov r0, r0, asr #1
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_02075EC0: .word 0x040002B0
|
||||
_02075EC4: .word 0x040002B4
|
||||
arm_func_end VEC_Distance
|
||||
|
||||
arm_func_start FX_Atan2Idx
|
||||
FX_Atan2Idx: ; 0x02075EC8
|
||||
stmdb sp!, {r4, lr}
|
||||
cmp r0, #0
|
||||
ble _02075F5C
|
||||
cmp r1, #0
|
||||
ble _02075F14
|
||||
cmp r1, r0
|
||||
ble _02075EF4
|
||||
mov r2, r0
|
||||
mov r4, #0
|
||||
mov r0, #1
|
||||
b _0207600C
|
||||
_02075EF4:
|
||||
bge _02075F0C
|
||||
mov r2, r1
|
||||
mov r1, r0
|
||||
mov r4, #0x4000
|
||||
mov r0, #0
|
||||
b _0207600C
|
||||
_02075F0C:
|
||||
mov r0, #0x2000
|
||||
ldmia sp!, {r4, pc}
|
||||
_02075F14:
|
||||
bge _02075F54
|
||||
rsb r1, r1, #0
|
||||
cmp r1, r0
|
||||
bge _02075F38
|
||||
mov r2, r1
|
||||
mov r1, r0
|
||||
mov r4, #0x4000
|
||||
mov r0, #1
|
||||
b _0207600C
|
||||
_02075F38:
|
||||
ble _02075F4C
|
||||
mov r2, r0
|
||||
mov r4, #0x8000
|
||||
mov r0, #0
|
||||
b _0207600C
|
||||
_02075F4C:
|
||||
mov r0, #0x6000
|
||||
ldmia sp!, {r4, pc}
|
||||
_02075F54:
|
||||
mov r0, #0x4000
|
||||
ldmia sp!, {r4, pc}
|
||||
_02075F5C:
|
||||
bge _02075FFC
|
||||
cmp r1, #0
|
||||
rsb r0, r0, #0
|
||||
bge _02075FB0
|
||||
rsb r1, r1, #0
|
||||
cmp r1, r0
|
||||
ble _02075F8C
|
||||
mov r4, #0x8000
|
||||
mov r2, r0
|
||||
rsb r4, r4, #0
|
||||
mov r0, #1
|
||||
b _0207600C
|
||||
_02075F8C:
|
||||
bge _02075FA8
|
||||
mov r4, #0x4000
|
||||
mov r2, r1
|
||||
mov r1, r0
|
||||
rsb r4, r4, #0
|
||||
mov r0, #0
|
||||
b _0207600C
|
||||
_02075FA8:
|
||||
mov r0, #0xa000
|
||||
ldmia sp!, {r4, pc}
|
||||
_02075FB0:
|
||||
cmp r1, #0
|
||||
ble _02075FF4
|
||||
cmp r1, r0
|
||||
bge _02075FD8
|
||||
mov r4, #0x4000
|
||||
mov r2, r1
|
||||
mov r1, r0
|
||||
rsb r4, r4, #0
|
||||
mov r0, #1
|
||||
b _0207600C
|
||||
_02075FD8:
|
||||
ble _02075FEC
|
||||
mov r4, #0
|
||||
mov r2, r0
|
||||
mov r0, r4
|
||||
b _0207600C
|
||||
_02075FEC:
|
||||
mov r0, #0xe000
|
||||
ldmia sp!, {r4, pc}
|
||||
_02075FF4:
|
||||
mov r0, #0xc000
|
||||
ldmia sp!, {r4, pc}
|
||||
_02075FFC:
|
||||
cmp r1, #0
|
||||
movge r0, #0
|
||||
movlt r0, #0x8000
|
||||
ldmia sp!, {r4, pc}
|
||||
_0207600C:
|
||||
cmp r1, #0
|
||||
moveq r0, #0
|
||||
ldmeqia sp!, {r4, pc}
|
||||
cmp r0, #0
|
||||
mov r0, r2
|
||||
beq _02076048
|
||||
bl FX_Div
|
||||
mov r1, r0, asr #5
|
||||
ldr r0, _0207606C ; =FX_AtanIdxTable_
|
||||
mov r1, r1, lsl #1
|
||||
ldrsh r0, [r0, r1]
|
||||
add r0, r4, r0
|
||||
mov r0, r0, lsl #0x10
|
||||
mov r0, r0, lsr #0x10
|
||||
ldmia sp!, {r4, pc}
|
||||
_02076048:
|
||||
bl FX_Div
|
||||
mov r1, r0, asr #5
|
||||
ldr r0, _0207606C ; =FX_AtanIdxTable_
|
||||
mov r1, r1, lsl #1
|
||||
ldrsh r0, [r0, r1]
|
||||
sub r0, r4, r0
|
||||
mov r0, r0, lsl #0x10
|
||||
mov r0, r0, lsr #0x10
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207606C: .word FX_AtanIdxTable_
|
||||
arm_func_end FX_Atan2Idx
|
||||
|
||||
arm_func_start sub_02076070
|
||||
sub_02076070: ; 0x02076070
|
||||
bx lr
|
||||
arm_func_end sub_02076070
|
||||
53
lib/NitroSDK/asm/g2.s
Normal file
53
lib/NitroSDK/asm/g2.s
Normal file
@@ -0,0 +1,53 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/g2.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start G2x_SetBlendAlpha_
|
||||
G2x_SetBlendAlpha_: ; 0x020776E8
|
||||
ldr ip, [sp]
|
||||
orr r1, r1, #0x40
|
||||
orr r2, r1, r2, lsl #8
|
||||
orr r1, r3, ip, lsl #8
|
||||
orr r1, r2, r1, lsl #16
|
||||
str r1, [r0]
|
||||
bx lr
|
||||
arm_func_end G2x_SetBlendAlpha_
|
||||
|
||||
arm_func_start G2x_SetBlendBrightness_
|
||||
G2x_SetBlendBrightness_: ; 0x02077704
|
||||
cmp r2, #0
|
||||
orrge r1, r1, #0x80
|
||||
strgeh r1, [r0]
|
||||
strgeh r2, [r0, #4]
|
||||
bxge lr
|
||||
orr r1, r1, #0xc0
|
||||
strh r1, [r0]
|
||||
rsb r1, r2, #0
|
||||
strh r1, [r0, #4]
|
||||
bx lr
|
||||
arm_func_end G2x_SetBlendBrightness_
|
||||
|
||||
arm_func_start G2x_ChangeBlendBrightness_
|
||||
G2x_ChangeBlendBrightness_: ; 0x0207772C
|
||||
ldrh r3, [r0]
|
||||
cmp r1, #0
|
||||
and r2, r3, #0xc0
|
||||
bge _02077758
|
||||
cmp r2, #0x80
|
||||
biceq r2, r3, #0xc0
|
||||
orreq r2, r2, #0xc0
|
||||
streqh r2, [r0]
|
||||
rsb r1, r1, #0
|
||||
strh r1, [r0, #4]
|
||||
bx lr
|
||||
_02077758:
|
||||
cmp r2, #0xc0
|
||||
biceq r2, r3, #0xc0
|
||||
orreq r2, r2, #0x80
|
||||
streqh r2, [r0]
|
||||
strh r1, [r0, #4]
|
||||
bx lr
|
||||
arm_func_end G2x_ChangeBlendBrightness_
|
||||
|
||||
|
||||
42
lib/NitroSDK/asm/g3imm.s
Normal file
42
lib/NitroSDK/asm/g3imm.s
Normal file
@@ -0,0 +1,42 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/g3imm.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start G3_LoadMtx44
|
||||
G3_LoadMtx44: ; 0x02077770
|
||||
ldr r1, _02077784 ; =0x04000400
|
||||
mov r2, #0x16
|
||||
ldr ip, _02077788 ; =GX_SendFifo64B
|
||||
str r2, [r1]
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02077784: .word 0x04000400
|
||||
_02077788: .word GX_SendFifo64B
|
||||
arm_func_end G3_LoadMtx44
|
||||
|
||||
arm_func_start G3_LoadMtx43
|
||||
G3_LoadMtx43: ; 0x0207778C
|
||||
ldr r1, _020777A0 ; =0x04000400
|
||||
mov r2, #0x17
|
||||
ldr ip, _020777A4 ; =GX_SendFifo48B
|
||||
str r2, [r1]
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_020777A0: .word 0x04000400
|
||||
_020777A4: .word GX_SendFifo48B
|
||||
arm_func_end G3_LoadMtx43
|
||||
|
||||
arm_func_start G3_MultMtx43
|
||||
G3_MultMtx43: ; 0x020777A8
|
||||
ldr r1, _020777BC ; =0x04000400
|
||||
mov r2, #0x19
|
||||
ldr ip, _020777C0 ; =GX_SendFifo48B
|
||||
str r2, [r1]
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_020777BC: .word 0x04000400
|
||||
_020777C0: .word GX_SendFifo48B
|
||||
arm_func_end G3_MultMtx43
|
||||
|
||||
|
||||
406
lib/NitroSDK/asm/g3x.s
Normal file
406
lib/NitroSDK/asm/g3x.s
Normal file
@@ -0,0 +1,406 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/g3x.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start G3X_Init
|
||||
G3X_Init: ; 0x020777C4
|
||||
stmdb sp!, {r3, lr}
|
||||
bl G3X_ClearFifo
|
||||
ldr r1, _020778B0 ; =0x04000504
|
||||
mov r0, #0
|
||||
str r0, [r1]
|
||||
_020777D8:
|
||||
ldr r0, [r1, #0xfc]
|
||||
tst r0, #0x8000000
|
||||
bne _020777D8
|
||||
ldr r0, _020778B4 ; =0x04000060
|
||||
mov r2, #0
|
||||
strh r2, [r0]
|
||||
str r2, [r1, #0xfc]
|
||||
str r2, [r0, #-0x50]
|
||||
ldrh ip, [r0]
|
||||
ldr r2, _020778B8 ; =0xFFFFCFFD
|
||||
ldr r3, _020778BC ; =0x0000CFFB
|
||||
orr ip, ip, #0x2000
|
||||
strh ip, [r0]
|
||||
ldrh ip, [r0]
|
||||
orr ip, ip, #0x1000
|
||||
strh ip, [r0]
|
||||
ldrh ip, [r0]
|
||||
and r2, ip, r2
|
||||
strh r2, [r0]
|
||||
ldrh r2, [r0]
|
||||
bic r2, r2, #0x3000
|
||||
orr r2, r2, #0x10
|
||||
strh r2, [r0]
|
||||
ldrh r2, [r0]
|
||||
and r2, r2, r3
|
||||
strh r2, [r0]
|
||||
ldr r0, [r1, #0xfc]
|
||||
orr r0, r0, #0x8000
|
||||
str r0, [r1, #0xfc]
|
||||
ldr r0, [r1, #0xfc]
|
||||
bic r0, r0, #0xc0000000
|
||||
orr r0, r0, #0x80000000
|
||||
str r0, [r1, #0xfc]
|
||||
bl G3X_InitMtxStack
|
||||
ldr r1, _020778C0 ; =0x04000350
|
||||
mov r2, #0
|
||||
ldr r0, _020778C4 ; =0x00007FFF
|
||||
str r2, [r1]
|
||||
strh r0, [r1, #4]
|
||||
strh r2, [r1, #6]
|
||||
str r2, [r1, #8]
|
||||
strh r2, [r1, #0xc]
|
||||
sub r1, r1, #0x348
|
||||
ldrh r0, [r1]
|
||||
bic r0, r0, #3
|
||||
strh r0, [r1]
|
||||
bl G3X_InitTable
|
||||
ldr r2, _020778C8 ; =0x001F0080
|
||||
ldr r1, _020778CC ; =0x040004A4
|
||||
mov r0, #0
|
||||
str r2, [r1]
|
||||
str r0, [r1, #4]
|
||||
str r0, [r1, #8]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_020778B0: .word 0x04000504
|
||||
_020778B4: .word 0x04000060
|
||||
_020778B8: .word 0xFFFFCFFD
|
||||
_020778BC: .word 0x0000CFFB
|
||||
_020778C0: .word 0x04000350
|
||||
_020778C4: .word 0x00007FFF
|
||||
_020778C8: .word 0x001F0080
|
||||
_020778CC: .word 0x040004A4
|
||||
arm_func_end G3X_Init
|
||||
|
||||
arm_func_start G3X_Reset
|
||||
G3X_Reset: ; 0x020778D0
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r2, _0207792C ; =0x04000600
|
||||
_020778D8:
|
||||
ldr r0, [r2]
|
||||
tst r0, #0x8000000
|
||||
bne _020778D8
|
||||
ldr r0, [r2]
|
||||
ldr r1, _02077930 ; =0x04000060
|
||||
orr r0, r0, #0x8000
|
||||
str r0, [r2]
|
||||
ldrh r0, [r1]
|
||||
orr r0, r0, #0x2000
|
||||
strh r0, [r1]
|
||||
ldrh r0, [r1]
|
||||
orr r0, r0, #0x1000
|
||||
strh r0, [r1]
|
||||
bl G3X_ResetMtxStack
|
||||
ldr r2, _02077934 ; =0x001F0080
|
||||
ldr r1, _02077938 ; =0x040004A4
|
||||
mov r0, #0
|
||||
str r2, [r1]
|
||||
str r0, [r1, #4]
|
||||
str r0, [r1, #8]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207792C: .word 0x04000600
|
||||
_02077930: .word 0x04000060
|
||||
_02077934: .word 0x001F0080
|
||||
_02077938: .word 0x040004A4
|
||||
arm_func_end G3X_Reset
|
||||
|
||||
arm_func_start G3X_ClearFifo
|
||||
G3X_ClearFifo: ; 0x0207793C
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r0, _0207795C ; =0x04000400
|
||||
bl GXi_NopClearFifo128_
|
||||
ldr r1, _02077960 ; =0x04000600
|
||||
_0207794C:
|
||||
ldr r0, [r1]
|
||||
tst r0, #0x8000000
|
||||
bne _0207794C
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207795C: .word 0x04000400
|
||||
_02077960: .word 0x04000600
|
||||
arm_func_end G3X_ClearFifo
|
||||
|
||||
arm_func_start G3X_InitMtxStack
|
||||
G3X_InitMtxStack: ; 0x02077964
|
||||
stmdb sp!, {r4, lr}
|
||||
sub sp, sp, #8
|
||||
ldr r1, _020779F0 ; =0x04000600
|
||||
ldr r0, [r1]
|
||||
orr r0, r0, #0x8000
|
||||
str r0, [r1]
|
||||
add r4, sp, #4
|
||||
_02077980:
|
||||
mov r0, r4
|
||||
bl G3X_GetMtxStackLevelPV
|
||||
cmp r0, #0
|
||||
bne _02077980
|
||||
add r4, sp, #0
|
||||
_02077994:
|
||||
mov r0, r4
|
||||
bl G3X_GetMtxStackLevelPJ
|
||||
cmp r0, #0
|
||||
bne _02077994
|
||||
ldr r1, _020779F4 ; =0x04000440
|
||||
mov r0, #3
|
||||
str r0, [r1]
|
||||
mov r0, #0
|
||||
str r0, [r1, #0x14]
|
||||
str r0, [r1]
|
||||
ldr r0, [sp]
|
||||
mov r2, #0
|
||||
cmp r0, #0
|
||||
strne r0, [r1, #8]
|
||||
ldr r1, _020779F8 ; =0x04000454
|
||||
mov r0, #2
|
||||
str r2, [r1]
|
||||
str r0, [r1, #-0x14]
|
||||
ldr r0, [sp, #4]
|
||||
str r0, [r1, #-0xc]
|
||||
str r2, [r1]
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_020779F0: .word 0x04000600
|
||||
_020779F4: .word 0x04000440
|
||||
_020779F8: .word 0x04000454
|
||||
arm_func_end G3X_InitMtxStack
|
||||
|
||||
arm_func_start G3X_ResetMtxStack
|
||||
G3X_ResetMtxStack: ; 0x020779FC
|
||||
stmdb sp!, {r4, lr}
|
||||
sub sp, sp, #8
|
||||
ldr r1, _02077A84 ; =0x04000600
|
||||
ldr r0, [r1]
|
||||
orr r0, r0, #0x8000
|
||||
str r0, [r1]
|
||||
add r4, sp, #4
|
||||
_02077A18:
|
||||
mov r0, r4
|
||||
bl G3X_GetMtxStackLevelPV
|
||||
cmp r0, #0
|
||||
bne _02077A18
|
||||
add r4, sp, #0
|
||||
_02077A2C:
|
||||
mov r0, r4
|
||||
bl G3X_GetMtxStackLevelPJ
|
||||
cmp r0, #0
|
||||
bne _02077A2C
|
||||
ldr r1, _02077A88 ; =0x04000440
|
||||
mov r0, #3
|
||||
str r0, [r1]
|
||||
mov r0, #0
|
||||
str r0, [r1, #0x14]
|
||||
str r0, [r1]
|
||||
ldr r0, [sp]
|
||||
ldr r2, _02077A88 ; =0x04000440
|
||||
cmp r0, #0
|
||||
strne r0, [r1, #8]
|
||||
mov r0, #2
|
||||
str r0, [r2]
|
||||
ldr r1, [sp, #4]
|
||||
mov r0, #0
|
||||
str r1, [r2, #8]
|
||||
str r0, [r2, #0x14]
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_02077A84: .word 0x04000600
|
||||
_02077A88: .word 0x04000440
|
||||
arm_func_end G3X_ResetMtxStack
|
||||
|
||||
arm_func_start G3X_SetClearColor
|
||||
G3X_SetClearColor: ; 0x02077A8C
|
||||
ldr ip, [sp]
|
||||
orr r0, r0, r1, lsl #16
|
||||
orr r1, r0, r3, lsl #24
|
||||
cmp ip, #0
|
||||
ldr r0, _02077AB0 ; =0x04000350
|
||||
orrne r1, r1, #0x8000
|
||||
str r1, [r0]
|
||||
strh r2, [r0, #4]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02077AB0: .word 0x04000350
|
||||
arm_func_end G3X_SetClearColor
|
||||
|
||||
arm_func_start G3X_InitTable
|
||||
G3X_InitTable: ; 0x02077AB4
|
||||
stmdb sp!, {r3, lr}
|
||||
sub sp, sp, #8
|
||||
ldr r0, _02077B44 ; =GXi_DmaId
|
||||
mvn r1, #0
|
||||
ldr r0, [r0]
|
||||
cmp r0, r1
|
||||
ldr r1, _02077B48 ; =0x04000330
|
||||
beq _02077B04
|
||||
mov r2, #0
|
||||
str r2, [sp]
|
||||
mov r3, #0x10
|
||||
str r2, [sp, #4]
|
||||
bl sub_0207BDA8
|
||||
ldr r0, _02077B44 ; =GXi_DmaId
|
||||
ldr r1, _02077B4C ; =0x04000360
|
||||
ldr r0, [r0]
|
||||
mov r2, #0
|
||||
mov r3, #0x60
|
||||
bl sub_0207BC4C
|
||||
b _02077B20
|
||||
_02077B04:
|
||||
mov r0, #0
|
||||
mov r2, #0x10
|
||||
bl MTi_CpuClear32
|
||||
ldr r1, _02077B4C ; =0x04000360
|
||||
mov r0, #0
|
||||
mov r2, #0x60
|
||||
bl MTi_CpuClear32
|
||||
_02077B20:
|
||||
mov r2, #0
|
||||
ldr r0, _02077B50 ; =0x040004D0
|
||||
mov r1, r2
|
||||
_02077B2C:
|
||||
add r2, r2, #1
|
||||
str r1, [r0]
|
||||
cmp r2, #0x20
|
||||
blt _02077B2C
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02077B44: .word GXi_DmaId
|
||||
_02077B48: .word 0x04000330
|
||||
_02077B4C: .word 0x04000360
|
||||
_02077B50: .word 0x040004D0
|
||||
arm_func_end G3X_InitTable
|
||||
|
||||
arm_func_start G3X_GetMtxStackLevelPV
|
||||
G3X_GetMtxStackLevelPV: ; 0x02077B54
|
||||
ldr r2, _02077B80 ; =0x04000600
|
||||
ldr r1, [r2]
|
||||
tst r1, #0x4000
|
||||
mvnne r0, #0
|
||||
bxne lr
|
||||
ldr r1, [r2]
|
||||
and r1, r1, #0x1f00
|
||||
mov r1, r1, lsr #8
|
||||
str r1, [r0]
|
||||
mov r0, #0
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02077B80: .word 0x04000600
|
||||
arm_func_end G3X_GetMtxStackLevelPV
|
||||
|
||||
arm_func_start G3X_GetMtxStackLevelPJ
|
||||
G3X_GetMtxStackLevelPJ: ; 0x02077B84
|
||||
ldr r2, _02077BB0 ; =0x04000600
|
||||
ldr r1, [r2]
|
||||
tst r1, #0x4000
|
||||
mvnne r0, #0
|
||||
bxne lr
|
||||
ldr r1, [r2]
|
||||
and r1, r1, #0x2000
|
||||
mov r1, r1, lsr #0xd
|
||||
str r1, [r0]
|
||||
mov r0, #0
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02077BB0: .word 0x04000600
|
||||
arm_func_end G3X_GetMtxStackLevelPJ
|
||||
|
||||
arm_func_start GXi_NopClearFifo128_
|
||||
GXi_NopClearFifo128_: ; 0x02077BB4
|
||||
mov r1, #0
|
||||
mov r2, #0
|
||||
mov r3, #0
|
||||
mov ip, #0
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
stmia r0, {r1, r2, r3, ip}
|
||||
bx lr
|
||||
arm_func_end GXi_NopClearFifo128_
|
||||
|
||||
arm_func_start G3i_OrthoW_
|
||||
G3i_OrthoW_: ; 0x02077C48
|
||||
stmdb sp!, {r4, lr}
|
||||
sub sp, sp, #0x50
|
||||
ldr ip, [sp, #0x58]
|
||||
ldr lr, [sp, #0x5c]
|
||||
str ip, [sp]
|
||||
ldr r4, [sp, #0x68]
|
||||
ldr ip, [sp, #0x60]
|
||||
str lr, [sp, #4]
|
||||
cmp r4, #0
|
||||
addeq r4, sp, #0x10
|
||||
str ip, [sp, #8]
|
||||
str r4, [sp, #0xc]
|
||||
bl MTX_OrthoW
|
||||
ldr r0, [sp, #0x64]
|
||||
cmp r0, #0
|
||||
addeq sp, sp, #0x50
|
||||
ldmeqia sp!, {r4, pc}
|
||||
ldr r1, _02077CA8 ; =0x04000440
|
||||
mov r2, #0
|
||||
mov r0, r4
|
||||
str r2, [r1]
|
||||
bl G3_LoadMtx44
|
||||
add sp, sp, #0x50
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_02077CA8: .word 0x04000440
|
||||
arm_func_end G3i_OrthoW_
|
||||
|
||||
arm_func_start G3i_LookAt_
|
||||
G3i_LookAt_: ; 0x02077CAC
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
sub sp, sp, #0x30
|
||||
ldr r4, [sp, #0x40]
|
||||
mov r5, r3
|
||||
cmp r4, #0
|
||||
addeq r4, sp, #0
|
||||
mov r3, r4
|
||||
bl MTX_LookAt
|
||||
cmp r5, #0
|
||||
addeq sp, sp, #0x30
|
||||
ldmeqia sp!, {r3, r4, r5, pc}
|
||||
ldr r1, _02077CF4 ; =0x04000440
|
||||
mov r2, #2
|
||||
mov r0, r4
|
||||
str r2, [r1]
|
||||
bl G3_LoadMtx43
|
||||
add sp, sp, #0x30
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_02077CF4: .word 0x04000440
|
||||
arm_func_end G3i_LookAt_
|
||||
1580
lib/NitroSDK/asm/gx.s
Normal file
1580
lib/NitroSDK/asm/gx.s
Normal file
File diff suppressed because it is too large
Load Diff
28
lib/NitroSDK/asm/gx_asm.s
Normal file
28
lib/NitroSDK/asm/gx_asm.s
Normal file
@@ -0,0 +1,28 @@
|
||||
.include "asm/macros.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start GX_SendFifo48B
|
||||
GX_SendFifo48B: ; 0x020788C0
|
||||
ldmia r0!, {r2, r3, ip}
|
||||
stmia r1, {r2, r3, ip}
|
||||
ldmia r0!, {r2, r3, ip}
|
||||
stmia r1, {r2, r3, ip}
|
||||
ldmia r0!, {r2, r3, ip}
|
||||
stmia r1, {r2, r3, ip}
|
||||
ldmia r0!, {r2, r3, ip}
|
||||
stmia r1, {r2, r3, ip}
|
||||
bx lr
|
||||
arm_func_end GX_SendFifo48B
|
||||
|
||||
arm_func_start GX_SendFifo64B
|
||||
GX_SendFifo64B: ; 0x020788E4
|
||||
stmdb sp!, {r4, r5, r6, r7, r8}
|
||||
ldmia r0!, {r2, r3, r4, r5, r6, r7, r8, ip}
|
||||
stmia r1, {r2, r3, r4, r5, r6, r7, r8, ip}
|
||||
ldmia r0!, {r2, r3, r4, r5, r6, r7, r8, ip}
|
||||
stmia r1, {r2, r3, r4, r5, r6, r7, r8, ip}
|
||||
ldmia sp!, {r4, r5, r6, r7, r8}
|
||||
bx lr
|
||||
arm_func_end GX_SendFifo64B
|
||||
|
||||
267
lib/NitroSDK/asm/gx_bgcnt.s
Normal file
267
lib/NitroSDK/asm/gx_bgcnt.s
Normal file
@@ -0,0 +1,267 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/gx_bgcnt.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start G2_GetBG0ScrPtr
|
||||
G2_GetBG0ScrPtr: ; 0x020773E8
|
||||
ldr r1, _02077418 ; =0x04000008
|
||||
mov r0, #0x4000000
|
||||
ldrh r1, [r1]
|
||||
ldr r0, [r0]
|
||||
and r0, r0, #0x38000000
|
||||
mov r0, r0, lsr #0x1b
|
||||
and r1, r1, #0x1f00
|
||||
mov r0, r0, lsl #0x10
|
||||
mov r1, r1, asr #8
|
||||
add r0, r0, #0x6000000
|
||||
add r0, r0, r1, lsl #11
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02077418: .word 0x04000008
|
||||
arm_func_end G2_GetBG0ScrPtr
|
||||
|
||||
arm_func_start G2S_GetBG0ScrPtr
|
||||
G2S_GetBG0ScrPtr: ; 0x0207741C
|
||||
ldr r0, _02077438 ; =0x04001008
|
||||
ldrh r0, [r0]
|
||||
and r0, r0, #0x1f00
|
||||
mov r0, r0, asr #8
|
||||
mov r0, r0, lsl #0xb
|
||||
add r0, r0, #0x6200000
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02077438: .word 0x04001008
|
||||
arm_func_end G2S_GetBG0ScrPtr
|
||||
|
||||
arm_func_start G2_GetBG1ScrPtr
|
||||
G2_GetBG1ScrPtr: ; 0x0207743C
|
||||
ldr r1, _0207746C ; =0x0400000A
|
||||
mov r0, #0x4000000
|
||||
ldrh r1, [r1]
|
||||
ldr r0, [r0]
|
||||
and r0, r0, #0x38000000
|
||||
mov r0, r0, lsr #0x1b
|
||||
and r1, r1, #0x1f00
|
||||
mov r0, r0, lsl #0x10
|
||||
mov r1, r1, asr #8
|
||||
add r0, r0, #0x6000000
|
||||
add r0, r0, r1, lsl #11
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207746C: .word 0x0400000A
|
||||
arm_func_end G2_GetBG1ScrPtr
|
||||
|
||||
arm_func_start G2S_GetBG1ScrPtr
|
||||
G2S_GetBG1ScrPtr: ; 0x02077470
|
||||
ldr r0, _0207748C ; =0x0400100A
|
||||
ldrh r0, [r0]
|
||||
and r0, r0, #0x1f00
|
||||
mov r0, r0, asr #8
|
||||
mov r0, r0, lsl #0xb
|
||||
add r0, r0, #0x6200000
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207748C: .word 0x0400100A
|
||||
arm_func_end G2S_GetBG1ScrPtr
|
||||
|
||||
arm_func_start G2_GetBG2ScrPtr
|
||||
G2_GetBG2ScrPtr: ; 0x02077490
|
||||
mov r0, #0x4000000
|
||||
ldr r1, [r0]
|
||||
ldrh r3, [r0, #0xc]
|
||||
ldr r0, [r0]
|
||||
and ip, r1, #7
|
||||
and r0, r0, #0x38000000
|
||||
mov r1, r0, lsr #0x1b
|
||||
and r0, r3, #0x1f00
|
||||
mov r2, r1, lsl #0x10
|
||||
cmp ip, #6
|
||||
mov r1, r0, lsr #8
|
||||
addls pc, pc, ip, lsl #2
|
||||
b _0207750C
|
||||
_020774C4: ; jump table
|
||||
b _020774E0 ; case 0
|
||||
b _020774E0 ; case 1
|
||||
b _020774E0 ; case 2
|
||||
b _020774E0 ; case 3
|
||||
b _020774E0 ; case 4
|
||||
b _020774EC ; case 5
|
||||
b _02077504 ; case 6
|
||||
_020774E0:
|
||||
add r0, r2, #0x6000000
|
||||
add r0, r0, r1, lsl #11
|
||||
bx lr
|
||||
_020774EC:
|
||||
tst r3, #0x80
|
||||
movne r0, r1, lsl #0xe
|
||||
addne r0, r0, #0x6000000
|
||||
addeq r0, r2, #0x6000000
|
||||
addeq r0, r0, r1, lsl #11
|
||||
bx lr
|
||||
_02077504:
|
||||
mov r0, #0x6000000
|
||||
bx lr
|
||||
_0207750C:
|
||||
mov r0, #0
|
||||
bx lr
|
||||
arm_func_end G2_GetBG2ScrPtr
|
||||
|
||||
arm_func_start G2_GetBG3ScrPtr
|
||||
G2_GetBG3ScrPtr: ; 0x02077514
|
||||
mov r0, #0x4000000
|
||||
ldr r1, [r0]
|
||||
ldrh r3, [r0, #0xe]
|
||||
ldr r0, [r0]
|
||||
and ip, r1, #7
|
||||
and r0, r0, #0x38000000
|
||||
mov r1, r0, lsr #0x1b
|
||||
and r0, r3, #0x1f00
|
||||
mov r2, r1, lsl #0x10
|
||||
cmp ip, #6
|
||||
mov r1, r0, lsr #8
|
||||
addls pc, pc, ip, lsl #2
|
||||
b _02077590
|
||||
_02077548: ; jump table
|
||||
b _02077564 ; case 0
|
||||
b _02077564 ; case 1
|
||||
b _02077564 ; case 2
|
||||
b _02077570 ; case 3
|
||||
b _02077570 ; case 4
|
||||
b _02077570 ; case 5
|
||||
b _02077588 ; case 6
|
||||
_02077564:
|
||||
add r0, r2, #0x6000000
|
||||
add r0, r0, r1, lsl #11
|
||||
bx lr
|
||||
_02077570:
|
||||
tst r3, #0x80
|
||||
movne r0, r1, lsl #0xe
|
||||
addne r0, r0, #0x6000000
|
||||
addeq r0, r2, #0x6000000
|
||||
addeq r0, r0, r1, lsl #11
|
||||
bx lr
|
||||
_02077588:
|
||||
mov r0, #0
|
||||
bx lr
|
||||
_02077590:
|
||||
mov r0, #0
|
||||
bx lr
|
||||
arm_func_end G2_GetBG3ScrPtr
|
||||
|
||||
arm_func_start G2_GetBG0CharPtr
|
||||
G2_GetBG0CharPtr: ; 0x02077598
|
||||
ldr r1, _020775C8 ; =0x04000008
|
||||
mov r0, #0x4000000
|
||||
ldrh r1, [r1]
|
||||
ldr r0, [r0]
|
||||
and r0, r0, #0x7000000
|
||||
mov r0, r0, lsr #0x18
|
||||
and r1, r1, #0x3c
|
||||
mov r0, r0, lsl #0x10
|
||||
mov r1, r1, asr #2
|
||||
add r0, r0, #0x6000000
|
||||
add r0, r0, r1, lsl #14
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_020775C8: .word 0x04000008
|
||||
arm_func_end G2_GetBG0CharPtr
|
||||
|
||||
arm_func_start G2S_GetBG0CharPtr
|
||||
G2S_GetBG0CharPtr: ; 0x020775CC
|
||||
ldr r0, _020775E8 ; =0x04001008
|
||||
ldrh r0, [r0]
|
||||
and r0, r0, #0x3c
|
||||
mov r0, r0, asr #2
|
||||
mov r0, r0, lsl #0xe
|
||||
add r0, r0, #0x6200000
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_020775E8: .word 0x04001008
|
||||
arm_func_end G2S_GetBG0CharPtr
|
||||
|
||||
arm_func_start G2_GetBG1CharPtr
|
||||
G2_GetBG1CharPtr: ; 0x020775EC
|
||||
ldr r1, _0207761C ; =0x0400000A
|
||||
mov r0, #0x4000000
|
||||
ldrh r1, [r1]
|
||||
ldr r0, [r0]
|
||||
and r0, r0, #0x7000000
|
||||
mov r0, r0, lsr #0x18
|
||||
and r1, r1, #0x3c
|
||||
mov r0, r0, lsl #0x10
|
||||
mov r1, r1, asr #2
|
||||
add r0, r0, #0x6000000
|
||||
add r0, r0, r1, lsl #14
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207761C: .word 0x0400000A
|
||||
arm_func_end G2_GetBG1CharPtr
|
||||
|
||||
arm_func_start G2S_GetBG1CharPtr
|
||||
G2S_GetBG1CharPtr: ; 0x02077620
|
||||
ldr r0, _0207763C ; =0x0400100A
|
||||
ldrh r0, [r0]
|
||||
and r0, r0, #0x3c
|
||||
mov r0, r0, asr #2
|
||||
mov r0, r0, lsl #0xe
|
||||
add r0, r0, #0x6200000
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207763C: .word 0x0400100A
|
||||
arm_func_end G2S_GetBG1CharPtr
|
||||
|
||||
arm_func_start G2_GetBG2CharPtr
|
||||
G2_GetBG2CharPtr: ; 0x02077640
|
||||
mov r1, #0x4000000
|
||||
ldr r0, [r1]
|
||||
ldrh r2, [r1, #0xc]
|
||||
and r0, r0, #7
|
||||
cmp r0, #5
|
||||
blt _02077660
|
||||
tst r2, #0x80
|
||||
bne _02077688
|
||||
_02077660:
|
||||
mov r0, #0x4000000
|
||||
ldr r1, [r0]
|
||||
and r0, r2, #0x3c
|
||||
and r1, r1, #0x7000000
|
||||
mov r1, r1, lsr #0x18
|
||||
mov r1, r1, lsl #0x10
|
||||
add r1, r1, #0x6000000
|
||||
mov r0, r0, lsr #2
|
||||
add r0, r1, r0, lsl #14
|
||||
bx lr
|
||||
_02077688:
|
||||
mov r0, #0
|
||||
bx lr
|
||||
arm_func_end G2_GetBG2CharPtr
|
||||
|
||||
arm_func_start G2_GetBG3CharPtr
|
||||
G2_GetBG3CharPtr: ; 0x02077690
|
||||
mov r1, #0x4000000
|
||||
ldr r0, [r1]
|
||||
ldrh r2, [r1, #0xe]
|
||||
and r0, r0, #7
|
||||
cmp r0, #3
|
||||
blt _020776B8
|
||||
cmp r0, #6
|
||||
bge _020776E0
|
||||
tst r2, #0x80
|
||||
bne _020776E0
|
||||
_020776B8:
|
||||
mov r0, #0x4000000
|
||||
ldr r1, [r0]
|
||||
and r0, r2, #0x3c
|
||||
and r1, r1, #0x7000000
|
||||
mov r1, r1, lsr #0x18
|
||||
mov r1, r1, lsl #0x10
|
||||
add r1, r1, #0x6000000
|
||||
mov r0, r0, lsr #2
|
||||
add r0, r1, r0, lsl #14
|
||||
bx lr
|
||||
_020776E0:
|
||||
mov r0, #0
|
||||
bx lr
|
||||
arm_func_end G2_GetBG3CharPtr
|
||||
|
||||
744
lib/NitroSDK/asm/gx_load2d.s
Normal file
744
lib/NitroSDK/asm/gx_load2d.s
Normal file
@@ -0,0 +1,744 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/gx_load2d.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start GX_LoadBGPltt
|
||||
GX_LoadBGPltt: ; 0x02077CF8
|
||||
stmdb sp!, {r4, lr}
|
||||
ldr r3, _02077D48 ; =GXi_DmaId
|
||||
mov r4, r0
|
||||
ldr r0, [r3]
|
||||
mvn ip, #0
|
||||
mov lr, r1
|
||||
mov r3, r2
|
||||
cmp r0, ip
|
||||
beq _02077D34
|
||||
cmp r3, #0x1c
|
||||
bls _02077D34
|
||||
mov r1, r4
|
||||
add r2, lr, #0x5000000
|
||||
bl MI_DmaCopy16
|
||||
ldmia sp!, {r4, pc}
|
||||
_02077D34:
|
||||
mov r0, r4
|
||||
mov r2, r3
|
||||
add r1, lr, #0x5000000
|
||||
bl MTi_CpuCopy16
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_02077D48: .word GXi_DmaId
|
||||
arm_func_end GX_LoadBGPltt
|
||||
|
||||
arm_func_start GXS_LoadBGPltt
|
||||
GXS_LoadBGPltt: ; 0x02077D4C
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r3, _02077DA0 ; =GXi_DmaId
|
||||
mov lr, r0
|
||||
ldr r0, [r3]
|
||||
mvn ip, #0
|
||||
mov r3, r2
|
||||
cmp r0, ip
|
||||
beq _02077D88
|
||||
cmp r3, #0x1c
|
||||
bls _02077D88
|
||||
add r2, r1, #0x400
|
||||
mov r1, lr
|
||||
add r2, r2, #0x5000000
|
||||
bl MI_DmaCopy16
|
||||
ldmia sp!, {r3, pc}
|
||||
_02077D88:
|
||||
add r1, r1, #0x400
|
||||
mov r0, lr
|
||||
mov r2, r3
|
||||
add r1, r1, #0x5000000
|
||||
bl MTi_CpuCopy16
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02077DA0: .word GXi_DmaId
|
||||
arm_func_end GXS_LoadBGPltt
|
||||
|
||||
arm_func_start GX_LoadOBJPltt
|
||||
GX_LoadOBJPltt: ; 0x02077DA4
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r3, _02077DF8 ; =GXi_DmaId
|
||||
mov lr, r0
|
||||
ldr r0, [r3]
|
||||
mvn ip, #0
|
||||
mov r3, r2
|
||||
cmp r0, ip
|
||||
beq _02077DE0
|
||||
cmp r3, #0x1c
|
||||
bls _02077DE0
|
||||
add r2, r1, #0x200
|
||||
mov r1, lr
|
||||
add r2, r2, #0x5000000
|
||||
bl MI_DmaCopy16
|
||||
ldmia sp!, {r3, pc}
|
||||
_02077DE0:
|
||||
add r1, r1, #0x200
|
||||
mov r0, lr
|
||||
mov r2, r3
|
||||
add r1, r1, #0x5000000
|
||||
bl MTi_CpuCopy16
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02077DF8: .word GXi_DmaId
|
||||
arm_func_end GX_LoadOBJPltt
|
||||
|
||||
arm_func_start GXS_LoadOBJPltt
|
||||
GXS_LoadOBJPltt: ; 0x02077DFC
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r3, _02077E50 ; =GXi_DmaId
|
||||
mov lr, r0
|
||||
ldr r0, [r3]
|
||||
mvn ip, #0
|
||||
mov r3, r2
|
||||
cmp r0, ip
|
||||
beq _02077E38
|
||||
cmp r3, #0x1c
|
||||
bls _02077E38
|
||||
add r2, r1, #0x600
|
||||
mov r1, lr
|
||||
add r2, r2, #0x5000000
|
||||
bl MI_DmaCopy16
|
||||
ldmia sp!, {r3, pc}
|
||||
_02077E38:
|
||||
add r1, r1, #0x600
|
||||
mov r0, lr
|
||||
mov r2, r3
|
||||
add r1, r1, #0x5000000
|
||||
bl MTi_CpuCopy16
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02077E50: .word GXi_DmaId
|
||||
arm_func_end GXS_LoadOBJPltt
|
||||
|
||||
arm_func_start GX_LoadOAM
|
||||
GX_LoadOAM: ; 0x02077E54
|
||||
stmdb sp!, {r4, lr}
|
||||
ldr r3, _02077EA4 ; =GXi_DmaId
|
||||
mov r4, r0
|
||||
ldr r0, [r3]
|
||||
mvn ip, #0
|
||||
mov lr, r1
|
||||
mov r3, r2
|
||||
cmp r0, ip
|
||||
beq _02077E90
|
||||
cmp r3, #0x30
|
||||
bls _02077E90
|
||||
mov r1, r4
|
||||
add r2, lr, #0x7000000
|
||||
bl sub_0207BCCC
|
||||
ldmia sp!, {r4, pc}
|
||||
_02077E90:
|
||||
mov r0, r4
|
||||
mov r2, r3
|
||||
add r1, lr, #0x7000000
|
||||
bl MTi_CpuCopy32
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_02077EA4: .word GXi_DmaId
|
||||
arm_func_end GX_LoadOAM
|
||||
|
||||
arm_func_start GXS_LoadOAM
|
||||
GXS_LoadOAM: ; 0x02077EA8
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r3, _02077EFC ; =GXi_DmaId
|
||||
mov lr, r0
|
||||
ldr r0, [r3]
|
||||
mvn ip, #0
|
||||
mov r3, r2
|
||||
cmp r0, ip
|
||||
beq _02077EE4
|
||||
cmp r3, #0x30
|
||||
bls _02077EE4
|
||||
add r2, r1, #0x400
|
||||
mov r1, lr
|
||||
add r2, r2, #0x7000000
|
||||
bl sub_0207BCCC
|
||||
ldmia sp!, {r3, pc}
|
||||
_02077EE4:
|
||||
add r1, r1, #0x400
|
||||
mov r0, lr
|
||||
mov r2, r3
|
||||
add r1, r1, #0x7000000
|
||||
bl MTi_CpuCopy32
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02077EFC: .word GXi_DmaId
|
||||
arm_func_end GXS_LoadOAM
|
||||
|
||||
arm_func_start GX_LoadOBJ
|
||||
GX_LoadOBJ: ; 0x02077F00
|
||||
stmdb sp!, {r4, lr}
|
||||
ldr r3, _02077F54 ; =GXi_DmaId
|
||||
mov r4, r0
|
||||
ldr r0, [r3]
|
||||
mvn ip, #0
|
||||
mov lr, r1
|
||||
mov r3, r2
|
||||
cmp r0, ip
|
||||
mov ip, #0x6400000
|
||||
beq _02077F40
|
||||
cmp r3, #0x30
|
||||
bls _02077F40
|
||||
mov r1, r4
|
||||
add r2, ip, lr
|
||||
bl sub_0207BCCC
|
||||
ldmia sp!, {r4, pc}
|
||||
_02077F40:
|
||||
mov r0, r4
|
||||
mov r2, r3
|
||||
add r1, ip, lr
|
||||
bl MTi_CpuCopy32
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_02077F54: .word GXi_DmaId
|
||||
arm_func_end GX_LoadOBJ
|
||||
|
||||
arm_func_start GXS_LoadOBJ
|
||||
GXS_LoadOBJ: ; 0x02077F58
|
||||
stmdb sp!, {r4, lr}
|
||||
ldr r3, _02077FAC ; =GXi_DmaId
|
||||
mov r4, r0
|
||||
ldr r0, [r3]
|
||||
mvn ip, #0
|
||||
mov lr, r1
|
||||
mov r3, r2
|
||||
cmp r0, ip
|
||||
mov ip, #0x6600000
|
||||
beq _02077F98
|
||||
cmp r3, #0x30
|
||||
bls _02077F98
|
||||
mov r1, r4
|
||||
add r2, ip, lr
|
||||
bl sub_0207BCCC
|
||||
ldmia sp!, {r4, pc}
|
||||
_02077F98:
|
||||
mov r0, r4
|
||||
mov r2, r3
|
||||
add r1, ip, lr
|
||||
bl MTi_CpuCopy32
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_02077FAC: .word GXi_DmaId
|
||||
arm_func_end GXS_LoadOBJ
|
||||
|
||||
arm_func_start GX_LoadBG0Scr
|
||||
GX_LoadBG0Scr: ; 0x02077FB0
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r6, r0
|
||||
mov r5, r1
|
||||
mov r4, r2
|
||||
bl G2S_GetBG0ScrPtr
|
||||
ldr r1, _0207800C ; =GXi_DmaId
|
||||
mov ip, r0
|
||||
ldr r0, [r1]
|
||||
mvn r1, #0
|
||||
cmp r0, r1
|
||||
beq _02077FF8
|
||||
cmp r4, #0x1c
|
||||
bls _02077FF8
|
||||
mov r1, r6
|
||||
mov r3, r4
|
||||
add r2, ip, r5
|
||||
bl MI_DmaCopy16
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_02077FF8:
|
||||
mov r0, r6
|
||||
mov r2, r4
|
||||
add r1, ip, r5
|
||||
bl MTi_CpuCopy16
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_0207800C: .word GXi_DmaId
|
||||
arm_func_end GX_LoadBG0Scr
|
||||
|
||||
arm_func_start GX_LoadBG1Scr
|
||||
GX_LoadBG1Scr: ; 0x02078010
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r6, r0
|
||||
mov r5, r1
|
||||
mov r4, r2
|
||||
bl G2_GetBG1ScrPtr
|
||||
ldr r1, _0207806C ; =GXi_DmaId
|
||||
mov ip, r0
|
||||
ldr r0, [r1]
|
||||
mvn r1, #0
|
||||
cmp r0, r1
|
||||
beq _02078058
|
||||
cmp r4, #0x1c
|
||||
bls _02078058
|
||||
mov r1, r6
|
||||
mov r3, r4
|
||||
add r2, ip, r5
|
||||
bl MI_DmaCopy16
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_02078058:
|
||||
mov r0, r6
|
||||
mov r2, r4
|
||||
add r1, ip, r5
|
||||
bl MTi_CpuCopy16
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_0207806C: .word GXi_DmaId
|
||||
arm_func_end GX_LoadBG1Scr
|
||||
|
||||
arm_func_start GXS_LoadBG1Scr
|
||||
GXS_LoadBG1Scr: ; 0x02078070
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r6, r0
|
||||
mov r5, r1
|
||||
mov r4, r2
|
||||
bl G2S_GetBG1ScrPtr
|
||||
ldr r1, _020780CC ; =GXi_DmaId
|
||||
mov ip, r0
|
||||
ldr r0, [r1]
|
||||
mvn r1, #0
|
||||
cmp r0, r1
|
||||
beq _020780B8
|
||||
cmp r4, #0x1c
|
||||
bls _020780B8
|
||||
mov r1, r6
|
||||
mov r3, r4
|
||||
add r2, ip, r5
|
||||
bl MI_DmaCopy16
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_020780B8:
|
||||
mov r0, r6
|
||||
mov r2, r4
|
||||
add r1, ip, r5
|
||||
bl MTi_CpuCopy16
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_020780CC: .word GXi_DmaId
|
||||
arm_func_end GXS_LoadBG1Scr
|
||||
|
||||
arm_func_start GX_LoadBG2Scr
|
||||
GX_LoadBG2Scr: ; 0x020780D0
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r6, r0
|
||||
mov r5, r1
|
||||
mov r4, r2
|
||||
bl G2_GetBG2ScrPtr
|
||||
ldr r1, _0207812C ; =GXi_DmaId
|
||||
mov ip, r0
|
||||
ldr r0, [r1]
|
||||
mvn r1, #0
|
||||
cmp r0, r1
|
||||
beq _02078118
|
||||
cmp r4, #0x1c
|
||||
bls _02078118
|
||||
mov r1, r6
|
||||
mov r3, r4
|
||||
add r2, ip, r5
|
||||
bl MI_DmaCopy16
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_02078118:
|
||||
mov r0, r6
|
||||
mov r2, r4
|
||||
add r1, ip, r5
|
||||
bl MTi_CpuCopy16
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_0207812C: .word GXi_DmaId
|
||||
arm_func_end GX_LoadBG2Scr
|
||||
|
||||
arm_func_start GX_LoadBG3Scr
|
||||
GX_LoadBG3Scr: ; 0x02078130
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r6, r0
|
||||
mov r5, r1
|
||||
mov r4, r2
|
||||
bl G2_GetBG3ScrPtr
|
||||
ldr r1, _0207818C ; =GXi_DmaId
|
||||
mov ip, r0
|
||||
ldr r0, [r1]
|
||||
mvn r1, #0
|
||||
cmp r0, r1
|
||||
beq _02078178
|
||||
cmp r4, #0x1c
|
||||
bls _02078178
|
||||
mov r1, r6
|
||||
mov r3, r4
|
||||
add r2, ip, r5
|
||||
bl MI_DmaCopy16
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_02078178:
|
||||
mov r0, r6
|
||||
mov r2, r4
|
||||
add r1, ip, r5
|
||||
bl MTi_CpuCopy16
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_0207818C: .word GXi_DmaId
|
||||
arm_func_end GX_LoadBG3Scr
|
||||
|
||||
arm_func_start GX_LoadBG0Char
|
||||
GX_LoadBG0Char: ; 0x02078190
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r6, r0
|
||||
mov r5, r1
|
||||
mov r4, r2
|
||||
bl G2_GetBG0CharPtr
|
||||
ldr r1, _020781EC ; =GXi_DmaId
|
||||
mov ip, r0
|
||||
ldr r0, [r1]
|
||||
mvn r1, #0
|
||||
cmp r0, r1
|
||||
beq _020781D8
|
||||
cmp r4, #0x30
|
||||
bls _020781D8
|
||||
mov r1, r6
|
||||
mov r3, r4
|
||||
add r2, ip, r5
|
||||
bl sub_0207BCCC
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_020781D8:
|
||||
mov r0, r6
|
||||
mov r2, r4
|
||||
add r1, ip, r5
|
||||
bl MTi_CpuCopy32
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_020781EC: .word GXi_DmaId
|
||||
arm_func_end GX_LoadBG0Char
|
||||
|
||||
arm_func_start GXS_LoadBG0Char
|
||||
GXS_LoadBG0Char: ; 0x020781F0
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r6, r0
|
||||
mov r5, r1
|
||||
mov r4, r2
|
||||
bl G2S_GetBG0CharPtr
|
||||
ldr r1, _0207824C ; =GXi_DmaId
|
||||
mov ip, r0
|
||||
ldr r0, [r1]
|
||||
mvn r1, #0
|
||||
cmp r0, r1
|
||||
beq _02078238
|
||||
cmp r4, #0x30
|
||||
bls _02078238
|
||||
mov r1, r6
|
||||
mov r3, r4
|
||||
add r2, ip, r5
|
||||
bl sub_0207BCCC
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_02078238:
|
||||
mov r0, r6
|
||||
mov r2, r4
|
||||
add r1, ip, r5
|
||||
bl MTi_CpuCopy32
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_0207824C: .word GXi_DmaId
|
||||
arm_func_end GXS_LoadBG0Char
|
||||
|
||||
arm_func_start GX_LoadBG1Char
|
||||
GX_LoadBG1Char: ; 0x02078250
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r6, r0
|
||||
mov r5, r1
|
||||
mov r4, r2
|
||||
bl G2_GetBG1CharPtr
|
||||
ldr r1, _020782AC ; =GXi_DmaId
|
||||
mov ip, r0
|
||||
ldr r0, [r1]
|
||||
mvn r1, #0
|
||||
cmp r0, r1
|
||||
beq _02078298
|
||||
cmp r4, #0x30
|
||||
bls _02078298
|
||||
mov r1, r6
|
||||
mov r3, r4
|
||||
add r2, ip, r5
|
||||
bl sub_0207BCCC
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_02078298:
|
||||
mov r0, r6
|
||||
mov r2, r4
|
||||
add r1, ip, r5
|
||||
bl MTi_CpuCopy32
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_020782AC: .word GXi_DmaId
|
||||
arm_func_end GX_LoadBG1Char
|
||||
|
||||
arm_func_start GXS_LoadBG1Char
|
||||
GXS_LoadBG1Char: ; 0x020782B0
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r6, r0
|
||||
mov r5, r1
|
||||
mov r4, r2
|
||||
bl G2S_GetBG1CharPtr
|
||||
ldr r1, _0207830C ; =GXi_DmaId
|
||||
mov ip, r0
|
||||
ldr r0, [r1]
|
||||
mvn r1, #0
|
||||
cmp r0, r1
|
||||
beq _020782F8
|
||||
cmp r4, #0x30
|
||||
bls _020782F8
|
||||
mov r1, r6
|
||||
mov r3, r4
|
||||
add r2, ip, r5
|
||||
bl sub_0207BCCC
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_020782F8:
|
||||
mov r0, r6
|
||||
mov r2, r4
|
||||
add r1, ip, r5
|
||||
bl MTi_CpuCopy32
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_0207830C: .word GXi_DmaId
|
||||
arm_func_end GXS_LoadBG1Char
|
||||
|
||||
arm_func_start GX_LoadBG2Char
|
||||
GX_LoadBG2Char: ; 0x02078310
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r6, r0
|
||||
mov r5, r1
|
||||
mov r4, r2
|
||||
bl G2_GetBG2CharPtr
|
||||
ldr r1, _0207836C ; =GXi_DmaId
|
||||
mov ip, r0
|
||||
ldr r0, [r1]
|
||||
mvn r1, #0
|
||||
cmp r0, r1
|
||||
beq _02078358
|
||||
cmp r4, #0x30
|
||||
bls _02078358
|
||||
mov r1, r6
|
||||
mov r3, r4
|
||||
add r2, ip, r5
|
||||
bl sub_0207BCCC
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_02078358:
|
||||
mov r0, r6
|
||||
mov r2, r4
|
||||
add r1, ip, r5
|
||||
bl MTi_CpuCopy32
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_0207836C: .word GXi_DmaId
|
||||
arm_func_end GX_LoadBG2Char
|
||||
|
||||
arm_func_start GX_LoadBG3Char
|
||||
GX_LoadBG3Char: ; 0x02078370
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r6, r0
|
||||
mov r5, r1
|
||||
mov r4, r2
|
||||
bl G2_GetBG3CharPtr
|
||||
ldr r1, _020783CC ; =GXi_DmaId
|
||||
mov ip, r0
|
||||
ldr r0, [r1]
|
||||
mvn r1, #0
|
||||
cmp r0, r1
|
||||
beq _020783B8
|
||||
cmp r4, #0x30
|
||||
bls _020783B8
|
||||
mov r1, r6
|
||||
mov r3, r4
|
||||
add r2, ip, r5
|
||||
bl sub_0207BCCC
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_020783B8:
|
||||
mov r0, r6
|
||||
mov r2, r4
|
||||
add r1, ip, r5
|
||||
bl MTi_CpuCopy32
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_020783CC: .word GXi_DmaId
|
||||
arm_func_end GX_LoadBG3Char
|
||||
|
||||
arm_func_start GX_BeginLoadBGExtPltt
|
||||
GX_BeginLoadBGExtPltt: ; 0x020783D0
|
||||
stmdb sp!, {r3, lr}
|
||||
bl GX_ResetBankForBGExtPltt
|
||||
ldr r1, _02078460 ; =sSubBGExtPltt
|
||||
cmp r0, #0x20
|
||||
str r0, [r1, #0x14]
|
||||
bgt _02078404
|
||||
cmp r0, #0x20
|
||||
bge _02078448
|
||||
cmp r0, #0
|
||||
ldmleia sp!, {r3, pc}
|
||||
cmp r0, #0x10
|
||||
beq _02078420
|
||||
ldmia sp!, {r3, pc}
|
||||
_02078404:
|
||||
cmp r0, #0x40
|
||||
bgt _02078414
|
||||
beq _02078434
|
||||
ldmia sp!, {r3, pc}
|
||||
_02078414:
|
||||
cmp r0, #0x60
|
||||
beq _02078448
|
||||
ldmia sp!, {r3, pc}
|
||||
_02078420:
|
||||
ldr r2, _02078464 ; =0x06880000
|
||||
mov r0, #0
|
||||
str r2, [r1, #0x10]
|
||||
str r0, [r1, #0xc]
|
||||
ldmia sp!, {r3, pc}
|
||||
_02078434:
|
||||
ldr r2, _02078468 ; =0x06894000
|
||||
mov r0, #0x4000
|
||||
str r2, [r1, #0x10]
|
||||
str r0, [r1, #0xc]
|
||||
ldmia sp!, {r3, pc}
|
||||
_02078448:
|
||||
ldr r2, _0207846C ; =0x06890000
|
||||
ldr r0, _02078460 ; =sSubBGExtPltt
|
||||
mov r1, #0
|
||||
str r2, [r0, #0x10]
|
||||
str r1, [r0, #0xc]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02078460: .word sSubBGExtPltt
|
||||
_02078464: .word 0x06880000
|
||||
_02078468: .word 0x06894000
|
||||
_0207846C: .word 0x06890000
|
||||
arm_func_end GX_BeginLoadBGExtPltt
|
||||
|
||||
arm_func_start GX_EndLoadBGExtPltt
|
||||
GX_EndLoadBGExtPltt: ; 0x02078470
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r0, _020784B0 ; =GXi_DmaId
|
||||
mvn r1, #0
|
||||
ldr r0, [r0]
|
||||
cmp r0, r1
|
||||
beq _0207848C
|
||||
bl sub_0207C0FC
|
||||
_0207848C:
|
||||
ldr r0, _020784B4 ; =sSubBGExtPltt
|
||||
ldr r0, [r0, #0x14]
|
||||
bl GX_SetBankForBGExtPltt
|
||||
ldr r0, _020784B4 ; =sSubBGExtPltt
|
||||
mov r1, #0
|
||||
str r1, [r0, #0x14]
|
||||
str r1, [r0, #0x10]
|
||||
str r1, [r0, #0xc]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_020784B0: .word GXi_DmaId
|
||||
_020784B4: .word sSubBGExtPltt
|
||||
arm_func_end GX_EndLoadBGExtPltt
|
||||
|
||||
arm_func_start GX_BeginLoadOBJExtPltt
|
||||
GX_BeginLoadOBJExtPltt: ; 0x020784B8
|
||||
stmdb sp!, {r3, lr}
|
||||
bl GX_ResetBankForOBJExtPltt
|
||||
ldr r1, _020784F4 ; =sSubBGExtPltt
|
||||
cmp r0, #0
|
||||
str r0, [r1, #8]
|
||||
ldmeqia sp!, {r3, pc}
|
||||
cmp r0, #0x20
|
||||
beq _020784E8
|
||||
cmp r0, #0x40
|
||||
ldreq r0, _020784F8 ; =0x06894000
|
||||
streq r0, [r1, #4]
|
||||
ldmia sp!, {r3, pc}
|
||||
_020784E8:
|
||||
ldr r0, _020784FC ; =0x06890000
|
||||
str r0, [r1, #4]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_020784F4: .word sSubBGExtPltt
|
||||
_020784F8: .word 0x06894000
|
||||
_020784FC: .word 0x06890000
|
||||
arm_func_end GX_BeginLoadOBJExtPltt
|
||||
|
||||
arm_func_start GX_EndLoadOBJExtPltt
|
||||
GX_EndLoadOBJExtPltt: ; 0x02078500
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r0, _0207853C ; =GXi_DmaId
|
||||
mvn r1, #0
|
||||
ldr r0, [r0]
|
||||
cmp r0, r1
|
||||
beq _0207851C
|
||||
bl sub_0207C0FC
|
||||
_0207851C:
|
||||
ldr r0, _02078540 ; =sSubBGExtPltt
|
||||
ldr r0, [r0, #8]
|
||||
bl GX_SetBankForOBJExtPltt
|
||||
ldr r0, _02078540 ; =sSubBGExtPltt
|
||||
mov r1, #0
|
||||
str r1, [r0, #8]
|
||||
str r1, [r0, #4]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207853C: .word GXi_DmaId
|
||||
_02078540: .word sSubBGExtPltt
|
||||
arm_func_end GX_EndLoadOBJExtPltt
|
||||
|
||||
arm_func_start GXS_BeginLoadBGExtPltt
|
||||
GXS_BeginLoadBGExtPltt: ; 0x02078544
|
||||
stmdb sp!, {r3, lr}
|
||||
bl GX_ResetBankForSubBGExtPltt
|
||||
ldr r1, _02078558 ; =sSubBGExtPltt
|
||||
str r0, [r1]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02078558: .word sSubBGExtPltt
|
||||
arm_func_end GXS_BeginLoadBGExtPltt
|
||||
|
||||
arm_func_start GXS_EndLoadBGExtPltt
|
||||
GXS_EndLoadBGExtPltt: ; 0x0207855C
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r0, _02078594 ; =GXi_DmaId
|
||||
mvn r1, #0
|
||||
ldr r0, [r0]
|
||||
cmp r0, r1
|
||||
beq _02078578
|
||||
bl sub_0207C0FC
|
||||
_02078578:
|
||||
ldr r0, _02078598 ; =sSubBGExtPltt
|
||||
ldr r0, [r0]
|
||||
bl GX_SetBankForSubBGExtPltt
|
||||
ldr r0, _02078598 ; =sSubBGExtPltt
|
||||
mov r1, #0
|
||||
str r1, [r0]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02078594: .word GXi_DmaId
|
||||
_02078598: .word sSubBGExtPltt
|
||||
arm_func_end GXS_EndLoadBGExtPltt
|
||||
|
||||
arm_func_start GXS_BeginLoadOBJExtPltt
|
||||
GXS_BeginLoadOBJExtPltt: ; 0x0207859C
|
||||
stmdb sp!, {r3, lr}
|
||||
bl GX_ResetBankForSubOBJExtPltt
|
||||
ldr r1, _020785B0 ; =sSubBGExtPltt
|
||||
str r0, [r1, #0x18]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_020785B0: .word sSubBGExtPltt
|
||||
arm_func_end GXS_BeginLoadOBJExtPltt
|
||||
|
||||
arm_func_start GXS_EndLoadOBJExtPltt
|
||||
GXS_EndLoadOBJExtPltt: ; 0x020785B4
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r0, _020785EC ; =GXi_DmaId
|
||||
mvn r1, #0
|
||||
ldr r0, [r0]
|
||||
cmp r0, r1
|
||||
beq _020785D0
|
||||
bl sub_0207C0FC
|
||||
_020785D0:
|
||||
ldr r0, _020785F0 ; =sSubBGExtPltt
|
||||
ldr r0, [r0, #0x18]
|
||||
bl GX_SetBankForSubOBJExtPltt
|
||||
ldr r0, _020785F0 ; =sSubBGExtPltt
|
||||
mov r1, #0
|
||||
str r1, [r0, #0x18]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_020785EC: .word GXi_DmaId
|
||||
_020785F0: .word sSubBGExtPltt
|
||||
arm_func_end GXS_EndLoadOBJExtPltt
|
||||
|
||||
223
lib/NitroSDK/asm/gx_load3d.s
Normal file
223
lib/NitroSDK/asm/gx_load3d.s
Normal file
@@ -0,0 +1,223 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/gx_load3d.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start GX_BeginLoadTex
|
||||
GX_BeginLoadTex: ; 0x020785F4
|
||||
stmdb sp!, {r3, lr}
|
||||
bl GX_ResetBankForTex
|
||||
mov r1, #6
|
||||
mul lr, r0, r1
|
||||
ldr r2, _02078640 ; =sTexStartAddrTable
|
||||
ldr r1, _02078644 ; =sTexStartAddrTable + 2
|
||||
ldrh ip, [r2, lr]
|
||||
ldr r2, _02078648 ; =sTexStartAddrTable + 4
|
||||
ldrh r3, [r1, lr]
|
||||
ldr r1, _0207864C ; =sClrImg
|
||||
ldrh r2, [r2, lr]
|
||||
str r0, [r1, #0x14]
|
||||
mov r0, ip, lsl #0xc
|
||||
str r0, [r1, #4]
|
||||
mov r0, r3, lsl #0xc
|
||||
str r0, [r1, #0x18]
|
||||
mov r0, r2, lsl #0xc
|
||||
str r0, [r1, #0x1c]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02078640: .word sTexStartAddrTable
|
||||
_02078644: .word sTexStartAddrTable + 2
|
||||
_02078648: .word sTexStartAddrTable + 4
|
||||
_0207864C: .word sClrImg
|
||||
arm_func_end GX_BeginLoadTex
|
||||
|
||||
arm_func_start GX_LoadTex
|
||||
GX_LoadTex: ; 0x02078650
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
sub sp, sp, #8
|
||||
ldr r3, _02078788 ; =sClrImg
|
||||
mov r7, r0
|
||||
ldr r4, [r3, #0x18]
|
||||
mov ip, r1
|
||||
cmp r4, #0
|
||||
ldreq r0, [r3, #4]
|
||||
mov r6, r2
|
||||
addeq r2, r0, ip
|
||||
beq _0207873C
|
||||
ldr r2, [r3, #0x1c]
|
||||
add r0, ip, r6
|
||||
cmp r0, r2
|
||||
ldrlo r0, [r3, #4]
|
||||
addlo r2, r0, ip
|
||||
blo _0207873C
|
||||
cmp ip, r2
|
||||
addhs r0, r4, ip
|
||||
subhs r2, r0, r2
|
||||
bhs _0207873C
|
||||
ldr r0, _0207878C ; =GXi_DmaId
|
||||
mvn r1, #0
|
||||
ldr r0, [r0]
|
||||
sub r5, r2, ip
|
||||
cmp r0, r1
|
||||
ldr lr, [r3, #4]
|
||||
beq _020786DC
|
||||
cmp r5, #0x30
|
||||
bls _020786DC
|
||||
mov r1, r7
|
||||
mov r3, r5
|
||||
add r2, lr, ip
|
||||
bl sub_0207BCCC
|
||||
b _020786EC
|
||||
_020786DC:
|
||||
mov r0, r7
|
||||
mov r2, r5
|
||||
add r1, lr, ip
|
||||
bl MTi_CpuCopy32
|
||||
_020786EC:
|
||||
ldr r0, _0207878C ; =GXi_DmaId
|
||||
mvn r1, #0
|
||||
ldr r0, [r0]
|
||||
cmp r0, r1
|
||||
beq _02078724
|
||||
mov ip, #0
|
||||
str ip, [sp]
|
||||
mov r2, r4
|
||||
add r1, r7, r5
|
||||
sub r3, r6, r5
|
||||
str ip, [sp, #4]
|
||||
bl sub_0207BE6C
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
_02078724:
|
||||
mov r1, r4
|
||||
add r0, r7, r5
|
||||
sub r2, r6, r5
|
||||
bl MTi_CpuCopy32
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
_0207873C:
|
||||
ldr r0, _0207878C ; =GXi_DmaId
|
||||
mvn r1, #0
|
||||
ldr r0, [r0]
|
||||
cmp r0, r1
|
||||
beq _02078770
|
||||
mov r4, #0
|
||||
str r4, [sp]
|
||||
mov r1, r7
|
||||
mov r3, r6
|
||||
str r4, [sp, #4]
|
||||
bl sub_0207BE6C
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
_02078770:
|
||||
mov r1, r2
|
||||
mov r0, r7
|
||||
mov r2, r6
|
||||
bl MTi_CpuCopy32
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_02078788: .word sClrImg
|
||||
_0207878C: .word GXi_DmaId
|
||||
arm_func_end GX_LoadTex
|
||||
|
||||
arm_func_start GX_EndLoadTex
|
||||
GX_EndLoadTex: ; 0x02078790
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r0, _020787D4 ; =GXi_DmaId
|
||||
mvn r1, #0
|
||||
ldr r0, [r0]
|
||||
cmp r0, r1
|
||||
beq _020787AC
|
||||
bl sub_0207C0FC
|
||||
_020787AC:
|
||||
ldr r0, _020787D8 ; =sClrImg
|
||||
ldr r0, [r0, #0x14]
|
||||
bl GX_SetBankForTex
|
||||
ldr r0, _020787D8 ; =sClrImg
|
||||
mov r1, #0
|
||||
str r1, [r0, #0x1c]
|
||||
str r1, [r0, #0x18]
|
||||
str r1, [r0, #4]
|
||||
str r1, [r0, #0x14]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_020787D4: .word GXi_DmaId
|
||||
_020787D8: .word sClrImg
|
||||
arm_func_end GX_EndLoadTex
|
||||
|
||||
arm_func_start GX_BeginLoadTexPltt
|
||||
GX_BeginLoadTexPltt: ; 0x020787DC
|
||||
stmdb sp!, {r3, lr}
|
||||
bl GX_ResetBankForTexPltt
|
||||
mov r3, r0, asr #4
|
||||
ldr r1, _02078808 ; =sClrImg
|
||||
ldr r2, _0207880C ; =sTexPlttStartAddrTable
|
||||
mov r3, r3, lsl #1
|
||||
ldrh r2, [r2, r3]
|
||||
str r0, [r1, #0xc]
|
||||
mov r0, r2, lsl #0xc
|
||||
str r0, [r1, #8]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02078808: .word sClrImg
|
||||
_0207880C: .word sTexPlttStartAddrTable
|
||||
arm_func_end GX_BeginLoadTexPltt
|
||||
|
||||
arm_func_start GX_LoadTexPltt
|
||||
GX_LoadTexPltt: ; 0x02078810
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
sub sp, sp, #8
|
||||
ldr r3, _02078874 ; =GXi_DmaId
|
||||
ldr lr, _02078878 ; =sClrImg
|
||||
ldr r4, [r3]
|
||||
mvn ip, #0
|
||||
mov r6, r0
|
||||
mov r5, r1
|
||||
mov r3, r2
|
||||
cmp r4, ip
|
||||
ldr lr, [lr, #8]
|
||||
beq _02078864
|
||||
mov ip, #0
|
||||
str ip, [sp]
|
||||
mov r0, r4
|
||||
mov r1, r6
|
||||
add r2, lr, r5
|
||||
str ip, [sp, #4]
|
||||
bl sub_0207BE6C
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_02078864:
|
||||
add r1, lr, r5
|
||||
bl MTi_CpuCopy32
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_02078874: .word GXi_DmaId
|
||||
_02078878: .word sClrImg
|
||||
arm_func_end GX_LoadTexPltt
|
||||
|
||||
arm_func_start GX_EndLoadTexPltt
|
||||
GX_EndLoadTexPltt: ; 0x0207887C
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r0, _020788B8 ; =GXi_DmaId
|
||||
mvn r1, #0
|
||||
ldr r0, [r0]
|
||||
cmp r0, r1
|
||||
beq _02078898
|
||||
bl sub_0207C0FC
|
||||
_02078898:
|
||||
ldr r0, _020788BC ; =sClrImg
|
||||
ldr r0, [r0, #0xc]
|
||||
bl GX_SetBankForTexPltt
|
||||
ldr r0, _020788BC ; =sClrImg
|
||||
mov r1, #0
|
||||
str r1, [r0, #0xc]
|
||||
str r1, [r0, #8]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_020788B8: .word GXi_DmaId
|
||||
_020788BC: .word sClrImg
|
||||
arm_func_end GX_EndLoadTexPltt
|
||||
|
||||
|
||||
1
lib/NitroSDK/asm/include/fx_cp.inc
Normal file
1
lib/NitroSDK/asm/include/fx_cp.inc
Normal file
@@ -0,0 +1 @@
|
||||
#pragma once
|
||||
99
lib/NitroSDK/asm/include/fx_vec.inc
Normal file
99
lib/NitroSDK/asm/include/fx_vec.inc
Normal file
@@ -0,0 +1,99 @@
|
||||
#pragma once
|
||||
.public _0200002B
|
||||
.public _0207AD0C
|
||||
.public _020B2B9C
|
||||
.public _020B2BAC
|
||||
.public _022B9208
|
||||
.public _022B958E
|
||||
.public _022B9590
|
||||
.public _022B9592
|
||||
.public _022B9594
|
||||
.public _022B9596
|
||||
.public _022B9598
|
||||
.public _022B959A
|
||||
.public _022B959C
|
||||
.public _022B959E
|
||||
.public _022B95A0
|
||||
.public _022B95A2
|
||||
.public _022B95A4
|
||||
.public _022B95E4
|
||||
.public _022B95E8
|
||||
.public _022B95EC
|
||||
.public _022B9614
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_TimerReserved
|
||||
.public OSi_UseTick
|
||||
.public OSi_UseAlarm
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
.public _s32_div_f
|
||||
.public _secure
|
||||
.public MTi_CpuCopy16
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public AtomicExchange
|
||||
.public CARD_Init
|
||||
.public ClearIrqFlag
|
||||
.public CTRDG_Init
|
||||
.public DseMem_Free
|
||||
.public DTCM_BSS
|
||||
.public EnableIrqFiqFlags
|
||||
.public EnableIrqFlag
|
||||
.public FX_AtanIdxTable_
|
||||
.public FX_Div
|
||||
.public GetGameMode
|
||||
.public GetProcessorMode
|
||||
.public gGXState
|
||||
.public GXi_DmaId
|
||||
.public GXi_VRamLockId
|
||||
.public MI_DmaCopy16
|
||||
.public MI_Init
|
||||
.public MTX_LookAt
|
||||
.public MTX_OrthoW
|
||||
.public OS_InitReset
|
||||
.public OS_IRQTable
|
||||
.public OSi_InitVramExclusive
|
||||
.public PM_Init
|
||||
.public PXI_Init
|
||||
.public sClrImg
|
||||
.public sDispMode
|
||||
.public SDK_MAIN_ARENA_LO
|
||||
.public SDK_SECTION_ARENA_DTCM_START
|
||||
.public SDK_SECTION_ARENA_EX_START
|
||||
.public SDK_SECTION_ARENA_ITCM_START
|
||||
.public SetIrqFiqFlags
|
||||
.public SetIrqFlag
|
||||
.public sIsDispOn
|
||||
.public sSubBGExtPltt
|
||||
.public sTexPlttStartAddrTable
|
||||
.public sTexStartAddrTable
|
||||
.public sub_0206F808
|
||||
.public sub_0206FD88
|
||||
.public sub_0206FDE0
|
||||
.public sub_0207BC4C
|
||||
.public sub_0207BCCC
|
||||
.public sub_0207BDA8
|
||||
.public sub_0207BE6C
|
||||
.public sub_0207C0FC
|
||||
.public sub_02080EF0
|
||||
.public sub_02080F30
|
||||
.public sub_02085BD4
|
||||
.public SVC_WaitByLoop
|
||||
.public THREAD_INFO_STRUCT
|
||||
.public WaitForever2
|
||||
.public WaitForInterrupt
|
||||
|
||||
124
lib/NitroSDK/asm/include/g2.inc
Normal file
124
lib/NitroSDK/asm/include/g2.inc
Normal file
@@ -0,0 +1,124 @@
|
||||
#pragma once
|
||||
.public _0200002B
|
||||
.public _0207AD0C
|
||||
.public _020B2B9C
|
||||
.public _020B2BAC
|
||||
.public _022B9208
|
||||
.public _022B958E
|
||||
.public _022B9590
|
||||
.public _022B9592
|
||||
.public _022B9594
|
||||
.public _022B9596
|
||||
.public _022B9598
|
||||
.public _022B959A
|
||||
.public _022B959C
|
||||
.public _022B959E
|
||||
.public _022B95A0
|
||||
.public _022B95A2
|
||||
.public _022B95A4
|
||||
.public _022B95E4
|
||||
.public _022B95E8
|
||||
.public _022B95EC
|
||||
.public _022B9614
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_TimerReserved
|
||||
.public OSi_UseTick
|
||||
.public OSi_UseAlarm
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
.public _s32_div_f
|
||||
.public _secure
|
||||
.public MTi_CpuCopy16
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public AtomicExchange
|
||||
.public CARD_Init
|
||||
.public ClearIrqFlag
|
||||
.public CTRDG_Init
|
||||
.public DseMem_Free
|
||||
.public DTCM_BSS
|
||||
.public EnableIrqFiqFlags
|
||||
.public EnableIrqFlag
|
||||
.public FX_AtanIdxTable_
|
||||
.public FX_Div
|
||||
.public GetGameMode
|
||||
.public GetProcessorMode
|
||||
.public gGXState
|
||||
.public GXi_DmaId
|
||||
.public GXi_VRamLockId
|
||||
.public GX_ResetBankForBGExtPltt
|
||||
.public GX_SetBankForBGExtPltt
|
||||
.public GX_ResetBankForSubBGExtPltt
|
||||
.public GX_SetBankForSubBGExtPltt
|
||||
.public GX_ResetBankForSubBGOBJExtPltt
|
||||
.public GX_SetBankForSubBGOBJExtPltt
|
||||
.public GX_ResetBankForOBJExtPltt
|
||||
.public GX_SetBankForOBJExtPltt
|
||||
.public GX_ResetBankForSubOBJExtPltt
|
||||
.public GX_SetBankForSubOBJExtPltt
|
||||
.public GX_ResetBankForTex
|
||||
.public GX_SetBankForTex
|
||||
.public GX_ResetBankForTexPltt
|
||||
.public GX_SetBankForTexPltt
|
||||
.public GX_HBlankIntr
|
||||
.public G2S_GetBG0ScrPtr
|
||||
.public G2_GetBG1ScrPtr
|
||||
.public G2_GetBG2ScrPtr
|
||||
.public G2_GetBG3ScrPtr
|
||||
.public G2S_GetBG0CharPtr
|
||||
.public G2S_GetBG1ScrPtr
|
||||
.public G2S_GetBG1CharPtr
|
||||
.public G2_GetBG0CharPtr
|
||||
.public G2_GetBG1CharPtr
|
||||
.public G2_GetBG2CharPtr
|
||||
.public G2_GetBG3CharPtr
|
||||
.public MI_DmaCopy16
|
||||
.public MI_Init
|
||||
.public MTX_LookAt
|
||||
.public MTX_OrthoW
|
||||
.public OS_InitReset
|
||||
.public OS_IRQTable
|
||||
.public OSi_InitVramExclusive
|
||||
.public PM_Init
|
||||
.public PXI_Init
|
||||
.public sClrImg
|
||||
.public sDispMode
|
||||
.public SDK_MAIN_ARENA_LO
|
||||
.public SDK_SECTION_ARENA_DTCM_START
|
||||
.public SDK_SECTION_ARENA_EX_START
|
||||
.public SDK_SECTION_ARENA_ITCM_START
|
||||
.public SetIrqFiqFlags
|
||||
.public SetIrqFlag
|
||||
.public sIsDispOn
|
||||
.public sSubBGExtPltt
|
||||
.public sTexPlttStartAddrTable
|
||||
.public sTexStartAddrTable
|
||||
.public sub_0206F808
|
||||
.public sub_0206FD88
|
||||
.public sub_0206FDE0
|
||||
.public sub_0207BC4C
|
||||
.public sub_0207BCCC
|
||||
.public sub_0207BDA8
|
||||
.public sub_0207BE6C
|
||||
.public sub_0207C0FC
|
||||
.public sub_02080EF0
|
||||
.public sub_02080F30
|
||||
.public sub_02085BD4
|
||||
.public SVC_WaitByLoop
|
||||
.public THREAD_INFO_STRUCT
|
||||
.public WaitForever2
|
||||
.public WaitForInterrupt
|
||||
3
lib/NitroSDK/asm/include/g3imm.inc
Normal file
3
lib/NitroSDK/asm/include/g3imm.inc
Normal file
@@ -0,0 +1,3 @@
|
||||
#pragma once
|
||||
.public GX_SendFifo64B
|
||||
.public GX_SendFifo48B
|
||||
10
lib/NitroSDK/asm/include/g3x.inc
Normal file
10
lib/NitroSDK/asm/include/g3x.inc
Normal file
@@ -0,0 +1,10 @@
|
||||
#pragma once
|
||||
.public MTi_CpuClear32
|
||||
.public GXi_DmaId
|
||||
.public GXi_VRamLockId
|
||||
.public G3_LoadMtx43
|
||||
.public G3_LoadMtx44
|
||||
.public MTX_LookAt
|
||||
.public MTX_OrthoW
|
||||
.public sub_0207BDA8
|
||||
.public sub_0207BC4C
|
||||
100
lib/NitroSDK/asm/include/gx.inc
Normal file
100
lib/NitroSDK/asm/include/gx.inc
Normal file
@@ -0,0 +1,100 @@
|
||||
#pragma once
|
||||
.public _0200002B
|
||||
.public _0207AD0C
|
||||
.public _020B2B9C
|
||||
.public _020B2BAC
|
||||
.public _022B9208
|
||||
.public _022B958E
|
||||
.public _022B9590
|
||||
.public _022B9592
|
||||
.public _022B9594
|
||||
.public _022B9596
|
||||
.public _022B9598
|
||||
.public _022B959A
|
||||
.public _022B959C
|
||||
.public _022B959E
|
||||
.public _022B95A0
|
||||
.public _022B95A2
|
||||
.public _022B95A4
|
||||
.public _022B95E4
|
||||
.public _022B95E8
|
||||
.public _022B95EC
|
||||
.public _022B9614
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_TimerReserved
|
||||
.public OSi_UseTick
|
||||
.public OSi_UseAlarm
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
.public _s32_div_f
|
||||
.public _secure
|
||||
.public MTi_CpuCopy16
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public AtomicExchange
|
||||
.public CARD_Init
|
||||
.public ClearIrqFlag
|
||||
.public CTRDG_Init
|
||||
.public DseMem_Free
|
||||
.public DTCM_BSS
|
||||
.public EnableIrqFiqFlags
|
||||
.public EnableIrqFlag
|
||||
.public FX_AtanIdxTable_
|
||||
.public FX_Div
|
||||
.public GetGameMode
|
||||
.public GetProcessorMode
|
||||
.public gGXState
|
||||
.public GXi_DmaId
|
||||
.public GXi_VRamLockId
|
||||
.public MI_DmaCopy16
|
||||
.public MI_Init
|
||||
.public MTX_LookAt
|
||||
.public MTX_OrthoW
|
||||
.public OS_GetLockID
|
||||
.public OS_InitReset
|
||||
.public OS_IRQTable
|
||||
.public OSi_InitVramExclusive
|
||||
.public PM_Init
|
||||
.public PXI_Init
|
||||
.public sClrImg
|
||||
.public sDispMode
|
||||
.public SDK_MAIN_ARENA_LO
|
||||
.public SDK_SECTION_ARENA_DTCM_START
|
||||
.public SDK_SECTION_ARENA_EX_START
|
||||
.public SDK_SECTION_ARENA_ITCM_START
|
||||
.public SetIrqFiqFlags
|
||||
.public SetIrqFlag
|
||||
.public sIsDispOn
|
||||
.public sSubBGExtPltt
|
||||
.public sTexPlttStartAddrTable
|
||||
.public sTexStartAddrTable
|
||||
.public sub_0206F808
|
||||
.public sub_0206FD88
|
||||
.public sub_0206FDE0
|
||||
.public OSi_UnlockVram
|
||||
.public sub_0207BC4C
|
||||
.public sub_0207BCCC
|
||||
.public sub_0207BDA8
|
||||
.public sub_0207BE6C
|
||||
.public sub_0207C0FC
|
||||
.public sub_02080EF0
|
||||
.public sub_02080F30
|
||||
.public sub_02085BD4
|
||||
.public SVC_WaitByLoop
|
||||
.public THREAD_INFO_STRUCT
|
||||
.public WaitForever2
|
||||
.public WaitForInterrupt
|
||||
114
lib/NitroSDK/asm/include/gx_bgcnt.inc
Normal file
114
lib/NitroSDK/asm/include/gx_bgcnt.inc
Normal file
@@ -0,0 +1,114 @@
|
||||
#pragma once
|
||||
.public _0200002B
|
||||
.public _0207AD0C
|
||||
.public _020B2B9C
|
||||
.public _020B2BAC
|
||||
.public _022B9208
|
||||
.public _022B958E
|
||||
.public _022B9590
|
||||
.public _022B9592
|
||||
.public _022B9594
|
||||
.public _022B9596
|
||||
.public _022B9598
|
||||
.public _022B959A
|
||||
.public _022B959C
|
||||
.public _022B959E
|
||||
.public _022B95A0
|
||||
.public _022B95A2
|
||||
.public _022B95A4
|
||||
.public _022B95E4
|
||||
.public _022B95E8
|
||||
.public _022B95EC
|
||||
.public _022B9614
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_TimerReserved
|
||||
.public OSi_UseTick
|
||||
.public OSi_UseAlarm
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
.public _s32_div_f
|
||||
.public _secure
|
||||
.public MTi_CpuCopy16
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public AtomicExchange
|
||||
.public CARD_Init
|
||||
.public ClearIrqFlag
|
||||
.public CTRDG_Init
|
||||
.public DseMem_Free
|
||||
.public DTCM_BSS
|
||||
.public EnableIrqFiqFlags
|
||||
.public EnableIrqFlag
|
||||
.public FX_AtanIdxTable_
|
||||
.public FX_Div
|
||||
.public GetGameMode
|
||||
.public GetProcessorMode
|
||||
.public gGXState
|
||||
.public GXi_DmaId
|
||||
.public GXi_VRamLockId
|
||||
.public GX_ResetBankForBGExtPltt
|
||||
.public GX_SetBankForBGExtPltt
|
||||
.public GX_ResetBankForSubBGExtPltt
|
||||
.public GX_SetBankForSubBGExtPltt
|
||||
.public GX_ResetBankForSubBGOBJExtPltt
|
||||
.public GX_SetBankForSubBGOBJExtPltt
|
||||
.public GX_ResetBankForOBJExtPltt
|
||||
.public GX_SetBankForOBJExtPltt
|
||||
.public GX_ResetBankForSubOBJExtPltt
|
||||
.public GX_SetBankForSubOBJExtPltt
|
||||
.public GX_ResetBankForTex
|
||||
.public GX_SetBankForTex
|
||||
.public GX_ResetBankForTexPltt
|
||||
.public GX_SetBankForTexPltt
|
||||
.public GX_HBlankIntr
|
||||
.public MI_DmaCopy16
|
||||
.public MI_Init
|
||||
.public MTX_LookAt
|
||||
.public MTX_OrthoW
|
||||
.public OS_InitReset
|
||||
.public OS_IRQTable
|
||||
.public OSi_InitVramExclusive
|
||||
.public PM_Init
|
||||
.public PXI_Init
|
||||
.public sClrImg
|
||||
.public sDispMode
|
||||
.public SDK_MAIN_ARENA_LO
|
||||
.public SDK_SECTION_ARENA_DTCM_START
|
||||
.public SDK_SECTION_ARENA_EX_START
|
||||
.public SDK_SECTION_ARENA_ITCM_START
|
||||
.public SetIrqFiqFlags
|
||||
.public SetIrqFlag
|
||||
.public sIsDispOn
|
||||
.public sSubBGExtPltt
|
||||
.public sTexPlttStartAddrTable
|
||||
.public sTexStartAddrTable
|
||||
.public sub_0206F808
|
||||
.public sub_0206FD88
|
||||
.public sub_0206FDE0
|
||||
.public sub_0207BC4C
|
||||
.public sub_0207BCCC
|
||||
.public sub_0207BDA8
|
||||
.public sub_0207BE6C
|
||||
.public sub_0207C0FC
|
||||
.public sub_02080EF0
|
||||
.public sub_02080F30
|
||||
.public sub_02085BD4
|
||||
.public SVC_WaitByLoop
|
||||
.public THREAD_INFO_STRUCT
|
||||
.public WaitForever2
|
||||
.public WaitForInterrupt
|
||||
|
||||
126
lib/NitroSDK/asm/include/gx_load2d.inc
Normal file
126
lib/NitroSDK/asm/include/gx_load2d.inc
Normal file
@@ -0,0 +1,126 @@
|
||||
#pragma once
|
||||
.public _0200002B
|
||||
.public _0207AD0C
|
||||
.public _020B2B9C
|
||||
.public _020B2BAC
|
||||
.public _022B9208
|
||||
.public _022B958E
|
||||
.public _022B9590
|
||||
.public _022B9592
|
||||
.public _022B9594
|
||||
.public _022B9596
|
||||
.public _022B9598
|
||||
.public _022B959A
|
||||
.public _022B959C
|
||||
.public _022B959E
|
||||
.public _022B95A0
|
||||
.public _022B95A2
|
||||
.public _022B95A4
|
||||
.public _022B95E4
|
||||
.public _022B95E8
|
||||
.public _022B95EC
|
||||
.public _022B9614
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_TimerReserved
|
||||
.public OSi_UseTick
|
||||
.public OSi_UseAlarm
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
.public _s32_div_f
|
||||
.public _secure
|
||||
.public MTi_CpuCopy16
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public AtomicExchange
|
||||
.public CARD_Init
|
||||
.public ClearIrqFlag
|
||||
.public CTRDG_Init
|
||||
.public DseMem_Free
|
||||
.public DTCM_BSS
|
||||
.public EnableIrqFiqFlags
|
||||
.public EnableIrqFlag
|
||||
.public FX_AtanIdxTable_
|
||||
.public FX_Div
|
||||
.public GetGameMode
|
||||
.public GetProcessorMode
|
||||
.public gGXState
|
||||
.public GXi_DmaId
|
||||
.public GXi_VRamLockId
|
||||
.public GX_ResetBankForBGExtPltt
|
||||
.public GX_SetBankForBGExtPltt
|
||||
.public GX_ResetBankForSubBGExtPltt
|
||||
.public GX_SetBankForSubBGExtPltt
|
||||
.public GX_ResetBankForSubBGOBJExtPltt
|
||||
.public GX_SetBankForSubBGOBJExtPltt
|
||||
.public GX_ResetBankForOBJExtPltt
|
||||
.public GX_SetBankForOBJExtPltt
|
||||
.public GX_ResetBankForSubOBJExtPltt
|
||||
.public GX_SetBankForSubOBJExtPltt
|
||||
.public GX_ResetBankForTex
|
||||
.public GX_SetBankForTex
|
||||
.public GX_ResetBankForTexPltt
|
||||
.public GX_SetBankForTexPltt
|
||||
.public GX_HBlankIntr
|
||||
.public G2S_GetBG0ScrPtr
|
||||
.public G2_GetBG1ScrPtr
|
||||
.public G2_GetBG2ScrPtr
|
||||
.public G2_GetBG3ScrPtr
|
||||
.public G2S_GetBG0CharPtr
|
||||
.public G2S_GetBG1ScrPtr
|
||||
.public G2S_GetBG1CharPtr
|
||||
.public G2_GetBG0CharPtr
|
||||
.public G2_GetBG1CharPtr
|
||||
.public G2_GetBG2CharPtr
|
||||
.public G2_GetBG3CharPtr
|
||||
.public G3_LoadMtx43
|
||||
.public G3_LoadMtx44
|
||||
.public MI_DmaCopy16
|
||||
.public MI_Init
|
||||
.public MTX_LookAt
|
||||
.public MTX_OrthoW
|
||||
.public OS_InitReset
|
||||
.public OS_IRQTable
|
||||
.public OSi_InitVramExclusive
|
||||
.public PM_Init
|
||||
.public PXI_Init
|
||||
.public sClrImg
|
||||
.public sDispMode
|
||||
.public SDK_MAIN_ARENA_LO
|
||||
.public SDK_SECTION_ARENA_DTCM_START
|
||||
.public SDK_SECTION_ARENA_EX_START
|
||||
.public SDK_SECTION_ARENA_ITCM_START
|
||||
.public SetIrqFiqFlags
|
||||
.public SetIrqFlag
|
||||
.public sIsDispOn
|
||||
.public sSubBGExtPltt
|
||||
.public sTexPlttStartAddrTable
|
||||
.public sTexStartAddrTable
|
||||
.public sub_0206F808
|
||||
.public sub_0206FD88
|
||||
.public sub_0206FDE0
|
||||
.public sub_0207BC4C
|
||||
.public sub_0207BCCC
|
||||
.public sub_0207BDA8
|
||||
.public sub_0207BE6C
|
||||
.public sub_0207C0FC
|
||||
.public sub_02080EF0
|
||||
.public sub_02080F30
|
||||
.public sub_02085BD4
|
||||
.public SVC_WaitByLoop
|
||||
.public THREAD_INFO_STRUCT
|
||||
.public WaitForever2
|
||||
.public WaitForInterrupt
|
||||
27
lib/NitroSDK/asm/include/gx_load3d.inc
Normal file
27
lib/NitroSDK/asm/include/gx_load3d.inc
Normal file
@@ -0,0 +1,27 @@
|
||||
#pragma once
|
||||
.public MTi_CpuCopy16
|
||||
.public MTi_CpuCopy32
|
||||
.public GXi_DmaId
|
||||
.public GX_ResetBankForTex
|
||||
.public GX_SetBankForTex
|
||||
.public GX_ResetBankForTexPltt
|
||||
.public GX_SetBankForTexPltt
|
||||
.public PM_Init
|
||||
.public PXI_Init
|
||||
.public sClrImg
|
||||
.public sDispMode
|
||||
.public sSubBGExtPltt
|
||||
.public sTexPlttStartAddrTable
|
||||
.public sTexStartAddrTable
|
||||
.public sub_0206F808
|
||||
.public sub_0206FD88
|
||||
.public sub_0206FDE0
|
||||
.public sub_0207BC4C
|
||||
.public sub_0207BCCC
|
||||
.public sub_0207BDA8
|
||||
.public sub_0207BE6C
|
||||
.public sub_0207C0FC
|
||||
.public sub_02080EF0
|
||||
.public sub_02080F30
|
||||
.public sub_02085BD4
|
||||
|
||||
@@ -33,6 +33,11 @@
|
||||
.public sub_02079D98
|
||||
.public sub_0207A048
|
||||
.public sub_0207A0CC
|
||||
.public sub_0207A2C0
|
||||
.public DC_StoreRange
|
||||
.public sub_0207B854
|
||||
.public sub_0207C1E0
|
||||
.public WaitForever2
|
||||
.public MI_SetWramBank
|
||||
.public MIi_CheckDma0SourceAddress
|
||||
.public MI_StopDma
|
||||
.public MI_CpuCopy8
|
||||
100
lib/NitroSDK/asm/include/mtx.inc
Normal file
100
lib/NitroSDK/asm/include/mtx.inc
Normal file
@@ -0,0 +1,100 @@
|
||||
#pragma once
|
||||
.public _0200002B
|
||||
.public _0207AD0C
|
||||
.public _020B2B9C
|
||||
.public _020B2BAC
|
||||
.public _022B9208
|
||||
.public _022B958E
|
||||
.public _022B9590
|
||||
.public _022B9592
|
||||
.public _022B9594
|
||||
.public _022B9596
|
||||
.public _022B9598
|
||||
.public _022B959A
|
||||
.public _022B959C
|
||||
.public _022B959E
|
||||
.public _022B95A0
|
||||
.public _022B95A2
|
||||
.public _022B95A4
|
||||
.public _022B95E4
|
||||
.public _022B95E8
|
||||
.public _022B95EC
|
||||
.public _022B9614
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_TimerReserved
|
||||
.public OSi_UseTick
|
||||
.public OSi_UseAlarm
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
.public _s32_div_f
|
||||
.public _secure
|
||||
.public MTi_CpuCopy16
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public AtomicExchange
|
||||
.public CARD_Init
|
||||
.public ClearIrqFlag
|
||||
.public CTRDG_Init
|
||||
.public DseMem_Free
|
||||
.public DTCM_BSS
|
||||
.public EnableIrqFiqFlags
|
||||
.public EnableIrqFlag
|
||||
.public FX_AtanIdxTable_
|
||||
.public FX_GetDivResultFx64c
|
||||
.public FX_InvAsync
|
||||
.public GetGameMode
|
||||
.public GetProcessorMode
|
||||
.public gGXState
|
||||
.public GXi_DmaId
|
||||
.public GXi_VRamLockId
|
||||
.public MI_DmaCopy16
|
||||
.public MI_Init
|
||||
.public OS_InitReset
|
||||
.public OS_IRQTable
|
||||
.public OSi_InitVramExclusive
|
||||
.public PM_Init
|
||||
.public PXI_Init
|
||||
.public sClrImg
|
||||
.public sDispMode
|
||||
.public SDK_MAIN_ARENA_LO
|
||||
.public SDK_SECTION_ARENA_DTCM_START
|
||||
.public SDK_SECTION_ARENA_EX_START
|
||||
.public SDK_SECTION_ARENA_ITCM_START
|
||||
.public SetIrqFiqFlags
|
||||
.public SetIrqFlag
|
||||
.public sIsDispOn
|
||||
.public sSubBGExtPltt
|
||||
.public sTexPlttStartAddrTable
|
||||
.public sTexStartAddrTable
|
||||
.public sub_0206F808
|
||||
.public sub_0206FD88
|
||||
.public sub_0206FDE0
|
||||
.public sub_0207BC4C
|
||||
.public sub_0207BCCC
|
||||
.public sub_0207BDA8
|
||||
.public sub_0207BE6C
|
||||
.public sub_0207C0FC
|
||||
.public sub_02080EF0
|
||||
.public sub_02080F30
|
||||
.public sub_02085BD4
|
||||
.public SVC_WaitByLoop
|
||||
.public THREAD_INFO_STRUCT
|
||||
.public VEC_CrossProduct
|
||||
.public VEC_DotProduct
|
||||
.public VEC_Normalize
|
||||
.public WaitForever2
|
||||
.public WaitForInterrupt
|
||||
138
lib/NitroSDK/asm/include/os_arena.inc
Normal file
138
lib/NitroSDK/asm/include/os_arena.inc
Normal file
@@ -0,0 +1,138 @@
|
||||
#pragma once
|
||||
.public _0200002B
|
||||
.public _0207AD0C
|
||||
.public _020B2B9C
|
||||
.public _020B2BAC
|
||||
.public _022B9208
|
||||
.public _022B958E
|
||||
.public _022B9590
|
||||
.public _022B9592
|
||||
.public _022B9594
|
||||
.public _022B9596
|
||||
.public _022B9598
|
||||
.public _022B959A
|
||||
.public _022B959C
|
||||
.public _022B959E
|
||||
.public _022B95A0
|
||||
.public _022B95A2
|
||||
.public _022B95A4
|
||||
.public _022B95E4
|
||||
.public _022B95E8
|
||||
.public _022B95EC
|
||||
.public _022B9614
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_TimerReserved
|
||||
.public OSi_UseTick
|
||||
.public OSi_UseAlarm
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
.public _s32_div_f
|
||||
.public _secure
|
||||
.public MTi_CpuCopy16
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public AtomicExchange
|
||||
.public CARD_Init
|
||||
.public ClearIrqFlag
|
||||
.public CTRDG_Init
|
||||
.public DseMem_Free
|
||||
.public DTCM_BSS
|
||||
.public EnableIrqFiqFlags
|
||||
.public EnableIrqFlag
|
||||
.public FX_AtanIdxTable_
|
||||
.public FX_Div
|
||||
.public GetGameMode
|
||||
.public GetProcessorMode
|
||||
.public gGXState
|
||||
.public GXi_DmaId
|
||||
.public GXi_VRamLockId
|
||||
.public GX_ResetBankForBGExtPltt
|
||||
.public GX_SetBankForBGExtPltt
|
||||
.public GX_ResetBankForSubBGExtPltt
|
||||
.public GX_SetBankForSubBGExtPltt
|
||||
.public GX_ResetBankForSubBGOBJExtPltt
|
||||
.public GX_SetBankForSubBGOBJExtPltt
|
||||
.public GX_ResetBankForOBJExtPltt
|
||||
.public GX_SetBankForOBJExtPltt
|
||||
.public GX_ResetBankForSubOBJExtPltt
|
||||
.public GX_SetBankForSubOBJExtPltt
|
||||
.public GX_ResetBankForTex
|
||||
.public GX_SetBankForTex
|
||||
.public GX_ResetBankForTexPltt
|
||||
.public GX_SetBankForTexPltt
|
||||
.public GX_HBlankIntr
|
||||
.public G2S_GetBG0ScrPtr
|
||||
.public G2_GetBG1ScrPtr
|
||||
.public G2_GetBG2ScrPtr
|
||||
.public G2_GetBG3ScrPtr
|
||||
.public G2S_GetBG0CharPtr
|
||||
.public G2S_GetBG1ScrPtr
|
||||
.public G2S_GetBG1CharPtr
|
||||
.public G2_GetBG0CharPtr
|
||||
.public G2_GetBG1CharPtr
|
||||
.public G2_GetBG2CharPtr
|
||||
.public G2_GetBG3CharPtr
|
||||
.public G3_LoadMtx43
|
||||
.public G3_LoadMtx44
|
||||
.public MI_DmaCopy16
|
||||
.public MI_Init
|
||||
.public MTX_LookAt
|
||||
.public MTX_OrthoW
|
||||
.public OS_InitReset
|
||||
.public OS_IRQTable
|
||||
.public OS_InitLock
|
||||
.public OS_InitIrqTable
|
||||
.public OS_ResetRequestIrqMask
|
||||
.public OS_SetIrqStackChecker
|
||||
.public OS_SetIrqFunction
|
||||
.public OS_SetProtectionRegion1
|
||||
.public OS_SetProtectionRegion2
|
||||
.public OS_EnableIrqMask
|
||||
.public OS_DisableIrqMask
|
||||
.public OSi_InitVramExclusive
|
||||
.public PM_Init
|
||||
.public PXI_Init
|
||||
.public sClrImg
|
||||
.public sDispMode
|
||||
.public SDK_MAIN_ARENA_LO
|
||||
.public SDK_SECTION_ARENA_DTCM_START
|
||||
.public SDK_SECTION_ARENA_EX_START
|
||||
.public SDK_SECTION_ARENA_ITCM_START
|
||||
.public SetIrqFiqFlags
|
||||
.public SetIrqFlag
|
||||
.public sIsDispOn
|
||||
.public sSubBGExtPltt
|
||||
.public sTexPlttStartAddrTable
|
||||
.public sTexStartAddrTable
|
||||
.public sub_0206F808
|
||||
.public sub_0206FD88
|
||||
.public sub_0206FDE0
|
||||
.public sub_02078BF4
|
||||
.public sub_0207BC4C
|
||||
.public sub_0207BCCC
|
||||
.public sub_0207BDA8
|
||||
.public sub_0207BE6C
|
||||
.public sub_0207C0FC
|
||||
.public sub_02080EF0
|
||||
.public sub_02080F30
|
||||
.public sub_02085BD4
|
||||
.public SVC_WaitByLoop
|
||||
.public THREAD_INFO_STRUCT
|
||||
.public WaitForever2
|
||||
.public WaitForInterrupt
|
||||
|
||||
.public sub_02079DA0
|
||||
138
lib/NitroSDK/asm/include/os_exception.inc
Normal file
138
lib/NitroSDK/asm/include/os_exception.inc
Normal file
@@ -0,0 +1,138 @@
|
||||
#pragma once
|
||||
.public _0200002B
|
||||
.public _0207AD0C
|
||||
.public _020B2B9C
|
||||
.public _020B2BAC
|
||||
.public _022B9208
|
||||
.public _022B958E
|
||||
.public _022B9590
|
||||
.public _022B9592
|
||||
.public _022B9594
|
||||
.public _022B9596
|
||||
.public _022B9598
|
||||
.public _022B959A
|
||||
.public _022B959C
|
||||
.public _022B959E
|
||||
.public _022B95A0
|
||||
.public _022B95A2
|
||||
.public _022B95A4
|
||||
.public _022B95E4
|
||||
.public _022B95E8
|
||||
.public _022B95EC
|
||||
.public _022B9614
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_TimerReserved
|
||||
.public OSi_UseTick
|
||||
.public OSi_UseAlarm
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
.public _s32_div_f
|
||||
.public _secure
|
||||
.public MTi_CpuCopy16
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public AtomicExchange
|
||||
.public CARD_Init
|
||||
.public ClearIrqFlag
|
||||
.public CTRDG_Init
|
||||
.public DseMem_Free
|
||||
.public DTCM_BSS
|
||||
.public EnableIrqFiqFlags
|
||||
.public EnableIrqFlag
|
||||
.public FX_AtanIdxTable_
|
||||
.public FX_Div
|
||||
.public GetGameMode
|
||||
.public GetProcessorMode
|
||||
.public gGXState
|
||||
.public GXi_DmaId
|
||||
.public GXi_VRamLockId
|
||||
.public GX_ResetBankForBGExtPltt
|
||||
.public GX_SetBankForBGExtPltt
|
||||
.public GX_ResetBankForSubBGExtPltt
|
||||
.public GX_SetBankForSubBGExtPltt
|
||||
.public GX_ResetBankForSubBGOBJExtPltt
|
||||
.public GX_SetBankForSubBGOBJExtPltt
|
||||
.public GX_ResetBankForOBJExtPltt
|
||||
.public GX_SetBankForOBJExtPltt
|
||||
.public GX_ResetBankForSubOBJExtPltt
|
||||
.public GX_SetBankForSubOBJExtPltt
|
||||
.public GX_ResetBankForTex
|
||||
.public GX_SetBankForTex
|
||||
.public GX_ResetBankForTexPltt
|
||||
.public GX_SetBankForTexPltt
|
||||
.public GX_HBlankIntr
|
||||
.public G2S_GetBG0ScrPtr
|
||||
.public G2_GetBG1ScrPtr
|
||||
.public G2_GetBG2ScrPtr
|
||||
.public G2_GetBG3ScrPtr
|
||||
.public G2S_GetBG0CharPtr
|
||||
.public G2S_GetBG1ScrPtr
|
||||
.public G2S_GetBG1CharPtr
|
||||
.public G2_GetBG0CharPtr
|
||||
.public G2_GetBG1CharPtr
|
||||
.public G2_GetBG2CharPtr
|
||||
.public G2_GetBG3CharPtr
|
||||
.public G3_LoadMtx43
|
||||
.public G3_LoadMtx44
|
||||
.public MI_DmaCopy16
|
||||
.public MI_Init
|
||||
.public MTX_LookAt
|
||||
.public MTX_OrthoW
|
||||
.public OS_InitReset
|
||||
.public OS_IRQTable
|
||||
.public OS_InitLock
|
||||
.public OS_InitIrqTable
|
||||
.public OS_ResetRequestIrqMask
|
||||
.public OS_SetIrqStackChecker
|
||||
.public OS_SetIrqFunction
|
||||
.public OS_DisableProtectionUnit
|
||||
.public OS_EnableProtectionUnit
|
||||
.public OS_EnableIrqMask
|
||||
.public OS_DisableIrqMask
|
||||
.public OSi_InitVramExclusive
|
||||
.public PM_Init
|
||||
.public PXI_Init
|
||||
.public sClrImg
|
||||
.public sDispMode
|
||||
.public SDK_MAIN_ARENA_LO
|
||||
.public SDK_SECTION_ARENA_DTCM_START
|
||||
.public SDK_SECTION_ARENA_EX_START
|
||||
.public SDK_SECTION_ARENA_ITCM_START
|
||||
.public SetIrqFiqFlags
|
||||
.public SetIrqFlag
|
||||
.public sIsDispOn
|
||||
.public sSubBGExtPltt
|
||||
.public sTexPlttStartAddrTable
|
||||
.public sTexStartAddrTable
|
||||
.public sub_0206F808
|
||||
.public sub_0206FD88
|
||||
.public sub_0206FDE0
|
||||
.public sub_02078BF4
|
||||
.public sub_0207BC4C
|
||||
.public sub_0207BCCC
|
||||
.public sub_0207BDA8
|
||||
.public sub_0207BE6C
|
||||
.public sub_0207C0FC
|
||||
.public sub_02080EF0
|
||||
.public sub_02080F30
|
||||
.public sub_02085BD4
|
||||
.public SVC_WaitByLoop
|
||||
.public THREAD_INFO_STRUCT
|
||||
.public WaitForever2
|
||||
.public WaitForInterrupt
|
||||
|
||||
.public sub_02079DA0
|
||||
126
lib/NitroSDK/asm/include/os_interrupt.inc
Normal file
126
lib/NitroSDK/asm/include/os_interrupt.inc
Normal file
@@ -0,0 +1,126 @@
|
||||
#pragma once
|
||||
.public _0200002B
|
||||
.public _0207AD0C
|
||||
.public _020B2B9C
|
||||
.public _020B2BAC
|
||||
.public _022B9208
|
||||
.public _022B958E
|
||||
.public _022B9590
|
||||
.public _022B9592
|
||||
.public _022B9594
|
||||
.public _022B9596
|
||||
.public _022B9598
|
||||
.public _022B959A
|
||||
.public _022B959C
|
||||
.public _022B959E
|
||||
.public _022B95A0
|
||||
.public _022B95A2
|
||||
.public _022B95A4
|
||||
.public _022B95E4
|
||||
.public _022B95E8
|
||||
.public _022B95EC
|
||||
.public _022B9614
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_TimerReserved
|
||||
.public OSi_UseTick
|
||||
.public OSi_UseAlarm
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
.public _s32_div_f
|
||||
.public _secure
|
||||
.public MTi_CpuCopy16
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public AtomicExchange
|
||||
.public CARD_Init
|
||||
.public ClearIrqFlag
|
||||
.public CTRDG_Init
|
||||
.public DseMem_Free
|
||||
.public DTCM_BSS
|
||||
.public EnableIrqFiqFlags
|
||||
.public EnableIrqFlag
|
||||
.public FX_AtanIdxTable_
|
||||
.public FX_Div
|
||||
.public GetGameMode
|
||||
.public GetProcessorMode
|
||||
.public gGXState
|
||||
.public GXi_DmaId
|
||||
.public GXi_VRamLockId
|
||||
.public GX_ResetBankForBGExtPltt
|
||||
.public GX_SetBankForBGExtPltt
|
||||
.public GX_ResetBankForSubBGExtPltt
|
||||
.public GX_SetBankForSubBGExtPltt
|
||||
.public GX_ResetBankForSubBGOBJExtPltt
|
||||
.public GX_SetBankForSubBGOBJExtPltt
|
||||
.public GX_ResetBankForOBJExtPltt
|
||||
.public GX_SetBankForOBJExtPltt
|
||||
.public GX_ResetBankForSubOBJExtPltt
|
||||
.public GX_SetBankForSubOBJExtPltt
|
||||
.public GX_ResetBankForTex
|
||||
.public GX_SetBankForTex
|
||||
.public GX_ResetBankForTexPltt
|
||||
.public GX_SetBankForTexPltt
|
||||
.public GX_HBlankIntr
|
||||
.public G2S_GetBG0ScrPtr
|
||||
.public G2_GetBG1ScrPtr
|
||||
.public G2_GetBG2ScrPtr
|
||||
.public G2_GetBG3ScrPtr
|
||||
.public G2S_GetBG0CharPtr
|
||||
.public G2S_GetBG1ScrPtr
|
||||
.public G2S_GetBG1CharPtr
|
||||
.public G2_GetBG0CharPtr
|
||||
.public G2_GetBG1CharPtr
|
||||
.public G2_GetBG2CharPtr
|
||||
.public G2_GetBG3CharPtr
|
||||
.public MI_DmaCopy16
|
||||
.public MI_Init
|
||||
.public MTX_LookAt
|
||||
.public MTX_OrthoW
|
||||
.public OS_InitReset
|
||||
.public OS_IRQTable
|
||||
.public OS_SleepThread
|
||||
.public OSi_InitVramExclusive
|
||||
.public PM_Init
|
||||
.public PXI_Init
|
||||
.public sClrImg
|
||||
.public sDispMode
|
||||
.public SDK_MAIN_ARENA_LO
|
||||
.public SDK_SECTION_ARENA_DTCM_START
|
||||
.public SDK_SECTION_ARENA_EX_START
|
||||
.public SDK_SECTION_ARENA_ITCM_START
|
||||
.public SetIrqFiqFlags
|
||||
.public SetIrqFlag
|
||||
.public sIsDispOn
|
||||
.public sSubBGExtPltt
|
||||
.public sTexPlttStartAddrTable
|
||||
.public sTexStartAddrTable
|
||||
.public sub_0206F808
|
||||
.public sub_0206FD88
|
||||
.public sub_0206FDE0
|
||||
.public sub_0207BC4C
|
||||
.public sub_0207BCCC
|
||||
.public sub_0207BDA8
|
||||
.public sub_0207BE6C
|
||||
.public sub_0207C0FC
|
||||
.public sub_02080EF0
|
||||
.public sub_02080F30
|
||||
.public sub_02085BD4
|
||||
.public SVC_WaitByLoop
|
||||
.public THREAD_INFO_STRUCT
|
||||
.public WaitForever2
|
||||
.public WaitForInterrupt
|
||||
|
||||
@@ -1,12 +1,10 @@
|
||||
#pragma once
|
||||
.public _022B99A8
|
||||
.public _022B99D0
|
||||
.public _022B99D4
|
||||
.public _022B99D8
|
||||
.public ArrayCopy16
|
||||
.public MTi_CpuCopy16
|
||||
.public EnableIrqFlag
|
||||
.public GetTimer0Control
|
||||
.public MemcpyFast
|
||||
.public OS_GetTickLo
|
||||
.public MI_CpuCopy8
|
||||
.public MI_StopDma
|
||||
.public OS_GetLockID
|
||||
.public OS_ResetRequestIrqMask
|
||||
125
lib/NitroSDK/asm/include/os_spinlock.inc
Normal file
125
lib/NitroSDK/asm/include/os_spinlock.inc
Normal file
@@ -0,0 +1,125 @@
|
||||
#pragma once
|
||||
.public _0200002B
|
||||
.public _0207AD0C
|
||||
.public _020B2B9C
|
||||
.public _020B2BAC
|
||||
.public _022B9208
|
||||
.public _022B958E
|
||||
.public _022B9590
|
||||
.public _022B9592
|
||||
.public _022B9594
|
||||
.public _022B9596
|
||||
.public _022B9598
|
||||
.public _022B959A
|
||||
.public _022B959C
|
||||
.public _022B959E
|
||||
.public _022B95A0
|
||||
.public _022B95A2
|
||||
.public _022B95A4
|
||||
.public _022B95E4
|
||||
.public _022B95E8
|
||||
.public _022B95EC
|
||||
.public _022B9614
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_TimerReserved
|
||||
.public OSi_UseTick
|
||||
.public OSi_UseAlarm
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
.public _s32_div_f
|
||||
.public _secure
|
||||
.public MTi_CpuCopy16
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public AtomicExchange
|
||||
.public CARD_Init
|
||||
.public ClearIrqFlag
|
||||
.public CTRDG_Init
|
||||
.public DseMem_Free
|
||||
.public DTCM_BSS
|
||||
.public EnableIrqFiqFlags
|
||||
.public EnableIrqFlag
|
||||
.public FX_AtanIdxTable_
|
||||
.public FX_Div
|
||||
.public GetGameMode
|
||||
.public GetProcessorMode
|
||||
.public gGXState
|
||||
.public GXi_DmaId
|
||||
.public GXi_VRamLockId
|
||||
.public GX_ResetBankForBGExtPltt
|
||||
.public GX_SetBankForBGExtPltt
|
||||
.public GX_ResetBankForSubBGExtPltt
|
||||
.public GX_SetBankForSubBGExtPltt
|
||||
.public GX_ResetBankForSubBGOBJExtPltt
|
||||
.public GX_SetBankForSubBGOBJExtPltt
|
||||
.public GX_ResetBankForOBJExtPltt
|
||||
.public GX_SetBankForOBJExtPltt
|
||||
.public GX_ResetBankForSubOBJExtPltt
|
||||
.public GX_SetBankForSubOBJExtPltt
|
||||
.public GX_ResetBankForTex
|
||||
.public GX_SetBankForTex
|
||||
.public GX_ResetBankForTexPltt
|
||||
.public GX_SetBankForTexPltt
|
||||
.public GX_HBlankIntr
|
||||
.public G2S_GetBG0ScrPtr
|
||||
.public G2_GetBG1ScrPtr
|
||||
.public G2_GetBG2ScrPtr
|
||||
.public G2_GetBG3ScrPtr
|
||||
.public G2S_GetBG0CharPtr
|
||||
.public G2S_GetBG1ScrPtr
|
||||
.public G2S_GetBG1CharPtr
|
||||
.public G2_GetBG0CharPtr
|
||||
.public G2_GetBG1CharPtr
|
||||
.public G2_GetBG2CharPtr
|
||||
.public G2_GetBG3CharPtr
|
||||
.public MI_DmaCopy16
|
||||
.public MI_Init
|
||||
.public MTX_LookAt
|
||||
.public MTX_OrthoW
|
||||
.public OS_InitReset
|
||||
.public OS_IRQTable
|
||||
.public OS_SleepThread
|
||||
.public OSi_InitVramExclusive
|
||||
.public PM_Init
|
||||
.public PXI_Init
|
||||
.public sClrImg
|
||||
.public sDispMode
|
||||
.public SDK_MAIN_ARENA_LO
|
||||
.public SDK_SECTION_ARENA_DTCM_START
|
||||
.public SDK_SECTION_ARENA_EX_START
|
||||
.public SDK_SECTION_ARENA_ITCM_START
|
||||
.public SetIrqFiqFlags
|
||||
.public SetIrqFlag
|
||||
.public sIsDispOn
|
||||
.public sSubBGExtPltt
|
||||
.public sTexPlttStartAddrTable
|
||||
.public sTexStartAddrTable
|
||||
.public sub_0206F808
|
||||
.public sub_0206FD88
|
||||
.public sub_0206FDE0
|
||||
.public sub_0207BC4C
|
||||
.public sub_0207BCCC
|
||||
.public sub_0207BDA8
|
||||
.public sub_0207BE6C
|
||||
.public sub_0207C0FC
|
||||
.public sub_02080EF0
|
||||
.public sub_02080F30
|
||||
.public sub_02085BD4
|
||||
.public SVC_WaitByLoop
|
||||
.public THREAD_INFO_STRUCT
|
||||
.public WaitForever2
|
||||
.public WaitForInterrupt
|
||||
138
lib/NitroSDK/asm/include/os_thread.inc
Normal file
138
lib/NitroSDK/asm/include/os_thread.inc
Normal file
@@ -0,0 +1,138 @@
|
||||
#pragma once
|
||||
.public _0200002B
|
||||
.public _0207AD0C
|
||||
.public _020B2B9C
|
||||
.public _020B2BAC
|
||||
.public _022B9208
|
||||
.public _022B958E
|
||||
.public _022B9590
|
||||
.public _022B9592
|
||||
.public _022B9594
|
||||
.public _022B9596
|
||||
.public _022B9598
|
||||
.public _022B959A
|
||||
.public _022B959C
|
||||
.public _022B959E
|
||||
.public _022B95A0
|
||||
.public _022B95A2
|
||||
.public _022B95A4
|
||||
.public _022B95E4
|
||||
.public _022B95E8
|
||||
.public _022B95EC
|
||||
.public _022B9614
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_TimerReserved
|
||||
.public OSi_UseTick
|
||||
.public OSi_UseAlarm
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
.public _s32_div_f
|
||||
.public _secure
|
||||
.public MTi_CpuCopy16
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public AtomicExchange
|
||||
.public CARD_Init
|
||||
.public ClearIrqFlag
|
||||
.public CTRDG_Init
|
||||
.public DseMem_Free
|
||||
.public DTCM_BSS
|
||||
.public EnableIrqFiqFlags
|
||||
.public EnableIrqFlag
|
||||
.public FX_AtanIdxTable_
|
||||
.public FX_Div
|
||||
.public GetGameMode
|
||||
.public GetProcessorMode
|
||||
.public gGXState
|
||||
.public GXi_DmaId
|
||||
.public GXi_VRamLockId
|
||||
.public GX_ResetBankForBGExtPltt
|
||||
.public GX_SetBankForBGExtPltt
|
||||
.public GX_ResetBankForSubBGExtPltt
|
||||
.public GX_SetBankForSubBGExtPltt
|
||||
.public GX_ResetBankForSubBGOBJExtPltt
|
||||
.public GX_SetBankForSubBGOBJExtPltt
|
||||
.public GX_ResetBankForOBJExtPltt
|
||||
.public GX_SetBankForOBJExtPltt
|
||||
.public GX_ResetBankForSubOBJExtPltt
|
||||
.public GX_SetBankForSubOBJExtPltt
|
||||
.public GX_ResetBankForTex
|
||||
.public GX_SetBankForTex
|
||||
.public GX_ResetBankForTexPltt
|
||||
.public GX_SetBankForTexPltt
|
||||
.public GX_HBlankIntr
|
||||
.public G2S_GetBG0ScrPtr
|
||||
.public G2_GetBG1ScrPtr
|
||||
.public G2_GetBG2ScrPtr
|
||||
.public G2_GetBG3ScrPtr
|
||||
.public G2S_GetBG0CharPtr
|
||||
.public G2S_GetBG1ScrPtr
|
||||
.public G2S_GetBG1CharPtr
|
||||
.public G2_GetBG0CharPtr
|
||||
.public G2_GetBG1CharPtr
|
||||
.public G2_GetBG2CharPtr
|
||||
.public G2_GetBG3CharPtr
|
||||
.public G3_LoadMtx43
|
||||
.public G3_LoadMtx44
|
||||
.public MI_DmaCopy16
|
||||
.public MI_Init
|
||||
.public MTX_LookAt
|
||||
.public MTX_OrthoW
|
||||
.public OS_InitReset
|
||||
.public OS_IRQTable
|
||||
.public OS_InitLock
|
||||
.public OS_InitIrqTable
|
||||
.public OS_ResetRequestIrqMask
|
||||
.public OS_SetIrqStackChecker
|
||||
.public OS_SetIrqFunction
|
||||
.public OS_EnableIrqMask
|
||||
.public OS_DisableIrqMask
|
||||
.public OSi_InitVramExclusive
|
||||
.public PM_Init
|
||||
.public PXI_Init
|
||||
.public sClrImg
|
||||
.public sDispMode
|
||||
.public SDK_MAIN_ARENA_LO
|
||||
.public SDK_SECTION_ARENA_DTCM_START
|
||||
.public SDK_SECTION_ARENA_EX_START
|
||||
.public SDK_SECTION_ARENA_ITCM_START
|
||||
.public SetIrqFiqFlags
|
||||
.public SetIrqFlag
|
||||
.public sIsDispOn
|
||||
.public sSubBGExtPltt
|
||||
.public sTexPlttStartAddrTable
|
||||
.public sTexStartAddrTable
|
||||
.public sub_0206F808
|
||||
.public sub_0206FD88
|
||||
.public sub_0206FDE0
|
||||
.public sub_02078BF4
|
||||
.public sub_0207BC4C
|
||||
.public sub_0207BCCC
|
||||
.public sub_0207BDA8
|
||||
.public sub_0207BE6C
|
||||
.public sub_0207C0FC
|
||||
.public sub_02080EF0
|
||||
.public sub_02080F30
|
||||
.public sub_02085BD4
|
||||
.public SVC_WaitByLoop
|
||||
.public THREAD_INFO_STRUCT
|
||||
.public WaitForever2
|
||||
.public WaitForInterrupt
|
||||
|
||||
.public sub_0207B1E8
|
||||
.public OS_CreateAlarm
|
||||
.public OS_SetAlarm
|
||||
140
lib/NitroSDK/asm/include/os_timer.inc
Normal file
140
lib/NitroSDK/asm/include/os_timer.inc
Normal file
@@ -0,0 +1,140 @@
|
||||
#pragma once
|
||||
.public _0200002B
|
||||
.public _0207AD0C
|
||||
.public _020B2B9C
|
||||
.public _020B2BAC
|
||||
.public _022B9208
|
||||
.public _022B958E
|
||||
.public _022B9590
|
||||
.public _022B9592
|
||||
.public _022B9594
|
||||
.public _022B9596
|
||||
.public _022B9598
|
||||
.public _022B959A
|
||||
.public _022B959C
|
||||
.public _022B959E
|
||||
.public _022B95A0
|
||||
.public _022B95A2
|
||||
.public _022B95A4
|
||||
.public _022B95E4
|
||||
.public _022B95E8
|
||||
.public _022B95EC
|
||||
.public _022B9614
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_TimerReserved
|
||||
.public OSi_UseTick
|
||||
.public OSi_UseAlarm
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
.public _s32_div_f
|
||||
.public _secure
|
||||
.public MTi_CpuCopy16
|
||||
.public MTi_CpuCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public AtomicExchange
|
||||
.public CARD_Init
|
||||
.public ClearIrqFlag
|
||||
.public CTRDG_Init
|
||||
.public DseMem_Free
|
||||
.public DTCM_BSS
|
||||
.public EnableIrqFiqFlags
|
||||
.public EnableIrqFlag
|
||||
.public FX_AtanIdxTable_
|
||||
.public FX_Div
|
||||
.public GetGameMode
|
||||
.public GetProcessorMode
|
||||
.public gGXState
|
||||
.public GXi_DmaId
|
||||
.public GXi_VRamLockId
|
||||
.public GX_ResetBankForBGExtPltt
|
||||
.public GX_SetBankForBGExtPltt
|
||||
.public GX_ResetBankForSubBGExtPltt
|
||||
.public GX_SetBankForSubBGExtPltt
|
||||
.public GX_ResetBankForSubBGOBJExtPltt
|
||||
.public GX_SetBankForSubBGOBJExtPltt
|
||||
.public GX_ResetBankForOBJExtPltt
|
||||
.public GX_SetBankForOBJExtPltt
|
||||
.public GX_ResetBankForSubOBJExtPltt
|
||||
.public GX_SetBankForSubOBJExtPltt
|
||||
.public GX_ResetBankForTex
|
||||
.public GX_SetBankForTex
|
||||
.public GX_ResetBankForTexPltt
|
||||
.public GX_SetBankForTexPltt
|
||||
.public GX_HBlankIntr
|
||||
.public G2S_GetBG0ScrPtr
|
||||
.public G2_GetBG1ScrPtr
|
||||
.public G2_GetBG2ScrPtr
|
||||
.public G2_GetBG3ScrPtr
|
||||
.public G2S_GetBG0CharPtr
|
||||
.public G2S_GetBG1ScrPtr
|
||||
.public G2S_GetBG1CharPtr
|
||||
.public G2_GetBG0CharPtr
|
||||
.public G2_GetBG1CharPtr
|
||||
.public G2_GetBG2CharPtr
|
||||
.public G2_GetBG3CharPtr
|
||||
.public G3_LoadMtx43
|
||||
.public G3_LoadMtx44
|
||||
.public MI_DmaCopy16
|
||||
.public MI_Init
|
||||
.public MTX_LookAt
|
||||
.public MTX_OrthoW
|
||||
.public OS_InitReset
|
||||
.public OS_IRQTable
|
||||
.public OS_InitLock
|
||||
.public OS_InitIrqTable
|
||||
.public OS_ResetRequestIrqMask
|
||||
.public OS_SetIrqStackChecker
|
||||
.public OS_SetIrqFunction
|
||||
.public OS_DisableProtectionUnit
|
||||
.public OS_EnableProtectionUnit
|
||||
.public OS_EnableIrqMask
|
||||
.public OS_DisableIrqMask
|
||||
.public OSi_InitVramExclusive
|
||||
.public OSi_SetTimerReserved
|
||||
.public PM_Init
|
||||
.public PXI_Init
|
||||
.public sClrImg
|
||||
.public sDispMode
|
||||
.public SDK_MAIN_ARENA_LO
|
||||
.public SDK_SECTION_ARENA_DTCM_START
|
||||
.public SDK_SECTION_ARENA_EX_START
|
||||
.public SDK_SECTION_ARENA_ITCM_START
|
||||
.public SetIrqFiqFlags
|
||||
.public SetIrqFlag
|
||||
.public sIsDispOn
|
||||
.public sSubBGExtPltt
|
||||
.public sTexPlttStartAddrTable
|
||||
.public sTexStartAddrTable
|
||||
.public sub_0206F808
|
||||
.public sub_0206FD88
|
||||
.public sub_0206FDE0
|
||||
.public sub_02078BF4
|
||||
.public sub_0207BC4C
|
||||
.public sub_0207BCCC
|
||||
.public sub_0207BDA8
|
||||
.public sub_0207BE6C
|
||||
.public sub_0207C0FC
|
||||
.public sub_02080EF0
|
||||
.public sub_02080F30
|
||||
.public sub_02085BD4
|
||||
.public SVC_WaitByLoop
|
||||
.public THREAD_INFO_STRUCT
|
||||
.public WaitForever2
|
||||
.public WaitForInterrupt
|
||||
|
||||
.public sub_02079DA0
|
||||
.public OS_GetTick
|
||||
497
lib/NitroSDK/asm/mi_dma.s
Normal file
497
lib/NitroSDK/asm/mi_dma.s
Normal file
@@ -0,0 +1,497 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/mi_memory.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start sub_0207BC4C
|
||||
sub_0207BC4C: ; 0x0207BC4C
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||||
movs r4, r3
|
||||
mov r8, r0
|
||||
mov r7, r1
|
||||
mov r6, r2
|
||||
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
add r0, r8, r8, lsl #1
|
||||
add r0, r0, #2
|
||||
mov r0, r0, lsl #2
|
||||
add r0, r0, #0xb0
|
||||
add r5, r0, #0x4000000
|
||||
_0207BC78:
|
||||
ldr r0, [r5]
|
||||
tst r0, #0x80000000
|
||||
bne _0207BC78
|
||||
bl EnableIrqFlag
|
||||
mov r2, r8, lsl #2
|
||||
add r1, r2, #0xe0
|
||||
mov r3, r4, lsr #2
|
||||
mov r4, r0
|
||||
add ip, r2, #0x4000000
|
||||
mov r0, r8
|
||||
mov r2, r7
|
||||
add r1, r1, #0x4000000
|
||||
orr r3, r3, #0x85000000
|
||||
str r6, [ip, #0xe0]
|
||||
bl sub_01FF9B3C
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
_0207BCBC:
|
||||
ldr r0, [r5]
|
||||
tst r0, #0x80000000
|
||||
bne _0207BCBC
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
arm_func_end sub_0207BC4C
|
||||
|
||||
arm_func_start sub_0207BCCC
|
||||
sub_0207BCCC: ; 0x0207BCCC
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||||
mov r5, r3
|
||||
mov r6, r2
|
||||
mov r2, r5
|
||||
mov r3, #0
|
||||
mov r8, r0
|
||||
mov r7, r1
|
||||
bl MIi_CheckDma0SourceAddress
|
||||
cmp r5, #0
|
||||
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
add r0, r8, r8, lsl #1
|
||||
add r0, r0, #2
|
||||
mov r0, r0, lsl #2
|
||||
add r0, r0, #0xb0
|
||||
add r4, r0, #0x4000000
|
||||
_0207BD08:
|
||||
ldr r0, [r4]
|
||||
tst r0, #0x80000000
|
||||
bne _0207BD08
|
||||
mov r3, r5, lsr #2
|
||||
mov r0, r8
|
||||
mov r1, r7
|
||||
mov r2, r6
|
||||
orr r3, r3, #0x84000000
|
||||
bl sub_01FF9AA8
|
||||
_0207BD2C:
|
||||
ldr r0, [r4]
|
||||
tst r0, #0x80000000
|
||||
bne _0207BD2C
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
arm_func_end sub_0207BCCC
|
||||
|
||||
arm_func_start MI_DmaCopy16
|
||||
MI_DmaCopy16: ; 0x0207BD3C
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||||
movs r5, r3
|
||||
mov r8, r0
|
||||
mov r7, r1
|
||||
mov r6, r2
|
||||
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
mov r2, r5
|
||||
mov r3, #0
|
||||
bl MIi_CheckDma0SourceAddress
|
||||
add r0, r8, r8, lsl #1
|
||||
add r0, r0, #2
|
||||
mov r0, r0, lsl #2
|
||||
add r0, r0, #0xb0
|
||||
add r4, r0, #0x4000000
|
||||
_0207BD74:
|
||||
ldr r0, [r4]
|
||||
tst r0, #0x80000000
|
||||
bne _0207BD74
|
||||
mov r3, r5, lsr #1
|
||||
mov r0, r8
|
||||
mov r1, r7
|
||||
mov r2, r6
|
||||
orr r3, r3, #0x80000000
|
||||
bl sub_01FF9AA8
|
||||
_0207BD98:
|
||||
ldr r0, [r4]
|
||||
tst r0, #0x80000000
|
||||
bne _0207BD98
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
arm_func_end MI_DmaCopy16
|
||||
|
||||
arm_func_start sub_0207BDA8
|
||||
sub_0207BDA8: ; 0x0207BDA8
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||||
movs r4, r3
|
||||
mov r7, r0
|
||||
mov r6, r1
|
||||
mov r5, r2
|
||||
ldr r8, [sp, #0x18]
|
||||
bne _0207BDD8
|
||||
cmp r8, #0
|
||||
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
ldr r0, [sp, #0x1c]
|
||||
blx r8
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
_0207BDD8:
|
||||
bl sub_0207C0FC
|
||||
cmp r8, #0
|
||||
beq _0207BE30
|
||||
ldr r2, [sp, #0x1c]
|
||||
mov r0, r7
|
||||
mov r1, r8
|
||||
bl sub_02078BAC
|
||||
bl EnableIrqFlag
|
||||
mov r3, r4, lsr #2
|
||||
mov r2, r7, lsl #2
|
||||
add r1, r2, #0xe0
|
||||
add r2, r2, #0x4000000
|
||||
str r5, [r2, #0xe0]
|
||||
mov r4, r0
|
||||
mov r0, r7
|
||||
mov r2, r6
|
||||
add r1, r1, #0x4000000
|
||||
orr r3, r3, #0xc5000000
|
||||
bl sub_01FF9B18
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
_0207BE30:
|
||||
bl EnableIrqFlag
|
||||
mov r2, r7, lsl #2
|
||||
add r1, r2, #0xe0
|
||||
mov r3, r4, lsr #2
|
||||
mov r4, r0
|
||||
add ip, r2, #0x4000000
|
||||
mov r0, r7
|
||||
mov r2, r6
|
||||
add r1, r1, #0x4000000
|
||||
orr r3, r3, #0x85000000
|
||||
str r5, [ip, #0xe0]
|
||||
bl sub_01FF9B18
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
arm_func_end sub_0207BDA8
|
||||
|
||||
arm_func_start sub_0207BE6C
|
||||
sub_0207BE6C: ; 0x0207BE6C
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||||
mov r5, r3
|
||||
mov r6, r2
|
||||
mov r2, r5
|
||||
mov r3, #0
|
||||
mov r8, r0
|
||||
mov r7, r1
|
||||
ldr r4, [sp, #0x18]
|
||||
bl MIi_CheckDma0SourceAddress
|
||||
cmp r5, #0
|
||||
bne _0207BEAC
|
||||
cmp r4, #0
|
||||
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
ldr r0, [sp, #0x1c]
|
||||
blx r4
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
_0207BEAC:
|
||||
mov r0, r8
|
||||
bl sub_0207C0FC
|
||||
cmp r4, #0
|
||||
beq _0207BEE8
|
||||
ldr r2, [sp, #0x1c]
|
||||
mov r0, r8
|
||||
mov r1, r4
|
||||
bl sub_02078BAC
|
||||
mov r3, r5, lsr #2
|
||||
mov r0, r8
|
||||
mov r1, r7
|
||||
mov r2, r6
|
||||
orr r3, r3, #0xc4000000
|
||||
bl InitDmaTransfer_Standard
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
_0207BEE8:
|
||||
mov r3, r5, lsr #2
|
||||
mov r0, r8
|
||||
mov r1, r7
|
||||
mov r2, r6
|
||||
orr r3, r3, #0x84000000
|
||||
bl InitDmaTransfer_Standard
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
arm_func_end sub_0207BE6C
|
||||
|
||||
arm_func_start sub_0207BF04
|
||||
sub_0207BF04: ; 0x0207BF04
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||||
mov r5, r3
|
||||
mov r6, r2
|
||||
mov r2, r5
|
||||
mov r3, #0
|
||||
mov r8, r0
|
||||
mov r7, r1
|
||||
ldr r4, [sp, #0x18]
|
||||
bl MIi_CheckDma0SourceAddress
|
||||
cmp r5, #0
|
||||
bne _0207BF44
|
||||
cmp r4, #0
|
||||
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
ldr r0, [sp, #0x1c]
|
||||
blx r4
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
_0207BF44:
|
||||
mov r0, r8
|
||||
bl sub_0207C0FC
|
||||
cmp r4, #0
|
||||
beq _0207BF84
|
||||
ldr r2, [sp, #0x1c]
|
||||
mov r0, r8
|
||||
mov r1, r4
|
||||
bl sub_02078BAC
|
||||
mov r3, #0x3bc00000
|
||||
rsb r3, r3, #0
|
||||
mov r0, r8
|
||||
mov r1, r7
|
||||
mov r2, r6
|
||||
orr r3, r3, r5, lsr #2
|
||||
bl InitDmaTransfer_Standard
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
_0207BF84:
|
||||
ldr r3, _0207BFA0 ; =0x84400000
|
||||
mov r0, r8
|
||||
mov r1, r7
|
||||
mov r2, r6
|
||||
orr r3, r3, r5, lsr #2
|
||||
bl InitDmaTransfer_Standard
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
.align 2, 0
|
||||
_0207BFA0: .word 0x84400000
|
||||
arm_func_end sub_0207BF04
|
||||
|
||||
arm_func_start sub_0207BFA4
|
||||
sub_0207BFA4: ; 0x0207BFA4
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||||
mov r5, r3
|
||||
mov r6, r2
|
||||
mov r2, r5
|
||||
mov r3, #0
|
||||
mov r8, r0
|
||||
mov r7, r1
|
||||
ldr r4, [sp, #0x18]
|
||||
bl MIi_CheckDma0SourceAddress
|
||||
cmp r5, #0
|
||||
bne _0207BFE4
|
||||
cmp r4, #0
|
||||
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
ldr r0, [sp, #0x1c]
|
||||
blx r4
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
_0207BFE4:
|
||||
mov r0, r8
|
||||
bl sub_0207C0FC
|
||||
cmp r4, #0
|
||||
beq _0207C020
|
||||
ldr r2, [sp, #0x1c]
|
||||
mov r0, r8
|
||||
mov r1, r4
|
||||
bl sub_02078BAC
|
||||
mov r3, r5, lsr #1
|
||||
mov r0, r8
|
||||
mov r1, r7
|
||||
mov r2, r6
|
||||
orr r3, r3, #0xc0000000
|
||||
bl InitDmaTransfer_Standard
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
_0207C020:
|
||||
mov r3, r5, lsr #1
|
||||
mov r0, r8
|
||||
mov r1, r7
|
||||
mov r2, r6
|
||||
orr r3, r3, #0x80000000
|
||||
bl InitDmaTransfer_Standard
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
arm_func_end sub_0207BFA4
|
||||
|
||||
arm_func_start sub_0207C03C
|
||||
sub_0207C03C: ; 0x0207C03C
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||||
mov r5, r3
|
||||
mov r6, r2
|
||||
mov r2, r5
|
||||
mov r3, #0
|
||||
mov r8, r0
|
||||
mov r7, r1
|
||||
ldr r4, [sp, #0x18]
|
||||
bl MIi_CheckDma0SourceAddress
|
||||
cmp r5, #0
|
||||
bne _0207C07C
|
||||
cmp r4, #0
|
||||
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
ldr r0, [sp, #0x1c]
|
||||
blx r4
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
_0207C07C:
|
||||
mov r0, r8
|
||||
bl sub_0207C0FC
|
||||
cmp r4, #0
|
||||
beq _0207C0BC
|
||||
ldr r2, [sp, #0x1c]
|
||||
mov r0, r8
|
||||
mov r1, r4
|
||||
bl sub_02078BAC
|
||||
mov r3, #0x3fc00000
|
||||
rsb r3, r3, #0
|
||||
mov r0, r8
|
||||
mov r1, r7
|
||||
mov r2, r6
|
||||
orr r3, r3, r5, lsr #1
|
||||
bl InitDmaTransfer_Standard
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
_0207C0BC:
|
||||
ldr r3, _0207C0D8 ; =0x80400000
|
||||
mov r0, r8
|
||||
mov r1, r7
|
||||
mov r2, r6
|
||||
orr r3, r3, r5, lsr #1
|
||||
bl InitDmaTransfer_Standard
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
.align 2, 0
|
||||
_0207C0D8: .word 0x80400000
|
||||
arm_func_end sub_0207C03C
|
||||
|
||||
arm_func_start sub_0207C0DC
|
||||
sub_0207C0DC: ; 0x0207C0DC
|
||||
add r0, r0, r0, lsl #1
|
||||
add r0, r0, #2
|
||||
mov r0, r0, lsl #2
|
||||
add r0, r0, #0x4000000
|
||||
ldr r0, [r0, #0xb0]
|
||||
and r0, r0, #0x80000000
|
||||
mov r0, r0, lsr #0x1f
|
||||
bx lr
|
||||
arm_func_end sub_0207C0DC
|
||||
|
||||
arm_func_start sub_0207C0FC
|
||||
sub_0207C0FC: ; 0x0207C0FC
|
||||
stmdb sp!, {r4, lr}
|
||||
mov r4, r0
|
||||
bl EnableIrqFlag
|
||||
add r1, r4, r4, lsl #1
|
||||
add r1, r1, #2
|
||||
mov r1, r1, lsl #2
|
||||
add r1, r1, #0xb0
|
||||
add r2, r1, #0x4000000
|
||||
_0207C11C:
|
||||
ldr r1, [r2]
|
||||
tst r1, #0x80000000
|
||||
bne _0207C11C
|
||||
cmp r4, #0
|
||||
bne _0207C158
|
||||
mov r1, #0xc
|
||||
mul r2, r4, r1
|
||||
add r1, r2, #0xb0
|
||||
add r2, r2, #0x4000000
|
||||
mov r3, #0
|
||||
str r3, [r2, #0xb0]
|
||||
add r2, r1, #0x4000000
|
||||
ldr r1, _0207C160 ; =0x81400001
|
||||
str r3, [r2, #4]
|
||||
str r1, [r2, #8]
|
||||
_0207C158:
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207C160: .word 0x81400001
|
||||
arm_func_end sub_0207C0FC
|
||||
|
||||
arm_func_start MI_StopDma
|
||||
MI_StopDma: ; 0x0207C164
|
||||
stmdb sp!, {r4, lr}
|
||||
mov r4, r0
|
||||
bl EnableIrqFlag
|
||||
mov r1, #6
|
||||
mul r1, r4, r1
|
||||
add r1, r1, #5
|
||||
mov r1, r1, lsl #1
|
||||
add r1, r1, #0x4000000
|
||||
ldrh r2, [r1, #0xb0]
|
||||
cmp r4, #0
|
||||
bic r2, r2, #0x3a00
|
||||
strh r2, [r1, #0xb0]
|
||||
ldrh r2, [r1, #0xb0]
|
||||
bic r2, r2, #0x8000
|
||||
strh r2, [r1, #0xb0]
|
||||
ldrh r2, [r1, #0xb0]
|
||||
ldrh r1, [r1, #0xb0]
|
||||
bne _0207C1D4
|
||||
mov r1, #0xc
|
||||
mul r2, r4, r1
|
||||
add r1, r2, #0xb0
|
||||
add r2, r2, #0x4000000
|
||||
mov r3, #0
|
||||
str r3, [r2, #0xb0]
|
||||
add r2, r1, #0x4000000
|
||||
ldr r1, _0207C1DC ; =0x81400001
|
||||
str r3, [r2, #4]
|
||||
str r1, [r2, #8]
|
||||
_0207C1D4:
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207C1DC: .word 0x81400001
|
||||
arm_func_end MI_StopDma
|
||||
|
||||
arm_func_start sub_0207C1E0
|
||||
sub_0207C1E0: ; 0x0207C1E0
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
ldr r5, _0207C260 ; =0x040000B8
|
||||
mov r7, r0
|
||||
mov r6, r1
|
||||
mov r4, #0
|
||||
_0207C1F4:
|
||||
cmp r4, r7
|
||||
beq _0207C24C
|
||||
ldr r0, [r5]
|
||||
tst r0, #0x80000000
|
||||
andne r0, r0, #0x38000000
|
||||
cmpne r0, r6
|
||||
beq _0207C24C
|
||||
cmp r0, #0x8000000
|
||||
cmpeq r6, #0x10000000
|
||||
beq _0207C24C
|
||||
cmp r0, #0x10000000
|
||||
cmpeq r6, #0x8000000
|
||||
beq _0207C24C
|
||||
cmp r0, #0x18000000
|
||||
cmpne r0, #0x20000000
|
||||
cmpne r0, #0x28000000
|
||||
cmpne r0, #0x30000000
|
||||
cmpne r0, #0x38000000
|
||||
cmpne r0, #0x8000000
|
||||
cmpne r0, #0x10000000
|
||||
bne _0207C24C
|
||||
bl WaitForever2
|
||||
_0207C24C:
|
||||
add r4, r4, #1
|
||||
cmp r4, #3
|
||||
add r5, r5, #0xc
|
||||
blt _0207C1F4
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_0207C260: .word 0x040000B8
|
||||
arm_func_end sub_0207C1E0
|
||||
|
||||
arm_func_start MIi_CheckDma0SourceAddress
|
||||
MIi_CheckDma0SourceAddress: ; 0x0207C264
|
||||
stmdb sp!, {r3, lr}
|
||||
cmp r0, #0
|
||||
ldmneia sp!, {r3, pc}
|
||||
cmp r3, #0
|
||||
and ip, r1, #0xff000000
|
||||
beq _0207C288
|
||||
cmp r3, #0x800000
|
||||
subeq r1, r1, r2
|
||||
b _0207C28C
|
||||
_0207C288:
|
||||
add r1, r1, r2
|
||||
_0207C28C:
|
||||
cmp ip, #0x4000000
|
||||
and r0, r1, #0xff000000
|
||||
beq _0207C2B0
|
||||
cmp ip, #0x8000000
|
||||
bhs _0207C2B0
|
||||
cmp r0, #0x4000000
|
||||
beq _0207C2B0
|
||||
cmp r0, #0x8000000
|
||||
ldmloia sp!, {r3, pc}
|
||||
_0207C2B0:
|
||||
bl WaitForever2
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end MIi_CheckDma0SourceAddress
|
||||
|
||||
43
lib/NitroSDK/asm/mi_dma_card.s
Normal file
43
lib/NitroSDK/asm/mi_dma_card.s
Normal file
@@ -0,0 +1,43 @@
|
||||
.include "asm/macros.inc"
|
||||
|
||||
.text
|
||||
|
||||
.public sub_0207C1E0
|
||||
.public MIi_CheckDma0SourceAddress
|
||||
.public InitDmaTransfer_Standard
|
||||
|
||||
arm_func_start MTi_CardDmaCopy32 ;
|
||||
MTi_CardDmaCopy32: ; 0x0207C750
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
mov r5, r1
|
||||
mov r6, r0
|
||||
mov r7, r3
|
||||
mvn r1, #0
|
||||
mov r4, r2
|
||||
bl sub_0207C1E0
|
||||
mov r0, r6
|
||||
mov r1, r5
|
||||
mov r2, r7
|
||||
mov r3, #0x1000000
|
||||
bl MIi_CheckDma0SourceAddress
|
||||
cmp r7, #0
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
add r0, r6, r6, lsl #1
|
||||
add r0, r0, #2
|
||||
mov r0, r0, lsl #2
|
||||
add r0, r0, #0xb0
|
||||
add r1, r0, #0x4000000
|
||||
_0207C79C:
|
||||
ldr r0, [r1]
|
||||
tst r0, #0x80000000
|
||||
bne _0207C79C
|
||||
ldr r3, _0207C7C0 ; =0xAF000001
|
||||
mov r0, r6
|
||||
mov r1, r5
|
||||
mov r2, r4
|
||||
bl InitDmaTransfer_Standard
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_0207C7C0: .word 0xAF000001
|
||||
arm_func_end MTi_CardDmaCopy32
|
||||
|
||||
16
lib/NitroSDK/asm/mi_init.s
Normal file
16
lib/NitroSDK/asm/mi_init.s
Normal file
@@ -0,0 +1,16 @@
|
||||
.include "asm/macros.inc"
|
||||
|
||||
.text
|
||||
|
||||
.public MI_SetWramBank
|
||||
.public MI_StopDma
|
||||
|
||||
arm_func_start MI_Init
|
||||
MI_Init: ; 0x0207C7C4
|
||||
stmdb sp!, {r3, lr}
|
||||
mov r0, #3
|
||||
bl MI_SetWramBank
|
||||
mov r0, #0
|
||||
bl MI_StopDma
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end MI_Init
|
||||
346
lib/NitroSDK/asm/mi_memory.s
Normal file
346
lib/NitroSDK/asm/mi_memory.s
Normal file
@@ -0,0 +1,346 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/mi_memory.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start MTi_CpuClear16
|
||||
MTi_CpuClear16: ; 0x0207C2B8
|
||||
mov r3, #0
|
||||
_0207C2BC:
|
||||
cmp r3, r2
|
||||
blt _0207C2C8
|
||||
b _0207C2CC
|
||||
_0207C2C8:
|
||||
strh r0, [r1, r3]
|
||||
_0207C2CC:
|
||||
blt _0207C2D4
|
||||
b _0207C2D8
|
||||
_0207C2D4:
|
||||
add r3, r3, #2
|
||||
_0207C2D8:
|
||||
blt _0207C2BC
|
||||
bx lr
|
||||
arm_func_end MTi_CpuClear16
|
||||
|
||||
arm_func_start MTi_CpuCopy16
|
||||
MTi_CpuCopy16: ; 0x0207C2E0
|
||||
mov ip, #0
|
||||
_0207C2E4:
|
||||
cmp ip, r2
|
||||
blt _0207C2F0
|
||||
b _0207C2F4
|
||||
_0207C2F0:
|
||||
ldrh r3, [r0, ip]
|
||||
_0207C2F4:
|
||||
blt _0207C2FC
|
||||
b _0207C300
|
||||
_0207C2FC:
|
||||
strh r3, [r1, ip]
|
||||
_0207C300:
|
||||
blt _0207C308
|
||||
b _0207C30C
|
||||
_0207C308:
|
||||
add ip, ip, #2
|
||||
_0207C30C:
|
||||
blt _0207C2E4
|
||||
bx lr
|
||||
arm_func_end MTi_CpuCopy16
|
||||
|
||||
arm_func_start MTi_CpuClear32
|
||||
MTi_CpuClear32: ; 0x0207C314
|
||||
add ip, r1, r2
|
||||
_0207C318:
|
||||
cmp r1, ip
|
||||
blt _0207C324
|
||||
b _0207C328
|
||||
_0207C324:
|
||||
stmia r1!, {r0}
|
||||
_0207C328:
|
||||
blt _0207C318
|
||||
bx lr
|
||||
arm_func_end MTi_CpuClear32
|
||||
|
||||
arm_func_start MTi_CpuCopy32
|
||||
MTi_CpuCopy32: ; 0x0207C330
|
||||
add ip, r1, r2
|
||||
_0207C334:
|
||||
cmp r1, ip
|
||||
blt _0207C340
|
||||
b _0207C344
|
||||
_0207C340:
|
||||
ldmia r0!, {r2}
|
||||
_0207C344:
|
||||
blt _0207C34C
|
||||
b _0207C350
|
||||
_0207C34C:
|
||||
stmia r1!, {r2}
|
||||
_0207C350:
|
||||
blt _0207C334
|
||||
bx lr
|
||||
arm_func_end MTi_CpuCopy32
|
||||
|
||||
arm_func_start MTi_CpuClearFast
|
||||
MTi_CpuClearFast: ; 0x0207C358
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, sb}
|
||||
add sb, r1, r2
|
||||
mov ip, r2, lsr #5
|
||||
add ip, r1, ip, lsl #5
|
||||
mov r2, r0
|
||||
mov r3, r2
|
||||
mov r4, r2
|
||||
mov r5, r2
|
||||
mov r6, r2
|
||||
mov r7, r2
|
||||
mov r8, r2
|
||||
_0207C384:
|
||||
cmp r1, ip
|
||||
blt _0207C390
|
||||
b _0207C394
|
||||
_0207C390:
|
||||
stmia r1!, {r0, r2, r3, r4, r5, r6, r7, r8}
|
||||
_0207C394:
|
||||
blt _0207C384
|
||||
_0207C398:
|
||||
cmp r1, sb
|
||||
blt _0207C3A4
|
||||
b _0207C3A8
|
||||
_0207C3A4:
|
||||
stmia r1!, {r0}
|
||||
_0207C3A8:
|
||||
blt _0207C398
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, sb}
|
||||
bx lr
|
||||
arm_func_end MTi_CpuClearFast
|
||||
|
||||
arm_func_start MTi_CpuCopy32Fast
|
||||
MTi_CpuCopy32Fast: ; 0x0207C3B4
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, sb, sl}
|
||||
add sl, r1, r2
|
||||
mov ip, r2, lsr #5
|
||||
add ip, r1, ip, lsl #5
|
||||
_0207C3C4:
|
||||
cmp r1, ip
|
||||
blt _0207C3D0
|
||||
b _0207C3D4
|
||||
_0207C3D0:
|
||||
ldmia r0!, {r2, r3, r4, r5, r6, r7, r8, sb}
|
||||
_0207C3D4:
|
||||
blt _0207C3DC
|
||||
b _0207C3E0
|
||||
_0207C3DC:
|
||||
stmia r1!, {r2, r3, r4, r5, r6, r7, r8, sb}
|
||||
_0207C3E0:
|
||||
blt _0207C3C4
|
||||
_0207C3E4:
|
||||
cmp r1, sl
|
||||
blt _0207C3F0
|
||||
b _0207C3F4
|
||||
_0207C3F0:
|
||||
ldmia r0!, {r2}
|
||||
_0207C3F4:
|
||||
blt _0207C3FC
|
||||
b _0207C400
|
||||
_0207C3FC:
|
||||
stmia r1!, {r2}
|
||||
_0207C400:
|
||||
blt _0207C3E4
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, sb, sl}
|
||||
bx lr
|
||||
arm_func_end MTi_CpuCopy32Fast
|
||||
|
||||
arm_func_start MI_CpuFill8
|
||||
MI_CpuFill8: ; 0x0207C40C
|
||||
cmp r2, #0
|
||||
beq _0207C418
|
||||
b _0207C41C
|
||||
_0207C418:
|
||||
bx lr
|
||||
_0207C41C:
|
||||
tst r0, #1
|
||||
beq _0207C448
|
||||
ldrh ip, [r0, #-1]
|
||||
and ip, ip, #0xff
|
||||
orr r3, ip, r1, lsl #8
|
||||
strh r3, [r0, #-1]
|
||||
add r0, r0, #1
|
||||
subs r2, r2, #1
|
||||
beq _0207C444
|
||||
b _0207C448
|
||||
_0207C444:
|
||||
bx lr
|
||||
_0207C448:
|
||||
cmp r2, #2
|
||||
blo _0207C4A0
|
||||
orr r1, r1, r1, lsl #8
|
||||
tst r0, #2
|
||||
beq _0207C470
|
||||
strh r1, [r0], #2
|
||||
subs r2, r2, #2
|
||||
beq _0207C46C
|
||||
b _0207C470
|
||||
_0207C46C:
|
||||
bx lr
|
||||
_0207C470:
|
||||
orr r1, r1, r1, lsl #16
|
||||
bics r3, r2, #3
|
||||
beq _0207C490
|
||||
sub r2, r2, r3
|
||||
add ip, r3, r0
|
||||
_0207C484:
|
||||
str r1, [r0], #4
|
||||
cmp r0, ip
|
||||
blo _0207C484
|
||||
_0207C490:
|
||||
tst r2, #2
|
||||
bne _0207C49C
|
||||
b _0207C4A0
|
||||
_0207C49C:
|
||||
strh r1, [r0], #2
|
||||
_0207C4A0:
|
||||
tst r2, #1
|
||||
beq _0207C4AC
|
||||
b _0207C4B0
|
||||
_0207C4AC:
|
||||
bx lr
|
||||
_0207C4B0:
|
||||
ldrh r3, [r0]
|
||||
and r3, r3, #0xff00
|
||||
and r1, r1, #0xff
|
||||
orr r1, r1, r3
|
||||
strh r1, [r0]
|
||||
bx lr
|
||||
arm_func_end MI_CpuFill8
|
||||
|
||||
arm_func_start MI_CpuCopy8
|
||||
MI_CpuCopy8: ; 0x0207C4C8
|
||||
cmp r2, #0
|
||||
beq _0207C4D4
|
||||
b _0207C4D8
|
||||
_0207C4D4:
|
||||
bx lr
|
||||
_0207C4D8:
|
||||
tst r1, #1
|
||||
beq _0207C530
|
||||
ldrh ip, [r1, #-1]
|
||||
and ip, ip, #0xff
|
||||
tst r0, #1
|
||||
bne _0207C4F4
|
||||
b _0207C4F8
|
||||
_0207C4F4:
|
||||
ldrh r3, [r0, #-1]
|
||||
_0207C4F8:
|
||||
bne _0207C500
|
||||
b _0207C504
|
||||
_0207C500:
|
||||
mov r3, r3, lsr #8
|
||||
_0207C504:
|
||||
beq _0207C50C
|
||||
b _0207C510
|
||||
_0207C50C:
|
||||
ldrh r3, [r0]
|
||||
_0207C510:
|
||||
orr r3, ip, r3, lsl #8
|
||||
strh r3, [r1, #-1]
|
||||
add r0, r0, #1
|
||||
add r1, r1, #1
|
||||
subs r2, r2, #1
|
||||
beq _0207C52C
|
||||
b _0207C530
|
||||
_0207C52C:
|
||||
bx lr
|
||||
_0207C530:
|
||||
eor ip, r1, r0
|
||||
tst ip, #1
|
||||
beq _0207C58C
|
||||
bic r0, r0, #1
|
||||
ldrh ip, [r0], #2
|
||||
mov r3, ip, lsr #8
|
||||
subs r2, r2, #2
|
||||
blo _0207C568
|
||||
_0207C550:
|
||||
ldrh ip, [r0], #2
|
||||
orr ip, r3, ip, lsl #8
|
||||
strh ip, [r1], #2
|
||||
mov r3, ip, lsr #0x10
|
||||
subs r2, r2, #2
|
||||
bhs _0207C550
|
||||
_0207C568:
|
||||
tst r2, #1
|
||||
beq _0207C574
|
||||
b _0207C578
|
||||
_0207C574:
|
||||
bx lr
|
||||
_0207C578:
|
||||
ldrh ip, [r1]
|
||||
and ip, ip, #0xff00
|
||||
orr ip, ip, r3
|
||||
strh ip, [r1]
|
||||
bx lr
|
||||
_0207C58C:
|
||||
tst ip, #2
|
||||
beq _0207C5B8
|
||||
bics r3, r2, #1
|
||||
beq _0207C61C
|
||||
sub r2, r2, r3
|
||||
add ip, r3, r1
|
||||
_0207C5A4:
|
||||
ldrh r3, [r0], #2
|
||||
strh r3, [r1], #2
|
||||
cmp r1, ip
|
||||
blo _0207C5A4
|
||||
b _0207C61C
|
||||
_0207C5B8:
|
||||
cmp r2, #2
|
||||
blo _0207C61C
|
||||
tst r1, #2
|
||||
beq _0207C5E0
|
||||
ldrh r3, [r0], #2
|
||||
strh r3, [r1], #2
|
||||
subs r2, r2, #2
|
||||
beq _0207C5DC
|
||||
b _0207C5E0
|
||||
_0207C5DC:
|
||||
bx lr
|
||||
_0207C5E0:
|
||||
bics r3, r2, #3
|
||||
beq _0207C600
|
||||
sub r2, r2, r3
|
||||
add ip, r3, r1
|
||||
_0207C5F0:
|
||||
ldr r3, [r0], #4
|
||||
str r3, [r1], #4
|
||||
cmp r1, ip
|
||||
blo _0207C5F0
|
||||
_0207C600:
|
||||
tst r2, #2
|
||||
bne _0207C60C
|
||||
b _0207C610
|
||||
_0207C60C:
|
||||
ldrh r3, [r0], #2
|
||||
_0207C610:
|
||||
bne _0207C618
|
||||
b _0207C61C
|
||||
_0207C618:
|
||||
strh r3, [r1], #2
|
||||
_0207C61C:
|
||||
tst r2, #1
|
||||
beq _0207C628
|
||||
b _0207C62C
|
||||
_0207C628:
|
||||
bx lr
|
||||
_0207C62C:
|
||||
ldrh r2, [r1]
|
||||
ldrh r0, [r0]
|
||||
and r2, r2, #0xff00
|
||||
and r0, r0, #0xff
|
||||
orr r0, r2, r0
|
||||
strh r0, [r1]
|
||||
bx lr
|
||||
arm_func_end MI_CpuCopy8
|
||||
|
||||
arm_func_start AtomicExchange
|
||||
AtomicExchange: ; 0x0207C648
|
||||
.word 0xE1010090
|
||||
bx lr
|
||||
arm_func_end AtomicExchange
|
||||
|
||||
87
lib/NitroSDK/asm/mi_uncompress.s
Normal file
87
lib/NitroSDK/asm/mi_uncompress.s
Normal file
@@ -0,0 +1,87 @@
|
||||
.include "asm/macros.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start sub_0207C650 ; MI_UncompressLZ8
|
||||
sub_0207C650: ; 0x0207C650
|
||||
stmdb sp!, {r4, r5, r6, r7, lr}
|
||||
ldr r5, [r0], #4
|
||||
mov r2, r5, lsr #8
|
||||
mov r7, #0
|
||||
tst r5, #0xf
|
||||
bne _0207C66C
|
||||
b _0207C670
|
||||
_0207C66C:
|
||||
mov r7, #1
|
||||
_0207C670:
|
||||
cmp r2, #0
|
||||
ble _0207C748
|
||||
ldrb lr, [r0], #1
|
||||
mov r4, #8
|
||||
_0207C680:
|
||||
subs r4, r4, #1
|
||||
blt _0207C670
|
||||
tst lr, #0x80
|
||||
bne _0207C6A4
|
||||
ldrb r6, [r0], #1
|
||||
.word 0xE1416096
|
||||
add r1, r1, #1
|
||||
sub r2, r2, #1
|
||||
b _0207C730
|
||||
_0207C6A4:
|
||||
ldrb r5, [r0]
|
||||
cmp r7, #0
|
||||
beq _0207C6B4
|
||||
b _0207C6B8
|
||||
_0207C6B4:
|
||||
mov r6, #3
|
||||
_0207C6B8:
|
||||
beq _0207C6FC
|
||||
tst r5, #0xe0
|
||||
bne _0207C6C8
|
||||
b _0207C6CC
|
||||
_0207C6C8:
|
||||
mov r6, #1
|
||||
_0207C6CC:
|
||||
bne _0207C6FC
|
||||
add r0, r0, #1
|
||||
and r6, r5, #0xf
|
||||
mov r6, r6, lsl #4
|
||||
tst r5, #0x10
|
||||
beq _0207C6F4
|
||||
mov r6, r6, lsl #8
|
||||
ldrb r5, [r0], #1
|
||||
add r6, r6, r5, lsl #4
|
||||
add r6, r6, #0x100
|
||||
_0207C6F4:
|
||||
add r6, r6, #0x11
|
||||
ldrb r5, [r0]
|
||||
_0207C6FC:
|
||||
add r3, r6, r5, asr #4
|
||||
add r0, r0, #1
|
||||
and r5, r5, #0xf
|
||||
mov ip, r5, lsl #8
|
||||
ldrb r6, [r0], #1
|
||||
orr r5, r6, ip
|
||||
add ip, r5, #1
|
||||
sub r2, r2, r3
|
||||
_0207C71C:
|
||||
ldrb r5, [r1, -ip]
|
||||
.word 0xE1415095
|
||||
add r1, r1, #1
|
||||
subs r3, r3, #1
|
||||
bgt _0207C71C
|
||||
_0207C730:
|
||||
cmp r2, #0
|
||||
bgt _0207C73C
|
||||
b _0207C740
|
||||
_0207C73C:
|
||||
mov lr, lr, lsl #1
|
||||
_0207C740:
|
||||
bgt _0207C680
|
||||
b _0207C670
|
||||
_0207C748:
|
||||
ldmia sp!, {r4, r5, r6, r7, lr}
|
||||
bx lr
|
||||
arm_func_end sub_0207C650
|
||||
|
||||
12
lib/NitroSDK/asm/mi_wram.s
Normal file
12
lib/NitroSDK/asm/mi_wram.s
Normal file
@@ -0,0 +1,12 @@
|
||||
.include "asm/macros.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start MI_SetWramBank
|
||||
MI_SetWramBank: ; 0x0207BC3C
|
||||
ldr r1, _0207BC48 ; =0x04000247
|
||||
strb r0, [r1]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207BC48: .word 0x04000247
|
||||
arm_func_end MI_SetWramBank
|
||||
213
lib/NitroSDK/asm/mtx.s
Normal file
213
lib/NitroSDK/asm/mtx.s
Normal file
@@ -0,0 +1,213 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/mtx.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start MTX_LookAt
|
||||
MTX_LookAt: ; 0x02075828
|
||||
stmdb sp!, {r3, r4, r5, r6, lr}
|
||||
sub sp, sp, #0x24
|
||||
mov r6, r0
|
||||
ldr r5, [r6]
|
||||
ldr r4, [r2]
|
||||
add r0, sp, #0x18
|
||||
sub r4, r5, r4
|
||||
str r4, [sp, #0x18]
|
||||
ldr ip, [r6, #4]
|
||||
ldr r4, [r2, #4]
|
||||
mov r5, r1
|
||||
sub r1, ip, r4
|
||||
str r1, [sp, #0x1c]
|
||||
ldr r4, [r6, #8]
|
||||
ldr r2, [r2, #8]
|
||||
mov r1, r0
|
||||
sub r2, r4, r2
|
||||
mov r4, r3
|
||||
str r2, [sp, #0x20]
|
||||
bl VEC_Normalize
|
||||
add r1, sp, #0x18
|
||||
add r2, sp, #0xc
|
||||
mov r0, r5
|
||||
bl VEC_CrossProduct
|
||||
add r0, sp, #0xc
|
||||
mov r1, r0
|
||||
bl VEC_Normalize
|
||||
add r0, sp, #0x18
|
||||
add r1, sp, #0xc
|
||||
add r2, sp, #0
|
||||
bl VEC_CrossProduct
|
||||
ldr r1, [sp, #0xc]
|
||||
mov r0, r6
|
||||
str r1, [r4]
|
||||
ldr r2, [sp]
|
||||
add r1, sp, #0xc
|
||||
str r2, [r4, #4]
|
||||
ldr r2, [sp, #0x18]
|
||||
str r2, [r4, #8]
|
||||
ldr r2, [sp, #0x10]
|
||||
str r2, [r4, #0xc]
|
||||
ldr r2, [sp, #4]
|
||||
str r2, [r4, #0x10]
|
||||
ldr r2, [sp, #0x1c]
|
||||
str r2, [r4, #0x14]
|
||||
ldr r2, [sp, #0x14]
|
||||
str r2, [r4, #0x18]
|
||||
ldr r2, [sp, #8]
|
||||
str r2, [r4, #0x1c]
|
||||
ldr r2, [sp, #0x20]
|
||||
str r2, [r4, #0x20]
|
||||
bl VEC_DotProduct
|
||||
rsb r0, r0, #0
|
||||
str r0, [r4, #0x24]
|
||||
mov r0, r6
|
||||
add r1, sp, #0
|
||||
bl VEC_DotProduct
|
||||
rsb r0, r0, #0
|
||||
str r0, [r4, #0x28]
|
||||
mov r0, r6
|
||||
add r1, sp, #0x18
|
||||
bl VEC_DotProduct
|
||||
rsb r0, r0, #0
|
||||
str r0, [r4, #0x2c]
|
||||
add sp, sp, #0x24
|
||||
ldmia sp!, {r3, r4, r5, r6, pc}
|
||||
arm_func_end MTX_LookAt
|
||||
|
||||
arm_func_start MTX_OrthoW
|
||||
MTX_OrthoW: ; 0x02075930
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
|
||||
sub sp, sp, #8
|
||||
str r2, [sp]
|
||||
mov sl, r0
|
||||
ldr r0, [sp]
|
||||
mov r2, r3
|
||||
sub r0, r2, r0
|
||||
ldr r8, [sp, #0x3c]
|
||||
str r3, [sp, #4]
|
||||
mov fp, r1
|
||||
ldr sb, [sp, #0x38]
|
||||
bl FX_InvAsync
|
||||
mov r0, #0
|
||||
str r0, [r8, #4]
|
||||
str r0, [r8, #8]
|
||||
str r0, [r8, #0xc]
|
||||
str r0, [r8, #0x10]
|
||||
str r0, [r8, #0x18]
|
||||
str r0, [r8, #0x1c]
|
||||
str r0, [r8, #0x20]
|
||||
str r0, [r8, #0x24]
|
||||
str r0, [r8, #0x2c]
|
||||
str sb, [r8, #0x3c]
|
||||
bl FX_GetDivResultFx64c
|
||||
mov r6, r1
|
||||
mov r4, r0
|
||||
ldr r1, _02075B34 ; =0x04000290
|
||||
mov r3, #0
|
||||
mov r2, #0x1000
|
||||
str r3, [r1]
|
||||
sub r0, sl, fp
|
||||
str r2, [r1, #4]
|
||||
str r0, [r1, #8]
|
||||
mov r0, r3
|
||||
cmp sb, #0x1000
|
||||
str r0, [r1, #0xc]
|
||||
beq _020759E0
|
||||
mov r5, sb, asr #0x1f
|
||||
umull r0, r1, r4, sb
|
||||
mla r1, r4, r5, r1
|
||||
mla r1, r6, sb, r1
|
||||
bl _ll_sdiv
|
||||
mov r4, r0
|
||||
mov r6, r1
|
||||
_020759E0:
|
||||
mov r1, r6, lsl #0xd
|
||||
mov r0, #0x80000000
|
||||
orr r1, r1, r4, lsr #19
|
||||
adds r0, r0, r4, lsl #13
|
||||
adc r0, r1, #0
|
||||
str r0, [r8]
|
||||
bl FX_GetDivResultFx64c
|
||||
mov r5, r0
|
||||
mov r7, r1
|
||||
mov r3, #0
|
||||
ldr ip, _02075B34 ; =0x04000290
|
||||
ldr r1, [sp, #0x30]
|
||||
ldr r0, [sp, #0x34]
|
||||
str r3, [ip]
|
||||
mov r2, #0x1000
|
||||
str r2, [ip, #4]
|
||||
sub r0, r1, r0
|
||||
mov lr, r3
|
||||
str r0, [ip, #8]
|
||||
cmp sb, #0x1000
|
||||
str lr, [ip, #0xc]
|
||||
beq _02075A54
|
||||
mov ip, sb, asr #0x1f
|
||||
umull r0, r1, r5, sb
|
||||
mla r1, r5, ip, r1
|
||||
mla r1, r7, sb, r1
|
||||
bl _ll_sdiv
|
||||
mov r5, r0
|
||||
mov r7, r1
|
||||
_02075A54:
|
||||
mov r1, r7, lsl #0xd
|
||||
mov r0, #0x80000000
|
||||
orr r1, r1, r5, lsr #19
|
||||
adds r0, r0, r5, lsl #13
|
||||
adc r0, r1, #0
|
||||
str r0, [r8, #0x14]
|
||||
bl FX_GetDivResultFx64c
|
||||
cmp sb, #0x1000
|
||||
beq _02075A9C
|
||||
mov r2, sb, asr #0x1f
|
||||
umull ip, r3, r0, sb
|
||||
mla r3, r0, r2, r3
|
||||
mla r3, r1, sb, r3
|
||||
mov r0, ip
|
||||
mov r1, r3
|
||||
mov r2, #0x1000
|
||||
mov r3, #0
|
||||
bl _ll_sdiv
|
||||
_02075A9C:
|
||||
ldr r3, [sp, #4]
|
||||
ldr r2, [sp]
|
||||
add r2, r3, r2
|
||||
rsb ip, r2, #0
|
||||
add r2, sl, fp
|
||||
rsb r3, r2, #0
|
||||
ldr sl, [sp, #0x34]
|
||||
ldr r2, [sp, #0x30]
|
||||
mov sb, ip, asr #0x1f
|
||||
add r2, sl, r2
|
||||
umull fp, sl, r4, ip
|
||||
mla sl, r4, sb, sl
|
||||
mov r4, #0x80000000
|
||||
mla sl, r6, ip, sl
|
||||
adds r4, r4, r0, lsl #13
|
||||
mov sb, r1, lsl #0xd
|
||||
mov r6, r3, asr #0x1f
|
||||
umull ip, r4, r5, r3
|
||||
mla r4, r5, r6, r4
|
||||
orr sb, sb, r0, lsr #19
|
||||
mla r4, r7, r3, r4
|
||||
adc r3, sb, #0
|
||||
str r3, [r8, #0x28]
|
||||
adds r3, fp, #0x80000000
|
||||
adc r7, sl, #0
|
||||
adds r3, ip, #0x80000000
|
||||
mov r3, r2, asr #0x1f
|
||||
umull r6, r5, r0, r2
|
||||
mla r5, r0, r3, r5
|
||||
adc r3, r4, #0
|
||||
str r7, [r8, #0x30]
|
||||
mla r5, r1, r2, r5
|
||||
adds r0, r6, #0x80000000
|
||||
str r3, [r8, #0x34]
|
||||
adc r0, r5, #0
|
||||
str r0, [r8, #0x38]
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
.align 2, 0
|
||||
_02075B34: .word 0x04000290
|
||||
arm_func_end MTX_OrthoW
|
||||
|
||||
320
lib/NitroSDK/asm/os_alarm.s
Normal file
320
lib/NitroSDK/asm/os_alarm.s
Normal file
@@ -0,0 +1,320 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/os_timer.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start OSi_SetTimer
|
||||
OSi_SetTimer: ; 0x0207AF64
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
mov r4, r0
|
||||
bl OS_GetTick
|
||||
ldr r3, _0207AFE0 ; =0x04000106
|
||||
mov r2, #0
|
||||
strh r2, [r3]
|
||||
ldr ip, [r4, #0xc]
|
||||
ldr r3, [r4, #0x10]
|
||||
subs r5, ip, r0
|
||||
sbc r4, r3, r1
|
||||
ldr r1, _0207AFE4 ; =OSi_AlarmHandler
|
||||
mov r0, #1
|
||||
bl sub_02078BF4
|
||||
subs r0, r5, #0
|
||||
mov r3, #0
|
||||
sbcs r0, r4, #0
|
||||
ldrlt r3, _0207AFE8 ; =0x0000FFFE
|
||||
blt _0207AFC4
|
||||
subs r0, r5, #0x10000
|
||||
sbcs r0, r4, r3
|
||||
bge _0207AFC4
|
||||
mvn r0, r5
|
||||
mov r0, r0, lsl #0x10
|
||||
mov r3, r0, lsr #0x10
|
||||
_0207AFC4:
|
||||
ldr r2, _0207AFEC ; =0x04000104
|
||||
mov r1, #0xc1
|
||||
strh r3, [r2]
|
||||
mov r0, #0x10
|
||||
strh r1, [r2, #2]
|
||||
bl OS_EnableIrqMask
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_0207AFE0: .word 0x04000106
|
||||
_0207AFE4: .word OSi_AlarmHandler
|
||||
_0207AFE8: .word 0x0000FFFE
|
||||
_0207AFEC: .word 0x04000104
|
||||
arm_func_end OSi_SetTimer
|
||||
|
||||
arm_func_start OS_InitAlarm
|
||||
OS_InitAlarm: ; 0x0207AFF0
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r1, _0207B02C ; =OSi_UseAlarm
|
||||
ldrh r0, [r1]
|
||||
cmp r0, #0
|
||||
ldmneia sp!, {r3, pc}
|
||||
mov r0, #1
|
||||
strh r0, [r1]
|
||||
bl OSi_SetTimerReserved
|
||||
ldr r1, _0207B02C ; =OSi_UseAlarm
|
||||
mov r2, #0
|
||||
str r2, [r1, #4]
|
||||
mov r0, #0x10
|
||||
str r2, [r1, #8]
|
||||
bl OS_DisableIrqMask
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207B02C: .word OSi_UseAlarm
|
||||
arm_func_end OS_InitAlarm
|
||||
|
||||
arm_func_start OS_IsAlarmAvailable
|
||||
OS_IsAlarmAvailable: ; 0x0207B030
|
||||
ldr r0, _0207B03C ; =OSi_UseAlarm
|
||||
ldrh r0, [r0]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207B03C: .word OSi_UseAlarm
|
||||
arm_func_end OS_IsAlarmAvailable
|
||||
|
||||
arm_func_start OS_CreateAlarm
|
||||
OS_CreateAlarm: ; 0x0207B040
|
||||
mov r1, #0
|
||||
str r1, [r0]
|
||||
str r1, [r0, #8]
|
||||
bx lr
|
||||
arm_func_end OS_CreateAlarm
|
||||
|
||||
arm_func_start OS_InsertAlarm
|
||||
OS_InsertAlarm: ; 0x0207B050
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||||
mov r8, r0
|
||||
ldr r0, [r8, #0x20]
|
||||
ldr r3, [r8, #0x1c]
|
||||
cmp r0, #0
|
||||
mov r7, r1
|
||||
mov r6, r2
|
||||
cmpeq r3, #0
|
||||
beq _0207B0C4
|
||||
bl OS_GetTick
|
||||
ldr r6, [r8, #0x28]
|
||||
ldr r7, [r8, #0x24]
|
||||
cmp r6, r1
|
||||
cmpeq r7, r0
|
||||
bhs _0207B0C4
|
||||
ldr r5, [r8, #0x1c]
|
||||
ldr r4, [r8, #0x20]
|
||||
subs r0, r0, r7
|
||||
mov r2, r5
|
||||
mov r3, r4
|
||||
sbc r1, r1, r6
|
||||
bl _ll_udiv
|
||||
adds r2, r0, #1
|
||||
adc r0, r1, #0
|
||||
umull r3, r1, r5, r2
|
||||
mla r1, r5, r0, r1
|
||||
mla r1, r4, r2, r1
|
||||
adds r7, r7, r3
|
||||
adc r6, r6, r1
|
||||
_0207B0C4:
|
||||
str r7, [r8, #0xc]
|
||||
ldr r0, _0207B178 ; =OSi_UseAlarm
|
||||
str r6, [r8, #0x10]
|
||||
ldr r5, [r0, #4]
|
||||
cmp r5, #0
|
||||
beq _0207B140
|
||||
mov r2, #0
|
||||
mov r1, r2
|
||||
_0207B0E4:
|
||||
ldr r3, [r5, #0xc]
|
||||
ldr r0, [r5, #0x10]
|
||||
subs r4, r7, r3
|
||||
sbc r3, r6, r0
|
||||
subs r0, r4, r1
|
||||
sbcs r0, r3, r2
|
||||
bge _0207B134
|
||||
ldr r0, [r5, #0x14]
|
||||
str r0, [r8, #0x14]
|
||||
str r8, [r5, #0x14]
|
||||
str r5, [r8, #0x18]
|
||||
ldr r0, [r8, #0x14]
|
||||
cmp r0, #0
|
||||
strne r8, [r0, #0x18]
|
||||
ldmneia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
ldr r1, _0207B178 ; =OSi_UseAlarm
|
||||
mov r0, r8
|
||||
str r8, [r1, #4]
|
||||
bl OSi_SetTimer
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
_0207B134:
|
||||
ldr r5, [r5, #0x18]
|
||||
cmp r5, #0
|
||||
bne _0207B0E4
|
||||
_0207B140:
|
||||
ldr r1, _0207B178 ; =OSi_UseAlarm
|
||||
mov r0, #0
|
||||
str r0, [r8, #0x18]
|
||||
ldr r0, [r1, #8]
|
||||
str r8, [r1, #8]
|
||||
str r0, [r8, #0x14]
|
||||
cmp r0, #0
|
||||
strne r8, [r0, #0x18]
|
||||
ldmneia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
str r8, [r1, #8]
|
||||
mov r0, r8
|
||||
str r8, [r1, #4]
|
||||
bl OSi_SetTimer
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
.align 2, 0
|
||||
_0207B178: .word OSi_UseAlarm
|
||||
arm_func_end OS_InsertAlarm
|
||||
|
||||
arm_func_start OS_SetAlarm
|
||||
OS_SetAlarm: ; 0x0207B17C
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
movs r6, r0
|
||||
mov r5, r1
|
||||
mov r4, r2
|
||||
mov r7, r3
|
||||
beq _0207B1A0
|
||||
ldr r0, [r6]
|
||||
cmp r0, #0
|
||||
beq _0207B1A4
|
||||
_0207B1A0:
|
||||
bl WaitForever2
|
||||
_0207B1A4:
|
||||
bl EnableIrqFlag
|
||||
mov r1, #0
|
||||
str r1, [r6, #0x1c]
|
||||
str r1, [r6, #0x20]
|
||||
str r7, [r6]
|
||||
ldr r1, [sp, #0x18]
|
||||
mov r7, r0
|
||||
str r1, [r6, #4]
|
||||
bl OS_GetTick
|
||||
adds r3, r5, r0
|
||||
adc r2, r4, r1
|
||||
mov r0, r6
|
||||
mov r1, r3
|
||||
bl OS_InsertAlarm
|
||||
mov r0, r7
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
arm_func_end OS_SetAlarm
|
||||
|
||||
arm_func_start sub_0207B1E8
|
||||
sub_0207B1E8: ; 0x0207B1E8
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
mov r5, r0
|
||||
bl EnableIrqFlag
|
||||
ldr r1, [r5]
|
||||
mov r4, r0
|
||||
cmp r1, #0
|
||||
bne _0207B20C
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
_0207B20C:
|
||||
ldr r0, [r5, #0x18]
|
||||
cmp r0, #0
|
||||
ldrne r1, [r5, #0x14]
|
||||
strne r1, [r0, #0x14]
|
||||
bne _0207B22C
|
||||
ldr r2, [r5, #0x14]
|
||||
ldr r1, _0207B26C ; =OSi_UseAlarm
|
||||
str r2, [r1, #8]
|
||||
_0207B22C:
|
||||
ldr r1, [r5, #0x14]
|
||||
cmp r1, #0
|
||||
strne r0, [r1, #0x18]
|
||||
bne _0207B250
|
||||
ldr r1, _0207B26C ; =OSi_UseAlarm
|
||||
cmp r0, #0
|
||||
str r0, [r1, #4]
|
||||
beq _0207B250
|
||||
bl OSi_SetTimer
|
||||
_0207B250:
|
||||
mov r1, #0
|
||||
str r1, [r5]
|
||||
str r1, [r5, #0x1c]
|
||||
mov r0, r4
|
||||
str r1, [r5, #0x20]
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_0207B26C: .word OSi_UseAlarm
|
||||
arm_func_end sub_0207B1E8
|
||||
|
||||
arm_func_start OSi_AlarmHandler
|
||||
OSi_AlarmHandler: ; 0x0207B270
|
||||
stmdb sp!, {r0, lr}
|
||||
bl OSi_ArrangeTimer
|
||||
ldmia sp!, {r0, lr}
|
||||
bx lr
|
||||
arm_func_end OSi_AlarmHandler
|
||||
|
||||
arm_func_start OSi_ArrangeTimer
|
||||
OSi_ArrangeTimer: ; 0x0207B280
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr r1, _0207B364 ; =0x04000106
|
||||
mov r2, #0
|
||||
mov r0, #0x10
|
||||
strh r2, [r1]
|
||||
bl OS_DisableIrqMask
|
||||
ldr r0, _0207B368 ; =OS_IRQTable
|
||||
add r0, r0, #0x3000
|
||||
ldr r1, [r0, #0xff8]
|
||||
orr r1, r1, #0x10
|
||||
str r1, [r0, #0xff8]
|
||||
bl OS_GetTick
|
||||
ldr r2, _0207B36C ; =OSi_UseAlarm
|
||||
ldr r4, [r2, #4]
|
||||
cmp r4, #0
|
||||
ldmeqia sp!, {r3, r4, r5, pc}
|
||||
ldr r3, [r4, #0x10]
|
||||
ldr ip, [r4, #0xc]
|
||||
cmp r1, r3
|
||||
cmpeq r0, ip
|
||||
bhs _0207B2E0
|
||||
mov r0, r4
|
||||
bl OSi_SetTimer
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
_0207B2E0:
|
||||
ldr r1, [r4, #0x18]
|
||||
mov r0, #0
|
||||
str r1, [r2, #4]
|
||||
cmp r1, #0
|
||||
streq r0, [r2, #8]
|
||||
strne r0, [r1, #0x14]
|
||||
ldr r0, [r4, #0x20]
|
||||
ldr r1, [r4, #0x1c]
|
||||
cmp r0, #0
|
||||
ldr r5, [r4]
|
||||
mov r0, #0
|
||||
cmpeq r1, #0
|
||||
streq r0, [r4]
|
||||
cmp r5, #0
|
||||
beq _0207B324
|
||||
ldr r0, [r4, #4]
|
||||
blx r5
|
||||
_0207B324:
|
||||
ldr r0, [r4, #0x20]
|
||||
ldr r1, [r4, #0x1c]
|
||||
cmp r0, #0
|
||||
cmpeq r1, #0
|
||||
mov r1, #0
|
||||
beq _0207B34C
|
||||
mov r0, r4
|
||||
mov r2, r1
|
||||
str r5, [r4]
|
||||
bl OS_InsertAlarm
|
||||
_0207B34C:
|
||||
ldr r0, _0207B36C ; =OSi_UseAlarm
|
||||
ldr r0, [r0, #4]
|
||||
cmp r0, #0
|
||||
ldmeqia sp!, {r3, r4, r5, pc}
|
||||
bl OSi_SetTimer
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_0207B364: .word 0x04000106
|
||||
_0207B368: .word OS_IRQTable
|
||||
_0207B36C: .word OSi_UseAlarm
|
||||
arm_func_end OSi_ArrangeTimer
|
||||
|
||||
|
||||
569
lib/NitroSDK/asm/os_arena.s
Normal file
569
lib/NitroSDK/asm/os_arena.s
Normal file
@@ -0,0 +1,569 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/os_arena.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start OS_InitArena
|
||||
OS_InitArena: ; 0x0207A3B4
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r1, _0207A4B4 ; =_022B98C4
|
||||
ldr r0, [r1]
|
||||
cmp r0, #0
|
||||
ldmneia sp!, {r3, pc}
|
||||
mov r2, #1
|
||||
mov r0, #0
|
||||
str r2, [r1]
|
||||
bl OS_GetInitArenaHi
|
||||
mov r1, r0
|
||||
mov r0, #0
|
||||
bl OS_SetArenaHi
|
||||
mov r0, #0
|
||||
bl OS_GetInitArenaLo
|
||||
mov r1, r0
|
||||
mov r0, #0
|
||||
bl OS_SetArenaLo
|
||||
mov r0, #2
|
||||
mov r1, #0
|
||||
bl OS_SetArenaLo
|
||||
mov r0, #2
|
||||
mov r1, #0
|
||||
bl OS_SetArenaHi
|
||||
mov r0, #3
|
||||
bl OS_GetInitArenaHi
|
||||
mov r1, r0
|
||||
mov r0, #3
|
||||
bl OS_SetArenaHi
|
||||
mov r0, #3
|
||||
bl OS_GetInitArenaLo
|
||||
mov r1, r0
|
||||
mov r0, #3
|
||||
bl OS_SetArenaLo
|
||||
mov r0, #4
|
||||
bl OS_GetInitArenaHi
|
||||
mov r1, r0
|
||||
mov r0, #4
|
||||
bl OS_SetArenaHi
|
||||
mov r0, #4
|
||||
bl OS_GetInitArenaLo
|
||||
mov r1, r0
|
||||
mov r0, #4
|
||||
bl OS_SetArenaLo
|
||||
mov r0, #5
|
||||
bl OS_GetInitArenaHi
|
||||
mov r1, r0
|
||||
mov r0, #5
|
||||
bl OS_SetArenaHi
|
||||
mov r0, #5
|
||||
bl OS_GetInitArenaLo
|
||||
mov r1, r0
|
||||
mov r0, #5
|
||||
bl OS_SetArenaLo
|
||||
mov r0, #6
|
||||
bl OS_GetInitArenaHi
|
||||
mov r1, r0
|
||||
mov r0, #6
|
||||
bl OS_SetArenaHi
|
||||
mov r0, #6
|
||||
bl OS_GetInitArenaLo
|
||||
mov r1, r0
|
||||
mov r0, #6
|
||||
bl OS_SetArenaLo
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207A4B4: .word _022B98C4
|
||||
arm_func_end OS_InitArena
|
||||
|
||||
arm_func_start OS_InitArenaEx
|
||||
OS_InitArenaEx: ; 0x0207A4B8
|
||||
stmdb sp!, {r3, lr}
|
||||
mov r0, #2
|
||||
bl OS_GetInitArenaHi
|
||||
mov r1, r0
|
||||
mov r0, #2
|
||||
bl OS_SetArenaHi
|
||||
mov r0, #2
|
||||
bl OS_GetInitArenaLo
|
||||
mov r1, r0
|
||||
mov r0, #2
|
||||
bl OS_SetArenaLo
|
||||
ldr r0, _0207A518 ; =_022B98C4
|
||||
ldr r0, [r0, #4]
|
||||
cmp r0, #0
|
||||
beq _0207A504
|
||||
bl sub_02079DA0
|
||||
and r0, r0, #3
|
||||
cmp r0, #1
|
||||
ldmneia sp!, {r3, pc}
|
||||
_0207A504:
|
||||
ldr r0, _0207A51C ; =_0200002B
|
||||
bl OS_SetProtectionRegion1
|
||||
ldr r0, _0207A520 ; =0x023E0021
|
||||
bl OS_SetProtectionRegion2
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207A518: .word _022B98C4
|
||||
_0207A51C: .word _0200002B
|
||||
_0207A520: .word 0x023E0021
|
||||
arm_func_end OS_InitArenaEx
|
||||
|
||||
arm_func_start sub_0207A524
|
||||
sub_0207A524: ; 0x0207A524
|
||||
mov r0, r0, lsl #2
|
||||
add r0, r0, #0x2700000
|
||||
add r0, r0, #0xff000
|
||||
ldr r0, [r0, #0xdc4]
|
||||
bx lr
|
||||
arm_func_end sub_0207A524
|
||||
|
||||
arm_func_start sub_0207A538
|
||||
sub_0207A538: ; 0x0207A538
|
||||
mov r0, r0, lsl #2
|
||||
add r0, r0, #0x2700000
|
||||
add r0, r0, #0xff000
|
||||
ldr r0, [r0, #0xda0]
|
||||
bx lr
|
||||
arm_func_end sub_0207A538
|
||||
|
||||
arm_func_start OS_GetInitArenaHi
|
||||
OS_GetInitArenaHi: ; 0x0207A54C
|
||||
stmdb sp!, {r3, lr}
|
||||
cmp r0, #6
|
||||
addls pc, pc, r0, lsl #2
|
||||
b _0207A608
|
||||
_0207A55C: ; jump table
|
||||
b _0207A578 ; case 0
|
||||
b _0207A608 ; case 1
|
||||
b _0207A580 ; case 2
|
||||
b _0207A5B0 ; case 3
|
||||
b _0207A5B8 ; case 4
|
||||
b _0207A5F8 ; case 5
|
||||
b _0207A600 ; case 6
|
||||
_0207A578:
|
||||
ldr r0, _0207A610 ; =SDK_SECTION_ARENA_EX_START
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A580:
|
||||
ldr r0, _0207A614 ; =_022B98C4
|
||||
ldr r0, [r0, #4]
|
||||
cmp r0, #0
|
||||
beq _0207A5A0
|
||||
bl sub_02079DA0
|
||||
and r0, r0, #3
|
||||
cmp r0, #1
|
||||
bne _0207A5A8
|
||||
_0207A5A0:
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A5A8:
|
||||
mov r0, #0x2700000
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A5B0:
|
||||
mov r0, #0x2000000
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A5B8:
|
||||
ldr r0, _0207A618 ; =OS_IRQTable
|
||||
ldr r1, _0207A61C ; =0x00000000
|
||||
ldr r2, _0207A620 ; =0x00000800
|
||||
add r3, r0, #0x3f80
|
||||
cmp r1, #0
|
||||
sub r2, r3, r2
|
||||
bne _0207A5E4
|
||||
ldr r1, _0207A624 ; =SDK_SECTION_ARENA_DTCM_START
|
||||
cmp r0, r1
|
||||
movlo r0, r1
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A5E4:
|
||||
cmp r1, #0
|
||||
ldrlt r0, _0207A624 ; =SDK_SECTION_ARENA_DTCM_START
|
||||
sublt r0, r0, r1
|
||||
subge r0, r2, r1
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A5F8:
|
||||
ldr r0, _0207A628 ; =0x027FF680
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A600:
|
||||
ldr r0, _0207A62C ; =0x037F8000
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A608:
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207A610: .word SDK_SECTION_ARENA_EX_START
|
||||
_0207A614: .word _022B98C4
|
||||
_0207A618: .word OS_IRQTable
|
||||
_0207A61C: .word 0x00000000
|
||||
_0207A620: .word 0x00000800
|
||||
_0207A624: .word SDK_SECTION_ARENA_DTCM_START
|
||||
_0207A628: .word 0x027FF680
|
||||
_0207A62C: .word 0x037F8000
|
||||
arm_func_end OS_GetInitArenaHi
|
||||
|
||||
arm_func_start OS_GetInitArenaLo
|
||||
OS_GetInitArenaLo: ; 0x0207A630
|
||||
stmdb sp!, {r3, lr}
|
||||
cmp r0, #6
|
||||
addls pc, pc, r0, lsl #2
|
||||
b _0207A6B4
|
||||
_0207A640: ; jump table
|
||||
b _0207A65C ; case 0
|
||||
b _0207A6B4 ; case 1
|
||||
b _0207A664 ; case 2
|
||||
b _0207A694 ; case 3
|
||||
b _0207A69C ; case 4
|
||||
b _0207A6A4 ; case 5
|
||||
b _0207A6AC ; case 6
|
||||
_0207A65C:
|
||||
ldr r0, _0207A6BC ; =SDK_MAIN_ARENA_LO
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A664:
|
||||
ldr r0, _0207A6C0 ; =_022B98C4
|
||||
ldr r0, [r0, #4]
|
||||
cmp r0, #0
|
||||
beq _0207A684
|
||||
bl sub_02079DA0
|
||||
and r0, r0, #3
|
||||
cmp r0, #1
|
||||
bne _0207A68C
|
||||
_0207A684:
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A68C:
|
||||
ldr r0, _0207A6C4 ; =SDK_SECTION_ARENA_EX_START
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A694:
|
||||
ldr r0, _0207A6C8 ; =SDK_SECTION_ARENA_ITCM_START
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A69C:
|
||||
ldr r0, _0207A6CC ; =SDK_SECTION_ARENA_DTCM_START
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A6A4:
|
||||
ldr r0, _0207A6D0 ; =0x027FF000
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A6AC:
|
||||
ldr r0, _0207A6D4 ; =0x037F8000
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A6B4:
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207A6BC: .word SDK_MAIN_ARENA_LO
|
||||
_0207A6C0: .word _022B98C4
|
||||
_0207A6C4: .word SDK_SECTION_ARENA_EX_START
|
||||
_0207A6C8: .word SDK_SECTION_ARENA_ITCM_START
|
||||
_0207A6CC: .word SDK_SECTION_ARENA_DTCM_START
|
||||
_0207A6D0: .word 0x027FF000
|
||||
_0207A6D4: .word 0x037F8000
|
||||
arm_func_end OS_GetInitArenaLo
|
||||
|
||||
arm_func_start OS_SetArenaHi
|
||||
OS_SetArenaHi: ; 0x0207A6D8
|
||||
mov r0, r0, lsl #2
|
||||
add r0, r0, #0x2700000
|
||||
add r0, r0, #0xff000
|
||||
str r1, [r0, #0xdc4]
|
||||
bx lr
|
||||
arm_func_end OS_SetArenaHi
|
||||
|
||||
arm_func_start OS_SetArenaLo
|
||||
OS_SetArenaLo: ; 0x0207A6EC
|
||||
mov r0, r0, lsl #2
|
||||
add r0, r0, #0x2700000
|
||||
add r0, r0, #0xff000
|
||||
str r1, [r0, #0xda0]
|
||||
bx lr
|
||||
arm_func_end OS_SetArenaLo
|
||||
|
||||
arm_func_start sub_0207A700
|
||||
sub_0207A700: ; 0x0207A700
|
||||
str r0, [r1, #4]
|
||||
mov r2, #0
|
||||
str r2, [r1]
|
||||
cmp r0, #0
|
||||
strne r1, [r0]
|
||||
mov r0, r1
|
||||
bx lr
|
||||
arm_func_end sub_0207A700
|
||||
|
||||
arm_func_start sub_0207A71C
|
||||
sub_0207A71C: ; 0x0207A71C
|
||||
ldr r3, [r1, #4]
|
||||
cmp r3, #0
|
||||
ldrne r2, [r1]
|
||||
strne r2, [r3]
|
||||
ldr r2, [r1]
|
||||
cmp r2, #0
|
||||
ldreq r0, [r1, #4]
|
||||
ldrne r1, [r1, #4]
|
||||
strne r1, [r2, #4]
|
||||
bx lr
|
||||
arm_func_end sub_0207A71C
|
||||
|
||||
arm_func_start sub_0207A744
|
||||
sub_0207A744: ; 0x0207A744
|
||||
stmdb sp!, {r3, lr}
|
||||
mov lr, r0
|
||||
cmp r0, #0
|
||||
mov ip, #0
|
||||
beq _0207A770
|
||||
_0207A758:
|
||||
cmp r1, lr
|
||||
bls _0207A770
|
||||
mov ip, lr
|
||||
ldr lr, [lr, #4]
|
||||
cmp lr, #0
|
||||
bne _0207A758
|
||||
_0207A770:
|
||||
stmia r1, {ip, lr}
|
||||
cmp lr, #0
|
||||
beq _0207A7AC
|
||||
str r1, [lr]
|
||||
ldr r3, [r1, #8]
|
||||
add r2, r1, r3
|
||||
cmp r2, lr
|
||||
bne _0207A7AC
|
||||
ldr r2, [lr, #8]
|
||||
add r2, r3, r2
|
||||
str r2, [r1, #8]
|
||||
ldr lr, [lr, #4]
|
||||
str lr, [r1, #4]
|
||||
cmp lr, #0
|
||||
strne r1, [lr]
|
||||
_0207A7AC:
|
||||
cmp ip, #0
|
||||
beq _0207A7E4
|
||||
str r1, [ip, #4]
|
||||
ldr r2, [ip, #8]
|
||||
add r3, ip, r2
|
||||
cmp r3, r1
|
||||
ldmneia sp!, {r3, pc}
|
||||
ldr r1, [r1, #8]
|
||||
cmp lr, #0
|
||||
add r1, r2, r1
|
||||
str r1, [ip, #8]
|
||||
str lr, [ip, #4]
|
||||
strne ip, [lr]
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A7E4:
|
||||
mov r0, r1
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end sub_0207A744
|
||||
|
||||
arm_func_start sub_0207A7EC
|
||||
sub_0207A7EC: ; 0x0207A7EC
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
mov r4, r0
|
||||
mov r5, r1
|
||||
mov r7, r2
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _0207A8F0 ; =_022B98CC
|
||||
mov r6, r0
|
||||
ldr r1, [r1, r4, lsl #2]
|
||||
cmp r1, #0
|
||||
bne _0207A820
|
||||
bl SetIrqFlag
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
_0207A820:
|
||||
cmp r5, #0
|
||||
ldrlt r5, [r1]
|
||||
ldr r1, [r1, #0x10]
|
||||
mov r0, #0xc
|
||||
mla r4, r5, r0, r1
|
||||
ldr r0, [r4, #4]
|
||||
add r1, r7, #0x3f
|
||||
mov r5, r0
|
||||
cmp r0, #0
|
||||
bic r7, r1, #0x1f
|
||||
beq _0207A864
|
||||
_0207A84C:
|
||||
ldr r1, [r5, #8]
|
||||
cmp r7, r1
|
||||
ble _0207A864
|
||||
ldr r5, [r5, #4]
|
||||
cmp r5, #0
|
||||
bne _0207A84C
|
||||
_0207A864:
|
||||
cmp r5, #0
|
||||
bne _0207A87C
|
||||
mov r0, r6
|
||||
bl SetIrqFlag
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
_0207A87C:
|
||||
ldr r1, [r5, #8]
|
||||
sub r1, r1, r7
|
||||
cmp r1, #0x40
|
||||
bhs _0207A89C
|
||||
mov r1, r5
|
||||
bl sub_0207A71C
|
||||
str r0, [r4, #4]
|
||||
b _0207A8D0
|
||||
_0207A89C:
|
||||
str r7, [r5, #8]
|
||||
add r2, r5, r7
|
||||
str r1, [r2, #8]
|
||||
ldr r0, [r5]
|
||||
str r0, [r5, r7]
|
||||
ldr r0, [r5, #4]
|
||||
str r0, [r2, #4]
|
||||
cmp r0, #0
|
||||
strne r2, [r0]
|
||||
ldr r0, [r2]
|
||||
cmp r0, #0
|
||||
strne r2, [r0, #4]
|
||||
streq r2, [r4, #4]
|
||||
_0207A8D0:
|
||||
ldr r0, [r4, #8]
|
||||
mov r1, r5
|
||||
bl sub_0207A700
|
||||
str r0, [r4, #8]
|
||||
mov r0, r6
|
||||
bl SetIrqFlag
|
||||
add r0, r5, #0x20
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_0207A8F0: .word _022B98CC
|
||||
arm_func_end sub_0207A7EC
|
||||
|
||||
arm_func_start sub_0207A8F4
|
||||
sub_0207A8F4: ; 0x0207A8F4
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
mov r7, r0
|
||||
mov r6, r1
|
||||
mov r5, r2
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _0207A958 ; =_022B98CC
|
||||
mov r4, r0
|
||||
ldr r0, [r1, r7, lsl #2]
|
||||
cmp r6, #0
|
||||
ldrlt r6, [r0]
|
||||
ldr r1, [r0, #0x10]
|
||||
mov r0, #0xc
|
||||
mla r7, r6, r0, r1
|
||||
sub r5, r5, #0x20
|
||||
ldr r0, [r7, #8]
|
||||
mov r1, r5
|
||||
bl sub_0207A71C
|
||||
str r0, [r7, #8]
|
||||
ldr r0, [r7, #4]
|
||||
mov r1, r5
|
||||
bl sub_0207A744
|
||||
str r0, [r7, #4]
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_0207A958: .word _022B98CC
|
||||
arm_func_end sub_0207A8F4
|
||||
|
||||
arm_func_start sub_0207A95C
|
||||
sub_0207A95C: ; 0x0207A95C
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
mov r4, r0
|
||||
mov r5, r1
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _0207A988 ; =_022B98CC
|
||||
ldr r1, [r1, r4, lsl #2]
|
||||
ldr r4, [r1]
|
||||
str r5, [r1]
|
||||
bl SetIrqFlag
|
||||
mov r0, r4
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_0207A988: .word _022B98CC
|
||||
arm_func_end sub_0207A95C
|
||||
|
||||
arm_func_start sub_0207A98C
|
||||
sub_0207A98C: ; 0x0207A98C
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
mov r7, r0
|
||||
mov r5, r1
|
||||
mov r4, r2
|
||||
mov r6, r3
|
||||
bl EnableIrqFlag
|
||||
ldr r2, _0207AA30 ; =_022B98CC
|
||||
mov r1, #0xc
|
||||
str r5, [r2, r7, lsl #2]
|
||||
add r2, r5, #0x14
|
||||
str r2, [r5, #0x10]
|
||||
mul r1, r6, r1
|
||||
str r6, [r5, #4]
|
||||
cmp r6, #0
|
||||
mov lr, #0
|
||||
ble _0207AA00
|
||||
mov r6, lr
|
||||
mvn ip, #0
|
||||
mov r3, lr
|
||||
_0207A9D8:
|
||||
ldr r2, [r5, #0x10]
|
||||
add lr, lr, #1
|
||||
str ip, [r2, r6]
|
||||
add r2, r2, r6
|
||||
str r3, [r2, #8]
|
||||
str r3, [r2, #4]
|
||||
ldr r2, [r5, #4]
|
||||
add r6, r6, #0xc
|
||||
cmp lr, r2
|
||||
blt _0207A9D8
|
||||
_0207AA00:
|
||||
mvn r2, #0
|
||||
str r2, [r5]
|
||||
ldr r3, [r5, #0x10]
|
||||
bic r2, r4, #0x1f
|
||||
add r1, r3, r1
|
||||
add r1, r1, #0x1f
|
||||
bic r1, r1, #0x1f
|
||||
str r1, [r5, #8]
|
||||
str r2, [r5, #0xc]
|
||||
bl SetIrqFlag
|
||||
ldr r0, [r5, #8]
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_0207AA30: .word _022B98CC
|
||||
arm_func_end sub_0207A98C
|
||||
|
||||
arm_func_start sub_0207AA34
|
||||
sub_0207AA34: ; 0x0207AA34
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r4, r0
|
||||
mov r6, r1
|
||||
mov r5, r2
|
||||
bl EnableIrqFlag
|
||||
ldr r2, _0207AAC8 ; =_022B98CC
|
||||
add r1, r6, #0x1f
|
||||
ldr r2, [r2, r4, lsl #2]
|
||||
bic r6, r1, #0x1f
|
||||
ldr ip, [r2, #4]
|
||||
bic r5, r5, #0x1f
|
||||
cmp ip, #0
|
||||
mov r4, #0
|
||||
ble _0207AABC
|
||||
ldr r3, [r2, #0x10]
|
||||
_0207AA70:
|
||||
ldr r1, [r3]
|
||||
cmp r1, #0
|
||||
bge _0207AAAC
|
||||
sub r1, r5, r6
|
||||
str r1, [r3]
|
||||
mov r2, #0
|
||||
str r2, [r6]
|
||||
str r2, [r6, #4]
|
||||
ldr r1, [r3]
|
||||
str r1, [r6, #8]
|
||||
str r6, [r3, #4]
|
||||
str r2, [r3, #8]
|
||||
bl SetIrqFlag
|
||||
mov r0, r4
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_0207AAAC:
|
||||
add r4, r4, #1
|
||||
cmp r4, ip
|
||||
add r3, r3, #0xc
|
||||
blt _0207AA70
|
||||
_0207AABC:
|
||||
bl SetIrqFlag
|
||||
mvn r0, #0
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_0207AAC8: .word _022B98CC
|
||||
arm_func_end sub_0207AA34
|
||||
|
||||
63
lib/NitroSDK/asm/os_entropy.s
Normal file
63
lib/NitroSDK/asm/os_entropy.s
Normal file
@@ -0,0 +1,63 @@
|
||||
.include "asm/macros.inc"
|
||||
|
||||
.text
|
||||
|
||||
.public OS_GetTickLo
|
||||
.public _022B99A8
|
||||
|
||||
arm_func_start sub_0207BB50
|
||||
sub_0207BB50: ; 0x0207BB50
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
ldr r1, _0207BC10 ; =0x04000006
|
||||
mov r5, r0
|
||||
ldrh r6, [r1]
|
||||
ldr r4, _0207BC14 ; =0x027FFC00
|
||||
bl OS_GetTickLo
|
||||
orr r0, r0, r6, lsl #16
|
||||
str r0, [r5]
|
||||
ldr r1, _0207BC18 ; =_022B99A8
|
||||
ldrh ip, [r4, #0xf8]
|
||||
ldr r3, [r1]
|
||||
ldr r2, [r1, #4]
|
||||
mov r0, r4
|
||||
eor r2, r3, ip, lsl #16
|
||||
str r2, [r5, #4]
|
||||
ldr r2, [r1]
|
||||
ldr r3, [r0, #0x3c]
|
||||
ldr r2, [r1, #4]
|
||||
ldr r1, [r4, #0xf4]
|
||||
ldr ip, _0207BC1C ; =0x04000600
|
||||
eor r1, r2, r1
|
||||
eor r2, r3, r1
|
||||
str r2, [r5, #8]
|
||||
ldr r1, [ip]
|
||||
eor r1, r2, r1
|
||||
str r1, [r5, #8]
|
||||
ldr r2, [r0, #0x1e8]
|
||||
add r1, r0, #0x300
|
||||
str r2, [r5, #0xc]
|
||||
ldr r3, [r0, #0x1ec]
|
||||
sub r2, ip, #0x4d0
|
||||
str r3, [r5, #0x10]
|
||||
ldr r3, [r0, #0x390]
|
||||
ldrh r4, [r1, #0x94]
|
||||
add r0, r0, #0x3a8
|
||||
eor r3, r3, r4, lsl #16
|
||||
str r3, [r5, #0x14]
|
||||
ldrh r4, [r1, #0xaa]
|
||||
ldrh r3, [r1, #0xac]
|
||||
orr r3, r3, r4, lsl #16
|
||||
str r3, [r5, #0x18]
|
||||
ldrh r2, [r2]
|
||||
ldrh r0, [r0]
|
||||
ldrh r1, [r1, #0x98]
|
||||
orr r0, r2, r0
|
||||
orr r0, r0, r1, lsl #16
|
||||
str r0, [r5, #0x1c]
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_0207BC10: .word 0x04000006
|
||||
_0207BC14: .word 0x027FFC00
|
||||
_0207BC18: .word _022B99A8
|
||||
_0207BC1C: .word 0x04000600
|
||||
arm_func_end sub_0207BB50
|
||||
175
lib/NitroSDK/asm/os_exception.s
Normal file
175
lib/NitroSDK/asm/os_exception.s
Normal file
@@ -0,0 +1,175 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/os_exception.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start OS_InitException
|
||||
OS_InitException: ; 0x0207AB24
|
||||
ldr r0, _0207AB84 ; =0x027FFD9C
|
||||
ldr r1, [r0]
|
||||
cmp r1, #0x2600000
|
||||
blo _0207AB44
|
||||
cmp r1, #0x2800000
|
||||
ldrlo r0, _0207AB88 ; =_022B98F0
|
||||
strlo r1, [r0]
|
||||
blo _0207AB50
|
||||
_0207AB44:
|
||||
ldr r0, _0207AB88 ; =_022B98F0
|
||||
mov r1, #0
|
||||
str r1, [r0]
|
||||
_0207AB50:
|
||||
ldr r0, _0207AB88 ; =_022B98F0
|
||||
ldr r0, [r0]
|
||||
cmp r0, #0
|
||||
bne _0207AB74
|
||||
ldr r2, _0207AB8C ; =OSi_ExceptionHandler
|
||||
ldr r1, _0207AB84 ; =0x027FFD9C
|
||||
ldr r0, _0207AB90 ; =0x027E3000
|
||||
str r2, [r1]
|
||||
str r2, [r0, #0xfdc]
|
||||
_0207AB74:
|
||||
ldr r0, _0207AB88 ; =_022B98F0
|
||||
mov r1, #0
|
||||
str r1, [r0, #8]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207AB84: .word 0x027FFD9C
|
||||
_0207AB88: .word _022B98F0
|
||||
_0207AB8C: .word OSi_ExceptionHandler
|
||||
_0207AB90: .word 0x027E3000
|
||||
arm_func_end OS_InitException
|
||||
|
||||
arm_func_start OSi_ExceptionHandler
|
||||
OSi_ExceptionHandler: ; 0x0207AB94
|
||||
ldr ip, _0207AC10 ; =_022B98F0
|
||||
ldr ip, [ip]
|
||||
cmp ip, #0
|
||||
bne _0207ABA8
|
||||
b _0207ABAC
|
||||
_0207ABA8:
|
||||
mov lr, pc
|
||||
_0207ABAC:
|
||||
bne _0207ABB4
|
||||
b _0207ABB8
|
||||
_0207ABB4:
|
||||
bx ip
|
||||
_0207ABB8:
|
||||
ldr ip, _0207AC14 ; =_02000000
|
||||
stmdb ip!, {r0, r1, r2, r3, sp, lr}
|
||||
and r0, sp, #1
|
||||
mov sp, ip
|
||||
mrs r1, cpsr
|
||||
and r1, r1, #0x1f
|
||||
teq r1, #0x17
|
||||
bne _0207ABE0
|
||||
bl OSi_GetAndDisplayContext
|
||||
b _0207ABEC
|
||||
_0207ABE0:
|
||||
teq r1, #0x1b
|
||||
bne _0207ABEC
|
||||
bl OSi_GetAndDisplayContext
|
||||
_0207ABEC:
|
||||
ldr ip, _0207AC10 ; =_022B98F0
|
||||
ldr ip, [ip]
|
||||
cmp ip, #0
|
||||
_0207ABF8:
|
||||
beq _0207ABF8
|
||||
_0207ABFC:
|
||||
mov r0, r0
|
||||
b _0207ABFC
|
||||
_0207AC04:
|
||||
ldmia sp!, {r0, r1, r2, r3, ip, lr}
|
||||
mov sp, ip
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207AC10: .word _022B98F0
|
||||
_0207AC14: .word _secure
|
||||
arm_func_end OSi_ExceptionHandler
|
||||
|
||||
arm_func_start OSi_GetAndDisplayContext
|
||||
OSi_GetAndDisplayContext: ; 0x0207AC18
|
||||
stmdb sp!, {r0, lr}
|
||||
bl OSi_SetExContext
|
||||
bl OSi_DisplayExContent
|
||||
ldmia sp!, {r0, lr}
|
||||
bx lr
|
||||
arm_func_end OSi_GetAndDisplayContext
|
||||
|
||||
arm_func_start OSi_SetExContext
|
||||
OSi_SetExContext: ; 0x0207AC2C
|
||||
ldr r1, _0207ACB8 ; =_022B991C
|
||||
mrs r2, cpsr
|
||||
str r2, [r1, #0x74]
|
||||
str r0, [r1, #0x6c]
|
||||
ldr r0, [ip]
|
||||
str r0, [r1, #4]
|
||||
ldr r0, [ip, #4]
|
||||
str r0, [r1, #8]
|
||||
ldr r0, [ip, #8]
|
||||
str r0, [r1, #0xc]
|
||||
ldr r0, [ip, #0xc]
|
||||
str r0, [r1, #0x10]
|
||||
ldr r2, [ip, #0x10]
|
||||
bic r2, r2, #1
|
||||
add r0, r1, #0x14
|
||||
stmia r0, {r4, r5, r6, r7, r8, sb, sl, fp}
|
||||
str ip, [r1, #0x70]
|
||||
ldr r0, [r2]
|
||||
str r0, [r1, #0x64]
|
||||
ldr r3, [r2, #4]
|
||||
str r3, [r1]
|
||||
ldr r0, [r2, #8]
|
||||
str r0, [r1, #0x34]
|
||||
ldr r0, [r2, #0xc]
|
||||
str r0, [r1, #0x40]
|
||||
mrs r0, cpsr
|
||||
orr r3, r3, #0x80
|
||||
bic r3, r3, #0x20
|
||||
msr cpsr_fsxc, r3
|
||||
str sp, [r1, #0x38]
|
||||
str lr, [r1, #0x3c]
|
||||
mrs r2, spsr
|
||||
str r2, [r1, #0x7c]
|
||||
msr cpsr_fsxc, r0
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207ACB8: .word _022B991C
|
||||
arm_func_end OSi_SetExContext
|
||||
|
||||
arm_func_start OSi_DisplayExContent
|
||||
OSi_DisplayExContent: ; 0x0207ACBC
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r0, _0207AD20 ; =_022B98F0
|
||||
ldr r0, [r0, #8]
|
||||
cmp r0, #0
|
||||
ldmeqia sp!, {r3, pc}
|
||||
mrs r2, cpsr
|
||||
mov r0, sp
|
||||
ldr r1, _0207AD24 ; =0x0000009F
|
||||
msr cpsr_fsxc, r1
|
||||
mov r1, sp
|
||||
mov sp, r0
|
||||
stmdb sp!, {r1, r2}
|
||||
bl OS_EnableProtectionUnit
|
||||
ldr r0, _0207AD28 ; =_022B991C
|
||||
ldr r1, _0207AD2C ; =_022B98F4
|
||||
ldr r1, [r1]
|
||||
ldr ip, _0207AD30 ; =_022B98F8
|
||||
ldr ip, [ip]
|
||||
ldr lr, _0207AD34 ; =_0207AD0C
|
||||
bx ip
|
||||
_0207AD0C:
|
||||
bl OS_DisableProtectionUnit
|
||||
ldmia sp!, {r1, r2}
|
||||
mov sp, r1
|
||||
msr cpsr_fsxc, r2
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207AD20: .word _022B98F0
|
||||
_0207AD24: .word 0x0000009F
|
||||
_0207AD28: .word _022B991C
|
||||
_0207AD2C: .word _022B98F4
|
||||
_0207AD30: .word _022B98F8
|
||||
_0207AD34: .word _0207AD0C
|
||||
arm_func_end OSi_DisplayExContent
|
||||
|
||||
387
lib/NitroSDK/asm/os_interrupt.s
Normal file
387
lib/NitroSDK/asm/os_interrupt.s
Normal file
@@ -0,0 +1,387 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/os_interrupt.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start sub_02078900
|
||||
sub_02078900: ; 0x02078900
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r5, r0
|
||||
mov r4, r1
|
||||
bl EnableIrqFlag
|
||||
cmp r5, #0
|
||||
beq _02078930
|
||||
ldr r1, _0207896C ; =OS_IRQTable
|
||||
mvn r2, r4
|
||||
add r1, r1, #0x3000
|
||||
ldr r3, [r1, #0xff8]
|
||||
and r2, r3, r2
|
||||
str r2, [r1, #0xff8]
|
||||
_02078930:
|
||||
bl SetIrqFlag
|
||||
ldr r1, _0207896C ; =OS_IRQTable
|
||||
add r0, r1, #0x3000
|
||||
ldr r0, [r0, #0xff8]
|
||||
tst r4, r0
|
||||
ldmneia sp!, {r4, r5, r6, pc}
|
||||
add r0, r1, #0x3f8
|
||||
ldr r5, _02078970 ; =DTCM_BSS
|
||||
add r6, r0, #0x3c00
|
||||
_02078954:
|
||||
mov r0, r5
|
||||
bl OS_SleepThread
|
||||
ldr r0, [r6]
|
||||
tst r4, r0
|
||||
beq _02078954
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_0207896C: .word OS_IRQTable
|
||||
_02078970: .word DTCM_BSS
|
||||
arm_func_end sub_02078900
|
||||
|
||||
arm_func_start sub_02078974
|
||||
sub_02078974: ; 0x02078974
|
||||
bx lr
|
||||
arm_func_end sub_02078974
|
||||
|
||||
arm_func_start sub_02078978
|
||||
sub_02078978: ; 0x02078978
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
mov r1, #0xc
|
||||
mul r5, r0, r1
|
||||
ldr r2, _020789EC ; =_022B95E4
|
||||
ldr r3, _020789F0 ; =_020B2B9C
|
||||
mov r4, r0, lsl #1
|
||||
ldr r1, [r2, r5]
|
||||
mov r0, #0
|
||||
ldrh r3, [r3, r4]
|
||||
mov r4, #1
|
||||
str r0, [r2, r5]
|
||||
cmp r1, #0
|
||||
mov r4, r4, lsl r3
|
||||
beq _020789BC
|
||||
ldr r0, _020789F4 ; =_022B95EC
|
||||
ldr r0, [r0, r5]
|
||||
blx r1
|
||||
_020789BC:
|
||||
ldr r0, _020789F8 ; =OS_IRQTable
|
||||
ldr r1, _020789FC ; =_022B95E8
|
||||
add r0, r0, #0x3000
|
||||
ldr r2, [r0, #0xff8]
|
||||
ldr r1, [r1, r5]
|
||||
orr r2, r2, r4
|
||||
str r2, [r0, #0xff8]
|
||||
cmp r1, #0
|
||||
ldmneia sp!, {r3, r4, r5, pc}
|
||||
mov r0, r4
|
||||
bl OS_DisableIrqMask
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_020789EC: .word _022B95E4
|
||||
_020789F0: .word _020B2B9C
|
||||
_020789F4: .word _022B95EC
|
||||
_020789F8: .word OS_IRQTable
|
||||
_020789FC: .word _022B95E8
|
||||
arm_func_end sub_02078978
|
||||
|
||||
arm_func_start sub_02078A00
|
||||
sub_02078A00: ; 0x02078A00
|
||||
ldr ip, _02078A0C ; =sub_02078978
|
||||
mov r0, #0
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02078A0C: .word sub_02078978
|
||||
arm_func_end sub_02078A00
|
||||
|
||||
arm_func_start sub_02078A10
|
||||
sub_02078A10: ; 0x02078A10
|
||||
ldr ip, _02078A1C ; =sub_02078978
|
||||
mov r0, #1
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02078A1C: .word sub_02078978
|
||||
arm_func_end sub_02078A10
|
||||
|
||||
arm_func_start sub_02078A20
|
||||
sub_02078A20: ; 0x02078A20
|
||||
ldr ip, _02078A2C ; =sub_02078978
|
||||
mov r0, #2
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02078A2C: .word sub_02078978
|
||||
arm_func_end sub_02078A20
|
||||
|
||||
arm_func_start sub_02078A30
|
||||
sub_02078A30: ; 0x02078A30
|
||||
ldr ip, _02078A3C ; =sub_02078978
|
||||
mov r0, #3
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02078A3C: .word sub_02078978
|
||||
arm_func_end sub_02078A30
|
||||
|
||||
arm_func_start sub_02078A40
|
||||
sub_02078A40: ; 0x02078A40
|
||||
ldr ip, _02078A4C ; =sub_02078978
|
||||
mov r0, #4
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02078A4C: .word sub_02078978
|
||||
arm_func_end sub_02078A40
|
||||
|
||||
arm_func_start sub_02078A50
|
||||
sub_02078A50: ; 0x02078A50
|
||||
ldr ip, _02078A5C ; =sub_02078978
|
||||
mov r0, #5
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02078A5C: .word sub_02078978
|
||||
arm_func_end sub_02078A50
|
||||
|
||||
arm_func_start sub_02078A60
|
||||
sub_02078A60: ; 0x02078A60
|
||||
ldr ip, _02078A6C ; =sub_02078978
|
||||
mov r0, #6
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02078A6C: .word sub_02078978
|
||||
arm_func_end sub_02078A60
|
||||
|
||||
arm_func_start sub_02078A70
|
||||
sub_02078A70: ; 0x02078A70
|
||||
ldr ip, _02078A7C ; =sub_02078978
|
||||
mov r0, #7
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02078A7C: .word sub_02078978
|
||||
arm_func_end sub_02078A70
|
||||
|
||||
arm_func_start OS_InitIrqTable
|
||||
OS_InitIrqTable: ; 0x02078A80
|
||||
ldr r0, _02078A94 ; =DTCM_BSS
|
||||
mov r1, #0
|
||||
str r1, [r0, #4]
|
||||
str r1, [r0]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02078A94: .word DTCM_BSS
|
||||
arm_func_end OS_InitIrqTable
|
||||
|
||||
arm_func_start OS_SetIrqFunction
|
||||
OS_SetIrqFunction: ; 0x02078A98
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
|
||||
mov r8, #0
|
||||
mov r2, #0xc
|
||||
ldr r4, _02078B18 ; =OS_IRQTable
|
||||
ldr r6, _02078B1C ; =_022B95E4
|
||||
mov r7, r8
|
||||
mov lr, r8
|
||||
mov ip, #1
|
||||
mov r3, r2
|
||||
_02078ABC:
|
||||
tst r0, #1
|
||||
beq _02078B04
|
||||
mov sb, r7
|
||||
cmp r8, #8
|
||||
blt _02078AE0
|
||||
cmp r8, #0xb
|
||||
suble r5, r8, #8
|
||||
mlale sb, r5, r3, r6
|
||||
ble _02078AFC
|
||||
_02078AE0:
|
||||
cmp r8, #3
|
||||
blt _02078AF8
|
||||
cmp r8, #6
|
||||
addle r5, r8, #1
|
||||
mlale sb, r5, r2, r6
|
||||
ble _02078AFC
|
||||
_02078AF8:
|
||||
str r1, [r4, r8, lsl #2]
|
||||
_02078AFC:
|
||||
cmp sb, #0
|
||||
stmneia sb, {r1, ip, lr}
|
||||
_02078B04:
|
||||
add r8, r8, #1
|
||||
cmp r8, #0x16
|
||||
mov r0, r0, lsr #1
|
||||
blt _02078ABC
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
|
||||
.align 2, 0
|
||||
_02078B18: .word OS_IRQTable
|
||||
_02078B1C: .word _022B95E4
|
||||
arm_func_end OS_SetIrqFunction
|
||||
|
||||
arm_func_start sub_02078B20
|
||||
sub_02078B20: ; 0x02078B20
|
||||
ldr r2, _02078BA4 ; =OS_IRQTable
|
||||
mov r1, #0
|
||||
_02078B28:
|
||||
tst r0, #1
|
||||
beq _02078B88
|
||||
cmp r1, #8
|
||||
blt _02078B58
|
||||
cmp r1, #0xb
|
||||
bgt _02078B58
|
||||
sub r1, r1, #8
|
||||
mov r0, #0xc
|
||||
mul r2, r1, r0
|
||||
ldr r0, _02078BA8 ; =_022B95E4
|
||||
ldr r0, [r0, r2]
|
||||
bx lr
|
||||
_02078B58:
|
||||
cmp r1, #3
|
||||
blt _02078B80
|
||||
cmp r1, #6
|
||||
bgt _02078B80
|
||||
add r1, r1, #1
|
||||
mov r0, #0xc
|
||||
mul r2, r1, r0
|
||||
ldr r0, _02078BA8 ; =_022B95E4
|
||||
ldr r0, [r0, r2]
|
||||
bx lr
|
||||
_02078B80:
|
||||
ldr r0, [r2]
|
||||
bx lr
|
||||
_02078B88:
|
||||
add r1, r1, #1
|
||||
cmp r1, #0x16
|
||||
mov r0, r0, lsr #1
|
||||
add r2, r2, #4
|
||||
blt _02078B28
|
||||
mov r0, #0
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02078BA4: .word OS_IRQTable
|
||||
_02078BA8: .word _022B95E4
|
||||
arm_func_end sub_02078B20
|
||||
|
||||
arm_func_start sub_02078BAC
|
||||
sub_02078BAC: ; 0x02078BAC
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r3, #0xc
|
||||
mul r6, r0, r3
|
||||
ldr ip, _02078BE8 ; =_022B95E4
|
||||
add r4, r0, #8
|
||||
mov r5, #1
|
||||
mov r0, r5, lsl r4
|
||||
ldr r3, _02078BEC ; =_022B95EC
|
||||
str r1, [ip, r6]
|
||||
str r2, [r3, r6]
|
||||
bl OS_EnableIrqMask
|
||||
and r1, r0, r5, lsl r4
|
||||
ldr r0, _02078BF0 ; =_022B95E8
|
||||
str r1, [r0, r6]
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_02078BE8: .word _022B95E4
|
||||
_02078BEC: .word _022B95EC
|
||||
_02078BF0: .word _022B95E8
|
||||
arm_func_end sub_02078BAC
|
||||
|
||||
arm_func_start sub_02078BF4
|
||||
sub_02078BF4: ; 0x02078BF4
|
||||
stmdb sp!, {r4, lr}
|
||||
mov r3, #0xc
|
||||
mul r4, r0, r3
|
||||
ldr ip, _02078C30 ; =_022B9614
|
||||
add r0, r0, #3
|
||||
mov r3, #1
|
||||
mov r0, r3, lsl r0
|
||||
ldr r3, _02078C34 ; =_022B961C
|
||||
str r1, [ip, r4]
|
||||
str r2, [r3, r4]
|
||||
bl OS_EnableIrqMask
|
||||
ldr r0, _02078C38 ; =_022B9618
|
||||
mov r1, #1
|
||||
str r1, [r0, r4]
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_02078C30: .word _022B9614
|
||||
_02078C34: .word _022B961C
|
||||
_02078C38: .word _022B9618
|
||||
arm_func_end sub_02078BF4
|
||||
|
||||
arm_func_start OS_SetIrqMask
|
||||
OS_SetIrqMask: ; 0x02078C3C
|
||||
ldr r3, _02078C64 ; =0x04000208
|
||||
mov r1, #0
|
||||
ldrh r2, [r3]
|
||||
strh r1, [r3]
|
||||
ldr r1, [r3, #8]
|
||||
str r0, [r3, #8]
|
||||
ldrh r0, [r3]
|
||||
mov r0, r1
|
||||
strh r2, [r3]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02078C64: .word 0x04000208
|
||||
arm_func_end OS_SetIrqMask
|
||||
|
||||
arm_func_start OS_EnableIrqMask
|
||||
OS_EnableIrqMask: ; 0x02078C68
|
||||
ldr r3, _02078C94 ; =0x04000208
|
||||
mov r1, #0
|
||||
ldrh r2, [r3]
|
||||
strh r1, [r3]
|
||||
ldr r1, [r3, #8]
|
||||
orr r0, r1, r0
|
||||
str r0, [r3, #8]
|
||||
ldrh r0, [r3]
|
||||
mov r0, r1
|
||||
strh r2, [r3]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02078C94: .word 0x04000208
|
||||
arm_func_end OS_EnableIrqMask
|
||||
|
||||
arm_func_start OS_DisableIrqMask
|
||||
OS_DisableIrqMask: ; 0x02078C98
|
||||
ldr ip, _02078CC4 ; =0x04000208
|
||||
mov r2, #0
|
||||
ldrh r3, [ip]
|
||||
mvn r1, r0
|
||||
strh r2, [ip]
|
||||
ldr r0, [ip, #8]
|
||||
and r1, r0, r1
|
||||
str r1, [ip, #8]
|
||||
ldrh r1, [ip]
|
||||
strh r3, [ip]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02078CC4: .word 0x04000208
|
||||
arm_func_end OS_DisableIrqMask
|
||||
|
||||
arm_func_start OS_ResetRequestIrqMask
|
||||
OS_ResetRequestIrqMask: ; 0x02078CC8
|
||||
ldr r3, _02078CF0 ; =0x04000208
|
||||
mov r1, #0
|
||||
ldrh r2, [r3]
|
||||
strh r1, [r3]
|
||||
ldr r1, [r3, #0xc]
|
||||
str r0, [r3, #0xc]
|
||||
ldrh r0, [r3]
|
||||
mov r0, r1
|
||||
strh r2, [r3]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02078CF0: .word 0x04000208
|
||||
arm_func_end OS_ResetRequestIrqMask
|
||||
|
||||
arm_func_start OS_SetIrqStackChecker
|
||||
OS_SetIrqStackChecker: ; 0x02078CF4
|
||||
ldr ip, _02078D18 ; =OS_IRQTable
|
||||
ldr r3, _02078D1C ; =0xFDDB597D
|
||||
add r0, ip, #0x3000
|
||||
ldr r2, _02078D20 ; =0x7BF9DD5B
|
||||
ldr r1, _02078D24 ; =0x00000800
|
||||
str r3, [r0, #0xf7c]
|
||||
add r0, ip, #0x3f80
|
||||
str r2, [r0, -r1]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02078D18: .word OS_IRQTable
|
||||
_02078D1C: .word 0xFDDB597D
|
||||
_02078D20: .word 0x7BF9DD5B
|
||||
_02078D24: .word 0x00000800
|
||||
arm_func_end OS_SetIrqStackChecker
|
||||
|
||||
57
lib/NitroSDK/asm/os_ownerInfo.s
Normal file
57
lib/NitroSDK/asm/os_ownerInfo.s
Normal file
@@ -0,0 +1,57 @@
|
||||
.include "asm/macros.inc"
|
||||
|
||||
.text
|
||||
|
||||
.public MI_CpuCopy8
|
||||
.public MTi_CpuCopy16
|
||||
|
||||
arm_func_start OS_GetMacAddress
|
||||
OS_GetMacAddress: ; 0x0207B9EC
|
||||
ldr ip, _0207BA00 ; =MI_CpuCopy8
|
||||
mov r1, r0
|
||||
ldr r0, _0207BA04 ; =0x027FFCF4
|
||||
mov r2, #6
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_0207BA00: .word MI_CpuCopy8
|
||||
_0207BA04: .word 0x027FFCF4
|
||||
arm_func_end OS_GetMacAddress
|
||||
|
||||
arm_func_start GetDsFirmwareUserSettings ; OS_GetOwnerInfo
|
||||
GetDsFirmwareUserSettings: ; 0x0207BA08
|
||||
stmdb sp!, {r4, lr}
|
||||
ldr ip, _0207BA88 ; =0x027FFC80
|
||||
mov r4, r0
|
||||
ldrh r2, [ip, #0x64]
|
||||
add r0, ip, #6
|
||||
add r1, r4, #4
|
||||
mov r2, r2, lsl #0x1d
|
||||
mov r2, r2, lsr #0x1d
|
||||
strb r2, [r4]
|
||||
ldrb r3, [ip, #2]
|
||||
mov r2, #0x14
|
||||
mov r3, r3, lsl #0x1c
|
||||
mov r3, r3, lsr #0x1c
|
||||
strb r3, [r4, #1]
|
||||
ldrb r3, [ip, #3]
|
||||
strb r3, [r4, #2]
|
||||
ldrb r3, [ip, #4]
|
||||
strb r3, [r4, #3]
|
||||
ldrb r3, [ip, #0x1a]
|
||||
strh r3, [r4, #0x1a]
|
||||
ldrb r3, [ip, #0x50]
|
||||
strh r3, [r4, #0x52]
|
||||
bl MTi_CpuCopy16
|
||||
ldr r0, _0207BA88 ; =0x027FFC80
|
||||
add r1, r4, #0x1c
|
||||
add r0, r0, #0x1c
|
||||
mov r2, #0x34
|
||||
bl MTi_CpuCopy16
|
||||
mov r0, #0
|
||||
strh r0, [r4, #0x18]
|
||||
strh r0, [r4, #0x50]
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207BA88: .word 0x027FFC80
|
||||
arm_func_end GetDsFirmwareUserSettings
|
||||
|
||||
120
lib/NitroSDK/asm/os_reset.s
Normal file
120
lib/NitroSDK/asm/os_reset.s
Normal file
@@ -0,0 +1,120 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/os_reset.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start OS_InitReset
|
||||
OS_InitReset: ; 0x0207B87C
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr r0, _0207B8C8 ; =_022B99D0
|
||||
ldrh r1, [r0, #2]
|
||||
cmp r1, #0
|
||||
ldmneia sp!, {r3, r4, r5, pc}
|
||||
mov r1, #1
|
||||
strh r1, [r0, #2]
|
||||
bl PXI_Init
|
||||
mov r5, #0xc
|
||||
mov r4, #1
|
||||
_0207B8A4:
|
||||
mov r0, r5
|
||||
mov r1, r4
|
||||
bl PXI_IsCallbackReady
|
||||
cmp r0, #0
|
||||
beq _0207B8A4
|
||||
ldr r1, _0207B8CC ; =OSi_CommonCallback
|
||||
mov r0, #0xc
|
||||
bl PXI_SetFifoRecvCallback
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_0207B8C8: .word _022B99D0
|
||||
_0207B8CC: .word OSi_CommonCallback
|
||||
arm_func_end OS_InitReset
|
||||
|
||||
arm_func_start OSi_CommonCallback ; OSi_CommonCallback
|
||||
OSi_CommonCallback: ; 0x0207B8D0
|
||||
stmdb sp!, {r3, lr}
|
||||
and r0, r1, #0x7f00
|
||||
mov r0, r0, lsl #8
|
||||
mov r0, r0, lsr #0x10
|
||||
cmp r0, #0x10
|
||||
bne _0207B8F8
|
||||
ldr r0, _0207B900 ; =_022B99D0
|
||||
mov r1, #1
|
||||
strh r1, [r0]
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207B8F8:
|
||||
bl WaitForever2
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207B900: .word _022B99D0
|
||||
arm_func_end OSi_CommonCallback
|
||||
|
||||
arm_func_start OSi_SendToPxi ; Osi_SendToPxi
|
||||
OSi_SendToPxi: ; 0x0207B904
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r6, r0, lsl #8
|
||||
mov r5, #0xc
|
||||
mov r4, #0
|
||||
_0207B914:
|
||||
mov r0, r5
|
||||
mov r1, r6
|
||||
mov r2, r4
|
||||
bl PXI_SendWordByFifo
|
||||
cmp r0, #0
|
||||
bne _0207B914
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
arm_func_end OSi_SendToPxi
|
||||
|
||||
arm_func_start OS_ResetSystem ; OS_ResetSystem
|
||||
OS_ResetSystem: ; 0x0207B930
|
||||
stmdb sp!, {r4, lr}
|
||||
ldr r1, _0207B9C0 ; =0x027FFC40
|
||||
mov r4, r0
|
||||
ldrh r0, [r1]
|
||||
cmp r0, #2
|
||||
moveq r0, #1
|
||||
movne r0, #0
|
||||
cmp r0, #0
|
||||
beq _0207B958
|
||||
bl WaitForever2
|
||||
_0207B958:
|
||||
bl OS_GetLockID
|
||||
mov r0, r0, lsl #0x10
|
||||
mov r0, r0, lsr #0x10
|
||||
bl sub_02083434
|
||||
ldr r0, _0207B9C4 ; =0x00000000
|
||||
bl MI_StopDma
|
||||
ldr r0, _0207B9C8 ; =0x00000001
|
||||
bl MI_StopDma
|
||||
ldr r0, _0207B9CC ; =0x00000002
|
||||
bl MI_StopDma
|
||||
ldr r0, _0207B9D0 ; =0x00000003
|
||||
bl MI_StopDma
|
||||
ldr r0, _0207B9D4 ; =0x00040000
|
||||
bl OS_SetIrqMask
|
||||
ldr r0, _0207B9D8 ; =0xFFFBFFFF
|
||||
bl OS_ResetRequestIrqMask
|
||||
ldr r1, _0207B9DC ; =0x027FFC20
|
||||
ldr r0, _0207B9E0 ; =0x00000010
|
||||
str r4, [r1]
|
||||
bl OSi_SendToPxi
|
||||
ldr r0, _0207B9E4 ; =0x027E3F80
|
||||
ldr r1, _0207B9E8 ; =0x00000800
|
||||
sub r0, r0, r1
|
||||
mov sp, r0
|
||||
bl sub_01FF97CC
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207B9C0: .word 0x027FFC40
|
||||
_0207B9C4: .word 0x00000000
|
||||
_0207B9C8: .word 0x00000001
|
||||
_0207B9CC: .word 0x00000002
|
||||
_0207B9D0: .word 0x00000003
|
||||
_0207B9D4: .word 0x00040000
|
||||
_0207B9D8: .word 0xFFFBFFFF
|
||||
_0207B9DC: .word 0x027FFC20
|
||||
_0207B9E0: .word 0x00000010
|
||||
_0207B9E4: .word 0x027E3F80
|
||||
_0207B9E8: .word 0x00000800
|
||||
arm_func_end OS_ResetSystem
|
||||
|
||||
400
lib/NitroSDK/asm/os_spinlock.s
Normal file
400
lib/NitroSDK/asm/os_spinlock.s
Normal file
@@ -0,0 +1,400 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/os_spinlock.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start OS_InitLock
|
||||
OS_InitLock: ; 0x02078D28
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr r3, _02078DE4 ; =_022B9644
|
||||
ldr r0, [r3]
|
||||
cmp r0, #0
|
||||
ldmneia sp!, {r3, r4, r5, pc}
|
||||
ldr r1, _02078DE8 ; =0x027FFFF0
|
||||
mov r4, #1
|
||||
mov r2, #0
|
||||
mov r0, #0x7e
|
||||
str r4, [r3]
|
||||
str r2, [r1]
|
||||
bl OS_LockByWord
|
||||
ldr r5, _02078DE8 ; =0x027FFFF0
|
||||
ldrh r0, [r5, #6]
|
||||
cmp r0, #0
|
||||
beq _02078D80
|
||||
mov r4, #0x400
|
||||
_02078D6C:
|
||||
mov r0, r4
|
||||
blx SVC_WaitByLoop
|
||||
ldrh r0, [r5, #6]
|
||||
cmp r0, #0
|
||||
bne _02078D6C
|
||||
_02078D80:
|
||||
ldr ip, _02078DEC ; =0x027FFFB0
|
||||
mvn r0, #0
|
||||
str r0, [ip]
|
||||
mov r3, r0, lsl #0x10
|
||||
add r1, ip, #0x10
|
||||
mov r0, #0
|
||||
mov r2, #0x28
|
||||
str r3, [ip, #4]
|
||||
bl MTi_CpuClear32
|
||||
ldr ip, _02078DF0 ; =0x04000204
|
||||
ldr r1, _02078DE8 ; =0x027FFFF0
|
||||
ldrh r3, [ip]
|
||||
mov r0, #0x7e
|
||||
mov r2, #0
|
||||
orr r3, r3, #0x800
|
||||
strh r3, [ip]
|
||||
ldrh r3, [ip]
|
||||
orr r3, r3, #0x80
|
||||
strh r3, [ip]
|
||||
bl OS_UnlockByWord
|
||||
ldr r1, _02078DE8 ; =0x027FFFF0
|
||||
mov r0, #0x7f
|
||||
mov r2, #0
|
||||
bl OS_LockByWord
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_02078DE4: .word _022B9644
|
||||
_02078DE8: .word 0x027FFFF0
|
||||
_02078DEC: .word 0x027FFFB0
|
||||
_02078DF0: .word 0x04000204
|
||||
arm_func_end OS_InitLock
|
||||
|
||||
arm_func_start sub_02078DF4
|
||||
sub_02078DF4: ; 0x02078DF4
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||||
mov r8, r0
|
||||
mov r7, r1
|
||||
mov r6, r2
|
||||
mov r5, r3
|
||||
bl sub_02078ED4
|
||||
cmp r0, #0
|
||||
ldmleia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
mov r4, #0x400
|
||||
_02078E18:
|
||||
mov r0, r4
|
||||
blx SVC_WaitByLoop
|
||||
mov r0, r8
|
||||
mov r1, r7
|
||||
mov r2, r6
|
||||
mov r3, r5
|
||||
bl sub_02078ED4
|
||||
cmp r0, #0
|
||||
bgt _02078E18
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
arm_func_end sub_02078DF4
|
||||
|
||||
arm_func_start OS_LockByWord
|
||||
OS_LockByWord: ; 0x02078E40
|
||||
ldr ip, _02078E4C ; =sub_02078DF4
|
||||
mov r3, #0
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02078E4C: .word sub_02078DF4
|
||||
arm_func_end OS_LockByWord
|
||||
|
||||
arm_func_start OSi_DoUnlockByWord
|
||||
OSi_DoUnlockByWord: ; 0x02078E50
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
mov r7, r1
|
||||
ldrh r1, [r7, #4]
|
||||
mov r6, r2
|
||||
mov r5, r3
|
||||
cmp r0, r1
|
||||
mvnne r0, #1
|
||||
ldmneia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
cmp r5, #0
|
||||
beq _02078E80
|
||||
bl EnableIrqFiqFlags
|
||||
b _02078E84
|
||||
_02078E80:
|
||||
bl EnableIrqFlag
|
||||
_02078E84:
|
||||
mov r4, r0
|
||||
mov r0, #0
|
||||
strh r0, [r7, #4]
|
||||
cmp r6, #0
|
||||
beq _02078E9C
|
||||
blx r6
|
||||
_02078E9C:
|
||||
mov r0, #0
|
||||
str r0, [r7]
|
||||
cmp r5, #0
|
||||
mov r0, r4
|
||||
beq _02078EB8
|
||||
bl SetIrqFiqFlags
|
||||
b _02078EBC
|
||||
_02078EB8:
|
||||
bl SetIrqFlag
|
||||
_02078EBC:
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
arm_func_end OSi_DoUnlockByWord
|
||||
|
||||
arm_func_start OS_UnlockByWord
|
||||
OS_UnlockByWord: ; 0x02078EC4
|
||||
ldr ip, _02078ED0 ; =OSi_DoUnlockByWord
|
||||
mov r3, #0
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02078ED0: .word OSi_DoUnlockByWord
|
||||
arm_func_end OS_UnlockByWord
|
||||
|
||||
arm_func_start sub_02078ED4
|
||||
sub_02078ED4: ; 0x02078ED4
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
|
||||
movs r6, r3
|
||||
mov sb, r0
|
||||
mov r8, r1
|
||||
mov r7, r2
|
||||
beq _02078EF4
|
||||
bl EnableIrqFiqFlags
|
||||
b _02078EF8
|
||||
_02078EF4:
|
||||
bl EnableIrqFlag
|
||||
_02078EF8:
|
||||
mov r5, r0
|
||||
mov r0, sb
|
||||
mov r1, r8
|
||||
bl AtomicExchange
|
||||
movs r4, r0
|
||||
bne _02078F20
|
||||
cmp r7, #0
|
||||
beq _02078F1C
|
||||
blx r7
|
||||
_02078F1C:
|
||||
strh sb, [r8, #4]
|
||||
_02078F20:
|
||||
cmp r6, #0
|
||||
mov r0, r5
|
||||
beq _02078F34
|
||||
bl SetIrqFiqFlags
|
||||
b _02078F38
|
||||
_02078F34:
|
||||
bl SetIrqFlag
|
||||
_02078F38:
|
||||
mov r0, r4
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
|
||||
arm_func_end sub_02078ED4
|
||||
|
||||
arm_func_start OS_UnlockCartridge
|
||||
OS_UnlockCartridge: ; 0x02078F40
|
||||
ldr ip, _02078F54 ; =OSi_DoUnlockByWord
|
||||
ldr r1, _02078F58 ; =0x027FFFE8
|
||||
ldr r2, _02078F5C ; =OSi_FreeCartridgeBus
|
||||
mov r3, #1
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02078F54: .word OSi_DoUnlockByWord
|
||||
_02078F58: .word 0x027FFFE8
|
||||
_02078F5C: .word OSi_FreeCartridgeBus
|
||||
arm_func_end OS_UnlockCartridge
|
||||
|
||||
arm_func_start OS_UnlockCartridgeVeneer
|
||||
OS_UnlockCartridgeVeneer: ; 0x02078F60
|
||||
ldr r1, _02078F68 ; =OS_UnlockCartridge
|
||||
bx r1
|
||||
.align 2, 0
|
||||
_02078F68: .word OS_UnlockCartridge
|
||||
arm_func_end OS_UnlockCartridgeVeneer
|
||||
|
||||
arm_func_start sub_02078F6C
|
||||
sub_02078F6C: ; 0x02078F6C
|
||||
ldr ip, _02078F80 ; =sub_02078ED4
|
||||
ldr r1, _02078F84 ; =0x027FFFE8
|
||||
ldr r2, _02078F88 ; =sub_02078F8C
|
||||
mov r3, #1
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02078F80: .word sub_02078ED4
|
||||
_02078F84: .word 0x027FFFE8
|
||||
_02078F88: .word sub_02078F8C
|
||||
arm_func_end sub_02078F6C
|
||||
|
||||
arm_func_start sub_02078F8C
|
||||
sub_02078F8C: ; 0x02078F8C
|
||||
ldr r1, _02078FA0 ; =0x04000204
|
||||
ldrh r0, [r1]
|
||||
bic r0, r0, #0x80
|
||||
strh r0, [r1]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02078FA0: .word 0x04000204
|
||||
arm_func_end sub_02078F8C
|
||||
|
||||
arm_func_start OSi_FreeCartridgeBus
|
||||
OSi_FreeCartridgeBus: ; 0x02078FA4
|
||||
ldr r1, _02078FB8 ; =0x04000204
|
||||
ldrh r0, [r1]
|
||||
orr r0, r0, #0x80
|
||||
strh r0, [r1]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02078FB8: .word 0x04000204
|
||||
arm_func_end OSi_FreeCartridgeBus
|
||||
|
||||
arm_func_start sub_02078FBC
|
||||
sub_02078FBC: ; 0x02078FBC
|
||||
ldr ip, _02078FCC ; =OS_LockByWord
|
||||
ldr r1, _02078FD0 ; =0x027FFFE0
|
||||
ldr r2, _02078FD4 ; =sub_02078FF4
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02078FCC: .word OS_LockByWord
|
||||
_02078FD0: .word 0x027FFFE0
|
||||
_02078FD4: .word sub_02078FF4
|
||||
arm_func_end sub_02078FBC
|
||||
|
||||
arm_func_start sub_02078FD8
|
||||
sub_02078FD8: ; 0x02078FD8
|
||||
ldr ip, _02078FE8 ; =OS_UnlockByWord
|
||||
ldr r1, _02078FEC ; =0x027FFFE0
|
||||
ldr r2, _02078FF0 ; =sub_0207900C
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02078FE8: .word OS_UnlockByWord
|
||||
_02078FEC: .word 0x027FFFE0
|
||||
_02078FF0: .word sub_0207900C
|
||||
arm_func_end sub_02078FD8
|
||||
|
||||
arm_func_start sub_02078FF4
|
||||
sub_02078FF4: ; 0x02078FF4
|
||||
ldr r1, _02079008 ; =0x04000204
|
||||
ldrh r0, [r1]
|
||||
bic r0, r0, #0x800
|
||||
strh r0, [r1]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02079008: .word 0x04000204
|
||||
arm_func_end sub_02078FF4
|
||||
|
||||
arm_func_start sub_0207900C
|
||||
sub_0207900C: ; 0x0207900C
|
||||
ldr r1, _02079020 ; =0x04000204
|
||||
ldrh r0, [r1]
|
||||
orr r0, r0, #0x800
|
||||
strh r0, [r1]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02079020: .word 0x04000204
|
||||
arm_func_end sub_0207900C
|
||||
|
||||
arm_func_start sub_02079024
|
||||
sub_02079024: ; 0x02079024
|
||||
ldrh r0, [r0, #4]
|
||||
bx lr
|
||||
arm_func_end sub_02079024
|
||||
|
||||
arm_func_start OS_GetLockID
|
||||
OS_GetLockID: ; 0x0207902C
|
||||
ldr r3, _0207908C ; =0x027FFFB0
|
||||
ldr r1, [r3]
|
||||
clz r2, r1
|
||||
cmp r2, #0x20
|
||||
bne _02079044
|
||||
b _02079048
|
||||
_02079044:
|
||||
mov r0, #0x40
|
||||
_02079048:
|
||||
bne _02079070
|
||||
add r3, r3, #4
|
||||
ldr r1, [r3]
|
||||
clz r2, r1
|
||||
cmp r2, #0x20
|
||||
ldr r0, _02079090 ; =0xFFFFFFFD
|
||||
beq _02079068
|
||||
b _0207906C
|
||||
_02079068:
|
||||
bx lr
|
||||
_0207906C:
|
||||
mov r0, #0x60
|
||||
_02079070:
|
||||
add r0, r0, r2
|
||||
mov r1, #0x80000000
|
||||
mov r1, r1, lsr r2
|
||||
ldr r2, [r3]
|
||||
bic r2, r2, r1
|
||||
str r2, [r3]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207908C: .word 0x027FFFB0
|
||||
_02079090: .word 0xFFFFFFFD
|
||||
arm_func_end OS_GetLockID
|
||||
|
||||
arm_func_start sub_02079094
|
||||
sub_02079094: ; 0x02079094
|
||||
ldr r3, _020790D8 ; =0x027FFFB0
|
||||
cmp r0, #0x60
|
||||
bpl _020790A4
|
||||
b _020790A8
|
||||
_020790A4:
|
||||
add r3, r3, #4
|
||||
_020790A8:
|
||||
bpl _020790B0
|
||||
b _020790B4
|
||||
_020790B0:
|
||||
sub r0, r0, #0x60
|
||||
_020790B4:
|
||||
bmi _020790BC
|
||||
b _020790C0
|
||||
_020790BC:
|
||||
sub r0, r0, #0x40
|
||||
_020790C0:
|
||||
mov r1, #0x80000000
|
||||
mov r1, r1, lsr r0
|
||||
ldr r2, [r3]
|
||||
orr r2, r2, r1
|
||||
str r2, [r3]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_020790D8: .word 0x027FFFB0
|
||||
arm_func_end sub_02079094
|
||||
|
||||
arm_func_start sub_020790DC
|
||||
sub_020790DC: ; 0x020790DC
|
||||
stmdb sp!, {r0, r1, r2, r3}
|
||||
stmdb sp!, {r3, lr}
|
||||
add r2, sp, #0xc
|
||||
bic r2, r2, #3
|
||||
ldr r1, [sp, #0xc]
|
||||
add r2, r2, #4
|
||||
bl sub_02079104
|
||||
ldmia sp!, {r3, lr}
|
||||
add sp, sp, #0x10
|
||||
bx lr
|
||||
arm_func_end sub_020790DC
|
||||
|
||||
arm_func_start sub_02079104
|
||||
sub_02079104: ; 0x02079104
|
||||
ldr ip, _02079118 ; =sub_02079144
|
||||
mov r3, r2
|
||||
mov r2, r1
|
||||
mvn r1, #0x80000000
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02079118: .word sub_02079144
|
||||
arm_func_end sub_02079104
|
||||
|
||||
arm_func_start sub_0207911C
|
||||
sub_0207911C: ; 0x0207911C
|
||||
stmdb sp!, {r0, r1, r2, r3}
|
||||
stmdb sp!, {r3, lr}
|
||||
add r3, sp, #0x10
|
||||
bic r3, r3, #3
|
||||
ldr r2, [sp, #0x10]
|
||||
add r3, r3, #4
|
||||
bl sub_02079144
|
||||
ldmia sp!, {r3, lr}
|
||||
add sp, sp, #0x10
|
||||
bx lr
|
||||
arm_func_end sub_0207911C
|
||||
|
||||
arm_func_start sub_02079144
|
||||
sub_02079144: ; 0x02079144
|
||||
ldr ip, _0207914C ; =sub_02085BD4
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_0207914C: .word sub_02085BD4
|
||||
arm_func_end sub_02079144
|
||||
|
||||
1400
lib/NitroSDK/asm/os_thread.s
Normal file
1400
lib/NitroSDK/asm/os_thread.s
Normal file
File diff suppressed because it is too large
Load Diff
169
lib/NitroSDK/asm/os_tick.s
Normal file
169
lib/NitroSDK/asm/os_tick.s
Normal file
@@ -0,0 +1,169 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/os_timer.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start OS_InitTick
|
||||
OS_InitTick: ; 0x0207AD54
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r1, _0207ADC0 ; =OSi_UseTick
|
||||
ldrh r0, [r1]
|
||||
cmp r0, #0
|
||||
ldmneia sp!, {r3, pc}
|
||||
mov r2, #1
|
||||
mov r0, #0
|
||||
strh r2, [r1]
|
||||
bl OSi_SetTimerReserved
|
||||
ldr r0, _0207ADC0 ; =OSi_UseTick
|
||||
mov r2, #0
|
||||
str r2, [r0, #8]
|
||||
ldr r3, _0207ADC4 ; =0x04000102
|
||||
str r2, [r0, #0xc]
|
||||
strh r2, [r3]
|
||||
ldr r1, _0207ADC8 ; =OSi_CountUpTick
|
||||
strh r2, [r3, #-2]
|
||||
mov r2, #0xc1
|
||||
mov r0, #8
|
||||
strh r2, [r3]
|
||||
bl OS_SetIrqFunction
|
||||
mov r0, #8
|
||||
bl OS_EnableIrqMask
|
||||
ldr r0, _0207ADC0 ; =OSi_UseTick
|
||||
mov r1, #0
|
||||
str r1, [r0, #4]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207ADC0: .word OSi_UseTick
|
||||
_0207ADC4: .word 0x04000102
|
||||
_0207ADC8: .word OSi_CountUpTick
|
||||
arm_func_end OS_InitTick
|
||||
|
||||
arm_func_start OS_IsTickAvailable
|
||||
OS_IsTickAvailable: ; 0x0207ADCC
|
||||
ldr r0, _0207ADD8 ; =OSi_UseTick
|
||||
ldrh r0, [r0]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207ADD8: .word OSi_UseTick
|
||||
arm_func_end OS_IsTickAvailable
|
||||
|
||||
arm_func_start OSi_CountUpTick
|
||||
OSi_CountUpTick: ; 0x0207ADDC
|
||||
ldr r0, _0207AE34 ; =OSi_UseTick
|
||||
mov r3, #0
|
||||
ldr r2, [r0, #8]
|
||||
ldr r1, [r0, #0xc]
|
||||
adds r2, r2, #1
|
||||
str r2, [r0, #8]
|
||||
adc r1, r1, #0
|
||||
str r1, [r0, #0xc]
|
||||
ldr r1, [r0, #4]
|
||||
cmp r1, #0
|
||||
beq _0207AE20
|
||||
ldr r2, _0207AE38 ; =0x04000102
|
||||
mov r1, #0xc1
|
||||
strh r3, [r2]
|
||||
strh r3, [r2, #-2]
|
||||
strh r1, [r2]
|
||||
str r3, [r0, #4]
|
||||
_0207AE20:
|
||||
ldr ip, _0207AE3C ; =sub_02078BF4
|
||||
mov r0, #0
|
||||
ldr r1, _0207AE40 ; =OSi_CountUpTick
|
||||
mov r2, r0
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_0207AE34: .word OSi_UseTick
|
||||
_0207AE38: .word 0x04000102
|
||||
_0207AE3C: .word sub_02078BF4
|
||||
_0207AE40: .word OSi_CountUpTick
|
||||
arm_func_end OSi_CountUpTick
|
||||
|
||||
arm_func_start OS_GetTick
|
||||
OS_GetTick: ; 0x0207AE44
|
||||
stmdb sp!, {lr}
|
||||
sub sp, sp, #0xc
|
||||
bl EnableIrqFlag
|
||||
ldr lr, _0207AED8 ; =0x04000100
|
||||
ldr r2, _0207AEDC ; =0x0000FFFF
|
||||
ldrh ip, [lr]
|
||||
ldr r3, _0207AEE0 ; =OSi_UseTick
|
||||
sub r1, r2, #0x10000
|
||||
strh ip, [sp]
|
||||
ldr ip, [r3, #8]
|
||||
ldr r3, [r3, #0xc]
|
||||
and ip, ip, r1
|
||||
and r1, r3, r2
|
||||
str ip, [sp, #4]
|
||||
str r1, [sp, #8]
|
||||
ldr r1, [lr, #0x114]
|
||||
tst r1, #8
|
||||
beq _0207AEB0
|
||||
ldrh r1, [sp]
|
||||
tst r1, #0x8000
|
||||
bne _0207AEB0
|
||||
ldr r2, [sp, #4]
|
||||
ldr r1, [sp, #8]
|
||||
adds r2, r2, #1
|
||||
adc r1, r1, #0
|
||||
str r2, [sp, #4]
|
||||
str r1, [sp, #8]
|
||||
_0207AEB0:
|
||||
bl SetIrqFlag
|
||||
ldr r2, [sp, #4]
|
||||
ldr r1, [sp, #8]
|
||||
ldrh r0, [sp]
|
||||
mov r1, r1, lsl #0x10
|
||||
orr r1, r1, r2, lsr #16
|
||||
orr r1, r1, r0, asr #31
|
||||
orr r0, r0, r2, lsl #16
|
||||
add sp, sp, #0xc
|
||||
ldmia sp!, {pc}
|
||||
.align 2, 0
|
||||
_0207AED8: .word 0x04000100
|
||||
_0207AEDC: .word 0x0000FFFF
|
||||
_0207AEE0: .word OSi_UseTick
|
||||
arm_func_end OS_GetTick
|
||||
|
||||
arm_func_start OS_GetTickLo
|
||||
OS_GetTickLo: ; 0x0207AEE4
|
||||
ldr r0, _0207AEF0 ; =0x04000100
|
||||
ldrh r0, [r0]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207AEF0: .word 0x04000100
|
||||
arm_func_end OS_GetTickLo
|
||||
|
||||
arm_func_start OS_SetTick
|
||||
OS_SetTick: ; 0x0207AEF4
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r5, r0
|
||||
mov r4, r1
|
||||
bl EnableIrqFlag
|
||||
mov r3, r5, lsr #0x10
|
||||
mov ip, #1
|
||||
rsb r1, ip, #0x10000
|
||||
ldr lr, _0207AF58 ; =0x04000214
|
||||
mov r6, #8
|
||||
ldr r2, _0207AF5C ; =OSi_UseTick
|
||||
str r6, [lr]
|
||||
str ip, [r2, #4]
|
||||
orr r3, r3, r4, lsl #16
|
||||
str r3, [r2, #8]
|
||||
mov r4, r4, lsr #0x10
|
||||
ldr r3, _0207AF60 ; =0x04000102
|
||||
str r4, [r2, #0xc]
|
||||
mov r2, #0
|
||||
strh r2, [r3]
|
||||
and r1, r5, r1
|
||||
strh r1, [r3, #-2]
|
||||
mov r1, #0xc1
|
||||
strh r1, [r3]
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_0207AF58: .word 0x04000214
|
||||
_0207AF5C: .word OSi_UseTick
|
||||
_0207AF60: .word 0x04000102
|
||||
arm_func_end OS_SetTick
|
||||
|
||||
352
lib/NitroSDK/asm/os_valarm.s
Normal file
352
lib/NitroSDK/asm/os_valarm.s
Normal file
@@ -0,0 +1,352 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/os_timer.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start OS_InitVAlarm
|
||||
OS_InitVAlarm: ; 0x0207B370
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r1, _0207B3B4 ; =_022B99BC
|
||||
ldrh r0, [r1]
|
||||
cmp r0, #0
|
||||
ldmneia sp!, {r3, pc}
|
||||
mov r0, #1
|
||||
strh r0, [r1]
|
||||
mov r2, #0
|
||||
str r2, [r1, #0xc]
|
||||
mov r0, #4
|
||||
str r2, [r1, #0x10]
|
||||
bl OS_DisableIrqMask
|
||||
ldr r0, _0207B3B4 ; =_022B99BC
|
||||
mov r1, #0
|
||||
str r1, [r0, #8]
|
||||
str r1, [r0, #4]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207B3B4: .word _022B99BC
|
||||
arm_func_end OS_InitVAlarm
|
||||
|
||||
arm_func_start sub_0207B3B8
|
||||
sub_0207B3B8: ; 0x0207B3B8
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r1, _0207B430 ; =_022B99BC
|
||||
ldr r3, [r1, #0xc]
|
||||
cmp r3, #0
|
||||
beq _0207B428
|
||||
ldr ip, [r0, #0xc]
|
||||
_0207B3D0:
|
||||
ldr r1, [r3, #0xc]
|
||||
cmp r1, ip
|
||||
blo _0207B41C
|
||||
bne _0207B3F0
|
||||
ldrsh r2, [r3, #0x10]
|
||||
ldrsh r1, [r0, #0x10]
|
||||
cmp r2, r1
|
||||
ble _0207B41C
|
||||
_0207B3F0:
|
||||
ldr r1, [r3, #0x14]
|
||||
str r1, [r0, #0x14]
|
||||
str r3, [r0, #0x18]
|
||||
str r0, [r3, #0x14]
|
||||
cmp r1, #0
|
||||
strne r0, [r1, #0x18]
|
||||
ldmneia sp!, {r3, pc}
|
||||
ldr r1, _0207B430 ; =_022B99BC
|
||||
str r0, [r1, #0xc]
|
||||
bl sub_0207B544
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207B41C:
|
||||
ldr r3, [r3, #0x18]
|
||||
cmp r3, #0
|
||||
bne _0207B3D0
|
||||
_0207B428:
|
||||
bl sub_0207B434
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207B430: .word _022B99BC
|
||||
arm_func_end sub_0207B3B8
|
||||
|
||||
arm_func_start sub_0207B434
|
||||
sub_0207B434: ; 0x0207B434
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r1, _0207B468 ; =_022B99BC
|
||||
mov r2, #0
|
||||
ldr r3, [r1, #0x10]
|
||||
str r3, [r0, #0x14]
|
||||
str r2, [r0, #0x18]
|
||||
str r0, [r1, #0x10]
|
||||
cmp r3, #0
|
||||
strne r0, [r3, #0x18]
|
||||
ldmneia sp!, {r3, pc}
|
||||
str r0, [r1, #0xc]
|
||||
bl sub_0207B544
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207B468: .word _022B99BC
|
||||
arm_func_end sub_0207B434
|
||||
|
||||
arm_func_start sub_0207B46C
|
||||
sub_0207B46C: ; 0x0207B46C
|
||||
cmp r0, #0
|
||||
bxeq lr
|
||||
ldr r2, [r0, #0x18]
|
||||
ldr r1, [r0, #0x14]
|
||||
cmp r2, #0
|
||||
ldreq r0, _0207B4A0 ; =_022B99BC
|
||||
strne r1, [r2, #0x14]
|
||||
streq r1, [r0, #0x10]
|
||||
cmp r1, #0
|
||||
ldreq r0, _0207B4A0 ; =_022B99BC
|
||||
strne r2, [r1, #0x18]
|
||||
streq r2, [r0, #0xc]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207B4A0: .word _022B99BC
|
||||
arm_func_end sub_0207B46C
|
||||
|
||||
arm_func_start sub_0207B4A4
|
||||
sub_0207B4A4: ; 0x0207B4A4
|
||||
mov r1, #0
|
||||
str r1, [r0]
|
||||
str r1, [r0, #8]
|
||||
str r1, [r0, #0x20]
|
||||
bx lr
|
||||
arm_func_end sub_0207B4A4
|
||||
|
||||
arm_func_start sub_0207B4B8
|
||||
sub_0207B4B8: ; 0x0207B4B8
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
|
||||
mov r8, r0
|
||||
mov r7, r1
|
||||
mov r6, r2
|
||||
mov r5, r3
|
||||
bl EnableIrqFlag
|
||||
mov r4, r0
|
||||
cmp r8, #0
|
||||
beq _0207B4E8
|
||||
ldr r0, [r8]
|
||||
cmp r0, #0
|
||||
beq _0207B4EC
|
||||
_0207B4E8:
|
||||
bl WaitForever2
|
||||
_0207B4EC:
|
||||
ldr r0, _0207B540 ; =0x04000006
|
||||
ldrh sb, [r0]
|
||||
mov r0, sb
|
||||
bl sub_0207B790
|
||||
mov r1, #1
|
||||
str r1, [r8, #0x1c]
|
||||
cmp r7, sb
|
||||
strh r7, [r8, #0x10]
|
||||
addle r0, r0, #1
|
||||
str r0, [r8, #0xc]
|
||||
strh r6, [r8, #0x12]
|
||||
ldr r1, [sp, #0x20]
|
||||
str r5, [r8]
|
||||
str r1, [r8, #4]
|
||||
mov r1, #0
|
||||
mov r0, r8
|
||||
str r1, [r8, #0x24]
|
||||
bl sub_0207B3B8
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
|
||||
.align 2, 0
|
||||
_0207B540: .word 0x04000006
|
||||
arm_func_end sub_0207B4B8
|
||||
|
||||
arm_func_start sub_0207B544
|
||||
sub_0207B544: ; 0x0207B544
|
||||
stmdb sp!, {r4, lr}
|
||||
ldr r1, _0207B57C ; =sub_0207B5CC
|
||||
mov r4, r0
|
||||
mov r0, #4
|
||||
bl OS_SetIrqFunction
|
||||
ldrsh r0, [r4, #0x10]
|
||||
bl GX_HBlankIntr
|
||||
ldr r2, _0207B580 ; =0x04000004
|
||||
mov r0, #4
|
||||
ldrh r1, [r2]
|
||||
orr r1, r1, #0x20
|
||||
strh r1, [r2]
|
||||
bl OS_EnableIrqMask
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207B57C: .word sub_0207B5CC
|
||||
_0207B580: .word 0x04000004
|
||||
arm_func_end sub_0207B544
|
||||
|
||||
arm_func_start sub_0207B584
|
||||
sub_0207B584: ; 0x0207B584
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
mov r5, r0
|
||||
bl EnableIrqFlag
|
||||
mov r1, #1
|
||||
str r1, [r5, #0x24]
|
||||
ldr r1, [r5]
|
||||
mov r4, r0
|
||||
cmp r1, #0
|
||||
bne _0207B5B0
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
_0207B5B0:
|
||||
mov r0, r5
|
||||
bl sub_0207B46C
|
||||
mov r1, #0
|
||||
mov r0, r4
|
||||
str r1, [r5]
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
arm_func_end sub_0207B584
|
||||
|
||||
arm_func_start sub_0207B5CC
|
||||
sub_0207B5CC: ; 0x0207B5CC
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
|
||||
mov r0, #4
|
||||
bl OS_DisableIrqMask
|
||||
ldr r2, _0207B734 ; =0x04000004
|
||||
ldr r0, _0207B738 ; =OS_IRQTable
|
||||
ldrh r1, [r2]
|
||||
add r0, r0, #0x3000
|
||||
bic r1, r1, #0x20
|
||||
strh r1, [r2]
|
||||
ldr r1, [r0, #0xff8]
|
||||
orr r1, r1, #4
|
||||
str r1, [r0, #0xff8]
|
||||
ldrh r0, [r2]
|
||||
mov r1, r0, asr #8
|
||||
mov r0, r0, lsl #1
|
||||
and r1, r1, #0xff
|
||||
and r0, r0, #0x100
|
||||
orr r0, r1, r0
|
||||
sub r0, r0, #1
|
||||
bl sub_0207B790
|
||||
ldr r4, _0207B73C ; =_022B99BC
|
||||
ldr sl, [r4, #0xc]
|
||||
cmp sl, #0
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
ldr sb, _0207B740 ; =0x04000006
|
||||
mov fp, #4
|
||||
sub r6, sb, #2
|
||||
mov r5, #0
|
||||
_0207B63C:
|
||||
ldrh r8, [sb]
|
||||
mov r0, r8
|
||||
bl sub_0207B790
|
||||
mov r7, r0
|
||||
mov r0, sl
|
||||
mov r1, r7
|
||||
mov r2, r8
|
||||
bl sub_0207B744
|
||||
cmp r0, #0
|
||||
beq _0207B678
|
||||
cmp r0, #1
|
||||
beq _0207B6B4
|
||||
cmp r0, #2
|
||||
beq _0207B708
|
||||
b _0207B724
|
||||
_0207B678:
|
||||
mov r0, sl
|
||||
bl sub_0207B544
|
||||
ldrh r1, [sb]
|
||||
ldrsh r0, [sl, #0x10]
|
||||
cmp r0, r1
|
||||
ldreq r0, [sl, #0xc]
|
||||
cmpeq r0, r7
|
||||
ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
mov r0, fp
|
||||
bl OS_DisableIrqMask
|
||||
ldrh r1, [r6]
|
||||
mov r0, #4
|
||||
bic r1, r1, #0x20
|
||||
strh r1, [r6]
|
||||
bl OS_ResetRequestIrqMask
|
||||
_0207B6B4:
|
||||
ldr r7, [sl]
|
||||
mov r0, sl
|
||||
bl sub_0207B46C
|
||||
str r5, [sl]
|
||||
cmp r7, #0
|
||||
beq _0207B6D4
|
||||
ldr r0, [sl, #4]
|
||||
blx r7
|
||||
_0207B6D4:
|
||||
ldr r0, [sl, #0x1c]
|
||||
cmp r0, #0
|
||||
beq _0207B724
|
||||
ldr r0, [sl, #0x24]
|
||||
cmp r0, #0
|
||||
bne _0207B724
|
||||
str r7, [sl]
|
||||
ldr r1, [r4, #8]
|
||||
mov r0, sl
|
||||
add r1, r1, #1
|
||||
str r1, [sl, #0xc]
|
||||
bl sub_0207B3B8
|
||||
b _0207B724
|
||||
_0207B708:
|
||||
mov r0, sl
|
||||
bl sub_0207B46C
|
||||
ldr r1, [r4, #8]
|
||||
mov r0, sl
|
||||
add r1, r1, #1
|
||||
str r1, [sl, #0xc]
|
||||
bl sub_0207B3B8
|
||||
_0207B724:
|
||||
ldr sl, [r4, #0xc]
|
||||
cmp sl, #0
|
||||
bne _0207B63C
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
.align 2, 0
|
||||
_0207B734: .word 0x04000004
|
||||
_0207B738: .word OS_IRQTable
|
||||
_0207B73C: .word _022B99BC
|
||||
_0207B740: .word 0x04000006
|
||||
arm_func_end sub_0207B5CC
|
||||
|
||||
arm_func_start sub_0207B744
|
||||
sub_0207B744: ; 0x0207B744
|
||||
ldrsh r3, [r0, #0x10]
|
||||
ldr ip, [r0, #0xc]
|
||||
subs r1, r1, ip
|
||||
sub r2, r2, r3
|
||||
bmi _0207B768
|
||||
cmp r1, #0
|
||||
bne _0207B770
|
||||
cmp r2, #0
|
||||
bge _0207B770
|
||||
_0207B768:
|
||||
mov r0, #0
|
||||
bx lr
|
||||
_0207B770:
|
||||
ldrsh r0, [r0, #0x12]
|
||||
cmp r2, #0
|
||||
addlt r1, r2, #7
|
||||
addlt r2, r1, #0x100
|
||||
cmp r2, r0
|
||||
movle r0, #1
|
||||
movgt r0, #2
|
||||
bx lr
|
||||
arm_func_end sub_0207B744
|
||||
|
||||
arm_func_start sub_0207B790
|
||||
sub_0207B790: ; 0x0207B790
|
||||
stmdb sp!, {r4, lr}
|
||||
mov r4, r0
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _0207B7CC ; =_022B99BC
|
||||
ldr r2, [r1, #4]
|
||||
cmp r4, r2
|
||||
ldrlt r2, [r1, #8]
|
||||
addlt r2, r2, #1
|
||||
strlt r2, [r1, #8]
|
||||
ldr r1, _0207B7CC ; =_022B99BC
|
||||
str r4, [r1, #4]
|
||||
bl SetIrqFlag
|
||||
ldr r0, _0207B7CC ; =_022B99BC
|
||||
ldr r0, [r0, #8]
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207B7CC: .word _022B99BC
|
||||
arm_func_end sub_0207B790
|
||||
|
||||
110
lib/NitroSDK/src/os_cache.c
Normal file
110
lib/NitroSDK/src/os_cache.c
Normal file
@@ -0,0 +1,110 @@
|
||||
#include <nitro.h>
|
||||
|
||||
asm void DC_InvalidateAll(void) {
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c6, 0
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void DC_StoreAll(void) {
|
||||
mov r1, #0
|
||||
@outerLoop:
|
||||
mov r0, #0
|
||||
@innerLoop:
|
||||
orr r2, r1, r0
|
||||
mcr p15, 0, r2, c7, c10, 2
|
||||
add r0, r0, #HW_CACHE_LINE_SIZE
|
||||
cmp r0, #HW_DCACHE_SIZE / 4
|
||||
blt @innerLoop
|
||||
add r1, r1, #1 << HW_C7_CACHE_SET_NO_SHIFT
|
||||
cmp r1, #0
|
||||
bne @outerLoop
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void DC_FlushAll(void) {
|
||||
mov r12, #0
|
||||
mov r1, #0
|
||||
@outerLoop:
|
||||
mov r0, #0
|
||||
@innerLoop:
|
||||
orr r2, r1, r0
|
||||
mcr p15, 0, r12, c7, c10, 4
|
||||
mcr p15, 0, r2, c7, c14, 2
|
||||
add r0, r0, #HW_CACHE_LINE_SIZE
|
||||
cmp r0, #HW_DCACHE_SIZE / 4
|
||||
blt @innerLoop
|
||||
add r1, r1, #1 << HW_C7_CACHE_SET_NO_SHIFT
|
||||
cmp r1, #0
|
||||
bne @outerLoop
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void DC_InvalidateRange(register void * startAddr, register u32 nBytes) {
|
||||
add r1, r1, r0
|
||||
bic r0, r0, #HW_CACHE_LINE_SIZE - 1
|
||||
@loop:
|
||||
mcr p15, 0, r0, c7, c6, 1
|
||||
add r0, r0, #HW_CACHE_LINE_SIZE
|
||||
cmp r0, r1
|
||||
blt @loop
|
||||
bx lr
|
||||
}
|
||||
|
||||
|
||||
asm void DC_StoreRange(register void * startAddr, register u32 nBytes) {
|
||||
add r1, r1, r0
|
||||
bic r0, r0, #HW_CACHE_LINE_SIZE - 1
|
||||
@loop:
|
||||
mcr p15, 0, r0, c7, c10, 1
|
||||
add r0, r0, #HW_CACHE_LINE_SIZE
|
||||
cmp r0, r1
|
||||
blt @loop
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void DC_FlushRange(register void * startAddr, register u32 nBytes) {
|
||||
mov r12, #0
|
||||
add r1, r1, r0
|
||||
bic r0, r0, #HW_CACHE_LINE_SIZE - 1
|
||||
@loop:
|
||||
mcr p15, 0, r12, c7, c10, 4
|
||||
mcr p15, 0, r0, c7, c14, 1
|
||||
add r0, r0, #HW_CACHE_LINE_SIZE
|
||||
cmp r0, r1
|
||||
blt @loop
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void DC_WaitWriteBufferEmpty(void) {
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c10, 4
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm BOOL IC_Enable(void) {
|
||||
mrc p15, 0, r1, c1, c0, 0
|
||||
and r0, r1, #HW_C1_ICACHE_ENABLE
|
||||
mov r0, r0, LSR #HW_C1_ICACHE_ENABLE_SHIFT
|
||||
orr r1, r1, #HW_C1_ICACHE_ENABLE
|
||||
mcr p15, 0, r1, c1, c0, 0
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void IC_InvalidateAll(void) {
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c5, 0
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void IC_InvalidateRange(register void * startAddr, register u32 nBytes) {
|
||||
add r1, r1, r0
|
||||
bic r0, r0, #HW_CACHE_LINE_SIZE - 1
|
||||
@loop:
|
||||
mcr p15, 0, r0, c7, c5, 1
|
||||
add r0, r0, #HW_CACHE_LINE_SIZE
|
||||
cmp r0, r1
|
||||
blt @loop
|
||||
bx lr
|
||||
}
|
||||
|
||||
66
lib/NitroSDK/src/os_init.c
Normal file
66
lib/NitroSDK/src/os_init.c
Normal file
@@ -0,0 +1,66 @@
|
||||
#include <nitro.h>
|
||||
|
||||
extern void OS_InitArena();
|
||||
extern void PXI_Init();
|
||||
extern void OS_InitAlarm();
|
||||
extern void OS_InitLock();
|
||||
extern void OS_InitTick();
|
||||
extern void OS_InitArenaEx();
|
||||
extern void OS_InitIrqTable();
|
||||
extern void OS_SetIrqStackChecker();
|
||||
extern void OS_InitException();
|
||||
extern void MI_Init();
|
||||
extern void OS_InitVAlarm();
|
||||
extern void OSi_InitVramExclusive();
|
||||
extern void OS_InitThread();
|
||||
extern void OS_InitReset();
|
||||
extern void CTRDG_Init();
|
||||
extern void CARD_Init();
|
||||
extern void PM_Init();
|
||||
extern void OSi_WaitVCount0();
|
||||
|
||||
|
||||
asm void OSi_WaitVCount0(void) {
|
||||
mov r12, #HW_REG_BASE
|
||||
ldr r1, [r12, #REG_IME_OFFSET]
|
||||
str r12, [r12, #REG_IME_OFFSET]
|
||||
@spinWait:
|
||||
ldrh r0, [r12, #REG_VCOUNT_OFFSET]
|
||||
cmp r0, #0
|
||||
bne @spinWait
|
||||
str r1, [r12, #REG_IME_OFFSET]
|
||||
bx lr
|
||||
}
|
||||
|
||||
void OS_Init(void)
|
||||
{
|
||||
#ifdef SDK_ARM9
|
||||
OS_InitArena();
|
||||
PXI_Init();
|
||||
OS_InitLock();
|
||||
OS_InitArenaEx();
|
||||
OS_InitIrqTable();
|
||||
OS_SetIrqStackChecker();
|
||||
OS_InitException();
|
||||
MI_Init();
|
||||
OS_InitVAlarm();
|
||||
OSi_InitVramExclusive();
|
||||
OS_InitThread();
|
||||
OS_InitReset();
|
||||
CTRDG_Init();
|
||||
CARD_Init();
|
||||
PM_Init();
|
||||
OSi_WaitVCount0();
|
||||
#else
|
||||
OS_InitArena();
|
||||
PXI_Init();
|
||||
OS_InitLock();
|
||||
OS_InitIrqTable();
|
||||
OS_InitTick();
|
||||
OS_InitAlarm();
|
||||
OS_InitThread();
|
||||
OS_InitReset();
|
||||
CTRDG_Init();
|
||||
#endif
|
||||
}
|
||||
|
||||
19
lib/NitroSDK/src/os_protectionRegion.c
Normal file
19
lib/NitroSDK/src/os_protectionRegion.c
Normal file
@@ -0,0 +1,19 @@
|
||||
#include <nitro.h>
|
||||
|
||||
asm void OS_SetDPermissionsForProtectionRegion(register u32 setMask, register u32 flags) {
|
||||
mrc p15, 0, r2, c5, c0, 2
|
||||
bic r2, r2, r0
|
||||
orr r2, r2, r1
|
||||
mcr p15, 0, r2, c5, c0, 2
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void OS_SetProtectionRegion1(u32 param) {
|
||||
mcr p15, 0, r0, c6, c1, 0
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void OS_SetProtectionRegion2(u32 param) {
|
||||
mcr p15, 0, r0, c6, c2, 0
|
||||
bx lr
|
||||
}
|
||||
15
lib/NitroSDK/src/os_protectionUnit.c
Normal file
15
lib/NitroSDK/src/os_protectionUnit.c
Normal file
@@ -0,0 +1,15 @@
|
||||
#include <nitro.h>
|
||||
|
||||
asm void OS_EnableProtectionUnit(void) {
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
orr r0, r0, #1
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void OS_DisableProtectionUnit(void) {
|
||||
mrc p15, 0, r0, c1, c0, 0
|
||||
bic r0, r0, #1
|
||||
mcr p15, 0, r0, c1, c0, 0
|
||||
bx lr
|
||||
}
|
||||
81
lib/NitroSDK/src/os_system.c
Normal file
81
lib/NitroSDK/src/os_system.c
Normal file
@@ -0,0 +1,81 @@
|
||||
#include <nitro.h>
|
||||
#include <nitro/os/common/interrupt_shared.h>
|
||||
|
||||
asm OSIntrMode ClearIrqFlag()
|
||||
{
|
||||
mrs r0, cpsr
|
||||
bic r1, r0, #HW_PSR_IRQ_DISABLE
|
||||
msr cpsr_c, r1
|
||||
and r0, r0, #HW_PSR_IRQ_DISABLE
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm OSIntrMode EnableIrqFlag()
|
||||
{
|
||||
mrs r0, cpsr
|
||||
orr r1, r0, #HW_PSR_IRQ_DISABLE
|
||||
msr cpsr_c, r1
|
||||
and r0, r0, #HW_PSR_IRQ_DISABLE
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm OSIntrMode SetIrqFlag(u8 flag)
|
||||
{
|
||||
mrs r1, cpsr
|
||||
bic r2, r1, #HW_PSR_IRQ_DISABLE
|
||||
orr r2, r2, r0
|
||||
msr cpsr_c, r2
|
||||
and r0, r1, #HW_PSR_IRQ_DISABLE
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm OSIntrMode EnableIrqFiqFlags(void)
|
||||
{
|
||||
mrs r0, cpsr
|
||||
orr r1, r0, #HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE
|
||||
msr cpsr_c, r1
|
||||
and r0, r0, #HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm OSIntrMode SetIrqFiqFlags(u8 flags)
|
||||
{
|
||||
mrs r1, cpsr
|
||||
bic r2, r1, #HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE
|
||||
orr r2, r2, r0
|
||||
msr cpsr_c, r2
|
||||
and r0, r1, #HW_PSR_IRQ_DISABLE | HW_PSR_FIQ_DISABLE
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm OSIntrMode GetIrqFlag()
|
||||
{
|
||||
mrs r0, cpsr
|
||||
and r0, r0, #HW_PSR_IRQ_DISABLE
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm OSProcMode GetProcessorMode()
|
||||
{
|
||||
mrs r0, cpsr
|
||||
and r0, r0, #HW_PSR_CPU_MODE_MASK
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void sub_0207B854(u32 cycles) // OS_SpinWait
|
||||
{
|
||||
@loop
|
||||
subs r0, r0, #4
|
||||
bhs @loop
|
||||
bx lr
|
||||
}
|
||||
|
||||
void SVC_WaitByLoop(s32);
|
||||
void sub_02078900(BOOL, s32);
|
||||
|
||||
void sub_0207B860(void) // OS_WaitVBlankIntr
|
||||
{
|
||||
SVC_WaitByLoop(1);
|
||||
sub_02078900(TRUE, OS_IE_VBLANK);
|
||||
}
|
||||
|
||||
8
lib/NitroSDK/src/os_tcm.c
Normal file
8
lib/NitroSDK/src/os_tcm.c
Normal file
@@ -0,0 +1,8 @@
|
||||
#include <nitro.h>
|
||||
|
||||
asm u32 OS_GetDTCMAddress(void) {
|
||||
mrc p15, 0, r0, c9, c1, 0
|
||||
ldr r1, =0xFFFFF000
|
||||
and r0, r0, r1
|
||||
bx lr
|
||||
}
|
||||
@@ -1,5 +1,4 @@
|
||||
#include "main_0207BC20.h"
|
||||
#include "main_0207B848.h"
|
||||
#include <nitro.h>
|
||||
|
||||
void WaitForever2(void)
|
||||
{
|
||||
8
lib/NitroSDK/src/os_timer.c
Normal file
8
lib/NitroSDK/src/os_timer.c
Normal file
@@ -0,0 +1,8 @@
|
||||
#include <nitro.h>
|
||||
|
||||
//static u16 OSi_TimerReserved = 0;
|
||||
extern u16 OSi_TimerReserved;
|
||||
|
||||
void OSi_SetTimerReserved(s32 timerNum) {
|
||||
OSi_TimerReserved |= (1 << timerNum);
|
||||
}
|
||||
39
lib/NitroSDK/src/os_vramExclusive.c
Normal file
39
lib/NitroSDK/src/os_vramExclusive.c
Normal file
@@ -0,0 +1,39 @@
|
||||
#include <nitro.h>
|
||||
|
||||
extern u32 OSi_vramExclusive;
|
||||
extern u16 OSi_vramLockId[9];
|
||||
|
||||
asm u32 OsCountZeroBits(u32 bitmap) {
|
||||
clz r0, r0
|
||||
bx lr
|
||||
}
|
||||
|
||||
void OSi_InitVramExclusive(void) {
|
||||
int i;
|
||||
|
||||
OSi_vramExclusive = 0;
|
||||
for (i = 0; i < 9; i++) {
|
||||
OSi_vramLockId[i] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
void OSi_UnlockVram(u16 bank, u16 lockId) {
|
||||
u32 workMap;
|
||||
s32 zeroBits;
|
||||
OSIntrMode enabled = EnableIrqFlag();
|
||||
|
||||
workMap = bank & OSi_vramExclusive & 0x1FF;
|
||||
while (TRUE) {
|
||||
zeroBits = 31 - OsCountZeroBits(workMap);
|
||||
if (zeroBits < 0) {
|
||||
break;
|
||||
}
|
||||
workMap &= ~(1 << zeroBits);
|
||||
if (OSi_vramLockId[zeroBits] == lockId) {
|
||||
OSi_vramLockId[zeroBits] = 0;
|
||||
OSi_vramExclusive &= ~(1 << zeroBits);
|
||||
}
|
||||
}
|
||||
SetIrqFlag(enabled);
|
||||
}
|
||||
|
||||
43
lib/asm/include/nitro.inc
Normal file
43
lib/asm/include/nitro.inc
Normal file
@@ -0,0 +1,43 @@
|
||||
#pragma once
|
||||
.public _020AEBF8
|
||||
.public _020B2BB0
|
||||
.public _022B99EC
|
||||
.public _022B99F0
|
||||
.public _022B9A20
|
||||
.public _022B9A44
|
||||
.public _022B9A80
|
||||
.public _022B9D00
|
||||
.public _022BAA20
|
||||
.public _022BB4E8
|
||||
.public _022BB500
|
||||
.public _022BB560
|
||||
.public _022BB564
|
||||
.public _022BB568
|
||||
.public ARM9_UNKNOWN_TABLE__NA_20AE924
|
||||
.public DC_FlushRange
|
||||
.public DC_InvalidateRange
|
||||
.public EnableIrqFlag
|
||||
.public FileInit
|
||||
.public InitDmaTransfer_Standard
|
||||
.public OS_EnableIrqMask
|
||||
.public OS_InitMutex
|
||||
.public OS_ResetRequestIrqMask
|
||||
.public OS_SetIrqFunction
|
||||
.public OS_SleepThread
|
||||
.public SetIrqFlag
|
||||
.public sub_01FF9AA8
|
||||
.public sub_01FF9B18
|
||||
.public sub_01FF9B3C
|
||||
.public sub_02078BAC
|
||||
.public sub_020798D8
|
||||
.public sub_02079D98
|
||||
.public sub_0207A048
|
||||
.public sub_0207A0CC
|
||||
.public DC_StoreRange
|
||||
.public sub_0207B854
|
||||
.public sub_0207C1E0
|
||||
.public WaitForever2
|
||||
.public MI_SetWramBank
|
||||
.public MIi_CheckDma0SourceAddress
|
||||
.public MI_StopDma
|
||||
.public MI_CpuCopy8
|
||||
File diff suppressed because it is too large
Load Diff
@@ -2,5 +2,7 @@
|
||||
#define NITRO_H_
|
||||
|
||||
#include <nitro/types.h>
|
||||
#include <nitro/os.h>
|
||||
#include <nitro/cp.h>
|
||||
|
||||
#endif //NITRO_H_
|
||||
|
||||
6
lib/include/nitro/cp.h
Normal file
6
lib/include/nitro/cp.h
Normal file
@@ -0,0 +1,6 @@
|
||||
#ifndef NITRO_CP_H_
|
||||
#define NITRO_CP_H_
|
||||
|
||||
#include <nitro/cp/context.h>
|
||||
|
||||
#endif //NITRO_CP_H_
|
||||
17
lib/include/nitro/cp/context.h
Normal file
17
lib/include/nitro/cp/context.h
Normal file
@@ -0,0 +1,17 @@
|
||||
#ifndef NITRO_CP_CONTEXT_H_
|
||||
#define NITRO_CP_CONTEXT_H_
|
||||
|
||||
#include <nitro/types.h>
|
||||
|
||||
typedef struct CPContext {
|
||||
u64 div_numer;
|
||||
u64 div_denom;
|
||||
u64 sqrt;
|
||||
u16 div_mode;
|
||||
u16 sqrt_mode;
|
||||
} CPContext;
|
||||
|
||||
void CP_SaveContext(register CPContext *context);
|
||||
void CPi_RestoreContext(register CPContext *context);
|
||||
|
||||
#endif //NITRO_CP_CONTEXT_H_
|
||||
2067
lib/include/nitro/hw/ARM7/io_reg.h
Normal file
2067
lib/include/nitro/hw/ARM7/io_reg.h
Normal file
File diff suppressed because it is too large
Load Diff
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user