Cleaned out extra library code

This commit is contained in:
AnonymousRandomPerson 2023-07-10 21:26:59 -04:00
parent 777b3ff146
commit 80956ec169
395 changed files with 1337 additions and 117398 deletions

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@ -14,9 +14,6 @@ include filesystem.mk
$(ASM_OBJS): MWASFLAGS += -DPM_ASM -include config.h
$(BUILD_DIR)/asm/nitrocrypto.o: MWCCVER := 1.2/sp2p3
$(BUILD_DIR)/lib/msl/src/*.o: EXCCFLAGS := -Cpp_exceptions on
$(ASM_OBJS): $(WORK_DIR)/include/config.h
$(C_OBJS): $(WORK_DIR)/include/global.h
@ -57,14 +54,14 @@ sub: ; @$(MAKE) -C sub
ROMSPEC := rom.rsf
MAKEROM_FLAGS := $(DEFINES)
$(SBIN_LZ): $(BUILD_DIR)/component.files
$(COMPSTATIC) -9 -c -f $<
$(NEF): libsyscall
libsyscall:
$(MAKE) -C lib/syscall all install INSTALL_PREFIX=$(abspath $(WORK_DIR)/$(BUILD_DIR)) GAME_CODE=$(GAME_CODE)
$(SBIN_LZ): $(BUILD_DIR)/component.files
$(COMPSTATIC) -9 -c -f $<
$(BUILD_DIR)/component.files: main ;
$(HEADER_TEMPLATE): ;
@ -79,14 +76,6 @@ endif
$(BANNER): $(BANNER_SPEC) $(ICON_PNG:%.png=%.nbfp) $(ICON_PNG:%.png=%.nbfc)
$(WINE) $(MAKEBNR) $< $@
# TODO: move to NitroSDK makefile
FX_CONST_H := $(WORK_DIR)/lib/include/nitro/fx/fx_const.h
PROJECT_CLEAN_TARGETS += $(FX_CONST_H)
$(FX_CONST_H): $(TOOLSDIR)/gen_fx_consts/fx_const.csv
$(MKFXCONST) $@
sdk: $(FX_CONST_H)
$(WORK_DIR)/include/global.h: $(FX_CONST_H) ;
compare: @$(MAKE) COMPARE=1
.PHONY: compare

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public IsMonster__0231A9D4
.public sub_0207A238

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public ov00_022C23EC
.public ov00_02310C18
@ -60,3 +59,9 @@
.public sub_01FF97CC
.public GetKeyN2MSwitch
.public sub_01FF8D0C
.public sub_02000088
.public MIi_UncompressBackward
.public OSi_ReferSymbol
.public sub_0200078E
.public _start_ModuleParams
.public _start_AutoloadDoneCallback

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@ -1,9 +0,0 @@
#include <nitro/fs/overlay.h>
#pragma once
.public _version_NINTENDO_DWC
.public _version_NINTENDO_WiFi
.public _version_UBIQUITOUS_CPS
.public _version_UBIQUITOUS_SSL
.public _version_Abiosso_libVCT
.public _version_NINTENDO_BACKUP
.public _version_NINTENDO_DWC_LOBBY

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public ov00_0233103C
.public sub_02079940
@ -57,7 +56,7 @@
.public sub_0208B360
.public Wcslen
.public sub_02085074
.public sub_02000B9C
.public OSi_ReferSymbol
.public Strcpy
.public sub_0207C2B8
.public sub_02008F64

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public DebugPrint0__0200C1FC
.public ov00_022EF548

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_0207CB14
.public sub_0207911C

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_02003BFC
.public sub_0208FE48

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_0202E6E4
.public sub_0204316C

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_02055E14
.public ov01_02338C4C

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public GetHeldButtons
.public ov01_02338E54

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_02026214
.public ov01_02337D00

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public ov00_022C4718
.public sub_02046BE8

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public ShowMessageInDBox
.public sub_0202A66C

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_02032A38
.public sub_020331AC

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public ov10_022C0998
.public sub_02055410

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_02048764
.public CreateDBox

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public ov11_022F7064
.public ov11_022F6F08

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public ShowDBox
.public sub_02039B0C

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_0202836C
.public ShowPortraitBox

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public FreeNormalMenu
.public CreateNormalMenu

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_020572EC
.public sub_020182B8

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_0203EFD4
.public sub_020117C0

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_020125CC
.public sub_0202C70C

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public MemAlloc
.public SetPortraitUnknownAttr

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_0204426C
.public GetNbItemsInBag

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_0200D670
.public CreateDBox

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public ShowDBox
.public Rand16Bit

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_0202E6E4
.public ov11_0230BCF8

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_0205633C
.public IsMoneyAllowed

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_02042CF0
.public sub_0200D670

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_020276C0
.public Strcpy

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public ov31_02388714
.public ov10_022BEC94

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public ov29_022DEA10
.public sub_02029FBC

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public ov29_0234FB6C
.public GetRecruitRate2

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@ -1,4 +1,3 @@
#include <nitro/fs/overlay.h>
#pragma once
.public sub_02008F64
.public sub_02002878

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@ -138,8 +138,8 @@ _02000792:
.byte 0xAF, 0xBF, 0xA0, 0x34, 0xC5, 0xD4, 0xDE, 0x28, 0x1E, 0xEF, 0x93, 0xD2, 0x85, 0x83, 0x49, 0x41
.byte 0xA6, 0x20, 0x03, 0x5E, 0xAA, 0xB6, 0x53, 0x4A, 0xE1, 0x86, 0xDB, 0x3A, 0xF3, 0xC5, 0x00, 0x00
arm_func_start NitroMain
NitroMain: ; 0x02000800
arm_func_start _start
_start: ; 0x02000800
mov ip, #0x4000000
str ip, [ip, #0x208]
_02000808:
@ -181,11 +181,11 @@ _02000854:
ldr r1, _0200093C ; =0x07000000
mov r2, #0x400
bl sub_02000954
ldr r1, _02000940 ; =0x02000BA0
ldr r1, _02000940 ; =_start_ModuleParams
ldr r0, [r1, #0x14]
bl sub_02000970
bl sub_02000A1C
ldr r0, _02000940 ; =0x02000BA0
bl MIi_UncompressBackward
bl do_autoload
ldr r0, _02000940 ; =_start_ModuleParams
ldr r1, [r0, #0xc]
ldr r2, [r0, #0x10]
mov r3, r1
@ -230,12 +230,12 @@ _02000930: .word 0x027E0000
_02000934: .word 0x00000800
_02000938: .word 0x05000000
_0200093C: .word 0x07000000
_02000940: .word 0x02000BA0
_02000940: .word _start_ModuleParams
_02000944: .word 0x027FFF9C
_02000948: .word 0x01FF95E8
_0200094C: .word 0x02000C6C
_02000950: .word 0xFFFF0000
arm_func_end NitroMain
arm_func_end _start
arm_func_start sub_02000954
sub_02000954: ; 0x02000954
@ -251,8 +251,8 @@ _02000968:
bx lr
arm_func_end sub_02000954
arm_func_start sub_02000970
sub_02000970: ; 0x02000970
arm_func_start MIi_UncompressBackward
MIi_UncompressBackward: ; 0x02000970
cmp r0, #0
beq _02000A18
stmdb sp!, {r4, r5, r6, r7}
@ -304,11 +304,11 @@ _020009FC:
ldmdb sp!, {r4, r5, r6, r7}
_02000A18:
bx lr
arm_func_end sub_02000970
arm_func_end MIi_UncompressBackward
arm_func_start sub_02000A1C
sub_02000A1C: ; 0x02000A1C
ldr r0, _02000AA8 ; =0x02000BA0
arm_func_start do_autoload
do_autoload: ; 0x02000A1C
ldr r0, _02000AA8 ; =_start_ModuleParams
ldr r1, [r0]
ldr r2, [r0, #4]
ldr r3, [r0, #8]
@ -353,12 +353,15 @@ _02000A88:
blt _02000A88
b _02000A2C
_02000AA4:
b _02000AAC
b _start_AutoloadDoneCallback
.align 2, 0
_02000AA8: .word 0x02000BA0
_02000AAC:
_02000AA8: .word _start_ModuleParams
arm_func_end do_autoload
arm_func_start _start_AutoloadDoneCallback
_start_AutoloadDoneCallback:
bx lr
arm_func_end sub_02000A1C
arm_func_end _start_AutoloadDoneCallback
arm_func_start sub_02000AB0
sub_02000AB0: ; 0x02000AB0
@ -428,11 +431,11 @@ sub_02000B98: ; 0x02000B98
bx lr
arm_func_end sub_02000B98
arm_func_start sub_02000B9C
sub_02000B9C: ; 0x02000B9C
arm_func_start OSi_ReferSymbol
OSi_ReferSymbol: ; 0x02000B9C
bx lr
arm_func_end sub_02000B9C
_02000BA0:
arm_func_end OSi_ReferSymbol
_start_ModuleParams:
.byte 0xE0, 0x73, 0x0B, 0x02, 0xF8, 0x73, 0x0B, 0x02, 0x80, 0x33, 0x0B, 0x02, 0x80, 0x33, 0x0B, 0x02
.byte 0x80, 0xCA, 0x2B, 0x02, 0x00, 0x00, 0x00, 0x00, 0x34, 0x75, 0x02, 0x04, 0x21, 0x06, 0xC0, 0xDE
.byte 0xDE, 0xC0, 0x06, 0x21, 0x5B, 0x53, 0x44, 0x4B, 0x2B, 0x4E, 0x49, 0x4E, 0x54, 0x45, 0x4E, 0x44
@ -445,30 +448,107 @@ _02000BA0:
.byte 0x00, 0x00, 0x00, 0x00, 0x5B, 0x53, 0x44, 0x4B, 0x2B, 0x4E, 0x49, 0x4E, 0x54, 0x45, 0x4E, 0x44
.byte 0x4F, 0x3A, 0x44, 0x57, 0x43, 0x33, 0x2E, 0x31, 0x2E, 0x33, 0x30, 0x30, 0x30, 0x34, 0x2E, 0x32
.byte 0x30, 0x30, 0x38, 0x31, 0x31, 0x30, 0x34, 0x2E, 0x31, 0x37, 0x30, 0x30, 0x5F, 0x44, 0x57, 0x43
.byte 0x5F, 0x33, 0x5F, 0x31, 0x5F, 0x50, 0x4C, 0x55, 0x53, 0x34, 0x5D, 0x00, 0x10, 0x40, 0x2D, 0xE9
.byte 0x08, 0xD0, 0x4D, 0xE2, 0xBC, 0xE5, 0x01, 0xEB, 0x12, 0x00, 0xA0, 0xE3, 0xDD, 0x09, 0x02, 0xEB
.byte 0x48, 0x01, 0x9F, 0xE5, 0x53, 0x0E, 0x02, 0xEB, 0x31, 0xE8, 0x01, 0xEB, 0xF7, 0xD4, 0x01, 0xEB
.byte 0x00, 0x00, 0xE0, 0xE3, 0xC8, 0xF9, 0x01, 0xEB, 0x60, 0xE5, 0x01, 0xEB, 0x9A, 0xE5, 0x01, 0xEB
.byte 0x00, 0x00, 0xA0, 0xE3, 0x1E, 0xE6, 0x01, 0xEB, 0x00, 0x40, 0xA0, 0xE1, 0x00, 0x00, 0xA0, 0xE3
.byte 0x20, 0xE6, 0x01, 0xEB, 0x04, 0x20, 0xA0, 0xE1, 0x00, 0x10, 0xA0, 0xE1, 0x10, 0x01, 0x9F, 0xE5
.byte 0x4D, 0x2D, 0x00, 0xEB, 0x00, 0x00, 0xA0, 0xE3, 0x15, 0xE6, 0x01, 0xEB, 0x00, 0x40, 0xA0, 0xE1
.byte 0x00, 0x00, 0xA0, 0xE3, 0x17, 0xE6, 0x01, 0xEB, 0x04, 0x00, 0x50, 0xE1, 0x18, 0x00, 0x00, 0x2A
.byte 0x00, 0x00, 0xA0, 0xE3, 0x0E, 0xE6, 0x01, 0xEB, 0x00, 0x40, 0xA0, 0xE1, 0x00, 0x00, 0xA0, 0xE3
.byte 0x10, 0xE6, 0x01, 0xEB, 0x00, 0x10, 0xA0, 0xE1, 0x04, 0x20, 0xA0, 0xE1, 0x00, 0x00, 0xA0, 0xE3
.byte 0x01, 0x30, 0xA0, 0xE3, 0x20, 0xE7, 0x01, 0xEB, 0x00, 0x10, 0xA0, 0xE1, 0x00, 0x00, 0xA0, 0xE3
.byte 0x75, 0xE6, 0x01, 0xEB, 0x00, 0x00, 0xA0, 0xE3, 0x01, 0xE6, 0x01, 0xEB, 0x00, 0x40, 0xA0, 0xE1
.byte 0x00, 0x00, 0xA0, 0xE3, 0x03, 0xE6, 0x01, 0xEB, 0x04, 0x20, 0xA0, 0xE1, 0x00, 0x10, 0xA0, 0xE1
.byte 0x00, 0x00, 0xA0, 0xE3, 0x3E, 0xE7, 0x01, 0xEB, 0x00, 0x10, 0xA0, 0xE1, 0x00, 0x00, 0xA0, 0xE3
.byte 0x05, 0xE7, 0x01, 0xEB, 0x8C, 0x20, 0x9F, 0xE5, 0x01, 0x00, 0xA0, 0xE3, 0xB0, 0x10, 0xD2, 0xE1
.byte 0xB0, 0x00, 0xC2, 0xE1, 0x9D, 0xEA, 0x01, 0xEB, 0x13, 0x20, 0x00, 0xEB, 0x00, 0x00, 0x8D, 0xE2
.byte 0x21, 0xEB, 0x01, 0xEB, 0x02, 0x10, 0xDD, 0xE5, 0x03, 0x00, 0xDD, 0xE5, 0x00, 0x30, 0xDD, 0xE5
.byte 0x01, 0x20, 0xDD, 0xE5, 0x81, 0x00, 0x60, 0xE1, 0x93, 0x02, 0x20, 0xE0, 0x04, 0x20, 0xDD, 0xE5
.byte 0x05, 0x10, 0xDD, 0xE5, 0x92, 0x01, 0x20, 0xE0, 0x26, 0x05, 0x00, 0xEB, 0xD4, 0x05, 0x00, 0xEB
.byte 0xC5, 0x06, 0x00, 0xEB, 0xEC, 0x06, 0x00, 0xEB, 0x3E, 0x07, 0x00, 0xEB, 0xA2, 0x07, 0x00, 0xEB
.byte 0x59, 0x08, 0x00, 0xEB, 0x1C, 0x09, 0x00, 0xEB, 0xC9, 0x2C, 0x00, 0xEB, 0x81, 0x08, 0x00, 0xEB
.byte 0x24, 0x00, 0x9F, 0xE5, 0x4E, 0x1D, 0x00, 0xEB, 0x04, 0x26, 0x01, 0xEB, 0x42, 0x0C, 0x00, 0xEB
.byte 0x58, 0x09, 0x00, 0xEB, 0x92, 0xE3, 0x01, 0xEB, 0x98, 0xEB, 0x01, 0xEB, 0xFD, 0xFF, 0xFF, 0xEA
.byte 0xD4, 0x24, 0x00, 0x02, 0x48, 0x24, 0x09, 0x02, 0x08, 0x02, 0x00, 0x04, 0x60, 0x24, 0x09, 0x02
.byte 0x5F, 0x33, 0x5F, 0x31, 0x5F, 0x50, 0x4C, 0x55, 0x53, 0x34, 0x5D, 0x00
arm_func_start NitroMain
NitroMain: ; 0x02000C6C
stmdb sp!, {r4, lr}
sub sp, sp, #8
bl sub_0207A36C
mov r0, #0x12
bl sub_020833F8
ldr r0, _02000DD0 ; =0x020024D4
bl sub_020845D8
bl sub_0207AD54
bl sub_02076070
mvn r0, #0
bl sub_0207F3BC
bl sub_0207A220
bl sub_0207A30C
mov r0, #0
bl sub_0207A524
mov r4, r0
mov r0, #0
bl sub_0207A538
mov r2, r4
mov r1, r0
ldr r0, _02000DD4 ; =0x02092448
bl DebugPrint0__0200C1FC
mov r0, #0
bl sub_0207A524
mov r4, r0
mov r0, #0
bl sub_0207A538
cmp r0, r4
bhs _02000D44
mov r0, #0
bl sub_0207A524
mov r4, r0
mov r0, #0
bl sub_0207A538
mov r1, r0
mov r2, r4
mov r0, #0
mov r3, #1
bl sub_0207A98C
mov r1, r0
mov r0, #0
bl sub_0207A6EC
mov r0, #0
bl sub_0207A524
mov r4, r0
mov r0, #0
bl sub_0207A538
mov r2, r4
mov r1, r0
mov r0, #0
bl sub_0207AA34
mov r1, r0
mov r0, #0
bl sub_0207A95C
_02000D44:
ldr r2, _02000DD8 ; =0x04000208
mov r0, #1
ldrh r1, [r2]
strh r0, [r2]
bl ClearIrqFlag
bl sub_02008DAC
add r0, sp, #0
bl sub_0207B9EC
ldrb r1, [sp, #2]
ldrb r0, [sp, #3]
ldrb r3, [sp]
ldrb r2, [sp, #1]
smulbb r0, r1, r0
mla r0, r3, r2, r0
ldrb r2, [sp, #4]
ldrb r1, [sp, #5]
mla r0, r2, r1, r0
bl sub_02002228
bl sub_020024E4
bl sub_020028AC
bl sub_0200294C
bl sub_02002A98
bl sub_02002C2C
bl sub_02002F0C
bl InitMemAllocTableVeneer
bl sub_0200C0D4
bl sub_02002FB8
ldr r0, _02000DDC ; =0x02092460
bl sub_020082F4
bl sub_0204A5D0
bl sub_02003ECC
bl TaskProcBoot
bl sub_02079C14
_02000DC8:
bl WaitForInterrupt
b _02000DC8
.align 2, 0
_02000DD0: .word 0x020024D4
_02000DD4: .word 0x02092448
_02000DD8: .word 0x04000208
_02000DDC: .word 0x02092460
arm_func_end NitroMain
arm_func_start InitMemAllocTable
InitMemAllocTable: ; 0x02000DE0
@ -2044,8 +2124,11 @@ ClampedLn: ; 0x020021F4
_02002220: .word 0x000007FF
_02002224: .word 0x02091448
arm_func_end ClampedLn
_02002228:
.byte 0x1E, 0xFF, 0x2F, 0xE1
arm_func_start sub_02002228
sub_02002228: ; 0x02002228
bx lr
arm_func_end sub_02002228
arm_func_start GetRngSeed
GetRngSeed: ; 0x0200222C
@ -2637,8 +2720,11 @@ _020028A4:
mov r0, #0
ldmdb sp!, {r4, pc}
arm_func_end sub_02002878
_020028AC:
.byte 0x1E, 0xFF, 0x2F, 0xE1
arm_func_start sub_020028AC
sub_020028AC: ; 0x020028AC
bx lr
arm_func_end sub_020028AC
arm_func_start sub_020028B0
sub_020028B0: ; 0x020028B0
@ -2698,8 +2784,11 @@ _02002944:
mov r0, #0
ldmdb sp!, {r4, pc}
arm_func_end sub_02002910
_0200294C:
.byte 0x1E, 0xFF, 0x2F, 0xE1
arm_func_start sub_0200294C
sub_0200294C: ; 0x0200294C
bx lr
arm_func_end sub_0200294C
arm_func_start sub_02002950
sub_02002950: ; 0x02002950
@ -2805,8 +2894,11 @@ sub_02002A44: ; 0x02002A44
.align 2, 0
_02002A94: .word 0x022B966C
arm_func_end sub_02002A44
_02002A98:
.byte 0x1E, 0xFF, 0x2F, 0xE1
arm_func_start sub_02002A98
sub_02002A98: ; 0x02002A98
bx lr
arm_func_end sub_02002A98
arm_func_start sub_02002A9C
sub_02002A9C: ; 0x02002A9C
@ -2938,9 +3030,16 @@ sub_02002BD0: ; 0x02002BD0
.align 2, 0
_02002C28: .word 0x022B966C
arm_func_end sub_02002BD0
_02002C2C:
.byte 0x04, 0xC0, 0x9F, 0xE5
.byte 0x04, 0x00, 0x9F, 0xE5, 0x1C, 0xFF, 0x2F, 0xE1, 0x30, 0xA0, 0x07, 0x02, 0xF8, 0xB0, 0x29, 0x02
arm_func_start sub_02002C2C
sub_02002C2C: ; 0x02002C2C
ldr ip, _02002C38 ; =sub_0207A030
ldr r0, _02002C3C ; =0x0229B0F8
bx ip
.align 2, 0
_02002C38: .word sub_0207A030
_02002C3C: .word 0x0229B0F8
arm_func_end sub_02002C2C
arm_func_start sub_02002C40
sub_02002C40: ; 0x02002C40
@ -4460,8 +4559,11 @@ _02003EC0: .word 0x020AEF7C
_02003EC4: .word 0x020AF050
_02003EC8: .word 0x02092540
arm_func_end HaltProcessDisp
_02003ECC:
.byte 0x1E, 0xFF, 0x2F, 0xE1
arm_func_start sub_02003ECC
sub_02003ECC: ; 0x02003ECC
bx lr
arm_func_end sub_02003ECC
arm_func_start OverlayIsLoaded
OverlayIsLoaded: ; 0x02003ED0
@ -8140,16 +8242,45 @@ sub_02006FB8: ; 0x02006FB8
.align 2, 0
_02007000: .word 0x02092798
arm_func_end sub_02006FB8
_02007004:
.byte 0x70, 0x40, 0x2D, 0xE9, 0x00, 0x60, 0xB0, 0xE1, 0x13, 0x00, 0x00, 0x0A
.byte 0x3A, 0x10, 0xA0, 0xE3, 0xD3, 0xEC, 0xFF, 0xEB, 0x00, 0x40, 0xB0, 0xE1, 0x08, 0x00, 0x00, 0x0A
.byte 0x06, 0x50, 0x44, 0xE0, 0x48, 0x00, 0x9F, 0xE5, 0x06, 0x10, 0xA0, 0xE1, 0x05, 0x20, 0xA0, 0xE1
.byte 0xC9, 0x09, 0x02, 0xEB, 0x38, 0x00, 0x9F, 0xE5, 0x00, 0x10, 0xA0, 0xE3, 0x05, 0x10, 0xC0, 0xE7
.byte 0x01, 0x60, 0x84, 0xE2, 0xD0, 0x00, 0xD6, 0xE1, 0x00, 0x00, 0x50, 0xE3, 0x03, 0x00, 0x00, 0x0A
.byte 0x20, 0x00, 0x9F, 0xE5, 0x20, 0x10, 0x9F, 0xE5, 0x06, 0x20, 0xA0, 0xE1, 0x48, 0x09, 0x02, 0xEB
.byte 0x18, 0x00, 0x9F, 0xE5, 0x08, 0x10, 0x9F, 0xE5, 0x08, 0x20, 0x9F, 0xE5, 0x62, 0x14, 0x00, 0xEB
.byte 0x70, 0x80, 0xBD, 0xE8, 0xB8, 0xF2, 0x0A, 0x02, 0xC4, 0xF2, 0x0A, 0x02, 0xB8, 0x27, 0x09, 0x02
.byte 0xBC, 0x27, 0x09, 0x02
arm_func_start sub_02007004
sub_02007004: ; 0x02007004
stmdb sp!, {r4, r5, r6, lr}
movs r6, r0
beq _02007060
mov r1, #0x3a
bl sub_02002368
movs r4, r0
beq _02007044
sub r5, r4, r6
ldr r0, _02007074 ; =0x020AF2B8
mov r1, r6
mov r2, r5
bl Strncpy
ldr r0, _02007074 ; =0x020AF2B8
mov r1, #0
strb r1, [r0, r5]
add r6, r4, #1
_02007044:
ldrsb r0, [r6]
cmp r0, #0
beq _02007060
ldr r0, _02007078 ; =0x020AF2C4
ldr r1, _0200707C ; =0x020927B8
mov r2, r6
bl Sprintf
_02007060:
ldr r0, _02007080 ; =0x020927BC
ldr r1, _02007074 ; =0x020AF2B8
ldr r2, _02007078 ; =0x020AF2C4
bl DebugPrint0__0200C1FC
ldmdb sp!, {r4, r5, r6, pc}
.align 2, 0
_02007074: .word 0x020AF2B8
_02007078: .word 0x020AF2C4
_0200707C: .word 0x020927B8
_02007080: .word 0x020927BC
arm_func_end sub_02007004
arm_func_start sub_02007084
sub_02007084: ; 0x02007084
@ -8393,8 +8524,11 @@ sub_0200733C: ; 0x0200733C
bl sub_02007254
ldmdb sp!, {r3, r4, r5, pc}
arm_func_end sub_0200733C
_02007380:
.byte 0x1E, 0xFF, 0x2F, 0xE1
arm_func_start sub_02007380
sub_02007380: ; 0x02007380
bx lr
arm_func_end sub_02007380
arm_func_start sub_02007384
sub_02007384: ; 0x02007384
@ -9517,29 +9651,98 @@ sub_020082E0: ; 0x020082E0
.align 2, 0
_020082F0: .word 0x020AF360
arm_func_end sub_020082E0
_020082F4:
.byte 0xF0, 0x41, 0x2D, 0xE9, 0x00, 0x80, 0xA0, 0xE1, 0x0C, 0x01, 0x9F, 0xE5
.byte 0x08, 0x10, 0xA0, 0xE3, 0x0A, 0xEB, 0xFF, 0xEB, 0x04, 0x01, 0x9F, 0xE5, 0x4B, 0xEA, 0xFF, 0xEB
.byte 0xFC, 0x00, 0x9F, 0xE5, 0x08, 0x10, 0xA0, 0xE3, 0x63, 0xEA, 0xFF, 0xEB, 0xF0, 0x00, 0x9F, 0xE5
.byte 0xDC, 0xEA, 0xFF, 0xEB, 0x08, 0x10, 0xA0, 0xE3, 0xE8, 0x00, 0x9F, 0xE5, 0x01, 0x20, 0xA0, 0xE1
.byte 0xD9, 0xE9, 0xFF, 0xEB, 0xE0, 0x00, 0x9F, 0xE5, 0x08, 0x10, 0xA0, 0xE3, 0x00, 0x20, 0xA0, 0xE3
.byte 0xD5, 0xE9, 0xFF, 0xEB, 0xD4, 0x00, 0x9F, 0xE5, 0x80, 0xE9, 0xFF, 0xEB, 0xD0, 0x00, 0x9F, 0xE5
.byte 0x3A, 0xEA, 0xFF, 0xEB, 0xCC, 0x00, 0x9F, 0xE5, 0x01, 0x10, 0xA0, 0xE3, 0x00, 0x20, 0xA0, 0xE3
.byte 0xCD, 0xE9, 0xFF, 0xEB, 0x02, 0x0B, 0xA0, 0xE3, 0xF3, 0x10, 0x40, 0xE2, 0x7F, 0xE3, 0xFF, 0xEB
.byte 0x00, 0x60, 0xA0, 0xE1, 0xB0, 0x00, 0x9F, 0xE5, 0x00, 0x70, 0xA0, 0xE3, 0xAC, 0x40, 0x9F, 0xE5
.byte 0x00, 0x60, 0x80, 0xE5, 0x07, 0x50, 0xA0, 0xE1, 0x06, 0x00, 0xA0, 0xE1, 0x05, 0x10, 0xA0, 0xE1
.byte 0x05, 0x20, 0xA0, 0xE1, 0x04, 0x30, 0xA0, 0xE1, 0x78, 0x01, 0x00, 0xEB, 0x01, 0x70, 0x87, 0xE2
.byte 0x08, 0x00, 0x57, 0xE3, 0x01, 0x6C, 0x86, 0xE2, 0xF6, 0xFF, 0xFF, 0xBA, 0x08, 0x00, 0xA0, 0xE1
.byte 0x13, 0xFB, 0xFF, 0xEB, 0xCF, 0xFA, 0xFF, 0xEB, 0xF0, 0xFB, 0xFF, 0xEB, 0xF0, 0xFB, 0xFF, 0xEB
.byte 0x6C, 0x00, 0x9F, 0xE5, 0x8C, 0x0F, 0x00, 0xEB, 0x02, 0xFC, 0xFF, 0xEB, 0x64, 0x00, 0x9F, 0xE5
.byte 0x89, 0x0F, 0x00, 0xEB, 0x60, 0x00, 0x9F, 0xE5, 0x60, 0x10, 0x9F, 0xE5, 0x08, 0x00, 0x90, 0xE5
.byte 0x62, 0xE3, 0xFF, 0xEB, 0x50, 0x20, 0x9F, 0xE5, 0x54, 0x10, 0x9F, 0xE5, 0x04, 0x00, 0x82, 0xE5
.byte 0x50, 0x00, 0x9F, 0xE5, 0x00, 0x20, 0xA0, 0xE3, 0xDE, 0xE8, 0xFF, 0xEB, 0x20, 0x00, 0x9F, 0xE5
.byte 0xA4, 0xEA, 0xFF, 0xEB, 0x3C, 0x00, 0x9F, 0xE5, 0xF6, 0xE8, 0xFF, 0xEB, 0xF0, 0x81, 0xBD, 0xE8
.byte 0x9C, 0x36, 0x2A, 0x02, 0xE4, 0xF3, 0x0A, 0x02, 0x90, 0xF4, 0x0A, 0x02, 0x3C, 0xF5, 0x0A, 0x02
.byte 0x2C, 0xF4, 0x0A, 0x02, 0x08, 0xF4, 0x0A, 0x02, 0xE8, 0xF5, 0x0A, 0x02, 0x98, 0x36, 0x2A, 0x02
.byte 0x78, 0x29, 0x09, 0x02, 0x7C, 0x29, 0x09, 0x02, 0x9C, 0x29, 0x09, 0x02, 0xD0, 0xF3, 0x0A, 0x02
.byte 0x0D, 0x07, 0x00, 0x00, 0xD0, 0xF3, 0x0A, 0x02, 0xC4, 0x36, 0x2A, 0x02
arm_func_start sub_020082F4
sub_020082F4: ; 0x020082F4
stmdb sp!, {r4, r5, r6, r7, r8, lr}
mov r8, r0
ldr r0, _02008410 ; =0x022A369C
mov r1, #8
bl sub_02002F34
ldr r0, _02008414 ; =0x020AF3E4
bl sub_02002C40
ldr r0, _02008414 ; =0x020AF3E4
mov r1, #8
bl sub_02002CAC
ldr r0, _02008414 ; =0x020AF3E4
bl sub_02002E98
mov r1, #8
ldr r0, _02008418 ; =0x020AF490
mov r2, r1
bl sub_02002A9C
ldr r0, _0200841C ; =0x020AF53C
mov r1, #8
mov r2, #0
bl sub_02002A9C
ldr r0, _02008420 ; =0x020AF42C
bl sub_02002950
ldr r0, _02008424 ; =0x020AF408
bl sub_02002C40
ldr r0, _02008428 ; =0x020AF5E8
mov r1, #1
mov r2, #0
bl sub_02002A9C
mov r0, #0x800
sub r1, r0, #0xf3
bl MemAlloc
mov r6, r0
ldr r0, _0200842C ; =0x022A3698
mov r7, #0
ldr r4, _02008430 ; =0x02092978
str r6, [r0]
mov r5, r7
_02008388:
mov r0, r6
mov r1, r5
mov r2, r5
mov r3, r4
bl sub_02008980
add r7, r7, #1
cmp r7, #8
add r6, r6, #0x100
blt _02008388
mov r0, r8
bl sub_02007004
bl sub_02006EF8
bl sub_02007380
bl sub_02007384
ldr r0, _02008434 ; =0x0209297C
bl DebugPrint0__0200C1FC
bl sub_020073D8
ldr r0, _02008438 ; =0x0209299C
bl DebugPrint0__0200C1FC
ldr r0, _0200843C ; =0x020AF3D0
ldr r1, _02008440 ; =0x0000070D
ldr r0, [r0, #8]
bl MemAlloc
ldr r2, _0200843C ; =0x020AF3D0
ldr r1, _02008444 ; =0x020AF3D0
str r0, [r2, #4]
ldr r0, _02008448 ; =0x022A36C4
mov r2, #0
bl sub_02002778
ldr r0, _02008424 ; =0x020AF408
bl sub_02002E98
ldr r0, _02008448 ; =0x022A36C4
bl sub_020027E8
ldmdb sp!, {r4, r5, r6, r7, r8, pc}
.align 2, 0
_02008410: .word 0x022A369C
_02008414: .word 0x020AF3E4
_02008418: .word 0x020AF490
_0200841C: .word 0x020AF53C
_02008420: .word 0x020AF42C
_02008424: .word 0x020AF408
_02008428: .word 0x020AF5E8
_0200842C: .word 0x022A3698
_02008430: .word 0x02092978
_02008434: .word 0x0209297C
_02008438: .word 0x0209299C
_0200843C: .word 0x020AF3D0
_02008440: .word 0x0000070D
_02008444: .word 0x020AF3D0
_02008448: .word 0x022A36C4
arm_func_end sub_020082F4
arm_func_start sub_0200844C
sub_0200844C: ; 0x0200844C
@ -143831,9 +144034,16 @@ sub_0207A1FC: ; 0x0207A1FC
strne r2, [r1, #0x10]
bx lr
arm_func_end sub_0207A1FC
_0207A220:
.byte 0x10, 0x1F, 0x11, 0xEE, 0x04, 0x00, 0x01, 0xE2, 0x20, 0x01, 0xA0, 0xE1, 0x04, 0x10, 0x81, 0xE3
.byte 0x10, 0x1F, 0x01, 0xEE, 0x1E, 0xFF, 0x2F, 0xE1
arm_func_start sub_0207A220
sub_0207A220: ; 0x0207A220
mrc p15, 0, r1, c1, c0, 0
and r0, r1, #4
mov r0, r0, lsr #2
orr r1, r1, #4
mcr p15, 0, r1, c1, c0, 0
bx lr
arm_func_end sub_0207A220
arm_func_start sub_0207A238
sub_0207A238: ; 0x0207A238
@ -143922,10 +144132,16 @@ sub_0207A300: ; 0x0207A300
mcr p15, 0, r0, c7, c10, 4
bx lr
arm_func_end sub_0207A300
_0207A30C:
.byte 0x10, 0x1F, 0x11, 0xEE
.byte 0x01, 0x0A, 0x01, 0xE2, 0x20, 0x06, 0xA0, 0xE1, 0x01, 0x1A, 0x81, 0xE3, 0x10, 0x1F, 0x01, 0xEE
.byte 0x1E, 0xFF, 0x2F, 0xE1
arm_func_start sub_0207A30C
sub_0207A30C: ; 0x0207A30C
mrc p15, 0, r1, c1, c0, 0
and r0, r1, #0x1000
mov r0, r0, lsr #0xc
orr r1, r1, #0x1000
mcr p15, 0, r1, c1, c0, 0
bx lr
arm_func_end sub_0207A30C
arm_func_start sub_0207A324
sub_0207A324: ; 0x0207A324
@ -144083,10 +144299,24 @@ _0207A518: .word 0x022B98C4
_0207A51C: .word 0x0200002B
_0207A520: .word 0x023E0021
arm_func_end sub_0207A4B8
_0207A524:
.byte 0x00, 0x01, 0xA0, 0xE1, 0x27, 0x06, 0x80, 0xE2, 0xFF, 0x0A, 0x80, 0xE2
.byte 0xC4, 0x0D, 0x90, 0xE5, 0x1E, 0xFF, 0x2F, 0xE1, 0x00, 0x01, 0xA0, 0xE1, 0x27, 0x06, 0x80, 0xE2
.byte 0xFF, 0x0A, 0x80, 0xE2, 0xA0, 0x0D, 0x90, 0xE5, 0x1E, 0xFF, 0x2F, 0xE1
arm_func_start sub_0207A524
sub_0207A524: ; 0x0207A524
mov r0, r0, lsl #2
add r0, r0, #0x2700000
add r0, r0, #0xff000
ldr r0, [r0, #0xdc4]
bx lr
arm_func_end sub_0207A524
arm_func_start sub_0207A538
sub_0207A538: ; 0x0207A538
mov r0, r0, lsl #2
add r0, r0, #0x2700000
add r0, r0, #0xff000
ldr r0, [r0, #0xda0]
bx lr
arm_func_end sub_0207A538
arm_func_start sub_0207A54C
sub_0207A54C: ; 0x0207A54C
@ -144418,31 +144648,118 @@ sub_0207A8F4: ; 0x0207A8F4
.align 2, 0
_0207A958: .word 0x022B98CC
arm_func_end sub_0207A8F4
_0207A95C:
.byte 0x38, 0x40, 0x2D, 0xE9
.byte 0x00, 0x40, 0xA0, 0xE1, 0x01, 0x50, 0xA0, 0xE1, 0x9D, 0x03, 0x00, 0xEB, 0x14, 0x10, 0x9F, 0xE5
.byte 0x04, 0x11, 0x91, 0xE7, 0x00, 0x40, 0x91, 0xE5, 0x00, 0x50, 0x81, 0xE5, 0x9D, 0x03, 0x00, 0xEB
.byte 0x04, 0x00, 0xA0, 0xE1, 0x38, 0x80, 0xBD, 0xE8, 0xCC, 0x98, 0x2B, 0x02, 0xF8, 0x40, 0x2D, 0xE9
.byte 0x00, 0x70, 0xA0, 0xE1, 0x01, 0x50, 0xA0, 0xE1, 0x02, 0x40, 0xA0, 0xE1, 0x03, 0x60, 0xA0, 0xE1
.byte 0x8F, 0x03, 0x00, 0xEB, 0x84, 0x20, 0x9F, 0xE5, 0x0C, 0x10, 0xA0, 0xE3, 0x07, 0x51, 0x82, 0xE7
.byte 0x14, 0x20, 0x85, 0xE2, 0x10, 0x20, 0x85, 0xE5, 0x96, 0x01, 0x01, 0xE0, 0x04, 0x60, 0x85, 0xE5
.byte 0x00, 0x00, 0x56, 0xE3, 0x00, 0xE0, 0xA0, 0xE3, 0x0C, 0x00, 0x00, 0xDA, 0x0E, 0x60, 0xA0, 0xE1
.byte 0x00, 0xC0, 0xE0, 0xE3, 0x0E, 0x30, 0xA0, 0xE1, 0x10, 0x20, 0x95, 0xE5, 0x01, 0xE0, 0x8E, 0xE2
.byte 0x06, 0xC0, 0x82, 0xE7, 0x06, 0x20, 0x82, 0xE0, 0x08, 0x30, 0x82, 0xE5, 0x04, 0x30, 0x82, 0xE5
.byte 0x04, 0x20, 0x95, 0xE5, 0x0C, 0x60, 0x86, 0xE2, 0x02, 0x00, 0x5E, 0xE1, 0xF5, 0xFF, 0xFF, 0xBA
.byte 0x00, 0x20, 0xE0, 0xE3, 0x00, 0x20, 0x85, 0xE5, 0x10, 0x30, 0x95, 0xE5, 0x1F, 0x20, 0xC4, 0xE3
.byte 0x01, 0x10, 0x83, 0xE0, 0x1F, 0x10, 0x81, 0xE2, 0x1F, 0x10, 0xC1, 0xE3, 0x08, 0x10, 0x85, 0xE5
.byte 0x0C, 0x20, 0x85, 0xE5, 0x73, 0x03, 0x00, 0xEB, 0x08, 0x00, 0x95, 0xE5, 0xF8, 0x80, 0xBD, 0xE8
.byte 0xCC, 0x98, 0x2B, 0x02, 0x70, 0x40, 0x2D, 0xE9, 0x00, 0x40, 0xA0, 0xE1, 0x01, 0x60, 0xA0, 0xE1
.byte 0x02, 0x50, 0xA0, 0xE1, 0x66, 0x03, 0x00, 0xEB, 0x78, 0x20, 0x9F, 0xE5, 0x1F, 0x10, 0x86, 0xE2
.byte 0x04, 0x21, 0x92, 0xE7, 0x1F, 0x60, 0xC1, 0xE3, 0x04, 0xC0, 0x92, 0xE5, 0x1F, 0x50, 0xC5, 0xE3
.byte 0x00, 0x00, 0x5C, 0xE3, 0x00, 0x40, 0xA0, 0xE3, 0x13, 0x00, 0x00, 0xDA, 0x10, 0x30, 0x92, 0xE5
.byte 0x00, 0x10, 0x93, 0xE5, 0x00, 0x00, 0x51, 0xE3, 0x0B, 0x00, 0x00, 0xAA, 0x06, 0x10, 0x45, 0xE0
.byte 0x00, 0x10, 0x83, 0xE5, 0x00, 0x20, 0xA0, 0xE3, 0x00, 0x20, 0x86, 0xE5, 0x04, 0x20, 0x86, 0xE5
.byte 0x00, 0x10, 0x93, 0xE5, 0x08, 0x10, 0x86, 0xE5, 0x04, 0x60, 0x83, 0xE5, 0x08, 0x20, 0x83, 0xE5
.byte 0x54, 0x03, 0x00, 0xEB, 0x04, 0x00, 0xA0, 0xE1, 0x70, 0x80, 0xBD, 0xE8, 0x01, 0x40, 0x84, 0xE2
.byte 0x0C, 0x00, 0x54, 0xE1, 0x0C, 0x30, 0x83, 0xE2, 0xEC, 0xFF, 0xFF, 0xBA, 0x4D, 0x03, 0x00, 0xEB
.byte 0x00, 0x00, 0xE0, 0xE3, 0x70, 0x80, 0xBD, 0xE8, 0xCC, 0x98, 0x2B, 0x02
arm_func_start sub_0207A95C
sub_0207A95C: ; 0x0207A95C
stmdb sp!, {r3, r4, r5, lr}
mov r4, r0
mov r5, r1
bl EnableIrqFlag
ldr r1, _0207A988 ; =0x022B98CC
ldr r1, [r1, r4, lsl #2]
ldr r4, [r1]
str r5, [r1]
bl SetIrqFlag
mov r0, r4
ldmdb sp!, {r3, r4, r5, pc}
.align 2, 0
_0207A988: .word 0x022B98CC
arm_func_end sub_0207A95C
arm_func_start sub_0207A98C
sub_0207A98C: ; 0x0207A98C
stmdb sp!, {r3, r4, r5, r6, r7, lr}
mov r7, r0
mov r5, r1
mov r4, r2
mov r6, r3
bl EnableIrqFlag
ldr r2, _0207AA30 ; =0x022B98CC
mov r1, #0xc
str r5, [r2, r7, lsl #2]
add r2, r5, #0x14
str r2, [r5, #0x10]
mul r1, r6, r1
str r6, [r5, #4]
cmp r6, #0
mov lr, #0
ble _0207AA00
mov r6, lr
mvn ip, #0
mov r3, lr
_0207A9D8:
ldr r2, [r5, #0x10]
add lr, lr, #1
str ip, [r2, r6]
add r2, r2, r6
str r3, [r2, #8]
str r3, [r2, #4]
ldr r2, [r5, #4]
add r6, r6, #0xc
cmp lr, r2
blt _0207A9D8
_0207AA00:
mvn r2, #0
str r2, [r5]
ldr r3, [r5, #0x10]
bic r2, r4, #0x1f
add r1, r3, r1
add r1, r1, #0x1f
bic r1, r1, #0x1f
str r1, [r5, #8]
str r2, [r5, #0xc]
bl SetIrqFlag
ldr r0, [r5, #8]
ldmdb sp!, {r3, r4, r5, r6, r7, pc}
.align 2, 0
_0207AA30: .word 0x022B98CC
arm_func_end sub_0207A98C
arm_func_start sub_0207AA34
sub_0207AA34: ; 0x0207AA34
stmdb sp!, {r4, r5, r6, lr}
mov r4, r0
mov r6, r1
mov r5, r2
bl EnableIrqFlag
ldr r2, _0207AAC8 ; =0x022B98CC
add r1, r6, #0x1f
ldr r2, [r2, r4, lsl #2]
bic r6, r1, #0x1f
ldr ip, [r2, #4]
bic r5, r5, #0x1f
cmp ip, #0
mov r4, #0
ble _0207AABC
ldr r3, [r2, #0x10]
_0207AA70:
ldr r1, [r3]
cmp r1, #0
bge _0207AAAC
sub r1, r5, r6
str r1, [r3]
mov r2, #0
str r2, [r6]
str r2, [r6, #4]
ldr r1, [r3]
str r1, [r6, #8]
str r6, [r3, #4]
str r2, [r3, #8]
bl SetIrqFlag
mov r0, r4
ldmdb sp!, {r4, r5, r6, pc}
_0207AAAC:
add r4, r4, #1
cmp r4, ip
add r3, r3, #0xc
blt _0207AA70
_0207AABC:
bl SetIrqFlag
mvn r0, #0
ldmdb sp!, {r4, r5, r6, pc}
.align 2, 0
_0207AAC8: .word 0x022B98CC
arm_func_end sub_0207AA34
arm_func_start sub_0207AACC
sub_0207AACC: ; 0x0207AACC
@ -150955,7 +151272,7 @@ _0207FF4C:
beq _0207FF68
ldr r0, [r5, #4]
add r0, r0, r4
bl sub_02000970
bl MIi_UncompressBackward
_0207FF68:
ldmib r5, {r0, r1}
bl sub_0207A2DC
@ -155149,7 +155466,7 @@ sub_02083828: ; 0x02083828
ldr r4, [sb, #0x34]
ldr sl, [sb, #0x30]
mov r5, #0x100
bl sub_02000B9C
bl OSi_ReferSymbol
cmp r7, #0xb
bne _0208385C
bl sub_02083B28
@ -155291,7 +155608,7 @@ sub_02083A18: ; 0x02083A18
mov r8, r1
mov r7, r2
mov r6, r3
bl sub_02000B9C
bl OSi_ReferSymbol
bl EnableIrqFlag
ldr r1, [r4, #0x114]
mov r5, r0
@ -155384,7 +155701,7 @@ sub_02083B3C: ; 0x02083B3C
mov r6, r0
ldr r0, _02083C68 ; =0x02000BC4
ldr r4, _02083C6C ; =0x022BB7E0
bl sub_02000B9C
bl OSi_ReferSymbol
cmp r6, #0
bne _02083B5C
bl WaitForever2

View File

@ -1,36 +0,0 @@
.section .version,4
.balign 4, 0
.public _version_NINTENDO_DWC
_version_NINTENDO_DWC: ; 0x02000BC4
.asciz "[SDK+NINTENDO:DWC2.2.30008.080630.1906_DWC_2_2_PLUS8]"
.balign 4, 0
.public _version_NINTENDO_WiFi
_version_NINTENDO_WiFi: ; 0x02000BFC
.asciz "[SDK+NINTENDO:WiFi2.1.30003.0709200229]"
.balign 4, 0
.public _version_UBIQUITOUS_CPS
_version_UBIQUITOUS_CPS: ; 0x02000C24
.asciz "[SDK+UBIQUITOUS:CPS]"
.balign 4, 0
.public _version_UBIQUITOUS_SSL
_version_UBIQUITOUS_SSL: ; 0x02000C3C
.asciz "[SDK+UBIQUITOUS:SSL]"
.balign 4, 0
.public _version_Abiosso_libVCT
_version_Abiosso_libVCT: ; 0x02000C54
.asciz "[SDK+Abiosso:libVCT 1.3.1]"
.balign 4, 0
.public _version_NINTENDO_BACKUP
_version_NINTENDO_BACKUP: ; 0x02000C70
.asciz "[SDK+NINTENDO:BACKUP]"
.balign 4, 0
.public _version_NINTENDO_DWC_LOBBY
_version_NINTENDO_DWC_LOBBY: ; 0x02000C88
.asciz "[SDK+NINTENDO:DWC_LOBBY]"

View File

@ -13951,7 +13951,7 @@ ov00_022C826C: ; 0x022C826C
sub sp, sp, #8
mov r4, r0
ldr r0, _022C8464 ; =0x02000BDC
bl sub_02000B9C
bl OSi_ReferSymbol
ldr r3, [r4, #0x18]
ldr r5, [r4, #0x14]
cmp r3, #0
@ -19505,7 +19505,7 @@ ov00_022CCD90: ; 0x022CCD90
stmdb sp!, {r4, lr}
mov r4, r0
ldr r0, _022CCDC4 ; =0x02000BF4
bl sub_02000B9C
bl OSi_ReferSymbol
ldr r0, _022CCDC8 ; =0x02318868
ldr r1, [r0]
cmp r1, #0
@ -26495,7 +26495,7 @@ ov00_022D2B44: ; 0x022D2B44
stmdb sp!, {r4, lr}
mov r4, r0
ldr r0, _022D2B6C ; =0x02000C1C
bl sub_02000B9C
bl OSi_ReferSymbol
ldr r0, _022D2B70 ; =0x022B966C
ldr r0, [r0, #4]
ldr r0, [r0, #0xa4]
@ -35912,7 +35912,7 @@ ov00_022DB054: ; 0x022DB054
mov r6, r0
ldr r0, _022DB0CC ; =0x02000C34
mov r5, #0
bl sub_02000B9C
bl OSi_ReferSymbol
mov r0, r6
bl ov00_022EE018
mov r4, r0

View File

@ -75,13 +75,10 @@ NATIVE_TOOLS := \
TOOLDIRS := $(foreach tool,$(NATIVE_TOOLS),$(dir $(tool)))
# Directories
NITROSDK_SRC_SUBDIRS := os
LIB_SUBDIRS := cw NitroSDK NitroSystem NitroDWC NitroWiFi libCPS libVCT
SRC_SUBDIR := src
ASM_SUBDIR := asm
LIB_SRC_SUBDIR := lib/src $(LIB_SUBDIRS:%=lib/%/src) $(NITROSDK_SRC_SUBDIRS:%=lib/NitroSDK/src/%)
LIB_ASM_SUBDIR := lib/asm $(LIB_SUBDIRS:%=lib/%/asm)
LIB_SRC_SUBDIR := lib/src
LIB_ASM_SUBDIR := lib/asm
ALL_SUBDIRS := $(SRC_SUBDIR) $(ASM_SUBDIR) $(LIB_SRC_SUBDIR) $(LIB_ASM_SUBDIR)
SRC_BUILDDIR := $(addprefix $(BUILD_DIR)/,$(SRC_SUBDIR))
@ -120,7 +117,7 @@ EXCCFLAGS := -Cpp_exceptions off
MWCFLAGS = $(DEFINES) $(OPTFLAGS) -enum int -lang c99 $(EXCCFLAGS) -gccext,on -proc $(PROC) -msgstyle gcc -gccinc -i ./include -i ./include/library -i $(WORK_DIR)/files -I$(WORK_DIR)/lib/include -ipa file -interworking -inline on,noauto -char signed -W all -W pedantic -W noimpl_signedunsigned -W noimplicitconv -W nounusedarg -W nomissingreturn -W error
MWASFLAGS = $(DEFINES) -proc $(PROC_S) -gccinc -i . -i ./include -i $(WORK_DIR)/asm/include -i $(WORK_DIR)/files -i $(WORK_DIR)/lib/asm/include -i $(WORK_DIR)/lib/NitroDWC/asm/include -i $(WORK_DIR)/lib/NitroSDK/asm/include -i $(WORK_DIR)/lib/syscall/asm/include -I$(WORK_DIR)/lib/include -DSDK_ASM
MWASFLAGS = $(DEFINES) -proc $(PROC_S) -gccinc -i . -i ./include -i $(WORK_DIR)/asm/include -i $(WORK_DIR)/files -i $(WORK_DIR)/lib/asm/include -i $(WORK_DIR)/lib/syscall/asm/include -I$(WORK_DIR)/lib/include -DSDK_ASM
MWLDFLAGS := -proc $(PROC) -nopic -nopid -interworking -map closure,unused -symtab sort -m _start -msgstyle gcc
ARFLAGS := rcS
@ -173,8 +170,6 @@ BUILD_C ?= $(MW_COMPILE) -c -o
$(DEPFILES):
$(BUILD_DIR)/lib/NitroSDK/%.o: MWCCVER := 2.0/sp2p3
$(BUILD_DIR)/%.o: %.c
$(BUILD_DIR)/%.o: %.c $(BUILD_DIR)/%.d
$(BUILD_C) $@ $<

View File

@ -1,36 +0,0 @@
FS_EXTERN_OVERLAY(OVY_0)
FS_EXTERN_OVERLAY(OVY_1)
FS_EXTERN_OVERLAY(OVY_2)
FS_EXTERN_OVERLAY(OVY_3)
FS_EXTERN_OVERLAY(OVY_4)
FS_EXTERN_OVERLAY(OVY_5)
FS_EXTERN_OVERLAY(OVY_6)
FS_EXTERN_OVERLAY(OVY_7)
FS_EXTERN_OVERLAY(OVY_8)
FS_EXTERN_OVERLAY(OVY_9)
FS_EXTERN_OVERLAY(OVY_10)
FS_EXTERN_OVERLAY(OVY_11)
FS_EXTERN_OVERLAY(OVY_12)
FS_EXTERN_OVERLAY(OVY_13)
FS_EXTERN_OVERLAY(OVY_14)
FS_EXTERN_OVERLAY(OVY_15)
FS_EXTERN_OVERLAY(OVY_16)
FS_EXTERN_OVERLAY(OVY_17)
FS_EXTERN_OVERLAY(OVY_18)
FS_EXTERN_OVERLAY(OVY_19)
FS_EXTERN_OVERLAY(OVY_20)
FS_EXTERN_OVERLAY(OVY_21)
FS_EXTERN_OVERLAY(OVY_22)
FS_EXTERN_OVERLAY(OVY_23)
FS_EXTERN_OVERLAY(OVY_24)
FS_EXTERN_OVERLAY(OVY_25)
FS_EXTERN_OVERLAY(OVY_26)
FS_EXTERN_OVERLAY(OVY_27)
FS_EXTERN_OVERLAY(OVY_28)
FS_EXTERN_OVERLAY(OVY_29)
FS_EXTERN_OVERLAY(OVY_30)
FS_EXTERN_OVERLAY(OVY_31)
FS_EXTERN_OVERLAY(OVY_32)
FS_EXTERN_OVERLAY(OVY_33)
FS_EXTERN_OVERLAY(OVY_34)
FS_EXTERN_OVERLAY(OVY_35)

View File

@ -1,30 +0,0 @@
.include "asm/macros.inc"
.include "fx.inc"
.include "global.inc"
.text
arm_func_start FX_Init
FX_Init: ; 0x020CD784
bx lr
arm_func_end FX_Init
arm_func_start FX_Modf
FX_Modf: ; 0x020CD788
cmp r0, #0
ldr r2, _020CD7C0 ; =0x7FFFF000
blt _020CD7A4
and r3, r0, r2
str r3, [r1]
and r0, r0, r2, lsr #19
bx lr
_020CD7A4:
rsb ip, r0, #0
and r0, ip, r2
rsb r3, r0, #0
and r0, ip, r2, lsr #19
str r3, [r1]
rsb r0, r0, #0
bx lr
.align 2, 0
_020CD7C0: .word 0x7FFFF000
arm_func_end FX_Modf

View File

@ -1,264 +0,0 @@
.include "asm/macros.inc"
.include "fx_atanidx.inc"
.include "global.inc"
.text
arm_func_start FX_Atan2Idx
FX_Atan2Idx: ; 0x020CD5DC
stmdb sp!, {r4, lr}
cmp r0, #0
ble _020CD670
cmp r1, #0
ble _020CD628
cmp r1, r0
ble _020CD608
mov r2, r0
mov r4, #0
mov r0, #1
b _020CD720
_020CD608:
bge _020CD620
mov r2, r1
mov r1, r0
mov r4, #0x4000
mov r0, #0
b _020CD720
_020CD620:
mov r0, #0x2000
ldmia sp!, {r4, pc}
_020CD628:
bge _020CD668
rsb r1, r1, #0
cmp r1, r0
bge _020CD64C
mov r2, r1
mov r1, r0
mov r4, #0x4000
mov r0, #1
b _020CD720
_020CD64C:
ble _020CD660
mov r2, r0
mov r4, #0x8000
mov r0, #0
b _020CD720
_020CD660:
mov r0, #0x6000
ldmia sp!, {r4, pc}
_020CD668:
mov r0, #0x4000
ldmia sp!, {r4, pc}
_020CD670:
bge _020CD710
cmp r1, #0
rsb r0, r0, #0
bge _020CD6C4
rsb r1, r1, #0
cmp r1, r0
ble _020CD6A0
mov r4, #0x8000
mov r2, r0
rsb r4, r4, #0
mov r0, #1
b _020CD720
_020CD6A0:
bge _020CD6BC
mov r4, #0x4000
mov r2, r1
mov r1, r0
rsb r4, r4, #0
mov r0, #0
b _020CD720
_020CD6BC:
mov r0, #0xa000
ldmia sp!, {r4, pc}
_020CD6C4:
cmp r1, #0
ble _020CD708
cmp r1, r0
bge _020CD6EC
mov r4, #0x4000
mov r2, r1
mov r1, r0
rsb r4, r4, #0
mov r0, #1
b _020CD720
_020CD6EC:
ble _020CD700
mov r4, #0
mov r2, r0
mov r0, r4
b _020CD720
_020CD700:
mov r0, #0xe000
ldmia sp!, {r4, pc}
_020CD708:
mov r0, #0xc000
ldmia sp!, {r4, pc}
_020CD710:
cmp r1, #0
movge r0, #0
movlt r0, #0x8000
ldmia sp!, {r4, pc}
_020CD720:
cmp r1, #0
moveq r0, #0
ldmeqia sp!, {r4, pc}
cmp r0, #0
mov r0, r2
beq _020CD75C
bl FX_Div
mov r1, r0, asr #5
ldr r0, _020CD780 ; =FX_AtanIdxTable_
mov r1, r1, lsl #1
ldrsh r0, [r0, r1]
add r0, r4, r0
mov r0, r0, lsl #0x10
mov r0, r0, lsr #0x10
ldmia sp!, {r4, pc}
_020CD75C:
bl FX_Div
mov r1, r0, asr #5
ldr r0, _020CD780 ; =FX_AtanIdxTable_
mov r1, r1, lsl #1
ldrsh r0, [r0, r1]
sub r0, r4, r0
mov r0, r0, lsl #0x10
mov r0, r0, lsr #0x10
ldmia sp!, {r4, pc}
.align 2, 0
_020CD780: .word FX_AtanIdxTable_
arm_func_end FX_Atan2Idx
.rodata
FX_AtanIdxTable_:
.short 0x0000
.short 0x0051
.short 0x00A3
.short 0x00F4
.short 0x0146
.short 0x0197
.short 0x01E9
.short 0x023A
.short 0x028B
.short 0x02DC
.short 0x032D
.short 0x037E
.short 0x03CF
.short 0x0420
.short 0x0470
.short 0x04C1
.short 0x0511
.short 0x0561
.short 0x05B1
.short 0x0601
.short 0x0651
.short 0x06A0
.short 0x06EF
.short 0x073E
.short 0x078D
.short 0x07DC
.short 0x082A
.short 0x0878
.short 0x08C6
.short 0x0914
.short 0x0961
.short 0x09AE
.short 0x09FB
.short 0x0A48
.short 0x0A94
.short 0x0AE0
.short 0x0B2C
.short 0x0B77
.short 0x0BC2
.short 0x0C0D
.short 0x0C57
.short 0x0CA1
.short 0x0CEB
.short 0x0D34
.short 0x0D7D
.short 0x0DC6
.short 0x0E0F
.short 0x0E56
.short 0x0E9E
.short 0x0EE5
.short 0x0F2C
.short 0x0F73
.short 0x0FB9
.short 0x0FFF
.short 0x1044
.short 0x1089
.short 0x10CE
.short 0x1112
.short 0x1156
.short 0x1199
.short 0x11DC
.short 0x121F
.short 0x1261
.short 0x12A3
.short 0x12E4
.short 0x1325
.short 0x1366
.short 0x13A6
.short 0x13E6
.short 0x1425
.short 0x1464
.short 0x14A2
.short 0x14E0
.short 0x151E
.short 0x155B
.short 0x1598
.short 0x15D5
.short 0x1611
.short 0x164C
.short 0x1688
.short 0x16C2
.short 0x16FD
.short 0x1737
.short 0x1770
.short 0x17AA
.short 0x17E2
.short 0x181B
.short 0x1853
.short 0x188A
.short 0x18C1
.short 0x18F8
.short 0x192E
.short 0x1964
.short 0x199A
.short 0x19CF
.short 0x1A04
.short 0x1A38
.short 0x1A6C
.short 0x1A9F
.short 0x1AD3
.short 0x1B05
.short 0x1B38
.short 0x1B6A
.short 0x1B9C
.short 0x1BCD
.short 0x1BFE
.short 0x1C2E
.short 0x1C5E
.short 0x1C8E
.short 0x1CBE
.short 0x1CED
.short 0x1D1B
.short 0x1D4A
.short 0x1D78
.short 0x1DA5
.short 0x1DD3
.short 0x1DFF
.short 0x1E2C
.short 0x1E58
.short 0x1E84
.short 0x1EB0
.short 0x1EDB
.short 0x1F06
.short 0x1F30
.short 0x1F5A
.short 0x1F84
.short 0x1FAE
.short 0x1FD7
.short 0x2000

View File

@ -1,181 +0,0 @@
.include "asm/macros.inc"
.include "fx_cp.inc"
.include "global.inc"
.text
arm_func_start FX_Div
FX_Div: ; 0x020CCBA0
stmdb sp!, {r3, lr}
bl FX_DivAsync
bl FX_GetDivResult
ldmia sp!, {r3, pc}
arm_func_end FX_Div
arm_func_start FX_Inv
FX_Inv: ; 0x020CCBB0
stmdb sp!, {r3, lr}
bl FX_InvAsync
bl FX_GetDivResult
ldmia sp!, {r3, pc}
arm_func_end FX_Inv
arm_func_start FX_InvFx64c
FX_InvFx64c: ; 0x020CCBC0
stmdb sp!, {r3, lr}
bl FX_InvAsync
ldr r1, _020CCBE4 ; =0x04000280
_020CCBCC:
ldrh r0, [r1]
tst r0, #0x8000
bne _020CCBCC
ldr r1, _020CCBE8 ; =0x040002A0
ldmia r1, {r0, r1}
ldmia sp!, {r3, pc}
.align 2, 0
_020CCBE4: .word 0x04000280
_020CCBE8: .word 0x040002A0
arm_func_end FX_InvFx64c
arm_func_start FX_Sqrt
FX_Sqrt: ; 0x020CCBEC
stmdb sp!, {r3, lr}
cmp r0, #0
movle r0, #0
ldmleia sp!, {r3, pc}
ldr r2, _020CCC1C ; =0x040002B0
mov r1, #1
strh r1, [r2]
mov r1, #0
str r1, [r2, #8]
str r0, [r2, #0xc]
bl FX_GetSqrtResult
ldmia sp!, {r3, pc}
.align 2, 0
_020CCC1C: .word 0x040002B0
arm_func_end FX_Sqrt
arm_func_start FX_GetDivResultFx64c
FX_GetDivResultFx64c: ; 0x020CCC20
ldr r1, _020CCC3C ; =0x04000280
_020CCC24:
ldrh r0, [r1]
tst r0, #0x8000
bne _020CCC24
ldr r1, _020CCC40 ; =0x040002A0
ldmia r1, {r0, r1}
bx lr
.align 2, 0
_020CCC3C: .word 0x04000280
_020CCC40: .word 0x040002A0
arm_func_end FX_GetDivResultFx64c
arm_func_start FX_GetDivResult
FX_GetDivResult: ; 0x020CCC44
ldr r1, _020CCC74 ; =0x04000280
_020CCC48:
ldrh r0, [r1]
tst r0, #0x8000
bne _020CCC48
ldr r0, _020CCC78 ; =0x040002A0
ldr r1, [r0]
ldr r0, [r0, #4]
adds r2, r1, #0x80000
adc r1, r0, #0
mov r0, r2, lsr #0x14
orr r0, r0, r1, lsl #12
bx lr
.align 2, 0
_020CCC74: .word 0x04000280
_020CCC78: .word 0x040002A0
arm_func_end FX_GetDivResult
arm_func_start FX_InvAsync
FX_InvAsync: ; 0x020CCC7C
ldr r2, _020CCCA8 ; =0x04000280
mov r1, #1
strh r1, [r2]
mov r1, #0
str r1, [r2, #0x10]
mov r1, #0x1000
str r1, [r2, #0x14]
str r0, [r2, #0x18]
mov r0, #0
str r0, [r2, #0x1c]
bx lr
.align 2, 0
_020CCCA8: .word 0x04000280
arm_func_end FX_InvAsync
arm_func_start FX_GetSqrtResult
FX_GetSqrtResult: ; 0x020CCCAC
ldr r1, _020CCCD0 ; =0x040002B0
_020CCCB0:
ldrh r0, [r1]
tst r0, #0x8000
bne _020CCCB0
ldr r0, _020CCCD4 ; =0x040002B4
ldr r0, [r0]
add r0, r0, #0x200
mov r0, r0, lsr #0xa
bx lr
.align 2, 0
_020CCCD0: .word 0x040002B0
_020CCCD4: .word 0x040002B4
arm_func_end FX_GetSqrtResult
arm_func_start FX_DivAsync
FX_DivAsync: ; 0x020CCCD8
ldr r3, _020CCCFC ; =0x04000280
mov r2, #1
strh r2, [r3]
mov r2, #0
str r2, [r3, #0x10]
str r0, [r3, #0x14]
str r1, [r3, #0x18]
str r2, [r3, #0x1c]
bx lr
.align 2, 0
_020CCCFC: .word 0x04000280
arm_func_end FX_DivAsync
arm_func_start FX_DivS32
FX_DivS32: ; 0x020CCD00
ldr r2, _020CCD34 ; =0x04000280
mov r3, #0
strh r3, [r2]
str r0, [r2, #0x10]
str r1, [r2, #0x18]
mov r0, r3
str r0, [r2, #0x1c]
_020CCD1C:
ldrh r0, [r2]
tst r0, #0x8000
bne _020CCD1C
ldr r0, _020CCD38 ; =0x040002A0
ldr r0, [r0]
bx lr
.align 2, 0
_020CCD34: .word 0x04000280
_020CCD38: .word 0x040002A0
arm_func_end FX_DivS32
arm_func_start FX_ModS32
FX_ModS32: ; 0x020CCD3C
ldr r2, _020CCD70 ; =0x04000280
mov r3, #0
strh r3, [r2]
str r0, [r2, #0x10]
str r1, [r2, #0x18]
mov r0, r3
str r0, [r2, #0x1c]
_020CCD58:
ldrh r0, [r2]
tst r0, #0x8000
bne _020CCD58
ldr r0, _020CCD74 ; =0x040002A8
ldr r0, [r0]
bx lr
.align 2, 0
_020CCD70: .word 0x04000280
_020CCD74: .word 0x040002A8
arm_func_end FX_ModS32

View File

@ -1,50 +0,0 @@
.include "asm/macros.inc"
.include "fx_mtx22.inc"
.include "global.inc"
.text
arm_func_start MTX_Identity22_
MTX_Identity22_: ; 0x020CAF70
mov r1, #0
mov r2, #0x1000
mov r3, #0
stmia r0!, {r2, r3}
stmia r0!, {r1, r2}
bx lr
arm_func_end MTX_Identity22_
thumb_func_start MTX_Rot22_
MTX_Rot22_: ; 0x020CAF88
str r2, [r0]
str r1, [r0, #4]
neg r1, r1
str r1, [r0, #8]
str r2, [r0, #0xc]
bx lr
thumb_func_end MTX_Rot22_
arm_func_start MTX_ScaleApply22
MTX_ScaleApply22: ; 0x020CAF94
stmdb sp!, {r3, lr}
ldr ip, [r0]
smull lr, ip, r2, ip
mov lr, lr, lsr #0xc
orr lr, lr, ip, lsl #20
str lr, [r1]
ldr ip, [r0, #4]
smull lr, ip, r2, ip
mov r2, lr, lsr #0xc
orr r2, r2, ip, lsl #20
str r2, [r1, #4]
ldr r2, [r0, #8]
smull ip, r2, r3, r2
mov ip, ip, lsr #0xc
orr ip, ip, r2, lsl #20
str ip, [r1, #8]
ldr r0, [r0, #0xc]
smull r2, r0, r3, r0
mov r2, r2, lsr #0xc
orr r2, r2, r0, lsl #20
str r2, [r1, #0xc]
ldmia sp!, {r3, pc}
arm_func_end MTX_ScaleApply22

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@ -1,489 +0,0 @@
.include "asm/macros.inc"
.include "fx_mtx33.inc"
.include "global.inc"
.text
arm_func_start MTX_Identity33_
MTX_Identity33_: ; 0x020CAFEC
mov r2, #0x1000
str r2, [r0, #0x20]
mov r3, #0
stmia r0!, {r2, r3}
mov r1, #0
stmia r0!, {r1, r3}
stmia r0!, {r2, r3}
stmia r0!, {r1, r3}
bx lr
arm_func_end MTX_Identity33_
arm_func_start MTX_ScaleApply33
MTX_ScaleApply33: ; 0x020CB010
stmdb sp!, {r4, lr}
ldr r4, [r0]
ldr ip, [sp, #8]
smull lr, r4, r2, r4
mov lr, lr, lsr #0xc
orr lr, lr, r4, lsl #20
str lr, [r1]
ldr r4, [r0, #4]
smull lr, r4, r2, r4
mov lr, lr, lsr #0xc
orr lr, lr, r4, lsl #20
str lr, [r1, #4]
ldr lr, [r0, #8]
smull r4, lr, r2, lr
mov r2, r4, lsr #0xc
orr r2, r2, lr, lsl #20
str r2, [r1, #8]
ldr r2, [r0, #0xc]
smull lr, r2, r3, r2
mov lr, lr, lsr #0xc
orr lr, lr, r2, lsl #20
str lr, [r1, #0xc]
ldr r2, [r0, #0x10]
smull lr, r2, r3, r2
mov lr, lr, lsr #0xc
orr lr, lr, r2, lsl #20
str lr, [r1, #0x10]
ldr r2, [r0, #0x14]
smull lr, r2, r3, r2
mov r3, lr, lsr #0xc
orr r3, r3, r2, lsl #20
str r3, [r1, #0x14]
ldr r2, [r0, #0x18]
smull r3, r2, ip, r2
mov r3, r3, lsr #0xc
orr r3, r3, r2, lsl #20
str r3, [r1, #0x18]
ldr r2, [r0, #0x1c]
smull r3, r2, ip, r2
mov r3, r3, lsr #0xc
orr r3, r3, r2, lsl #20
str r3, [r1, #0x1c]
ldr r0, [r0, #0x20]
smull r2, r0, ip, r0
mov r2, r2, lsr #0xc
orr r2, r2, r0, lsl #20
str r2, [r1, #0x20]
ldmia sp!, {r4, pc}
arm_func_end MTX_ScaleApply33
thumb_func_start MTX_RotX33_
MTX_RotX33_: ; 0x020CB0D0
mov r3, #1
lsl r3, r3, #0xc
str r3, [r0]
mov r3, #0
str r3, [r0, #4]
str r3, [r0, #8]
str r3, [r0, #0xc]
str r2, [r0, #0x10]
str r1, [r0, #0x14]
str r3, [r0, #0x18]
neg r1, r1
str r1, [r0, #0x1c]
str r2, [r0, #0x20]
bx lr
thumb_func_end MTX_RotX33_
thumb_func_start MTX_RotY33_
MTX_RotY33_: ; 0x020CB0EC
str r2, [r0]
str r2, [r0, #0x20]
mov r3, #0
str r3, [r0, #4]
str r3, [r0, #0xc]
str r3, [r0, #0x14]
str r3, [r0, #0x1c]
neg r2, r1
mov r3, #1
lsl r3, r3, #0xc
str r1, [r0, #0x18]
str r2, [r0, #8]
str r3, [r0, #0x10]
bx lr
thumb_func_end MTX_RotY33_
thumb_func_start MTX_RotZ33_
MTX_RotZ33_: ; 0x020CB108
stmia r0!, {r2}
mov r3, #0
stmia r0!, {r1, r3}
neg r1, r1
stmia r0!, {r1, r2}
mov r1, #1
lsl r1, r1, #0xc
str r3, [r0]
str r3, [r0, #4]
str r3, [r0, #8]
str r1, [r0, #0xc]
bx lr
thumb_func_end MTX_RotZ33_
arm_func_start MTX_Inverse33
MTX_Inverse33: ; 0x020CB120
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
sub sp, sp, #0x50
mov sl, r0
ldr r0, [sl, #0x14]
cmp sl, r1
addeq sb, sp, #0x2c
ldr r3, [sl, #0x18]
ldr r2, [sl, #0xc]
ldr r6, [sl, #0x20]
str r1, [sp]
movne sb, r1
smull fp, r8, r2, r6
smull r7, r1, r0, r3
subs r7, fp, r7
sbc ip, r8, r1
ldr r4, [sl, #0x10]
ldr r5, [sl, #0x1c]
adds r1, r7, #0x800
smull fp, r8, r4, r6
smull r7, r6, r0, r5
adc r0, ip, #0
subs r7, fp, r7
sbc r6, r8, r6
mov r8, r1, lsr #0xc
orr r8, r8, r0, lsl #20
smull r1, r0, r2, r5
adds r7, r7, #0x800
smull r5, r3, r4, r3
adc r2, r6, #0
mov r7, r7, lsr #0xc
orr r7, r7, r2, lsl #20
subs r1, r1, r5
sbc r5, r0, r3
ldr r2, [sl]
adds r6, r1, #0x800
ldr fp, [sl, #4]
smull r4, r3, r2, r7
smull r1, r0, fp, r8
adc r2, r5, #0
mov r6, r6, lsr #0xc
orr r6, r6, r2, lsl #20
subs r2, r4, r1
ldr r1, [sl, #8]
sbc r0, r3, r0
smlal r2, r0, r1, r6
adds r1, r2, #0x800
adc r2, r0, #0
mov r0, r1, lsr #0xc
mov r1, r8, asr #0x1f
str r1, [sp, #4]
mov r1, r7, asr #0x1f
str r1, [sp, #8]
mov r1, r6, asr #0x1f
str r1, [sp, #0xc]
orrs r0, r0, r2, lsl #20
mov r1, #0
addeq sp, sp, #0x50
subeq r0, r1, #1
ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
bl FX_InvAsync
ldr r1, [sl, #8]
ldr r2, [sl, #0x1c]
ldr fp, [sl, #0x10]
smull r0, r4, r2, r1
smull r3, r2, fp, r1
ldr r5, [sl, #0x18]
str r2, [sp, #0x18]
str r3, [sp, #0x14]
smull r3, r2, r5, r1
str r2, [sp, #0x20]
ldr r2, [sl, #0x20]
str r3, [sp, #0x1c]
str r2, [sp, #0x10]
ldr r5, [sp, #0x10]
ldmia sl, {r3, lr}
smull ip, r5, lr, r5
subs r0, ip, r0
ldr r2, [sl, #0xc]
sbc r4, r5, r4
smull r1, r5, r2, r1
str r5, [sp, #0x28]
mov r5, r0, lsr #0xc
ldr fp, [sl, #0x14]
orr r5, r5, r4, lsl #20
smull r4, r2, lr, fp
ldr r0, [sp, #0x14]
subs r4, r4, r0
ldr r0, [sp, #0x18]
mov r4, r4, lsr #0xc
sbc r0, r2, r0
orr r4, r4, r0, lsl #20
ldr r0, [sp, #0x10]
ldr r2, [sp, #0x1c]
smull ip, r0, r3, r0
subs r2, ip, r2
ldr ip, [sp, #0x20]
sbc r0, r0, ip
smull ip, fp, r3, fp
ldr r3, [sp, #0x28]
subs r1, ip, r1
sbc r3, fp, r3
mov fp, r2, lsr #0xc
orr fp, fp, r0, lsl #20
mov r0, r1, lsr #0xc
orr r0, r0, r3, lsl #20
str r0, [sp, #0x24]
bl FX_GetDivResult
smull r2, r1, r0, r5
mov r2, r2, lsr #0xc
orr r2, r2, r1, lsl #20
rsb lr, r2, #0
smull r2, r1, r0, r4
mov r4, r2, lsr #0xc
orr r4, r4, r1, lsl #20
smull r2, r1, r0, fp
mov r3, r2, lsr #0xc
orr r3, r3, r1, lsl #20
ldr r1, [sp, #0x24]
umull fp, r5, r0, r7
smull r2, r1, r0, r1
mov r2, r2, lsr #0xc
orr r2, r2, r1, lsl #20
ldr r1, [sp, #8]
mov ip, r0, asr #0x1f
mla r5, r0, r1, r5
mla r5, ip, r7, r5
mov r1, fp, lsr #0xc
orr r1, r1, r5, lsl #20
stmia sb, {r1, lr}
str r4, [sb, #8]
ldr r1, [sp, #4]
umull r5, r4, r0, r8
mla r4, r0, r1, r4
mla r4, ip, r8, r4
mov r1, r5, lsr #0xc
orr r1, r1, r4, lsl #20
rsb r1, r1, #0
str r1, [sb, #0xc]
ldr r1, [sp, #0xc]
rsb r2, r2, #0
str r3, [sb, #0x10]
str r2, [sb, #0x14]
umull r3, r2, r0, r6
mla r2, r0, r1, r2
mla r2, ip, r6, r2
mov r1, r3, lsr #0xc
orr r1, r1, r2, lsl #20
str r1, [sb, #0x18]
ldr r3, [sl]
ldr r1, [sl, #0x1c]
ldr r2, [sl, #0x18]
smull r5, r4, r3, r1
ldr r1, [sl, #4]
smull r3, r1, r2, r1
subs r2, r5, r3
sbc r1, r4, r1
mov r2, r2, lsr #0xc
orr r2, r2, r1, lsl #20
smull r2, r1, r0, r2
mov r2, r2, lsr #0xc
orr r2, r2, r1, lsl #20
rsb r1, r2, #0
str r1, [sb, #0x1c]
ldr r4, [sl]
ldr r3, [sl, #0x10]
ldr r2, [sl, #0xc]
ldr r1, [sl, #4]
smull r6, r5, r4, r3
smull r3, r1, r2, r1
subs r2, r6, r3
sbc r1, r5, r1
mov r2, r2, lsr #0xc
orr r2, r2, r1, lsl #20
mov r1, r2, asr #0x1f
umull r4, r3, r0, r2
mla r3, r0, r1, r3
add r0, sp, #0x2c
mla r3, ip, r2, r3
mov r1, r4, lsr #0xc
orr r1, r1, r3, lsl #20
str r1, [sb, #0x20]
cmp sb, r0
bne _020CB404
ldr r1, [sp]
bl MI_Copy36B
_020CB404:
mov r0, #0
add sp, sp, #0x50
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
arm_func_end MTX_Inverse33
arm_func_start MTX_Concat33
MTX_Concat33: ; 0x020CB410
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
sub sp, sp, #0x40
mov ip, r2
ldr r3, [r0, #4]
ldr r2, [r1, #0xc]
cmp ip, r1
smull r7, r5, r3, r2
ldr r6, [r0]
ldr r4, [r1]
addeq sl, sp, #0x1c
smlal r7, r5, r6, r4
ldr r2, [r0, #8]
ldr r4, [r1, #0x18]
movne sl, ip
smlal r7, r5, r2, r4
mov r4, r7, lsr #0xc
orr r4, r4, r5, lsl #20
str r4, [sl]
ldr r4, [r1, #0x10]
ldr r5, [r1, #4]
smull r8, r7, r3, r4
smlal r8, r7, r6, r5
ldr r4, [r1, #0x1c]
smlal r8, r7, r2, r4
mov r4, r8, lsr #0xc
orr r4, r4, r7, lsl #20
str r4, [sl, #4]
ldr r4, [r1, #0x14]
ldr r5, [r1, #8]
smull r8, r7, r3, r4
smlal r8, r7, r6, r5
ldr r3, [r1, #0x20]
smlal r8, r7, r2, r3
mov r2, r8, lsr #0xc
orr r2, r2, r7, lsl #20
str r2, [sl, #8]
ldr sb, [r0, #0x10]
ldr r2, [r0, #0xc]
smull r7, r6, sb, r4
smlal r7, r6, r2, r5
ldr r4, [r0, #0x14]
smlal r7, r6, r4, r3
mov r3, r7, lsr #0xc
orr r3, r3, r6, lsl #20
str r3, [sl, #0x14]
ldr r3, [r1, #0x10]
ldr r5, [r1, #4]
smull r7, r6, sb, r3
smlal r7, r6, r2, r5
ldr r5, [r1, #0x1c]
mov r3, sb, asr #0x1f
smlal r7, r6, r4, r5
str r3, [sp]
mov r3, r7, lsr #0xc
orr r3, r3, r6, lsl #20
str r3, [sl, #0x10]
mov r3, r2, asr #0x1f
str r3, [sp, #4]
mov r3, r4, asr #0x1f
ldr r8, [r1, #0xc]
str r3, [sp, #8]
mov r3, r8, asr #0x1f
str r3, [sp, #0x18]
ldr r7, [r1]
ldr r6, [r1, #0x18]
mov r3, r7, asr #0x1f
str r3, [sp, #0xc]
umull r3, r5, r4, r6
mov fp, r6, asr #0x1f
str r3, [sp, #0x10]
mla r5, r4, fp, r5
ldr r3, [sp, #8]
add lr, sp, #0x1c
mla r5, r3, r6, r5
umull r3, r4, r2, r7
str r3, [sp, #0x14]
ldr r3, [sp, #0xc]
mla r4, r2, r3, r4
ldr r2, [sp, #4]
umull r3, fp, sb, r8
mla r4, r2, r7, r4
ldr r2, [sp, #0x14]
adds r3, r2, r3
ldr r2, [sp, #0x18]
mla fp, sb, r2, fp
ldr r2, [sp]
mla fp, r2, r8, fp
adc r4, r4, fp
ldr r2, [sp, #0x10]
ldr fp, [sp, #0x18]
adds r3, r2, r3
adc r2, r5, r4
mov r3, r3, lsr #0xc
orr r3, r3, r2, lsl #20
str r3, [sl, #0xc]
ldr r2, [r0, #0x1c]
ldr r5, [r0, #0x18]
ldr r4, [r0, #0x20]
umull r3, r0, r2, r8
mla r0, r2, fp, r0
mov sb, r2, asr #0x1f
mla r0, sb, r8, r0
smlal r3, r0, r5, r7
smlal r3, r0, r4, r6
mov r3, r3, lsr #0xc
orr r3, r3, r0, lsl #20
str r3, [sl, #0x18]
ldr r0, [r1, #0x10]
ldr r3, [r1, #4]
smull r7, r0, r2, r0
cmp sl, lr
smlal r7, r0, r5, r3
ldr r6, [r1, #0x1c]
addne sp, sp, #0x40
smlal r7, r0, r4, r6
mov r3, r7, lsr #0xc
orr r3, r3, r0, lsl #20
str r3, [sl, #0x1c]
ldr r0, [r1, #0x14]
ldr r6, [r1, #0x20]
ldr r3, [r1, #8]
smull r1, r0, r2, r0
smlal r1, r0, r5, r3
smlal r1, r0, r4, r6
mov r1, r1, lsr #0xc
orr r1, r1, r0, lsl #20
str r1, [sl, #0x20]
ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldmia lr!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldr r0, [lr]
str r0, [ip]
add sp, sp, #0x40
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
arm_func_end MTX_Concat33
arm_func_start MTX_MultVec33
MTX_MultVec33: ; 0x020CB630
stmdb sp!, {r4, r5, r6, lr}
ldr r4, [r1, #0xc]
ldmia r0, {r3, ip}
smull r6, r5, ip, r4
ldr r4, [r1]
ldr r0, [r0, #8]
smlal r6, r5, r3, r4
ldr r4, [r1, #0x18]
smlal r6, r5, r0, r4
mov r4, r6, lsr #0xc
orr r4, r4, r5, lsl #20
str r4, [r2]
ldr r4, [r1, #0x10]
ldr r5, [r1, #4]
smull r6, lr, ip, r4
smlal r6, lr, r3, r5
ldr r4, [r1, #0x1c]
smlal r6, lr, r0, r4
mov r4, r6, lsr #0xc
orr r4, r4, lr, lsl #20
str r4, [r2, #4]
ldr lr, [r1, #0x14]
ldr r4, [r1, #8]
smull r5, lr, ip, lr
smlal r5, lr, r3, r4
ldr r1, [r1, #0x20]
smlal r5, lr, r0, r1
mov r0, r5, lsr #0xc
orr r0, r0, lr, lsl #20
str r0, [r2, #8]
ldmia sp!, {r4, r5, r6, pc}
arm_func_end MTX_MultVec33

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@ -1,685 +0,0 @@
.include "asm/macros.inc"
.include "fx_mtx43.inc"
.include "global.inc"
.text
arm_func_start MTX_Identity43_
MTX_Identity43_: ; 0x020CB6AC
mov r2, #0x1000
mov r3, #0
stmia r0!, {r2, r3}
mov r1, #0
stmia r0!, {r1, r3}
stmia r0!, {r2, r3}
stmia r0!, {r1, r3}
stmia r0!, {r2, r3}
stmia r0!, {r1, r3}
bx lr
arm_func_end MTX_Identity43_
arm_func_start MTX_Copy43To44_
MTX_Copy43To44_: ; 0x020CB6D4
stmdb sp!, {r4}
mov ip, #0
ldmia r0!, {r2, r3, r4}
stmia r1!, {r2, r3, r4, ip}
ldmia r0!, {r2, r3, r4}
stmia r1!, {r2, r3, r4, ip}
ldmia r0!, {r2, r3, r4}
stmia r1!, {r2, r3, r4, ip}
mov ip, #0x1000
ldmia r0!, {r2, r3, r4}
stmia r1!, {r2, r3, r4, ip}
ldmia sp!, {r4}
bx lr
arm_func_end MTX_Copy43To44_
arm_func_start MTX_TransApply43
MTX_TransApply43: ; 0x020CB708
stmdb sp!, {r3, r4, r5, r6, r7, lr}
mov r7, r0
mov r6, r1
mov r5, r2
mov r4, r3
cmp r7, r6
beq _020CB728
bl MI_Copy36B
_020CB728:
ldr r0, [r7, #0xc]
ldr r1, [r7]
smull r3, r2, r4, r0
smlal r3, r2, r5, r1
ldr r0, [sp, #0x18]
ldr r1, [r7, #0x18]
ldr ip, [r7, #0x24]
smlal r3, r2, r0, r1
mov r1, r3, lsr #0xc
orr r1, r1, r2, lsl #20
add r1, ip, r1
str r1, [r6, #0x24]
ldr r1, [r7, #0x10]
ldr r2, [r7, #4]
smull ip, r3, r4, r1
smlal ip, r3, r5, r2
ldr r1, [r7, #0x1c]
ldr r2, [r7, #0x28]
smlal ip, r3, r0, r1
mov r1, ip, lsr #0xc
orr r1, r1, r3, lsl #20
add r1, r2, r1
str r1, [r6, #0x28]
ldr r1, [r7, #0x14]
ldr r2, [r7, #8]
smull ip, r3, r4, r1
smlal ip, r3, r5, r2
ldr r1, [r7, #0x20]
ldr r2, [r7, #0x2c]
smlal ip, r3, r0, r1
mov r0, ip, lsr #0xc
orr r0, r0, r3, lsl #20
add r0, r2, r0
str r0, [r6, #0x2c]
ldmia sp!, {r3, r4, r5, r6, r7, pc}
arm_func_end MTX_TransApply43
thumb_func_start MTX_Scale43_
MTX_Scale43_: ; 0x020CB7B4
stmia r0!, {r1}
mov r1, #0
str r3, [r0, #0x1c]
mov r3, #0
stmia r0!, {r1, r3}
stmia r0!, {r1, r2, r3}
mov r2, #0
stmia r0!, {r1, r3}
add r0, #4
stmia r0!, {r1, r2, r3}
bx lr
.align 2, 0
thumb_func_end MTX_Scale43_
arm_func_start MTX_ScaleApply43
MTX_ScaleApply43: ; 0x020CB7CC
stmdb sp!, {r3, r4, r5, lr}
ldr ip, [sp, #0x10]
mov r5, r0
str ip, [sp]
mov r4, r1
bl MTX_ScaleApply33
ldr r0, [r5, #0x24]
str r0, [r4, #0x24]
ldr r0, [r5, #0x28]
str r0, [r4, #0x28]
ldr r0, [r5, #0x2c]
str r0, [r4, #0x2c]
ldmia sp!, {r3, r4, r5, pc}
arm_func_end MTX_ScaleApply43
thumb_func_start MTX_RotX43_
MTX_RotX43_: ; 0x020CB800
str r1, [r0, #0x14]
neg r1, r1
str r1, [r0, #0x1c]
mov r1, #1
lsl r1, r1, #0xc
stmia r0!, {r1}
mov r3, #0
mov r1, #0
stmia r0!, {r1, r3}
stmia r0!, {r1, r2}
str r1, [r0, #4]
add r0, #0xc
stmia r0!, {r2, r3}
stmia r0!, {r1, r3}
bx lr
.align 2, 0
thumb_func_end MTX_RotX43_
thumb_func_start MTX_RotY43_
MTX_RotY43_: ; 0x020CB820
str r1, [r0, #0x18]
mov r3, #0
stmia r0!, {r2, r3}
neg r1, r1
stmia r0!, {r1, r3}
mov r1, #1
lsl r1, r1, #0xc
stmia r0!, {r1, r3}
add r0, #4
mov r1, #0
stmia r0!, {r1, r2, r3}
stmia r0!, {r1, r3}
bx lr
.align 2, 0
thumb_func_end MTX_RotY43_
arm_func_start MTX_Inverse43
MTX_Inverse43: ; 0x020CB83C
stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
sub sp, sp, #0x5c
mov sl, r0
ldr r0, [sl, #0x14]
cmp sl, r1
addeq sb, sp, #0x2c
ldr r3, [sl, #0x18]
ldr r2, [sl, #0xc]
ldr r6, [sl, #0x20]
str r1, [sp]
movne sb, r1
smull fp, r8, r2, r6
smull r7, r1, r0, r3
subs r7, fp, r7
sbc ip, r8, r1
ldr r4, [sl, #0x10]
ldr r5, [sl, #0x1c]
adds r1, r7, #0x800
smull fp, r8, r4, r6
smull r7, r6, r0, r5
adc r0, ip, #0
subs r7, fp, r7
sbc r6, r8, r6
mov r8, r1, lsr #0xc
orr r8, r8, r0, lsl #20
smull r1, r0, r2, r5
adds r7, r7, #0x800
smull r5, r3, r4, r3
adc r2, r6, #0
mov r7, r7, lsr #0xc
orr r7, r7, r2, lsl #20
subs r1, r1, r5
sbc r5, r0, r3
ldr r2, [sl]
adds r6, r1, #0x800
ldr fp, [sl, #4]
smull r4, r3, r2, r7
smull r1, r0, fp, r8
adc r2, r5, #0
mov r6, r6, lsr #0xc
orr r6, r6, r2, lsl #20
subs r2, r4, r1
ldr r1, [sl, #8]
sbc r0, r3, r0
smlal r2, r0, r1, r6
adds r1, r2, #0x800
adc r2, r0, #0
mov r0, r1, lsr #0xc
mov r1, r8, asr #0x1f
str r1, [sp, #4]
mov r1, r7, asr #0x1f
str r1, [sp, #8]
mov r1, r6, asr #0x1f
str r1, [sp, #0xc]
orrs r0, r0, r2, lsl #20
mov r1, #0
addeq sp, sp, #0x5c
subeq r0, r1, #1
ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
bl FX_InvAsync
ldr r1, [sl, #8]
ldr r2, [sl, #0x1c]
ldr fp, [sl, #0x10]
smull r0, r4, r2, r1
smull r3, r2, fp, r1
ldr r5, [sl, #0x18]
str r2, [sp, #0x18]
str r3, [sp, #0x14]
smull r3, r2, r5, r1
str r2, [sp, #0x20]
ldr r2, [sl, #0x20]
str r3, [sp, #0x1c]
str r2, [sp, #0x10]
ldr r5, [sp, #0x10]
ldmia sl, {r3, lr}
smull ip, r5, lr, r5
subs r0, ip, r0
ldr r2, [sl, #0xc]
sbc r4, r5, r4
smull r1, r5, r2, r1
str r5, [sp, #0x28]
mov r5, r0, lsr #0xc
ldr fp, [sl, #0x14]
orr r5, r5, r4, lsl #20
smull r4, r2, lr, fp
ldr r0, [sp, #0x14]
subs r4, r4, r0
ldr r0, [sp, #0x18]
mov r4, r4, lsr #0xc
sbc r0, r2, r0
orr r4, r4, r0, lsl #20
ldr r0, [sp, #0x10]
ldr r2, [sp, #0x1c]
smull ip, r0, r3, r0
subs r2, ip, r2
ldr ip, [sp, #0x20]
sbc r0, r0, ip
smull ip, fp, r3, fp
ldr r3, [sp, #0x28]
subs r1, ip, r1
sbc r3, fp, r3
mov fp, r2, lsr #0xc
orr fp, fp, r0, lsl #20
mov r0, r1, lsr #0xc
orr r0, r0, r3, lsl #20
str r0, [sp, #0x24]
bl FX_GetDivResult
smull r2, r1, r0, r5
mov r2, r2, lsr #0xc
orr r2, r2, r1, lsl #20
rsb lr, r2, #0
smull r2, r1, r0, r4
mov r4, r2, lsr #0xc
orr r4, r4, r1, lsl #20
smull r2, r1, r0, fp
mov r3, r2, lsr #0xc
orr r3, r3, r1, lsl #20
ldr r1, [sp, #0x24]
umull fp, r5, r0, r7
smull r2, r1, r0, r1
mov r2, r2, lsr #0xc
orr r2, r2, r1, lsl #20
ldr r1, [sp, #8]
mov ip, r0, asr #0x1f
mla r5, r0, r1, r5
mla r5, ip, r7, r5
mov r1, fp, lsr #0xc
orr r1, r1, r5, lsl #20
stmia sb, {r1, lr}
str r4, [sb, #8]
ldr r1, [sp, #4]
umull r5, r4, r0, r8
mla r4, r0, r1, r4
mla r4, ip, r8, r4
mov r1, r5, lsr #0xc
orr r1, r1, r4, lsl #20
rsb r1, r1, #0
str r1, [sb, #0xc]
ldr r1, [sp, #0xc]
rsb r2, r2, #0
str r3, [sb, #0x10]
str r2, [sb, #0x14]
umull r3, r2, r0, r6
mla r2, r0, r1, r2
mla r2, ip, r6, r2
mov r1, r3, lsr #0xc
orr r1, r1, r2, lsl #20
str r1, [sb, #0x18]
ldr r3, [sl]
ldr r1, [sl, #0x1c]
ldr r2, [sl, #0x18]
smull r5, r4, r3, r1
ldr r1, [sl, #4]
smull r3, r1, r2, r1
subs r2, r5, r3
sbc r1, r4, r1
mov r2, r2, lsr #0xc
orr r2, r2, r1, lsl #20
smull r2, r1, r0, r2
mov r2, r2, lsr #0xc
orr r2, r2, r1, lsl #20
rsb r1, r2, #0
str r1, [sb, #0x1c]
ldr r4, [sl]
ldr r3, [sl, #0x10]
ldr r2, [sl, #0xc]
ldr r1, [sl, #4]
smull r6, r5, r4, r3
smull r3, r1, r2, r1
subs r2, r6, r3
sbc r1, r5, r1
mov r2, r2, lsr #0xc
orr r2, r2, r1, lsl #20
mov r1, r2, asr #0x1f
umull r4, r3, r0, r2
mla r3, r0, r1, r3
mla r3, ip, r2, r3
mov r0, r4, lsr #0xc
orr r0, r0, r3, lsl #20
str r0, [sb, #0x20]
ldr r1, [sb, #0xc]
ldr r0, [sl, #0x28]
ldr r2, [sb]
smull r5, r4, r1, r0
ldr r0, [sl, #0x24]
ldr r3, [sb, #0x18]
smlal r5, r4, r2, r0
ldr r1, [sl, #0x2c]
add r0, sp, #0x2c
smlal r5, r4, r3, r1
mov r1, r5, lsr #0xc
orr r1, r1, r4, lsl #20
rsb r1, r1, #0
str r1, [sb, #0x24]
ldr r2, [sb, #0x10]
ldr r1, [sl, #0x28]
ldr r3, [sb, #4]
smull r5, r4, r2, r1
ldr r1, [sl, #0x24]
ldr r2, [sb, #0x1c]
smlal r5, r4, r3, r1
ldr r1, [sl, #0x2c]
cmp sb, r0
smlal r5, r4, r2, r1
mov r1, r5, lsr #0xc
orr r1, r1, r4, lsl #20
rsb r1, r1, #0
str r1, [sb, #0x28]
ldr r2, [sb, #0x14]
ldr r1, [sl, #0x28]
ldr r3, [sb, #8]
smull r6, r5, r2, r1
ldr r1, [sl, #0x24]
ldr r4, [sb, #0x20]
smlal r6, r5, r3, r1
ldr r2, [sl, #0x2c]
smlal r6, r5, r4, r2
mov r1, r6, lsr #0xc
orr r1, r1, r5, lsl #20
rsb r1, r1, #0
str r1, [sb, #0x2c]
bne _020CBBBC
ldr r1, [sp]
bl MI_Copy48B
_020CBBBC:
mov r0, #0
add sp, sp, #0x5c
ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
arm_func_end MTX_Inverse43
arm_func_start MTX_Concat43
MTX_Concat43: ; 0x020CBBC8
stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
sub sp, sp, #0x4c
mov ip, r2
ldr r2, [r0, #4]
ldr r3, [r1, #0xc]
cmp ip, r1
smull r7, r4, r2, r3
ldr r6, [r0]
ldr r3, [r1]
addeq sl, sp, #0x1c
smlal r7, r4, r6, r3
ldr r5, [r0, #8]
ldr r3, [r1, #0x18]
movne sl, ip
smlal r7, r4, r5, r3
mov r3, r7, lsr #0xc
orr r3, r3, r4, lsl #20
str r3, [sl]
ldr r3, [r1, #0x10]
ldr r4, [r1, #4]
smull r8, r7, r2, r3
smlal r8, r7, r6, r4
ldr r3, [r1, #0x1c]
smlal r8, r7, r5, r3
mov r3, r8, lsr #0xc
orr r3, r3, r7, lsl #20
str r3, [sl, #4]
ldr r3, [r1, #0x14]
ldr r4, [r1, #8]
smull r8, r7, r2, r3
smlal r8, r7, r6, r4
ldr r2, [r1, #0x20]
smlal r8, r7, r5, r2
mov r5, r8, lsr #0xc
orr r5, r5, r7, lsl #20
str r5, [sl, #8]
ldr r8, [r0, #0x10]
ldr sb, [r0, #0xc]
smull r5, r3, r8, r3
smlal r5, r3, sb, r4
ldr r7, [r0, #0x14]
mov r6, sb, asr #0x1f
smlal r5, r3, r7, r2
mov r2, r5, lsr #0xc
orr r2, r2, r3, lsl #20
str r2, [sl, #0x14]
ldr r2, [r1, #0x10]
ldr r3, [r1, #4]
smull r5, r4, r8, r2
smlal r5, r4, sb, r3
ldr r3, [r1, #0x1c]
mov r2, r8, asr #0x1f
smlal r5, r4, r7, r3
str r2, [sp, #0x14]
mov r2, r5, lsr #0xc
orr r2, r2, r4, lsl #20
str r2, [sl, #0x10]
mov r2, r7, asr #0x1f
ldr r5, [r1]
str r2, [sp]
ldr r4, [r1, #0xc]
ldr lr, [r1, #0x18]
mov r2, r4, asr #0x1f
str r2, [sp, #4]
mov r2, r5, asr #0x1f
str r2, [sp, #8]
umull r2, r3, r7, lr
mov fp, lr, asr #0x1f
mla r3, r7, fp, r3
str r2, [sp, #0xc]
ldr r2, [sp]
ldr r7, [sp, #8]
mla r3, r2, lr, r3
umull fp, r2, sb, r5
mla r2, sb, r7, r2
mla r2, r6, r5, r2
ldr r6, [sp, #4]
umull sb, r7, r8, r4
mla r7, r8, r6, r7
ldr r8, [sp, #0x14]
adds r6, fp, sb
mla r7, r8, r4, r7
adc r7, r2, r7
ldr r2, [sp, #0xc]
adds r6, r2, r6
adc r2, r3, r7
mov r3, r6, lsr #0xc
orr r3, r3, r2, lsl #20
str r3, [sl, #0xc]
ldr r3, [r0, #0x1c]
ldr r6, [r0, #0x18]
smull r7, r4, r3, r4
smlal r7, r4, r6, r5
ldr r2, [r0, #0x20]
smlal r7, r4, r2, lr
mov r5, r7, lsr #0xc
orr r5, r5, r4, lsl #20
str r5, [sl, #0x18]
ldr r4, [r1, #0x10]
ldr r5, [r1, #4]
smull r8, r4, r3, r4
smlal r8, r4, r6, r5
ldr r7, [r1, #0x1c]
smlal r8, r4, r2, r7
mov r5, r8, lsr #0xc
orr r5, r5, r4, lsl #20
str r5, [sl, #0x1c]
ldr r5, [r1, #0x14]
ldr r4, [r1, #8]
smull r8, r7, r3, r5
smlal r8, r7, r6, r4
ldr r3, [r1, #0x20]
smlal r8, r7, r2, r3
mov r2, r8, lsr #0xc
orr r2, r2, r7, lsl #20
str r2, [sl, #0x20]
ldr r2, [r0, #0x28]
ldr sb, [r0, #0x24]
ldr r7, [r0, #0x2c]
smull r5, r0, r2, r5
smlal r5, r0, sb, r4
smlal r5, r0, r7, r3
mov r3, r5, lsr #0xc
orr r3, r3, r0, lsl #20
mov r0, r7, asr #0x1f
str r0, [sp, #0x18]
ldr r0, [r1, #0x2c]
mov fp, r2, asr #0x1f
adds r0, r0, r3
str r0, [sl, #0x2c]
ldr r3, [r1, #0x10]
ldr r4, [r1, #4]
smull r6, r3, r2, r3
smlal r6, r3, sb, r4
ldr r5, [r1, #0x1c]
ldr r0, [r1, #0x28]
smlal r6, r3, r7, r5
mov r4, r6, lsr #0xc
orr r4, r4, r3, lsl #20
adds r0, r0, r4
mov r8, sb, asr #0x1f
str r0, [sl, #0x28]
ldr r4, [r1]
ldr r3, [r1, #0xc]
umull r0, r5, sb, r4
mov lr, r4, asr #0x1f
mla r5, sb, lr, r5
mov sb, r3, asr #0x1f
str r0, [sp, #0x10]
mla r5, r8, r4, r5
umull r8, r0, r2, r3
mla r0, r2, sb, r0
ldr r4, [sp, #0x10]
mla r0, fp, r3, r0
adds r4, r4, r8
adc r2, r5, r0
ldr r6, [r1, #0x18]
ldr r8, [r1, #0x24]
mov r1, r6, asr #0x1f
umull r5, r3, r7, r6
mla r3, r7, r1, r3
adds r1, r5, r4
ldr r0, [sp, #0x18]
mov r1, r1, lsr #0xc
mla r3, r0, r6, r3
adc r0, r3, r2
orr r1, r1, r0, lsl #20
adds r0, r8, r1
add r4, sp, #0x1c
cmp sl, r4
addne sp, sp, #0x4c
str r0, [sl, #0x24]
ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
ldmia r4!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldmia r4!, {r0, r1, r2, r3}
stmia ip!, {r0, r1, r2, r3}
ldmia r4, {r0, r1, r2, r3}
stmia ip, {r0, r1, r2, r3}
add sp, sp, #0x4c
ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
arm_func_end MTX_Concat43
arm_func_start MTX_MultVec43
MTX_MultVec43: ; 0x020CBE9C
stmdb sp!, {r4, r5, r6, lr}
ldr r4, [r1, #0xc]
ldmia r0, {r3, ip}
smull r6, r5, ip, r4
ldr r4, [r1]
ldr r0, [r0, #8]
smlal r6, r5, r3, r4
ldr r4, [r1, #0x18]
smlal r6, r5, r0, r4
mov r6, r6, lsr #0xc
orr r6, r6, r5, lsl #20
str r6, [r2]
ldr r4, [r1, #0x24]
add r4, r6, r4
str r4, [r2]
ldr r4, [r1, #0x10]
ldr r5, [r1, #4]
smull r6, lr, ip, r4
smlal r6, lr, r3, r5
ldr r4, [r1, #0x1c]
smlal r6, lr, r0, r4
mov r5, r6, lsr #0xc
orr r5, r5, lr, lsl #20
str r5, [r2, #4]
ldr r4, [r1, #0x28]
add r4, r5, r4
str r4, [r2, #4]
ldr lr, [r1, #0x14]
ldr r4, [r1, #8]
smull r5, lr, ip, lr
smlal r5, lr, r3, r4
ldr r3, [r1, #0x20]
smlal r5, lr, r0, r3
mov r3, r5, lsr #0xc
orr r3, r3, lr, lsl #20
str r3, [r2, #8]
ldr r0, [r1, #0x2c]
add r0, r3, r0
str r0, [r2, #8]
ldmia sp!, {r4, r5, r6, pc}
arm_func_end MTX_MultVec43
arm_func_start MTX_LookAt
MTX_LookAt: ; 0x020CBF3C
stmdb sp!, {r3, r4, r5, r6, lr}
sub sp, sp, #0x24
mov r6, r0
ldr r5, [r6]
ldr r4, [r2]
add r0, sp, #0x18
sub r4, r5, r4
str r4, [sp, #0x18]
ldr ip, [r6, #4]
ldr r4, [r2, #4]
mov r5, r1
sub r1, ip, r4
str r1, [sp, #0x1c]
ldr r4, [r6, #8]
ldr r2, [r2, #8]
mov r1, r0
sub r2, r4, r2
mov r4, r3
str r2, [sp, #0x20]
bl VEC_Normalize
add r1, sp, #0x18
add r2, sp, #0xc
mov r0, r5
bl VEC_CrossProduct
add r0, sp, #0xc
mov r1, r0
bl VEC_Normalize
add r0, sp, #0x18
add r1, sp, #0xc
add r2, sp, #0
bl VEC_CrossProduct
ldr r1, [sp, #0xc]
mov r0, r6
str r1, [r4]
ldr r2, [sp]
add r1, sp, #0xc
str r2, [r4, #4]
ldr r2, [sp, #0x18]
str r2, [r4, #8]
ldr r2, [sp, #0x10]
str r2, [r4, #0xc]
ldr r2, [sp, #4]
str r2, [r4, #0x10]
ldr r2, [sp, #0x1c]
str r2, [r4, #0x14]
ldr r2, [sp, #0x14]
str r2, [r4, #0x18]
ldr r2, [sp, #8]
str r2, [r4, #0x1c]
ldr r2, [sp, #0x20]
str r2, [r4, #0x20]
bl VEC_DotProduct
rsb r0, r0, #0
str r0, [r4, #0x24]
mov r0, r6
add r1, sp, #0
bl VEC_DotProduct
rsb r0, r0, #0
str r0, [r4, #0x28]
mov r0, r6
add r1, sp, #0x18
bl VEC_DotProduct
rsb r0, r0, #0
str r0, [r4, #0x2c]
add sp, sp, #0x24
ldmia sp!, {r3, r4, r5, r6, pc}
arm_func_end MTX_LookAt

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@ -1,802 +0,0 @@
.include "asm/macros.inc"
.include "fx_mtx44.inc"
.include "global.inc"
.text
arm_func_start MTX_Identity44_
MTX_Identity44_: ; 0x020CC044
mov r2, #0x1000
mov r3, #0
stmia r0!, {r2, r3}
mov r1, #0
stmia r0!, {r1, r3}
stmia r0!, {r1, r2, r3}
stmia r0!, {r1, r3}
stmia r0!, {r1, r2, r3}
stmia r0!, {r1, r3}
stmia r0!, {r1, r2}
bx lr
arm_func_end MTX_Identity44_
arm_func_start MTX_Copy44To43_
MTX_Copy44To43_: ; 0x020CC070
ldmia r0!, {r2, r3, ip}
add r0, r0, #4
stmia r1!, {r2, r3, ip}
ldmia r0!, {r2, r3, ip}
add r0, r0, #4
stmia r1!, {r2, r3, ip}
ldmia r0!, {r2, r3, ip}
add r0, r0, #4
stmia r1!, {r2, r3, ip}
ldmia r0!, {r2, r3, ip}
add r0, r0, #4
stmia r1!, {r2, r3, ip}
bx lr
arm_func_end MTX_Copy44To43_
arm_func_start MTX_TransApply44
MTX_TransApply44: ; 0x020CC0A4
stmdb sp!, {r3, r4, r5, r6, r7, lr}
mov r7, r0
mov r6, r1
mov r5, r2
mov r4, r3
cmp r7, r6
beq _020CC0C4
bl MI_Copy48B
_020CC0C4:
ldr r0, [r7, #0x10]
ldr r1, [r7]
smull r3, r2, r4, r0
smlal r3, r2, r5, r1
ldr r0, [sp, #0x18]
ldr r1, [r7, #0x20]
ldr ip, [r7, #0x30]
smlal r3, r2, r0, r1
mov r1, r3, lsr #0xc
orr r1, r1, r2, lsl #20
add r1, ip, r1
str r1, [r6, #0x30]
ldr r1, [r7, #0x14]
ldr r2, [r7, #4]
smull ip, r3, r4, r1
smlal ip, r3, r5, r2
ldr r1, [r7, #0x24]
ldr r2, [r7, #0x34]
smlal ip, r3, r0, r1
mov r1, ip, lsr #0xc
orr r1, r1, r3, lsl #20
add r1, r2, r1
str r1, [r6, #0x34]
ldr r1, [r7, #0x18]
ldr r2, [r7, #8]
smull ip, r3, r4, r1
smlal ip, r3, r5, r2
ldr r1, [r7, #0x28]
ldr r2, [r7, #0x38]
smlal ip, r3, r0, r1
mov r1, ip, lsr #0xc
orr r1, r1, r3, lsl #20
add r1, r2, r1
str r1, [r6, #0x38]
ldr r1, [r7, #0x1c]
ldr r2, [r7, #0xc]
smull ip, r3, r4, r1
smlal ip, r3, r5, r2
ldr r1, [r7, #0x2c]
ldr r2, [r7, #0x3c]
smlal ip, r3, r0, r1
mov r0, ip, lsr #0xc
orr r0, r0, r3, lsl #20
add r0, r2, r0
str r0, [r6, #0x3c]
ldmia sp!, {r3, r4, r5, r6, r7, pc}
arm_func_end MTX_TransApply44
thumb_func_start MTX_RotX44_
MTX_RotX44_: ; 0x020CC17C
str r2, [r0, #0x14]
str r2, [r0, #0x28]
str r1, [r0, #0x18]
neg r1, r1
str r1, [r0, #0x24]
mov r1, #1
mov r2, #0
lsl r1, r1, #0xc
mov r3, #0
stmia r0!, {r1, r2, r3}
stmia r0!, {r2, r3}
add r0, #8
stmia r0!, {r2, r3}
add r0, #8
stmia r0!, {r2, r3}
stmia r0!, {r2, r3}
str r1, [r0]
bx lr
thumb_func_end MTX_RotX44_
thumb_func_start MTX_RotY44_
MTX_RotY44_: ; 0x020CC1A0
str r2, [r0]
str r2, [r0, #0x28]
str r1, [r0, #0x20]
neg r1, r1
str r1, [r0, #8]
mov r3, #1
mov r1, #0
lsl r3, r3, #0xc
mov r2, #0
str r2, [r0, #4]
add r0, #0xc
stmia r0!, {r1, r2, r3}
stmia r0!, {r1, r2}
str r2, [r0, #4]
add r0, #0xc
stmia r0!, {r1, r2}
stmia r0!, {r1, r2, r3}
bx lr
thumb_func_end MTX_RotY44_
thumb_func_start MTX_RotZ44_
MTX_RotZ44_: ; 0x020CC1C4
str r2, [r0]
str r2, [r0, #0x14]
str r1, [r0, #4]
neg r1, r1
str r1, [r0, #0x10]
mov r3, #1
mov r1, #0
lsl r3, r3, #0xc
mov r2, #0
add r0, #8
stmia r0!, {r1, r2}
add r0, #8
stmia r0!, {r1, r2}
stmia r0!, {r1, r2, r3}
stmia r0!, {r1, r2}
stmia r0!, {r1, r2, r3}
bx lr
.align 2, 0
thumb_func_end MTX_RotZ44_
arm_func_start MTX_Concat44
MTX_Concat44: ; 0x020CC1E8
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
sub sp, sp, #0xe8
cmp r2, r1
addeq sl, sp, #0xa8
str r2, [sp]
movne sl, r2
ldr r4, [r0, #4]
ldr r2, [r1, #0x10]
ldr r5, [r0]
smull r8, r7, r4, r2
ldr r2, [r1]
ldr r3, [r0, #8]
smlal r8, r7, r5, r2
ldr r6, [r1, #0x20]
ldr r2, [r0, #0xc]
smlal r8, r7, r3, r6
ldr r6, [r1, #0x30]
smlal r8, r7, r2, r6
mov r6, r8, lsr #0xc
orr r6, r6, r7, lsl #20
str r6, [sl]
ldr r6, [r1, #0x14]
ldr r7, [r1, #4]
smull sb, r8, r4, r6
smlal sb, r8, r5, r7
ldr r6, [r1, #0x24]
ldr r7, [r1, #0x34]
smlal sb, r8, r3, r6
smlal sb, r8, r2, r7
mov r6, sb, lsr #0xc
orr r6, r6, r8, lsl #20
str r6, [sl, #4]
ldr r6, [r1, #0x1c]
ldr r7, [r1, #0xc]
smull sb, r8, r4, r6
smlal sb, r8, r5, r7
ldr r6, [r1, #0x2c]
ldr r7, [r1, #0x3c]
smlal sb, r8, r3, r6
smlal sb, r8, r2, r7
mov r6, sb, lsr #0xc
orr r6, r6, r8, lsl #20
str r6, [sl, #0xc]
ldr fp, [r1, #0x18]
ldr ip, [r1, #8]
smull r7, r6, r4, fp
ldr r8, [r1, #0x38]
smlal r7, r6, r5, ip
ldr sb, [r1, #0x28]
mov lr, r8, asr #0x1f
smlal r7, r6, r3, sb
smlal r7, r6, r2, r8
mov r2, r7, lsr #0xc
orr r2, r2, r6, lsl #20
str r2, [sl, #8]
mov r2, fp, asr #0x1f
str r2, [sp, #4]
mov r2, ip, asr #0x1f
str r2, [sp, #8]
mov r2, sb, asr #0x1f
str r2, [sp, #0x8c]
ldr r6, [r0, #0x14]
ldr r7, [r0, #0x10]
mov r2, r6, asr #0x1f
str r2, [sp, #0xc]
mov r2, r7, asr #0x1f
ldr r5, [r0, #0x18]
str r2, [sp, #0x10]
mov r2, r5, asr #0x1f
ldr r4, [r0, #0x1c]
str r2, [sp, #0x14]
mov r2, r4, asr #0x1f
str r2, [sp, #0x18]
umull r2, r3, r4, r8
str r2, [sp, #0x1c]
mla r3, r4, lr, r3
ldr r2, [sp, #0x18]
mla r3, r2, r8, r3
umull r8, r2, r5, sb
str r8, [sp, #0x20]
ldr r8, [sp, #0x8c]
mla r2, r5, r8, r2
ldr r8, [sp, #0x14]
mla r2, r8, sb, r2
ldr r8, [sp, #8]
umull lr, sb, r7, ip
mla sb, r7, r8, sb
ldr r8, [sp, #0x10]
mla sb, r8, ip, sb
umull ip, r8, r6, fp
adds lr, lr, ip
ldr ip, [sp, #4]
mla r8, r6, ip, r8
ldr ip, [sp, #0xc]
mla r8, ip, fp, r8
adc sb, sb, r8
ldr r8, [sp, #0x20]
adds fp, r8, lr
adc r8, r2, sb
ldr r2, [sp, #0x1c]
adds sb, r2, fp
adc r2, r3, r8
mov r3, sb, lsr #0xc
orr r3, r3, r2, lsl #20
str r3, [sl, #0x18]
ldr r2, [r1, #0x14]
ldr r3, [r1, #4]
smull fp, r2, r6, r2
smlal fp, r2, r7, r3
ldr r8, [r1, #0x24]
ldr sb, [r1, #0x34]
smlal fp, r2, r5, r8
smlal fp, r2, r4, sb
mov r3, fp, lsr #0xc
orr r3, r3, r2, lsl #20
str r3, [sl, #0x14]
ldr r2, [r1, #0x1c]
ldr r3, [r1, #0xc]
smull fp, r2, r6, r2
smlal fp, r2, r7, r3
ldr r8, [r1, #0x2c]
ldr sb, [r1, #0x3c]
smlal fp, r2, r5, r8
smlal fp, r2, r4, sb
mov r3, fp, lsr #0xc
orr r3, r3, r2, lsl #20
str r3, [sl, #0x1c]
ldr sb, [r1, #0x10]
ldr fp, [r1, #0x30]
smull ip, r8, r6, sb
ldr r3, [r1]
ldr r2, [r1, #0x20]
smlal ip, r8, r7, r3
smlal ip, r8, r5, r2
smlal ip, r8, r4, fp
mov r4, ip, lsr #0xc
orr r4, r4, r8, lsl #20
str r4, [sl, #0x10]
mov r4, r3, asr #0x1f
mov r5, sb, asr #0x1f
str r4, [sp, #0x28]
mov r4, r2, asr #0x1f
str r5, [sp, #0x24]
ldr r7, [r0, #0x24]
str r4, [sp, #0x2c]
mov r4, r7, asr #0x1f
ldr r8, [r0, #0x20]
ldr r6, [r0, #0x28]
ldr r5, [r0, #0x2c]
mov lr, fp, asr #0x1f
str r4, [sp, #0x90]
mov r4, r8, asr #0x1f
str r4, [sp, #0x30]
mov r4, r6, asr #0x1f
str r4, [sp, #0x34]
mov r4, r5, asr #0x1f
str r4, [sp, #0x38]
umull ip, r4, r5, fp
str ip, [sp, #0x3c]
mla r4, r5, lr, r4
ldr ip, [sp, #0x38]
mla r4, ip, fp, r4
umull fp, lr, r6, r2
str fp, [sp, #0x40]
ldr fp, [sp, #0x2c]
mla lr, r6, fp, lr
ldr fp, [sp, #0x34]
mla lr, fp, r2, lr
umull r2, ip, r8, r3
str r2, [sp, #0x44]
ldr r2, [sp, #0x28]
mla ip, r8, r2, ip
ldr r2, [sp, #0x30]
mla ip, r2, r3, ip
umull r3, fp, r7, sb
ldr r2, [sp, #0x44]
adds r3, r2, r3
ldr r2, [sp, #0x24]
mla fp, r7, r2, fp
ldr r2, [sp, #0x90]
mla fp, r2, sb, fp
ldr r2, [sp, #0x40]
adc sb, ip, fp
adds fp, r2, r3
ldr r2, [sp, #0x3c]
adc r3, lr, sb
adds sb, r2, fp
adc r2, r4, r3
mov r3, sb, lsr #0xc
orr r3, r3, r2, lsl #20
str r3, [sl, #0x20]
ldr r2, [r1, #0x14]
ldr lr, [r1, #4]
str r2, [sp, #0x48]
ldr r3, [sp, #0x48]
mov r2, r2, asr #0x1f
umull ip, fp, r7, r3
mla fp, r7, r2, fp
ldr r2, [sp, #0x90]
ldr r4, [r1, #0x24]
mla fp, r2, r3, fp
smlal ip, fp, r8, lr
smlal ip, fp, r6, r4
ldr sb, [r1, #0x34]
smlal ip, fp, r5, sb
mov r2, ip, lsr #0xc
orr r2, r2, fp, lsl #20
str r2, [sl, #0x24]
ldr r2, [r1, #0x1c]
ldr lr, [r1, #0xc]
str r2, [sp, #0x4c]
ldr r3, [sp, #0x4c]
mov r2, r2, asr #0x1f
umull ip, fp, r7, r3
mla fp, r7, r2, fp
ldr r2, [sp, #0x90]
ldr r4, [r1, #0x2c]
mla fp, r2, r3, fp
smlal ip, fp, r8, lr
smlal ip, fp, r6, r4
ldr sb, [r1, #0x3c]
smlal ip, fp, r5, sb
mov r2, ip, lsr #0xc
orr r2, r2, fp, lsl #20
str r2, [sl, #0x2c]
ldr fp, [r1, #0x18]
ldr r3, [r1, #0x38]
mov ip, fp, asr #0x1f
str r3, [sp, #0x50]
umull r4, r3, r7, fp
mla r3, r7, ip, r3
ldr r7, [sp, #0x90]
ldr r2, [r1, #8]
mla r3, r7, fp, r3
smlal r4, r3, r8, r2
ldr sb, [r1, #0x28]
smlal r4, r3, r6, sb
ldr r6, [sp, #0x50]
smlal r4, r3, r5, r6
mov r4, r4, lsr #0xc
orr r4, r4, r3, lsl #20
str r4, [sl, #0x28]
ldr r4, [r0, #0x34]
ldr r3, [r0, #0x30]
smull r6, r5, r4, fp
smlal r6, r5, r3, r2
mov r2, r4, asr #0x1f
str r2, [sp, #0x54]
mov r2, r3, asr #0x1f
str r2, [sp, #0x58]
ldr r2, [r0, #0x38]
ldr ip, [r0, #0x3c]
smlal r6, r5, r2, sb
ldr r0, [sp, #0x50]
smlal r6, r5, ip, r0
mov r0, r6, lsr #0xc
orr r0, r0, r5, lsl #20
str r0, [sl, #0x38]
mov r0, r2, asr #0x1f
str r0, [sp, #0x5c]
mov r0, ip, asr #0x1f
str r0, [sp, #0x60]
ldr r8, [r1, #0x24]
ldr r7, [r1, #4]
mov r0, r8, asr #0x1f
ldr sb, [r1, #0x34]
str r0, [sp, #0x98]
mov r0, r7, asr #0x1f
ldr r6, [r1, #0x14]
str r0, [sp, #0x6c]
mov r0, r6, asr #0x1f
str r0, [sp, #0x70]
umull r0, fp, ip, sb
mov lr, sb, asr #0x1f
str r0, [sp, #0x64]
mla fp, ip, lr, fp
ldr r0, [sp, #0x60]
add r5, sp, #0xa8
mla fp, r0, sb, fp
umull r0, sb, r2, r8
str r0, [sp, #0x94]
ldr r0, [sp, #0x98]
mla sb, r2, r0, sb
ldr r0, [sp, #0x5c]
mla sb, r0, r8, sb
umull r0, r8, r3, r7
str r0, [sp, #0x68]
ldr r0, [sp, #0x6c]
mla r8, r3, r0, r8
ldr r0, [sp, #0x58]
mla r8, r0, r7, r8
umull r7, lr, r4, r6
ldr r0, [sp, #0x68]
adds r7, r0, r7
ldr r0, [sp, #0x70]
mla lr, r4, r0, lr
ldr r0, [sp, #0x54]
mla lr, r0, r6, lr
ldr r0, [sp, #0x94]
adc r6, r8, lr
adds r7, r0, r7
ldr r0, [sp, #0x64]
adc r6, sb, r6
adds r7, r0, r7
adc r0, fp, r6
mov r6, r7, lsr #0xc
orr r6, r6, r0, lsl #20
str r6, [sl, #0x34]
ldr r8, [r1, #0x20]
ldr sb, [r1, #0x30]
mov r0, r8, asr #0x1f
ldr r7, [r1]
str r0, [sp, #0xa0]
mov r0, r7, asr #0x1f
ldr r6, [r1, #0x10]
str r0, [sp, #0x7c]
mov r0, r6, asr #0x1f
str r0, [sp, #0x80]
umull r0, fp, ip, sb
mov lr, sb, asr #0x1f
str r0, [sp, #0x74]
mla fp, ip, lr, fp
ldr r0, [sp, #0x60]
mla fp, r0, sb, fp
umull r0, sb, r2, r8
str r0, [sp, #0x9c]
ldr r0, [sp, #0xa0]
mla sb, r2, r0, sb
ldr r0, [sp, #0x5c]
mla sb, r0, r8, sb
umull r0, r8, r3, r7
str r0, [sp, #0x78]
ldr r0, [sp, #0x7c]
mla r8, r3, r0, r8
ldr r0, [sp, #0x58]
mla r8, r0, r7, r8
umull r7, lr, r4, r6
ldr r0, [sp, #0x78]
adds r7, r0, r7
ldr r0, [sp, #0x80]
mla lr, r4, r0, lr
ldr r0, [sp, #0x54]
mla lr, r0, r6, lr
ldr r0, [sp, #0x9c]
adc r6, r8, lr
adds r7, r0, r7
ldr r0, [sp, #0x74]
adc r6, sb, r6
adds r7, r0, r7
adc r0, fp, r6
mov r6, r7, lsr #0xc
orr r6, r6, r0, lsl #20
str r6, [sl, #0x30]
ldr r8, [r1, #0x3c]
ldr r6, [r1, #0xc]
mov r0, r8, asr #0x1f
str r0, [sp, #0x84]
ldr r7, [r1, #0x2c]
ldr fp, [sp, #0x84]
mov r0, r7, asr #0x1f
str r0, [sp, #0x88]
ldr r0, [r1, #0x1c]
mov lr, r6, asr #0x1f
mov r1, r0, asr #0x1f
str r1, [sp, #0xa4]
umull sb, r1, ip, r8
mla r1, ip, fp, r1
ldr fp, [sp, #0x60]
mla r1, fp, r8, r1
ldr r8, [sp, #0x88]
umull ip, fp, r2, r7
mla fp, r2, r8, fp
ldr r2, [sp, #0x5c]
ldr r8, [sp, #0xa4]
mla fp, r2, r7, fp
umull r7, r2, r3, r6
mla r2, r3, lr, r2
ldr r3, [sp, #0x58]
mla r2, r3, r6, r2
umull r6, r3, r4, r0
mla r3, r4, r8, r3
ldr r4, [sp, #0x54]
mla r3, r4, r0, r3
adds r4, r7, r6
adc r0, r2, r3
adds r2, ip, r4
adc r0, fp, r0
adds r2, sb, r2
adc r0, r1, r0
mov r1, r2, lsr #0xc
orr r1, r1, r0, lsl #20
cmp sl, r5
addne sp, sp, #0xe8
str r1, [sl, #0x3c]
ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
ldr r4, [sp]
ldmia r5!, {r0, r1, r2, r3}
stmia r4!, {r0, r1, r2, r3}
str r4, [sp]
ldmia r5!, {r0, r1, r2, r3}
stmia r4!, {r0, r1, r2, r3}
str r4, [sp]
ldmia r5!, {r0, r1, r2, r3}
stmia r4!, {r0, r1, r2, r3}
ldmia r5, {r0, r1, r2, r3}
stmia r4, {r0, r1, r2, r3}
str r4, [sp]
add sp, sp, #0xe8
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
arm_func_end MTX_Concat44
arm_func_start MTX_PerspectiveW
MTX_PerspectiveW: ; 0x020CC84C
stmdb sp!, {r4, r5, r6, r7, r8, lr}
mov r4, r0
mov r0, r1
mov r1, r4
mov r8, r2
mov r7, r3
ldr r6, [sp, #0x1c]
ldr r5, [sp, #0x20]
bl FX_Div
ldr r1, [sp, #0x18]
ldr r2, _020CC994 ; =0x04000290
mov r3, #0
str r3, [r2]
mov r3, #0x1000
str r3, [r2, #4]
sub r1, r7, r1
str r1, [r2, #8]
mov r1, #0
mov r4, r0
str r1, [r2, #0xc]
cmp r6, #0x1000
beq _020CC8B4
mul r1, r4, r6
mov r0, r1, asr #0xb
add r0, r1, r0, lsr #20
mov r4, r0, asr #0xc
_020CC8B4:
mov r1, #0
str r1, [r5, #4]
str r1, [r5, #8]
str r1, [r5, #0xc]
str r1, [r5, #0x10]
str r4, [r5, #0x14]
str r1, [r5, #0x18]
str r1, [r5, #0x1c]
str r1, [r5, #0x20]
str r1, [r5, #0x24]
rsb r0, r6, #0
str r0, [r5, #0x2c]
str r1, [r5, #0x30]
str r1, [r5, #0x34]
str r1, [r5, #0x3c]
bl FX_GetDivResultFx64c
ldr r2, _020CC994 ; =0x04000290
mov r3, #0
stmia r2, {r3, r4, r8}
str r3, [r2, #0xc]
cmp r6, #0x1000
beq _020CC930
mov r2, r6, asr #0x1f
umull r4, r3, r0, r6
mla r3, r0, r2, r3
mla r3, r1, r6, r3
mov r0, r4
mov r1, r3
mov r2, #0x1000
mov r3, #0
bl _ll_sdiv
_020CC930:
ldr r4, [sp, #0x18]
mov r2, r7, lsl #1
add r6, r4, r7
mov r3, r6, asr #0x1f
umull r8, r7, r0, r6
mla r7, r0, r3, r7
smull r4, r3, r2, r4
mla r7, r1, r6, r7
adds r2, r8, #0x80000000
adc r7, r7, #0
adds r4, r4, #0x800
adc r2, r3, #0
mov r3, r4, lsr #0xc
orr r3, r3, r2, lsl #20
umull r6, r4, r0, r3
mov r2, r3, asr #0x1f
mla r4, r0, r2, r4
mla r4, r1, r3, r4
adds r0, r6, #0x80000000
str r7, [r5, #0x28]
adc r0, r4, #0
str r0, [r5, #0x38]
bl FX_GetDivResult
str r0, [r5]
ldmia sp!, {r4, r5, r6, r7, r8, pc}
.align 2, 0
_020CC994: .word 0x04000290
arm_func_end MTX_PerspectiveW
arm_func_start MTX_OrthoW
MTX_OrthoW: ; 0x020CC998
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
sub sp, sp, #8
str r2, [sp]
mov sl, r0
ldr r0, [sp]
mov r2, r3
sub r0, r2, r0
ldr r8, [sp, #0x3c]
str r3, [sp, #4]
mov fp, r1
ldr sb, [sp, #0x38]
bl FX_InvAsync
mov r0, #0
str r0, [r8, #4]
str r0, [r8, #8]
str r0, [r8, #0xc]
str r0, [r8, #0x10]
str r0, [r8, #0x18]
str r0, [r8, #0x1c]
str r0, [r8, #0x20]
str r0, [r8, #0x24]
str r0, [r8, #0x2c]
str sb, [r8, #0x3c]
bl FX_GetDivResultFx64c
mov r6, r1
mov r4, r0
ldr r1, _020CCB9C ; =0x04000290
mov r3, #0
mov r2, #0x1000
str r3, [r1]
sub r0, sl, fp
str r2, [r1, #4]
str r0, [r1, #8]
mov r0, r3
cmp sb, #0x1000
str r0, [r1, #0xc]
beq _020CCA48
mov r5, sb, asr #0x1f
umull r0, r1, r4, sb
mla r1, r4, r5, r1
mla r1, r6, sb, r1
bl _ll_sdiv
mov r4, r0
mov r6, r1
_020CCA48:
mov r1, r6, lsl #0xd
mov r0, #0x80000000
orr r1, r1, r4, lsr #19
adds r0, r0, r4, lsl #13
adc r0, r1, #0
str r0, [r8]
bl FX_GetDivResultFx64c
mov r5, r0
mov r7, r1
mov r3, #0
ldr ip, _020CCB9C ; =0x04000290
ldr r1, [sp, #0x30]
ldr r0, [sp, #0x34]
str r3, [ip]
mov r2, #0x1000
str r2, [ip, #4]
sub r0, r1, r0
mov lr, r3
str r0, [ip, #8]
cmp sb, #0x1000
str lr, [ip, #0xc]
beq _020CCABC
mov ip, sb, asr #0x1f
umull r0, r1, r5, sb
mla r1, r5, ip, r1
mla r1, r7, sb, r1
bl _ll_sdiv
mov r5, r0
mov r7, r1
_020CCABC:
mov r1, r7, lsl #0xd
mov r0, #0x80000000
orr r1, r1, r5, lsr #19
adds r0, r0, r5, lsl #13
adc r0, r1, #0
str r0, [r8, #0x14]
bl FX_GetDivResultFx64c
cmp sb, #0x1000
beq _020CCB04
mov r2, sb, asr #0x1f
umull ip, r3, r0, sb
mla r3, r0, r2, r3
mla r3, r1, sb, r3
mov r0, ip
mov r1, r3
mov r2, #0x1000
mov r3, #0
bl _ll_sdiv
_020CCB04:
ldr r3, [sp, #4]
ldr r2, [sp]
add r2, r3, r2
rsb ip, r2, #0
add r2, sl, fp
rsb r3, r2, #0
ldr sl, [sp, #0x34]
ldr r2, [sp, #0x30]
mov sb, ip, asr #0x1f
add r2, sl, r2
umull fp, sl, r4, ip
mla sl, r4, sb, sl
mov r4, #0x80000000
mla sl, r6, ip, sl
adds r4, r4, r0, lsl #13
mov sb, r1, lsl #0xd
mov r6, r3, asr #0x1f
umull ip, r4, r5, r3
mla r4, r5, r6, r4
orr sb, sb, r0, lsr #19
mla r4, r7, r3, r4
adc r3, sb, #0
str r3, [r8, #0x28]
adds r3, fp, #0x80000000
adc r7, sl, #0
adds r3, ip, #0x80000000
mov r3, r2, asr #0x1f
umull r6, r5, r0, r2
mla r5, r0, r3, r5
adc r3, r4, #0
str r7, [r8, #0x30]
mla r5, r1, r2, r5
adds r0, r6, #0x80000000
str r3, [r8, #0x34]
adc r0, r5, #0
str r0, [r8, #0x38]
add sp, sp, #8
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
.align 2, 0
_020CCB9C: .word 0x04000290
arm_func_end MTX_OrthoW

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.include "asm/macros.inc"
.include "fx_sincos.inc"
.include "global.inc"
.text

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@ -1,216 +0,0 @@
.include "asm/macros.inc"
.include "fx_trig.inc"
.include "global.inc"
.text
arm_func_start FX_SinFx64c_internal
FX_SinFx64c_internal: ; 0x020CD2FC
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
mov lr, #0
cmp r1, #1
cmpeq r0, #0
mov r2, #1
moveq r1, lr
ldreq r0, _020CD3CC ; =0xB504F334
ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
umull r3, ip, r0, r0
mla ip, r0, r1, ip
mla ip, r1, r0, ip
ldr r4, _020CD3D0 ; =0x02317888
ldr r5, _020CD3D4 ; =0x03C2857C
umull r3, r8, ip, r4
umull r3, r7, ip, r5
mla r8, ip, lr, r8
mov r3, lr
mla r7, ip, lr, r7
mla r8, r3, r4, r8
subs sb, lr, r8
mla r7, r3, r5, r7
umull r4, r5, sb, r7
mla r5, sb, r3, r5
sbc r8, r2, #0
mla r5, r8, r7, r5
subs r8, lr, r5
ldr r6, _020CD3D8 ; =0x07E54B84
sbc r7, r2, #0
umull r4, r5, ip, r6
mla r5, ip, lr, r5
mla r5, r3, r6, r5
umull r4, r6, r8, r5
mla r6, r8, r3, r6
mla r6, r7, r5, r6
subs r8, lr, r6
sbc r7, r2, #0
ldr r2, _020CD3DC ; =0x14ABBCE6
ldr r6, _020CD3E0 ; =0xC90FDAA2
umull r4, r5, ip, r2
mla r5, ip, lr, r5
mla r5, r3, r2, r5
umull r2, r4, r8, r5
mla r4, r8, r3, r4
mla r4, r7, r5, r4
subs r6, r6, r4
umull r2, r4, r6, r0
mla r4, r6, r1, r4
sbc r5, lr, #0
mla r4, r5, r0, r4
mov r0, r4
mov r1, r3
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
.align 2, 0
_020CD3CC: .word 0xB504F334
_020CD3D0: .word 0x02317888
_020CD3D4: .word 0x03C2857C
_020CD3D8: .word 0x07E54B84
_020CD3DC: .word 0x14ABBCE6
_020CD3E0: .word 0xC90FDAA2
arm_func_end FX_SinFx64c_internal
arm_func_start FX_CosFx64c_internal
FX_CosFx64c_internal: ; 0x020CD3E4
stmdb sp!, {r4, r5, r6, r7, r8, lr}
mov ip, #0
cmp r1, #1
cmpeq r0, #0
mov r2, #1
moveq r1, ip
ldreq r0, _020CD49C ; =0xB504F334
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
umull r4, r3, r0, r0
mla r3, r0, r1, r3
mla r3, r1, r0, r3
ldr r1, _020CD4A0 ; =0x02D1E41D
ldr lr, _020CD4A4 ; =0x054387AD
umull r0, r6, r3, r1
umull r0, r5, r3, lr
mla r6, r3, ip, r6
mov r0, ip
mla r5, r3, ip, r5
mla r6, r0, r1, r6
subs r8, ip, r6
mla r5, r0, lr, r5
umull r1, r6, r8, r5
ldr r4, _020CD4A8 ; =0x0D28D331
mla r6, r8, r0, r6
umull r1, lr, r3, r4
mla lr, r3, ip, lr
sbc r7, r2, #0
mla r6, r7, r5, r6
subs r6, ip, r6
mla lr, r0, r4, lr
umull r1, r4, r6, lr
mla r4, r6, r0, r4
sbc r5, r2, #0
mla r4, r5, lr, r4
subs r6, ip, r4
ldr r1, _020CD4AC ; =0x4EF4F327
sbc r5, r2, #0
umull r4, lr, r3, r1
mla lr, r3, ip, lr
mla lr, r0, r1, lr
umull r1, r3, r6, lr
mla r3, r6, r0, r3
mla r3, r5, lr, r3
subs r0, ip, r3
sbc r1, r2, #0
ldmia sp!, {r4, r5, r6, r7, r8, pc}
.align 2, 0
_020CD49C: .word 0xB504F334
_020CD4A0: .word 0x02D1E41D
_020CD4A4: .word 0x054387AD
_020CD4A8: .word 0x0D28D331
_020CD4AC: .word 0x4EF4F327
arm_func_end FX_CosFx64c_internal
arm_func_start FX_SinFx64c
FX_SinFx64c: ; 0x020CD4B0
stmdb sp!, {r4, lr}
cmp r0, #0
bge _020CD4D0
rsb r0, r0, #0
bl FX_SinFx64c
rsbs r0, r0, #0
rsc r1, r1, #0
ldmia sp!, {r4, pc}
_020CD4D0:
ldr r1, _020CD544 ; =0x45F306DD
mov r2, #1
umull ip, lr, r0, r1
mla lr, r0, r2, lr
mov r0, r0, asr #0x1f
mla lr, r0, r1, lr
mov r3, #0
mov ip, ip, lsr #0xc
mov r4, lr, asr #0xc
orr ip, ip, lr, lsl #20
sub r0, r3, #1
tst r4, #1
and r1, r3, lr, asr #12
and r0, ip, r0
beq _020CD514
subs r0, r3, r0
sbc r1, r2, r1
_020CD514:
add r2, r4, #1
tst r2, #2
beq _020CD528
bl FX_CosFx64c_internal
b _020CD52C
_020CD528:
bl FX_SinFx64c_internal
_020CD52C:
and r2, r4, #7
cmp r2, #3
ldmleia sp!, {r4, pc}
rsbs r0, r0, #0
rsc r1, r1, #0
ldmia sp!, {r4, pc}
.align 2, 0
_020CD544: .word 0x45F306DD
arm_func_end FX_SinFx64c
arm_func_start FX_CosFx64c
FX_CosFx64c: ; 0x020CD548
stmdb sp!, {r4, lr}
cmp r0, #0
bge _020CD560
rsb r0, r0, #0
bl FX_CosFx64c
ldmia sp!, {r4, pc}
_020CD560:
ldr r1, _020CD5D8 ; =0x45F306DD
mov r2, #1
umull ip, lr, r0, r1
mla lr, r0, r2, lr
mov r0, r0, asr #0x1f
mla lr, r0, r1, lr
mov r3, #0
mov ip, ip, lsr #0xc
mov r4, lr, asr #0xc
orr ip, ip, lr, lsl #20
sub r0, r3, #1
tst r4, #1
and r1, r3, lr, asr #12
and r0, ip, r0
beq _020CD5A4
subs r0, r3, r0
sbc r1, r2, r1
_020CD5A4:
add r2, r4, #1
tst r2, #2
beq _020CD5B8
bl FX_SinFx64c_internal
b _020CD5BC
_020CD5B8:
bl FX_CosFx64c_internal
_020CD5BC:
add r2, r4, #2
and r2, r2, #7
cmp r2, #3
ldmleia sp!, {r4, pc}
rsbs r0, r0, #0
rsc r1, r1, #0
ldmia sp!, {r4, pc}
.align 2, 0
_020CD5D8: .word 0x45F306DD
arm_func_end FX_CosFx64c

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@ -1,415 +0,0 @@
.include "asm/macros.inc"
.include "fx_vec.inc"
.include "global.inc"
.text
arm_func_start VEC_Add
VEC_Add: ; 0x020CCD78
ldr ip, [r0]
ldr r3, [r1]
add r3, ip, r3
str r3, [r2]
ldr ip, [r0, #4]
ldr r3, [r1, #4]
add r3, ip, r3
str r3, [r2, #4]
ldr r3, [r0, #8]
ldr r0, [r1, #8]
add r0, r3, r0
str r0, [r2, #8]
bx lr
arm_func_end VEC_Add
arm_func_start VEC_Subtract
VEC_Subtract: ; 0x020CCDAC
ldr ip, [r0]
ldr r3, [r1]
sub r3, ip, r3
str r3, [r2]
ldr ip, [r0, #4]
ldr r3, [r1, #4]
sub r3, ip, r3
str r3, [r2, #4]
ldr r3, [r0, #8]
ldr r0, [r1, #8]
sub r0, r3, r0
str r0, [r2, #8]
bx lr
arm_func_end VEC_Subtract
arm_func_start VEC_Fx16Add
VEC_Fx16Add: ; 0x020CCDE0
ldrsh ip, [r0]
ldrsh r3, [r1]
add r3, ip, r3
strh r3, [r2]
ldrsh ip, [r0, #2]
ldrsh r3, [r1, #2]
add r3, ip, r3
strh r3, [r2, #2]
ldrsh r3, [r0, #4]
ldrsh r0, [r1, #4]
add r0, r3, r0
strh r0, [r2, #4]
bx lr
arm_func_end VEC_Fx16Add
arm_func_start VEC_DotProduct
VEC_DotProduct: ; 0x020CCE14
stmdb sp!, {r4, lr}
ldr r3, [r0, #4]
ldr r2, [r1, #4]
ldr ip, [r0]
smull r4, lr, r3, r2
ldr r2, [r1]
ldr r3, [r0, #8]
smlal r4, lr, ip, r2
ldr r0, [r1, #8]
smlal r4, lr, r3, r0
adds r0, r4, #0x800
adc r1, lr, #0
mov r0, r0, lsr #0xc
orr r0, r0, r1, lsl #20
ldmia sp!, {r4, pc}
arm_func_end VEC_DotProduct
arm_func_start VEC_Fx16DotProduct
VEC_Fx16DotProduct: ; 0x020CCE50
stmdb sp!, {r3, r4, r5, lr}
ldrsh lr, [r0, #2]
ldrsh ip, [r1, #2]
ldrsh r3, [r0, #4]
ldrsh r2, [r1, #4]
ldrsh r5, [r0]
ldrsh r4, [r1]
smulbb r1, lr, ip
smulbb r0, r3, r2
add r0, r0, #0x800
smlabb r1, r5, r4, r1
adds r2, r1, r0
mov r0, r0, asr #0x1f
adc r1, r0, r1, asr #31
mov r0, r2, lsr #0xc
orr r0, r0, r1, lsl #20
ldmia sp!, {r3, r4, r5, pc}
arm_func_end VEC_Fx16DotProduct
arm_func_start VEC_CrossProduct
VEC_CrossProduct: ; 0x020CCE94
stmdb sp!, {r4, r5, r6, r7, r8, lr}
ldmia r0, {r5, lr}
ldr r6, [r1, #8]
ldr r0, [r0, #8]
ldmia r1, {r4, ip}
smull r8, r7, lr, r6
smull r3, r1, r0, ip
subs r3, r8, r3
sbc r1, r7, r1
adds r3, r3, #0x800
smull r8, r7, r0, r4
smull r6, r0, r5, r6
adc r1, r1, #0
subs r6, r8, r6
mov r3, r3, lsr #0xc
orr r3, r3, r1, lsl #20
sbc r7, r7, r0
adds r0, r6, #0x800
smull ip, r6, r5, ip
adc r5, r7, #0
smull r4, r1, lr, r4
mov r7, r0, lsr #0xc
subs r4, ip, r4
sbc r0, r6, r1
adds r1, r4, #0x800
str r3, [r2]
orr r7, r7, r5, lsl #20
adc r0, r0, #0
mov r1, r1, lsr #0xc
str r7, [r2, #4]
orr r1, r1, r0, lsl #20
str r1, [r2, #8]
ldmia sp!, {r4, r5, r6, r7, r8, pc}
arm_func_end VEC_CrossProduct
arm_func_start VEC_Fx16CrossProduct
VEC_Fx16CrossProduct: ; 0x020CCF18
stmdb sp!, {r4, r5, r6, lr}
ldrsh r4, [r1, #4]
ldrsh ip, [r0, #2]
ldrsh lr, [r0]
ldrsh r3, [r1, #2]
ldrsh r6, [r0, #4]
ldrsh r1, [r1]
smulbb r5, ip, r4
smulbb r0, r6, r3
sub r0, r5, r0
add r0, r0, #0x800
mov r0, r0, asr #0xc
smulbb r5, r6, r1
smulbb r4, lr, r4
sub r4, r5, r4
add r4, r4, #0x800
smulbb r3, lr, r3
smulbb r1, ip, r1
sub r1, r3, r1
add r1, r1, #0x800
strh r0, [r2]
mov r0, r4, asr #0xc
strh r0, [r2, #2]
mov r0, r1, asr #0xc
strh r0, [r2, #4]
ldmia sp!, {r4, r5, r6, pc}
arm_func_end VEC_Fx16CrossProduct
arm_func_start VEC_Mag
VEC_Mag: ; 0x020CCF80
ldr r1, [r0, #4]
ldr r2, [r0]
smull ip, r3, r1, r1
smlal ip, r3, r2, r2
ldr r0, [r0, #8]
ldr r2, _020CCFD8 ; =0x040002B0
smlal ip, r3, r0, r0
mov r1, #1
mov r0, r3, lsl #2
strh r1, [r2]
mov r1, ip, lsl #2
str r1, [r2, #8]
orr r0, r0, ip, lsr #30
str r0, [r2, #0xc]
_020CCFB8:
ldrh r0, [r2]
tst r0, #0x8000
bne _020CCFB8
ldr r0, _020CCFDC ; =0x040002B4
ldr r0, [r0]
add r0, r0, #1
mov r0, r0, asr #1
bx lr
.align 2, 0
_020CCFD8: .word 0x040002B0
_020CCFDC: .word 0x040002B4
arm_func_end VEC_Mag
arm_func_start VEC_Normalize
VEC_Normalize: ; 0x020CCFE0
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
ldr r2, [r0, #4]
ldr r3, [r0]
smull r6, r5, r2, r2
smlal r6, r5, r3, r3
ldr r2, [r0, #8]
ldr r4, _020CD0EC ; =0x04000280
smlal r6, r5, r2, r2
mov r3, #2
strh r3, [r4]
mov r3, #0
str r3, [r4, #0x10]
mov r3, #0x1000000
str r3, [r4, #0x14]
str r6, [r4, #0x18]
mov r2, r5, lsl #2
str r5, [r4, #0x1c]
mov r3, #1
strh r3, [r4, #0x30]
mov r3, r6, lsl #2
str r3, [r4, #0x38]
orr r2, r2, r6, lsr #30
str r2, [r4, #0x3c]
_020CD03C:
ldrh r2, [r4, #0x30]
tst r2, #0x8000
bne _020CD03C
ldr r2, _020CD0F0 ; =0x040002B4
ldr ip, [r2]
sub r3, r2, #0x34
_020CD054:
ldrh r2, [r3]
tst r2, #0x8000
bne _020CD054
ldr sb, _020CD0F4 ; =0x040002A0
ldr r5, [r0]
ldr r8, [sb]
mov r7, ip, asr #0x1f
umull r3, r2, r8, ip
umull r6, lr, r3, r5
mov r4, r5, asr #0x1f
mla r2, r8, r7, r2
ldr r7, [sb, #4]
mla lr, r3, r4, lr
mla r2, r7, ip, r2
mla lr, r2, r5, lr
adds r4, r6, #0
adc r4, lr, #0x1000
mov r4, r4, asr #0xd
str r4, [r1]
ldr ip, [r0, #4]
umull r5, lr, r3, ip
mov r4, ip, asr #0x1f
mla lr, r3, r4, lr
mla lr, r2, ip, lr
adds r4, r5, #0
adc r4, lr, #0x1000
mov r4, r4, asr #0xd
str r4, [r1, #4]
ldr ip, [r0, #8]
umull r4, lr, r3, ip
mov r0, ip, asr #0x1f
mla lr, r3, r0, lr
mla lr, r2, ip, lr
adds r0, r4, #0
adc r0, lr, #0x1000
mov r0, r0, asr #0xd
str r0, [r1, #8]
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
.align 2, 0
_020CD0EC: .word 0x04000280
_020CD0F0: .word 0x040002B4
_020CD0F4: .word 0x040002A0
arm_func_end VEC_Normalize
arm_func_start VEC_Fx16Normalize
VEC_Fx16Normalize: ; 0x020CD0F8
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
ldrsh r5, [r0]
ldrsh r2, [r0, #2]
ldrsh r3, [r0, #4]
ldr r4, _020CD218 ; =0x04000280
smulbb r6, r2, r2
smulbb r8, r5, r5
mov r2, #2
strh r2, [r4]
mov r2, #0
str r2, [r4, #0x10]
mov r2, #0x1000000
smulbb r3, r3, r3
mov r5, r6, asr #0x1f
adds r7, r8, r6
adc r6, r5, r8, asr #31
adds r5, r7, r3
str r2, [r4, #0x14]
adc r3, r6, r3, asr #31
str r5, [r4, #0x18]
mov r2, r3, lsl #2
str r3, [r4, #0x1c]
mov r3, #1
strh r3, [r4, #0x30]
mov r3, r5, lsl #2
str r3, [r4, #0x38]
orr r2, r2, r5, lsr #30
str r2, [r4, #0x3c]
_020CD168:
ldrh r2, [r4, #0x30]
tst r2, #0x8000
bne _020CD168
ldr r2, _020CD21C ; =0x040002B4
ldr ip, [r2]
sub r3, r2, #0x34
_020CD180:
ldrh r2, [r3]
tst r2, #0x8000
bne _020CD180
ldr sb, _020CD220 ; =0x040002A0
ldrsh r5, [r0]
ldr r8, [sb]
mov r7, ip, asr #0x1f
umull r3, r2, r8, ip
umull r6, lr, r3, r5
mov r4, r5, asr #0x1f
mla r2, r8, r7, r2
ldr r7, [sb, #4]
mla lr, r3, r4, lr
mla r2, r7, ip, r2
mla lr, r2, r5, lr
adds r4, r6, #0
adc r4, lr, #0x1000
mov r4, r4, asr #0xd
strh r4, [r1]
ldrsh ip, [r0, #2]
umull r5, lr, r3, ip
mov r4, ip, asr #0x1f
mla lr, r3, r4, lr
mla lr, r2, ip, lr
adds r4, r5, #0
adc r4, lr, #0x1000
mov r4, r4, asr #0xd
strh r4, [r1, #2]
ldrsh ip, [r0, #4]
umull r4, lr, r3, ip
mov r0, ip, asr #0x1f
mla lr, r3, r0, lr
mla lr, r2, ip, lr
adds r0, r4, #0
adc r0, lr, #0x1000
mov r0, r0, asr #0xd
strh r0, [r1, #4]
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
.align 2, 0
_020CD218: .word 0x04000280
_020CD21C: .word 0x040002B4
_020CD220: .word 0x040002A0
arm_func_end VEC_Fx16Normalize
arm_func_start VEC_MultAdd
VEC_MultAdd: ; 0x020CD224
stmdb sp!, {r4, lr}
ldr r4, [r1]
ldr lr, [r2]
smull ip, r4, r0, r4
mov ip, ip, lsr #0xc
orr ip, ip, r4, lsl #20
add r4, lr, ip
str r4, [r3]
ldr ip, [r1, #4]
ldr r4, [r2, #4]
smull lr, ip, r0, ip
mov lr, lr, lsr #0xc
orr lr, lr, ip, lsl #20
add r4, r4, lr
str r4, [r3, #4]
ldr r1, [r1, #8]
ldr ip, [r2, #8]
smull r2, r1, r0, r1
mov r0, r2, lsr #0xc
orr r0, r0, r1, lsl #20
add r0, ip, r0
str r0, [r3, #8]
ldmia sp!, {r4, pc}
arm_func_end VEC_MultAdd
arm_func_start VEC_Distance
VEC_Distance: ; 0x020CD280
stmdb sp!, {r4, lr}
ldr r3, [r0, #4]
ldr r2, [r1, #4]
ldr r4, [r0]
sub r2, r3, r2
smull ip, r3, r2, r2
ldr lr, [r1]
ldr r2, [r0, #8]
sub r4, r4, lr
ldr r0, [r1, #8]
smlal ip, r3, r4, r4
sub r0, r2, r0
smlal ip, r3, r0, r0
mov r0, r3, lsl #2
ldr r2, _020CD2F4 ; =0x040002B0
mov r1, #1
strh r1, [r2]
mov r1, ip, lsl #2
str r1, [r2, #8]
orr r0, r0, ip, lsr #30
str r0, [r2, #0xc]
_020CD2D4:
ldrh r0, [r2]
tst r0, #0x8000
bne _020CD2D4
ldr r0, _020CD2F8 ; =0x040002B4
ldr r0, [r0]
add r0, r0, #1
mov r0, r0, asr #1
ldmia sp!, {r4, pc}
.align 2, 0
_020CD2F4: .word 0x040002B0
_020CD2F8: .word 0x040002B4
arm_func_end VEC_Distance

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@ -1,100 +0,0 @@
.include "asm/macros.inc"
.include "g2.inc"
.include "global.inc"
.text
arm_func_start G2x_SetBGyAffine_
G2x_SetBGyAffine_: ; 0x020CF0AC
stmdb sp!, {r4, r5, r6, lr}
ldr r4, [r1, #4]
ldr r5, [r1]
mov ip, r4, lsl #0xc
mov r4, ip, asr #0x10
mov ip, r5, lsl #0xc
mov lr, r4, lsl #0x10
mov r5, ip, asr #0x10
mov r4, lr, lsr #0x10
mov ip, r5, lsl #0x10
mov r4, r4, lsl #0x10
orr r4, r4, ip, lsr #16
str r4, [r0]
ldr r4, [r1, #0xc]
ldr r5, [r1, #8]
mov ip, r4, lsl #0xc
mov r4, ip, asr #0x10
mov ip, r5, lsl #0xc
mov lr, r4, lsl #0x10
mov r6, ip, asr #0x10
mov r5, lr, lsr #0x10
ldr r4, [sp, #0x14]
mov ip, r6, lsl #0x10
mov r5, r5, lsl #0x10
orr r5, r5, ip, lsr #16
str r5, [r0, #4]
ldr r6, [sp, #0x10]
ldr ip, [r1, #4]
sub r5, r4, r3
ldr r4, [r1, #0xc]
mul lr, ip, r5
mul r5, r4, r5
ldr ip, [r1]
sub r6, r6, r2
ldr r4, [r1, #8]
mla r1, ip, r6, lr
mla r5, r4, r6, r5
add r1, r1, r2, lsl #12
add r2, r5, r3, lsl #12
mov r1, r1, asr #4
str r1, [r0, #8]
mov r1, r2, asr #4
str r1, [r0, #0xc]
ldmia sp!, {r4, r5, r6, pc}
arm_func_end G2x_SetBGyAffine_
arm_func_start G2x_SetBlendAlpha_
G2x_SetBlendAlpha_: ; 0x020CF15C
ldr ip, [sp]
orr r1, r1, #0x40
orr r2, r1, r2, lsl #8
orr r1, r3, ip, lsl #8
orr r1, r2, r1, lsl #16
str r1, [r0]
bx lr
arm_func_end G2x_SetBlendAlpha_
arm_func_start G2x_SetBlendBrightness_
G2x_SetBlendBrightness_: ; 0x020CF178
cmp r2, #0
orrge r1, r1, #0x80
strgeh r1, [r0]
strgeh r2, [r0, #4]
bxge lr
orr r1, r1, #0xc0
strh r1, [r0]
rsb r1, r2, #0
strh r1, [r0, #4]
bx lr
arm_func_end G2x_SetBlendBrightness_
arm_func_start G2x_ChangeBlendBrightness_
G2x_ChangeBlendBrightness_: ; 0x020CF1A0
ldrh r3, [r0]
cmp r1, #0
and r2, r3, #0xc0
bge _020CF1CC
cmp r2, #0x80
biceq r2, r3, #0xc0
orreq r2, r2, #0xc0
streqh r2, [r0]
rsb r1, r1, #0
strh r1, [r0, #4]
bx lr
_020CF1CC:
cmp r2, #0xc0
biceq r2, r3, #0xc0
orreq r2, r2, #0x80
streqh r2, [r0]
strh r1, [r0, #4]
bx lr
arm_func_end G2x_ChangeBlendBrightness_

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@ -1,71 +0,0 @@
.include "asm/macros.inc"
.include "g3.inc"
.include "global.inc"
.text
arm_func_start G3_BeginMakeDL
G3_BeginMakeDL: ; 0x020D0D60
str r2, [r0, #0xc]
str r1, [r0, #8]
str r1, [r0]
add r1, r1, #4
str r1, [r0, #4]
mov r1, #0
str r1, [r0, #0x10]
bx lr
arm_func_end G3_BeginMakeDL
arm_func_start G3_EndMakeDL
G3_EndMakeDL: ; 0x020D0D80
ldr r3, [r0]
ldr r2, [r0, #8]
cmp r2, r3
moveq r0, #0
bxeq lr
and r1, r3, #3
cmp r1, #3
addls pc, pc, r1, lsl #2
b _020D0DF4
_020D0DA4: ; jump table
b _020D0DB4 ; case 0
b _020D0DBC ; case 1
b _020D0DCC ; case 2
b _020D0DE0 ; case 3
_020D0DB4:
sub r0, r3, r2
bx lr
_020D0DBC:
add r1, r3, #1
str r1, [r0]
mov r1, #0
strb r1, [r3]
_020D0DCC:
ldr r3, [r0]
mov r1, #0
add r2, r3, #1
str r2, [r0]
strb r1, [r3]
_020D0DE0:
ldr r3, [r0]
mov r1, #0
add r2, r3, #1
str r2, [r0]
strb r1, [r3]
_020D0DF4:
ldr r1, [r0, #0x10]
cmp r1, #0
beq _020D0E18
ldr r3, [r0, #4]
mov r1, #0
add r2, r3, #4
str r2, [r0, #4]
str r1, [r3]
str r1, [r0, #0x10]
_020D0E18:
ldr r1, [r0, #4]
str r1, [r0]
ldr r0, [r0, #8]
sub r0, r1, r0
bx lr
arm_func_end G3_EndMakeDL

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@ -1,121 +0,0 @@
.include "asm/macros.inc"
.include "g3_util.inc"
.include "global.inc"
.public G3_LoadMtx44
.text
arm_func_start G3i_OrthoW_
G3i_OrthoW_: ; 0x020CFB08
stmdb sp!, {r4, lr}
sub sp, sp, #0x50
ldr ip, [sp, #0x58]
ldr lr, [sp, #0x5c]
str ip, [sp]
ldr r4, [sp, #0x68]
ldr ip, [sp, #0x60]
str lr, [sp, #4]
cmp r4, #0
addeq r4, sp, #0x10
str ip, [sp, #8]
str r4, [sp, #0xc]
bl MTX_OrthoW
ldr r0, [sp, #0x64]
cmp r0, #0
addeq sp, sp, #0x50
ldmeqia sp!, {r4, pc}
ldr r1, _020CFB68 ; =0x04000440
mov r2, #0
mov r0, r4
str r2, [r1]
bl G3_LoadMtx44
add sp, sp, #0x50
ldmia sp!, {r4, pc}
.align 2, 0
_020CFB68: .word 0x04000440
arm_func_end G3i_OrthoW_
arm_func_start G3i_LookAt_
G3i_LookAt_: ; 0x020CFB6C
stmdb sp!, {r3, r4, r5, lr}
sub sp, sp, #0x30
ldr r4, [sp, #0x40]
mov r5, r3
cmp r4, #0
addeq r4, sp, #0
mov r3, r4
bl MTX_LookAt
cmp r5, #0
addeq sp, sp, #0x30
ldmeqia sp!, {r3, r4, r5, pc}
ldr r1, _020CFBB4 ; =0x04000440
mov r2, #2
mov r0, r4
str r2, [r1]
bl G3_LoadMtx43
add sp, sp, #0x30
ldmia sp!, {r3, r4, r5, pc}
.align 2, 0
_020CFBB4: .word 0x04000440
arm_func_end G3i_LookAt_
arm_func_start G3_RotX
G3_RotX: ; 0x020CFBB8
ldr r3, _020CFBF0 ; =0x04000468
mov r2, #0x1000
str r2, [r3]
mov r2, #0
str r2, [r3]
str r2, [r3]
str r2, [r3]
str r1, [r3]
str r0, [r3]
str r2, [r3]
rsb r0, r0, #0
str r0, [r3]
str r1, [r3]
bx lr
.align 2, 0
_020CFBF0: .word 0x04000468
arm_func_end G3_RotX
arm_func_start G3_RotY
G3_RotY: ; 0x020CFBF4
ldr ip, _020CFC2C ; =0x04000468
mov r3, #0
str r1, [ip]
str r3, [ip]
rsb r2, r0, #0
str r2, [ip]
str r3, [ip]
mov r2, #0x1000
str r2, [ip]
str r3, [ip]
str r0, [ip]
str r3, [ip]
str r1, [ip]
bx lr
.align 2, 0
_020CFC2C: .word 0x04000468
arm_func_end G3_RotY
arm_func_start G3_RotZ
G3_RotZ: ; 0x020CFC30
ldr r3, _020CFC68 ; =0x04000468
mov r2, #0
str r1, [r3]
str r0, [r3]
str r2, [r3]
rsb r0, r0, #0
str r0, [r3]
str r1, [r3]
str r2, [r3]
str r2, [r3]
str r2, [r3]
mov r0, #0x1000
str r0, [r3]
bx lr
.align 2, 0
_020CFC68: .word 0x04000468
arm_func_end G3_RotZ

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@ -1,259 +0,0 @@
.include "asm/macros.inc"
.include "g3b.inc"
.include "global.inc"
.text
arm_func_start G3BS_LoadMtx44
G3BS_LoadMtx44: ; 0x020CF1E4
mov r3, r0
ldr r0, [r3]
mov r2, #0x16
str r2, [r0]
mov r0, r1
ldr ip, _020CF204 ; =MI_Copy64B
ldr r1, [r3, #4]
bx ip
.align 2, 0
_020CF204: .word MI_Copy64B
arm_func_end G3BS_LoadMtx44
arm_func_start G3B_PushMtx
G3B_PushMtx: ; 0x020CF208
ldr r1, [r0]
mov r2, #0x11
str r2, [r1]
ldr r1, [r0, #4]
str r1, [r0]
add r1, r1, #4
str r1, [r0, #4]
bx lr
arm_func_end G3B_PushMtx
arm_func_start G3B_PopMtx
G3B_PopMtx: ; 0x020CF228
ldr r2, [r0]
mov r3, #0x12
str r3, [r2]
ldr r2, [r0, #4]
str r1, [r2]
ldr r1, [r0, #4]
add r1, r1, #4
str r1, [r0]
add r1, r1, #4
str r1, [r0, #4]
bx lr
arm_func_end G3B_PopMtx
arm_func_start G3B_LoadMtx44
G3B_LoadMtx44: ; 0x020CF254
stmdb sp!, {r4, lr}
mov r4, r0
bl G3BS_LoadMtx44
ldr r0, [r4, #4]
add r0, r0, #0x40
str r0, [r4]
add r0, r0, #4
str r0, [r4, #4]
ldmia sp!, {r4, pc}
arm_func_end G3B_LoadMtx44
arm_func_start G3B_Color
G3B_Color: ; 0x020CF278
ldr r2, [r0]
mov r3, #0x20
str r3, [r2]
ldr r2, [r0, #4]
str r1, [r2]
ldr r1, [r0, #4]
add r1, r1, #4
str r1, [r0]
add r1, r1, #4
str r1, [r0, #4]
bx lr
arm_func_end G3B_Color
arm_func_start G3B_Normal
G3B_Normal: ; 0x020CF2A4
stmdb sp!, {r4, lr}
mov r4, #0x21
ldr lr, [r0]
rsb ip, r4, #0x420
str r4, [lr]
mov lr, r3, asr #3
and r3, ip, r1, asr #3
mov r2, r2, asr #3
mov r1, r2, lsl #0x16
orr r2, r3, r1, lsr #12
mov ip, lr, lsl #0x16
ldr r1, [r0, #4]
orr r2, r2, ip, lsr #2
str r2, [r1]
ldr r1, [r0, #4]
add r1, r1, #4
str r1, [r0]
add r1, r1, #4
str r1, [r0, #4]
ldmia sp!, {r4, pc}
arm_func_end G3B_Normal
arm_func_start G3B_Vtx
G3B_Vtx: ; 0x020CF2F4
stmdb sp!, {r3, lr}
ldr ip, [r0]
mov r2, r2, lsl #0x10
mov lr, #0x23
str lr, [ip]
mov r2, r2, lsr #0x10
mov ip, r2, lsl #0x10
mov r2, r3, lsl #0x10
mov r1, r1, lsl #0x10
ldr r3, [r0, #4]
orr r1, ip, r1, lsr #16
str r1, [r3]
ldr r1, [r0, #4]
mov r2, r2, lsr #0x10
str r2, [r1, #4]
ldr r1, [r0, #4]
add r1, r1, #8
str r1, [r0]
add r1, r1, #4
str r1, [r0, #4]
ldmia sp!, {r3, pc}
arm_func_end G3B_Vtx
arm_func_start G3B_PolygonAttr
G3B_PolygonAttr: ; 0x020CF348
orr r1, r1, r2, lsl #4
ldr r2, [r0]
mov ip, #0x29
str ip, [r2]
orr r1, r1, r3, lsl #6
ldr r2, [sp, #8]
ldr r3, [sp]
orr r1, r2, r1
orr r2, r1, r3, lsl #24
ldr ip, [sp, #4]
ldr r1, [r0, #4]
orr r2, r2, ip, lsl #16
str r2, [r1]
ldr r1, [r0, #4]
add r1, r1, #4
str r1, [r0]
add r1, r1, #4
str r1, [r0, #4]
bx lr
arm_func_end G3B_PolygonAttr
arm_func_start G3B_MaterialColorDiffAmb
G3B_MaterialColorDiffAmb: ; 0x020CF394
stmdb sp!, {r3, lr}
ldr ip, [r0]
mov lr, #0x30
cmp r3, #0
movne r3, #1
str lr, [ip]
orr r2, r1, r2, lsl #16
moveq r3, #0
ldr r1, [r0, #4]
orr r2, r2, r3, lsl #15
str r2, [r1]
ldr r1, [r0, #4]
add r1, r1, #4
str r1, [r0]
add r1, r1, #4
str r1, [r0, #4]
ldmia sp!, {r3, pc}
arm_func_end G3B_MaterialColorDiffAmb
arm_func_start G3B_MaterialColorSpecEmi
G3B_MaterialColorSpecEmi: ; 0x020CF3D8
stmdb sp!, {r3, lr}
ldr ip, [r0]
mov lr, #0x31
cmp r3, #0
movne r3, #1
str lr, [ip]
orr r2, r1, r2, lsl #16
moveq r3, #0
ldr r1, [r0, #4]
orr r2, r2, r3, lsl #15
str r2, [r1]
ldr r1, [r0, #4]
add r1, r1, #4
str r1, [r0]
add r1, r1, #4
str r1, [r0, #4]
ldmia sp!, {r3, pc}
arm_func_end G3B_MaterialColorSpecEmi
arm_func_start G3B_LightVector
G3B_LightVector: ; 0x020CF41C
stmdb sp!, {r3, r4, r5, lr}
ldrsh lr, [sp, #0x10]
ldr ip, _020CF474 ; =0x000003FF
mov r3, r3, asr #3
and ip, ip, r2, asr #3
mov r2, r3, lsl #0x16
mov lr, lr, asr #3
ldr r4, [r0]
mov r5, #0x32
str r5, [r4]
mov r3, lr, lsl #0x16
orr r2, ip, r2, lsr #12
orr r3, r2, r3, lsr #2
ldr r2, [r0, #4]
orr r1, r3, r1, lsl #30
str r1, [r2]
ldr r1, [r0, #4]
add r1, r1, #4
str r1, [r0]
add r1, r1, #4
str r1, [r0, #4]
ldmia sp!, {r3, r4, r5, pc}
.align 2, 0
_020CF474: .word 0x000003FF
arm_func_end G3B_LightVector
arm_func_start G3B_LightColor
G3B_LightColor: ; 0x020CF478
ldr r3, [r0]
mov ip, #0x33
str ip, [r3]
ldr r3, [r0, #4]
orr r1, r2, r1, lsl #30
str r1, [r3]
ldr r1, [r0, #4]
add r1, r1, #4
str r1, [r0]
add r1, r1, #4
str r1, [r0, #4]
bx lr
arm_func_end G3B_LightColor
arm_func_start G3B_Begin
G3B_Begin: ; 0x020CF4A8
ldr r2, [r0]
mov r3, #0x40
str r3, [r2]
ldr r2, [r0, #4]
str r1, [r2]
ldr r1, [r0, #4]
add r1, r1, #4
str r1, [r0]
add r1, r1, #4
str r1, [r0, #4]
bx lr
arm_func_end G3B_Begin
arm_func_start G3B_End
G3B_End: ; 0x020CF4D4
ldr r1, [r0]
mov r2, #0x41
str r2, [r1]
ldr r1, [r0, #4]
str r1, [r0]
add r1, r1, #4
str r1, [r0, #4]
bx lr
arm_func_end G3B_End

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@ -1,56 +0,0 @@
.include "asm/macros.inc"
.include "g3imm.inc"
.include "global.inc"
.public GX_SendFifo64B
.public GX_SendFifo48B
.text
arm_func_start G3_LoadMtx44
G3_LoadMtx44: ; 0x020CF4F4
ldr r1, _020CF508 ; =0x04000400
mov r2, #0x16
ldr ip, _020CF50C ; =GX_SendFifo64B
str r2, [r1]
bx ip
.align 2, 0
_020CF508: .word 0x04000400
_020CF50C: .word GX_SendFifo64B
arm_func_end G3_LoadMtx44
arm_func_start G3_LoadMtx43
G3_LoadMtx43: ; 0x020CF510
ldr r1, _020CF524 ; =0x04000400
mov r2, #0x17
ldr ip, _020CF528 ; =GX_SendFifo48B
str r2, [r1]
bx ip
.align 2, 0
_020CF524: .word 0x04000400
_020CF528: .word GX_SendFifo48B
arm_func_end G3_LoadMtx43
arm_func_start G3_MultMtx43
G3_MultMtx43: ; 0x020CF52C
ldr r1, _020CF540 ; =0x04000400
mov r2, #0x19
ldr ip, _020CF544 ; =GX_SendFifo48B
str r2, [r1]
bx ip
.align 2, 0
_020CF540: .word 0x04000400
_020CF544: .word GX_SendFifo48B
arm_func_end G3_MultMtx43
arm_func_start G3_MultMtx33
G3_MultMtx33: ; 0x020CF548
ldr r1, _020CF55C ; =0x04000400
mov r2, #0x1a
ldr ip, _020CF560 ; =MI_Copy36B
str r2, [r1]
bx ip
.align 2, 0
_020CF55C: .word 0x04000400
_020CF560: .word MI_Copy36B
arm_func_end G3_MultMtx33

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@ -1,463 +0,0 @@
.include "asm/macros.inc"
.include "g3x.inc"
.include "global.inc"
.public GXi_DmaId
.text
arm_func_start G3X_Init
G3X_Init: ; 0x020CF564
stmdb sp!, {r3, lr}
bl G3X_ClearFifo
ldr r1, _020CF650 ; =0x04000504
mov r0, #0
str r0, [r1]
_020CF578:
ldr r0, [r1, #0xfc]
tst r0, #0x8000000
bne _020CF578
ldr r0, _020CF654 ; =0x04000060
mov r2, #0
strh r2, [r0]
str r2, [r1, #0xfc]
str r2, [r0, #-0x50]
ldrh ip, [r0]
ldr r2, _020CF658 ; =0xFFFFCFFD
ldr r3, _020CF65C ; =0x0000CFFB
orr ip, ip, #0x2000
strh ip, [r0]
ldrh ip, [r0]
orr ip, ip, #0x1000
strh ip, [r0]
ldrh ip, [r0]
and r2, ip, r2
strh r2, [r0]
ldrh r2, [r0]
bic r2, r2, #0x3000
orr r2, r2, #0x10
strh r2, [r0]
ldrh r2, [r0]
and r2, r2, r3
strh r2, [r0]
ldr r0, [r1, #0xfc]
orr r0, r0, #0x8000
str r0, [r1, #0xfc]
ldr r0, [r1, #0xfc]
bic r0, r0, #0xc0000000
orr r0, r0, #0x80000000
str r0, [r1, #0xfc]
bl G3X_InitMtxStack
ldr r1, _020CF660 ; =0x04000350
mov r2, #0
ldr r0, _020CF664 ; =0x00007FFF
str r2, [r1]
strh r0, [r1, #4]
strh r2, [r1, #6]
str r2, [r1, #8]
strh r2, [r1, #0xc]
sub r1, r1, #0x348
ldrh r0, [r1]
bic r0, r0, #3
strh r0, [r1]
bl G3X_InitTable
ldr r2, _020CF668 ; =0x001F0080
ldr r1, _020CF66C ; =0x040004A4
mov r0, #0
str r2, [r1]
str r0, [r1, #4]
str r0, [r1, #8]
ldmia sp!, {r3, pc}
.align 2, 0
_020CF650: .word 0x04000504
_020CF654: .word 0x04000060
_020CF658: .word 0xFFFFCFFD
_020CF65C: .word 0x0000CFFB
_020CF660: .word 0x04000350
_020CF664: .word 0x00007FFF
_020CF668: .word 0x001F0080
_020CF66C: .word 0x040004A4
arm_func_end G3X_Init
arm_func_start G3X_Reset
G3X_Reset: ; 0x020CF670
stmdb sp!, {r3, lr}
ldr r2, _020CF6CC ; =0x04000600
_020CF678:
ldr r0, [r2]
tst r0, #0x8000000
bne _020CF678
ldr r0, [r2]
ldr r1, _020CF6D0 ; =0x04000060
orr r0, r0, #0x8000
str r0, [r2]
ldrh r0, [r1]
orr r0, r0, #0x2000
strh r0, [r1]
ldrh r0, [r1]
orr r0, r0, #0x1000
strh r0, [r1]
bl G3X_ResetMtxStack
ldr r2, _020CF6D4 ; =0x001F0080
ldr r1, _020CF6D8 ; =0x040004A4
mov r0, #0
str r2, [r1]
str r0, [r1, #4]
str r0, [r1, #8]
ldmia sp!, {r3, pc}
.align 2, 0
_020CF6CC: .word 0x04000600
_020CF6D0: .word 0x04000060
_020CF6D4: .word 0x001F0080
_020CF6D8: .word 0x040004A4
arm_func_end G3X_Reset
arm_func_start G3X_ClearFifo
G3X_ClearFifo: ; 0x020CF6DC
stmdb sp!, {r3, lr}
ldr r0, _020CF6FC ; =0x04000400
bl GXi_NopClearFifo128_
ldr r1, _020CF700 ; =0x04000600
_020CF6EC:
ldr r0, [r1]
tst r0, #0x8000000
bne _020CF6EC
ldmia sp!, {r3, pc}
.align 2, 0
_020CF6FC: .word 0x04000400
_020CF700: .word 0x04000600
arm_func_end G3X_ClearFifo
arm_func_start G3X_InitMtxStack
G3X_InitMtxStack: ; 0x020CF704
stmdb sp!, {r4, lr}
sub sp, sp, #8
ldr r1, _020CF790 ; =0x04000600
ldr r0, [r1]
orr r0, r0, #0x8000
str r0, [r1]
add r4, sp, #4
_020CF720:
mov r0, r4
bl G3X_GetMtxStackLevelPV
cmp r0, #0
bne _020CF720
add r4, sp, #0
_020CF734:
mov r0, r4
bl G3X_GetMtxStackLevelPJ
cmp r0, #0
bne _020CF734
ldr r1, _020CF794 ; =0x04000440
mov r0, #3
str r0, [r1]
mov r0, #0
str r0, [r1, #0x14]
str r0, [r1]
ldr r0, [sp]
mov r2, #0
cmp r0, #0
strne r0, [r1, #8]
ldr r1, _020CF798 ; =0x04000454
mov r0, #2
str r2, [r1]
str r0, [r1, #-0x14]
ldr r0, [sp, #4]
str r0, [r1, #-0xc]
str r2, [r1]
add sp, sp, #8
ldmia sp!, {r4, pc}
.align 2, 0
_020CF790: .word 0x04000600
_020CF794: .word 0x04000440
_020CF798: .word 0x04000454
arm_func_end G3X_InitMtxStack
arm_func_start G3X_ResetMtxStack
G3X_ResetMtxStack: ; 0x020CF79C
stmdb sp!, {r4, lr}
sub sp, sp, #8
ldr r1, _020CF824 ; =0x04000600
ldr r0, [r1]
orr r0, r0, #0x8000
str r0, [r1]
add r4, sp, #4
_020CF7B8:
mov r0, r4
bl G3X_GetMtxStackLevelPV
cmp r0, #0
bne _020CF7B8
add r4, sp, #0
_020CF7CC:
mov r0, r4
bl G3X_GetMtxStackLevelPJ
cmp r0, #0
bne _020CF7CC
ldr r1, _020CF828 ; =0x04000440
mov r0, #3
str r0, [r1]
mov r0, #0
str r0, [r1, #0x14]
str r0, [r1]
ldr r0, [sp]
ldr r2, _020CF828 ; =0x04000440
cmp r0, #0
strne r0, [r1, #8]
mov r0, #2
str r0, [r2]
ldr r1, [sp, #4]
mov r0, #0
str r1, [r2, #8]
str r0, [r2, #0x14]
add sp, sp, #8
ldmia sp!, {r4, pc}
.align 2, 0
_020CF824: .word 0x04000600
_020CF828: .word 0x04000440
arm_func_end G3X_ResetMtxStack
arm_func_start G3X_SetFog
G3X_SetFog: ; 0x020CF82C
cmp r0, #0
beq _020CF860
ldr ip, _020CF878 ; =0x0400035C
mov r0, r1, lsl #6
strh r3, [ip]
sub r3, ip, #0x2fc
ldrh r1, [r3]
orr r0, r0, r2, lsl #8
orr r0, r0, #0x80
bic r1, r1, #0x3f40
orr r0, r1, r0
strh r0, [r3]
bx lr
_020CF860:
ldr r2, _020CF87C ; =0x04000060
ldr r0, _020CF880 ; =0x0000CF7F
ldrh r1, [r2]
and r0, r1, r0
strh r0, [r2]
bx lr
.align 2, 0
_020CF878: .word 0x0400035C
_020CF87C: .word 0x04000060
_020CF880: .word 0x0000CF7F
arm_func_end G3X_SetFog
arm_func_start G3X_GetClipMtx
G3X_GetClipMtx: ; 0x020CF884
stmdb sp!, {r3, lr}
ldr r2, _020CF8B0 ; =0x04000600
mov r1, r0
ldr r0, [r2]
tst r0, #0x8000000
mvnne r0, #0
ldmneia sp!, {r3, pc}
add r0, r2, #0x40
bl MI_Copy64B
mov r0, #0
ldmia sp!, {r3, pc}
.align 2, 0
_020CF8B0: .word 0x04000600
arm_func_end G3X_GetClipMtx
arm_func_start G3X_GetVectorMtx
G3X_GetVectorMtx: ; 0x020CF8B4
stmdb sp!, {r3, lr}
ldr r2, _020CF8E0 ; =0x04000600
mov r1, r0
ldr r0, [r2]
tst r0, #0x8000000
mvnne r0, #0
ldmneia sp!, {r3, pc}
add r0, r2, #0x80
bl MI_Copy36B
mov r0, #0
ldmia sp!, {r3, pc}
.align 2, 0
_020CF8E0: .word 0x04000600
arm_func_end G3X_GetVectorMtx
arm_func_start G3X_SetEdgeColorTable
G3X_SetEdgeColorTable: ; 0x020CF8E4
ldr ip, _020CF8F4 ; =MIi_CpuCopy16
ldr r1, _020CF8F8 ; =0x04000330
mov r2, #0x10
bx ip
.align 2, 0
_020CF8F4: .word MIi_CpuCopy16
_020CF8F8: .word 0x04000330
arm_func_end G3X_SetEdgeColorTable
arm_func_start G3X_SetFogTable
G3X_SetFogTable: ; 0x020CF8FC
ldr ip, _020CF908 ; =MI_Copy32B
ldr r1, _020CF90C ; =0x04000360
bx ip
.align 2, 0
_020CF908: .word MI_Copy32B
_020CF90C: .word 0x04000360
arm_func_end G3X_SetFogTable
arm_func_start G3X_SetClearColor
G3X_SetClearColor: ; 0x020CF910
ldr ip, [sp]
orr r0, r0, r1, lsl #16
orr r1, r0, r3, lsl #24
cmp ip, #0
ldr r0, _020CF934 ; =0x04000350
orrne r1, r1, #0x8000
str r1, [r0]
strh r2, [r0, #4]
bx lr
.align 2, 0
_020CF934: .word 0x04000350
arm_func_end G3X_SetClearColor
arm_func_start G3X_InitTable
G3X_InitTable: ; 0x020CF938
stmdb sp!, {r3, lr}
sub sp, sp, #8
ldr r0, _020CF9C8 ; =GXi_DmaId
mvn r1, #0
ldr r0, [r0]
cmp r0, r1
ldr r1, _020CF9CC ; =0x04000330
beq _020CF988
mov r2, #0
str r2, [sp]
mov r3, #0x10
str r2, [sp, #4]
bl MI_DmaFill32Async
ldr r0, _020CF9C8 ; =GXi_DmaId
ldr r1, _020CF9D0 ; =0x04000360
ldr r0, [r0]
mov r2, #0
mov r3, #0x60
bl MI_DmaFill32
b _020CF9A4
_020CF988:
mov r0, #0
mov r2, #0x10
bl MIi_CpuClear32
ldr r1, _020CF9D0 ; =0x04000360
mov r0, #0
mov r2, #0x60
bl MIi_CpuClear32
_020CF9A4:
mov r2, #0
ldr r0, _020CF9D4 ; =0x040004D0
mov r1, r2
_020CF9B0:
add r2, r2, #1
str r1, [r0]
cmp r2, #0x20
blt _020CF9B0
add sp, sp, #8
ldmia sp!, {r3, pc}
.align 2, 0
_020CF9C8: .word GXi_DmaId
_020CF9CC: .word 0x04000330
_020CF9D0: .word 0x04000360
_020CF9D4: .word 0x040004D0
arm_func_end G3X_InitTable
arm_func_start G3X_GetMtxStackLevelPV
G3X_GetMtxStackLevelPV: ; 0x020CF9D8
ldr r2, _020CFA04 ; =0x04000600
ldr r1, [r2]
tst r1, #0x4000
mvnne r0, #0
bxne lr
ldr r1, [r2]
and r1, r1, #0x1f00
mov r1, r1, lsr #8
str r1, [r0]
mov r0, #0
bx lr
.align 2, 0
_020CFA04: .word 0x04000600
arm_func_end G3X_GetMtxStackLevelPV
arm_func_start G3X_GetMtxStackLevelPJ
G3X_GetMtxStackLevelPJ: ; 0x020CFA08
ldr r2, _020CFA34 ; =0x04000600
ldr r1, [r2]
tst r1, #0x4000
mvnne r0, #0
bxne lr
ldr r1, [r2]
and r1, r1, #0x2000
mov r1, r1, lsr #0xd
str r1, [r0]
mov r0, #0
bx lr
.align 2, 0
_020CFA34: .word 0x04000600
arm_func_end G3X_GetMtxStackLevelPJ
arm_func_start G3X_GetBoxTestResult
G3X_GetBoxTestResult: ; 0x020CFA38
ldr r2, _020CFA60 ; =0x04000600
ldr r1, [r2]
tst r1, #1
mvnne r0, #0
bxne lr
ldr r1, [r2]
and r1, r1, #2
str r1, [r0]
mov r0, #0
bx lr
.align 2, 0
_020CFA60: .word 0x04000600
arm_func_end G3X_GetBoxTestResult
arm_func_start G3X_SetHOffset
G3X_SetHOffset: ; 0x020CFA64
ldr r1, _020CFA70 ; =0x04000010
str r0, [r1]
bx lr
.align 2, 0
_020CFA70: .word 0x04000010
arm_func_end G3X_SetHOffset
arm_func_start GXi_NopClearFifo128_
GXi_NopClearFifo128_: ; 0x020CFA74
mov r1, #0
mov r2, #0
mov r3, #0
mov ip, #0
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
bx lr
arm_func_end GXi_NopClearFifo128_

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@ -1,273 +0,0 @@
.include "asm/macros.inc"
.include "gx.inc"
.include "global.inc"
.bss
sDispMode:
.space 2
.public GXi_VRamLockId
GXi_VRamLockId:
.space 2
.data
.public sIsDispOn
sIsDispOn:
.word 1
.public GXi_DmaId
GXi_DmaId:
.word 3
.text
arm_func_start GX_Init
GX_Init: ; 0x020CD7C4
stmdb sp!, {r4, r5, r6, lr}
ldr r2, _020CD8EC ; =0x04000304
ldr r0, _020CD8F0 ; =0xFFFFFDF1
ldrh r1, [r2]
orr r1, r1, #0x8000
strh r1, [r2]
ldrh r1, [r2]
and r0, r1, r0
orr r0, r0, #0xe
orr r0, r0, #0x200
strh r0, [r2]
ldrh r0, [r2]
orr r0, r0, #1
strh r0, [r2]
bl GX_InitGXState
ldr r5, _020CD8F4 ; =GXi_VRamLockId - 2
ldrh r0, [r5, #2]
cmp r0, #0
bne _020CD838
mvn r4, #2
_020CD814:
bl OS_GetLockID
mov r6, r0
cmp r6, r4
bne _020CD828
bl OS_Terminate
_020CD828:
strh r6, [r5, #2]
ldrh r0, [r5, #2]
cmp r0, #0
beq _020CD814
_020CD838:
ldr r0, _020CD8F8 ; =0x04000004
mov r2, #0
mov r3, #0x4000000
strh r2, [r0]
ldr r0, _020CD8FC ; =sIsDispOn
str r2, [r3]
ldr r0, [r0, #4]
sub r1, r3, #0x4000001
cmp r0, r1
beq _020CD890
add r1, r3, #8
mov r3, #0x60
bl MI_DmaFill32
ldr r1, _020CD900 ; =0x0400006C
mov r2, #0
ldr r0, _020CD8FC ; =sIsDispOn
strh r2, [r1]
ldr r0, [r0, #4]
ldr r1, _020CD904 ; =0x04001000
mov r3, #0x70
bl MI_DmaFill32
b _020CD8B8
_020CD890:
mov r0, r2
add r1, r3, #8
mov r2, #0x60
bl MIi_CpuClear32
ldr r3, _020CD900 ; =0x0400006C
mov r0, #0
ldr r1, _020CD904 ; =0x04001000
mov r2, #0x70
strh r0, [r3]
bl MIi_CpuClear32
_020CD8B8:
ldr r0, _020CD908 ; =0x04000020
mov r2, #0x100
strh r2, [r0]
strh r2, [r0, #6]
strh r2, [r0, #0x10]
strh r2, [r0, #0x16]
add r1, r0, #0x1000
ldr r0, _020CD90C ; =0x04001026
strh r2, [r1]
strh r2, [r0]
strh r2, [r0, #0xa]
strh r2, [r0, #0x10]
ldmia sp!, {r4, r5, r6, pc}
.align 2, 0
_020CD8EC: .word 0x04000304
_020CD8F0: .word 0xFFFFFDF1
_020CD8F4: .word GXi_VRamLockId - 2
_020CD8F8: .word 0x04000004
_020CD8FC: .word sIsDispOn
_020CD900: .word 0x0400006C
_020CD904: .word 0x04001000
_020CD908: .word 0x04000020
_020CD90C: .word 0x04001026
arm_func_end GX_Init
arm_func_start GX_HBlankIntr
GX_HBlankIntr: ; 0x020CD910
ldr r2, _020CD940 ; =0x04000004
cmp r0, #0
ldrh r0, [r2]
ldreqh r1, [r2]
and r0, r0, #0x10
biceq r1, r1, #0x10
streqh r1, [r2]
bxeq lr
ldrh r1, [r2]
orr r1, r1, #0x10
strh r1, [r2]
bx lr
.align 2, 0
_020CD940: .word 0x04000004
arm_func_end GX_HBlankIntr
arm_func_start GX_VBlankIntr
GX_VBlankIntr: ; 0x020CD944
ldr r2, _020CD974 ; =0x04000004
cmp r0, #0
ldrh r0, [r2]
ldreqh r1, [r2]
and r0, r0, #8
biceq r1, r1, #8
streqh r1, [r2]
bxeq lr
ldrh r1, [r2]
orr r1, r1, #8
strh r1, [r2]
bx lr
.align 2, 0
_020CD974: .word 0x04000004
arm_func_end GX_VBlankIntr
arm_func_start GX_DispOff
GX_DispOff: ; 0x020CD978
stmdb sp!, {r3, lr}
mov lr, #0x4000000
ldr ip, [lr]
ldr r1, _020CD9AC ; =sIsDispOn
and r2, ip, #0x30000
mov r3, #0
ldr r0, _020CD9B0 ; =sDispMode
mov r2, r2, lsr #0x10
strh r3, [r1]
strh r2, [r0]
bic r0, ip, #0x30000
str r0, [lr]
ldmia sp!, {r3, pc}
.align 2, 0
_020CD9AC: .word sIsDispOn
_020CD9B0: .word sDispMode
arm_func_end GX_DispOff
arm_func_start GX_DispOn
GX_DispOn: ; 0x020CD9B4
ldr r0, _020CD9F4 ; =sDispMode
ldr r1, _020CD9F8 ; =sIsDispOn
ldrh r2, [r0]
mov r0, #1
strh r0, [r1]
mov r1, #0x4000000
cmp r2, #0
ldreq r0, [r1]
orreq r0, r0, #0x10000
streq r0, [r1]
bxeq lr
ldr r0, [r1]
bic r0, r0, #0x30000
orr r0, r0, r2, lsl #16
str r0, [r1]
bx lr
.align 2, 0
_020CD9F4: .word sDispMode
_020CD9F8: .word sIsDispOn
arm_func_end GX_DispOn
arm_func_start GX_SetGraphicsMode
GX_SetGraphicsMode: ; 0x020CD9FC
stmdb sp!, {r3, lr}
ldr r3, _020CDA58 ; =sIsDispOn
mov lr, #0x4000000
ldrh ip, [r3]
ldr lr, [lr]
ldr r3, _020CDA5C ; =sDispMode
cmp ip, #0
strh r0, [r3]
ldr r3, _020CDA60 ; =0xFFF0FFF0
moveq r0, #0
and r3, lr, r3
orr r0, r3, r0, lsl #16
orr r0, r1, r0
orr r1, r0, r2, lsl #3
mov ip, #0x4000000
ldr r0, _020CDA5C ; =sDispMode
str r1, [ip]
ldrh r0, [r0]
cmp r0, #0
ldreq r0, _020CDA58 ; =sIsDispOn
moveq r1, #0
streqh r1, [r0]
ldmia sp!, {r3, pc}
.align 2, 0
_020CDA58: .word sIsDispOn
_020CDA5C: .word sDispMode
_020CDA60: .word 0xFFF0FFF0
arm_func_end GX_SetGraphicsMode
arm_func_start GXS_SetGraphicsMode
GXS_SetGraphicsMode: ; 0x020CDA64
ldr r2, _020CDA7C ; =0x04001000
ldr r1, [r2]
bic r1, r1, #7
orr r0, r1, r0
str r0, [r2]
bx lr
.align 2, 0
_020CDA7C: .word 0x04001000
arm_func_end GXS_SetGraphicsMode
arm_func_start GXx_SetMasterBrightness_
GXx_SetMasterBrightness_: ; 0x020CDA80
cmp r1, #0
moveq r1, #0
streqh r1, [r0]
bxeq lr
orrgt r1, r1, #0x4000
strgth r1, [r0]
rsble r1, r1, #0
orrle r1, r1, #0x8000
strleh r1, [r0]
bx lr
arm_func_end GXx_SetMasterBrightness_
arm_func_start GXx_GetMasterBrightness_
GXx_GetMasterBrightness_: ; 0x020CDAA8
ldrh r1, [r0]
and r1, r1, #0xc000
mov r1, r1, lsl #0x10
movs r1, r1, lsr #0x10
moveq r0, #0
bxeq lr
cmp r1, #0x4000
ldreqh r0, [r0]
andeq r0, r0, #0x1f
bxeq lr
cmp r1, #0x8000
movne r0, #0
bxne lr
ldrh r0, [r0]
and r0, r0, #0x1f
rsb r0, r0, #0
bx lr
arm_func_end GXx_GetMasterBrightness_

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@ -1,393 +0,0 @@
.include "asm/macros.inc"
.include "gx_bgcnt.inc"
.include "global.inc"
.text
arm_func_start G2_GetBG0ScrPtr
G2_GetBG0ScrPtr: ; 0x020CEC3C
ldr r1, _020CEC6C ; =0x04000008
mov r0, #0x4000000
ldrh r1, [r1]
ldr r0, [r0]
and r0, r0, #0x38000000
mov r0, r0, lsr #0x1b
and r1, r1, #0x1f00
mov r0, r0, lsl #0x10
mov r1, r1, asr #8
add r0, r0, #0x6000000
add r0, r0, r1, lsl #11
bx lr
.align 2, 0
_020CEC6C: .word 0x04000008
arm_func_end G2_GetBG0ScrPtr
arm_func_start G2S_GetBG0ScrPtr
G2S_GetBG0ScrPtr: ; 0x020CEC70
ldr r0, _020CEC8C ; =0x04001008
ldrh r0, [r0]
and r0, r0, #0x1f00
mov r0, r0, asr #8
mov r0, r0, lsl #0xb
add r0, r0, #0x6200000
bx lr
.align 2, 0
_020CEC8C: .word 0x04001008
arm_func_end G2S_GetBG0ScrPtr
arm_func_start G2_GetBG1ScrPtr
G2_GetBG1ScrPtr: ; 0x020CEC90
ldr r1, _020CECC0 ; =0x0400000A
mov r0, #0x4000000
ldrh r1, [r1]
ldr r0, [r0]
and r0, r0, #0x38000000
mov r0, r0, lsr #0x1b
and r1, r1, #0x1f00
mov r0, r0, lsl #0x10
mov r1, r1, asr #8
add r0, r0, #0x6000000
add r0, r0, r1, lsl #11
bx lr
.align 2, 0
_020CECC0: .word 0x0400000A
arm_func_end G2_GetBG1ScrPtr
arm_func_start G2S_GetBG1ScrPtr
G2S_GetBG1ScrPtr: ; 0x020CECC4
ldr r0, _020CECE0 ; =0x0400100A
ldrh r0, [r0]
and r0, r0, #0x1f00
mov r0, r0, asr #8
mov r0, r0, lsl #0xb
add r0, r0, #0x6200000
bx lr
.align 2, 0
_020CECE0: .word 0x0400100A
arm_func_end G2S_GetBG1ScrPtr
arm_func_start G2_GetBG2ScrPtr
G2_GetBG2ScrPtr: ; 0x020CECE4
mov r0, #0x4000000
ldr r1, [r0]
ldrh r3, [r0, #0xc]
ldr r0, [r0]
and ip, r1, #7
and r0, r0, #0x38000000
mov r1, r0, lsr #0x1b
and r0, r3, #0x1f00
mov r2, r1, lsl #0x10
cmp ip, #6
mov r1, r0, lsr #8
addls pc, pc, ip, lsl #2
b _020CED60
_020CED18: ; jump table
b _020CED34 ; case 0
b _020CED34 ; case 1
b _020CED34 ; case 2
b _020CED34 ; case 3
b _020CED34 ; case 4
b _020CED40 ; case 5
b _020CED58 ; case 6
_020CED34:
add r0, r2, #0x6000000
add r0, r0, r1, lsl #11
bx lr
_020CED40:
tst r3, #0x80
movne r0, r1, lsl #0xe
addne r0, r0, #0x6000000
addeq r0, r2, #0x6000000
addeq r0, r0, r1, lsl #11
bx lr
_020CED58:
mov r0, #0x6000000
bx lr
_020CED60:
mov r0, #0
bx lr
arm_func_end G2_GetBG2ScrPtr
arm_func_start G2S_GetBG2ScrPtr
G2S_GetBG2ScrPtr: ; 0x020CED68
ldr r1, _020CEDD8 ; =0x04001000
ldr r0, [r1]
ldrh r1, [r1, #0xc]
and r2, r0, #7
cmp r2, #6
and r0, r1, #0x1f00
mov r0, r0, lsr #8
addls pc, pc, r2, lsl #2
b _020CEDD0
_020CED8C: ; jump table
b _020CEDA8 ; case 0
b _020CEDA8 ; case 1
b _020CEDA8 ; case 2
b _020CEDA8 ; case 3
b _020CEDA8 ; case 4
b _020CEDB4 ; case 5
b _020CEDC8 ; case 6
_020CEDA8:
mov r0, r0, lsl #0xb
add r0, r0, #0x6200000
bx lr
_020CEDB4:
tst r1, #0x80
movne r0, r0, lsl #0xe
moveq r0, r0, lsl #0xb
add r0, r0, #0x6200000
bx lr
_020CEDC8:
mov r0, #0
bx lr
_020CEDD0:
mov r0, #0
bx lr
.align 2, 0
_020CEDD8: .word 0x04001000
arm_func_end G2S_GetBG2ScrPtr
arm_func_start G2_GetBG3ScrPtr
G2_GetBG3ScrPtr: ; 0x020CEDDC
mov r0, #0x4000000
ldr r1, [r0]
ldrh r3, [r0, #0xe]
ldr r0, [r0]
and ip, r1, #7
and r0, r0, #0x38000000
mov r1, r0, lsr #0x1b
and r0, r3, #0x1f00
mov r2, r1, lsl #0x10
cmp ip, #6
mov r1, r0, lsr #8
addls pc, pc, ip, lsl #2
b _020CEE58
_020CEE10: ; jump table
b _020CEE2C ; case 0
b _020CEE2C ; case 1
b _020CEE2C ; case 2
b _020CEE38 ; case 3
b _020CEE38 ; case 4
b _020CEE38 ; case 5
b _020CEE50 ; case 6
_020CEE2C:
add r0, r2, #0x6000000
add r0, r0, r1, lsl #11
bx lr
_020CEE38:
tst r3, #0x80
movne r0, r1, lsl #0xe
addne r0, r0, #0x6000000
addeq r0, r2, #0x6000000
addeq r0, r0, r1, lsl #11
bx lr
_020CEE50:
mov r0, #0
bx lr
_020CEE58:
mov r0, #0
bx lr
arm_func_end G2_GetBG3ScrPtr
arm_func_start G2S_GetBG3ScrPtr
G2S_GetBG3ScrPtr: ; 0x020CEE60
ldr r1, _020CEED0 ; =0x04001000
ldr r0, [r1]
ldrh r1, [r1, #0xe]
and r2, r0, #7
cmp r2, #6
and r0, r1, #0x1f00
mov r0, r0, lsr #8
addls pc, pc, r2, lsl #2
b _020CEEC8
_020CEE84: ; jump table
b _020CEEA0 ; case 0
b _020CEEA0 ; case 1
b _020CEEA0 ; case 2
b _020CEEAC ; case 3
b _020CEEAC ; case 4
b _020CEEAC ; case 5
b _020CEEC0 ; case 6
_020CEEA0:
mov r0, r0, lsl #0xb
add r0, r0, #0x6200000
bx lr
_020CEEAC:
tst r1, #0x80
movne r0, r0, lsl #0xe
moveq r0, r0, lsl #0xb
add r0, r0, #0x6200000
bx lr
_020CEEC0:
mov r0, #0
bx lr
_020CEEC8:
mov r0, #0
bx lr
.align 2, 0
_020CEED0: .word 0x04001000
arm_func_end G2S_GetBG3ScrPtr
arm_func_start G2_GetBG0CharPtr
G2_GetBG0CharPtr: ; 0x020CEED4
ldr r1, _020CEF04 ; =0x04000008
mov r0, #0x4000000
ldrh r1, [r1]
ldr r0, [r0]
and r0, r0, #0x7000000
mov r0, r0, lsr #0x18
and r1, r1, #0x3c
mov r0, r0, lsl #0x10
mov r1, r1, asr #2
add r0, r0, #0x6000000
add r0, r0, r1, lsl #14
bx lr
.align 2, 0
_020CEF04: .word 0x04000008
arm_func_end G2_GetBG0CharPtr
arm_func_start G2S_GetBG0CharPtr
G2S_GetBG0CharPtr: ; 0x020CEF08
ldr r0, _020CEF24 ; =0x04001008
ldrh r0, [r0]
and r0, r0, #0x3c
mov r0, r0, asr #2
mov r0, r0, lsl #0xe
add r0, r0, #0x6200000
bx lr
.align 2, 0
_020CEF24: .word 0x04001008
arm_func_end G2S_GetBG0CharPtr
arm_func_start G2_GetBG1CharPtr
G2_GetBG1CharPtr: ; 0x020CEF28
ldr r1, _020CEF58 ; =0x0400000A
mov r0, #0x4000000
ldrh r1, [r1]
ldr r0, [r0]
and r0, r0, #0x7000000
mov r0, r0, lsr #0x18
and r1, r1, #0x3c
mov r0, r0, lsl #0x10
mov r1, r1, asr #2
add r0, r0, #0x6000000
add r0, r0, r1, lsl #14
bx lr
.align 2, 0
_020CEF58: .word 0x0400000A
arm_func_end G2_GetBG1CharPtr
arm_func_start G2S_GetBG1CharPtr
G2S_GetBG1CharPtr: ; 0x020CEF5C
ldr r0, _020CEF78 ; =0x0400100A
ldrh r0, [r0]
and r0, r0, #0x3c
mov r0, r0, asr #2
mov r0, r0, lsl #0xe
add r0, r0, #0x6200000
bx lr
.align 2, 0
_020CEF78: .word 0x0400100A
arm_func_end G2S_GetBG1CharPtr
arm_func_start G2_GetBG2CharPtr
G2_GetBG2CharPtr: ; 0x020CEF7C
mov r1, #0x4000000
ldr r0, [r1]
ldrh r2, [r1, #0xc]
and r0, r0, #7
cmp r0, #5
blt _020CEF9C
tst r2, #0x80
bne _020CEFC4
_020CEF9C:
mov r0, #0x4000000
ldr r1, [r0]
and r0, r2, #0x3c
and r1, r1, #0x7000000
mov r1, r1, lsr #0x18
mov r1, r1, lsl #0x10
add r1, r1, #0x6000000
mov r0, r0, lsr #2
add r0, r1, r0, lsl #14
bx lr
_020CEFC4:
mov r0, #0
bx lr
arm_func_end G2_GetBG2CharPtr
arm_func_start G2S_GetBG2CharPtr
G2S_GetBG2CharPtr: ; 0x020CEFCC
ldr r1, _020CF008 ; =0x04001000
ldr r0, [r1]
ldrh r1, [r1, #0xc]
and r0, r0, #7
cmp r0, #5
blt _020CEFEC
tst r1, #0x80
bne _020CF000
_020CEFEC:
and r0, r1, #0x3c
mov r0, r0, lsr #2
mov r0, r0, lsl #0xe
add r0, r0, #0x6200000
bx lr
_020CF000:
mov r0, #0
bx lr
.align 2, 0
_020CF008: .word 0x04001000
arm_func_end G2S_GetBG2CharPtr
arm_func_start G2_GetBG3CharPtr
G2_GetBG3CharPtr: ; 0x020CF00C
mov r1, #0x4000000
ldr r0, [r1]
ldrh r2, [r1, #0xe]
and r0, r0, #7
cmp r0, #3
blt _020CF034
cmp r0, #6
bge _020CF05C
tst r2, #0x80
bne _020CF05C
_020CF034:
mov r0, #0x4000000
ldr r1, [r0]
and r0, r2, #0x3c
and r1, r1, #0x7000000
mov r1, r1, lsr #0x18
mov r1, r1, lsl #0x10
add r1, r1, #0x6000000
mov r0, r0, lsr #2
add r0, r1, r0, lsl #14
bx lr
_020CF05C:
mov r0, #0
bx lr
arm_func_end G2_GetBG3CharPtr
arm_func_start G2S_GetBG3CharPtr
G2S_GetBG3CharPtr: ; 0x020CF064
ldr r1, _020CF0A8 ; =0x04001000
ldr r0, [r1]
ldrh r1, [r1, #0xe]
and r0, r0, #7
cmp r0, #3
blt _020CF08C
cmp r0, #6
bge _020CF0A0
tst r1, #0x80
bne _020CF0A0
_020CF08C:
and r0, r1, #0x3c
mov r0, r0, lsr #2
mov r0, r0, lsl #0xe
add r0, r0, #0x6200000
bx lr
_020CF0A0:
mov r0, #0
bx lr
.align 2, 0
_020CF0A8: .word 0x04001000
arm_func_end G2S_GetBG3CharPtr

File diff suppressed because it is too large Load Diff

View File

@ -1,414 +0,0 @@
.include "asm/macros.inc"
.include "gx_load3d.inc"
.include "global.inc"
.public GXi_DmaId
.public GX_ResetBankForClearImage
.bss
sClrImg: ; 0x021E15F8
.space 0x4
sTexLCDCBlk1: ; 0x021E15FC
.space 0x4
sTexPlttLCDCBlk: ; 0x021E1600
.space 0x4
sTexPltt: ; 0x021E1604
.space 0x4
sClrImgLCDCBlk: ; 0x021E1608
.space 0x4
sTex: ; 0x021E160C
.space 0x4
sTexLCDCBlk2: ; 0x021E1610
.space 0x4
sSzTexBlk1: ; 0x021E1614
.space 0x4
.text
arm_func_start GX_BeginLoadTex
GX_BeginLoadTex: ; 0x020D08EC
stmdb sp!, {r3, lr}
bl GX_ResetBankForTex
mov r1, #6
mul lr, r0, r1
ldr r2, _020D0938 ; =sTexStartAddrTable
ldr r1, _020D093C ; =sTexStartAddrTable + 2
ldrh ip, [r2, lr]
ldr r2, _020D0940 ; =sTexStartAddrTable + 4
ldrh r3, [r1, lr]
ldr r1, _020D0944 ; =sClrImg
ldrh r2, [r2, lr]
str r0, [r1, #0x14]
mov r0, ip, lsl #0xc
str r0, [r1, #4]
mov r0, r3, lsl #0xc
str r0, [r1, #0x18]
mov r0, r2, lsl #0xc
str r0, [r1, #0x1c]
ldmia sp!, {r3, pc}
.align 2, 0
_020D0938: .word sTexStartAddrTable
_020D093C: .word sTexStartAddrTable + 2
_020D0940: .word sTexStartAddrTable + 4
_020D0944: .word sClrImg
arm_func_end GX_BeginLoadTex
arm_func_start GX_LoadTex
GX_LoadTex: ; 0x020D0948
stmdb sp!, {r3, r4, r5, r6, r7, lr}
sub sp, sp, #8
ldr r3, _020D0A80 ; =sClrImg
mov r7, r0
ldr r4, [r3, #0x18]
mov ip, r1
cmp r4, #0
ldreq r0, [r3, #4]
mov r6, r2
addeq r2, r0, ip
beq _020D0A34
ldr r2, [r3, #0x1c]
add r0, ip, r6
cmp r0, r2
ldrlo r0, [r3, #4]
addlo r2, r0, ip
blo _020D0A34
cmp ip, r2
addhs r0, r4, ip
subhs r2, r0, r2
bhs _020D0A34
ldr r0, _020D0A84 ; =GXi_DmaId
mvn r1, #0
ldr r0, [r0]
sub r5, r2, ip
cmp r0, r1
ldr lr, [r3, #4]
beq _020D09D4
cmp r5, #0x30
bls _020D09D4
mov r1, r7
mov r3, r5
add r2, lr, ip
bl MI_DmaCopy32
b _020D09E4
_020D09D4:
mov r0, r7
mov r2, r5
add r1, lr, ip
bl MIi_CpuCopy32
_020D09E4:
ldr r0, _020D0A84 ; =GXi_DmaId
mvn r1, #0
ldr r0, [r0]
cmp r0, r1
beq _020D0A1C
mov ip, #0
str ip, [sp]
mov r2, r4
add r1, r7, r5
sub r3, r6, r5
str ip, [sp, #4]
bl MI_DmaCopy32Async
add sp, sp, #8
ldmia sp!, {r3, r4, r5, r6, r7, pc}
_020D0A1C:
mov r1, r4
add r0, r7, r5
sub r2, r6, r5
bl MIi_CpuCopy32
add sp, sp, #8
ldmia sp!, {r3, r4, r5, r6, r7, pc}
_020D0A34:
ldr r0, _020D0A84 ; =GXi_DmaId
mvn r1, #0
ldr r0, [r0]
cmp r0, r1
beq _020D0A68
mov r4, #0
str r4, [sp]
mov r1, r7
mov r3, r6
str r4, [sp, #4]
bl MI_DmaCopy32Async
add sp, sp, #8
ldmia sp!, {r3, r4, r5, r6, r7, pc}
_020D0A68:
mov r1, r2
mov r0, r7
mov r2, r6
bl MIi_CpuCopy32
add sp, sp, #8
ldmia sp!, {r3, r4, r5, r6, r7, pc}
.align 2, 0
_020D0A80: .word sClrImg
_020D0A84: .word GXi_DmaId
arm_func_end GX_LoadTex
arm_func_start GX_EndLoadTex
GX_EndLoadTex: ; 0x020D0A88
stmdb sp!, {r3, lr}
ldr r0, _020D0ACC ; =GXi_DmaId
mvn r1, #0
ldr r0, [r0]
cmp r0, r1
beq _020D0AA4
bl MI_WaitDma
_020D0AA4:
ldr r0, _020D0AD0 ; =sClrImg
ldr r0, [r0, #0x14]
bl GX_SetBankForTex
ldr r0, _020D0AD0 ; =sClrImg
mov r1, #0
str r1, [r0, #0x1c]
str r1, [r0, #0x18]
str r1, [r0, #4]
str r1, [r0, #0x14]
ldmia sp!, {r3, pc}
.align 2, 0
_020D0ACC: .word GXi_DmaId
_020D0AD0: .word sClrImg
arm_func_end GX_EndLoadTex
arm_func_start GX_BeginLoadTexPltt
GX_BeginLoadTexPltt: ; 0x020D0AD4
stmdb sp!, {r3, lr}
bl GX_ResetBankForTexPltt
mov r3, r0, asr #4
ldr r1, _020D0B00 ; =sClrImg
ldr r2, _020D0B04 ; =sTexPlttStartAddrTable
mov r3, r3, lsl #1
ldrh r2, [r2, r3]
str r0, [r1, #0xc]
mov r0, r2, lsl #0xc
str r0, [r1, #8]
ldmia sp!, {r3, pc}
.align 2, 0
_020D0B00: .word sClrImg
_020D0B04: .word sTexPlttStartAddrTable
arm_func_end GX_BeginLoadTexPltt
arm_func_start GX_LoadTexPltt
GX_LoadTexPltt: ; 0x020D0B08
stmdb sp!, {r4, r5, r6, lr}
sub sp, sp, #8
ldr r3, _020D0B6C ; =GXi_DmaId
ldr lr, _020D0B70 ; =sClrImg
ldr r4, [r3]
mvn ip, #0
mov r6, r0
mov r5, r1
mov r3, r2
cmp r4, ip
ldr lr, [lr, #8]
beq _020D0B5C
mov ip, #0
str ip, [sp]
mov r0, r4
mov r1, r6
add r2, lr, r5
str ip, [sp, #4]
bl MI_DmaCopy32Async
add sp, sp, #8
ldmia sp!, {r4, r5, r6, pc}
_020D0B5C:
add r1, lr, r5
bl MIi_CpuCopy32
add sp, sp, #8
ldmia sp!, {r4, r5, r6, pc}
.align 2, 0
_020D0B6C: .word GXi_DmaId
_020D0B70: .word sClrImg
arm_func_end GX_LoadTexPltt
arm_func_start GX_EndLoadTexPltt
GX_EndLoadTexPltt: ; 0x020D0B74
stmdb sp!, {r3, lr}
ldr r0, _020D0BB0 ; =GXi_DmaId
mvn r1, #0
ldr r0, [r0]
cmp r0, r1
beq _020D0B90
bl MI_WaitDma
_020D0B90:
ldr r0, _020D0BB4 ; =sClrImg
ldr r0, [r0, #0xc]
bl GX_SetBankForTexPltt
ldr r0, _020D0BB4 ; =sClrImg
mov r1, #0
str r1, [r0, #0xc]
str r1, [r0, #8]
ldmia sp!, {r3, pc}
.align 2, 0
_020D0BB0: .word GXi_DmaId
_020D0BB4: .word sClrImg
arm_func_end GX_EndLoadTexPltt
arm_func_start GX_BeginLoadClearImage
GX_BeginLoadClearImage: ; 0x020D0BB8
stmdb sp!, {r3, lr}
bl GX_ResetBankForClearImage
ldr r1, _020D0C38 ; =sClrImg
cmp r0, #0xc
str r0, [r1]
addls pc, pc, r0, lsl #2
ldmia sp!, {r3, pc}
_020D0BD4: ; jump table
ldmia sp!, {r3, pc} ; case 0
b _020D0C20 ; case 1
b _020D0C08 ; case 2
b _020D0C08 ; case 3
b _020D0C2C ; case 4
ldmia sp!, {r3, pc} ; case 5
ldmia sp!, {r3, pc} ; case 6
ldmia sp!, {r3, pc} ; case 7
b _020D0C14 ; case 8
ldmia sp!, {r3, pc} ; case 9
ldmia sp!, {r3, pc} ; case 10
ldmia sp!, {r3, pc} ; case 11
b _020D0C14 ; case 12
_020D0C08:
mov r0, #0x6800000
str r0, [r1, #0x10]
ldmia sp!, {r3, pc}
_020D0C14:
ldr r0, _020D0C3C ; =0x06840000
str r0, [r1, #0x10]
ldmia sp!, {r3, pc}
_020D0C20:
ldr r0, _020D0C40 ; =0x067E0000
str r0, [r1, #0x10]
ldmia sp!, {r3, pc}
_020D0C2C:
ldr r0, _020D0C44 ; =0x06820000
str r0, [r1, #0x10]
ldmia sp!, {r3, pc}
.align 2, 0
_020D0C38: .word sClrImg
_020D0C3C: .word 0x06840000
_020D0C40: .word 0x067E0000
_020D0C44: .word 0x06820000
arm_func_end GX_BeginLoadClearImage
arm_func_start GX_LoadClearImageColor
GX_LoadClearImageColor: ; 0x020D0C48
stmdb sp!, {r4, lr}
sub sp, sp, #8
ldr r2, _020D0CA8 ; =GXi_DmaId
ldr ip, _020D0CAC ; =sClrImg
ldr lr, [r2]
mvn r2, #0
mov r4, r0
mov r3, r1
cmp lr, r2
ldr r2, [ip, #0x10]
beq _020D0C94
mov ip, #0
str ip, [sp]
mov r0, lr
mov r1, r4
str ip, [sp, #4]
bl MI_DmaCopy32Async
add sp, sp, #8
ldmia sp!, {r4, pc}
_020D0C94:
mov r1, r2
mov r2, r3
bl MIi_CpuCopy32
add sp, sp, #8
ldmia sp!, {r4, pc}
.align 2, 0
_020D0CA8: .word GXi_DmaId
_020D0CAC: .word sClrImg
arm_func_end GX_LoadClearImageColor
arm_func_start GX_LoadClearImageDepth
GX_LoadClearImageDepth: ; 0x020D0CB0
stmdb sp!, {r3, r4, r5, lr}
sub sp, sp, #8
ldr r2, _020D0D14 ; =GXi_DmaId
ldr ip, _020D0D18 ; =sClrImg
ldr lr, [r2]
mvn r2, #0
mov r5, r0
mov r3, r1
cmp lr, r2
ldr r4, [ip, #0x10]
beq _020D0D00
mov ip, #0
str ip, [sp]
mov r0, lr
mov r1, r5
add r2, r4, #0x20000
str ip, [sp, #4]
bl MI_DmaCopy32Async
add sp, sp, #8
ldmia sp!, {r3, r4, r5, pc}
_020D0D00:
mov r2, r3
add r1, r4, #0x20000
bl MIi_CpuCopy32
add sp, sp, #8
ldmia sp!, {r3, r4, r5, pc}
.align 2, 0
_020D0D14: .word GXi_DmaId
_020D0D18: .word sClrImg
arm_func_end GX_LoadClearImageDepth
arm_func_start GX_EndLoadClearImage
GX_EndLoadClearImage: ; 0x020D0D1C
stmdb sp!, {r3, lr}
ldr r0, _020D0D58 ; =GXi_DmaId
mvn r1, #0
ldr r0, [r0]
cmp r0, r1
beq _020D0D38
bl MI_WaitDma
_020D0D38:
ldr r0, _020D0D5C ; =sClrImg
ldr r0, [r0]
bl GX_SetBankForClearImage
ldr r0, _020D0D5C ; =sClrImg
mov r1, #0
str r1, [r0]
str r1, [r0, #0x10]
ldmia sp!, {r3, pc}
.align 2, 0
_020D0D58: .word GXi_DmaId
_020D0D5C: .word sClrImg
arm_func_end GX_EndLoadClearImage
.rodata
sTexPlttStartAddrTable: ; 0x0210D5E0
.short 0x0000
.short 0x6880
.short 0x6890
.short 0x6880
.short 0x6894
.short 0x0000
.short 0x6890
.short 0x6880
sTexStartAddrTable: ; 0x0210D5F0
.short 0x0000, 0x0000, 0x0000
.short 0x6800, 0x0000, 0x0000
.short 0x6820, 0x0000, 0x0000
.short 0x6800, 0x0000, 0x0000
.short 0x6840, 0x0000, 0x0000
.short 0x6800, 0x6840, 0x0020
.short 0x6820, 0x0000, 0x0000
.short 0x6800, 0x0000, 0x0000
.short 0x6860, 0x0000, 0x0000
.short 0x6800, 0x6860, 0x0020
.short 0x6820, 0x6860, 0x0020
.short 0x6800, 0x6860, 0x0040
.short 0x6840, 0x0000, 0x0000
.short 0x6800, 0x6840, 0x0020
.short 0x6820, 0x0000, 0x0000
.short 0x6800, 0x0000, 0x0000

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.include "asm/macros.inc"
.include "gxasm.inc"
.include "global.inc"
.text
arm_func_start GX_SendFifo48B
GX_SendFifo48B: ; 0x020D0E2C
ldmia r0!, {r2, r3, ip}
stmia r1, {r2, r3, ip}
ldmia r0!, {r2, r3, ip}
stmia r1, {r2, r3, ip}
ldmia r0!, {r2, r3, ip}
stmia r1, {r2, r3, ip}
ldmia r0!, {r2, r3, ip}
stmia r1, {r2, r3, ip}
bx lr
arm_func_end GX_SendFifo48B
arm_func_start GX_SendFifo64B
GX_SendFifo64B: ; 0x020D0E50
stmdb sp!, {r4, r5, r6, r7, r8}
ldmia r0!, {r2, r3, r4, r5, r6, r7, r8, ip}
stmia r1, {r2, r3, r4, r5, r6, r7, r8, ip}
ldmia r0!, {r2, r3, r4, r5, r6, r7, r8, ip}
stmia r1, {r2, r3, r4, r5, r6, r7, r8, ip}
ldmia sp!, {r4, r5, r6, r7, r8}
bx lr
arm_func_end GX_SendFifo64B

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.include "asm/macros.inc"
.include "gxstate.inc"
.include "global.inc"
.bss
.public gGXState
gGXState:
.space 0x1A
.text
arm_func_start GX_InitGXState
GX_InitGXState: ; 0x020CDAEC
ldr r0, _020CDB44 ; =gGXState
mov r2, #0
strh r2, [r0]
strh r2, [r0, #2]
strh r2, [r0, #4]
strh r2, [r0, #6]
strh r2, [r0, #8]
strh r2, [r0, #0xa]
strh r2, [r0, #0xc]
strh r2, [r0, #0xe]
strh r2, [r0, #0x10]
strh r2, [r0, #0x12]
strh r2, [r0, #0x14]
strh r2, [r0, #0x16]
ldr r1, _020CDB48 ; =0x04000240
strh r2, [r0, #0x18]
str r2, [r1]
strb r2, [r1, #4]
strb r2, [r1, #5]
strb r2, [r1, #6]
strh r2, [r1, #8]
bx lr
.align 2, 0
_020CDB44: .word gGXState
_020CDB48: .word 0x04000240
arm_func_end GX_InitGXState

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#include <nitro/fs/overlay.h>
#pragma once
.public FX_Init
.public FX_Modf

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#include <nitro/fs/overlay.h>
#pragma once
.public FX_Div
.public FX_Atan2Idx

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#include <nitro/fs/overlay.h>
#pragma once
.public FX_Div
.public FX_Inv
.public FX_InvFx64c
.public FX_Sqrt
.public FX_GetDivResultFx64c
.public FX_GetDivResult
.public FX_InvAsync
.public FX_DivAsync
.public FX_DivS32
.public FX_ModS32

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#include <nitro/fs/overlay.h>
#pragma once
.public MTX_Identity22_
.public MTX_Rot22_
.public MTX_ScaleApply22

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#include <nitro/fs/overlay.h>
#pragma once
.public MTX_Identity33_
.public MTX_ScaleApply33
.public MTX_RotX33_
.public MTX_RotY33_
.public MTX_RotZ33_
.public MTX_Inverse33
.public MTX_Concat33
.public MTX_MultVec33
.public FX_GetDivResult
.public FX_InvAsync
.public MI_Copy36B

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#include <nitro/fs/overlay.h>
#pragma once
.public MTX_ScaleApply33
.public MTX_Identity43_
.public MTX_Copy43To44_
.public MTX_TransApply43
.public MTX_Scale43_
.public MTX_ScaleApply43
.public MTX_RotY43_
.public MTX_Inverse43
.public MTX_Concat43
.public MTX_MultVec43
.public MTX_LookAt
.public FX_GetDivResult
.public FX_InvAsync
.public VEC_DotProduct
.public VEC_CrossProduct
.public VEC_Normalize
.public MI_Copy36B
.public MI_Copy48B

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#include <nitro/fs/overlay.h>
#pragma once
.public MTX_Identity44_
.public MTX_Copy44To43_
.public MTX_TransApply44
.public MTX_RotX44_
.public MTX_RotY44_
.public MTX_RotZ44_
.public MTX_Concat44
.public MTX_PerspectiveW
.public MTX_OrthoW
.public FX_Div
.public FX_GetDivResultFx64c
.public FX_GetDivResult
.public FX_InvAsync
.public MI_Copy48B
.public _ll_sdiv

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#include <nitro/fs/overlay.h>
#pragma once

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#include <nitro/fs/overlay.h>
#pragma once
.public FX_SinFx64c
.public FX_CosFx64c

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#include <nitro/fs/overlay.h>
#pragma once
.public VEC_Add
.public VEC_Subtract
.public VEC_Fx16Add
.public VEC_DotProduct
.public VEC_Fx16DotProduct
.public VEC_CrossProduct
.public VEC_Fx16CrossProduct
.public VEC_Mag
.public VEC_Normalize
.public VEC_Fx16Normalize
.public VEC_MultAdd
.public VEC_Distance

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#include <nitro/fs/overlay.h>
#pragma once
.public G2x_SetBGyAffine_
.public G2x_SetBlendAlpha_
.public G2x_SetBlendBrightness_
.public G2x_ChangeBlendBrightness_

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#include <nitro/fs/overlay.h>
#pragma once
.public G3_BeginMakeDL
.public G3_EndMakeDL

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#include <nitro/fs/overlay.h>
#pragma once
.public MTX_LookAt
.public MTX_OrthoW
.public G3_LoadMtx44
.public G3_LoadMtx43
.public G3i_OrthoW_
.public G3i_LookAt_
.public G3_RotX
.public G3_RotY
.public G3_RotZ

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#include <nitro/fs/overlay.h>
#pragma once
.public G3B_PushMtx
.public G3B_PopMtx
.public G3B_LoadMtx44
.public G3B_Color
.public G3B_Normal
.public G3B_Vtx
.public G3B_PolygonAttr
.public G3B_MaterialColorDiffAmb
.public G3B_MaterialColorSpecEmi
.public G3B_LightVector
.public G3B_LightColor
.public G3B_Begin
.public G3B_End
.public MI_Copy64B

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#include <nitro/fs/overlay.h>
#pragma once
.public G3_LoadMtx44
.public G3_LoadMtx43
.public G3_MultMtx43
.public G3_MultMtx33
.public GX_SendFifo48B
.public GX_SendFifo64B
.public MI_Copy36B

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#include <nitro/fs/overlay.h>
#pragma once
.public G3X_Init
.public G3X_Reset
.public G3X_InitMtxStack
.public G3X_SetFog
.public G3X_GetClipMtx
.public G3X_GetVectorMtx
.public G3X_SetEdgeColorTable
.public G3X_SetFogTable
.public G3X_SetClearColor
.public G3X_GetBoxTestResult
.public G3X_SetHOffset
.public MI_DmaFill32
.public MI_DmaFill32Async
.public MIi_CpuCopy16
.public MIi_CpuClear32
.public MI_Copy32B
.public MI_Copy36B
.public MI_Copy64B
.public GXi_DmaId

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#include <nitro/fs/overlay.h>
#pragma once
.public GX_Init
.public GX_HBlankIntr
.public GX_VBlankIntr
.public GX_DispOff
.public GX_DispOn
.public GX_SetGraphicsMode
.public GXS_SetGraphicsMode
.public GXx_SetMasterBrightness_
.public GXx_GetMasterBrightness_
.public GX_InitGXState
.public OS_GetLockID
.public OS_Terminate
.public MI_DmaFill32
.public MIi_CpuClear32
.public sIsDispOn
.public GXi_DmaId
.public GXi_VRamLockId

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#include <nitro/fs/overlay.h>
#pragma once
.public G2_GetBG0ScrPtr
.public G2S_GetBG0ScrPtr
.public G2_GetBG1ScrPtr
.public G2S_GetBG1ScrPtr
.public G2_GetBG2ScrPtr
.public G2S_GetBG2ScrPtr
.public G2_GetBG3ScrPtr
.public G2S_GetBG3ScrPtr
.public G2_GetBG0CharPtr
.public G2S_GetBG0CharPtr
.public G2_GetBG1CharPtr
.public G2S_GetBG1CharPtr
.public G2_GetBG2CharPtr
.public G2S_GetBG2CharPtr
.public G2_GetBG3CharPtr
.public G2S_GetBG3CharPtr

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#include <nitro/fs/overlay.h>
#pragma once
.public GX_SetBankForBGExtPltt
.public GX_SetBankForOBJExtPltt
.public GX_SetBankForSubBGExtPltt
.public GX_SetBankForSubOBJExtPltt
.public GX_ResetBankForBGExtPltt
.public GX_ResetBankForOBJExtPltt
.public GX_ResetBankForSubBGExtPltt
.public GX_ResetBankForSubOBJExtPltt
.public G2_GetBG0ScrPtr
.public G2S_GetBG0ScrPtr
.public G2_GetBG1ScrPtr
.public G2S_GetBG1ScrPtr
.public G2_GetBG2ScrPtr
.public G2S_GetBG2ScrPtr
.public G2_GetBG3ScrPtr
.public G2S_GetBG3ScrPtr
.public G2_GetBG0CharPtr
.public G2S_GetBG0CharPtr
.public G2_GetBG1CharPtr
.public G2S_GetBG1CharPtr
.public G2_GetBG2CharPtr
.public G2S_GetBG2CharPtr
.public G2_GetBG3CharPtr
.public G2S_GetBG3CharPtr
.public GX_LoadBGPltt
.public GXS_LoadBGPltt
.public GX_LoadOBJPltt
.public GXS_LoadOBJPltt
.public GX_LoadOAM
.public GXS_LoadOAM
.public GX_LoadOBJ
.public GXS_LoadOBJ
.public GX_LoadBG0Scr
.public GXS_LoadBG0Scr
.public GX_LoadBG1Scr
.public GXS_LoadBG1Scr
.public GX_LoadBG2Scr
.public GXS_LoadBG2Scr
.public GX_LoadBG3Scr
.public GXS_LoadBG3Scr
.public GX_LoadBG0Char
.public GXS_LoadBG0Char
.public GX_LoadBG1Char
.public GXS_LoadBG1Char
.public GX_LoadBG2Char
.public GXS_LoadBG2Char
.public GX_LoadBG3Char
.public GXS_LoadBG3Char
.public GX_BeginLoadBGExtPltt
.public GX_LoadBGExtPltt
.public GX_EndLoadBGExtPltt
.public GX_BeginLoadOBJExtPltt
.public GX_LoadOBJExtPltt
.public GX_EndLoadOBJExtPltt
.public GXS_BeginLoadBGExtPltt
.public GXS_LoadBGExtPltt
.public GXS_EndLoadBGExtPltt
.public GXS_BeginLoadOBJExtPltt
.public GXS_LoadOBJExtPltt
.public GXS_EndLoadOBJExtPltt
.public MI_DmaCopy32
.public MI_DmaCopy16
.public MI_DmaCopy32Async
.public MI_WaitDma
.public MIi_CpuCopy16
.public MIi_CpuCopy32
.public GXi_DmaId

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#include <nitro/fs/overlay.h>
#pragma once
.public GX_SetBankForTex
.public GX_SetBankForTexPltt
.public GX_SetBankForClearImage
.public GX_ResetBankForTex
.public GX_ResetBankForTexPltt
.public GX_ResetBankForClearImage
.public GX_BeginLoadTex
.public GX_LoadTex
.public GX_EndLoadTex
.public GX_BeginLoadTexPltt
.public GX_LoadTexPltt
.public GX_EndLoadTexPltt
.public GX_BeginLoadClearImage
.public GX_LoadClearImageColor
.public GX_LoadClearImageDepth
.public GX_EndLoadClearImage
.public MI_DmaCopy32
.public MI_DmaCopy32Async
.public MI_WaitDma
.public MIi_CpuCopy32
.public GXi_DmaId

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#include <nitro/fs/overlay.h>
#pragma once
.public GX_SetBankForBG
.public GX_SetBankForOBJ
.public GX_SetBankForBGExtPltt
.public GX_SetBankForOBJExtPltt
.public GX_SetBankForTex
.public GX_SetBankForTexPltt
.public GX_SetBankForClearImage
.public GX_SetBankForARM7
.public GX_SetBankForLCDC
.public GX_SetBankForSubBG
.public GX_SetBankForSubOBJ
.public GX_SetBankForSubBGExtPltt
.public GX_SetBankForSubOBJExtPltt
.public GX_ResetBankForBG
.public GX_ResetBankForOBJ
.public GX_ResetBankForBGExtPltt
.public GX_ResetBankForOBJExtPltt
.public GX_ResetBankForTex
.public GX_ResetBankForTexPltt
.public GX_ResetBankForClearImage
.public GX_ResetBankForSubBG
.public GX_ResetBankForSubOBJ
.public GX_ResetBankForSubBGExtPltt
.public GX_ResetBankForSubOBJExtPltt
.public GX_DisableBankForBG
.public GX_DisableBankForOBJ
.public GX_DisableBankForBGExtPltt
.public GX_DisableBankForOBJExtPltt
.public GX_DisableBankForTex
.public GX_DisableBankForTexPltt
.public GX_DisableBankForClearImage
.public GX_DisableBankForARM7
.public GX_DisableBankForLCDC
.public GX_DisableBankForSubBG
.public GX_DisableBankForSubOBJ
.public GX_DisableBankForSubBGExtPltt
.public GX_DisableBankForSubOBJExtPltt
.public GX_GetBankForOBJ
.public GX_GetBankForOBJExtPltt
.public GX_GetBankForLCDC
.public GX_GetBankForSubOBJ
.public GX_GetBankForSubOBJExtPltt
.public OSi_UnlockVram
.public GXi_VRamLockId
.public gGXState

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#include <nitro/fs/overlay.h>
#pragma once
.public GX_SendFifo48B
.public GX_SendFifo64B

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#include <nitro/fs/overlay.h>
#pragma once
.public GX_InitGXState
.public gGXState

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#include <nitro/fs/overlay.h>
#pragma once
.public _start_AutoloadDoneCallback
.public OS_CreateThread
.public OS_ExitThread
.public OS_SleepThread
.public OS_WakeupThreadDirect
.public OS_SetThreadPriority
.public OS_GetThreadPriority
.public DC_InvalidateRange
.public DC_FlushRange
.public DC_WaitWriteBufferEmpty
.public OS_DisableInterrupts
.public OS_RestoreInterrupts
.public OS_SpinWait
.public OS_GetMacAddress
.public OS_Terminate
.public MI_DmaCopy16
.public MIi_CpuClear16
.public MIi_CpuCopy16
.public MIi_CpuClear32
.public MIi_CpuClearFast
.public MI_CpuFill8
.public MI_CpuCopy8
.public PXI_IsCallbackReady
.public FS_FindArchive
.public FS_InitFile
.public FS_OpenFileDirect
.public FS_OpenFile
.public FS_CloseFile
.public FS_ReadFile
.public FS_SeekFile
.public WM_SetIndCallback
.public WM_SetPortCallback
.public WM_ReadMPData
.public WM_GetAllowedChannel
.public WM_GetNextTgid
.public WM_Initialize
.public WM_Reset
.public WM_End
.public WM_SetParentParameter
.public WMi_StartParentEx
.public WM_StartScan
.public WM_StartConnectEx
.public WM_Disconnect
.public WM_StartMPEx
.public WM_SetMPDataToPortEx
.public WM_SetGameInfo
.public WM_SetBeaconIndication
.public WM_SetLifeTime
.public _s32_div_f
.public _u32_div_f
.public MB_CommSetParentStateCallback
.public MB_CommGetChildUser
.public MB_CommIsBootable
.public MB_CommResponseRequest
.public MB_GetSegmentLength
.public MB_ReadSegment
.public MB_RegisterFile
.public MB_Init
.public MB_SetParentCommParam
.public MB_StartParentFromIdle
.public MB_End
.public MB_DisconnectChild

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#include <nitro/fs/overlay.h>
#pragma once
.public MI_CompressLZImpl

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#include <nitro/fs/overlay.h>
#pragma once
.public OSi_EnterDmaCallback
.public OS_DisableInterrupts
.public OS_RestoreInterrupts
.public OS_Terminate
.public MI_DmaFill32
.public MI_DmaCopy32
.public MI_DmaCopy16
.public MI_DmaFill32Async
.public MI_DmaCopy32Async
.public MI_WaitDma
.public MI_StopDma
.public MIi_CheckAnotherAutoDMA
.public MIi_CheckDma0SourceAddress
.public MIi_DmaSetParams

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#include <nitro/fs/overlay.h>
#pragma once
.public MIi_CheckAnotherAutoDMA
.public MIi_CheckDma0SourceAddress
.public MIi_CardDmaCopy32
.public MIi_DmaSetParams

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#include <nitro/fs/overlay.h>
#pragma once
.public OS_SetIrqFunction
.public OS_GetIrqFunction
.public OSi_EnterDmaCallback
.public OS_EnableIrqMask
.public OS_DisableIrqMask
.public OS_ResetRequestIrqMask
.public OS_DisableInterrupts
.public OS_RestoreInterrupts
.public MI_WaitDma
.public MIi_CheckAnotherAutoDMA
.public MIi_CheckDma0SourceAddress
.public MI_SendGXCommandAsync
.public MI_SendGXCommandAsyncFast
.public MIi_DmaSetParams
.public MI_SendGXCommand

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#include <nitro/fs/overlay.h>
#pragma once
.public MI_WaitDma
.public MIi_CheckAnotherAutoDMA
.public MIi_CheckDma0SourceAddress
.public MI_HBlankDmaCopy32
.public MI_HBlankDmaCopy16
.public MIi_DmaSetParams

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#include <nitro/fs/overlay.h>
#pragma once
.public MI_SetWramBank
.public MI_StopDma

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#include <nitro/fs/overlay.h>
#pragma once
.public MIi_CpuClear16
.public MIi_CpuCopy16
.public MIi_CpuClear32
.public MIi_CpuCopy32
.public MIi_CpuSend32
.public MIi_CpuClearFast
.public MIi_CpuCopyFast
.public MI_Copy32B
.public MI_Copy36B
.public MI_Copy48B
.public MI_Copy64B
.public MI_CpuFill8
.public MI_CpuCopy8
.public MI_Zero36B

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#include <nitro/fs/overlay.h>
#pragma once

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#include <nitro/fs/overlay.h>
#pragma once
.public MI_UncompressLZ8

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#include <nitro/fs/overlay.h>
#pragma once
.public MI_SetWramBank

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#include <nitro/fs/overlay.h>
#pragma once
.public WVR_StartUpAsync
.public WVR_TerminateAsync
.public OS_GetLockID
.public OS_DisableInterrupts
.public OS_RestoreInterrupts
.public OSi_TryLockVram
.public OSi_UnlockVram
.public PXI_Init
.public PXI_SetFifoRecvCallback
.public PXI_IsCallbackReady
.public PXI_SendWordByFifo

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