mirror of
https://github.com/pret/pmd-sky.git
synced 2026-04-26 00:26:19 -05:00
464 lines
9.1 KiB
ArmAsm
464 lines
9.1 KiB
ArmAsm
.include "asm/macros.inc"
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.include "g3x.inc"
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.include "global.inc"
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.public GXi_DmaId
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.text
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arm_func_start G3X_Init
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G3X_Init: ; 0x020CF564
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stmdb sp!, {r3, lr}
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bl G3X_ClearFifo
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ldr r1, _020CF650 ; =0x04000504
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mov r0, #0
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str r0, [r1]
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_020CF578:
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ldr r0, [r1, #0xfc]
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tst r0, #0x8000000
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bne _020CF578
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ldr r0, _020CF654 ; =0x04000060
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mov r2, #0
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strh r2, [r0]
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str r2, [r1, #0xfc]
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str r2, [r0, #-0x50]
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ldrh ip, [r0]
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ldr r2, _020CF658 ; =0xFFFFCFFD
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ldr r3, _020CF65C ; =0x0000CFFB
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orr ip, ip, #0x2000
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strh ip, [r0]
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ldrh ip, [r0]
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orr ip, ip, #0x1000
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strh ip, [r0]
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ldrh ip, [r0]
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and r2, ip, r2
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strh r2, [r0]
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ldrh r2, [r0]
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bic r2, r2, #0x3000
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orr r2, r2, #0x10
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strh r2, [r0]
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ldrh r2, [r0]
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and r2, r2, r3
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strh r2, [r0]
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ldr r0, [r1, #0xfc]
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orr r0, r0, #0x8000
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str r0, [r1, #0xfc]
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ldr r0, [r1, #0xfc]
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bic r0, r0, #0xc0000000
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orr r0, r0, #0x80000000
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str r0, [r1, #0xfc]
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bl G3X_InitMtxStack
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ldr r1, _020CF660 ; =0x04000350
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mov r2, #0
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ldr r0, _020CF664 ; =0x00007FFF
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str r2, [r1]
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strh r0, [r1, #4]
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strh r2, [r1, #6]
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str r2, [r1, #8]
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strh r2, [r1, #0xc]
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sub r1, r1, #0x348
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ldrh r0, [r1]
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bic r0, r0, #3
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strh r0, [r1]
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bl G3X_InitTable
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ldr r2, _020CF668 ; =0x001F0080
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ldr r1, _020CF66C ; =0x040004A4
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mov r0, #0
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str r2, [r1]
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str r0, [r1, #4]
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str r0, [r1, #8]
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ldmia sp!, {r3, pc}
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.align 2, 0
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_020CF650: .word 0x04000504
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_020CF654: .word 0x04000060
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_020CF658: .word 0xFFFFCFFD
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_020CF65C: .word 0x0000CFFB
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_020CF660: .word 0x04000350
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_020CF664: .word 0x00007FFF
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_020CF668: .word 0x001F0080
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_020CF66C: .word 0x040004A4
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arm_func_end G3X_Init
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arm_func_start G3X_Reset
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G3X_Reset: ; 0x020CF670
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stmdb sp!, {r3, lr}
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ldr r2, _020CF6CC ; =0x04000600
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_020CF678:
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ldr r0, [r2]
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tst r0, #0x8000000
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bne _020CF678
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ldr r0, [r2]
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ldr r1, _020CF6D0 ; =0x04000060
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orr r0, r0, #0x8000
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str r0, [r2]
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ldrh r0, [r1]
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orr r0, r0, #0x2000
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strh r0, [r1]
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ldrh r0, [r1]
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orr r0, r0, #0x1000
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strh r0, [r1]
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bl G3X_ResetMtxStack
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ldr r2, _020CF6D4 ; =0x001F0080
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ldr r1, _020CF6D8 ; =0x040004A4
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mov r0, #0
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str r2, [r1]
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str r0, [r1, #4]
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str r0, [r1, #8]
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ldmia sp!, {r3, pc}
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.align 2, 0
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_020CF6CC: .word 0x04000600
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_020CF6D0: .word 0x04000060
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_020CF6D4: .word 0x001F0080
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_020CF6D8: .word 0x040004A4
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arm_func_end G3X_Reset
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arm_func_start G3X_ClearFifo
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G3X_ClearFifo: ; 0x020CF6DC
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stmdb sp!, {r3, lr}
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ldr r0, _020CF6FC ; =0x04000400
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bl GXi_NopClearFifo128_
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ldr r1, _020CF700 ; =0x04000600
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_020CF6EC:
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ldr r0, [r1]
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tst r0, #0x8000000
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bne _020CF6EC
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ldmia sp!, {r3, pc}
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.align 2, 0
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_020CF6FC: .word 0x04000400
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_020CF700: .word 0x04000600
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arm_func_end G3X_ClearFifo
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arm_func_start G3X_InitMtxStack
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G3X_InitMtxStack: ; 0x020CF704
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stmdb sp!, {r4, lr}
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sub sp, sp, #8
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ldr r1, _020CF790 ; =0x04000600
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ldr r0, [r1]
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orr r0, r0, #0x8000
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str r0, [r1]
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add r4, sp, #4
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_020CF720:
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mov r0, r4
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bl G3X_GetMtxStackLevelPV
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cmp r0, #0
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bne _020CF720
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add r4, sp, #0
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_020CF734:
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mov r0, r4
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bl G3X_GetMtxStackLevelPJ
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cmp r0, #0
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bne _020CF734
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ldr r1, _020CF794 ; =0x04000440
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mov r0, #3
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str r0, [r1]
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mov r0, #0
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str r0, [r1, #0x14]
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str r0, [r1]
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ldr r0, [sp]
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mov r2, #0
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cmp r0, #0
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strne r0, [r1, #8]
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ldr r1, _020CF798 ; =0x04000454
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mov r0, #2
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str r2, [r1]
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str r0, [r1, #-0x14]
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ldr r0, [sp, #4]
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str r0, [r1, #-0xc]
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str r2, [r1]
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add sp, sp, #8
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ldmia sp!, {r4, pc}
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.align 2, 0
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_020CF790: .word 0x04000600
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_020CF794: .word 0x04000440
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_020CF798: .word 0x04000454
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arm_func_end G3X_InitMtxStack
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arm_func_start G3X_ResetMtxStack
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G3X_ResetMtxStack: ; 0x020CF79C
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stmdb sp!, {r4, lr}
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sub sp, sp, #8
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ldr r1, _020CF824 ; =0x04000600
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ldr r0, [r1]
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orr r0, r0, #0x8000
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str r0, [r1]
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add r4, sp, #4
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_020CF7B8:
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mov r0, r4
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bl G3X_GetMtxStackLevelPV
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cmp r0, #0
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bne _020CF7B8
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add r4, sp, #0
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_020CF7CC:
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mov r0, r4
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bl G3X_GetMtxStackLevelPJ
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cmp r0, #0
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bne _020CF7CC
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ldr r1, _020CF828 ; =0x04000440
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mov r0, #3
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str r0, [r1]
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mov r0, #0
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str r0, [r1, #0x14]
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str r0, [r1]
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ldr r0, [sp]
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ldr r2, _020CF828 ; =0x04000440
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cmp r0, #0
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strne r0, [r1, #8]
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mov r0, #2
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str r0, [r2]
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ldr r1, [sp, #4]
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mov r0, #0
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str r1, [r2, #8]
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str r0, [r2, #0x14]
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add sp, sp, #8
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ldmia sp!, {r4, pc}
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.align 2, 0
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_020CF824: .word 0x04000600
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_020CF828: .word 0x04000440
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arm_func_end G3X_ResetMtxStack
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arm_func_start G3X_SetFog
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G3X_SetFog: ; 0x020CF82C
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cmp r0, #0
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beq _020CF860
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ldr ip, _020CF878 ; =0x0400035C
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mov r0, r1, lsl #6
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strh r3, [ip]
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sub r3, ip, #0x2fc
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ldrh r1, [r3]
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orr r0, r0, r2, lsl #8
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orr r0, r0, #0x80
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bic r1, r1, #0x3f40
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orr r0, r1, r0
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strh r0, [r3]
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bx lr
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_020CF860:
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ldr r2, _020CF87C ; =0x04000060
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ldr r0, _020CF880 ; =0x0000CF7F
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ldrh r1, [r2]
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and r0, r1, r0
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strh r0, [r2]
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bx lr
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.align 2, 0
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_020CF878: .word 0x0400035C
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_020CF87C: .word 0x04000060
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_020CF880: .word 0x0000CF7F
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arm_func_end G3X_SetFog
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arm_func_start G3X_GetClipMtx
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G3X_GetClipMtx: ; 0x020CF884
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stmdb sp!, {r3, lr}
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ldr r2, _020CF8B0 ; =0x04000600
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mov r1, r0
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ldr r0, [r2]
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tst r0, #0x8000000
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mvnne r0, #0
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ldmneia sp!, {r3, pc}
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add r0, r2, #0x40
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bl MI_Copy64B
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mov r0, #0
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ldmia sp!, {r3, pc}
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.align 2, 0
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_020CF8B0: .word 0x04000600
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arm_func_end G3X_GetClipMtx
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arm_func_start G3X_GetVectorMtx
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G3X_GetVectorMtx: ; 0x020CF8B4
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stmdb sp!, {r3, lr}
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ldr r2, _020CF8E0 ; =0x04000600
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mov r1, r0
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ldr r0, [r2]
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tst r0, #0x8000000
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mvnne r0, #0
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ldmneia sp!, {r3, pc}
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add r0, r2, #0x80
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bl MI_Copy36B
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mov r0, #0
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ldmia sp!, {r3, pc}
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.align 2, 0
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_020CF8E0: .word 0x04000600
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arm_func_end G3X_GetVectorMtx
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arm_func_start G3X_SetEdgeColorTable
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G3X_SetEdgeColorTable: ; 0x020CF8E4
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ldr ip, _020CF8F4 ; =MIi_CpuCopy16
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ldr r1, _020CF8F8 ; =0x04000330
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mov r2, #0x10
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bx ip
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.align 2, 0
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_020CF8F4: .word MIi_CpuCopy16
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_020CF8F8: .word 0x04000330
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arm_func_end G3X_SetEdgeColorTable
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arm_func_start G3X_SetFogTable
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G3X_SetFogTable: ; 0x020CF8FC
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ldr ip, _020CF908 ; =MI_Copy32B
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ldr r1, _020CF90C ; =0x04000360
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bx ip
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.align 2, 0
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_020CF908: .word MI_Copy32B
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_020CF90C: .word 0x04000360
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arm_func_end G3X_SetFogTable
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arm_func_start G3X_SetClearColor
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G3X_SetClearColor: ; 0x020CF910
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ldr ip, [sp]
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orr r0, r0, r1, lsl #16
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orr r1, r0, r3, lsl #24
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cmp ip, #0
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ldr r0, _020CF934 ; =0x04000350
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orrne r1, r1, #0x8000
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str r1, [r0]
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strh r2, [r0, #4]
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bx lr
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.align 2, 0
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_020CF934: .word 0x04000350
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arm_func_end G3X_SetClearColor
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arm_func_start G3X_InitTable
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G3X_InitTable: ; 0x020CF938
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stmdb sp!, {r3, lr}
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sub sp, sp, #8
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ldr r0, _020CF9C8 ; =GXi_DmaId
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mvn r1, #0
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ldr r0, [r0]
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cmp r0, r1
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ldr r1, _020CF9CC ; =0x04000330
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beq _020CF988
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mov r2, #0
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str r2, [sp]
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mov r3, #0x10
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str r2, [sp, #4]
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bl MI_DmaFill32Async
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ldr r0, _020CF9C8 ; =GXi_DmaId
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ldr r1, _020CF9D0 ; =0x04000360
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ldr r0, [r0]
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mov r2, #0
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mov r3, #0x60
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bl MI_DmaFill32
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b _020CF9A4
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_020CF988:
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mov r0, #0
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mov r2, #0x10
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bl MIi_CpuClear32
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ldr r1, _020CF9D0 ; =0x04000360
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mov r0, #0
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mov r2, #0x60
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bl MIi_CpuClear32
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_020CF9A4:
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mov r2, #0
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ldr r0, _020CF9D4 ; =0x040004D0
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mov r1, r2
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_020CF9B0:
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add r2, r2, #1
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str r1, [r0]
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cmp r2, #0x20
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blt _020CF9B0
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add sp, sp, #8
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ldmia sp!, {r3, pc}
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.align 2, 0
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_020CF9C8: .word GXi_DmaId
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_020CF9CC: .word 0x04000330
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_020CF9D0: .word 0x04000360
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_020CF9D4: .word 0x040004D0
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arm_func_end G3X_InitTable
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arm_func_start G3X_GetMtxStackLevelPV
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G3X_GetMtxStackLevelPV: ; 0x020CF9D8
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ldr r2, _020CFA04 ; =0x04000600
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ldr r1, [r2]
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tst r1, #0x4000
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mvnne r0, #0
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bxne lr
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ldr r1, [r2]
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and r1, r1, #0x1f00
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mov r1, r1, lsr #8
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str r1, [r0]
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mov r0, #0
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bx lr
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.align 2, 0
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_020CFA04: .word 0x04000600
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arm_func_end G3X_GetMtxStackLevelPV
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arm_func_start G3X_GetMtxStackLevelPJ
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G3X_GetMtxStackLevelPJ: ; 0x020CFA08
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ldr r2, _020CFA34 ; =0x04000600
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ldr r1, [r2]
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tst r1, #0x4000
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mvnne r0, #0
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bxne lr
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ldr r1, [r2]
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and r1, r1, #0x2000
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mov r1, r1, lsr #0xd
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str r1, [r0]
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mov r0, #0
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bx lr
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.align 2, 0
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_020CFA34: .word 0x04000600
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arm_func_end G3X_GetMtxStackLevelPJ
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arm_func_start G3X_GetBoxTestResult
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G3X_GetBoxTestResult: ; 0x020CFA38
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ldr r2, _020CFA60 ; =0x04000600
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ldr r1, [r2]
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tst r1, #1
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mvnne r0, #0
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bxne lr
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ldr r1, [r2]
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and r1, r1, #2
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str r1, [r0]
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mov r0, #0
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bx lr
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.align 2, 0
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_020CFA60: .word 0x04000600
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arm_func_end G3X_GetBoxTestResult
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arm_func_start G3X_SetHOffset
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G3X_SetHOffset: ; 0x020CFA64
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ldr r1, _020CFA70 ; =0x04000010
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str r0, [r1]
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bx lr
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.align 2, 0
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_020CFA70: .word 0x04000010
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arm_func_end G3X_SetHOffset
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arm_func_start GXi_NopClearFifo128_
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GXi_NopClearFifo128_: ; 0x020CFA74
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mov r1, #0
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mov r2, #0
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mov r3, #0
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mov ip, #0
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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stmia r0, {r1, r2, r3, ip}
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bx lr
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arm_func_end GXi_NopClearFifo128_
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