use latest libctru version

Properly default to UTF-8, expose (f)truncate, remove old malloc lock/unlock stubs

README.TXT

@@ -26,19 +26,26 @@ http://www.multiprecision.org/
 sudo apt-get install libgmp-dev libmpfr-dev libmpc-dev
 
 Some of the tools for devkitARM and devkitPPC also require FreeImage, zlib,
-and libusb. Again these are built as static libraries for ease of packaging
-but you can probably use the versions supplied by your distro.
+expat, and libusb. Again these are built as static libraries for ease of
+packaging but you can probably use the versions supplied by your distro.
 
 http://freeimage.sourceforge.net/
 http://www.zlib.net
 http://www.libusb.org
+http://expat.sourceforge.net/
+
+sudo apt-get install  libfreeimage-dev zlib1g-dev libusb-dev libexpat1-dev
 
-sudo apt-get install  libfreeimage-dev zlib1g-dev libusb-dev
 
 Building gxtexconv for cube/wii needs GL/gl.h which can be obtained with
 
 sudo apt-get install mesa-common-dev
 
+For building the OSX versions we install the Xcode commandline tools and build
+pkg-config from source as well as static versions of the libraries listed above.
+This helps keep the dependencies to a minimum so end users can use the tools
+with only Xcode command line tools to obtain make.
+
 To avoid having to manually answer prompts during the build the script will
 read variables from config.sh if it exists. Copy config.sh.sample to config.sh
 and set the variables as appropriate for your build.
@@ -85,16 +92,6 @@ to use the built in crt0 and linkscript use powerpc-eabi-gcc to link your projec
 using the command line switch -mgcn for a bare bones system, -mogc to use libogc and
 the multi-threaded microkernel for gamecube, -mrvl for wii, -mwup for wii u.
 
-Using devkitPSP
----------------
-
-All you need to do now to use devkitPSP is make sure that your freshly built tools
-are in your PATH, something like this;
-
-export PATH=$PATH:<path to devkitPSP>/bin
-
-(Obviously replace <path to devkitPSP> with the full path to the devkitPSP
-installation directory)
 
 Getting started
 ---------------

build-devkit.sh

@@ -1,8 +1,7 @@
 #!/bin/bash
 #---------------------------------------------------------------------------------
-#	devkitARM release 45
-#	devkitPPC release 28
-#	devkitPSP release 17
+#	devkitARM release 46
+#	devkitPPC release 29-1
 #---------------------------------------------------------------------------------
 
 if [ 0 -eq 1 ] ; then
@@ -23,45 +22,55 @@ echo "Patches and improvements are of course welcome, please send these to the p
 echo "https://sourceforge.net/tracker/?group_id=114505&atid=668553"
 echo
 
-LIBOGC_VER=1.8.15
-LIBGBA_VER=20150106
-LIBNDS_VER=1.5.12
-LIBCTRU_VER=0.6.0
-DEFAULT_ARM7_VER=0.6.0
-DSWIFI_VER=0.3.17
-LIBMIRKO_VER=0.9.7
-MAXMOD_VER=1.0.9
-FILESYSTEM_VER=0.9.12
-LIBFAT_VER=1.0.14
-PSPSDK_VER=20120404
-GBATOOLS_VER=1.0.0
-DSTOOLS_VER=1.0.2
-GP32_TOOLS_VER=1.0.1
-GRIT_VER=0.8.13
-NDSTOOL_VER=1.50.3
+
 GENERAL_TOOLS_VER=1.0.0
+
+LIBGBA_VER=0.5.0
+GBATOOLS_VER=1.0.0
+
+LIBNDS_VER=1.6.2
+DEFAULT_ARM7_VER=0.7.0
+DSWIFI_VER=0.4.0
+MAXMOD_VER=1.0.10
+FILESYSTEM_VER=0.9.13
+LIBFAT_VER=1.1.0
+DSTOOLS_VER=1.1.0
+GRIT_VER=0.8.14
+NDSTOOL_VER=2.0.1
 DLDITOOL_VER=1.24.0
-GAMECUBE_TOOLS_VER=1.0.1
-WIILOAD_VER=0.5.1
 MMUTIL_VER=1.8.6
-DFU_UTIL_VER=0.8.1
-STLINK_VER=0.5.8
-TOOLS3DS_VER=1.1.1
+
+DFU_UTIL_VER=0.9.1
+STLINK_VER=1.2.2
+
+GAMECUBE_TOOLS_VER=1.0.1
+LIBOGC_VER=1.8.16
+WIILOAD_VER=0.5.1
+
+LIBCTRU_VER=1.2.1
+CITRO3D_VER=1.2.0
+TOOLS3DS_VER=1.1.4
 LINK3DS_VER=0.5.1
-PICASSO_VER=2.1.0
+PICASSO_VER=2.5.0
+
+GP32_TOOLS_VER=1.0.2
+LIBMIRKO_VER=0.9.7
+
+OSXMIN=${OSXMIN:-10.5}
+OSXSDKPATH=${OSXSDKPATH:-/Developer/SDKs/MacOSX10.5.sdk}
 
 #---------------------------------------------------------------------------------
 function extract_and_patch {
 #---------------------------------------------------------------------------------
-	if [ ! -f extracted-$1 ]; then
-		echo "extracting $1"
+	if [ ! -f extracted-$1-$2 ]; then
+		echo "extracting $1-$2"
 		tar -xf "$SRCDIR/$1-$2.tar.$3" || { echo "Error extracting "$1; exit 1; }
-		touch extracted-$1
+		touch extracted-$1-$2
 	fi
-	if [[ ! -f patched-$1 && -f $patchdir/$1-$2.patch ]]; then
-		echo "patching $1"
+	if [[ ! -f patched-$1-$2 && -f $patchdir/$1-$2.patch ]]; then
+		echo "patching $1-$2"
 		patch -p1 -d $1-$2 -i $patchdir/$1-$2.patch || { echo "Error patching $1"; exit 1; }
-		touch patched-$1
+		touch patched-$1-$2
 	fi
 }
 
@@ -159,8 +168,12 @@ PLATFORM=`uname -s`
 
 case $PLATFORM in
 	Darwin )
-                cflags="-mmacosx-version-min=10.5 -isysroot /Developer/SDKs/MacOSX10.5.sdk -I/usr/local/include"
-                ldflags="-mmacosx-version-min=10.5 -Wl,-syslibroot,/Developer/SDKs/MacOSX10.5.sdk -L/usr/local/lib"
+		cflags="-mmacosx-version-min=${OSXMIN} -isysroot ${OSXSDKPATH} -I/usr/local/include"
+		ldflags="-mmacosx-version-min=${OSXMIN} -Wl,-syslibroot,${OSXSDKPATH} -L/usr/local/lib"
+		TESTCC=`cc -v 2>&1 | grep clang`
+		if [ "x${TESTCC}x" != "xx" ]; then
+			cflags="$cflags -fbracket-depth=512"
+		fi
     ;;
 	MINGW32* )
 		cflags="-D__USE_MINGW_ACCESS"
@@ -174,7 +187,6 @@ BUILDDIR=$(pwd)/.$package
 if [ ! -z $CROSSBUILD ]; then
 	BUILDDIR=$BUILDDIR-$CROSSBUILD
 fi
-DEVKITPRO_URL="http://downloads.sourceforge.net/devkitpro"
 
 patchdir=$(pwd)/$basedir/patches
 scriptdir=$(pwd)/$basedir/scripts
@@ -186,7 +198,7 @@ if [ $VERSION -eq 1 ]; then
 	targetarchives="libnds-src-${LIBNDS_VER}.tar.bz2 libgba-src-${LIBGBA_VER}.tar.bz2
 		libmirko-src-${LIBMIRKO_VER}.tar.bz2 dswifi-src-${DSWIFI_VER}.tar.bz2 maxmod-src-${MAXMOD_VER}.tar.bz2
 		default_arm7-src-${DEFAULT_ARM7_VER}.tar.bz2 libfilesystem-src-${FILESYSTEM_VER}.tar.bz2
-		libfat-src-${LIBFAT_VER}.tar.bz2 libctru-src-${LIBCTRU_VER}.tar.bz2"
+		libfat-src-${LIBFAT_VER}.tar.bz2 libctru-src-${LIBCTRU_VER}.tar.bz2  citro3d-src-${CITRO3D_VER}.tar.bz2"
 
 	hostarchives="gbatools-$GBATOOLS_VER.tar.bz2 gp32tools-$GP32_TOOLS_VER.tar.bz2
 		dstools-$DSTOOLS_VER.tar.bz2 grit-$GRIT_VER.tar.bz2 ndstool-$NDSTOOL_VER.tar.bz2
@@ -200,13 +212,10 @@ if [ $VERSION -eq 2 ]; then
 	targetarchives="libogc-src-${LIBOGC_VER}.tar.bz2 libfat-src-${LIBFAT_VER}.tar.bz2"
 
 	hostarchives="gamecube-tools-$GAMECUBE_TOOLS_VER.tar.bz2 wiiload-$WIILOAD_VER.tar.bz2 general-tools-$GENERAL_TOOLS_VER.tar.bz2"
+
+	archives="binutils-${MN_BINUTILS_VER}.tar.bz2 $archives"
 fi
 
-if [ $VERSION -eq 3 ]; then
-
-	targetarchives="pspsdk-src-${PSPSDK_VER}.tar.bz2"
-
-fi
 
 if [ ! -z "$BUILD_DKPRO_SRCDIR" ] ; then
 	SRCDIR="$BUILD_DKPRO_SRCDIR"
@@ -219,7 +228,7 @@ for archive in $archives $targetarchives $hostarchives
 do
 	echo $archive
 	if [ ! -f $archive ]; then
-		$FETCH http://downloads.sf.net/devkitpro/$archive || { echo "Error: Failed to download $archive"; exit 1; }
+		$FETCH https://github.com/devkitPro/buildscripts/releases/download/sources/$archive || { echo "Error: Failed to download $archive"; exit 1; }
 	fi
 done
 
@@ -229,10 +238,13 @@ cd $BUILDDIR
 
 extract_and_patch binutils $BINUTILS_VER bz2
 extract_and_patch gcc $GCC_VER bz2
-rm -fr gcc-$GCC_VER/zlib
 extract_and_patch newlib $NEWLIB_VER gz
 extract_and_patch gdb $GDB_VER bz2
 
+if [ $VERSION -eq 2 ]; then
+	extract_and_patch binutils $MN_BINUTILS_VER bz2
+fi
+
 for archive in $targetarchives
 do
 	destdir=$(echo $archive | sed -e 's/\(.*\)-src-\(.*\)\.tar\.bz2/\1-\2/' )

config.sh.sample

@@ -24,6 +24,12 @@ BUILD_DKPRO_PACKAGE=0
 #---------------------------------------------------------------------------------
 #BUILD_DKPRO_SRCDIR=/d/projects/archives
 
+#---------------------------------------------------------------------------------
+# MAKEFLAGS for building - use number of processors for jobs
+#---------------------------------------------------------------------------------
+#numcores=`getconf _NPROCESSORS_ONLN`
+#export MAKEFLAGS="$MAKEFLAGS -j${numcores}"
+
 #---------------------------------------------------------------------------------
 # Automated script execution
 #---------------------------------------------------------------------------------
@@ -31,3 +37,4 @@ BUILD_DKPRO_PACKAGE=0
 #  1: Use defaults, don't pause for answers
 #---------------------------------------------------------------------------------
 BUILD_DKPRO_AUTOMATED=0
+

cross-build-i686-w64-mingw32.sh

@@ -3,4 +3,5 @@ export CROSSBUILD=i686-w64-mingw32
 export CROSSLIBPATH=/opt/mingw32/mingw/lib
 export CROSSBINPATH=/opt/mingw32/mingw/bin
 export PATH=/opt/mingw32/bin:$PATH
-export PKG_CONFIG_PATH=$CROSSLIBPATH/pkgconfig
+export PKG_CONFIG_PATH=
+export PKG_CONFIG_LIBDIR=$CROSSLIBPATH/pkgconfig

dkarm-eabi/crtls/3dsx_crt0.s

@@ -5,7 +5,7 @@
 @---------------------------------------------------------------------------------
 
 @---------------------------------------------------------------------------------
-	.section ".crt0"
+	.section ".crt0","ax"
 	.global _start, __service_ptr, __apt_appid, __heap_size, __linear_heap_size, __system_arglist, __system_runflags
 @---------------------------------------------------------------------------------
 	.align 2

dkarm-eabi/crtls/Makefile

@@ -3,3 +3,11 @@ include $(DEVKITARM)/base_rules
 all:
 	$(CC)  -x assembler-with-cpp -marm -c $(CRT)_crt0.s -o$(CRT)_crt0.o
 	$(CC)  -x assembler-with-cpp -mthumb -c $(CRT)_crt0.s -o thumb/$(CRT)_crt0.o
+
+ds_arm7_vram_crt0:
+	$(CC)  -x assembler-with-cpp -marm -c -DVRAM ds_arm7_crt0.s -ods_arm7_vram_crt0.o
+	$(CC)  -x assembler-with-cpp -mthumb -c -DVRAM ds_arm7_crt0.s -othumb/ds_arm7_vram_crt0.o
+
+3dsx_crt0:
+	$(CC) -march=armv6k -mfloat-abi=hard -c 3dsx_crt0.s -o armv6k/fpu/3dsx_crt0.o
+

dkarm-eabi/crtls/dldi.ld

@@ -8,16 +8,16 @@ MEMORY {
 		the patcher / linker to find all shifted addresses within each section.
 		Changed sections are: glue_7, got
 	*/
-	ddmem	: ORIGIN = 0xBF800000, LENGTH = 32K		
+	ddmem	: ORIGIN = 0xBF800000, LENGTH = 16K		
 }
 
 
 SECTIONS
 {
-	.init	:
+	.crt0	:
 	{
 		__text_start = . ;
-		KEEP (*(.init))
+		KEEP (*(.crt0))
 		. = ALIGN(4);  /* REQUIRED. LD is flaky without it. */
 	} >ddmem = 0xff
 

dkarm-eabi/crtls/ds_arm7.ld

@@ -2,10 +2,21 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
 OUTPUT_ARCH(arm)
 ENTRY(_start)
 
-MEMORY {
 
-	rom	: ORIGIN = 0x08000000, LENGTH = 32M
-	iwram	: ORIGIN = 0x037f8000, LENGTH = 96K	
+PHDRS {
+	crt0  PT_LOAD FLAGS(7);
+	arm7  PT_LOAD FLAGS(7);
+	arm7i PT_LOAD FLAGS(0x100007);
+}
+
+
+MEMORY {
+	ewram  : ORIGIN = 0x02380000, LENGTH = 12M - 512K
+	rom    : ORIGIN = 0x08000000, LENGTH = 32M
+	iwram  : ORIGIN = 0x037f8000, LENGTH = 96K
+
+	twl_ewram : ORIGIN = 0x02e80000, LENGTH = 512K - 64K
+	twl_iwram : ORIGIN = 0x03000000, LENGTH = 256K
 }
 
 __iwram_start	=	ORIGIN(iwram);
@@ -21,30 +32,57 @@ __irq_vector	=	0x04000000 - 4;
 
 SECTIONS
 {
-	.init	:
-	{
-		__text_start = . ;
-		KEEP (*(.init))
-		. = ALIGN(4);  /* REQUIRED. LD is flaky without it. */
-		} >iwram = 0xff
-	.plt : { *(.plt) } >iwram = 0xff
 
-	.text :   /* ALIGN (4): */
+	.twl :
 	{
+		__arm7i_lma__ = LOADADDR(.twl);
+		__arm7i_start__ = .;
+		*(.twl)
+		*.twl*(.text .stub .text.* .gnu.linkonce.t.*)
+		*.twl*(.rodata)
+		*.twl*(.roda)
+		*.twl*(.rodata.*)
+		*.twl*(.data)
+		*.twl*(.data.*)
+		*.twl*(.gnu.linkonce.d*)
+		__arm7i_end__ = .;
+	} >twl_iwram AT>twl_ewram :arm7i
+
+	.twl_bss ALIGN(4) (NOLOAD) :
+	{
+		__twl_bss_start__ = .;
+		*(.twl_bss)
+		*.twl.*(.dynbss)
+		*.twl.*(.gnu.linkonce.b*)
+		*.twl.*(.bss*)
+		*.twl.*(COMMON)
+		__twl_bss_end__ = .;
+	} >twl_iwram :NONE
+
+	.crt0	:
+	{
+		KEEP (*(.crt0))
+		. = ALIGN(4);  /* REQUIRED. LD is flaky without it. */
+	} >ewram :crt0
+
+	.text :
+	{
+		__arm7_lma__ = LOADADDR(.text);
+		__arm7_start__ = .;
+		KEEP (*(SORT_NONE(.init)))
+		*(.plt)
 		*(.text .stub .text.* .gnu.linkonce.t.*)
 		KEEP (*(.text.*personality*))
 		/* .gnu.warning sections are handled specially by elf32.em.  */
 		*(.gnu.warning)
 		*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
 		. = ALIGN(4);  /* REQUIRED. LD is flaky without it. */
-	} >iwram = 0xff
+	} >iwram AT>ewram :arm7
 
 	.fini           :
 	{
 		KEEP (*(.fini))
-	} >iwram =0xff
-
-	__text_end = . ;
+	} >iwram AT>ewram
 
 	.rodata :
 	{
@@ -55,27 +93,38 @@ SECTIONS
 		*(.gnu.linkonce.r*)
 		SORT(CONSTRUCTORS)
 		. = ALIGN(4);   /* REQUIRED. LD is flaky without it. */
-	} >iwram = 0xff
+	} >iwram AT>ewram
 
-	.ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >iwram
-	__exidx_start = .;
-	.ARM.exidx   : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } >iwram
-	__exidx_end = .;
+	.ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >iwram AT>ewram
+
+	.ARM.exidx   : {
+		__exidx_start = .;
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+		__exidx_end = .;
+	 } >iwram AT>ewram
 
 /* Ensure the __preinit_array_start label is properly aligned.  We
    could instead move the label definition inside the section, but
    the linker would then create the section even if it turns out to
    be empty, which isn't pretty.  */
-	. = ALIGN(32 / 8);
-	PROVIDE (__preinit_array_start = .);
-	.preinit_array     : { KEEP (*(.preinit_array)) } >iwram = 0xff
-	PROVIDE (__preinit_array_end = .);
-	PROVIDE (__init_array_start = .);
-	.init_array     : { KEEP (*(.init_array)) } >iwram = 0xff
-	PROVIDE (__init_array_end = .);
-	PROVIDE (__fini_array_start = .);
-	.fini_array     : { KEEP (*(.fini_array)) } >iwram = 0xff
-	PROVIDE (__fini_array_end = .);
+	.preinit_array     : {
+		. = ALIGN(32 / 8);
+		PROVIDE (__preinit_array_start = .);
+		KEEP (*(.preinit_array))
+		PROVIDE (__preinit_array_end = .);
+	} >iwram AT>ewram
+
+	.init_array     : {
+		PROVIDE (__init_array_start = .);
+		KEEP (*(.init_array))
+		PROVIDE (__init_array_end = .);
+	} >iwram AT>ewram
+
+	.fini_array     : {
+		PROVIDE (__fini_array_start = .);
+		KEEP (*(.fini_array))
+		PROVIDE (__fini_array_end = .);
+	} >iwram AT>ewram
 
 	.ctors :
 	{
@@ -90,7 +139,7 @@ SECTIONS
 		KEEP (*(SORT(.ctors.*)))
 		KEEP (*(.ctors))
 		. = ALIGN(4);   /* REQUIRED. LD is flaky without it. */
-	} >iwram = 0xff
+	} >iwram AT>ewram
 
 	.dtors :
 	{
@@ -99,21 +148,21 @@ SECTIONS
 		KEEP (*(SORT(.dtors.*)))
 		KEEP (*(.dtors))
 		. = ALIGN(4);   /* REQUIRED. LD is flaky without it. */
-	} >iwram = 0xff
+	} >iwram AT>ewram
 
 	.eh_frame :
 	{
 		KEEP (*(.eh_frame))
 		. = ALIGN(4);   /* REQUIRED. LD is flaky without it. */
-	} >iwram = 0xff
+	} >iwram AT>ewram
 
 	.gcc_except_table :
 	{
 		*(.gcc_except_table)
 		. = ALIGN(4);   /* REQUIRED. LD is flaky without it. */
-	} >iwram = 0xff
-	.jcr            : { KEEP (*(.jcr)) } >iwram = 0
-	.got            : { *(.got.plt) *(.got) } >iwram = 0
+	} >iwram AT>ewram
+	.jcr            : { KEEP (*(.jcr)) } >iwram AT>ewram
+	.got            : { *(.got.plt) *(.got) } >iwram AT>ewram
 
 	.data ALIGN(4) : 	{
 		__data_start = ABSOLUTE(.);
@@ -123,10 +172,11 @@ SECTIONS
 		CONSTRUCTORS
 		. = ALIGN(4);
 		__data_end = ABSOLUTE(.) ;
-	} >iwram = 0xff
+	} >iwram AT>ewram
 
-	.bss ALIGN(4) :
+	.bss ALIGN(4) (NOLOAD) :
 	{
+		__arm7_end__ = .;
 		__bss_start = ABSOLUTE(.);
 		__bss_start__ = ABSOLUTE(.);
 		*(.dynbss)
@@ -171,6 +221,5 @@ SECTIONS
 	.debug_funcnames 0 : { *(.debug_funcnames) }
 	.debug_typenames 0 : { *(.debug_typenames) }
 	.debug_varnames  0 : { *(.debug_varnames) }
-	.stack 0x80000 : { _stack = .; *(.stack) }
 	/* These must appear regardless of  .  */
-}
+}

dkarm-eabi/crtls/ds_arm7_crt0.s

@@ -1,5 +1,5 @@
 @---------------------------------------------------------------------------------
-	.section ".init"
+	.section ".crt0","ax"
 	.global _start
 @---------------------------------------------------------------------------------
 	.align	4
@@ -23,11 +23,53 @@ _start:
 	msr	cpsr, r0
 	ldr	sp, =__sp_usr		@ Set user stack
 
+#ifndef VRAM
+	adr	r1, __sync_start	@ Perform ARM7<->ARM9 sync code
+	ldr	r2, =__arm7_start__
+	mov	r3, #(__sync_end-__sync_start)
+	mov	r8, r2
+	bl	CopyMem
+	mov	r3, r8
+	bl	_blx_r3_stub
+
+@---------------------------------------------------------------------------------
+@ Copy arm7 binary from LMA to VMA (EWRAM to IWRAM)
+@---------------------------------------------------------------------------------
+	adr	r0, arm7lma		@ Calculate ARM7 LMA
+	ldr	r1, [r0]
+	add	r1, r1, r0
+	ldr	r2, =__arm7_start__
+	ldr	r4, =__arm7_end__
+	bl	CopyMemCheck
+
+#else
+	bl	__sync_start
+#endif
+
 	ldr	r0, =__bss_start__	@ Clear BSS section to 0x00
 	ldr	r1, =__bss_end__
 	sub	r1, r1, r0
 	bl	ClearMem
 
+#ifndef VRAM
+	cmp	r10, #1
+	bne	NotTWL
+	ldr	r1, =__dsimode		@ set DSi mode flag
+	strb	r10, [r1]
+
+	ldr	r1, =0x02ffe1d8		@ Get ARM7i LMA from header
+	ldr	r1, [r1]
+	ldr	r2, =__arm7i_start__
+	ldr	r4, =__arm7i_end__
+	bl	CopyMemCheck
+
+	ldr	r0, =__twl_bss_start__	@ Clear TWL BSS section to 0x00
+	ldr	r1, =__twl_bss_end__
+	sub	r1, r1, r0
+	bl	ClearMem
+#endif
+
+NotTWL:
 	ldr	r3, =__libc_init_array	@ global constructors
 	bl	_blx_r3_stub
 
@@ -35,14 +77,51 @@ _start:
 	mov	r1, #0			@ char *argv[]
 	ldr	r3, =main
 	ldr	lr,=__libnds_exit
-	bx	r3
-
-
-@---------------------------------------------------------------------------------
+	mov	r12, #0x4000000		@ tell arm9 we are ready
+	mov	r9, #0
+	str	r9, [r12, #0x180]
 _blx_r3_stub:
-@---------------------------------------------------------------------------------
 	bx	r3
 
+#ifndef VRAM
+arm7lma:
+	.word	__arm7_lma__ - .
+#endif
+	.pool
+
+@---------------------------------------------------------------------------------
+@ ARM7<->ARM9 synchronization code
+@---------------------------------------------------------------------------------
+
+__sync_start:
+	push	{lr}
+	mov	r12, #0x4000000
+	mov	r9, #0x0
+	bl	IPCSync
+	mov	r9, #(0x9<<8)
+	str	r9, [r12, #0x180]
+	mov	r9, #0xA
+	bl	IPCSync
+	mov	r9, #(0xB<<8)
+	str	r9, [r12, #0x180]
+	mov	r9, #0xC
+	bl	IPCSync
+	mov	r9, #(0xD<<8)
+	str	r9, [r12, #0x180]
+IPCRecvFlag:
+	ldr	r10, [r12, #0x180]
+	and	r10, r10, #0xF
+	cmp	r10, #0xC
+	beq	IPCRecvFlag
+	pop	{pc}
+IPCSync:
+	ldr	r10, [r12, #0x180]
+	and	r10, r10, #0xF
+	cmp	r10, r9
+	bne	IPCSync
+	bx	lr
+__sync_end:
+
 @---------------------------------------------------------------------------------
 @ Clear memory to 0x00 if length != 0
 @  r0 = Start Address
@@ -70,6 +149,9 @@ ClrLoop:
 @---------------------------------------------------------------------------------
 CopyMemCheck:
 @---------------------------------------------------------------------------------
+	cmp	r1, r2
+	bxeq	lr
+
 	sub	r3, r4, r2		@ Is there any data to copy?
 @---------------------------------------------------------------------------------
 @ Copy memory

dkarm-eabi/crtls/ds_arm7_iwram.ld

@@ -0,0 +1,187 @@
+OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+
+MEMORY {
+
+	rom	: ORIGIN = 0x08000000, LENGTH = 32M
+	iwram	: ORIGIN = 0x037f8000, LENGTH = 96K	
+}
+
+__iwram_start	=	ORIGIN(iwram);
+__iwram_top	=	ORIGIN(iwram)+ LENGTH(iwram);
+
+__sp_irq	=	__iwram_top - 0x100;
+__sp_svc	=	__sp_irq - 0x100;
+__sp_usr	=	__sp_svc - 0x100;
+
+__irq_flags	=	0x04000000 - 8;
+__irq_flagsaux	=	0x04000000 - 0x40;
+__irq_vector	=	0x04000000 - 4;
+
+SECTIONS
+{
+	.crt0	:
+	{
+		__text_start = . ;
+		KEEP (*(.crt0))
+		. = ALIGN(4);  /* REQUIRED. LD is flaky without it. */
+	} >iwram = 0xff
+
+	.init           :
+	{
+		KEEP (*(SORT_NONE(.init)))
+	} >iwram = 0xff
+
+	.plt : { *(.plt) } >iwram = 0xff
+
+	.text :   /* ALIGN (4): */
+	{
+		*(.text .stub .text.* .gnu.linkonce.t.*)
+		KEEP (*(.text.*personality*))
+		/* .gnu.warning sections are handled specially by elf32.em.  */
+		*(.gnu.warning)
+		*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
+		. = ALIGN(4);  /* REQUIRED. LD is flaky without it. */
+	} >iwram = 0xff
+
+	.fini           :
+	{
+		KEEP (*(.fini))
+	} >iwram =0xff
+
+	__text_end = . ;
+
+	.rodata :
+	{
+		*(.rodata)
+		*all.rodata*(*)
+		*(.roda)
+		*(.rodata.*)
+		*(.gnu.linkonce.r*)
+		SORT(CONSTRUCTORS)
+		. = ALIGN(4);   /* REQUIRED. LD is flaky without it. */
+	} >iwram = 0xff
+
+	.ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >iwram
+	__exidx_start = .;
+	.ARM.exidx   : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } >iwram
+	__exidx_end = .;
+
+/* Ensure the __preinit_array_start label is properly aligned.  We
+   could instead move the label definition inside the section, but
+   the linker would then create the section even if it turns out to
+   be empty, which isn't pretty.  */
+	. = ALIGN(32 / 8);
+	PROVIDE (__preinit_array_start = .);
+	.preinit_array     : { KEEP (*(.preinit_array)) } >iwram = 0xff
+	PROVIDE (__preinit_array_end = .);
+	PROVIDE (__init_array_start = .);
+	.init_array     : { KEEP (*(.init_array)) } >iwram = 0xff
+	PROVIDE (__init_array_end = .);
+	PROVIDE (__fini_array_start = .);
+	.fini_array     : { KEEP (*(.fini_array)) } >iwram = 0xff
+	PROVIDE (__fini_array_end = .);
+
+	.ctors :
+	{
+	/* gcc uses crtbegin.o to find the start of the constructors, so
+		we make sure it is first.  Because this is a wildcard, it
+		doesn't matter if the user does not actually link against
+		crtbegin.o; the linker won't look for a file to match a
+		wildcard.  The wildcard also means that it doesn't matter which
+		directory crtbegin.o is in.  */
+		KEEP (*crtbegin.o(.ctors))
+		KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+		KEEP (*(SORT(.ctors.*)))
+		KEEP (*(.ctors))
+		. = ALIGN(4);   /* REQUIRED. LD is flaky without it. */
+	} >iwram = 0xff
+
+	.dtors :
+	{
+		KEEP (*crtbegin.o(.dtors))
+		KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+		KEEP (*(SORT(.dtors.*)))
+		KEEP (*(.dtors))
+		. = ALIGN(4);   /* REQUIRED. LD is flaky without it. */
+	} >iwram = 0xff
+
+	.eh_frame :
+	{
+		KEEP (*(.eh_frame))
+		. = ALIGN(4);   /* REQUIRED. LD is flaky without it. */
+	} >iwram = 0xff
+
+	.gcc_except_table :
+	{
+		*(.gcc_except_table)
+		. = ALIGN(4);   /* REQUIRED. LD is flaky without it. */
+	} >iwram = 0xff
+	.jcr            : { KEEP (*(.jcr)) } >iwram = 0
+	.got            : { *(.got.plt) *(.got) } >iwram = 0
+
+
+	.data ALIGN(4) : 	{
+		__data_start = ABSOLUTE(.);
+		*(.data)
+		*(.data.*)
+		*(.gnu.linkonce.d*)
+		CONSTRUCTORS
+		. = ALIGN(4);
+		__data_end = ABSOLUTE(.) ;
+	} >iwram = 0xff
+
+
+	__arm7_end__ = .;
+
+
+	.bss ALIGN(4) :
+	{
+		__bss_start = ABSOLUTE(.);
+		__bss_start__ = ABSOLUTE(.);
+		*(.dynbss)
+		*(.gnu.linkonce.b*)
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);    /* REQUIRED. LD is flaky without it. */
+		__bss_end__ = ABSOLUTE(.);
+		__end__ = ABSOLUTE(.);
+	} >iwram
+
+	/* Stabs debugging sections.  */
+	.stab 0 : { *(.stab) }
+	.stabstr 0 : { *(.stabstr) }
+	.stab.excl 0 : { *(.stab.excl) }
+	.stab.exclstr 0 : { *(.stab.exclstr) }
+	.stab.index 0 : { *(.stab.index) }
+	.stab.indexstr 0 : { *(.stab.indexstr) }
+	.comment 0 : { *(.comment) }
+	/*	DWARF debug sections.
+		Symbols in the DWARF debugging sections are relative to the beginning
+		of the section so we begin them at 0.  */
+	/* DWARF 1 */
+	.debug          0 : { *(.debug) }
+	.line           0 : { *(.line) }
+	/* GNU DWARF 1 extensions */
+	.debug_srcinfo  0 : { *(.debug_srcinfo) }
+	.debug_sfnames  0 : { *(.debug_sfnames) }
+	/* DWARF 1.1 and DWARF 2 */
+	.debug_aranges  0 : { *(.debug_aranges) }
+	.debug_pubnames 0 : { *(.debug_pubnames) }
+	/* DWARF 2 */
+	.debug_info     0 : { *(.debug_info) }
+	.debug_abbrev   0 : { *(.debug_abbrev) }
+	.debug_line     0 : { *(.debug_line) }
+	.debug_frame    0 : { *(.debug_frame) }
+	.debug_str      0 : { *(.debug_str) }
+	.debug_loc      0 : { *(.debug_loc) }
+	.debug_macinfo  0 : { *(.debug_macinfo) }
+	/* SGI/MIPS DWARF 2 extensions */
+	.debug_weaknames 0 : { *(.debug_weaknames) }
+	.debug_funcnames 0 : { *(.debug_funcnames) }
+	.debug_typenames 0 : { *(.debug_typenames) }
+	.debug_varnames  0 : { *(.debug_varnames) }
+	.stack 0x80000 : { _stack = .; *(.stack) }
+	/* These must appear regardless of  .  */
+}

dkarm-eabi/crtls/ds_arm7_iwram.specs

@@ -0,0 +1,8 @@
+%rename link                old_link
+
+*link:
+%(old_link) -T ds_arm7_iwram.ld%s
+
+*startfile:
+ds_arm7_vram_crt0%O%s crti%O%s crtbegin%O%s
+

dkarm-eabi/crtls/ds_arm7_vram.ld

@@ -6,7 +6,7 @@ MEMORY {
 
 	rom	: ORIGIN = 0x08000000, LENGTH = 32M
 	iwram	: ORIGIN = 0x037f8000, LENGTH = 96K	
-	vram	: ORIGIN = 0x06000000, LENGTH = 128K
+	vram	: ORIGIN = 0x06000000, LENGTH = 256K
 }
 
 __iwram_start	=	ORIGIN(iwram);
@@ -22,12 +22,20 @@ __irq_vector	=	0x04000000 - 4;
 
 SECTIONS
 {
-	.init	:
+	.crt0	:
 	{
 		__text_start = . ;
-		KEEP (*(.init))
+		KEEP (*(.crt0))
 		. = ALIGN(4);  /* REQUIRED. LD is flaky without it. */
-		} >vram = 0xff
+	} >vram = 0xff
+
+	__arm7_lma__ = .;
+	__arm7_start__ = .;
+	.init           :
+	{
+		KEEP (*(SORT_NONE(.init)))
+	} >vram = 0xff
+
 	.plt : { *(.plt) } >vram = 0xff
 
 	.text :   /* ALIGN (4): */
@@ -128,6 +136,8 @@ SECTIONS
 	} >vram = 0xff
 
 
+	__arm7_end__ = .;
+
 
 	.bss ALIGN(4) :
 	{

dkarm-eabi/crtls/ds_arm7_vram.specs

@@ -4,5 +4,5 @@
 %(old_link) -T ds_arm7_vram.ld%s
 
 *startfile:
-ds_arm7_crt0%O%s crti%O%s crtbegin%O%s
+ds_arm7_vram_crt0%O%s crti%O%s crtbegin%O%s
 

dkarm-eabi/crtls/ds_arm9.ld

@@ -2,11 +2,9 @@ OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
 OUTPUT_ARCH(arm)
 ENTRY(_start)
 
-__vectors_start	=	ORIGIN(vectors);
-__itcm_start	=	ORIGIN(itcm);
 __ewram_end	=	ORIGIN(ewram) + LENGTH(ewram);
 __eheap_end	=	ORIGIN(ewram) + LENGTH(ewram);
-__dtcm_start	=	ORIGIN(dtcm);
+
 __dtcm_top	=	ORIGIN(dtcm) + LENGTH(dtcm);
 __irq_flags	=	__dtcm_top - 0x08;
 __irq_vector	=	__dtcm_top - 0x04;
@@ -15,52 +13,67 @@ __sp_svc	=	__dtcm_top - 0x100;
 __sp_irq	=	__sp_svc - 0x100;
 __sp_usr	=	__sp_irq - 0x100;
 
+PHDRS {
+	main    PT_LOAD FLAGS(7);
+	dtcm    PT_LOAD FLAGS(7);
+	itcm    PT_LOAD FLAGS(7);
+	vectors PT_LOAD FLAGS(7);
+	twl     PT_LOAD FLAGS(0x100007);
+}
+
 SECTIONS
 {
-	.init	:
+	/* Secure area crap */
+	.secure : { *(.secure) } >ewram :main = 0
+
+	.crt0	:
 	{
 		__text_start = . ;
-		KEEP (*(.init))
+		KEEP (*(.crt0))
 		. = ALIGN(4);  /* REQUIRED. LD is flaky without it. */
-	} >ewram = 0xff
+	} >ewram :main = 0x00
 
-	.plt : { *(.plt) } >ewram = 0xff
+	.plt : { *(.plt) } >ewram :main = 0xff
+
+	.init :
+	{
+		KEEP (*(SORT_NONE(.init)))
+	} >ewram :main
 
 	.text :   /* ALIGN (4): */
 	{
-		*(EXCLUDE_FILE (*.itcm*) .text)
-
-		*(.text.*)
-		*(.stub)
+		*(EXCLUDE_FILE(*.itcm* *.vectors* *.twl*) .text)
+		*(EXCLUDE_FILE(*.itcm* *.vectors* *.twl*) .stub)
+		*(EXCLUDE_FILE(*.itcm* *.vectors* *.twl*) .text.*)
 		/* .gnu.warning sections are handled specially by elf32.em.  */
-		*(.gnu.warning)
-		*(.gnu.linkonce.t*)
+		*(EXCLUDE_FILE(*.twl*) .gnu.warning)
+		*(EXCLUDE_FILE(*.twl*) .gnu.linkonce.t*)
 		*(.glue_7)
 		*(.glue_7t)
 		. = ALIGN(4);  /* REQUIRED. LD is flaky without it. */
-	} >ewram = 0xff
+	} >ewram :main = 0xff
 
 	.fini           :
 	{
 		KEEP (*(.fini))
-	} >ewram =0xff
+	} >ewram :main =0xff
 
 	__text_end = . ;
 
 	.rodata :
 	{
-		*(.rodata)
+		*(EXCLUDE_FILE(*.twl*) .rodata)
 		*all.rodata*(*)
-		*(.roda)
-		*(.rodata.*)
-		*(.gnu.linkonce.r*)
+		*(EXCLUDE_FILE(*.twl*) .roda)
+		*(EXCLUDE_FILE(*.twl*) .rodata.*)
+		*(EXCLUDE_FILE(*.twl*) .gnu.linkonce.r*)
 		SORT(CONSTRUCTORS)
 		. = ALIGN(4);   /* REQUIRED. LD is flaky without it. */
-	} >ewram = 0xff
+	} >ewram :main = 0xff
 
-	.ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >ewram
+	.ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >ewram :main
  	__exidx_start = .;
-	ARM.exidx   : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } >ewram
+	ARM.exidx   : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } >ewram :main
  	__exidx_end = .;
 
 	/*	Ensure the __preinit_array_start label is properly aligned.  We
@@ -71,21 +84,21 @@ SECTIONS
 	. = ALIGN(32 / 8);
 
 	PROVIDE (__preinit_array_start = .);
-	.preinit_array     : { KEEP (*(.preinit_array)) } >ewram = 0xff
+	.preinit_array     : { KEEP (*(.preinit_array)) } >ewram :main = 0xff
 	PROVIDE (__preinit_array_end = .);
 	PROVIDE (__init_array_start = .);
 	.init_array     :
 	{
 		KEEP (*(SORT(.init_array.*)))
 		KEEP (*(.init_array))
-	} >ewram = 0xff
+	} >ewram :main = 0xff
 	PROVIDE (__init_array_end = .);
 	PROVIDE (__fini_array_start = .);
 	.fini_array     :
 	{
 		KEEP (*(.fini_array))
 		KEEP (*(SORT(.fini_array.*)))
-	} >ewram = 0xff
+	} >ewram :main = 0xff
 
 	PROVIDE (__fini_array_end = .);
 
@@ -102,7 +115,7 @@ SECTIONS
 		KEEP (*(SORT(.ctors.*)))
 		KEEP (*(.ctors))
 		. = ALIGN(4);   /* REQUIRED. LD is flaky without it. */
-	} >ewram = 0xff
+	} >ewram :main = 0xff
 
 	.dtors :
 	{
@@ -111,21 +124,21 @@ SECTIONS
 		KEEP (*(SORT(.dtors.*)))
 		KEEP (*(.dtors))
 		. = ALIGN(4);   /* REQUIRED. LD is flaky without it. */
-	} >ewram = 0xff
+	} >ewram :main = 0xff
 
 	.eh_frame :
 	{
 		KEEP (*(.eh_frame))
 		. = ALIGN(4);   /* REQUIRED. LD is flaky without it. */
-	} >ewram = 0xff
+	} >ewram :main = 0xff
 
 	.gcc_except_table :
 	{
 		*(.gcc_except_table)
 		. = ALIGN(4);   /* REQUIRED. LD is flaky without it. */
-	} >ewram = 0xff
-	.jcr            : { KEEP (*(.jcr)) } >ewram = 0
-	.got            : { *(.got.plt) *(.got) *(.rel.got) } >ewram = 0
+	} >ewram :main = 0xff
+	.jcr            : { KEEP (*(.jcr)) } >ewram :main = 0
+	.got            : { *(.got.plt) *(.got) *(.rel.got) } >ewram :main = 0
 
 	.ewram ALIGN(4) : 
 	{
@@ -133,52 +146,51 @@ SECTIONS
 		*(.ewram)
 		*ewram.*(.text)
 		. = ALIGN(4);   /* REQUIRED. LD is flaky without it. */
-	} >ewram = 0xff
+	} >ewram :main = 0xff
 
 
 	.data ALIGN(4) :
 	{
 		__data_start = ABSOLUTE(.);
-		*(.data)
-		*(.data.*)
-		*(.gnu.linkonce.d*)
+		*(EXCLUDE_FILE(*.twl*) .data)
+		*(EXCLUDE_FILE(*.twl*) .data.*)
+		*(EXCLUDE_FILE(*.twl*) .gnu.linkonce.d*)
 		CONSTRUCTORS
 		. = ALIGN(4);
 		__data_end = ABSOLUTE(.) ;
-	} >ewram = 0xff
+	} >ewram :main = 0xff
 
-
-	__dtcm_lma = . ;
 	__bss_vma = . ;
 
-	.dtcm __dtcm_start : AT (__dtcm_lma)
+	.dtcm :
 	{
+		__dtcm_lma = LOADADDR(.dtcm);
+		__dtcm_start = ABSOLUTE(.);
 		*(.dtcm)
 		*(.dtcm.*)
 		. = ALIGN(4);
 		__dtcm_end = ABSOLUTE(.);
-	} >dtcm  = 0xff
+	} >dtcm AT>ewram :dtcm = 0xff
 
-
-	__itcm_lma = __dtcm_lma + SIZEOF(.dtcm);
-
-	.itcm __itcm_start : AT (__itcm_lma)
+	.itcm :
 	{
+		__itcm_lma = LOADADDR(.itcm);
+		__itcm_start = ABSOLUTE(.);
 		*(.itcm)
-		*itcm.*(.text)
+		*.itcm*(.text .stub .text.*)
 		. = ALIGN(4);
 		__itcm_end = ABSOLUTE(.);
-	} >itcm = 0xff
-	
-	__vectors_lma = __itcm_lma + SIZEOF(.itcm);
+	} >itcm AT>ewram :itcm = 0xff
 
-	.vectors __vectors_start : AT (__vectors_lma)
+	.vectors :
 	{
+		__vectors_lma = LOADADDR(.vectors);
+		__vectors_start = ABSOLUTE(.);
 		*(.vectors)
-		*vectors.*(.text)
+		*.vectors*(.text .stub .text.*)
 		. = ALIGN(4);
 		__vectors_end = ABSOLUTE(.);
-	} >vectors = 0xff
+	} >vectors AT>ewram :vectors = 0xff
 	
 	.sbss __dtcm_end (NOLOAD): 
 	{
@@ -187,22 +199,48 @@ SECTIONS
 		*(.sbss)
 		. = ALIGN(4);    /* REQUIRED. LD is flaky without it. */
 		__sbss_end = ABSOLUTE(.);
-	} >dtcm 
+	} >dtcm :NONE
 
 	.bss __bss_vma (NOLOAD): 
 	{
 		__bss_start = ABSOLUTE(.);
 		__bss_start__ = ABSOLUTE(.);
-		*(.dynbss)
-		*(.gnu.linkonce.b*)
-		*(.bss*)
-		*(COMMON)
+		*(EXCLUDE_FILE(*.twl*) .dynbss)
+		*(EXCLUDE_FILE(*.twl*) .gnu.linkonce.b*)
+		*(EXCLUDE_FILE(*.twl*) .bss*)
+		*(EXCLUDE_FILE(*.twl*) COMMON)
 		. = ALIGN(4);    /* REQUIRED. LD is flaky without it. */
 		__bss_end__ = ABSOLUTE(.) ;
 		__end__ = ABSOLUTE(.) ;
-	} AT>ewram 
+	} >ewram :NONE
 
+	.twl __end__ : AT(MAX(0x2400000,MAX(__end__,LOADADDR(.vectors)+SIZEOF(.vectors))))
+	{
+		__arm9i_lma__ = LOADADDR(.twl);
+		__arm9i_start__ = ABSOLUTE(.);
+		*(.twl)
+		*.twl*(.text .stub .text.* .gnu.linkonce.t.*)
+		*.twl*(.rodata)
+		*.twl*(.roda)
+		*.twl*(.rodata.*)
+		*.twl*(.data)
+		*.twl*(.data.*)
+		*.twl*(.gnu.linkonce.d*)
+		__arm9i_end__ = ABSOLUTE(.);
+	} :twl
 
+	.twl_bss __arm9i_end__ (NOLOAD):
+	{
+		__twl_bss_start__ = ABSOLUTE(.);
+		*(.twl_bss)
+		*.twl*(.dynbss)
+		*.twl*(.gnu.linkonce.b*)
+		*.twl*(.bss*)
+		*.twl*(COMMON)
+		. = ALIGN(4);    /* REQUIRED. LD is flaky without it. */
+		__twl_bss_end__ = ABSOLUTE(.);
+		__twl_end__ = ABSOLUTE(.);
+	} :NONE
 
 	/* Stabs debugging sections.  */
 	.stab 0 : { *(.stab) }

dkarm-eabi/crtls/ds_arm9.mem

@@ -1,7 +1,5 @@
 MEMORY {
-
-	rom	: ORIGIN = 0x08000000, LENGTH = 32M
-	ewram	: ORIGIN = 0x02000000, LENGTH = 4M - 4k
+	ewram	: ORIGIN = 0x02000000, LENGTH = 4M - 512k
 	dtcm	: ORIGIN = 0x0b000000, LENGTH = 16K
 	vectors	: ORIGIN = 0x01000000, LENGTH = 256
 	itcm	: ORIGIN = 0x01000100, LENGTH = 32K - 256

dkarm-eabi/crtls/ds_arm9_crt0.s

@@ -8,7 +8,7 @@
 	.equ	_libnds_argv,0x02FFFE70
 
 @---------------------------------------------------------------------------------
-	.section ".init"
+	.section ".crt0","ax"
 	.global _start
 @---------------------------------------------------------------------------------
 	.align	4
@@ -16,7 +16,7 @@
 @---------------------------------------------------------------------------------
 _start:
 @---------------------------------------------------------------------------------
-	mov	r0, #0x04000000			@ IME = 0;
+	mov	r0, #0x04000000		@ IME = 0;
 	str	r0, [r0, #0x208]
 	
 	@ set sensible stacks to allow bios call
@@ -46,12 +46,34 @@ _start:
 	msr	cpsr, r0
 	ldr	sp, =__sp_usr		@ Set user stack
 
+	mov	r12, #0x4000000		@ Read system ROM status (NTR/TWL)
+	ldrb	r11, [r12,r12,lsr #12]
+	and	r11, r11, #0x3
+
+	mov	r9, #(0x0<<8)		@ Synchronize with ARM7
+	str	r9, [r12, #0x180]
+	mov	r9, #0x9
+	bl	IPCSync
+	mov	r9, #(0xA<<8)
+	str	r9, [r12, #0x180]
+	mov	r9, #0xB
+	bl	IPCSync
+	mov	r9, #(0xC<<8)
+	str	r9, [r12, #0x180]
+	mov	r9, #0xD
+	bl	IPCSync
+	mov	r9, r11, lsl #8
+	str	r9, [r12, #0x180]
+	mov	r9, #0
+	bl	IPCSync
+	str	r9, [r12, #0x180]
+
 	ldr	r1, =__itcm_lma		@ Copy instruction tightly coupled memory (itcm section) from LMA to VMA
 	ldr	r2, =__itcm_start
 	ldr	r4, =__itcm_end
 	bl	CopyMemCheck
 
-	ldr	r1, =__vectors_lma		@ Copy reserved vectors area (itcm section) from LMA to VMA
+	ldr	r1, =__vectors_lma	@ Copy reserved vectors area (itcm section) from LMA to VMA
 	ldr	r2, =__vectors_start
 	ldr	r4, =__vectors_end
 	bl	CopyMemCheck
@@ -61,6 +83,9 @@ _start:
 	ldr	r4, =__dtcm_end
 	bl	CopyMemCheck
 
+	cmp	r11, #1
+	ldrne	r10, =__end__		@ (DS mode) heap start
+	ldreq	r10, =__twl_end__	@ (DSi mode) heap start
 	bl	checkARGV		@ check and process argv trickery
 
 	ldr	r0, =__bss_start__	@ Clear BSS section
@@ -72,20 +97,42 @@ _start:
 	ldr	r1, =__sbss_end
 	sub	r1, r1, r0
 	bl	ClearMem
-	
 
+	cmp	r11, #1
+	bne	NotTWL
+	ldr	r9, =__dsimode		@ set DSi mode flag
+	strb	r11, [r9]
+
+	@ Copy TWL area (arm9i section) from LMA to VMA
+	ldr	r1, =0x02ffe1c8		@ Get ARM9i LMA from header
+	ldr	r1, [r1]
+
+	ldr	r2, =__arm9i_start__
+	cmp	r1, r2			@ skip copy if LMA=VMA
+	ldrne	r4, =__arm9i_end__
+	blne	CopyMemCheck
+
+	ldr	r0, =__twl_bss_start__	@ Clear TWL BSS section
+	ldr	r1, =__twl_bss_end__
+	sub	r1, r1, r0
+	bl	ClearMem
+
+NotTWL:
 	ldr	r0, =_libnds_argv
 
 	@ reset heap base
 	ldr	r2, [r0,#20]		@ newheap base
-	ldr	r1,=fake_heap_start
-	str	r2,[r1]
+	cmp	r2, #0
+	moveq	r2, r10
+	ldr	r1, =fake_heap_start	@ set heap start
+	str	r2, [r1]
 
 	ldr	r1, =fake_heap_end	@ set heap end
 	sub	r8, r8,#0xc000
 	str	r8, [r1]
 
 	push	{r0}
+	ldr	r0, =__secure_area__
 	ldr	r3, =initSystem
 	blx	r3			@ system initialisation
 
@@ -121,7 +168,7 @@ checkARGV:
 	ldr	r2, [r0, #8]		@ length of command line
 
 	@ copy to heap
-	ldr	r3, =__end__		@ initial heap base
+	mov	r3, r10			@ initial heap base
 	str	r3, [r0, #4]		@ set command line address
 
 	cmp	r2, #0
@@ -161,7 +208,7 @@ ClearMem:
 @---------------------------------------------------------------------------------
 	mov	r2, #3			@ Round down to nearest word boundary
 	add	r1, r1, r2		@ Shouldn't be needed
-	bics	r1, r1, r2	@ Clear 2 LSB (and set Z)
+	bics	r1, r1, r2		@ Clear 2 LSB (and set Z)
 	bxeq	lr			@ Quit if copy size is 0
 
 	mov	r2, #0
@@ -191,7 +238,7 @@ CopyMem:
 @---------------------------------------------------------------------------------
 	mov	r0, #3			@ These commands are used in cases where
 	add	r3, r3, r0		@ the length is not a multiple of 4,
-	bics	r3, r3, r0	@ even though it should be.
+	bics	r3, r3, r0		@ even though it should be.
 	bxeq	lr			@ Length is zero, so exit
 CIDLoop:
 	ldmia	r1!, {r0}
@@ -201,6 +248,17 @@ CIDLoop:
 
 	bx	lr
 
+@---------------------------------------------------------------------------------
+@ Synchronize with ARM7
+@---------------------------------------------------------------------------------
+IPCSync:
+@---------------------------------------------------------------------------------
+	ldr	r10, [r12, #0x180]
+	and	r10, r10, #0xF
+	cmp	r10, r9
+	bne	IPCSync
+	bx	lr
+
 @---------------------------------------------------------------------------------
 	.align
 	.pool

dkarm-eabi/crtls/ds_cart.ld

@@ -22,14 +22,25 @@ __irq_vector	=	__iwram_top - 4;
 
 SECTIONS
 {
-	.init	:
+	.crt0	:
 	{
 		__text_start = . ;
-		KEEP (*(.init))
+		KEEP (*(.crt0))
 		. = ALIGN(4);  /* REQUIRED. LD is flaky without it. */
-		} >rom = 0xff
+	} >rom = 0xff
+
+	.init           :
+	{
+		KEEP (*(SORT_NONE(.init)))
+	} >rom = 0xff
+
 	.plt : { *(.plt) } >rom = 0xff
 
+	.init :
+	{
+		KEEP (*(SORT_NONE(.init)))
+	} >ewram
+
 	.text :   /* ALIGN (4): */
 	{
 		*(EXCLUDE_FILE (*.iwram*) .text)

dkarm-eabi/crtls/ds_cart_crt0.s

@@ -1,5 +1,5 @@
 @---------------------------------------------------------------------------------
-	.section ".init"
+	.section ".crt0","ax"
 	.global _start
 	.arm
 @---------------------------------------------------------------------------------

dkarm-eabi/crtls/dsi_arm9.mem

@@ -1,7 +1,5 @@
 MEMORY {
-
-	rom	: ORIGIN = 0x08000000, LENGTH = 32M
-	ewram	: ORIGIN = 0x02000000, LENGTH = 16M - 4k
+	ewram	: ORIGIN = 0x02000000, LENGTH = 15M - 512k
 	dtcm	: ORIGIN = 0x0b000000, LENGTH = 16K
 	vectors	: ORIGIN = 0x01000000, LENGTH = 256
 	itcm	: ORIGIN = 0x01000100, LENGTH = 32K - 256

dkarm-eabi/crtls/er_crt0.s

@@ -4,7 +4,7 @@
 @ author  : tim schuerewegen
 @ version : 1.0
 @---------------------------------------------------------------------------------
-	.section	".init"
+	.section	".crt0","ax"
 	.global     _start
 	.align
 	.arm

dkarm-eabi/crtls/gba_cart.ld

@@ -67,12 +67,18 @@ __irq_flags	=	0x03007ff8;
 SECTIONS
 {
 	. = __text_start;
-	.init :
+	.crt0 :
 	{
-		KEEP (*(.init))
+		KEEP (*(.crt0))
 		. = ALIGN(4);
 	} >rom =0xff
 
+
+	.init :
+	{
+		KEEP (*(SORT_NONE(.init)))
+	} >rom
+
 	.plt :
 	{
 		*(.plt)

dkarm-eabi/crtls/gba_crt0.s

@@ -1,7 +1,10 @@
-	.section	".init"
+	.section	".crt0","ax"
 	.global     _start
 	.align
+
 	.arm
+	.cpu arm7tdmi
+
 @---------------------------------------------------------------------------------
 _start:
 @---------------------------------------------------------------------------------
@@ -43,8 +46,8 @@ __slave_number:
 	.word   0    				@ reserved
 	.word   0    				@ reserved
 
-    .global     start_vector
-    .align
+	.global     start_vector
+	.align
 @---------------------------------------------------------------------------------
 start_vector:
 @---------------------------------------------------------------------------------

dkarm-eabi/crtls/gba_er.ld

@@ -13,9 +13,9 @@ SECTIONS
 {
 	.  = 0x02000000;
 
-	.init :
+	.crt0 :
 	{
-		*(.init)
+		*(.crt0)
 		. = ALIGN(4);
 	} = 0xff
 

dkarm-eabi/crtls/gba_mb.ld

@@ -61,18 +61,25 @@ __irq_flags	=	0x03007ff8;
 SECTIONS
 {
 	. = __text_start;
-	.init :
+	. = __text_start;
+	.crt0 :
 	{
-		KEEP (*(.init))
+		KEEP (*(.crt0))
 		. = ALIGN(4);
 	} >ewram =0xff
 
+	.init :
+	{
+		KEEP (*(SORT_NONE(.init)))
+	} >ewram
+
 	.plt :
- 	{
+	{
 		*(.plt)
 		. = ALIGN(4);   /* REQUIRED. LD is flaky without it. */
 	} >ewram
 
+
 	.text  ALIGN (4):
 	{
 		*(EXCLUDE_FILE (*.iwram*) .text)

dkarm-eabi/crtls/gp32.ld

@@ -9,12 +9,18 @@ MEMORY
 
 SECTIONS
 {
-  .init           :
+  .crt0           :
   {
     __text_start = . ;
-    KEEP (*(.init))
+    KEEP (*(.crt0))
     . = ALIGN(4);  /* REQUIRED. LD is flaky without it. */
   } >ram = 0xff
+
+  .init :
+  {
+    KEEP (*(SORT_NONE(.init)))
+  } >ram
+
   .plt            : { *(.plt) } >ram = 0xff
 
  

dkarm-eabi/crtls/gp32_crt0.s

@@ -1,4 +1,4 @@
-    .section	".init"
+    .section	".crt0","ax"
 	.code 32
 	.align
 	.global _start

dkarm-eabi/patches/binutils-2.25.1.patch

@@ -1,13 +0,0 @@
-diff -Nbaur binutils-2.24/include/opcode/arm.h binutils-2.24-arm/include/opcode/arm.h
---- binutils-2.24/include/opcode/arm.h	2013-11-26 11:37:33.000000000 +0000
-+++ binutils-2.24-arm/include/opcode/arm.h	2014-02-16 19:32:33.000000000 +0000
-@@ -114,7 +114,8 @@
- #define ARM_AEXT_V6KT2  (ARM_AEXT_V6T2 | ARM_EXT_V6K)
- #define ARM_AEXT_V6ZT2  (ARM_AEXT_V6T2 | ARM_EXT_SEC)
- #define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_SEC)
--#define ARM_AEXT_V7_ARM	(ARM_AEXT_V6KT2 | ARM_EXT_V7 | ARM_EXT_BARRIER)
-+#define ARM_AEXT_V7_ARM	(ARM_AEXT_V6KT2 | ARM_EXT_V7 | ARM_EXT_BARRIER \
-+    | ARM_EXT_OS )
- #define ARM_AEXT_V7A	(ARM_AEXT_V7_ARM | ARM_EXT_V7A)
- #define ARM_AEXT_V7VE	(ARM_AEXT_V7A  | ARM_EXT_DIV | ARM_EXT_ADIV \
-     | ARM_EXT_VIRT | ARM_EXT_SEC | ARM_EXT_MP)

dkarm-eabi/patches/gcc-6.3.0.patch

@@ -1,18 +1,18 @@
-diff -Nbaur gcc-5.2.0/gcc/config/arm/t-arm-elf gcc-5.2.0-arm/gcc/config/arm/t-arm-elf
---- gcc-5.2.0/gcc/config/arm/t-arm-elf	2015-01-05 12:33:28.000000000 +0000
-+++ gcc-5.2.0-arm/gcc/config/arm/t-arm-elf	2015-11-23 20:16:26.736000000 +0000
+diff -NBaur gcc-6.2.0/gcc/config/arm/t-arm-elf gcc-6.2.0-arm/gcc/config/arm/t-arm-elf
+--- gcc-6.2.0/gcc/config/arm/t-arm-elf	2016-01-04 14:30:50.000000000 +0000
++++ gcc-6.2.0-arm/gcc/config/arm/t-arm-elf	2016-12-10 12:16:20.076000000 +0000
 @@ -16,11 +16,19 @@
  # along with GCC; see the file COPYING3.  If not see
  # <http://www.gnu.org/licenses/>.
  
 -MULTILIB_OPTIONS     = marm/mthumb
 -MULTILIB_DIRNAMES    = arm thumb
-+MULTILIB_OPTIONS     = mthumb march=armv6k mfloat-abi=hard
-+MULTILIB_DIRNAMES    = thumb armv6k fpu
++MULTILIB_OPTIONS     = mthumb mbig-endian march=armv6k mfloat-abi=hard
++MULTILIB_DIRNAMES    = thumb be armv6k fpu
  MULTILIB_EXCEPTIONS  = 
  MULTILIB_MATCHES     =
  
-+MULTILIB_REQUIRED    = mthumb march=armv6k/mfloat-abi=hard 
++MULTILIB_REQUIRED    = mthumb mbig-endian mthumb/mbig-endian march=armv6k/mfloat-abi=hard 
 +
 +
 +MULTILIB_MATCHES    += march?armv6k=mtune?mpcore
@@ -36,9 +36,9 @@ diff -Nbaur gcc-5.2.0/gcc/config/arm/t-arm-elf gcc-5.2.0-arm/gcc/config/arm/t-ar
  #MULTILIB_EXCEPTIONS    += *mcpu=fa526/*mfloat-abi=hard*
  #MULTILIB_EXCEPTIONS    += *mcpu=fa626/*mfloat-abi=hard*
  
-diff -Nbaur gcc-5.2.0/gcc/config/arm/unknown-elf.h gcc-5.2.0-arm/gcc/config/arm/unknown-elf.h
---- gcc-5.2.0/gcc/config/arm/unknown-elf.h	2015-11-28 18:13:20.576000000 +0000
-+++ gcc-5.2.0-arm/gcc/config/arm/unknown-elf.h	2015-11-28 18:14:06.328000000 +0000
+diff -NBaur gcc-6.2.0/gcc/config/arm/unknown-elf.h gcc-6.2.0-arm/gcc/config/arm/unknown-elf.h
+--- gcc-6.2.0/gcc/config/arm/unknown-elf.h	2016-01-04 14:30:50.000000000 +0000
++++ gcc-6.2.0-arm/gcc/config/arm/unknown-elf.h	2016-09-07 08:58:29.977682360 +0100
 @@ -29,7 +29,7 @@
  #endif
  
@@ -47,17 +47,17 @@ diff -Nbaur gcc-5.2.0/gcc/config/arm/unknown-elf.h gcc-5.2.0-arm/gcc/config/arm/
 +#define UNKNOWN_ELF_STARTFILE_SPEC	" crti%O%s crtbegin%O%s"
  
  #undef  STARTFILE_SPEC
- #define STARTFILE_SPEC	UNKNOWN_ELF_STARTFILE_SPEC
-@@ -93,4 +93,4 @@
+ #define STARTFILE_SPEC	\
+@@ -97,4 +97,4 @@
     udivmoddi4, which will depend on the exception unwind routines,
     which will depend on abort, which is defined in libc.  */ 
  #undef LINK_GCC_C_SEQUENCE_SPEC
 -#define LINK_GCC_C_SEQUENCE_SPEC "--start-group %G %L --end-group"
 +#define LINK_GCC_C_SEQUENCE_SPEC "--start-group %G %L %(libgloss) --end-group"
-diff -Nbaur gcc-5.2.0/gcc/gcc.c gcc-5.2.0-arm/gcc/gcc.c
---- gcc-5.2.0/gcc/gcc.c	2015-03-10 09:37:41.000000000 +0000
-+++ gcc-5.2.0-arm/gcc/gcc.c	2015-11-23 20:16:26.740000000 +0000
-@@ -647,6 +647,11 @@
+diff -NBaur gcc-6.2.0/gcc/gcc.c gcc-6.2.0-arm/gcc/gcc.c
+--- gcc-6.2.0/gcc/gcc.c	2016-08-15 12:19:34.000000000 +0100
++++ gcc-6.2.0-arm/gcc/gcc.c	2016-09-07 08:58:29.981682360 +0100
+@@ -778,6 +778,11 @@
  #endif
  #endif
  
@@ -69,7 +69,7 @@ diff -Nbaur gcc-5.2.0/gcc/gcc.c gcc-5.2.0-arm/gcc/gcc.c
  /* config.h can define STARTFILE_SPEC to override the default crt0 files.  */
  #ifndef STARTFILE_SPEC
  #define STARTFILE_SPEC  \
-@@ -879,6 +884,7 @@
+@@ -1062,6 +1067,7 @@
  static const char *lib_spec = LIB_SPEC;
  static const char *link_gomp_spec = "";
  static const char *libgcc_spec = LIBGCC_SPEC;
@@ -77,7 +77,7 @@ diff -Nbaur gcc-5.2.0/gcc/gcc.c gcc-5.2.0-arm/gcc/gcc.c
  static const char *endfile_spec = ENDFILE_SPEC;
  static const char *startfile_spec = STARTFILE_SPEC;
  static const char *linker_name_spec = LINKER_NAME;
-@@ -1374,6 +1380,7 @@
+@@ -1563,6 +1569,7 @@
    INIT_STATIC_SPEC ("lib",			&lib_spec),
    INIT_STATIC_SPEC ("link_gomp",		&link_gomp_spec),
    INIT_STATIC_SPEC ("libgcc",			&libgcc_spec),
@@ -85,45 +85,18 @@ diff -Nbaur gcc-5.2.0/gcc/gcc.c gcc-5.2.0-arm/gcc/gcc.c
    INIT_STATIC_SPEC ("startfile",		&startfile_spec),
    INIT_STATIC_SPEC ("cross_compile",		&cross_compile),
    INIT_STATIC_SPEC ("version",			&compiler_version),
-diff -Nbaur gcc-5.2.0/gcc/Makefile.in gcc-5.2.0-arm/gcc/Makefile.in
---- gcc-5.2.0/gcc/Makefile.in	2015-05-04 11:46:32.000000000 +0100
-+++ gcc-5.2.0-arm/gcc/Makefile.in	2015-11-23 20:16:26.744000000 +0000
-@@ -1053,8 +1053,8 @@
- # things like the go/%.o rule work properly; but we use $(*F) for the
- # file part, as we just want the file part of the stem, not the entire
- # file name.
--COMPILE = $(COMPILE.base) -MT $@ -MMD -MP -MF $(@D)/$(DEPDIR)/$(*F).TPo
--POSTCOMPILE = @mv $(@D)/$(DEPDIR)/$(*F).TPo $(@D)/$(DEPDIR)/$(*F).Po
-+COMPILE = $(COMPILE.base)
-+POSTCOMPILE =
- else
- COMPILE = source='$<' object='$@' libtool=no \
-     DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) $(COMPILE.base)
-diff -Nbaur gcc-5.2.0/libcpp/Makefile.in gcc-5.2.0-arm/libcpp/Makefile.in
---- gcc-5.2.0/libcpp/Makefile.in	2015-07-16 10:16:25.000000000 +0100
-+++ gcc-5.2.0-arm/libcpp/Makefile.in	2015-11-23 20:16:26.744000000 +0000
-@@ -208,8 +208,7 @@
- # Note that we put the dependencies into a .Tpo file, then move them
- # into place if the compile succeeds.  We need this because gcc does
- # not atomically write the dependency output file.
--COMPILE = $(COMPILE.base) -o $@ -MT $@ -MMD -MP -MF $(DEPDIR)/$*.Tpo
--POSTCOMPILE = @mv $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
-+COMPILE = $(COMPILE.base) -o $@
- else
- COMPILE = source='$<' object='$@' libtool=no DEPDIR=$(DEPDIR) $(DEPMODE) \
- 	  $(depcomp) $(COMPILE.base)
-diff -Nbaur gcc-5.2.0/libgcc/config/arm/t-bpabi gcc-5.2.0-arm/libgcc/config/arm/t-bpabi
---- gcc-5.2.0/libgcc/config/arm/t-bpabi	2012-08-17 16:06:06.000000000 +0100
-+++ gcc-5.2.0-arm/libgcc/config/arm/t-bpabi	2015-11-23 20:16:26.744000000 +0000
+diff -NBaur gcc-6.2.0/libgcc/config/arm/t-bpabi gcc-6.2.0-arm/libgcc/config/arm/t-bpabi
+--- gcc-6.2.0/libgcc/config/arm/t-bpabi	2012-08-17 16:06:06.000000000 +0100
++++ gcc-6.2.0-arm/libgcc/config/arm/t-bpabi	2016-09-07 08:58:29.985682360 +0100
 @@ -17,4 +17,4 @@
  # On ARM, specifying -fnon-call-exceptions will needlessly pull in
  # the unwinder in simple programs which use 64-bit division.  Omitting
  # the option is safe.
 -LIB2_DIVMOD_EXCEPTION_FLAGS := -fexceptions
 +LIB2_DIVMOD_EXCEPTION_FLAGS := -fno-exceptions
-diff -Nbaur gcc-5.2.0/libgcc/crtstuff.c gcc-5.2.0-arm/libgcc/crtstuff.c
---- gcc-5.2.0/libgcc/crtstuff.c	2015-01-05 12:33:28.000000000 +0000
-+++ gcc-5.2.0-arm/libgcc/crtstuff.c	2015-11-23 20:16:26.744000000 +0000
+diff -NBaur gcc-6.2.0/libgcc/crtstuff.c gcc-6.2.0-arm/libgcc/crtstuff.c
+--- gcc-6.2.0/libgcc/crtstuff.c	2016-01-04 14:30:50.000000000 +0000
++++ gcc-6.2.0-arm/libgcc/crtstuff.c	2016-09-07 08:58:29.985682360 +0100
 @@ -47,7 +47,7 @@
  
  /* Target machine header files require this define. */
@@ -133,10 +106,10 @@ diff -Nbaur gcc-5.2.0/libgcc/crtstuff.c gcc-5.2.0-arm/libgcc/crtstuff.c
  /* FIXME: Including auto-host is incorrect, but until we have
     identified the set of defines that need to go into auto-target.h,
     this will have to do.  */
-diff -Nbaur gcc-5.2.0/libgcc/Makefile.in gcc-5.2.0-arm/libgcc/Makefile.in
---- gcc-5.2.0/libgcc/Makefile.in	2015-01-29 08:03:56.000000000 +0000
-+++ gcc-5.2.0-arm/libgcc/Makefile.in	2015-11-23 20:16:26.744000000 +0000
-@@ -819,7 +819,7 @@
+diff -NBaur gcc-6.2.0/libgcc/Makefile.in gcc-6.2.0-arm/libgcc/Makefile.in
+--- gcc-6.2.0/libgcc/Makefile.in	2016-02-25 12:23:52.000000000 +0000
++++ gcc-6.2.0-arm/libgcc/Makefile.in	2016-09-07 08:58:29.989682360 +0100
+@@ -820,7 +820,7 @@
  # libgcc_eh.a, only LIB2ADDEH matters.  If we do, only LIB2ADDEHSTATIC and
  # LIB2ADDEHSHARED matter.  (Usually all three are identical.)
  

dkarm-eabi/patches/gdb-7.11.patch

@@ -1,7 +1,7 @@
-diff -NBaur gdb-7.10/gdb/Makefile.in gdb-7.10-arm/gdb/Makefile.in
---- gdb-7.10/gdb/Makefile.in	2015-08-28 22:22:07.000000000 +0100
-+++ gdb-7.10-arm/gdb/Makefile.in	2015-10-21 08:54:36.492597858 +0100
-@@ -2676,10 +2676,8 @@
+diff -NBaur gdb-7.11/gdb/Makefile.in gdb-7.11-arm/gdb/Makefile.in
+--- gdb-7.11/gdb/Makefile.in	2016-02-24 09:55:15.000000000 +0000
++++ gdb-7.11-arm/gdb/Makefile.in	2016-05-13 15:06:03.629019640 +0100
+@@ -2726,10 +2726,8 @@
  # Note that we put the dependencies into a .Tpo file, then move them
  # into place if the compile succeeds.  We need this because gcc does
  # not atomically write the dependency output file.
@@ -14,10 +14,10 @@ diff -NBaur gdb-7.10/gdb/Makefile.in gdb-7.10-arm/gdb/Makefile.in
  @GMAKE_TRUE@else
  @GMAKE_TRUE@override COMPILE.pre = source='$<' object='$@' libtool=no \
  @GMAKE_TRUE@	DEPDIR=$(DEPDIR) $(DEPMODE) $(depcomp) $(CC)
-diff -NBaur gdb-7.10/sim/common/Make-common.in gdb-7.10-arm/sim/common/Make-common.in
---- gdb-7.10/sim/common/Make-common.in	2015-07-06 20:57:46.000000000 +0100
-+++ gdb-7.10-arm/sim/common/Make-common.in	2015-10-21 08:54:36.492597858 +0100
-@@ -421,10 +421,8 @@
+diff -NBaur gdb-7.11/sim/common/Make-common.in gdb-7.11-arm/sim/common/Make-common.in
+--- gdb-7.11/sim/common/Make-common.in	2016-02-10 03:19:39.000000000 +0000
++++ gdb-7.11-arm/sim/common/Make-common.in	2016-05-13 15:06:03.633019640 +0100
+@@ -402,10 +402,8 @@
  # Note that we put the dependencies into a .Tpo file, then move them
  # into place if the compile succeeds.  We need this because gcc does
  # not atomically write the dependency output file.

dkarm-eabi/scripts/build-crtls.sh

@@ -21,7 +21,8 @@ $MAKE CRT=gp32_gpsdk
 $MAKE CRT=ds_arm7
 $MAKE CRT=ds_arm9
 $MAKE CRT=ds_cart
-$target-gcc -march=armv6k -mfloat-abi=hard -c 3dsx_crt0.s -o armv6k/fpu/3dsx_crt0.o
+$MAKE ds_arm7_vram_crt0
+$MAKE 3dsx_crt0
 
 cd $BUILDDIR/libgba-$LIBGBA_VER
 $MAKE || { echo "error building libgba"; exit 1; }
@@ -47,9 +48,9 @@ cd $BUILDDIR/libfat-$LIBFAT_VER
 $MAKE nds-install || { echo "error building nds libfat"; exit 1; }
 $MAKE gba-install || { echo "error installing gba libfat"; exit 1; }
 
-cd $BUILDDIR/libmirko-$LIBMIRKO_VER
-$MAKE || { echo "error building libmirko"; exit 1; }
-$MAKE install || { echo "error installing libmirko"; exit 1; }
+#cd $BUILDDIR/libmirko-$LIBMIRKO_VER
+#$MAKE || { echo "error building libmirko"; exit 1; }
+#$MAKE install || { echo "error installing libmirko"; exit 1; }
 
 cd $BUILDDIR/libfilesystem-$FILESYSTEM_VER
 $MAKE || { echo "error building libfilesystem"; exit 1; }
@@ -59,3 +60,7 @@ cd $BUILDDIR/libctru-$LIBCTRU_VER
 $MAKE || { echo "error building libctru"; exit 1; }
 $MAKE install || { echo "error installing libctru"; exit 1; }
 
+cd $BUILDDIR/citro3d-$CITRO3D_VER
+$MAKE || { echo "error building libctru"; exit 1; }
+$MAKE install || { echo "error installing libctru"; exit 1; }
+

dkarm-eabi/scripts/build-gcc.sh

@@ -11,7 +11,7 @@ cd $target/binutils
 if [ ! -f configured-binutils ]
 then
 	CFLAGS=$cflags LDFLAGS=$ldflags ../../binutils-$BINUTILS_VER/configure \
-        --prefix=$prefix --target=$target --disable-nls --disable-dependency-tracking --disable-werror \
+        --prefix=$prefix --target=$target --disable-nls --disable-werror \
 	--enable-lto --enable-plugins --enable-poison-system-directories \
 	$CROSS_PARAMS \
         || { echo "Error configuring binutils"; exit 1; }
@@ -39,15 +39,20 @@ cd $target/gcc
 
 if [ ! -f configured-gcc ]
 then
-	CFLAGS="$cflags" CXXFLAGS="$cflags" LDFLAGS="$ldflags" CFLAGS_FOR_TARGET="-O2" CXXFLAGS_FOR_TARGET="-O2" LDFLAGS_FOR_TARGET="" ../../gcc-$GCC_VER/configure \
-		--enable-languages=c,c++,objc,obj-c++ \
+	CFLAGS="$cflags" \
+	CXXFLAGS="$cflags" \
+	LDFLAGS="$ldflags" \
+	CFLAGS_FOR_TARGET="-O2 -ffunction-sections -fdata-sections" \
+	CXXFLAGS_FOR_TARGET="-O2 -ffunction-sections -fdata-sections" \
+	LDFLAGS_FOR_TARGET="" \
+	../../gcc-$GCC_VER/configure \
+		--enable-languages=c,c++ \
 		--with-gnu-as --with-gnu-ld --with-gcc \
 		--with-march=armv4t\
 		--enable-cxx-flags='-ffunction-sections' \
 		--disable-libstdcxx-verbose \
 		--enable-poison-system-directories \
 		--enable-interwork --enable-multilib \
-		--disable-dependency-tracking \
 		--enable-threads --disable-win32-registry --disable-nls --disable-debug\
 		--disable-libmudflap --disable-libssp --disable-libgomp \
 		--disable-libstdcxx-pch \
@@ -56,7 +61,8 @@ then
 		--with-headers=../../newlib-$NEWLIB_VER/newlib/libc/include \
 		--prefix=$prefix \
 		--enable-lto $plugin_ld\
-		--with-bugurl="http://wiki.devkitpro.org/index.php/Bug_Reports" --with-pkgversion="devkitARM release 45" \
+		--with-system-zlib \
+		--with-bugurl="http://wiki.devkitpro.org/index.php/Bug_Reports" --with-pkgversion="devkitARM release 46" \
 		$CROSS_PARAMS \
 		|| { echo "Error configuring gcc"; exit 1; }
 	touch configured-gcc
@@ -86,9 +92,11 @@ cd $target/newlib
 
 if [ ! -f configured-newlib ]
 then
+	CFLAGS_FOR_TARGET="-O2 -ffunction-sections -fdata-sections" \
 	../../newlib-$NEWLIB_VER/configure \
 	--disable-newlib-supplied-syscalls \
 	--enable-newlib-mb \
+	--disable-newlib-wide-orient \
 	--target=$target \
 	--prefix=$prefix \
 	|| { echo "Error configuring newlib"; exit 1; }
@@ -104,7 +112,7 @@ fi
 
 if [ ! -f installed-newlib ]
 then
-	$MAKE install || { echo "Error installing newlib"; exit 1; }
+	$MAKE install -j1 || { echo "Error installing newlib"; exit 1; }
 	touch installed-newlib
 fi
 
@@ -142,9 +150,11 @@ PLATFORM=`uname -s`
 
 if [ ! -f configured-gdb ]
 then
-	CFLAGS="$cflags" LDFLAGS="$ldflags" ../../gdb-$GDB_VER/configure \
+	CFLAGS="$cflags" \
+	CXXFLAGS="$cflags" \
+	LDFLAGS="$ldflags" \
+	../../gdb-$GDB_VER/configure \
 	--disable-nls --prefix=$prefix --target=$target --disable-werror \
-	--disable-dependency-tracking \
 	$CROSS_PARAMS \
 	|| { echo "Error configuring gdb"; exit 1; }
 	touch configured-gdb

dkppc/patches/gcc-6.3.0.patch

@@ -0,0 +1,313 @@
+diff -NBaur gcc-6.3.0/gcc/config/rs6000/rs6000.h gcc-6.3.0-ppc/gcc/config/rs6000/rs6000.h
+--- gcc-6.3.0/gcc/config/rs6000/rs6000.h	2016-07-07 20:42:07.000000000 +0100
++++ gcc-6.3.0-ppc/gcc/config/rs6000/rs6000.h	2017-01-05 02:42:41.980000000 +0000
+@@ -205,6 +205,7 @@
+   { "asm_cpu_476",		ASM_CPU_476_SPEC },			\
+   SUBTARGET_EXTRA_SPECS
+ 
++#if 0
+ /* -mcpu=native handling only makes sense with compiler running on
+    an PowerPC chip.  If changing this condition, also change
+    the condition in driver-rs6000.c.  */
+@@ -219,6 +220,8 @@
+ #else
+ #define ASM_CPU_NATIVE_SPEC "%(asm_default)"
+ #endif
++#endif
++#define ASM_CPU_NATIVE_SPEC "%(asm_default)"
+ 
+ #ifndef CC1_CPU_SPEC
+ #ifdef HAVE_LOCAL_CPU_DETECT
+diff -NBaur gcc-6.3.0/gcc/config/rs6000/sysv4.h gcc-6.3.0-ppc/gcc/config/rs6000/sysv4.h
+--- gcc-6.3.0/gcc/config/rs6000/sysv4.h	2016-05-16 14:47:47.000000000 +0100
++++ gcc-6.3.0-ppc/gcc/config/rs6000/sysv4.h	2017-01-05 02:46:27.020000000 +0000
+@@ -559,7 +559,12 @@
+ 
+ /* Default starting address if specified.  */
+ #define LINK_START_SPEC "\
+-%{mads         : %(link_start_ads)         ; \
++%{mgcn|mogc    : %(link_start_ogc)         ; \
++  mvgc         : %(link_start_vgc)         ; \
++  mgcbios      : %(link_start_gcb)         ; \
++  mrvl         : %(link_start_rvl)         ; \
++  mwup         : %(link_start_wup)         ; \
++  mads         : %(link_start_ads)         ; \
+   myellowknife : %(link_start_yellowknife) ; \
+   mmvme        : %(link_start_mvme)        ; \
+   msim         : %(link_start_sim)         ; \
+@@ -590,7 +595,9 @@
+ 
+ /* Any specific OS flags.  */
+ #define LINK_OS_SPEC "\
+-%{mads         : %(link_os_ads)         ; \
++%{mgcn|mogc|mvgc|mgcbios|mrvl         : %(link_os_ogc)         ; \
++  mwup         : %(link_os_wup)         ; \
++  mads         : %(link_os_ads)         ; \
+   myellowknife : %(link_os_yellowknife) ; \
+   mmvme        : %(link_os_mvme)        ; \
+   msim         : %(link_os_sim)         ; \
+@@ -608,7 +615,11 @@
+ /* Override rs6000.h definition.  */
+ #undef	CPP_SPEC
+ #define	CPP_SPEC "%{posix: -D_POSIX_SOURCE} \
+-%{mads         : %(cpp_os_ads)         ; \
++%{mgcn         : %(cpp_os_gcn)         ; \
++  mogc|mvgc|mgcbios         : %(cpp_os_ogc)         ; \
++  mrvl         : %(cpp_os_rvl)         ; \
++  mwup         : %(cpp_os_wup)         ; \
++  mads         : %(cpp_os_ads)         ; \
+   myellowknife : %(cpp_os_yellowknife) ; \
+   mmvme        : %(cpp_os_mvme)        ; \
+   msim         : %(cpp_os_sim)         ; \
+@@ -622,7 +633,11 @@
+ 
+ #undef	STARTFILE_SPEC
+ #define	STARTFILE_SPEC "\
+-%{mads         : %(startfile_ads)         ; \
++%{mgcn         : %(startfile_gcn)         ; \
++  mogc|mvgc|mgcbios         : %(startfile_ogc)         ; \
++  mrvl         : %(startfile_ogc)         ; \
++  mwup         : %(startfile_wup)         ; \
++  mads         : %(startfile_ads)         ; \
+   myellowknife : %(startfile_yellowknife) ; \
+   mmvme        : %(startfile_mvme)        ; \
+   msim         : %(startfile_sim)         ; \
+@@ -636,7 +651,9 @@
+ 
+ #undef	LIB_SPEC
+ #define	LIB_SPEC "\
+-%{mads         : %(lib_ads)         ; \
++%{mgcn|mogc|mvgc|mgcbios|mrvl        : %(lib_ogc)         ; \
++  mwup         : %(lib_wup)         ; \
++  mads         : %(lib_ads)         ; \
+   myellowknife : %(lib_yellowknife) ; \
+   mmvme        : %(lib_mvme)        ; \
+   msim         : %(lib_sim)         ; \
+@@ -646,11 +663,13 @@
+   mcall-openbsd: %(lib_openbsd)     ; \
+                : %(lib_default)     }"
+ 
+-#define LIB_DEFAULT_SPEC "-lc"
++#define LIB_DEFAULT_SPEC "--start-group -lsysbase -lc --end-group"
+ 
+ #undef	ENDFILE_SPEC
+ #define	ENDFILE_SPEC "\
+-%{mads         : %(endfile_ads)         ; \
++%{mgcn|mogc|mvgc|mgcbios|mrvl         : %(endfile_ogc)         ; \
++  mwup         : %(endfile_wup)         ; \
++  mads         : %(endfile_ads)         ; \
+   myellowknife : %(endfile_yellowknife) ; \
+   mmvme        : %(endfile_mvme)        ; \
+   msim         : %(endfile_sim)         ; \
+@@ -666,16 +685,33 @@
+ 
+ /* Motorola ADS support.  */
+ #define LIB_ADS_SPEC "--start-group -lads -lc --end-group"
++#define LIB_OGC_SPEC "--start-group -lsysbase -lc --end-group"
++#define LIB_WUP_SPEC "--start-group -lsysbase -lc --end-group"
+ 
+ #define	STARTFILE_ADS_SPEC "ecrti.o%s crt0.o%s crtbegin.o%s"
++#define	STARTFILE_OGC_SPEC "ecrti.o%s crtbegin.o%s crtmain.o%s"
++#define	STARTFILE_WUP_SPEC "ecrti.o%s crtbegin.o%s crtmain.o%s"
+ 
+ #define	ENDFILE_ADS_SPEC "crtend.o%s ecrtn.o%s"
++#define	ENDFILE_OGC_SPEC "crtend.o%s ecrtn.o%s"
++#define	ENDFILE_WUP_SPEC "crtend.o%s ecrtn.o%s"
+ 
+ #define LINK_START_ADS_SPEC "-T ads.ld%s"
++#define LINK_START_OGC_SPEC "-T ogc.ld%s"
++#define LINK_START_RVL_SPEC "-T rvl.ld%s"
++#define LINK_START_WUP_SPEC "-T wup.ld%s"
++#define LINK_START_VGC_SPEC "-T vgcogc.ld%s"
++#define LINK_START_GCB_SPEC "-T gcbogc.ld%s"
+ 
+ #define LINK_OS_ADS_SPEC ""
++#define LINK_OS_OGC_SPEC "--gc-sections"
++#define LINK_OS_WUP_SPEC "--gc-sections"
+ 
+ #define CPP_OS_ADS_SPEC ""
++#define CPP_OS_GCN_SPEC "-D__gamecube__ -ffunction-sections -fdata-sections"
++#define CPP_OS_OGC_SPEC "-D__gamecube__ -DHW_DOL -ffunction-sections -fdata-sections"
++#define CPP_OS_RVL_SPEC "-D__wii__ -DHW_RVL -ffunction-sections -fdata-sections"
++#define CPP_OS_WUP_SPEC "-D__wiiu__ -DHW_WUP -ffunction-sections -fdata-sections"
+ 
+ /* Motorola Yellowknife support.  */
+ #define LIB_YELLOWKNIFE_SPEC "--start-group -lyk -lc --end-group"
+@@ -866,6 +902,8 @@
+ #undef	SUBTARGET_EXTRA_SPECS
+ #define	SUBTARGET_EXTRA_SPECS						\
+   { "crtsavres_default",	CRTSAVRES_DEFAULT_SPEC },		\
++  { "lib_ogc",			LIB_OGC_SPEC },				\
++  { "lib_wup",			LIB_WUP_SPEC },	                        \
+   { "lib_ads",			LIB_ADS_SPEC },				\
+   { "lib_yellowknife",		LIB_YELLOWKNIFE_SPEC },			\
+   { "lib_mvme",			LIB_MVME_SPEC },			\
+@@ -875,6 +913,8 @@
+   { "lib_netbsd",		LIB_NETBSD_SPEC },			\
+   { "lib_openbsd",		LIB_OPENBSD_SPEC },			\
+   { "lib_default",		LIB_DEFAULT_SPEC },			\
++  { "startfile_ogc",		STARTFILE_OGC_SPEC },			\
++  { "startfile_wup",		STARTFILE_WUP_SPEC },			\
+   { "startfile_ads",		STARTFILE_ADS_SPEC },			\
+   { "startfile_yellowknife",	STARTFILE_YELLOWKNIFE_SPEC },		\
+   { "startfile_mvme",		STARTFILE_MVME_SPEC },			\
+@@ -884,6 +924,8 @@
+   { "startfile_netbsd",		STARTFILE_NETBSD_SPEC },		\
+   { "startfile_openbsd",	STARTFILE_OPENBSD_SPEC },		\
+   { "startfile_default",	STARTFILE_DEFAULT_SPEC },		\
++  { "endfile_ogc",		ENDFILE_OGC_SPEC },			\
++  { "endfile_wup",		ENDFILE_WUP_SPEC },			\
+   { "endfile_ads",		ENDFILE_ADS_SPEC },			\
+   { "endfile_yellowknife",	ENDFILE_YELLOWKNIFE_SPEC },		\
+   { "endfile_mvme",		ENDFILE_MVME_SPEC },			\
+@@ -895,7 +937,12 @@
+   { "endfile_default",		ENDFILE_DEFAULT_SPEC },			\
+   { "link_shlib",		LINK_SHLIB_SPEC },			\
+   { "link_start",		LINK_START_SPEC },			\
++  { "link_start_vgc",		LINK_START_VGC_SPEC },			\
++  { "link_start_gcb",		LINK_START_GCB_SPEC },			\
++  { "link_start_rvl",		LINK_START_RVL_SPEC },			\
++  { "link_start_wup",		LINK_START_WUP_SPEC },			\
+   { "link_start_ads",		LINK_START_ADS_SPEC },			\
++  { "link_start_ogc",		LINK_START_OGC_SPEC },			\
+   { "link_start_yellowknife",	LINK_START_YELLOWKNIFE_SPEC },		\
+   { "link_start_mvme",		LINK_START_MVME_SPEC },			\
+   { "link_start_sim",		LINK_START_SIM_SPEC },			\
+@@ -905,6 +952,8 @@
+   { "link_start_openbsd",	LINK_START_OPENBSD_SPEC },		\
+   { "link_start_default",	LINK_START_DEFAULT_SPEC },		\
+   { "link_os",			LINK_OS_SPEC },				\
++  { "link_os_ogc",		LINK_OS_OGC_SPEC },			\
++  { "link_os_wup",		LINK_OS_WUP_SPEC },			\
+   { "link_os_ads",		LINK_OS_ADS_SPEC },			\
+   { "link_os_yellowknife",	LINK_OS_YELLOWKNIFE_SPEC },		\
+   { "link_os_mvme",		LINK_OS_MVME_SPEC },			\
+@@ -916,6 +965,10 @@
+   { "link_os_default",		LINK_OS_DEFAULT_SPEC },			\
+   { "cc1_secure_plt_default",	CC1_SECURE_PLT_DEFAULT_SPEC },		\
+   { "link_secure_plt",		LINK_SECURE_PLT_SPEC },			\
++  { "cpp_os_gcn",		CPP_OS_GCN_SPEC },			\
++  { "cpp_os_ogc",		CPP_OS_OGC_SPEC },			\
++  { "cpp_os_rvl",		CPP_OS_RVL_SPEC },			\
++  { "cpp_os_wup",		CPP_OS_WUP_SPEC },			\
+   { "cpp_os_ads",		CPP_OS_ADS_SPEC },			\
+   { "cpp_os_yellowknife",	CPP_OS_YELLOWKNIFE_SPEC },		\
+   { "cpp_os_mvme",		CPP_OS_MVME_SPEC },			\
+diff -NBaur gcc-6.3.0/gcc/config/rs6000/sysv4.opt gcc-6.3.0-ppc/gcc/config/rs6000/sysv4.opt
+--- gcc-6.3.0/gcc/config/rs6000/sysv4.opt	2016-01-04 14:30:50.000000000 +0000
++++ gcc-6.3.0-ppc/gcc/config/rs6000/sysv4.opt	2017-01-05 02:42:41.984000000 +0000
+@@ -120,6 +120,30 @@
+ Target RejectNegative
+ Link with libads.a, libc.a and crt0.o.
+ 
++mgcn
++Target RejectNegative
++Link with libsysbase.a and libc.a, use ogc linker script 
++
++mogc
++Target RejectNegative
++Link with libsysbase.a and libc.a, use ogc linker script 
++
++mgcbios
++Target RejectNegative
++Link with libsysbase.a and libc.a, use gcbogc linker script 
++
++mvgc
++Target RejectNegative
++Link with libsysbase.a and libc.a, use gcbogc linker script 
++
++mrvl
++Target RejectNegative
++Link with libsysbase.a and libc.a, use rvl linker script 
++
++mwup
++Target RejectNegative
++Link with libsysbase.a and libc.a, use wup linker script 
++
+ myellowknife
+ Target RejectNegative
+ Link with libyk.a, libc.a and crt0.o.
+diff -NBaur gcc-6.3.0/gcc/config.gcc gcc-6.3.0-ppc/gcc/config.gcc
+--- gcc-6.3.0/gcc/config.gcc	2016-11-07 21:38:43.000000000 +0000
++++ gcc-6.3.0-ppc/gcc/config.gcc	2017-01-05 02:42:41.984000000 +0000
+@@ -2390,7 +2390,7 @@
+ 	use_gcc_stdint=wrap
+ 	;;
+ powerpc-*-eabi*)
+-	tm_file="${tm_file} dbxelf.h elfos.h usegas.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h"
++	tm_file="${tm_file} dbxelf.h elfos.h usegas.h freebsd-spec.h newlib-stdint.h rs6000/sysv4.h rs6000/eabi.h rs6000/e500.h rs6000/750cl.h"
+ 	extra_options="${extra_options} rs6000/sysv4.opt"
+ 	tmake_file="rs6000/t-fprules rs6000/t-ppcgas rs6000/t-ppccomm"
+ 	use_gcc_stdint=wrap
+diff -NBaur gcc-6.3.0/gcc/Makefile.in gcc-6.3.0-ppc/gcc/Makefile.in
+--- gcc-6.3.0/gcc/Makefile.in	2016-11-22 17:33:07.000000000 +0000
++++ gcc-6.3.0-ppc/gcc/Makefile.in	2017-01-05 02:42:41.988000000 +0000
+@@ -1073,8 +1073,8 @@
+ # things like the go/%.o rule work properly; but we use $(*F) for the
+ # file part, as we just want the file part of the stem, not the entire
+ # file name.
+-COMPILE = $(COMPILE.base) -MT $@ -MMD -MP -MF $(@D)/$(DEPDIR)/$(*F).TPo
+-POSTCOMPILE = @mv $(@D)/$(DEPDIR)/$(*F).TPo $(@D)/$(DEPDIR)/$(*F).Po
++COMPILE = $(COMPILE.base)
++POSTCOMPILE =
+ else
+ COMPILE = source='$<' object='$@' libtool=no \
+     DEPDIR=$(DEPDIR) $(CXXDEPMODE) $(depcomp) $(COMPILE.base)
+diff -NBaur gcc-6.3.0/libcpp/Makefile.in gcc-6.3.0-ppc/libcpp/Makefile.in
+--- gcc-6.3.0/libcpp/Makefile.in	2016-12-21 07:53:39.000000000 +0000
++++ gcc-6.3.0-ppc/libcpp/Makefile.in	2017-01-05 02:42:41.988000000 +0000
+@@ -208,8 +208,7 @@
+ # Note that we put the dependencies into a .Tpo file, then move them
+ # into place if the compile succeeds.  We need this because gcc does
+ # not atomically write the dependency output file.
+-COMPILE = $(COMPILE.base) -o $@ -MT $@ -MMD -MP -MF $(DEPDIR)/$*.Tpo
+-POSTCOMPILE = @mv $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
++COMPILE = $(COMPILE.base) -o $@
+ else
+ COMPILE = source='$<' object='$@' libtool=no DEPDIR=$(DEPDIR) $(DEPMODE) \
+ 	  $(depcomp) $(COMPILE.base)
+diff -NBaur gcc-6.3.0/libgcc/config/rs6000/crtrestvr.S gcc-6.3.0-ppc/libgcc/config/rs6000/crtrestvr.S
+--- gcc-6.3.0/libgcc/config/rs6000/crtrestvr.S	2016-01-04 14:30:50.000000000 +0000
++++ gcc-6.3.0-ppc/libgcc/config/rs6000/crtrestvr.S	2017-01-05 02:42:41.988000000 +0000
+@@ -24,7 +24,7 @@
+ 
+ /* On PowerPC64 Linux, these functions are provided by the linker.  */
+ #ifndef __powerpc64__
+-
++#if 0
+ #undef __ALTIVEC__
+ #define __ALTIVEC__ 1
+ 	#include "ppc-asm.h"
+@@ -85,3 +85,4 @@
+ CFI_ENDPROC
+ 
+ #endif
++#endif
+diff -NBaur gcc-6.3.0/libgcc/config/rs6000/crtsavevr.S gcc-6.3.0-ppc/libgcc/config/rs6000/crtsavevr.S
+--- gcc-6.3.0/libgcc/config/rs6000/crtsavevr.S	2016-01-04 14:30:50.000000000 +0000
++++ gcc-6.3.0-ppc/libgcc/config/rs6000/crtsavevr.S	2017-01-05 02:42:41.988000000 +0000
+@@ -24,7 +24,7 @@
+ 
+ /* On PowerPC64 Linux, these functions are provided by the linker.  */
+ #ifndef __powerpc64__
+-
++#if 0
+ #undef __ALTIVEC__
+ #define __ALTIVEC__ 1
+ 	#include "ppc-asm.h"
+@@ -85,3 +85,4 @@
+ CFI_ENDPROC
+ 
+ #endif
++#endif
+diff -NBaur gcc-6.3.0/libgcc/crtstuff.c gcc-6.3.0-ppc/libgcc/crtstuff.c
+--- gcc-6.3.0/libgcc/crtstuff.c	2016-01-04 14:30:50.000000000 +0000
++++ gcc-6.3.0-ppc/libgcc/crtstuff.c	2017-01-05 02:42:41.988000000 +0000
+@@ -47,6 +47,7 @@
+ 
+ /* Target machine header files require this define. */
+ #define IN_LIBGCC2
++#define USED_FOR_TARGET
+ 
+ /* FIXME: Including auto-host is incorrect, but until we have
+    identified the set of defines that need to go into auto-target.h,

dkppc/scripts/build-gcc.sh

@@ -45,8 +45,9 @@ cd mn10200/binutils
 
 if [ ! -f configured-binutils ]
 then
-	CFLAGS=$cflags LDFLAGS=$ldflags ../../binutils-$BINUTILS_VER/configure \
+	CFLAGS=$cflags LDFLAGS=$ldflags ../../binutils-$MN_BINUTILS_VER/configure \
 	--prefix=$prefix --target=mn10200 --disable-nls --disable-debug \
+	--disable-multilib \
 	--disable-werror $CROSS_PARAMS \
 	|| { echo "Error configuing mn10200 binutils"; exit 1; }
 	touch configured-binutils
@@ -74,7 +75,13 @@ cd $target/gcc
 
 if [ ! -f configured-gcc ]
 then
-	CFLAGS="$cflags" CXXFLAGS="$cflags" LDFLAGS="$ldflags" CFLAGS_FOR_TARGET="-O2" CXXFLAGS_FOR_TARGET="-O2" LDFLAGS_FOR_TARGET="" ../../gcc-$GCC_VER/configure \
+	CFLAGS="$cflags" \
+	CXXFLAGS="$cflags" \
+	LDFLAGS="$ldflags" \
+	CFLAGS_FOR_TARGET="-O2 -ffunction-sections -fdata-sections" \
+	CXXFLAGS_FOR_TARGET="-O2 -ffunction-sections -fdata-sections" \
+	LDFLAGS_FOR_TARGET="" \
+	../../gcc-$GCC_VER/configure \
 	--enable-languages=c,c++,objc \
 	--enable-lto $plugin_ld \
 	--with-cpu=750 \
@@ -87,7 +94,8 @@ then
 	--with-newlib \
 	--with-headers=../../newlib-$NEWLIB_VER/newlib/libc/include \
 	--prefix=$prefix\
-	--with-bugurl="http://wiki.devkitpro.org/index.php/Bug_Reports" --with-pkgversion="devkitPPC release 28" \
+	--with-system-zlib\
+	--with-bugurl="http://wiki.devkitpro.org/index.php/Bug_Reports" --with-pkgversion="devkitPPC release 29-1" \
 	$CROSS_PARAMS \
 	|| { echo "Error configuring gcc stage 1"; exit 1; }
 	touch configured-gcc
@@ -117,6 +125,7 @@ unset LDFLAGS
 
 if [ ! -f configured-newlib ]
 then
+	CFLAGS_FOR_TARGET="-O2 -ffunction-sections -fdata-sections" \
 	../../newlib-$NEWLIB_VER/configure \
 	--target=$target \
 	--prefix=$prefix \
@@ -133,7 +142,7 @@ then
 fi
 if [ ! -f installed-newlib ]
 then
-	$MAKE install || { echo "Error installing newlib"; exit 1; }
+	$MAKE install -j1 || { echo "Error installing newlib"; exit 1; }
 	touch installed-newlib
 fi
 

dkpsp/patches/gcc-4.6.3.patch

@@ -1,843 +0,0 @@
-diff -Nbaur gcc-4.6.3/config.sub gcc-4.6.3-psp/config.sub
---- gcc-4.6.3/config.sub	2010-05-25 14:22:07.000000000 +0100
-+++ gcc-4.6.3-psp/config.sub	2012-04-04 22:37:30.000000000 +0100
-@@ -279,6 +279,7 @@
- 	| mipsisa64sb1 | mipsisa64sb1el \
- 	| mipsisa64sr71k | mipsisa64sr71kel \
- 	| mipstx39 | mipstx39el \
-+	| mipsallegrex | mipsallegrexel \
- 	| mn10200 | mn10300 \
- 	| moxie \
- 	| mt \
-@@ -375,6 +376,7 @@
- 	| mipsisa64sb1-* | mipsisa64sb1el-* \
- 	| mipsisa64sr71k-* | mipsisa64sr71kel-* \
- 	| mipstx39-* | mipstx39el-* \
-+	| mipsallegrex-* | mipsallegrexel-* \
- 	| mmix-* \
- 	| mt-* \
- 	| msp430-* \
-@@ -771,6 +773,10 @@
- 		basic_machine=m68k-atari
- 		os=-mint
- 		;;
-+	psp)
-+		basic_machine=mipsallegrexel-psp
-+		os=-elf
-+		;;
- 	mips3*-*)
- 		basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`
- 		;;
-diff -Nbaur gcc-4.6.3/gcc/config/mips/allegrex.md gcc-4.6.3-psp/gcc/config/mips/allegrex.md
---- gcc-4.6.3/gcc/config/mips/allegrex.md	1970-01-01 01:00:00.000000000 +0100
-+++ gcc-4.6.3-psp/gcc/config/mips/allegrex.md	2012-04-04 22:37:30.000000000 +0100
-@@ -0,0 +1,191 @@
-+;; Sony ALLEGREX instructions.
-+;; Copyright (C) 2005 Free Software Foundation, Inc.
-+;;
-+;; This file is part of GCC.
-+;;
-+;; GCC is free software; you can redistribute it and/or modify
-+;; it under the terms of the GNU General Public License as published by
-+;; the Free Software Foundation; either version 2, or (at your option)
-+;; any later version.
-+;;
-+;; GCC is distributed in the hope that it will be useful,
-+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
-+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+;; GNU General Public License for more details.
-+;;
-+;; You should have received a copy of the GNU General Public License
-+;; along with GCC; see the file COPYING.  If not, write to
-+;; the Free Software Foundation, 59 Temple Place - Suite 330,
-+;; Boston, MA 02111-1307, USA.
-+
-+(define_c_enum "unspec" [
-+  UNSPEC_WSBH
-+  UNSPEC_CLO
-+  UNSPEC_CTO
-+  UNSPEC_CACHE
-+  UNSPEC_CEIL_W_S
-+  UNSPEC_FLOOR_W_S
-+  UNSPEC_ROUND_W_S
-+])
-+
-+;; Multiply Add and Subtract.
-+;; Note: removed clobbering for madd and msub (testing needed)
-+
-+(define_insn "allegrex_madd"
-+  [(set (match_operand:SI 0 "register_operand" "+l")
-+       (plus:SI (mult:SI (match_operand:SI 1 "register_operand" "d")
-+             (match_operand:SI 2 "register_operand" "d"))
-+        (match_dup 0)))]
-+  "TARGET_ALLEGREX"
-+  "madd\t%1,%2"
-+  [(set_attr "type"    "imadd")
-+   (set_attr "mode"    "SI")])
-+
-+(define_insn "allegrex_msub"
-+  [(set (match_operand:SI 0 "register_operand" "+l")
-+       (minus:SI (match_dup 0)
-+         (mult:SI (match_operand:SI 1 "register_operand" "d")
-+              (match_operand:SI 2 "register_operand" "d"))))]
-+  "TARGET_ALLEGREX"
-+  "msub\t%1,%2"
-+  [(set_attr "type"    "imadd")
-+   (set_attr "mode"    "SI")])
-+
-+
-+;; Min and max.
-+
-+(define_insn "sminsi3"
-+  [(set (match_operand:SI 0 "register_operand" "=d")
-+        (smin:SI (match_operand:SI 1 "register_operand" "d")
-+                 (match_operand:SI 2 "register_operand" "d")))]
-+  "TARGET_ALLEGREX"
-+  "min\t%0,%1,%2"
-+  [(set_attr "type"    "arith")
-+   (set_attr "mode"    "SI")])
-+
-+(define_insn "smaxsi3"
-+  [(set (match_operand:SI 0 "register_operand" "=d")
-+        (smax:SI (match_operand:SI 1 "register_operand" "d")
-+                 (match_operand:SI 2 "register_operand" "d")))]
-+  "TARGET_ALLEGREX"
-+  "max\t%0,%1,%2"
-+  [(set_attr "type"    "arith")
-+   (set_attr "mode"    "SI")])
-+
-+
-+;; Extended shift instructions.
-+
-+(define_insn "allegrex_bitrev"
-+  [(set (match_operand:SI 0 "register_operand" "=d")
-+   (unspec:SI [(match_operand:SI 1 "register_operand" "d")]
-+          UNSPEC_BITREV))]
-+  "TARGET_ALLEGREX"
-+  "bitrev\t%0,%1"
-+  [(set_attr "type"    "arith")
-+   (set_attr "mode"    "SI")])
-+
-+(define_insn "allegrex_wsbh"
-+  [(set (match_operand:SI 0 "register_operand" "=d")
-+   (unspec:SI [(match_operand:SI 1 "register_operand" "d")]
-+          UNSPEC_WSBH))]
-+  "TARGET_ALLEGREX"
-+  "wsbh\t%0,%1"
-+  [(set_attr "type"    "arith")
-+   (set_attr "mode"    "SI")])
-+
-+(define_insn "bswapsi2"
-+  [(set (match_operand:SI 0 "register_operand" "=d")
-+   (bswap:SI (match_operand:SI 1 "register_operand" "d")))]
-+  "TARGET_ALLEGREX"
-+  "wsbw\t%0,%1"
-+  [(set_attr "type"    "shift")
-+   (set_attr "mode"    "SI")])
-+
-+
-+;; Count leading ones, count trailing zeros, and count trailing ones (clz is
-+;; already defined).
-+
-+(define_insn "allegrex_clo"
-+  [(set (match_operand:SI 0 "register_operand" "=d")
-+       (unspec:SI [(match_operand:SI 1 "register_operand" "d")]
-+          UNSPEC_CLO))]
-+  "TARGET_ALLEGREX"
-+  "clo\t%0,%1"
-+  [(set_attr "type"    "clz")
-+   (set_attr "mode"    "SI")])
-+
-+(define_expand "ctzsi2"
-+  [(set (match_operand:SI 0 "register_operand")
-+       (ctz:SI (match_operand:SI 1 "register_operand")))]
-+  "TARGET_ALLEGREX"
-+{
-+  rtx r1;
-+
-+  r1 = gen_reg_rtx (SImode);
-+  emit_insn (gen_allegrex_bitrev (r1, operands[1]));
-+  emit_insn (gen_clzsi2 (operands[0], r1));
-+  DONE;
-+})
-+
-+(define_expand "allegrex_cto"
-+  [(set (match_operand:SI 0 "register_operand")
-+       (unspec:SI [(match_operand:SI 1 "register_operand")]
-+          UNSPEC_CTO))]
-+  "TARGET_ALLEGREX"
-+{
-+  rtx r1;
-+
-+  r1 = gen_reg_rtx (SImode);
-+  emit_insn (gen_allegrex_bitrev (r1, operands[1]));
-+  emit_insn (gen_allegrex_clo (operands[0], r1));
-+  DONE;
-+})
-+
-+
-+;; Misc.
-+
-+(define_insn "allegrex_sync"
-+  [(unspec_volatile [(const_int 0)] UNSPEC_SYNC)]
-+  "TARGET_ALLEGREX"
-+  "sync"
-+  [(set_attr "type"    "unknown")
-+   (set_attr "mode"    "none")])
-+
-+(define_insn "allegrex_cache"
-+  [(unspec_volatile [(match_operand:SI 0 "const_int_operand" "")
-+            (match_operand:SI 1 "register_operand" "d")]
-+           UNSPEC_CACHE)]
-+  "TARGET_ALLEGREX"
-+  "cache\t%0,0(%1)"
-+  [(set_attr "type"    "unknown")
-+   (set_attr "mode"    "none")])
-+
-+
-+;; Floating-point builtins.
-+
-+(define_insn "allegrex_ceil_w_s"
-+  [(set (match_operand:SI 0 "register_operand" "=f")
-+       (unspec:SI [(match_operand:SF 1 "register_operand" "f")]
-+          UNSPEC_CEIL_W_S))]
-+  "TARGET_ALLEGREX"
-+  "ceil.w.s\t%0,%1"
-+  [(set_attr "type"    "fcvt")
-+   (set_attr "mode"    "SF")])
-+
-+(define_insn "allegrex_floor_w_s"
-+  [(set (match_operand:SI 0 "register_operand" "=f")
-+       (unspec:SI [(match_operand:SF 1 "register_operand" "f")]
-+          UNSPEC_FLOOR_W_S))]
-+  "TARGET_ALLEGREX"
-+  "floor.w.s\t%0,%1"
-+  [(set_attr "type"    "fcvt")
-+   (set_attr "mode"    "SF")])
-+
-+(define_insn "allegrex_round_w_s"
-+  [(set (match_operand:SI 0 "register_operand" "=f")
-+       (unspec:SI [(match_operand:SF 1 "register_operand" "f")]
-+          UNSPEC_ROUND_W_S))]
-+  "TARGET_ALLEGREX"
-+  "round.w.s\t%0,%1"
-+  [(set_attr "type"    "fcvt")
-+   (set_attr "mode"    "SF")])
-diff -Nbaur gcc-4.6.3/gcc/config/mips/mips-ftypes.def gcc-4.6.3-psp/gcc/config/mips/mips-ftypes.def
---- gcc-4.6.3/gcc/config/mips/mips-ftypes.def	2009-02-20 15:20:38.000000000 +0000
-+++ gcc-4.6.3-psp/gcc/config/mips/mips-ftypes.def	2012-04-04 22:37:31.000000000 +0100
-@@ -53,9 +53,12 @@
- 
- DEF_MIPS_FTYPE (2, (SI, DI, SI))
- DEF_MIPS_FTYPE (2, (SI, POINTER, SI))
-+DEF_MIPS_FTYPE (1, (SI, HI))
-+DEF_MIPS_FTYPE (1, (SI, SF))
- DEF_MIPS_FTYPE (1, (SI, SI))
- DEF_MIPS_FTYPE (2, (SI, SI, SI))
- DEF_MIPS_FTYPE (3, (SI, SI, SI, SI))
-+DEF_MIPS_FTYPE (1, (SI, QI))
- DEF_MIPS_FTYPE (1, (SI, V2HI))
- DEF_MIPS_FTYPE (2, (SI, V2HI, V2HI))
- DEF_MIPS_FTYPE (1, (SI, V4QI))
-@@ -124,3 +127,4 @@
- DEF_MIPS_FTYPE (2, (VOID, SI, SI))
- DEF_MIPS_FTYPE (2, (VOID, V2HI, V2HI))
- DEF_MIPS_FTYPE (2, (VOID, V4QI, V4QI))
-+DEF_MIPS_FTYPE (1, (VOID, VOID))
-diff -Nbaur gcc-4.6.3/gcc/config/mips/mips.c gcc-4.6.3-psp/gcc/config/mips/mips.c
---- gcc-4.6.3/gcc/config/mips/mips.c	2011-05-29 18:48:14.000000000 +0100
-+++ gcc-4.6.3-psp/gcc/config/mips/mips.c	2012-04-04 22:37:31.000000000 +0100
-@@ -239,7 +239,12 @@
-   MIPS_BUILTIN_CMP_SINGLE,
- 
-   /* For generating bposge32 branch instructions in MIPS32 DSP ASE.  */
--  MIPS_BUILTIN_BPOSGE32
-+  MIPS_BUILTIN_BPOSGE32,
-+
-+  /* The builtin corresponds to the ALLEGREX cache instruction.  Operand 0
-+     is the function code (must be less than 32) and operand 1 is the base
-+     address.  */
-+  MIPS_BUILTIN_CACHE
- };
- 
- /* Invoke MACRO (COND) for each C.cond.fmt condition.  */
-@@ -516,6 +521,10 @@
-    normal branch.  */
- static bool mips_branch_likely;
- 
-+/* Preferred stack boundary for proper stack vars alignment */
-+unsigned int mips_preferred_stack_boundary;
-+unsigned int mips_preferred_stack_align;
-+
- /* The current instruction-set architecture.  */
- enum processor mips_arch;
- const struct mips_cpu_info *mips_arch_info;
-@@ -691,6 +700,7 @@
- 
-   /* MIPS II processors.  */
-   { "r6000", PROCESSOR_R6000, 2, 0 },
-+  { "allegrex", PROCESSOR_ALLEGREX, 2, 0 },
- 
-   /* MIPS III processors.  */
-   { "r4000", PROCESSOR_R4000, 3, 0 },
-@@ -969,6 +979,9 @@
- 		     1,           /* branch_cost */
- 		     4            /* memory_latency */
-   },
-+  { /* Allegrex */
-+    DEFAULT_COSTS
-+  },
-   { /* Loongson-2E */
-     DEFAULT_COSTS
-   },
-@@ -12605,6 +12618,7 @@
- AVAIL_NON_MIPS16 (dspr2_32, !TARGET_64BIT && TARGET_DSPR2)
- AVAIL_NON_MIPS16 (loongson, TARGET_LOONGSON_VECTORS)
- AVAIL_NON_MIPS16 (cache, TARGET_CACHE_BUILTIN)
-+AVAIL_NON_MIPS16 (allegrex, TARGET_ALLEGREX)
- 
- /* Construct a mips_builtin_description from the given arguments.
- 
-@@ -12701,6 +12715,30 @@
-   MIPS_BUILTIN (bposge, f, "bposge" #VALUE,				\
- 		MIPS_BUILTIN_BPOSGE ## VALUE, MIPS_SI_FTYPE_VOID, AVAIL)
- 
-+/* Define a MIPS_BUILTIN_DIRECT function for instruction CODE_FOR_allegrex_<INSN>.
-+   FUNCTION_TYPE and TARGET_FLAGS are builtin_description fields.  */
-+#define DIRECT_ALLEGREX_BUILTIN(INSN, FUNCTION_TYPE, TARGET_FLAGS) \
-+  { CODE_FOR_allegrex_ ## INSN, MIPS_FP_COND_f, "__builtin_allegrex_" #INSN,        \
-+    MIPS_BUILTIN_DIRECT, FUNCTION_TYPE, mips_builtin_avail_allegrex }
-+
-+/* Same as the above, but mapped to an instruction that doesn't share the
-+   NAME.  NAME is the name of the builtin without the builtin prefix.  */
-+#define DIRECT_ALLEGREX_NAMED_BUILTIN(NAME, INSN, FUNCTION_TYPE, TARGET_FLAGS) \
-+  { CODE_FOR_ ## INSN, MIPS_FP_COND_f, "__builtin_allegrex_" #NAME,             \
-+    MIPS_BUILTIN_DIRECT, FUNCTION_TYPE, mips_builtin_avail_allegrex }
-+
-+/* Define a MIPS_BUILTIN_DIRECT_NO_TARGET function for instruction
-+   CODE_FOR_allegrex_<INSN>.  FUNCTION_TYPE and TARGET_FLAGS are
-+   builtin_description fields.  */
-+#define DIRECT_ALLEGREX_NO_TARGET_BUILTIN(INSN, FUNCTION_TYPE, TARGET_FLAGS)   \
-+  { CODE_FOR_allegrex_ ## INSN, MIPS_FP_COND_f, "__builtin_allegrex_" #INSN,            \
-+    MIPS_BUILTIN_DIRECT_NO_TARGET, FUNCTION_TYPE, mips_builtin_avail_allegrex }
-+
-+/* Define a builtin with a specific function TYPE.  */
-+#define SPECIAL_ALLEGREX_BUILTIN(TYPE, INSN, FUNCTION_TYPE, TARGET_FLAGS)  \
-+  { CODE_FOR_allegrex_ ## INSN, MIPS_FP_COND_f, "__builtin_allegrex_" #INSN,            \
-+    MIPS_BUILTIN_ ## TYPE, FUNCTION_TYPE, mips_builtin_avail_allegrex }
-+
- /* Define a Loongson MIPS_BUILTIN_DIRECT function __builtin_loongson_<FN_NAME>
-    for instruction CODE_FOR_loongson_<INSN>.  FUNCTION_TYPE is a
-    builtin_description field.  */
-@@ -12945,6 +12983,40 @@
-   DIRECT_BUILTIN (dpsqx_s_w_ph, MIPS_DI_FTYPE_DI_V2HI_V2HI, dspr2_32),
-   DIRECT_BUILTIN (dpsqx_sa_w_ph, MIPS_DI_FTYPE_DI_V2HI_V2HI, dspr2_32),
- 
-+/* Builtin functions for the Sony ALLEGREX processor.
-+
-+   These have the `__builtin_allegrex_' prefix instead of `__builtin_mips_'
-+   to maintain compatibility with Sony's ALLEGREX GCC port.
-+
-+   Some of the builtins may seem redundant, but they are the same as the
-+   builtins defined in the Sony compiler.  I chose to map redundant and
-+   trivial builtins to the original instruction instead of creating
-+   duplicate patterns specifically for the ALLEGREX (as Sony does).  */
-+
-+  DIRECT_ALLEGREX_BUILTIN(bitrev, MIPS_SI_FTYPE_SI, 0),
-+  DIRECT_ALLEGREX_BUILTIN(wsbh, MIPS_SI_FTYPE_SI, 0),
-+  DIRECT_ALLEGREX_NAMED_BUILTIN(wsbw, bswapsi2, MIPS_SI_FTYPE_SI, 0),
-+  DIRECT_ALLEGREX_NAMED_BUILTIN(clz, clzsi2, MIPS_SI_FTYPE_SI, 0),
-+  DIRECT_ALLEGREX_BUILTIN(clo, MIPS_SI_FTYPE_SI, 0),
-+  DIRECT_ALLEGREX_NAMED_BUILTIN(ctz, ctzsi2, MIPS_SI_FTYPE_SI, 0),
-+  DIRECT_ALLEGREX_BUILTIN(cto, MIPS_SI_FTYPE_SI, 0),
-+  DIRECT_ALLEGREX_NAMED_BUILTIN(rotr, rotrsi3, MIPS_SI_FTYPE_SI_SI, 0),
-+  DIRECT_ALLEGREX_NAMED_BUILTIN(rotl, rotlsi3, MIPS_SI_FTYPE_SI_SI, 0),
-+
-+  DIRECT_ALLEGREX_NAMED_BUILTIN(seb, extendqisi2, MIPS_SI_FTYPE_QI, 0),
-+  DIRECT_ALLEGREX_NAMED_BUILTIN(seh, extendhisi2, MIPS_SI_FTYPE_HI, 0),
-+  DIRECT_ALLEGREX_NAMED_BUILTIN(max, smaxsi3, MIPS_SI_FTYPE_SI_SI, 0),
-+  DIRECT_ALLEGREX_NAMED_BUILTIN(min, sminsi3, MIPS_SI_FTYPE_SI_SI, 0),
-+
-+  DIRECT_ALLEGREX_NO_TARGET_BUILTIN(sync, MIPS_VOID_FTYPE_VOID, 0),
-+  SPECIAL_ALLEGREX_BUILTIN(CACHE, cache, MIPS_VOID_FTYPE_SI_SI, 0),
-+
-+  DIRECT_ALLEGREX_NAMED_BUILTIN(sqrt_s, sqrtsf2, MIPS_SF_FTYPE_SF, 0),
-+  DIRECT_ALLEGREX_BUILTIN(ceil_w_s, MIPS_SI_FTYPE_SF, 0),
-+  DIRECT_ALLEGREX_BUILTIN(floor_w_s, MIPS_SI_FTYPE_SF, 0),
-+  DIRECT_ALLEGREX_BUILTIN(round_w_s, MIPS_SI_FTYPE_SF, 0),
-+  DIRECT_ALLEGREX_NAMED_BUILTIN(trunc_w_s, fix_truncsfsi2_insn, MIPS_SI_FTYPE_SF, 0),
-+
-   /* Builtin functions for ST Microelectronics Loongson-2E/2F cores.  */
-   LOONGSON_BUILTIN (packsswh, MIPS_V4HI_FTYPE_V2SI_V2SI),
-   LOONGSON_BUILTIN (packsshb, MIPS_V8QI_FTYPE_V4HI_V4HI),
-@@ -13096,6 +13168,8 @@
- /* Standard mode-based argument types.  */
- #define MIPS_ATYPE_UQI unsigned_intQI_type_node
- #define MIPS_ATYPE_SI intSI_type_node
-+#define MIPS_ATYPE_HI intHI_type_node
-+#define MIPS_ATYPE_QI intQI_type_node
- #define MIPS_ATYPE_USI unsigned_intSI_type_node
- #define MIPS_ATYPE_DI intDI_type_node
- #define MIPS_ATYPE_UDI unsigned_intDI_type_node
-@@ -13270,6 +13344,9 @@
- 
-   switch (opno)
-     {
-+    case 0:
-+      emit_insn (GEN_FCN (icode) (0));
-+      break;
-     case 2:
-       emit_insn (GEN_FCN (icode) (ops[0], ops[1]));
-       break;
-@@ -13439,6 +13516,28 @@
- 				       const1_rtx, const0_rtx);
- }
- 
-+/* Expand a __builtin_allegrex_cache() function.  Make sure the passed
-+   cache function code is less than 32.  */
-+
-+static rtx
-+mips_expand_builtin_cache (enum insn_code icode, rtx target, tree exp)
-+{
-+  rtx op0, op1;
-+
-+  op0 = mips_prepare_builtin_arg (icode, 0, exp, 0);
-+  op1 = mips_prepare_builtin_arg (icode, 1, exp, 1);
-+
-+  if (GET_CODE (op0) == CONST_INT)
-+    if (INTVAL (op0) < 0 || INTVAL (op0) > 0x1f)
-+      {
-+   error ("invalid function code '%d'", INTVAL (op0));
-+   return const0_rtx;
-+      }
-+
-+  emit_insn (GEN_FCN (icode) (op0, op1));
-+  return target;
-+}
-+
- /* Implement TARGET_EXPAND_BUILTIN.  */
- 
- static rtx
-@@ -13484,6 +13583,9 @@
- 
-     case MIPS_BUILTIN_BPOSGE32:
-       return mips_expand_builtin_bposge (d->builtin_type, target);
-+
-+    case MIPS_BUILTIN_CACHE:
-+      return mips_expand_builtin_cache (d->icode, target, exp);
-     }
-   gcc_unreachable ();
- }
-@@ -15918,6 +16020,22 @@
-      Do all CPP-sensitive stuff in non-MIPS16 mode; we'll switch to
-      MIPS16 mode afterwards if need be.  */
-   mips_set_mips16_mode (false);
-+
-+  /* Validate -mpreferred-stack-boundary= value, or provide default.
-+     The default of 128-bit is for newABI else 64-bit.  */
-+  mips_preferred_stack_boundary = (TARGET_NEWABI ? 128 : 64);
-+  mips_preferred_stack_align = (TARGET_NEWABI ? 16 : 8);
-+  if (mips_preferred_stack_boundary_string)
-+    {
-+      i = atoi (mips_preferred_stack_boundary_string);
-+      if (i < 2 || i > 12)
-+       error ("-mpreferred-stack-boundary=%d is not between 2 and 12", i);
-+      else
-+        {
-+          mips_preferred_stack_align = (1 << i);
-+          mips_preferred_stack_boundary = mips_preferred_stack_align * 8;
-+        }
-+    }
- }
- 
- /* Implement TARGET_OPTION_OPTIMIZATION_TABLE.  */
-diff -Nbaur gcc-4.6.3/gcc/config/mips/mips.h gcc-4.6.3-psp/gcc/config/mips/mips.h
---- gcc-4.6.3/gcc/config/mips/mips.h	2011-03-08 20:51:11.000000000 +0000
-+++ gcc-4.6.3-psp/gcc/config/mips/mips.h	2012-04-04 22:37:31.000000000 +0100
-@@ -231,6 +231,7 @@
- #define TARGET_SB1                  (mips_arch == PROCESSOR_SB1		\
- 				     || mips_arch == PROCESSOR_SB1A)
- #define TARGET_SR71K                (mips_arch == PROCESSOR_SR71000)
-+#define TARGET_ALLEGREX             (mips_arch == PROCESSOR_ALLEGREX)
- 
- /* Scheduling target defines.  */
- #define TUNE_20KC		    (mips_tune == PROCESSOR_20KC)
-@@ -258,6 +259,7 @@
- #define TUNE_OCTEON		    (mips_tune == PROCESSOR_OCTEON)
- #define TUNE_SB1                    (mips_tune == PROCESSOR_SB1		\
- 				     || mips_tune == PROCESSOR_SB1A)
-+#define TUNE_ALLEGREX               (mips_tune == PROCESSOR_ALLEGREX)
- 
- /* Whether vector modes and intrinsics for ST Microelectronics
-    Loongson-2E/2F processors should be enabled.  In o32 pairs of
-@@ -852,6 +854,9 @@
- /* ISA has LDC1 and SDC1.  */
- #define ISA_HAS_LDC1_SDC1	(!ISA_MIPS1 && !TARGET_MIPS16)
- 
-+/* ISA has just the integer condition move instructions (movn,movz) */
-+#define ISA_HAS_INT_CONDMOVE   (TARGET_ALLEGREX)
-+
- /* ISA has the mips4 FP condition code instructions: FP-compare to CC,
-    branch on CC, and move (both FP and non-FP) on CC.  */
- #define ISA_HAS_8CC		(ISA_MIPS4				\
-@@ -874,6 +879,7 @@
- 
- /* ISA has conditional trap instructions.  */
- #define ISA_HAS_COND_TRAP	(!ISA_MIPS1				\
-+				 && !TARGET_ALLEGREX				\
- 				 && !TARGET_MIPS16)
- 
- /* ISA has integer multiply-accumulate instructions, madd and msub.  */
-@@ -910,6 +916,7 @@
- /* ISA has count leading zeroes/ones instruction (not implemented).  */
- #define ISA_HAS_CLZ_CLO		((ISA_MIPS32				\
- 				  || ISA_MIPS32R2			\
-+				  || TARGET_ALLEGREX		\
- 				  || ISA_MIPS64				\
- 				  || ISA_MIPS64R2)			\
- 				 && !TARGET_MIPS16)
-@@ -955,6 +962,7 @@
- 				  || TARGET_MIPS5400			\
- 				  || TARGET_MIPS5500			\
- 				  || TARGET_SR71K			\
-+				  || TARGET_ALLEGREX			\
- 				  || TARGET_SMARTMIPS)			\
- 				 && !TARGET_MIPS16)
- 
-@@ -984,11 +992,13 @@
- 
- /* ISA includes the MIPS32r2 seb and seh instructions.  */
- #define ISA_HAS_SEB_SEH		((ISA_MIPS32R2		\
-+				  || TARGET_ALLEGREX	\
- 				  || ISA_MIPS64R2)	\
- 				 && !TARGET_MIPS16)
- 
- /* ISA includes the MIPS32/64 rev 2 ext and ins instructions.  */
- #define ISA_HAS_EXT_INS		((ISA_MIPS32R2		\
-+				  || TARGET_ALLEGREX	\
- 				  || ISA_MIPS64R2)	\
- 				 && !TARGET_MIPS16)
- 
-@@ -1038,7 +1048,8 @@
- 				 || ISA_MIPS64				\
- 				 || ISA_MIPS64R2			\
- 				 || TARGET_MIPS5500			\
--				 || TARGET_LOONGSON_2EF)
-+				 || TARGET_LOONGSON_2EF		\
-+				 || TARGET_ALLEGREX)
- 
- /* ISA includes synci, jr.hb and jalr.hb.  */
- #define ISA_HAS_SYNCI ((ISA_MIPS32R2		\
-@@ -2133,7 +2144,7 @@
-    `crtl->outgoing_args_size'.  */
- #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
- 
--#define STACK_BOUNDARY (TARGET_NEWABI ? 128 : 64)
-+#define STACK_BOUNDARY (mips_preferred_stack_boundary)
- 
- /* Symbolic macros for the registers used to return integer and floating
-    point values.  */
-@@ -2259,7 +2270,7 @@
- /* Treat LOC as a byte offset from the stack pointer and round it up
-    to the next fully-aligned offset.  */
- #define MIPS_STACK_ALIGN(LOC) \
--  (TARGET_NEWABI ? ((LOC) + 15) & -16 : ((LOC) + 7) & -8)
-+  (((LOC) + (mips_preferred_stack_align - 1)) & -(mips_preferred_stack_align))
- 
- 
- /* Output assembler code to FILE to increment profiler label # LABELNO
-@@ -2911,6 +2922,9 @@
- #endif
- #endif
- 
-+extern unsigned int mips_preferred_stack_boundary;
-+extern unsigned int mips_preferred_stack_align;
-+
- #ifndef HAVE_AS_TLS
- #define HAVE_AS_TLS 0
- #endif
-diff -Nbaur gcc-4.6.3/gcc/config/mips/mips.md gcc-4.6.3-psp/gcc/config/mips/mips.md
---- gcc-4.6.3/gcc/config/mips/mips.md	2012-01-09 22:09:53.000000000 +0000
-+++ gcc-4.6.3-psp/gcc/config/mips/mips.md	2012-04-04 22:37:31.000000000 +0100
-@@ -37,6 +37,7 @@
-   74kf2_1
-   74kf1_1
-   74kf3_2
-+  allegrex
-   loongson_2e
-   loongson_2f
-   loongson_3a
-@@ -598,7 +599,7 @@
- ;; This mode iterator allows :MOVECC to be used anywhere that a
- ;; conditional-move-type condition is needed.
- (define_mode_iterator MOVECC [SI (DI "TARGET_64BIT")
--                              (CC "TARGET_HARD_FLOAT && !TARGET_LOONGSON_2EF")])
-+                              (CC "TARGET_HARD_FLOAT && !TARGET_LOONGSON_2EF && !TARGET_ALLEGREX")])
- 
- ;; 32-bit integer moves for which we provide move patterns.
- (define_mode_iterator IMOVE32
-@@ -1885,11 +1886,11 @@
- 	   (mult:DI
- 	      (any_extend:DI (match_operand:SI 1 "register_operand" "d"))
- 	      (any_extend:DI (match_operand:SI 2 "register_operand" "d")))))]
--  "!TARGET_64BIT && (ISA_HAS_MSAC || GENERATE_MADD_MSUB || ISA_HAS_DSP)"
-+  "!TARGET_64BIT && (ISA_HAS_MSAC || GENERATE_MADD_MSUB || ISA_HAS_DSP || TARGET_ALLEGREX)"
- {
-   if (ISA_HAS_DSP_MULT)
-     return "msub<u>\t%q0,%1,%2";
--  else if (TARGET_MIPS5500 || GENERATE_MADD_MSUB)
-+  else if (TARGET_MIPS5500 || GENERATE_MADD_MSUB || TARGET_ALLEGREX)
-     return "msub<u>\t%1,%2";
-   else
-     return "msac<u>\t$0,%1,%2";
-@@ -2066,14 +2067,14 @@
- 	 (mult:DI (any_extend:DI (match_operand:SI 1 "register_operand" "d"))
- 		  (any_extend:DI (match_operand:SI 2 "register_operand" "d")))
- 	 (match_operand:DI 3 "register_operand" "0")))]
--  "(TARGET_MAD || ISA_HAS_MACC || GENERATE_MADD_MSUB || ISA_HAS_DSP)
-+  "(TARGET_MAD || ISA_HAS_MACC || GENERATE_MADD_MSUB || ISA_HAS_DSP || TARGET_ALLEGREX)
-    && !TARGET_64BIT"
- {
-   if (TARGET_MAD)
-     return "mad<u>\t%1,%2";
-   else if (ISA_HAS_DSP_MULT)
-     return "madd<u>\t%q0,%1,%2";
--  else if (GENERATE_MADD_MSUB || TARGET_MIPS5500)
-+  else if (GENERATE_MADD_MSUB || TARGET_MIPS5500 || TARGET_ALLEGREX)
-     return "madd<u>\t%1,%2";
-   else
-     /* See comment in *macc.  */
-@@ -2500,6 +2501,33 @@
- ;;
- ;;  ....................
- ;;
-+;; FIND FIRST BIT INSTRUCTION
-+;;
-+;;  ....................
-+;;
-+
-+(define_expand "ffs<mode>2"
-+  [(set (match_operand:GPR 0 "register_operand" "")
-+   (ffs:GPR (match_operand:GPR 1 "register_operand" "")))]
-+  "ISA_HAS_CLZ_CLO"
-+{
-+  rtx r1, r2, r3, r4;
-+  
-+  r1 = gen_reg_rtx (<MODE>mode);
-+  r2 = gen_reg_rtx (<MODE>mode);
-+  r3 = gen_reg_rtx (<MODE>mode);
-+  r4 = gen_reg_rtx (<MODE>mode);
-+  emit_insn (gen_neg<mode>2 (r1, operands[1]));
-+  emit_insn (gen_and<mode>3 (r2, operands[1], r1));
-+  emit_insn (gen_clz<mode>2 (r3, r2));
-+  emit_move_insn (r4, GEN_INT (GET_MODE_BITSIZE (<MODE>mode)));
-+  emit_insn (gen_sub<mode>3 (operands[0], r4, r3));
-+  DONE;
-+})
-+
-+;;
-+;;  ....................
-+;;
- ;;	NEGATION and ONE'S COMPLEMENT
- ;;
- ;;  ....................
-@@ -2550,6 +2578,25 @@
-   [(set_attr "alu_type" "not")
-    (set_attr "mode" "<MODE>")])
- 
-+(define_expand "rotl<mode>3"
-+  [(set (match_operand:GPR 0 "register_operand")
-+       (rotate:GPR (match_operand:GPR 1 "register_operand")
-+           (match_operand:SI 2 "arith_operand")))]
-+  "ISA_HAS_ROR"
-+{
-+  rtx temp;
-+
-+  if (GET_CODE (operands[2]) == CONST_INT)
-+    temp = GEN_INT (GET_MODE_BITSIZE (<MODE>mode) - INTVAL (operands[2]));
-+  else
-+    {
-+      temp = gen_reg_rtx (<MODE>mode);
-+      emit_insn (gen_neg<mode>2 (temp, operands[2]));
-+    }
-+  emit_insn (gen_rotr<mode>3 (operands[0], operands[1], temp));
-+  DONE;
-+})
-+
- ;;
- ;;  ....................
- ;;
-@@ -6301,7 +6348,7 @@
- 		 (const_int 0)])
- 	 (match_operand:GPR 2 "reg_or_0_operand" "dJ,0")
- 	 (match_operand:GPR 3 "reg_or_0_operand" "0,dJ")))]
--  "ISA_HAS_CONDMOVE"
-+  "ISA_HAS_CONDMOVE || ISA_HAS_INT_CONDMOVE"
-   "@
-     mov%T4\t%0,%z2,%1
-     mov%t4\t%0,%z3,%1"
-@@ -6331,8 +6378,12 @@
- 	(if_then_else:GPR (match_dup 5)
- 			  (match_operand:GPR 2 "reg_or_0_operand")
- 			  (match_operand:GPR 3 "reg_or_0_operand")))]
--  "ISA_HAS_CONDMOVE"
-+  "ISA_HAS_CONDMOVE || ISA_HAS_INT_CONDMOVE"
- {
-+  if (ISA_HAS_INT_CONDMOVE
-+      && GET_MODE_CLASS (GET_MODE (operands[0])) == MODE_FLOAT)
-+    FAIL;
-+
-   mips_expand_conditional_move (operands);
-   DONE;
- })
-@@ -6481,6 +6532,9 @@
- ; ST-Microelectronics Loongson-2E/2F-specific patterns.
- (include "loongson.md")
- 
-+; Sony ALLEGREX instructions.
-+(include "allegrex.md")
-+
- (define_c_enum "unspec" [
-   UNSPEC_ADDRESS_FIRST
- ])
-diff -Nbaur gcc-4.6.3/gcc/config/mips/mips.opt gcc-4.6.3-psp/gcc/config/mips/mips.opt
---- gcc-4.6.3/gcc/config/mips/mips.opt	2011-02-17 01:59:04.000000000 +0000
-+++ gcc-4.6.3-psp/gcc/config/mips/mips.opt	2012-04-04 22:37:31.000000000 +0100
-@@ -306,5 +306,9 @@
- Target Report Var(TARGET_XGOT)
- Lift restrictions on GOT size
- 
-+mpreferred-stack-boundary=
-+Target RejectNegative Joined Var(mips_preferred_stack_boundary_string)
-+Attempt to keep stack aligned to this power of 2
-+
- noasmopt
- Driver
-diff -Nbaur gcc-4.6.3/gcc/config/mips/psp.h gcc-4.6.3-psp/gcc/config/mips/psp.h
---- gcc-4.6.3/gcc/config/mips/psp.h	1970-01-01 01:00:00.000000000 +0100
-+++ gcc-4.6.3-psp/gcc/config/mips/psp.h	2012-04-04 22:37:31.000000000 +0100
-@@ -0,0 +1,31 @@
-+/* Support for Sony's Playstation Portable (PSP).
-+   Copyright (C) 2005 Free Software Foundation, Inc.
-+   Contributed by Marcus R. Brown <mrbrown@ocgnet.org>
-+
-+This file is part of GCC.
-+
-+GCC is free software; you can redistribute it and/or modify
-+it under the terms of the GNU General Public License as published by
-+the Free Software Foundation; either version 2, or (at your option)
-+any later version.
-+
-+GCC is distributed in the hope that it will be useful,
-+but WITHOUT ANY WARRANTY; without even the implied warranty of
-+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-+GNU General Public License for more details.
-+
-+You should have received a copy of the GNU General Public License
-+along with GCC; see the file COPYING.  If not, write to
-+the Free Software Foundation, 59 Temple Place - Suite 330,
-+Boston, MA 02111-1307, USA.  */
-+
-+/* Override the startfile spec to include crt0.o. */
-+#undef STARTFILE_SPEC
-+#define STARTFILE_SPEC "crt0%O%s crti%O%s crtbegin%O%s"
-+
-+#undef SUBTARGET_CPP_SPEC
-+#define SUBTARGET_CPP_SPEC "-DPSP=1 -D__psp__=1 -D_PSP=1"
-+
-+/* Get rid of the .pdr section. */
-+#undef SUBTARGET_ASM_SPEC
-+#define SUBTARGET_ASM_SPEC "-mno-pdr"
-diff -Nbaur gcc-4.6.3/gcc/config/mips/t-allegrex gcc-4.6.3-psp/gcc/config/mips/t-allegrex
---- gcc-4.6.3/gcc/config/mips/t-allegrex	1970-01-01 01:00:00.000000000 +0100
-+++ gcc-4.6.3-psp/gcc/config/mips/t-allegrex	2012-04-04 22:37:31.000000000 +0100
-@@ -0,0 +1,29 @@
-+# Suppress building libgcc1.a, since the MIPS compiler port is complete
-+# and does not need anything from libgcc1.a.
-+LIBGCC1 =
-+CROSS_LIBGCC1 =
-+
-+EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crti.o crtn.o
-+# Don't let CTOR_LIST end up in sdata section.
-+CRTSTUFF_T_CFLAGS = -G 0
-+
-+# Assemble startup files.
-+$(T)crti.o: $(srcdir)/config/mips/crti.asm $(GCC_PASSES)
-+	$(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
-+	-c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/mips/crti.asm
-+
-+$(T)crtn.o: $(srcdir)/config/mips/crtn.asm $(GCC_PASSES)
-+	$(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
-+	-c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/mips/crtn.asm
-+
-+# We must build libgcc2.a with -G 0, in case the user wants to link
-+# without the $gp register.
-+TARGET_LIBGCC2_CFLAGS = -G 0
-+
-+# Build the libraries for both hard and soft floating point
-+
-+MULTILIB_OPTIONS = 
-+MULTILIB_DIRNAMES = 
-+
-+LIBGCC = stmp-multilib
-+INSTALL_LIBGCC = install-multilib
-diff -Nbaur gcc-4.6.3/gcc/config.gcc gcc-4.6.3-psp/gcc/config.gcc
---- gcc-4.6.3/gcc/config.gcc	2011-07-22 17:44:50.000000000 +0100
-+++ gcc-4.6.3-psp/gcc/config.gcc	2012-04-04 22:37:31.000000000 +0100
-@@ -2033,6 +2033,18 @@
- 	tm_file="elfos.h newlib-stdint.h ${tm_file} mips/r3900.h mips/elf.h"
- 	tmake_file="mips/t-r3900 mips/t-libgcc-mips16"
- 	;;
-+mipsallegrex-*-elf* | mipsallegrexel-*-elf*)
-+   tm_file="elfos.h ${tm_file} mips/elf.h"
-+   tmake_file=mips/t-allegrex
-+   target_cpu_default="MASK_SINGLE_FLOAT|MASK_DIVIDE_BREAKS"
-+   tm_defines="MIPS_ISA_DEFAULT=2 MIPS_CPU_STRING_DEFAULT=\\\"allegrex\\\" MIPS_ABI_DEFAULT=ABI_EABI"
-+   case ${target} in
-+   mipsallegrex*-psp-elf*) 
-+       tm_file="${tm_file} mips/psp.h"
-+       ;;
-+   esac
-+   use_fixproto=yes
-+   ;;
- mmix-knuth-mmixware)
- 	tm_file="${tm_file} newlib-stdint.h"
- 	need_64bit_hwint=yes
-diff -Nbaur gcc-4.6.3/gcc/crtstuff.c gcc-4.6.3-psp/gcc/crtstuff.c
---- gcc-4.6.3/gcc/crtstuff.c	2010-12-23 12:08:21.000000000 +0000
-+++ gcc-4.6.3-psp/gcc/crtstuff.c	2012-04-04 22:37:31.000000000 +0100
-@@ -48,7 +48,7 @@
- 
- /* Target machine header files require this define. */
- #define IN_LIBGCC2
--
-+#define USED_FOR_TARGET
- /* FIXME: Including auto-host is incorrect, but until we have
-    identified the set of defines that need to go into auto-target.h,
-    this will have to do.  */
-diff -Nbaur gcc-4.6.3/libcpp/Makefile.in gcc-4.6.3-psp/libcpp/Makefile.in
---- gcc-4.6.3/libcpp/Makefile.in	2012-03-01 12:03:46.000000000 +0000
-+++ gcc-4.6.3-psp/libcpp/Makefile.in	2012-04-05 09:32:31.000000000 +0100
-@@ -212,8 +212,8 @@
- # Note that we put the dependencies into a .Tpo file, then move them
- # into place if the compile succeeds.  We need this because gcc does
- # not atomically write the dependency output file.
--COMPILE = $(COMPILE.base) -o $@ -MT $@ -MMD -MP -MF $(DEPDIR)/$*.Tpo
--POSTCOMPILE = @mv $(DEPDIR)/$*.Tpo $(DEPDIR)/$*.Po
-+COMPILE = $(COMPILE.base) -o $@
-+POSTCOMPILE =
- else
- COMPILE = source='$<' object='$@' libtool=no DEPDIR=$(DEPDIR) $(DEPMODE) \
- 	  $(depcomp) $(COMPILE.base)
-diff -Nbaur gcc-4.6.3/libgcc/config.host gcc-4.6.3-psp/libgcc/config.host
---- gcc-4.6.3/libgcc/config.host	2011-11-23 22:15:54.000000000 +0000
-+++ gcc-4.6.3-psp/libgcc/config.host	2012-04-04 22:37:31.000000000 +0100
-@@ -436,6 +436,8 @@
- 	;;
- mipstx39-*-elf* | mipstx39el-*-elf*)
- 	;;
-+mips*-psp-elf*)
-+	;;
- mmix-knuth-mmixware)
- 	extra_parts="crti.o crtn.o crtbegin.o crtend.o"
- 	tmake_file="${tmake_file} ${cpu_type}/t-${cpu_type}"

dkpsp/scripts/build-gcc.sh

@@ -1,201 +0,0 @@
-#!/bin/sh
-
-#---------------------------------------------------------------------------------
-# build and install binutils
-#---------------------------------------------------------------------------------
-
-mkdir -p $target/binutils
-cd $target/binutils
-
-if [ ! -f configured-binutils ]
-then
-	CFLAGS=$cflags LDFLAGS=$ldflags ../../binutils-$BINUTILS_VER/configure \
-	--prefix=$prefix --target=$target --disable-nls --disable-debug \
-	--enable-lto --enable-plugins \
-	--enable-poison-system-directories \
-	--disable-dependency-tracking  --disable-werror \
-	$CROSS_PARAMS \
-	|| { echo "Error configuring binutils"; exit 1; }
-	touch configured-binutils
-fi
-
-if [ ! -f built-binutils ]
-then
-	$MAKE || { echo "Error building binutils"; exit 1; }
-	touch built-binutils
-fi
-
-
-if [ ! -f installed-binutils ]
-then
-	$MAKE install || { echo "Error installing binutils"; exit 1; }
-	touch installed-binutils
-fi
-cd $BUILDDIR
-
-#---------------------------------------------------------------------------------
-# build and install just the c compiler
-#---------------------------------------------------------------------------------
-mkdir -p $target/gcc
-cd $target/gcc
-
-
-if [ ! -f configured-gcc ]
-then
-	CFLAGS="$cflags" LDFLAGS="$ldflags" CFLAGS_FOR_TARGET="-O2" LDFLAGS_FOR_TARGET="" ../../gcc-$GCC_VER/configure \
-	--enable-languages=c,c++,objc,obj-c++ \
-	--disable-multilib\
-	--disable-shared --disable-win32-registry --disable-nls\
-	--enable-cxx-flags="-G0" \
-	--disable-libstdcxx-pch \
-	--target=$target \
-	--with-newlib \
-	--with-headers=../../newlib-$NEWLIB_VER/newlib/libc/include \
-	--enable-lto $plugin_ld \
-	--prefix=$prefix \
-	--disable-dependency-tracking \
-	--with-bugurl="http://wiki.devkitpro.org/index.php/Bug_Reports" --with-pkgversion="devkitPSP release 17" \
-	$CROSS_PARAMS \
-	|| { echo "Error configuring gcc"; exit 1; }
-	touch configured-gcc
-fi
-
-
-if [ ! -f built-gcc ]
-then
-	$MAKE all-gcc || { echo "Error building gcc"; exit 1; }
-	touch built-gcc
-fi
-
-
-if [ ! -f installed-gcc ]
-then
-	$MAKE install-gcc || { echo "Error installing gcc"; exit 1; }
-	touch installed-gcc
-fi
-
-unset CFLAGS
-cd $BUILDDIR/pspsdk-$PSPSDK_VER
-
-if [ ! -f bootstrap-sdk ]
-then
-	./bootstrap || { echo "ERROR RUNNING PSPSDK BOOTSTRAP"; exit 1; }
-	touch bootstrap-sdk
-fi
-
-if [ ! -f configured-sdk ]
-then
-	CFLAGS_FOR_HOST=$cflags LDFLAGS=$ldflags ./configure --with-pspdev="$prefix" --disable-dependency-tracking $CROSS_PARAMS || { echo "ERROR RUNNING PSPSDK CONFIGURE"; exit 1; }
-	touch configured-sdk
-fi
-
-if [ ! -f install-sdk-data ]
-then
-	$MAKE install-data || { echo "ERROR INSTALLING PSPSDK HEADERS"; exit 1; }
-	touch install-sdk-data
-fi
-
-cd $BUILDDIR
-
-unset CFLAGS
-unset CFLAGS_FOR_HOST
-unset LDFLAGS
-
-#---------------------------------------------------------------------------------
-# build and install newlib
-#---------------------------------------------------------------------------------
-mkdir -p $target/newlib
-cd $target/newlib
-
-if [ ! -f configured-newlib ]
-then
-	../../newlib-$NEWLIB_VER/configure \
-	--target=$target \
-	--prefix=$prefix \
-	--disable-dependency-tracking \
-	|| { echo "Error configuring newlib"; exit 1; }
-	touch configured-newlib
-fi
-
-if [ ! -f built-newlib ]
-then
-	$MAKE || { echo "Error building newlib"; exit 1; }
-	touch built-newlib
-fi
-
-if [ ! -f installed-newlib ]
-then
-	$MAKE install || { echo "Error installing newlib"; exit 1; }
-	touch installed-newlib
-fi
-
-#---------------------------------------------------------------------------------
-# build and install the final compiler
-#---------------------------------------------------------------------------------
-
-cd $BUILDDIR
-
-cd $target/gcc
-
-if [ ! -f built-stage2 ]
-then
-	$MAKE all || { echo "Error building gcc stage2"; exit 1; }
-	touch built-stage2
-fi
-
-if [ ! -f installed-stage2 ]
-then
-	$MAKE install || { echo "Error installing gcc stage2"; exit 1; }
-	touch installed-stage2
-fi
-
-rm -fr $prefix/$target/sys-include
-cd $BUILDDIR/pspsdk-$PSPSDK_VER
-
-#---------------------------------------------------------------------------------
-# build and install the psp sdk
-#---------------------------------------------------------------------------------
-echo "building pspsdk ..."
-
-if [ ! -f built-sdk ]
-then
-	$MAKE || { echo "ERROR BUILDING PSPSDK"; exit 1; }
-	touch built-sdk
-fi
-
-if [ ! -f installed-sdk ]
-then
-	$MAKE install || { echo "ERROR INSTALLING PSPSDK"; exit 1; }
-	touch installed-sdk
-fi
-
-cd $BUILDDIR
-
-#---------------------------------------------------------------------------------
-# build and install the debugger
-#---------------------------------------------------------------------------------
-mkdir -p $target/gdb
-cd $target/gdb
-
-if [ ! -f configured-gdb ]
-then
-	CFLAGS=$cflags LDFLAGS=$ldflags ../../gdb-$GDB_VER/configure \
-	--disable-nls --prefix=$prefix --target=$target --disable-werror \
-	--disable-dependency-tracking \
-	$CROSS_PARAMS \
-	|| { echo "Error configuring gdb"; exit 1; }
-	touch configured-gdb
-fi
-
-if [ ! -f built-gdb ]
-then
-	$MAKE || { echo "Error building gdb"; exit 1; }
-	touch built-gdb
-fi
-
-if [ ! -f installed-gdb ]
-then
-	$MAKE install || { echo "Error installing gdb"; exit 1; }
-	touch installed-gdb
-fi
-

select_toolchain.sh

@@ -19,7 +19,6 @@ do
   echo
   echo "1: devkitARM (gba gp32 ds)"
   echo "2: devkitPPC (gamecube wii)"
-  echo "3: devkitPSP (PSP)"
   read VERSION
 
   if [ "$VERSION" -ne 1 -a "$VERSION" -ne 2 -a "$VERSION" -ne 3 ]
@@ -30,33 +29,24 @@ done
 
 case "$VERSION" in
   "1" )
-    GCC_VER=5.3.0
-    BINUTILS_VER=2.25.1
-    NEWLIB_VER=2.2.0
-    GDB_VER=7.10
+    GCC_VER=6.3.0
+    BINUTILS_VER=2.27
+    NEWLIB_VER=2.5.0
+    GDB_VER=7.12
     basedir='dkarm-eabi'
     package=devkitARM
     target=arm-none-eabi
     toolchain=DEVKITARM
   ;;
   "2" )
-    GCC_VER=6.2.0
+    GCC_VER=6.3.0
     BINUTILS_VER=2.27
-    NEWLIB_VER=2.0.0
+    MN_BINUTILS_VER=2.17
+    NEWLIB_VER=2.5.0
     GDB_VER=7.11
     basedir='dkppc'
     package=devkitPPC
     target=powerpc-eabi
     toolchain=DEVKITPPC
   ;;
-  "3" )
-    GCC_VER=4.6.3
-    BINUTILS_VER=2.22
-    NEWLIB_VER=1.20.0
-    GDB_VER=7.4
-    basedir='dkpsp'
-    package=devkitPSP
-    target=psp
-    toolchain=DEVKITPSP
-  ;;
 esac