mirror of
https://github.com/pret/pokediamond.git
synced 2026-08-25 10:14:40 -05:00
Merge branch 'master' into master
This commit is contained in:
Cleverking2003
@@ -1,74 +0,0 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "global.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start MI_StopDma
|
||||
MI_StopDma: ; 0x037FB20C
|
||||
stmdb sp!, {r4, lr}
|
||||
mov r4, r0
|
||||
bl OS_DisableInterrupts
|
||||
mov r1, #6
|
||||
mul r1, r4, r1
|
||||
add r1, r1, #5
|
||||
mov r1, r1, lsl #1
|
||||
add r1, r1, #67108864 ; 0x4000000
|
||||
ldrh r2, [r1, #176] ; 0xb0
|
||||
bic r2, r2, #12800 ; 0x3200
|
||||
strh r2, [r1, #176] ; 0xb0
|
||||
ldrh r2, [r1, #176] ; 0xb0
|
||||
bic r2, r2, #32768 ; 0x8000
|
||||
strh r2, [r1, #176] ; 0xb0
|
||||
ldrh r2, [r1, #176] ; 0xb0
|
||||
ldrh r1, [r1, #176] ; 0xb0
|
||||
cmp r4, #0
|
||||
bne _037FB27C
|
||||
mov r1, #12
|
||||
mul r3, r4, r1
|
||||
ldr r1, _037FB288 ; =0x040000B0
|
||||
add r4, r3, r1
|
||||
mov r2, #0
|
||||
add r1, r3, #67108864 ; 0x4000000
|
||||
str r2, [r1, #176] ; 0xb0
|
||||
str r2, [r4, #4]
|
||||
ldr r1, _037FB28C ; =0x81400001
|
||||
str r1, [r4, #8]
|
||||
_037FB27C:
|
||||
bl OS_RestoreInterrupts
|
||||
ldmia sp!, {r4, lr}
|
||||
bx lr
|
||||
_037FB288: .word 0x040000B0
|
||||
_037FB28C: .word 0x81400001
|
||||
|
||||
arm_func_start MI_WaitDma
|
||||
MI_WaitDma: ; 0x037FB290
|
||||
stmdb sp!, {r4, lr}
|
||||
mov r4, r0
|
||||
bl OS_DisableInterrupts
|
||||
mov r1, #3
|
||||
mul r1, r4, r1
|
||||
add r2, r1, #2
|
||||
ldr r1, _037FB2F8 ; =0x040000B0
|
||||
add r2, r1, r2, lsl #2
|
||||
_037FB2B0:
|
||||
ldr r1, [r2]
|
||||
ands r1, r1, #-2147483648 ; 0x80000000
|
||||
bne _037FB2B0
|
||||
cmp r4, #0
|
||||
bne _037FB2EC
|
||||
mov r1, #12
|
||||
mul r3, r4, r1
|
||||
ldr r1, _037FB2F8 ; =0x040000B0
|
||||
add r4, r3, r1
|
||||
mov r2, #0
|
||||
add r1, r3, #67108864 ; 0x4000000
|
||||
str r2, [r1, #176] ; 0xb0
|
||||
str r2, [r4, #4]
|
||||
ldr r1, _037FB2FC ; =0x81400001
|
||||
str r1, [r4, #8]
|
||||
_037FB2EC:
|
||||
bl OS_RestoreInterrupts
|
||||
ldmia sp!, {r4, lr}
|
||||
bx lr
|
||||
_037FB2F8: .word 0x040000B0
|
||||
_037FB2FC: .word 0x81400001
|
||||
@@ -1,221 +0,0 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "global.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start MIi_CpuClear16
|
||||
MIi_CpuClear16: ; 0x037FB300
|
||||
mov r3, #0
|
||||
_037FB304:
|
||||
cmp r3, r2
|
||||
strlth r0, [r1, r3]
|
||||
addlt r3, r3, #2
|
||||
blt _037FB304
|
||||
bx lr
|
||||
|
||||
arm_func_start MIi_CpuCopy16
|
||||
MIi_CpuCopy16: ; 0x037FB318
|
||||
mov ip, #0
|
||||
_037FB31C:
|
||||
cmp ip, r2
|
||||
ldrlth r3, [r0, ip]
|
||||
strlth r3, [r1, ip]
|
||||
addlt ip, ip, #2
|
||||
blt _037FB31C
|
||||
bx lr
|
||||
|
||||
arm_func_start MIi_CpuClear32
|
||||
MIi_CpuClear32: ; 0x037FB334
|
||||
add ip, r1, r2
|
||||
_037FB338:
|
||||
cmp r1, ip
|
||||
stmltia r1!, {r0}
|
||||
blt _037FB338
|
||||
bx lr
|
||||
|
||||
arm_func_start MIi_CpuCopy32
|
||||
MIi_CpuCopy32: ; 0x037FB348
|
||||
add ip, r1, r2
|
||||
_037FB34C:
|
||||
cmp r1, ip
|
||||
ldmltia r0!, {r2}
|
||||
stmltia r1!, {r2}
|
||||
blt _037FB34C
|
||||
bx lr
|
||||
|
||||
arm_func_start MIi_CpuClearFast
|
||||
MIi_CpuClearFast: ; 0x037FB360
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, r9}
|
||||
add r9, r1, r2
|
||||
mov ip, r2, lsr #5
|
||||
add ip, r1, ip, lsl #5
|
||||
mov r2, r0
|
||||
mov r3, r2
|
||||
mov r4, r2
|
||||
mov r5, r2
|
||||
mov r6, r2
|
||||
mov r7, r2
|
||||
mov r8, r2
|
||||
_037FB38C:
|
||||
cmp r1, ip
|
||||
stmltia r1!, {r0, r2, r3, r4, r5, r6, r7, r8}
|
||||
blt _037FB38C
|
||||
_037FB398:
|
||||
cmp r1, r9
|
||||
stmltia r1!, {r0}
|
||||
blt _037FB398
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, r9}
|
||||
bx lr
|
||||
|
||||
arm_func_start MIi_CpuCopyFast
|
||||
MIi_CpuCopyFast: ; 0x037FB3AC
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, r9, sl}
|
||||
add sl, r1, r2
|
||||
mov ip, r2, lsr #5
|
||||
add ip, r1, ip, lsl #5
|
||||
_037FB3BC:
|
||||
cmp r1, ip
|
||||
ldmltia r0!, {r2, r3, r4, r5, r6, r7, r8, r9}
|
||||
stmltia r1!, {r2, r3, r4, r5, r6, r7, r8, r9}
|
||||
blt _037FB3BC
|
||||
_037FB3CC:
|
||||
cmp r1, sl
|
||||
ldmltia r0!, {r2}
|
||||
stmltia r1!, {r2}
|
||||
blt _037FB3CC
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, r9, sl}
|
||||
bx lr
|
||||
|
||||
arm_func_start MI_CpuFill8
|
||||
MI_CpuFill8: ; 0x037FB3E4
|
||||
cmp r2, #0
|
||||
bxeq lr
|
||||
tst r0, #1
|
||||
beq _037FB410
|
||||
ldrh ip, [r0, #-1]
|
||||
and ip, ip, #255 ; 0xff
|
||||
orr r3, ip, r1, lsl #8
|
||||
strh r3, [r0, #-1]
|
||||
add r0, r0, #1
|
||||
subs r2, r2, #1
|
||||
bxeq lr
|
||||
_037FB410:
|
||||
cmp r2, #2
|
||||
bcc _037FB458
|
||||
orr r1, r1, r1, lsl #8
|
||||
tst r0, #2
|
||||
beq _037FB430
|
||||
strh r1, [r0], #2
|
||||
subs r2, r2, #2
|
||||
bxeq lr
|
||||
_037FB430:
|
||||
orr r1, r1, r1, lsl #16
|
||||
bics r3, r2, #3
|
||||
beq _037FB450
|
||||
sub r2, r2, r3
|
||||
add ip, r3, r0
|
||||
_037FB444:
|
||||
str r1, [r0], #4
|
||||
cmp r0, ip
|
||||
bcc _037FB444
|
||||
_037FB450:
|
||||
tst r2, #2
|
||||
strneh r1, [r0], #2
|
||||
_037FB458:
|
||||
tst r2, #1
|
||||
bxeq lr
|
||||
ldrh r3, [r0]
|
||||
and r3, r3, #65280 ; 0xff00
|
||||
and r1, r1, #255 ; 0xff
|
||||
orr r1, r1, r3
|
||||
strh r1, [r0]
|
||||
bx lr
|
||||
|
||||
arm_func_start MI_CpuCopy8
|
||||
MI_CpuCopy8: ; 0x037FB478
|
||||
cmp r2, #0
|
||||
bxeq lr
|
||||
tst r1, #1
|
||||
beq _037FB4B8
|
||||
ldrh ip, [r1, #-1]
|
||||
and ip, ip, #255 ; 0xff
|
||||
tst r0, #1
|
||||
ldrneh r3, [r0, #-1]
|
||||
movne r3, r3, lsr #8
|
||||
ldreqh r3, [r0]
|
||||
orr r3, ip, r3, lsl #8
|
||||
strh r3, [r1, #-1]
|
||||
add r0, r0, #1
|
||||
add r1, r1, #1
|
||||
subs r2, r2, #1
|
||||
bxeq lr
|
||||
_037FB4B8:
|
||||
eor ip, r1, r0
|
||||
tst ip, #1
|
||||
beq _037FB50C
|
||||
bic r0, r0, #1
|
||||
ldrh ip, [r0], #2
|
||||
mov r3, ip, lsr #8
|
||||
subs r2, r2, #2
|
||||
bcc _037FB4F0
|
||||
_037FB4D8:
|
||||
ldrh ip, [r0], #2
|
||||
orr ip, r3, ip, lsl #8
|
||||
strh ip, [r1], #2
|
||||
mov r3, ip, lsr #16
|
||||
subs r2, r2, #2
|
||||
bcs _037FB4D8
|
||||
_037FB4F0:
|
||||
tst r2, #1
|
||||
bxeq lr
|
||||
ldrh ip, [r1]
|
||||
and ip, ip, #65280 ; 0xff00
|
||||
orr ip, ip, r3
|
||||
strh ip, [r1]
|
||||
bx lr
|
||||
_037FB50C:
|
||||
tst ip, #2
|
||||
beq _037FB538
|
||||
bics r3, r2, #1
|
||||
beq _037FB584
|
||||
sub r2, r2, r3
|
||||
add ip, r3, r1
|
||||
_037FB524:
|
||||
ldrh r3, [r0], #2
|
||||
strh r3, [r1], #2
|
||||
cmp r1, ip
|
||||
bcc _037FB524
|
||||
b _037FB584
|
||||
_037FB538:
|
||||
cmp r2, #2
|
||||
bcc _037FB584
|
||||
tst r1, #2
|
||||
beq _037FB558
|
||||
ldrh r3, [r0], #2
|
||||
strh r3, [r1], #2
|
||||
subs r2, r2, #2
|
||||
bxeq lr
|
||||
_037FB558:
|
||||
bics r3, r2, #3
|
||||
beq _037FB578
|
||||
sub r2, r2, r3
|
||||
add ip, r3, r1
|
||||
_037FB568:
|
||||
ldr r3, [r0], #4
|
||||
str r3, [r1], #4
|
||||
cmp r1, ip
|
||||
bcc _037FB568
|
||||
_037FB578:
|
||||
tst r2, #2
|
||||
ldrneh r3, [r0], #2
|
||||
strneh r3, [r1], #2
|
||||
_037FB584:
|
||||
tst r2, #1
|
||||
bxeq lr
|
||||
ldrh r2, [r1]
|
||||
ldrh r0, [r0]
|
||||
and r2, r2, #65280 ; 0xff00
|
||||
and r0, r0, #255 ; 0xff
|
||||
orr r0, r2, r0
|
||||
strh r0, [r1]
|
||||
bx lr
|
||||
@@ -1,9 +0,0 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "global.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start MI_SwapWord
|
||||
MI_SwapWord: ; 0x037FB5A8
|
||||
swp r0, r0, [r1]
|
||||
bx lr
|
||||
10
arm7/lib/include/MI_dma.h
Normal file
10
arm7/lib/include/MI_dma.h
Normal file
@@ -0,0 +1,10 @@
|
||||
#ifndef GUARD_MI_DMA_H
|
||||
#define GUARD_MI_DMA_H
|
||||
|
||||
#include "nitro/dma.h"
|
||||
#include "nitro/types.h"
|
||||
|
||||
void MI_StopDma(u32 channel);
|
||||
void MI_WaitDma(u32 channel);
|
||||
|
||||
#endif
|
||||
15
arm7/lib/include/MI_memory.h
Normal file
15
arm7/lib/include/MI_memory.h
Normal file
@@ -0,0 +1,15 @@
|
||||
#ifndef GUARD_MI_MEMORY_H
|
||||
#define GUARD_MI_MEMORY_H
|
||||
|
||||
#include "nitro/types.h"
|
||||
|
||||
void MIi_CpuClear16(register u16 value, register u16 * dst, register u32 size);
|
||||
void MIi_CpuCopy16(register u16 * src, register u16 * dst, register u32 size);
|
||||
void MIi_CpuClear32(register u32 value, register u32 * dst, register u32 size);
|
||||
void MIi_CpuCopy32(register u32 * src, register u32 * dst, register u32 size);
|
||||
void MIi_CpuClearFast(register u32 value, register u32 * dst, register u32 size);
|
||||
void MIi_CpuCopyFast(register u32 * src, register u32 * dst, register u32 size);
|
||||
void MI_CpuFill8(register u8 value, register u8 * dst, register u32 size);
|
||||
void MI_CpuCopy8(register u8 * src, register u8 * dst, register u32 size);
|
||||
|
||||
#endif
|
||||
8
arm7/lib/include/MI_swap.h
Normal file
8
arm7/lib/include/MI_swap.h
Normal file
@@ -0,0 +1,8 @@
|
||||
#ifndef GUARD_MI_SWAP_H
|
||||
#define GUARD_MI_SWAP_H
|
||||
|
||||
#include "nitro/types.h"
|
||||
|
||||
u32 MI_SwapWord(register u32 data, register u32 * dst);
|
||||
|
||||
#endif
|
||||
36
arm7/lib/src/MI_dma.c
Normal file
36
arm7/lib/src/MI_dma.c
Normal file
@@ -0,0 +1,36 @@
|
||||
#include "function_target.h"
|
||||
#include "MI_dma.h"
|
||||
#include "OS_system.h"
|
||||
|
||||
ARM_FUNC void MI_WaitDma(u32 channel) {
|
||||
OSIntrMode mode = OS_DisableInterrupts();
|
||||
vu32 * addr = (vu32 *)(REG_ADDR_DMA0SAD + (channel * 3 + 2) * 4);
|
||||
while(addr[0] & 0x80000000) ;
|
||||
if (channel == 0) {
|
||||
addr = (vu32 *)(REG_ADDR_DMA0SAD + channel * 12);
|
||||
addr[0] = 0;
|
||||
addr[1] = 0;
|
||||
addr[2] = 0x81400001;
|
||||
}
|
||||
mode = OS_RestoreInterrupts(mode);
|
||||
}
|
||||
|
||||
ARM_FUNC void MI_StopDma(u32 channel) {
|
||||
OSIntrMode mode = OS_DisableInterrupts();
|
||||
vu16 * addr = (vu16 *)(REG_ADDR_DMA0SAD + (channel * 6 + 5) * 2);
|
||||
addr[0] &= ~(DMA_START_MASK | DMA_REPEAT);
|
||||
addr[0] &= ~DMA_ENABLE;
|
||||
{
|
||||
s32 dummy = addr[0];
|
||||
}
|
||||
{
|
||||
s32 dummy = addr[0];
|
||||
}
|
||||
if (channel == 0) {
|
||||
vu32 * addr32 = (vu32 *)(REG_ADDR_DMA0SAD + channel * 12);
|
||||
addr32[0] = 0;
|
||||
addr32[1] = 0;
|
||||
addr32[2] = 0x81400001;
|
||||
}
|
||||
mode = OS_RestoreInterrupts(mode);
|
||||
}
|
||||
219
arm7/lib/src/MI_memory.c
Normal file
219
arm7/lib/src/MI_memory.c
Normal file
@@ -0,0 +1,219 @@
|
||||
#include "function_target.h"
|
||||
#include "MI_memory.h"
|
||||
|
||||
asm void MIi_CpuClear16(register u16 value, register u16 * dst, register u32 size) {
|
||||
mov r3, #0
|
||||
loop:
|
||||
cmp r3, r2
|
||||
strlth r0, [r1, r3]
|
||||
addlt r3, r3, #2
|
||||
blt loop
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void MIi_CpuCopy16(register u16 * src, register u16 * dst, register u32 size) {
|
||||
mov ip, #0
|
||||
_037FB31C:
|
||||
cmp ip, r2
|
||||
ldrlth r3, [r0, ip]
|
||||
strlth r3, [r1, ip]
|
||||
addlt ip, ip, #2
|
||||
blt _037FB31C
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void MIi_CpuClear32(register u32 value, register u32 * dst, register u32 size) {
|
||||
add ip, r1, r2
|
||||
_037FB338:
|
||||
cmp r1, ip
|
||||
stmltia r1!, {r0}
|
||||
blt _037FB338
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void MIi_CpuCopy32(register u32 * src, register u32 * dst, register u32 size) {
|
||||
add ip, r1, r2
|
||||
_037FB34C:
|
||||
cmp r1, ip
|
||||
ldmltia r0!, {r2}
|
||||
stmltia r1!, {r2}
|
||||
blt _037FB34C
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void MIi_CpuClearFast(register u32 value, register u32 * dst, register u32 size) {
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, r9}
|
||||
add r9, r1, r2
|
||||
mov ip, r2, lsr #5
|
||||
add ip, r1, ip, lsl #5
|
||||
mov r2, r0
|
||||
mov r3, r2
|
||||
mov r4, r2
|
||||
mov r5, r2
|
||||
mov r6, r2
|
||||
mov r7, r2
|
||||
mov r8, r2
|
||||
_037FB38C:
|
||||
cmp r1, ip
|
||||
stmltia r1!, {r0, r2, r3, r4, r5, r6, r7, r8}
|
||||
blt _037FB38C
|
||||
_037FB398:
|
||||
cmp r1, r9
|
||||
stmltia r1!, {r0}
|
||||
blt _037FB398
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, r9}
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void MIi_CpuCopyFast(register u32 * src, register u32 * dst, register u32 size) {
|
||||
stmdb sp!, {r4-r9, r10}
|
||||
add r10, r1, r2
|
||||
mov ip, r2, lsr #5
|
||||
add ip, r1, ip, lsl #5
|
||||
_037FB3BC:
|
||||
cmp r1, ip
|
||||
ldmltia r0!, {r2-r9}
|
||||
stmltia r1!, {r2-r9}
|
||||
blt _037FB3BC
|
||||
_037FB3CC:
|
||||
cmp r1, r10
|
||||
ldmltia r0!, {r2}
|
||||
stmltia r1!, {r2}
|
||||
blt _037FB3CC
|
||||
ldmia sp!, {r4-r9, r10}
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void MI_CpuFill8(register u8 value, register u8 * dst, register u32 size) {
|
||||
cmp r2, #0
|
||||
bxeq lr
|
||||
tst r0, #1
|
||||
beq _037FB410
|
||||
ldrh ip, [r0, #-1]
|
||||
and ip, ip, #0xff
|
||||
orr r3, ip, r1, lsl #8
|
||||
strh r3, [r0, #-1]
|
||||
add r0, r0, #1
|
||||
subs r2, r2, #1
|
||||
bxeq lr
|
||||
_037FB410:
|
||||
cmp r2, #2
|
||||
bcc _037FB458
|
||||
orr r1, r1, r1, lsl #8
|
||||
tst r0, #2
|
||||
beq _037FB430
|
||||
strh r1, [r0], #2
|
||||
subs r2, r2, #2
|
||||
bxeq lr
|
||||
_037FB430:
|
||||
orr r1, r1, r1, lsl #16
|
||||
bics r3, r2, #3
|
||||
beq _037FB450
|
||||
sub r2, r2, r3
|
||||
add ip, r3, r0
|
||||
_037FB444:
|
||||
str r1, [r0], #4
|
||||
cmp r0, ip
|
||||
bcc _037FB444
|
||||
_037FB450:
|
||||
tst r2, #2
|
||||
strneh r1, [r0], #2
|
||||
_037FB458:
|
||||
tst r2, #1
|
||||
bxeq lr
|
||||
ldrh r3, [r0]
|
||||
and r3, r3, #0xff00
|
||||
and r1, r1, #0xff
|
||||
orr r1, r1, r3
|
||||
strh r1, [r0]
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void MI_CpuCopy8(register u8 * src, register u8 * dst, u32 size) {
|
||||
cmp r2, #0
|
||||
bxeq lr
|
||||
tst r1, #1
|
||||
beq _037FB4B8
|
||||
ldrh ip, [r1, #-1]
|
||||
and ip, ip, #0xff
|
||||
tst r0, #1
|
||||
ldrneh r3, [r0, #-1]
|
||||
movne r3, r3, lsr #8
|
||||
ldreqh r3, [r0]
|
||||
orr r3, ip, r3, lsl #8
|
||||
strh r3, [r1, #-1]
|
||||
add r0, r0, #1
|
||||
add r1, r1, #1
|
||||
subs r2, r2, #1
|
||||
bxeq lr
|
||||
_037FB4B8:
|
||||
eor ip, r1, r0
|
||||
tst ip, #1
|
||||
beq _037FB50C
|
||||
bic r0, r0, #1
|
||||
ldrh ip, [r0], #2
|
||||
mov r3, ip, lsr #8
|
||||
subs r2, r2, #2
|
||||
bcc _037FB4F0
|
||||
_037FB4D8:
|
||||
ldrh ip, [r0], #2
|
||||
orr ip, r3, ip, lsl #8
|
||||
strh ip, [r1], #2
|
||||
mov r3, ip, lsr #16
|
||||
subs r2, r2, #2
|
||||
bcs _037FB4D8
|
||||
_037FB4F0:
|
||||
tst r2, #1
|
||||
bxeq lr
|
||||
ldrh ip, [r1]
|
||||
and ip, ip, #0xff00
|
||||
orr ip, ip, r3
|
||||
strh ip, [r1]
|
||||
bx lr
|
||||
_037FB50C:
|
||||
tst ip, #2
|
||||
beq _037FB538
|
||||
bics r3, r2, #1
|
||||
beq _037FB584
|
||||
sub r2, r2, r3
|
||||
add ip, r3, r1
|
||||
_037FB524:
|
||||
ldrh r3, [r0], #2
|
||||
strh r3, [r1], #2
|
||||
cmp r1, ip
|
||||
bcc _037FB524
|
||||
b _037FB584
|
||||
_037FB538:
|
||||
cmp r2, #2
|
||||
bcc _037FB584
|
||||
tst r1, #2
|
||||
beq _037FB558
|
||||
ldrh r3, [r0], #2
|
||||
strh r3, [r1], #2
|
||||
subs r2, r2, #2
|
||||
bxeq lr
|
||||
_037FB558:
|
||||
bics r3, r2, #3
|
||||
beq _037FB578
|
||||
sub r2, r2, r3
|
||||
add ip, r3, r1
|
||||
_037FB568:
|
||||
ldr r3, [r0], #4
|
||||
str r3, [r1], #4
|
||||
cmp r1, ip
|
||||
bcc _037FB568
|
||||
_037FB578:
|
||||
tst r2, #2
|
||||
ldrneh r3, [r0], #2
|
||||
strneh r3, [r1], #2
|
||||
_037FB584:
|
||||
tst r2, #1
|
||||
bxeq lr
|
||||
ldrh r2, [r1]
|
||||
ldrh r0, [r0]
|
||||
and r2, r2, #0xff00
|
||||
and r0, r0, #0xff
|
||||
orr r0, r2, r0
|
||||
strh r0, [r1]
|
||||
bx lr
|
||||
}
|
||||
6
arm7/lib/src/MI_swap.c
Normal file
6
arm7/lib/src/MI_swap.c
Normal file
@@ -0,0 +1,6 @@
|
||||
#include "MI_swap.h"
|
||||
|
||||
asm u32 MI_SwapWord(register u32 data, register u32 * dst) {
|
||||
swp r0, r0, [r1]
|
||||
bx lr
|
||||
}
|
||||
25
include/nitro/dma.h
Normal file
25
include/nitro/dma.h
Normal file
@@ -0,0 +1,25 @@
|
||||
#ifndef GUARD_DMA_H
|
||||
#define GUARD_DMA_H
|
||||
|
||||
#define REG_ADDR_DMA0SAD 0x040000b0
|
||||
|
||||
#define DMA_DEST_INC 0x0000
|
||||
#define DMA_DEST_DEC 0x0020
|
||||
#define DMA_DEST_FIXED 0x0040
|
||||
#define DMA_DEST_RELOAD 0x0060
|
||||
#define DMA_SRC_INC 0x0000
|
||||
#define DMA_SRC_DEC 0x0080
|
||||
#define DMA_SRC_FIXED 0x0100
|
||||
#define DMA_REPEAT 0x0200
|
||||
#define DMA_16BIT 0x0000
|
||||
#define DMA_32BIT 0x0400
|
||||
#define DMA_DREQ_ON 0x0800
|
||||
#define DMA_START_NOW 0x0000
|
||||
#define DMA_START_VBLANK 0x1000
|
||||
#define DMA_START_HBLANK 0x2000
|
||||
#define DMA_START_SPECIAL 0x3000
|
||||
#define DMA_START_MASK 0x3000
|
||||
#define DMA_INTR_ENABLE 0x4000
|
||||
#define DMA_ENABLE 0x8000
|
||||
|
||||
#endif
|
||||
Reference in New Issue
Block a user