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arm9 OS_cache

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This commit is contained in:
red031000
2020-07-24 19:10:14 +01:00
parent 8ca1290fc3
commit 4b7ea18ee2
6 changed files with 143 additions and 117 deletions
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102
arm9/asm/OS_cache.s
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@@ -1,102 +0,0 @@
.include "asm/macros.inc"
.include "global.inc"
.text
arm_func_start DC_InvalidateAll
DC_InvalidateAll: ; 0x020CC0B8
mov r0, #0x0
mcr p15, 0x0, r0, c7, c6, 0x0
bx lr
arm_func_start DC_StoreAll
DC_StoreAll: ; 0x020CC0C4
mov r1, #0x0
_020CC0C8:
mov r0, #0x0
_020CC0CC:
orr r2, r1, r0
mcr p15, 0x0, r2, c7, c10, 0x2
add r0, r0, #0x20
cmp r0, #0x400
blt _020CC0CC
add r1, r1, #0x40000000
cmp r1, #0x0
bne _020CC0C8
bx lr
arm_func_start DC_FlushAll
DC_FlushAll: ; 0x020CC0F0
mov r12, #0x0
mov r1, #0x0
_020CC0F8:
mov r0, #0x0
_020CC0FC:
orr r2, r1, r0
mcr p15, 0x0, r12, c7, c10, 0x4
mcr p15, 0x0, r2, c7, c14, 0x2
add r0, r0, #0x20
cmp r0, #0x400
blt _020CC0FC
add r1, r1, #0x40000000
cmp r1, #0x0
bne _020CC0F8
bx lr
arm_func_start DC_InvalidateRange
DC_InvalidateRange: ; 0x020CC124
add r1, r1, r0
bic r0, r0, #0x1f
_020CC12C:
mcr p15, 0x0, r0, c7, c6, 0x1
add r0, r0, #0x20
cmp r0, r1
blt _020CC12C
bx lr
arm_func_start DC_StoreRange
DC_StoreRange: ; 0x020CC140
add r1, r1, r0
bic r0, r0, #0x1f
_020CC148:
mcr p15, 0x0, r0, c7, c10, 0x1
add r0, r0, #0x20
cmp r0, r1
blt _020CC148
bx lr
arm_func_start DC_FlushRange
DC_FlushRange: ; 0x020CC15C
mov r12, #0x0
add r1, r1, r0
bic r0, r0, #0x1f
_020CC168:
mcr p15, 0x0, r12, c7, c10, 0x4
mcr p15, 0x0, r0, c7, c14, 0x1
add r0, r0, #0x20
cmp r0, r1
blt _020CC168
bx lr
arm_func_start DC_WaitWriteBufferEmpty
DC_WaitWriteBufferEmpty: ; 0x020CC180
mov r0, #0x0
mcr p15, 0x0, r0, c7, c10, 0x4
bx lr
arm_func_start IC_InvalidateAll
IC_InvalidateAll: ; 0x020CC18C
mov r0, #0x0
mcr p15, 0x0, r0, c7, c5, 0x0
bx lr
arm_func_start IC_InvalidateRange
IC_InvalidateRange:
add r1, r1, r0
bic r0, r0, #0x1f
_020CC1A0:
mcr p15, 0x0, r0, c7, c5, 0x1
add r0, r0, #0x20
cmp r0, r1
blt _020CC1A0
bx lr

21
arm9/lib/include/OS_cache.h
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@@ -1,9 +1,16 @@
#ifndef NITRO_OS_CACHE_H_
#define NITRO_OS_CACHE_H_
#ifndef POKEDIAMOND_OS_CACHE_H
#define POKEDIAMOND_OS_CACHE_H
void IC_InvalidateRange(void *startAddr, u32 nBytes);
void IC_FlushRange(void *startAddr, u32 nBytes);
void DC_InvalidateRange(void *startAddr, u32 nBytes);
void DC_FlushRange(void *startAddr, u32 nBytes);
#include "nitro/types.h"
#endif //NITRO_OS_CACHE_H_
void DC_InvalidateAll(void);
void DC_StoreAll(void);
void DC_FlushAll(void);
void DC_InvalidateRange(register void *startAddr, register u32 nBytes);
void DC_StoreRange(register void *startAddr, register u32 nBytes);
void DC_FlushRange(register const void *startAddr, register u32 nBytes);
void DC_WaitWriteBufferEmpty(void);
void IC_InvalidateAll(void);
void IC_InvalidateRange(register void *startAddr, register u32 nBytes);
#endif //POKEDIAMOND_OS_CACHE_H

126
arm9/lib/src/OS_cache.c Normal file
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@@ -0,0 +1,126 @@
#include "OS_cache.h"
#include "nitro/types.h"
#include "function_target.h"
ARM_FUNC asm void DC_InvalidateAll(void)
{
mov r0, #0
mcr p15, 0, r0, c7, c6, 0 //Invalidate Entire Data Cache
bx lr
}
ARM_FUNC asm void DC_StoreAll(void)
{
mov r1, #0
_020CC0C8:
mov r0, #0
_020CC0CC:
orr r2, r1, r0
mcr p15, 0, r2, c7, c10, 2 //Clean Data Cache Line Set/Index
add r0, r0, #32
cmp r0, #0x400
blt _020CC0CC
add r1, r1, #0x40000000
cmp r1, #0
bne _020CC0C8
bx lr
}
ARM_FUNC asm void DC_FlushAll(void)
{
mov r12, #0
mov r1, #0
_020CC0F8:
mov r0, #0
_020CC0FC:
orr r2, r1, r0
mcr p15, 0, r12, c7, c10, 4 //Drain Write Buffer
mcr p15, 0, r2, c7, c14, 2 //Clean and Invalidate Data Cache Line Set/Index
add r0, r0, #32
cmp r0, #0x400
blt _020CC0FC
add r1, r1, #0x40000000
cmp r1, #0
bne _020CC0F8
bx lr
}
ARM_FUNC asm void DC_InvalidateRange(register void *startAddr, register u32 nBytes)
{
add r1, r1, r0
bic r0, r0, #31
_020CC12C:
mcr p15, 0, r0, c7, c6, 1 //Invalidated Data Cache Line Virtual Address
add r0, r0, #32
cmp r0, r1
blt _020CC12C
bx lr
}
ARM_FUNC asm void DC_StoreRange(register void *startAddr, register u32 nBytes)
{
add r1, r1, r0
bic r0, r0, #31
_020CC148:
mcr p15, 0, r0, c7, c10, 1 //Clean Data Cache Line Virtual Address
add r0, r0, #32
cmp r0, r1
blt _020CC148
bx lr
}
ARM_FUNC asm void DC_FlushRange(register const void *startAddr, register u32 nBytes)
{
mov r12, #0
add r1, r1, r0
bic r0, r0, #31
_020CC168:
mcr p15, 0, r12, c7, c10, 4 //Drain Write Buffer
mcr p15, 0, r0, c7, c14, 1 //Clean and Invalidate Data Cache Line Virtual Address
add r0, r0, #32
cmp r0, r1
blt _020CC168
bx lr
}
ARM_FUNC asm void DC_WaitWriteBufferEmpty(void)
{
mov r0, #0
mcr p15, 0, r0, c7, c10, 4 //Drain Write Buffer
bx lr
}
ARM_FUNC asm void IC_InvalidateAll(void)
{
mov r0, #0
mcr p15, 0, r0, c7, c5, 0 //Invalidate Entire Instruction Cache
bx lr
}
ARM_FUNC asm void IC_InvalidateRange(register void *startAddr, register u32 nBytes)
{
add r1, r1, r0
bic r0, r0, #31
_020CC1A0:
mcr p15, 0, r0, c7, c5, 1 //Invalidate Instruction Cache Line Virtual Address
add r0, r0, #32
cmp r0, r1
blt _020CC1A0
bx lr
}

5
arm9/lib/src/OS_reset.c
View File

@@ -5,6 +5,7 @@
#include "OS_interrupt.h"
#include "OS_system.h"
#include "OS_spinLock.h"
#include "OS_cache.h"
#include "sections.h"
static u16 OSi_IsInitReset = 0;
@@ -16,10 +17,6 @@ extern void PXI_SetFifoRecvCallback(u32 param1, void* callback);
extern u32 PXI_SendWordByFifo(u32 param1, u32 data, u32 param2);
extern void CARD_LockRom(u16 lockId);
extern void MI_StopDma(u32 dma);
extern void DC_StoreAll(void);
extern void DC_InvalidateAll(void);
extern void IC_InvalidateAll(void);
extern void DC_WaitWriteBufferEmpty(void);
ARM_FUNC void OS_InitReset(void) {
if (OSi_IsInitReset) {

2
arm9/lib/src/SND_command.c
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@@ -1,6 +1,7 @@
#include "SND_command.h"
#include "SND_work.h"
#include "OS_system.h"
#include "OS_cache.h"
#define SND_CMD_WAIT_QUEUE_COUNT 8
@@ -21,7 +22,6 @@ static struct SNDCommand *sFreeList;
extern s32 PXI_SendWordByFifo(u32, u32, u32);
extern void PXI_SetFifoRecvCallback(u32, void (*)(s32, s32));
extern BOOL PXI_IsCallbackReady(u32, u32);
extern void DC_FlushRange(void*, u32);
static void InitPXI(void);
static void RequestCommandProc(void);

4
arm9/lib/src/SND_work.c
View File

@@ -1,12 +1,10 @@
#include "SND_work.h"
#include "SND_alarm.h"
#include "SND_main.h"
#include "OS_cache.h"
struct SNDSharedWork *SNDi_SharedWork;
void DC_InvalidateRange(void *mem, u32 size);
void DC_FlushRange(void *mem, u32 size);
u32 SND_GetPlayerStatus(void) {
DC_InvalidateRange(&SNDi_SharedWork->playerStatus, 4);
return SNDi_SharedWork->playerStatus;