Merge pull request #122 from red031000/master

OS_irqHandler itcm
This commit is contained in:
PikalaxALT
2020-05-28 18:01:07 -04:00
committed by GitHub
9 changed files with 134 additions and 128 deletions

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@@ -963,6 +963,7 @@ SECTIONS {
{
. = ALIGN(32);
SDK_AUTOLOAD.ITCM.START = .;
OS_irqHandler.o (.itcm)
arm9_itcm.o (.text)
. = ALIGN(32);
SDK_AUTOLOAD.ITCM.END = .;

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@@ -22,8 +22,8 @@ CP_SaveContext: ; 0x020D3648
.balign 4
_020D3684: .word 0x04000290
arm_func_start CP_RestoreContext
CP_RestoreContext: ; 0x020D3688
arm_func_start CPi_RestoreContext
CPi_RestoreContext: ; 0x020D3688
stmdb sp!, {r4}
ldr r1, _020D36C0 ; =0x04000290
ldmia r0, {r2-r4,r12}

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@@ -60,7 +60,7 @@ _020CBB78: .word CP_SaveContext
OS_LoadContext: ; 0x020CBB7C
stmdb sp!, {r0,lr}
add r0, r0, #0x48
ldr r1, _020CBBBC ; =CP_RestoreContext
ldr r1, _020CBBBC ; =CPi_RestoreContext
blx r1
ldmia sp!, {r0,lr}
mrs r1, cpsr
@@ -75,4 +75,4 @@ OS_LoadContext: ; 0x020CBB7C
mov r0, r0
subs pc, lr, #0x4
.balign 4
_020CBBBC: .word CP_RestoreContext
_020CBBBC: .word CPi_RestoreContext

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@@ -3,129 +3,6 @@
.section .text
; OS
arm_func_start OS_IrqHandler
OS_IrqHandler: ; 0x01FF8000
stmfd sp!, {lr}
mov ip, #0x04000000
add ip, ip, #0x210
ldr r1, [ip, #-8]
cmp r1, #0
ldmeqfd sp!, {pc}
ldmia ip, {r1, r2}
ands r1, r1, r2
ldmeqfd sp!, {pc}
mov r3, #0x80000000
_01FF8028:
clz r0, r1
bics r1, r1, r3, lsr r0
bne _01FF8028
mov r1, r3, lsr r0
str r1, [ip, #0x4]
rsbs r0, r0, #0x1f
ldr r1, _01FF8050 ; =0x027E0000
ldr r0, [r1, r0, lsl #2]
ldr lr, _01FF8054 ; =0x01FF70B8
bx r0
_01FF8050: .word OS_IRQTable
_01FF8054: .word OS_IrqHandler_ThreadSwitch
arm_func_start OS_IrqHandler_ThreadSwitch
OS_IrqHandler_ThreadSwitch: ; 01FF8058
ldr ip, _01FF81A4
mov r3, #0x0
ldr ip, [ip]
mov r2, #0x1
cmp ip, #0x0
beq _01FF80A8
_01FF8070:
str r2, [ip, #0x64]
str r3, [ip, #0x78]
str r3, [ip, #0x7c]
ldr r0, [ip, #0x80]
str r3, [ip, #0x80]
mov ip, r0
cmp ip, #0x0
bne _01FF8070
ldr ip, _01FF81A4
str r3, [ip]
str r3, [ip, #0x4]
ldr ip, _01FF81A8
mov r1, #0x1
strh r1, [ip]
_01FF80A8:
ldr ip, _01FF81A8
ldrh r1, [ip]
cmp r1, #0x0
ldreq pc, [sp], #0x4
mov r1, #0x0
strh r1, [ip]
mov r3, #0xd2
msr CPSR_c, r3
add r2, ip, #0x8
ldr r1, [r2]
_01FF80D0:
cmp r1, #0x0
ldrneh r0, [r1, #0x64]
cmpne r0, #0x1
ldrne r1, [r1, #0x68]
bne _01FF80D0
cmp r1, #0x0
bne _01FF80F8
_01FF80EC:
mov r3, #0x92
msr CPSR_c, r3
ldr pc, [sp], #0x4
_01FF80F8:
ldr r0, [ip, #0x4]
cmp r1, r0
beq _01FF80EC
ldr r3, [ip, #0xC]
cmp r3, #0x0
beq _01FF8120
stmdb sp!, {r0, r1, ip}
mov lr, pc
bx r3
ldmia sp!, {r0, r1, ip}
_01FF8120:
str r1, [ip, #0x4]
mrs r2, SPSR
str r2, [r0, #0x0]!
stmdb sp!, {r0, r1}
add r0, r0, #0x0
add r0, r0, #0x48
ldr r1, _01FF81AC
blx r1
ldmia sp!, {r0, r1}
ldmib sp!, {r2, r3}
stmib r0!, {r2, r3}
ldmib sp!, {r2, r3, ip, lr}
stmib r0!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr}^
stmib r0!, {lr}
mov r3, #0xd3
msr CPSR_c, r3
stmib r0!, {sp}
stmfd sp!, {r1}
add r0, r1, #0x0
add r0, r0, #0x48
ldr r1, _01FF81B0
blx r1
ldmfd sp!, {r1}
ldr sp, [r1, #0x44]
mov r3, #0xd2
msr CPSR_c, r3
ldr r2, [r1, #0x0]!
msr SPSR_fc, r2
ldr lr, [r1, #0x40]
ldmib r1!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr}^
nop
stmda sp!, {r0, r1, r2, r3, ip, lr}
ldmfd sp!, {pc}
_01FF81A4: .word OSi_IrqThreadQueue
_01FF81A8: .word OSi_ThreadInfo
_01FF81AC: .word CP_SaveContext
_01FF81B0: .word CP_RestoreContext
.section .text
arm_func_start OSi_DoBoot
OSi_DoBoot: ; 0x01FF81B4
mov ip, #0x04000000

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@@ -93,7 +93,7 @@
.extern CPSi_sha1_init
.extern CPSi_sha1_result
.extern CPSi_sha1_result_prng
.extern CP_RestoreContext
.extern CPi_RestoreContext
.extern CP_SaveContext
.extern CTRDG_CpuCopy16
.extern CTRDG_CpuCopy32

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@@ -15,4 +15,7 @@ typedef struct CPContext {
u16 sqrt_mode;
} CPContext;
void CP_SaveContext(CPContext *context);
void CPi_RestoreContext(const CPContext* context);
#endif //POKEDIAMOND_CP_CONTEXT_H

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@@ -14,6 +14,8 @@ static inline OSIrqMask OS_GetIrqCheckFlag(void)
return *(OSIrqMask *)HW_INTR_CHECK_BUF;
}
void OS_IrqHandler(void);
void OS_IrqHandler_ThreadSwitch(void);
void OS_WaitIrq(BOOL param1, u32 param2);
#endif //POKEDIAMOND_OS_IRQHANDLER_H

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@@ -87,6 +87,8 @@ struct _OSThread
u32 systemErrno;
};
extern OSThreadInfo OSi_ThreadInfo;
void OS_SleepThread(OSThreadQueue * queue);
void OS_WakeupThread(OSThreadQueue * queue);

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@@ -3,11 +3,132 @@
#include "OS_system.h"
#include "OS_thread.h"
#include "sections.h"
#include "CP_context.h"
#pragma section DTCM begin
OSThreadQueue OSi_IrqThreadQueue = { NULL, NULL };
#pragma section DTCM end
#pragma section ITCM begin
ARM_FUNC asm void OS_IrqHandler(void)
{
stmfd sp!, {lr}
mov ip, #0x04000000
add ip, ip, #0x210
ldr r1, [ip, #-8]
cmp r1, #0
ldmeqfd sp!, {pc}
ldmia ip, {r1, r2}
ands r1, r1, r2
ldmeqfd sp!, {pc}
mov r3, #0x80000000
_01FF8028:
clz r0, r1
bics r1, r1, r3, lsr r0
bne _01FF8028
mov r1, r3, lsr r0
str r1, [ip, #0x4]
rsbs r0, r0, #0x1f
ldr r1, =OS_IRQTable
ldr r0, [r1, r0, lsl #2]
ldr lr, =OS_IrqHandler_ThreadSwitch
bx r0
}
ARM_FUNC asm void OS_IrqHandler_ThreadSwitch(void)
{
ldr ip, =OSi_IrqThreadQueue
mov r3, #0x0
ldr ip, [ip]
mov r2, #0x1
cmp ip, #0x0
beq _01FF80A8
_01FF8070:
str r2, [ip, #0x64]
str r3, [ip, #0x78]
str r3, [ip, #0x7c]
ldr r0, [ip, #0x80]
str r3, [ip, #0x80]
mov ip, r0
cmp ip, #0x0
bne _01FF8070
ldr ip, =OSi_IrqThreadQueue
str r3, [ip]
str r3, [ip, #0x4]
ldr ip, =OSi_ThreadInfo
mov r1, #0x1
strh r1, [ip]
_01FF80A8:
ldr ip, =OSi_ThreadInfo
ldrh r1, [ip]
cmp r1, #0x0
ldreq pc, [sp], #0x4
mov r1, #0x0
strh r1, [ip]
mov r3, #0xd2
msr CPSR_c, r3
add r2, ip, #0x8
ldr r1, [r2]
_01FF80D0:
cmp r1, #0x0
ldrneh r0, [r1, #0x64]
cmpne r0, #0x1
ldrne r1, [r1, #0x68]
bne _01FF80D0
cmp r1, #0x0
bne _01FF80F8
_01FF80EC:
mov r3, #0x92
msr CPSR_c, r3
ldr pc, [sp], #0x4
_01FF80F8:
ldr r0, [ip, #0x4]
cmp r1, r0
beq _01FF80EC
ldr r3, [ip, #0xC]
cmp r3, #0x0
beq _01FF8120
stmdb sp!, {r0, r1, ip}
mov lr, pc
bx r3
ldmia sp!, {r0, r1, ip}
_01FF8120:
str r1, [ip, #0x4]
mrs r2, SPSR
str r2, [r0, #0x0]!
stmdb sp!, {r0, r1}
add r0, r0, #0x0
add r0, r0, #0x48
ldr r1, =CP_SaveContext
blx r1
ldmia sp!, {r0, r1}
ldmib sp!, {r2, r3}
stmib r0!, {r2, r3}
ldmib sp!, {r2, r3, ip, lr}
stmib r0!, {r2-r14}^
stmib r0!, {lr}
mov r3, #0xd3
msr CPSR_c, r3
stmib r0!, {sp}
stmfd sp!, {r1}
add r0, r1, #0x0
add r0, r0, #0x48
ldr r1, =CPi_RestoreContext
blx r1
ldmfd sp!, {r1}
ldr sp, [r1, #0x44]
mov r3, #0xd2
msr CPSR_c, r3
ldr r2, [r1, #0x0]!
msr SPSR_fc, r2
ldr lr, [r1, #0x40]
ldmib r1!, {r0-r14}^
nop
stmda sp!, {r0, r1, r2, r3, ip, lr}
ldmfd sp!, {pc}
}
#pragma section ITCM end
ARM_FUNC void OS_WaitIrq(BOOL clear, OSIrqMask irqFlags)
{
OSIntrMode lastIntrMode = OS_DisableInterrupts();