mirror of
https://github.com/pret/pokediamond.git
synced 2026-09-30 12:26:48 -05:00
@@ -963,6 +963,7 @@ SECTIONS {
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{
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. = ALIGN(32);
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SDK_AUTOLOAD.ITCM.START = .;
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OS_irqHandler.o (.itcm)
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arm9_itcm.o (.text)
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. = ALIGN(32);
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SDK_AUTOLOAD.ITCM.END = .;
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@@ -22,8 +22,8 @@ CP_SaveContext: ; 0x020D3648
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.balign 4
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_020D3684: .word 0x04000290
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arm_func_start CP_RestoreContext
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CP_RestoreContext: ; 0x020D3688
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arm_func_start CPi_RestoreContext
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CPi_RestoreContext: ; 0x020D3688
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stmdb sp!, {r4}
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ldr r1, _020D36C0 ; =0x04000290
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ldmia r0, {r2-r4,r12}
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@@ -60,7 +60,7 @@ _020CBB78: .word CP_SaveContext
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OS_LoadContext: ; 0x020CBB7C
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stmdb sp!, {r0,lr}
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add r0, r0, #0x48
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ldr r1, _020CBBBC ; =CP_RestoreContext
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ldr r1, _020CBBBC ; =CPi_RestoreContext
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blx r1
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ldmia sp!, {r0,lr}
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mrs r1, cpsr
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@@ -75,4 +75,4 @@ OS_LoadContext: ; 0x020CBB7C
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mov r0, r0
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subs pc, lr, #0x4
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.balign 4
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_020CBBBC: .word CP_RestoreContext
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_020CBBBC: .word CPi_RestoreContext
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@@ -3,129 +3,6 @@
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.section .text
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; OS
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arm_func_start OS_IrqHandler
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OS_IrqHandler: ; 0x01FF8000
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stmfd sp!, {lr}
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mov ip, #0x04000000
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add ip, ip, #0x210
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ldr r1, [ip, #-8]
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cmp r1, #0
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ldmeqfd sp!, {pc}
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ldmia ip, {r1, r2}
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ands r1, r1, r2
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ldmeqfd sp!, {pc}
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mov r3, #0x80000000
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_01FF8028:
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clz r0, r1
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bics r1, r1, r3, lsr r0
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bne _01FF8028
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mov r1, r3, lsr r0
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str r1, [ip, #0x4]
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rsbs r0, r0, #0x1f
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ldr r1, _01FF8050 ; =0x027E0000
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ldr r0, [r1, r0, lsl #2]
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ldr lr, _01FF8054 ; =0x01FF70B8
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bx r0
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_01FF8050: .word OS_IRQTable
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_01FF8054: .word OS_IrqHandler_ThreadSwitch
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arm_func_start OS_IrqHandler_ThreadSwitch
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OS_IrqHandler_ThreadSwitch: ; 01FF8058
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ldr ip, _01FF81A4
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mov r3, #0x0
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ldr ip, [ip]
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mov r2, #0x1
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cmp ip, #0x0
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beq _01FF80A8
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_01FF8070:
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str r2, [ip, #0x64]
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str r3, [ip, #0x78]
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str r3, [ip, #0x7c]
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ldr r0, [ip, #0x80]
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str r3, [ip, #0x80]
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mov ip, r0
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cmp ip, #0x0
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bne _01FF8070
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ldr ip, _01FF81A4
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str r3, [ip]
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str r3, [ip, #0x4]
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ldr ip, _01FF81A8
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mov r1, #0x1
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strh r1, [ip]
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_01FF80A8:
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ldr ip, _01FF81A8
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ldrh r1, [ip]
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cmp r1, #0x0
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ldreq pc, [sp], #0x4
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mov r1, #0x0
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strh r1, [ip]
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mov r3, #0xd2
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msr CPSR_c, r3
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add r2, ip, #0x8
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ldr r1, [r2]
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_01FF80D0:
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cmp r1, #0x0
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ldrneh r0, [r1, #0x64]
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cmpne r0, #0x1
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ldrne r1, [r1, #0x68]
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bne _01FF80D0
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cmp r1, #0x0
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bne _01FF80F8
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_01FF80EC:
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mov r3, #0x92
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msr CPSR_c, r3
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ldr pc, [sp], #0x4
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_01FF80F8:
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ldr r0, [ip, #0x4]
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cmp r1, r0
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beq _01FF80EC
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ldr r3, [ip, #0xC]
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cmp r3, #0x0
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beq _01FF8120
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stmdb sp!, {r0, r1, ip}
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mov lr, pc
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bx r3
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ldmia sp!, {r0, r1, ip}
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_01FF8120:
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str r1, [ip, #0x4]
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mrs r2, SPSR
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str r2, [r0, #0x0]!
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stmdb sp!, {r0, r1}
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add r0, r0, #0x0
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add r0, r0, #0x48
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ldr r1, _01FF81AC
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blx r1
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ldmia sp!, {r0, r1}
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ldmib sp!, {r2, r3}
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stmib r0!, {r2, r3}
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ldmib sp!, {r2, r3, ip, lr}
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stmib r0!, {r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr}^
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stmib r0!, {lr}
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mov r3, #0xd3
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msr CPSR_c, r3
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stmib r0!, {sp}
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stmfd sp!, {r1}
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add r0, r1, #0x0
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add r0, r0, #0x48
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ldr r1, _01FF81B0
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blx r1
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ldmfd sp!, {r1}
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ldr sp, [r1, #0x44]
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mov r3, #0xd2
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msr CPSR_c, r3
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ldr r2, [r1, #0x0]!
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msr SPSR_fc, r2
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ldr lr, [r1, #0x40]
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ldmib r1!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr}^
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nop
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stmda sp!, {r0, r1, r2, r3, ip, lr}
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ldmfd sp!, {pc}
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_01FF81A4: .word OSi_IrqThreadQueue
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_01FF81A8: .word OSi_ThreadInfo
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_01FF81AC: .word CP_SaveContext
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_01FF81B0: .word CP_RestoreContext
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.section .text
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arm_func_start OSi_DoBoot
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OSi_DoBoot: ; 0x01FF81B4
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mov ip, #0x04000000
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@@ -93,7 +93,7 @@
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.extern CPSi_sha1_init
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.extern CPSi_sha1_result
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.extern CPSi_sha1_result_prng
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.extern CP_RestoreContext
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.extern CPi_RestoreContext
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.extern CP_SaveContext
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.extern CTRDG_CpuCopy16
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.extern CTRDG_CpuCopy32
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@@ -15,4 +15,7 @@ typedef struct CPContext {
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u16 sqrt_mode;
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} CPContext;
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void CP_SaveContext(CPContext *context);
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void CPi_RestoreContext(const CPContext* context);
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#endif //POKEDIAMOND_CP_CONTEXT_H
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@@ -14,6 +14,8 @@ static inline OSIrqMask OS_GetIrqCheckFlag(void)
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return *(OSIrqMask *)HW_INTR_CHECK_BUF;
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}
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void OS_IrqHandler(void);
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void OS_IrqHandler_ThreadSwitch(void);
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void OS_WaitIrq(BOOL param1, u32 param2);
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#endif //POKEDIAMOND_OS_IRQHANDLER_H
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@@ -87,6 +87,8 @@ struct _OSThread
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u32 systemErrno;
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};
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extern OSThreadInfo OSi_ThreadInfo;
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void OS_SleepThread(OSThreadQueue * queue);
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void OS_WakeupThread(OSThreadQueue * queue);
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@@ -3,11 +3,132 @@
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#include "OS_system.h"
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#include "OS_thread.h"
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#include "sections.h"
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#include "CP_context.h"
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#pragma section DTCM begin
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OSThreadQueue OSi_IrqThreadQueue = { NULL, NULL };
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#pragma section DTCM end
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#pragma section ITCM begin
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ARM_FUNC asm void OS_IrqHandler(void)
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{
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stmfd sp!, {lr}
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mov ip, #0x04000000
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add ip, ip, #0x210
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ldr r1, [ip, #-8]
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cmp r1, #0
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ldmeqfd sp!, {pc}
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ldmia ip, {r1, r2}
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ands r1, r1, r2
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ldmeqfd sp!, {pc}
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mov r3, #0x80000000
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_01FF8028:
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clz r0, r1
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bics r1, r1, r3, lsr r0
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bne _01FF8028
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mov r1, r3, lsr r0
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str r1, [ip, #0x4]
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rsbs r0, r0, #0x1f
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ldr r1, =OS_IRQTable
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ldr r0, [r1, r0, lsl #2]
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ldr lr, =OS_IrqHandler_ThreadSwitch
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bx r0
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}
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ARM_FUNC asm void OS_IrqHandler_ThreadSwitch(void)
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{
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ldr ip, =OSi_IrqThreadQueue
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mov r3, #0x0
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ldr ip, [ip]
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mov r2, #0x1
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cmp ip, #0x0
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beq _01FF80A8
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_01FF8070:
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str r2, [ip, #0x64]
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str r3, [ip, #0x78]
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str r3, [ip, #0x7c]
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ldr r0, [ip, #0x80]
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str r3, [ip, #0x80]
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mov ip, r0
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cmp ip, #0x0
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bne _01FF8070
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ldr ip, =OSi_IrqThreadQueue
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str r3, [ip]
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str r3, [ip, #0x4]
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ldr ip, =OSi_ThreadInfo
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mov r1, #0x1
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strh r1, [ip]
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_01FF80A8:
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ldr ip, =OSi_ThreadInfo
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ldrh r1, [ip]
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cmp r1, #0x0
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ldreq pc, [sp], #0x4
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mov r1, #0x0
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strh r1, [ip]
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mov r3, #0xd2
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msr CPSR_c, r3
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add r2, ip, #0x8
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ldr r1, [r2]
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_01FF80D0:
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cmp r1, #0x0
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ldrneh r0, [r1, #0x64]
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cmpne r0, #0x1
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ldrne r1, [r1, #0x68]
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bne _01FF80D0
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cmp r1, #0x0
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bne _01FF80F8
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_01FF80EC:
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mov r3, #0x92
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msr CPSR_c, r3
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ldr pc, [sp], #0x4
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_01FF80F8:
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ldr r0, [ip, #0x4]
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cmp r1, r0
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beq _01FF80EC
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ldr r3, [ip, #0xC]
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cmp r3, #0x0
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beq _01FF8120
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stmdb sp!, {r0, r1, ip}
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mov lr, pc
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bx r3
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ldmia sp!, {r0, r1, ip}
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_01FF8120:
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str r1, [ip, #0x4]
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mrs r2, SPSR
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str r2, [r0, #0x0]!
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stmdb sp!, {r0, r1}
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add r0, r0, #0x0
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add r0, r0, #0x48
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ldr r1, =CP_SaveContext
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blx r1
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ldmia sp!, {r0, r1}
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ldmib sp!, {r2, r3}
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stmib r0!, {r2, r3}
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ldmib sp!, {r2, r3, ip, lr}
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stmib r0!, {r2-r14}^
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stmib r0!, {lr}
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mov r3, #0xd3
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msr CPSR_c, r3
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stmib r0!, {sp}
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stmfd sp!, {r1}
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add r0, r1, #0x0
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add r0, r0, #0x48
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ldr r1, =CPi_RestoreContext
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blx r1
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ldmfd sp!, {r1}
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ldr sp, [r1, #0x44]
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mov r3, #0xd2
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msr CPSR_c, r3
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ldr r2, [r1, #0x0]!
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msr SPSR_fc, r2
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ldr lr, [r1, #0x40]
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ldmib r1!, {r0-r14}^
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nop
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stmda sp!, {r0, r1, r2, r3, ip, lr}
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ldmfd sp!, {pc}
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}
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#pragma section ITCM end
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ARM_FUNC void OS_WaitIrq(BOOL clear, OSIrqMask irqFlags)
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{
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OSIntrMode lastIntrMode = OS_DisableInterrupts();
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Reference in New Issue
Block a user