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This commit is contained in:
Seth Barberee
2026-05-05 19:01:27 -07:00
parent cd97c8e570
commit c7fce3be4a
13 changed files with 2467 additions and 2160 deletions
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4
asm/include/main_0207F894.inc
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@@ -90,8 +90,8 @@
.public sub_0207A300
.public sub_0207A324
.public sub_0207A330
.public sub_0207AACC
.public sub_0207AB00
.public OS_GetDTCMAddress
.public OS_SetDPermissionsForProtectionRegion
.public sub_0207ADCC
.public sub_0207B854
.public sub_0207C750

4
asm/main_0207F894.s
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@@ -5368,7 +5368,7 @@ sub_02083E9C: ; 0x02083E9C
_02083ED4:
cmp r1, #0
beq _02083F28
bl sub_0207AACC
bl OS_GetDTCMAddress
ldr r1, _02084018 ; =CopyAndInterleave
add r3, sb, r5
cmp r3, r1
@@ -6279,7 +6279,7 @@ sub_02084A04: ; 0x02084A04
movne r1, #0x1000
moveq r1, #0x5000
mov r0, #0xf000
bl sub_0207AB00
bl OS_SetDPermissionsForProtectionRegion
_02084A3C:
mov r0, r4
bl SetIrqFlag

137
lib/NitroSDK/asm/include/os_arena.inc Normal file
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@@ -0,0 +1,137 @@
#pragma once
.public _0200002B
.public _0207AD0C
.public _020B2B9C
.public _020B2BAC
.public _022B9208
.public _022B958E
.public _022B9590
.public _022B9592
.public _022B9594
.public _022B9596
.public _022B9598
.public _022B959A
.public _022B959C
.public _022B959E
.public _022B95A0
.public _022B95A2
.public _022B95A4
.public _022B95E4
.public _022B95E8
.public _022B95EC
.public _022B9614
.public _022B9618
.public _022B961C
.public _022B9644
.public _022B9654
.public _022B966C
.public _022B9670
.public _022B967C
.public _022B973C
.public _022B98C4
.public _022B98CC
.public _022B98F0
.public _022B98F4
.public _022B98F8
.public _022B991C
.public _022B999C
.public _022B99A0
.public _022B99B0
.public _022B99BC
.public _ll_sdiv
.public _ll_udiv
.public _s32_div_f
.public _secure
.public ArrayCopy16
.public ArrayCopy32
.public ArrayFill32
.public AtomicExchange
.public CARD_Init
.public ClearIrqFlag
.public CTRDG_Init
.public DseMem_Free
.public DTCM_BSS
.public EnableIrqFiqFlags
.public EnableIrqFlag
.public FX_AtanIdxTable_
.public FX_Div
.public GetGameMode
.public GetProcessorMode
.public gGXState
.public GXi_DmaId
.public GXi_VRamLockId
.public GX_ResetBankForBGExtPltt
.public GX_SetBankForBGExtPltt
.public GX_ResetBankForSubBGExtPltt
.public GX_SetBankForSubBGExtPltt
.public GX_ResetBankForSubBGOBJExtPltt
.public GX_SetBankForSubBGOBJExtPltt
.public GX_ResetBankForOBJExtPltt
.public GX_SetBankForOBJExtPltt
.public GX_ResetBankForSubOBJExtPltt
.public GX_SetBankForSubOBJExtPltt
.public GX_ResetBankForTex
.public GX_SetBankForTex
.public GX_ResetBankForTexPltt
.public GX_SetBankForTexPltt
.public GX_HBlankIntr
.public G2S_GetBG0ScrPtr
.public G2_GetBG1ScrPtr
.public G2_GetBG2ScrPtr
.public G2_GetBG3ScrPtr
.public G2S_GetBG0CharPtr
.public G2S_GetBG1ScrPtr
.public G2S_GetBG1CharPtr
.public G2_GetBG0CharPtr
.public G2_GetBG1CharPtr
.public G2_GetBG2CharPtr
.public G2_GetBG3CharPtr
.public G3_LoadMtx43
.public G3_LoadMtx44
.public MI_DmaCopy16
.public MI_Init
.public MTX_LookAt
.public MTX_OrthoW
.public OS_InitReset
.public OS_IRQTable
.public OS_InitLock
.public OS_InitIrqTable
.public OS_ResetRequestIrqMask
.public OS_SetIrqStackChecker
.public OS_SetIrqFunction
.public OS_EnableIrqMask
.public OS_DisableIrqMask
.public OSi_InitVramExclusive
.public PM_Init
.public PXI_Init
.public sClrImg
.public sDispMode
.public SDK_MAIN_ARENA_LO
.public SDK_SECTION_ARENA_DTCM_START
.public SDK_SECTION_ARENA_EX_START
.public SDK_SECTION_ARENA_ITCM_START
.public SetIrqFiqFlags
.public SetIrqFlag
.public sIsDispOn
.public sSubBGExtPltt
.public sTexPlttStartAddrTable
.public sTexStartAddrTable
.public sub_0206F808
.public sub_0206FD88
.public sub_0206FDE0
.public sub_02078BF4
.public sub_0207BAC8
.public sub_0207BC4C
.public sub_0207BCCC
.public sub_0207BDA8
.public sub_0207BE6C
.public sub_0207C0FC
.public sub_02080EF0
.public sub_02080F30
.public sub_02085BD4
.public SVC_WaitByLoop
.public THREAD_INFO_STRUCT
.public WaitForever2
.public WaitForInterrupt
.public sub_02079DA0

0
asm/include/OS_interrupt.inc → lib/NitroSDK/asm/include/os_interrupt.inc
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126
lib/NitroSDK/asm/include/os_spinlock.inc Normal file
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@@ -0,0 +1,126 @@
#pragma once
.public _0200002B
.public _0207AD0C
.public _020B2B9C
.public _020B2BAC
.public _022B9208
.public _022B958E
.public _022B9590
.public _022B9592
.public _022B9594
.public _022B9596
.public _022B9598
.public _022B959A
.public _022B959C
.public _022B959E
.public _022B95A0
.public _022B95A2
.public _022B95A4
.public _022B95E4
.public _022B95E8
.public _022B95EC
.public _022B9614
.public _022B9618
.public _022B961C
.public _022B9644
.public _022B9654
.public _022B966C
.public _022B9670
.public _022B967C
.public _022B973C
.public _022B98C4
.public _022B98CC
.public _022B98F0
.public _022B98F4
.public _022B98F8
.public _022B991C
.public _022B999C
.public _022B99A0
.public _022B99B0
.public _022B99BC
.public _ll_sdiv
.public _ll_udiv
.public _s32_div_f
.public _secure
.public ArrayCopy16
.public ArrayCopy32
.public ArrayFill32
.public AtomicExchange
.public CARD_Init
.public ClearIrqFlag
.public CTRDG_Init
.public DseMem_Free
.public DTCM_BSS
.public EnableIrqFiqFlags
.public EnableIrqFlag
.public FX_AtanIdxTable_
.public FX_Div
.public GetGameMode
.public GetProcessorMode
.public gGXState
.public GXi_DmaId
.public GXi_VRamLockId
.public GX_ResetBankForBGExtPltt
.public GX_SetBankForBGExtPltt
.public GX_ResetBankForSubBGExtPltt
.public GX_SetBankForSubBGExtPltt
.public GX_ResetBankForSubBGOBJExtPltt
.public GX_SetBankForSubBGOBJExtPltt
.public GX_ResetBankForOBJExtPltt
.public GX_SetBankForOBJExtPltt
.public GX_ResetBankForSubOBJExtPltt
.public GX_SetBankForSubOBJExtPltt
.public GX_ResetBankForTex
.public GX_SetBankForTex
.public GX_ResetBankForTexPltt
.public GX_SetBankForTexPltt
.public GX_HBlankIntr
.public G2S_GetBG0ScrPtr
.public G2_GetBG1ScrPtr
.public G2_GetBG2ScrPtr
.public G2_GetBG3ScrPtr
.public G2S_GetBG0CharPtr
.public G2S_GetBG1ScrPtr
.public G2S_GetBG1CharPtr
.public G2_GetBG0CharPtr
.public G2_GetBG1CharPtr
.public G2_GetBG2CharPtr
.public G2_GetBG3CharPtr
.public MI_DmaCopy16
.public MI_Init
.public MTX_LookAt
.public MTX_OrthoW
.public OS_InitReset
.public OS_IRQTable
.public OS_SleepThread
.public OSi_InitVramExclusive
.public PM_Init
.public PXI_Init
.public sClrImg
.public sDispMode
.public SDK_MAIN_ARENA_LO
.public SDK_SECTION_ARENA_DTCM_START
.public SDK_SECTION_ARENA_EX_START
.public SDK_SECTION_ARENA_ITCM_START
.public SetIrqFiqFlags
.public SetIrqFlag
.public sIsDispOn
.public sSubBGExtPltt
.public sTexPlttStartAddrTable
.public sTexStartAddrTable
.public sub_0206F808
.public sub_0206FD88
.public sub_0206FDE0
.public sub_0207BAC8
.public sub_0207BC4C
.public sub_0207BCCC
.public sub_0207BDA8
.public sub_0207BE6C
.public sub_0207C0FC
.public sub_02080EF0
.public sub_02080F30
.public sub_02085BD4
.public SVC_WaitByLoop
.public THREAD_INFO_STRUCT
.public WaitForever2
.public WaitForInterrupt

4
lib/NitroSDK/asm/include/os_thread.inc
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@@ -133,3 +133,7 @@
.public THREAD_INFO_STRUCT
.public WaitForever2
.public WaitForInterrupt
.public sub_0207B1E8
.public sub_0207B040
.public sub_0207B17C

1623
lib/NitroSDK/asm/os_arena.s Normal file
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File diff suppressed because it is too large Load Diff

121
lib/NitroSDK/asm/os_cache.s Normal file
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@@ -0,0 +1,121 @@
.include "asm/macros.inc"
.text
arm_func_start sub_0207A238
sub_0207A238: ; 0x0207A238
mov r0, #0
mcr p15, 0, r0, c7, c6, 0
bx lr
arm_func_end sub_0207A238
arm_func_start sub_0207A244
sub_0207A244: ; 0x0207A244
mov r1, #0
_0207A248:
mov r0, #0
_0207A24C:
orr r2, r1, r0
mcr p15, 0, r2, c7, c10, 2
add r0, r0, #0x20
cmp r0, #0x400
blt _0207A24C
add r1, r1, #0x40000000
cmp r1, #0
bne _0207A248
bx lr
arm_func_end sub_0207A244
arm_func_start DC_FlushAll
DC_FlushAll: ; 0x0207A270
mov ip, #0
mov r1, #0
_0207A278:
mov r0, #0
_0207A27C:
orr r2, r1, r0
mcr p15, 0, ip, c7, c10, 4
mcr p15, 0, r2, c7, c14, 2
add r0, r0, #0x20
cmp r0, #0x400
blt _0207A27C
add r1, r1, #0x40000000
cmp r1, #0
bne _0207A278
bx lr
arm_func_end DC_FlushAll
arm_func_start DC_InvalidateRange
DC_InvalidateRange: ; 0x0207A2A4
add r1, r1, r0
bic r0, r0, #0x1f
_0207A2AC:
mcr p15, 0, r0, c7, c6, 1
add r0, r0, #0x20
cmp r0, r1
blt _0207A2AC
bx lr
arm_func_end DC_InvalidateRange
arm_func_start sub_0207A2C0
sub_0207A2C0: ; 0x0207A2C0
add r1, r1, r0
bic r0, r0, #0x1f
_0207A2C8:
mcr p15, 0, r0, c7, c10, 1
add r0, r0, #0x20
cmp r0, r1
blt _0207A2C8
bx lr
arm_func_end sub_0207A2C0
arm_func_start DC_FlushRange
DC_FlushRange: ; 0x0207A2DC
mov ip, #0
add r1, r1, r0
bic r0, r0, #0x1f
_0207A2E8:
mcr p15, 0, ip, c7, c10, 4
mcr p15, 0, r0, c7, c14, 1
add r0, r0, #0x20
cmp r0, r1
blt _0207A2E8
bx lr
arm_func_end DC_FlushRange
arm_func_start sub_0207A300
sub_0207A300: ; 0x0207A300
mov r0, #0
mcr p15, 0, r0, c7, c10, 4
bx lr
arm_func_end sub_0207A300
arm_func_start sub_0207A30C
sub_0207A30C: ; 0x0207A30C
mrc p15, 0, r1, c1, c0, 0
and r0, r1, #0x1000
mov r0, r0, lsr #0xc
orr r1, r1, #0x1000
mcr p15, 0, r1, c1, c0, 0
bx lr
arm_func_end sub_0207A30C
arm_func_start sub_0207A324
sub_0207A324: ; 0x0207A324
mov r0, #0
mcr p15, 0, r0, c7, c5, 0
bx lr
arm_func_end sub_0207A324
arm_func_start sub_0207A330
sub_0207A330: ; 0x0207A330
add r1, r1, r0
bic r0, r0, #0x1f
_0207A338:
mcr p15, 0, r0, c7, c5, 1
add r0, r0, #0x20
cmp r0, r1
blt _0207A338
bx lr
arm_func_end sub_0207A330

58
lib/NitroSDK/asm/os_init.s Normal file
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@@ -0,0 +1,58 @@
.include "asm/macros.inc"
.text
.public OS_InitArena
.public PXI_Init
.public OS_InitLock
.public OS_InitArenaEx
.public OS_InitIrqTable
.public OS_SetIrqStackChecker
.public OS_InitException
.public MI_Init
.public OS_InitVAlarm
.public OSi_InitVramExclusive
.public OS_InitThread
.public OS_InitReset
.public CTRDG_Init
.public CARD_Init
.public PM_Init
.public OSi_WaitVCount0
arm_func_start OSi_WaitVCount0
OSi_WaitVCount0: ; 0x0207A34C
mov ip, #0x4000000
ldr r1, [ip, #0x208]
str ip, [ip, #0x208]
_0207A358:
ldrh r0, [ip, #6]
cmp r0, #0
bne _0207A358
str r1, [ip, #0x208]
bx lr
arm_func_end OSi_WaitVCount0
; https://decomp.me/scratch/EcUDd
arm_func_start OS_Init
OS_Init: ; 0x0207A36C
stmdb sp!, {r3, lr}
bl OS_InitArena
bl PXI_Init
bl OS_InitLock
bl OS_InitArenaEx
bl OS_InitIrqTable
bl OS_SetIrqStackChecker
bl OS_InitException
bl MI_Init
bl OS_InitVAlarm
bl OSi_InitVramExclusive
bl OS_InitThread
bl OS_InitReset
bl CTRDG_Init
bl CARD_Init
bl PM_Init
bl OSi_WaitVCount0
ldmia sp!, {r3, pc}
arm_func_end OS_Init

387
lib/NitroSDK/asm/os_interrupt.s Normal file
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@@ -0,0 +1,387 @@
.include "asm/macros.inc"
.include "include/os_interrupt.inc"
.text
arm_func_start sub_02078900
sub_02078900: ; 0x02078900
stmdb sp!, {r4, r5, r6, lr}
mov r5, r0
mov r4, r1
bl EnableIrqFlag
cmp r5, #0
beq _02078930
ldr r1, _0207896C ; =OS_IRQTable
mvn r2, r4
add r1, r1, #0x3000
ldr r3, [r1, #0xff8]
and r2, r3, r2
str r2, [r1, #0xff8]
_02078930:
bl SetIrqFlag
ldr r1, _0207896C ; =OS_IRQTable
add r0, r1, #0x3000
ldr r0, [r0, #0xff8]
tst r4, r0
ldmneia sp!, {r4, r5, r6, pc}
add r0, r1, #0x3f8
ldr r5, _02078970 ; =DTCM_BSS
add r6, r0, #0x3c00
_02078954:
mov r0, r5
bl OS_SleepThread
ldr r0, [r6]
tst r4, r0
beq _02078954
ldmia sp!, {r4, r5, r6, pc}
.align 2, 0
_0207896C: .word OS_IRQTable
_02078970: .word DTCM_BSS
arm_func_end sub_02078900
arm_func_start sub_02078974
sub_02078974: ; 0x02078974
bx lr
arm_func_end sub_02078974
arm_func_start sub_02078978
sub_02078978: ; 0x02078978
stmdb sp!, {r3, r4, r5, lr}
mov r1, #0xc
mul r5, r0, r1
ldr r2, _020789EC ; =_022B95E4
ldr r3, _020789F0 ; =_020B2B9C
mov r4, r0, lsl #1
ldr r1, [r2, r5]
mov r0, #0
ldrh r3, [r3, r4]
mov r4, #1
str r0, [r2, r5]
cmp r1, #0
mov r4, r4, lsl r3
beq _020789BC
ldr r0, _020789F4 ; =_022B95EC
ldr r0, [r0, r5]
blx r1
_020789BC:
ldr r0, _020789F8 ; =OS_IRQTable
ldr r1, _020789FC ; =_022B95E8
add r0, r0, #0x3000
ldr r2, [r0, #0xff8]
ldr r1, [r1, r5]
orr r2, r2, r4
str r2, [r0, #0xff8]
cmp r1, #0
ldmneia sp!, {r3, r4, r5, pc}
mov r0, r4
bl OS_DisableIrqMask
ldmia sp!, {r3, r4, r5, pc}
.align 2, 0
_020789EC: .word _022B95E4
_020789F0: .word _020B2B9C
_020789F4: .word _022B95EC
_020789F8: .word OS_IRQTable
_020789FC: .word _022B95E8
arm_func_end sub_02078978
arm_func_start sub_02078A00
sub_02078A00: ; 0x02078A00
ldr ip, _02078A0C ; =sub_02078978
mov r0, #0
bx ip
.align 2, 0
_02078A0C: .word sub_02078978
arm_func_end sub_02078A00
arm_func_start sub_02078A10
sub_02078A10: ; 0x02078A10
ldr ip, _02078A1C ; =sub_02078978
mov r0, #1
bx ip
.align 2, 0
_02078A1C: .word sub_02078978
arm_func_end sub_02078A10
arm_func_start sub_02078A20
sub_02078A20: ; 0x02078A20
ldr ip, _02078A2C ; =sub_02078978
mov r0, #2
bx ip
.align 2, 0
_02078A2C: .word sub_02078978
arm_func_end sub_02078A20
arm_func_start sub_02078A30
sub_02078A30: ; 0x02078A30
ldr ip, _02078A3C ; =sub_02078978
mov r0, #3
bx ip
.align 2, 0
_02078A3C: .word sub_02078978
arm_func_end sub_02078A30
arm_func_start sub_02078A40
sub_02078A40: ; 0x02078A40
ldr ip, _02078A4C ; =sub_02078978
mov r0, #4
bx ip
.align 2, 0
_02078A4C: .word sub_02078978
arm_func_end sub_02078A40
arm_func_start sub_02078A50
sub_02078A50: ; 0x02078A50
ldr ip, _02078A5C ; =sub_02078978
mov r0, #5
bx ip
.align 2, 0
_02078A5C: .word sub_02078978
arm_func_end sub_02078A50
arm_func_start sub_02078A60
sub_02078A60: ; 0x02078A60
ldr ip, _02078A6C ; =sub_02078978
mov r0, #6
bx ip
.align 2, 0
_02078A6C: .word sub_02078978
arm_func_end sub_02078A60
arm_func_start sub_02078A70
sub_02078A70: ; 0x02078A70
ldr ip, _02078A7C ; =sub_02078978
mov r0, #7
bx ip
.align 2, 0
_02078A7C: .word sub_02078978
arm_func_end sub_02078A70
arm_func_start OS_InitIrqTable
OS_InitIrqTable: ; 0x02078A80
ldr r0, _02078A94 ; =DTCM_BSS
mov r1, #0
str r1, [r0, #4]
str r1, [r0]
bx lr
.align 2, 0
_02078A94: .word DTCM_BSS
arm_func_end OS_InitIrqTable
arm_func_start OS_SetIrqFunction
OS_SetIrqFunction: ; 0x02078A98
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
mov r8, #0
mov r2, #0xc
ldr r4, _02078B18 ; =OS_IRQTable
ldr r6, _02078B1C ; =_022B95E4
mov r7, r8
mov lr, r8
mov ip, #1
mov r3, r2
_02078ABC:
tst r0, #1
beq _02078B04
mov sb, r7
cmp r8, #8
blt _02078AE0
cmp r8, #0xb
suble r5, r8, #8
mlale sb, r5, r3, r6
ble _02078AFC
_02078AE0:
cmp r8, #3
blt _02078AF8
cmp r8, #6
addle r5, r8, #1
mlale sb, r5, r2, r6
ble _02078AFC
_02078AF8:
str r1, [r4, r8, lsl #2]
_02078AFC:
cmp sb, #0
stmneia sb, {r1, ip, lr}
_02078B04:
add r8, r8, #1
cmp r8, #0x16
mov r0, r0, lsr #1
blt _02078ABC
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
.align 2, 0
_02078B18: .word OS_IRQTable
_02078B1C: .word _022B95E4
arm_func_end OS_SetIrqFunction
arm_func_start sub_02078B20
sub_02078B20: ; 0x02078B20
ldr r2, _02078BA4 ; =OS_IRQTable
mov r1, #0
_02078B28:
tst r0, #1
beq _02078B88
cmp r1, #8
blt _02078B58
cmp r1, #0xb
bgt _02078B58
sub r1, r1, #8
mov r0, #0xc
mul r2, r1, r0
ldr r0, _02078BA8 ; =_022B95E4
ldr r0, [r0, r2]
bx lr
_02078B58:
cmp r1, #3
blt _02078B80
cmp r1, #6
bgt _02078B80
add r1, r1, #1
mov r0, #0xc
mul r2, r1, r0
ldr r0, _02078BA8 ; =_022B95E4
ldr r0, [r0, r2]
bx lr
_02078B80:
ldr r0, [r2]
bx lr
_02078B88:
add r1, r1, #1
cmp r1, #0x16
mov r0, r0, lsr #1
add r2, r2, #4
blt _02078B28
mov r0, #0
bx lr
.align 2, 0
_02078BA4: .word OS_IRQTable
_02078BA8: .word _022B95E4
arm_func_end sub_02078B20
arm_func_start sub_02078BAC
sub_02078BAC: ; 0x02078BAC
stmdb sp!, {r4, r5, r6, lr}
mov r3, #0xc
mul r6, r0, r3
ldr ip, _02078BE8 ; =_022B95E4
add r4, r0, #8
mov r5, #1
mov r0, r5, lsl r4
ldr r3, _02078BEC ; =_022B95EC
str r1, [ip, r6]
str r2, [r3, r6]
bl OS_EnableIrqMask
and r1, r0, r5, lsl r4
ldr r0, _02078BF0 ; =_022B95E8
str r1, [r0, r6]
ldmia sp!, {r4, r5, r6, pc}
.align 2, 0
_02078BE8: .word _022B95E4
_02078BEC: .word _022B95EC
_02078BF0: .word _022B95E8
arm_func_end sub_02078BAC
arm_func_start sub_02078BF4
sub_02078BF4: ; 0x02078BF4
stmdb sp!, {r4, lr}
mov r3, #0xc
mul r4, r0, r3
ldr ip, _02078C30 ; =_022B9614
add r0, r0, #3
mov r3, #1
mov r0, r3, lsl r0
ldr r3, _02078C34 ; =_022B961C
str r1, [ip, r4]
str r2, [r3, r4]
bl OS_EnableIrqMask
ldr r0, _02078C38 ; =_022B9618
mov r1, #1
str r1, [r0, r4]
ldmia sp!, {r4, pc}
.align 2, 0
_02078C30: .word _022B9614
_02078C34: .word _022B961C
_02078C38: .word _022B9618
arm_func_end sub_02078BF4
arm_func_start OS_SetIrqMask
OS_SetIrqMask: ; 0x02078C3C
ldr r3, _02078C64 ; =0x04000208
mov r1, #0
ldrh r2, [r3]
strh r1, [r3]
ldr r1, [r3, #8]
str r0, [r3, #8]
ldrh r0, [r3]
mov r0, r1
strh r2, [r3]
bx lr
.align 2, 0
_02078C64: .word 0x04000208
arm_func_end OS_SetIrqMask
arm_func_start OS_EnableIrqMask
OS_EnableIrqMask: ; 0x02078C68
ldr r3, _02078C94 ; =0x04000208
mov r1, #0
ldrh r2, [r3]
strh r1, [r3]
ldr r1, [r3, #8]
orr r0, r1, r0
str r0, [r3, #8]
ldrh r0, [r3]
mov r0, r1
strh r2, [r3]
bx lr
.align 2, 0
_02078C94: .word 0x04000208
arm_func_end OS_EnableIrqMask
arm_func_start OS_DisableIrqMask
OS_DisableIrqMask: ; 0x02078C98
ldr ip, _02078CC4 ; =0x04000208
mov r2, #0
ldrh r3, [ip]
mvn r1, r0
strh r2, [ip]
ldr r0, [ip, #8]
and r1, r0, r1
str r1, [ip, #8]
ldrh r1, [ip]
strh r3, [ip]
bx lr
.align 2, 0
_02078CC4: .word 0x04000208
arm_func_end OS_DisableIrqMask
arm_func_start OS_ResetRequestIrqMask
OS_ResetRequestIrqMask: ; 0x02078CC8
ldr r3, _02078CF0 ; =0x04000208
mov r1, #0
ldrh r2, [r3]
strh r1, [r3]
ldr r1, [r3, #0xc]
str r0, [r3, #0xc]
ldrh r0, [r3]
mov r0, r1
strh r2, [r3]
bx lr
.align 2, 0
_02078CF0: .word 0x04000208
arm_func_end OS_ResetRequestIrqMask
arm_func_start OS_SetIrqStackChecker
OS_SetIrqStackChecker: ; 0x02078CF4
ldr ip, _02078D18 ; =OS_IRQTable
ldr r3, _02078D1C ; =0xFDDB597D
add r0, ip, #0x3000
ldr r2, _02078D20 ; =0x7BF9DD5B
ldr r1, _02078D24 ; =0x00000800
str r3, [r0, #0xf7c]
add r0, ip, #0x3f80
str r2, [r0, -r1]
bx lr
.align 2, 0
_02078D18: .word OS_IRQTable
_02078D1C: .word 0xFDDB597D
_02078D20: .word 0x7BF9DD5B
_02078D24: .word 0x00000800
arm_func_end OS_SetIrqStackChecker

386
asm/OS_interrupt.s → lib/NitroSDK/asm/os_spinlock.s
View File

@@ -1,391 +1,9 @@
.include "asm/macros.inc"
.include "include/OS_interrupt.inc"
.include "include/os_spinlock.inc"
.text
arm_func_start sub_02078900
sub_02078900: ; 0x02078900
stmdb sp!, {r4, r5, r6, lr}
mov r5, r0
mov r4, r1
bl EnableIrqFlag
cmp r5, #0
beq _02078930
ldr r1, _0207896C ; =OS_IRQTable
mvn r2, r4
add r1, r1, #0x3000
ldr r3, [r1, #0xff8]
and r2, r3, r2
str r2, [r1, #0xff8]
_02078930:
bl SetIrqFlag
ldr r1, _0207896C ; =OS_IRQTable
add r0, r1, #0x3000
ldr r0, [r0, #0xff8]
tst r4, r0
ldmneia sp!, {r4, r5, r6, pc}
add r0, r1, #0x3f8
ldr r5, _02078970 ; =DTCM_BSS
add r6, r0, #0x3c00
_02078954:
mov r0, r5
bl OS_SleepThread
ldr r0, [r6]
tst r4, r0
beq _02078954
ldmia sp!, {r4, r5, r6, pc}
.align 2, 0
_0207896C: .word OS_IRQTable
_02078970: .word DTCM_BSS
arm_func_end sub_02078900
arm_func_start sub_02078974
sub_02078974: ; 0x02078974
bx lr
arm_func_end sub_02078974
arm_func_start sub_02078978
sub_02078978: ; 0x02078978
stmdb sp!, {r3, r4, r5, lr}
mov r1, #0xc
mul r5, r0, r1
ldr r2, _020789EC ; =_022B95E4
ldr r3, _020789F0 ; =_020B2B9C
mov r4, r0, lsl #1
ldr r1, [r2, r5]
mov r0, #0
ldrh r3, [r3, r4]
mov r4, #1
str r0, [r2, r5]
cmp r1, #0
mov r4, r4, lsl r3
beq _020789BC
ldr r0, _020789F4 ; =_022B95EC
ldr r0, [r0, r5]
blx r1
_020789BC:
ldr r0, _020789F8 ; =OS_IRQTable
ldr r1, _020789FC ; =_022B95E8
add r0, r0, #0x3000
ldr r2, [r0, #0xff8]
ldr r1, [r1, r5]
orr r2, r2, r4
str r2, [r0, #0xff8]
cmp r1, #0
ldmneia sp!, {r3, r4, r5, pc}
mov r0, r4
bl OS_DisableIrqMask
ldmia sp!, {r3, r4, r5, pc}
.align 2, 0
_020789EC: .word _022B95E4
_020789F0: .word _020B2B9C
_020789F4: .word _022B95EC
_020789F8: .word OS_IRQTable
_020789FC: .word _022B95E8
arm_func_end sub_02078978
arm_func_start sub_02078A00
sub_02078A00: ; 0x02078A00
ldr ip, _02078A0C ; =sub_02078978
mov r0, #0
bx ip
.align 2, 0
_02078A0C: .word sub_02078978
arm_func_end sub_02078A00
arm_func_start sub_02078A10
sub_02078A10: ; 0x02078A10
ldr ip, _02078A1C ; =sub_02078978
mov r0, #1
bx ip
.align 2, 0
_02078A1C: .word sub_02078978
arm_func_end sub_02078A10
arm_func_start sub_02078A20
sub_02078A20: ; 0x02078A20
ldr ip, _02078A2C ; =sub_02078978
mov r0, #2
bx ip
.align 2, 0
_02078A2C: .word sub_02078978
arm_func_end sub_02078A20
arm_func_start sub_02078A30
sub_02078A30: ; 0x02078A30
ldr ip, _02078A3C ; =sub_02078978
mov r0, #3
bx ip
.align 2, 0
_02078A3C: .word sub_02078978
arm_func_end sub_02078A30
arm_func_start sub_02078A40
sub_02078A40: ; 0x02078A40
ldr ip, _02078A4C ; =sub_02078978
mov r0, #4
bx ip
.align 2, 0
_02078A4C: .word sub_02078978
arm_func_end sub_02078A40
arm_func_start sub_02078A50
sub_02078A50: ; 0x02078A50
ldr ip, _02078A5C ; =sub_02078978
mov r0, #5
bx ip
.align 2, 0
_02078A5C: .word sub_02078978
arm_func_end sub_02078A50
arm_func_start sub_02078A60
sub_02078A60: ; 0x02078A60
ldr ip, _02078A6C ; =sub_02078978
mov r0, #6
bx ip
.align 2, 0
_02078A6C: .word sub_02078978
arm_func_end sub_02078A60
arm_func_start sub_02078A70
sub_02078A70: ; 0x02078A70
ldr ip, _02078A7C ; =sub_02078978
mov r0, #7
bx ip
.align 2, 0
_02078A7C: .word sub_02078978
arm_func_end sub_02078A70
arm_func_start OS_InitIrqTable
OS_InitIrqTable: ; 0x02078A80
ldr r0, _02078A94 ; =DTCM_BSS
mov r1, #0
str r1, [r0, #4]
str r1, [r0]
bx lr
.align 2, 0
_02078A94: .word DTCM_BSS
arm_func_end OS_InitIrqTable
arm_func_start OS_SetIrqFunction
OS_SetIrqFunction: ; 0x02078A98
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
mov r8, #0
mov r2, #0xc
ldr r4, _02078B18 ; =OS_IRQTable
ldr r6, _02078B1C ; =_022B95E4
mov r7, r8
mov lr, r8
mov ip, #1
mov r3, r2
_02078ABC:
tst r0, #1
beq _02078B04
mov sb, r7
cmp r8, #8
blt _02078AE0
cmp r8, #0xb
suble r5, r8, #8
mlale sb, r5, r3, r6
ble _02078AFC
_02078AE0:
cmp r8, #3
blt _02078AF8
cmp r8, #6
addle r5, r8, #1
mlale sb, r5, r2, r6
ble _02078AFC
_02078AF8:
str r1, [r4, r8, lsl #2]
_02078AFC:
cmp sb, #0
stmneia sb, {r1, ip, lr}
_02078B04:
add r8, r8, #1
cmp r8, #0x16
mov r0, r0, lsr #1
blt _02078ABC
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
.align 2, 0
_02078B18: .word OS_IRQTable
_02078B1C: .word _022B95E4
arm_func_end OS_SetIrqFunction
arm_func_start sub_02078B20
sub_02078B20: ; 0x02078B20
ldr r2, _02078BA4 ; =OS_IRQTable
mov r1, #0
_02078B28:
tst r0, #1
beq _02078B88
cmp r1, #8
blt _02078B58
cmp r1, #0xb
bgt _02078B58
sub r1, r1, #8
mov r0, #0xc
mul r2, r1, r0
ldr r0, _02078BA8 ; =_022B95E4
ldr r0, [r0, r2]
bx lr
_02078B58:
cmp r1, #3
blt _02078B80
cmp r1, #6
bgt _02078B80
add r1, r1, #1
mov r0, #0xc
mul r2, r1, r0
ldr r0, _02078BA8 ; =_022B95E4
ldr r0, [r0, r2]
bx lr
_02078B80:
ldr r0, [r2]
bx lr
_02078B88:
add r1, r1, #1
cmp r1, #0x16
mov r0, r0, lsr #1
add r2, r2, #4
blt _02078B28
mov r0, #0
bx lr
.align 2, 0
_02078BA4: .word OS_IRQTable
_02078BA8: .word _022B95E4
arm_func_end sub_02078B20
arm_func_start sub_02078BAC
sub_02078BAC: ; 0x02078BAC
stmdb sp!, {r4, r5, r6, lr}
mov r3, #0xc
mul r6, r0, r3
ldr ip, _02078BE8 ; =_022B95E4
add r4, r0, #8
mov r5, #1
mov r0, r5, lsl r4
ldr r3, _02078BEC ; =_022B95EC
str r1, [ip, r6]
str r2, [r3, r6]
bl OS_EnableIrqMask
and r1, r0, r5, lsl r4
ldr r0, _02078BF0 ; =_022B95E8
str r1, [r0, r6]
ldmia sp!, {r4, r5, r6, pc}
.align 2, 0
_02078BE8: .word _022B95E4
_02078BEC: .word _022B95EC
_02078BF0: .word _022B95E8
arm_func_end sub_02078BAC
arm_func_start sub_02078BF4
sub_02078BF4: ; 0x02078BF4
stmdb sp!, {r4, lr}
mov r3, #0xc
mul r4, r0, r3
ldr ip, _02078C30 ; =_022B9614
add r0, r0, #3
mov r3, #1
mov r0, r3, lsl r0
ldr r3, _02078C34 ; =_022B961C
str r1, [ip, r4]
str r2, [r3, r4]
bl OS_EnableIrqMask
ldr r0, _02078C38 ; =_022B9618
mov r1, #1
str r1, [r0, r4]
ldmia sp!, {r4, pc}
.align 2, 0
_02078C30: .word _022B9614
_02078C34: .word _022B961C
_02078C38: .word _022B9618
arm_func_end sub_02078BF4
arm_func_start OS_SetIrqMask
OS_SetIrqMask: ; 0x02078C3C
ldr r3, _02078C64 ; =0x04000208
mov r1, #0
ldrh r2, [r3]
strh r1, [r3]
ldr r1, [r3, #8]
str r0, [r3, #8]
ldrh r0, [r3]
mov r0, r1
strh r2, [r3]
bx lr
.align 2, 0
_02078C64: .word 0x04000208
arm_func_end OS_SetIrqMask
arm_func_start OS_EnableIrqMask
OS_EnableIrqMask: ; 0x02078C68
ldr r3, _02078C94 ; =0x04000208
mov r1, #0
ldrh r2, [r3]
strh r1, [r3]
ldr r1, [r3, #8]
orr r0, r1, r0
str r0, [r3, #8]
ldrh r0, [r3]
mov r0, r1
strh r2, [r3]
bx lr
.align 2, 0
_02078C94: .word 0x04000208
arm_func_end OS_EnableIrqMask
arm_func_start OS_DisableIrqMask
OS_DisableIrqMask: ; 0x02078C98
ldr ip, _02078CC4 ; =0x04000208
mov r2, #0
ldrh r3, [ip]
mvn r1, r0
strh r2, [ip]
ldr r0, [ip, #8]
and r1, r0, r1
str r1, [ip, #8]
ldrh r1, [ip]
strh r3, [ip]
bx lr
.align 2, 0
_02078CC4: .word 0x04000208
arm_func_end OS_DisableIrqMask
arm_func_start OS_ResetRequestIrqMask
OS_ResetRequestIrqMask: ; 0x02078CC8
ldr r3, _02078CF0 ; =0x04000208
mov r1, #0
ldrh r2, [r3]
strh r1, [r3]
ldr r1, [r3, #0xc]
str r0, [r3, #0xc]
ldrh r0, [r3]
mov r0, r1
strh r2, [r3]
bx lr
.align 2, 0
_02078CF0: .word 0x04000208
arm_func_end OS_ResetRequestIrqMask
arm_func_start OS_SetIrqStackChecker
OS_SetIrqStackChecker: ; 0x02078CF4
ldr ip, _02078D18 ; =OS_IRQTable
ldr r3, _02078D1C ; =0xFDDB597D
add r0, ip, #0x3000
ldr r2, _02078D20 ; =0x7BF9DD5B
ldr r1, _02078D24 ; =0x00000800
str r3, [r0, #0xf7c]
add r0, ip, #0x3f80
str r2, [r0, -r1]
bx lr
.align 2, 0
_02078D18: .word OS_IRQTable
_02078D1C: .word 0xFDDB597D
_02078D20: .word 0x7BF9DD5B
_02078D24: .word 0x00000800
arm_func_end OS_SetIrqStackChecker
arm_func_start OS_InitLock
arm_func_start OS_InitLock
OS_InitLock: ; 0x02078D28
stmdb sp!, {r3, r4, r5, lr}
ldr r3, _02078DE4 ; =_022B9644

1771
lib/NitroSDK/asm/os_thread.s
View File

File diff suppressed because it is too large Load Diff

6
main.lsf
View File

@@ -233,8 +233,12 @@ Static main
Object lib/NitroSDK/asm/gx_load2d.o
Object lib/NitroSDK/asm/gx_load3d.o
Object lib/NitroSDK/asm/gx_asm.o
Object asm/OS_interrupt.o
Object lib/NitroSDK/asm/os_interrupt.o
Object lib/NitroSDK/asm/os_spinlock.o
Object lib/NitroSDK/asm/os_thread.o
Object lib/NitroSDK/asm/os_cache.o
Object lib/NitroSDK/asm/os_init.o
Object lib/NitroSDK/asm/os_arena.o
Object src/main_0207B848.o
Object asm/main_0207B854.o
Object src/main_0207B860.o