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Merge pull request #284 from SethBarberee/more_nitro_july
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Browse Source 
More nitro, itcm, and DSE work
This commit is contained in:
AnonymousRandomPerson
2026-07-25 16:13:28 -04:00
committed by GitHub
parent 5d155e351a 8e05683d74
commit bee717cd0f
107 changed files with 6759 additions and 3324 deletions
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10
asm/include/main_02003DB8.inc
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@@ -61,7 +61,7 @@
.public FS_SeekFile
.public FS_UnloadOverlay
.public GetDsFirmwareUserSettings
.public GetOverlayInfo
.public FS_LoadOverlayInfo
.public GX_BeginLoadBGExtPltt
.public GX_BeginLoadOBJExtPltt
.public GX_EndLoadBGExtPltt
@@ -69,11 +69,11 @@
.public GXS_BeginLoadBGExtPltt
.public GXS_EndLoadBGExtPltt
.public IC_InvalidateAll
.public InitOverlay
.public FS_StartOverlay
.public LOADED_OVERLAY_GROUP_0
.public LoadOverlayInternal
.public Math_CalcCrc32
.public Mathi_Crc32InitTable
.public FS_LoadOverlayImage
.public MATH_CalcCRC32
.public MATHi_CRC32InitTable
.public MemAlloc
.public MemFree
.public MemLocateSet

2
asm/include/main_02075600.inc
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@@ -32,7 +32,7 @@
.public _ll_udiv
.public _s32_div_f
.public _secure
.public AtomicExchange
.public MI_SwapWord
.public CARD_Init
.public ClearIrqFlag
.public CP_SaveContext

14
asm/include/main_0207F894.inc
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@@ -2,12 +2,12 @@
.public _02000BC4
.public _020AEC5C
.public _020B2BB4
.public _020B2BB8
.public fsi_digest_key_len
.public _020B2BC0
.public _020B2BC4
.public _020B2C84
.public _020B2D88
.public _020B2E9C
.public sDayOfYear
.public _020B2ED0
.public _020B2ED4
.public _020B2FBC
@@ -16,7 +16,7 @@
.public _022BB5FC
.public _022BB604
.public _022BB60C
.public _022BB614
.public fsi_arc_rom
.public _022BB670
.public _022BB68C
.public _022BB6AC
@@ -82,9 +82,9 @@
.public DC_StoreRange
.public DC_WaitWriteBufferEmpty
.public Dgt_Hash2CalcHmac
.public Dgt_Hash2GetHash
.public Dgt_Hash2Init
.public Dgt_Hash2Update
.public DGT_Hash2GetDigest
.public DGT_Hash2Reset
.public DGT_Hash2SetSource
.public EnableIrqFlag
.public fflush
.public FS_CloseFile
@@ -106,7 +106,7 @@
.public MI_DmaCopy16
.public MI_StopDma
.public MIi_UncompressBackward
.public MTi_CardDmaCopy32
.public MIi_CardDmaCopy32
.public MTi_CpuClear32
.public MTi_CpuClearFast
.public MTi_CpuCopy32

14
asm/include/overlay_00.inc
View File

@@ -74,15 +74,15 @@
.public InitMenu
.public InitWfcSettingsOverlay
.public LoadOverlay
.public Math_CalcCrc16
.public Math_CalcCrc32
.public Math_CalcCrc8
.public MATH_CalcCRC16
.public MATH_CalcCRC32
.public MATH_CalcCRC8
.public Math_CalcSha1
.public Math_CountPopulation
.public Mathi_Crc16InitTable
.public Mathi_Crc16Update
.public Mathi_Crc32InitTable
.public Mathi_Crc8InitTable
.public MATHi_CRC16InitTable
.public MATHi_CRC16Update
.public MATHi_CRC32InitTable
.public MATHi_CRC8InitTable
.public MD5_Digest
.public MD5_Init
.public MD5_Update

4
asm/include/overlay_02.inc
View File

@@ -112,8 +112,8 @@
.public GXS_SetGraphicsMode
.public GXx_SetMasterBrightness_
.public InitWfc
.public Math_CalcCrc16
.public Mathi_Crc16InitTable
.public MATH_CalcCRC16
.public MATHi_CRC16InitTable
.public MB_CommGetChildUser
.public MB_CommIsBootable
.public MB_CommResponseRequest

856
asm/itcm.s
View File

@@ -1935,859 +1935,3 @@ _01FF97C0: .word OSi_ThreadInfo
_01FF97C4: .word CP_SaveContext
_01FF97C8: .word CPi_RestoreContext
arm_func_end ReturnFromInterrupt
arm_func_start OSi_DoResetSystem
OSi_DoResetSystem: ; 0x01FF97CC
stmdb sp!, {r3, lr}
ldr r0, _01FF97F8 ; =OSi_IsInitReset
_01FF97D4:
ldrh r1, [r0]
cmp r1, #0
beq _01FF97D4
ldr r0, _01FF97FC ; =0x04000208
mov r1, #0
strh r1, [r0]
bl OSi_ReloadRomData
bl OSi_DoBoot
ldmia sp!, {r3, pc}
.align 2, 0
_01FF97F8: .word OSi_IsInitReset
_01FF97FC: .word 0x04000208
arm_func_end OSi_DoResetSystem
arm_func_start OSi_DoBoot
OSi_DoBoot: ; 0x01FF9800
mov ip, #0x4000000
str ip, [ip, #0x208]
ldr r1, _01FF98AC ; =OS_IRQTable
add r1, r1, #0x3fc0
add r1, r1, #0x3c
mov r0, #0
str r0, [r1]
ldr r1, _01FF98B0 ; =0x04000180
_01FF9820:
ldrh r0, [r1]
and r0, r0, #0xf
cmp r0, #1
bne _01FF9820
mov r0, #0x100
strh r0, [r1]
mov r0, #0
ldr r3, _01FF98B4 ; =0x027FFD9C
ldr r4, [r3]
ldr r1, _01FF98B8 ; =0x027FFD80
mov r2, #0x80
bl OSi_CpuClear32
str r4, [r3]
ldr r1, _01FF98BC ; =0x027FFF80
mov r2, #0x18
bl OSi_CpuClear32
ldr r1, _01FF98C0 ; =0x027FFF98
strh r0, [r1]
ldr r1, _01FF98C4 ; =0x027FFF9C
mov r2, #0x64
bl OSi_CpuClear32
ldr r1, _01FF98B0 ; =0x04000180
_01FF9878:
ldrh r0, [r1]
and r0, r0, #0xf
cmp r0, #1
beq _01FF9878
mov r0, #0
strh r0, [r1]
ldr r3, _01FF98C8 ; =0x027FFE00
ldr ip, [r3, #0x24]
mov lr, ip
ldr fp, _01FF98BC ; =0x027FFF80
ldmia fp, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sb, sl}
mov fp, #0
bx ip
.align 2, 0
_01FF98AC: .word OS_IRQTable
_01FF98B0: .word 0x04000180
_01FF98B4: .word 0x027FFD9C
_01FF98B8: .word 0x027FFD80
_01FF98BC: .word 0x027FFF80
_01FF98C0: .word 0x027FFF98
_01FF98C4: .word 0x027FFF9C
_01FF98C8: .word 0x027FFE00
arm_func_end OSi_DoBoot
arm_func_start OSi_CpuClear32
OSi_CpuClear32: ; 0x01FF98CC
add ip, r1, r2
_01FF98D0:
cmp r1, ip
blt _01FF98DC
b _01FF98E0
_01FF98DC:
stmia r1!, {r0}
_01FF98E0:
blt _01FF98D0
bx lr
arm_func_end OSi_CpuClear32
arm_func_start OSi_ReloadRomData
OSi_ReloadRomData: ; 0x01FF98E8
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
ldr r1, _01FF9988 ; =0x027FFC2C
ldr r4, [r1]
cmp r4, #0x8000
blo _01FF990C
mov r0, r4
add r1, r1, #0x1d4
mov r2, #0x160
bl OSi_ReadCardRom32
_01FF990C:
ldr r0, _01FF998C ; =0x027FFE20
ldr r5, [r0]
ldr r6, [r0, #8]
ldr r7, [r0, #0xc]
ldr r8, [r0, #0x10]
ldr sb, [r0, #0x18]
ldr sl, [r0, #0x1c]
bl EnableIrqFlag
mov fp, r0
bl DC_StoreAll
bl DC_InvalidateAll
mov r0, fp
bl SetIrqFlag
bl IC_InvalidateAll
bl DC_WaitWriteBufferEmpty
add r5, r5, r4
cmp r5, #0x8000
bhs _01FF9964
rsb r0, r5, #0x8000
add r6, r6, r0
sub r7, r7, r0
mov r5, #0x8000
_01FF9964:
mov r0, r5
mov r1, r6
mov r2, r7
bl OSi_ReadCardRom32
mov r1, sb
mov r2, sl
add r0, r8, r4
bl OSi_ReadCardRom32
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
.align 2, 0
_01FF9988: .word 0x027FFC2C
_01FF998C: .word 0x027FFE20
arm_func_end OSi_ReloadRomData
arm_func_start OSi_ReadCardRom32
OSi_ReadCardRom32: ; 0x01FF9990
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
ldr r4, _01FF9A54 ; =0x027FFE60
ldr r3, _01FF9A58 ; =0x000001FF
ldr r5, [r4]
and r4, r0, r3
bic r3, r5, #0x7000000
ldr r5, _01FF9A5C ; =0x040001A4
orr r3, r3, #0xa1000000
rsb ip, r4, #0
_01FF99B4:
ldr r4, [r5]
tst r4, #0x80000000
bne _01FF99B4
ldr r7, _01FF9A60 ; =0x040001A1
mov r4, #0x80
strb r4, [r7]
cmp ip, r2
add r0, r0, ip
ldmgeia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
ldr r4, _01FF9A64 ; =0x04100010
mov sb, r0, lsr #8
mov r6, #0xb7
mov r5, #0
_01FF99E8:
strb r6, [r7, #7]
mov lr, r0, lsr #0x18
strb lr, [r7, #8]
mov lr, r0, lsr #0x10
strb lr, [r7, #9]
strb sb, [r7, #0xa]
strb r0, [r7, #0xb]
strb r5, [r7, #0xc]
strb r5, [r7, #0xd]
strb r5, [r7, #0xe]
str r3, [r7, #3]
_01FF9A14:
ldr r8, [r7, #3]
tst r8, #0x800000
beq _01FF9A38
cmp ip, #0
ldr lr, [r4]
blt _01FF9A34
cmp ip, r2
strlt lr, [r1, ip]
_01FF9A34:
add ip, ip, #4
_01FF9A38:
tst r8, #0x80000000
bne _01FF9A14
cmp ip, r2
add sb, sb, #2
add r0, r0, #0x200
blt _01FF99E8
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
.align 2, 0
_01FF9A54: .word 0x027FFE60
_01FF9A58: .word 0x000001FF
_01FF9A5C: .word 0x040001A4
_01FF9A60: .word 0x040001A1
_01FF9A64: .word 0x04100010
arm_func_end OSi_ReadCardRom32
arm_func_start InitDmaTransfer_Standard
InitDmaTransfer_Standard: ; 0x01FF9A68
stmdb sp!, {r3, r4, r5, r6, r7, lr}
mov r7, r0
mov r6, r1
mov r5, r2
mov r4, r3
bl EnableIrqFlag
mov r1, #0xc
mul r2, r7, r1
add r1, r2, #0xb0
add r2, r2, #0x4000000
str r6, [r2, #0xb0]
add r1, r1, #0x4000000
str r5, [r1, #4]
str r4, [r1, #8]
bl SetIrqFlag
ldmia sp!, {r3, r4, r5, r6, r7, pc}
arm_func_end InitDmaTransfer_Standard
arm_func_start MIi_DmaSetParams_Wait
MIi_DmaSetParams_Wait: ; 0x01FF9AA8
stmdb sp!, {r3, r4, r5, r6, r7, lr}
mov r7, r0
mov r6, r1
mov r5, r2
mov r4, r3
bl EnableIrqFlag
mov r1, #0xc
mul r2, r7, r1
add r1, r2, #0xb0
add r2, r2, #0x4000000
str r6, [r2, #0xb0]
add r3, r1, #0x4000000
str r5, [r3, #4]
ldr r2, _01FF9B10 ; =0x040000B0
str r4, [r3, #8]
ldr r1, [r2]
cmp r7, #0
ldr r1, [r2]
bne _01FF9B08
mov r2, #0
str r2, [r3]
ldr r1, _01FF9B14 ; =0x81400001
str r2, [r3, #4]
str r1, [r3, #8]
_01FF9B08:
bl SetIrqFlag
ldmia sp!, {r3, r4, r5, r6, r7, pc}
.align 2, 0
_01FF9B10: .word 0x040000B0
_01FF9B14: .word 0x81400001
arm_func_end MIi_DmaSetParams_Wait
arm_func_start MIi_DmaSetParams_NoInt
MIi_DmaSetParams_NoInt: ; 0x01FF9B18
mov ip, #0xc
mul ip, r0, ip
add r0, ip, #0xb0
add ip, ip, #0x4000000
str r1, [ip, #0xb0]
add r0, r0, #0x4000000
str r2, [r0, #4]
str r3, [r0, #8]
bx lr
arm_func_end MIi_DmaSetParams_NoInt
arm_func_start sub_01FF9B3C
sub_01FF9B3C: ; 0x01FF9B3C
stmdb sp!, {r3, lr}
mov ip, #0xc
mul lr, r0, ip
add ip, lr, #0xb0
add lr, lr, #0x4000000
str r1, [lr, #0xb0]
add ip, ip, #0x4000000
str r2, [ip, #4]
ldr r2, _01FF9B98 ; =0x040000B0
str r3, [ip, #8]
ldr r1, [r2]
cmp r0, #0
ldr r0, [r2]
bne _01FF9B88
mov r1, #0
str r1, [ip]
ldr r0, _01FF9B9C ; =0x81400001
str r1, [ip, #4]
str r0, [ip, #8]
_01FF9B88:
ldr r1, _01FF9B98 ; =0x040000B0
ldr r0, [r1]
ldr r0, [r1]
ldmia sp!, {r3, pc}
.align 2, 0
_01FF9B98: .word 0x040000B0
_01FF9B9C: .word 0x81400001
arm_func_end sub_01FF9B3C
arm_func_start sub_01FF9BA0
sub_01FF9BA0: ; 0x01FF9BA0
stmdb sp!, {r3, r4, r5, r6, r7, lr}
ldr r1, [r0, #0x10]
ldrh lr, [r0, #0xa]
cmp r1, #0
ldr r2, [r0, #0x18]
ldr r3, [r0, #0x1c]
beq _01FF9CFC
mov ip, #0
_01FF9BC0:
ldrb r4, [r2, #1]
ldrb r5, [r2, #2]
ldrb r6, [r2], #4
add r4, r1, r4, lsl #2
add r5, r1, r5, lsl #2
ldrb r4, [r4, #1]
ldrb r5, [r5, #2]
ldrb r6, [r1, r6, lsl #2]
mul r4, lr, r4
mul r5, lr, r5
mul r6, lr, r6
mov r4, r4, lsr #8
mov r7, r6, lsr #8
mov r5, r5, lsr #8
and r6, r5, #0xff
and r4, r4, #0xff
and r5, r4, #0xf8
and r7, r7, #0xff
mov r4, ip, lsl #1
add ip, ip, #1
and r6, r6, #0xf8
mov r5, r5, lsl #2
and r7, r7, #0xf8
orr r5, r5, r6, lsl #7
orr r5, r5, r7, asr #3
strh r5, [r3, r4]
cmp ip, #0xe0
blt _01FF9BC0
b _01FF9C64
_01FF9C34:
ldrb r4, [r2, #1]
ldrb r5, [r2, #2]
ldrb r7, [r2], #4
and r4, r4, #0xf8
and r6, r5, #0xf8
mov r5, r4, lsl #2
mov r4, ip, lsl #1
and r7, r7, #0xf8
orr r5, r5, r6, lsl #7
orr r5, r5, r7, asr #3
strh r5, [r3, r4]
add ip, ip, #1
_01FF9C64:
cmp ip, #0xf0
blt _01FF9C34
b _01FF9CD8
_01FF9C70:
ldrb r4, [r2, #1]
ldrb r5, [r2, #2]
ldrb r6, [r2], #4
add r4, r1, r4, lsl #2
add r5, r1, r5, lsl #2
ldrb r4, [r4, #1]
ldrb r5, [r5, #2]
ldrb r6, [r1, r6, lsl #2]
mul r4, lr, r4
mul r5, lr, r5
mul r6, lr, r6
mov r4, r4, lsr #8
mov r7, r6, lsr #8
mov r5, r5, lsr #8
and r6, r5, #0xff
and r4, r4, #0xff
and r5, r4, #0xf8
and r7, r7, #0xff
mov r4, ip, lsl #1
and r6, r6, #0xf8
mov r5, r5, lsl #2
and r7, r7, #0xf8
orr r5, r5, r6, lsl #7
orr r5, r5, r7, asr #3
strh r5, [r3, r4]
add ip, ip, #1
_01FF9CD8:
ldr r4, [r0, #4]
cmp ip, r4
blt _01FF9C70
ldr r1, _01FF9E10 ; =ov29_02353530
mov r0, r3
ldr r1, [r1]
add r1, r1, #0x4c
bl Rgb8ToRgb5
ldmia sp!, {r3, r4, r5, r6, r7, pc}
_01FF9CFC:
mov r0, #0
_01FF9D00:
ldrb r1, [r2, #1]
ldrb r5, [r2, #2]
ldrb r7, [r2], #4
mul r4, r1, lr
mul r6, r5, lr
mov r1, r4, lsr #8
mul r5, r7, lr
mov r4, r6, lsr #8
mov r6, r5, lsr #8
and r5, r4, #0xff
and r1, r1, #0xff
and r4, r1, #0xf8
and r6, r6, #0xff
mov r1, r0, lsl #1
add r0, r0, #1
and r5, r5, #0xf8
mov r4, r4, lsl #2
and r6, r6, #0xf8
orr r4, r4, r5, lsl #7
orr r4, r4, r6, asr #3
strh r4, [r3, r1]
cmp r0, #0xe0
blt _01FF9D00
b _01FF9D90
_01FF9D60:
ldrb r1, [r2, #1]
ldrb r4, [r2, #2]
ldrb r6, [r2], #4
and r1, r1, #0xf8
and r5, r4, #0xf8
mov r4, r1, lsl #2
mov r1, r0, lsl #1
and r6, r6, #0xf8
orr r4, r4, r5, lsl #7
orr r4, r4, r6, asr #3
strh r4, [r3, r1]
add r0, r0, #1
_01FF9D90:
cmp r0, #0xf0
blt _01FF9D60
b _01FF9DF0
_01FF9D9C:
ldrb r1, [r2, #1]
ldrb r4, [r2, #2]
ldrb r6, [r2], #4
mul ip, r1, lr
mul r5, r4, lr
mov r1, ip, lsr #8
mov r4, r5, lsr #8
mul r7, r6, lr
and r1, r1, #0xff
and ip, r1, #0xf8
mov r5, r7, lsr #8
and r4, r4, #0xff
and r5, r5, #0xff
mov r1, r0, lsl #1
and r4, r4, #0xf8
mov ip, ip, lsl #2
and r5, r5, #0xf8
orr r4, ip, r4, lsl #7
orr r4, r4, r5, asr #3
strh r4, [r3, r1]
add r0, r0, #1
_01FF9DF0:
cmp r0, #0xf0
blt _01FF9D9C
ldr r1, _01FF9E10 ; =ov29_02353530
mov r0, r3
ldr r1, [r1]
add r1, r1, #0x4c
bl Rgb8ToRgb5
ldmia sp!, {r3, r4, r5, r6, r7, pc}
.align 2, 0
_01FF9E10: .word ov29_02353530
arm_func_end sub_01FF9BA0
arm_func_start sub_01FF9E14
sub_01FF9E14: ; 0x01FF9E14
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
ldr r1, _01FF9F7C ; =ov29_02353530
ldr r4, [r0, #0x10]
ldr r1, [r1]
cmp r4, #0
add sb, r1, #0x51
ldrh sl, [r0, #0xa]
ldr r5, [r0, #0x18]
ldr r6, [r0, #0x1c]
mov r7, #0
beq _01FF9EE8
ldr r8, [r0, #4]
mov fp, r7
b _01FF9EDC
_01FF9E4C:
ldrb r0, [sb, r7, asr #4]
cmp r0, #0
ldrneb r0, [r5]
ldrneb r2, [r5, #1]
ldrneb r3, [r5, #2]
bne _01FF9EA8
ldrb r1, [r5, #1]
ldrb r0, [r5, #2]
ldrb r2, [r5]
add r1, r4, r1, lsl #2
add r0, r4, r0, lsl #2
ldrb r2, [r4, r2, lsl #2]
ldrb r1, [r1, #1]
ldrb r0, [r0, #2]
mul r2, sl, r2
mul r1, sl, r1
mul r0, sl, r0
mov r3, r2, lsr #8
mov r2, r1, lsr #8
mov r1, r0, lsr #8
and r0, r3, #0xff
and r2, r2, #0xff
and r3, r1, #0xff
_01FF9EA8:
and r1, r2, #0xf8
and r2, r3, #0xf8
mov r1, r1, lsl #2
and r3, r0, #0xf8
orr r0, r1, r2, lsl #7
mov r1, fp
orr r3, r0, r3, asr #3
mov r2, r7, lsl #1
and r0, r7, #0xff
strh r3, [r6, r2]
bl sub_0201BD50
add r5, r5, #4
add r7, r7, #1
_01FF9EDC:
cmp r7, r8
blt _01FF9E4C
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_01FF9EE8:
ldr r4, [r0, #4]
mov r8, r7
b _01FF9F70
_01FF9EF4:
ldrb r0, [sb, r7, asr #4]
cmp r0, #0
ldrneb r3, [r5]
ldrneb r1, [r5, #1]
ldrneb r2, [r5, #2]
bne _01FF9F3C
ldrb r2, [r5]
ldrb r1, [r5, #1]
ldrb r0, [r5, #2]
mul r3, r2, sl
mul r2, r1, sl
mul r1, r0, sl
mov r3, r3, lsr #8
mov r2, r2, lsr #8
mov r0, r1, lsr #8
and r3, r3, #0xff
and r1, r2, #0xff
and r2, r0, #0xff
_01FF9F3C:
and r0, r1, #0xf8
and r1, r2, #0xf8
mov r0, r0, lsl #2
and r2, r3, #0xf8
orr r0, r0, r1, lsl #7
mov r1, r8
orr r3, r0, r2, asr #3
mov r2, r7, lsl #1
and r0, r7, #0xff
strh r3, [r6, r2]
bl sub_0201BD50
add r5, r5, #4
add r7, r7, #1
_01FF9F70:
cmp r7, r4
blt _01FF9EF4
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
.align 2, 0
_01FF9F7C: .word ov29_02353530
arm_func_end sub_01FF9E14
arm_func_start sub_01FF9F80
sub_01FF9F80: ; 0x01FF9F80
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
ldr r1, _01FFA38C ; =ov29_02353530
ldr r4, [r0, #0x10]
ldr r1, [r1]
cmp r4, #0
add sb, r1, #0x51
ldrh sl, [r0, #0xa]
ldr r5, [r0, #0x18]
ldr r6, [r0, #0x1c]
beq _01FFA290
mov r8, #0
_01FF9FAC:
and r0, r8, #0xff
add fp, sb, r8
mov r7, #0
str r0, [sp]
_01FF9FBC:
ldrb r0, [fp, #0x10]
add r1, r7, r8, lsl #8
add r2, r5, r1, lsl #2
cmp r0, #0
ldrneb r0, [r2, #1]
ldrneb r3, [r5, r1, lsl #2]
ldrneb r2, [r2, #2]
bne _01FFA020
ldrb r0, [r2, #1]
ldrb ip, [r2, #2]
ldrb r2, [r5, r1, lsl #2]
add r0, r4, r0, lsl #2
ldrb r0, [r0, #1]
ldrb r3, [r4, r2, lsl #2]
add r2, r4, ip, lsl #2
ldrb r2, [r2, #2]
mul r0, sl, r0
mul r3, sl, r3
mul r2, sl, r2
mov r3, r3, lsr #8
mov r0, r0, lsr #8
mov r2, r2, lsr #8
and r3, r3, #0xff
and r0, r0, #0xff
and r2, r2, #0xff
_01FFA020:
and r0, r0, #0xf8
and r2, r2, #0xf8
mov r0, r0, lsl #2
orr r2, r0, r2, lsl #7
and r3, r3, #0xf8
orr r3, r2, r3, asr #3
mov r1, r1, lsl #1
strh r3, [r6, r1]
ldr r0, [sp]
mov r2, #0
and r1, r7, #0xff
bl sub_0201BD80
add r7, r7, #1
cmp r7, #0x10
blt _01FF9FBC
mov r7, #0x10
and fp, r8, #0xff
_01FFA064:
add r1, r7, r8, lsl #8
add r2, r5, r1, lsl #2
ldrb r0, [r2, #1]
ldrb r3, [r2, #2]
ldrb r2, [r5, r1, lsl #2]
add r0, r4, r0, lsl #2
add ip, r4, r3, lsl #2
ldrb r3, [r0, #1]
ldrb r0, [ip, #2]
ldrb ip, [r4, r2, lsl #2]
mul r2, sl, r3
mul r3, sl, r0
mul r0, sl, ip
mov r2, r2, lsr #8
mov r3, r3, lsr #8
and r2, r2, #0xff
mov r0, r0, lsr #8
and r2, r2, #0xf8
and r3, r3, #0xff
and ip, r0, #0xff
and r0, r3, #0xf8
mov r2, r2, lsl #2
and r3, ip, #0xf8
orr ip, r2, r0, lsl #7
orr r3, ip, r3, asr #3
mov ip, r1, lsl #1
mov r0, fp
mov r2, #0
and r1, r7, #0xff
strh r3, [r6, ip]
bl sub_0201BD80
add r7, r7, #1
cmp r7, #0x20
blt _01FFA064
mov r7, #0xc0
and fp, r8, #0xff
_01FFA0F4:
add r1, r7, r8, lsl #8
add r2, r5, r1, lsl #2
ldrb r0, [r2, #1]
ldrb r3, [r2, #2]
ldrb r2, [r5, r1, lsl #2]
add r0, r4, r0, lsl #2
add ip, r4, r3, lsl #2
ldrb r3, [r0, #1]
ldrb r0, [ip, #2]
ldrb ip, [r4, r2, lsl #2]
mul r2, sl, r3
mul r3, sl, r0
mul r0, sl, ip
mov r2, r2, lsr #8
mov r3, r3, lsr #8
and r2, r2, #0xff
mov r0, r0, lsr #8
and r2, r2, #0xf8
and r3, r3, #0xff
and ip, r0, #0xff
and r0, r3, #0xf8
mov r2, r2, lsl #2
and r3, ip, #0xf8
orr ip, r2, r0, lsl #7
orr r3, ip, r3, asr #3
mov ip, r1, lsl #1
mov r0, fp
mov r2, #0
and r1, r7, #0xff
strh r3, [r6, ip]
bl sub_0201BD80
add r7, r7, #1
cmp r7, #0xf0
blt _01FFA0F4
mov r7, #0xf0
mov r1, r7
and r0, r8, #0xff
mov r2, #0
bl sub_0201BD80
_01FFA190:
add r1, r7, r8, lsl #8
add r2, r5, r1, lsl #2
ldrb r0, [r2, #1]
ldrb r3, [r2, #2]
ldrb fp, [r5, r1, lsl #2]
mul r2, sl, r0
mul r3, sl, r3
mul r0, sl, fp
mov r2, r2, lsr #8
mov r3, r3, lsr #8
and r2, r2, #0xff
mov fp, r0, lsr #8
and r3, r3, #0xff
and r0, r2, #0xf8
and fp, fp, #0xff
add r7, r7, #1
and r2, r3, #0xf8
mov r0, r0, lsl #2
and r3, fp, #0xf8
orr r0, r0, r2, lsl #7
orr r2, r0, r3, asr #3
mov r0, r1, lsl #1
strh r2, [r6, r0]
cmp r7, #0x100
blt _01FFA190
add r8, r8, #1
cmp r8, #0x10
blt _01FF9FAC
mov r7, #0xb0
mov r8, #0
_01FFA208:
add r1, r5, r7, lsl #2
ldrb r0, [r1, #1]
ldrb r1, [r1, #2]
ldrb r2, [r5, r7, lsl #2]
add r0, r4, r0, lsl #2
add r1, r4, r1, lsl #2
ldrb r0, [r0, #1]
ldrb r1, [r1, #2]
ldrb r2, [r4, r2, lsl #2]
mul r0, sl, r0
mul r1, sl, r1
mul r2, sl, r2
mov r0, r0, lsr #8
mov r1, r1, lsr #8
and r0, r0, #0xff
mov r2, r2, lsr #8
and r1, r1, #0xff
and r0, r0, #0xf8
and r2, r2, #0xff
and r1, r1, #0xf8
mov r0, r0, lsl #2
and r3, r2, #0xf8
orr r1, r0, r1, lsl #7
mov r0, r8
mov r2, r8
orr sb, r1, r3, asr #3
mov r3, r7, lsl #1
and r1, r7, #0xff
strh sb, [r6, r3]
bl sub_0201BD80
add r7, r7, #1
cmp r7, #0xc0
blt _01FFA208
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_01FFA290:
mov r7, #0
_01FFA294:
add r0, sb, r7
ldrb r0, [r0, #0x10]
mov r8, #0
and r4, r7, #0xff
cmp r0, #0
beq _01FFA304
mov fp, r8
_01FFA2B0:
add r1, r8, r7, lsl #8
add r2, r5, r1, lsl #2
ldrb r0, [r2, #1]
ldrb ip, [r2, #2]
ldrb r2, [r5, r1, lsl #2]
and r3, r0, #0xf8
and r0, ip, #0xf8
mov ip, r3, lsl #2
and r3, r2, #0xf8
orr ip, ip, r0, lsl #7
mov r0, r4
mov r2, fp
orr r3, ip, r3, asr #3
mov ip, r1, lsl #1
and r1, r8, #0xff
strh r3, [r6, ip]
bl sub_0201BD80
add r8, r8, #1
cmp r8, #0xf0
blt _01FFA2B0
b _01FFA37C
_01FFA304:
mov fp, r8
_01FFA308:
add r1, r8, r7, lsl #8
add r2, r5, r1, lsl #2
ldrb r0, [r2, #1]
ldrb ip, [r2, #2]
ldrb r2, [r5, r1, lsl #2]
mul r3, sl, r0
mul r0, sl, ip
mul ip, sl, r2
mov r2, r3, lsr #8
mov r3, r0, lsr #8
and r2, r2, #0xff
mov r0, ip, lsr #8
and r3, r3, #0xff
and r2, r2, #0xf8
and ip, r0, #0xff
and r0, r3, #0xf8
mov r2, r2, lsl #2
and r3, ip, #0xf8
orr ip, r2, r0, lsl #7
mov r0, r4
mov r2, fp
orr r3, ip, r3, asr #3
mov ip, r1, lsl #1
and r1, r8, #0xff
strh r3, [r6, ip]
bl sub_0201BD80
add r8, r8, #1
cmp r8, #0xf0
blt _01FFA308
_01FFA37C:
add r7, r7, #1
cmp r7, #0x10
blt _01FFA294
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
.align 2, 0
_01FFA38C: .word ov29_02353530
arm_func_end sub_01FF9F80

22
asm/itcm_01FFB62C.s
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@@ -1,22 +0,0 @@
.include "asm/macros.inc"
.include "itcm_01FFB62C.inc"
.section .itcm,4,1,4
arm_func_start sub_01FFB62C
sub_01FFB62C: ; 0x01FFB62C
ldr r3, [r0, #0xb4]
mov r2, #0
strb r2, [r3, #0x7c]
ldrh r1, [r0, #4]
strh r1, [r3, #0x8c]
ldrh r0, [r0, #6]
strh r0, [r3, #0x8e]
str r2, [r3, #0x84]
strh r2, [r3, #0x80]
bx lr
arm_func_end sub_01FFB62C
.global _01FFB654
_01FFB654:
.byte 0x05, 0x03, 0x00, 0x00

237
asm/itcm_01FFBD20.s
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@@ -1,237 +0,0 @@
.include "asm/macros.inc"
.include "itcm_01FFBD20.inc"
.section .itcm,4,1,4
arm_func_start sub_01FFBD20
sub_01FFBD20: ; 0x01FFBD20
stmdb sp!, {r3, r4, r5, r6, r7, lr}
mov r6, r1
mov r7, r0
mov r0, r6
bl IsMonster__0231A9D4
cmp r0, #0
ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
ldr r5, [r6, #0xb4]
ldrb r0, [r5, #6]
cmp r0, #0
beq _01FFBD5C
ldrb r0, [r5, #8]
cmp r0, #0
moveq r3, #1
beq _01FFBD60
_01FFBD5C:
mov r3, #0
_01FFBD60:
ldr r1, _01FFBDF0 ; =DUNGEON_PTR
mov r0, r6
ldr r2, [r1]
mov r1, #0x32
#ifdef JAPAN
add r2, r2, #0x1840
add r2, r2, #0x18000
#else
add r2, r2, #0xe4
add r2, r2, #0x19800
#endif
add r4, r2, r3, lsl #4
bl AbilityIsActiveVeneer
cmp r0, #0
beq _01FFBDB0
ldr r0, [r4]
cmp r0, #0
bne _01FFBDB0
mov r0, r7
mov r1, r6
bl sub_01FFBF78
cmp r0, #0
strne r6, [r4]
ldrne r0, [r5, #0xb0]
strne r0, [r4, #4]
_01FFBDB0:
mov r0, r6
mov r1, #0x7a
bl AbilityIsActiveVeneer
cmp r0, #0
ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
ldr r0, [r4, #8]
cmp r0, #0
ldmneia sp!, {r3, r4, r5, r6, r7, pc}
mov r0, r7
mov r1, r6
bl sub_01FFBF78
cmp r0, #0
strne r6, [r4, #8]
ldrne r0, [r5, #0xb0]
strne r0, [r4, #0xc]
ldmia sp!, {r3, r4, r5, r6, r7, pc}
.align 2, 0
_01FFBDF0: .word DUNGEON_PTR
arm_func_end sub_01FFBD20
arm_func_start sub_01FFBDF4
sub_01FFBDF4: ; 0x01FFBDF4
stmdb sp!, {r3, r4, r5, r6, r7, lr}
mov r7, r0
bl ov29_0231B008
mov r0, r7
bl EntityIsValid__02319F8C
cmp r0, #0
ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
ldr r4, _01FFBE58 ; =DUNGEON_PTR
mov r5, #0
_01FFBE18:
ldr r0, [r4]
add r0, r0, r5, lsl #2
add r0, r0, #0x12000
#ifdef JAPAN
ldr r6, [r0, #0xad4]
#else
ldr r6, [r0, #0xb78]
#endif
mov r0, r6
bl EntityIsValid__02319F8C
cmp r0, #0
cmpne r7, r6
beq _01FFBE48
mov r0, r7
mov r1, r6
bl sub_01FFBD20
_01FFBE48:
add r5, r5, #1
cmp r5, #0x14
blt _01FFBE18
ldmia sp!, {r3, r4, r5, r6, r7, pc}
.align 2, 0
_01FFBE58: .word DUNGEON_PTR
arm_func_end sub_01FFBDF4
arm_func_start LightningRodStormDrainCheck
LightningRodStormDrainCheck: ; 0x01FFBE5C
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
mov sl, r0
mov sb, r1
mov r8, r2
mov r7, r3
mov r5, #0
ldr r4, _01FFBF70 ; =_01FFB654
ldr fp, _01FFBF74 ; =DUNGEON_PTR
b _01FFBF60
_01FFBE80:
ldr r1, [fp]
mov r0, sl
#ifdef JAPAN
add r1, r1, #0x1840
add r1, r1, #0x18000
#else
add r1, r1, #0xe4
add r1, r1, #0x19800
#endif
add r6, r1, r5, lsl #4
mov r1, #0x53
bl AbilityIsActiveVeneer
cmp r0, #0
bne _01FFBF5C
mov r0, sl
mov r1, r8
bl GetMoveTypeForMonster
ldrb r1, [r4, r7]
cmp r1, r0
bne _01FFBF5C
mov r0, sl
mov r1, r8
mov r2, #0
bl GetEntityMoveTargetAndRange
and r0, r0, #0xf0
cmp r0, #0x70
beq _01FFBF5C
ldr r0, [r6, r7, lsl #3]
bl IsMonster__0231A9D4
cmp r0, #0
beq _01FFBF4C
ldr r0, [r6, r7, lsl #3]
add r1, r6, r7, lsl #3
ldr r2, [r1, #4]
ldr r1, [r0, #0xb4]
ldr r1, [r1, #0xb0]
cmp r2, r1
bne _01FFBF4C
mov r1, sl
mov r2, #1
mov r3, #0
bl GetTreatmentBetweenMonsters
cmp r0, #1
bne _01FFBF4C
ldr r0, [sb, #0xb4]
ldr r2, [r6, r7, lsl #3]
#ifdef JAPAN
ldrb r0, [r0, #0x10a]
ldr r1, [r2, #0xb4]
cmp r0, #0
ldreqb r0, [r1, #0x10a]
#else
ldrb r0, [r0, #0x10b]
ldr r1, [r2, #0xb4]
cmp r0, #0
ldreqb r0, [r1, #0x10b]
#endif
cmpeq r0, #0
beq _01FFBF44
cmp sb, r2
bne _01FFBF4C
_01FFBF44:
mov r0, #1
b _01FFBF50
_01FFBF4C:
mov r0, #0
_01FFBF50:
cmp r0, #0
ldrne r0, [r6, r7, lsl #3]
ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_01FFBF5C:
add r5, r5, #1
_01FFBF60:
cmp r5, #2
blt _01FFBE80
mov r0, #0
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
.align 2, 0
_01FFBF70: .word _01FFB654
_01FFBF74: .word DUNGEON_PTR
arm_func_end LightningRodStormDrainCheck
arm_func_start sub_01FFBF78
sub_01FFBF78: ; 0x01FFBF78
stmdb sp!, {r4, r5, r6, lr}
sub sp, sp, #0x10
mov r6, r0
mov r5, r1
mov r4, #0
bl ResetAiCanAttackInDirection
mov r0, r6
mov r1, r5
bl CanSeeTarget
cmp r0, #0
beq _01FFBFD8
add r0, sp, #8
mov r1, r4
bl InitMove
add r0, sp, #8
str r0, [sp]
mov ip, #1
mov r2, r6
mov r3, r5
mov r0, r4
mov r1, #0x30
str ip, [sp, #4]
bl TryAddTargetToAiTargetList
mov r4, r0
_01FFBFD8:
cmp r4, #0
movne r0, #1
moveq r0, #0
and r0, r0, #0xff
add sp, sp, #0x10
ldmia sp!, {r4, r5, r6, pc}
arm_func_end sub_01FFBF78
; 0x01FFBFF0

559
asm/itcm_1.s Normal file
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@@ -0,0 +1,559 @@
.include "asm/macros.inc"
.include "itcm.inc"
.section .itcm,4,1,4
arm_func_start sub_01FF9BA0
sub_01FF9BA0: ; 0x01FF9BA0
stmdb sp!, {r3, r4, r5, r6, r7, lr}
ldr r1, [r0, #0x10]
ldrh lr, [r0, #0xa]
cmp r1, #0
ldr r2, [r0, #0x18]
ldr r3, [r0, #0x1c]
beq _01FF9CFC
mov ip, #0
_01FF9BC0:
ldrb r4, [r2, #1]
ldrb r5, [r2, #2]
ldrb r6, [r2], #4
add r4, r1, r4, lsl #2
add r5, r1, r5, lsl #2
ldrb r4, [r4, #1]
ldrb r5, [r5, #2]
ldrb r6, [r1, r6, lsl #2]
mul r4, lr, r4
mul r5, lr, r5
mul r6, lr, r6
mov r4, r4, lsr #8
mov r7, r6, lsr #8
mov r5, r5, lsr #8
and r6, r5, #0xff
and r4, r4, #0xff
and r5, r4, #0xf8
and r7, r7, #0xff
mov r4, ip, lsl #1
add ip, ip, #1
and r6, r6, #0xf8
mov r5, r5, lsl #2
and r7, r7, #0xf8
orr r5, r5, r6, lsl #7
orr r5, r5, r7, asr #3
strh r5, [r3, r4]
cmp ip, #0xe0
blt _01FF9BC0
b _01FF9C64
_01FF9C34:
ldrb r4, [r2, #1]
ldrb r5, [r2, #2]
ldrb r7, [r2], #4
and r4, r4, #0xf8
and r6, r5, #0xf8
mov r5, r4, lsl #2
mov r4, ip, lsl #1
and r7, r7, #0xf8
orr r5, r5, r6, lsl #7
orr r5, r5, r7, asr #3
strh r5, [r3, r4]
add ip, ip, #1
_01FF9C64:
cmp ip, #0xf0
blt _01FF9C34
b _01FF9CD8
_01FF9C70:
ldrb r4, [r2, #1]
ldrb r5, [r2, #2]
ldrb r6, [r2], #4
add r4, r1, r4, lsl #2
add r5, r1, r5, lsl #2
ldrb r4, [r4, #1]
ldrb r5, [r5, #2]
ldrb r6, [r1, r6, lsl #2]
mul r4, lr, r4
mul r5, lr, r5
mul r6, lr, r6
mov r4, r4, lsr #8
mov r7, r6, lsr #8
mov r5, r5, lsr #8
and r6, r5, #0xff
and r4, r4, #0xff
and r5, r4, #0xf8
and r7, r7, #0xff
mov r4, ip, lsl #1
and r6, r6, #0xf8
mov r5, r5, lsl #2
and r7, r7, #0xf8
orr r5, r5, r6, lsl #7
orr r5, r5, r7, asr #3
strh r5, [r3, r4]
add ip, ip, #1
_01FF9CD8:
ldr r4, [r0, #4]
cmp ip, r4
blt _01FF9C70
ldr r1, _01FF9E10 ; =ov29_02353530
mov r0, r3
ldr r1, [r1]
add r1, r1, #0x4c
bl Rgb8ToRgb5
ldmia sp!, {r3, r4, r5, r6, r7, pc}
_01FF9CFC:
mov r0, #0
_01FF9D00:
ldrb r1, [r2, #1]
ldrb r5, [r2, #2]
ldrb r7, [r2], #4
mul r4, r1, lr
mul r6, r5, lr
mov r1, r4, lsr #8
mul r5, r7, lr
mov r4, r6, lsr #8
mov r6, r5, lsr #8
and r5, r4, #0xff
and r1, r1, #0xff
and r4, r1, #0xf8
and r6, r6, #0xff
mov r1, r0, lsl #1
add r0, r0, #1
and r5, r5, #0xf8
mov r4, r4, lsl #2
and r6, r6, #0xf8
orr r4, r4, r5, lsl #7
orr r4, r4, r6, asr #3
strh r4, [r3, r1]
cmp r0, #0xe0
blt _01FF9D00
b _01FF9D90
_01FF9D60:
ldrb r1, [r2, #1]
ldrb r4, [r2, #2]
ldrb r6, [r2], #4
and r1, r1, #0xf8
and r5, r4, #0xf8
mov r4, r1, lsl #2
mov r1, r0, lsl #1
and r6, r6, #0xf8
orr r4, r4, r5, lsl #7
orr r4, r4, r6, asr #3
strh r4, [r3, r1]
add r0, r0, #1
_01FF9D90:
cmp r0, #0xf0
blt _01FF9D60
b _01FF9DF0
_01FF9D9C:
ldrb r1, [r2, #1]
ldrb r4, [r2, #2]
ldrb r6, [r2], #4
mul ip, r1, lr
mul r5, r4, lr
mov r1, ip, lsr #8
mov r4, r5, lsr #8
mul r7, r6, lr
and r1, r1, #0xff
and ip, r1, #0xf8
mov r5, r7, lsr #8
and r4, r4, #0xff
and r5, r5, #0xff
mov r1, r0, lsl #1
and r4, r4, #0xf8
mov ip, ip, lsl #2
and r5, r5, #0xf8
orr r4, ip, r4, lsl #7
orr r4, r4, r5, asr #3
strh r4, [r3, r1]
add r0, r0, #1
_01FF9DF0:
cmp r0, #0xf0
blt _01FF9D9C
ldr r1, _01FF9E10 ; =ov29_02353530
mov r0, r3
ldr r1, [r1]
add r1, r1, #0x4c
bl Rgb8ToRgb5
ldmia sp!, {r3, r4, r5, r6, r7, pc}
.align 2, 0
_01FF9E10: .word ov29_02353530
arm_func_end sub_01FF9BA0
arm_func_start sub_01FF9E14
sub_01FF9E14: ; 0x01FF9E14
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
ldr r1, _01FF9F7C ; =ov29_02353530
ldr r4, [r0, #0x10]
ldr r1, [r1]
cmp r4, #0
add sb, r1, #0x51
ldrh sl, [r0, #0xa]
ldr r5, [r0, #0x18]
ldr r6, [r0, #0x1c]
mov r7, #0
beq _01FF9EE8
ldr r8, [r0, #4]
mov fp, r7
b _01FF9EDC
_01FF9E4C:
ldrb r0, [sb, r7, asr #4]
cmp r0, #0
ldrneb r0, [r5]
ldrneb r2, [r5, #1]
ldrneb r3, [r5, #2]
bne _01FF9EA8
ldrb r1, [r5, #1]
ldrb r0, [r5, #2]
ldrb r2, [r5]
add r1, r4, r1, lsl #2
add r0, r4, r0, lsl #2
ldrb r2, [r4, r2, lsl #2]
ldrb r1, [r1, #1]
ldrb r0, [r0, #2]
mul r2, sl, r2
mul r1, sl, r1
mul r0, sl, r0
mov r3, r2, lsr #8
mov r2, r1, lsr #8
mov r1, r0, lsr #8
and r0, r3, #0xff
and r2, r2, #0xff
and r3, r1, #0xff
_01FF9EA8:
and r1, r2, #0xf8
and r2, r3, #0xf8
mov r1, r1, lsl #2
and r3, r0, #0xf8
orr r0, r1, r2, lsl #7
mov r1, fp
orr r3, r0, r3, asr #3
mov r2, r7, lsl #1
and r0, r7, #0xff
strh r3, [r6, r2]
bl sub_0201BD50
add r5, r5, #4
add r7, r7, #1
_01FF9EDC:
cmp r7, r8
blt _01FF9E4C
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_01FF9EE8:
ldr r4, [r0, #4]
mov r8, r7
b _01FF9F70
_01FF9EF4:
ldrb r0, [sb, r7, asr #4]
cmp r0, #0
ldrneb r3, [r5]
ldrneb r1, [r5, #1]
ldrneb r2, [r5, #2]
bne _01FF9F3C
ldrb r2, [r5]
ldrb r1, [r5, #1]
ldrb r0, [r5, #2]
mul r3, r2, sl
mul r2, r1, sl
mul r1, r0, sl
mov r3, r3, lsr #8
mov r2, r2, lsr #8
mov r0, r1, lsr #8
and r3, r3, #0xff
and r1, r2, #0xff
and r2, r0, #0xff
_01FF9F3C:
and r0, r1, #0xf8
and r1, r2, #0xf8
mov r0, r0, lsl #2
and r2, r3, #0xf8
orr r0, r0, r1, lsl #7
mov r1, r8
orr r3, r0, r2, asr #3
mov r2, r7, lsl #1
and r0, r7, #0xff
strh r3, [r6, r2]
bl sub_0201BD50
add r5, r5, #4
add r7, r7, #1
_01FF9F70:
cmp r7, r4
blt _01FF9EF4
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
.align 2, 0
_01FF9F7C: .word ov29_02353530
arm_func_end sub_01FF9E14
arm_func_start sub_01FF9F80
sub_01FF9F80: ; 0x01FF9F80
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
ldr r1, _01FFA38C ; =ov29_02353530
ldr r4, [r0, #0x10]
ldr r1, [r1]
cmp r4, #0
add sb, r1, #0x51
ldrh sl, [r0, #0xa]
ldr r5, [r0, #0x18]
ldr r6, [r0, #0x1c]
beq _01FFA290
mov r8, #0
_01FF9FAC:
and r0, r8, #0xff
add fp, sb, r8
mov r7, #0
str r0, [sp]
_01FF9FBC:
ldrb r0, [fp, #0x10]
add r1, r7, r8, lsl #8
add r2, r5, r1, lsl #2
cmp r0, #0
ldrneb r0, [r2, #1]
ldrneb r3, [r5, r1, lsl #2]
ldrneb r2, [r2, #2]
bne _01FFA020
ldrb r0, [r2, #1]
ldrb ip, [r2, #2]
ldrb r2, [r5, r1, lsl #2]
add r0, r4, r0, lsl #2
ldrb r0, [r0, #1]
ldrb r3, [r4, r2, lsl #2]
add r2, r4, ip, lsl #2
ldrb r2, [r2, #2]
mul r0, sl, r0
mul r3, sl, r3
mul r2, sl, r2
mov r3, r3, lsr #8
mov r0, r0, lsr #8
mov r2, r2, lsr #8
and r3, r3, #0xff
and r0, r0, #0xff
and r2, r2, #0xff
_01FFA020:
and r0, r0, #0xf8
and r2, r2, #0xf8
mov r0, r0, lsl #2
orr r2, r0, r2, lsl #7
and r3, r3, #0xf8
orr r3, r2, r3, asr #3
mov r1, r1, lsl #1
strh r3, [r6, r1]
ldr r0, [sp]
mov r2, #0
and r1, r7, #0xff
bl sub_0201BD80
add r7, r7, #1
cmp r7, #0x10
blt _01FF9FBC
mov r7, #0x10
and fp, r8, #0xff
_01FFA064:
add r1, r7, r8, lsl #8
add r2, r5, r1, lsl #2
ldrb r0, [r2, #1]
ldrb r3, [r2, #2]
ldrb r2, [r5, r1, lsl #2]
add r0, r4, r0, lsl #2
add ip, r4, r3, lsl #2
ldrb r3, [r0, #1]
ldrb r0, [ip, #2]
ldrb ip, [r4, r2, lsl #2]
mul r2, sl, r3
mul r3, sl, r0
mul r0, sl, ip
mov r2, r2, lsr #8
mov r3, r3, lsr #8
and r2, r2, #0xff
mov r0, r0, lsr #8
and r2, r2, #0xf8
and r3, r3, #0xff
and ip, r0, #0xff
and r0, r3, #0xf8
mov r2, r2, lsl #2
and r3, ip, #0xf8
orr ip, r2, r0, lsl #7
orr r3, ip, r3, asr #3
mov ip, r1, lsl #1
mov r0, fp
mov r2, #0
and r1, r7, #0xff
strh r3, [r6, ip]
bl sub_0201BD80
add r7, r7, #1
cmp r7, #0x20
blt _01FFA064
mov r7, #0xc0
and fp, r8, #0xff
_01FFA0F4:
add r1, r7, r8, lsl #8
add r2, r5, r1, lsl #2
ldrb r0, [r2, #1]
ldrb r3, [r2, #2]
ldrb r2, [r5, r1, lsl #2]
add r0, r4, r0, lsl #2
add ip, r4, r3, lsl #2
ldrb r3, [r0, #1]
ldrb r0, [ip, #2]
ldrb ip, [r4, r2, lsl #2]
mul r2, sl, r3
mul r3, sl, r0
mul r0, sl, ip
mov r2, r2, lsr #8
mov r3, r3, lsr #8
and r2, r2, #0xff
mov r0, r0, lsr #8
and r2, r2, #0xf8
and r3, r3, #0xff
and ip, r0, #0xff
and r0, r3, #0xf8
mov r2, r2, lsl #2
and r3, ip, #0xf8
orr ip, r2, r0, lsl #7
orr r3, ip, r3, asr #3
mov ip, r1, lsl #1
mov r0, fp
mov r2, #0
and r1, r7, #0xff
strh r3, [r6, ip]
bl sub_0201BD80
add r7, r7, #1
cmp r7, #0xf0
blt _01FFA0F4
mov r7, #0xf0
mov r1, r7
and r0, r8, #0xff
mov r2, #0
bl sub_0201BD80
_01FFA190:
add r1, r7, r8, lsl #8
add r2, r5, r1, lsl #2
ldrb r0, [r2, #1]
ldrb r3, [r2, #2]
ldrb fp, [r5, r1, lsl #2]
mul r2, sl, r0
mul r3, sl, r3
mul r0, sl, fp
mov r2, r2, lsr #8
mov r3, r3, lsr #8
and r2, r2, #0xff
mov fp, r0, lsr #8
and r3, r3, #0xff
and r0, r2, #0xf8
and fp, fp, #0xff
add r7, r7, #1
and r2, r3, #0xf8
mov r0, r0, lsl #2
and r3, fp, #0xf8
orr r0, r0, r2, lsl #7
orr r2, r0, r3, asr #3
mov r0, r1, lsl #1
strh r2, [r6, r0]
cmp r7, #0x100
blt _01FFA190
add r8, r8, #1
cmp r8, #0x10
blt _01FF9FAC
mov r7, #0xb0
mov r8, #0
_01FFA208:
add r1, r5, r7, lsl #2
ldrb r0, [r1, #1]
ldrb r1, [r1, #2]
ldrb r2, [r5, r7, lsl #2]
add r0, r4, r0, lsl #2
add r1, r4, r1, lsl #2
ldrb r0, [r0, #1]
ldrb r1, [r1, #2]
ldrb r2, [r4, r2, lsl #2]
mul r0, sl, r0
mul r1, sl, r1
mul r2, sl, r2
mov r0, r0, lsr #8
mov r1, r1, lsr #8
and r0, r0, #0xff
mov r2, r2, lsr #8
and r1, r1, #0xff
and r0, r0, #0xf8
and r2, r2, #0xff
and r1, r1, #0xf8
mov r0, r0, lsl #2
and r3, r2, #0xf8
orr r1, r0, r1, lsl #7
mov r0, r8
mov r2, r8
orr sb, r1, r3, asr #3
mov r3, r7, lsl #1
and r1, r7, #0xff
strh sb, [r6, r3]
bl sub_0201BD80
add r7, r7, #1
cmp r7, #0xc0
blt _01FFA208
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_01FFA290:
mov r7, #0
_01FFA294:
add r0, sb, r7
ldrb r0, [r0, #0x10]
mov r8, #0
and r4, r7, #0xff
cmp r0, #0
beq _01FFA304
mov fp, r8
_01FFA2B0:
add r1, r8, r7, lsl #8
add r2, r5, r1, lsl #2
ldrb r0, [r2, #1]
ldrb ip, [r2, #2]
ldrb r2, [r5, r1, lsl #2]
and r3, r0, #0xf8
and r0, ip, #0xf8
mov ip, r3, lsl #2
and r3, r2, #0xf8
orr ip, ip, r0, lsl #7
mov r0, r4
mov r2, fp
orr r3, ip, r3, asr #3
mov ip, r1, lsl #1
and r1, r8, #0xff
strh r3, [r6, ip]
bl sub_0201BD80
add r8, r8, #1
cmp r8, #0xf0
blt _01FFA2B0
b _01FFA37C
_01FFA304:
mov fp, r8
_01FFA308:
add r1, r8, r7, lsl #8
add r2, r5, r1, lsl #2
ldrb r0, [r2, #1]
ldrb ip, [r2, #2]
ldrb r2, [r5, r1, lsl #2]
mul r3, sl, r0
mul r0, sl, ip
mul ip, sl, r2
mov r2, r3, lsr #8
mov r3, r0, lsr #8
and r2, r2, #0xff
mov r0, ip, lsr #8
and r3, r3, #0xff
and r2, r2, #0xf8
and ip, r0, #0xff
and r0, r3, #0xf8
mov r2, r2, lsl #2
and r3, ip, #0xf8
orr ip, r2, r0, lsl #7
mov r0, r4
mov r2, fp
orr r3, ip, r3, asr #3
mov ip, r1, lsl #1
and r1, r8, #0xff
strh r3, [r6, ip]
bl sub_0201BD80
add r8, r8, #1
cmp r8, #0xf0
blt _01FFA308
_01FFA37C:
add r7, r7, #1
cmp r7, #0x10
blt _01FFA294
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
.align 2, 0
_01FFA38C: .word ov29_02353530
arm_func_end sub_01FF9F80

80
asm/main_02003DB8.s
View File

@@ -356,7 +356,7 @@ _02004270:
ldr r2, _020047D8 ; =0x00000000
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -366,7 +366,7 @@ _02004294:
ldr r2, _020047DC ; =0x0000000A
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -376,7 +376,7 @@ _020042B8:
ldr r2, _020047E0 ; =0x00000023
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -386,7 +386,7 @@ _020042DC:
ldr r2, _020047E4 ; =0x00000001
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -396,7 +396,7 @@ _02004300:
ldr r2, _020047E8 ; =0x00000002
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -406,7 +406,7 @@ _02004324:
ldr r2, _020047EC ; =0x00000003
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -416,7 +416,7 @@ _02004348:
ldr r2, _020047F0 ; =0x00000006
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -426,7 +426,7 @@ _0200436C:
ldr r2, _020047F4 ; =0x00000004
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -436,7 +436,7 @@ _02004390:
ldr r2, _020047F8 ; =0x00000005
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -446,7 +446,7 @@ _020043B4:
ldr r2, _020047FC ; =0x00000007
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -456,7 +456,7 @@ _020043D8:
ldr r2, _02004800 ; =0x00000008
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -466,7 +466,7 @@ _020043FC:
ldr r2, _02004804 ; =0x00000009
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -476,7 +476,7 @@ _02004420:
ldr r2, _02004808 ; =0x0000000B
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -486,7 +486,7 @@ _02004444:
ldr r2, _0200480C ; =0x0000001D
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -496,7 +496,7 @@ _02004468:
ldr r2, _02004810 ; =0x00000022
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -506,7 +506,7 @@ _0200448C:
ldr r2, _02004814 ; =0x0000000C
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -516,7 +516,7 @@ _020044B0:
ldr r2, _02004818 ; =0x0000000D
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -526,7 +526,7 @@ _020044D4:
ldr r2, _0200481C ; =0x0000000E
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -536,7 +536,7 @@ _020044F8:
ldr r2, _02004820 ; =0x0000000F
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -546,7 +546,7 @@ _0200451C:
ldr r2, _02004824 ; =0x00000010
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -556,7 +556,7 @@ _02004540:
ldr r2, _02004828 ; =0x00000011
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -566,7 +566,7 @@ _02004564:
ldr r2, _0200482C ; =0x00000012
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -576,7 +576,7 @@ _02004588:
ldr r2, _02004830 ; =0x00000013
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -586,7 +586,7 @@ _020045AC:
ldr r2, _02004834 ; =0x00000014
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -596,7 +596,7 @@ _020045D0:
ldr r2, _02004838 ; =0x00000015
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -606,7 +606,7 @@ _020045F4:
ldr r2, _0200483C ; =0x00000016
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -616,7 +616,7 @@ _02004618:
ldr r2, _02004840 ; =0x00000017
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -626,7 +626,7 @@ _0200463C:
ldr r2, _02004844 ; =0x00000018
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -636,7 +636,7 @@ _02004660:
ldr r2, _02004848 ; =0x00000019
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -646,7 +646,7 @@ _02004684:
ldr r2, _0200484C ; =0x0000001A
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -656,7 +656,7 @@ _020046A8:
ldr r2, _02004850 ; =0x0000001B
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -666,7 +666,7 @@ _020046CC:
ldr r2, _02004854 ; =0x0000001C
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -676,7 +676,7 @@ _020046F0:
ldr r2, _02004858 ; =0x0000001E
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -686,7 +686,7 @@ _02004714:
ldr r2, _0200485C ; =0x0000001F
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -696,7 +696,7 @@ _02004738:
ldr r2, _02004860 ; =0x00000020
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -706,7 +706,7 @@ _0200475C:
ldr r2, _02004864 ; =0x00000021
add r0, sp, #0x10
mov r1, #0
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
bne _020047A0
mov r0, #1
@@ -723,14 +723,14 @@ _02004780:
bl Debug_FatalError
_020047A0:
add r0, sp, #0x10
bl LoadOverlayInternal
bl FS_LoadOverlayImage
cmp r0, #0
bne _020047B8
mov r0, #1
bl CardPullOutWithStatus
_020047B8:
add r0, sp, #0x10
bl InitOverlay
bl FS_StartOverlay
bl FileRom_StopDataTransfer
_020047C4:
add sp, sp, #0x3c
@@ -1300,11 +1300,11 @@ sub_02004F80: ; 0x02004F80
bl MemAlloc
ldr r1, _02004FC8 ; =0xEDB88320
mov r5, r0
bl Mathi_Crc32InitTable
bl MATHi_CRC32InitTable
mov r0, r5
mov r1, r6
mov r2, r4
bl Math_CalcCrc32
bl MATH_CalcCRC32
mov r4, r0
mov r0, r5
bl MemFree

12
asm/main_bss_022AB0AC.s
View File

@@ -319,14 +319,14 @@ _022BAA20:
.global _022BB4E8
_022BB4E8:
.space 0x18
.global _022BB500
_022BB500:
.global sCallbackTable
sCallbackTable:
.space 0x60
.global SNDi_SharedWork
SNDi_SharedWork:
.space 0x4
.global _022BB564
_022BB564:
.global FifoCtrlInit
FifoCtrlInit:
.space 0x4
.global _022BB568
_022BB568:
@@ -349,8 +349,8 @@ _022BB604:
.global _022BB60C
_022BB60C:
.space 0x8
.global _022BB614
_022BB614:
.global fsi_arc_rom
fsi_arc_rom:
.space 0x5C
.global _022BB670
_022BB670:

8
asm/main_rodata_020A2808.s
View File

@@ -13709,8 +13709,8 @@ _020B2BB0:
.global _020B2BB4
_020B2BB4:
.byte 0x72, 0x6F, 0x6D, 0x00
.global _020B2BB8
_020B2BB8:
.global fsi_digest_key_len
fsi_digest_key_len:
.word _020AEC1C
.byte 0x40, 0x00, 0x00, 0x00
.global _020B2BC0
@@ -13799,8 +13799,8 @@ _020B2E5C:
.byte 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37
.byte 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37
.byte 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37
.global _020B2E9C
_020B2E9C:
.global sDayOfYear
sDayOfYear:
.byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
.byte 0x1F, 0x00, 0x00, 0x00, 0x3B, 0x00, 0x00, 0x00, 0x5A, 0x00, 0x00, 0x00, 0x78, 0x00, 0x00, 0x00
.byte 0x97, 0x00, 0x00, 0x00, 0xB5, 0x00, 0x00, 0x00, 0xD4, 0x00, 0x00, 0x00, 0xF3, 0x00, 0x00, 0x00

209
asm/os_reset_itcm.s Normal file
View File

@@ -0,0 +1,209 @@
.include "asm/macros.inc"
.include "itcm.inc"
.section .itcm,4,1,4
arm_func_start OSi_DoResetSystem
OSi_DoResetSystem: ; 0x01FF97CC
stmdb sp!, {r3, lr}
ldr r0, _01FF97F8 ; =OSi_IsInitReset
_01FF97D4:
ldrh r1, [r0]
cmp r1, #0
beq _01FF97D4
ldr r0, _01FF97FC ; =0x04000208
mov r1, #0
strh r1, [r0]
bl OSi_ReloadRomData
bl OSi_DoBoot
ldmia sp!, {r3, pc}
.align 2, 0
_01FF97F8: .word OSi_IsInitReset
_01FF97FC: .word 0x04000208
arm_func_end OSi_DoResetSystem
arm_func_start OSi_DoBoot
OSi_DoBoot: ; 0x01FF9800
mov ip, #0x4000000
str ip, [ip, #0x208]
ldr r1, _01FF98AC ; =OS_IRQTable
add r1, r1, #0x3fc0
add r1, r1, #0x3c
mov r0, #0
str r0, [r1]
ldr r1, _01FF98B0 ; =0x04000180
_01FF9820:
ldrh r0, [r1]
and r0, r0, #0xf
cmp r0, #1
bne _01FF9820
mov r0, #0x100
strh r0, [r1]
mov r0, #0
ldr r3, _01FF98B4 ; =0x027FFD9C
ldr r4, [r3]
ldr r1, _01FF98B8 ; =0x027FFD80
mov r2, #0x80
bl OSi_CpuClear32
str r4, [r3]
ldr r1, _01FF98BC ; =0x027FFF80
mov r2, #0x18
bl OSi_CpuClear32
ldr r1, _01FF98C0 ; =0x027FFF98
strh r0, [r1]
ldr r1, _01FF98C4 ; =0x027FFF9C
mov r2, #0x64
bl OSi_CpuClear32
ldr r1, _01FF98B0 ; =0x04000180
_01FF9878:
ldrh r0, [r1]
and r0, r0, #0xf
cmp r0, #1
beq _01FF9878
mov r0, #0
strh r0, [r1]
ldr r3, _01FF98C8 ; =0x027FFE00
ldr ip, [r3, #0x24]
mov lr, ip
ldr fp, _01FF98BC ; =0x027FFF80
ldmia fp, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sb, sl}
mov fp, #0
bx ip
.align 2, 0
_01FF98AC: .word OS_IRQTable
_01FF98B0: .word 0x04000180
_01FF98B4: .word 0x027FFD9C
_01FF98B8: .word 0x027FFD80
_01FF98BC: .word 0x027FFF80
_01FF98C0: .word 0x027FFF98
_01FF98C4: .word 0x027FFF9C
_01FF98C8: .word 0x027FFE00
arm_func_end OSi_DoBoot
arm_func_start OSi_CpuClear32
OSi_CpuClear32: ; 0x01FF98CC
add ip, r1, r2
_01FF98D0:
cmp r1, ip
blt _01FF98DC
b _01FF98E0
_01FF98DC:
stmia r1!, {r0}
_01FF98E0:
blt _01FF98D0
bx lr
arm_func_end OSi_CpuClear32
arm_func_start OSi_ReloadRomData
OSi_ReloadRomData: ; 0x01FF98E8
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
ldr r1, _01FF9988 ; =0x027FFC2C
ldr r4, [r1]
cmp r4, #0x8000
blo _01FF990C
mov r0, r4
add r1, r1, #0x1d4
mov r2, #0x160
bl OSi_ReadCardRom32
_01FF990C:
ldr r0, _01FF998C ; =0x027FFE20
ldr r5, [r0]
ldr r6, [r0, #8]
ldr r7, [r0, #0xc]
ldr r8, [r0, #0x10]
ldr sb, [r0, #0x18]
ldr sl, [r0, #0x1c]
bl EnableIrqFlag
mov fp, r0
bl DC_StoreAll
bl DC_InvalidateAll
mov r0, fp
bl SetIrqFlag
bl IC_InvalidateAll
bl DC_WaitWriteBufferEmpty
add r5, r5, r4
cmp r5, #0x8000
bhs _01FF9964
rsb r0, r5, #0x8000
add r6, r6, r0
sub r7, r7, r0
mov r5, #0x8000
_01FF9964:
mov r0, r5
mov r1, r6
mov r2, r7
bl OSi_ReadCardRom32
mov r1, sb
mov r2, sl
add r0, r8, r4
bl OSi_ReadCardRom32
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
.align 2, 0
_01FF9988: .word 0x027FFC2C
_01FF998C: .word 0x027FFE20
arm_func_end OSi_ReloadRomData
arm_func_start OSi_ReadCardRom32
OSi_ReadCardRom32: ; 0x01FF9990
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
ldr r4, _01FF9A54 ; =0x027FFE60
ldr r3, _01FF9A58 ; =0x000001FF
ldr r5, [r4]
and r4, r0, r3
bic r3, r5, #0x7000000
ldr r5, _01FF9A5C ; =0x040001A4
orr r3, r3, #0xa1000000
rsb ip, r4, #0
_01FF99B4:
ldr r4, [r5]
tst r4, #0x80000000
bne _01FF99B4
ldr r7, _01FF9A60 ; =0x040001A1
mov r4, #0x80
strb r4, [r7]
cmp ip, r2
add r0, r0, ip
ldmgeia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
ldr r4, _01FF9A64 ; =0x04100010
mov sb, r0, lsr #8
mov r6, #0xb7
mov r5, #0
_01FF99E8:
strb r6, [r7, #7]
mov lr, r0, lsr #0x18
strb lr, [r7, #8]
mov lr, r0, lsr #0x10
strb lr, [r7, #9]
strb sb, [r7, #0xa]
strb r0, [r7, #0xb]
strb r5, [r7, #0xc]
strb r5, [r7, #0xd]
strb r5, [r7, #0xe]
str r3, [r7, #3]
_01FF9A14:
ldr r8, [r7, #3]
tst r8, #0x800000
beq _01FF9A38
cmp ip, #0
ldr lr, [r4]
blt _01FF9A34
cmp ip, r2
strlt lr, [r1, ip]
_01FF9A34:
add ip, ip, #4
_01FF9A38:
tst r8, #0x80000000
bne _01FF9A14
cmp ip, r2
add sb, sb, #2
add r0, r0, #0x200
blt _01FF99E8
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
.align 2, 0
_01FF9A54: .word 0x027FFE60
_01FF9A58: .word 0x000001FF
_01FF9A5C: .word 0x040001A4
_01FF9A60: .word 0x040001A1
_01FF9A64: .word 0x04100010
arm_func_end OSi_ReadCardRom32

38
asm/overlay_00.s
View File

@@ -36235,14 +36235,14 @@ _022DA63C:
add r0, r0, #0x1a00
add r1, r1, #0x1800
add r2, r4, r7
bl Mathi_Crc16Update
bl MATHi_CRC16Update
ldr r0, _022DA86C ; =ov00_02326CA4
add r1, r4, r7
ldr r0, [r0]
mov r2, #0x6e
add r0, r0, #0x96
add r0, r0, #0x1a00
bl Math_CalcCrc16
bl MATH_CalcCRC16
ldr r1, _022DA86C ; =ov00_02326CA4
mov r2, #0x70
ldr r4, [r1]
@@ -36364,7 +36364,7 @@ Wds_Initialize: ; 0x022DA884
ldr r0, [r2]
add r0, r0, #0x96
add r0, r0, #0x1a00
bl Mathi_Crc16InitTable
bl MATHi_CRC16InitTable
ldr r0, _022DA914 ; =ov00_02326CA4
mov r1, r6
ldr r0, [r0]
@@ -37254,11 +37254,11 @@ Dwc_Acc_CreateFriendKey: ; 0x022DB358
_022DB37C:
add r0, sp, #0x70
mov r1, #7
bl Mathi_Crc8InitTable
bl MATHi_CRC8InitTable
add r0, sp, #0x70
add r1, sp, #0
mov r2, #8
bl Math_CalcCrc8
bl MATH_CalcCRC8
and r0, r0, #0x7f
b _022DB3D0
_022DB3A0:
@@ -37452,11 +37452,11 @@ Dwci_Acc_CreateUserData: ; 0x022DB5B8
bl Dwci_Acc_SetFlag_DataType
ldr r1, _022DB630 ; =0xEDB88320
add r0, sp, #0
bl Mathi_Crc32InitTable
bl MATHi_CRC32InitTable
add r0, sp, #0
mov r1, r5
mov r2, #0x3c
bl Math_CalcCrc32
bl MATH_CalcCRC32
str r0, [r5, #0x3c]
ldr r0, [r5, #0x20]
orr r0, r0, #1
@@ -37608,11 +37608,11 @@ Dwc_CheckUserData: ; 0x022DB7BC
ldr r1, _022DB7FC ; =0xEDB88320
mov r4, r0
add r0, sp, #0
bl Mathi_Crc32InitTable
bl MATHi_CRC32InitTable
add r0, sp, #0
mov r1, r4
mov r2, #0x3c
bl Math_CalcCrc32
bl MATH_CalcCRC32
ldr r1, [r4, #0x3c]
cmp r0, r1
moveq r0, #1
@@ -37682,11 +37682,11 @@ Dwci_Acc_SetLoginIdToUserData: ; 0x022DB898
ldr r1, _022DB8EC ; =0xEDB88320
add r0, sp, #0
str ip, [r4, #0x1c]
bl Mathi_Crc32InitTable
bl MATHi_CRC32InitTable
add r0, sp, #0
mov r1, r4
mov r2, #0x3c
bl Math_CalcCrc32
bl MATH_CalcCRC32
str r0, [r4, #0x3c]
ldr r0, [r4, #0x20]
orr r0, r0, #1
@@ -37733,11 +37733,11 @@ Dwci_Acc_ClearDirty: ; 0x022DB920
bic r2, r1, #1
ldr r1, _022DB960 ; =0xEDB88320
str r2, [r4, #0x20]
bl Mathi_Crc32InitTable
bl MATHi_CRC32InitTable
add r0, sp, #0
mov r1, r4
mov r2, #0x3c
bl Math_CalcCrc32
bl MATH_CalcCRC32
str r0, [r4, #0x3c]
add sp, sp, #0x400
ldmia sp!, {r4, pc}
@@ -58594,7 +58594,7 @@ Dwci_BM_SetWiFiInfo: ; 0x022ED540
bl Dwci_BackuplConvWifiInfo
ldr r1, _022ED614 ; =0x0000A001
add r0, sl, #0x200
bl Mathi_Crc16InitTable
bl MATHi_CRC16InitTable
mov r5, #0x100
ldr r6, _022ED618 ; =ov00_023276E0
mov r8, #0
@@ -58619,7 +58619,7 @@ _022ED59C:
mov r1, sl
mov r2, #0xfe
add r0, sl, #0x200
bl Math_CalcCrc16
bl MATH_CalcCRC16
strh r0, [sl, #0xfe]
_022ED5C0:
mov r0, sb
@@ -58743,7 +58743,7 @@ _022ED738:
mov r1, r7
mov r2, r4
add r0, r8, #0x500
bl Math_CalcCrc16
bl MATH_CalcCRC16
add r1, r8, r5, lsl #8
strh r0, [r1, #0xfe]
_022ED750:
@@ -59426,7 +59426,7 @@ Dwc_BM_Init: ; 0x022EE018
ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
ldr r1, _022EE310 ; =0x0000A001
add r0, r8, #0x500
bl Mathi_Crc16InitTable
bl MATHi_CRC16InitTable
mov r0, r8
bl Dwci_BackuplRead
cmp r0, #0
@@ -59447,7 +59447,7 @@ _022EE094:
mov r1, r6
mov r2, r4
add r0, r8, #0x500
bl Math_CalcCrc16
bl MATH_CalcCRC16
add r1, r8, r5, lsl #8
ldrh r1, [r1, #0xfe]
cmp r0, r1
@@ -59465,7 +59465,7 @@ _022EE0C4:
add r0, r8, #0x500
add r1, r8, #0x300
mov r2, #0xfe
bl Math_CalcCrc16
bl MATH_CalcCRC16
add r1, r8, #0x300
ldrh r1, [r1, #0xfe]
cmp r0, r1

4
asm/overlay_02.s
View File

@@ -42705,7 +42705,7 @@ Dwci_SettignlInit: ; 0x023474C0
str r0, [r1]
ldr r1, _02347500 ; =0x0000A001
add r0, r2, #0x400
bl Mathi_Crc16InitTable
bl MATHi_CRC16InitTable
ldr r0, _023474FC ; =ov02_0235AB48
ldr r0, [r0]
bl Dwci_BackuplRead
@@ -43525,7 +43525,7 @@ _02347F08:
add r0, r1, #0xf8
add r0, r0, #0x400
add r1, r1, r7
bl Math_CalcCrc16
bl MATH_CalcCRC16
ldr r1, [r8]
add r1, r1, r6, lsl #8
strh r0, [r1, #0xfe]

5
common.mk
View File

@@ -88,7 +88,7 @@ PRECOMPILE_OBJ_DIR := $(dir $(PRECOMPILE_OBJ))
PRECOMPILE_DEPFILE := $(BUILD_DIR)/precompile/global.d
# Directories
NITROSDK_SRC_SUBDIRS := os mi snd fs gx fx
NITROSDK_SRC_SUBDIRS := os mi snd fs gx fx rtc math std
LIB_SUBDIRS := DSE NitroSDK MSL_C
SRC_SUBDIR := src
@@ -132,6 +132,7 @@ XMAP := $(NEF).xMAP
EXCCFLAGS := -Cpp_exceptions off
MWCFLAGS = $(DEFINES) -enum min -lang c99 $(EXCCFLAGS) -gccext,on -proc $(PROC) -msgstyle gcc -gccinc -i ./include -i ./include/library -i $(WORK_DIR)/files -I$(WORK_DIR)/lib/include -interworking -inline on,noauto -char signed -W all -W pedantic -W noimpl_signedunsigned -W noimplicitconv -W nounusedarg -W nomissingreturn -W error
MWCFLAGS_LIB = $(DEFINES) -enum int -lang c99 $(EXCCFLAGS) -gccext,on -proc $(PROC) -msgstyle gcc -gccinc -i ./include -i ./include/library -i $(WORK_DIR)/files -I$(WORK_DIR)/lib/include -interworking -inline on,noauto -char signed -W all -W pedantic -W noimpl_signedunsigned -W noimplicitconv -W nounusedarg -W nomissingreturn -W error -stdinc
MWASFLAGS = $(DEFINES) -proc $(PROC_S) -gccinc -i . -i ./include -i $(WORK_DIR)/asm/include -i $(WORK_DIR)/files -i $(WORK_DIR)/lib/asm/include -i $(WORK_DIR)/lib/syscall/asm/include -I$(WORK_DIR)/lib/include -DSDK_ASM
MWLDFLAGS := -proc $(PROC) -nopic -nopid -interworking -map closure,unused -symtab sort -m _start -msgstyle gcc
@@ -146,7 +147,7 @@ SRC_INCLUDE_FLAGS := -i ./include -i ./include/library -i $(WORK_DIR)/files $(LI
SDK_INCLUDE_FLAGS := $(LIBRARY_INCLUDE_FLAGS)
MW_COMPILE_SRC = $(WINE) $(MWCC) $(OPTFLAGS) $(MWCFLAGS) $(SRC_INCLUDE_FLAGS) -i $(PRECOMPILE_OBJ_DIR) -prefix $(PRECOMPILE_OBJ_BASENAME)
MW_COMPILE_LIB = $(WINE) $(MWCC) $(OPTFLAGS_SDK) $(MWCFLAGS) $(SRC_INCLUDE_FLAGS) -i $(PRECOMPILE_OBJ_DIR) -prefix $(PRECOMPILE_OBJ_BASENAME)
MW_COMPILE_LIB = $(WINE) $(MWCC) $(OPTFLAGS_SDK) $(MWCFLAGS_LIB) $(SRC_INCLUDE_FLAGS) -i $(PRECOMPILE_OBJ_DIR) -prefix $(PRECOMPILE_OBJ_BASENAME)
MW_COMPILE_SRC_PRECOMPILE = $(WINE) $(MWCC) $(MWCFLAGS) $(SRC_INCLUDE_FLAGS)
MW_ASSEMBLE = $(WINE) $(MWAS) $(MWASFLAGS)

18
include/dungeon.h
View File

@@ -32,6 +32,11 @@ struct monster_slots {
struct entity* wild_pokemon[DUNGEON_MAX_WILD_POKEMON];
};
struct monster_id_struct {
struct entity *entity;
u32 entity_id; // 0x198E8: statuses::unique_id from that monster?
};
struct weather {
enum weather_id weather; // 0x0: current weather
// 0x1: Default weather on the floor that will be reverted to if the current weather is
@@ -1615,17 +1620,8 @@ struct dungeon {
struct entity entities[149]; // 0x12DCC / 0x2A4 : All the entities in a dungeon
// 0x198E4: An ally monster related to storm drain/lightning rod and maybe other checks?
struct entity* unk_ally_monster1;
u32 unk_ally_monster_unique_id1; // 0x198E8: statuses::unique_id from that monster?
// 0x198EC: An ally monster related to storm drain/lightning rod and maybe other checks?
struct entity* unk_ally_monster2;
u32 unk_ally_monster_unique_id2; // 0x198F0: statuses::unique_id from that monster?
// 0x198F4: An enemy monster related to storm drain/lightning rod and maybe other checks?
struct entity* unk_enemy_monster1;
u32 unk_enemy_monster_unique_id1; // 0x198F8: statuses::unique_id from that monster?
// 0x198FC: An enemy monster related to storm drain/lightning rod and maybe other checks?
struct entity* unk_enemy_monster2;
u32 unk_enemy_monster_unique_id2; // 0x19900: statuses::unique_id from that monster?
struct monster_id_struct storm_drain_lightning_rod[4]; // 0 = ally, 1 = enemy
// 0x19904: Pointer to the monster that will snatch the effect of a move.
struct entity* snatch_monster;
// 0x19908: Pointer to the entity to be spawned by the effect of Illuminate

5
include/dungeon_ai_itcm.h
View File

@@ -7,4 +7,9 @@
// Determines if an AI-controlled monster will use a move and which one it will use.
void ChooseAiMove(struct entity *monster);
void sub_01FFBD20(struct entity *monster, struct entity *target);
void sub_01FFBDF4(struct entity *monster);
struct entity *LightningRodStormDrainCheck(struct entity *monster, struct entity* target, struct move *move, s32 arg3);
bool8 sub_01FFBF78(struct entity *pokemon, struct entity *target);
#endif //PMDSKY_DUNGEON_AI_ITCM_H

2
include/dungeon_ai_movement.h
View File

@@ -15,4 +15,6 @@ void AiMovement(struct entity *monster, bool8 show_run_away_effect);
// Calculates the target position of an AI-controlled monster and stores it in the monster's ai_target_pos field
bool8 CalculateAiTargetPos(struct entity *monster);
void sub_01FFB62C(struct entity *entity);
#endif //PMDSKY_DUNGEON_AI_MOVEMENT_H

16
lib/DSE/asm/main_02071AC0.s
View File

@@ -91,19 +91,3 @@ DseTrackEvent_SetBankMsb: ; 0x02071B8C
add r0, r4, #1
ldmia sp!, {r4, pc}
arm_func_end DseTrackEvent_SetBankMsb
arm_func_start DseTrackEvent_SetBankLsb
DseTrackEvent_SetBankLsb: ; 0x02071BBC
stmdb sp!, {r4, lr}
mov r4, r0
ldrh r2, [r3, #0xe]
ldrb r1, [r4]
mov r0, r3
bic r2, r2, #0xff
add r1, r2, r1
mov r1, r1, lsl #0x10
mov r1, r1, lsr #0x10
bl DseChannel_SetBank
add r0, r4, #1
ldmia sp!, {r4, pc}
arm_func_end DseTrackEvent_SetBankLsb

148
lib/DSE/asm/main_02071CC8.s
View File

@@ -1,148 +0,0 @@
.include "asm/macros.inc"
.include "include/main_02071CC8.inc"
.text
arm_func_start DseTrackEvent_RestoreEnvelopeDefaults
DseTrackEvent_RestoreEnvelopeDefaults: ; 0x02071CC8
stmdb sp!, {r4, lr}
mov r4, r0
add r0, r3, #0x64
bl SoundEnvelopeParameters_Reset
mov r0, r4
ldmia sp!, {r4, pc}
arm_func_end DseTrackEvent_RestoreEnvelopeDefaults
arm_func_start DseTrackEvent_SetEnvelopeAttackBegin
DseTrackEvent_SetEnvelopeAttackBegin: ; 0x02071CE0
stmdb sp!, {r4, lr}
mov r4, r0
ldrb r1, [r4]
add r0, r3, #0x64
strb r1, [r3, #0x6c]
bl SoundEnvelopeParameters_CheckValidity
add r0, r4, #1
ldmia sp!, {r4, pc}
arm_func_end DseTrackEvent_SetEnvelopeAttackBegin
arm_func_start DseTrackEvent_SetEnvelopeAttackTime
DseTrackEvent_SetEnvelopeAttackTime: ; 0x02071D00
stmdb sp!, {r4, lr}
mov r4, r0
ldrb r1, [r4]
add r0, r3, #0x64
strb r1, [r3, #0x6d]
bl SoundEnvelopeParameters_CheckValidity
add r0, r4, #1
ldmia sp!, {r4, pc}
arm_func_end DseTrackEvent_SetEnvelopeAttackTime
arm_func_start DseTrackEvent_SetEnvelopeHoldTime
DseTrackEvent_SetEnvelopeHoldTime: ; 0x02071D20
stmdb sp!, {r4, lr}
mov r4, r0
ldrb r1, [r4]
add r0, r3, #0x64
strb r1, [r3, #0x70]
bl SoundEnvelopeParameters_CheckValidity
add r0, r4, #1
ldmia sp!, {r4, pc}
arm_func_end DseTrackEvent_SetEnvelopeHoldTime
arm_func_start DseTrackEvent_SetEnvelopeDecayTimeAndSustainLevel
DseTrackEvent_SetEnvelopeDecayTimeAndSustainLevel: ; 0x02071D40
stmdb sp!, {r4, lr}
mov r4, r0
ldrb r0, [r4]
cmp r0, #0xff
strneb r0, [r3, #0x6e]
ldrb r0, [r4, #1]
cmp r0, #0xff
strneb r0, [r3, #0x6f]
add r0, r3, #0x64
bl SoundEnvelopeParameters_CheckValidity
add r0, r4, #2
ldmia sp!, {r4, pc}
arm_func_end DseTrackEvent_SetEnvelopeDecayTimeAndSustainLevel
arm_func_start DseTrackEvent_SetEnvelopeSustainTime
DseTrackEvent_SetEnvelopeSustainTime: ; 0x02071D70
stmdb sp!, {r4, lr}
mov r4, r0
ldrb r1, [r4]
add r0, r3, #0x64
strb r1, [r3, #0x71]
bl SoundEnvelopeParameters_CheckValidity
add r0, r4, #1
ldmia sp!, {r4, pc}
arm_func_end DseTrackEvent_SetEnvelopeSustainTime
arm_func_start DseTrackEvent_SetEnvelopeReleaseTime
DseTrackEvent_SetEnvelopeReleaseTime: ; 0x02071D90
stmdb sp!, {r4, lr}
mov r4, r0
ldrb r1, [r4]
add r0, r3, #0x64
strb r1, [r3, #0x72]
bl SoundEnvelopeParameters_CheckValidity
add r0, r4, #1
ldmia sp!, {r4, pc}
arm_func_end DseTrackEvent_SetEnvelopeReleaseTime
arm_func_start DseTrackEvent_SetNoteDurationMultiplier
DseTrackEvent_SetNoteDurationMultiplier: ; 0x02071DB0
ldrb r1, [r0], #1
strb r1, [r2, #5]
bx lr
arm_func_end DseTrackEvent_SetNoteDurationMultiplier
arm_func_start DseTrackEvent_ForceLfoEnvelopeLevel
DseTrackEvent_ForceLfoEnvelopeLevel: ; 0x02071DBC
stmdb sp!, {r4, lr}
mov r4, r0
ldrsb r1, [r4]
mov r0, r3
bl DseChannel_SetLfoConstEnvelopeLevel
add r0, r4, #1
ldmia sp!, {r4, pc}
arm_func_end DseTrackEvent_ForceLfoEnvelopeLevel
arm_func_start DseTrackEvent_SetHoldNotes
DseTrackEvent_SetHoldNotes: ; 0x02071DD8
stmdb sp!, {r4, lr}
mov r4, r0
ldrb r1, [r4]
ldr r0, [r2, #0x54]
cmp r1, #0x40
ldrb r1, [r0, #4]
orrhs r1, r1, #1
strhsb r1, [r0, #4]
bhs _02071E08
bic r1, r1, #1
strb r1, [r0, #4]
bl DseVoice_ReleaseHeld
_02071E08:
add r0, r4, #1
ldmia sp!, {r4, pc}
arm_func_end DseTrackEvent_SetHoldNotes
arm_func_start DseTrackEvent_SetFlagBit1Unknown
DseTrackEvent_SetFlagBit1Unknown: ; 0x02071E10
ldrb r1, [r3, #4]
orr r1, r1, #2
strb r1, [r3, #4]
bx lr
arm_func_end DseTrackEvent_SetFlagBit1Unknown
arm_func_start DseTrackEvent_SetOptionalVolume
DseTrackEvent_SetOptionalVolume: ; 0x02071E20
ldrb r1, [r0], #1
strb r1, [r3, #0x58]
bx lr
arm_func_end DseTrackEvent_SetOptionalVolume
arm_func_start DseTrackEvent_Dummy2Bytes
DseTrackEvent_Dummy2Bytes: ; 0x02071E2C
add r0, r0, #2
bx lr
arm_func_end DseTrackEvent_Dummy2Bytes

44
lib/DSE/include/dc_envelope.h
View File

@@ -1,6 +1,8 @@
#ifndef PMDSKY_DC_ENVELOPE_H
#define PMDSKY_DC_ENVELOPE_H
#include "dse.h"
#define ENVELOPE_STATE_OFF ((u8)0x00)
#define ENVELOPE_STATE_CONST ((u8)0x01)
#define ENVELOPE_STATE_DONE ((u8)0x02)
@@ -11,48 +13,6 @@
#define ENVELOPE_STATE_RELEASE ((u8)0x07)
#define ENVELOPE_STATE_RELEASE_END ((u8)0x08)
struct sound_envelope_parameters
{
u8 use_envelope;
u8 slide_time_multiplier;
u16 unknown;
u32 unknown_2;
//+0x08
u8 attack_begin;
u8 attack_time;
u8 decay_time;
u8 sustain_level;
u8 hold_time;
u8 sustain_time;
u8 release_time;
u8 unknown_3;
//+0x10
};
struct sound_envelope
{
struct sound_envelope_parameters parameters;
//+0x10
s32 current_volume;
s32 volume_delta;
s32 ticks_left;
u8 state;
u8 target_volume;
u8 update_volume;
//+0x20
};
struct driver_work {
u8 fill0[0x27];
s16 usec_per_sound_driver_tick;
u8 fill1[0x6c8];
void* heap_start;
void* heap_end;
void* heap_size;
};
extern struct driver_work DRIVER_WORK;
void SoundEnvelope_Reset(struct sound_envelope *envelope);
void SoundEnvelopeParameters_Reset(struct sound_envelope_parameters *parameters);
void SoundEnvelopeParameters_CheckValidity(struct sound_envelope_parameters *parameters);

5
lib/DSE/include/dse.h
View File

@@ -60,16 +60,19 @@ struct sound_envelope_parameters {
u8 sustain_time;
u8 release_time;
u8 unk_0xf;
//+0x10
};
struct sound_envelope {
struct sound_envelope_parameters parameters;
//+0x10
s32 current_volume;
s32 volume_delta;
s32 ticks_left;
u8 state;
u8 target_volume;
u8 update_volume;
//+0x20
};
struct dse_track {
@@ -461,4 +464,6 @@ struct dse_driver_work {
void* loading_bank_pcm_data;
};
extern struct dse_driver_work DRIVER_WORK;
#endif //PMDSKY_DSE_H

16
lib/DSE/include/main_02071BF4.h
View File

@@ -3,8 +3,24 @@
#include "dse.h"
u8* DseTrackEvent_SetBankLsb(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
u8* DseTrackEvent_Dummy1Byte(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
u8* DseTrackEvent_SetInstrument(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
u8* DseTrackEvent_SongVolumeFade(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
u8* DseTrackEvent_RestoreEnvelopeDefaults(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
u8* DseTrackEvent_SetEnvelopeAttackBegin(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
u8* DseTrackEvent_SetEnvelopeAttackTime(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
u8* DseTrackEvent_SetEnvelopeHoldTime(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
u8* DseTrackEvent_SetEnvelopeDecayTimeAndSustainLevel(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
u8* DseTrackEvent_SetEnvelopeSustainTime(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
u8* DseTrackEvent_SetEnvelopeReleaseTime(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
u8* DseTrackEvent_SetNoteDurationMultiplier(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
u8* DseTrackEvent_ForceLfoEnvelopeLevel(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
u8* DseTrackEvent_SetHoldNotes(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
u8* DseTrackEvent_SetFlagBit1Unknown(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
u8* DseTrackEvent_SetOptionalVolume(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
u8* DseTrackEvent_Dummy2Bytes(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
u8* DseTrackEvent_SetTuning(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
#endif //PMDSKY_MAIN_02071BF4_H

8
lib/DSE/include/main_02071E34.h
View File

@@ -1,8 +0,0 @@
#ifndef PMDSKY_MAIN_02071E34_H
#define PMDSKY_MAIN_02071E34_H
#include "dse.h"
u8* DseTrackEvent_SetTuning(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel);
#endif //PMDSKY_MAIN_02071E34_H

5
lib/DSE/src/dc_envelope.c
View File

@@ -1,4 +1,5 @@
#include "dc_envelope.h"
#include "dse.h"
extern u16 MUSIC_DURATION_LOOKUP_TABLE_1[128];
extern u32 MUSIC_DURATION_LOOKUP_TABLE_2[128];
@@ -102,11 +103,11 @@ void SoundEnvelope_SetSlide(struct sound_envelope *envelope, s32 target_volume,
if (slide_time_multiplier == 0)
{
envelope->ticks_left = MUSIC_DURATION_LOOKUP_TABLE_2[msec_tab_index] * 1000 / DRIVER_WORK.usec_per_sound_driver_tick;
envelope->ticks_left = MUSIC_DURATION_LOOKUP_TABLE_2[msec_tab_index] * 1000 / DRIVER_WORK.microseconds_per_driver_tick;
}
else
{
envelope->ticks_left = slide_time_multiplier * MUSIC_DURATION_LOOKUP_TABLE_1[msec_tab_index] * 1000 / DRIVER_WORK.usec_per_sound_driver_tick;
envelope->ticks_left = slide_time_multiplier * MUSIC_DURATION_LOOKUP_TABLE_1[msec_tab_index] * 1000 / DRIVER_WORK.microseconds_per_driver_tick;
}
if (envelope->ticks_left != 0)

128
lib/DSE/src/main_02071BF4.c
View File

@@ -1,11 +1,23 @@
#include "main_02071BF4.h"
#include "dc_envelope.h"
#define IME (*(vu16*)0x4000208)
extern struct dse_driver_work DRIVER_WORK;
extern u32 DseChannel_SetInstrument(struct dse_channel *channel, u16 instrument_index);
extern void DseChannel_SetLfoConstEnvelopeLevel(struct dse_channel *channel, s8 envelope_level);
void DseChannel_SetBank(struct dse_channel*, u16);
extern void DseVoice_ReleaseHeld(struct dse_channel *);
extern u32 _u32_div_f(u32 dividend, u32 divisor);
extern u32 _s32_div_f(s32 dividend, s32 divisor);
u8* DseTrackEvent_SetBankLsb(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel)
{
DseChannel_SetBank(channel, (u16) ((channel->swd_id & ~0xFF) + *ptr_next_byte));
return ptr_next_byte + 1;
}
u8* DseTrackEvent_Dummy1Byte(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel)
{
return ptr_next_byte + 1;
@@ -56,3 +68,119 @@ u8* DseTrackEvent_SongVolumeFade(u8 *ptr_next_byte, struct dse_sequence *sequenc
(sequence->volume).ticks_remaining = (short)uVar4;
return ptr_next_byte + 3;
}
u8* DseTrackEvent_RestoreEnvelopeDefaults(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel)
{
SoundEnvelopeParameters_Reset(&channel->envelope_override);
return ptr_next_byte;
}
u8* DseTrackEvent_SetEnvelopeAttackBegin(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel)
{
channel->envelope_override.attack_begin = *ptr_next_byte;
SoundEnvelopeParameters_CheckValidity(&channel->envelope_override);
return ptr_next_byte + 1;
}
u8* DseTrackEvent_SetEnvelopeAttackTime(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel)
{
channel->envelope_override.attack_time = *ptr_next_byte;
SoundEnvelopeParameters_CheckValidity(&channel->envelope_override);
return ptr_next_byte + 1;
}
u8* DseTrackEvent_SetEnvelopeHoldTime(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel)
{
channel->envelope_override.hold_time = *ptr_next_byte;
SoundEnvelopeParameters_CheckValidity(&channel->envelope_override);
return ptr_next_byte + 1;
}
u8* DseTrackEvent_SetEnvelopeDecayTimeAndSustainLevel(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel)
{
if(ptr_next_byte[0] != 0xFF) channel->envelope_override.decay_time = ptr_next_byte[0];
if(ptr_next_byte[1] != 0xFF) channel->envelope_override.sustain_level = ptr_next_byte[1];
SoundEnvelopeParameters_CheckValidity(&channel->envelope_override);
return ptr_next_byte + 2;
}
u8* DseTrackEvent_SetEnvelopeSustainTime(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel)
{
channel->envelope_override.sustain_time = *ptr_next_byte;
SoundEnvelopeParameters_CheckValidity(&channel->envelope_override);
return ptr_next_byte + 1;
}
u8* DseTrackEvent_SetEnvelopeReleaseTime(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel)
{
channel->envelope_override.release_time = *ptr_next_byte;
SoundEnvelopeParameters_CheckValidity(&channel->envelope_override);
return ptr_next_byte + 1;
}
u8* DseTrackEvent_SetNoteDurationMultiplier(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel)
{
track->note_duration_multiplier = ptr_next_byte[0];
return ptr_next_byte + 1;
}
u8* DseTrackEvent_ForceLfoEnvelopeLevel(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel)
{
DseChannel_SetLfoConstEnvelopeLevel(channel, (s8)ptr_next_byte[0]);
return ptr_next_byte + 1;
}
u8* DseTrackEvent_SetHoldNotes(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel)
{
struct dse_channel* track_channel = track->channel;
if ((u32) *ptr_next_byte >= 0x40) {
track_channel->channel_flags |= 1;
} else {
track_channel->channel_flags &= ~1;
DseVoice_ReleaseHeld(track_channel);
}
return ptr_next_byte + 1;
}
u8* DseTrackEvent_SetFlagBit1Unknown(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel)
{
channel->channel_flags |= 2;
return ptr_next_byte;
}
u8* DseTrackEvent_SetOptionalVolume(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel)
{
channel->optional_volume = ptr_next_byte[0];
return ptr_next_byte + 1;
}
u8* DseTrackEvent_Dummy2Bytes(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel)
{
return ptr_next_byte + 2;
}
u8* DseTrackEvent_SetTuning(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel)
{
s16 tune = *(s8*)ptr_next_byte<<8;
channel->tuning = tune;
channel->bend_final = tune + (s16)(channel->bend.current >> 0x10) + channel->container->bend;
u16 old_ime = IME;
IME = 0;
struct dse_voice *voice = channel->voice_list;
if(voice) {
do {
voice->update_flags = voice->update_flags | 0x10;
voice = voice->next_in_channel_allocation_list;
} while(voice);
}
u16 unused = IME;
IME = old_ime;
return ptr_next_byte + 1;
}

23
lib/DSE/src/main_02071E34.c
View File

@@ -1,23 +0,0 @@
#include "main_02071E34.h"
#define IME (*(vu16*)0x4000208)
u8* DseTrackEvent_SetTuning(u8 *ptr_next_byte, struct dse_sequence *sequence, struct dse_track *track, struct dse_channel *channel)
{
s16 tune = *(s8*)ptr_next_byte<<8;
channel->tuning = tune;
channel->bend_final = tune + (s16)(channel->bend.current >> 0x10) + channel->container->bend;
u16 old_ime = IME;
IME = 0;
struct dse_voice *voice = channel->voice_list;
if(voice) {
do {
voice->update_flags = voice->update_flags | 0x10;
voice = voice->next_in_channel_allocation_list;
} while(voice);
}
u16 unused = IME;
IME = old_ime;
return ptr_next_byte + 1;
}

8
lib/MSL_C/asm/include/main_0207F894.inc
View File

@@ -2,12 +2,12 @@
.public _02000BC4
.public _020AEC5C
.public _020B2BB4
.public _020B2BB8
.public fsi_digest_key_len
.public _020B2BC0
.public _020B2BC4
.public _020B2C84
.public _020B2D88
.public _020B2E9C
.public sDayOfYear
.public _020B2ED0
.public _020B2ED4
.public _020B2FBC
@@ -16,7 +16,7 @@
.public _022BB5FC
.public _022BB604
.public _022BB60C
.public _022BB614
.public fsi_arc_rom
.public _022BB670
.public _022BB68C
.public _022BB6AC
@@ -73,7 +73,7 @@
.public MI_DmaCopy16
.public MI_StopDma
.public MIi_UncompressBackward
.public MTi_CardDmaCopy32
.public MIi_CardDmaCopy32
.public MTi_CpuClear32
.public MTi_CpuClearFast
.public MTi_CpuCopy32

2
lib/NitroSDK/asm/card_rom.s
View File

@@ -83,7 +83,7 @@ sub_02083D78: ; 0x02083D78
ldr r2, [r4, #0x20]
mov r3, #0x200
ldr r5, _02083DC4 ; =_022BBE20
bl MTi_CardDmaCopy32
bl MIi_CardDmaCopy32
ldr r1, [r4, #0x1c]
mov r0, r1, lsr #8
orr r0, r0, #0xb7000000

30
lib/NitroSDK/asm/dgt.s
View File

@@ -3,8 +3,8 @@
.text
arm_func_start Dgt_Hash2Init
Dgt_Hash2Init: ; 0x02080670
arm_func_start DGT_Hash2Reset
DGT_Hash2Reset: ; 0x02080670
ldr r1, _020806AC ; =0x67452301
ldr r2, _020806B0 ; =0xEFCDAB89
str r1, [r0]
@@ -26,10 +26,10 @@ _020806B0: .word 0xEFCDAB89
_020806B4: .word 0x98BADCFE
_020806B8: .word 0x10325476
_020806BC: .word 0xC3D2E1F0
arm_func_end Dgt_Hash2Init
arm_func_end DGT_Hash2Reset
arm_func_start Dgt_Hash2Update
Dgt_Hash2Update: ; 0x020806C0
arm_func_start DGT_Hash2SetSource
DGT_Hash2SetSource: ; 0x020806C0
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
mov sl, r0
movs r8, r2
@@ -121,10 +121,10 @@ _020807F0:
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
.align 2, 0
_02080810: .word _020B2D88
arm_func_end Dgt_Hash2Update
arm_func_end DGT_Hash2SetSource
arm_func_start Dgt_Hash2GetHash
Dgt_Hash2GetHash: ; 0x02080814
arm_func_start DGT_Hash2GetDigest
DGT_Hash2GetDigest: ; 0x02080814
stmdb sp!, {r0, r1, r2, r3}
stmdb sp!, {r4, r5, r6, lr}
ldr r0, [sp, #0x10]
@@ -260,7 +260,7 @@ _020808D4:
bx lr
.align 2, 0
_02080A0C: .word _020B2D88
arm_func_end Dgt_Hash2GetHash
arm_func_end DGT_Hash2GetDigest
arm_func_start Dgt_Hash2CalcHmac
Dgt_Hash2CalcHmac: ; 0x02080A10
@@ -280,11 +280,11 @@ Dgt_Hash2CalcHmac: ; 0x02080A10
add lr, sp, #0x38
add ip, sp, #0x24
str lr, [sp, #0x10]
ldr lr, _02080A98 ; =Dgt_Hash2Init
ldr lr, _02080A98 ; =DGT_Hash2Reset
str ip, [sp, #0x14]
ldr ip, _02080A9C ; =Dgt_Hash2Update
ldr ip, _02080A9C ; =DGT_Hash2SetSource
str lr, [sp, #0x18]
ldr lr, _02080AA0 ; =Dgt_Hash2GetHash
ldr lr, _02080AA0 ; =DGT_Hash2GetDigest
str ip, [sp, #0x1c]
ldr ip, [sp, #0xb8]
str lr, [sp, #0x20]
@@ -299,9 +299,9 @@ Dgt_Hash2CalcHmac: ; 0x02080A10
ldmia sp!, {r4, r5, r6, r7, r8, pc}
.align 2, 0
_02080A94: .word _020AEC5C
_02080A98: .word Dgt_Hash2Init
_02080A9C: .word Dgt_Hash2Update
_02080AA0: .word Dgt_Hash2GetHash
_02080A98: .word DGT_Hash2Reset
_02080A9C: .word DGT_Hash2SetSource
_02080AA0: .word DGT_Hash2GetDigest
arm_func_end Dgt_Hash2CalcHmac
arm_func_start Dgti_CalcHmac

34
lib/NitroSDK/asm/fs_overlay.s
View File

@@ -37,7 +37,7 @@ FS_ClearOverlayImage: ; 0x0207FB40
FS_GetOverlayFileID: ; 0x0207FB7C
sub sp, sp, #8
ldr r1, [r1, #0x18]
ldr r2, _0207FBA0 ; =_022BB614
ldr r2, _0207FBA0 ; =fsi_arc_rom
str r1, [sp, #4]
str r2, [r0]
str r2, [sp]
@@ -45,7 +45,7 @@ FS_GetOverlayFileID: ; 0x0207FB7C
add sp, sp, #8
bx lr
.align 2, 0
_0207FBA0: .word _022BB614
_0207FBA0: .word fsi_arc_rom
arm_func_end FS_GetOverlayFileID
arm_func_start FSi_LoadOverlayInfoCore
@@ -115,8 +115,8 @@ _0207FC3C:
ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
arm_func_end FSi_LoadOverlayInfoCore
arm_func_start GetOverlayInfo
GetOverlayInfo: ; 0x0207FC9C
arm_func_start FS_LoadOverlayInfo
FS_LoadOverlayInfo: ; 0x0207FC9C
stmdb sp!, {r3, r4, r5, lr}
sub sp, sp, #0x60
movs r4, r1
@@ -163,7 +163,7 @@ GetOverlayInfo: ; 0x0207FC9C
ldmia sp!, {r3, r4, r5, pc}
_0207FD4C:
ldr ip, _0207FD90 ; =0x027FFE50
ldr r3, _0207FD94 ; =_022BB614
ldr r3, _0207FD94 ; =fsi_arc_rom
ldr r1, [ip]
mov r0, r5
str r1, [sp]
@@ -181,11 +181,11 @@ _0207FD4C:
_0207FD88: .word _022BB604
_0207FD8C: .word _022BB60C
_0207FD90: .word 0x027FFE50
_0207FD94: .word _022BB614
arm_func_end GetOverlayInfo
_0207FD94: .word fsi_arc_rom
arm_func_end FS_LoadOverlayInfo
arm_func_start LoadOverlayInternal
LoadOverlayInternal: ; 0x0207FD98
arm_func_start FS_LoadOverlayImage
FS_LoadOverlayImage: ; 0x0207FD98
stmdb sp!, {r3, r4, r5, lr}
sub sp, sp, #0x50
mov r5, r0
@@ -223,7 +223,7 @@ _0207FE18:
mov r0, #1
add sp, sp, #0x50
ldmia sp!, {r3, r4, r5, pc}
arm_func_end LoadOverlayInternal
arm_func_end FS_LoadOverlayImage
arm_func_start FSi_CompareDigest
FSi_CompareDigest: ; 0x0207FE28
@@ -236,11 +236,11 @@ FSi_CompareDigest: ; 0x0207FE28
mov r1, #0
mov r2, #0x14
bl MI_CpuFill8
ldr r2, _0207FEB8 ; =_020B2BB8
ldr r2, _0207FEB8 ; =fsi_digest_key_len
add r1, sp, #4
ldmia r2, {r0, r2}
bl MI_CpuCopy8
ldr r3, _0207FEB8 ; =_020B2BB8
ldr r3, _0207FEB8 ; =fsi_digest_key_len
mov r1, r6
ldr ip, [r3, #4]
mov r2, r5
@@ -266,11 +266,11 @@ _0207FEA4:
add sp, sp, #0x58
ldmia sp!, {r4, r5, r6, pc}
.align 2, 0
_0207FEB8: .word _020B2BB8
_0207FEB8: .word fsi_digest_key_len
arm_func_end FSi_CompareDigest
arm_func_start InitOverlay
InitOverlay: ; 0x0207FEBC
arm_func_start FS_StartOverlay
FS_StartOverlay: ; 0x0207FEBC
stmdb sp!, {r3, r4, r5, lr}
mov r5, r0
bl FSi_GetOverlayBinarySize
@@ -338,7 +338,7 @@ _0207FFA0: .word 0x027FFC40
_0207FFA4: .word _020B3364
_0207FFA8: .word _020B3364
_0207FFAC: .word 0x66666667
arm_func_end InitOverlay
arm_func_end FS_StartOverlay
arm_func_start FS_EndOverlay
FS_EndOverlay: ; 0x0207FFB0
@@ -431,7 +431,7 @@ FS_UnloadOverlay: ; 0x020800B0
mov r2, r1
add r0, sp, #0
mov r1, r3
bl GetOverlayInfo
bl FS_LoadOverlayInfo
cmp r0, #0
beq _020800E4
add r0, sp, #0

14
lib/NitroSDK/asm/fs_rom.s
View File

@@ -108,9 +108,9 @@ FSi_InitRom: ; 0x0207F9DC
str r2, [r1, #0x10]
str r2, [r1, #0x14]
bl CARD_Init
ldr r0, _0207FB00 ; =_022BB614
ldr r0, _0207FB00 ; =fsi_arc_rom
bl FS_InitArchive
ldr r0, _0207FB00 ; =_022BB614
ldr r0, _0207FB00 ; =fsi_arc_rom
ldr r1, _0207FB04 ; =_020B2BB4
mov r2, #3
bl FS_RegisterArchiveName
@@ -124,7 +124,7 @@ FSi_InitRom: ; 0x0207F9DC
mov ip, #0
str ip, [r3, #0xc]
str r2, [r3, #0x10]
ldr r0, _0207FB00 ; =_022BB614
ldr r0, _0207FB00 ; =fsi_arc_rom
ldr r1, _0207FB0C ; =_0207F9D4
str ip, [r3, #0x14]
bl FS_SetArchiveProc
@@ -134,7 +134,7 @@ FSi_InitRom: ; 0x0207F9DC
str r1, [sp, #4]
str r0, [sp, #8]
ldr ip, _0207FB14 ; =_0207F958
ldr r0, _0207FB00 ; =_022BB614
ldr r0, _0207FB00 ; =fsi_arc_rom
mov r2, r1
mov r3, r1
str ip, [sp, #0xc]
@@ -142,7 +142,7 @@ FSi_InitRom: ; 0x0207F9DC
add sp, sp, #0x10
ldmia sp!, {r4, pc}
_0207FA94:
ldr r0, _0207FB00 ; =_022BB614
ldr r0, _0207FB00 ; =fsi_arc_rom
ldr r1, _0207FB18 ; =FSi_RomArchiveProc
ldr r2, _0207FB1C ; =0x00000602
bl FS_SetArchiveProc
@@ -163,14 +163,14 @@ _0207FA94:
str r1, [sp, #8]
str r0, [sp, #0xc]
ldr r3, [r4, #0x20c]
ldr r0, _0207FB00 ; =_022BB614
ldr r0, _0207FB00 ; =fsi_arc_rom
mov r1, #0
bl FS_LoadArchive
add sp, sp, #0x10
ldmia sp!, {r4, pc}
.align 2, 0
_0207FAFC: .word _022BB5FC
_0207FB00: .word _022BB614
_0207FB00: .word fsi_arc_rom
_0207FB04: .word _020B2BB4
_0207FB08: .word 0x027FFC40
_0207FB0C: .word FSi_EmptyArchiveProc

59
lib/NitroSDK/asm/g3_util.s
View File

@@ -1,59 +0,0 @@
.include "asm/macros.inc"
.include "include/g3x.inc"
.text
arm_func_start G3i_OrthoW_
G3i_OrthoW_: ; 0x02077C48
stmdb sp!, {r4, lr}
sub sp, sp, #0x50
ldr ip, [sp, #0x58]
ldr lr, [sp, #0x5c]
str ip, [sp]
ldr r4, [sp, #0x68]
ldr ip, [sp, #0x60]
str lr, [sp, #4]
cmp r4, #0
addeq r4, sp, #0x10
str ip, [sp, #8]
str r4, [sp, #0xc]
bl MTX_OrthoW
ldr r0, [sp, #0x64]
cmp r0, #0
addeq sp, sp, #0x50
ldmeqia sp!, {r4, pc}
ldr r1, _02077CA8 ; =0x04000440
mov r2, #0
mov r0, r4
str r2, [r1]
bl G3_LoadMtx44
add sp, sp, #0x50
ldmia sp!, {r4, pc}
.align 2, 0
_02077CA8: .word 0x04000440
arm_func_end G3i_OrthoW_
arm_func_start G3i_LookAt_
G3i_LookAt_: ; 0x02077CAC
stmdb sp!, {r3, r4, r5, lr}
sub sp, sp, #0x30
ldr r4, [sp, #0x40]
mov r5, r3
cmp r4, #0
addeq r4, sp, #0
mov r3, r4
bl MTX_LookAt
cmp r5, #0
addeq sp, sp, #0x30
ldmeqia sp!, {r3, r4, r5, pc}
ldr r1, _02077CF4 ; =0x04000440
mov r2, #2
mov r0, r4
str r2, [r1]
bl G3_LoadMtx43
add sp, sp, #0x30
ldmia sp!, {r3, r4, r5, pc}
.align 2, 0
_02077CF4: .word 0x04000440
arm_func_end G3i_LookAt_

353
lib/NitroSDK/asm/g3x.s
View File

@@ -1,353 +0,0 @@
.include "asm/macros.inc"
.include "include/g3x.inc"
.text
arm_func_start G3X_Init
G3X_Init: ; 0x020777C4
stmdb sp!, {r3, lr}
bl G3X_ClearFifo
ldr r1, _020778B0 ; =0x04000504
mov r0, #0
str r0, [r1]
_020777D8:
ldr r0, [r1, #0xfc]
tst r0, #0x8000000
bne _020777D8
ldr r0, _020778B4 ; =0x04000060
mov r2, #0
strh r2, [r0]
str r2, [r1, #0xfc]
str r2, [r0, #-0x50]
ldrh ip, [r0]
ldr r2, _020778B8 ; =0xFFFFCFFD
ldr r3, _020778BC ; =0x0000CFFB
orr ip, ip, #0x2000
strh ip, [r0]
ldrh ip, [r0]
orr ip, ip, #0x1000
strh ip, [r0]
ldrh ip, [r0]
and r2, ip, r2
strh r2, [r0]
ldrh r2, [r0]
bic r2, r2, #0x3000
orr r2, r2, #0x10
strh r2, [r0]
ldrh r2, [r0]
and r2, r2, r3
strh r2, [r0]
ldr r0, [r1, #0xfc]
orr r0, r0, #0x8000
str r0, [r1, #0xfc]
ldr r0, [r1, #0xfc]
bic r0, r0, #0xc0000000
orr r0, r0, #0x80000000
str r0, [r1, #0xfc]
bl G3X_InitMtxStack
ldr r1, _020778C0 ; =0x04000350
mov r2, #0
ldr r0, _020778C4 ; =0x00007FFF
str r2, [r1]
strh r0, [r1, #4]
strh r2, [r1, #6]
str r2, [r1, #8]
strh r2, [r1, #0xc]
sub r1, r1, #0x348
ldrh r0, [r1]
bic r0, r0, #3
strh r0, [r1]
bl G3X_InitTable
ldr r2, _020778C8 ; =0x001F0080
ldr r1, _020778CC ; =0x040004A4
mov r0, #0
str r2, [r1]
str r0, [r1, #4]
str r0, [r1, #8]
ldmia sp!, {r3, pc}
.align 2, 0
_020778B0: .word 0x04000504
_020778B4: .word 0x04000060
_020778B8: .word 0xFFFFCFFD
_020778BC: .word 0x0000CFFB
_020778C0: .word 0x04000350
_020778C4: .word 0x00007FFF
_020778C8: .word 0x001F0080
_020778CC: .word 0x040004A4
arm_func_end G3X_Init
arm_func_start G3X_Reset
G3X_Reset: ; 0x020778D0
stmdb sp!, {r3, lr}
ldr r2, _0207792C ; =0x04000600
_020778D8:
ldr r0, [r2]
tst r0, #0x8000000
bne _020778D8
ldr r0, [r2]
ldr r1, _02077930 ; =0x04000060
orr r0, r0, #0x8000
str r0, [r2]
ldrh r0, [r1]
orr r0, r0, #0x2000
strh r0, [r1]
ldrh r0, [r1]
orr r0, r0, #0x1000
strh r0, [r1]
bl G3X_ResetMtxStack
ldr r2, _02077934 ; =0x001F0080
ldr r1, _02077938 ; =0x040004A4
mov r0, #0
str r2, [r1]
str r0, [r1, #4]
str r0, [r1, #8]
ldmia sp!, {r3, pc}
.align 2, 0
_0207792C: .word 0x04000600
_02077930: .word 0x04000060
_02077934: .word 0x001F0080
_02077938: .word 0x040004A4
arm_func_end G3X_Reset
arm_func_start G3X_ClearFifo
G3X_ClearFifo: ; 0x0207793C
stmdb sp!, {r3, lr}
ldr r0, _0207795C ; =0x04000400
bl GXi_NopClearFifo128_
ldr r1, _02077960 ; =0x04000600
_0207794C:
ldr r0, [r1]
tst r0, #0x8000000
bne _0207794C
ldmia sp!, {r3, pc}
.align 2, 0
_0207795C: .word 0x04000400
_02077960: .word 0x04000600
arm_func_end G3X_ClearFifo
arm_func_start G3X_InitMtxStack
G3X_InitMtxStack: ; 0x02077964
stmdb sp!, {r4, lr}
sub sp, sp, #8
ldr r1, _020779F0 ; =0x04000600
ldr r0, [r1]
orr r0, r0, #0x8000
str r0, [r1]
add r4, sp, #4
_02077980:
mov r0, r4
bl G3X_GetMtxStackLevelPV
cmp r0, #0
bne _02077980
add r4, sp, #0
_02077994:
mov r0, r4
bl G3X_GetMtxStackLevelPJ
cmp r0, #0
bne _02077994
ldr r1, _020779F4 ; =0x04000440
mov r0, #3
str r0, [r1]
mov r0, #0
str r0, [r1, #0x14]
str r0, [r1]
ldr r0, [sp]
mov r2, #0
cmp r0, #0
strne r0, [r1, #8]
ldr r1, _020779F8 ; =0x04000454
mov r0, #2
str r2, [r1]
str r0, [r1, #-0x14]
ldr r0, [sp, #4]
str r0, [r1, #-0xc]
str r2, [r1]
add sp, sp, #8
ldmia sp!, {r4, pc}
.align 2, 0
_020779F0: .word 0x04000600
_020779F4: .word 0x04000440
_020779F8: .word 0x04000454
arm_func_end G3X_InitMtxStack
arm_func_start G3X_ResetMtxStack
G3X_ResetMtxStack: ; 0x020779FC
stmdb sp!, {r4, lr}
sub sp, sp, #8
ldr r1, _02077A84 ; =0x04000600
ldr r0, [r1]
orr r0, r0, #0x8000
str r0, [r1]
add r4, sp, #4
_02077A18:
mov r0, r4
bl G3X_GetMtxStackLevelPV
cmp r0, #0
bne _02077A18
add r4, sp, #0
_02077A2C:
mov r0, r4
bl G3X_GetMtxStackLevelPJ
cmp r0, #0
bne _02077A2C
ldr r1, _02077A88 ; =0x04000440
mov r0, #3
str r0, [r1]
mov r0, #0
str r0, [r1, #0x14]
str r0, [r1]
ldr r0, [sp]
ldr r2, _02077A88 ; =0x04000440
cmp r0, #0
strne r0, [r1, #8]
mov r0, #2
str r0, [r2]
ldr r1, [sp, #4]
mov r0, #0
str r1, [r2, #8]
str r0, [r2, #0x14]
add sp, sp, #8
ldmia sp!, {r4, pc}
.align 2, 0
_02077A84: .word 0x04000600
_02077A88: .word 0x04000440
arm_func_end G3X_ResetMtxStack
arm_func_start G3X_SetClearColor
G3X_SetClearColor: ; 0x02077A8C
ldr ip, [sp]
orr r0, r0, r1, lsl #16
orr r1, r0, r3, lsl #24
cmp ip, #0
ldr r0, _02077AB0 ; =0x04000350
orrne r1, r1, #0x8000
str r1, [r0]
strh r2, [r0, #4]
bx lr
.align 2, 0
_02077AB0: .word 0x04000350
arm_func_end G3X_SetClearColor
arm_func_start G3X_InitTable
G3X_InitTable: ; 0x02077AB4
stmdb sp!, {r3, lr}
sub sp, sp, #8
ldr r0, _02077B44 ; =GXi_DmaId
mvn r1, #0
ldr r0, [r0]
cmp r0, r1
ldr r1, _02077B48 ; =0x04000330
beq _02077B04
mov r2, #0
str r2, [sp]
mov r3, #0x10
str r2, [sp, #4]
bl MI_DmaFill32Async
ldr r0, _02077B44 ; =GXi_DmaId
ldr r1, _02077B4C ; =0x04000360
ldr r0, [r0]
mov r2, #0
mov r3, #0x60
bl MI_DmaFill32
b _02077B20
_02077B04:
mov r0, #0
mov r2, #0x10
bl MTi_CpuClear32
ldr r1, _02077B4C ; =0x04000360
mov r0, #0
mov r2, #0x60
bl MTi_CpuClear32
_02077B20:
mov r2, #0
ldr r0, _02077B50 ; =0x040004D0
mov r1, r2
_02077B2C:
add r2, r2, #1
str r1, [r0]
cmp r2, #0x20
blt _02077B2C
add sp, sp, #8
ldmia sp!, {r3, pc}
.align 2, 0
_02077B44: .word GXi_DmaId
_02077B48: .word 0x04000330
_02077B4C: .word 0x04000360
_02077B50: .word 0x040004D0
arm_func_end G3X_InitTable
arm_func_start G3X_GetMtxStackLevelPV
G3X_GetMtxStackLevelPV: ; 0x02077B54
ldr r2, _02077B80 ; =0x04000600
ldr r1, [r2]
tst r1, #0x4000
mvnne r0, #0
bxne lr
ldr r1, [r2]
and r1, r1, #0x1f00
mov r1, r1, lsr #8
str r1, [r0]
mov r0, #0
bx lr
.align 2, 0
_02077B80: .word 0x04000600
arm_func_end G3X_GetMtxStackLevelPV
arm_func_start G3X_GetMtxStackLevelPJ
G3X_GetMtxStackLevelPJ: ; 0x02077B84
ldr r2, _02077BB0 ; =0x04000600
ldr r1, [r2]
tst r1, #0x4000
mvnne r0, #0
bxne lr
ldr r1, [r2]
and r1, r1, #0x2000
mov r1, r1, lsr #0xd
str r1, [r0]
mov r0, #0
bx lr
.align 2, 0
_02077BB0: .word 0x04000600
arm_func_end G3X_GetMtxStackLevelPJ
arm_func_start GXi_NopClearFifo128_
GXi_NopClearFifo128_: ; 0x02077BB4
mov r1, #0
mov r2, #0
mov r3, #0
mov ip, #0
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
stmia r0, {r1, r2, r3, ip}
bx lr
arm_func_end GXi_NopClearFifo128_

35
lib/NitroSDK/asm/gxstate.s
View File

@@ -1,35 +0,0 @@
.include "asm/macros.inc"
.include "include/gx.inc"
.text
arm_func_start GX_InitGXState
GX_InitGXState: ; 0x0207634C
ldr r0, _020763A4 ; =gGXState
mov r2, #0
strh r2, [r0]
strh r2, [r0, #2]
strh r2, [r0, #4]
strh r2, [r0, #6]
strh r2, [r0, #8]
strh r2, [r0, #0xa]
strh r2, [r0, #0xc]
strh r2, [r0, #0xe]
strh r2, [r0, #0x10]
strh r2, [r0, #0x12]
strh r2, [r0, #0x14]
strh r2, [r0, #0x16]
ldr r1, _020763A8 ; =0x04000240
strh r2, [r0, #0x18]
str r2, [r1]
strb r2, [r1, #4]
strb r2, [r1, #5]
strb r2, [r1, #6]
strh r2, [r1, #8]
bx lr
.align 2, 0
_020763A4: .word gGXState
_020763A8: .word 0x04000240
arm_func_end GX_InitGXState

2
lib/NitroSDK/asm/include/fx_cp.inc
View File

@@ -1,2 +0,0 @@
#pragma once

99
lib/NitroSDK/asm/include/fx_vec.inc
View File

@@ -1,99 +0,0 @@
#pragma once
.public _0200002B
.public _020B2B9C
.public _022B9208
.public _022B958E
.public _022B9590
.public _022B9592
.public _022B9594
.public _022B9596
.public _022B9598
.public _022B959A
.public _022B959C
.public _022B959E
.public _022B95A0
.public _022B95A2
.public _022B95A4
.public _022B95E4
.public _022B95E8
.public _022B95EC
.public _022B9614
.public _022B9618
.public _022B961C
.public _022B9644
.public _022B9670
.public _022B967C
.public _022B973C
.public _022B98CC
.public _022B98F4
.public _022B98F8
.public _022B99BC
.public _ll_sdiv
.public _ll_udiv
.public _s32_div_f
.public _secure
.public AtomicExchange
.public CARD_Init
.public ClearIrqFlag
.public CP_SaveContext
.public CPi_RestoreContext
.public CTRDG_Init
.public DseMem_Free
.public DTCM_BSS
.public EnableIrqFiqFlags
.public EnableIrqFlag
.public FX_AtanIdxTable_
.public FX_Div
.public GetGameMode
.public GetProcessorMode
.public gGXState
.public GXi_DmaId
.public GXi_VRamLockId
.public MI_DmaCopy16
.public MI_DmaCopy32
.public MI_DmaCopy32Async
.public MI_DmaFill32
.public MI_DmaFill32Async
.public MI_Init
.public MI_WaitDma
.public MTi_CpuClear32
.public MTi_CpuCopy16
.public MTi_CpuCopy32
.public MTX_LookAt
.public MTX_OrthoW
.public OS_InitReset
.public OS_IRQTable
.public OS_VsNPrintfEx
.public OSi_ConsoleTypeCache
.public OSi_DebuggerHandler
.public OSi_DisplayExContext_Helper
.public OSi_ExContext
.public OSi_Initialized
.public OSi_InitVramExclusive
.public OSi_IsThreadInitialized
.public OSi_ThreadInfo
.public OSi_TimerReserved
.public OSi_UseAlarm
.public OSi_UseTick
.public PM_Init
.public PXI_Init
.public sClrImg
.public sDispMode
.public SDK_MAIN_ARENA_LO
.public SDK_SECTION_ARENA_DTCM_START
.public SDK_SECTION_ARENA_EX_START
.public SDK_SECTION_ARENA_ITCM_START
.public SetIrqFiqFlags
.public SetIrqFlag
.public sIsDispOn
.public sSubBGExtPltt
.public sTexPlttStartAddrTable
.public sTexStartAddrTable
.public sub_0206F808
.public sub_0206FD88
.public sub_0206FDE0
.public SVC_WaitByLoop
.public THREAD_INFO_STRUCT
.public WaitForever2
.public WaitForInterrupt

124
lib/NitroSDK/asm/include/g2.inc
View File

@@ -1,124 +0,0 @@
#pragma once
.public _0200002B
.public _020B2B9C
.public _022B9208
.public _022B958E
.public _022B9590
.public _022B9592
.public _022B9594
.public _022B9596
.public _022B9598
.public _022B959A
.public _022B959C
.public _022B959E
.public _022B95A0
.public _022B95A2
.public _022B95A4
.public _022B95E4
.public _022B95E8
.public _022B95EC
.public _022B9614
.public _022B9618
.public _022B961C
.public _022B9644
.public _022B9670
.public _022B967C
.public _022B973C
.public _022B98CC
.public _022B98F4
.public _022B98F8
.public _022B99BC
.public _ll_sdiv
.public _ll_udiv
.public _s32_div_f
.public _secure
.public AtomicExchange
.public CARD_Init
.public ClearIrqFlag
.public CP_SaveContext
.public CPi_RestoreContext
.public CTRDG_Init
.public DseMem_Free
.public DTCM_BSS
.public EnableIrqFiqFlags
.public EnableIrqFlag
.public FX_AtanIdxTable_
.public FX_Div
.public G2_GetBG0CharPtr
.public G2_GetBG1CharPtr
.public G2_GetBG1ScrPtr
.public G2_GetBG2CharPtr
.public G2_GetBG2ScrPtr
.public G2_GetBG3CharPtr
.public G2_GetBG3ScrPtr
.public G2S_GetBG0CharPtr
.public G2S_GetBG0ScrPtr
.public G2S_GetBG1CharPtr
.public G2S_GetBG1ScrPtr
.public GetGameMode
.public GetProcessorMode
.public gGXState
.public GX_HBlankIntr
.public GX_ResetBankForBGExtPltt
.public GX_ResetBankForOBJExtPltt
.public GX_ResetBankForSubBGExtPltt
.public GX_ResetBankForSubBGOBJExtPltt
.public GX_ResetBankForSubOBJExtPltt
.public GX_ResetBankForTex
.public GX_ResetBankForTexPltt
.public GX_SetBankForBGExtPltt
.public GX_SetBankForOBJExtPltt
.public GX_SetBankForSubBGExtPltt
.public GX_SetBankForSubBGOBJExtPltt
.public GX_SetBankForSubOBJExtPltt
.public GX_SetBankForTex
.public GX_SetBankForTexPltt
.public GXi_DmaId
.public GXi_VRamLockId
.public MI_DmaCopy16
.public MI_DmaCopy32
.public MI_DmaCopy32Async
.public MI_DmaFill32
.public MI_DmaFill32Async
.public MI_Init
.public MI_WaitDma
.public MTi_CpuClear32
.public MTi_CpuCopy16
.public MTi_CpuCopy32
.public MTX_LookAt
.public MTX_OrthoW
.public OS_InitReset
.public OS_IRQTable
.public OS_VsNPrintfEx
.public OSi_ConsoleTypeCache
.public OSi_DebuggerHandler
.public OSi_DisplayExContext_Helper
.public OSi_ExContext
.public OSi_Initialized
.public OSi_InitVramExclusive
.public OSi_IsThreadInitialized
.public OSi_ThreadInfo
.public OSi_TimerReserved
.public OSi_UseAlarm
.public OSi_UseTick
.public PM_Init
.public PXI_Init
.public sClrImg
.public sDispMode
.public SDK_MAIN_ARENA_LO
.public SDK_SECTION_ARENA_DTCM_START
.public SDK_SECTION_ARENA_EX_START
.public SDK_SECTION_ARENA_ITCM_START
.public SetIrqFiqFlags
.public SetIrqFlag
.public sIsDispOn
.public sSubBGExtPltt
.public sTexPlttStartAddrTable
.public sTexStartAddrTable
.public sub_0206F808
.public sub_0206FD88
.public sub_0206FDE0
.public SVC_WaitByLoop
.public THREAD_INFO_STRUCT
.public WaitForever2
.public WaitForInterrupt

3
lib/NitroSDK/asm/include/g3imm.inc
View File

@@ -1,3 +0,0 @@
#pragma once
.public GX_SendFifo48B
.public GX_SendFifo64B

10
lib/NitroSDK/asm/include/g3x.inc
View File

@@ -1,10 +0,0 @@
#pragma once
.public G3_LoadMtx43
.public G3_LoadMtx44
.public GXi_DmaId
.public GXi_VRamLockId
.public MI_DmaFill32
.public MI_DmaFill32Async
.public MTi_CpuClear32
.public MTX_LookAt
.public MTX_OrthoW

2
lib/NitroSDK/asm/include/gx.inc
View File

@@ -32,7 +32,7 @@
.public _ll_udiv
.public _s32_div_f
.public _secure
.public AtomicExchange
.public MI_SwapWord
.public CARD_Init
.public ClearIrqFlag
.public CP_SaveContext

2
lib/NitroSDK/asm/include/gx_bgcnt.inc
View File

@@ -33,7 +33,7 @@
.public _ll_udiv
.public _s32_div_f
.public _secure
.public AtomicExchange
.public MI_SwapWord
.public CARD_Init
.public ClearIrqFlag
.public CP_SaveContext

2
lib/NitroSDK/asm/include/gx_load2d.inc
View File

@@ -32,7 +32,7 @@
.public _ll_udiv
.public _s32_div_f
.public _secure
.public AtomicExchange
.public MI_SwapWord
.public CARD_Init
.public ClearIrqFlag
.public CP_SaveContext

14
lib/NitroSDK/asm/include/main_0207F894.inc
View File

@@ -2,12 +2,12 @@
.public _02000BC4
.public _020AEC5C
.public _020B2BB4
.public _020B2BB8
.public fsi_digest_key_len
.public _020B2BC0
.public _020B2BC4
.public _020B2C84
.public _020B2D88
.public _020B2E9C
.public sDayOfYear
.public _020B2ED0
.public _020B2ED4
.public _020B2FBC
@@ -16,7 +16,7 @@
.public _022BB5FC
.public _022BB604
.public _022BB60C
.public _022BB614
.public fsi_arc_rom
.public _022BB670
.public _022BB68C
.public _022BB6AC
@@ -75,9 +75,9 @@
.public DC_InvalidateRange
.public DC_StoreRange
.public DC_WaitWriteBufferEmpty
.public Dgt_Hash2GetHash
.public Dgt_Hash2Init
.public Dgt_Hash2Update
.public DGT_Hash2GetDigest
.public DGT_Hash2Reset
.public DGT_Hash2SetSource
.public EnableIrqFlag
.public fflush
.public FS_CloseFile
@@ -99,7 +99,7 @@
.public MI_DmaCopy16
.public MI_StopDma
.public MIi_UncompressBackward
.public MTi_CardDmaCopy32
.public MIi_CardDmaCopy32
.public MTi_CpuClear32
.public MTi_CpuClearFast
.public MTi_CpuCopy32

43
lib/NitroSDK/asm/include/mi_memory.inc
View File

@@ -1,43 +0,0 @@
#pragma once
.public _020AEBF8
.public _020B2BB0
.public _022B99EC
.public _022B9A44
.public _022B9A80
.public _022B9D00
.public _022BAA20
.public _022BB4E8
.public _022BB500
.public _022BB564
.public _022BB568
.public DC_FlushRange
.public DC_InvalidateRange
.public DC_StoreRange
.public EnableIrqFlag
.public FS_InitFile
.public InitDmaTransfer_Standard
.public MI_CpuCopy8
.public MI_SetWramBank
.public MI_StopDma
.public MIi_CheckAnotherAutoDma
.public MIi_CheckDma0SourceAddress
.public MIi_DmaSetParams_NoInt
.public MIi_DmaSetParams_Wait
.public OS_EnableIrqMask
.public OS_InitMutex
.public OS_IsRunOnEmulator
.public OS_LockMutex
.public OS_ResetRequestIrqMask
.public OS_SetIrqFunction
.public OS_SleepThread
.public OS_SpinWait
.public OS_UnlockMutex
.public OS_WakeupThread
.public OSi_EnterDmaCallback
.public SetIrqFlag
.public SNDi_SharedWork
.public sReserveList
.public sSndMutex
.public sub_01FF9B3C
.public VolumeTable
.public WaitForever2

100
lib/NitroSDK/asm/include/mtx.inc
View File

@@ -1,100 +0,0 @@
#pragma once
.public _0200002B
.public _020B2B9C
.public _022B9208
.public _022B958E
.public _022B9590
.public _022B9592
.public _022B9594
.public _022B9596
.public _022B9598
.public _022B959A
.public _022B959C
.public _022B959E
.public _022B95A0
.public _022B95A2
.public _022B95A4
.public _022B95E4
.public _022B95E8
.public _022B95EC
.public _022B9614
.public _022B9618
.public _022B961C
.public _022B9644
.public _022B9670
.public _022B967C
.public _022B973C
.public _022B98CC
.public _022B98F4
.public _022B98F8
.public _022B99BC
.public _ll_sdiv
.public _ll_udiv
.public _s32_div_f
.public _secure
.public AtomicExchange
.public CARD_Init
.public ClearIrqFlag
.public CP_SaveContext
.public CPi_RestoreContext
.public CTRDG_Init
.public DseMem_Free
.public DTCM_BSS
.public EnableIrqFiqFlags
.public EnableIrqFlag
.public FX_AtanIdxTable_
.public FX_GetDivResultFx64c
.public FX_InvAsync
.public GetGameMode
.public GetProcessorMode
.public gGXState
.public GXi_DmaId
.public GXi_VRamLockId
.public MI_DmaCopy16
.public MI_DmaCopy32
.public MI_DmaCopy32Async
.public MI_DmaFill32
.public MI_DmaFill32Async
.public MI_Init
.public MI_WaitDma
.public MTi_CpuClear32
.public MTi_CpuCopy16
.public MTi_CpuCopy32
.public OS_InitReset
.public OS_IRQTable
.public OS_VsNPrintfEx
.public OSi_ConsoleTypeCache
.public OSi_DebuggerHandler
.public OSi_DisplayExContext_Helper
.public OSi_ExContext
.public OSi_Initialized
.public OSi_InitVramExclusive
.public OSi_IsThreadInitialized
.public OSi_ThreadInfo
.public OSi_TimerReserved
.public OSi_UseAlarm
.public OSi_UseTick
.public PM_Init
.public PXI_Init
.public sClrImg
.public sDispMode
.public SDK_MAIN_ARENA_LO
.public SDK_SECTION_ARENA_DTCM_START
.public SDK_SECTION_ARENA_EX_START
.public SDK_SECTION_ARENA_ITCM_START
.public SetIrqFiqFlags
.public SetIrqFlag
.public sIsDispOn
.public sSubBGExtPltt
.public sTexPlttStartAddrTable
.public sTexStartAddrTable
.public sub_0206F808
.public sub_0206FD88
.public sub_0206FDE0
.public SVC_WaitByLoop
.public THREAD_INFO_STRUCT
.public VEC_CrossProduct
.public VEC_DotProduct
.public VEC_Normalize
.public WaitForever2
.public WaitForInterrupt

8
lib/NitroSDK/asm/include/nitro.inc
View File

@@ -7,8 +7,8 @@
.public _022B9D00
.public _022BAA20
.public _022BB4E8
.public _022BB500
.public _022BB564
.public sCallbackTable
.public FifoCtrlInit
.public _022BB568
.public DC_FlushRange
.public DC_InvalidateRange
@@ -16,7 +16,7 @@
.public EnableIrqFlag
.public FS_InitFile
.public FSi_TranslateCommand
.public InitDmaTransfer_Standard
.public MIi_DmaSetParams
.public MI_CpuCopy8
.public MI_SetWramBank
.public MI_StopDma
@@ -54,6 +54,6 @@
.public Sndi_UnlockMutex
.public sReserveList
.public sSndMutex
.public sub_01FF9B3C
.public MIi_DmaSetParams_wait_noInt
.public VolumeTable
.public WaitForever2

2
lib/NitroSDK/asm/include/os_arena.inc
View File

@@ -33,7 +33,7 @@
.public _ll_udiv
.public _s32_div_f
.public _secure
.public AtomicExchange
.public MI_SwapWord
.public CARD_Init
.public ClearIrqFlag
.public CP_SaveContext

2
lib/NitroSDK/asm/include/os_exception.inc
View File

@@ -33,7 +33,7 @@
.public _ll_udiv
.public _s32_div_f
.public _secure
.public AtomicExchange
.public MI_SwapWord
.public CARD_Init
.public ClearIrqFlag
.public CP_SaveContext

3
lib/NitroSDK/asm/include/os_interrupt.inc
View File

@@ -33,7 +33,7 @@
.public _ll_udiv
.public _s32_div_f
.public _secure
.public AtomicExchange
.public MI_SwapWord
.public CARD_Init
.public ClearIrqFlag
.public CP_SaveContext
@@ -88,6 +88,7 @@
.public MTi_CpuCopy32
.public MTX_LookAt
.public MTX_OrthoW
.public OS_DisableIrqMask
.public OS_InitReset
.public OS_IRQTable
.public OS_SleepThread

2
lib/NitroSDK/asm/include/os_spinlock.inc
View File

@@ -32,7 +32,7 @@
.public _ll_udiv
.public _s32_div_f
.public _secure
.public AtomicExchange
.public MI_SwapWord
.public CARD_Init
.public ClearIrqFlag
.public CP_SaveContext

2
lib/NitroSDK/asm/include/os_thread.inc
View File

@@ -33,7 +33,7 @@
.public _ll_udiv
.public _s32_div_f
.public _secure
.public AtomicExchange
.public MI_SwapWord
.public CARD_Init
.public ClearIrqFlag
.public CP_SaveContext

2
lib/NitroSDK/asm/include/os_timer.inc
View File

@@ -33,7 +33,7 @@
.public _ll_udiv
.public _s32_div_f
.public _secure
.public AtomicExchange
.public MI_SwapWord
.public CARD_Init
.public ClearIrqFlag
.public CP_SaveContext

60
lib/NitroSDK/asm/math_crc.s
View File

@@ -3,8 +3,8 @@
.text
arm_func_start Mathi_Crc8InitTable
Mathi_Crc8InitTable: ; 0x02084FB8
arm_func_start MATHi_CRC8InitTable
MATHi_CRC8InitTable: ; 0x02084FB8
stmdb sp!, {r3, lr}
mov ip, #0
mov r2, ip
@@ -23,10 +23,10 @@ _02084FCC:
cmp ip, #0x100
blo _02084FC4
ldmia sp!, {r3, pc}
arm_func_end Mathi_Crc8InitTable
arm_func_end MATHi_CRC8InitTable
arm_func_start Mathi_Crc8Update
Mathi_Crc8Update: ; 0x02084FF8
arm_func_start MATHi_CRC8Update
MATHi_CRC8Update: ; 0x02084FF8
stmdb sp!, {r4, lr}
cmp r3, #0
ldrb lr, [r1]
@@ -43,10 +43,10 @@ _0208500C:
_02085028:
strb lr, [r1]
ldmia sp!, {r4, pc}
arm_func_end Mathi_Crc8Update
arm_func_end MATHi_CRC8Update
arm_func_start Mathi_Crc16InitTable
Mathi_Crc16InitTable: ; 0x02085030
arm_func_start MATHi_CRC16InitTable
MATHi_CRC16InitTable: ; 0x02085030
stmdb sp!, {r3, lr}
mov lr, #0
mov r3, lr
@@ -66,10 +66,10 @@ _02085044:
cmp lr, #0x100
blo _0208503C
ldmia sp!, {r3, pc}
arm_func_end Mathi_Crc16InitTable
arm_func_end MATHi_CRC16InitTable
arm_func_start Mathi_Crc16Update
Mathi_Crc16Update: ; 0x02085074
arm_func_start MATHi_CRC16Update
MATHi_CRC16Update: ; 0x02085074
stmdb sp!, {r4, lr}
cmp r3, #0
ldrh lr, [r1]
@@ -88,10 +88,10 @@ _02085088:
_020850AC:
strh lr, [r1]
ldmia sp!, {r4, pc}
arm_func_end Mathi_Crc16Update
arm_func_end MATHi_CRC16Update
arm_func_start Mathi_Crc32InitTable
Mathi_Crc32InitTable: ; 0x020850B4
arm_func_start MATHi_CRC32InitTable
MATHi_CRC32InitTable: ; 0x020850B4
stmdb sp!, {r3, lr}
mov ip, #0
mov r2, ip
@@ -110,10 +110,10 @@ _020850C8:
cmp ip, #0x100
blo _020850C0
ldmia sp!, {r3, pc}
arm_func_end Mathi_Crc32InitTable
arm_func_end MATHi_CRC32InitTable
arm_func_start Mathi_Crc32Update
Mathi_Crc32Update: ; 0x020850F4
arm_func_start MATHi_CRC32Update
MATHi_CRC32Update: ; 0x020850F4
stmdb sp!, {r4, lr}
cmp r3, #0
ldr lr, [r1]
@@ -131,10 +131,10 @@ _02085108:
_02085128:
str lr, [r1]
ldmia sp!, {r4, pc}
arm_func_end Mathi_Crc32Update
arm_func_end MATHi_CRC32Update
arm_func_start Math_CalcCrc8
Math_CalcCrc8: ; 0x02085130
arm_func_start MATH_CalcCRC8
MATH_CalcCRC8: ; 0x02085130
stmdb sp!, {r3, lr}
mov lr, r1
mov ip, #0
@@ -142,13 +142,13 @@ Math_CalcCrc8: ; 0x02085130
add r1, sp, #0
mov r2, lr
strb ip, [sp]
bl Mathi_Crc8Update
bl MATHi_CRC8Update
ldrb r0, [sp]
ldmia sp!, {r3, pc}
arm_func_end Math_CalcCrc8
arm_func_end MATH_CalcCRC8
arm_func_start Math_CalcCrc16
Math_CalcCrc16: ; 0x02085158
arm_func_start MATH_CalcCRC16
MATH_CalcCRC16: ; 0x02085158
stmdb sp!, {r3, lr}
mov lr, r1
mov ip, #0
@@ -156,13 +156,13 @@ Math_CalcCrc16: ; 0x02085158
add r1, sp, #0
mov r2, lr
strh ip, [sp]
bl Mathi_Crc16Update
bl MATHi_CRC16Update
ldrh r0, [sp]
ldmia sp!, {r3, pc}
arm_func_end Math_CalcCrc16
arm_func_end MATH_CalcCRC16
arm_func_start Math_CalcCrc32
Math_CalcCrc32: ; 0x02085180
arm_func_start MATH_CalcCRC32
MATH_CalcCRC32: ; 0x02085180
stmdb sp!, {r3, lr}
mov lr, r1
mvn ip, #0
@@ -170,11 +170,11 @@ Math_CalcCrc32: ; 0x02085180
add r1, sp, #0
mov r2, lr
str ip, [sp]
bl Mathi_Crc32Update
bl MATHi_CRC32Update
ldr r0, [sp]
mvn r0, r0
ldmia sp!, {r3, pc}
arm_func_end Math_CalcCrc32
arm_func_end MATH_CalcCRC32
arm_func_start sub_020851AC
sub_020851AC: ; 0x020851AC

25
lib/NitroSDK/asm/math_dgt.s
View File

@@ -1,25 +0,0 @@
.include "asm/macros.inc"
.include "main_0207F894.inc"
.text
arm_func_start Math_CalcSha1
Math_CalcSha1: ; 0x02084F78
stmdb sp!, {r4, r5, r6, lr}
sub sp, sp, #0x68
mov r6, r0
add r0, sp, #0
mov r5, r1
mov r4, r2
bl Dgt_Hash2Init
add r0, sp, #0
mov r1, r5
mov r2, r4
bl Dgt_Hash2Update
add r0, sp, #0
mov r1, r6
bl Dgt_Hash2GetHash
add sp, sp, #0x68
ldmia sp!, {r4, r5, r6, pc}
arm_func_end Math_CalcSha1

497
lib/NitroSDK/asm/mi_dma.s
View File

@@ -1,497 +0,0 @@
.include "asm/macros.inc"
.include "include/mi_memory.inc"
.text
arm_func_start MI_DmaFill32
MI_DmaFill32: ; 0x0207BC4C
stmdb sp!, {r4, r5, r6, r7, r8, lr}
movs r4, r3
mov r8, r0
mov r7, r1
mov r6, r2
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
add r0, r8, r8, lsl #1
add r0, r0, #2
mov r0, r0, lsl #2
add r0, r0, #0xb0
add r5, r0, #0x4000000
_0207BC78:
ldr r0, [r5]
tst r0, #0x80000000
bne _0207BC78
bl EnableIrqFlag
mov r2, r8, lsl #2
add r1, r2, #0xe0
mov r3, r4, lsr #2
mov r4, r0
add ip, r2, #0x4000000
mov r0, r8
mov r2, r7
add r1, r1, #0x4000000
orr r3, r3, #0x85000000
str r6, [ip, #0xe0]
bl sub_01FF9B3C
mov r0, r4
bl SetIrqFlag
_0207BCBC:
ldr r0, [r5]
tst r0, #0x80000000
bne _0207BCBC
ldmia sp!, {r4, r5, r6, r7, r8, pc}
arm_func_end MI_DmaFill32
arm_func_start MI_DmaCopy32
MI_DmaCopy32: ; 0x0207BCCC
stmdb sp!, {r4, r5, r6, r7, r8, lr}
mov r5, r3
mov r6, r2
mov r2, r5
mov r3, #0
mov r8, r0
mov r7, r1
bl MIi_CheckDma0SourceAddress
cmp r5, #0
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
add r0, r8, r8, lsl #1
add r0, r0, #2
mov r0, r0, lsl #2
add r0, r0, #0xb0
add r4, r0, #0x4000000
_0207BD08:
ldr r0, [r4]
tst r0, #0x80000000
bne _0207BD08
mov r3, r5, lsr #2
mov r0, r8
mov r1, r7
mov r2, r6
orr r3, r3, #0x84000000
bl MIi_DmaSetParams_Wait
_0207BD2C:
ldr r0, [r4]
tst r0, #0x80000000
bne _0207BD2C
ldmia sp!, {r4, r5, r6, r7, r8, pc}
arm_func_end MI_DmaCopy32
arm_func_start MI_DmaCopy16
MI_DmaCopy16: ; 0x0207BD3C
stmdb sp!, {r4, r5, r6, r7, r8, lr}
movs r5, r3
mov r8, r0
mov r7, r1
mov r6, r2
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
mov r2, r5
mov r3, #0
bl MIi_CheckDma0SourceAddress
add r0, r8, r8, lsl #1
add r0, r0, #2
mov r0, r0, lsl #2
add r0, r0, #0xb0
add r4, r0, #0x4000000
_0207BD74:
ldr r0, [r4]
tst r0, #0x80000000
bne _0207BD74
mov r3, r5, lsr #1
mov r0, r8
mov r1, r7
mov r2, r6
orr r3, r3, #0x80000000
bl MIi_DmaSetParams_Wait
_0207BD98:
ldr r0, [r4]
tst r0, #0x80000000
bne _0207BD98
ldmia sp!, {r4, r5, r6, r7, r8, pc}
arm_func_end MI_DmaCopy16
arm_func_start MI_DmaFill32Async
MI_DmaFill32Async: ; 0x0207BDA8
stmdb sp!, {r4, r5, r6, r7, r8, lr}
movs r4, r3
mov r7, r0
mov r6, r1
mov r5, r2
ldr r8, [sp, #0x18]
bne _0207BDD8
cmp r8, #0
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
ldr r0, [sp, #0x1c]
blx r8
ldmia sp!, {r4, r5, r6, r7, r8, pc}
_0207BDD8:
bl MI_WaitDma
cmp r8, #0
beq _0207BE30
ldr r2, [sp, #0x1c]
mov r0, r7
mov r1, r8
bl OSi_EnterDmaCallback
bl EnableIrqFlag
mov r3, r4, lsr #2
mov r2, r7, lsl #2
add r1, r2, #0xe0
add r2, r2, #0x4000000
str r5, [r2, #0xe0]
mov r4, r0
mov r0, r7
mov r2, r6
add r1, r1, #0x4000000
orr r3, r3, #0xc5000000
bl MIi_DmaSetParams_NoInt
mov r0, r4
bl SetIrqFlag
ldmia sp!, {r4, r5, r6, r7, r8, pc}
_0207BE30:
bl EnableIrqFlag
mov r2, r7, lsl #2
add r1, r2, #0xe0
mov r3, r4, lsr #2
mov r4, r0
add ip, r2, #0x4000000
mov r0, r7
mov r2, r6
add r1, r1, #0x4000000
orr r3, r3, #0x85000000
str r5, [ip, #0xe0]
bl MIi_DmaSetParams_NoInt
mov r0, r4
bl SetIrqFlag
ldmia sp!, {r4, r5, r6, r7, r8, pc}
arm_func_end MI_DmaFill32Async
arm_func_start MI_DmaCopy32Async
MI_DmaCopy32Async: ; 0x0207BE6C
stmdb sp!, {r4, r5, r6, r7, r8, lr}
mov r5, r3
mov r6, r2
mov r2, r5
mov r3, #0
mov r8, r0
mov r7, r1
ldr r4, [sp, #0x18]
bl MIi_CheckDma0SourceAddress
cmp r5, #0
bne _0207BEAC
cmp r4, #0
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
ldr r0, [sp, #0x1c]
blx r4
ldmia sp!, {r4, r5, r6, r7, r8, pc}
_0207BEAC:
mov r0, r8
bl MI_WaitDma
cmp r4, #0
beq _0207BEE8
ldr r2, [sp, #0x1c]
mov r0, r8
mov r1, r4
bl OSi_EnterDmaCallback
mov r3, r5, lsr #2
mov r0, r8
mov r1, r7
mov r2, r6
orr r3, r3, #0xc4000000
bl InitDmaTransfer_Standard
ldmia sp!, {r4, r5, r6, r7, r8, pc}
_0207BEE8:
mov r3, r5, lsr #2
mov r0, r8
mov r1, r7
mov r2, r6
orr r3, r3, #0x84000000
bl InitDmaTransfer_Standard
ldmia sp!, {r4, r5, r6, r7, r8, pc}
arm_func_end MI_DmaCopy32Async
arm_func_start MI_DmaSend32Async
MI_DmaSend32Async: ; 0x0207BF04
stmdb sp!, {r4, r5, r6, r7, r8, lr}
mov r5, r3
mov r6, r2
mov r2, r5
mov r3, #0
mov r8, r0
mov r7, r1
ldr r4, [sp, #0x18]
bl MIi_CheckDma0SourceAddress
cmp r5, #0
bne _0207BF44
cmp r4, #0
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
ldr r0, [sp, #0x1c]
blx r4
ldmia sp!, {r4, r5, r6, r7, r8, pc}
_0207BF44:
mov r0, r8
bl MI_WaitDma
cmp r4, #0
beq _0207BF84
ldr r2, [sp, #0x1c]
mov r0, r8
mov r1, r4
bl OSi_EnterDmaCallback
mov r3, #0x3bc00000
rsb r3, r3, #0
mov r0, r8
mov r1, r7
mov r2, r6
orr r3, r3, r5, lsr #2
bl InitDmaTransfer_Standard
ldmia sp!, {r4, r5, r6, r7, r8, pc}
_0207BF84:
ldr r3, _0207BFA0 ; =0x84400000
mov r0, r8
mov r1, r7
mov r2, r6
orr r3, r3, r5, lsr #2
bl InitDmaTransfer_Standard
ldmia sp!, {r4, r5, r6, r7, r8, pc}
.align 2, 0
_0207BFA0: .word 0x84400000
arm_func_end MI_DmaSend32Async
arm_func_start MI_DmaCopy16Async
MI_DmaCopy16Async: ; 0x0207BFA4
stmdb sp!, {r4, r5, r6, r7, r8, lr}
mov r5, r3
mov r6, r2
mov r2, r5
mov r3, #0
mov r8, r0
mov r7, r1
ldr r4, [sp, #0x18]
bl MIi_CheckDma0SourceAddress
cmp r5, #0
bne _0207BFE4
cmp r4, #0
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
ldr r0, [sp, #0x1c]
blx r4
ldmia sp!, {r4, r5, r6, r7, r8, pc}
_0207BFE4:
mov r0, r8
bl MI_WaitDma
cmp r4, #0
beq _0207C020
ldr r2, [sp, #0x1c]
mov r0, r8
mov r1, r4
bl OSi_EnterDmaCallback
mov r3, r5, lsr #1
mov r0, r8
mov r1, r7
mov r2, r6
orr r3, r3, #0xc0000000
bl InitDmaTransfer_Standard
ldmia sp!, {r4, r5, r6, r7, r8, pc}
_0207C020:
mov r3, r5, lsr #1
mov r0, r8
mov r1, r7
mov r2, r6
orr r3, r3, #0x80000000
bl InitDmaTransfer_Standard
ldmia sp!, {r4, r5, r6, r7, r8, pc}
arm_func_end MI_DmaCopy16Async
arm_func_start MI_DmaSend16Async
MI_DmaSend16Async: ; 0x0207C03C
stmdb sp!, {r4, r5, r6, r7, r8, lr}
mov r5, r3
mov r6, r2
mov r2, r5
mov r3, #0
mov r8, r0
mov r7, r1
ldr r4, [sp, #0x18]
bl MIi_CheckDma0SourceAddress
cmp r5, #0
bne _0207C07C
cmp r4, #0
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
ldr r0, [sp, #0x1c]
blx r4
ldmia sp!, {r4, r5, r6, r7, r8, pc}
_0207C07C:
mov r0, r8
bl MI_WaitDma
cmp r4, #0
beq _0207C0BC
ldr r2, [sp, #0x1c]
mov r0, r8
mov r1, r4
bl OSi_EnterDmaCallback
mov r3, #0x3fc00000
rsb r3, r3, #0
mov r0, r8
mov r1, r7
mov r2, r6
orr r3, r3, r5, lsr #1
bl InitDmaTransfer_Standard
ldmia sp!, {r4, r5, r6, r7, r8, pc}
_0207C0BC:
ldr r3, _0207C0D8 ; =0x80400000
mov r0, r8
mov r1, r7
mov r2, r6
orr r3, r3, r5, lsr #1
bl InitDmaTransfer_Standard
ldmia sp!, {r4, r5, r6, r7, r8, pc}
.align 2, 0
_0207C0D8: .word 0x80400000
arm_func_end MI_DmaSend16Async
arm_func_start MI_IsDmaBusy
MI_IsDmaBusy: ; 0x0207C0DC
add r0, r0, r0, lsl #1
add r0, r0, #2
mov r0, r0, lsl #2
add r0, r0, #0x4000000
ldr r0, [r0, #0xb0]
and r0, r0, #0x80000000
mov r0, r0, lsr #0x1f
bx lr
arm_func_end MI_IsDmaBusy
arm_func_start MI_WaitDma
MI_WaitDma: ; 0x0207C0FC
stmdb sp!, {r4, lr}
mov r4, r0
bl EnableIrqFlag
add r1, r4, r4, lsl #1
add r1, r1, #2
mov r1, r1, lsl #2
add r1, r1, #0xb0
add r2, r1, #0x4000000
_0207C11C:
ldr r1, [r2]
tst r1, #0x80000000
bne _0207C11C
cmp r4, #0
bne _0207C158
mov r1, #0xc
mul r2, r4, r1
add r1, r2, #0xb0
add r2, r2, #0x4000000
mov r3, #0
str r3, [r2, #0xb0]
add r2, r1, #0x4000000
ldr r1, _0207C160 ; =0x81400001
str r3, [r2, #4]
str r1, [r2, #8]
_0207C158:
bl SetIrqFlag
ldmia sp!, {r4, pc}
.align 2, 0
_0207C160: .word 0x81400001
arm_func_end MI_WaitDma
arm_func_start MI_StopDma
MI_StopDma: ; 0x0207C164
stmdb sp!, {r4, lr}
mov r4, r0
bl EnableIrqFlag
mov r1, #6
mul r1, r4, r1
add r1, r1, #5
mov r1, r1, lsl #1
add r1, r1, #0x4000000
ldrh r2, [r1, #0xb0]
cmp r4, #0
bic r2, r2, #0x3a00
strh r2, [r1, #0xb0]
ldrh r2, [r1, #0xb0]
bic r2, r2, #0x8000
strh r2, [r1, #0xb0]
ldrh r2, [r1, #0xb0]
ldrh r1, [r1, #0xb0]
bne _0207C1D4
mov r1, #0xc
mul r2, r4, r1
add r1, r2, #0xb0
add r2, r2, #0x4000000
mov r3, #0
str r3, [r2, #0xb0]
add r2, r1, #0x4000000
ldr r1, _0207C1DC ; =0x81400001
str r3, [r2, #4]
str r1, [r2, #8]
_0207C1D4:
bl SetIrqFlag
ldmia sp!, {r4, pc}
.align 2, 0
_0207C1DC: .word 0x81400001
arm_func_end MI_StopDma
arm_func_start MIi_CheckAnotherAutoDma
MIi_CheckAnotherAutoDma: ; 0x0207C1E0
stmdb sp!, {r3, r4, r5, r6, r7, lr}
ldr r5, _0207C260 ; =0x040000B8
mov r7, r0
mov r6, r1
mov r4, #0
_0207C1F4:
cmp r4, r7
beq _0207C24C
ldr r0, [r5]
tst r0, #0x80000000
andne r0, r0, #0x38000000
cmpne r0, r6
beq _0207C24C
cmp r0, #0x8000000
cmpeq r6, #0x10000000
beq _0207C24C
cmp r0, #0x10000000
cmpeq r6, #0x8000000
beq _0207C24C
cmp r0, #0x18000000
cmpne r0, #0x20000000
cmpne r0, #0x28000000
cmpne r0, #0x30000000
cmpne r0, #0x38000000
cmpne r0, #0x8000000
cmpne r0, #0x10000000
bne _0207C24C
bl WaitForever2
_0207C24C:
add r4, r4, #1
cmp r4, #3
add r5, r5, #0xc
blt _0207C1F4
ldmia sp!, {r3, r4, r5, r6, r7, pc}
.align 2, 0
_0207C260: .word 0x040000B8
arm_func_end MIi_CheckAnotherAutoDma
arm_func_start MIi_CheckDma0SourceAddress
MIi_CheckDma0SourceAddress: ; 0x0207C264
stmdb sp!, {r3, lr}
cmp r0, #0
ldmneia sp!, {r3, pc}
cmp r3, #0
and ip, r1, #0xff000000
beq _0207C288
cmp r3, #0x800000
subeq r1, r1, r2
b _0207C28C
_0207C288:
add r1, r1, r2
_0207C28C:
cmp ip, #0x4000000
and r0, r1, #0xff000000
beq _0207C2B0
cmp ip, #0x8000000
bhs _0207C2B0
cmp r0, #0x4000000
beq _0207C2B0
cmp r0, #0x8000000
ldmloia sp!, {r3, pc}
_0207C2B0:
bl WaitForever2
ldmia sp!, {r3, pc}
arm_func_end MIi_CheckDma0SourceAddress

43
lib/NitroSDK/asm/mi_dma_card.s
View File

@@ -1,43 +0,0 @@
.include "asm/macros.inc"
.text
.public MIi_CheckAnotherAutoDma
.public MIi_CheckDma0SourceAddress
.public InitDmaTransfer_Standard
arm_func_start MTi_CardDmaCopy32 ;
MTi_CardDmaCopy32: ; 0x0207C750
stmdb sp!, {r3, r4, r5, r6, r7, lr}
mov r5, r1
mov r6, r0
mov r7, r3
mvn r1, #0
mov r4, r2
bl MIi_CheckAnotherAutoDma
mov r0, r6
mov r1, r5
mov r2, r7
mov r3, #0x1000000
bl MIi_CheckDma0SourceAddress
cmp r7, #0
ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
add r0, r6, r6, lsl #1
add r0, r0, #2
mov r0, r0, lsl #2
add r0, r0, #0xb0
add r1, r0, #0x4000000
_0207C79C:
ldr r0, [r1]
tst r0, #0x80000000
bne _0207C79C
ldr r3, _0207C7C0 ; =0xAF000001
mov r0, r6
mov r1, r5
mov r2, r4
bl InitDmaTransfer_Standard
ldmia sp!, {r3, r4, r5, r6, r7, pc}
.align 2, 0
_0207C7C0: .word 0xAF000001
arm_func_end MTi_CardDmaCopy32

11
lib/NitroSDK/asm/mi_memory_1.s
View File

@@ -1,11 +0,0 @@
.include "asm/macros.inc"
.include "include/mi_memory.inc"
.text
arm_func_start AtomicExchange
AtomicExchange: ; 0x0207C648
.word 0xE1010090
bx lr
arm_func_end AtomicExchange

153
lib/NitroSDK/asm/os_interrupt.s
View File

@@ -3,159 +3,6 @@
.text
arm_func_start OS_WaitIrq
OS_WaitIrq: ; 0x02078900
stmdb sp!, {r4, r5, r6, lr}
mov r5, r0
mov r4, r1
bl EnableIrqFlag
cmp r5, #0
beq _02078930
ldr r1, _0207896C ; =OS_IRQTable
mvn r2, r4
add r1, r1, #0x3000
ldr r3, [r1, #0xff8]
and r2, r3, r2
str r2, [r1, #0xff8]
_02078930:
bl SetIrqFlag
ldr r1, _0207896C ; =OS_IRQTable
add r0, r1, #0x3000
ldr r0, [r0, #0xff8]
tst r4, r0
ldmneia sp!, {r4, r5, r6, pc}
add r0, r1, #0x3f8
ldr r5, _02078970 ; =DTCM_BSS
add r6, r0, #0x3c00
_02078954:
mov r0, r5
bl OS_SleepThread
ldr r0, [r6]
tst r4, r0
beq _02078954
ldmia sp!, {r4, r5, r6, pc}
.align 2, 0
_0207896C: .word OS_IRQTable
_02078970: .word DTCM_BSS
arm_func_end OS_WaitIrq
arm_func_start OS_IrqDummy
OS_IrqDummy: ; 0x02078974
bx lr
arm_func_end OS_IrqDummy
arm_func_start OSi_IrqCallback
OSi_IrqCallback: ; 0x02078978
stmdb sp!, {r3, r4, r5, lr}
mov r1, #0xc
mul r5, r0, r1
ldr r2, _020789EC ; =_022B95E4
ldr r3, _020789F0 ; =_020B2B9C
mov r4, r0, lsl #1
ldr r1, [r2, r5]
mov r0, #0
ldrh r3, [r3, r4]
mov r4, #1
str r0, [r2, r5]
cmp r1, #0
mov r4, r4, lsl r3
beq _020789BC
ldr r0, _020789F4 ; =_022B95EC
ldr r0, [r0, r5]
blx r1
_020789BC:
ldr r0, _020789F8 ; =OS_IRQTable
ldr r1, _020789FC ; =_022B95E8
add r0, r0, #0x3000
ldr r2, [r0, #0xff8]
ldr r1, [r1, r5]
orr r2, r2, r4
str r2, [r0, #0xff8]
cmp r1, #0
ldmneia sp!, {r3, r4, r5, pc}
mov r0, r4
bl OS_DisableIrqMask
ldmia sp!, {r3, r4, r5, pc}
.align 2, 0
_020789EC: .word _022B95E4
_020789F0: .word _020B2B9C
_020789F4: .word _022B95EC
_020789F8: .word OS_IRQTable
_020789FC: .word _022B95E8
arm_func_end OSi_IrqCallback
arm_func_start OSi_IrqDma0
OSi_IrqDma0: ; 0x02078A00
ldr ip, _02078A0C ; =OSi_IrqCallback
mov r0, #0
bx ip
.align 2, 0
_02078A0C: .word OSi_IrqCallback
arm_func_end OSi_IrqDma0
arm_func_start OSi_IrqDma1
OSi_IrqDma1: ; 0x02078A10
ldr ip, _02078A1C ; =OSi_IrqCallback
mov r0, #1
bx ip
.align 2, 0
_02078A1C: .word OSi_IrqCallback
arm_func_end OSi_IrqDma1
arm_func_start OSi_IrqDma2
OSi_IrqDma2: ; 0x02078A20
ldr ip, _02078A2C ; =OSi_IrqCallback
mov r0, #2
bx ip
.align 2, 0
_02078A2C: .word OSi_IrqCallback
arm_func_end OSi_IrqDma2
arm_func_start OSi_IrqDma3
OSi_IrqDma3: ; 0x02078A30
ldr ip, _02078A3C ; =OSi_IrqCallback
mov r0, #3
bx ip
.align 2, 0
_02078A3C: .word OSi_IrqCallback
arm_func_end OSi_IrqDma3
arm_func_start OSi_IrqTimer0
OSi_IrqTimer0: ; 0x02078A40
ldr ip, _02078A4C ; =OSi_IrqCallback
mov r0, #4
bx ip
.align 2, 0
_02078A4C: .word OSi_IrqCallback
arm_func_end OSi_IrqTimer0
arm_func_start OSi_IrqTimer1
OSi_IrqTimer1: ; 0x02078A50
ldr ip, _02078A5C ; =OSi_IrqCallback
mov r0, #5
bx ip
.align 2, 0
_02078A5C: .word OSi_IrqCallback
arm_func_end OSi_IrqTimer1
arm_func_start OSi_IrqTimer2
OSi_IrqTimer2: ; 0x02078A60
ldr ip, _02078A6C ; =OSi_IrqCallback
mov r0, #6
bx ip
.align 2, 0
_02078A6C: .word OSi_IrqCallback
arm_func_end OSi_IrqTimer2
arm_func_start OSi_IrqTimer3
OSi_IrqTimer3: ; 0x02078A70
ldr ip, _02078A7C ; =OSi_IrqCallback
mov r0, #7
bx ip
.align 2, 0
_02078A7C: .word OSi_IrqCallback
arm_func_end OSi_IrqTimer3
arm_func_start OS_InitIrqTable
OS_InitIrqTable: ; 0x02078A80
ldr r0, _02078A94 ; =DTCM_BSS

41
lib/NitroSDK/asm/os_irqHandler.s Normal file
View File

@@ -0,0 +1,41 @@
.include "asm/macros.inc"
.include "include/os_interrupt.inc"
.text
arm_func_start OS_WaitIrq
OS_WaitIrq: ; 0x02078900
stmdb sp!, {r4, r5, r6, lr}
mov r5, r0
mov r4, r1
bl EnableIrqFlag
cmp r5, #0
beq _02078930
ldr r1, _0207896C ; =OS_IRQTable
mvn r2, r4
add r1, r1, #0x3000
ldr r3, [r1, #0xff8]
and r2, r3, r2
str r2, [r1, #0xff8]
_02078930:
bl SetIrqFlag
ldr r1, _0207896C ; =OS_IRQTable
add r0, r1, #0x3000
ldr r0, [r0, #0xff8]
tst r4, r0
ldmneia sp!, {r4, r5, r6, pc}
add r0, r1, #0x3f8
ldr r5, _02078970 ; =DTCM_BSS
add r6, r0, #0x3c00
_02078954:
mov r0, r5
bl OS_SleepThread
ldr r0, [r6]
tst r4, r0
beq _02078954
ldmia sp!, {r4, r5, r6, pc}
.align 2, 0
_0207896C: .word OS_IRQTable
_02078970: .word DTCM_BSS
arm_func_end OS_WaitIrq

122
lib/NitroSDK/asm/os_irqTable.s Normal file
View File

@@ -0,0 +1,122 @@
.include "asm/macros.inc"
.include "include/os_interrupt.inc"
.text
arm_func_start OS_IrqDummy
OS_IrqDummy: ; 0x02078974
bx lr
arm_func_end OS_IrqDummy
arm_func_start OSi_IrqCallback
OSi_IrqCallback: ; 0x02078978
stmdb sp!, {r3, r4, r5, lr}
mov r1, #0xc
mul r5, r0, r1
ldr r2, _020789EC ; =_022B95E4
ldr r3, _020789F0 ; =_020B2B9C
mov r4, r0, lsl #1
ldr r1, [r2, r5]
mov r0, #0
ldrh r3, [r3, r4]
mov r4, #1
str r0, [r2, r5]
cmp r1, #0
mov r4, r4, lsl r3
beq _020789BC
ldr r0, _020789F4 ; =_022B95EC
ldr r0, [r0, r5]
blx r1
_020789BC:
ldr r0, _020789F8 ; =OS_IRQTable
ldr r1, _020789FC ; =_022B95E8
add r0, r0, #0x3000
ldr r2, [r0, #0xff8]
ldr r1, [r1, r5]
orr r2, r2, r4
str r2, [r0, #0xff8]
cmp r1, #0
ldmneia sp!, {r3, r4, r5, pc}
mov r0, r4
bl OS_DisableIrqMask
ldmia sp!, {r3, r4, r5, pc}
.align 2, 0
_020789EC: .word _022B95E4
_020789F0: .word _020B2B9C
_020789F4: .word _022B95EC
_020789F8: .word OS_IRQTable
_020789FC: .word _022B95E8
arm_func_end OSi_IrqCallback
arm_func_start OSi_IrqDma0
OSi_IrqDma0: ; 0x02078A00
ldr ip, _02078A0C ; =OSi_IrqCallback
mov r0, #0
bx ip
.align 2, 0
_02078A0C: .word OSi_IrqCallback
arm_func_end OSi_IrqDma0
arm_func_start OSi_IrqDma1
OSi_IrqDma1: ; 0x02078A10
ldr ip, _02078A1C ; =OSi_IrqCallback
mov r0, #1
bx ip
.align 2, 0
_02078A1C: .word OSi_IrqCallback
arm_func_end OSi_IrqDma1
arm_func_start OSi_IrqDma2
OSi_IrqDma2: ; 0x02078A20
ldr ip, _02078A2C ; =OSi_IrqCallback
mov r0, #2
bx ip
.align 2, 0
_02078A2C: .word OSi_IrqCallback
arm_func_end OSi_IrqDma2
arm_func_start OSi_IrqDma3
OSi_IrqDma3: ; 0x02078A30
ldr ip, _02078A3C ; =OSi_IrqCallback
mov r0, #3
bx ip
.align 2, 0
_02078A3C: .word OSi_IrqCallback
arm_func_end OSi_IrqDma3
arm_func_start OSi_IrqTimer0
OSi_IrqTimer0: ; 0x02078A40
ldr ip, _02078A4C ; =OSi_IrqCallback
mov r0, #4
bx ip
.align 2, 0
_02078A4C: .word OSi_IrqCallback
arm_func_end OSi_IrqTimer0
arm_func_start OSi_IrqTimer1
OSi_IrqTimer1: ; 0x02078A50
ldr ip, _02078A5C ; =OSi_IrqCallback
mov r0, #5
bx ip
.align 2, 0
_02078A5C: .word OSi_IrqCallback
arm_func_end OSi_IrqTimer1
arm_func_start OSi_IrqTimer2
OSi_IrqTimer2: ; 0x02078A60
ldr ip, _02078A6C ; =OSi_IrqCallback
mov r0, #6
bx ip
.align 2, 0
_02078A6C: .word OSi_IrqCallback
arm_func_end OSi_IrqTimer2
arm_func_start OSi_IrqTimer3
OSi_IrqTimer3: ; 0x02078A70
ldr ip, _02078A7C ; =OSi_IrqCallback
mov r0, #7
bx ip
.align 2, 0
_02078A7C: .word OSi_IrqCallback
arm_func_end OSi_IrqTimer3

2
lib/NitroSDK/asm/os_spinlock.s
View File

@@ -157,7 +157,7 @@ _02078EF8:
mov r5, r0
mov r0, sb
mov r1, r8
bl AtomicExchange
bl MI_SwapWord
movs r4, r0
bne _02078F20
cmp r7, #0

4
lib/NitroSDK/asm/pxi_fifo.s
View File

@@ -7,7 +7,7 @@
PXI_InitFifo: ; 0x0207D9B0
stmdb sp!, {r3, r4, r5, lr}
bl EnableIrqFlag
ldr r1, _0207DA94 ; =_022BB564
ldr r1, _0207DA94 ; =FifoCtrlInit
mov r4, r0
ldrh r0, [r1]
cmp r0, #0
@@ -69,7 +69,7 @@ _0207DA88:
bl SetIrqFlag
ldmia sp!, {r3, r4, r5, pc}
.align 2, 0
_0207DA94: .word _022BB564
_0207DA94: .word FifoCtrlInit
_0207DA98: .word 0x027FFC00
_0207DA9C: .word _022BB568
_0207DAA0: .word 0x0000C408

4
lib/NitroSDK/asm/rtc_convert.s
View File

@@ -29,7 +29,7 @@ _02082F80:
mvn r0, #0
bx lr
_02082F88:
ldr r0, _02082FBC ; =_020B2E9C
ldr r0, _02082FBC ; =sDayOfYear
sub r1, r1, #1
ldr r0, [r0, r2, lsl #2]
cmp r2, #3
@@ -44,7 +44,7 @@ _02082FA8:
add r0, r0, r1, lsr #2
bx lr
.align 2, 0
_02082FBC: .word _020B2E9C
_02082FBC: .word sDayOfYear
_02082FC0: .word 0x0000016D
arm_func_end Rtc_ConvertDateToDay

75
lib/NitroSDK/asm/snd_alarm.s
View File

@@ -1,75 +0,0 @@
.include "asm/macros.inc"
.include "include/nitro.inc"
.text
arm_func_start Snd_AlarmInit
Snd_AlarmInit: ; 0x0207D380
mov r1, #0
ldr r2, _0207D3AC ; =_022BB500
mov r0, r1
_0207D38C:
str r0, [r2]
str r0, [r2, #4]
add r1, r1, #1
strb r0, [r2, #8]
cmp r1, #8
add r2, r2, #0xc
blt _0207D38C
bx lr
.align 2, 0
_0207D3AC: .word _022BB500
arm_func_end Snd_AlarmInit
arm_func_start Sndi_IncAlarmId
Sndi_IncAlarmId: ; 0x0207D3B0
ldr r2, _0207D3CC ; =_022BB500
mov r1, #0xc
mla r1, r0, r1, r2
ldrb r0, [r1, #8]
add r0, r0, #1
strb r0, [r1, #8]
bx lr
.align 2, 0
_0207D3CC: .word _022BB500
arm_func_end Sndi_IncAlarmId
arm_func_start Sndi_SetAlarmHandler
Sndi_SetAlarmHandler: ; 0x0207D3D0
mov r3, #0xc
mul r3, r0, r3
ldr r0, _0207D3FC ; =_022BB500
str r1, [r0, r3]
add r1, r0, r3
str r2, [r1, #4]
ldrb r0, [r1, #8]
add r0, r0, #1
strb r0, [r1, #8]
and r0, r0, #0xff
bx lr
.align 2, 0
_0207D3FC: .word _022BB500
arm_func_end Sndi_SetAlarmHandler
arm_func_start Sndi_CallAlarmHandler
Sndi_CallAlarmHandler: ; 0x0207D400
stmdb sp!, {r3, lr}
ldr r3, _0207D440 ; =_022BB500
and r2, r0, #0xff
mov r1, #0xc
mla r3, r2, r1, r3
mov r1, r0, asr #8
ldrb r0, [r3, #8]
and r1, r1, #0xff
cmp r1, r0
ldmneia sp!, {r3, pc}
ldr r1, [r3]
cmp r1, #0
ldmeqia sp!, {r3, pc}
ldr r0, [r3, #4]
blx r1
ldmia sp!, {r3, pc}
.align 2, 0
_0207D440: .word _022BB500
arm_func_end Sndi_CallAlarmHandler

100
lib/NitroSDK/asm/std_string.s
View File

@@ -3,106 +3,6 @@
.text
arm_func_start Std_CopyLString
Std_CopyLString: ; 0x02085244
stmdb sp!, {r4, lr}
sub ip, r2, #1
mov r4, r1
cmp ip, #0
mov lr, #0
ble _02085280
_0208525C:
ldrsb r3, [r4]
strb r3, [r0, lr]
ldrsb r3, [r4]
cmp r3, #0
beq _02085280
add lr, lr, #1
cmp lr, ip
add r4, r4, #1
blt _0208525C
_02085280:
sub r3, r2, #1
cmp lr, r3
blt _02085298
cmp r2, #0
movne r2, #0
strneb r2, [r0, lr]
_02085298:
mov r0, r1
bl Std_GetStringLength
ldmia sp!, {r4, pc}
arm_func_end Std_CopyLString
arm_func_start Std_GetStringLength
Std_GetStringLength: ; 0x020852A4
ldrsb r1, [r0]
mov r2, #0
cmp r1, #0
beq _020852C4
_020852B4:
add r2, r2, #1
ldrsb r1, [r0, r2]
cmp r1, #0
bne _020852B4
_020852C4:
mov r0, r2
bx lr
arm_func_end Std_GetStringLength
arm_func_start Std_CompareString__020852CC
Std_CompareString__020852CC: ; 0x020852CC
b _020852D8
_020852D0:
add r0, r0, #1
add r1, r1, #1
_020852D8:
ldrsb r3, [r1]
ldrsb r2, [r0]
cmp r2, r3
bne _020852F0
cmp r2, #0
bne _020852D0
_020852F0:
sub r0, r2, r3
bx lr
arm_func_end Std_CompareString__020852CC
arm_func_start Std_CompareNString
Std_CompareNString: ; 0x020852F8
stmdb sp!, {r3, lr}
cmp r2, #0
beq _02085330
cmp r2, #0
mov lr, #0
ble _02085330
_02085310:
ldrb ip, [r0, lr]
ldrb r3, [r1, lr]
cmp ip, r3
subne r0, ip, r3
ldmneia sp!, {r3, pc}
add lr, lr, #1
cmp lr, r2
blt _02085310
_02085330:
mov r0, #0
ldmia sp!, {r3, pc}
arm_func_end Std_CompareNString
arm_func_start Std_TsScanf
Std_TsScanf: ; 0x02085338
stmdb sp!, {r0, r1, r2, r3}
stmdb sp!, {r3, lr}
add r2, sp, #0xc
bic r2, r2, #3
ldr r1, [sp, #0xc]
add r2, r2, #4
bl Std_TvsScanf
ldmia sp!, {r3, lr}
add sp, sp, #0x10
bx lr
arm_func_end Std_TsScanf
arm_func_start Stdi_IsSpace
Stdi_IsSpace: ; 0x02085360

384
lib/NitroSDK/src/gx/g3x.c Normal file
View File

@@ -0,0 +1,384 @@
#include <nitro/gx/g3x.h>
#include <nitro/gx/gxasm.h>
#include <nitro.h>
static asm void GXi_NopClearFifo128_(register void *pDest);
void G3X_Init (void)
{
#ifdef SDK_DEBUG
{
GXPower power = GX_GetPower();
SDK_WARNING(power & GX_POWER_RE, "GX_POWER_RE is off now, registers for it not initialized.");
SDK_WARNING(power & GX_POWER_GE, "GX_POWER_GE is off now, registers for it not initialized.");
}
#endif
G3X_ClearFifo();
G3_End();
while ( G3X_IsGeometryBusy()) {
}
reg_G3X_DISP3DCNT = 0;
reg_G3X_GXSTAT = 0;
reg_G2_BG0OFS = 0;
G3X_ResetListRamOverflow();
G3X_ResetLineBufferUnderflow();
G3X_SetShading(GX_SHADING_TOON);
G3X_AntiAlias(TRUE);
G3X_AlphaTest(FALSE, 0);
G3X_ResetMtxStackOverflow();
G3X_SetFifoIntrCond(GX_FIFOINTR_COND_EMPTY);
G3X_InitMtxStack();
reg_G3X_CLEAR_COLOR = 0;
reg_G3X_CLEAR_DEPTH = 0x7fff;
reg_G3X_CLRIMAGE_OFFSET = 0;
reg_G3X_FOG_COLOR = 0;
reg_G3X_FOG_OFFSET = 0;
G2_SetBG0Priority(0);
G3X_InitTable();
G3_PolygonAttr(GX_LIGHTMASK_NONE, GX_POLYGONMODE_MODULATE, GX_CULL_BACK, 0, 31, GX_POLYGON_ATTR_MISC_NONE);
G3_TexImageParam(GX_TEXFMT_NONE,
GX_TEXGEN_NONE,
GX_TEXSIZE_S8, GX_TEXSIZE_T8, GX_TEXREPEAT_NONE, GX_TEXFLIP_NONE, GX_TEXPLTTCOLOR0_USE, 0);
G3_Direct1(G3OP_TEXPLTT_BASE, 0);
}
void G3X_Reset (void)
{
#ifdef SDK_DEBUG
{
GXPower power = GX_GetPower();
SDK_WARNING(power & GX_POWER_RE,
"GX_POWER_RE is off now, registers for it not initialized.");
SDK_WARNING(power & GX_POWER_GE,
"GX_POWER_GE is off now, registers for it not initialized.");
}
#endif
while (G3X_IsGeometryBusy()) {
}
G3X_ResetMtxStackOverflow();
G3X_ResetListRamOverflow();
G3X_ResetLineBufferUnderflow();
G3X_ResetMtxStack();
G3_PolygonAttr(GX_LIGHTMASK_NONE, GX_POLYGONMODE_MODULATE, GX_CULL_BACK, 0, 31,
GX_POLYGON_ATTR_MISC_NONE);
G3_TexImageParam(GX_TEXFMT_NONE,
GX_TEXGEN_NONE,
GX_TEXSIZE_S8, GX_TEXSIZE_T8, GX_TEXREPEAT_NONE, GX_TEXFLIP_NONE,
GX_TEXPLTTCOLOR0_USE, 0);
G3_Direct1(G3OP_TEXPLTT_BASE, 0);
}
void G3X_ClearFifo (void)
{
GXi_NopClearFifo128_((void *)&reg_G3X_GXFIFO);
while (G3X_IsGeometryBusy()) {
}
}
void G3X_InitMtxStack (void)
{
s32 levelPV;
s32 levelPJ;
#ifdef SDK_DEBUG
{
GXPower power = GX_GetPower();
SDK_WARNING(power & GX_POWER_GE,
"GX_POWER_GE is off now, registers for it not initialized.");
}
#endif
G3X_ResetMtxStackOverflow();
while (G3X_GetMtxStackLevelPV(&levelPV))
;
while (G3X_GetMtxStackLevelPJ(&levelPJ))
;
G3_MtxMode(GX_MTXMODE_TEXTURE);
G3_Identity();
G3_MtxMode(GX_MTXMODE_PROJECTION);
if (levelPJ != 0) {
G3_PopMtx(levelPJ);
}
G3_Identity();
G3_MtxMode(GX_MTXMODE_POSITION_VECTOR);
G3_PopMtx(levelPV);
G3_Identity();
}
void G3X_ResetMtxStack (void)
{
s32 levelPV;
s32 levelPJ;
#ifdef SDK_DEBUG
{
GXPower power = GX_GetPower();
SDK_WARNING(power & GX_POWER_GE, "GX_POWER_GE is off now, registers for it not changes.");
}
#endif
G3X_ResetMtxStackOverflow();
while (G3X_GetMtxStackLevelPV(&levelPV))
;
while (G3X_GetMtxStackLevelPJ(&levelPJ))
;
G3_MtxMode(GX_MTXMODE_TEXTURE);
G3_Identity();
G3_MtxMode(GX_MTXMODE_PROJECTION);
if (levelPJ != 0) {
G3_PopMtx(levelPJ);
}
G3_MtxMode(GX_MTXMODE_POSITION_VECTOR);
G3_PopMtx(levelPV);
G3_Identity();
}
//void G3X_SetFog (BOOL enable, GXFogBlend fogMode, GXFogSlope fogSlope, int fogOffset)
//{
// if (enable) {
// SDK_MINMAX_ASSERT(fogOffset, 0, 0x7fff);
// SDK_MINMAX_ASSERT(fogSlope, GX_FOGSLOPE_0x8000, GX_FOGSLOPE_0x0020);
// SDK_ASSERT(GX_FOGBLEND_COLOR_ALPHA == fogMode || GX_FOGBLEND_ALPHA == fogMode);
//
// reg_G3X_FOG_OFFSET = (u16)fogOffset;
//
// reg_G3X_DISP3DCNT = (u16)((reg_G3X_DISP3DCNT &
// ~(REG_G3X_DISP3DCNT_FOG_SHIFT_MASK
// | REG_G3X_DISP3DCNT_FMOD_MASK
// | REG_G3X_DISP3DCNT_RO_MASK
// | REG_G3X_DISP3DCNT_GO_MASK))
// | ((fogSlope << REG_G3X_DISP3DCNT_FOG_SHIFT_SHIFT)
// | (fogMode << REG_G3X_DISP3DCNT_FMOD_SHIFT)
// | (REG_G3X_DISP3DCNT_FME_MASK)));
// } else {
// reg_G3X_DISP3DCNT &= (u16) ~(REG_G3X_DISP3DCNT_FME_MASK
// | REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK);
// }
//}
//
//int G3X_GetClipMtx (MtxFx44 *m)
//{
// SDK_NULL_ASSERT(m);
//
// if (G3X_IsGeometryBusy()) {
// return -1;
// } else {
// MI_Copy64B((void *)REG_CLIPMTX_RESULT_0_ADDR, &m->_00);
// return 0;
// }
//}
//
//int G3X_GetVectorMtx (MtxFx33 *m)
//{
// SDK_NULL_ASSERT(m);
//
// if (G3X_IsGeometryBusy()) {
// return -1;
// } else {
// MI_Copy36B((void *)(REG_VECMTX_RESULT_0_ADDR), &m->_00);
// return 0;
// }
//}
//
//void G3X_SetEdgeColorTable (const GXRgb *rgb_8)
//{
// SDK_NULL_ASSERT(rgb_8);
// MI_CpuCopy16(rgb_8, (void *)REG_EDGE_COLOR_0_L_ADDR, 16);
//}
//
//void G3X_SetFogTable (const u32 *fogTable)
//{
// SDK_NULL_ASSERT(fogTable);
// MI_Copy32B(&fogTable[0], (void *)REG_FOG_TABLE_0_ADDR);
//}
//
//void G3X_SetToonTable (const GXRgb *rgb_32)
//{
// SDK_NULL_ASSERT(rgb_32);
// MI_CpuCopy16(rgb_32, (void *)REG_TOON_TABLE_0_L_ADDR, 64);
//}
void G3X_SetClearColor (GXRgb rgb, int alpha, int depth, int polygonID, BOOL fog)
{
u32 val;
GX_POLYGONID_ASSERT(polygonID);
GX_ALPHA_ASSERT(alpha);
GXRGB_ASSERT(rgb);
GX_DEPTH_ASSERT(depth);
val = (u32)(rgb | (alpha << REG_G3X_CLEAR_COLOR_ALPHA_SHIFT) | (polygonID << REG_G3X_CLEAR_COLOR_POLYGONID_SHIFT));
if (fog)
val |= REG_G3X_CLEAR_COLOR_F_MASK;
reg_G3X_CLEAR_COLOR = val;
reg_G3X_CLEAR_DEPTH = (u16)depth;
}
void G3X_InitTable (void)
{
int i;
if (GXi_DmaId != GX_DMA_NOT_USE) {
MI_DmaFill32Async(GXi_DmaId, (void *)REG_EDGE_COLOR_0_L_ADDR, 0, 16, NULL, NULL);
MI_DmaFill32(GXi_DmaId, (void *)REG_FOG_TABLE_0_ADDR, 0, 96);
} else {
MI_CpuFill32((void *)REG_EDGE_COLOR_0_L_ADDR, 0, 16);
MI_CpuFill32((void *)REG_FOG_TABLE_0_ADDR, 0, 96);
}
for (i = 0; i < 32; ++i) {
reg_G3_SHININESS = 0;
}
}
int G3X_GetMtxStackLevelPV (s32 *level)
{
SDK_NULL_ASSERT(level);
if (reg_G3X_GXSTAT & REG_G3X_GXSTAT_SB_MASK) {
return -1;
} else {
*level = (s32)((reg_G3X_GXSTAT & REG_G3X_GXSTAT_PV_MASK) >> REG_G3X_GXSTAT_PV_SHIFT);
return 0;
}
}
int G3X_GetMtxStackLevelPJ (s32 *level)
{
SDK_NULL_ASSERT(level);
if (reg_G3X_GXSTAT & REG_G3X_GXSTAT_SB_MASK) {
return -1;
} else {
*level = (s32)((reg_G3X_GXSTAT & REG_G3X_GXSTAT_PJ_MASK) >> REG_G3X_GXSTAT_PJ_SHIFT);
return 0;
}
}
// void G3X_SetDisp1DotDepth (fx32 w)
// {
// SDK_MINMAX_ASSERT(w, 0, FX32_ONE * 0x1000 - 1);
// reg_G3X_DISP_1DOT_DEPTH = (u16)((w >> 9) & 0x7fff);
// }
//
// int G3X_GetBoxTestResult (s32 *in)
// {
// SDK_NULL_ASSERT(in);
//
// if (reg_G3X_GXSTAT & REG_G3X_GXSTAT_TB_MASK)
// return -1;
// else {
// *in = (s32)(reg_G3X_GXSTAT & REG_G3X_GXSTAT_TR_MASK);
// return 0;
// }
// }
//
// int G3X_GetPositionTestResult (VecFx32 *vec, fx32 *w)
// {
// SDK_NULL_ASSERT(vec);
// SDK_NULL_ASSERT(w);
//
// if (reg_G3X_GXSTAT & REG_G3X_GXSTAT_TB_MASK) {
// return -1;
// } else {
// vec->x = (fx32)reg_G3X_POS_RESULT_X;
// vec->y = (fx32)reg_G3X_POS_RESULT_Y;
// vec->z = (fx32)reg_G3X_POS_RESULT_Z;
// *w = (fx32)reg_G3X_POS_RESULT_W;
// return 0;
// }
// }
//
// int G3X_GetVectorTestResult (fx16 *vec)
// {
// SDK_NULL_ASSERT(vec);
//
// if (reg_G3X_GXSTAT & REG_G3X_GXSTAT_TB_MASK) {
// return -1;
// } else {
// *(vec + 0) = (fx16)reg_G3X_VEC_RESULT_X;
// *(vec + 1) = (fx16)reg_G3X_VEC_RESULT_Y;
// *(vec + 2) = (fx16)reg_G3X_VEC_RESULT_Z;
// return 0;
// }
// }
//
// void G3X_SetHOffset (int hOffset)
// {
// SDK_WARNING((reg_GX_DISPCNT & REG_GX_DISPCNT_BG02D3D_MASK) != 0,
// "BG0 is in 2D mode now. call \'G2_SetBG0Offset\'\n");
//
// SDK_ASSERT(hOffset >= -256 && hOffset <= 255);
//
// reg_G2_BG0OFS = (u32)hOffset;
// }
#include <nitro/code32.h>
static asm void GXi_NopClearFifo128_ (register void *pDest)
{
mov r1, #0
mov r2, #0
mov r3, #0
mov r12, #0
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
stmia r0, {r1 - r3, r12}
bx lr
}
#include <nitro/codereset.h>

397
lib/NitroSDK/src/gx/gxstate.c Normal file
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@@ -0,0 +1,397 @@
#include <nitro.h>
//GX_State gGXState;
extern GX_State gGXState;
#ifdef SDK_CW_WARNOFF_SAFESTRB
#include <nitro/code32.h>
#endif
void GX_InitGXState (void)
{
gGXState.vramCnt.lcdc = 0;
gGXState.vramCnt.bg = 0;
gGXState.vramCnt.obj = 0;
gGXState.vramCnt.arm7 = 0;
gGXState.vramCnt.tex = 0;
gGXState.vramCnt.texPltt = 0;
gGXState.vramCnt.clrImg = 0;
gGXState.vramCnt.bgExtPltt = 0;
gGXState.vramCnt.objExtPltt = 0;
gGXState.vramCnt.sub_bg = 0;
gGXState.vramCnt.sub_obj = 0;
gGXState.vramCnt.sub_bgExtPltt = 0;
gGXState.vramCnt.sub_objExtPltt = 0;
reg_GX_VRAMCNT = 0;
*((u8 *)&reg_GX_WVRAMCNT + 0) = 0;
*((u8 *)&reg_GX_WVRAMCNT + 1) = 0;
*((u8 *)&reg_GX_WVRAMCNT + 2) = 0;
reg_GX_VRAM_HI_CNT = 0;
}
#ifdef SDK_CW_WARNOFF_SAFESTRB
#include <nitro/codereset.h>
#endif
#define SDK_CONFLICT_ASSERT(a, b, name1, name2) \
SDK_ASSERTMSG(!(a & b), \
"VRAM Bank conflicts between "#name1 " and "#name2 " (0x%02x, 0x%02x)\n", \
a, b)
#define SDK_CONFLICT_CHECK(val, bank) \
if (val & bank) goto SDK_VRAMCNT_ERROR; else val |= bank
#ifdef SDK_DEBUG
void GX_StateCheck_VRAMCnt_ (void)
{
GX_VRAMCnt_ *p = &gGXState.vramCnt;
u16 tmp = p->lcdc;
SDK_CONFLICT_CHECK(tmp, p->bg);
SDK_CONFLICT_CHECK(tmp, p->obj);
SDK_CONFLICT_CHECK(tmp, p->arm7);
SDK_CONFLICT_CHECK(tmp, p->tex);
SDK_CONFLICT_CHECK(tmp, p->texPltt);
SDK_CONFLICT_CHECK(tmp, p->clrImg);
SDK_CONFLICT_CHECK(tmp, p->bgExtPltt);
SDK_CONFLICT_CHECK(tmp, p->objExtPltt);
SDK_CONFLICT_CHECK(tmp, p->sub_bg);
SDK_CONFLICT_CHECK(tmp, p->sub_obj);
SDK_CONFLICT_CHECK(tmp, p->sub_bgExtPltt);
SDK_CONFLICT_CHECK(tmp, p->sub_objExtPltt);
return;
SDK_VRAMCNT_ERROR:
SDK_CONFLICT_ASSERT(p->lcdc, p->bg, LCDC, BG);
SDK_CONFLICT_ASSERT(p->lcdc, p->obj, LCDC, OBJ);
SDK_CONFLICT_ASSERT(p->lcdc, p->arm7, LCDC, ARM7);
SDK_CONFLICT_ASSERT(p->lcdc, p->tex, LCDC, Tex);
SDK_CONFLICT_ASSERT(p->lcdc, p->texPltt, LCDC, TEXPltt);
SDK_CONFLICT_ASSERT(p->lcdc, p->clrImg, LCDC, ClearImage);
SDK_CONFLICT_ASSERT(p->lcdc, p->bgExtPltt, LCDC, BGExtPltt);
SDK_CONFLICT_ASSERT(p->lcdc, p->objExtPltt, LCDC, OBJExtPltt);
SDK_CONFLICT_ASSERT(p->lcdc, p->sub_bg, LCDC, SubBG);
SDK_CONFLICT_ASSERT(p->lcdc, p->sub_obj, LCDC, SubOBJ);
SDK_CONFLICT_ASSERT(p->lcdc, p->sub_bgExtPltt, LCDC, SubBGExtPltt);
SDK_CONFLICT_ASSERT(p->lcdc, p->sub_objExtPltt, LCDC, SubOBJExtPltt);
SDK_CONFLICT_ASSERT(p->bg, p->obj, BG, OBJ);
SDK_CONFLICT_ASSERT(p->bg, p->arm7, BG, ARM7);
SDK_CONFLICT_ASSERT(p->bg, p->tex, BG, Tex);
SDK_CONFLICT_ASSERT(p->bg, p->texPltt, BG, TexPltt);
SDK_CONFLICT_ASSERT(p->bg, p->clrImg, BG, ClearImage);
SDK_CONFLICT_ASSERT(p->bg, p->bgExtPltt, BG, BGExtPltt);
SDK_CONFLICT_ASSERT(p->bg, p->objExtPltt, BG, OBJExtPltt);
SDK_CONFLICT_ASSERT(p->bg, p->sub_bg, BG, SubBG);
SDK_CONFLICT_ASSERT(p->bg, p->sub_obj, BG, SubOBJ);
SDK_CONFLICT_ASSERT(p->bg, p->sub_bgExtPltt, BG, SubBGExtPltt);
SDK_CONFLICT_ASSERT(p->bg, p->sub_objExtPltt, BG, SubOBJExtPltt);
SDK_CONFLICT_ASSERT(p->obj, p->arm7, OBJ, ARM7);
SDK_CONFLICT_ASSERT(p->obj, p->tex, OBJ, Tex);
SDK_CONFLICT_ASSERT(p->obj, p->texPltt, OBJ, TexPltt);
SDK_CONFLICT_ASSERT(p->obj, p->clrImg, OBJ, ClearImage);
SDK_CONFLICT_ASSERT(p->obj, p->bgExtPltt, OBJ, BGExtPltt);
SDK_CONFLICT_ASSERT(p->obj, p->objExtPltt, OBJ, OBJExtPltt);
SDK_CONFLICT_ASSERT(p->obj, p->sub_bg, OBJ, SubBG);
SDK_CONFLICT_ASSERT(p->obj, p->sub_obj, OBJ, SubOBJ);
SDK_CONFLICT_ASSERT(p->obj, p->sub_bgExtPltt, OBJ, SubBGExtPltt);
SDK_CONFLICT_ASSERT(p->obj, p->sub_objExtPltt, OBJ, SubOBJExtPltt);
SDK_CONFLICT_ASSERT(p->arm7, p->tex, ARM7, Tex);
SDK_CONFLICT_ASSERT(p->arm7, p->texPltt, ARM7, TexPltt);
SDK_CONFLICT_ASSERT(p->arm7, p->clrImg, ARM7, ClearImage);
SDK_CONFLICT_ASSERT(p->arm7, p->bgExtPltt, ARM7, BGExtPltt);
SDK_CONFLICT_ASSERT(p->arm7, p->objExtPltt, ARM7, OBJExtPltt);
SDK_CONFLICT_ASSERT(p->arm7, p->sub_bg, ARM7, SubBG);
SDK_CONFLICT_ASSERT(p->arm7, p->sub_obj, ARM7, SubOBJ);
SDK_CONFLICT_ASSERT(p->arm7, p->sub_bgExtPltt, ARM7, SubBGExtPltt);
SDK_CONFLICT_ASSERT(p->arm7, p->sub_objExtPltt, ARM7, SubOBJExtPltt);
SDK_CONFLICT_ASSERT(p->tex, p->texPltt, Tex, TexPltt);
SDK_CONFLICT_ASSERT(p->tex, p->clrImg, Tex, ClearImage);
SDK_CONFLICT_ASSERT(p->tex, p->bgExtPltt, Tex, BGExtPltt);
SDK_CONFLICT_ASSERT(p->tex, p->objExtPltt, Tex, OBJExtPltt);
SDK_CONFLICT_ASSERT(p->tex, p->sub_bg, Tex, SubBG);
SDK_CONFLICT_ASSERT(p->tex, p->sub_obj, Tex, SubOBJ);
SDK_CONFLICT_ASSERT(p->tex, p->sub_bgExtPltt, Tex, SubBGExtPltt);
SDK_CONFLICT_ASSERT(p->tex, p->sub_objExtPltt, Tex, SubOBJExtPltt);
SDK_CONFLICT_ASSERT(p->texPltt, p->clrImg, TexPltt, ClearImage);
SDK_CONFLICT_ASSERT(p->texPltt, p->bgExtPltt, TexPltt, BGExtPltt);
SDK_CONFLICT_ASSERT(p->texPltt, p->objExtPltt, TexPltt, OBJExtPltt);
SDK_CONFLICT_ASSERT(p->texPltt, p->sub_bg, TexPltt, SubBG);
SDK_CONFLICT_ASSERT(p->texPltt, p->sub_obj, TexPltt, SubOBJ);
SDK_CONFLICT_ASSERT(p->texPltt, p->sub_bgExtPltt, TexPltt, SubBGExtPltt);
SDK_CONFLICT_ASSERT(p->texPltt, p->sub_objExtPltt, TexPltt, SubOBJExtPltt);
SDK_CONFLICT_ASSERT(p->clrImg, p->bgExtPltt, ClearImage, BGExtPltt);
SDK_CONFLICT_ASSERT(p->clrImg, p->objExtPltt, ClearImage, OBJExtPltt);
SDK_CONFLICT_ASSERT(p->clrImg, p->sub_bg, ClearImage, SubBG);
SDK_CONFLICT_ASSERT(p->clrImg, p->sub_obj, ClearImage, SubOBJ);
SDK_CONFLICT_ASSERT(p->clrImg, p->sub_bgExtPltt, ClearImage, SubBGExtPltt);
SDK_CONFLICT_ASSERT(p->clrImg, p->sub_objExtPltt, ClearImage, SubOBJExtPltt);
SDK_CONFLICT_ASSERT(p->bgExtPltt, p->objExtPltt, BGExtPltt, OBJExtPltt);
SDK_CONFLICT_ASSERT(p->bgExtPltt, p->sub_bg, BGExtPltt, SubBG);
SDK_CONFLICT_ASSERT(p->bgExtPltt, p->sub_obj, BGExtPltt, SubOBJ);
SDK_CONFLICT_ASSERT(p->bgExtPltt, p->sub_bgExtPltt, BGExtPltt, SubBGExtPltt);
SDK_CONFLICT_ASSERT(p->bgExtPltt, p->sub_objExtPltt, BGExtPltt, SubOBJExtPltt);
SDK_CONFLICT_ASSERT(p->objExtPltt, p->sub_bg, OBJExtPltt, SubBG);
SDK_CONFLICT_ASSERT(p->objExtPltt, p->sub_obj, OBJExtPltt, SubOBJ);
SDK_CONFLICT_ASSERT(p->objExtPltt, p->sub_bgExtPltt, OBJExtPltt, SubBGExtPltt);
SDK_CONFLICT_ASSERT(p->objExtPltt, p->sub_objExtPltt, OBJExtPltt, SubOBJExtPltt);
SDK_CONFLICT_ASSERT(p->sub_bg, p->sub_obj, SubBG, SubOBJ);
SDK_CONFLICT_ASSERT(p->sub_bg, p->sub_bgExtPltt, SubBG, SubBGExtPltt);
SDK_CONFLICT_ASSERT(p->sub_bg, p->sub_objExtPltt, SubBG, SubOBJExtPltt);
SDK_CONFLICT_ASSERT(p->sub_obj, p->sub_bgExtPltt, SubOBJ, SubBGExtPltt);
SDK_CONFLICT_ASSERT(p->sub_obj, p->sub_objExtPltt, SubOBJ, SubOBJExtPltt);
SDK_CONFLICT_ASSERT(p->sub_bgExtPltt, p->sub_objExtPltt, SubBGExtPltt, SubOBJExtPltt);
}
#define SDK_REGION_ASSERT(name, r1, r2, d1, d2) \
SDK_ASSERTMSG(((r1) <= (d1)) && ((r2) >= (d2)), \
"Region allocated to "#name " is (0x%08x -> 0x%08x),\n" \
"access occured (0x%08x -> 0x%08x).", r1, r2, d1, d2)
#define SDK_REGION_ASSERT_EX(name, r1, r2, r3, r4, d1, d2) \
SDK_ASSERTMSG((((r1) <= (d1)) && ((r2) >= (d2))) || (((r3) <= (d1)) && ((r4) >= (d2))), \
"Region allocated to "#name " is (0x%08x -> 0x%08x, 0x%08x -> 0x%08x),\n" \
"access occured (0x%08x -> 0x%08x).", r1, r2, r3, r4, d1, d2)
void GX_RegionCheck_OBJ_ (u32 first, u32 last)
{
switch (gGXState.vramCnt.obj) {
case GX_VRAM_OBJ_NONE:
SDK_REGION_ASSERT(OBJ, HW_OBJ_VRAM, HW_OBJ_VRAM, first, last);
break;
case GX_VRAM_OBJ_16_F:
case GX_VRAM_OBJ_16_G:
SDK_REGION_ASSERT(OBJ, HW_OBJ_VRAM, HW_OBJ_VRAM + HW_VRAM_F_SIZE, first, last);
break;
case GX_VRAM_OBJ_32_FG:
SDK_REGION_ASSERT(OBJ, HW_OBJ_VRAM, HW_OBJ_VRAM + HW_VRAM_F_SIZE + HW_VRAM_G_SIZE, first, last);
break;
case GX_VRAM_OBJ_64_E:
SDK_REGION_ASSERT(OBJ, HW_OBJ_VRAM, HW_OBJ_VRAM + HW_VRAM_E_SIZE, first, last);
break;
case GX_VRAM_OBJ_80_EF:
SDK_REGION_ASSERT(OBJ, HW_OBJ_VRAM, HW_OBJ_VRAM + HW_VRAM_E_SIZE + HW_VRAM_F_SIZE, first, last);
break;
case GX_VRAM_OBJ_80_EG:
SDK_REGION_ASSERT(OBJ, HW_OBJ_VRAM, HW_OBJ_VRAM + HW_VRAM_E_SIZE + HW_VRAM_G_SIZE, first, last);
break;
case GX_VRAM_OBJ_96_EFG:
SDK_REGION_ASSERT(OBJ, HW_OBJ_VRAM, HW_OBJ_VRAM + HW_VRAM_E_SIZE + HW_VRAM_F_SIZE + HW_VRAM_G_SIZE, first, last);
break;
case GX_VRAM_OBJ_128_A:
case GX_VRAM_OBJ_128_B:
SDK_REGION_ASSERT(OBJ, HW_OBJ_VRAM, HW_OBJ_VRAM + HW_VRAM_A_SIZE, first, last);
break;
case GX_VRAM_OBJ_256_AB:
SDK_REGION_ASSERT(OBJ, HW_OBJ_VRAM, HW_OBJ_VRAM + HW_VRAM_A_SIZE + HW_VRAM_B_SIZE, first, last);
break;
default:
SDK_INTERNAL_ERROR("unknown case 0x%x", gGXState.vramCnt.obj);
break;
}
}
void GX_RegionCheck_BG_ (u32 first, u32 last)
{
u16 vram_abcd;
u16 vram_efg;
u32 abcd_size, efg_size;
SDK_ASSERT(HW_VRAM_A_SIZE == HW_VRAM_B_SIZE &&
HW_VRAM_A_SIZE == HW_VRAM_C_SIZE && HW_VRAM_A_SIZE == HW_VRAM_D_SIZE);
if (gGXState.vramCnt.bg & (GX_VRAM_H | GX_VRAM_I)) {
SDK_INTERNAL_ERROR("unknown case 0x%x", gGXState.vramCnt.bg);
return;
}
vram_abcd = (u16)(gGXState.vramCnt.bg & GX_VRAM_BG_512_ABCD);
vram_efg = (u16)(gGXState.vramCnt.bg & GX_VRAM_BG_96_EFG);
switch (vram_efg) {
case GX_VRAM_BG_NONE:
efg_size = 0;
break;
case GX_VRAM_BG_16_F:
case GX_VRAM_BG_16_G:
efg_size = HW_VRAM_F_SIZE;
break;
case GX_VRAM_BG_32_FG:
efg_size = HW_VRAM_F_SIZE + HW_VRAM_G_SIZE;
break;
case GX_VRAM_BG_64_E:
efg_size = HW_VRAM_E_SIZE;
break;
case GX_VRAM_BG_80_EF:
case GX_VRAM_BG_80_EG:
efg_size = HW_VRAM_E_SIZE + HW_VRAM_F_SIZE;
break;
case GX_VRAM_BG_96_EFG:
efg_size = HW_VRAM_E_SIZE + HW_VRAM_F_SIZE + HW_VRAM_G_SIZE;
break;
}
switch (vram_abcd) {
case GX_VRAM_BG_NONE:
abcd_size = 0;
break;
case GX_VRAM_BG_128_A:
case GX_VRAM_BG_128_B:
case GX_VRAM_BG_128_C:
case GX_VRAM_BG_128_D:
abcd_size = HW_VRAM_A_SIZE;
break;
case GX_VRAM_BG_256_AB:
case GX_VRAM_BG_256_BC:
case GX_VRAM_BG_256_CD:
case GX_VRAM_BG_256_AC:
case GX_VRAM_BG_256_AD:
case GX_VRAM_BG_256_BD:
abcd_size = HW_VRAM_A_SIZE + HW_VRAM_B_SIZE;
break;
case GX_VRAM_BG_384_ABC:
case GX_VRAM_BG_384_BCD:
case GX_VRAM_BG_384_ABD:
case GX_VRAM_BG_384_ACD:
abcd_size = HW_VRAM_A_SIZE + HW_VRAM_B_SIZE + HW_VRAM_C_SIZE;
break;
case GX_VRAM_BG_512_ABCD:
abcd_size = HW_VRAM_A_SIZE + HW_VRAM_B_SIZE + HW_VRAM_C_SIZE + HW_VRAM_D_SIZE;
break;
}
if (vram_abcd && vram_efg) {
if (vram_abcd == GX_VRAM_BG_512_ABCD) {
SDK_INTERNAL_ERROR("unknown case 0x%x", gGXState.vramCnt.bg);
return;
}
SDK_REGION_ASSERT_EX(BG, HW_BG_VRAM, HW_BG_VRAM + efg_size,
HW_BG_VRAM + HW_VRAM_A_SIZE, HW_BG_VRAM + HW_VRAM_A_SIZE + abcd_size,
first, last);
} else if (vram_abcd) {
SDK_REGION_ASSERT(BG, HW_BG_VRAM, HW_BG_VRAM + abcd_size, first, last);
} else {
SDK_REGION_ASSERT(BG, HW_BG_VRAM, HW_BG_VRAM + efg_size, first, last);
}
}
void GX_RegionCheck_SubOBJ_ (u32 first, u32 last)
{
switch (gGXState.vramCnt.sub_obj) {
case GX_VRAM_SUB_OBJ_NONE:
SDK_REGION_ASSERT(SubOBJ, HW_DB_OBJ_VRAM, HW_DB_OBJ_VRAM, first, last);
break;
case GX_VRAM_SUB_OBJ_128_D:
SDK_REGION_ASSERT(SubOBJ, HW_DB_OBJ_VRAM, HW_DB_OBJ_VRAM + HW_VRAM_D_SIZE, first, last);
break;
case GX_VRAM_SUB_OBJ_16_I:
SDK_REGION_ASSERT(SubOBJ, HW_DB_OBJ_VRAM, HW_DB_OBJ_VRAM + HW_VRAM_I_SIZE, first, last);
break;
}
}
void GX_RegionCheck_SubBG_ (u32 first, u32 last)
{
switch (gGXState.vramCnt.sub_bg) {
case GX_VRAM_SUB_BG_NONE:
SDK_REGION_ASSERT(SubBG, HW_DB_BG_VRAM, HW_DB_BG_VRAM, first, last);
break;
case GX_VRAM_SUB_BG_128_C:
SDK_REGION_ASSERT(SubBG, HW_DB_BG_VRAM, HW_DB_BG_VRAM + HW_VRAM_C_SIZE, first, last);
break;
case GX_VRAM_SUB_BG_32_H:
SDK_REGION_ASSERT(SubBG, HW_DB_BG_VRAM, HW_DB_BG_VRAM + HW_VRAM_H_SIZE, first, last);
break;
case GX_VRAM_SUB_BG_48_HI:
SDK_REGION_ASSERT(SubBG, HW_DB_BG_VRAM,
HW_DB_BG_VRAM + HW_VRAM_H_SIZE + HW_VRAM_I_SIZE, first, last);
break;
default:
SDK_INTERNAL_ERROR("unknown case 0x%x", gGXState.vramCnt.sub_bg);
break;
}
}
void GX_RegionCheck_TexPltt_ (GXVRamTexPltt texPltt, u32 first, u32 last)
{
#if defined(SDK_NO_MESSAGE)
#pragma unused(first)
#endif
switch (texPltt) {
case GX_VRAM_TEXPLTT_0_F:
case GX_VRAM_TEXPLTT_0_G:
SDK_ASSERTMSG(last <= 0x04000,
"Texture pallete 0x04000-0x18000 not available(0x%5x->0x%5x)", first, last);
break;
case GX_VRAM_TEXPLTT_01_FG:
SDK_ASSERTMSG(last <= 0x08000,
"Texture pallete 0x08000-0x18000 not available(0x%5x->0x%5x)", first, last);
break;
case GX_VRAM_TEXPLTT_0123_E:
SDK_ASSERTMSG(last <= 0x10000,
"Texture pallete 0x10000-0x18000 not available(0x%5x->0x%5x)", first, last);
break;
case GX_VRAM_TEXPLTT_01234_EF:
SDK_ASSERTMSG(last <= 0x14000,
"Texture pallete 0x14000-0x18000 not available(0x%5x->0x%5x)", first, last);
break;
case GX_VRAM_TEXPLTT_012345_EFG:
SDK_ASSERTMSG(last <= 0x18000, "Illegal Address/size specified(0x%5x->0x%5x)", first, last);
break;
default:
SDK_INTERNAL_ERROR("unknown case 0x%x", texPltt);
break;
}
}
void GX_RegionCheck_Tex_ (GXVRamTex tex, u32 first, u32 last)
{
#if defined(SDK_NO_MESSAGE)
#pragma unused(first)
#endif
switch (tex) {
case GX_VRAM_TEX_0_A:
case GX_VRAM_TEX_0_B:
case GX_VRAM_TEX_0_C:
case GX_VRAM_TEX_0_D:
SDK_ASSERTMSG(last <= 0x20000,
"Texture slot 0x20000-0x80000 not available(0x%5x->0x%5x)", first, last);
break;
case GX_VRAM_TEX_01_AB:
case GX_VRAM_TEX_01_BC:
case GX_VRAM_TEX_01_CD:
case GX_VRAM_TEX_01_AC:
case GX_VRAM_TEX_01_AD:
case GX_VRAM_TEX_01_BD:
SDK_ASSERTMSG(last <= 0x40000,
"Texture slot 0x40000-0x80000 not available(0x%5x->0x%5x)", first, last);
break;
case GX_VRAM_TEX_012_ABC:
case GX_VRAM_TEX_012_BCD:
case GX_VRAM_TEX_012_ABD:
case GX_VRAM_TEX_012_ACD:
SDK_ASSERTMSG(last <= 0x60000,
"Texture slot 0x60000-0x80000 not available(0x%5x->0x%5x)", first, last);
break;
case GX_VRAM_TEX_0123_ABCD:
SDK_ASSERTMSG(last <= 0x80000, "Illegal Address/size specified(0x%5x->0x%5x)", first, last);
break;
default:
SDK_INTERNAL_ERROR("unknown case 0x%x", tex);
break;
}
}
#endif

0
lib/NitroSDK/src/math_math.c → lib/NitroSDK/src/math/math.c
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19
lib/NitroSDK/src/math/math_dgt.c Normal file
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@@ -0,0 +1,19 @@
#include <nitro.h>
// void MATH_CalcMD5 (void *digest, const void *data, u32 dataLength)
// {
// MATHMD5Context context;
//
// MATH_MD5Init(&context);
// MATH_MD5Update(&context, data, dataLength);
// MATH_MD5GetHash(&context, digest);
// }
void Math_CalcSha1 (void *digest, const void *data, u32 dataLength)
{
MATHSHA1Context context;
MATH_SHA1Init(&context);
MATH_SHA1Update(&context, data, dataLength);
MATH_SHA1GetHash(&context, digest);
}

489
lib/NitroSDK/src/mi/mi_dma.c Normal file
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@@ -0,0 +1,489 @@
#include <nitro.h>
#ifdef SDK_ARM9
#include <nitro/itcm_begin.h>
void MIi_DmaSetParams (u32 dmaNo, u32 src, u32 dest, u32 ctrl)
{
OSIntrMode enabled = EnableIrqFlag();
vu32 * p = (vu32 *)((u32)REG_DMA0SAD_ADDR + dmaNo * 12);
*p = (vu32)src;
*(p + 1) = (vu32)dest;
*(p + 2) = (vu32)ctrl;
(void)SetIrqFlag(enabled);
}
void MIi_DmaSetParams_Wait (u32 dmaNo, u32 src, u32 dest, u32 ctrl)
{
OSIntrMode enabled = EnableIrqFlag();
vu32 * p = (vu32 *)((u32)REG_DMA0SAD_ADDR + dmaNo * 12);
*p = (vu32)src;
*(p + 1) = (vu32)dest;
*(p + 2) = (vu32)ctrl;
{
u32 dummy = reg_MI_DMA0SAD;
}
{
u32 dummy = reg_MI_DMA0SAD;
}
if (dmaNo == MIi_DUMMY_DMA_NO) {
*p = (vu32)MIi_DUMMY_SRC;
*(p + 1) = (vu32)MIi_DUMMY_DEST;
*(p + 2) = (vu32)MIi_DUMMY_CNT;
}
(void)SetIrqFlag(enabled);
}
void MIi_DmaSetParams_NoInt (u32 dmaNo, u32 src, u32 dest, u32 ctrl)
{
vu32 * p = (vu32 *)((u32)REG_DMA0SAD_ADDR + dmaNo * 12);
*p = (vu32)src;
*(p + 1) = (vu32)dest;
*(p + 2) = (vu32)ctrl;
}
void MIi_DmaSetParams_wait_noInt (u32 dmaNo, u32 src, u32 dest, u32 ctrl)
{
vu32 * p = (vu32 *)((u32)REG_DMA0SAD_ADDR + dmaNo * 12);
*p = (vu32)src;
*(p + 1) = (vu32)dest;
*(p + 2) = (vu32)ctrl;
{
u32 dummy = reg_MI_DMA0SAD;
}
{
u32 dummy = reg_MI_DMA0SAD;
}
if (dmaNo == MIi_DUMMY_DMA_NO) {
*p = (vu32)MIi_DUMMY_SRC;
*(p + 1) = (vu32)MIi_DUMMY_DEST;
*(p + 2) = (vu32)MIi_DUMMY_CNT;
}
{
u32 dummy = reg_MI_DMA0SAD;
}
{
u32 dummy = reg_MI_DMA0SAD;
}
}
#include <nitro/itcm_end.h>
#endif
void MI_DmaFill32 (u32 dmaNo, void * dest, u32 data, u32 size)
{
vu32 * dmaCntp;
MIi_ASSERT_DMANO(dmaNo);
MIi_ASSERT_MUL4(size);
MIi_ASSERT_SIZE(dmaNo, size / 4);
MIi_ASSERT_DEST_ALIGN4(dest);
MIi_WARNING_ADDRINTCM(dest, size);
if (size == 0) {
return;
}
MIi_Wait_BeforeDMA(dmaCntp, dmaNo);
MIi_DmaSetParams_wait_src32(dmaNo, data, (u32)dest, MI_CNT_CLEAR32(size));
MIi_Wait_AfterDMA(dmaCntp);
}
void MI_DmaCopy32 (u32 dmaNo, const void * src, void * dest, u32 size)
{
vu32 * dmaCntp;
MIi_ASSERT_DMANO(dmaNo);
MIi_ASSERT_MUL4(size);
MIi_ASSERT_SIZE(dmaNo, size / 4);
MIi_ASSERT_SRC_ALIGN4(src);
MIi_ASSERT_DEST_ALIGN4(dest);
MIi_WARNING_ADDRINTCM(src, size);
MIi_WARNING_ADDRINTCM(dest, size);
MIi_CheckDma0SourceAddress(dmaNo, (u32)src, size, MI_DMA_SRC_INC);
if (size == 0) {
return;
}
MIi_Wait_BeforeDMA(dmaCntp, dmaNo);
MIi_DmaSetParams_Wait(dmaNo, (u32)src, (u32)dest, MI_CNT_COPY32(size));
MIi_Wait_AfterDMA(dmaCntp);
}
// void MI_DmaSend32 (u32 dmaNo, const void * src, volatile void * dest, u32 size)
// {
// vu32 * dmaCntp;
//
// MIi_ASSERT_DMANO(dmaNo);
// MIi_ASSERT_MUL4(size);
// MIi_ASSERT_SIZE(dmaNo, size / 4);
// MIi_ASSERT_SRC_ALIGN4(src);
// MIi_ASSERT_DEST_ALIGN4(dest);
// MIi_WARNING_ADDRINTCM(src, size);
// MIi_WARNING_ADDRINTCM(dest, size);
//
// MIi_CheckDma0SourceAddress(dmaNo, (u32)src, size, MI_DMA_SRC_INC);
//
// if (size == 0) {
// return;
// }
//
// MIi_Wait_BeforeDMA(dmaCntp, dmaNo);
// MIi_DmaSetParams_Wait(dmaNo, (u32)src, (u32)dest, MI_CNT_SEND32(size));
// MIi_Wait_AfterDMA(dmaCntp);
// }
//
// void MI_DmaFill16 (u32 dmaNo, void * dest, u16 data, u32 size)
// {
// vu32 * dmaCntp;
//
// MIi_ASSERT_DMANO(dmaNo);
// MIi_ASSERT_MUL2(size);
// MIi_ASSERT_SIZE(dmaNo, size / 2);
// MIi_ASSERT_DEST_ALIGN2(dest);
// MIi_WARNING_ADDRINTCM(dest, size);
//
// if (size == 0) {
// return;
// }
//
// MIi_Wait_BeforeDMA(dmaCntp, dmaNo);
// MIi_DmaSetParams_wait_src32(dmaNo, data, (u32)dest, MI_CNT_CLEAR16(size));
// MIi_Wait_AfterDMA(dmaCntp);
// }
void MI_DmaCopy16 (u32 dmaNo, const void * src, void * dest, u32 size)
{
vu32 * dmaCntp;
MIi_ASSERT_DMANO(dmaNo);
MIi_ASSERT_MUL2(size);
MIi_ASSERT_SIZE(dmaNo, size / 2);
MIi_ASSERT_SRC_ALIGN2(src);
MIi_ASSERT_DEST_ALIGN2(dest);
MIi_WARNING_ADDRINTCM(src, size);
MIi_WARNING_ADDRINTCM(dest, size);
if (size == 0) {
return;
}
MIi_CheckDma0SourceAddress(dmaNo, (u32)src, size, MI_DMA_SRC_INC);
MIi_Wait_BeforeDMA(dmaCntp, dmaNo);
MIi_DmaSetParams_Wait(dmaNo, (u32)src, (u32)dest, MI_CNT_COPY16(size));
MIi_Wait_AfterDMA(dmaCntp);
}
// void MI_DmaSend16 (u32 dmaNo, const void * src, volatile void * dest, u32 size)
// {
// vu32 * dmaCntp;
//
// MIi_ASSERT_DMANO(dmaNo);
// MIi_ASSERT_MUL2(size);
// MIi_ASSERT_SIZE(dmaNo, size / 2);
// MIi_ASSERT_SRC_ALIGN2(src);
// MIi_ASSERT_DEST_ALIGN2(dest);
// MIi_WARNING_ADDRINTCM(src, size);
// MIi_WARNING_ADDRINTCM(dest, size);
//
// if (size == 0) {
// return;
// }
//
// MIi_CheckDma0SourceAddress(dmaNo, (u32)src, size, MI_DMA_SRC_INC);
//
// MIi_Wait_BeforeDMA(dmaCntp, dmaNo);
// MIi_DmaSetParams_Wait(dmaNo, (u32)src, (u32)dest, MI_CNT_SEND16(size));
// MIi_Wait_AfterDMA(dmaCntp);
// }
void MI_DmaFill32Async (u32 dmaNo, void * dest, u32 data, u32 size, MIDmaCallback callback, void * arg)
{
MIi_ASSERT_DMANO(dmaNo);
MIi_ASSERT_MUL4(size);
MIi_ASSERT_SIZE(dmaNo, size / 4);
MIi_ASSERT_DEST_ALIGN4(dest);
MIi_WARNING_ADDRINTCM(dest, size);
if (size == 0) {
MIi_CallCallback(callback, arg);
} else {
MI_WaitDma(dmaNo);
if (callback) {
OSi_EnterDmaCallback(dmaNo, callback, arg);
MIi_DmaSetParams_src32(dmaNo, data, (u32)dest, MI_CNT_CLEAR32_IF(size));
} else {
MIi_DmaSetParams_src32(dmaNo, data, (u32)dest, MI_CNT_CLEAR32(size));
}
}
}
void MI_DmaCopy32Async (u32 dmaNo, const void * src, void * dest, u32 size, MIDmaCallback callback, void * arg)
{
MIi_ASSERT_DMANO(dmaNo);
MIi_ASSERT_MUL4(size);
MIi_ASSERT_SIZE(dmaNo, size / 4);
MIi_ASSERT_SRC_ALIGN4(src);
MIi_ASSERT_DEST_ALIGN4(dest);
MIi_WARNING_ADDRINTCM(src, size);
MIi_WARNING_ADDRINTCM(dest, size);
MIi_CheckDma0SourceAddress(dmaNo, (u32)src, size, MI_DMA_SRC_INC);
if (size == 0) {
MIi_CallCallback(callback, arg);
} else {
MI_WaitDma(dmaNo);
if (callback) {
OSi_EnterDmaCallback(dmaNo, callback, arg);
MIi_DmaSetParams(dmaNo, (u32)src, (u32)dest, MI_CNT_COPY32_IF(size));
} else {
MIi_DmaSetParams(dmaNo, (u32)src, (u32)dest, MI_CNT_COPY32(size));
}
}
}
void MI_DmaSend32Async (u32 dmaNo, const void * src, volatile void * dest, u32 size, MIDmaCallback callback, void * arg)
{
MIi_ASSERT_DMANO(dmaNo);
MIi_ASSERT_MUL4(size);
MIi_ASSERT_SIZE(dmaNo, size / 4);
MIi_ASSERT_SRC_ALIGN4(src);
MIi_ASSERT_DEST_ALIGN4(dest);
MIi_WARNING_ADDRINTCM(src, size);
MIi_WARNING_ADDRINTCM(dest, size);
MIi_CheckDma0SourceAddress(dmaNo, (u32)src, size, MI_DMA_SRC_INC);
if (size == 0) {
MIi_CallCallback(callback, arg);
} else {
MI_WaitDma(dmaNo);
if (callback) {
OSi_EnterDmaCallback(dmaNo, callback, arg);
MIi_DmaSetParams(dmaNo, (u32)src, (u32)dest, MI_CNT_SEND32_IF(size));
} else {
MIi_DmaSetParams(dmaNo, (u32)src, (u32)dest, MI_CNT_SEND32(size));
}
}
}
// void MI_DmaFill16Async (u32 dmaNo, void * dest, u16 data, u32 size, MIDmaCallback callback, void * arg)
// {
// MIi_ASSERT_DMANO(dmaNo);
// MIi_ASSERT_MUL2(size);
// MIi_ASSERT_SIZE(dmaNo, size / 2);
// MIi_ASSERT_DEST_ALIGN2(dest);
// MIi_WARNING_ADDRINTCM(dest, size);
//
// if (size == 0) {
// MIi_CallCallback(callback, arg);
// } else {
// MI_WaitDma(dmaNo);
//
// if (callback) {
// OSi_EnterDmaCallback(dmaNo, callback, arg);
// MIi_DmaSetParams_src32(dmaNo, data, (u32)dest, MI_CNT_CLEAR16_IF(size));
// } else {
// MIi_DmaSetParams_src32(dmaNo, data, (u32)dest, MI_CNT_CLEAR16(size));
// }
// }
// }
void MI_DmaCopy16Async (u32 dmaNo, const void * src, void * dest, u32 size, MIDmaCallback callback, void * arg)
{
MIi_ASSERT_DMANO(dmaNo);
MIi_ASSERT_MUL2(size);
MIi_ASSERT_SIZE(dmaNo, size / 2);
MIi_ASSERT_SRC_ALIGN2(src);
MIi_ASSERT_DEST_ALIGN2(dest);
MIi_WARNING_ADDRINTCM(src, size);
MIi_WARNING_ADDRINTCM(dest, size);
MIi_CheckDma0SourceAddress(dmaNo, (u32)src, size, MI_DMA_SRC_INC);
if (size == 0) {
MIi_CallCallback(callback, arg);
} else {
MI_WaitDma(dmaNo);
if (callback) {
OSi_EnterDmaCallback(dmaNo, callback, arg);
MIi_DmaSetParams(dmaNo, (u32)src, (u32)dest, MI_CNT_COPY16_IF(size));
} else {
MIi_DmaSetParams(dmaNo, (u32)src, (u32)dest, MI_CNT_COPY16(size));
}
}
}
void MI_DmaSend16Async (u32 dmaNo, const void * src, volatile void * dest, u32 size, MIDmaCallback callback, void * arg)
{
MIi_ASSERT_DMANO(dmaNo);
MIi_ASSERT_MUL2(size);
MIi_ASSERT_SIZE(dmaNo, size / 2);
MIi_ASSERT_SRC_ALIGN2(src);
MIi_ASSERT_DEST_ALIGN2(dest);
MIi_WARNING_ADDRINTCM(src, size);
MIi_WARNING_ADDRINTCM(dest, size);
MIi_CheckDma0SourceAddress(dmaNo, (u32)src, size, MI_DMA_SRC_INC);
if (size == 0) {
MIi_CallCallback(callback, arg);
} else {
MI_WaitDma(dmaNo);
if (callback) {
OSi_EnterDmaCallback(dmaNo, callback, arg);
MIi_DmaSetParams(dmaNo, (u32)src, (u32)dest, MI_CNT_SEND16_IF(size));
} else {
MIi_DmaSetParams(dmaNo, (u32)src, (u32)dest, MI_CNT_SEND16(size));
}
}
}
BOOL MI_IsDmaBusy (u32 dmaNo)
{
vu32 * dmaCntp = &((vu32 *)REG_DMA0SAD_ADDR)[dmaNo * 3 + 2];
MIi_ASSERT_DMANO(dmaNo);
return (BOOL)((*(vu32 *)dmaCntp & REG_MI_DMA0CNT_E_MASK) >> REG_MI_DMA0CNT_E_SHIFT);
}
void MI_WaitDma (u32 dmaNo)
{
OSIntrMode enabled = EnableIrqFlag();
vu32 * dmaCntp = &((vu32 *)REG_DMA0SAD_ADDR)[dmaNo * 3 + 2];
MIi_ASSERT_DMANO(dmaNo);
while (*dmaCntp & REG_MI_DMA0CNT_E_MASK) {
}
if (dmaNo == MIi_DUMMY_DMA_NO) {
vu32 * p = (vu32 *)((u32)REG_DMA0SAD_ADDR + dmaNo * 12);
*p = (vu32)MIi_DUMMY_SRC;
*(p + 1) = (vu32)MIi_DUMMY_DEST;
*(p + 2) = (vu32)MIi_DUMMY_CNT;
}
(void)SetIrqFlag(enabled);
}
void MI_StopDma (u32 dmaNo)
{
OSIntrMode enabled = EnableIrqFlag();
vu16 * dmaCntp = &((vu16 *)REG_DMA0SAD_ADDR)[dmaNo * 6 + 5];
MIi_ASSERT_DMANO(dmaNo);
*dmaCntp &= ~((MI_DMA_TIMING_MASK | MI_DMA_CONTINUOUS_ON) >> 16);
*dmaCntp &= ~(MI_DMA_ENABLE >> 16);
{
s32 dummy = dmaCntp[0];
}
{
s32 dummy = dmaCntp[0];
}
if (dmaNo == MIi_DUMMY_DMA_NO) {
vu32 * p = (vu32 *)((u32)REG_DMA0SAD_ADDR + dmaNo * 12);
*p = (vu32)MIi_DUMMY_SRC;
*(p + 1) = (vu32)MIi_DUMMY_DEST;
*(p + 2) = (vu32)MIi_DUMMY_CNT;
}
(void)SetIrqFlag(enabled);
}
#ifdef SDK_ARM9
void MIi_CheckAnotherAutoDma (u32 dmaNo, u32 dmaType)
{
int n;
u32 dmaCnt;
u32 timing;
for (n = 0; n < MI_DMA_MAX_NUM; n++) {
if (n == dmaNo) {
continue;
}
dmaCnt = *(REGType32v *)(REG_DMA0CNT_ADDR + n * 12);
if ((dmaCnt & MI_DMA_ENABLE) == 0) {
continue;
}
timing = dmaCnt & MI_DMA_TIMING_MASK;
if (timing == dmaType
|| (timing == MI_DMA_TIMING_V_BLANK && dmaType == MI_DMA_TIMING_H_BLANK)
|| (timing == MI_DMA_TIMING_H_BLANK && dmaType == MI_DMA_TIMING_V_BLANK)) {
continue;
}
if (timing == MI_DMA_TIMING_DISP
|| timing == MI_DMA_TIMING_DISP_MMEM
|| timing == MI_DMA_TIMING_CARD
|| timing == MI_DMA_TIMING_CARTRIDGE
|| timing == MI_DMA_TIMING_GXFIFO
|| timing == MI_DMA_TIMING_V_BLANK || timing == MI_DMA_TIMING_H_BLANK) {
// OS_Panic("cannot start auto DMA at the same time.");
WaitForever2();
}
}
}
#endif
void MIi_CheckDma0SourceAddress (u32 dmaNo, u32 src, u32 size, u32 dir)
{
if (dmaNo == 0) {
u32 addStart;
u32 addEnd;
addStart = src & 0xff000000;
switch (dir) {
case MI_DMA_SRC_INC:
addEnd = src + size;
break;
case MI_DMA_SRC_DEC:
addEnd = src - size;
break;
default:
addEnd = src;
break;
}
addEnd &= 0xff000000;
if (addStart == 0x04000000 || addStart >= 0x08000000 ||
addEnd == 0x04000000 || addEnd >= 0x08000000) {
// OS_Panic("illegal DMA0 source address.");
WaitForever2();
}
}
}
#if defined(SDK_ARM9) && defined(SDK_DEBUG)
void MIi_CheckAddressInTCM (u32 addr, u32 size)
{
u32 itcm = HW_ITCM;
u32 dtcm = OS_GetDTCMAddress();
SDK_WARNING(itcm >= addr + size || addr >= itcm + HW_ITCM_SIZE, "intend to do DMA in ITCM area (%x)", addr);
SDK_WARNING(dtcm >= addr + size || addr >= dtcm + HW_DTCM_SIZE, "intend to do DMA in DTCM area (%x)", addr);
}
#endif

26
lib/NitroSDK/src/mi/mi_dma_card.c Normal file
View File

@@ -0,0 +1,26 @@
#include <nitro.h>
void MIi_CardDmaCopy32 (u32 dmaNo, const void * src, void * dest, u32 size)
{
vu32 * dmaCntp;
MIi_ASSERT_DMANO(dmaNo);
MIi_ASSERT_DEST_ALIGN4(dest);
MIi_ASSERT_SRC_ALIGN512(size);
MIi_WARNING_ADDRINTCM(dest, size);
(void)size;
#ifdef SDK_ARM9
MIi_CheckAnotherAutoDma(dmaNo, MIi_DMA_TIMING_ANY);
#endif
MIi_CheckDma0SourceAddress(dmaNo, (u32)src, size, MI_DMA_SRC_FIX);
if (size == 0) {
return;
}
MIi_Wait_BeforeDMA(dmaCntp, dmaNo);
MIi_DmaSetParams(dmaNo, (u32)src, (u32)dest, (u32)(MI_CNT_CARDRECV32(4) | MI_DMA_CONTINUOUS_ON));
}

18
lib/NitroSDK/src/mi/mi_swap.c Normal file
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@@ -0,0 +1,18 @@
#include <nitro/mi/swap.h>
#include <nitro.h>
#include <nitro/code32.h>
asm u32 MI_SwapWord (register u32 setData, register vu32 * destp)
{
swp r0, r0, [r1]
bx lr
}
// asm u8 MI_SwapByte (register u32 setData, register vu8 * destp)
// {
// swpb r0, r0, [r1]
// bx lr
// }
#include <nitro/codereset.h>

0
lib/NitroSDK/src/rtc_internal.c → lib/NitroSDK/src/rtc/rtc_internal.c
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171
lib/NitroSDK/src/snd/snd_alarm.c Normal file
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@@ -0,0 +1,171 @@
#include <nitro.h>
#ifdef SDK_ARM9
typedef struct AlarmCallbackInfo {
void (*func)(void *);
void * arg;
u8 id;
u8 pad;
u16 pad2;
} AlarmCallbackInfo;
#endif
// #ifdef SDK_ARM9
// static AlarmCallbackInfo sCallbackTable[SND_ALARM_NUM];
// #endif
#ifdef SDK_ARM9
extern AlarmCallbackInfo sCallbackTable[SND_ALARM_NUM];
#endif
#ifdef SDK_ARM7
static void AlarmHandler(void * arg);
#endif
#ifdef SDK_ARM9
void Snd_AlarmInit (void)
{
int alarmNo;
for (alarmNo = 0; alarmNo < SND_ALARM_NUM; alarmNo++) {
AlarmCallbackInfo * info;
info = &sCallbackTable[alarmNo];
info->func = NULL;
info->arg = NULL;
info->id = 0;
}
}
#else
void SND_AlarmInit (void)
{
int alarmNo;
for (alarmNo = 0; alarmNo < SND_ALARM_NUM; alarmNo++) {
SNDi_Work.alarm[alarmNo].enable = FALSE;
SNDi_Work.alarm[alarmNo].id = 0;
}
}
void SND_SetupAlarm (int alarmNo, OSTick tick, OSTick period, int id)
{
SNDAlarm * alarm;
SDK_MINMAX_ASSERT(alarmNo, SND_ALARM_MIN, SND_ALARM_MAX);
SDK_MINMAX_ASSERT(id, 0x00, 0xff);
alarm = &SNDi_Work.alarm[alarmNo];
if (alarm->enable) {
OS_CancelAlarm(&alarm->alarm);
alarm->enable = FALSE;
}
alarm->setting.tick = tick;
alarm->setting.period = period;
alarm->id = (u8)id;
}
void SND_StartAlarm (int alarmNo)
{
OSTick tick;
OSTick period;
SNDAlarm * alarm;
void * arg;
SDK_MINMAX_ASSERT(alarmNo, SND_ALARM_MIN, SND_ALARM_MAX);
alarm = &SNDi_Work.alarm[alarmNo];
if (alarm->enable) {
OS_CancelAlarm(&alarm->alarm);
alarm->enable = FALSE;
}
tick = alarm->setting.tick;
period = alarm->setting.period;
arg = (void *)((alarm->id << 8) | alarmNo);
OS_CreateAlarm(&alarm->alarm);
if (period == 0) {
OS_SetAlarm(&alarm->alarm, tick, AlarmHandler, arg);
} else {
OS_SetPeriodicAlarm(&alarm->alarm, OS_GetTick() + tick, period, AlarmHandler, arg);
}
alarm->enable = TRUE;
}
void SND_StopAlarm (int alarmNo)
{
SNDAlarm * alarm;
SDK_MINMAX_ASSERT(alarmNo, SND_ALARM_MIN, SND_ALARM_MAX);
alarm = &SNDi_Work.alarm[alarmNo];
if (!alarm->enable)
return;
OS_CancelAlarm(&alarm->alarm);
alarm->id++;
alarm->enable = FALSE;
}
#endif
#ifdef SDK_ARM7
static void AlarmHandler (void * arg)
{
while (PXI_SendWordByFifo(PXI_FIFO_TAG_SOUND, (u32)arg, FALSE) < 0) {
}
}
#endif
#ifdef SDK_ARM9
void Sndi_IncAlarmId (int alarmNo)
{
AlarmCallbackInfo * info;
SDK_MINMAX_ASSERT(alarmNo, SND_ALARM_MIN, SND_ALARM_MAX);
info = &sCallbackTable[alarmNo];
info->id++;
}
u8 Sndi_SetAlarmHandler (int alarmNo, SNDAlarmHandler handler, void * arg)
{
AlarmCallbackInfo * info;
SDK_MINMAX_ASSERT(alarmNo, SND_ALARM_MIN, SND_ALARM_MAX);
info = &sCallbackTable[alarmNo];
info->func = handler;
info->arg = arg;
info->id++;
return info->id;
}
void Sndi_CallAlarmHandler (int msg)
{
AlarmCallbackInfo * info;
int alarmNo = msg & 0xff;
int id = (msg >> 8) & 0xff;
SDK_MINMAX_ASSERT(alarmNo, SND_ALARM_MIN, SND_ALARM_MAX);
info = &sCallbackTable[alarmNo];
if (id == info->id) {
if (info->func != NULL) {
info->func(info->arg);
}
}
}
#endif

5
lib/NitroSDK/src/snd/snd_bank.c
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@@ -1,10 +1,5 @@
#include <nitro.h>
static u8 MI_ReadByte (const void * address)
{
return *(u8 *)address;
}
#ifdef _MSC_VER
#pragma warning(disable : 4018)
#pragma warning(disable : 4311)

144
lib/NitroSDK/src/std/string.c Normal file
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@@ -0,0 +1,144 @@
#include <nitro.h>
#ifndef SDK_FINALROM
char * Std_CopyString (char * destp, const char * srcp)
{
char * retval = destp;
SDK_ASSERT(destp && srcp);
while (*srcp) {
*destp++ = (char)*srcp++;
}
*destp = '\0';
return retval;
}
int Std_CopyLStringZeroFill (char * destp, const char * srcp, int n)
{
int i;
const char * s = srcp;
SDK_ASSERT(destp && srcp && n >= 0);
for (i = 0; i < n - 1; i++) {
destp[i] = (char)*s;
if (*s) {
s++;
}
}
destp[i] = '\0';
return Std_GetStringLength(srcp);
}
#endif
int Std_CopyLString (char * destp, const char * srcp, int siz)
{
int i;
const char * s = srcp;
SDK_ASSERT(destp && srcp && siz >= 0);
for (i = 0; i < siz - 1; i++) {
destp[i] = (char)*s;
if (*s) {
s++;
} else {
break;
}
}
if ((i >= siz - 1) && (siz != 0)) {
destp[i] = '\0';
}
return Std_GetStringLength(srcp);
}
#ifndef SDK_FINALROM
char * Std_SearchString (const char * srcp, const char * str)
{
int i;
int n;
SDK_ASSERT(srcp && str);
for (i = 0; srcp[i]; i++) {
n = 0;
while (str[n] && srcp[i + n] == str[n]) {
n++;
}
if (str[n] == '\0') {
return (char *)&srcp[i];
}
}
return NULL;
}
#endif
int Std_GetStringLength (const char * str)
{
int n = 0;
while (str[n]) {
n++;
}
return n;
}
#ifndef SDK_FINALROM
char * Std_ConcatenateString (char * str1, const char * str2)
{
int n = Std_GetStringLength(str1);
(void)Std_CopyString(&str1[n], str2);
return str1;
}
#endif
int Std_CompareString__020852CC (const char * str1, const char * str2)
{
while (*str1 == *str2 && *str1) {
str1++;
str2++;
}
return (*str1 - *str2);
}
int Std_CompareNString (const char * str1, const char * str2, int len)
{
if (len) {
int i;
for (i = 0; i < len; ++i) {
int c = (int)(MI_ReadByte(str1 + i));
int d = (int)(MI_ReadByte(str2 + i));
if (c != d) {
return (int)(c - d);
}
}
}
return 0;
}
#ifndef SDK_FINALROM
int Std_CompareLString (const char * str1, const char * str2)
{
return Std_CompareNString(str1, str2, Std_GetStringLength(str2));
}
#endif
SDK_WEAK_SYMBOL int Std_TsScanf (const char * src, const char * fmt, ...)
{
int ret;
va_list va;
va_start(va, fmt);
ret = Std_TvsScanf(src, fmt, va);
va_end(va);
return ret;
}

1
lib/include/nitro.h
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@@ -11,5 +11,6 @@
#include <nitro/rtc.h>
#include <nitro/snd.h>
#include <nitro/spi.h>
#include <nitro/std.h>
#endif //NITRO_H_

19
lib/include/nitro/dgt/common.h Normal file
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@@ -0,0 +1,19 @@
#ifndef NITRO_DGT_COMMON_H_
#define NITRO_DGT_COMMON_H_
#ifdef __cplusplus
extern "C" {
#endif
#define DGT_HASH1_DIGEST_SIZE (128 / 8)
#define DGT_HASH2_DIGEST_SIZE (160 / 8)
#define DGT_HASH_DIGEST_SIZE_MAX DGT_HASH2_DIGEST_SIZE
#define DGT_HASH_BLOCK_SIZE (512 / 8)
#ifdef __cplusplus
}
#endif
#endif

77
lib/include/nitro/dgt/dgt.h Normal file
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@@ -0,0 +1,77 @@
#ifndef NITRO_DGT_DGT_H_
#define NITRO_DGT_DGT_H_
#include <nitro/dgt/common.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef struct DGTHash1Context {
union {
struct {
unsigned long a, b, c, d;
};
unsigned long state[4];
};
unsigned long long length;
union {
unsigned long buffer32[16];
unsigned char buffer8[64];
};
} DGTHash1Context;
#if defined(SDK_DGT_HASH2_CODE_SAFE) || defined(SDK_WIN32) || defined(SDK_FROM_TOOL)
typedef struct DGTHash2Context {
unsigned long Intermediate_Hash[5];
unsigned long Length_Low;
unsigned long Length_High;
int Message_Block_Index;
unsigned char Message_Block[64];
int Computed;
int Corrupted;
} DGTHash2Context;
#else
typedef struct DGTHash2Context {
unsigned long h0, h1, h2, h3, h4;
unsigned long Nl, Nh;
int num;
unsigned long data[64 / 4];
int dummy[2];
} DGTHash2Context;
#endif
#ifdef SDK_DGT_HASH1_CODE_SAFE
void DGT_Hash1Reset(DGTHash1Context *);
void DGT_Hash1SetSource(DGTHash1Context *, unsigned char *, unsigned long);
void DGT_Hash1GetDigest_R(unsigned char digest[16], DGTHash1Context *);
#else
void DGT_Hash1Reset(DGTHash1Context *);
void DGT_Hash1SetSource(DGTHash1Context *, const void *, unsigned long);
void DGT_Hash1GetDigest_R(void * digest, DGTHash1Context *);
#endif
#if defined(SDK_DGT_HASH2_CODE_SAFE) || defined(SDK_WIN32) || defined(SDK_FROM_TOOL)
void DGT_Hash2Reset(DGTHash2Context *);
void DGT_Hash2SetSource(DGTHash2Context *, unsigned char *, unsigned long);
void DGT_Hash2GetDigest(DGTHash2Context *, unsigned char digest[20]);
#else
void DGT_Hash2Reset(DGTHash2Context *);
void DGT_Hash2SetSource(DGTHash2Context *, const unsigned char *, unsigned long);
void DGT_Hash2GetDigest(DGTHash2Context *, unsigned char * digest);
#endif
void DGT_Hash1CalcHmac(void * digest, void * bin_ptr, int bin_len, void * key_ptr, int key_len);
void DGT_Hash2CalcHmac(void * digest, void * bin_ptr, int bin_len, void * key_ptr, int key_len);
int DGT_Hash1CalcHmacForRms(void * digest, void * romh_ptr, int romh_len, void * mbin_ptr, int mbin_len, void * sbin_ptr, int sbin_len, void * key_ptr, int key_len);
int DGT_Hash2CalcHmacForRms(void * digest, void * romh_ptr, int romh_len, void * mbin_ptr, int mbin_len, void * sbin_ptr, int sbin_len, void * key_ptr, int key_len);
int DGT_Hash1TestHmacForRms(void * digest, void * romh_ptr, int romh_len, void * mbin_ptr, int mbin_len, void * sbin_ptr, int sbin_len, void * key_ptr, int key_len);
int DGT_Hash2TestHmacForRms(void * digest, void * romh_ptr, int romh_len, void * mbin_ptr, int mbin_len, void * sbin_ptr, int sbin_len, void * key_ptr, int key_len);
int DGT_SetOverlayTableMode(int flag);
#ifdef __cplusplus
}
#endif
#endif

5
lib/include/nitro/gx.h
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@@ -5,5 +5,10 @@
#include <nitro/gx/g2.h>
#include <nitro/gx/g3.h>
#include <nitro/gx/g3imm.h>
#include <nitro/gx/g3x.h>
#include <nitro/gx/gx.h>
#include <nitro/gx/gx_bgcnt.h>
#include <nitro/gx/gxstate.h>
#include <nitro/gx/gx_vramcnt.h>
#endif //NITRO_GX_H_

280
lib/include/nitro/gx/g3x.h Normal file
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@@ -0,0 +1,280 @@
#ifndef NITRO_G3X_H_
#define NITRO_G3X_H_
#include <nitro/gx/gxcommon.h>
#include <nitro/hw/ARM9/io_reg.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
GX_SHADING_TOON = 0,
GX_SHADING_HIGHLIGHT = 1
} GXShading;
#define GX_SHADING_ASSERT(x) \
SDK_MINMAX_ASSERT(x, GX_SHADING_TOON, GX_SHADING_HIGHLIGHT)
typedef enum {
GX_FOGBLEND_COLOR_ALPHA = 0,
GX_FOGBLEND_ALPHA = 1
} GXFogBlend;
#define GX_FOGBLEND_ASSERT(x) \
SDK_MINMAX_ASSERT(x, GX_FOGBLEND_COLOR_ALPHA, GX_FOGBLEND_ALPHA)
typedef enum {
GX_FOGSLOPE_0x8000 = 0,
GX_FOGSLOPE_0x4000 = 1,
GX_FOGSLOPE_0x2000 = 2,
GX_FOGSLOPE_0x1000 = 3,
GX_FOGSLOPE_0x0800 = 4,
GX_FOGSLOPE_0x0400 = 5,
GX_FOGSLOPE_0x0200 = 6,
GX_FOGSLOPE_0x0100 = 7,
GX_FOGSLOPE_0x0080 = 8,
GX_FOGSLOPE_0x0040 = 9,
GX_FOGSLOPE_0x0020 = 10
} GXFogSlope;
#define GX_FOGSLOPE_ASSERT(x) \
SDK_MINMAX_ASSERT(x, GX_FOGSLOPE_0x8000, GX_FOGSLOPE_0x0020)
typedef enum {
GX_FIFOINTR_COND_DISABLE = 0,
GX_FIFOINTR_COND_UNDERHALF = 1,
GX_FIFOINTR_COND_EMPTY = 2
} GXFifoIntrCond;
#define GX_FIFOINTR_COND_ASSERT(x) \
SDK_MINMAX_ASSERT(x, GX_FIFOINTR_COND_DISABLE, GX_FIFOINTR_COND_EMPTY)
typedef enum {
GX_FIFOSTAT_EMPTY = 6,
GX_FIFOSTAT_UNDERHALF = 2,
GX_FIFOSTAT_OVERHALF = 0,
GX_FIFOSTAT_FULL = 1
} GXFifoStat;
#define GX_RDLINES_COUNT_MAX 46
#define GX_LISTRAM_COUNT_MAX 2048
#define GX_VTXRAM_COUNT_MAX 6144
#if !(defined(SDK_WIN32) || defined(SDK_FROM_TOOL))
void G3X_Init(void);
void G3X_InitMtxStack(void);
void G3X_ResetMtxStack(void);
void G3X_InitTable(void);
void G3X_Reset(void);
static void G3X_SetShading(GXShading shading);
static void G3X_AlphaTest(BOOL enable, int ref);
static void G3X_AlphaBlend(BOOL enable);
static void G3X_AntiAlias(BOOL enable);
static void G3X_EdgeMarking(BOOL enable);
void G3X_SetFog(BOOL enable, GXFogBlend fogMode, GXFogSlope fogSlope, int fogOffset);
int G3X_GetMtxStackLevelPV(s32 * level);
int G3X_GetMtxStackLevelPJ(s32 * level);
static void G3X_SetFifoIntrCond(GXFifoIntrCond cond);
void G3X_SetDisp1DotDepth(fx32 w);
int G3X_GetBoxTestResult(s32 * in);
int G3X_GetPositionTestResult(VecFx32 * vec, fx32 * w);
int G3X_GetVectorTestResult(fx16 * vec);
int G3X_GetClipMtx(MtxFx44 * m);
int G3X_GetVectorMtx(MtxFx33 * m);
void G3X_SetHOffset(int hOffset);
void G3X_SetEdgeColorTable(const GXRgb * rgb_8);
void G3X_SetFogTable(const u32 * fogTable);
void G3X_SetToonTable(const GXRgb * rgb_32);
void G3X_SetClearColor(GXRgb rgb, int alpha, int depth, int polygonID, BOOL fog);
static void G3X_SetClearImageOffset(int xOffset, int yOffset);
static void G3X_SetFogColor(GXRgb rgb, int alpha);
static s32 G3X_IsMtxStackOverflow(s32 * overflow);
static s32 G3X_IsLineBufferUnderflow(void);
static s32 G3X_IsListRamOverflow(void);
static s32 G3X_IsGeometryBusy(void);
static void G3X_ResetMtxStackOverflow(void);
static void G3X_ResetLineBufferUnderflow(void);
static void G3X_ResetListRamOverflow(void);
void G3X_ClearFifo(void);
static s32 G3X_GetPolygonListRamCount(void);
static s32 G3X_GetVtxListRamCount(void);
static s32 G3X_GetRenderedLineCount(void);
static s32 G3X_GetCommandFifoCount(void);
static GXFifoStat G3X_GetCommandFifoStatus(void);
static inline void G3X_SetShading (GXShading shading)
{
reg_G3X_DISP3DCNT = (u16)((reg_G3X_DISP3DCNT & ~(REG_G3X_DISP3DCNT_THS_MASK |
REG_G3X_DISP3DCNT_RO_MASK |
REG_G3X_DISP3DCNT_GO_MASK)) |
(shading << REG_G3X_DISP3DCNT_THS_SHIFT));
}
static inline void G3X_AlphaTest (BOOL enable, int ref)
{
if (enable) {
GX_ALPHA_ASSERT(ref);
reg_G3X_DISP3DCNT = (u16)(reg_G3X_DISP3DCNT &
~(REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK) |
REG_G3X_DISP3DCNT_ATE_MASK);
reg_G3X_ALPHA_TEST_REF = (u16)ref;
} else {
reg_G3X_DISP3DCNT &= (u16) ~(REG_G3X_DISP3DCNT_ATE_MASK |
REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK);
}
}
static inline void G3X_AlphaBlend (BOOL enable)
{
if (enable) {
reg_G3X_DISP3DCNT = (u16)(reg_G3X_DISP3DCNT &
~(REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK) |
REG_G3X_DISP3DCNT_ABE_MASK);
} else {
reg_G3X_DISP3DCNT &= (u16) ~(REG_G3X_DISP3DCNT_ABE_MASK |
REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK);
}
}
static inline void G3X_AntiAlias (BOOL enable)
{
if (enable) {
reg_G3X_DISP3DCNT = (u16)(reg_G3X_DISP3DCNT &
~(REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK) |
REG_G3X_DISP3DCNT_AAE_MASK);
} else {
reg_G3X_DISP3DCNT &= (u16) ~(REG_G3X_DISP3DCNT_AAE_MASK |
REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK);
}
}
static inline void G3X_EdgeMarking (BOOL enable)
{
if (enable) {
reg_G3X_DISP3DCNT = (u16)(reg_G3X_DISP3DCNT &
~(REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK) |
REG_G3X_DISP3DCNT_EME_MASK);
} else {
reg_G3X_DISP3DCNT &= (u16) ~(REG_G3X_DISP3DCNT_EME_MASK |
REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK);
}
}
static inline void G3X_SetFifoIntrCond (GXFifoIntrCond cond)
{
GX_FIFOINTR_COND_ASSERT(cond);
reg_G3X_GXSTAT = ((reg_G3X_GXSTAT & ~REG_G3X_GXSTAT_FI_MASK) |
(cond << REG_G3X_GXSTAT_FI_SHIFT));
}
static inline void G3X_SetClearImageOffset (int xOffset, int yOffset)
{
reg_G3X_CLRIMAGE_OFFSET = (u16)(((xOffset << REG_G3X_CLRIMAGE_OFFSET_OFFSETX_SHIFT) &
REG_G3X_CLRIMAGE_OFFSET_OFFSETX_MASK) | ((yOffset <<
REG_G3X_CLRIMAGE_OFFSET_OFFSETY_SHIFT)
&
REG_G3X_CLRIMAGE_OFFSET_OFFSETY_MASK));
}
static inline void G3X_SetFogColor (GXRgb rgb, int alpha)
{
GXRGB_ASSERT(rgb);
GX_ALPHA_ASSERT(alpha);
reg_G3X_FOG_COLOR = (u32)((rgb << REG_G3X_FOG_COLOR_FOG_RED_SHIFT) |
(alpha << REG_G3X_FOG_COLOR_FOG_ALPHA_SHIFT));
}
static inline s32 G3X_IsMtxStackOverflow (s32 * overflow)
{
SDK_NULL_ASSERT(overflow);
if (reg_G3X_GXSTAT & REG_G3X_GXSTAT_SB_MASK) {
return -1;
}
*overflow = (s32)(reg_G3X_GXSTAT & REG_G3X_GXSTAT_SE_MASK);
return 0;
}
#define G3X_IsLineBufferOverflow G3X_IsLineBufferUnderflow
static inline s32 G3X_IsLineBufferUnderflow (void)
{
return (reg_G3X_DISP3DCNT & REG_G3X_DISP3DCNT_RO_MASK);
}
static inline s32 G3X_IsListRamOverflow (void)
{
return (reg_G3X_DISP3DCNT & REG_G3X_DISP3DCNT_GO_MASK);
}
static inline s32 G3X_IsGeometryBusy (void)
{
return (s32)(reg_G3X_GXSTAT & REG_G3X_GXSTAT_B_MASK);
}
static inline void G3X_ResetMtxStackOverflow (void)
{
reg_G3X_GXSTAT |= REG_G3X_GXSTAT_SE_MASK;
}
#define G3X_ResetLineBufferOverflow G3X_ResetLineBufferUnderflow
static inline void G3X_ResetLineBufferUnderflow (void)
{
reg_G3X_DISP3DCNT |= REG_G3X_DISP3DCNT_RO_MASK;
}
static inline void G3X_ResetListRamOverflow (void)
{
reg_G3X_DISP3DCNT |= REG_G3X_DISP3DCNT_GO_MASK;
}
static inline s32 G3X_GetPolygonListRamCount (void)
{
return reg_G3X_LISTRAM_COUNT;
}
static inline s32 G3X_GetVtxListRamCount (void)
{
return reg_G3X_VTXRAM_COUNT;
}
static inline s32 G3X_GetRenderedLineCount (void)
{
return reg_G3X_RDLINES_COUNT;
}
static inline s32 G3X_GetCommandFifoCount (void)
{
return (s32)((reg_G3X_GXSTAT & REG_G3X_GXSTAT_FIFOCNT_MASK) >> REG_G3X_GXSTAT_FIFOCNT_SHIFT);
}
static inline GXFifoStat G3X_GetCommandFifoStatus (void)
{
return (GXFifoStat)((reg_G3X_GXSTAT & (REG_G3X_GXSTAT_F_MASK |
REG_G3X_GXSTAT_H_MASK |
REG_G3X_GXSTAT_E_MASK)) >> REG_G3X_GXSTAT_F_SHIFT);
}
#endif
#ifdef __cplusplus
}
#endif
#endif

678
lib/include/nitro/gx/gx.h Normal file
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#ifndef NITRO_GX_GX_H_
#define NITRO_GX_GX_H_
#include <nitro/gx/gxcommon.h>
#include <nitro/hw/ARM9/io_reg.h>
#if !(defined(SDK_WIN32) || defined(SDK_FROM_TOOL))
#include <nitro/mi.h>
#endif
#ifdef __cplusplus
extern "C" {
#endif
#define GX_LCD_SIZE_X 256
#define GX_LCD_SIZE_Y 192
typedef union {
u32 raw;
struct {
u32 bgMode :3;
u32 bg0_2d3d :1;
u32 objMapChar :1;
u32 objMapBmp :2;
u32 blankScr :1;
u32 visiblePlane :5;
u32 visibleWnd :3;
u32 dispMode :4;
u32 extObjMapChar :2;
u32 extObjMapBmp :1;
u32 hBlankObjProc :1;
u32 bgCharOffset :3;
u32 bgScrOffset :3;
u32 bgExtPltt :1;
u32 objExtPltt :1;
};
} GXDispCnt;
typedef union {
u32 raw;
struct {
u32 bgMode :3;
u32 _reserve1 :1;
u32 objMapChar :1;
u32 objMapBmp :2;
u32 blankScr :1;
u32 visiblePlane :5;
u32 visibleWnd :3;
u32 dispMode :1;
u32 _reserve2 :3;
u32 extObjMapChar :2;
u32 _reserve3 :1;
u32 hBlankObjProc :1;
u32 _reserve4 :6;
u32 bgExtPltt :1;
u32 objExtPltt :1;
};
} GXSDispCnt;
typedef enum {
GX_BGMODE_0 = 0,
GX_BGMODE_1 = 1,
GX_BGMODE_2 = 2,
GX_BGMODE_3 = 3,
GX_BGMODE_4 = 4,
GX_BGMODE_5 = 5,
GX_BGMODE_6 = 6
} GXBGMode;
#define GX_BGMODE_ASSERT(x) \
SDK_MINMAX_ASSERT(x, GX_BGMODE_0, GX_BGMODE_6)
typedef enum {
GX_BG0_AS_2D = 0,
GX_BG0_AS_3D = 1
} GXBG0As;
#define GX_BG0_AS_ASSERT(x) \
SDK_MINMAX_ASSERT(x, GX_BG0_AS_2D, GX_BG0_AS_3D)
typedef enum {
GX_DISPMODE_GRAPHICS = 0x01,
GX_DISPMODE_VRAM_A = 0x02,
GX_DISPMODE_VRAM_B = 0x06,
GX_DISPMODE_VRAM_C = 0x0a,
GX_DISPMODE_VRAM_D = 0x0e,
GX_DISPMODE_MMEM = 0x03
} GXDispMode;
#define GX_DISPMODE_OFF ((GXDispMode)0x00)
#define GX_DISPMODE_ASSERT(x) \
SDK_ASSERT((x) == GX_DISPMODE_OFF || \
(x) == GX_DISPMODE_GRAPHICS || \
(x) == GX_DISPMODE_VRAM_A || \
(x) == GX_DISPMODE_VRAM_B || \
(x) == GX_DISPMODE_VRAM_C || \
(x) == GX_DISPMODE_VRAM_D || \
(x) == GX_DISPMODE_MMEM)
typedef enum {
GX_OBJVRAMMODE_CHAR_2D = (0 << REG_GX_DISPCNT_OBJMAP_SHIFT) | (0 << REG_GX_DISPCNT_EXOBJ_SHIFT),
GX_OBJVRAMMODE_CHAR_1D_32K = (1 << REG_GX_DISPCNT_OBJMAP_SHIFT) | (0 << REG_GX_DISPCNT_EXOBJ_SHIFT),
GX_OBJVRAMMODE_CHAR_1D_64K = (1 << REG_GX_DISPCNT_OBJMAP_SHIFT) | (1 << REG_GX_DISPCNT_EXOBJ_SHIFT),
GX_OBJVRAMMODE_CHAR_1D_128K = (1 << REG_GX_DISPCNT_OBJMAP_SHIFT) | (2 << REG_GX_DISPCNT_EXOBJ_SHIFT),
GX_OBJVRAMMODE_CHAR_1D_256K = (1 << REG_GX_DISPCNT_OBJMAP_SHIFT) | (3 << REG_GX_DISPCNT_EXOBJ_SHIFT)
} GXOBJVRamModeChar;
#define GX_OBJVRAMMODE_CHAR_ASSERT(x) \
SDK_ASSERT(x == GX_OBJVRAMMODE_CHAR_2D || \
x == GX_OBJVRAMMODE_CHAR_1D_32K || \
x == GX_OBJVRAMMODE_CHAR_1D_64K || \
x == GX_OBJVRAMMODE_CHAR_1D_128K || \
x == GX_OBJVRAMMODE_CHAR_1D_256K)
#define GXS_OBJVRAMMODE_CHAR_ASSERT(x) \
SDK_ASSERT(x == GX_OBJVRAMMODE_CHAR_2D || \
x == GX_OBJVRAMMODE_CHAR_1D_32K || \
x == GX_OBJVRAMMODE_CHAR_1D_64K || \
x == GX_OBJVRAMMODE_CHAR_1D_128K)
typedef enum {
GX_OBJVRAMMODE_BMP_2D_W128 = (0 << (REG_GX_DISPCNT_OBJMAP_SHIFT + 1)) | (0 << (REG_GX_DISPCNT_EXOBJ_SHIFT + 2)),
GX_OBJVRAMMODE_BMP_2D_W256 = (1 << (REG_GX_DISPCNT_OBJMAP_SHIFT + 1)) | (0 << (REG_GX_DISPCNT_EXOBJ_SHIFT + 2)),
GX_OBJVRAMMODE_BMP_1D_128K = (2 << (REG_GX_DISPCNT_OBJMAP_SHIFT + 1)) | (0 << (REG_GX_DISPCNT_EXOBJ_SHIFT + 2)),
GX_OBJVRAMMODE_BMP_1D_256K = (2 << (REG_GX_DISPCNT_OBJMAP_SHIFT + 1)) | (1 << (REG_GX_DISPCNT_EXOBJ_SHIFT + 2))
} GXOBJVRamModeBmp;
#define GX_OBJVRAMMODE_BMP_2D_W128_32K GX_OBJVRAMMODE_BMP_2D_W128
#define GX_OBJVRAMMODE_BMP_2D_W256_32K GX_OBJVRAMMODE_BMP_2D_W256
#define GX_OBJVRAMMODE_BMP_ASSERT(x) \
SDK_ASSERT(x == GX_OBJVRAMMODE_BMP_2D_W128_32K || \
x == GX_OBJVRAMMODE_BMP_2D_W256_32K || \
x == GX_OBJVRAMMODE_BMP_1D_128K || \
x == GX_OBJVRAMMODE_BMP_1D_256K)
#define GXS_OBJVRAMMODE_BMP_ASSERT(x) \
SDK_ASSERT(x == GX_OBJVRAMMODE_BMP_2D_W128 || \
x == GX_OBJVRAMMODE_BMP_2D_W256 || \
x == GX_OBJVRAMMODE_BMP_1D_128K)
typedef enum {
GX_PLANEMASK_NONE = 0x00,
GX_PLANEMASK_BG0 = 0x01,
GX_PLANEMASK_BG1 = 0x02,
GX_PLANEMASK_BG2 = 0x04,
GX_PLANEMASK_BG3 = 0x08,
GX_PLANEMASK_OBJ = 0x10
} GXPlaneMask;
#define GX_PLANEMASK_ASSERT(x) SDK_MINMAX_ASSERT(x, GX_PLANEMASK_NONE, 0x1f)
typedef enum {
GX_WNDMASK_NONE = 0x00,
GX_WNDMASK_W0 = 0x01,
GX_WNDMASK_W1 = 0x02,
GX_WNDMASK_OW = 0x04
} GXWndMask;
#define GX_WNDMASK_ASSERT(x) SDK_MINMAX_ASSERT(x, GX_WNDMASK_NONE, 0x7)
typedef enum {
GX_BGCHAROFFSET_0x00000 = 0x00,
GX_BGCHAROFFSET_0x10000 = 0x01,
GX_BGCHAROFFSET_0x20000 = 0x02,
GX_BGCHAROFFSET_0x30000 = 0x03,
GX_BGCHAROFFSET_0x40000 = 0x04,
GX_BGCHAROFFSET_0x50000 = 0x05,
GX_BGCHAROFFSET_0x60000 = 0x06,
GX_BGCHAROFFSET_0x70000 = 0x07
} GXBGCharOffset;
#define GX_BGCHAROFFSET_ASSERT(x) \
SDK_MINMAX_ASSERT(x, GX_BGCHAROFFSET_0x00000, GX_BGCHAROFFSET_0x70000)
typedef enum {
GX_BGSCROFFSET_0x00000 = 0x00,
GX_BGSCROFFSET_0x10000 = 0x01,
GX_BGSCROFFSET_0x20000 = 0x02,
GX_BGSCROFFSET_0x30000 = 0x03,
GX_BGSCROFFSET_0x40000 = 0x04,
GX_BGSCROFFSET_0x50000 = 0x05,
GX_BGSCROFFSET_0x60000 = 0x06,
GX_BGSCROFFSET_0x70000 = 0x07
} GXBGScrOffset;
#define GX_BGSCROFFSET_ASSERT(x) \
SDK_MINMAX_ASSERT(x, GX_BGSCROFFSET_0x00000, GX_BGSCROFFSET_0x70000)
typedef enum {
GX_POWER_OFF = 0,
GX_POWER_2D_MAIN = 1 << REG_GX_POWCNT_E2DG_SHIFT,
GX_POWER_2D_SUB = 1 << REG_GX_POWCNT_E2DGB_SHIFT,
GX_POWER_RE = 1 << REG_GX_POWCNT_RE_SHIFT,
GX_POWER_GE = 1 << REG_GX_POWCNT_GE_SHIFT,
GX_POWER_2D = GX_POWER_2D_MAIN | GX_POWER_2D_SUB,
GX_POWER_3D = GX_POWER_RE | GX_POWER_GE,
GX_POWER_ALL = GX_POWER_2D | GX_POWER_3D
} GXPower;
#define GX_POWER_ASSERT(x) SDK_ASSERTMSG((((x) & ~GX_POWER_ALL) == 0), \
"GX_POWER_LCD is obsolete. please use PM_SetLCDPower()\n")
typedef enum {
GX_DISP_SELECT_SUB_MAIN = 0,
GX_DISP_SELECT_MAIN_SUB = 1
} GXDispSelect;
#define GX_DISP_SELECT_ASSERT(x) SDK_MINMAX_ASSERT(x, 0, 1)
#if !(defined(SDK_WIN32) || defined(SDK_FROM_TOOL))
static void GX_SetPower(int gxbit_power);
static GXPower GX_GetPower(void);
static void GX_Power2DMain(BOOL enable);
static void GX_Power2DSub(BOOL enable);
static void GX_PowerRender(BOOL enable);
static void GX_PowerGeometry(BOOL enable);
static void GXi_PowerLCD(BOOL enable);
static void GX_Power2D(BOOL enable);
static void GX_Power3D(BOOL enable);
static void GX_SetDispSelect(GXDispSelect sel);
static GXDispSelect GX_GetDispSelect(void);
static s32 GX_IsHBlank(void);
s32 GX_HBlankIntr(BOOL enable);
static s32 GX_IsVBlank(void);
s32 GX_VBlankIntr(BOOL enable);
static s32 GX_IsVCountEq(void);
static void GX_VCountEqIntr(BOOL enable);
void GX_SetVCountEqVal(s32 val);
static s32 GX_GetVCountEqVal(void);
#define GX_IsVCounterEq GX_IsVCountEq
#define GX_VCounterEqIntr GX_VCountEqIntr
#define GX_SetVCounterEqVal GX_SetVCountEqVal
#define GX_GetVCounterEqVal GX_GetVCountEqVal
//static s32 GX_GetVCount(void); // TODO: Check this later
static void GX_SetVCount(s32 count);
void GX_Init(void);
static void GX_InitEx(u32 dma_no);
u32 GX_SetDefaultDMA(u32 dma_no);
static u32 GX_GetDefaultDMA(void);
void GX_SetGraphicsMode(GXDispMode dispMode, GXBGMode bgMode, GXBG0As bg0_2d3d);
void GX_DispOff(void);
void GX_DispOn(void);
BOOL GX_IsDispOn(void);
static void GX_SetVisiblePlane(int plane);
static void GX_SetVisibleWnd(int window);
static void GX_BlankScr(BOOL blank);
static GXBGScrOffset GX_GetBGScrOffset();
static void GX_SetBGScrOffset(GXBGScrOffset offset);
static GXBGCharOffset GX_GetBGCharOffset();
static void GX_SetBGCharOffset(GXBGCharOffset offset);
static void GX_SetOBJVRamModeChar(GXOBJVRamModeChar mode);
static void GX_SetOBJVRamModeBmp(GXOBJVRamModeBmp mode);
static void GX_HBlankOBJProc(BOOL proc);
static void GX_SetMasterBrightness(int brightness);
void GXS_SetGraphicsMode(GXBGMode bgMode);
static void GXS_DispOff(void);
static void GXS_DispOn(void);
static void GXS_SetVisiblePlane(int plane);
static void GXS_SetVisibleWnd(int window);
static void GXS_SetOBJVRamModeChar(GXOBJVRamModeChar mode);
static void GXS_SetOBJVRamModeBmp(GXOBJVRamModeBmp mode);
static void GXS_HBlankOBJProc(BOOL proc);
static void GXS_SetMasterBrightness(int brightness);
void GXx_SetMasterBrightness_(vu16 * reg, int brightness);
int GXx_GetMasterBrightness_(vu16 * reg);
// static inline GXDispCnt GX_GetDispCnt (void)
// {
// return *(volatile GXDispCnt *)REG_DISPCNT_ADDR;
// }
//
// static inline GXSDispCnt GXS_GetDispCnt (void)
// {
// return *(volatile GXSDispCnt *)REG_DB_DISPCNT_ADDR;
// }
//
// static inline GXBGScrOffset GX_GetBGScrOffset ()
// {
// return (GXBGScrOffset)((reg_GX_DISPCNT & REG_GX_DISPCNT_BGSCREENOFFSET_MASK) >>
// REG_GX_DISPCNT_BGSCREENOFFSET_SHIFT);
// }
//
// static inline void GX_SetBGScrOffset (GXBGScrOffset offset)
// {
// GX_BGSCROFFSET_ASSERT(offset);
// reg_GX_DISPCNT = (u32)((reg_GX_DISPCNT & ~REG_GX_DISPCNT_BGSCREENOFFSET_MASK) |
// (offset << REG_GX_DISPCNT_BGSCREENOFFSET_SHIFT));
// }
//
// static inline GXBGCharOffset GX_GetBGCharOffset ()
// {
// return (GXBGCharOffset)((reg_GX_DISPCNT & REG_GX_DISPCNT_BGCHAROFFSET_MASK)
// >> REG_GX_DISPCNT_BGCHAROFFSET_SHIFT);
// }
//
// static inline void GX_SetBGCharOffset (GXBGCharOffset offset)
// {
// GX_BGCHAROFFSET_ASSERT(offset);
// reg_GX_DISPCNT = (u32)((reg_GX_DISPCNT & ~REG_GX_DISPCNT_BGCHAROFFSET_MASK) |
// (offset << REG_GX_DISPCNT_BGCHAROFFSET_SHIFT));
// }
//
// static inline void GX_SetVisiblePlane (int plane)
// {
// GX_PLANEMASK_ASSERT(plane);
//
// reg_GX_DISPCNT = (u32)((reg_GX_DISPCNT & ~REG_GX_DISPCNT_DISPLAY_MASK) |
// (plane << REG_GX_DISPCNT_DISPLAY_SHIFT));
// }
//
// static inline int GX_GetVisiblePlane (void)
// {
// return (int)((reg_GX_DISPCNT & REG_GX_DISPCNT_DISPLAY_MASK) >> REG_GX_DISPCNT_DISPLAY_SHIFT);
// }
//
// static inline void GXS_SetVisiblePlane (int plane)
// {
// GX_PLANEMASK_ASSERT(plane);
//
// reg_GXS_DB_DISPCNT = (u32)((reg_GXS_DB_DISPCNT & ~REG_GXS_DB_DISPCNT_DISPLAY_MASK) |
// (plane << REG_GXS_DB_DISPCNT_DISPLAY_SHIFT));
// }
//
// static inline int GXS_GetVisiblePlane (void)
// {
// return (int)((reg_GXS_DB_DISPCNT & REG_GXS_DB_DISPCNT_DISPLAY_MASK)
// >> REG_GXS_DB_DISPCNT_DISPLAY_SHIFT);
// }
//
// static inline void GX_SetVisibleWnd (int window)
// {
// GX_WNDMASK_ASSERT(window);
//
// reg_GX_DISPCNT = (u32)((reg_GX_DISPCNT &
// ~(REG_GX_DISPCNT_W0_MASK |
// REG_GX_DISPCNT_W1_MASK |
// REG_GX_DISPCNT_OW_MASK)) | (window << REG_GX_DISPCNT_W0_SHIFT));
// }
//
// static inline int GX_GetVisibleWnd (void)
// {
// return (int)((reg_GX_DISPCNT & (REG_GX_DISPCNT_W0_MASK |
// REG_GX_DISPCNT_W1_MASK |
// REG_GX_DISPCNT_OW_MASK)) >> REG_GX_DISPCNT_W0_SHIFT);
// }
//
// static inline void GXS_SetVisibleWnd (int window)
// {
// GX_WNDMASK_ASSERT(window);
//
// reg_GXS_DB_DISPCNT = (u32)((reg_GXS_DB_DISPCNT &
// ~(REG_GXS_DB_DISPCNT_W0_MASK |
// REG_GXS_DB_DISPCNT_W1_MASK |
// REG_GXS_DB_DISPCNT_OW_MASK)) |
// (window << REG_GXS_DB_DISPCNT_W0_SHIFT));
// }
//
// static inline int GXS_GetVisibleWnd (void)
// {
// return (int)((reg_GXS_DB_DISPCNT & (REG_GXS_DB_DISPCNT_W0_MASK |
// REG_GXS_DB_DISPCNT_W1_MASK |
// REG_GXS_DB_DISPCNT_OW_MASK))
// >> REG_GXS_DB_DISPCNT_W0_SHIFT);
// }
//
// static inline void GX_SetOBJVRamModeChar (GXOBJVRamModeChar mode)
// {
// GX_OBJVRAMMODE_CHAR_ASSERT(mode);
//
// reg_GX_DISPCNT = (u32)(reg_GX_DISPCNT &
// ~(REG_GX_DISPCNT_EXOBJ_CH_MASK | REG_GX_DISPCNT_OBJMAP_CH_MASK) | mode);
// }
//
// static inline GXOBJVRamModeChar GX_GetOBJVRamModeChar (void)
// {
// return (GXOBJVRamModeChar)(reg_GX_DISPCNT &
// (REG_GX_DISPCNT_EXOBJ_CH_MASK | REG_GX_DISPCNT_OBJMAP_CH_MASK));
// }
//
// static inline void GXS_SetOBJVRamModeChar (GXOBJVRamModeChar mode)
// {
// GXS_OBJVRAMMODE_CHAR_ASSERT(mode);
//
// reg_GXS_DB_DISPCNT = (u32)(reg_GXS_DB_DISPCNT &
// ~(REG_GXS_DB_DISPCNT_EXOBJ_CH_MASK |
// REG_GXS_DB_DISPCNT_OBJMAP_CH_MASK) | mode);
// }
//
// static inline GXOBJVRamModeChar GXS_GetOBJVRamModeChar (void)
// {
// return (GXOBJVRamModeChar)(reg_GXS_DB_DISPCNT &
// (REG_GXS_DB_DISPCNT_EXOBJ_CH_MASK |
// REG_GXS_DB_DISPCNT_OBJMAP_CH_MASK));
// }
//
// static inline void GX_SetOBJVRamModeBmp (GXOBJVRamModeBmp mode)
// {
// GX_OBJVRAMMODE_BMP_ASSERT(mode);
//
// reg_GX_DISPCNT = (u32)(reg_GX_DISPCNT &
// ~(REG_GX_DISPCNT_EXOBJ_BM_MASK | REG_GX_DISPCNT_OBJMAP_BM_MASK) | mode);
// }
//
// static inline GXOBJVRamModeBmp GX_GetOBJVRamModeBmp (void)
// {
// return (GXOBJVRamModeBmp)(reg_GX_DISPCNT &
// (REG_GX_DISPCNT_EXOBJ_BM_MASK | REG_GX_DISPCNT_OBJMAP_BM_MASK));
// }
//
// static inline void GXS_SetOBJVRamModeBmp (GXOBJVRamModeBmp mode)
// {
// GXS_OBJVRAMMODE_BMP_ASSERT(mode);
// reg_GXS_DB_DISPCNT = (u32)(reg_GXS_DB_DISPCNT & ~(REG_GXS_DB_DISPCNT_OBJMAP_BM_MASK) | mode);
// }
//
// static inline GXOBJVRamModeBmp GXS_GetOBJVRamModeBmp (void)
// {
// return (GXOBJVRamModeBmp)(reg_GXS_DB_DISPCNT & REG_GXS_DB_DISPCNT_OBJMAP_BM_MASK);
// }
//
// static inline void GX_BlankScr (BOOL blank)
// {
// SDK_WARNING((1 == 0), "GX_BlankScr is obsolete, please use GX_DispOn/GX_DispOff instead.");
// if (blank) {
// reg_GX_DISPCNT |= REG_GX_DISPCNT_BLANK_MASK;
// } else {
// reg_GX_DISPCNT &= ~REG_GX_DISPCNT_BLANK_MASK;
// }
// }
//
// static inline void GXS_DispOff (void)
// {
// reg_GXS_DB_DISPCNT &= ~REG_GXS_DB_DISPCNT_MODE_MASK;
// }
//
// static inline void GXS_DispOn (void)
// {
// reg_GXS_DB_DISPCNT |= REG_GXS_DB_DISPCNT_MODE_MASK;
// }
//
// static inline void GX_HBlankOBJProc (BOOL proc)
// {
// if (proc) {
// reg_GX_DISPCNT |= REG_GX_DISPCNT_OH_MASK;
// } else {
// reg_GX_DISPCNT &= ~REG_GX_DISPCNT_OH_MASK;
// }
// }
//
// static inline void GXS_HBlankOBJProc (BOOL proc)
// {
// if (proc) {
// reg_GXS_DB_DISPCNT |= REG_GXS_DB_DISPCNT_OH_MASK;
// } else {
// reg_GXS_DB_DISPCNT &= ~REG_GXS_DB_DISPCNT_OH_MASK;
// }
// }
//
// static inline void GX_SetMasterBrightness (int brightness)
// {
// GXx_SetMasterBrightness_(&reg_GX_MASTER_BRIGHT, brightness);
// }
//
// static inline int GX_GetMasterBrightness (void)
// {
// return GXx_GetMasterBrightness_(&reg_GX_MASTER_BRIGHT);
// }
//
// static inline void GXS_SetMasterBrightness (int brightness)
// {
// GXx_SetMasterBrightness_(&reg_GXS_DB_MASTER_BRIGHT, brightness);
// }
//
// static inline int GXS_GetMasterBrightness (void)
// {
// return GXx_GetMasterBrightness_(&reg_GXS_DB_MASTER_BRIGHT);
// }
//
// static inline s32 GX_IsHBlank (void)
// {
// return (reg_GX_DISPSTAT & REG_GX_DISPSTAT_HBLK_MASK);
// }
//
// static inline s32 GX_IsVBlank (void)
// {
// return (reg_GX_DISPSTAT & REG_GX_DISPSTAT_VBLK_MASK);
// }
//
// static inline s32 GX_IsVCountEq (void)
// {
// return (reg_GX_DISPSTAT & REG_GX_DISPSTAT_LYC_MASK);
// }
//
// static inline void GX_VCountEqIntr (BOOL enable)
// {
// if (enable) {
// reg_GX_DISPSTAT |= REG_GX_DISPSTAT_VQI_MASK;
// } else {
// reg_GX_DISPSTAT &= ~REG_GX_DISPSTAT_VQI_MASK;
// }
// }
// TODO: check this later
// static inline s32 GX_GetVCount ()
// {
// return reg_GX_VCOUNT;
// }
// static inline void GX_SetVCount (s32 count)
// {
// static vu32 vblank_count;
//
// if(count < 202 || count > 211) {
// SDK_TFATAL_ERROR("V Counter out of range(%d). it must be 202 to 211.", count);
// } else if(vblank_count == *(vu32 *)HW_VBLANK_COUNT_BUF) {
// SDK_TFATAL_ERROR("Set V Count once a frame.");
// } else {
// OSIntrMode intr_mode;
// s32 current_count;
//
// intr_mode = EnableIrqFlag();
// current_count = reg_GX_VCOUNT;
//
// if(current_count < 202 || current_count > 211) {
// SDK_TFATAL_ERROR("Current V Counter out of range(%d). it must be 202 to 211.", current_count);
// } else if(count > current_count) {
// SDK_TFATAL_ERROR("Cannot advance the V Counter");
// } else {
// reg_GX_VCOUNT = (u16)count;
// vblank_count = *(vu32 *)HW_VBLANK_COUNT_BUF;
// }
//
// (void)SetIrqFlag(intr_mode);
// }
// }
//
// static inline s32 GX_GetVCountEqVal (void)
// {
// u16 val = reg_GX_DISPSTAT;
// return ((val >> 8) & 0x00ff) | ((val << 1) & 0x0100);
// }
//
// static inline void GX_SetPower (int gxbit_power)
// {
// GX_POWER_ASSERT(gxbit_power);
// reg_GX_POWCNT = (u16)((reg_GX_POWCNT & ~GX_POWER_ALL) | gxbit_power);
// }
//
// static inline GXPower GX_GetPower ()
// {
// return (GXPower)(reg_GX_POWCNT & GX_POWER_ALL);
// }
//
// static inline void GXi_PowerLCD (BOOL enable)
// {
// if (enable) {
// reg_GX_POWCNT |= REG_GX_POWCNT_LCD_MASK;
// } else {
// reg_GX_POWCNT &= ~REG_GX_POWCNT_LCD_MASK;
// }
// }
//
// #define GX_PowerLCD(x) SDK_ERR("GX_PowerLCD() is discontinued. please use PM_SetLCDPower()\n")
// #define GX_PowerLCDTop(x) SDK_ERR("GX_PowerLCDTop() is discontinued. please use PM_SetLCDPower()\n")
// #define GX_PowerLCDBot(x) SDK_ERR("GX_PowerLCDBot() is discontinued. please use PM_SetLCDPower()\n")
// #define GX_POWER_LCD_TOP SDK_ERR("GX_POWER_LCD_TOP is discontinued. please use PM_SetLCDPower()\n")
// #define GX_POWER_LCD_BOT SDK_ERR("GX_POWER_LCD_BOT is discontinued. please use PM_SetLCDPower()\n")
// #define GX_POWER_LCD SDK_ERR("GX_POWER_LCD is discontinued. please use PM_SetLCDPower()\n")
//
// static inline void GX_Power2D (BOOL enable)
// {
// if (enable) {
// reg_GX_POWCNT |= (REG_GX_POWCNT_E2DG_MASK | REG_GX_POWCNT_E2DGB_MASK);
// } else {
// reg_GX_POWCNT &= ~(REG_GX_POWCNT_E2DG_MASK | REG_GX_POWCNT_E2DGB_MASK);
// }
// }
//
// static inline void GX_Power2DMain (BOOL enable)
// {
// if (enable) {
// reg_GX_POWCNT |= REG_GX_POWCNT_E2DG_MASK;
// } else {
// reg_GX_POWCNT &= ~REG_GX_POWCNT_E2DG_MASK;
// }
// }
//
// static inline void GX_Power2DSub (BOOL enable)
// {
// if (enable) {
// reg_GX_POWCNT |= REG_GX_POWCNT_E2DGB_MASK;
// } else {
// reg_GX_POWCNT &= ~REG_GX_POWCNT_E2DGB_MASK;
// }
// }
//
// static inline void GX_PowerRender (BOOL enable)
// {
// if (enable) {
// reg_GX_POWCNT |= REG_GX_POWCNT_RE_MASK;
// } else {
// reg_GX_POWCNT &= ~REG_GX_POWCNT_RE_MASK;
// }
// }
//
// static inline void GX_PowerGeometry (BOOL enable)
// {
// if (enable) {
// reg_GX_POWCNT |= REG_GX_POWCNT_GE_MASK;
// } else {
// reg_GX_POWCNT &= ~REG_GX_POWCNT_GE_MASK;
// }
// }
//
// static inline void GX_Power3D (BOOL enable)
// {
// if (enable) {
// reg_GX_POWCNT |= (REG_GX_POWCNT_GE_MASK | REG_GX_POWCNT_RE_MASK);
// } else {
// reg_GX_POWCNT &= ~(REG_GX_POWCNT_GE_MASK | REG_GX_POWCNT_RE_MASK);
// }
// }
//
// static inline void GX_SetDispSelect (GXDispSelect sel)
// {
// GX_DISP_SELECT_ASSERT(sel);
//
// reg_GX_POWCNT = (u16)((reg_GX_POWCNT & ~REG_GX_POWCNT_DSEL_MASK) |
// (sel << REG_GX_POWCNT_DSEL_SHIFT));
// }
//
// static inline GXDispSelect GX_GetDispSelect (void)
// {
// return (GXDispSelect)((reg_GX_POWCNT & REG_GX_POWCNT_DSEL_MASK) >> REG_GX_POWCNT_DSEL_SHIFT);
// }
//
// static inline void GX_InitEx (u32 dma_no)
// {
// SDK_ASSERT(dma_no <= MI_DMA_MAX_NUM || dma_no == GX_DMA_NOT_USE);
//
// GXi_DmaId = dma_no;
// GX_Init();
// }
//
// static inline u32 GX_GetDefaultDMA (void)
// {
// return GXi_DmaId;
// }
#endif
#ifdef __cplusplus
}
#endif
#endif

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lib/include/nitro/gx/gx_bgcnt.h Normal file
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lib/include/nitro/gx/gx_vramcnt.h Normal file
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#ifndef NITRO_GX_VRAMCNT_H_
#define NITRO_GX_VRAMCNT_H_
#include <nitro/gx/gxcommon.h>
#include <nitro/os/ARM9/vramExclusive.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
GX_VRAM_A = OS_VRAM_BANK_ID_A,
GX_VRAM_B = OS_VRAM_BANK_ID_B,
GX_VRAM_C = OS_VRAM_BANK_ID_C,
GX_VRAM_D = OS_VRAM_BANK_ID_D,
GX_VRAM_E = OS_VRAM_BANK_ID_E,
GX_VRAM_F = OS_VRAM_BANK_ID_F,
GX_VRAM_G = OS_VRAM_BANK_ID_G,
GX_VRAM_H = OS_VRAM_BANK_ID_H,
GX_VRAM_I = OS_VRAM_BANK_ID_I,
GX_VRAM_ALL = OS_VRAM_BANK_ID_ALL
} GXVRam;
typedef enum {
GX_VRAM_LCDC_NONE = 0x0000,
GX_VRAM_LCDC_A = GX_VRAM_A,
GX_VRAM_LCDC_B = GX_VRAM_B,
GX_VRAM_LCDC_C = GX_VRAM_C,
GX_VRAM_LCDC_D = GX_VRAM_D,
GX_VRAM_LCDC_E = GX_VRAM_E,
GX_VRAM_LCDC_F = GX_VRAM_F,
GX_VRAM_LCDC_G = GX_VRAM_G,
GX_VRAM_LCDC_H = GX_VRAM_H,
GX_VRAM_LCDC_I = GX_VRAM_I,
GX_VRAM_LCDC_ALL = GX_VRAM_ALL
} GXVRamLCDC;
#define GX_VRAM_LCDC_ASSERT(x) \
SDK_MINMAX_ASSERT(x, GX_VRAM_LCDC_NONE, GX_VRAM_LCDC_ALL)
typedef enum {
GX_VRAM_BG_NONE = 0x0000,
GX_VRAM_BG_16_F = GX_VRAM_F,
GX_VRAM_BG_16_G = GX_VRAM_G,
GX_VRAM_BG_32_FG = GX_VRAM_F | GX_VRAM_G,
GX_VRAM_BG_64_E = GX_VRAM_E,
GX_VRAM_BG_80_EF = GX_VRAM_E | GX_VRAM_F,
GX_VRAM_BG_96_EFG = GX_VRAM_E | GX_VRAM_F | GX_VRAM_G,
GX_VRAM_BG_128_A = GX_VRAM_A,
GX_VRAM_BG_128_B = GX_VRAM_B,
GX_VRAM_BG_128_C = GX_VRAM_C,
GX_VRAM_BG_128_D = GX_VRAM_D,
GX_VRAM_BG_256_AB = GX_VRAM_A | GX_VRAM_B,
GX_VRAM_BG_256_BC = GX_VRAM_B | GX_VRAM_C,
GX_VRAM_BG_256_CD = GX_VRAM_C | GX_VRAM_D,
GX_VRAM_BG_384_ABC = GX_VRAM_A | GX_VRAM_B | GX_VRAM_C,
GX_VRAM_BG_384_BCD = GX_VRAM_B | GX_VRAM_C | GX_VRAM_D,
GX_VRAM_BG_512_ABCD = GX_VRAM_A | GX_VRAM_B | GX_VRAM_C | GX_VRAM_D,
GX_VRAM_BG_80_EG = GX_VRAM_E | GX_VRAM_G,
GX_VRAM_BG_256_AC = GX_VRAM_A | GX_VRAM_C,
GX_VRAM_BG_256_AD = GX_VRAM_A | GX_VRAM_D,
GX_VRAM_BG_256_BD = GX_VRAM_B | GX_VRAM_D,
GX_VRAM_BG_384_ABD = GX_VRAM_A | GX_VRAM_B | GX_VRAM_D,
GX_VRAM_BG_384_ACD = GX_VRAM_A | GX_VRAM_C | GX_VRAM_D
} GXVRamBG;
#define GX_VRAM_BG_ASSERT(x) \
SDK_ASSERT((x) == GX_VRAM_BG_NONE || \
(x) == GX_VRAM_BG_16_F || \
(x) == GX_VRAM_BG_16_G || \
(x) == GX_VRAM_BG_32_FG || \
(x) == GX_VRAM_BG_64_E || \
(x) == GX_VRAM_BG_80_EF || \
(x) == GX_VRAM_BG_80_EG || \
(x) == GX_VRAM_BG_96_EFG || \
(x) == GX_VRAM_BG_128_A || \
(x) == GX_VRAM_BG_128_B || \
(x) == GX_VRAM_BG_128_C || \
(x) == GX_VRAM_BG_128_D || \
(x) == GX_VRAM_BG_256_AB || \
(x) == GX_VRAM_BG_256_BC || \
(x) == GX_VRAM_BG_256_CD || \
(x) == GX_VRAM_BG_384_ABC || \
(x) == GX_VRAM_BG_384_BCD || \
(x) == GX_VRAM_BG_512_ABCD || \
(x) == GX_VRAM_BG_256_AC || \
(x) == GX_VRAM_BG_256_AD || \
(x) == GX_VRAM_BG_256_BD || \
(x) == GX_VRAM_BG_384_ABD || \
(x) == GX_VRAM_BG_384_ACD)
#define GX_VRAM_BG_ASSERT_EX_1(x) \
SDK_ASSERT((x) == GX_VRAM_BG_16_F || \
(x) == GX_VRAM_BG_16_G || \
(x) == GX_VRAM_BG_32_FG || \
(x) == GX_VRAM_BG_64_E || \
(x) == GX_VRAM_BG_80_EF || \
(x) == GX_VRAM_BG_80_EG || \
(x) == GX_VRAM_BG_96_EFG)
#define GX_VRAM_BG_ASSERT_EX_2(x) \
SDK_ASSERT((x) == GX_VRAM_BG_NONE || \
(x) == GX_VRAM_BG_128_A || \
(x) == GX_VRAM_BG_128_B || \
(x) == GX_VRAM_BG_128_C || \
(x) == GX_VRAM_BG_128_D || \
(x) == GX_VRAM_BG_256_AB || \
(x) == GX_VRAM_BG_256_BC || \
(x) == GX_VRAM_BG_256_CD || \
(x) == GX_VRAM_BG_384_ABC || \
(x) == GX_VRAM_BG_384_BCD || \
(x) == GX_VRAM_BG_256_AC || \
(x) == GX_VRAM_BG_256_AD || \
(x) == GX_VRAM_BG_256_BD || \
(x) == GX_VRAM_BG_384_ABD || \
(x) == GX_VRAM_BG_384_ACD)
typedef enum {
GX_VRAM_OBJ_NONE = 0x0000,
GX_VRAM_OBJ_16_F = GX_VRAM_F,
GX_VRAM_OBJ_16_G = GX_VRAM_G,
GX_VRAM_OBJ_32_FG = GX_VRAM_F | GX_VRAM_G,
GX_VRAM_OBJ_64_E = GX_VRAM_E,
GX_VRAM_OBJ_80_EF = GX_VRAM_E | GX_VRAM_F,
GX_VRAM_OBJ_80_EG = GX_VRAM_E | GX_VRAM_G,
GX_VRAM_OBJ_96_EFG = GX_VRAM_E | GX_VRAM_F | GX_VRAM_G,
GX_VRAM_OBJ_128_A = GX_VRAM_A,
GX_VRAM_OBJ_128_B = GX_VRAM_B,
GX_VRAM_OBJ_256_AB = GX_VRAM_A | GX_VRAM_B
} GXVRamOBJ;
#define GX_VRAM_OBJ_ASSERT(x) \
SDK_ASSERT((x) == GX_VRAM_OBJ_NONE || \
(x) == GX_VRAM_OBJ_16_F || \
(x) == GX_VRAM_OBJ_16_G || \
(x) == GX_VRAM_OBJ_32_FG || \
(x) == GX_VRAM_OBJ_64_E || \
(x) == GX_VRAM_OBJ_80_EF || \
(x) == GX_VRAM_OBJ_80_EG || \
(x) == GX_VRAM_OBJ_96_EFG || \
(x) == GX_VRAM_OBJ_128_A || \
(x) == GX_VRAM_OBJ_128_B || \
(x) == GX_VRAM_OBJ_256_AB)
typedef enum {
GX_VRAM_ARM7_NONE = 0x0000,
GX_VRAM_ARM7_128_C = GX_VRAM_C,
GX_VRAM_ARM7_128_D = GX_VRAM_D,
GX_VRAM_ARM7_256_CD = GX_VRAM_C | GX_VRAM_D
} GXVRamARM7;
#define GX_VRAM_ARM7_ASSERT(x) \
SDK_ASSERT((x) == GX_VRAM_ARM7_NONE || \
(x) == GX_VRAM_ARM7_128_C || \
(x) == GX_VRAM_ARM7_128_D || \
(x) == GX_VRAM_ARM7_256_CD)
typedef enum {
GX_VRAM_TEX_NONE = 0x0000,
GX_VRAM_TEX_0_A = GX_VRAM_A,
GX_VRAM_TEX_0_B = GX_VRAM_B,
GX_VRAM_TEX_0_C = GX_VRAM_C,
GX_VRAM_TEX_0_D = GX_VRAM_D,
GX_VRAM_TEX_01_AB = GX_VRAM_A | GX_VRAM_B,
GX_VRAM_TEX_01_BC = GX_VRAM_B | GX_VRAM_C,
GX_VRAM_TEX_01_CD = GX_VRAM_C | GX_VRAM_D,
GX_VRAM_TEX_012_ABC = GX_VRAM_A | GX_VRAM_B | GX_VRAM_C,
GX_VRAM_TEX_012_BCD = GX_VRAM_B | GX_VRAM_C | GX_VRAM_D,
GX_VRAM_TEX_0123_ABCD = GX_VRAM_A | GX_VRAM_B | GX_VRAM_C | GX_VRAM_D,
GX_VRAM_TEX_01_AC = GX_VRAM_A | GX_VRAM_C,
GX_VRAM_TEX_01_AD = GX_VRAM_A | GX_VRAM_D,
GX_VRAM_TEX_01_BD = GX_VRAM_B | GX_VRAM_D,
GX_VRAM_TEX_012_ABD = GX_VRAM_A | GX_VRAM_B | GX_VRAM_D,
GX_VRAM_TEX_012_ACD = GX_VRAM_A | GX_VRAM_C | GX_VRAM_D
} GXVRamTex;
#define GX_VRAM_TEX_ASSERT(x) \
SDK_ASSERT((x) == GX_VRAM_TEX_NONE || \
(x) == GX_VRAM_TEX_0_A || \
(x) == GX_VRAM_TEX_0_B || \
(x) == GX_VRAM_TEX_0_C || \
(x) == GX_VRAM_TEX_0_D || \
(x) == GX_VRAM_TEX_01_AB || \
(x) == GX_VRAM_TEX_01_BC || \
(x) == GX_VRAM_TEX_01_CD || \
(x) == GX_VRAM_TEX_012_ABC || \
(x) == GX_VRAM_TEX_012_BCD || \
(x) == GX_VRAM_TEX_0123_ABCD || \
(x) == GX_VRAM_TEX_01_AC || \
(x) == GX_VRAM_TEX_01_AD || \
(x) == GX_VRAM_TEX_01_BD || \
(x) == GX_VRAM_TEX_012_ABD || \
(x) == GX_VRAM_TEX_012_ACD)
typedef enum {
GX_VRAM_CLEARIMAGE_NONE = 0x0000,
GX_VRAM_CLEARIMAGE_256_AB = GX_VRAM_A | GX_VRAM_B,
GX_VRAM_CLEARIMAGE_256_CD = GX_VRAM_C | GX_VRAM_D,
GX_VRAM_CLEARDEPTH_128_A = GX_VRAM_A,
GX_VRAM_CLEARDEPTH_128_B = GX_VRAM_B,
GX_VRAM_CLEARDEPTH_128_C = GX_VRAM_C,
GX_VRAM_CLEARDEPTH_128_D = GX_VRAM_D
} GXVRamClearImage;
#define GX_VRAM_CLRIMG_ASSERT(x) \
SDK_ASSERT((x) == GX_VRAM_CLEARIMAGE_NONE || \
(x) == GX_VRAM_CLEARIMAGE_256_AB || \
(x) == GX_VRAM_CLEARIMAGE_256_CD || \
(x) == GX_VRAM_CLEARDEPTH_128_A || \
(x) == GX_VRAM_CLEARDEPTH_128_B || \
(x) == GX_VRAM_CLEARDEPTH_128_C || \
(x) == GX_VRAM_CLEARDEPTH_128_D)
typedef enum {
GX_VRAM_TEXPLTT_NONE = 0x0000,
GX_VRAM_TEXPLTT_0_F = GX_VRAM_F,
GX_VRAM_TEXPLTT_0_G = GX_VRAM_G,
GX_VRAM_TEXPLTT_01_FG = GX_VRAM_F | GX_VRAM_G,
GX_VRAM_TEXPLTT_0123_E = GX_VRAM_E,
GX_VRAM_TEXPLTT_01234_EF = GX_VRAM_E | GX_VRAM_F,
GX_VRAM_TEXPLTT_012345_EFG = GX_VRAM_E | GX_VRAM_F | GX_VRAM_G
} GXVRamTexPltt;
#define GX_VRAM_TEXPLTT_ASSERT(x) \
SDK_ASSERT((x) == GX_VRAM_TEXPLTT_NONE || \
(x) == GX_VRAM_TEXPLTT_0_F || \
(x) == GX_VRAM_TEXPLTT_0_G || \
(x) == GX_VRAM_TEXPLTT_01_FG || \
(x) == GX_VRAM_TEXPLTT_0123_E || \
(x) == GX_VRAM_TEXPLTT_01234_EF || \
(x) == GX_VRAM_TEXPLTT_012345_EFG)
typedef enum {
GX_VRAM_BGEXTPLTT_NONE = 0x0000,
GX_VRAM_BGEXTPLTT_01_F = GX_VRAM_F,
GX_VRAM_BGEXTPLTT_23_G = GX_VRAM_G,
GX_VRAM_BGEXTPLTT_0123_E = GX_VRAM_E,
GX_VRAM_BGEXTPLTT_0123_FG = GX_VRAM_F | GX_VRAM_G
} GXVRamBGExtPltt;
#define GX_VRAM_BGEXTPLTT_ASSERT(x) \
SDK_ASSERT((x) == GX_VRAM_BGEXTPLTT_NONE || \
(x) == GX_VRAM_BGEXTPLTT_01_F || \
(x) == GX_VRAM_BGEXTPLTT_23_G || \
(x) == GX_VRAM_BGEXTPLTT_0123_E || \
(x) == GX_VRAM_BGEXTPLTT_0123_FG)
#define GX_VRAM_OBJEXTPLTT_8_F GX_VRAM_OBJEXTPLTT_0_F
#define GX_VRAM_OBJEXTPLTT_8_G GX_VRAM_OBJEXTPLTT_0_G
typedef enum {
GX_VRAM_OBJEXTPLTT_NONE = 0,
GX_VRAM_OBJEXTPLTT_0_F = GX_VRAM_F,
GX_VRAM_OBJEXTPLTT_0_G = GX_VRAM_G
} GXVRamOBJExtPltt;
#define GX_VRAM_OBJEXTPLTT_ASSERT(x) \
SDK_ASSERT((x) == GX_VRAM_OBJEXTPLTT_NONE || \
(x) == GX_VRAM_OBJEXTPLTT_0_F || \
(x) == GX_VRAM_OBJEXTPLTT_0_G)
typedef enum {
GX_VRAM_SUB_BG_NONE = 0x0000,
GX_VRAM_SUB_BG_128_C = GX_VRAM_C,
GX_VRAM_SUB_BG_32_H = GX_VRAM_H,
GX_VRAM_SUB_BG_48_HI = GX_VRAM_H | GX_VRAM_I
} GXVRamSubBG;
#define GX_VRAM_SUB_BG_ASSERT(x) \
SDK_ASSERT((x) == GX_VRAM_SUB_BG_NONE || \
(x) == GX_VRAM_SUB_BG_128_C || \
(x) == GX_VRAM_SUB_BG_32_H || \
(x) == GX_VRAM_SUB_BG_48_HI)
typedef enum {
GX_VRAM_SUB_OBJ_NONE = 0x0000,
GX_VRAM_SUB_OBJ_128_D = GX_VRAM_D,
GX_VRAM_SUB_OBJ_16_I = GX_VRAM_I
} GXVRamSubOBJ;
#define GX_VRAM_SUB_OBJ_ASSERT(x) \
SDK_ASSERT((x) == GX_VRAM_SUB_OBJ_NONE || \
(x) == GX_VRAM_SUB_OBJ_128_D || \
(x) == GX_VRAM_SUB_OBJ_16_I)
#define GX_VRAM_SUB_BGEXTPLTT_32_H GX_VRAM_SUB_BGEXTPLTT_0123_H
typedef enum {
GX_VRAM_SUB_BGEXTPLTT_NONE = 0x0000,
GX_VRAM_SUB_BGEXTPLTT_0123_H = GX_VRAM_H
} GXVRamSubBGExtPltt;
#define GX_VRAM_SUB_BGEXTPLTT_ASSERT(x) \
SDK_ASSERT((x) == GX_VRAM_SUB_BGEXTPLTT_NONE || \
(x) == GX_VRAM_SUB_BGEXTPLTT_0123_H)
#define GX_VRAM_SUB_OBJEXTPLTT_16_I GX_VRAM_SUB_OBJEXTPLTT_0_I
typedef enum {
GX_VRAM_SUB_OBJEXTPLTT_NONE = 0x0000,
GX_VRAM_SUB_OBJEXTPLTT_0_I = GX_VRAM_I
} GXVRamSubOBJExtPltt;
#define GX_VRAM_SUB_OBJEXTPLTT_ASSERT(x) \
SDK_ASSERT((x) == GX_VRAM_SUB_OBJEXTPLTT_NONE || \
(x) == GX_VRAM_SUB_OBJEXTPLTT_0_I)
#if !(defined(SDK_WIN32) || defined(SDK_FROM_TOOL))
void GX_SetBankForBG(GXVRamBG bg);
BOOL GX_TrySetBankForBG(GXVRamBG bg);
void GX_SetBankForBGEx(GXVRamBG bg1, GXVRamBG bg2);
BOOL GX_TrySetBankForBGEx(GXVRamBG bg1, GXVRamBG bg2);
void GX_SetBankForOBJ(GXVRamOBJ obj);
BOOL GX_TrySetBankForOBJ(GXVRamOBJ obj);
void GX_SetBankForBGExtPltt(GXVRamBGExtPltt bgExtPltt);
BOOL GX_TrySetBankForBGExtPltt(GXVRamBGExtPltt bgExtPltt);
void GX_SetBankForOBJExtPltt(GXVRamOBJExtPltt objExtPltt);
BOOL GX_TrySetBankForOBJExtPltt(GXVRamOBJExtPltt objExtPltt);
void GX_SetBankForTex(GXVRamTex tex);
BOOL GX_TrySetBankForTex(GXVRamTex tex);
void GX_SetBankForTexPltt(GXVRamTexPltt texPltt);
BOOL GX_TrySetBankForTexPltt(GXVRamTexPltt texPltt);
void GX_SetBankForClearImage(GXVRamClearImage clrImg);
BOOL GX_TrySetBankForClearImage(GXVRamClearImage clrImg);
GXVRamBG GX_GetBankForBG(void);
GXVRamOBJ GX_GetBankForOBJ(void);
GXVRamBGExtPltt GX_GetBankForBGExtPltt(void);
GXVRamOBJExtPltt GX_GetBankForOBJExtPltt(void);
GXVRamTex GX_GetBankForTex(void);
GXVRamTexPltt GX_GetBankForTexPltt(void);
GXVRamClearImage GX_GetBankForClearImage(void);
GXVRamBG GX_ResetBankForBG(void);
GXVRamOBJ GX_ResetBankForOBJ(void);
GXVRamBGExtPltt GX_ResetBankForBGExtPltt(void);
GXVRamOBJExtPltt GX_ResetBankForOBJExtPltt(void);
GXVRamTex GX_ResetBankForTex(void);
GXVRamTexPltt GX_ResetBankForTexPltt(void);
GXVRamClearImage GX_ResetBankForClearImage(void);
GXVRamBG GX_DisableBankForBG(void);
GXVRamOBJ GX_DisableBankForOBJ(void);
GXVRamBGExtPltt GX_DisableBankForBGExtPltt(void);
GXVRamOBJExtPltt GX_DisableBankForOBJExtPltt(void);
GXVRamTex GX_DisableBankForTex(void);
GXVRamTexPltt GX_DisableBankForTexPltt(void);
GXVRamClearImage GX_DisableBankForClearImage(void);
u32 GX_GetSizeOfBG(void);
u32 GX_GetSizeOfOBJ(void);
u32 GX_GetSizeOfBGExtPltt(void);
u32 GX_GetSizeOfOBJExtPltt(void);
u32 GX_GetSizeOfTex(void);
u32 GX_GetSizeOfTexPltt(void);
u32 GX_GetSizeOfClearImage(void);
void GX_SetBankForSubBG(GXVRamSubBG sub_bg);
BOOL GX_TrySetBankForSubBG(GXVRamSubBG sub_bg);
void GX_SetBankForSubOBJ(GXVRamSubOBJ sub_obj);
BOOL GX_TrySetBankForSubOBJ(GXVRamSubOBJ sub_obj);
void GX_SetBankForSubBGExtPltt(GXVRamSubBGExtPltt sub_bgExtPltt);
BOOL GX_TrySetBankForSubBGExtPltt(GXVRamSubBGExtPltt sub_bgExtPltt);
void GX_SetBankForSubOBJExtPltt(GXVRamSubOBJExtPltt sub_objExtPltt);
BOOL GX_TrySetBankForSubOBJExtPltt(GXVRamSubOBJExtPltt sub_objExtPltt);
GXVRamSubBG GX_GetBankForSubBG(void);
GXVRamSubOBJ GX_GetBankForSubOBJ(void);
GXVRamSubBGExtPltt GX_GetBankForSubBGExtPltt(void);
GXVRamSubOBJExtPltt GX_GetBankForSubOBJExtPltt(void);
GXVRamSubBG GX_ResetBankForSubBG(void);
GXVRamSubOBJ GX_ResetBankForSubOBJ(void);
GXVRamSubBGExtPltt GX_ResetBankForSubBGExtPltt(void);
GXVRamSubOBJExtPltt GX_ResetBankForSubOBJExtPltt(void);
GXVRamSubBG GX_DisableBankForSubBG(void);
GXVRamSubOBJ GX_DisableBankForSubOBJ(void);
GXVRamSubBGExtPltt GX_DisableBankForSubBGExtPltt(void);
GXVRamSubOBJExtPltt GX_DisableBankForSubOBJExtPltt(void);
u32 GX_GetSizeOfSubBG(void);
u32 GX_GetSizeOfSubOBJ(void);
u32 GX_GetSizeOfSubBGExtPltt(void);
u32 GX_GetSizeOfSubOBJExtPltt(void);
void GX_SetBankForARM7(GXVRamARM7 arm7);
BOOL GX_TrySetBankForARM7(GXVRamARM7 arm7);
void GX_SetBankForLCDC(int lcdc);
BOOL GX_TrySetBankForLCDC(int lcdc);
GXVRamARM7 GX_GetBankForARM7(void);
GXVRamLCDC GX_GetBankForLCDC(void);
GXVRamARM7 GX_ResetBankForARM7(void);
GXVRamARM7 GX_DisableBankForARM7(void);
GXVRamLCDC GX_DisableBankForLCDC(void);
u32 GX_GetSizeOfARM7(void);
#endif
#ifdef __cplusplus
}
#endif
#endif

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lib/include/nitro/gx/gxstate.h Normal file
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@@ -0,0 +1,114 @@
#ifndef NITRO_GXSTATE_H_
#define NITRO_GXSTATE_H_
#include <nitro/gx/gx.h>
#include <nitro/gx/gx_vramcnt.h>
#ifdef __cplusplus
extern "C" {
#endif
typedef struct {
u16 lcdc;
u16 bg;
u16 obj;
u16 arm7;
u16 tex;
u16 texPltt;
u16 clrImg;
u16 bgExtPltt;
u16 objExtPltt;
u16 sub_bg;
u16 sub_obj;
u16 sub_bgExtPltt;
u16 sub_objExtPltt;
} GX_VRAMCnt_;
typedef struct {
GX_VRAMCnt_ vramCnt;
} GX_State;
extern GX_State gGXState;
void GX_InitGXState(void);
#ifdef SDK_DEBUG
void GX_StateCheck_VRAMCnt_(void);
void GX_RegionCheck_BG_(u32 first, u32 last);
void GX_RegionCheck_OBJ_(u32 first, u32 last);
void GX_RegionCheck_SubBG_(u32 first, u32 last);
void GX_RegionCheck_SubOBJ_(u32 first, u32 last);
void GX_RegionCheck_Tex_(GXVRamTex tex, u32 first, u32 last);
void GX_RegionCheck_TexPltt_(GXVRamTexPltt texPltt, u32 first, u32 last);
#endif
#ifdef SDK_DEBUG
static inline void GX_StateCheck_VRAMCnt (void)
{
GX_StateCheck_VRAMCnt_();
}
static inline void GX_RegionCheck_BG (u32 first, u32 last)
{
GX_RegionCheck_BG_(first, last);
}
static inline void GX_RegionCheck_OBJ (u32 first, u32 last)
{
GX_RegionCheck_OBJ_(first, last);
}
static inline void GX_RegionCheck_SubBG (u32 first, u32 last)
{
GX_RegionCheck_SubBG_(first, last);
}
static inline void GX_RegionCheck_SubOBJ (u32 first, u32 last)
{
GX_RegionCheck_SubOBJ_(first, last);
}
static inline void GX_RegionCheck_Tex (GXVRamTex tex, u32 first, u32 last)
{
GX_RegionCheck_Tex_(tex, first, last);
}
static inline void GX_RegionCheck_TexPltt (GXVRamTexPltt texPltt, u32 first, u32 last)
{
GX_RegionCheck_TexPltt_(texPltt, first, last);
}
#else
static inline void GX_StateCheck_VRAMCnt (void)
{
}
static inline void GX_RegionCheck_BG (u32, u32)
{
}
static inline void GX_RegionCheck_OBJ (u32, u32)
{
}
static inline void GX_RegionCheck_SubBG (u32, u32)
{
}
static inline void GX_RegionCheck_SubOBJ (u32, u32)
{
}
static inline void GX_RegionCheck_Tex (GXVRamTex, u32, u32)
{
}
static inline void GX_RegionCheck_TexPltt (GXVRamTexPltt, u32, u32)
{
}
#endif
#ifdef __cplusplus
}
#endif
#endif

2
lib/include/nitro/math.h
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@@ -3,5 +3,7 @@
u8 Math_CountPopulation (u32 x);
#include <nitro/math/dgt.h>
#endif //NITRO_MATH_H_

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#ifndef NITRO_MATH_DGT_H_
#define NITRO_MATH_DGT_H_
#include <nitro/misc.h>
#include <nitro/types.h>
#include <nitro/dgt/common.h>
#include <nitro/dgt/dgt.h>
#ifdef __cplusplus
extern "C" {
#endif
#define MATH_MD5_DIGEST_SIZE DGT_HASH1_DIGEST_SIZE
#define MATH_SHA1_DIGEST_SIZE DGT_HASH2_DIGEST_SIZE
#define MATH_MD5_BLOCK_SIZE DGT_HASH_BLOCK_SIZE
#define MATH_SHA1_BLOCK_SIZE DGT_HASH_BLOCK_SIZE
typedef DGTHash1Context MATHMD5Context;
typedef DGTHash2Context MATHSHA1Context;
static inline void MATH_MD5Init (MATHMD5Context * context)
{
DGT_Hash1Reset(context);
}
static inline void MATH_MD5Update (MATHMD5Context * context, const void * input, u32 length)
{
DGT_Hash1SetSource(context, (u8 *)input, length);
}
static inline void MATH_MD5GetHash (MATHMD5Context * context, void * digest)
{
DGT_Hash1GetDigest_R((u8 *)digest, context);
}
static inline void MATH_MD5GetDigest (MATHMD5Context * context, void * digest)
{
MATH_MD5GetHash(context, digest);
}
static inline void MATH_SHA1Init (MATHSHA1Context * context)
{
DGT_Hash2Reset(context);
}
static inline void MATH_SHA1Update (MATHSHA1Context * context, const void * input, u32 length)
{
DGT_Hash2SetSource(context, (u8 *)input, length);
}
static inline void MATH_SHA1GetHash (MATHSHA1Context * context, void * digest)
{
DGT_Hash2GetDigest(context, (u8 *)digest);
}
static inline void MATH_SHA1GetDigest (MATHSHA1Context * context, void * digest)
{
MATH_SHA1GetHash(context, digest);
}
void MATH_CalcMD5(void * digest, const void * data, u32 dataLength);
void Math_CalcSha1(void * digest, const void * data, u32 dataLength);
static inline void MATH_CalcHMACMD5 (void * digest, const void * data, u32 dataLength, const void * key, u32 keyLength)
{
DGT_Hash1CalcHmac(digest, (void *)data, (int)dataLength, (void *)key, (int)keyLength);
}
static inline void MATH_CalcHMACSHA1 (void * digest, const void * data, u32 dataLength, const void * key, u32 keyLength)
{
DGT_Hash2CalcHmac(digest, (void *)data, (int)dataLength, (void *)key, (int)keyLength);
}
#ifdef __cplusplus
}
#endif
#endif

3
lib/include/nitro/mi.h
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@@ -6,5 +6,8 @@
#include <nitro/mi/memory.h>
#include <nitro/mi/wram.h>
#include <nitro/mi/uncompress.h>
#include <nitro/mi/mi_dma.h>
#include <nitro/mi/swap.h>
#include <nitro/mi/byteAccess.h>
#endif //NITRO_MI_H_

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#ifndef NITRO_MI_BYTEACCESS_H_
#define NITRO_MI_BYTEACCESS_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <nitro/hw/io_reg.h>
#ifdef SDK_TEG
u8 MI_ReadByte(const void * address);
#else
static inline u8 MI_ReadByte (const void * address)
{
return *(u8 *)address;
}
#endif
#ifdef SDK_TEG
void MI_WriteByte(void * address, u8 value);
#else
static inline void MI_WriteByte (void * address, u8 value)
{
*(u8 *)address = value;
}
#endif
#ifdef __cplusplus
}
#endif
#endif

189
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#ifndef NITRO_COMMON_MI_DMA_H_
#define NITRO_COMMON_MI_DMA_H_
#ifdef __cplusplus
extern "C" {
#endif
//#include <nitro.h>
//#ifdef SDK_ARM9
#define MIi_DMA_CLEAR_DATA_BUF REG_DMA0_CLR_DATA_ADDR
//#else
// #define MIi_DMA_CLEAR_DATA_BUF HW_DMA_CLEAR_DATA_BUF
//#endif
//#else
// #define MIi_DMA_CLEAR_DATA_BUF HW_PRV_WRAM_DMA_CLEAR_DATA_BUF
//#endif
typedef union {
u32 b32;
u16 b16;
} MIiDmaClearSrc;
#ifdef SDK_ARM9
void MIi_DmaSetParams(u32 dmaNo, u32 src, u32 dest, u32 ctrl);
void MIi_DmaSetParams_Wait(u32 dmaNo, u32 src, u32 dest, u32 ctrl);
void MIi_DmaSetParams_NoInt(u32 dmaNo, u32 src, u32 dest, u32 ctrl);
void MIi_DmaSetParams_wait_noInt(u32 dmaNo, u32 src, u32 dest, u32 ctrl);
#else
static inline void MIi_DmaSetParams (u32 dmaNo, u32 src, u32 dest, u32 ctrl)
{
OSIntrMode enabled = EnableIrqFlag();
vu32 * p = (vu32 *)((u32)REG_DMA0SAD_ADDR + dmaNo * 12);
*p = (vu32)src;
*(p + 1) = (vu32)dest;
*(p + 2) = (vu32)ctrl;
(void)SetIrqFlag(enabled);
}
static inline void MIi_DmaSetParams_Wait (u32 dmaNo, u32 src, u32 dest, u32 ctrl)
{
OSIntrMode enabled = EnableIrqFlag();
vu32 * p = (vu32 *)((u32)REG_DMA0SAD_ADDR + dmaNo * 12);
*p = (vu32)src;
*(p + 1) = (vu32)dest;
*(p + 2) = (vu32)ctrl;
{
u32 dummy = reg_MI_DMA0SAD;
}
(void)SetIrqFlag(enabled);
}
static inline void MIi_DmaSetParams_NoInt (u32 dmaNo, u32 src, u32 dest, u32 ctrl)
{
vu32 * p = (vu32 *)((u32)REG_DMA0SAD_ADDR + dmaNo * 12);
*p = (vu32)src;
*(p + 1) = (vu32)dest;
*(p + 2) = (vu32)ctrl;
}
static inline void MIi_DmaSetParams_wait_noInt (u32 dmaNo, u32 src, u32 dest, u32 ctrl)
{
vu32 * p = (vu32 *)((u32)REG_DMA0SAD_ADDR + dmaNo * 12);
*p = (vu32)src;
*(p + 1) = (vu32)dest;
*(p + 2) = (vu32)ctrl;
{
u32 dummy = reg_MI_DMA0SAD;
}
}
#endif
static inline void MIi_DmaSetParams_src32 (u32 dmaNo, u32 data, u32 dest, u32 ctrl)
{
OSIntrMode enabled = EnableIrqFlag();
MIiDmaClearSrc * srcp = (MIiDmaClearSrc *) ((u32)MIi_DMA_CLEAR_DATA_BUF + dmaNo * 4);
srcp->b32 = data;
MIi_DmaSetParams_NoInt(dmaNo, (u32)srcp, dest, ctrl);
(void)SetIrqFlag(enabled);
}
static inline void MIi_DmaSetParams_src16 (u32 dmaNo, u16 data, u32 dest, u32 ctrl)
{
OSIntrMode enabled = EnableIrqFlag();
MIiDmaClearSrc * srcp = (MIiDmaClearSrc *) ((u32)MIi_DMA_CLEAR_DATA_BUF + dmaNo * 4);
srcp->b16 = data;
MIi_DmaSetParams_NoInt(dmaNo, (u32)srcp, dest, ctrl);
(void)SetIrqFlag(enabled);
}
static inline void MIi_DmaSetParams_wait_src32 (u32 dmaNo, u32 data, u32 dest, u32 ctrl)
{
OSIntrMode enabled = EnableIrqFlag();
MIiDmaClearSrc * srcp = (MIiDmaClearSrc *) ((u32)MIi_DMA_CLEAR_DATA_BUF + dmaNo * 4);
srcp->b32 = data;
MIi_DmaSetParams_wait_noInt(dmaNo, (u32)srcp, dest, ctrl);
(void)SetIrqFlag(enabled);
}
static inline void MIi_DmaSetParams_wait_src16 (u32 dmaNo, u16 data, u32 dest, u32 ctrl)
{
OSIntrMode enabled = EnableIrqFlag();
MIiDmaClearSrc * srcp = (MIiDmaClearSrc *) ((u32)MIi_DMA_CLEAR_DATA_BUF + dmaNo * 4);
srcp->b16 = data;
MIi_DmaSetParams_wait_noInt(dmaNo, (u32)srcp, dest, ctrl);
(void)SetIrqFlag(enabled);
}
extern void OSi_EnterDmaCallback(u32 dmaNo, MIDmaCallback callback, void * arg);
static inline void MIi_CallCallback (MIDmaCallback callback, void * arg)
{
if (callback) {
(callback) (arg);
}
}
#define MIi_Wait_BeforeDMA(dmaCntp, dmaNo) \
do { \
dmaCntp = &((vu32 *)REG_DMA0SAD_ADDR)[dmaNo * 3 + 2]; \
MIi_ASSERT_DMANO(dmaNo); \
while ( *dmaCntp & REG_MI_DMA0CNT_E_MASK ) {} \
} while (0)
#define MIi_Wait_AfterDMA(dmaCntp) \
do { \
while ( *dmaCntp & REG_MI_DMA0CNT_E_MASK ) {} \
} while (0)
#define MIi_ASSERT_DMANO(dmaNo) SDK_ASSERTMSG((dmaNo) <= MI_DMA_MAX_NUM, "illegal DMA No.")
#define MIi_ASSERT_MUL2(size) SDK_ASSERTMSG(((size) & 1) == 0, "size & 1 must be 0")
#define MIi_ASSERT_MUL4(size) SDK_ASSERTMSG(((size) & 3) == 0, "size & 3 must be 0")
#define MIi_ASSERT_SRC_ALIGN512(src) SDK_ASSERTMSG(((u32)(src) & 511) == 0, "source address must be in 512-byte alignment")
#define MIi_ASSERT_SRC_ALIGN4(src) SDK_ASSERTMSG(((u32)(src) & 3) == 0, "source address must be in 4-byte alignment")
#define MIi_ASSERT_SRC_ALIGN2(src) SDK_ASSERTMSG(((u32)(src) & 1) == 0, "source address must be in 2-byte alignment")
#define MIi_ASSERT_DEST_ALIGN4(dest) SDK_ASSERTMSG(((u32)(dest) & 3) == 0, "destination address must be in 4-byte alignment")
#define MIi_ASSERT_DEST_ALIGN2(dest) SDK_ASSERTMSG(((u32)(dest) & 1) == 0, "destination address must be in 2-byte alignment")
#ifdef SDK_ARM9
#define MIi_ASSERT_SIZE(dmaNo, size) SDK_ASSERTMSG((size) <= 0x1fffff, "size too large");
#else
#define MIi_ASSERT_SIZE(dmaNo, size) \
do { \
if ( dmaNo <= 2 ) \
{ \
SDK_ASSERTMSG((size) <= 0x3fff, "size too large"); \
} \
else \
{ \
SDK_ASSERTMSG((size) <= 0xffff, "size too large"); \
} \
} while (0)
#endif
#if defined(SDK_ARM9) && defined(SDK_DEBUG)
void MIi_CheckAddressInTCM(u32 addr, u32 size);
#define MIi_WARNING_ADDRINTCM(addr, size) MIi_CheckAddressInTCM((u32)addr, (u32)size)
#else
#define MIi_WARNING_ADDRINTCM(addr, size) ((void)0)
#endif
#ifdef SDK_ARM9
void MIi_CheckAnotherAutoDma(u32 dmaNo, u32 dmaType);
#endif
void MIi_CheckDma0SourceAddress(u32 dmaNo, u32 src, u32 size, u32 dir);
#define MIi_DUMMY_DMA_NO 0
#define MIi_DUMMY_SRC 0
#define MIi_DUMMY_DEST 0
#define MIi_DUMMY_CNT (MI_DMA_ENABLE | MI_DMA_SRC_FIX | MI_DMA_DEST_FIX | MI_DMA_16BIT_BUS | 1)
#ifdef __cplusplus
}
#endif
#endif

18
lib/include/nitro/mi/swap.h Normal file
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#ifndef NITRO_MI_SWAP_H_
#define NITRO_MI_SWAP_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <nitro/misc.h>
#include <nitro/types.h>
u32 MI_SwapWord(u32 setData, volatile u32 * destp);
u8 MI_SwapByte(u32 setData, volatile u8 * destp);
#ifdef __cplusplus
}
#endif
#endif

9
lib/include/nitro/snd.h
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@@ -1,8 +1,13 @@
#ifndef NITRO_SND_H_
#define NITRO_SND_H_
#include <nitro/snd/common/main.h>
#include <nitro/snd/common/util.h>
#include <nitro/snd/common/alarm.h>
#include <nitro/snd/common/bank.h>
#include <nitro/snd/common/capture.h>
#include <nitro/snd/common/command.h>
#include <nitro/snd/common/global.h>
#include <nitro/snd/common/main.h>
#include <nitro/snd/common/seq.h>
#include <nitro/snd/common/util.h>
#endif //NITRO_SND_H_

53
lib/include/nitro/snd/common/alarm.h Normal file
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#ifndef NITRO_SND_COMMON_ALARM_H_
#define NITRO_SND_COMMON_ALARM_H_
#include <nitro/types.h>
#include <nitro/os.h>
#ifdef __cplusplus
extern "C" {
#endif
#define SND_ALARM_NUM 8
#define SND_ALARM_MIN 0
#define SND_ALARM_MAX (SND_ALARM_NUM - 1)
#define SND_ALARM_PRESCALER 32
typedef void (*SNDAlarmHandler) (void *);
#ifdef SDK_ARM7
typedef struct SNDAlarm {
u8 enable;
u8 id;
u16 padding;
struct {
OSTick tick;
OSTick period;
} setting;
OSAlarm alarm;
} SNDAlarm;
#endif
void Snd_AlarmInit(void);
#ifdef SDK_ARM7
void SND_SetupAlarm(int alarmNo, OSTick tick, OSTick period, int id);
void SND_StartAlarm(int alarmNo);
void SND_StopAlarm(int alarmNo);
#endif
#ifdef SDK_ARM9
void Sndi_IncAlarmId(int alarmNo);
u8 Sndi_SetAlarmHandler(int alarmNo, SNDAlarmHandler handler, void * arg);
void Sndi_CallAlarmHandler(int alarmNo);
#endif
#ifdef __cplusplus
}
#endif
#endif

110
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#ifndef NITRO_SND_COMMON_CAPTURE_H_
#define NITRO_SND_COMMON_CAPTURE_H_
#include <nitro/types.h>
#if !(defined(SDK_WIN32) || defined(SDK_FROM_TOOL))
#ifdef SDK_ARM7
#include <nitro/hw/ARM7/ioreg_SND.h>
#endif
#endif
#ifdef __cplusplus
extern "C" {
#endif
#define SND_CAPTURE_NUM 2
#ifndef SDK_TEG
#define SND_CAPTURE_0_OUT_CHANNEL 1
#define SND_CAPTURE_1_OUT_CHANNEL 3
#define SND_CAPTURE_0_IN_CHANNEL 0
#define SND_CAPTURE_1_IN_CHANNEL 2
#define SND_CAPTURE_LEN_MAX 0xffff
#else
#define SND_CAPTURE_0_OUT_CHANNEL 3
#define SND_CAPTURE_1_OUT_CHANNEL 1
#define SND_CAPTURE_0_IN_CHANNEL 2
#define SND_CAPTURE_1_IN_CHANNEL 0
#define SND_CAPTURE_LEN_MAX 0x0fff
#endif
#define SND_CAPTURE_DAD_MASK 0x07fffffc
#define SND_CAPTURE_REG_OFFSET 0x8
#ifndef SDK_TEG
typedef enum {
SND_CAPTURE_0,
SND_CAPTURE_1
} SNDCapture;
#else
typedef enum {
SND_CAPTURE_1,
SND_CAPTURE_0
} SNDCapture;
#endif
typedef enum {
SND_CAPTURE_FORMAT_PCM16,
SND_CAPTURE_FORMAT_PCM8
} SNDCaptureFormat;
typedef enum {
SND_CAPTURE_REPEAT_YES,
SND_CAPTURE_REPEAT_NO
} SNDCaptureRepeat;
typedef enum {
SND_CAPTURE_IN_MIXER,
SND_CAPTURE_IN_CHANNEL,
SND_CAPTURE_IN_MIXER_L = SND_CAPTURE_IN_MIXER,
SND_CAPTURE_IN_MIXER_R = SND_CAPTURE_IN_MIXER,
SND_CAPTURE_IN_CHANNEL0 = SND_CAPTURE_IN_CHANNEL,
SND_CAPTURE_IN_CHANNEL2 = SND_CAPTURE_IN_CHANNEL
} SNDCaptureIn;
typedef enum {
SND_CAPTURE_OUT_NORMAL,
SND_CAPTURE_OUT_CHANNEL_MIX,
SND_CAPTURE_OUT_CHANNEL0_MIX = SND_CAPTURE_OUT_CHANNEL_MIX,
SND_CAPTURE_OUT_CHANNEL2_MIX = SND_CAPTURE_OUT_CHANNEL_MIX
} SNDCaptureOut;
#ifdef SDK_ARM7
#if !(defined(SDK_WIN32) || defined(SDK_FROM_TOOL))
static inline void SND_StartCapture (SNDCapture capture)
{
REGType8v * reg = (REGType8v *)(REG_SNDCAP0CNT_ADDR + capture);
*reg |= REG_SND_SNDCAP0CNT_E_MASK;
}
static inline void SND_StartCaptureBoth (void)
{
reg_SND_SNDCAPCNT |= REG_SND_SNDCAPCNT_CAP0_E_MASK | REG_SND_SNDCAPCNT_CAP1_E_MASK;
}
static inline void SND_StopCapture (SNDCapture capture)
{
(*(REGType8v *)(REG_SNDCAP0CNT_ADDR + capture)) = 0;
}
#else
void SND_StartCapture(SNDCapture capture);
void SND_StartCaptureBoth(void);
void SND_StopCapture(SNDCapture capture);
#endif
#endif
#ifdef SDK_ARM7
void SND_SetupCapture(SNDCapture capture, SNDCaptureFormat format, void * buffer_addr, int length, BOOL repeat, SNDCaptureIn in, SNDCaptureOut out);
BOOL SND_IsCaptureActive(SNDCapture capture);
#endif
#ifdef __cplusplus
}
#endif
#endif

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#ifndef NITRO_SND_COMMON_COMMAND_H_
#define NITRO_SND_COMMON_COMMAND_H_
#include <nitro/types.h>
#ifdef __cplusplus
extern "C" {
#endif
#define SND_COMMAND_NOBLOCK 0
#define SND_COMMAND_BLOCK (1 << 0)
#define SND_COMMAND_IMMEDIATE (1 << 1)
typedef enum SNDCommandID {
SND_COMMAND_START_SEQ,
SND_COMMAND_STOP_SEQ,
SND_COMMAND_PREPARE_SEQ,
SND_COMMAND_START_PREPARED_SEQ,
SND_COMMAND_PAUSE_SEQ,
SND_COMMAND_SKIP_SEQ,
SND_COMMAND_PLAYER_PARAM,
SND_COMMAND_TRACK_PARAM,
SND_COMMAND_MUTE_TRACK,
SND_COMMAND_ALLOCATABLE_CHANNEL,
SND_COMMAND_PLAYER_LOCAL_VAR,
SND_COMMAND_PLAYER_GLOBAL_VAR,
SND_COMMAND_START_TIMER,
SND_COMMAND_STOP_TIMER,
SND_COMMAND_SETUP_CHANNEL_PCM,
SND_COMMAND_SETUP_CHANNEL_PSG,
SND_COMMAND_SETUP_CHANNEL_NOISE,
SND_COMMAND_SETUP_CAPTURE,
SND_COMMAND_SETUP_ALARM,
SND_COMMAND_CHANNEL_TIMER,
SND_COMMAND_CHANNEL_VOLUME,
SND_COMMAND_CHANNEL_PAN,
SND_COMMAND_SURROUND_DECAY,
SND_COMMAND_MASTER_VOLUME,
SND_COMMAND_MASTER_PAN,
SND_COMMAND_OUTPUT_SELECTOR,
SND_COMMAND_LOCK_CHANNEL,
SND_COMMAND_UNLOCK_CHANNEL,
SND_COMMAND_STOP_UNLOCKED_CHANNEL,
SND_COMMAND_SHARED_WORK,
SND_COMMAND_INVALIDATE_SEQ,
SND_COMMAND_INVALIDATE_BANK,
SND_COMMAND_INVALIDATE_WAVE,
SND_COMMAND_READ_DRIVER_INFO
} SNDCommandID;
typedef struct SNDCommand {
struct SNDCommand * next;
SNDCommandID id;
u32 arg[4];
} SNDCommand;
void SND_CommandInit(void);
#ifdef SDK_ARM9
struct SNDCommand * Snd_AllocCommand(u32 flags);
void Snd_PushCommand(struct SNDCommand * command);
const SNDCommand * SND_RecvCommandReply(u32 flags);
BOOL SND_FlushCommand(u32 flags);
void SND_WaitForCommandProc(u32 tag);
void SND_WaitForFreeCommand(int count);
u32 SND_GetCurrentCommandTag(void);
BOOL SND_IsFinishedCommandTag(u32 tag);
int SND_CountFreeCommand(void);
int SND_CountReservedCommand(void);
int SND_CountWaitingCommand(void);
#else
void SND_CommandProc(void);
#endif
#ifdef __cplusplus
}
#endif
#endif

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#ifndef NITRO_SND_COMMON_GLOBAL_H_
#define NITRO_SND_COMMON_GLOBAL_H_
#include <nitro/types.h>
#ifdef __cplusplus
extern "C" {
#endif
#define SND_MASTER_VOLUME_MAX 0x7f
typedef enum SNDChannelOut {
SND_CHANNEL_OUT_MIXER,
SND_CHANNEL_OUT_BYPASS
} SNDChannelOut;
typedef enum SNDOutput {
SND_OUTPUT_MIXER,
SND_OUTPUT_CHANNEL1,
SND_OUTPUT_CHANNEL3,
SND_OUTPUT_CHANNEL1_3
} SNDOutput;
#ifdef SDK_ARM7
void SND_Enable(void);
void SND_Disable(void);
void SND_Shutdown(void);
void SND_BeginSleep(void);
void SND_EndSleep(void);
void SND_SetMasterVolume(int volume);
void SND_SetOutputSelector(SNDOutput left, SNDOutput right, SNDChannelOut channel1, SNDChannelOut channel3);
#endif
#ifdef __cplusplus
}
#endif
#endif

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#ifndef NITRO_SND_COMMON_SEQ_H_
#define NITRO_SND_COMMON_SEQ_H_
#include <nitro/types.h>
#include <nitro/snd/common/exchannel.h>
#ifdef __cplusplus
extern "C" {
#endif
#define SND_PLAYER_NUM 16
#define SND_PLAYER_MIN 0
#define SND_PLAYER_MAX 15
#define SND_TRACK_NUM 32
#define SND_TRACK_MIN 0
#define SND_TRACK_MAX 31
#define SND_TRACK_NUM_PER_PLAYER 16
#define SND_INVALID_TRACK_INDEX 0xff
#define SND_BASE_TEMPO 240
#define SND_DEFAULT_TEMPO 120
#define SND_TRACK_CALL_STACK_DEPTH 3
#define SND_PLAYER_VARIABLE_NUM 16
#define SND_GLOBAL_VARIABLE_NUM 16
typedef enum {
SND_SEQ_MUTE_OFF,
SND_SEQ_MUTE_NO_STOP,
SND_SEQ_MUTE_RELEASE,
SND_SEQ_MUTE_STOP
} SNDSeqMute;
struct SNDBankData;
typedef struct SNDPlayer {
u8 active_flag :1;
u8 prepared_flag :1;
u8 pause_flag :1;
u8 pad_ :5;
u8 myNo;
u8 pad2_;
u8 pad3_;
u8 prio;
u8 volume;
s16 extFader;
u8 tracks[SND_TRACK_NUM_PER_PLAYER];
u16 tempo;
u16 tempo_ratio;
u16 tempo_counter;
u16 pad__;
struct SNDBankData * bank;
} SNDPlayer;
typedef struct SNDTrack {
u8 active_flag :1;
u8 note_wait :1;
u8 mute_flag :1;
u8 tie_flag :1;
u8 note_finish_wait :1;
u8 porta_flag :1;
u8 cmp_flag :1;
u8 channel_mask_flag :1;
u8 pan_range;
u16 prgNo;
u8 volume;
u8 volume2;
s8 pitch_bend;
u8 bend_range;
s8 pan;
s8 ext_pan;
s16 extFader;
s16 ext_pitch;
u8 attack;
u8 decay;
u8 sustain;
u8 release;
u8 prio;
s8 transpose;
u8 porta_key;
u8 porta_time;
s16 sweep_pitch;
struct SNDLfoParam mod;
u16 channel_mask;
s32 wait;
const u8 * base;
const u8 * cur;
const u8 * call_stack[SND_TRACK_CALL_STACK_DEPTH];
u8 loop_count[SND_TRACK_CALL_STACK_DEPTH];
u8 call_stack_depth;
struct SNDExChannel * channel_list;
} SNDTrack;
#ifdef SDK_ARM7
void SND_SeqInit(void);
void SND_SeqMain(BOOL doPeriodicProc);
void SND_StartSeq(int playerNo, const void * seqBase, u32 seqOffset, struct SNDBankData * bank_p);
void SND_StopSeq(int playerNo);
void SND_PrepareSeq(int playerNo, const void * seqBase, u32 seqOffset, struct SNDBankData * bank_p);
void SND_StartPreparedSeq(int playerNo);
void SND_PauseSeq(int playerNo, BOOL flag);
void SND_SkipSeq(int playerNo, u32 tick);
void SND_SetTrackMute(int playerNo, u32 trackBitMask, SNDSeqMute mute);
void SND_SetTrackAllocatableChannel(int playerNo, u32 trackBitMask, u32 chBitMask);
void SND_InvalidateSeq(const void * start, const void * end);
void SND_InvalidateBank(const void * start, const void * end);
void SND_MmlPrintEnable(BOOL enble);
#endif
#ifdef SDK_ARM7
void SNDi_SetPlayerParam(int playerNo, u32 offset, u32 data, int size);
void SNDi_SetTrackParam(int playerNo, u32 trackBitMask, u32 offset, u32 data, int size);
#endif
#ifdef __cplusplus
}
#endif
#endif

6
lib/include/nitro/std.h Normal file
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@@ -0,0 +1,6 @@
#ifndef NITRO_STD_H_
#define NITRO_STD_H_
#include <nitro/std/string.h>
#endif //NITRO_STD_H_

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