mirror of
https://github.com/pret/pmd-sky.git
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Merge pull request #272 from SethBarberee/nitrosdk_c_move
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Start MSL_C Split and Finish NitroSDK splitting
This commit is contained in:
@@ -8,8 +8,8 @@
|
||||
.public _020A2CF8
|
||||
.public _022A88F0
|
||||
.public _022A88FC
|
||||
.public _022B966C
|
||||
.public _022B99D0
|
||||
.public OSi_ThreadInfo
|
||||
.public OSi_IsInitReset
|
||||
.public CP_SaveContext
|
||||
.public CPi_RestoreContext
|
||||
.public DC_InvalidateAll
|
||||
|
||||
@@ -12,7 +12,7 @@
|
||||
.public _0229B0F8
|
||||
.public _0229B110
|
||||
.public _0229B114
|
||||
.public _022B966C
|
||||
.public OSi_ThreadInfo
|
||||
.public Card_LockBackup
|
||||
.public Card_LockRom
|
||||
.public Card_SetPulledOutCallback
|
||||
@@ -39,7 +39,7 @@
|
||||
.public OS_UnlockMutex
|
||||
.public OS_WakeupThreadDirect
|
||||
.public Rand16Bit
|
||||
.public StartThread
|
||||
.public OS_CreateThread
|
||||
.public sub_02003AD0
|
||||
.public sub_020059A8
|
||||
.public WaitForInterrupt
|
||||
|
||||
@@ -77,7 +77,7 @@
|
||||
.public Snd_StopTimer
|
||||
.public SoundEnvelope_ForceVolume
|
||||
.public SoundLfoBank_Reset
|
||||
.public StartThread
|
||||
.public OS_CreateThread
|
||||
.public sub_0206C688
|
||||
.public sub_02072BB8
|
||||
.public UpdateChannels
|
||||
|
||||
@@ -22,17 +22,17 @@
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public OSi_IsThreadInitialized
|
||||
.public OSi_ThreadInfo
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public OSi_Initialized
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public OSi_DebuggerHandler
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_ExContext
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
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||||
.public _ll_udiv
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||||
|
||||
@@ -12,7 +12,7 @@
|
||||
.public _020B2ED4
|
||||
.public _020B2FBC
|
||||
.public _020B3364
|
||||
.public _022B966C
|
||||
.public OSi_ThreadInfo
|
||||
.public _022BB5EC
|
||||
.public _022BB5FC
|
||||
.public _022BB604
|
||||
@@ -47,7 +47,40 @@
|
||||
.public _022BCA74
|
||||
.public _f2d
|
||||
.public _ll_udiv
|
||||
.public Card_CheckEnabled
|
||||
.public Card_LockRom
|
||||
.public Card_UnlockRom
|
||||
.public Card_IsPulledOut
|
||||
.public Card_TryWaitBackupAsync
|
||||
.public Card_WaitBackupAsync
|
||||
.public Cardi_CheckPulledOutCore
|
||||
.public Cardi_IdentifyBackupCore
|
||||
.public Cardi_ReadRom
|
||||
.public Cardi_Request
|
||||
.public Cardi_SetTask
|
||||
.public Cardi_TryWaitAsync
|
||||
.public Cardi_WaitAsync
|
||||
.public CARDi_InitCommon
|
||||
.public CARDi_TaskThread
|
||||
.public CARDi_OnFifoRecv
|
||||
.public CARD_Init
|
||||
.public CARD_InitPulledOutCallback
|
||||
.public CopyAndInterleave
|
||||
.public Ctrdg_Enable
|
||||
.public Ctrdg_IsExisting
|
||||
.public Ctrdgi_Enable
|
||||
.public Ctrdgi_InitTaskThread
|
||||
.public Ctrdgi_IsExisting
|
||||
.public CTRDGi_InitCommon
|
||||
.public CTRDGi_LockByProcessor
|
||||
.public CTRDGi_UnlockByProcessor
|
||||
.public CTRDGi_RestoreAccessCycle
|
||||
.public CTRDGi_ChangeLatestAccessCycle
|
||||
.public CTRDGi_SendtoPxi
|
||||
.public Dgt_Hash2Init
|
||||
.public Dgt_Hash2Update
|
||||
.public Dgt_Hash2GetHash
|
||||
.public Dgt_Hash2CalcHmac
|
||||
.public DC_FlushAll
|
||||
.public DC_FlushRange
|
||||
.public DC_InvalidateRange
|
||||
@@ -99,15 +132,21 @@
|
||||
.public OS_WakeupThread
|
||||
.public OS_WakeupThreadDirect
|
||||
.public OSi_ReferSymbol
|
||||
.public PM_ForceToPowerOff
|
||||
.public PXI_Init
|
||||
.public PXI_IsCallbackReady
|
||||
.public PXI_SendWordByFifo
|
||||
.public PXI_SetFifoRecvCallback
|
||||
.public PXIi_HandlerRecvFifoNotEmpty
|
||||
.public Rtci_ReadRawDateAsync
|
||||
.public Rtci_ReadRawTimeAsync
|
||||
.public Rtci_ReadRawDateTimeAsync
|
||||
.public Rtci_WriteRawStatus2Async
|
||||
.public Rtc_GetDayOfWeek
|
||||
.public SetIrqFlag
|
||||
.public StartThread
|
||||
.public OS_CreateThread
|
||||
.public SVC_CpuSet
|
||||
.public SVC_WaitByLoop
|
||||
.public ThreadExit
|
||||
.public OS_ExitThread
|
||||
.public WaitForever2
|
||||
.public WaitForInterrupt
|
||||
|
||||
@@ -16,7 +16,7 @@
|
||||
.public _020B3218
|
||||
.public _020B321C
|
||||
.public _020B3220
|
||||
.public _022B966C
|
||||
.public OSi_ThreadInfo
|
||||
.public _022BC650
|
||||
.public _022BC674
|
||||
.public _022BC698
|
||||
@@ -38,3 +38,7 @@
|
||||
.public strchr
|
||||
.public strlen
|
||||
.public strncpy
|
||||
|
||||
.public _flush_buffer
|
||||
.public _prep_buffer
|
||||
.public _load_buffer
|
||||
|
||||
@@ -6,7 +6,7 @@
|
||||
.public _020AECB0
|
||||
.public _020AED30
|
||||
.public _020AEDB0
|
||||
.public _022B966C
|
||||
.public OSi_ThreadInfo
|
||||
.public _022BCA70
|
||||
.public _d2f
|
||||
.public _dadd
|
||||
@@ -1102,7 +1102,7 @@
|
||||
.public snprintf
|
||||
.public sprintf
|
||||
.public srand
|
||||
.public StartThread
|
||||
.public OS_CreateThread
|
||||
.public Std_CompareNString
|
||||
.public Std_CompareString__020852CC
|
||||
.public Std_CopyLString
|
||||
@@ -1174,7 +1174,7 @@
|
||||
.public sub_0205B80C
|
||||
.public sub_02079990
|
||||
.public SVC_WaitByLoop
|
||||
.public ThreadExit
|
||||
.public OS_ExitThread
|
||||
.public UnloadOverlay
|
||||
.public Util_RandSeed
|
||||
.public WaitForever2
|
||||
|
||||
@@ -223,7 +223,7 @@
|
||||
.public Soc_U32to4U8
|
||||
.public socket
|
||||
.public Socl_GetHostID
|
||||
.public StartThread
|
||||
.public OS_CreateThread
|
||||
.public strcpy
|
||||
.public strlen
|
||||
.public strncpy
|
||||
|
||||
10
asm/itcm.s
10
asm/itcm.s
@@ -1841,11 +1841,11 @@ _01FF9668:
|
||||
ldr ip, _01FF97BC ; =DTCM_BSS
|
||||
str r3, [ip]
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||||
str r3, [ip, #4]
|
||||
ldr ip, _01FF97C0 ; =_022B966C
|
||||
ldr ip, _01FF97C0 ; =OSi_ThreadInfo
|
||||
mov r1, #1
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||||
strh r1, [ip]
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||||
_01FF96A0:
|
||||
ldr ip, _01FF97C0 ; =_022B966C
|
||||
ldr ip, _01FF97C0 ; =OSi_ThreadInfo
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||||
ldrh r1, [ip]
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||||
cmp r1, #0
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beq _01FF96B4
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||||
@@ -1931,7 +1931,7 @@ _01FF9738:
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||||
ldmia sp!, {pc}
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||||
.align 2, 0
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||||
_01FF97BC: .word DTCM_BSS
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||||
_01FF97C0: .word _022B966C
|
||||
_01FF97C0: .word OSi_ThreadInfo
|
||||
_01FF97C4: .word CP_SaveContext
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||||
_01FF97C8: .word CPi_RestoreContext
|
||||
arm_func_end ReturnFromInterrupt
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||||
@@ -1939,7 +1939,7 @@ _01FF97C8: .word CPi_RestoreContext
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||||
arm_func_start OSi_DoResetSystem
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||||
OSi_DoResetSystem: ; 0x01FF97CC
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||||
stmdb sp!, {r3, lr}
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||||
ldr r0, _01FF97F8 ; =_022B99D0
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||||
ldr r0, _01FF97F8 ; =OSi_IsInitReset
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||||
_01FF97D4:
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||||
ldrh r1, [r0]
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cmp r1, #0
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@@ -1951,7 +1951,7 @@ _01FF97D4:
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||||
bl OSi_DoBoot
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ldmia sp!, {r3, pc}
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.align 2, 0
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||||
_01FF97F8: .word _022B99D0
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||||
_01FF97F8: .word OSi_IsInitReset
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||||
_01FF97FC: .word 0x04000208
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||||
arm_func_end OSi_DoResetSystem
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||||
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||||
@@ -234,7 +234,7 @@ _02002504:
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||||
str r2, [r1, #4]
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||||
str r2, [r1, #8]
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||||
bl OS_UnlockMutex
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ldr r1, _02002578 ; =_022B966C
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ldr r1, _02002578 ; =OSi_ThreadInfo
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ldr r0, _0200257C ; =_0229B004
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||||
ldr r1, [r1, #4]
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||||
mov r2, #0
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||||
@@ -245,7 +245,7 @@ _02002504:
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||||
str r1, [r0, #0x10]
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str r2, [r0, #0x14]
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||||
bl sub_020026E4
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ldr r0, _02002578 ; =_022B966C
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||||
ldr r0, _02002578 ; =OSi_ThreadInfo
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||||
mov r1, #7
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ldr r0, [r0, #4]
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||||
bl OS_SetThreadPriority
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@@ -254,14 +254,14 @@ _02002504:
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||||
_0200256C: .word _0229AFCC
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||||
_02002570: .word _0229AFE4
|
||||
_02002574: .word _0229AFC0
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||||
_02002578: .word _022B966C
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_02002578: .word OSi_ThreadInfo
|
||||
_0200257C: .word _0229B004
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||||
arm_func_end sub_020024E4
|
||||
|
||||
arm_func_start sub_02002580
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||||
sub_02002580: ; 0x02002580
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||||
stmdb sp!, {r3, r4, r5, lr}
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||||
ldr r1, _020025E8 ; =_022B966C
|
||||
ldr r1, _020025E8 ; =OSi_ThreadInfo
|
||||
ldr r0, _020025EC ; =_0229AFCC
|
||||
ldr r4, [r1, #4]
|
||||
bl OS_LockMutex
|
||||
@@ -291,7 +291,7 @@ _020025E0:
|
||||
mov r0, r5
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_020025E8: .word _022B966C
|
||||
_020025E8: .word OSi_ThreadInfo
|
||||
_020025EC: .word _0229AFCC
|
||||
_020025F0: .word _0229AFC0
|
||||
_020025F4: .word _0229AFE4
|
||||
@@ -323,7 +323,7 @@ sub_02002624: ; 0x02002624
|
||||
arm_func_start sub_02002628
|
||||
sub_02002628: ; 0x02002628
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr r2, _02002658 ; =_022B966C
|
||||
ldr r2, _02002658 ; =OSi_ThreadInfo
|
||||
mov r5, r0
|
||||
ldr r0, [r2, #4]
|
||||
mov r4, r1
|
||||
@@ -335,7 +335,7 @@ sub_02002628: ; 0x02002628
|
||||
bl OS_SetThreadPriority
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_02002658: .word _022B966C
|
||||
_02002658: .word OSi_ThreadInfo
|
||||
arm_func_end sub_02002628
|
||||
|
||||
arm_func_start sub_0200265C
|
||||
@@ -351,7 +351,7 @@ _0200266C: .word OS_SetThreadPriority
|
||||
arm_func_start sub_02002670
|
||||
sub_02002670: ; 0x02002670
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr r0, _020026AC ; =_022B966C
|
||||
ldr r0, _020026AC ; =OSi_ThreadInfo
|
||||
ldr r5, [r0, #4]
|
||||
mov r0, r5
|
||||
bl OS_GetThreadPriority
|
||||
@@ -366,7 +366,7 @@ sub_02002670: ; 0x02002670
|
||||
str r4, [r0, #4]
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_020026AC: .word _022B966C
|
||||
_020026AC: .word OSi_ThreadInfo
|
||||
_020026B0: .word _0229AFCC
|
||||
_020026B4: .word _020AEF30
|
||||
arm_func_end sub_02002670
|
||||
@@ -390,7 +390,7 @@ _020026E0: .word _0229AFCC
|
||||
arm_func_start sub_020026E4
|
||||
sub_020026E4: ; 0x020026E4
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
ldr r1, _02002768 ; =_022B966C
|
||||
ldr r1, _02002768 ; =OSi_ThreadInfo
|
||||
mov r6, r0
|
||||
ldr r5, [r1, #4]
|
||||
mov r0, r5
|
||||
@@ -424,7 +424,7 @@ _02002750:
|
||||
bl OS_SetThreadPriority
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_02002768: .word _022B966C
|
||||
_02002768: .word OSi_ThreadInfo
|
||||
_0200276C: .word _0229AFCC
|
||||
_02002770: .word _0229AFC0
|
||||
_02002774: .word _0229AFE4
|
||||
@@ -455,7 +455,7 @@ sub_02002778: ; 0x02002778
|
||||
ldmia ip, {r1, lr}
|
||||
ldr r0, [r4]
|
||||
add r3, lr, r3
|
||||
bl StartThread
|
||||
bl OS_CreateThread
|
||||
mov r0, r4
|
||||
bl sub_020026E4
|
||||
add sp, sp, #8
|
||||
@@ -489,7 +489,7 @@ sub_020027F8: ; 0x020027F8
|
||||
arm_func_start sub_02002824
|
||||
sub_02002824: ; 0x02002824
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
ldr r1, _02002854 ; =_022B966C
|
||||
ldr r1, _02002854 ; =OSi_ThreadInfo
|
||||
mov r6, r0
|
||||
ldr r5, [r1, #4]
|
||||
mov r0, r5
|
||||
@@ -501,7 +501,7 @@ sub_02002824: ; 0x02002824
|
||||
mov r0, r4
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_02002854: .word _022B966C
|
||||
_02002854: .word OSi_ThreadInfo
|
||||
arm_func_end sub_02002824
|
||||
|
||||
arm_func_start sub_02002858
|
||||
@@ -646,7 +646,7 @@ _020029B4: .word OS_SendMessage
|
||||
arm_func_start sub_020029B8
|
||||
sub_020029B8: ; 0x020029B8
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
|
||||
ldr r1, _02002A40 ; =_022B966C
|
||||
ldr r1, _02002A40 ; =OSi_ThreadInfo
|
||||
mov r4, r0
|
||||
ldr sb, [r1, #4]
|
||||
mov r7, #0
|
||||
@@ -683,14 +683,14 @@ _02002A10:
|
||||
mov r0, r7
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
|
||||
.align 2, 0
|
||||
_02002A40: .word _022B966C
|
||||
_02002A40: .word OSi_ThreadInfo
|
||||
arm_func_end sub_020029B8
|
||||
|
||||
arm_func_start sub_02002A44
|
||||
sub_02002A44: ; 0x02002A44
|
||||
stmdb sp!, {r3, r4, r5, r6, lr}
|
||||
sub sp, sp, #4
|
||||
ldr r1, _02002A94 ; =_022B966C
|
||||
ldr r1, _02002A94 ; =OSi_ThreadInfo
|
||||
mov r6, r0
|
||||
ldr r5, [r1, #4]
|
||||
mov r0, r5
|
||||
@@ -709,7 +709,7 @@ sub_02002A44: ; 0x02002A44
|
||||
add sp, sp, #4
|
||||
ldmia sp!, {r3, r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_02002A94: .word _022B966C
|
||||
_02002A94: .word OSi_ThreadInfo
|
||||
arm_func_end sub_02002A44
|
||||
|
||||
arm_func_start sub_02002A98
|
||||
@@ -798,7 +798,7 @@ sub_02002B50: ; 0x02002B50
|
||||
sub_02002B7C: ; 0x02002B7C
|
||||
stmdb sp!, {r3, r4, r5, r6, lr}
|
||||
sub sp, sp, #4
|
||||
ldr r1, _02002BCC ; =_022B966C
|
||||
ldr r1, _02002BCC ; =OSi_ThreadInfo
|
||||
mov r6, r0
|
||||
ldr r5, [r1, #4]
|
||||
mov r0, r5
|
||||
@@ -817,14 +817,14 @@ sub_02002B7C: ; 0x02002B7C
|
||||
add sp, sp, #4
|
||||
ldmia sp!, {r3, r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_02002BCC: .word _022B966C
|
||||
_02002BCC: .word OSi_ThreadInfo
|
||||
arm_func_end sub_02002B7C
|
||||
|
||||
arm_func_start sub_02002BD0
|
||||
sub_02002BD0: ; 0x02002BD0
|
||||
stmdb sp!, {r3, r4, r5, r6, lr}
|
||||
sub sp, sp, #4
|
||||
ldr r1, _02002C28 ; =_022B966C
|
||||
ldr r1, _02002C28 ; =OSi_ThreadInfo
|
||||
mov r5, r0
|
||||
ldr r6, [r1, #4]
|
||||
mov r0, r6
|
||||
@@ -845,7 +845,7 @@ sub_02002BD0: ; 0x02002BD0
|
||||
add sp, sp, #4
|
||||
ldmia sp!, {r3, r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_02002C28: .word _022B966C
|
||||
_02002C28: .word OSi_ThreadInfo
|
||||
arm_func_end sub_02002BD0
|
||||
|
||||
arm_func_start sub_02002C2C
|
||||
@@ -861,7 +861,7 @@ _02002C3C: .word _0229B0F8
|
||||
arm_func_start sub_02002C40
|
||||
sub_02002C40: ; 0x02002C40
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
ldr r1, _02002CA4 ; =_022B966C
|
||||
ldr r1, _02002CA4 ; =OSi_ThreadInfo
|
||||
mov r6, r0
|
||||
ldr r5, [r1, #4]
|
||||
mov r0, r5
|
||||
@@ -886,7 +886,7 @@ sub_02002C40: ; 0x02002C40
|
||||
bl OS_SetThreadPriority
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_02002CA4: .word _022B966C
|
||||
_02002CA4: .word OSi_ThreadInfo
|
||||
_02002CA8: .word _0229B0F8
|
||||
arm_func_end sub_02002C40
|
||||
|
||||
@@ -899,7 +899,7 @@ sub_02002CAC: ; 0x02002CAC
|
||||
arm_func_start sub_02002CB4
|
||||
sub_02002CB4: ; 0x02002CB4
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
ldr r1, _02002D10 ; =_022B966C
|
||||
ldr r1, _02002D10 ; =OSi_ThreadInfo
|
||||
mov r6, r0
|
||||
ldr r5, [r1, #4]
|
||||
mov r0, r5
|
||||
@@ -924,13 +924,13 @@ _02002CF8:
|
||||
str r0, [r6, #0x18]
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_02002D10: .word _022B966C
|
||||
_02002D10: .word OSi_ThreadInfo
|
||||
arm_func_end sub_02002CB4
|
||||
|
||||
arm_func_start sub_02002D14
|
||||
sub_02002D14: ; 0x02002D14
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
ldr r2, _02002D7C ; =_022B966C
|
||||
ldr r2, _02002D7C ; =OSi_ThreadInfo
|
||||
mov r7, r0
|
||||
ldr r5, [r2, #4]
|
||||
mov r6, r1
|
||||
@@ -958,7 +958,7 @@ _02002D5C:
|
||||
str r0, [r7, #0x18]
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_02002D7C: .word _022B966C
|
||||
_02002D7C: .word OSi_ThreadInfo
|
||||
arm_func_end sub_02002D14
|
||||
|
||||
arm_func_start sub_02002D80
|
||||
@@ -1008,7 +1008,7 @@ _02002E08:
|
||||
arm_func_start sub_02002E10
|
||||
sub_02002E10: ; 0x02002E10
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
ldr r1, _02002E94 ; =_022B966C
|
||||
ldr r1, _02002E94 ; =OSi_ThreadInfo
|
||||
mov r6, r0
|
||||
ldr r5, [r1, #4]
|
||||
mov r0, r5
|
||||
@@ -1045,7 +1045,7 @@ _02002E8C:
|
||||
mov r0, #0
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_02002E94: .word _022B966C
|
||||
_02002E94: .word OSi_ThreadInfo
|
||||
arm_func_end sub_02002E10
|
||||
|
||||
arm_func_start sub_02002E98
|
||||
|
||||
@@ -323,7 +323,7 @@ DseSwd_SysInit: ; 0x0206CD9C
|
||||
add r3, r2, #0x800
|
||||
ldr r1, _0206CE24 ; =DseSwd_SampleLoaderMain
|
||||
mov r2, #0
|
||||
bl StartThread
|
||||
bl OS_CreateThread
|
||||
ldr r0, _0206CE20 ; =_022B9120
|
||||
bl OS_WakeupThreadDirect
|
||||
add sp, sp, #8
|
||||
@@ -4322,7 +4322,7 @@ sub_020701F8: ; 0x020701F8
|
||||
ldr r3, [r2, #0x34]
|
||||
mov r2, #0
|
||||
add r3, r3, #0x400
|
||||
bl StartThread
|
||||
bl OS_CreateThread
|
||||
ldr r0, _02070284 ; =_022B94BC
|
||||
bl OS_WakeupThreadDirect
|
||||
mov r0, #0
|
||||
@@ -5202,7 +5202,7 @@ DseDriver_StartMainThread: ; 0x02070E0C
|
||||
ldr r3, [r2, #0xdd4]
|
||||
mov r2, #0
|
||||
add r3, r3, #0x800
|
||||
bl StartThread
|
||||
bl OS_CreateThread
|
||||
ldr r0, _02070E98 ; =_022B9044
|
||||
bl OS_WakeupThreadDirect
|
||||
bl DseDriver_StartTickTimer
|
||||
|
||||
8346
asm/main_0207F894.s
8346
asm/main_0207F894.s
File diff suppressed because it is too large
Load Diff
@@ -3,112 +3,6 @@
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start _convert_from_newlines
|
||||
_convert_from_newlines: ; 0x02086568
|
||||
bx lr
|
||||
arm_func_end _convert_from_newlines
|
||||
|
||||
arm_func_start _convert_to_newlines
|
||||
_convert_to_newlines: ; 0x0208656C
|
||||
bx lr
|
||||
arm_func_end _convert_to_newlines
|
||||
|
||||
arm_func_start _prep_buffer
|
||||
_prep_buffer: ; 0x02086570
|
||||
ldr r1, [r0, #0x1c]
|
||||
str r1, [r0, #0x24]
|
||||
ldr r3, [r0, #0x20]
|
||||
str r3, [r0, #0x28]
|
||||
ldr r2, [r0, #0x18]
|
||||
ldr r1, [r0, #0x2c]
|
||||
and r1, r2, r1
|
||||
sub r1, r3, r1
|
||||
str r1, [r0, #0x28]
|
||||
ldr r1, [r0, #0x18]
|
||||
str r1, [r0, #0x34]
|
||||
bx lr
|
||||
arm_func_end _prep_buffer
|
||||
|
||||
arm_func_start _load_buffer
|
||||
_load_buffer: ; 0x020865A0
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r5, r2
|
||||
mov r4, r0
|
||||
mov r6, r1
|
||||
bl _prep_buffer
|
||||
cmp r5, #1
|
||||
ldreq r0, [r4, #0x20]
|
||||
add r2, r4, #0x28
|
||||
streq r0, [r4, #0x28]
|
||||
ldr r0, [r4]
|
||||
ldr r1, [r4, #0x1c]
|
||||
ldr r3, [r4, #0x48]
|
||||
ldr ip, [r4, #0x3c]
|
||||
blx ip
|
||||
cmp r0, #2
|
||||
moveq r1, #0
|
||||
streq r1, [r4, #0x28]
|
||||
cmp r6, #0
|
||||
ldrne r1, [r4, #0x28]
|
||||
strne r1, [r6]
|
||||
cmp r0, #0
|
||||
ldmneia sp!, {r4, r5, r6, pc}
|
||||
ldr r1, [r4, #0x18]
|
||||
ldr r0, [r4, #0x28]
|
||||
add r0, r1, r0
|
||||
str r0, [r4, #0x18]
|
||||
ldr r0, [r4, #4]
|
||||
mov r0, r0, lsl #0x13
|
||||
movs r0, r0, lsr #0x1f
|
||||
bne _02086624
|
||||
ldr r0, [r4, #0x1c]
|
||||
add r1, r4, #0x28
|
||||
bl _convert_to_newlines
|
||||
_02086624:
|
||||
mov r0, #0
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
arm_func_end _load_buffer
|
||||
|
||||
arm_func_start _flush_buffer
|
||||
_flush_buffer: ; 0x0208662C
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
mov r5, r0
|
||||
ldr r2, [r5, #0x24]
|
||||
ldr r0, [r5, #0x1c]
|
||||
mov r4, r1
|
||||
subs r0, r2, r0
|
||||
beq _020866A4
|
||||
str r0, [r5, #0x28]
|
||||
ldr r0, [r5, #4]
|
||||
mov r0, r0, lsl #0x13
|
||||
movs r0, r0, lsr #0x1f
|
||||
bne _02086668
|
||||
ldr r0, [r5, #0x1c]
|
||||
add r1, r5, #0x28
|
||||
bl _convert_from_newlines
|
||||
_02086668:
|
||||
ldr r0, [r5]
|
||||
ldr r1, [r5, #0x1c]
|
||||
ldr r3, [r5, #0x48]
|
||||
ldr ip, [r5, #0x40]
|
||||
add r2, r5, #0x28
|
||||
blx ip
|
||||
cmp r4, #0
|
||||
ldrne r1, [r5, #0x28]
|
||||
strne r1, [r4]
|
||||
cmp r0, #0
|
||||
ldmneia sp!, {r3, r4, r5, pc}
|
||||
ldr r1, [r5, #0x18]
|
||||
ldr r0, [r5, #0x28]
|
||||
add r0, r1, r0
|
||||
str r0, [r5, #0x18]
|
||||
_020866A4:
|
||||
mov r0, r5
|
||||
bl _prep_buffer
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
arm_func_end _flush_buffer
|
||||
|
||||
arm_func_start fread
|
||||
fread: ; 0x020866B4
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
|
||||
@@ -127,7 +21,7 @@ fread: ; 0x020866B4
|
||||
bl OS_TryLockMutex
|
||||
cmp r0, #0
|
||||
bne _02086718
|
||||
ldr r0, _020867B4 ; =_022B966C
|
||||
ldr r0, _020867B4 ; =OSi_ThreadInfo
|
||||
ldr r2, _020867B8 ; =_022BC650
|
||||
ldr r1, [r0, #4]
|
||||
ldr r0, _020867BC ; =_022BC674
|
||||
@@ -137,7 +31,7 @@ fread: ; 0x020866B4
|
||||
str r1, [r0, r6, lsl #2]
|
||||
b _02086770
|
||||
_02086718:
|
||||
ldr r0, _020867B4 ; =_022B966C
|
||||
ldr r0, _020867B4 ; =OSi_ThreadInfo
|
||||
ldr r1, _020867B8 ; =_022BC650
|
||||
ldr r0, [r0, #4]
|
||||
ldr r1, [r1, r6, lsl #2]
|
||||
@@ -152,7 +46,7 @@ _02086718:
|
||||
_02086748:
|
||||
add r0, r5, r4
|
||||
bl OS_LockMutex
|
||||
ldr r0, _020867B4 ; =_022B966C
|
||||
ldr r0, _020867B4 ; =OSi_ThreadInfo
|
||||
ldr r2, _020867B8 ; =_022BC650
|
||||
ldr r1, [r0, #4]
|
||||
ldr r0, _020867BC ; =_022BC674
|
||||
@@ -180,7 +74,7 @@ _020867A4:
|
||||
.align 2, 0
|
||||
_020867AC: .word _020B2ED4
|
||||
_020867B0: .word _022BC698
|
||||
_020867B4: .word _022B966C
|
||||
_020867B4: .word OSi_ThreadInfo
|
||||
_020867B8: .word _022BC650
|
||||
_020867BC: .word _022BC674
|
||||
arm_func_end fread
|
||||
@@ -622,7 +516,7 @@ _02086DA0:
|
||||
bl OS_TryLockMutex
|
||||
cmp r0, #0
|
||||
bne _02086DE0
|
||||
ldr r0, _02086E78 ; =_022B966C
|
||||
ldr r0, _02086E78 ; =OSi_ThreadInfo
|
||||
ldr r2, _02086E7C ; =_022BC650
|
||||
ldr r1, [r0, #4]
|
||||
ldr r0, _02086E80 ; =_022BC674
|
||||
@@ -632,7 +526,7 @@ _02086DA0:
|
||||
str r1, [r0, r6, lsl #2]
|
||||
b _02086E38
|
||||
_02086DE0:
|
||||
ldr r0, _02086E78 ; =_022B966C
|
||||
ldr r0, _02086E78 ; =OSi_ThreadInfo
|
||||
ldr r1, _02086E7C ; =_022BC650
|
||||
ldr r0, [r0, #4]
|
||||
ldr r1, [r1, r6, lsl #2]
|
||||
@@ -647,7 +541,7 @@ _02086DE0:
|
||||
_02086E10:
|
||||
add r0, r5, r4
|
||||
bl OS_LockMutex
|
||||
ldr r0, _02086E78 ; =_022B966C
|
||||
ldr r0, _02086E78 ; =OSi_ThreadInfo
|
||||
ldr r2, _02086E7C ; =_022BC650
|
||||
ldr r1, [r0, #4]
|
||||
ldr r0, _02086E80 ; =_022BC674
|
||||
@@ -674,7 +568,7 @@ _02086E68: .word _020B2ED4
|
||||
_02086E6C: .word _020B2F20
|
||||
_02086E70: .word _020B2F6C
|
||||
_02086E74: .word _022BC698
|
||||
_02086E78: .word _022B966C
|
||||
_02086E78: .word OSi_ThreadInfo
|
||||
_02086E7C: .word _022BC650
|
||||
_02086E80: .word _022BC674
|
||||
arm_func_end ftell
|
||||
@@ -841,7 +735,7 @@ _020870AC:
|
||||
bl OS_TryLockMutex
|
||||
cmp r0, #0
|
||||
bne _020870EC
|
||||
ldr r0, _0208718C ; =_022B966C
|
||||
ldr r0, _0208718C ; =OSi_ThreadInfo
|
||||
ldr r2, _02087190 ; =_022BC650
|
||||
ldr r1, [r0, #4]
|
||||
ldr r0, _02087194 ; =_022BC674
|
||||
@@ -851,7 +745,7 @@ _020870AC:
|
||||
str r1, [r0, r6, lsl #2]
|
||||
b _02087144
|
||||
_020870EC:
|
||||
ldr r0, _0208718C ; =_022B966C
|
||||
ldr r0, _0208718C ; =OSi_ThreadInfo
|
||||
ldr r1, _02087190 ; =_022BC650
|
||||
ldr r0, [r0, #4]
|
||||
ldr r1, [r1, r6, lsl #2]
|
||||
@@ -866,7 +760,7 @@ _020870EC:
|
||||
_0208711C:
|
||||
add r0, r5, r4
|
||||
bl OS_LockMutex
|
||||
ldr r0, _0208718C ; =_022B966C
|
||||
ldr r0, _0208718C ; =OSi_ThreadInfo
|
||||
ldr r2, _02087190 ; =_022BC650
|
||||
ldr r1, [r0, #4]
|
||||
ldr r0, _02087194 ; =_022BC674
|
||||
@@ -895,7 +789,7 @@ _0208717C: .word _020B2ED4
|
||||
_02087180: .word _020B2F20
|
||||
_02087184: .word _020B2F6C
|
||||
_02087188: .word _022BC698
|
||||
_0208718C: .word _022B966C
|
||||
_0208718C: .word OSi_ThreadInfo
|
||||
_02087190: .word _022BC650
|
||||
_02087194: .word _022BC674
|
||||
arm_func_end fseek
|
||||
|
||||
@@ -234,11 +234,11 @@ _022B9644:
|
||||
.global THREAD_INFO_STRUCT
|
||||
THREAD_INFO_STRUCT:
|
||||
.space 0xC
|
||||
.global _022B9654
|
||||
_022B9654:
|
||||
.global OSi_IsThreadInitialized
|
||||
OSi_IsThreadInitialized:
|
||||
.space 0x18
|
||||
.global _022B966C
|
||||
_022B966C:
|
||||
.global OSi_ThreadInfo
|
||||
OSi_ThreadInfo:
|
||||
.space 0x4
|
||||
.global _022B9670
|
||||
_022B9670:
|
||||
@@ -249,14 +249,14 @@ _022B967C:
|
||||
.global _022B973C
|
||||
_022B973C:
|
||||
.space 0x188
|
||||
.global _022B98C4
|
||||
_022B98C4:
|
||||
.global OSi_Initialized
|
||||
OSi_Initialized:
|
||||
.space 0x8
|
||||
.global _022B98CC
|
||||
_022B98CC:
|
||||
.space 0x24
|
||||
.global _022B98F0
|
||||
_022B98F0:
|
||||
.global OSi_DebuggerHandler
|
||||
OSi_DebuggerHandler:
|
||||
.space 0x4
|
||||
.global _022B98F4
|
||||
_022B98F4:
|
||||
@@ -264,8 +264,8 @@ _022B98F4:
|
||||
.global _022B98F8
|
||||
_022B98F8:
|
||||
.space 0x24
|
||||
.global _022B991C
|
||||
_022B991C:
|
||||
.global OSi_ExContext
|
||||
OSi_ExContext:
|
||||
.space 0x80
|
||||
.global OSi_TimerReserved
|
||||
OSi_TimerReserved:
|
||||
@@ -273,8 +273,8 @@ OSi_TimerReserved:
|
||||
.global OSi_UseTick
|
||||
OSi_UseTick:
|
||||
.space 0x8
|
||||
.global _022B99A8
|
||||
_022B99A8:
|
||||
.global OSi_TickCounter
|
||||
OSi_TickCounter:
|
||||
.space 0x8
|
||||
.global OSi_UseAlarm
|
||||
OSi_UseAlarm:
|
||||
@@ -282,8 +282,8 @@ OSi_UseAlarm:
|
||||
.global _022B99BC
|
||||
_022B99BC:
|
||||
.space 0x14
|
||||
.global _022B99D0
|
||||
_022B99D0:
|
||||
.global OSi_IsInitReset
|
||||
OSi_IsInitReset:
|
||||
.space 0x4
|
||||
.global OSi_vramExclusive
|
||||
OSi_vramExclusive:
|
||||
@@ -294,15 +294,15 @@ OSi_vramLockId:
|
||||
.global _022B99EC
|
||||
_022B99EC:
|
||||
.space 0x4
|
||||
.global _022B99F0
|
||||
_022B99F0:
|
||||
.global sSndMutex
|
||||
sSndMutex:
|
||||
#ifdef JAPAN
|
||||
.space 0x18
|
||||
#else
|
||||
.space 0x30
|
||||
#endif
|
||||
.global _022B9A20
|
||||
_022B9A20:
|
||||
.global sReserveList
|
||||
sReserveList:
|
||||
.space 0x24
|
||||
.global _022B9A44
|
||||
_022B9A44:
|
||||
@@ -322,8 +322,8 @@ _022BB4E8:
|
||||
.global _022BB500
|
||||
_022BB500:
|
||||
.space 0x60
|
||||
.global _022BB560
|
||||
_022BB560:
|
||||
.global SNDi_SharedWork
|
||||
SNDi_SharedWork:
|
||||
.space 0x4
|
||||
.global _022BB564
|
||||
_022BB564:
|
||||
|
||||
@@ -11213,8 +11213,8 @@ _020AE224:
|
||||
.byte 0x07, 0xF5, 0x7B, 0xF5, 0xEF, 0xF5, 0x63, 0xF6, 0xD7, 0xF6, 0x4C, 0xF7, 0xC0, 0xF7, 0x34, 0xF8
|
||||
.byte 0xA9, 0xF8, 0x1E, 0xF9, 0x92, 0xF9, 0x07, 0xFA, 0x7C, 0xFA, 0xF1, 0xFA, 0x66, 0xFB, 0xDC, 0xFB
|
||||
.byte 0x51, 0xFC, 0xC7, 0xFC, 0x3C, 0xFD, 0xB2, 0xFD, 0x28, 0xFE, 0x9E, 0xFE, 0x14, 0xFF, 0x8A, 0xFF
|
||||
.global ARM9_UNKNOWN_TABLE__NA_20AE924
|
||||
ARM9_UNKNOWN_TABLE__NA_20AE924:
|
||||
.global VolumeTable
|
||||
VolumeTable:
|
||||
.byte 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
|
||||
.byte 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
|
||||
.byte 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
|
||||
|
||||
210
asm/overlay_00.s
210
asm/overlay_00.s
@@ -13698,7 +13698,7 @@ _022C7B8C:
|
||||
bl SetIrqFlag
|
||||
b _022C7A9C
|
||||
_022C7BA4:
|
||||
bl ThreadExit
|
||||
bl OS_ExitThread
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
arm_func_end MBi_TaskThread
|
||||
|
||||
@@ -13727,7 +13727,7 @@ MBi_InitTaskThread: ; 0x022C7BAC
|
||||
mov r2, r5
|
||||
add r3, r3, ip
|
||||
stmia sp, {ip, lr}
|
||||
bl StartThread
|
||||
bl OS_CreateThread
|
||||
mov r0, r5
|
||||
bl OS_WakeupThreadDirect
|
||||
_022C7C14:
|
||||
@@ -14166,7 +14166,7 @@ reset_network_vars: ; 0x022C8134
|
||||
ldr r0, _022C822C ; =ov00_023250F8
|
||||
mov r2, #0x60
|
||||
bl MI_CpuFill8
|
||||
ldr r0, _022C8230 ; =_022B966C
|
||||
ldr r0, _022C8230 ; =OSi_ThreadInfo
|
||||
ldr r6, [r0, #8]
|
||||
cmp r6, #0
|
||||
beq _022C81E4
|
||||
@@ -14215,7 +14215,7 @@ _022C8210:
|
||||
.align 2, 0
|
||||
_022C8228: .word ov00_02325078
|
||||
_022C822C: .word ov00_023250F8
|
||||
_022C8230: .word _022B966C
|
||||
_022C8230: .word OSi_ThreadInfo
|
||||
_022C8234: .word ov00_023253A0
|
||||
arm_func_end reset_network_vars
|
||||
|
||||
@@ -14361,7 +14361,7 @@ _022C8324:
|
||||
ldr r0, _022C8494 ; =ov00_023252E0
|
||||
ldr r3, _022C8498 ; =ov00_023268C0
|
||||
str r4, [sp, #4]
|
||||
bl StartThread
|
||||
bl OS_CreateThread
|
||||
mov r1, #0x800
|
||||
ldr r0, _022C848C ; =ov00_02318844
|
||||
str r1, [sp]
|
||||
@@ -14371,7 +14371,7 @@ _022C8324:
|
||||
ldr r1, _022C84A0 ; =scavenger
|
||||
ldr r3, _022C84A4 ; =ov00_023260C0
|
||||
mov r2, #0
|
||||
bl StartThread
|
||||
bl OS_CreateThread
|
||||
ldr r0, _022C8494 ; =ov00_023252E0
|
||||
bl OS_WakeupThreadDirect
|
||||
ldr r0, _022C849C ; =ov00_02325220
|
||||
@@ -14902,7 +14902,7 @@ receive_packet: ; 0x022C8ACC
|
||||
cmp r1, r0
|
||||
bne _022C8B20
|
||||
mov r5, #0
|
||||
ldr r8, _022C8B88 ; =_022B966C
|
||||
ldr r8, _022C8B88 ; =OSi_ThreadInfo
|
||||
mov r4, r5
|
||||
_022C8AFC:
|
||||
ldr r1, [r8, #4]
|
||||
@@ -14943,7 +14943,7 @@ _022C8B38:
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
|
||||
.align 2, 0
|
||||
_022C8B84: .word ov00_02325078
|
||||
_022C8B88: .word _022B966C
|
||||
_022C8B88: .word OSi_ThreadInfo
|
||||
arm_func_end receive_packet
|
||||
|
||||
arm_func_start throw_packet
|
||||
@@ -15509,7 +15509,7 @@ send_ping: ; 0x022C9338
|
||||
mov r6, r1
|
||||
mov r1, #8
|
||||
ldr r3, _022C93E0 ; =ov00_02325078
|
||||
ldr r2, _022C93E4 ; =_022B966C
|
||||
ldr r2, _022C93E4 ; =OSi_ThreadInfo
|
||||
strh r1, [r4, #0x22]
|
||||
ldr r2, [r2, #4]
|
||||
ldrh lr, [r3, #4]
|
||||
@@ -15546,7 +15546,7 @@ send_ping: ; 0x022C9338
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_022C93E0: .word ov00_02325078
|
||||
_022C93E4: .word _022B966C
|
||||
_022C93E4: .word OSi_ThreadInfo
|
||||
arm_func_end send_ping
|
||||
|
||||
arm_func_start send_udp
|
||||
@@ -15645,7 +15645,7 @@ send_tcp: ; 0x022C9524
|
||||
mov r6, r3
|
||||
addeq sp, sp, #8
|
||||
ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
|
||||
ldr r0, _022C9788 ; =_022B966C
|
||||
ldr r0, _022C9788 ; =OSi_ThreadInfo
|
||||
ldr r1, _022C978C ; =ov00_023252E0
|
||||
ldr r0, [r0, #4]
|
||||
cmp r0, r1
|
||||
@@ -15790,7 +15790,7 @@ _022C9708:
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
|
||||
.align 2, 0
|
||||
_022C9788: .word _022B966C
|
||||
_022C9788: .word OSi_ThreadInfo
|
||||
_022C978C: .word ov00_023252E0
|
||||
_022C9790: .word ov00_0232558A
|
||||
_022C9794: .word ov00_02325078
|
||||
@@ -16000,7 +16000,7 @@ process_icmp_reply: ; 0x022C9A68
|
||||
mov r7, r1
|
||||
mov r6, r2
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _022C9B64 ; =_022B966C
|
||||
ldr r1, _022C9B64 ; =OSi_ThreadInfo
|
||||
mov r5, r0
|
||||
ldr r1, [r1, #8]
|
||||
cmp r1, #0
|
||||
@@ -16062,7 +16062,7 @@ _022C9B58:
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
.align 2, 0
|
||||
_022C9B64: .word _022B966C
|
||||
_022C9B64: .word OSi_ThreadInfo
|
||||
arm_func_end process_icmp_reply
|
||||
|
||||
arm_func_start valid_ip
|
||||
@@ -16139,7 +16139,7 @@ _022C9C54: .word 0x0000FFFF
|
||||
arm_func_start check_listener
|
||||
check_listener: ; 0x022C9C58
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
ldr r2, _022C9D28 ; =_022B966C
|
||||
ldr r2, _022C9D28 ; =OSi_ThreadInfo
|
||||
ldr ip, [r2, #8]
|
||||
cmp ip, #0
|
||||
beq _022C9D20
|
||||
@@ -16196,7 +16196,7 @@ _022C9D20:
|
||||
mov r0, #0
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_022C9D28: .word _022B966C
|
||||
_022C9D28: .word OSi_ThreadInfo
|
||||
arm_func_end check_listener
|
||||
|
||||
arm_func_start check_socket
|
||||
@@ -16254,7 +16254,7 @@ _022C9DD8:
|
||||
arm_func_start find_socket
|
||||
find_socket: ; 0x022C9DE0
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
ldr r2, _022C9E40 ; =_022B966C
|
||||
ldr r2, _022C9E40 ; =OSi_ThreadInfo
|
||||
mov r7, r0
|
||||
ldr r5, [r2, #8]
|
||||
mov r6, r1
|
||||
@@ -16281,7 +16281,7 @@ _022C9E38:
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_022C9E40: .word _022B966C
|
||||
_022C9E40: .word OSi_ThreadInfo
|
||||
arm_func_end find_socket
|
||||
|
||||
arm_func_start parse_mss
|
||||
@@ -16346,7 +16346,7 @@ tcp_send_handshake: ; 0x022C9EE4
|
||||
bl no_need_inq
|
||||
cmp r0, #0
|
||||
bne _022C9F1C
|
||||
ldr r0, _022C9F50 ; =_022B966C
|
||||
ldr r0, _022C9F50 ; =OSi_ThreadInfo
|
||||
ldr r1, _022C9F54 ; =ov00_023252E0
|
||||
ldr r0, [r0, #4]
|
||||
cmp r0, r1
|
||||
@@ -16367,7 +16367,7 @@ _022C9F3C:
|
||||
add sp, sp, #4
|
||||
ldmia sp!, {r3, r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_022C9F50: .word _022B966C
|
||||
_022C9F50: .word OSi_ThreadInfo
|
||||
_022C9F54: .word ov00_023252E0
|
||||
arm_func_end tcp_send_handshake
|
||||
|
||||
@@ -17104,7 +17104,7 @@ dispatch_udp: ; 0x022CA940
|
||||
ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
|
||||
_022CA978:
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _022CAB48 ; =_022B966C
|
||||
ldr r1, _022CAB48 ; =OSi_ThreadInfo
|
||||
mov r5, r0
|
||||
ldr r1, [r1, #8]
|
||||
cmp r1, #0
|
||||
@@ -17227,7 +17227,7 @@ _022CAB3C:
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
|
||||
.align 2, 0
|
||||
_022CAB48: .word _022B966C
|
||||
_022CAB48: .word OSi_ThreadInfo
|
||||
arm_func_end dispatch_udp
|
||||
|
||||
arm_func_start check_frag
|
||||
@@ -17588,7 +17588,7 @@ _022CB048: .word 0x00000806
|
||||
arm_func_start Cps_SocGetEport
|
||||
Cps_SocGetEport: ; 0x022CB04C
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||||
ldr r0, _022CB0E8 ; =_022B966C
|
||||
ldr r0, _022CB0E8 ; =OSi_ThreadInfo
|
||||
ldr r2, _022CB0EC ; =ov00_02325078
|
||||
ldr r0, [r0, #8]
|
||||
ldr r1, _022CB0F0 ; =0x00001388
|
||||
@@ -17633,7 +17633,7 @@ _022CB0D4:
|
||||
ldrh r0, [r0, #8]
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
.align 2, 0
|
||||
_022CB0E8: .word _022B966C
|
||||
_022CB0E8: .word OSi_ThreadInfo
|
||||
_022CB0EC: .word ov00_02325078
|
||||
_022CB0F0: .word 0x00001388
|
||||
arm_func_end Cps_SocGetEport
|
||||
@@ -17662,28 +17662,28 @@ _022CB134: .word ov00_02325078
|
||||
|
||||
arm_func_start Cps_SocRegister
|
||||
Cps_SocRegister: ; 0x022CB138
|
||||
ldr r1, _022CB148 ; =_022B966C
|
||||
ldr r1, _022CB148 ; =OSi_ThreadInfo
|
||||
ldr r1, [r1, #4]
|
||||
str r0, [r1, #0xa4]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_022CB148: .word _022B966C
|
||||
_022CB148: .word OSi_ThreadInfo
|
||||
arm_func_end Cps_SocRegister
|
||||
|
||||
arm_func_start Cps_SocUnRegister
|
||||
Cps_SocUnRegister: ; 0x022CB14C
|
||||
ldr r0, _022CB160 ; =_022B966C
|
||||
ldr r0, _022CB160 ; =OSi_ThreadInfo
|
||||
mov r1, #0
|
||||
ldr r0, [r0, #4]
|
||||
str r1, [r0, #0xa4]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_022CB160: .word _022B966C
|
||||
_022CB160: .word OSi_ThreadInfo
|
||||
arm_func_end Cps_SocUnRegister
|
||||
|
||||
arm_func_start Cps_SocDatagramMode
|
||||
Cps_SocDatagramMode: ; 0x022CB164
|
||||
ldr r0, _022CB18C ; =_022B966C
|
||||
ldr r0, _022CB18C ; =OSi_ThreadInfo
|
||||
ldr r0, [r0, #4]
|
||||
ldr r1, [r0, #0xa4]
|
||||
cmp r1, #0
|
||||
@@ -17694,13 +17694,13 @@ Cps_SocDatagramMode: ; 0x022CB164
|
||||
str r0, [r1, #0x44]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_022CB18C: .word _022B966C
|
||||
_022CB18C: .word OSi_ThreadInfo
|
||||
arm_func_end Cps_SocDatagramMode
|
||||
|
||||
arm_func_start Cps_SocBind
|
||||
Cps_SocBind: ; 0x022CB190
|
||||
stmdb sp!, {r4, lr}
|
||||
ldr r3, _022CB1E4 ; =_022B966C
|
||||
ldr r3, _022CB1E4 ; =OSi_ThreadInfo
|
||||
ldr r3, [r3, #4]
|
||||
ldr r4, [r3, #0xa4]
|
||||
cmp r4, #0
|
||||
@@ -17721,14 +17721,14 @@ Cps_SocBind: ; 0x022CB190
|
||||
strh r0, [r4, #0xa]
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_022CB1E4: .word _022B966C
|
||||
_022CB1E4: .word OSi_ThreadInfo
|
||||
_022CB1E8: .word 0x7F000001
|
||||
_022CB1EC: .word ov00_02325078
|
||||
arm_func_end Cps_SocBind
|
||||
|
||||
arm_func_start Cps_SocUse
|
||||
Cps_SocUse: ; 0x022CB1F0
|
||||
ldr r0, _022CB220 ; =_022B966C
|
||||
ldr r0, _022CB220 ; =OSi_ThreadInfo
|
||||
ldr r0, [r0, #4]
|
||||
ldr r1, [r0, #0xa4]
|
||||
cmp r1, #0
|
||||
@@ -17741,12 +17741,12 @@ Cps_SocUse: ; 0x022CB1F0
|
||||
str r0, [r1, #0x38]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_022CB220: .word _022B966C
|
||||
_022CB220: .word OSi_ThreadInfo
|
||||
arm_func_end Cps_SocUse
|
||||
|
||||
arm_func_start Cps_SocRelease
|
||||
Cps_SocRelease: ; 0x022CB224
|
||||
ldr r0, _022CB240 ; =_022B966C
|
||||
ldr r0, _022CB240 ; =OSi_ThreadInfo
|
||||
ldr r0, [r0, #4]
|
||||
ldr r1, [r0, #0xa4]
|
||||
cmp r1, #0
|
||||
@@ -17754,30 +17754,30 @@ Cps_SocRelease: ; 0x022CB224
|
||||
strne r0, [r1]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_022CB240: .word _022B966C
|
||||
_022CB240: .word OSi_ThreadInfo
|
||||
arm_func_end Cps_SocRelease
|
||||
|
||||
arm_func_start Cps_SocDup
|
||||
Cps_SocDup: ; 0x022CB244
|
||||
ldr r1, _022CB258 ; =_022B966C
|
||||
ldr r1, _022CB258 ; =OSi_ThreadInfo
|
||||
ldr r1, [r1, #4]
|
||||
ldr r1, [r1, #0xa4]
|
||||
str r1, [r0, #0xa4]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_022CB258: .word _022B966C
|
||||
_022CB258: .word OSi_ThreadInfo
|
||||
arm_func_end Cps_SocDup
|
||||
|
||||
arm_func_start Cps_SetUdpCallback
|
||||
Cps_SetUdpCallback: ; 0x022CB25C
|
||||
ldr r1, _022CB274 ; =_022B966C
|
||||
ldr r1, _022CB274 ; =OSi_ThreadInfo
|
||||
ldr r1, [r1, #4]
|
||||
ldr r1, [r1, #0xa4]
|
||||
cmp r1, #0
|
||||
strne r0, [r1, #0x38]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_022CB274: .word _022B966C
|
||||
_022CB274: .word OSi_ThreadInfo
|
||||
arm_func_end Cps_SetUdpCallback
|
||||
|
||||
arm_func_start Cpsi_TcpConnectRaw
|
||||
@@ -17836,7 +17836,7 @@ _022CB328: .word ov00_02325078
|
||||
arm_func_start Cps_TcpConnect
|
||||
Cps_TcpConnect: ; 0x022CB32C
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r0, _022CB368 ; =_022B966C
|
||||
ldr r0, _022CB368 ; =OSi_ThreadInfo
|
||||
ldr r0, [r0, #4]
|
||||
ldr r0, [r0, #0xa4]
|
||||
cmp r0, #0
|
||||
@@ -17853,7 +17853,7 @@ _022CB360:
|
||||
mov r0, #1
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_022CB368: .word _022B966C
|
||||
_022CB368: .word OSi_ThreadInfo
|
||||
arm_func_end Cps_TcpConnect
|
||||
|
||||
arm_func_start Cpsi_TcpShutdownRaw
|
||||
@@ -17884,7 +17884,7 @@ _022CB3A4:
|
||||
arm_func_start Cps_TcpShutdown
|
||||
Cps_TcpShutdown: ; 0x022CB3BC
|
||||
stmdb sp!, {r4, lr}
|
||||
ldr r0, _022CB3F4 ; =_022B966C
|
||||
ldr r0, _022CB3F4 ; =OSi_ThreadInfo
|
||||
ldr r0, [r0, #4]
|
||||
ldr r4, [r0, #0xa4]
|
||||
cmp r4, #0
|
||||
@@ -17899,13 +17899,13 @@ _022CB3E8:
|
||||
bl Cpsi_TcpShutdownRaw
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_022CB3F4: .word _022B966C
|
||||
_022CB3F4: .word OSi_ThreadInfo
|
||||
arm_func_end Cps_TcpShutdown
|
||||
|
||||
arm_func_start Cps_TcpClose
|
||||
Cps_TcpClose: ; 0x022CB3F8
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
ldr r0, _022CB478 ; =_022B966C
|
||||
ldr r0, _022CB478 ; =OSi_ThreadInfo
|
||||
ldr r0, [r0, #4]
|
||||
ldr r4, [r0, #0xa4]
|
||||
cmp r4, #0
|
||||
@@ -17941,7 +17941,7 @@ _022CB46C:
|
||||
strb r0, [r4, #8]
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_022CB478: .word _022B966C
|
||||
_022CB478: .word OSi_ThreadInfo
|
||||
_022CB47C: .word ov00_02325078
|
||||
arm_func_end Cps_TcpClose
|
||||
|
||||
@@ -18014,7 +18014,7 @@ _022CB538:
|
||||
arm_func_start Cps_SocRead
|
||||
Cps_SocRead: ; 0x022CB550
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r1, _022CB5B0 ; =_022B966C
|
||||
ldr r1, _022CB5B0 ; =OSi_ThreadInfo
|
||||
ldr r1, [r1, #4]
|
||||
ldr r1, [r1, #0xa4]
|
||||
cmp r1, #0
|
||||
@@ -18041,7 +18041,7 @@ _022CB5A0:
|
||||
mov r0, r1
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_022CB5B0: .word _022B966C
|
||||
_022CB5B0: .word OSi_ThreadInfo
|
||||
arm_func_end Cps_SocRead
|
||||
|
||||
arm_func_start Cpsi_SocConsumeRaw
|
||||
@@ -18090,7 +18090,7 @@ _022CB634:
|
||||
arm_func_start Cps_SocConsume
|
||||
Cps_SocConsume: ; 0x022CB644
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r1, _022CB678 ; =_022B966C
|
||||
ldr r1, _022CB678 ; =OSi_ThreadInfo
|
||||
ldr r1, [r1, #4]
|
||||
ldr r1, [r1, #0xa4]
|
||||
cmp r1, #0
|
||||
@@ -18104,7 +18104,7 @@ _022CB670:
|
||||
bl Cpsi_SocConsumeRaw
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_022CB678: .word _022B966C
|
||||
_022CB678: .word OSi_ThreadInfo
|
||||
arm_func_end Cps_SocConsume
|
||||
|
||||
arm_func_start tcp_write_do
|
||||
@@ -18332,7 +18332,7 @@ _022CB980: .word ov00_02325078
|
||||
arm_func_start Cpsi_SocWrite2
|
||||
Cpsi_SocWrite2: ; 0x022CB984
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
ldr ip, _022CBA50 ; =_022B966C
|
||||
ldr ip, _022CBA50 ; =OSi_ThreadInfo
|
||||
mov r7, r1
|
||||
ldr ip, [ip, #4]
|
||||
mov r6, r2
|
||||
@@ -18392,14 +18392,14 @@ _022CBA48:
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_022CBA50: .word _022B966C
|
||||
_022CBA50: .word OSi_ThreadInfo
|
||||
_022CBA54: .word ov00_02325078
|
||||
arm_func_end Cpsi_SocWrite2
|
||||
|
||||
arm_func_start Cps_SocWrite
|
||||
Cps_SocWrite: ; 0x022CBA58
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr r3, _022CBAEC ; =_022B966C
|
||||
ldr r3, _022CBAEC ; =OSi_ThreadInfo
|
||||
mov r2, r0
|
||||
ldr r4, [r3, #4]
|
||||
mov r3, r1
|
||||
@@ -18439,13 +18439,13 @@ _022CBAE4:
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_022CBAEC: .word _022B966C
|
||||
_022CBAEC: .word OSi_ThreadInfo
|
||||
arm_func_end Cps_SocWrite
|
||||
|
||||
arm_func_start Cps_SocGetLength
|
||||
Cps_SocGetLength: ; 0x022CBAF0
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r0, _022CBB5C ; =_022B966C
|
||||
ldr r0, _022CBB5C ; =OSi_ThreadInfo
|
||||
ldr r0, [r0, #4]
|
||||
ldr r0, [r0, #0xa4]
|
||||
cmp r0, #0
|
||||
@@ -18476,13 +18476,13 @@ _022CBB54:
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_022CBB5C: .word _022B966C
|
||||
_022CBB5C: .word OSi_ThreadInfo
|
||||
arm_func_end Cps_SocGetLength
|
||||
|
||||
arm_func_start Cps_SocFlush
|
||||
Cps_SocFlush: ; 0x022CBB60
|
||||
stmdb sp!, {r4, lr}
|
||||
ldr r0, _022CBB9C ; =_022B966C
|
||||
ldr r0, _022CBB9C ; =OSi_ThreadInfo
|
||||
ldr r0, [r0, #4]
|
||||
ldr r4, [r0, #0xa4]
|
||||
cmp r4, #0
|
||||
@@ -18497,7 +18497,7 @@ Cps_SocFlush: ; 0x022CBB60
|
||||
str r0, [r4, #0x60]
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_022CBB9C: .word _022B966C
|
||||
_022CBB9C: .word OSi_ThreadInfo
|
||||
arm_func_end Cps_SocFlush
|
||||
|
||||
arm_func_start set_fixed_ip
|
||||
@@ -18690,7 +18690,7 @@ _022CBE0C:
|
||||
bl send_arprequest
|
||||
mov sl, #0x69
|
||||
_022CBE3C:
|
||||
ldr r0, _022CBFA8 ; =_022B966C
|
||||
ldr r0, _022CBFA8 ; =OSi_ThreadInfo
|
||||
ldr sb, [r0, #8]
|
||||
cmp sb, #0
|
||||
beq _022CBF04
|
||||
@@ -18791,7 +18791,7 @@ _022CBF98: .word ov00_02325724
|
||||
_022CBF9C: .word ov00_023255A4
|
||||
_022CBFA0: .word ov00_023250F8
|
||||
_022CBFA4: .word 0x000003BD
|
||||
_022CBFA8: .word _022B966C
|
||||
_022CBFA8: .word OSi_ThreadInfo
|
||||
_022CBFAC: .word ov00_023253A0
|
||||
arm_func_end scavenger
|
||||
|
||||
@@ -20522,7 +20522,7 @@ Socli_InitCommandPipe: ; 0x022CD61C
|
||||
mov r2, r6
|
||||
add r3, r7, r4
|
||||
str ip, [sp, #4]
|
||||
bl StartThread
|
||||
bl OS_CreateThread
|
||||
add r0, r6, #0x20
|
||||
bl OS_WakeupThreadDirect
|
||||
add r0, r7, r4
|
||||
@@ -21723,7 +21723,7 @@ _022CE66C:
|
||||
arm_func_start Socli_GetOptimumSendBufLen
|
||||
Socli_GetOptimumSendBufLen: ; 0x022CE688
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr r1, _022CE724 ; =_022B966C
|
||||
ldr r1, _022CE724 ; =OSi_ThreadInfo
|
||||
mov r4, r0
|
||||
ldr r0, [r1, #4]
|
||||
ldr r5, [r0, #0xa4]
|
||||
@@ -21766,7 +21766,7 @@ _022CE71C:
|
||||
mov r0, r4
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_022CE724: .word _022B966C
|
||||
_022CE724: .word OSi_ThreadInfo
|
||||
_022CE728: .word ov00_023268D0
|
||||
arm_func_end Socli_GetOptimumSendBufLen
|
||||
|
||||
@@ -23582,7 +23582,7 @@ enter_computebound: ; 0x022CFDCC
|
||||
cmp r0, #0x20
|
||||
mvnhs r0, #0
|
||||
ldmhsia sp!, {r3, r4, r5, pc}
|
||||
ldr r0, _022CFE14 ; =_022B966C
|
||||
ldr r0, _022CFE14 ; =OSi_ThreadInfo
|
||||
ldr r5, [r0, #4]
|
||||
mov r0, r5
|
||||
bl OS_GetThreadPriority
|
||||
@@ -23595,7 +23595,7 @@ enter_computebound: ; 0x022CFDCC
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_022CFE10: .word ov00_023188CC
|
||||
_022CFE14: .word _022B966C
|
||||
_022CFE14: .word OSi_ThreadInfo
|
||||
arm_func_end enter_computebound
|
||||
|
||||
arm_func_start exit_computebound
|
||||
@@ -23604,17 +23604,17 @@ exit_computebound: ; 0x022CFE18
|
||||
mov r1, r0
|
||||
cmp r1, #0x20
|
||||
ldmhsia sp!, {r3, pc}
|
||||
ldr r0, _022CFE38 ; =_022B966C
|
||||
ldr r0, _022CFE38 ; =OSi_ThreadInfo
|
||||
ldr r0, [r0, #4]
|
||||
bl OS_SetThreadPriority
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_022CFE38: .word _022B966C
|
||||
_022CFE38: .word OSi_ThreadInfo
|
||||
arm_func_end exit_computebound
|
||||
|
||||
arm_func_start Cps_SetRootCa
|
||||
Cps_SetRootCa: ; 0x022CFE3C
|
||||
ldr r2, _022CFE60 ; =_022B966C
|
||||
ldr r2, _022CFE60 ; =OSi_ThreadInfo
|
||||
ldr r2, [r2, #4]
|
||||
ldr r2, [r2, #0xa4]
|
||||
cmp r2, #0
|
||||
@@ -23624,7 +23624,7 @@ Cps_SetRootCa: ; 0x022CFE3C
|
||||
strne r1, [r2, #0x818]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_022CFE60: .word _022B966C
|
||||
_022CFE60: .word OSi_ThreadInfo
|
||||
arm_func_end Cps_SetRootCa
|
||||
|
||||
arm_func_start Get_RootCA
|
||||
@@ -26884,7 +26884,7 @@ Cps_SetSsl: ; 0x022D2B44
|
||||
mov r4, r0
|
||||
ldr r0, _022D2B6C ; =_02000C1C
|
||||
bl OSi_ReferSymbol
|
||||
ldr r0, _022D2B70 ; =_022B966C
|
||||
ldr r0, _022D2B70 ; =OSi_ThreadInfo
|
||||
ldr r0, [r0, #4]
|
||||
ldr r0, [r0, #0xa4]
|
||||
cmp r0, #0
|
||||
@@ -26892,7 +26892,7 @@ Cps_SetSsl: ; 0x022D2B44
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_022D2B6C: .word _02000C1C
|
||||
_022D2B70: .word _022B966C
|
||||
_022D2B70: .word OSi_ThreadInfo
|
||||
arm_func_end Cps_SetSsl
|
||||
|
||||
arm_func_start Cpsi_SslPeriodical
|
||||
@@ -26918,7 +26918,7 @@ _022D2BAC:
|
||||
add r6, r6, #0x5c
|
||||
blt _022D2B90
|
||||
bl SetIrqFlag
|
||||
ldr r0, _022D2C50 ; =_022B966C
|
||||
ldr r0, _022D2C50 ; =OSi_ThreadInfo
|
||||
ldr r4, [r0, #8]
|
||||
cmp r4, #0
|
||||
ldmeqia sp!, {r4, r5, r6, pc}
|
||||
@@ -26957,7 +26957,7 @@ _022D2C38:
|
||||
.align 2, 0
|
||||
_022D2C48: .word ov00_02326AC8
|
||||
_022D2C4C: .word 0x000003BD
|
||||
_022D2C50: .word _022B966C
|
||||
_022D2C50: .word OSi_ThreadInfo
|
||||
arm_func_end Cpsi_SslPeriodical
|
||||
|
||||
arm_func_start Cpsi_SslCleanup
|
||||
@@ -38084,7 +38084,7 @@ _022DBD44:
|
||||
ldmneia sp!, {r3, r4, r5, pc}
|
||||
mov r0, #0
|
||||
str r0, [r2, #4]
|
||||
bl Dwci_Auth_StartThread
|
||||
bl Dwci_Auth_OS_CreateThread
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
@@ -38094,8 +38094,8 @@ _022DBDC0: .word 0x000013F4
|
||||
_022DBDC4: .word 0x00004E84
|
||||
arm_func_end Dwc_Auth_Create
|
||||
|
||||
arm_func_start Dwci_Auth_StartThread
|
||||
Dwci_Auth_StartThread: ; 0x022DBDC8
|
||||
arm_func_start Dwci_Auth_OS_CreateThread
|
||||
Dwci_Auth_OS_CreateThread: ; 0x022DBDC8
|
||||
stmdb sp!, {r3, lr}
|
||||
sub sp, sp, #8
|
||||
ldr r0, _022DBE70 ; =ov00_02326CB4
|
||||
@@ -38131,7 +38131,7 @@ _022DBE24:
|
||||
add r0, r0, #0x1000
|
||||
add r3, lr, #0x1000
|
||||
str ip, [sp, #4]
|
||||
bl StartThread
|
||||
bl OS_CreateThread
|
||||
ldr r0, _022DBE70 ; =ov00_02326CB4
|
||||
ldr r0, [r0, #8]
|
||||
add r0, r0, #0x318
|
||||
@@ -38143,7 +38143,7 @@ _022DBE24:
|
||||
_022DBE70: .word ov00_02326CB4
|
||||
_022DBE74: .word Dwci_Auth_Thread
|
||||
_022DBE78: .word ov00_02326CBC
|
||||
arm_func_end Dwci_Auth_StartThread
|
||||
arm_func_end Dwci_Auth_OS_CreateThread
|
||||
|
||||
arm_func_start Dwc_Auth_Abort
|
||||
Dwc_Auth_Abort: ; 0x022DBE7C
|
||||
@@ -38353,7 +38353,7 @@ _022DC0DC:
|
||||
cmp r0, #0
|
||||
movne r0, #4
|
||||
ldmneia sp!, {r4, pc}
|
||||
ldr r0, _022DC178 ; =_022B966C
|
||||
ldr r0, _022DC178 ; =OSi_ThreadInfo
|
||||
ldr r0, [r0, #4]
|
||||
bl OS_GetThreadPriority
|
||||
ldr r1, _022DC16C ; =ov00_02326CB4
|
||||
@@ -38361,7 +38361,7 @@ _022DC0DC:
|
||||
sub r1, r0, #1
|
||||
add r0, r2, #0x1000
|
||||
ldr r0, [r0, #0x314]
|
||||
bl Dwc_Http_StartThread
|
||||
bl Dwc_Http_OS_CreateThread
|
||||
mov r0, #0
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
@@ -38370,7 +38370,7 @@ _022DC168: .word ov00_02318C2C
|
||||
_022DC16C: .word ov00_02326CB4
|
||||
_022DC170: .word ov00_02318BC8
|
||||
_022DC174: .word ov00_02326CC0
|
||||
_022DC178: .word _022B966C
|
||||
_022DC178: .word OSi_ThreadInfo
|
||||
arm_func_end Dwci_Auth_Start
|
||||
|
||||
arm_func_start Dwci_Auth_Thread
|
||||
@@ -39566,8 +39566,8 @@ _022DD288: .word ov00_02318E74
|
||||
_022DD28C: .word ov00_02318E78
|
||||
arm_func_end Dwc_Http_FinishHeader
|
||||
|
||||
arm_func_start Dwc_Http_StartThread
|
||||
Dwc_Http_StartThread: ; 0x022DD290
|
||||
arm_func_start Dwc_Http_OS_CreateThread
|
||||
Dwc_Http_OS_CreateThread: ; 0x022DD290
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
sub sp, sp, #8
|
||||
mov r5, r0
|
||||
@@ -39608,7 +39608,7 @@ _022DD30C:
|
||||
add r0, r0, #0x1800
|
||||
add r3, r5, #0x1000
|
||||
str r4, [sp, #4]
|
||||
bl StartThread
|
||||
bl OS_CreateThread
|
||||
add r0, r5, #0x338
|
||||
add r0, r0, #0x1800
|
||||
bl OS_WakeupThreadDirect
|
||||
@@ -39617,7 +39617,7 @@ _022DD30C:
|
||||
.align 2, 0
|
||||
_022DD344: .word ov00_02326CD4
|
||||
_022DD348: .word Dwci_Http_Thread
|
||||
arm_func_end Dwc_Http_StartThread
|
||||
arm_func_end Dwc_Http_OS_CreateThread
|
||||
|
||||
arm_func_start Dwc_Http_Abort
|
||||
Dwc_Http_Abort: ; 0x022DD34C
|
||||
@@ -40915,7 +40915,7 @@ Dwc_Netcheck_Create: ; 0x022DE47C
|
||||
add r0, r0, #0x1dc
|
||||
add r0, r0, #0x1000
|
||||
bl OS_InitMutex
|
||||
bl Dwci_Netcheck_StartThread
|
||||
bl Dwci_Netcheck_OS_CreateThread
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
@@ -41062,8 +41062,8 @@ Dwc_Netcheck_GetReturnCode: ; 0x022DE6FC
|
||||
_022DE710: .word ov00_02326CD8
|
||||
arm_func_end Dwc_Netcheck_GetReturnCode
|
||||
|
||||
arm_func_start Dwci_Netcheck_StartThread
|
||||
Dwci_Netcheck_StartThread: ; 0x022DE714
|
||||
arm_func_start Dwci_Netcheck_OS_CreateThread
|
||||
Dwci_Netcheck_OS_CreateThread: ; 0x022DE714
|
||||
stmdb sp!, {r3, lr}
|
||||
sub sp, sp, #8
|
||||
ldr r0, _022DE794 ; =ov00_02326CD8
|
||||
@@ -41089,7 +41089,7 @@ _022DE74C:
|
||||
add r0, r0, #0x1000
|
||||
add r3, r2, #0x1000
|
||||
str ip, [sp, #4]
|
||||
bl StartThread
|
||||
bl OS_CreateThread
|
||||
ldr r0, _022DE794 ; =ov00_02326CD8
|
||||
ldr r0, [r0]
|
||||
add r0, r0, #0x11c
|
||||
@@ -41100,7 +41100,7 @@ _022DE74C:
|
||||
.align 2, 0
|
||||
_022DE794: .word ov00_02326CD8
|
||||
_022DE798: .word Dwci_Netcheck_Thread
|
||||
arm_func_end Dwci_Netcheck_StartThread
|
||||
arm_func_end Dwci_Netcheck_OS_CreateThread
|
||||
|
||||
arm_func_start Dwci_Netcheck_Thread
|
||||
Dwci_Netcheck_Thread: ; 0x022DE79C
|
||||
@@ -41167,12 +41167,12 @@ _022DE864:
|
||||
bl Dwci_Netcheck_SetError
|
||||
b _022DF5D4
|
||||
_022DE88C:
|
||||
ldr r0, _022DF638 ; =_022B966C
|
||||
ldr r0, _022DF638 ; =OSi_ThreadInfo
|
||||
ldr r0, [r0, #4]
|
||||
bl OS_GetThreadPriority
|
||||
sub r1, r0, #1
|
||||
ldr r0, [r5, #0x14]
|
||||
bl Dwc_Http_StartThread
|
||||
bl Dwc_Http_OS_CreateThread
|
||||
ldr r1, [r5, #0x14]
|
||||
add r0, r1, #0x1000
|
||||
ldr r0, [r0, #0xba4]
|
||||
@@ -41356,13 +41356,13 @@ _022DEAF0:
|
||||
bl Dwci_Netcheck_SetError
|
||||
b _022DF5D4
|
||||
_022DEB48:
|
||||
ldr r0, _022DF638 ; =_022B966C
|
||||
ldr r0, _022DF638 ; =OSi_ThreadInfo
|
||||
ldr r0, [r0, #4]
|
||||
bl OS_GetThreadPriority
|
||||
ldr r2, _022DF628 ; =ov00_02326CD8
|
||||
sub r1, r0, #1
|
||||
ldr r0, [r2, #0x14]
|
||||
bl Dwc_Http_StartThread
|
||||
bl Dwc_Http_OS_CreateThread
|
||||
ldr r0, _022DF628 ; =ov00_02326CD8
|
||||
ldr r1, [r0, #0x14]
|
||||
add r0, r1, #0x1000
|
||||
@@ -41642,12 +41642,12 @@ _022DEF14:
|
||||
bl Dwci_Netcheck_SetError
|
||||
b _022DF5D4
|
||||
_022DEF64:
|
||||
ldr r0, _022DF638 ; =_022B966C
|
||||
ldr r0, _022DF638 ; =OSi_ThreadInfo
|
||||
ldr r0, [r0, #4]
|
||||
bl OS_GetThreadPriority
|
||||
sub r1, r0, #1
|
||||
ldr r0, [r5, #0x14]
|
||||
bl Dwc_Http_StartThread
|
||||
bl Dwc_Http_OS_CreateThread
|
||||
ldr r1, [r5, #0x14]
|
||||
add r0, r1, #0x1000
|
||||
ldr r0, [r0, #0xba4]
|
||||
@@ -41997,12 +41997,12 @@ _022DF45C:
|
||||
bl Dwci_Netcheck_SetError
|
||||
b _022DF5D4
|
||||
_022DF484:
|
||||
ldr r0, _022DF638 ; =_022B966C
|
||||
ldr r0, _022DF638 ; =OSi_ThreadInfo
|
||||
ldr r0, [r0, #4]
|
||||
bl OS_GetThreadPriority
|
||||
sub r1, r0, #1
|
||||
ldr r0, [r5, #0x14]
|
||||
bl Dwc_Http_StartThread
|
||||
bl Dwc_Http_OS_CreateThread
|
||||
ldr r1, [r5, #0x14]
|
||||
add r0, r1, #0x1000
|
||||
ldr r0, [r0, #0xba4]
|
||||
@@ -42117,7 +42117,7 @@ _022DF628: .word ov00_02326CD8
|
||||
_022DF62C: .word 0x00009C40
|
||||
_022DF630: .word ov00_02319084
|
||||
_022DF634: .word ov00_02326CF0
|
||||
_022DF638: .word _022B966C
|
||||
_022DF638: .word OSi_ThreadInfo
|
||||
_022DF63C: .word ov00_02319198
|
||||
_022DF640: .word _022BCA70
|
||||
_022DF644: .word 0x0000012E
|
||||
@@ -42513,14 +42513,14 @@ _022DFB98:
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
_022DFBD8:
|
||||
ldr r0, _022DFC58 ; =_022B966C
|
||||
ldr r0, _022DFC58 ; =OSi_ThreadInfo
|
||||
ldr r0, [r0, #4]
|
||||
bl OS_GetThreadPriority
|
||||
ldr r1, _022DFC38 ; =ov00_02326D68
|
||||
ldr r2, [r1]
|
||||
sub r1, r0, #1
|
||||
add r0, r2, #8
|
||||
bl Dwc_Http_StartThread
|
||||
bl Dwc_Http_OS_CreateThread
|
||||
ldr r0, _022DFC38 ; =ov00_02326D68
|
||||
ldr r1, [r0]
|
||||
add r0, r1, #0x1000
|
||||
@@ -42546,7 +42546,7 @@ _022DFC48: .word 0xFFFFA1DC
|
||||
_022DFC4C: .word ov00_023192F8
|
||||
_022DFC50: .word ov00_02319300
|
||||
_022DFC54: .word ov00_02319308
|
||||
_022DFC58: .word _022B966C
|
||||
_022DFC58: .word OSi_ThreadInfo
|
||||
arm_func_end Dwc_Svl_GetTokenAsync
|
||||
|
||||
arm_func_start Dwc_Svl_Process
|
||||
@@ -44278,7 +44278,7 @@ _022E123C:
|
||||
add r3, r3, #0x9c0
|
||||
mov r2, #0
|
||||
str ip, [sp, #4]
|
||||
bl StartThread
|
||||
bl OS_CreateThread
|
||||
ldr r0, _022E1284 ; =ov00_02326D84
|
||||
ldr r0, [r0]
|
||||
add r0, r0, #0x9c0
|
||||
@@ -63248,7 +63248,7 @@ Nhttp_CleanupAsync: ; 0x022F13A0
|
||||
str ip, [sp]
|
||||
mov ip, #0x10
|
||||
str ip, [sp, #4]
|
||||
bl StartThread
|
||||
bl OS_CreateThread
|
||||
ldr r0, _022F13DC ; =ov00_02327964
|
||||
bl OS_WakeupThreadDirect
|
||||
add sp, sp, #8
|
||||
@@ -63720,7 +63720,7 @@ Nhttpi_CreateCommThread: ; 0x022F193C
|
||||
add r3, r4, #0x2000
|
||||
mov r2, #0
|
||||
str r5, [sp, #4]
|
||||
bl StartThread
|
||||
bl OS_CreateThread
|
||||
ldr r0, _022F19AC ; =ov00_02328260
|
||||
bl OS_WakeupThreadDirect
|
||||
mov r0, #1
|
||||
|
||||
@@ -18899,7 +18899,7 @@ _0233426C:
|
||||
bic r3, r4
|
||||
mov r2, #0
|
||||
add r3, r5, r3
|
||||
bl StartThread
|
||||
bl OS_CreateThread
|
||||
ldr r0, _023342C8 ; =ov02_023594D0
|
||||
mov r1, #1
|
||||
str r1, [r0, #0x38]
|
||||
|
||||
@@ -77,7 +77,7 @@ PRECOMPILE_OBJ_DIR := $(dir $(PRECOMPILE_OBJ))
|
||||
PRECOMPILE_DEPFILE := $(BUILD_DIR)/precompile/global.d
|
||||
|
||||
# Directories
|
||||
LIB_SUBDIRS := DSE NitroSDK
|
||||
LIB_SUBDIRS := DSE NitroSDK MSL_C
|
||||
SRC_SUBDIR := src
|
||||
ASM_SUBDIR := asm
|
||||
LIB_SRC_SUBDIR := lib/src $(LIB_SUBDIRS:%=lib/%/src)
|
||||
|
||||
@@ -1,7 +0,0 @@
|
||||
#ifndef PMDSKY_MAIN_0208655C_H
|
||||
#define PMDSKY_MAIN_0208655C_H
|
||||
|
||||
// Takes the absolute value of an integer.
|
||||
s32 abs(s32 value);
|
||||
|
||||
#endif //PMDSKY_MAIN_0208655C_H
|
||||
@@ -24,7 +24,7 @@ struct thread {
|
||||
// This is equal to stack_pointer - 0x44, with an additional - 4 if the resulting addess is not
|
||||
// aligned to 8 bytes.
|
||||
void* usable_stack_pointer;
|
||||
// 0x3C: Address of the function to return to once the thread exits. Usually ThreadExit.
|
||||
// 0x3C: Address of the function to return to once the thread exits. Usually OS_ExitThread.
|
||||
thread_exit_fn_t exit_function;
|
||||
void* function_address_plus_4; // 0x40: Pointer to the function to run + 4
|
||||
void* stack_pointer_minus_4; // 0x44: Pointer to the start of the stack area - 4
|
||||
|
||||
110
lib/MSL_C/asm/MSL_Common_buffer_io.s
Normal file
110
lib/MSL_C/asm/MSL_Common_buffer_io.s
Normal file
@@ -0,0 +1,110 @@
|
||||
.include "asm/macros.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start _convert_from_newlines
|
||||
_convert_from_newlines: ; 0x02086568
|
||||
bx lr
|
||||
arm_func_end _convert_from_newlines
|
||||
|
||||
arm_func_start _convert_to_newlines
|
||||
_convert_to_newlines: ; 0x0208656C
|
||||
bx lr
|
||||
arm_func_end _convert_to_newlines
|
||||
|
||||
arm_func_start _prep_buffer
|
||||
_prep_buffer: ; 0x02086570
|
||||
ldr r1, [r0, #0x1c]
|
||||
str r1, [r0, #0x24]
|
||||
ldr r3, [r0, #0x20]
|
||||
str r3, [r0, #0x28]
|
||||
ldr r2, [r0, #0x18]
|
||||
ldr r1, [r0, #0x2c]
|
||||
and r1, r2, r1
|
||||
sub r1, r3, r1
|
||||
str r1, [r0, #0x28]
|
||||
ldr r1, [r0, #0x18]
|
||||
str r1, [r0, #0x34]
|
||||
bx lr
|
||||
arm_func_end _prep_buffer
|
||||
|
||||
arm_func_start _load_buffer
|
||||
_load_buffer: ; 0x020865A0
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r5, r2
|
||||
mov r4, r0
|
||||
mov r6, r1
|
||||
bl _prep_buffer
|
||||
cmp r5, #1
|
||||
ldreq r0, [r4, #0x20]
|
||||
add r2, r4, #0x28
|
||||
streq r0, [r4, #0x28]
|
||||
ldr r0, [r4]
|
||||
ldr r1, [r4, #0x1c]
|
||||
ldr r3, [r4, #0x48]
|
||||
ldr ip, [r4, #0x3c]
|
||||
blx ip
|
||||
cmp r0, #2
|
||||
moveq r1, #0
|
||||
streq r1, [r4, #0x28]
|
||||
cmp r6, #0
|
||||
ldrne r1, [r4, #0x28]
|
||||
strne r1, [r6]
|
||||
cmp r0, #0
|
||||
ldmneia sp!, {r4, r5, r6, pc}
|
||||
ldr r1, [r4, #0x18]
|
||||
ldr r0, [r4, #0x28]
|
||||
add r0, r1, r0
|
||||
str r0, [r4, #0x18]
|
||||
ldr r0, [r4, #4]
|
||||
mov r0, r0, lsl #0x13
|
||||
movs r0, r0, lsr #0x1f
|
||||
bne _02086624
|
||||
ldr r0, [r4, #0x1c]
|
||||
add r1, r4, #0x28
|
||||
bl _convert_to_newlines
|
||||
_02086624:
|
||||
mov r0, #0
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
arm_func_end _load_buffer
|
||||
|
||||
arm_func_start _flush_buffer
|
||||
_flush_buffer: ; 0x0208662C
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
mov r5, r0
|
||||
ldr r2, [r5, #0x24]
|
||||
ldr r0, [r5, #0x1c]
|
||||
mov r4, r1
|
||||
subs r0, r2, r0
|
||||
beq _020866A4
|
||||
str r0, [r5, #0x28]
|
||||
ldr r0, [r5, #4]
|
||||
mov r0, r0, lsl #0x13
|
||||
movs r0, r0, lsr #0x1f
|
||||
bne _02086668
|
||||
ldr r0, [r5, #0x1c]
|
||||
add r1, r5, #0x28
|
||||
bl _convert_from_newlines
|
||||
_02086668:
|
||||
ldr r0, [r5]
|
||||
ldr r1, [r5, #0x1c]
|
||||
ldr r3, [r5, #0x48]
|
||||
ldr ip, [r5, #0x40]
|
||||
add r2, r5, #0x28
|
||||
blx ip
|
||||
cmp r4, #0
|
||||
ldrne r1, [r5, #0x28]
|
||||
strne r1, [r4]
|
||||
cmp r0, #0
|
||||
ldmneia sp!, {r3, r4, r5, pc}
|
||||
ldr r1, [r5, #0x18]
|
||||
ldr r0, [r5, #0x28]
|
||||
add r0, r1, r0
|
||||
str r0, [r5, #0x18]
|
||||
_020866A4:
|
||||
mov r0, r5
|
||||
bl _prep_buffer
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
arm_func_end _flush_buffer
|
||||
|
||||
113
lib/MSL_C/asm/include/main_0207F894.inc
Normal file
113
lib/MSL_C/asm/include/main_0207F894.inc
Normal file
@@ -0,0 +1,113 @@
|
||||
#pragma once
|
||||
.public _02000BC4
|
||||
.public _020AEC5C
|
||||
.public _020B2BB4
|
||||
.public _020B2BB8
|
||||
.public _020B2BC0
|
||||
.public _020B2BC4
|
||||
.public _020B2C84
|
||||
.public _020B2D88
|
||||
.public _020B2E9C
|
||||
.public _020B2ED0
|
||||
.public _020B2ED4
|
||||
.public _020B2FBC
|
||||
.public _020B3364
|
||||
.public OSi_ThreadInfo
|
||||
.public _022BB5EC
|
||||
.public _022BB5FC
|
||||
.public _022BB604
|
||||
.public _022BB60C
|
||||
.public _022BB614
|
||||
.public _022BB670
|
||||
.public _022BB68C
|
||||
.public _022BB6AC
|
||||
.public _022BB6B8
|
||||
.public _022BB6C4
|
||||
.public _022BB6C8
|
||||
.public _022BB6D8
|
||||
.public _022BB6F0
|
||||
.public _022BB6F4
|
||||
.public _022BB718
|
||||
.public _022BB724
|
||||
.public _022BB760
|
||||
.public _022BB780
|
||||
.public _022BB7E0
|
||||
.public _022BBE00
|
||||
.public _022BBE20
|
||||
.public _022BC040
|
||||
.public _022BC048
|
||||
.public _022BC04C
|
||||
.public _022BC060
|
||||
.public _022BC080
|
||||
.public _022BC084
|
||||
.public _022BC140
|
||||
.public _022BC228
|
||||
.public _022BC22C
|
||||
.public _022BC650
|
||||
.public _022BCA74
|
||||
.public _f2d
|
||||
.public _ll_udiv
|
||||
.public CopyAndInterleave
|
||||
.public DC_FlushAll
|
||||
.public DC_FlushRange
|
||||
.public DC_InvalidateRange
|
||||
.public DC_StoreRange
|
||||
.public DC_WaitWriteBufferEmpty
|
||||
.public EnableIrqFlag
|
||||
.public fflush
|
||||
.public FileInit
|
||||
.public FS_CloseFile
|
||||
.public FS_InitArchive
|
||||
.public FS_LoadArchive
|
||||
.public FS_NotifyArchiveAsyncEnd
|
||||
.public FS_OpenFileDirect
|
||||
.public FS_OpenFileFast
|
||||
.public FS_ReadFile
|
||||
.public FS_RegisterArchiveName
|
||||
.public FS_SetArchiveProc
|
||||
.public FSi_FindPath
|
||||
.public GetIrqFlag
|
||||
.public IC_InvalidateAll
|
||||
.public IC_InvalidateRange
|
||||
.public MI_CpuCopy8
|
||||
.public MI_CpuFill8
|
||||
.public MI_DmaCopy16
|
||||
.public MI_StopDma
|
||||
.public MIi_UncompressBackward
|
||||
.public MTi_CardDmaCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public MTi_CpuClearFast
|
||||
.public MTi_CpuCopy32
|
||||
.public OS_DisableIrqMask
|
||||
.public OS_EnableIrqMask
|
||||
.public OS_GetDTCMAddress
|
||||
.public OS_GetLockID
|
||||
.public OS_InitMutex
|
||||
.public OS_IsTickAvailable
|
||||
.public OS_LockCard
|
||||
.public OS_ReadOwnerOfLockWord
|
||||
.public OS_ResetRequestIrqMask
|
||||
.public OS_SetDPermissionsForProtectionRegion
|
||||
.public OS_SetIrqFunction
|
||||
.public OS_SetIrqMask
|
||||
.public OS_SetThreadPriority
|
||||
.public OS_SleepThread
|
||||
.public OS_SpinWait
|
||||
.public OS_TryLockCartridge
|
||||
.public OS_UnlockCard
|
||||
.public OS_UnlockCartridgeVeneer
|
||||
.public OS_WakeupThread
|
||||
.public OS_WakeupThreadDirect
|
||||
.public OSi_ReferSymbol
|
||||
.public PXI_Init
|
||||
.public PXI_IsCallbackReady
|
||||
.public PXI_SendWordByFifo
|
||||
.public PXI_SetFifoRecvCallback
|
||||
.public PXIi_HandlerRecvFifoNotEmpty
|
||||
.public SetIrqFlag
|
||||
.public OS_CreateThread
|
||||
.public SVC_CpuSet
|
||||
.public SVC_WaitByLoop
|
||||
.public OS_ExitThread
|
||||
.public WaitForever2
|
||||
.public WaitForInterrupt
|
||||
93
lib/MSL_C/asm/msl.s
Normal file
93
lib/MSL_C/asm/msl.s
Normal file
@@ -0,0 +1,93 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start NotANumber
|
||||
NotANumber: ; 0x02086450
|
||||
ldr r0, _02086460 ; =_020B2FBC
|
||||
ldr ip, _02086464 ; =_f2d
|
||||
ldr r0, [r0]
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02086460: .word _020B2FBC
|
||||
_02086464: .word _f2d
|
||||
arm_func_end NotANumber
|
||||
|
||||
arm_func_start _flush_line_buffered_output_files
|
||||
_flush_line_buffered_output_files: ; 0x02086468
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
|
||||
ldr r0, _020864F0 ; =_020B2ED4
|
||||
mov r4, #0
|
||||
mov r5, #1
|
||||
mov r8, r0
|
||||
mvn sb, #0
|
||||
mov r7, r4
|
||||
mov r6, #0x4c
|
||||
_02086488:
|
||||
ldr r1, [r0, #4]
|
||||
mov r2, r1, lsl #0x16
|
||||
movs r2, r2, lsr #0x1d
|
||||
beq _020864C8
|
||||
mov r1, r1, lsl #0x19
|
||||
mov r1, r1, lsr #0x1e
|
||||
tst r1, #1
|
||||
beq _020864C8
|
||||
ldr r1, [r0, #8]
|
||||
mov r1, r1, lsl #0x1d
|
||||
mov r1, r1, lsr #0x1d
|
||||
cmp r1, #1
|
||||
bne _020864C8
|
||||
bl fflush
|
||||
cmp r0, #0
|
||||
movne r4, sb
|
||||
_020864C8:
|
||||
cmp r5, #3
|
||||
movge r0, r7
|
||||
bge _020864E0
|
||||
mul r0, r5, r6
|
||||
add r5, r5, #1
|
||||
add r0, r8, r0
|
||||
_020864E0:
|
||||
cmp r0, #0
|
||||
bne _02086488
|
||||
mov r0, r4
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
|
||||
.align 2, 0
|
||||
_020864F0: .word _020B2ED4
|
||||
arm_func_end _flush_line_buffered_output_files
|
||||
|
||||
arm_func_start _flush_all
|
||||
_flush_all: ; 0x020864F4
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
|
||||
ldr r0, _02086558 ; =_020B2ED4
|
||||
mov r4, #0
|
||||
mov r5, #1
|
||||
mov r8, r0
|
||||
mvn sb, #0
|
||||
mov r7, r4
|
||||
mov r6, #0x4c
|
||||
_02086514:
|
||||
ldr r1, [r0, #4]
|
||||
mov r1, r1, lsl #0x16
|
||||
movs r1, r1, lsr #0x1d
|
||||
beq _02086530
|
||||
bl fflush
|
||||
cmp r0, #0
|
||||
movne r4, sb
|
||||
_02086530:
|
||||
cmp r5, #3
|
||||
movge r0, r7
|
||||
bge _02086548
|
||||
mul r0, r5, r6
|
||||
add r5, r5, #1
|
||||
add r0, r8, r0
|
||||
_02086548:
|
||||
cmp r0, #0
|
||||
bne _02086514
|
||||
mov r0, r4
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
|
||||
.align 2, 0
|
||||
_02086558: .word _020B2ED4
|
||||
arm_func_end _flush_all
|
||||
|
||||
5
lib/MSL_C/src/arith.c
Normal file
5
lib/MSL_C/src/arith.c
Normal file
@@ -0,0 +1,5 @@
|
||||
#include "MSL_C/stdlib.h"
|
||||
|
||||
int abs(int value) {
|
||||
return value < 0 ? -value : value;
|
||||
}
|
||||
347
lib/NitroSDK/asm/card_backup.s
Normal file
347
lib/NitroSDK/asm/card_backup.s
Normal file
@@ -0,0 +1,347 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start Cardi_RequestStreamCommandCore
|
||||
Cardi_RequestStreamCommandCore: ; 0x02083828
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
|
||||
mov sb, r0
|
||||
ldr r7, [sb, #0x2c]
|
||||
ldr r0, _02083A10 ; =_02000BC4
|
||||
ldr r4, [sb, #0x34]
|
||||
ldr sl, [sb, #0x30]
|
||||
mov r5, #0x100
|
||||
bl OSi_ReferSymbol
|
||||
cmp r7, #0xb
|
||||
bne _0208385C
|
||||
bl Card_GetBackupSectorSize
|
||||
mov r5, r0
|
||||
b _0208386C
|
||||
_0208385C:
|
||||
cmp r7, #0xf
|
||||
ldreq r0, _02083A14 ; =_022BB7E0
|
||||
ldreq r0, [r0]
|
||||
ldreq r5, [r0, #0x20]
|
||||
_0208386C:
|
||||
add r6, sb, #0x120
|
||||
mov fp, #9
|
||||
_02083874:
|
||||
ldr r8, [sb, #0x24]
|
||||
ldr r0, [sb]
|
||||
cmp r5, r8
|
||||
movlo r8, r5
|
||||
str r8, [r0, #0x14]
|
||||
ldr r0, [sb, #0x114]
|
||||
tst r0, #0x40
|
||||
beq _020838B0
|
||||
ldr r0, [sb, #0x114]
|
||||
mov r1, #7
|
||||
bic r0, r0, #0x40
|
||||
str r0, [sb, #0x114]
|
||||
ldr r0, [sb]
|
||||
str r1, [r0]
|
||||
b _020839BC
|
||||
_020838B0:
|
||||
cmp r4, #3
|
||||
addls pc, pc, r4, lsl #2
|
||||
b _02083940
|
||||
_020838BC: ; jump table
|
||||
b _020838CC ; case 0
|
||||
b _020838F0 ; case 1
|
||||
b _020838F0 ; case 2
|
||||
b _02083928 ; case 3
|
||||
_020838CC:
|
||||
mov r0, r6
|
||||
mov r1, r8
|
||||
bl DC_InvalidateRange
|
||||
ldr r1, [sb, #0x1c]
|
||||
ldr r0, [sb]
|
||||
str r1, [r0, #0xc]
|
||||
ldr r0, [sb]
|
||||
str r6, [r0, #0x10]
|
||||
b _02083940
|
||||
_020838F0:
|
||||
ldr r0, [sb, #0x1c]
|
||||
mov r1, r6
|
||||
mov r2, r8
|
||||
bl MI_CpuCopy8
|
||||
mov r0, r6
|
||||
mov r1, r8
|
||||
bl DC_FlushRange
|
||||
bl DC_WaitWriteBufferEmpty
|
||||
ldr r0, [sb]
|
||||
str r6, [r0, #0xc]
|
||||
ldr r1, [sb, #0x20]
|
||||
ldr r0, [sb]
|
||||
str r1, [r0, #0x10]
|
||||
b _02083940
|
||||
_02083928:
|
||||
ldr r1, [sb, #0x1c]
|
||||
ldr r0, [sb]
|
||||
str r1, [r0, #0xc]
|
||||
ldr r1, [sb, #0x20]
|
||||
ldr r0, [sb]
|
||||
str r1, [r0, #0x10]
|
||||
_02083940:
|
||||
mov r0, sb
|
||||
mov r1, r7
|
||||
mov r2, sl
|
||||
bl Cardi_Request
|
||||
cmp r0, #0
|
||||
beq _020839BC
|
||||
cmp r4, #2
|
||||
bne _0208397C
|
||||
mov r0, sb
|
||||
mov r1, fp
|
||||
mov r2, #1
|
||||
bl Cardi_Request
|
||||
cmp r0, #0
|
||||
beq _020839BC
|
||||
b _02083994
|
||||
_0208397C:
|
||||
cmp r4, #0
|
||||
bne _02083994
|
||||
ldr r1, [sb, #0x20]
|
||||
mov r0, r6
|
||||
mov r2, r8
|
||||
bl MI_CpuCopy8
|
||||
_02083994:
|
||||
ldr r0, [sb, #0x1c]
|
||||
add r0, r0, r8
|
||||
str r0, [sb, #0x1c]
|
||||
ldr r0, [sb, #0x20]
|
||||
add r0, r0, r8
|
||||
str r0, [sb, #0x20]
|
||||
ldr r0, [sb, #0x24]
|
||||
subs r0, r0, r8
|
||||
str r0, [sb, #0x24]
|
||||
bne _02083874
|
||||
_020839BC:
|
||||
ldr r6, [sb, #0x38]
|
||||
ldr r5, [sb, #0x3c]
|
||||
bl EnableIrqFlag
|
||||
ldr r1, [sb, #0x114]
|
||||
mov r4, r0
|
||||
bic r0, r1, #0x4c
|
||||
str r0, [sb, #0x114]
|
||||
add r0, sb, #0x10c
|
||||
bl OS_WakeupThread
|
||||
ldr r0, [sb, #0x114]
|
||||
tst r0, #0x10
|
||||
beq _020839F4
|
||||
add r0, sb, #0x44
|
||||
bl OS_WakeupThreadDirect
|
||||
_020839F4:
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
cmp r6, #0
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
mov r0, r5
|
||||
blx r6
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
.align 2, 0
|
||||
_02083A10: .word _02000BC4
|
||||
_02083A14: .word _022BB7E0
|
||||
arm_func_end Cardi_RequestStreamCommandCore
|
||||
|
||||
arm_func_start Cardi_RequestStreamCommand
|
||||
Cardi_RequestStreamCommand: ; 0x02083A18
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
|
||||
mov sb, r0
|
||||
ldr r4, _02083AF0 ; =_022BB7E0
|
||||
ldr r0, _02083AF4 ; =_02000BC4
|
||||
mov r8, r1
|
||||
mov r7, r2
|
||||
mov r6, r3
|
||||
bl OSi_ReferSymbol
|
||||
bl EnableIrqFlag
|
||||
ldr r1, [r4, #0x114]
|
||||
mov r5, r0
|
||||
tst r1, #4
|
||||
beq _02083A60
|
||||
_02083A4C:
|
||||
add r0, r4, #0x10c
|
||||
bl OS_SleepThread
|
||||
ldr r0, [r4, #0x114]
|
||||
tst r0, #4
|
||||
bne _02083A4C
|
||||
_02083A60:
|
||||
ldr r0, [r4, #0x114]
|
||||
ldr r1, [sp, #0x20]
|
||||
orr r2, r0, #4
|
||||
mov r0, r5
|
||||
str r2, [r4, #0x114]
|
||||
str r6, [r4, #0x38]
|
||||
str r1, [r4, #0x3c]
|
||||
bl SetIrqFlag
|
||||
ldr r3, [sp, #0x28]
|
||||
ldr r2, [sp, #0x2c]
|
||||
ldr r1, [sp, #0x30]
|
||||
ldr r0, [sp, #0x24]
|
||||
str sb, [r4, #0x1c]
|
||||
str r8, [r4, #0x20]
|
||||
str r7, [r4, #0x24]
|
||||
str r3, [r4, #0x2c]
|
||||
str r2, [r4, #0x30]
|
||||
str r1, [r4, #0x34]
|
||||
cmp r0, #0
|
||||
beq _02083AC0
|
||||
ldr r0, _02083AF8 ; =Cardi_RequestStreamCommandCore
|
||||
bl Cardi_SetTask
|
||||
mov r0, #1
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
|
||||
_02083AC0:
|
||||
ldr r0, _02083AFC ; =OSi_ThreadInfo
|
||||
ldr r1, _02083AF0 ; =_022BB7E0
|
||||
ldr r2, [r0, #4]
|
||||
mov r0, r4
|
||||
str r2, [r1, #0x104]
|
||||
bl Cardi_RequestStreamCommandCore
|
||||
ldr r0, [r4]
|
||||
ldr r0, [r0]
|
||||
cmp r0, #0
|
||||
moveq r0, #1
|
||||
movne r0, #0
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
|
||||
.align 2, 0
|
||||
_02083AF0: .word _022BB7E0
|
||||
_02083AF4: .word _02000BC4
|
||||
_02083AF8: .word Cardi_RequestStreamCommandCore
|
||||
_02083AFC: .word OSi_ThreadInfo
|
||||
arm_func_end Cardi_RequestStreamCommand
|
||||
|
||||
arm_func_start Card_GetCurrentBackupType
|
||||
Card_GetCurrentBackupType: ; 0x02083B00
|
||||
ldr r0, _02083B10 ; =_022BB7E0
|
||||
ldr r0, [r0]
|
||||
ldr r0, [r0, #4]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02083B10: .word _022BB7E0
|
||||
arm_func_end Card_GetCurrentBackupType
|
||||
|
||||
arm_func_start Card_GetBackupTotalSize
|
||||
Card_GetBackupTotalSize: ; 0x02083B14
|
||||
ldr r0, _02083B24 ; =_022BB7E0
|
||||
ldr r0, [r0]
|
||||
ldr r0, [r0, #0x18]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02083B24: .word _022BB7E0
|
||||
arm_func_end Card_GetBackupTotalSize
|
||||
|
||||
arm_func_start Card_GetBackupSectorSize
|
||||
Card_GetBackupSectorSize: ; 0x02083B28
|
||||
ldr r0, _02083B38 ; =_022BB7E0
|
||||
ldr r0, [r0]
|
||||
ldr r0, [r0, #0x1c]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02083B38: .word _022BB7E0
|
||||
arm_func_end Card_GetBackupSectorSize
|
||||
|
||||
arm_func_start Card_IdentifyBackup
|
||||
Card_IdentifyBackup: ; 0x02083B3C
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
mov r6, r0
|
||||
ldr r0, _02083C68 ; =_02000BC4
|
||||
ldr r4, _02083C6C ; =_022BB7E0
|
||||
bl OSi_ReferSymbol
|
||||
cmp r6, #0
|
||||
bne _02083B5C
|
||||
bl WaitForever2
|
||||
_02083B5C:
|
||||
bl Card_CheckEnabled
|
||||
bl EnableIrqFlag
|
||||
ldr r1, [r4, #0x114]
|
||||
mov r5, r0
|
||||
tst r1, #4
|
||||
beq _02083B88
|
||||
_02083B74:
|
||||
add r0, r4, #0x10c
|
||||
bl OS_SleepThread
|
||||
ldr r0, [r4, #0x114]
|
||||
tst r0, #4
|
||||
bne _02083B74
|
||||
_02083B88:
|
||||
ldr r0, [r4, #0x114]
|
||||
mov r1, #0
|
||||
orr r2, r0, #4
|
||||
mov r0, r5
|
||||
str r2, [r4, #0x114]
|
||||
str r1, [r4, #0x38]
|
||||
str r1, [r4, #0x3c]
|
||||
bl SetIrqFlag
|
||||
mov r0, r6
|
||||
bl Cardi_IdentifyBackupCore
|
||||
ldr r0, _02083C70 ; =OSi_ThreadInfo
|
||||
ldr r1, _02083C6C ; =_022BB7E0
|
||||
ldr r2, [r0, #4]
|
||||
mov r0, r4
|
||||
str r2, [r1, #0x104]
|
||||
mov r1, #2
|
||||
mov r2, #1
|
||||
bl Cardi_Request
|
||||
ldr r0, [r4]
|
||||
mov r1, #0
|
||||
str r1, [r0, #0xc]
|
||||
ldr r0, [r4]
|
||||
add r1, r4, #0x120
|
||||
str r1, [r0, #0x10]
|
||||
ldr r1, [r4]
|
||||
mov r2, #1
|
||||
mov r0, r4
|
||||
str r2, [r1, #0x14]
|
||||
mov r1, #6
|
||||
bl Cardi_Request
|
||||
ldr r7, [r4, #0x38]
|
||||
ldr r6, [r4, #0x3c]
|
||||
bl EnableIrqFlag
|
||||
mov r5, r0
|
||||
ldr r1, [r4, #0x114]
|
||||
add r0, r4, #0x10c
|
||||
bic r1, r1, #0x4c
|
||||
str r1, [r4, #0x114]
|
||||
bl OS_WakeupThread
|
||||
ldr r0, [r4, #0x114]
|
||||
tst r0, #0x10
|
||||
beq _02083C38
|
||||
add r0, r4, #0x44
|
||||
bl OS_WakeupThreadDirect
|
||||
_02083C38:
|
||||
mov r0, r5
|
||||
bl SetIrqFlag
|
||||
cmp r7, #0
|
||||
beq _02083C50
|
||||
mov r0, r6
|
||||
blx r7
|
||||
_02083C50:
|
||||
ldr r0, [r4]
|
||||
ldr r0, [r0]
|
||||
cmp r0, #0
|
||||
moveq r0, #1
|
||||
movne r0, #0
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_02083C68: .word _02000BC4
|
||||
_02083C6C: .word _022BB7E0
|
||||
_02083C70: .word OSi_ThreadInfo
|
||||
arm_func_end Card_IdentifyBackup
|
||||
|
||||
arm_func_start Card_WaitBackupAsync
|
||||
Card_WaitBackupAsync: ; 0x02083C74
|
||||
ldr ip, _02083C7C ; =Cardi_WaitAsync
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02083C7C: .word Cardi_WaitAsync
|
||||
arm_func_end Card_WaitBackupAsync
|
||||
|
||||
arm_func_start Card_TryWaitBackupAsync
|
||||
Card_TryWaitBackupAsync: ; 0x02083C80
|
||||
ldr ip, _02083C88 ; =Cardi_TryWaitAsync
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02083C88: .word Cardi_TryWaitAsync
|
||||
arm_func_end Card_TryWaitBackupAsync
|
||||
|
||||
317
lib/NitroSDK/asm/card_common.s
Normal file
317
lib/NitroSDK/asm/card_common.s
Normal file
@@ -0,0 +1,317 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start Cardi_SetTask
|
||||
Cardi_SetTask: ; 0x020830FC
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr r4, _02083134 ; =_022BB7E0
|
||||
mov r5, r0
|
||||
ldr r1, [r4, #0x108]
|
||||
add r0, r4, #0x44
|
||||
bl OS_SetThreadPriority
|
||||
ldr r1, [r4, #0x114]
|
||||
add r0, r4, #0x44
|
||||
orr r1, r1, #8
|
||||
str r0, [r4, #0x104]
|
||||
str r5, [r4, #0x40]
|
||||
str r1, [r4, #0x114]
|
||||
bl OS_WakeupThreadDirect
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_02083134: .word _022BB7E0
|
||||
arm_func_end Cardi_SetTask
|
||||
|
||||
arm_func_start Cardi_LockResource
|
||||
Cardi_LockResource: ; 0x02083138
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||||
ldr r4, _020831B8 ; =_022BB7E0
|
||||
mov r8, r0
|
||||
mov r7, r1
|
||||
bl EnableIrqFlag
|
||||
ldr r1, [r4, #8]
|
||||
mov r5, r0
|
||||
cmp r1, r8
|
||||
bne _02083170
|
||||
ldr r0, [r4, #0x18]
|
||||
cmp r0, r7
|
||||
beq _02083194
|
||||
bl WaitForever2
|
||||
b _02083194
|
||||
_02083170:
|
||||
mvn r6, #2
|
||||
b _02083180
|
||||
_02083178:
|
||||
add r0, r4, #0x10
|
||||
bl OS_SleepThread
|
||||
_02083180:
|
||||
ldr r0, [r4, #8]
|
||||
cmp r0, r6
|
||||
bne _02083178
|
||||
str r8, [r4, #8]
|
||||
str r7, [r4, #0x18]
|
||||
_02083194:
|
||||
ldr r0, [r4, #0xc]
|
||||
ldr r1, [r4]
|
||||
add r2, r0, #1
|
||||
mov r0, r5
|
||||
str r2, [r4, #0xc]
|
||||
mov r2, #0
|
||||
str r2, [r1]
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
.align 2, 0
|
||||
_020831B8: .word _022BB7E0
|
||||
arm_func_end Cardi_LockResource
|
||||
|
||||
arm_func_start Cardi_UnlockResource
|
||||
Cardi_UnlockResource: ; 0x020831BC
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
ldr r4, _02083244 ; =_022BB7E0
|
||||
mov r7, r0
|
||||
mov r6, r1
|
||||
bl EnableIrqFlag
|
||||
ldr r1, [r4, #8]
|
||||
mov r5, r0
|
||||
cmp r1, r7
|
||||
bne _020831EC
|
||||
ldr r0, [r4, #0xc]
|
||||
cmp r0, #0
|
||||
bne _020831F4
|
||||
_020831EC:
|
||||
bl WaitForever2
|
||||
b _0208322C
|
||||
_020831F4:
|
||||
ldr r0, [r4, #0x18]
|
||||
cmp r0, r6
|
||||
beq _02083204
|
||||
bl WaitForever2
|
||||
_02083204:
|
||||
ldr r0, [r4, #0xc]
|
||||
subs r0, r0, #1
|
||||
str r0, [r4, #0xc]
|
||||
bne _0208322C
|
||||
mvn r2, #2
|
||||
mov r1, #0
|
||||
add r0, r4, #0x10
|
||||
str r2, [r4, #8]
|
||||
str r1, [r4, #0x18]
|
||||
bl OS_WakeupThread
|
||||
_0208322C:
|
||||
ldr r1, [r4]
|
||||
mov r2, #0
|
||||
mov r0, r5
|
||||
str r2, [r1]
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_02083244: .word _022BB7E0
|
||||
arm_func_end Cardi_UnlockResource
|
||||
|
||||
arm_func_start CARDi_InitCommon
|
||||
CARDi_InitCommon: ; 0x02083248
|
||||
stmdb sp!, {r4, lr}
|
||||
sub sp, sp, #8
|
||||
ldr r4, _0208333C ; =_022BB7E0
|
||||
ldr r1, _02083340 ; =_022BB780
|
||||
mvn r2, #2
|
||||
mov r0, #0
|
||||
str r2, [r4, #8]
|
||||
mov r2, #0x60
|
||||
str r0, [r4, #0xc]
|
||||
str r0, [r4, #0x18]
|
||||
str r1, [r4]
|
||||
bl MTi_CpuClearFast
|
||||
ldr r0, _02083340 ; =_022BB780
|
||||
mov r1, #0x60
|
||||
bl DC_FlushRange
|
||||
mvn r1, #0
|
||||
ldr r0, _02083344 ; =0x027FFC40
|
||||
str r1, [r4, #0x118]
|
||||
str r1, [r4, #0x11c]
|
||||
ldrh r0, [r0]
|
||||
cmp r0, #2
|
||||
moveq r0, #1
|
||||
movne r0, #0
|
||||
cmp r0, #0
|
||||
bne _020832BC
|
||||
ldr r0, _02083348 ; =0x027FFE00
|
||||
mov r2, #0x160
|
||||
sub r1, r0, #0x380
|
||||
bl MI_CpuCopy8
|
||||
_020832BC:
|
||||
mov r2, #0
|
||||
mov r0, #4
|
||||
str r0, [r4, #0x108]
|
||||
str r2, [r4, #0x14]
|
||||
str r2, [r4, #0x10]
|
||||
str r2, [r4, #0x110]
|
||||
str r2, [r4, #0x10c]
|
||||
mov r0, #0x400
|
||||
str r0, [sp]
|
||||
ldr ip, [r4, #0x108]
|
||||
ldr r1, _0208334C ; =CARDi_TaskThread
|
||||
ldr r3, _02083350 ; =_022BBE00
|
||||
add r0, r4, #0x44
|
||||
str ip, [sp, #4]
|
||||
bl OS_CreateThread
|
||||
add r0, r4, #0x44
|
||||
bl OS_WakeupThreadDirect
|
||||
ldr r1, _02083354 ; =CARDi_OnFifoRecv
|
||||
mov r0, #0xb
|
||||
bl PXI_SetFifoRecvCallback
|
||||
ldr r0, _02083344 ; =0x027FFC40
|
||||
ldrh r0, [r0]
|
||||
cmp r0, #2
|
||||
moveq r0, #1
|
||||
movne r0, #0
|
||||
cmp r0, #0
|
||||
addne sp, sp, #8
|
||||
ldmneia sp!, {r4, pc}
|
||||
mov r0, #1
|
||||
bl CARD_Enable
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0208333C: .word _022BB7E0
|
||||
_02083340: .word _022BB780
|
||||
_02083344: .word 0x027FFC40
|
||||
_02083348: .word 0x027FFE00
|
||||
_0208334C: .word CARDi_TaskThread
|
||||
_02083350: .word _022BBE00
|
||||
_02083354: .word CARDi_OnFifoRecv
|
||||
arm_func_end CARDi_InitCommon
|
||||
|
||||
arm_func_start Card_IsEnabled
|
||||
Card_IsEnabled: ; 0x02083358
|
||||
ldr r0, _02083364 ; =_022BB760
|
||||
ldr r0, [r0]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02083364: .word _022BB760
|
||||
arm_func_end Card_IsEnabled
|
||||
|
||||
arm_func_start Card_CheckEnabled
|
||||
Card_CheckEnabled: ; 0x02083368
|
||||
stmdb sp!, {r3, lr}
|
||||
bl Card_IsEnabled
|
||||
cmp r0, #0
|
||||
ldmneia sp!, {r3, pc}
|
||||
bl WaitForever2
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end Card_CheckEnabled
|
||||
|
||||
arm_func_start CARD_Enable
|
||||
CARD_Enable: ; 0x02083380
|
||||
ldr r1, _0208338C ; =_022BB760
|
||||
str r0, [r1]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0208338C: .word _022BB760
|
||||
arm_func_end CARD_Enable
|
||||
|
||||
arm_func_start Cardi_WaitAsync
|
||||
Cardi_WaitAsync: ; 0x02083390
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr r4, _020833D8 ; =_022BB7E0
|
||||
bl EnableIrqFlag
|
||||
mov r5, r0
|
||||
b _020833AC
|
||||
_020833A4:
|
||||
add r0, r4, #0x10c
|
||||
bl OS_SleepThread
|
||||
_020833AC:
|
||||
ldr r0, [r4, #0x114]
|
||||
tst r0, #4
|
||||
bne _020833A4
|
||||
mov r0, r5
|
||||
bl SetIrqFlag
|
||||
ldr r0, [r4]
|
||||
ldr r0, [r0]
|
||||
cmp r0, #0
|
||||
moveq r0, #1
|
||||
movne r0, #0
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_020833D8: .word _022BB7E0
|
||||
arm_func_end Cardi_WaitAsync
|
||||
|
||||
arm_func_start Cardi_TryWaitAsync
|
||||
Cardi_TryWaitAsync: ; 0x020833DC
|
||||
ldr r0, _020833F4 ; =_022BB7E0
|
||||
ldr r0, [r0, #0x114]
|
||||
tst r0, #4
|
||||
moveq r0, #1
|
||||
movne r0, #0
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_020833F4: .word _022BB7E0
|
||||
arm_func_end Cardi_TryWaitAsync
|
||||
|
||||
arm_func_start Card_SetThreadPriority
|
||||
Card_SetThreadPriority: ; 0x020833F8
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
ldr r5, _02083430 ; =_022BB7E0
|
||||
mov r7, r0
|
||||
bl EnableIrqFlag
|
||||
ldr r6, [r5, #0x108]
|
||||
mov r4, r0
|
||||
mov r1, r7
|
||||
add r0, r5, #0x44
|
||||
str r7, [r5, #0x108]
|
||||
bl OS_SetThreadPriority
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
mov r0, r6
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_02083430: .word _022BB7E0
|
||||
arm_func_end Card_SetThreadPriority
|
||||
|
||||
arm_func_start Card_LockRom
|
||||
Card_LockRom: ; 0x02083434
|
||||
stmdb sp!, {r4, lr}
|
||||
mov r4, r0
|
||||
mov r1, #1
|
||||
bl Cardi_LockResource
|
||||
mov r0, r4
|
||||
bl OS_LockCard
|
||||
ldmia sp!, {r4, pc}
|
||||
arm_func_end Card_LockRom
|
||||
|
||||
arm_func_start Card_UnlockRom
|
||||
Card_UnlockRom: ; 0x02083450
|
||||
stmdb sp!, {r4, lr}
|
||||
mov r4, r0
|
||||
bl OS_UnlockCard
|
||||
mov r0, r4
|
||||
mov r1, #1
|
||||
bl Cardi_UnlockResource
|
||||
ldmia sp!, {r4, pc}
|
||||
arm_func_end Card_UnlockRom
|
||||
|
||||
arm_func_start Card_LockBackup
|
||||
Card_LockBackup: ; 0x0208346C
|
||||
ldr ip, _02083478 ; =Cardi_LockResource
|
||||
mov r1, #2
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02083478: .word Cardi_LockResource
|
||||
arm_func_end Card_LockBackup
|
||||
|
||||
arm_func_start Card_UnlockBackup
|
||||
Card_UnlockBackup: ; 0x0208347C
|
||||
stmdb sp!, {r4, lr}
|
||||
mov r4, r0
|
||||
bl Card_TryWaitBackupAsync
|
||||
cmp r0, #0
|
||||
bne _02083494
|
||||
bl Card_WaitBackupAsync
|
||||
_02083494:
|
||||
mov r0, r4
|
||||
mov r1, #2
|
||||
bl Cardi_UnlockResource
|
||||
ldmia sp!, {r4, pc}
|
||||
arm_func_end Card_UnlockBackup
|
||||
|
||||
165
lib/NitroSDK/asm/card_pullOut.s
Normal file
165
lib/NitroSDK/asm/card_pullOut.s
Normal file
@@ -0,0 +1,165 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start CARD_InitPulledOutCallback
|
||||
CARD_InitPulledOutCallback: ; 0x02084558
|
||||
stmdb sp!, {r3, lr}
|
||||
bl PXI_Init
|
||||
ldr r1, _0208457C ; =CARDi_PulledOutCallback
|
||||
mov r0, #0xe
|
||||
bl PXI_SetFifoRecvCallback
|
||||
ldr r0, _02084580 ; =_022BC040
|
||||
mov r1, #0
|
||||
str r1, [r0, #4]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0208457C: .word CARDi_PulledOutCallback
|
||||
_02084580: .word _022BC040
|
||||
arm_func_end CARD_InitPulledOutCallback
|
||||
|
||||
arm_func_start CARDi_PulledOutCallback
|
||||
CARDi_PulledOutCallback: ; 0x02084584
|
||||
stmdb sp!, {r3, lr}
|
||||
and r0, r1, #0x3f
|
||||
cmp r0, #0x11
|
||||
bne _020845CC
|
||||
ldr r1, _020845D4 ; =_022BC040
|
||||
ldr r0, [r1]
|
||||
cmp r0, #0
|
||||
ldmneia sp!, {r3, pc}
|
||||
mov r0, #1
|
||||
str r0, [r1]
|
||||
ldr r1, [r1, #4]
|
||||
cmp r1, #0
|
||||
beq _020845BC
|
||||
blx r1
|
||||
_020845BC:
|
||||
cmp r0, #0
|
||||
ldmeqia sp!, {r3, pc}
|
||||
bl Card_TerminateForPulledOut
|
||||
ldmia sp!, {r3, pc}
|
||||
_020845CC:
|
||||
bl WaitForever2
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_020845D4: .word _022BC040
|
||||
arm_func_end CARDi_PulledOutCallback
|
||||
|
||||
arm_func_start Card_SetPulledOutCallback
|
||||
Card_SetPulledOutCallback: ; 0x020845D8
|
||||
ldr r1, _020845E4 ; =_022BC040
|
||||
str r0, [r1, #4]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_020845E4: .word _022BC040
|
||||
arm_func_end Card_SetPulledOutCallback
|
||||
|
||||
arm_func_start Card_IsPulledOut
|
||||
Card_IsPulledOut: ; 0x020845E8
|
||||
ldr r0, _020845F4 ; =_022BC040
|
||||
ldr r0, [r0]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_020845F4: .word _022BC040
|
||||
arm_func_end Card_IsPulledOut
|
||||
|
||||
arm_func_start Card_TerminateForPulledOut
|
||||
Card_TerminateForPulledOut: ; 0x020845F8
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
mov r0, #0
|
||||
mov r5, #1
|
||||
bl MI_StopDma
|
||||
mov r0, r5
|
||||
bl MI_StopDma
|
||||
mov r0, #2
|
||||
bl MI_StopDma
|
||||
mov r0, #3
|
||||
bl MI_StopDma
|
||||
ldr r0, _0208467C ; =0x027FFFA8
|
||||
ldrh r0, [r0]
|
||||
and r0, r0, #0x8000
|
||||
movs r0, r0, asr #0xf
|
||||
beq _02084660
|
||||
bl PM_ForceToPowerOff
|
||||
cmp r0, #4
|
||||
bne _02084658
|
||||
ldr r4, _02084680 ; =0x000A3A47
|
||||
_02084644:
|
||||
mov r0, r4
|
||||
bl OS_SpinWait
|
||||
bl PM_ForceToPowerOff
|
||||
cmp r0, #4
|
||||
beq _02084644
|
||||
_02084658:
|
||||
cmp r0, #0
|
||||
moveq r5, #0
|
||||
_02084660:
|
||||
cmp r5, #0
|
||||
beq _02084674
|
||||
mov r0, #1
|
||||
mov r1, r0
|
||||
bl Cardi_SendtoPxi
|
||||
_02084674:
|
||||
bl WaitForever2
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_0208467C: .word 0x027FFFA8
|
||||
_02084680: .word 0x000A3A47
|
||||
arm_func_end Card_TerminateForPulledOut
|
||||
|
||||
arm_func_start Cardi_CheckPulledOutCore
|
||||
Cardi_CheckPulledOutCore: ; 0x02084684
|
||||
stmdb sp!, {r3, r4, lr}
|
||||
sub sp, sp, #4
|
||||
ldr r2, _020846E0 ; =0x027FFC10
|
||||
ldrh r1, [r2]
|
||||
cmp r1, #0
|
||||
subeq r1, r2, #0x410
|
||||
subne r1, r2, #0x10
|
||||
ldr r1, [r1]
|
||||
str r1, [sp]
|
||||
ldr r1, [sp]
|
||||
cmp r0, r1
|
||||
addeq sp, sp, #4
|
||||
ldmeqia sp!, {r3, r4, pc}
|
||||
bl EnableIrqFlag
|
||||
mov r4, r0
|
||||
mov r0, #0xe
|
||||
mov r1, #0x11
|
||||
mov r2, #0
|
||||
bl CARDi_PulledOutCallback
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
add sp, sp, #4
|
||||
ldmia sp!, {r3, r4, pc}
|
||||
.align 2, 0
|
||||
_020846E0: .word 0x027FFC10
|
||||
arm_func_end Cardi_CheckPulledOutCore
|
||||
|
||||
arm_func_start Cardi_SendtoPxi
|
||||
Cardi_SendtoPxi: ; 0x020846E4
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
mov r7, r0
|
||||
mov r6, r1
|
||||
mov r1, r7
|
||||
mov r0, #0xe
|
||||
mov r2, #0
|
||||
bl PXI_SendWordByFifo
|
||||
cmp r0, #0
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
mov r5, #0xe
|
||||
mov r4, #0
|
||||
_02084710:
|
||||
mov r0, r6
|
||||
blx SVC_WaitByLoop
|
||||
mov r0, r5
|
||||
mov r1, r7
|
||||
mov r2, r4
|
||||
bl PXI_SendWordByFifo
|
||||
cmp r0, #0
|
||||
bne _02084710
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
arm_func_end Cardi_SendtoPxi
|
||||
|
||||
150
lib/NitroSDK/asm/card_request.s
Normal file
150
lib/NitroSDK/asm/card_request.s
Normal file
@@ -0,0 +1,150 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start CARDi_OnFifoRecv
|
||||
CARDi_OnFifoRecv: ; 0x02084380
|
||||
stmdb sp!, {r3, lr}
|
||||
cmp r0, #0xb
|
||||
ldmneia sp!, {r3, pc}
|
||||
cmp r2, #0
|
||||
ldmeqia sp!, {r3, pc}
|
||||
ldr r2, _020843B0 ; =_022BB7E0
|
||||
ldr r1, [r2, #0x114]
|
||||
ldr r0, [r2, #0x104]
|
||||
bic r1, r1, #0x20
|
||||
str r1, [r2, #0x114]
|
||||
bl OS_WakeupThreadDirect
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_020843B0: .word _022BB7E0
|
||||
arm_func_end CARDi_OnFifoRecv
|
||||
|
||||
arm_func_start CARDi_TaskThread
|
||||
CARDi_TaskThread: ; 0x020843B4
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
ldr r5, _02084400 ; =_022BB7E0
|
||||
mov r4, #0
|
||||
_020843C0:
|
||||
bl EnableIrqFlag
|
||||
ldr r1, [r5, #0x114]
|
||||
mov r6, r0
|
||||
tst r1, #8
|
||||
bne _020843E8
|
||||
_020843D4:
|
||||
mov r0, r4
|
||||
bl OS_SleepThread
|
||||
ldr r0, [r5, #0x114]
|
||||
tst r0, #8
|
||||
beq _020843D4
|
||||
_020843E8:
|
||||
mov r0, r6
|
||||
bl SetIrqFlag
|
||||
ldr r1, [r5, #0x40]
|
||||
mov r0, r5
|
||||
blx r1
|
||||
b _020843C0
|
||||
.align 2, 0
|
||||
_02084400: .word _022BB7E0
|
||||
arm_func_end CARDi_TaskThread
|
||||
|
||||
arm_func_start Cardi_Request
|
||||
Cardi_Request: ; 0x02084404
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
|
||||
mov sl, r0
|
||||
ldr r0, [sl, #0x114]
|
||||
mov sb, r1
|
||||
str r2, [sp]
|
||||
tst r0, #2
|
||||
bne _02084478
|
||||
ldr r1, [sl, #0x114]
|
||||
mov r0, #0xb
|
||||
orr r2, r1, #2
|
||||
mov r1, #1
|
||||
str r2, [sl, #0x114]
|
||||
bl PXI_IsCallbackReady
|
||||
cmp r0, #0
|
||||
bne _02084468
|
||||
mov r6, #0x64
|
||||
mov r5, #0xb
|
||||
mov r4, #1
|
||||
_0208444C:
|
||||
mov r0, r6
|
||||
bl OS_SpinWait
|
||||
mov r0, r5
|
||||
mov r1, r4
|
||||
bl PXI_IsCallbackReady
|
||||
cmp r0, #0
|
||||
beq _0208444C
|
||||
_02084468:
|
||||
mov r0, sl
|
||||
mov r1, #0
|
||||
mov r2, #1
|
||||
bl Cardi_Request
|
||||
_02084478:
|
||||
ldr r0, [sl]
|
||||
mov r1, #0x60
|
||||
bl DC_FlushRange
|
||||
bl DC_WaitWriteBufferEmpty
|
||||
mov r7, #0xb
|
||||
mov r6, #1
|
||||
mov r5, r7
|
||||
mov r4, r6
|
||||
mov fp, #0
|
||||
_0208449C:
|
||||
str sb, [sl, #4]
|
||||
ldr r0, [sl, #0x114]
|
||||
orr r0, r0, #0x20
|
||||
str r0, [sl, #0x114]
|
||||
_020844AC:
|
||||
mov r0, r7
|
||||
mov r1, sb
|
||||
mov r2, r6
|
||||
bl PXI_SendWordByFifo
|
||||
cmp r0, #0
|
||||
blt _020844AC
|
||||
cmp sb, #0
|
||||
bne _020844E8
|
||||
ldr r8, [sl]
|
||||
_020844D0:
|
||||
mov r0, r5
|
||||
mov r1, r8
|
||||
mov r2, r4
|
||||
bl PXI_SendWordByFifo
|
||||
cmp r0, #0
|
||||
blt _020844D0
|
||||
_020844E8:
|
||||
bl EnableIrqFlag
|
||||
ldr r1, [sl, #0x114]
|
||||
mov r8, r0
|
||||
tst r1, #0x20
|
||||
beq _02084510
|
||||
_020844FC:
|
||||
mov r0, fp
|
||||
bl OS_SleepThread
|
||||
ldr r0, [sl, #0x114]
|
||||
tst r0, #0x20
|
||||
bne _020844FC
|
||||
_02084510:
|
||||
mov r0, r8
|
||||
bl SetIrqFlag
|
||||
ldr r0, [sl]
|
||||
mov r1, #0x60
|
||||
bl DC_InvalidateRange
|
||||
ldr r0, [sl]
|
||||
ldr r1, [r0]
|
||||
cmp r1, #4
|
||||
bne _02084548
|
||||
ldr r0, [sp]
|
||||
sub r0, r0, #1
|
||||
str r0, [sp]
|
||||
cmp r0, #0
|
||||
bgt _0208449C
|
||||
_02084548:
|
||||
cmp r1, #0
|
||||
moveq r0, #1
|
||||
movne r0, #0
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
arm_func_end Cardi_Request
|
||||
|
||||
540
lib/NitroSDK/asm/card_rom.s
Normal file
540
lib/NitroSDK/asm/card_rom.s
Normal file
@@ -0,0 +1,540 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start CARDi_ReadFromCache
|
||||
CARDi_ReadFromCache: ; 0x02083C8C
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr r4, _02083D14 ; =_022BB7E0
|
||||
mov r1, #0x200
|
||||
ldr r3, [r4, #0x1c]
|
||||
rsb r1, r1, #0
|
||||
ldr r2, [r0, #8]
|
||||
and r3, r3, r1
|
||||
cmp r3, r2
|
||||
bne _02083D00
|
||||
ldr r2, [r4, #0x1c]
|
||||
ldr r1, [r4, #0x24]
|
||||
sub r3, r2, r3
|
||||
rsb r5, r3, #0x200
|
||||
cmp r5, r1
|
||||
movhi r5, r1
|
||||
add r0, r0, #0x20
|
||||
ldr r1, [r4, #0x20]
|
||||
mov r2, r5
|
||||
add r0, r0, r3
|
||||
bl MI_CpuCopy8
|
||||
ldr r2, [r4, #0x1c]
|
||||
ldr r1, [r4, #0x20]
|
||||
ldr r0, [r4, #0x24]
|
||||
add r2, r2, r5
|
||||
add r1, r1, r5
|
||||
sub r0, r0, r5
|
||||
str r2, [r4, #0x1c]
|
||||
str r1, [r4, #0x20]
|
||||
str r0, [r4, #0x24]
|
||||
_02083D00:
|
||||
ldr r0, [r4, #0x24]
|
||||
cmp r0, #0
|
||||
movne r0, #1
|
||||
moveq r0, #0
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_02083D14: .word _022BB7E0
|
||||
arm_func_end CARDi_ReadFromCache
|
||||
|
||||
arm_func_start CARDi_SetRomOp
|
||||
CARDi_SetRomOp: ; 0x02083D18
|
||||
ldr r3, _02083D70 ; =0x040001A4
|
||||
_02083D1C:
|
||||
ldr r2, [r3]
|
||||
tst r2, #0x80000000
|
||||
bne _02083D1C
|
||||
ldr r3, _02083D74 ; =0x040001A1
|
||||
mov r2, #0xc0
|
||||
strb r2, [r3]
|
||||
mov r2, r0, lsr #0x18
|
||||
strb r2, [r3, #7]
|
||||
mov r2, r0, lsr #0x10
|
||||
strb r2, [r3, #8]
|
||||
mov r2, r0, lsr #8
|
||||
strb r2, [r3, #9]
|
||||
strb r0, [r3, #0xa]
|
||||
mov r0, r1, lsr #0x18
|
||||
strb r0, [r3, #0xb]
|
||||
mov r0, r1, lsr #0x10
|
||||
strb r0, [r3, #0xc]
|
||||
mov r0, r1, lsr #8
|
||||
strb r0, [r3, #0xd]
|
||||
strb r1, [r3, #0xe]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02083D70: .word 0x040001A4
|
||||
_02083D74: .word 0x040001A1
|
||||
arm_func_end CARDi_SetRomOp
|
||||
|
||||
arm_func_start sub_02083D78
|
||||
sub_02083D78: ; 0x02083D78
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr r4, _02083DBC ; =_022BB7E0
|
||||
ldr r1, _02083DC0 ; =0x04100010
|
||||
ldr r0, [r4, #0x28]
|
||||
ldr r2, [r4, #0x20]
|
||||
mov r3, #0x200
|
||||
ldr r5, _02083DC4 ; =_022BBE20
|
||||
bl MTi_CardDmaCopy32
|
||||
ldr r1, [r4, #0x1c]
|
||||
mov r0, r1, lsr #8
|
||||
orr r0, r0, #0xb7000000
|
||||
mov r1, r1, lsl #0x18
|
||||
bl CARDi_SetRomOp
|
||||
ldr r1, [r5, #4]
|
||||
ldr r0, _02083DC8 ; =0x040001A4
|
||||
str r1, [r0]
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_02083DBC: .word _022BB7E0
|
||||
_02083DC0: .word 0x04100010
|
||||
_02083DC4: .word _022BBE20
|
||||
_02083DC8: .word 0x040001A4
|
||||
arm_func_end sub_02083D78
|
||||
|
||||
arm_func_start sub_02083DCC
|
||||
sub_02083DCC: ; 0x02083DCC
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
ldr r0, _02083E98 ; =_022BB7E0
|
||||
ldr r0, [r0, #0x28]
|
||||
bl MI_StopDma
|
||||
ldr r3, _02083E98 ; =_022BB7E0
|
||||
ldr r0, [r3, #0x24]
|
||||
ldr r2, [r3, #0x1c]
|
||||
ldr r1, [r3, #0x20]
|
||||
subs r0, r0, #0x200
|
||||
str r0, [r3, #0x24]
|
||||
movne r0, #1
|
||||
add r2, r2, #0x200
|
||||
add r1, r1, #0x200
|
||||
moveq r0, #0
|
||||
str r2, [r3, #0x1c]
|
||||
str r1, [r3, #0x20]
|
||||
cmp r0, #0
|
||||
bne _02083E90
|
||||
mov r0, #0x80000
|
||||
bl OS_DisableIrqMask
|
||||
mov r0, #0x80000
|
||||
bl OS_ResetRequestIrqMask
|
||||
ldr r4, _02083E98 ; =_022BB7E0
|
||||
bl sub_02084118
|
||||
bl Cardi_CheckPulledOutCore
|
||||
ldr r0, [r4]
|
||||
mov r1, #0
|
||||
str r1, [r0]
|
||||
ldr r5, [r4, #0x38]
|
||||
ldr r6, [r4, #0x3c]
|
||||
bl EnableIrqFlag
|
||||
ldr r1, [r4, #0x114]
|
||||
mov r7, r0
|
||||
bic r0, r1, #0x4c
|
||||
str r0, [r4, #0x114]
|
||||
add r0, r4, #0x10c
|
||||
bl OS_WakeupThread
|
||||
ldr r0, [r4, #0x114]
|
||||
tst r0, #0x10
|
||||
beq _02083E74
|
||||
add r0, r4, #0x44
|
||||
bl OS_WakeupThreadDirect
|
||||
_02083E74:
|
||||
mov r0, r7
|
||||
bl SetIrqFlag
|
||||
cmp r5, #0
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
mov r0, r6
|
||||
blx r5
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
_02083E90:
|
||||
bl sub_02083D78
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_02083E98: .word _022BB7E0
|
||||
arm_func_end sub_02083DCC
|
||||
|
||||
arm_func_start Cardi_TryReadCardDma
|
||||
Cardi_TryReadCardDma: ; 0x02083E9C
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
|
||||
ldr r4, _02084014 ; =_022BB7E0
|
||||
mov r6, #0
|
||||
ldr sb, [r4, #0x20]
|
||||
mov fp, r0
|
||||
mov r7, r6
|
||||
mov r8, r6
|
||||
mov r1, r6
|
||||
ands sl, sb, #0x1f
|
||||
ldr r5, [r4, #0x24]
|
||||
bne _02083ED4
|
||||
ldr r0, [r4, #0x28]
|
||||
cmp r0, #3
|
||||
movls r1, #1
|
||||
_02083ED4:
|
||||
cmp r1, #0
|
||||
beq _02083F28
|
||||
bl OS_GetDTCMAddress
|
||||
ldr r1, _02084018 ; =CopyAndInterleave
|
||||
add r3, sb, r5
|
||||
cmp r3, r1
|
||||
mov r1, #1
|
||||
mov r2, #0
|
||||
bls _02083F00
|
||||
cmp sb, #0x2000000
|
||||
movlo r2, r1
|
||||
_02083F00:
|
||||
cmp r2, #0
|
||||
bne _02083F20
|
||||
cmp r0, r3
|
||||
bhs _02083F1C
|
||||
add r0, r0, #0x4000
|
||||
cmp r0, sb
|
||||
bhi _02083F20
|
||||
_02083F1C:
|
||||
mov r1, #0
|
||||
_02083F20:
|
||||
cmp r1, #0
|
||||
moveq r8, #1
|
||||
_02083F28:
|
||||
cmp r8, #0
|
||||
beq _02083F44
|
||||
ldr r1, [r4, #0x1c]
|
||||
ldr r0, _0208401C ; =0x000001FF
|
||||
orr r1, r1, r5
|
||||
tst r1, r0
|
||||
moveq r7, #1
|
||||
_02083F44:
|
||||
ldr r0, _02084020 ; =_020B2ED0
|
||||
cmp r7, #0
|
||||
ldr r0, [r0]
|
||||
cmpne r5, #0
|
||||
ldr r0, [r0, #0x60]
|
||||
movne r6, #1
|
||||
bic r0, r0, #0x7000000
|
||||
orr r0, r0, #0xa1000000
|
||||
cmp r6, #0
|
||||
str r0, [fp, #4]
|
||||
beq _0208400C
|
||||
bl EnableIrqFlag
|
||||
ldr r1, [r4, #0x118]
|
||||
mov r7, r0
|
||||
cmp r5, r1
|
||||
bhs _02083F94
|
||||
mov r0, sb
|
||||
mov r1, r5
|
||||
bl IC_InvalidateRange
|
||||
b _02083F98
|
||||
_02083F94:
|
||||
bl IC_InvalidateAll
|
||||
_02083F98:
|
||||
ldr r0, [r4, #0x11c]
|
||||
cmp r5, r0
|
||||
bhs _02083FE0
|
||||
cmp sl, #0
|
||||
beq _02083FCC
|
||||
sub sb, sb, sl
|
||||
mov r0, sb
|
||||
mov r1, #0x20
|
||||
bl DC_StoreRange
|
||||
add r0, sb, r5
|
||||
mov r1, #0x20
|
||||
bl DC_StoreRange
|
||||
add r5, r5, #0x20
|
||||
_02083FCC:
|
||||
mov r0, sb
|
||||
mov r1, r5
|
||||
bl DC_InvalidateRange
|
||||
bl DC_WaitWriteBufferEmpty
|
||||
b _02083FE4
|
||||
_02083FE0:
|
||||
bl DC_FlushAll
|
||||
_02083FE4:
|
||||
ldr r1, _02084024 ; =_02083DCC
|
||||
mov r0, #0x80000
|
||||
bl OS_SetIrqFunction
|
||||
mov r0, #0x80000
|
||||
bl OS_ResetRequestIrqMask
|
||||
mov r0, #0x80000
|
||||
bl OS_EnableIrqMask
|
||||
mov r0, r7
|
||||
bl SetIrqFlag
|
||||
bl sub_02083D78
|
||||
_0208400C:
|
||||
mov r0, r6
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
.align 2, 0
|
||||
_02084014: .word _022BB7E0
|
||||
_02084018: .word CopyAndInterleave
|
||||
_0208401C: .word 0x000001FF
|
||||
_02084020: .word _020B2ED0
|
||||
_02084024: .word sub_02083DCC
|
||||
arm_func_end Cardi_TryReadCardDma
|
||||
|
||||
arm_func_start CARDi_ReadCard
|
||||
CARDi_ReadCard: ; 0x02084028
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
ldr r4, _0208410C ; =_022BB7E0
|
||||
mov r6, r0
|
||||
_02084034:
|
||||
mov r0, #0x200
|
||||
ldr r1, [r4, #0x1c]
|
||||
rsb r0, r0, #0
|
||||
and r2, r1, r0
|
||||
cmp r2, r1
|
||||
bne _02084064
|
||||
ldr r5, [r4, #0x20]
|
||||
tst r5, #3
|
||||
bne _02084064
|
||||
ldr r0, [r4, #0x24]
|
||||
cmp r0, #0x200
|
||||
bhs _0208406C
|
||||
_02084064:
|
||||
str r2, [r6, #8]
|
||||
add r5, r6, #0x20
|
||||
_0208406C:
|
||||
mov r0, r2, lsr #8
|
||||
orr r0, r0, #0xb7000000
|
||||
mov r1, r2, lsl #0x18
|
||||
bl CARDi_SetRomOp
|
||||
mov ip, #0
|
||||
ldr r0, [r6, #4]
|
||||
ldr r2, _02084110 ; =0x040001A4
|
||||
mov lr, ip
|
||||
str r0, [r2]
|
||||
ldr r1, _02084114 ; =0x04100010
|
||||
_02084094:
|
||||
ldr r3, [r2]
|
||||
tst r3, #0x800000
|
||||
beq _020840B4
|
||||
ldr r0, [r1]
|
||||
cmp lr, #0x200
|
||||
strlo r0, [r5, ip, lsl #2]
|
||||
addlo lr, lr, #4
|
||||
addlo ip, ip, #1
|
||||
_020840B4:
|
||||
tst r3, #0x80000000
|
||||
bne _02084094
|
||||
ldr r0, [r4, #0x20]
|
||||
cmp r5, r0
|
||||
bne _020840F8
|
||||
ldr r0, _0208410C ; =_022BB7E0
|
||||
ldr r1, [r0, #0x1c]
|
||||
add r1, r1, #0x200
|
||||
str r1, [r0, #0x1c]
|
||||
ldr r1, [r0, #0x20]
|
||||
add r1, r1, #0x200
|
||||
str r1, [r0, #0x20]
|
||||
ldr r1, [r0, #0x24]
|
||||
subs r1, r1, #0x200
|
||||
str r1, [r0, #0x24]
|
||||
ldmeqia sp!, {r4, r5, r6, pc}
|
||||
b _02084034
|
||||
_020840F8:
|
||||
mov r0, r6
|
||||
bl CARDi_ReadFromCache
|
||||
cmp r0, #0
|
||||
bne _02084034
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_0208410C: .word _022BB7E0
|
||||
_02084110: .word 0x040001A4
|
||||
_02084114: .word 0x04100010
|
||||
arm_func_end CARDi_ReadCard
|
||||
|
||||
arm_func_start sub_02084118
|
||||
sub_02084118: ; 0x02084118
|
||||
stmdb sp!, {r3, lr}
|
||||
mov r0, #0xb8000000
|
||||
mov r1, #0
|
||||
bl CARDi_SetRomOp
|
||||
ldr r1, _02084168 ; =_020B2ED0
|
||||
mov r0, #0x2000
|
||||
ldr r1, [r1]
|
||||
rsb r0, r0, #0
|
||||
ldr r2, [r1, #0x60]
|
||||
ldr r1, _0208416C ; =0x040001A4
|
||||
bic r2, r2, #0x7000000
|
||||
orr r2, r2, #0xa7000000
|
||||
and r0, r2, r0
|
||||
str r0, [r1]
|
||||
_02084150:
|
||||
ldr r0, [r1]
|
||||
tst r0, #0x800000
|
||||
beq _02084150
|
||||
ldr r0, _02084170 ; =0x04100010
|
||||
ldr r0, [r0]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02084168: .word _020B2ED0
|
||||
_0208416C: .word 0x040001A4
|
||||
_02084170: .word 0x04100010
|
||||
arm_func_end sub_02084118
|
||||
|
||||
arm_func_start Cardi_ReadRomSyncCore
|
||||
Cardi_ReadRomSyncCore: ; 0x02084174
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
ldr r4, _02084204 ; =_022BBE20
|
||||
mov r0, r4
|
||||
bl CARDi_ReadFromCache
|
||||
cmp r0, #0
|
||||
beq _02084198
|
||||
ldr r1, [r4]
|
||||
mov r0, r4
|
||||
blx r1
|
||||
_02084198:
|
||||
ldr r4, _02084208 ; =_022BB7E0
|
||||
bl sub_02084118
|
||||
bl Cardi_CheckPulledOutCore
|
||||
ldr r0, [r4]
|
||||
mov r1, #0
|
||||
str r1, [r0]
|
||||
ldr r5, [r4, #0x38]
|
||||
ldr r6, [r4, #0x3c]
|
||||
bl EnableIrqFlag
|
||||
ldr r1, [r4, #0x114]
|
||||
mov r7, r0
|
||||
bic r0, r1, #0x4c
|
||||
str r0, [r4, #0x114]
|
||||
add r0, r4, #0x10c
|
||||
bl OS_WakeupThread
|
||||
ldr r0, [r4, #0x114]
|
||||
tst r0, #0x10
|
||||
beq _020841E8
|
||||
add r0, r4, #0x44
|
||||
bl OS_WakeupThreadDirect
|
||||
_020841E8:
|
||||
mov r0, r7
|
||||
bl SetIrqFlag
|
||||
cmp r5, #0
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
mov r0, r6
|
||||
blx r5
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_02084204: .word _022BBE20
|
||||
_02084208: .word _022BB7E0
|
||||
arm_func_end Cardi_ReadRomSyncCore
|
||||
|
||||
arm_func_start Cardi_ReadRom
|
||||
Cardi_ReadRom: ; 0x0208420C
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
|
||||
mov sl, r0
|
||||
mov sb, r1
|
||||
mov r8, r2
|
||||
mov r7, r3
|
||||
ldr r4, _020842F0 ; =_022BBE20
|
||||
ldr r5, _020842F4 ; =_022BB7E0
|
||||
bl Card_CheckEnabled
|
||||
bl EnableIrqFlag
|
||||
mov r6, r0
|
||||
b _02084240
|
||||
_02084238:
|
||||
add r0, r5, #0x10c
|
||||
bl OS_SleepThread
|
||||
_02084240:
|
||||
ldr r0, [r5, #0x114]
|
||||
tst r0, #4
|
||||
bne _02084238
|
||||
ldr r0, [r5, #0x114]
|
||||
ldr r2, [sp, #0x20]
|
||||
ldr r1, [sp, #0x24]
|
||||
orr r3, r0, #4
|
||||
mov r0, r6
|
||||
str r3, [r5, #0x114]
|
||||
str r2, [r5, #0x38]
|
||||
str r1, [r5, #0x3c]
|
||||
bl SetIrqFlag
|
||||
ldr r0, _020842F8 ; =_022BBE00
|
||||
str sl, [r5, #0x28]
|
||||
ldr r0, [r0]
|
||||
str r8, [r5, #0x20]
|
||||
add r0, sb, r0
|
||||
str r0, [r5, #0x1c]
|
||||
str r7, [r5, #0x24]
|
||||
cmp sl, #3
|
||||
bhi _0208429C
|
||||
mov r0, sl
|
||||
bl MI_StopDma
|
||||
_0208429C:
|
||||
mov r0, r4
|
||||
bl Cardi_TryReadCardDma
|
||||
cmp r0, #0
|
||||
beq _020842C0
|
||||
ldr r0, [sp, #0x28]
|
||||
cmp r0, #0
|
||||
ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
|
||||
bl Card_WaitRomAsync
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
|
||||
_020842C0:
|
||||
ldr r0, [sp, #0x28]
|
||||
cmp r0, #0
|
||||
beq _020842D8
|
||||
ldr r0, _020842FC ; =Cardi_ReadRomSyncCore
|
||||
bl Cardi_SetTask
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
|
||||
_020842D8:
|
||||
ldr r1, _02084300 ; =OSi_ThreadInfo
|
||||
mov r0, r5
|
||||
ldr r1, [r1, #4]
|
||||
str r1, [r5, #0x104]
|
||||
bl Cardi_ReadRomSyncCore
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
|
||||
.align 2, 0
|
||||
_020842F0: .word _022BBE20
|
||||
_020842F4: .word _022BB7E0
|
||||
_020842F8: .word _022BBE00
|
||||
_020842FC: .word Cardi_ReadRomSyncCore
|
||||
_02084300: .word OSi_ThreadInfo
|
||||
arm_func_end Cardi_ReadRom
|
||||
|
||||
arm_func_start CARD_Init
|
||||
CARD_Init: ; 0x02084304
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr ip, _02084360 ; =_022BB7E0
|
||||
ldr r0, [ip, #0x114]
|
||||
cmp r0, #0
|
||||
ldmneia sp!, {r3, pc}
|
||||
mov r2, #0
|
||||
ldr r0, _02084364 ; =_022BBE00
|
||||
sub r1, r2, #1
|
||||
mov r3, #1
|
||||
str r3, [ip, #0x114]
|
||||
str r2, [ip, #0x24]
|
||||
str r2, [ip, #0x20]
|
||||
str r2, [ip, #0x1c]
|
||||
str r1, [ip, #0x28]
|
||||
str r2, [ip, #0x38]
|
||||
str r2, [ip, #0x3c]
|
||||
str r2, [r0]
|
||||
bl CARDi_InitCommon
|
||||
bl CARDi_GetRomAccessor
|
||||
ldr r1, _02084364 ; =_022BBE00
|
||||
str r0, [r1, #0x20]
|
||||
bl CARD_InitPulledOutCallback
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02084360: .word _022BB7E0
|
||||
_02084364: .word _022BBE00
|
||||
arm_func_end CARD_Init
|
||||
|
||||
arm_func_start Card_WaitRomAsync
|
||||
Card_WaitRomAsync: ; 0x02084368
|
||||
ldr ip, _02084370 ; =Cardi_WaitAsync
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02084370: .word Cardi_WaitAsync
|
||||
arm_func_end Card_WaitRomAsync
|
||||
|
||||
arm_func_start CARDi_GetRomAccessor
|
||||
CARDi_GetRomAccessor: ; 0x02084374
|
||||
ldr r0, _0208437C ; =CARDi_ReadCard
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0208437C: .word CARDi_ReadCard
|
||||
arm_func_end CARDi_GetRomAccessor
|
||||
|
||||
254
lib/NitroSDK/asm/card_spi.s
Normal file
254
lib/NitroSDK/asm/card_spi.s
Normal file
@@ -0,0 +1,254 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start Cardi_IdentifyBackupCore
|
||||
Cardi_IdentifyBackupCore: ; 0x020834A4
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr r1, _02083808 ; =_022BB7E0
|
||||
mov r5, r0
|
||||
ldr r4, [r1]
|
||||
mov r1, #0
|
||||
add r0, r4, #0x18
|
||||
mov r2, #0x48
|
||||
bl MI_CpuFill8
|
||||
ldr r0, _0208380C ; =0x0000203F
|
||||
str r5, [r4, #4]
|
||||
str r0, [r4, #0x58]
|
||||
cmp r5, #0
|
||||
ldmeqia sp!, {r3, r4, r5, pc}
|
||||
mov r0, r5, asr #8
|
||||
and r0, r0, #0xff
|
||||
mov r3, #1
|
||||
mov ip, r3, lsl r0
|
||||
and r2, r5, #0xff
|
||||
mov r1, r5, asr #0x10
|
||||
str ip, [r4, #0x18]
|
||||
mov r0, #0xff
|
||||
strb r0, [r4, #0x54]
|
||||
cmp r2, #1
|
||||
and r0, r1, #0xff
|
||||
bne _020835E0
|
||||
cmp ip, #0x2000
|
||||
bhi _02083520
|
||||
bhs _0208355C
|
||||
cmp ip, #0x200
|
||||
beq _0208353C
|
||||
b _020837E8
|
||||
_02083520:
|
||||
cmp ip, #0x10000
|
||||
bhi _02083530
|
||||
beq _02083580
|
||||
b _020837E8
|
||||
_02083530:
|
||||
cmp ip, #0x20000
|
||||
beq _020835A4
|
||||
b _020837E8
|
||||
_0208353C:
|
||||
mov r0, #0x10
|
||||
str r0, [r4, #0x24]
|
||||
str r3, [r4, #0x28]
|
||||
mov r0, #5
|
||||
str r0, [r4, #0x2c]
|
||||
mov r0, #0xf0
|
||||
strb r0, [r4, #0x54]
|
||||
b _020835C4
|
||||
_0208355C:
|
||||
mov r0, #0x20
|
||||
str r0, [r4, #0x24]
|
||||
mov r0, #2
|
||||
str r0, [r4, #0x28]
|
||||
mov r0, #5
|
||||
str r0, [r4, #0x2c]
|
||||
mov r0, #0
|
||||
strb r0, [r4, #0x54]
|
||||
b _020835C4
|
||||
_02083580:
|
||||
mov r0, #0x80
|
||||
str r0, [r4, #0x24]
|
||||
mov r0, #2
|
||||
str r0, [r4, #0x28]
|
||||
mov r0, #0xa
|
||||
str r0, [r4, #0x2c]
|
||||
mov r0, #0
|
||||
strb r0, [r4, #0x54]
|
||||
b _020835C4
|
||||
_020835A4:
|
||||
mov r0, #0x100
|
||||
str r0, [r4, #0x24]
|
||||
mov r0, #3
|
||||
str r0, [r4, #0x28]
|
||||
mov r0, #5
|
||||
str r0, [r4, #0x2c]
|
||||
mov r0, #0
|
||||
strb r0, [r4, #0x54]
|
||||
_020835C4:
|
||||
ldr r0, [r4, #0x24]
|
||||
str r0, [r4, #0x1c]
|
||||
ldr r0, [r4, #0x58]
|
||||
orr r0, r0, #0x40
|
||||
orr r0, r0, #0x4300
|
||||
str r0, [r4, #0x58]
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
_020835E0:
|
||||
cmp r2, #2
|
||||
bne _020837A8
|
||||
cmp ip, #0x100000
|
||||
bhi _02083610
|
||||
bhs _02083634
|
||||
cmp ip, #0x40000
|
||||
bhi _02083604
|
||||
beq _02083634
|
||||
b _020837E8
|
||||
_02083604:
|
||||
cmp ip, #0x80000
|
||||
beq _02083634
|
||||
b _020837E8
|
||||
_02083610:
|
||||
cmp ip, #0x400000
|
||||
bhi _02083628
|
||||
bhs _020836AC
|
||||
cmp ip, #0x200000
|
||||
beq _02083660
|
||||
b _020837E8
|
||||
_02083628:
|
||||
cmp ip, #0x800000
|
||||
beq _020836FC
|
||||
b _020837E8
|
||||
_02083634:
|
||||
mov r0, #0x19
|
||||
str r0, [r4, #0x30]
|
||||
mov r1, #0x12c
|
||||
str r1, [r4, #0x34]
|
||||
ldr r0, _02083810 ; =0x00001388
|
||||
str r1, [r4, #0x50]
|
||||
str r0, [r4, #0x40]
|
||||
ldr r0, [r4, #0x58]
|
||||
orr r0, r0, #0x480
|
||||
str r0, [r4, #0x58]
|
||||
b _02083778
|
||||
_02083660:
|
||||
mov r0, #0x17
|
||||
str r0, [r4, #0x30]
|
||||
mov r1, #0x12c
|
||||
str r1, [r4, #0x34]
|
||||
mov r1, #0x1f4
|
||||
ldr r0, _02083810 ; =0x00001388
|
||||
str r1, [r4, #0x40]
|
||||
str r0, [r4, #0x44]
|
||||
mov r1, r0, lsl #1
|
||||
ldr r0, _02083814 ; =0x0000EA60
|
||||
str r1, [r4, #0x38]
|
||||
str r0, [r4, #0x3c]
|
||||
mov r0, #0
|
||||
strb r0, [r4, #0x54]
|
||||
ldr r0, [r4, #0x58]
|
||||
orr r0, r0, #0x80
|
||||
orr r0, r0, #0x5400
|
||||
str r0, [r4, #0x58]
|
||||
b _02083778
|
||||
_020836AC:
|
||||
mov r0, #0x258
|
||||
str r0, [r4, #0x40]
|
||||
add r0, r0, #0x960
|
||||
str r0, [r4, #0x44]
|
||||
mov r0, #0x46
|
||||
str r0, [r4, #0x48]
|
||||
mov r0, #0x96
|
||||
str r0, [r4, #0x4c]
|
||||
ldr r1, _02083818 ; =0x000059D8
|
||||
ldr r0, _0208381C ; =0x000C3500
|
||||
str r1, [r4, #0x38]
|
||||
str r0, [r4, #0x3c]
|
||||
mov r0, #0
|
||||
strb r0, [r4, #0x54]
|
||||
mov r0, #0x1000
|
||||
str r0, [r4, #0x20]
|
||||
ldr r0, [r4, #0x58]
|
||||
orr r0, r0, #0xd000
|
||||
str r0, [r4, #0x58]
|
||||
b _02083778
|
||||
_020836FC:
|
||||
cmp r0, #0
|
||||
bne _0208373C
|
||||
mov r0, #0x3e8
|
||||
str r0, [r4, #0x40]
|
||||
add r0, r0, #0x7d0
|
||||
str r0, [r4, #0x44]
|
||||
ldr r1, _02083820 ; =0x000109A0
|
||||
ldr r0, _02083824 ; =0x00027100
|
||||
str r1, [r4, #0x38]
|
||||
str r0, [r4, #0x3c]
|
||||
mov r0, #0
|
||||
strb r0, [r4, #0x54]
|
||||
ldr r0, [r4, #0x58]
|
||||
orr r0, r0, #0x5000
|
||||
str r0, [r4, #0x58]
|
||||
b _02083778
|
||||
_0208373C:
|
||||
cmp r0, #1
|
||||
bne _02083778
|
||||
mov r0, #0x3e8
|
||||
str r0, [r4, #0x40]
|
||||
add r0, r0, #0x7d0
|
||||
str r0, [r4, #0x44]
|
||||
ldr r1, _02083820 ; =0x000109A0
|
||||
ldr r0, _02083824 ; =0x00027100
|
||||
str r1, [r4, #0x38]
|
||||
str r0, [r4, #0x3c]
|
||||
mov r0, #0x84
|
||||
strb r0, [r4, #0x54]
|
||||
ldr r0, [r4, #0x58]
|
||||
orr r0, r0, #0x5000
|
||||
str r0, [r4, #0x58]
|
||||
_02083778:
|
||||
mov r0, #0x10000
|
||||
str r0, [r4, #0x1c]
|
||||
mov r0, #0x100
|
||||
str r0, [r4, #0x24]
|
||||
mov r0, #3
|
||||
str r0, [r4, #0x28]
|
||||
mov r0, #5
|
||||
str r0, [r4, #0x2c]
|
||||
ldr r0, [r4, #0x58]
|
||||
orr r0, r0, #0xb40
|
||||
str r0, [r4, #0x58]
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
_020837A8:
|
||||
cmp r2, #3
|
||||
bne _020837E8
|
||||
cmp ip, #0x2000
|
||||
cmpne ip, #0x8000
|
||||
bne _020837E8
|
||||
str ip, [r4, #0x24]
|
||||
str ip, [r4, #0x1c]
|
||||
mov r0, #2
|
||||
str r0, [r4, #0x28]
|
||||
mov r0, #0
|
||||
strb r0, [r4, #0x54]
|
||||
ldr r0, [r4, #0x58]
|
||||
orr r0, r0, #0x40
|
||||
orr r0, r0, #0x4300
|
||||
str r0, [r4, #0x58]
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
_020837E8:
|
||||
mov r1, #0
|
||||
str r1, [r4, #4]
|
||||
str r1, [r4, #0x18]
|
||||
ldr r0, _02083808 ; =_022BB7E0
|
||||
mov r1, #3
|
||||
ldr r0, [r0]
|
||||
str r1, [r0]
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_02083808: .word _022BB7E0
|
||||
_0208380C: .word 0x0000203F
|
||||
_02083810: .word 0x00001388
|
||||
_02083814: .word 0x0000EA60
|
||||
_02083818: .word 0x000059D8
|
||||
_0208381C: .word 0x000C3500
|
||||
_02083820: .word 0x000109A0
|
||||
_02083824: .word 0x00027100
|
||||
arm_func_end Cardi_IdentifyBackupCore
|
||||
|
||||
260
lib/NitroSDK/asm/ctrdg.s
Normal file
260
lib/NitroSDK/asm/ctrdg.s
Normal file
@@ -0,0 +1,260 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start CTRDGi_InitCommon
|
||||
CTRDGi_InitCommon: ; 0x02084734
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r1, _02084760 ; =_022BC04C
|
||||
mov r3, #0
|
||||
ldr r2, _02084764 ; =0x05000001
|
||||
add r0, sp, #0
|
||||
str r3, [sp]
|
||||
blx SVC_CpuSet
|
||||
bl OS_GetLockID
|
||||
ldr r1, _02084768 ; =_022BC048
|
||||
strh r0, [r1, #6]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02084760: .word _022BC04C
|
||||
_02084764: .word 0x05000001
|
||||
_02084768: .word _022BC048
|
||||
arm_func_end CTRDGi_InitCommon
|
||||
|
||||
arm_func_start Ctrdg_IsOptionCartridge
|
||||
Ctrdg_IsOptionCartridge: ; 0x0208476C
|
||||
stmdb sp!, {r3, lr}
|
||||
bl Ctrdg_IsExisting
|
||||
cmp r0, #0
|
||||
beq _0208478C
|
||||
bl Ctrdgi_IsAgbCartridgeAtInit
|
||||
cmp r0, #0
|
||||
moveq r0, #1
|
||||
ldmeqia sp!, {r3, pc}
|
||||
_0208478C:
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end Ctrdg_IsOptionCartridge
|
||||
|
||||
arm_func_start Ctrdgi_IsAgbCartridgeAtInit
|
||||
Ctrdgi_IsAgbCartridgeAtInit: ; 0x02084794
|
||||
ldr r0, _020847A8 ; =0x027FFC30
|
||||
ldrb r0, [r0, #5]
|
||||
mov r0, r0, lsl #0x1f
|
||||
mov r0, r0, lsr #0x1f
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_020847A8: .word 0x027FFC30
|
||||
arm_func_end Ctrdgi_IsAgbCartridgeAtInit
|
||||
|
||||
arm_func_start Ctrdg_IsExisting
|
||||
Ctrdg_IsExisting: ; 0x020847AC
|
||||
stmdb sp!, {r4, lr}
|
||||
sub sp, sp, #0x10
|
||||
ldr r2, _020848AC ; =0x027FFC30
|
||||
mov r4, #1
|
||||
ldrh r1, [r2]
|
||||
rsb r0, r4, #0x10000
|
||||
cmp r1, r0
|
||||
addeq sp, sp, #0x10
|
||||
moveq r0, #0
|
||||
ldmeqia sp!, {r4, pc}
|
||||
ldrb r0, [r2, #5]
|
||||
mov r0, r0, lsl #0x1e
|
||||
mov r0, r0, lsr #0x1f
|
||||
cmp r0, #1
|
||||
addeq sp, sp, #0x10
|
||||
moveq r0, #0
|
||||
ldmeqia sp!, {r4, pc}
|
||||
ldr r0, _020848B0 ; =_022BC048
|
||||
add r1, sp, #8
|
||||
ldrh r0, [r0, #6]
|
||||
bl CTRDGi_LockByProcessor
|
||||
add r0, sp, #0
|
||||
bl CTRDGi_ChangeLatestAccessCycle
|
||||
mov r0, #0x8000000
|
||||
ldrb r2, [r0, #0xb2]
|
||||
cmp r2, #0x96
|
||||
bne _0208482C
|
||||
ldr r1, _020848AC ; =0x027FFC30
|
||||
ldrh r0, [r0, #0xbe]
|
||||
ldrh r1, [r1]
|
||||
cmp r1, r0
|
||||
bne _02084874
|
||||
_0208482C:
|
||||
cmp r2, #0x96
|
||||
beq _0208484C
|
||||
ldr r1, _020848AC ; =0x027FFC30
|
||||
ldr r0, _020848B4 ; =0x0801FFFE
|
||||
ldrh r1, [r1]
|
||||
ldrh r0, [r0]
|
||||
cmp r1, r0
|
||||
bne _02084874
|
||||
_0208484C:
|
||||
ldr r2, _020848AC ; =0x027FFC30
|
||||
mov r0, #0x8000000
|
||||
ldr r1, [r2, #8]
|
||||
ldr r0, [r0, #0xac]
|
||||
cmp r1, r0
|
||||
beq _02084888
|
||||
ldrb r0, [r2, #5]
|
||||
mov r0, r0, lsl #0x1f
|
||||
movs r0, r0, lsr #0x1f
|
||||
beq _02084888
|
||||
_02084874:
|
||||
ldr r1, _020848AC ; =0x027FFC30
|
||||
mov r4, #0
|
||||
ldrb r0, [r1, #5]
|
||||
orr r0, r0, #2
|
||||
strb r0, [r1, #5]
|
||||
_02084888:
|
||||
add r0, sp, #0
|
||||
bl CTRDGi_RestoreAccessCycle
|
||||
ldr r0, _020848B0 ; =_022BC048
|
||||
add r1, sp, #8
|
||||
ldrh r0, [r0, #6]
|
||||
bl CTRDGi_UnlockByProcessor
|
||||
mov r0, r4
|
||||
add sp, sp, #0x10
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_020848AC: .word 0x027FFC30
|
||||
_020848B0: .word _022BC048
|
||||
_020848B4: .word 0x0801FFFE
|
||||
arm_func_end Ctrdg_IsExisting
|
||||
|
||||
arm_func_start CTRDGi_ChangeLatestAccessCycle
|
||||
CTRDGi_ChangeLatestAccessCycle: ; 0x020848B8
|
||||
ldr r2, _020848FC ; =0x04000204
|
||||
ldrh r1, [r2]
|
||||
and r1, r1, #0xc
|
||||
mov r1, r1, asr #2
|
||||
str r1, [r0]
|
||||
ldrh r1, [r2]
|
||||
and r1, r1, #0x10
|
||||
mov r1, r1, asr #4
|
||||
str r1, [r0, #4]
|
||||
ldrh r0, [r2]
|
||||
bic r0, r0, #0xc
|
||||
orr r0, r0, #0xc
|
||||
strh r0, [r2]
|
||||
ldrh r0, [r2]
|
||||
bic r0, r0, #0x10
|
||||
strh r0, [r2]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_020848FC: .word 0x04000204
|
||||
arm_func_end CTRDGi_ChangeLatestAccessCycle
|
||||
|
||||
arm_func_start CTRDGi_RestoreAccessCycle
|
||||
CTRDGi_RestoreAccessCycle: ; 0x02084900
|
||||
ldr r3, _02084930 ; =0x04000204
|
||||
ldr r2, [r0]
|
||||
ldrh r1, [r3]
|
||||
bic r1, r1, #0xc
|
||||
orr r1, r1, r2, lsl #2
|
||||
strh r1, [r3]
|
||||
ldrh r1, [r3]
|
||||
ldr r2, [r0, #4]
|
||||
bic r0, r1, #0x10
|
||||
orr r0, r0, r2, lsl #4
|
||||
strh r0, [r3]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02084930: .word 0x04000204
|
||||
arm_func_end CTRDGi_RestoreAccessCycle
|
||||
|
||||
arm_func_start CTRDGi_LockByProcessor
|
||||
CTRDGi_LockByProcessor: ; 0x02084934
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
ldr r5, _0208498C ; =0x027FFFE8
|
||||
mov r7, r0
|
||||
mov r6, r1
|
||||
mov r4, #1
|
||||
_02084948:
|
||||
bl EnableIrqFlag
|
||||
str r0, [r6, #4]
|
||||
mov r0, r5
|
||||
bl OS_ReadOwnerOfLockWord
|
||||
ands r0, r0, #0x40
|
||||
str r0, [r6]
|
||||
ldmneia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
mov r0, r7
|
||||
bl OS_TryLockCartridge
|
||||
cmp r0, #0
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
ldr r0, [r6, #4]
|
||||
bl SetIrqFlag
|
||||
mov r0, r4
|
||||
blx SVC_WaitByLoop
|
||||
b _02084948
|
||||
_02084988:
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_0208498C: .word 0x027FFFE8
|
||||
arm_func_end CTRDGi_LockByProcessor
|
||||
|
||||
arm_func_start CTRDGi_UnlockByProcessor
|
||||
CTRDGi_UnlockByProcessor: ; 0x02084990
|
||||
stmdb sp!, {r4, lr}
|
||||
mov r4, r1
|
||||
ldr r1, [r4]
|
||||
cmp r1, #0
|
||||
bne _020849A8
|
||||
bl OS_UnlockCartridgeVeneer
|
||||
_020849A8:
|
||||
ldr r0, [r4, #4]
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r4, pc}
|
||||
arm_func_end CTRDGi_UnlockByProcessor
|
||||
|
||||
arm_func_start CTRDGi_SendtoPxi
|
||||
CTRDGi_SendtoPxi: ; 0x020849B4
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
mov r7, r0
|
||||
mov r1, r7
|
||||
mov r0, #0xd
|
||||
mov r2, #0
|
||||
bl PXI_SendWordByFifo
|
||||
cmp r0, #0
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
mov r6, #1
|
||||
mov r5, #0xd
|
||||
mov r4, #0
|
||||
_020849E0:
|
||||
mov r0, r6
|
||||
blx SVC_WaitByLoop
|
||||
mov r0, r5
|
||||
mov r1, r7
|
||||
mov r2, r4
|
||||
bl PXI_SendWordByFifo
|
||||
cmp r0, #0
|
||||
bne _020849E0
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
arm_func_end CTRDGi_SendtoPxi
|
||||
|
||||
arm_func_start Ctrdg_Enable
|
||||
Ctrdg_Enable: ; 0x02084A04
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
mov r5, r0
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _02084A48 ; =_022BC048
|
||||
mov r4, r0
|
||||
str r5, [r1]
|
||||
bl Ctrdg_IsOptionCartridge
|
||||
cmp r0, #0
|
||||
bne _02084A3C
|
||||
cmp r5, #0
|
||||
movne r1, #0x1000
|
||||
moveq r1, #0x5000
|
||||
mov r0, #0xf000
|
||||
bl OS_SetDPermissionsForProtectionRegion
|
||||
_02084A3C:
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_02084A48: .word _022BC048
|
||||
arm_func_end Ctrdg_Enable
|
||||
|
||||
259
lib/NitroSDK/asm/ctrdg_proc.s
Normal file
259
lib/NitroSDK/asm/ctrdg_proc.s
Normal file
@@ -0,0 +1,259 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start CTRDG_Init
|
||||
CTRDG_Init: ; 0x02084A4C
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr r0, _02084AEC ; =_022BC060
|
||||
ldr r1, [r0, #8]
|
||||
cmp r1, #0
|
||||
ldmneia sp!, {r3, r4, r5, pc}
|
||||
mov r1, #1
|
||||
str r1, [r0, #8]
|
||||
bl CTRDGi_InitCommon
|
||||
ldr r0, _02084AEC ; =_022BC060
|
||||
mov r1, #0
|
||||
str r1, [r0, #0xc]
|
||||
bl PXI_Init
|
||||
mov r5, #0xd
|
||||
mov r4, #1
|
||||
_02084A84:
|
||||
mov r0, r5
|
||||
mov r1, r4
|
||||
bl PXI_IsCallbackReady
|
||||
cmp r0, #0
|
||||
beq _02084A84
|
||||
ldr r1, _02084AF0 ; =CTRDGi_CallbackForInitModuleInfo
|
||||
mov r0, #0xd
|
||||
bl PXI_SetFifoRecvCallback
|
||||
bl CTRDGi_InitModuleInfo
|
||||
mov r0, #0xd
|
||||
mov r1, #0
|
||||
bl PXI_SetFifoRecvCallback
|
||||
ldr r1, _02084AF4 ; =CTRDGi_PulledOutCallback
|
||||
mov r0, #0xd
|
||||
bl PXI_SetFifoRecvCallback
|
||||
ldr r1, _02084AEC ; =_022BC060
|
||||
mov r2, #0
|
||||
ldr r0, _02084AF8 ; =_022BC140
|
||||
str r2, [r1, #0x18]
|
||||
bl Ctrdgi_InitTaskThread
|
||||
ldr r1, _02084AFC ; =_02084D90
|
||||
mov r0, #0x11
|
||||
bl PXI_SetFifoRecvCallback
|
||||
mov r0, #0
|
||||
bl Ctrdg_Enable
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_02084AEC: .word _022BC060
|
||||
_02084AF0: .word CTRDGi_CallbackForInitModuleInfo
|
||||
_02084AF4: .word CTRDGi_PulledOutCallback
|
||||
_02084AF8: .word _022BC140
|
||||
_02084AFC: .word Ctrdgi_CallbackForSetPhi
|
||||
arm_func_end CTRDG_Init
|
||||
|
||||
arm_func_start CTRDGi_InitModuleInfo
|
||||
CTRDGi_InitModuleInfo: ; 0x02084B00
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
sub sp, sp, #0x10
|
||||
ldr r0, _02084CC8 ; =_022BC060
|
||||
ldr r1, [r0]
|
||||
cmp r1, #0
|
||||
addne sp, sp, #0x10
|
||||
ldmneia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
ldr r1, _02084CCC ; =0x04000300
|
||||
mov r2, #1
|
||||
ldrh r1, [r1]
|
||||
str r2, [r0]
|
||||
tst r1, #1
|
||||
addeq sp, sp, #0x10
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
mov r0, #0x40000
|
||||
bl OS_SetIrqMask
|
||||
ldr r3, _02084CD0 ; =0x04000208
|
||||
mov r2, #1
|
||||
ldrh r5, [r3]
|
||||
ldr r1, _02084CD4 ; =_022BC04C
|
||||
mov r4, r0
|
||||
strh r2, [r3]
|
||||
ldrh r0, [r1, #2]
|
||||
add r1, sp, #8
|
||||
bl CTRDGi_LockByProcessor
|
||||
ldr r1, _02084CD8 ; =0x04000204
|
||||
add r0, sp, #0
|
||||
ldrh r1, [r1]
|
||||
and r1, r1, #0x8000
|
||||
mov r6, r1, asr #0xf
|
||||
bl CTRDGi_ChangeLatestAccessCycle
|
||||
ldr r3, _02084CD8 ; =0x04000204
|
||||
ldr r0, _02084CDC ; =_022BC080
|
||||
ldrh r2, [r3]
|
||||
add r0, r0, #0x80
|
||||
mov r1, #0x40
|
||||
bic r2, r2, #0x8000
|
||||
strh r2, [r3]
|
||||
bl DC_InvalidateRange
|
||||
ldr r2, _02084CDC ; =_022BC080
|
||||
ldr r1, _02084CE0 ; =0x08000080
|
||||
mov r0, #1
|
||||
mov r3, #0x40
|
||||
add r2, r2, #0x80
|
||||
bl MI_DmaCopy16
|
||||
ldr r2, _02084CD8 ; =0x04000204
|
||||
add r0, sp, #0
|
||||
ldrh r1, [r2]
|
||||
bic r1, r1, #0x8000
|
||||
orr r1, r1, r6, lsl #15
|
||||
strh r1, [r2]
|
||||
bl CTRDGi_RestoreAccessCycle
|
||||
ldr r0, _02084CD4 ; =_022BC04C
|
||||
add r1, sp, #8
|
||||
ldrh r0, [r0, #2]
|
||||
bl CTRDGi_UnlockByProcessor
|
||||
ldr r1, _02084CE4 ; =0x027FFF9B
|
||||
ldrb r0, [r1]
|
||||
cmp r0, #0
|
||||
bne _02084BFC
|
||||
ldrb r0, [r1, #-1]
|
||||
cmp r0, #0
|
||||
bne _02084C60
|
||||
_02084BFC:
|
||||
ldr r3, _02084CDC ; =_022BC080
|
||||
ldr r6, _02084CE8 ; =0x027FFC30
|
||||
ldrh r0, [r3, #0xbe]
|
||||
mov r2, #0
|
||||
strh r0, [r6]
|
||||
b _02084C28
|
||||
_02084C14:
|
||||
add r0, r3, r2
|
||||
ldrb r1, [r0, #0xb5]
|
||||
add r0, r6, r2
|
||||
add r2, r2, #1
|
||||
strb r1, [r0, #2]
|
||||
_02084C28:
|
||||
cmp r2, #3
|
||||
blt _02084C14
|
||||
ldrh r0, [r3, #0xb0]
|
||||
strh r0, [r6, #6]
|
||||
ldr r0, [r3, #0xac]
|
||||
str r0, [r6, #8]
|
||||
bl Ctrdg_IsExisting
|
||||
cmp r0, #0
|
||||
movne r2, #1
|
||||
ldr r1, _02084CE4 ; =0x027FFF9B
|
||||
moveq r2, #0
|
||||
mov r0, #1
|
||||
strb r2, [r1]
|
||||
strb r0, [r1, #-1]
|
||||
_02084C60:
|
||||
ldr r0, _02084CEC ; =0xFFFF0020
|
||||
ldr r1, _02084CF0 ; =_022BC084
|
||||
mov r2, #0x9c
|
||||
bl MTi_CpuCopy32
|
||||
bl DC_FlushAll
|
||||
ldr r0, _02084CDC ; =_022BC080
|
||||
add r0, r0, #0xfe000000
|
||||
mov r0, r0, lsr #5
|
||||
mov r0, r0, lsl #6
|
||||
orr r0, r0, #1
|
||||
bl CTRDGi_SendtoPxi
|
||||
mov r7, #1
|
||||
ldr r6, _02084CD4 ; =_022BC04C
|
||||
b _02084CA0
|
||||
_02084C98:
|
||||
mov r0, r7
|
||||
blx SVC_WaitByLoop
|
||||
_02084CA0:
|
||||
ldrh r0, [r6]
|
||||
cmp r0, #1
|
||||
bne _02084C98
|
||||
ldr r2, _02084CD0 ; =0x04000208
|
||||
mov r0, r4
|
||||
ldrh r1, [r2]
|
||||
strh r5, [r2]
|
||||
bl OS_SetIrqMask
|
||||
add sp, sp, #0x10
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_02084CC8: .word _022BC060
|
||||
_02084CCC: .word 0x04000300
|
||||
_02084CD0: .word 0x04000208
|
||||
_02084CD4: .word _022BC04C
|
||||
_02084CD8: .word 0x04000204
|
||||
_02084CDC: .word _022BC080
|
||||
_02084CE0: .word 0x08000080
|
||||
_02084CE4: .word 0x027FFF9B
|
||||
_02084CE8: .word 0x027FFC30
|
||||
_02084CEC: .word 0xFFFF0020
|
||||
_02084CF0: .word _022BC084
|
||||
arm_func_end CTRDGi_InitModuleInfo
|
||||
|
||||
arm_func_start CTRDGi_CallbackForInitModuleInfo
|
||||
CTRDGi_CallbackForInitModuleInfo: ; 0x02084CF4
|
||||
stmdb sp!, {r3, lr}
|
||||
and r0, r1, #0x3f
|
||||
cmp r0, #1
|
||||
bne _02084D14
|
||||
ldr r0, _02084D1C ; =_022BC04C
|
||||
mov r1, #1
|
||||
strh r1, [r0]
|
||||
ldmia sp!, {r3, pc}
|
||||
_02084D14:
|
||||
bl WaitForever2
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02084D1C: .word _022BC04C
|
||||
arm_func_end CTRDGi_CallbackForInitModuleInfo
|
||||
|
||||
arm_func_start CTRDGi_PulledOutCallback
|
||||
CTRDGi_PulledOutCallback: ; 0x02084D20
|
||||
stmdb sp!, {r3, lr}
|
||||
and r0, r1, #0x3f
|
||||
cmp r0, #0x11
|
||||
bne _02084D70
|
||||
ldr r0, _02084D78 ; =_022BC060
|
||||
ldr r1, [r0, #0xc]
|
||||
cmp r1, #0
|
||||
ldmneia sp!, {r3, pc}
|
||||
ldr r1, [r0, #0x18]
|
||||
mov r0, #0
|
||||
cmp r1, #0
|
||||
beq _02084D54
|
||||
blx r1
|
||||
_02084D54:
|
||||
cmp r0, #0
|
||||
beq _02084D60
|
||||
bl CTRDG_TerminateForPulledOut
|
||||
_02084D60:
|
||||
ldr r0, _02084D78 ; =_022BC060
|
||||
mov r1, #1
|
||||
str r1, [r0, #0xc]
|
||||
ldmia sp!, {r3, pc}
|
||||
_02084D70:
|
||||
bl WaitForever2
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02084D78: .word _022BC060
|
||||
arm_func_end CTRDGi_PulledOutCallback
|
||||
|
||||
arm_func_start CTRDG_TerminateForPulledOut
|
||||
CTRDG_TerminateForPulledOut: ; 0x02084D7C
|
||||
stmdb sp!, {r3, lr}
|
||||
mov r0, #2
|
||||
bl CTRDGi_SendtoPxi
|
||||
bl WaitForever2
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end CTRDG_TerminateForPulledOut
|
||||
|
||||
arm_func_start Ctrdgi_CallbackForSetPhi
|
||||
Ctrdgi_CallbackForSetPhi: ; 0x02084D90
|
||||
ldr r0, _02084DA0 ; =_022BC060
|
||||
mov r1, #0
|
||||
str r1, [r0, #4]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02084DA0: .word _022BC060
|
||||
arm_func_end Ctrdgi_CallbackForSetPhi
|
||||
|
||||
127
lib/NitroSDK/asm/ctrdg_task.s
Normal file
127
lib/NitroSDK/asm/ctrdg_task.s
Normal file
@@ -0,0 +1,127 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start Ctrdgi_InitTaskThread
|
||||
Ctrdgi_InitTaskThread: ; 0x02084DA4
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
sub sp, sp, #8
|
||||
mov r5, r0
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _02084E20 ; =_022BC228
|
||||
mov r4, r0
|
||||
ldr r0, [r1]
|
||||
cmp r0, #0
|
||||
bne _02084E10
|
||||
add r0, r5, #0xc4
|
||||
str r5, [r1]
|
||||
bl Ctrdgi_InitTaskInfo
|
||||
ldr r0, _02084E24 ; =_022BC22C
|
||||
bl Ctrdgi_InitTaskInfo
|
||||
mov r0, #0
|
||||
str r0, [r5, #0xc0]
|
||||
mov r2, #0x400
|
||||
ldr r1, _02084E28 ; =Ctrdgi_TaskThread
|
||||
ldr r3, _02084E2C ; =_022BC650
|
||||
mov r0, r5
|
||||
str r2, [sp]
|
||||
mov r2, #0x14
|
||||
str r2, [sp, #4]
|
||||
mov r2, r5
|
||||
bl OS_CreateThread
|
||||
mov r0, r5
|
||||
bl OS_WakeupThreadDirect
|
||||
_02084E10:
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_02084E20: .word _022BC228
|
||||
_02084E24: .word _022BC22C
|
||||
_02084E28: .word Ctrdgi_TaskThread
|
||||
_02084E2C: .word _022BC650
|
||||
arm_func_end Ctrdgi_InitTaskThread
|
||||
|
||||
arm_func_start Ctrdgi_InitTaskInfo
|
||||
Ctrdgi_InitTaskInfo: ; 0x02084E30
|
||||
ldr ip, _02084E40 ; =MI_CpuFill8
|
||||
mov r1, #0
|
||||
mov r2, #0x24
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02084E40: .word MI_CpuFill8
|
||||
arm_func_end Ctrdgi_InitTaskInfo
|
||||
|
||||
arm_func_start Ctrdgi_TaskThread
|
||||
Ctrdgi_TaskThread: ; 0x02084E44
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
|
||||
sub sp, sp, #0x24
|
||||
mov r4, #0
|
||||
mov r8, r0
|
||||
add r6, sp, #0
|
||||
mov sl, r4
|
||||
mov sb, r4
|
||||
mov r5, r4
|
||||
mov fp, #0x24
|
||||
_02084E68:
|
||||
mov r0, r6
|
||||
mov r1, r5
|
||||
mov r2, fp
|
||||
bl MI_CpuFill8
|
||||
bl EnableIrqFlag
|
||||
ldr r1, [r8, #0xc0]
|
||||
mov r7, r0
|
||||
cmp r1, #0
|
||||
bne _02084EA0
|
||||
_02084E8C:
|
||||
mov r0, r4
|
||||
bl OS_SleepThread
|
||||
ldr r0, [r8, #0xc0]
|
||||
cmp r0, #0
|
||||
beq _02084E8C
|
||||
_02084EA0:
|
||||
ldr lr, [r8, #0xc0]
|
||||
add ip, sp, #0
|
||||
ldmia lr!, {r0, r1, r2, r3}
|
||||
stmia ip!, {r0, r1, r2, r3}
|
||||
ldmia lr!, {r0, r1, r2, r3}
|
||||
stmia ip!, {r0, r1, r2, r3}
|
||||
ldr r1, [lr]
|
||||
mov r0, r7
|
||||
str r1, [ip]
|
||||
bl SetIrqFlag
|
||||
ldr r1, [sp]
|
||||
cmp r1, #0
|
||||
beq _02084EE0
|
||||
mov r0, r6
|
||||
blx r1
|
||||
str r0, [sp, #8]
|
||||
_02084EE0:
|
||||
bl EnableIrqFlag
|
||||
ldr r2, [sp, #4]
|
||||
ldr r1, _02084F30 ; =_022BC228
|
||||
mov r7, r0
|
||||
strb sl, [r1, #0x26]
|
||||
cmp r2, #0
|
||||
beq _02084F04
|
||||
mov r0, r6
|
||||
blx r2
|
||||
_02084F04:
|
||||
ldr r0, _02084F30 ; =_022BC228
|
||||
ldr r0, [r0]
|
||||
cmp r0, #0
|
||||
beq _02084F24
|
||||
mov r0, r7
|
||||
str sb, [r8, #0xc0]
|
||||
bl SetIrqFlag
|
||||
b _02084E68
|
||||
_02084F24:
|
||||
bl OS_ExitThread
|
||||
add sp, sp, #0x24
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
.align 2, 0
|
||||
_02084F30: .word _022BC228
|
||||
arm_func_end Ctrdgi_TaskThread
|
||||
|
||||
605
lib/NitroSDK/asm/dgt.s
Normal file
605
lib/NitroSDK/asm/dgt.s
Normal file
@@ -0,0 +1,605 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start Dgt_Hash2Init
|
||||
Dgt_Hash2Init: ; 0x02080670
|
||||
ldr r1, _020806AC ; =0x67452301
|
||||
ldr r2, _020806B0 ; =0xEFCDAB89
|
||||
str r1, [r0]
|
||||
ldr r1, _020806B4 ; =0x98BADCFE
|
||||
str r2, [r0, #4]
|
||||
ldr r2, _020806B8 ; =0x10325476
|
||||
str r1, [r0, #8]
|
||||
ldr r1, _020806BC ; =0xC3D2E1F0
|
||||
str r2, [r0, #0xc]
|
||||
str r1, [r0, #0x10]
|
||||
mov r1, #0
|
||||
str r1, [r0, #0x14]
|
||||
str r1, [r0, #0x18]
|
||||
str r1, [r0, #0x1c]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_020806AC: .word 0x67452301
|
||||
_020806B0: .word 0xEFCDAB89
|
||||
_020806B4: .word 0x98BADCFE
|
||||
_020806B8: .word 0x10325476
|
||||
_020806BC: .word 0xC3D2E1F0
|
||||
arm_func_end Dgt_Hash2Init
|
||||
|
||||
arm_func_start Dgt_Hash2Update
|
||||
Dgt_Hash2Update: ; 0x020806C0
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
|
||||
mov sl, r0
|
||||
movs r8, r2
|
||||
mov sb, r1
|
||||
add r6, sl, #0x20
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
ldr r0, [sl, #0x14]
|
||||
add r1, r0, r8, lsl #3
|
||||
cmp r1, r0
|
||||
ldrlo r0, [sl, #0x18]
|
||||
addlo r0, r0, #1
|
||||
strlo r0, [sl, #0x18]
|
||||
ldr r0, [sl, #0x18]
|
||||
add r0, r0, r8, lsr #29
|
||||
str r0, [sl, #0x18]
|
||||
str r1, [sl, #0x14]
|
||||
ldr r1, [sl, #0x1c]
|
||||
cmp r1, #0
|
||||
beq _02080778
|
||||
add r0, r1, r8
|
||||
cmp r0, #0x40
|
||||
blo _02080758
|
||||
rsb r4, r1, #0x40
|
||||
mov r0, sb
|
||||
mov r2, r4
|
||||
add r1, r6, r1
|
||||
bl MI_CpuCopy8
|
||||
ldr r1, _02080810 ; =_020B2D88
|
||||
mov r0, sl
|
||||
ldr r3, [r1]
|
||||
mov r1, r6
|
||||
mov r2, #0x40
|
||||
sub r8, r8, r4
|
||||
add sb, sb, r4
|
||||
blx r3
|
||||
mov r0, #0
|
||||
str r0, [sl, #0x1c]
|
||||
b _02080778
|
||||
_02080758:
|
||||
mov r0, sb
|
||||
mov r2, r8
|
||||
add r1, r6, r1
|
||||
bl MI_CpuCopy8
|
||||
ldr r0, [sl, #0x1c]
|
||||
add r0, r0, r8
|
||||
str r0, [sl, #0x1c]
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
_02080778:
|
||||
cmp r8, #0x40
|
||||
blo _020807F0
|
||||
bic r7, r8, #0x3f
|
||||
tst sb, #3
|
||||
sub r8, r8, r7
|
||||
bne _020807B0
|
||||
ldr r1, _02080810 ; =_020B2D88
|
||||
mov r0, sl
|
||||
ldr r3, [r1]
|
||||
mov r1, sb
|
||||
mov r2, r7
|
||||
blx r3
|
||||
add sb, sb, r7
|
||||
b _020807F0
|
||||
_020807B0:
|
||||
mov r5, #0x40
|
||||
ldr r4, _02080810 ; =_020B2D88
|
||||
mov fp, r5
|
||||
_020807BC:
|
||||
mov r0, sb
|
||||
mov r1, r6
|
||||
mov r2, r5
|
||||
bl MI_CpuCopy8
|
||||
ldr r3, [r4]
|
||||
mov r0, sl
|
||||
mov r1, r6
|
||||
add sb, sb, #0x40
|
||||
mov r2, fp
|
||||
blx r3
|
||||
sub r7, r7, #0x40
|
||||
cmp r7, #0
|
||||
bgt _020807BC
|
||||
_020807F0:
|
||||
str r8, [sl, #0x1c]
|
||||
cmp r8, #0
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
mov r0, sb
|
||||
mov r1, r6
|
||||
mov r2, r8
|
||||
bl MI_CpuCopy8
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
.align 2, 0
|
||||
_02080810: .word _020B2D88
|
||||
arm_func_end Dgt_Hash2Update
|
||||
|
||||
arm_func_start Dgt_Hash2GetHash
|
||||
Dgt_Hash2GetHash: ; 0x02080814
|
||||
stmdb sp!, {r0, r1, r2, r3}
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
ldr r0, [sp, #0x10]
|
||||
mov r6, r1
|
||||
ldr r3, [r0, #0x1c]
|
||||
add r4, r0, #0x20
|
||||
tst r3, #3
|
||||
mov r2, r3, asr #2
|
||||
moveq r0, #0
|
||||
streq r0, [r4, r2, lsl #2]
|
||||
ldr r1, [sp, #0x10]
|
||||
mov r0, #0x80
|
||||
add r5, r1, #0x20
|
||||
strb r0, [r5, r3]
|
||||
add r3, r3, #1
|
||||
tst r3, #3
|
||||
beq _0208086C
|
||||
mov r0, #0
|
||||
_0208085C:
|
||||
strb r0, [r5, r3]
|
||||
add r3, r3, #1
|
||||
tst r3, #3
|
||||
bne _0208085C
|
||||
_0208086C:
|
||||
ldr r0, [sp, #0x10]
|
||||
add r2, r2, #1
|
||||
ldr r0, [r0, #0x1c]
|
||||
cmp r0, #0x38
|
||||
blt _020808B8
|
||||
cmp r2, #0x10
|
||||
bge _0208089C
|
||||
mov r0, #0
|
||||
_0208088C:
|
||||
str r0, [r4, r2, lsl #2]
|
||||
add r2, r2, #1
|
||||
cmp r2, #0x10
|
||||
blt _0208088C
|
||||
_0208089C:
|
||||
ldr r1, _02080A0C ; =_020B2D88
|
||||
ldr r0, [sp, #0x10]
|
||||
ldr r3, [r1]
|
||||
mov r1, r4
|
||||
mov r2, #0x40
|
||||
blx r3
|
||||
mov r2, #0
|
||||
_020808B8:
|
||||
cmp r2, #0xe
|
||||
bge _020808D4
|
||||
mov r0, #0
|
||||
_020808C4:
|
||||
str r0, [r4, r2, lsl #2]
|
||||
add r2, r2, #1
|
||||
cmp r2, #0xe
|
||||
blt _020808C4
|
||||
_020808D4:
|
||||
ldr r0, [sp, #0x10]
|
||||
ldr r3, _02080A0C ; =_020B2D88
|
||||
ldr r2, [r0, #0x14]
|
||||
mov r1, r4
|
||||
strb r2, [r5, #0x3f]
|
||||
mov r0, r2, lsr #8
|
||||
strb r0, [r5, #0x3e]
|
||||
mov r0, r2, lsr #0x10
|
||||
strb r0, [r5, #0x3d]
|
||||
mov r0, r2, lsr #0x18
|
||||
strb r0, [r5, #0x3c]
|
||||
ldr r0, [sp, #0x10]
|
||||
mov r2, #0x40
|
||||
ldr r4, [r0, #0x18]
|
||||
strb r4, [r5, #0x3b]
|
||||
mov r0, r4, lsr #8
|
||||
strb r0, [r5, #0x3a]
|
||||
mov r0, r4, lsr #0x10
|
||||
strb r0, [r5, #0x39]
|
||||
mov r0, r4, lsr #0x18
|
||||
strb r0, [r5, #0x38]
|
||||
ldr r0, [sp, #0x10]
|
||||
ldr r3, [r3]
|
||||
blx r3
|
||||
ldr r0, [sp, #0x10]
|
||||
ldr r1, [r0]
|
||||
mov r0, r1, lsr #0x18
|
||||
strb r0, [r6]
|
||||
mov r0, r1, lsr #0x10
|
||||
strb r0, [r6, #1]
|
||||
mov r0, r1, lsr #8
|
||||
strb r0, [r6, #2]
|
||||
strb r1, [r6, #3]
|
||||
ldr r0, [sp, #0x10]
|
||||
ldr r1, [r0, #4]
|
||||
mov r0, r1, lsr #0x18
|
||||
strb r0, [r6, #4]
|
||||
mov r0, r1, lsr #0x10
|
||||
strb r0, [r6, #5]
|
||||
mov r0, r1, lsr #8
|
||||
strb r0, [r6, #6]
|
||||
strb r1, [r6, #7]
|
||||
ldr r0, [sp, #0x10]
|
||||
ldr r1, [r0, #8]
|
||||
mov r0, r1, lsr #0x18
|
||||
strb r0, [r6, #8]
|
||||
mov r0, r1, lsr #0x10
|
||||
strb r0, [r6, #9]
|
||||
mov r0, r1, lsr #8
|
||||
strb r0, [r6, #0xa]
|
||||
strb r1, [r6, #0xb]
|
||||
ldr r0, [sp, #0x10]
|
||||
ldr r1, [r0, #0xc]
|
||||
mov r0, r1, lsr #0x18
|
||||
strb r0, [r6, #0xc]
|
||||
mov r0, r1, lsr #0x10
|
||||
strb r0, [r6, #0xd]
|
||||
mov r0, r1, lsr #8
|
||||
strb r0, [r6, #0xe]
|
||||
strb r1, [r6, #0xf]
|
||||
ldr r0, [sp, #0x10]
|
||||
ldr r1, [r0, #0x10]
|
||||
mov r0, r1, lsr #0x18
|
||||
strb r0, [r6, #0x10]
|
||||
mov r0, r1, lsr #0x10
|
||||
strb r0, [r6, #0x11]
|
||||
mov r0, r1, lsr #8
|
||||
strb r0, [r6, #0x12]
|
||||
strb r1, [r6, #0x13]
|
||||
ldr r3, [sp, #0x10]
|
||||
mov r0, #0
|
||||
add r1, sp, #0x10
|
||||
mov r2, #4
|
||||
str r0, [r3, #0x1c]
|
||||
bl MTi_CpuClear32
|
||||
ldmia sp!, {r4, r5, r6, lr}
|
||||
add sp, sp, #0x10
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02080A0C: .word _020B2D88
|
||||
arm_func_end Dgt_Hash2GetHash
|
||||
|
||||
arm_func_start Dgt_Hash2CalcHmac
|
||||
Dgt_Hash2CalcHmac: ; 0x02080A10
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||||
sub sp, sp, #0xa0
|
||||
ldr lr, _02080A94 ; =_020AEC5C
|
||||
add ip, sp, #8
|
||||
mov r8, r0
|
||||
mov r7, r1
|
||||
mov r6, r2
|
||||
mov r5, r3
|
||||
mov r4, ip
|
||||
ldmia lr!, {r0, r1, r2, r3}
|
||||
stmia ip!, {r0, r1, r2, r3}
|
||||
ldmia lr, {r0, r1, r2}
|
||||
stmia ip, {r0, r1, r2}
|
||||
add lr, sp, #0x38
|
||||
add ip, sp, #0x24
|
||||
str lr, [sp, #0x10]
|
||||
ldr lr, _02080A98 ; =Dgt_Hash2Init
|
||||
str ip, [sp, #0x14]
|
||||
ldr ip, _02080A9C ; =Dgt_Hash2Update
|
||||
str lr, [sp, #0x18]
|
||||
ldr lr, _02080AA0 ; =Dgt_Hash2GetHash
|
||||
str ip, [sp, #0x1c]
|
||||
ldr ip, [sp, #0xb8]
|
||||
str lr, [sp, #0x20]
|
||||
str ip, [sp]
|
||||
mov r3, r5
|
||||
mov r0, r8
|
||||
mov r1, r7
|
||||
mov r2, r6
|
||||
str r4, [sp, #4]
|
||||
bl Dgti_CalcHmac
|
||||
add sp, sp, #0xa0
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
.align 2, 0
|
||||
_02080A94: .word _020AEC5C
|
||||
_02080A98: .word Dgt_Hash2Init
|
||||
_02080A9C: .word Dgt_Hash2Update
|
||||
_02080AA0: .word Dgt_Hash2GetHash
|
||||
arm_func_end Dgt_Hash2CalcHmac
|
||||
|
||||
arm_func_start Dgti_CalcHmac
|
||||
Dgti_CalcHmac: ; 0x02080AA4
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
|
||||
sub sp, sp, #0xc0
|
||||
ldr r5, [sp, #0xe0]
|
||||
ldr r4, [sp, #0xe4]
|
||||
mov r8, r1
|
||||
movs sb, r0
|
||||
mov r7, r2
|
||||
cmpne r8, #0
|
||||
mov r6, r3
|
||||
cmpne r7, #0
|
||||
cmpne r6, #0
|
||||
cmpne r5, #0
|
||||
cmpne r4, #0
|
||||
addeq sp, sp, #0xc0
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
|
||||
ldr r0, [r4, #4]
|
||||
cmp r5, r0
|
||||
ble _02080B24
|
||||
ldr r0, [r4, #8]
|
||||
ldr r1, [r4, #0x10]
|
||||
blx r1
|
||||
ldr r0, [r4, #8]
|
||||
ldr r3, [r4, #0x14]
|
||||
mov r1, r6
|
||||
mov r2, r5
|
||||
blx r3
|
||||
ldr r0, [r4, #8]
|
||||
ldr r2, [r4, #0x18]
|
||||
add r1, sp, #0x80
|
||||
blx r2
|
||||
ldr r5, [r4]
|
||||
add r6, sp, #0x80
|
||||
_02080B24:
|
||||
cmp r5, #0
|
||||
mov r2, #0
|
||||
ble _02080B4C
|
||||
add r1, sp, #0x40
|
||||
_02080B34:
|
||||
ldrb r0, [r6, r2]
|
||||
add r2, r2, #1
|
||||
cmp r2, r5
|
||||
eor r0, r0, #0x36
|
||||
strb r0, [r1], #1
|
||||
blt _02080B34
|
||||
_02080B4C:
|
||||
ldr r0, [r4, #4]
|
||||
cmp r2, r0
|
||||
bge _02080B78
|
||||
add r0, sp, #0x40
|
||||
add r3, r0, r2
|
||||
mov r1, #0x36
|
||||
_02080B64:
|
||||
strb r1, [r3], #1
|
||||
ldr r0, [r4, #4]
|
||||
add r2, r2, #1
|
||||
cmp r2, r0
|
||||
blt _02080B64
|
||||
_02080B78:
|
||||
ldr r0, [r4, #8]
|
||||
ldr r1, [r4, #0x10]
|
||||
blx r1
|
||||
ldr r0, [r4, #8]
|
||||
ldr r2, [r4, #4]
|
||||
ldr r3, [r4, #0x14]
|
||||
add r1, sp, #0x40
|
||||
blx r3
|
||||
ldr r0, [r4, #8]
|
||||
ldr r3, [r4, #0x14]
|
||||
mov r1, r8
|
||||
mov r2, r7
|
||||
blx r3
|
||||
ldr r0, [r4, #8]
|
||||
ldr r1, [r4, #0xc]
|
||||
ldr r2, [r4, #0x18]
|
||||
blx r2
|
||||
cmp r5, #0
|
||||
mov r3, #0
|
||||
ble _02080BE4
|
||||
add r1, sp, #0
|
||||
_02080BCC:
|
||||
ldrb r0, [r6, r3]
|
||||
add r3, r3, #1
|
||||
cmp r3, r5
|
||||
eor r0, r0, #0x5c
|
||||
strb r0, [r1], #1
|
||||
blt _02080BCC
|
||||
_02080BE4:
|
||||
ldr r0, [r4, #4]
|
||||
cmp r3, r0
|
||||
bge _02080C10
|
||||
add r0, sp, #0
|
||||
add r2, r0, r3
|
||||
mov r1, #0x5c
|
||||
_02080BFC:
|
||||
strb r1, [r2], #1
|
||||
ldr r0, [r4, #4]
|
||||
add r3, r3, #1
|
||||
cmp r3, r0
|
||||
blt _02080BFC
|
||||
_02080C10:
|
||||
ldr r0, [r4, #8]
|
||||
ldr r1, [r4, #0x10]
|
||||
blx r1
|
||||
ldr r0, [r4, #8]
|
||||
ldr r2, [r4, #4]
|
||||
ldr r3, [r4, #0x14]
|
||||
add r1, sp, #0
|
||||
blx r3
|
||||
ldr r0, [r4, #8]
|
||||
ldr r1, [r4, #0xc]
|
||||
ldr r2, [r4]
|
||||
ldr r3, [r4, #0x14]
|
||||
blx r3
|
||||
ldr r0, [r4, #8]
|
||||
ldr r2, [r4, #0x18]
|
||||
mov r1, sb
|
||||
blx r2
|
||||
add sp, sp, #0xc0
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
|
||||
.align 2, 0
|
||||
_02080C5C: .word 0x00FF00FF
|
||||
_02080C60: .word 0x5A827999
|
||||
_02080C64: .word 0x6ED9EBA1
|
||||
_02080C68: .word 0x8F1BBCDC
|
||||
_02080C6C: .word 0xCA62C1D6
|
||||
arm_func_end Dgti_CalcHmac
|
||||
|
||||
arm_func_start Dgt_Hash2Transform
|
||||
Dgt_Hash2Transform: ; 0x02080C70
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, ip, lr}
|
||||
ldmia r0, {r3, sb, sl, fp, ip}
|
||||
sub sp, sp, #0x84
|
||||
str r2, [sp, #0x80]
|
||||
_02080C80:
|
||||
ldr r8, _02080C60 ; =0x5A827999
|
||||
ldr r7, _02080C5C ; =0x00FF00FF
|
||||
mov r6, sp
|
||||
mov r5, #0
|
||||
_02080C90:
|
||||
ldr r4, [r1], #4
|
||||
add r2, r8, ip
|
||||
add r2, r2, r3, ror #27
|
||||
and lr, r4, r7
|
||||
and r4, r7, r4, ror #24
|
||||
orr r4, r4, lr, ror #8
|
||||
str r4, [r6, #0x40]
|
||||
str r4, [r6], #4
|
||||
add r2, r2, r4
|
||||
eor r4, sl, fp
|
||||
and r4, r4, sb
|
||||
eor r4, r4, fp
|
||||
add r2, r2, r4
|
||||
mov sb, sb, ror #2
|
||||
mov ip, fp
|
||||
mov fp, sl
|
||||
mov sl, sb
|
||||
mov sb, r3
|
||||
mov r3, r2
|
||||
add r5, r5, #4
|
||||
cmp r5, #0x40
|
||||
blt _02080C90
|
||||
mov r7, #0
|
||||
mov r6, sp
|
||||
_02080CF0:
|
||||
ldr r2, [r6]
|
||||
ldr r5, [r6, #8]
|
||||
ldr r4, [r6, #0x20]
|
||||
ldr lr, [r6, #0x34]
|
||||
eor r2, r2, r5
|
||||
eor r4, r4, lr
|
||||
eor r2, r2, r4
|
||||
mov r2, r2, ror #0x1f
|
||||
str r2, [r6, #0x40]
|
||||
str r2, [r6], #4
|
||||
add r2, r2, ip
|
||||
add r2, r2, r8
|
||||
add r2, r2, r3, ror #27
|
||||
eor r4, sl, fp
|
||||
and r4, r4, sb
|
||||
eor r4, r4, fp
|
||||
add r2, r2, r4
|
||||
mov sb, sb, ror #2
|
||||
mov ip, fp
|
||||
mov fp, sl
|
||||
mov sl, sb
|
||||
mov sb, r3
|
||||
mov r3, r2
|
||||
add r7, r7, #4
|
||||
cmp r7, #0x10
|
||||
blt _02080CF0
|
||||
ldr r8, _02080C64 ; =0x6ED9EBA1
|
||||
mov r7, #0
|
||||
_02080D60:
|
||||
ldr r2, [r6]
|
||||
ldr r4, [r6, #8]
|
||||
ldr lr, [r6, #0x20]
|
||||
ldr r5, [r6, #0x34]
|
||||
eor r2, r2, r4
|
||||
eor lr, lr, r5
|
||||
eor r2, r2, lr
|
||||
mov r2, r2, ror #0x1f
|
||||
str r2, [r6, #0x40]
|
||||
str r2, [r6], #4
|
||||
add r2, r2, ip
|
||||
add r2, r2, r8
|
||||
add r2, r2, r3, ror #27
|
||||
eor lr, sb, sl
|
||||
eor lr, lr, fp
|
||||
add r2, r2, lr
|
||||
mov sb, sb, ror #2
|
||||
mov ip, fp
|
||||
mov fp, sl
|
||||
mov sl, sb
|
||||
mov sb, r3
|
||||
mov r3, r2
|
||||
add r7, r7, #1
|
||||
cmp r7, #0xc
|
||||
moveq r6, sp
|
||||
cmp r7, #0x14
|
||||
blt _02080D60
|
||||
ldr r8, _02080C68 ; =0x8F1BBCDC
|
||||
mov r7, #0
|
||||
_02080DD4:
|
||||
ldr r2, [r6]
|
||||
ldr lr, [r6, #8]
|
||||
ldr r5, [r6, #0x20]
|
||||
ldr r4, [r6, #0x34]
|
||||
eor r2, r2, lr
|
||||
eor r5, r5, r4
|
||||
eor r2, r2, r5
|
||||
mov r2, r2, ror #0x1f
|
||||
str r2, [r6, #0x40]
|
||||
str r2, [r6], #4
|
||||
add r2, r2, ip
|
||||
add r2, r2, r8
|
||||
add r2, r2, r3, ror #27
|
||||
orr r5, sb, sl
|
||||
and r5, r5, fp
|
||||
and r4, sb, sl
|
||||
orr r5, r5, r4
|
||||
add r2, r2, r5
|
||||
mov sb, sb, ror #2
|
||||
mov ip, fp
|
||||
mov fp, sl
|
||||
mov sl, sb
|
||||
mov sb, r3
|
||||
mov r3, r2
|
||||
add r7, r7, #1
|
||||
cmp r7, #8
|
||||
moveq r6, sp
|
||||
cmp r7, #0x14
|
||||
blt _02080DD4
|
||||
ldr r8, _02080C6C ; =0xCA62C1D6
|
||||
mov r7, #0
|
||||
_02080E50:
|
||||
ldr r2, [r6]
|
||||
ldr r5, [r6, #8]
|
||||
ldr r4, [r6, #0x20]
|
||||
ldr lr, [r6, #0x34]
|
||||
eor r2, r2, r5
|
||||
eor r4, r4, lr
|
||||
eor r2, r2, r4
|
||||
mov r2, r2, ror #0x1f
|
||||
str r2, [r6, #0x40]
|
||||
str r2, [r6], #4
|
||||
add r2, r2, ip
|
||||
add r2, r2, r8
|
||||
add r2, r2, r3, ror #27
|
||||
eor r4, sb, sl
|
||||
eor r4, r4, fp
|
||||
add r2, r2, r4
|
||||
mov sb, sb, ror #2
|
||||
mov ip, fp
|
||||
mov fp, sl
|
||||
mov sl, sb
|
||||
mov sb, r3
|
||||
mov r3, r2
|
||||
add r7, r7, #1
|
||||
cmp r7, #4
|
||||
moveq r6, sp
|
||||
cmp r7, #0x14
|
||||
blt _02080E50
|
||||
ldmia r0, {r2, r4, r6, r7, lr}
|
||||
add r3, r3, r2
|
||||
add sb, sb, r4
|
||||
add sl, sl, r6
|
||||
add fp, fp, r7
|
||||
add ip, ip, lr
|
||||
stmia r0, {r3, sb, sl, fp, ip}
|
||||
ldr lr, [sp, #0x80]
|
||||
subs lr, lr, #0x40
|
||||
str lr, [sp, #0x80]
|
||||
bgt _02080C80
|
||||
add sp, sp, #0x84
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, ip, pc}
|
||||
arm_func_end Dgt_Hash2Transform
|
||||
|
||||
450
lib/NitroSDK/asm/fs_overlay.s
Normal file
450
lib/NitroSDK/asm/fs_overlay.s
Normal file
@@ -0,0 +1,450 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start FSi_GetOverlayBinarySize
|
||||
FSi_GetOverlayBinarySize: ; 0x0207FB24
|
||||
ldr r1, [r0, #0x1c]
|
||||
mov r2, r1, lsr #0x18
|
||||
tst r2, #1
|
||||
movne r0, r1, lsl #8
|
||||
movne r0, r0, lsr #8
|
||||
ldreq r0, [r0, #8]
|
||||
bx lr
|
||||
arm_func_end FSi_GetOverlayBinarySize
|
||||
|
||||
arm_func_start FS_ClearOverlayImage
|
||||
FS_ClearOverlayImage: ; 0x0207FB40
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
ldr r1, [r0, #0xc]
|
||||
ldmib r0, {r4, r5}
|
||||
add r6, r5, r1
|
||||
mov r0, r4
|
||||
mov r1, r6
|
||||
bl IC_InvalidateRange
|
||||
mov r0, r4
|
||||
mov r1, r6
|
||||
bl DC_InvalidateRange
|
||||
add r0, r4, r5
|
||||
sub r2, r6, r5
|
||||
mov r1, #0
|
||||
bl MI_CpuFill8
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
arm_func_end FS_ClearOverlayImage
|
||||
|
||||
arm_func_start FS_GetOverlayFileID
|
||||
FS_GetOverlayFileID: ; 0x0207FB7C
|
||||
sub sp, sp, #8
|
||||
ldr r1, [r1, #0x18]
|
||||
ldr r2, _0207FBA0 ; =_022BB614
|
||||
str r1, [sp, #4]
|
||||
str r2, [r0]
|
||||
str r2, [sp]
|
||||
str r1, [r0, #4]
|
||||
add sp, sp, #8
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207FBA0: .word _022BB614
|
||||
arm_func_end FS_GetOverlayFileID
|
||||
|
||||
arm_func_start FSi_LoadOverlayInfoCore
|
||||
FSi_LoadOverlayInfoCore: ; 0x0207FBA4
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, sb, lr}
|
||||
sub sp, sp, #0x54
|
||||
movs sb, r1
|
||||
ldreq r7, [sp, #0x74]
|
||||
ldreq r6, [sp, #0x70]
|
||||
ldrne r7, [sp, #0x7c]
|
||||
ldrne r6, [sp, #0x78]
|
||||
cmp r7, r2, lsl #5
|
||||
mov r4, r0
|
||||
mov r8, r3
|
||||
mov r5, r2, lsl #5
|
||||
addls sp, sp, #0x54
|
||||
movls r0, #0
|
||||
ldmlsia sp!, {r4, r5, r6, r7, r8, sb, pc}
|
||||
add r0, sp, #0xc
|
||||
bl FileInit
|
||||
mvn ip, #0
|
||||
add r0, sp, #0xc
|
||||
mov r1, r8
|
||||
add r2, r6, r5
|
||||
add r3, r6, r7
|
||||
str ip, [sp]
|
||||
bl FS_OpenFileDirect
|
||||
cmp r0, #0
|
||||
addeq sp, sp, #0x54
|
||||
moveq r0, #0
|
||||
ldmeqia sp!, {r4, r5, r6, r7, r8, sb, pc}
|
||||
add r0, sp, #0xc
|
||||
mov r1, r4
|
||||
mov r2, #0x20
|
||||
bl FS_ReadFile
|
||||
cmp r0, #0x20
|
||||
add r0, sp, #0xc
|
||||
beq _0207FC3C
|
||||
bl FS_CloseFile
|
||||
add sp, sp, #0x54
|
||||
mov r0, #0
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
|
||||
_0207FC3C:
|
||||
bl FS_CloseFile
|
||||
add r0, sp, #4
|
||||
mov r1, r4
|
||||
str sb, [r4, #0x20]
|
||||
bl FS_GetOverlayFileID
|
||||
add r1, sp, #4
|
||||
add r0, sp, #0xc
|
||||
ldmia r1, {r1, r2}
|
||||
bl FS_OpenFileFast
|
||||
cmp r0, #0
|
||||
addeq sp, sp, #0x54
|
||||
moveq r0, #0
|
||||
ldmeqia sp!, {r4, r5, r6, r7, r8, sb, pc}
|
||||
ldr r1, [sp, #0x30]
|
||||
add r0, sp, #0xc
|
||||
str r1, [r4, #0x24]
|
||||
ldr r2, [sp, #0x34]
|
||||
ldr r1, [sp, #0x30]
|
||||
sub r1, r2, r1
|
||||
str r1, [r4, #0x28]
|
||||
bl FS_CloseFile
|
||||
mov r0, #1
|
||||
add sp, sp, #0x54
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
|
||||
arm_func_end FSi_LoadOverlayInfoCore
|
||||
|
||||
arm_func_start GetOverlayInfo
|
||||
GetOverlayInfo: ; 0x0207FC9C
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
sub sp, sp, #0x60
|
||||
movs r4, r1
|
||||
mov r5, r0
|
||||
ldreq r0, _0207FD88 ; =_022BB604
|
||||
ldrne r0, _0207FD8C ; =_022BB60C
|
||||
ldr ip, [r0]
|
||||
cmp ip, #0
|
||||
beq _0207FD4C
|
||||
ldr r0, [r0, #4]
|
||||
mov r3, r2, lsl #5
|
||||
cmp r0, r2, lsl #5
|
||||
addls sp, sp, #0x60
|
||||
movls r0, #0
|
||||
ldmlsia sp!, {r3, r4, r5, pc}
|
||||
mov r1, r5
|
||||
add r0, ip, r3
|
||||
mov r2, #0x20
|
||||
bl MI_CpuCopy8
|
||||
add r0, sp, #0x18
|
||||
str r4, [r5, #0x20]
|
||||
bl FileInit
|
||||
add r0, sp, #0x10
|
||||
mov r1, r5
|
||||
bl FS_GetOverlayFileID
|
||||
add r1, sp, #0x10
|
||||
add r0, sp, #0x18
|
||||
ldmia r1, {r1, r2}
|
||||
bl FS_OpenFileFast
|
||||
cmp r0, #0
|
||||
addeq sp, sp, #0x60
|
||||
moveq r0, #0
|
||||
ldmeqia sp!, {r3, r4, r5, pc}
|
||||
ldr r1, [sp, #0x3c]
|
||||
add r0, sp, #0x18
|
||||
str r1, [r5, #0x24]
|
||||
ldr r2, [sp, #0x40]
|
||||
ldr r1, [sp, #0x3c]
|
||||
sub r1, r2, r1
|
||||
str r1, [r5, #0x28]
|
||||
bl FS_CloseFile
|
||||
add sp, sp, #0x60
|
||||
mov r0, #1
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
_0207FD4C:
|
||||
ldr ip, _0207FD90 ; =0x027FFE50
|
||||
ldr r3, _0207FD94 ; =_022BB614
|
||||
ldr r1, [ip]
|
||||
mov r0, r5
|
||||
str r1, [sp]
|
||||
ldr r5, [ip, #4]
|
||||
mov r1, r4
|
||||
str r5, [sp, #4]
|
||||
ldr r4, [ip, #8]
|
||||
str r4, [sp, #8]
|
||||
ldr r4, [ip, #0xc]
|
||||
str r4, [sp, #0xc]
|
||||
bl FSi_LoadOverlayInfoCore
|
||||
add sp, sp, #0x60
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_0207FD88: .word _022BB604
|
||||
_0207FD8C: .word _022BB60C
|
||||
_0207FD90: .word 0x027FFE50
|
||||
_0207FD94: .word _022BB614
|
||||
arm_func_end GetOverlayInfo
|
||||
|
||||
arm_func_start LoadOverlayInternal
|
||||
LoadOverlayInternal: ; 0x0207FD98
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
sub sp, sp, #0x50
|
||||
mov r5, r0
|
||||
add r0, sp, #8
|
||||
bl FileInit
|
||||
add r0, sp, #0
|
||||
mov r1, r5
|
||||
bl FS_GetOverlayFileID
|
||||
add r1, sp, #0
|
||||
add r0, sp, #8
|
||||
ldmia r1, {r1, r2}
|
||||
bl FS_OpenFileFast
|
||||
cmp r0, #0
|
||||
addeq sp, sp, #0x50
|
||||
moveq r0, #0
|
||||
ldmeqia sp!, {r3, r4, r5, pc}
|
||||
mov r0, r5
|
||||
bl FSi_GetOverlayBinarySize
|
||||
mov r4, r0
|
||||
mov r0, r5
|
||||
bl FS_ClearOverlayImage
|
||||
ldr r1, [r5, #4]
|
||||
add r0, sp, #8
|
||||
mov r2, r4
|
||||
bl FS_ReadFile
|
||||
cmp r4, r0
|
||||
add r0, sp, #8
|
||||
beq _0207FE18
|
||||
bl FS_CloseFile
|
||||
add sp, sp, #0x50
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
_0207FE18:
|
||||
bl FS_CloseFile
|
||||
mov r0, #1
|
||||
add sp, sp, #0x50
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
arm_func_end LoadOverlayInternal
|
||||
|
||||
arm_func_start FSi_CompareDigest
|
||||
FSi_CompareDigest: ; 0x0207FE28
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
sub sp, sp, #0x58
|
||||
mov r4, r0
|
||||
mov r6, r1
|
||||
mov r5, r2
|
||||
add r0, sp, #0x44
|
||||
mov r1, #0
|
||||
mov r2, #0x14
|
||||
bl MI_CpuFill8
|
||||
ldr r2, _0207FEB8 ; =_020B2BB8
|
||||
add r1, sp, #4
|
||||
ldmia r2, {r0, r2}
|
||||
bl MI_CpuCopy8
|
||||
ldr r3, _0207FEB8 ; =_020B2BB8
|
||||
mov r1, r6
|
||||
ldr ip, [r3, #4]
|
||||
mov r2, r5
|
||||
add r0, sp, #0x44
|
||||
add r3, sp, #4
|
||||
str ip, [sp]
|
||||
bl Dgt_Hash2CalcHmac
|
||||
add r3, sp, #0x44
|
||||
mov r2, #0
|
||||
_0207FE84:
|
||||
ldr r1, [r3]
|
||||
ldr r0, [r4, r2]
|
||||
cmp r1, r0
|
||||
bne _0207FEA4
|
||||
add r2, r2, #4
|
||||
cmp r2, #0x14
|
||||
add r3, r3, #4
|
||||
blo _0207FE84
|
||||
_0207FEA4:
|
||||
cmp r2, #0x14
|
||||
moveq r0, #1
|
||||
movne r0, #0
|
||||
add sp, sp, #0x58
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_0207FEB8: .word _020B2BB8
|
||||
arm_func_end FSi_CompareDigest
|
||||
|
||||
arm_func_start InitOverlay
|
||||
InitOverlay: ; 0x0207FEBC
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
mov r5, r0
|
||||
bl FSi_GetOverlayBinarySize
|
||||
ldr r1, _0207FFA0 ; =0x027FFC40
|
||||
mov r4, r0
|
||||
ldrh r0, [r1]
|
||||
cmp r0, #2
|
||||
bne _0207FF4C
|
||||
ldr r1, [r5, #0x1c]
|
||||
mov r0, #0
|
||||
mov r1, r1, lsr #0x18
|
||||
tst r1, #2
|
||||
beq _0207FF2C
|
||||
ldr r1, _0207FFA4 ; =_020B3364
|
||||
ldr r3, _0207FFA8 ; =_020B3364
|
||||
ldr r2, _0207FFAC ; =0x66666667
|
||||
sub ip, r1, r3
|
||||
smull r1, lr, r2, ip
|
||||
mov r1, ip, lsr #0x1f
|
||||
ldr r2, [r5]
|
||||
add lr, r1, lr, asr #3
|
||||
cmp r2, lr
|
||||
bhs _0207FF2C
|
||||
mov r0, #0x14
|
||||
mla r0, r2, r0, r3
|
||||
ldr r1, [r5, #4]
|
||||
mov r2, r4
|
||||
bl FSi_CompareDigest
|
||||
_0207FF2C:
|
||||
cmp r0, #0
|
||||
bne _0207FF4C
|
||||
ldr r0, [r5, #4]
|
||||
mov r2, r4
|
||||
mov r1, #0
|
||||
bl MI_CpuFill8
|
||||
bl WaitForever2
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
_0207FF4C:
|
||||
ldr r0, [r5, #0x1c]
|
||||
mov r0, r0, lsr #0x18
|
||||
tst r0, #1
|
||||
beq _0207FF68
|
||||
ldr r0, [r5, #4]
|
||||
add r0, r0, r4
|
||||
bl MIi_UncompressBackward
|
||||
_0207FF68:
|
||||
ldmib r5, {r0, r1}
|
||||
bl DC_FlushRange
|
||||
ldr r4, [r5, #0x10]
|
||||
ldr r5, [r5, #0x14]
|
||||
cmp r4, r5
|
||||
ldmhsia sp!, {r3, r4, r5, pc}
|
||||
_0207FF80:
|
||||
ldr r0, [r4]
|
||||
cmp r0, #0
|
||||
beq _0207FF90
|
||||
blx r0
|
||||
_0207FF90:
|
||||
add r4, r4, #4
|
||||
cmp r4, r5
|
||||
blo _0207FF80
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_0207FFA0: .word 0x027FFC40
|
||||
_0207FFA4: .word _020B3364
|
||||
_0207FFA8: .word _020B3364
|
||||
_0207FFAC: .word 0x66666667
|
||||
arm_func_end InitOverlay
|
||||
|
||||
arm_func_start FS_EndOverlay
|
||||
FS_EndOverlay: ; 0x0207FFB0
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
|
||||
mov fp, r0
|
||||
_0207FFB8:
|
||||
ldr r1, [fp, #8]
|
||||
ldr r0, [fp, #0xc]
|
||||
mov r4, #0
|
||||
ldr r6, [fp, #4]
|
||||
add r0, r1, r0
|
||||
mov r5, r4
|
||||
add r7, r6, r0
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _0208009C ; =_022BCA74
|
||||
mov ip, r4
|
||||
ldr lr, [r1]
|
||||
mov r8, lr
|
||||
cmp lr, #0
|
||||
beq _02080064
|
||||
mov r2, r4
|
||||
_0207FFF4:
|
||||
ldr sl, [r8, #8]
|
||||
ldr sb, [r8]
|
||||
cmp sl, #0
|
||||
ldr r3, [r8, #4]
|
||||
bne _02080018
|
||||
cmp r3, r6
|
||||
blo _02080018
|
||||
cmp r3, r7
|
||||
blo _02080028
|
||||
_02080018:
|
||||
cmp sl, r6
|
||||
blo _02080054
|
||||
cmp sl, r7
|
||||
bhs _02080054
|
||||
_02080028:
|
||||
cmp r5, #0
|
||||
strne r8, [r5]
|
||||
moveq r4, r8
|
||||
cmp lr, r8
|
||||
streq sb, [r1]
|
||||
moveq lr, sb
|
||||
str r2, [r8]
|
||||
cmp ip, #0
|
||||
mov r5, r8
|
||||
strne sb, [ip]
|
||||
b _02080058
|
||||
_02080054:
|
||||
mov ip, r8
|
||||
_02080058:
|
||||
mov r8, sb
|
||||
cmp sb, #0
|
||||
bne _0207FFF4
|
||||
_02080064:
|
||||
bl SetIrqFlag
|
||||
cmp r4, #0
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
_02080070:
|
||||
ldr r1, [r4, #4]
|
||||
ldr r5, [r4]
|
||||
cmp r1, #0
|
||||
beq _02080088
|
||||
ldr r0, [r4, #8]
|
||||
blx r1
|
||||
_02080088:
|
||||
mov r4, r5
|
||||
cmp r5, #0
|
||||
bne _02080070
|
||||
b _0207FFB8
|
||||
_02080098:
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
.align 2, 0
|
||||
_0208009C: .word _022BCA74
|
||||
arm_func_end FS_EndOverlay
|
||||
|
||||
arm_func_start FS_UnloadOverlayImage
|
||||
FS_UnloadOverlayImage: ; 0x020800A0
|
||||
stmdb sp!, {r3, lr}
|
||||
bl FS_EndOverlay
|
||||
mov r0, #1
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end FS_UnloadOverlayImage
|
||||
|
||||
arm_func_start FS_UnloadOverlay
|
||||
FS_UnloadOverlay: ; 0x020800B0
|
||||
stmdb sp!, {lr}
|
||||
sub sp, sp, #0x2c
|
||||
mov r3, r0
|
||||
mov r2, r1
|
||||
add r0, sp, #0
|
||||
mov r1, r3
|
||||
bl GetOverlayInfo
|
||||
cmp r0, #0
|
||||
beq _020800E4
|
||||
add r0, sp, #0
|
||||
bl FS_UnloadOverlayImage
|
||||
cmp r0, #0
|
||||
bne _020800F0
|
||||
_020800E4:
|
||||
add sp, sp, #0x2c
|
||||
mov r0, #0
|
||||
ldmia sp!, {pc}
|
||||
_020800F0:
|
||||
mov r0, #1
|
||||
add sp, sp, #0x2c
|
||||
ldmia sp!, {pc}
|
||||
arm_func_end FS_UnloadOverlay
|
||||
|
||||
183
lib/NitroSDK/asm/fs_rom.s
Normal file
183
lib/NitroSDK/asm/fs_rom.s
Normal file
@@ -0,0 +1,183 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start FSi_OnRomReadDone
|
||||
FSi_OnRomReadDone: ; 0x0207F8EC
|
||||
stmdb sp!, {r4, lr}
|
||||
mov r4, r0
|
||||
bl Card_IsPulledOut
|
||||
cmp r0, #0
|
||||
movne r1, #5
|
||||
moveq r1, #0
|
||||
mov r0, r4
|
||||
bl FS_NotifyArchiveAsyncEnd
|
||||
ldmia sp!, {r4, pc}
|
||||
arm_func_end FSi_OnRomReadDone
|
||||
|
||||
arm_func_start FSi_ReadRomCallback
|
||||
FSi_ReadRomCallback: ; 0x0207F910
|
||||
stmdb sp!, {lr}
|
||||
sub sp, sp, #0xc
|
||||
ldr ip, _0207F950 ; =_0207F8EC
|
||||
mov lr, r1
|
||||
str ip, [sp]
|
||||
str r0, [sp, #4]
|
||||
mov r1, #1
|
||||
ldr r0, _0207F954 ; =_022BB5FC
|
||||
str r1, [sp, #8]
|
||||
mov r1, r2
|
||||
ldr r0, [r0, #4]
|
||||
mov r2, lr
|
||||
bl Cardi_ReadRom
|
||||
mov r0, #6
|
||||
add sp, sp, #0xc
|
||||
ldmia sp!, {pc}
|
||||
.align 2, 0
|
||||
_0207F950: .word FSi_OnRomReadDone
|
||||
_0207F954: .word _022BB5FC
|
||||
arm_func_end FSi_ReadRomCallback
|
||||
|
||||
arm_func_start FSi_WriteDummyCallback
|
||||
FSi_WriteDummyCallback: ; 0x0207F958
|
||||
mov r0, #1
|
||||
bx lr
|
||||
arm_func_end FSi_WriteDummyCallback
|
||||
|
||||
arm_func_start FSi_RomArchiveProc
|
||||
FSi_RomArchiveProc: ; 0x0207F960
|
||||
stmdb sp!, {r3, lr}
|
||||
cmp r1, #1
|
||||
beq _0207F9B8
|
||||
cmp r1, #9
|
||||
beq _0207F980
|
||||
cmp r1, #0xa
|
||||
beq _0207F99C
|
||||
b _0207F9C0
|
||||
_0207F980:
|
||||
ldr r0, _0207F9C8 ; =_022BB5FC
|
||||
ldr r0, [r0]
|
||||
mov r0, r0, lsl #0x10
|
||||
mov r0, r0, lsr #0x10
|
||||
bl Card_LockRom
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207F99C:
|
||||
ldr r0, _0207F9C8 ; =_022BB5FC
|
||||
ldr r0, [r0]
|
||||
mov r0, r0, lsl #0x10
|
||||
mov r0, r0, lsr #0x10
|
||||
bl Card_UnlockRom
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207F9B8:
|
||||
mov r0, #4
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207F9C0:
|
||||
mov r0, #8
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207F9C8: .word _022BB5FC
|
||||
arm_func_end FSi_RomArchiveProc
|
||||
|
||||
arm_func_start FSi_ReadDummyCallback
|
||||
FSi_ReadDummyCallback: ; 0x0207F9CC
|
||||
mov r0, #1
|
||||
bx lr
|
||||
arm_func_end FSi_ReadDummyCallback
|
||||
|
||||
arm_func_start FSi_EmptyArchiveProc
|
||||
FSi_EmptyArchiveProc: ; 0x0207F9D4
|
||||
mov r0, #4
|
||||
bx lr
|
||||
arm_func_end FSi_EmptyArchiveProc
|
||||
|
||||
arm_func_start FSi_InitRom
|
||||
FSi_InitRom: ; 0x0207F9DC
|
||||
stmdb sp!, {r4, lr}
|
||||
sub sp, sp, #0x10
|
||||
ldr r1, _0207FAFC ; =_022BB5FC
|
||||
str r0, [r1, #4]
|
||||
bl OS_GetLockID
|
||||
ldr r1, _0207FAFC ; =_022BB5FC
|
||||
mov r2, #0
|
||||
str r0, [r1]
|
||||
str r2, [r1, #8]
|
||||
str r2, [r1, #0xc]
|
||||
str r2, [r1, #0x10]
|
||||
str r2, [r1, #0x14]
|
||||
bl CARD_Init
|
||||
ldr r0, _0207FB00 ; =_022BB614
|
||||
bl FS_InitArchive
|
||||
ldr r0, _0207FB00 ; =_022BB614
|
||||
ldr r1, _0207FB04 ; =_020B2BB4
|
||||
mov r2, #3
|
||||
bl FS_RegisterArchiveName
|
||||
ldr r4, _0207FB08 ; =0x027FFC40
|
||||
ldrh r0, [r4]
|
||||
cmp r0, #2
|
||||
bne _0207FA94
|
||||
ldr r3, _0207FAFC ; =_022BB5FC
|
||||
mvn r2, #0
|
||||
str r2, [r3, #8]
|
||||
mov ip, #0
|
||||
str ip, [r3, #0xc]
|
||||
str r2, [r3, #0x10]
|
||||
ldr r0, _0207FB00 ; =_022BB614
|
||||
ldr r1, _0207FB0C ; =_0207F9D4
|
||||
str ip, [r3, #0x14]
|
||||
bl FS_SetArchiveProc
|
||||
mov r1, #0
|
||||
str r1, [sp]
|
||||
ldr r0, _0207FB10 ; =FSi_ReadDummyCallback
|
||||
str r1, [sp, #4]
|
||||
str r0, [sp, #8]
|
||||
ldr ip, _0207FB14 ; =_0207F958
|
||||
ldr r0, _0207FB00 ; =_022BB614
|
||||
mov r2, r1
|
||||
mov r3, r1
|
||||
str ip, [sp, #0xc]
|
||||
bl FS_LoadArchive
|
||||
add sp, sp, #0x10
|
||||
ldmia sp!, {r4, pc}
|
||||
_0207FA94:
|
||||
ldr r0, _0207FB00 ; =_022BB614
|
||||
ldr r1, _0207FB18 ; =FSi_RomArchiveProc
|
||||
ldr r2, _0207FB1C ; =0x00000602
|
||||
bl FS_SetArchiveProc
|
||||
ldr r1, [r4, #0x200]
|
||||
mvn r0, #0
|
||||
cmp r1, r0
|
||||
cmpne r1, #0
|
||||
ldrne r2, [r4, #0x208]
|
||||
cmpne r2, r0
|
||||
cmpne r2, #0
|
||||
addeq sp, sp, #0x10
|
||||
ldmeqia sp!, {r4, pc}
|
||||
str r1, [sp]
|
||||
ldr r0, [r4, #0x204]
|
||||
ldr r1, _0207FB20 ; =FSi_ReadRomCallback
|
||||
str r0, [sp, #4]
|
||||
ldr r0, _0207FB14 ; =_0207F958
|
||||
str r1, [sp, #8]
|
||||
str r0, [sp, #0xc]
|
||||
ldr r3, [r4, #0x20c]
|
||||
ldr r0, _0207FB00 ; =_022BB614
|
||||
mov r1, #0
|
||||
bl FS_LoadArchive
|
||||
add sp, sp, #0x10
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207FAFC: .word _022BB5FC
|
||||
_0207FB00: .word _022BB614
|
||||
_0207FB04: .word _020B2BB4
|
||||
_0207FB08: .word 0x027FFC40
|
||||
_0207FB0C: .word FSi_EmptyArchiveProc
|
||||
_0207FB10: .word FSi_ReadDummyCallback
|
||||
_0207FB14: .word FSi_WriteDummyCallback
|
||||
_0207FB18: .word FSi_RomArchiveProc
|
||||
_0207FB1C: .word 0x00000602
|
||||
_0207FB20: .word FSi_ReadRomCallback
|
||||
arm_func_end FSi_InitRom
|
||||
|
||||
59
lib/NitroSDK/asm/g3_util.s
Normal file
59
lib/NitroSDK/asm/g3_util.s
Normal file
@@ -0,0 +1,59 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/g3x.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start G3i_OrthoW_
|
||||
G3i_OrthoW_: ; 0x02077C48
|
||||
stmdb sp!, {r4, lr}
|
||||
sub sp, sp, #0x50
|
||||
ldr ip, [sp, #0x58]
|
||||
ldr lr, [sp, #0x5c]
|
||||
str ip, [sp]
|
||||
ldr r4, [sp, #0x68]
|
||||
ldr ip, [sp, #0x60]
|
||||
str lr, [sp, #4]
|
||||
cmp r4, #0
|
||||
addeq r4, sp, #0x10
|
||||
str ip, [sp, #8]
|
||||
str r4, [sp, #0xc]
|
||||
bl MTX_OrthoW
|
||||
ldr r0, [sp, #0x64]
|
||||
cmp r0, #0
|
||||
addeq sp, sp, #0x50
|
||||
ldmeqia sp!, {r4, pc}
|
||||
ldr r1, _02077CA8 ; =0x04000440
|
||||
mov r2, #0
|
||||
mov r0, r4
|
||||
str r2, [r1]
|
||||
bl G3_LoadMtx44
|
||||
add sp, sp, #0x50
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_02077CA8: .word 0x04000440
|
||||
arm_func_end G3i_OrthoW_
|
||||
|
||||
arm_func_start G3i_LookAt_
|
||||
G3i_LookAt_: ; 0x02077CAC
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
sub sp, sp, #0x30
|
||||
ldr r4, [sp, #0x40]
|
||||
mov r5, r3
|
||||
cmp r4, #0
|
||||
addeq r4, sp, #0
|
||||
mov r3, r4
|
||||
bl MTX_LookAt
|
||||
cmp r5, #0
|
||||
addeq sp, sp, #0x30
|
||||
ldmeqia sp!, {r3, r4, r5, pc}
|
||||
ldr r1, _02077CF4 ; =0x04000440
|
||||
mov r2, #2
|
||||
mov r0, r4
|
||||
str r2, [r1]
|
||||
bl G3_LoadMtx43
|
||||
add sp, sp, #0x30
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_02077CF4: .word 0x04000440
|
||||
arm_func_end G3i_LookAt_
|
||||
|
||||
@@ -351,56 +351,3 @@ GXi_NopClearFifo128_: ; 0x02077BB4
|
||||
bx lr
|
||||
arm_func_end GXi_NopClearFifo128_
|
||||
|
||||
arm_func_start G3i_OrthoW_
|
||||
G3i_OrthoW_: ; 0x02077C48
|
||||
stmdb sp!, {r4, lr}
|
||||
sub sp, sp, #0x50
|
||||
ldr ip, [sp, #0x58]
|
||||
ldr lr, [sp, #0x5c]
|
||||
str ip, [sp]
|
||||
ldr r4, [sp, #0x68]
|
||||
ldr ip, [sp, #0x60]
|
||||
str lr, [sp, #4]
|
||||
cmp r4, #0
|
||||
addeq r4, sp, #0x10
|
||||
str ip, [sp, #8]
|
||||
str r4, [sp, #0xc]
|
||||
bl MTX_OrthoW
|
||||
ldr r0, [sp, #0x64]
|
||||
cmp r0, #0
|
||||
addeq sp, sp, #0x50
|
||||
ldmeqia sp!, {r4, pc}
|
||||
ldr r1, _02077CA8 ; =0x04000440
|
||||
mov r2, #0
|
||||
mov r0, r4
|
||||
str r2, [r1]
|
||||
bl G3_LoadMtx44
|
||||
add sp, sp, #0x50
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_02077CA8: .word 0x04000440
|
||||
arm_func_end G3i_OrthoW_
|
||||
|
||||
arm_func_start G3i_LookAt_
|
||||
G3i_LookAt_: ; 0x02077CAC
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
sub sp, sp, #0x30
|
||||
ldr r4, [sp, #0x40]
|
||||
mov r5, r3
|
||||
cmp r4, #0
|
||||
addeq r4, sp, #0
|
||||
mov r3, r4
|
||||
bl MTX_LookAt
|
||||
cmp r5, #0
|
||||
addeq sp, sp, #0x30
|
||||
ldmeqia sp!, {r3, r4, r5, pc}
|
||||
ldr r1, _02077CF4 ; =0x04000440
|
||||
mov r2, #2
|
||||
mov r0, r4
|
||||
str r2, [r1]
|
||||
bl G3_LoadMtx43
|
||||
add sp, sp, #0x30
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_02077CF4: .word 0x04000440
|
||||
arm_func_end G3i_LookAt_
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
1326
lib/NitroSDK/asm/gx_vramcnt.s
Normal file
1326
lib/NitroSDK/asm/gx_vramcnt.s
Normal file
File diff suppressed because it is too large
Load Diff
35
lib/NitroSDK/asm/gxstate.s
Normal file
35
lib/NitroSDK/asm/gxstate.s
Normal file
@@ -0,0 +1,35 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/gx.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start GX_InitGXState
|
||||
GX_InitGXState: ; 0x0207634C
|
||||
ldr r0, _020763A4 ; =gGXState
|
||||
mov r2, #0
|
||||
strh r2, [r0]
|
||||
strh r2, [r0, #2]
|
||||
strh r2, [r0, #4]
|
||||
strh r2, [r0, #6]
|
||||
strh r2, [r0, #8]
|
||||
strh r2, [r0, #0xa]
|
||||
strh r2, [r0, #0xc]
|
||||
strh r2, [r0, #0xe]
|
||||
strh r2, [r0, #0x10]
|
||||
strh r2, [r0, #0x12]
|
||||
strh r2, [r0, #0x14]
|
||||
strh r2, [r0, #0x16]
|
||||
ldr r1, _020763A8 ; =0x04000240
|
||||
strh r2, [r0, #0x18]
|
||||
str r2, [r1]
|
||||
strb r2, [r1, #4]
|
||||
strb r2, [r1, #5]
|
||||
strb r2, [r1, #6]
|
||||
strh r2, [r1, #8]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_020763A4: .word gGXState
|
||||
_020763A8: .word 0x04000240
|
||||
arm_func_end GX_InitGXState
|
||||
|
||||
|
||||
@@ -23,17 +23,17 @@
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public OSi_IsThreadInitialized
|
||||
.public OSi_ThreadInfo
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public OSi_Initialized
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public OSi_DebuggerHandler
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_ExContext
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
|
||||
@@ -22,17 +22,17 @@
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public OSi_IsThreadInitialized
|
||||
.public OSi_ThreadInfo
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public OSi_Initialized
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public OSi_DebuggerHandler
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_ExContext
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
|
||||
@@ -22,17 +22,17 @@
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public OSi_IsThreadInitialized
|
||||
.public OSi_ThreadInfo
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public OSi_Initialized
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public OSi_DebuggerHandler
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_ExContext
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
@@ -53,6 +53,7 @@
|
||||
.public GetGameMode
|
||||
.public GetProcessorMode
|
||||
.public gGXState
|
||||
.public GX_InitGXState
|
||||
.public GXi_DmaId
|
||||
.public GXi_VRamLockId
|
||||
.public MI_DmaCopy16
|
||||
|
||||
@@ -23,17 +23,17 @@
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public OSi_IsThreadInitialized
|
||||
.public OSi_ThreadInfo
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public OSi_Initialized
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public OSi_DebuggerHandler
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_ExContext
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
|
||||
@@ -22,17 +22,17 @@
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public OSi_IsThreadInitialized
|
||||
.public OSi_ThreadInfo
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public OSi_Initialized
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public OSi_DebuggerHandler
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_ExContext
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
|
||||
140
lib/NitroSDK/asm/include/main_0207F894.inc
Normal file
140
lib/NitroSDK/asm/include/main_0207F894.inc
Normal file
@@ -0,0 +1,140 @@
|
||||
#pragma once
|
||||
.public _02000BC4
|
||||
.public _020AEC5C
|
||||
.public _020B2BB4
|
||||
.public _020B2BB8
|
||||
.public _020B2BC0
|
||||
.public _020B2BC4
|
||||
.public _020B2C84
|
||||
.public _020B2D88
|
||||
.public _020B2E9C
|
||||
.public _020B2ED0
|
||||
.public _020B2ED4
|
||||
.public _020B2FBC
|
||||
.public _020B3364
|
||||
.public OSi_ThreadInfo
|
||||
.public _022BB5EC
|
||||
.public _022BB5FC
|
||||
.public _022BB604
|
||||
.public _022BB60C
|
||||
.public _022BB614
|
||||
.public _022BB670
|
||||
.public _022BB68C
|
||||
.public _022BB6AC
|
||||
.public _022BB6B8
|
||||
.public _022BB6C4
|
||||
.public _022BB6C8
|
||||
.public _022BB6D8
|
||||
.public _022BB6F0
|
||||
.public _022BB6F4
|
||||
.public _022BB718
|
||||
.public _022BB724
|
||||
.public _022BB760
|
||||
.public _022BB780
|
||||
.public _022BB7E0
|
||||
.public _022BBE00
|
||||
.public _022BBE20
|
||||
.public _022BC040
|
||||
.public _022BC048
|
||||
.public _022BC04C
|
||||
.public _022BC060
|
||||
.public _022BC080
|
||||
.public _022BC084
|
||||
.public _022BC140
|
||||
.public _022BC228
|
||||
.public _022BC22C
|
||||
.public _022BC650
|
||||
.public _022BCA74
|
||||
.public _f2d
|
||||
.public _ll_udiv
|
||||
.public Card_CheckEnabled
|
||||
.public Card_IsPulledOut
|
||||
.public Cardi_CheckPulledOutCore
|
||||
.public Cardi_ReadRom
|
||||
.public Cardi_Request
|
||||
.public Cardi_SetTask
|
||||
.public Cardi_WaitAsync
|
||||
.public CARDi_InitCommon
|
||||
.public CARDi_TaskThread
|
||||
.public CARDi_OnFifoRecv
|
||||
.public CARD_Init
|
||||
.public CARD_InitPulledOutCallback
|
||||
.public CopyAndInterleave
|
||||
.public Ctrdg_Enable
|
||||
.public Ctrdg_IsExisting
|
||||
.public Ctrdgi_Enable
|
||||
.public Ctrdgi_InitTaskThread
|
||||
.public Ctrdgi_IsExisting
|
||||
.public CTRDGi_InitCommon
|
||||
.public CTRDGi_LockByProcessor
|
||||
.public CTRDGi_UnlockByProcessor
|
||||
.public CTRDGi_RestoreAccessCycle
|
||||
.public CTRDGi_ChangeLatestAccessCycle
|
||||
.public CTRDGi_SendtoPxi
|
||||
.public Dgt_Hash2Init
|
||||
.public Dgt_Hash2Update
|
||||
.public Dgt_Hash2GetHash
|
||||
.public DC_FlushAll
|
||||
.public DC_FlushRange
|
||||
.public DC_InvalidateRange
|
||||
.public DC_StoreRange
|
||||
.public DC_WaitWriteBufferEmpty
|
||||
.public EnableIrqFlag
|
||||
.public fflush
|
||||
.public FileInit
|
||||
.public FS_CloseFile
|
||||
.public FS_InitArchive
|
||||
.public FS_LoadArchive
|
||||
.public FS_NotifyArchiveAsyncEnd
|
||||
.public FS_OpenFileDirect
|
||||
.public FS_OpenFileFast
|
||||
.public FS_ReadFile
|
||||
.public FS_RegisterArchiveName
|
||||
.public FS_SetArchiveProc
|
||||
.public FSi_FindPath
|
||||
.public GetIrqFlag
|
||||
.public IC_InvalidateAll
|
||||
.public IC_InvalidateRange
|
||||
.public MI_CpuCopy8
|
||||
.public MI_CpuFill8
|
||||
.public MI_DmaCopy16
|
||||
.public MI_StopDma
|
||||
.public MIi_UncompressBackward
|
||||
.public MTi_CardDmaCopy32
|
||||
.public MTi_CpuClear32
|
||||
.public MTi_CpuClearFast
|
||||
.public MTi_CpuCopy32
|
||||
.public OS_DisableIrqMask
|
||||
.public OS_EnableIrqMask
|
||||
.public OS_GetDTCMAddress
|
||||
.public OS_GetLockID
|
||||
.public OS_InitMutex
|
||||
.public OS_IsTickAvailable
|
||||
.public OS_LockCard
|
||||
.public OS_ReadOwnerOfLockWord
|
||||
.public OS_ResetRequestIrqMask
|
||||
.public OS_SetDPermissionsForProtectionRegion
|
||||
.public OS_SetIrqFunction
|
||||
.public OS_SetIrqMask
|
||||
.public OS_SetThreadPriority
|
||||
.public OS_SleepThread
|
||||
.public OS_SpinWait
|
||||
.public OS_TryLockCartridge
|
||||
.public OS_UnlockCard
|
||||
.public OS_UnlockCartridgeVeneer
|
||||
.public OS_WakeupThread
|
||||
.public OS_WakeupThreadDirect
|
||||
.public OSi_ReferSymbol
|
||||
.public PM_ForceToPowerOff
|
||||
.public PXI_Init
|
||||
.public PXI_IsCallbackReady
|
||||
.public PXI_SendWordByFifo
|
||||
.public PXI_SetFifoRecvCallback
|
||||
.public PXIi_HandlerRecvFifoNotEmpty
|
||||
.public SetIrqFlag
|
||||
.public OS_CreateThread
|
||||
.public SVC_CpuSet
|
||||
.public SVC_WaitByLoop
|
||||
.public OS_ExitThread
|
||||
.public WaitForever2
|
||||
.public WaitForInterrupt
|
||||
@@ -2,18 +2,18 @@
|
||||
.public _020AEBF8
|
||||
.public _020B2BB0
|
||||
.public _022B99EC
|
||||
.public _022B99F0
|
||||
.public _022B9A20
|
||||
.public sSndMutex
|
||||
.public sReserveList
|
||||
.public _022B9A44
|
||||
.public _022B9A80
|
||||
.public _022B9D00
|
||||
.public _022BAA20
|
||||
.public _022BB4E8
|
||||
.public _022BB500
|
||||
.public _022BB560
|
||||
.public SNDi_SharedWork
|
||||
.public _022BB564
|
||||
.public _022BB568
|
||||
.public ARM9_UNKNOWN_TABLE__NA_20AE924
|
||||
.public VolumeTable
|
||||
.public DC_FlushRange
|
||||
.public DC_InvalidateRange
|
||||
.public DC_StoreRange
|
||||
|
||||
@@ -22,17 +22,17 @@
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public OSi_IsThreadInitialized
|
||||
.public OSi_ThreadInfo
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public OSi_Initialized
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public OSi_DebuggerHandler
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_ExContext
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
|
||||
@@ -2,18 +2,18 @@
|
||||
.public _020AEBF8
|
||||
.public _020B2BB0
|
||||
.public _022B99EC
|
||||
.public _022B99F0
|
||||
.public _022B9A20
|
||||
.public sSndMutex
|
||||
.public sReserveList
|
||||
.public _022B9A44
|
||||
.public _022B9A80
|
||||
.public _022B9D00
|
||||
.public _022BAA20
|
||||
.public _022BB4E8
|
||||
.public _022BB500
|
||||
.public _022BB560
|
||||
.public SNDi_SharedWork
|
||||
.public _022BB564
|
||||
.public _022BB568
|
||||
.public ARM9_UNKNOWN_TABLE__NA_20AE924
|
||||
.public VolumeTable
|
||||
.public DC_FlushRange
|
||||
.public DC_InvalidateRange
|
||||
.public DC_StoreRange
|
||||
|
||||
@@ -23,17 +23,17 @@
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public OSi_IsThreadInitialized
|
||||
.public OSi_ThreadInfo
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public OSi_Initialized
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public OSi_DebuggerHandler
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_ExContext
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
|
||||
@@ -23,17 +23,17 @@
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public OSi_IsThreadInitialized
|
||||
.public OSi_ThreadInfo
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public OSi_Initialized
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public OSi_DebuggerHandler
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_ExContext
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
|
||||
@@ -23,17 +23,17 @@
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public OSi_IsThreadInitialized
|
||||
.public OSi_ThreadInfo
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public OSi_Initialized
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public OSi_DebuggerHandler
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_ExContext
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
#pragma once
|
||||
.public _022B99A8
|
||||
.public _022B99D0
|
||||
.public OSi_TickCounter
|
||||
.public OSi_IsInitReset
|
||||
.public Card_LockRom
|
||||
.public EnableIrqFlag
|
||||
.public MI_CpuCopy8
|
||||
|
||||
@@ -22,17 +22,17 @@
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public OSi_IsThreadInitialized
|
||||
.public OSi_ThreadInfo
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public OSi_Initialized
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public OSi_DebuggerHandler
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_ExContext
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
|
||||
@@ -23,17 +23,17 @@
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public OSi_IsThreadInitialized
|
||||
.public OSi_ThreadInfo
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public OSi_Initialized
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public OSi_DebuggerHandler
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_ExContext
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
@@ -100,19 +100,26 @@
|
||||
.public OS_CreateAlarm
|
||||
.public OS_DisableIrqMask
|
||||
.public OS_EnableIrqMask
|
||||
.public OS_InitContext
|
||||
.public OS_InitIrqTable
|
||||
.public OS_InitLock
|
||||
.public OS_InitReset
|
||||
.public OS_IRQTable
|
||||
.public OS_LoadContext
|
||||
.public OS_ResetRequestIrqMask
|
||||
.public OS_SaveContext
|
||||
.public OS_SetAlarm
|
||||
.public OS_SetIrqFunction
|
||||
.public OS_SetIrqStackChecker
|
||||
.public OS_SleepThread
|
||||
.public OS_WakeupThread
|
||||
.public OS_VsNPrintfEx
|
||||
.public OSi_DisplayExContext_Helper
|
||||
.public OSi_EnterTimerCallback
|
||||
.public OSi_InitVramExclusive
|
||||
.public OSi_RemoveMutexLinkFromQueue
|
||||
.public OSi_TimerReserved
|
||||
.public OSi_UnlockAllMutex
|
||||
.public OSi_UseAlarm
|
||||
.public OSi_UseTick
|
||||
.public PM_Init
|
||||
|
||||
@@ -23,17 +23,17 @@
|
||||
.public _022B9618
|
||||
.public _022B961C
|
||||
.public _022B9644
|
||||
.public _022B9654
|
||||
.public _022B966C
|
||||
.public OSi_IsThreadInitialized
|
||||
.public OSi_ThreadInfo
|
||||
.public _022B9670
|
||||
.public _022B967C
|
||||
.public _022B973C
|
||||
.public _022B98C4
|
||||
.public OSi_Initialized
|
||||
.public _022B98CC
|
||||
.public _022B98F0
|
||||
.public OSi_DebuggerHandler
|
||||
.public _022B98F4
|
||||
.public _022B98F8
|
||||
.public _022B991C
|
||||
.public OSi_ExContext
|
||||
.public _022B99BC
|
||||
.public _ll_sdiv
|
||||
.public _ll_udiv
|
||||
|
||||
222
lib/NitroSDK/asm/math_crc.s
Normal file
222
lib/NitroSDK/asm/math_crc.s
Normal file
@@ -0,0 +1,222 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start Mathi_Crc8InitTable
|
||||
Mathi_Crc8InitTable: ; 0x02084FB8
|
||||
stmdb sp!, {r3, lr}
|
||||
mov ip, #0
|
||||
mov r2, ip
|
||||
_02084FC4:
|
||||
mov r3, ip
|
||||
mov lr, r2
|
||||
_02084FCC:
|
||||
tst r3, #0x80
|
||||
eorne r3, r1, r3, lsl #1
|
||||
add lr, lr, #1
|
||||
moveq r3, r3, lsl #1
|
||||
cmp lr, #8
|
||||
blo _02084FCC
|
||||
strb r3, [r0, ip]
|
||||
add ip, ip, #1
|
||||
cmp ip, #0x100
|
||||
blo _02084FC4
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end Mathi_Crc8InitTable
|
||||
|
||||
arm_func_start Mathi_Crc8Update
|
||||
Mathi_Crc8Update: ; 0x02084FF8
|
||||
stmdb sp!, {r4, lr}
|
||||
cmp r3, #0
|
||||
ldrb lr, [r1]
|
||||
mov r4, #0
|
||||
bls _02085028
|
||||
_0208500C:
|
||||
ldrb ip, [r2], #1
|
||||
add r4, r4, #1
|
||||
cmp r4, r3
|
||||
eor ip, lr, ip
|
||||
and ip, ip, #0xff
|
||||
ldrb lr, [r0, ip]
|
||||
blo _0208500C
|
||||
_02085028:
|
||||
strb lr, [r1]
|
||||
ldmia sp!, {r4, pc}
|
||||
arm_func_end Mathi_Crc8Update
|
||||
|
||||
arm_func_start Mathi_Crc16InitTable
|
||||
Mathi_Crc16InitTable: ; 0x02085030
|
||||
stmdb sp!, {r3, lr}
|
||||
mov lr, #0
|
||||
mov r3, lr
|
||||
_0208503C:
|
||||
mov ip, lr
|
||||
mov r2, r3
|
||||
_02085044:
|
||||
tst ip, #1
|
||||
eorne ip, r1, ip, lsr #1
|
||||
add r2, r2, #1
|
||||
moveq ip, ip, lsr #1
|
||||
cmp r2, #8
|
||||
blo _02085044
|
||||
mov r2, lr, lsl #1
|
||||
add lr, lr, #1
|
||||
strh ip, [r0, r2]
|
||||
cmp lr, #0x100
|
||||
blo _0208503C
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end Mathi_Crc16InitTable
|
||||
|
||||
arm_func_start Mathi_Crc16Update
|
||||
Mathi_Crc16Update: ; 0x02085074
|
||||
stmdb sp!, {r4, lr}
|
||||
cmp r3, #0
|
||||
ldrh lr, [r1]
|
||||
mov r4, #0
|
||||
bls _020850AC
|
||||
_02085088:
|
||||
ldrb ip, [r2], #1
|
||||
add r4, r4, #1
|
||||
cmp r4, r3
|
||||
eor ip, lr, ip
|
||||
mov ip, ip, lsl #0x18
|
||||
mov ip, ip, lsr #0x17
|
||||
ldrh ip, [r0, ip]
|
||||
eor lr, ip, lr, lsr #8
|
||||
blo _02085088
|
||||
_020850AC:
|
||||
strh lr, [r1]
|
||||
ldmia sp!, {r4, pc}
|
||||
arm_func_end Mathi_Crc16Update
|
||||
|
||||
arm_func_start Mathi_Crc32InitTable
|
||||
Mathi_Crc32InitTable: ; 0x020850B4
|
||||
stmdb sp!, {r3, lr}
|
||||
mov ip, #0
|
||||
mov r2, ip
|
||||
_020850C0:
|
||||
mov r3, ip
|
||||
mov lr, r2
|
||||
_020850C8:
|
||||
tst r3, #1
|
||||
eorne r3, r1, r3, lsr #1
|
||||
add lr, lr, #1
|
||||
moveq r3, r3, lsr #1
|
||||
cmp lr, #8
|
||||
blo _020850C8
|
||||
str r3, [r0, ip, lsl #2]
|
||||
add ip, ip, #1
|
||||
cmp ip, #0x100
|
||||
blo _020850C0
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end Mathi_Crc32InitTable
|
||||
|
||||
arm_func_start Mathi_Crc32Update
|
||||
Mathi_Crc32Update: ; 0x020850F4
|
||||
stmdb sp!, {r4, lr}
|
||||
cmp r3, #0
|
||||
ldr lr, [r1]
|
||||
mov r4, #0
|
||||
bls _02085128
|
||||
_02085108:
|
||||
ldrb ip, [r2], #1
|
||||
add r4, r4, #1
|
||||
cmp r4, r3
|
||||
eor ip, lr, ip
|
||||
and ip, ip, #0xff
|
||||
ldr ip, [r0, ip, lsl #2]
|
||||
eor lr, ip, lr, lsr #8
|
||||
blo _02085108
|
||||
_02085128:
|
||||
str lr, [r1]
|
||||
ldmia sp!, {r4, pc}
|
||||
arm_func_end Mathi_Crc32Update
|
||||
|
||||
arm_func_start Math_CalcCrc8
|
||||
Math_CalcCrc8: ; 0x02085130
|
||||
stmdb sp!, {r3, lr}
|
||||
mov lr, r1
|
||||
mov ip, #0
|
||||
mov r3, r2
|
||||
add r1, sp, #0
|
||||
mov r2, lr
|
||||
strb ip, [sp]
|
||||
bl Mathi_Crc8Update
|
||||
ldrb r0, [sp]
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end Math_CalcCrc8
|
||||
|
||||
arm_func_start Math_CalcCrc16
|
||||
Math_CalcCrc16: ; 0x02085158
|
||||
stmdb sp!, {r3, lr}
|
||||
mov lr, r1
|
||||
mov ip, #0
|
||||
mov r3, r2
|
||||
add r1, sp, #0
|
||||
mov r2, lr
|
||||
strh ip, [sp]
|
||||
bl Mathi_Crc16Update
|
||||
ldrh r0, [sp]
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end Math_CalcCrc16
|
||||
|
||||
arm_func_start Math_CalcCrc32
|
||||
Math_CalcCrc32: ; 0x02085180
|
||||
stmdb sp!, {r3, lr}
|
||||
mov lr, r1
|
||||
mvn ip, #0
|
||||
mov r3, r2
|
||||
add r1, sp, #0
|
||||
mov r2, lr
|
||||
str ip, [sp]
|
||||
bl Mathi_Crc32Update
|
||||
ldr r0, [sp]
|
||||
mvn r0, r0
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end Math_CalcCrc32
|
||||
|
||||
arm_func_start sub_020851AC
|
||||
sub_020851AC: ; 0x020851AC
|
||||
stmdb sp!, {r4, lr}
|
||||
sub sp, sp, #8
|
||||
movs r4, r0
|
||||
addeq sp, sp, #8
|
||||
moveq r0, #0
|
||||
ldmeqia sp!, {r4, pc}
|
||||
ldrh r0, [r4, #0x3c]
|
||||
cmp r0, #0
|
||||
addeq sp, sp, #8
|
||||
moveq r0, #0
|
||||
ldmeqia sp!, {r4, pc}
|
||||
add r1, sp, #0
|
||||
add r0, r4, #0x50
|
||||
mov r2, #8
|
||||
bl MI_CpuCopy8
|
||||
add r0, sp, #0
|
||||
mov r1, #8
|
||||
bl DC_StoreRange
|
||||
ldr r0, [r4, #0x44]
|
||||
cmp r0, #0
|
||||
bne _02085230
|
||||
ldrh r1, [sp]
|
||||
ldr r0, _0208523C ; =0x00002348
|
||||
cmp r1, r0
|
||||
ldrneh r1, [sp]
|
||||
ldrne r0, _02085240 ; =0x0000BD8A
|
||||
cmpne r1, r0
|
||||
bne _02085230
|
||||
ldrh r0, [sp, #6]
|
||||
cmp r0, #4
|
||||
addeq sp, sp, #8
|
||||
moveq r0, #1
|
||||
ldmeqia sp!, {r4, pc}
|
||||
_02085230:
|
||||
mov r0, #0
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0208523C: .word 0x00002348
|
||||
_02085240: .word 0x0000BD8A
|
||||
arm_func_end sub_020851AC
|
||||
|
||||
25
lib/NitroSDK/asm/math_dgt.s
Normal file
25
lib/NitroSDK/asm/math_dgt.s
Normal file
@@ -0,0 +1,25 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start Math_CalcSha1
|
||||
Math_CalcSha1: ; 0x02084F78
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
sub sp, sp, #0x68
|
||||
mov r6, r0
|
||||
add r0, sp, #0
|
||||
mov r5, r1
|
||||
mov r4, r2
|
||||
bl Dgt_Hash2Init
|
||||
add r0, sp, #0
|
||||
mov r1, r5
|
||||
mov r2, r4
|
||||
bl Dgt_Hash2Update
|
||||
add r0, sp, #0
|
||||
mov r1, r6
|
||||
bl Dgt_Hash2GetHash
|
||||
add sp, sp, #0x68
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
arm_func_end Math_CalcSha1
|
||||
|
||||
28
lib/NitroSDK/asm/math_math.s
Normal file
28
lib/NitroSDK/asm/math_math.s
Normal file
@@ -0,0 +1,28 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start Math_CountPopulation
|
||||
Math_CountPopulation: ; 0x02084F34
|
||||
ldr r1, _02084F6C ; =0x55555555
|
||||
ldr r2, _02084F70 ; =0x33333333
|
||||
and r1, r1, r0, lsr #1
|
||||
sub r0, r0, r1
|
||||
and r1, r0, r2
|
||||
and r0, r2, r0, lsr #2
|
||||
add r1, r1, r0
|
||||
ldr r0, _02084F74 ; =0x0F0F0F0F
|
||||
add r1, r1, r1, lsr #4
|
||||
and r0, r1, r0
|
||||
add r0, r0, r0, lsr #8
|
||||
add r0, r0, r0, lsr #16
|
||||
and r0, r0, #0xff
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02084F6C: .word 0x55555555
|
||||
_02084F70: .word 0x33333333
|
||||
_02084F74: .word 0x0F0F0F0F
|
||||
arm_func_end Math_CountPopulation
|
||||
|
||||
|
||||
382
lib/NitroSDK/asm/md5.s
Normal file
382
lib/NitroSDK/asm/md5.s
Normal file
@@ -0,0 +1,382 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start MD5_Init
|
||||
MD5_Init: ; 0x020800FC
|
||||
ldr r2, _0208012C ; =0x67452301
|
||||
ldr r1, _02080130 ; =0xEFCDAB89
|
||||
str r2, [r0]
|
||||
ldr r2, _02080134 ; =0x98BADCFE
|
||||
str r1, [r0, #4]
|
||||
ldr r1, _02080138 ; =0x10325476
|
||||
str r2, [r0, #8]
|
||||
str r1, [r0, #0xc]
|
||||
mov r1, #0
|
||||
str r1, [r0, #0x10]
|
||||
str r1, [r0, #0x14]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0208012C: .word 0x67452301
|
||||
_02080130: .word 0xEFCDAB89
|
||||
_02080134: .word 0x98BADCFE
|
||||
_02080138: .word 0x10325476
|
||||
arm_func_end MD5_Init
|
||||
|
||||
arm_func_start MD5_Update
|
||||
MD5_Update: ; 0x0208013C
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||||
mov r6, r0
|
||||
ldr r3, [r6, #0x10]
|
||||
mov r4, r2
|
||||
and ip, r3, #0x3f
|
||||
ldr r0, [r6, #0x14]
|
||||
adds r3, r3, r4
|
||||
str r3, [r6, #0x10]
|
||||
adc r0, r0, #0
|
||||
rsb r7, ip, #0x40
|
||||
mov r5, r1
|
||||
str r0, [r6, #0x14]
|
||||
cmp r7, r4
|
||||
bls _02080190
|
||||
cmp r4, #0
|
||||
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
add r1, r6, #0x18
|
||||
mov r0, r5
|
||||
add r1, r1, ip
|
||||
bl MI_CpuCopy8
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
_02080190:
|
||||
add r1, r6, #0x18
|
||||
mov r0, r5
|
||||
mov r2, r7
|
||||
add r1, r1, ip
|
||||
bl MI_CpuCopy8
|
||||
mov r0, r6
|
||||
bl MD5_Transform
|
||||
sub r4, r4, r7
|
||||
mov r8, r4, lsr #6
|
||||
cmp r8, #0
|
||||
add r7, r5, r7
|
||||
ble _020801EC
|
||||
mov r5, #0x40
|
||||
_020801C4:
|
||||
mov r0, r7
|
||||
mov r2, r5
|
||||
add r1, r6, #0x18
|
||||
bl MI_CpuCopy8
|
||||
mov r0, r6
|
||||
add r7, r7, #0x40
|
||||
bl MD5_Transform
|
||||
sub r8, r8, #1
|
||||
cmp r8, #0
|
||||
bgt _020801C4
|
||||
_020801EC:
|
||||
ands r2, r4, #0x3f
|
||||
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
mov r0, r7
|
||||
add r1, r6, #0x18
|
||||
bl MI_CpuCopy8
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, pc}
|
||||
arm_func_end MD5_Update
|
||||
|
||||
arm_func_start MD5_Digest
|
||||
MD5_Digest: ; 0x02080204
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
mov r4, r1
|
||||
ldr r1, [r4, #0x14]
|
||||
ldr r3, [r4, #0x10]
|
||||
mov r5, r0
|
||||
mov r6, r1, lsl #3
|
||||
ldr r1, _020802B8 ; =_020B2BC0
|
||||
mov r0, r4
|
||||
mov r2, #1
|
||||
orr r6, r6, r3, lsr #29
|
||||
mov r7, r3, lsl #3
|
||||
bl MD5_Update
|
||||
ldr r0, [r4, #0x10]
|
||||
mov r1, #0
|
||||
and r3, r0, #0x3f
|
||||
rsb r2, r3, #0x40
|
||||
cmp r2, #8
|
||||
bhs _02080268
|
||||
add r0, r4, #0x18
|
||||
add r0, r0, r3
|
||||
bl MI_CpuFill8
|
||||
mov r0, r4
|
||||
bl MD5_Transform
|
||||
mov r3, #0
|
||||
mov r2, #0x40
|
||||
_02080268:
|
||||
cmp r2, #8
|
||||
bls _02080284
|
||||
add r0, r4, #0x18
|
||||
add r0, r0, r3
|
||||
sub r2, r2, #8
|
||||
mov r1, #0
|
||||
bl MI_CpuFill8
|
||||
_02080284:
|
||||
str r7, [r4, #0x50]
|
||||
mov r0, r4
|
||||
str r6, [r4, #0x54]
|
||||
bl MD5_Transform
|
||||
mov r0, r4
|
||||
mov r1, r5
|
||||
mov r2, #0x10
|
||||
bl MI_CpuCopy8
|
||||
mov r0, r4
|
||||
mov r1, #0
|
||||
mov r2, #0x58
|
||||
bl MI_CpuFill8
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_020802B8: .word _020B2BC0
|
||||
arm_func_end MD5_Digest
|
||||
|
||||
arm_func_start MD5_Transform
|
||||
MD5_Transform: ; 0x020802BC
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
|
||||
ldmia r0, {r2, r3, ip, lr}
|
||||
add r4, r0, #0x18
|
||||
ldr r5, _02080668 ; =_020B2C84
|
||||
mov r7, r4
|
||||
mov r8, #0
|
||||
_020802D4:
|
||||
mvn r1, r3
|
||||
and r6, r3, ip
|
||||
and r1, r1, lr
|
||||
orr r1, r6, r1
|
||||
ldr r6, [r7]
|
||||
add r1, r2, r1
|
||||
ldr r2, [r5]
|
||||
add r1, r6, r1
|
||||
add r2, r2, r1
|
||||
mov r1, r2, lsr #0x19
|
||||
orr r1, r1, r2, lsl #7
|
||||
add r2, r3, r1
|
||||
mvn r1, r2
|
||||
and r6, r2, r3
|
||||
and r1, r1, ip
|
||||
orr r1, r6, r1
|
||||
ldr r6, [r7, #4]
|
||||
add r1, lr, r1
|
||||
ldr sb, [r5, #4]
|
||||
add r1, r6, r1
|
||||
add r6, sb, r1
|
||||
mov r1, r6, lsr #0x14
|
||||
orr r1, r1, r6, lsl #12
|
||||
add lr, r2, r1
|
||||
mvn r1, lr
|
||||
and r6, lr, r2
|
||||
and r1, r1, r3
|
||||
orr r1, r6, r1
|
||||
ldr sb, [r7, #8]
|
||||
add r6, ip, r1
|
||||
ldr r1, [r7, #0xc]
|
||||
add sb, sb, r6
|
||||
ldr sl, [r5, #8]
|
||||
ldr r6, [r5, #0xc]
|
||||
add sl, sl, sb
|
||||
mov sb, sl, lsr #0xf
|
||||
orr sb, sb, sl, lsl #17
|
||||
add ip, lr, sb
|
||||
add r5, r5, #0x10
|
||||
add r7, r7, #0x10
|
||||
and sl, ip, lr
|
||||
mvn sb, ip
|
||||
and sb, sb, r2
|
||||
orr sb, sl, sb
|
||||
add r3, r3, sb
|
||||
add r1, r1, r3
|
||||
add r3, r6, r1
|
||||
mov r1, r3, lsr #0xa
|
||||
orr r1, r1, r3, lsl #22
|
||||
add r3, ip, r1
|
||||
add r8, r8, #1
|
||||
cmp r8, #4
|
||||
blt _020802D4
|
||||
ldr r1, _0208066C ; =_020B2BC4
|
||||
mov r6, #0
|
||||
_020803B0:
|
||||
mvn r7, lr
|
||||
ldr sb, [r1]
|
||||
and r8, r3, lr
|
||||
and r7, ip, r7
|
||||
orr r7, r8, r7
|
||||
ldr r8, [r4, sb, lsl #2]
|
||||
add r2, r2, r7
|
||||
ldr r7, [r5]
|
||||
add r2, r8, r2
|
||||
add r7, r7, r2
|
||||
mov r2, r7, lsr #0x1b
|
||||
orr r2, r2, r7, lsl #5
|
||||
add r2, r3, r2
|
||||
mvn r8, ip
|
||||
ldr r7, [r1, #4]
|
||||
and sb, r2, ip
|
||||
and r8, r3, r8
|
||||
orr sl, sb, r8
|
||||
mvn r8, r3
|
||||
ldr sb, [r1, #8]
|
||||
ldr fp, [r4, r7, lsl #2]
|
||||
add r7, lr, sl
|
||||
add r7, fp, r7
|
||||
ldr sl, [r5, #4]
|
||||
ldr sb, [r4, sb, lsl #2]
|
||||
add sl, sl, r7
|
||||
ldr r7, [r1, #0xc]
|
||||
and r8, r2, r8
|
||||
ldr r7, [r4, r7, lsl #2]
|
||||
mov fp, sl, lsr #0x17
|
||||
orr sl, fp, sl, lsl #9
|
||||
add lr, r2, sl
|
||||
ldr sl, [r5, #8]
|
||||
and fp, lr, r3
|
||||
orr r8, fp, r8
|
||||
add r8, ip, r8
|
||||
add r8, sb, r8
|
||||
add sb, sl, r8
|
||||
mov r8, sb, lsr #0x12
|
||||
orr r8, r8, sb, lsl #14
|
||||
add ip, lr, r8
|
||||
mvn r8, r2
|
||||
and sb, lr, r8
|
||||
ldr r8, [r5, #0xc]
|
||||
add r5, r5, #0x10
|
||||
add r1, r1, #0x10
|
||||
and sl, ip, r2
|
||||
orr sb, sl, sb
|
||||
add r3, r3, sb
|
||||
add r3, r7, r3
|
||||
add r7, r8, r3
|
||||
mov r3, r7, lsr #0xc
|
||||
orr r3, r3, r7, lsl #20
|
||||
add r3, ip, r3
|
||||
add r6, r6, #1
|
||||
cmp r6, #4
|
||||
blt _020803B0
|
||||
mov r6, #0
|
||||
_02080498:
|
||||
ldr r8, [r1]
|
||||
eor r7, r3, ip
|
||||
eor r7, lr, r7
|
||||
ldr r8, [r4, r8, lsl #2]
|
||||
add r2, r2, r7
|
||||
ldr r7, [r5]
|
||||
add r2, r8, r2
|
||||
add r7, r7, r2
|
||||
mov r2, r7, lsr #0x1c
|
||||
orr r2, r2, r7, lsl #4
|
||||
add r2, r3, r2
|
||||
ldr r8, [r1, #4]
|
||||
eor r7, r2, r3
|
||||
eor r7, ip, r7
|
||||
ldr r8, [r4, r8, lsl #2]
|
||||
add r7, lr, r7
|
||||
ldr sb, [r1, #8]
|
||||
ldr sl, [r5, #4]
|
||||
add r7, r8, r7
|
||||
add r8, sl, r7
|
||||
mov r7, r8, lsr #0x15
|
||||
orr r7, r7, r8, lsl #11
|
||||
add lr, r2, r7
|
||||
eor r8, lr, r2
|
||||
ldr r7, [r1, #0xc]
|
||||
ldr sb, [r4, sb, lsl #2]
|
||||
eor r8, r3, r8
|
||||
add r8, ip, r8
|
||||
add sb, sb, r8
|
||||
ldr sl, [r5, #8]
|
||||
ldr r8, [r4, r7, lsl #2]
|
||||
add sb, sl, sb
|
||||
mov r7, sb, lsr #0x10
|
||||
orr r7, r7, sb, lsl #16
|
||||
add ip, lr, r7
|
||||
eor r7, ip, lr
|
||||
eor r7, r2, r7
|
||||
add r3, r3, r7
|
||||
add r3, r8, r3
|
||||
ldr r7, [r5, #0xc]
|
||||
add r5, r5, #0x10
|
||||
add r7, r7, r3
|
||||
add r1, r1, #0x10
|
||||
mov r3, r7, lsr #9
|
||||
orr r3, r3, r7, lsl #23
|
||||
add r3, ip, r3
|
||||
add r6, r6, #1
|
||||
cmp r6, #4
|
||||
blt _02080498
|
||||
mov r8, #0
|
||||
_02080560:
|
||||
mvn r6, lr
|
||||
ldr r7, [r1]
|
||||
orr r6, r3, r6
|
||||
eor r6, ip, r6
|
||||
ldr r7, [r4, r7, lsl #2]
|
||||
add r2, r2, r6
|
||||
ldr r6, [r5]
|
||||
add r2, r7, r2
|
||||
add r6, r6, r2
|
||||
mov r2, r6, lsr #0x1a
|
||||
orr r2, r2, r6, lsl #6
|
||||
add r2, r3, r2
|
||||
mvn r6, ip
|
||||
ldr sb, [r1, #4]
|
||||
orr r6, r2, r6
|
||||
eor r7, r3, r6
|
||||
ldr r6, [r1, #8]
|
||||
ldr sb, [r4, sb, lsl #2]
|
||||
add r7, lr, r7
|
||||
ldr sl, [r5, #4]
|
||||
add r7, sb, r7
|
||||
add sb, sl, r7
|
||||
mov r7, sb, lsr #0x16
|
||||
orr sb, r7, sb, lsl #10
|
||||
ldr r7, [r1, #0xc]
|
||||
add lr, r2, sb
|
||||
mvn sb, r3
|
||||
ldr r6, [r4, r6, lsl #2]
|
||||
orr sb, lr, sb
|
||||
eor sb, r2, sb
|
||||
add sb, ip, sb
|
||||
add sb, r6, sb
|
||||
ldr sl, [r5, #8]
|
||||
ldr r6, [r4, r7, lsl #2]
|
||||
add sb, sl, sb
|
||||
mov r7, sb, lsr #0x11
|
||||
orr sb, r7, sb, lsl #15
|
||||
ldr r7, [r5, #0xc]
|
||||
add ip, lr, sb
|
||||
add r5, r5, #0x10
|
||||
add r1, r1, #0x10
|
||||
mvn sb, r2
|
||||
orr sb, ip, sb
|
||||
eor sb, lr, sb
|
||||
add r3, r3, sb
|
||||
add r3, r6, r3
|
||||
add r6, r7, r3
|
||||
mov r3, r6, lsr #0xb
|
||||
orr r3, r3, r6, lsl #21
|
||||
add r3, ip, r3
|
||||
add r8, r8, #1
|
||||
cmp r8, #4
|
||||
blt _02080560
|
||||
ldr r1, [r0]
|
||||
add r1, r1, r2
|
||||
str r1, [r0]
|
||||
ldr r1, [r0, #4]
|
||||
add r1, r1, r3
|
||||
str r1, [r0, #4]
|
||||
ldr r1, [r0, #8]
|
||||
add r1, r1, ip
|
||||
str r1, [r0, #8]
|
||||
ldr r1, [r0, #0xc]
|
||||
add r1, r1, lr
|
||||
str r1, [r0, #0xc]
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
.align 2, 0
|
||||
_02080668: .word _020B2C84
|
||||
_0208066C: .word _020B2BC4
|
||||
arm_func_end MD5_Transform
|
||||
|
||||
@@ -1,16 +0,0 @@
|
||||
.include "asm/macros.inc"
|
||||
|
||||
.text
|
||||
|
||||
.public MI_SetWramBank
|
||||
.public MI_StopDma
|
||||
|
||||
arm_func_start MI_Init
|
||||
MI_Init: ; 0x0207C7C4
|
||||
stmdb sp!, {r3, lr}
|
||||
mov r0, #3
|
||||
bl MI_SetWramBank
|
||||
mov r0, #0
|
||||
bl MI_StopDma
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end MI_Init
|
||||
@@ -1,12 +0,0 @@
|
||||
.include "asm/macros.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start MI_SetWramBank
|
||||
MI_SetWramBank: ; 0x0207BC3C
|
||||
ldr r1, _0207BC48 ; =0x04000247
|
||||
strb r0, [r1]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207BC48: .word 0x04000247
|
||||
arm_func_end MI_SetWramBank
|
||||
@@ -6,7 +6,7 @@
|
||||
arm_func_start OS_InitArena
|
||||
OS_InitArena: ; 0x0207A3B4
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r1, _0207A4B4 ; =_022B98C4
|
||||
ldr r1, _0207A4B4 ; =OSi_Initialized
|
||||
ldr r0, [r1]
|
||||
cmp r0, #0
|
||||
ldmneia sp!, {r3, pc}
|
||||
@@ -70,7 +70,7 @@ OS_InitArena: ; 0x0207A3B4
|
||||
bl OS_SetArenaLo
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207A4B4: .word _022B98C4
|
||||
_0207A4B4: .word OSi_Initialized
|
||||
arm_func_end OS_InitArena
|
||||
|
||||
arm_func_start OS_InitArenaEx
|
||||
@@ -86,7 +86,7 @@ OS_InitArenaEx: ; 0x0207A4B8
|
||||
mov r1, r0
|
||||
mov r0, #2
|
||||
bl OS_SetArenaLo
|
||||
ldr r0, _0207A518 ; =_022B98C4
|
||||
ldr r0, _0207A518 ; =OSi_Initialized
|
||||
ldr r0, [r0, #4]
|
||||
cmp r0, #0
|
||||
beq _0207A504
|
||||
@@ -101,7 +101,7 @@ _0207A504:
|
||||
bl OS_SetProtectionRegion2
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207A518: .word _022B98C4
|
||||
_0207A518: .word OSi_Initialized
|
||||
_0207A51C: .word _0200002B
|
||||
_0207A520: .word 0x023E0021
|
||||
arm_func_end OS_InitArenaEx
|
||||
@@ -142,7 +142,7 @@ _0207A578:
|
||||
ldr r0, _0207A610 ; =SDK_SECTION_ARENA_EX_START
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A580:
|
||||
ldr r0, _0207A614 ; =_022B98C4
|
||||
ldr r0, _0207A614 ; =OSi_Initialized
|
||||
ldr r0, [r0, #4]
|
||||
cmp r0, #0
|
||||
beq _0207A5A0
|
||||
@@ -188,7 +188,7 @@ _0207A608:
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207A610: .word SDK_SECTION_ARENA_EX_START
|
||||
_0207A614: .word _022B98C4
|
||||
_0207A614: .word OSi_Initialized
|
||||
_0207A618: .word OS_IRQTable
|
||||
_0207A61C: .word 0x00000000
|
||||
_0207A620: .word 0x00000800
|
||||
@@ -215,7 +215,7 @@ _0207A65C:
|
||||
ldr r0, _0207A6BC ; =SDK_MAIN_ARENA_LO
|
||||
ldmia sp!, {r3, pc}
|
||||
_0207A664:
|
||||
ldr r0, _0207A6C0 ; =_022B98C4
|
||||
ldr r0, _0207A6C0 ; =OSi_Initialized
|
||||
ldr r0, [r0, #4]
|
||||
cmp r0, #0
|
||||
beq _0207A684
|
||||
@@ -246,7 +246,7 @@ _0207A6B4:
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207A6BC: .word SDK_MAIN_ARENA_LO
|
||||
_0207A6C0: .word _022B98C4
|
||||
_0207A6C0: .word OSi_Initialized
|
||||
_0207A6C4: .word SDK_SECTION_ARENA_EX_START
|
||||
_0207A6C8: .word SDK_SECTION_ARENA_ITCM_START
|
||||
_0207A6CC: .word SDK_SECTION_ARENA_DTCM_START
|
||||
|
||||
94
lib/NitroSDK/asm/os_context.s
Normal file
94
lib/NitroSDK/asm/os_context.s
Normal file
@@ -0,0 +1,94 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/os_thread.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start OS_InitContext
|
||||
OS_InitContext: ; 0x02079C84
|
||||
add r1, r1, #4
|
||||
str r1, [r0, #0x40]
|
||||
str r2, [r0, #0x44]
|
||||
sub r2, r2, #0x40
|
||||
tst r2, #4
|
||||
bne _02079CA0
|
||||
b _02079CA4
|
||||
_02079CA0:
|
||||
sub r2, r2, #4
|
||||
_02079CA4:
|
||||
str r2, [r0, #0x38]
|
||||
ands r1, r1, #1
|
||||
bne _02079CB4
|
||||
b _02079CB8
|
||||
_02079CB4:
|
||||
mov r1, #0x3f
|
||||
_02079CB8:
|
||||
beq _02079CC0
|
||||
b _02079CC4
|
||||
_02079CC0:
|
||||
mov r1, #0x1f
|
||||
_02079CC4:
|
||||
str r1, [r0]
|
||||
mov r1, #0
|
||||
str r1, [r0, #4]
|
||||
str r1, [r0, #8]
|
||||
str r1, [r0, #0xc]
|
||||
str r1, [r0, #0x10]
|
||||
str r1, [r0, #0x14]
|
||||
str r1, [r0, #0x18]
|
||||
str r1, [r0, #0x1c]
|
||||
str r1, [r0, #0x20]
|
||||
str r1, [r0, #0x24]
|
||||
str r1, [r0, #0x28]
|
||||
str r1, [r0, #0x2c]
|
||||
str r1, [r0, #0x30]
|
||||
str r1, [r0, #0x34]
|
||||
str r1, [r0, #0x3c]
|
||||
bx lr
|
||||
arm_func_end OS_InitContext
|
||||
|
||||
arm_func_start OS_SaveContext
|
||||
OS_SaveContext: ; 0x02079D08
|
||||
stmdb sp!, {r0, lr}
|
||||
add r0, r0, #0x48
|
||||
ldr r1, _02079D50 ; =CP_SaveContext
|
||||
blx r1
|
||||
ldmia sp!, {r0, lr}
|
||||
add r1, r0, #0
|
||||
mrs r2, cpsr
|
||||
str r2, [r1], #4
|
||||
mov r0, #0xd3
|
||||
msr cpsr_c, r0
|
||||
str sp, [r1, #0x40]
|
||||
msr cpsr_c, r2
|
||||
mov r0, #1
|
||||
stmia r1, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sb, sl, fp, ip, sp, lr}
|
||||
add r0, pc, #0x8 ; =_02079D50
|
||||
str r0, [r1, #0x3c]
|
||||
mov r0, #0
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02079D50: .word CP_SaveContext
|
||||
arm_func_end OS_SaveContext
|
||||
|
||||
arm_func_start OS_LoadContext
|
||||
OS_LoadContext: ; 0x02079D54
|
||||
stmdb sp!, {r0, lr}
|
||||
add r0, r0, #0x48
|
||||
ldr r1, _02079D94 ; =CPi_RestoreContext
|
||||
blx r1
|
||||
ldmia sp!, {r0, lr}
|
||||
mrs r1, cpsr
|
||||
bic r1, r1, #0x1f
|
||||
orr r1, r1, #0xd3
|
||||
msr cpsr_c, r1
|
||||
ldr r1, [r0], #4
|
||||
msr spsr_fsxc, r1
|
||||
ldr sp, [r0, #0x40]
|
||||
ldr lr, [r0, #0x3c]
|
||||
ldmia r0, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sb, sl, fp, ip, sp, lr} ^
|
||||
mov r0, r0
|
||||
subs pc, lr, #4
|
||||
.align 2, 0
|
||||
_02079D94: .word CPi_RestoreContext
|
||||
arm_func_end OS_LoadContext
|
||||
|
||||
22
lib/NitroSDK/asm/os_emulator.s
Normal file
22
lib/NitroSDK/asm/os_emulator.s
Normal file
@@ -0,0 +1,22 @@
|
||||
.include "asm/macros.inc"
|
||||
|
||||
.text
|
||||
|
||||
.public _020B2BAC
|
||||
|
||||
arm_func_start OS_IsRunOnEmulator
|
||||
OS_IsRunOnEmulator: ; 0x02079D98
|
||||
mov r0, #0
|
||||
bx lr
|
||||
arm_func_end OS_IsRunOnEmulator
|
||||
|
||||
arm_func_start OS_GetConsoleType
|
||||
OS_GetConsoleType: ; 0x02079DA0
|
||||
ldr r0, _02079DB0 ; =0x82000001
|
||||
ldr r1, _02079DB4 ; =_020B2BAC
|
||||
str r0, [r1]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02079DB0: .word 0x82000001
|
||||
_02079DB4: .word _020B2BAC
|
||||
arm_func_end OS_GetConsoleType
|
||||
@@ -1,63 +0,0 @@
|
||||
.include "asm/macros.inc"
|
||||
|
||||
.text
|
||||
|
||||
.public OS_GetTickLo
|
||||
.public _022B99A8
|
||||
|
||||
arm_func_start OS_GetLowEntropyData
|
||||
OS_GetLowEntropyData: ; 0x0207BB50
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
ldr r1, _0207BC10 ; =0x04000006
|
||||
mov r5, r0
|
||||
ldrh r6, [r1]
|
||||
ldr r4, _0207BC14 ; =0x027FFC00
|
||||
bl OS_GetTickLo
|
||||
orr r0, r0, r6, lsl #16
|
||||
str r0, [r5]
|
||||
ldr r1, _0207BC18 ; =_022B99A8
|
||||
ldrh ip, [r4, #0xf8]
|
||||
ldr r3, [r1]
|
||||
ldr r2, [r1, #4]
|
||||
mov r0, r4
|
||||
eor r2, r3, ip, lsl #16
|
||||
str r2, [r5, #4]
|
||||
ldr r2, [r1]
|
||||
ldr r3, [r0, #0x3c]
|
||||
ldr r2, [r1, #4]
|
||||
ldr r1, [r4, #0xf4]
|
||||
ldr ip, _0207BC1C ; =0x04000600
|
||||
eor r1, r2, r1
|
||||
eor r2, r3, r1
|
||||
str r2, [r5, #8]
|
||||
ldr r1, [ip]
|
||||
eor r1, r2, r1
|
||||
str r1, [r5, #8]
|
||||
ldr r2, [r0, #0x1e8]
|
||||
add r1, r0, #0x300
|
||||
str r2, [r5, #0xc]
|
||||
ldr r3, [r0, #0x1ec]
|
||||
sub r2, ip, #0x4d0
|
||||
str r3, [r5, #0x10]
|
||||
ldr r3, [r0, #0x390]
|
||||
ldrh r4, [r1, #0x94]
|
||||
add r0, r0, #0x3a8
|
||||
eor r3, r3, r4, lsl #16
|
||||
str r3, [r5, #0x14]
|
||||
ldrh r4, [r1, #0xaa]
|
||||
ldrh r3, [r1, #0xac]
|
||||
orr r3, r3, r4, lsl #16
|
||||
str r3, [r5, #0x18]
|
||||
ldrh r2, [r2]
|
||||
ldrh r0, [r0]
|
||||
ldrh r1, [r1, #0x98]
|
||||
orr r0, r2, r0
|
||||
orr r0, r0, r1, lsl #16
|
||||
str r0, [r5, #0x1c]
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_0207BC10: .word 0x04000006
|
||||
_0207BC14: .word 0x027FFC00
|
||||
_0207BC18: .word _022B99A8
|
||||
_0207BC1C: .word 0x04000600
|
||||
arm_func_end OS_GetLowEntropyData
|
||||
@@ -10,15 +10,15 @@ OS_InitException: ; 0x0207AB24
|
||||
cmp r1, #0x2600000
|
||||
blo _0207AB44
|
||||
cmp r1, #0x2800000
|
||||
ldrlo r0, _0207AB88 ; =_022B98F0
|
||||
ldrlo r0, _0207AB88 ; =OSi_DebuggerHandler
|
||||
strlo r1, [r0]
|
||||
blo _0207AB50
|
||||
_0207AB44:
|
||||
ldr r0, _0207AB88 ; =_022B98F0
|
||||
ldr r0, _0207AB88 ; =OSi_DebuggerHandler
|
||||
mov r1, #0
|
||||
str r1, [r0]
|
||||
_0207AB50:
|
||||
ldr r0, _0207AB88 ; =_022B98F0
|
||||
ldr r0, _0207AB88 ; =OSi_DebuggerHandler
|
||||
ldr r0, [r0]
|
||||
cmp r0, #0
|
||||
bne _0207AB74
|
||||
@@ -28,20 +28,20 @@ _0207AB50:
|
||||
str r2, [r1]
|
||||
str r2, [r0, #0xfdc]
|
||||
_0207AB74:
|
||||
ldr r0, _0207AB88 ; =_022B98F0
|
||||
ldr r0, _0207AB88 ; =OSi_DebuggerHandler
|
||||
mov r1, #0
|
||||
str r1, [r0, #8]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207AB84: .word 0x027FFD9C
|
||||
_0207AB88: .word _022B98F0
|
||||
_0207AB88: .word OSi_DebuggerHandler
|
||||
_0207AB8C: .word OSi_ExceptionHandler
|
||||
_0207AB90: .word 0x027E3000
|
||||
arm_func_end OS_InitException
|
||||
|
||||
arm_func_start OSi_ExceptionHandler
|
||||
OSi_ExceptionHandler: ; 0x0207AB94
|
||||
ldr ip, _0207AC10 ; =_022B98F0
|
||||
ldr ip, _0207AC10 ; =OSi_DebuggerHandler
|
||||
ldr ip, [ip]
|
||||
cmp ip, #0
|
||||
bne _0207ABA8
|
||||
@@ -69,7 +69,7 @@ _0207ABE0:
|
||||
bne _0207ABEC
|
||||
bl OSi_GetAndDisplayContext
|
||||
_0207ABEC:
|
||||
ldr ip, _0207AC10 ; =_022B98F0
|
||||
ldr ip, _0207AC10 ; =OSi_DebuggerHandler
|
||||
ldr ip, [ip]
|
||||
cmp ip, #0
|
||||
_0207ABF8:
|
||||
@@ -82,7 +82,7 @@ _0207AC04:
|
||||
mov sp, ip
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207AC10: .word _022B98F0
|
||||
_0207AC10: .word OSi_DebuggerHandler
|
||||
_0207AC14: .word _secure
|
||||
arm_func_end OSi_ExceptionHandler
|
||||
|
||||
@@ -97,7 +97,7 @@ OSi_GetAndDisplayContext: ; 0x0207AC18
|
||||
|
||||
arm_func_start OSi_SetExContext
|
||||
OSi_SetExContext: ; 0x0207AC2C
|
||||
ldr r1, _0207ACB8 ; =_022B991C
|
||||
ldr r1, _0207ACB8 ; =OSi_ExContext
|
||||
mrs r2, cpsr
|
||||
str r2, [r1, #0x74]
|
||||
str r0, [r1, #0x6c]
|
||||
@@ -133,13 +133,13 @@ OSi_SetExContext: ; 0x0207AC2C
|
||||
msr cpsr_fsxc, r0
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207ACB8: .word _022B991C
|
||||
_0207ACB8: .word OSi_ExContext
|
||||
arm_func_end OSi_SetExContext
|
||||
|
||||
arm_func_start OSi_DisplayExContent
|
||||
OSi_DisplayExContent: ; 0x0207ACBC
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r0, _0207AD20 ; =_022B98F0
|
||||
ldr r0, _0207AD20 ; =OSi_DebuggerHandler
|
||||
ldr r0, [r0, #8]
|
||||
cmp r0, #0
|
||||
ldmeqia sp!, {r3, pc}
|
||||
@@ -151,7 +151,7 @@ OSi_DisplayExContent: ; 0x0207ACBC
|
||||
mov sp, r0
|
||||
stmdb sp!, {r1, r2}
|
||||
bl OS_EnableProtectionUnit
|
||||
ldr r0, _0207AD28 ; =_022B991C
|
||||
ldr r0, _0207AD28 ; =OSi_ExContext
|
||||
ldr r1, _0207AD2C ; =_022B98F4
|
||||
ldr r1, [r1]
|
||||
ldr ip, _0207AD30 ; =_022B98F8
|
||||
@@ -165,9 +165,9 @@ OSi_DisplayExContext_Helper:
|
||||
msr cpsr_fsxc, r2
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207AD20: .word _022B98F0
|
||||
_0207AD20: .word OSi_DebuggerHandler
|
||||
_0207AD24: .word 0x0000009F
|
||||
_0207AD28: .word _022B991C
|
||||
_0207AD28: .word OSi_ExContext
|
||||
_0207AD2C: .word _022B98F4
|
||||
_0207AD30: .word _022B98F8
|
||||
_0207AD34: .word OSi_DisplayExContext_Helper
|
||||
|
||||
@@ -1,57 +0,0 @@
|
||||
.include "asm/macros.inc"
|
||||
|
||||
.text
|
||||
|
||||
.public MI_CpuCopy8
|
||||
.public MTi_CpuCopy16
|
||||
|
||||
arm_func_start OS_GetMacAddress
|
||||
OS_GetMacAddress: ; 0x0207B9EC
|
||||
ldr ip, _0207BA00 ; =MI_CpuCopy8
|
||||
mov r1, r0
|
||||
ldr r0, _0207BA04 ; =0x027FFCF4
|
||||
mov r2, #6
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_0207BA00: .word MI_CpuCopy8
|
||||
_0207BA04: .word 0x027FFCF4
|
||||
arm_func_end OS_GetMacAddress
|
||||
|
||||
arm_func_start GetDsFirmwareUserSettings ; OS_GetOwnerInfo
|
||||
GetDsFirmwareUserSettings: ; 0x0207BA08
|
||||
stmdb sp!, {r4, lr}
|
||||
ldr ip, _0207BA88 ; =0x027FFC80
|
||||
mov r4, r0
|
||||
ldrh r2, [ip, #0x64]
|
||||
add r0, ip, #6
|
||||
add r1, r4, #4
|
||||
mov r2, r2, lsl #0x1d
|
||||
mov r2, r2, lsr #0x1d
|
||||
strb r2, [r4]
|
||||
ldrb r3, [ip, #2]
|
||||
mov r2, #0x14
|
||||
mov r3, r3, lsl #0x1c
|
||||
mov r3, r3, lsr #0x1c
|
||||
strb r3, [r4, #1]
|
||||
ldrb r3, [ip, #3]
|
||||
strb r3, [r4, #2]
|
||||
ldrb r3, [ip, #4]
|
||||
strb r3, [r4, #3]
|
||||
ldrb r3, [ip, #0x1a]
|
||||
strh r3, [r4, #0x1a]
|
||||
ldrb r3, [ip, #0x50]
|
||||
strh r3, [r4, #0x52]
|
||||
bl MTi_CpuCopy16
|
||||
ldr r0, _0207BA88 ; =0x027FFC80
|
||||
add r1, r4, #0x1c
|
||||
add r0, r0, #0x1c
|
||||
mov r2, #0x34
|
||||
bl MTi_CpuCopy16
|
||||
mov r0, #0
|
||||
strh r0, [r4, #0x18]
|
||||
strh r0, [r4, #0x50]
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207BA88: .word 0x027FFC80
|
||||
arm_func_end GetDsFirmwareUserSettings
|
||||
|
||||
636
lib/NitroSDK/asm/os_printf.s
Normal file
636
lib/NitroSDK/asm/os_printf.s
Normal file
@@ -0,0 +1,636 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
.public string_put_char
|
||||
.public string_fill_char
|
||||
.public string_put_string
|
||||
|
||||
arm_func_start OS_VsNPrintfEx
|
||||
OS_VsNPrintfEx: ; 0x02085BD4
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
|
||||
sub sp, sp, #0x30
|
||||
mov sb, r2
|
||||
str r1, [sp, #0xc]
|
||||
str r0, [sp, #0x14]
|
||||
str r0, [sp, #0x10]
|
||||
ldrsb r0, [sb]
|
||||
str r1, [sp]
|
||||
mov fp, r3
|
||||
cmp r0, #0
|
||||
beq _02086400
|
||||
_02085C00:
|
||||
ldrsb r1, [sb]
|
||||
and r0, r1, #0xff
|
||||
eor r0, r0, #0x20
|
||||
sub r0, r0, #0xa1
|
||||
cmp r0, #0x3c
|
||||
bhs _02085C3C
|
||||
add r0, sp, #0xc
|
||||
bl string_put_char
|
||||
ldrsb r1, [sb, #1]!
|
||||
cmp r1, #0
|
||||
beq _020863F4
|
||||
add r0, sp, #0xc
|
||||
add sb, sb, #1
|
||||
bl string_put_char
|
||||
b _020863F4
|
||||
_02085C3C:
|
||||
cmp r1, #0x25
|
||||
beq _02085C54
|
||||
add r0, sp, #0xc
|
||||
add sb, sb, #1
|
||||
bl string_put_char
|
||||
b _020863F4
|
||||
_02085C54:
|
||||
mov r5, #0
|
||||
mov sl, r5
|
||||
mov r2, sb
|
||||
sub r6, r5, #1
|
||||
mov r0, #0xa
|
||||
mov r3, #0x57
|
||||
_02085C6C:
|
||||
ldrsb r4, [sb, #1]!
|
||||
cmp r4, #0x20
|
||||
bgt _02085C80
|
||||
beq _02085CBC
|
||||
b _02085CD4
|
||||
_02085C80:
|
||||
cmp r4, #0x30
|
||||
bgt _02085CD4
|
||||
cmp r4, #0x2b
|
||||
blt _02085CD4
|
||||
beq _02085CA8
|
||||
cmp r4, #0x2d
|
||||
beq _02085CC4
|
||||
cmp r4, #0x30
|
||||
beq _02085CCC
|
||||
b _02085CD4
|
||||
_02085CA8:
|
||||
ldrsb r1, [sb, #-1]
|
||||
cmp r1, #0x20
|
||||
bne _02085CD4
|
||||
orr r5, r5, #2
|
||||
b _02085C6C
|
||||
_02085CBC:
|
||||
orr r5, r5, #1
|
||||
b _02085C6C
|
||||
_02085CC4:
|
||||
orr r5, r5, #8
|
||||
b _02085C6C
|
||||
_02085CCC:
|
||||
orr r5, r5, #0x10
|
||||
b _02085C6C
|
||||
_02085CD4:
|
||||
cmp r4, #0x2a
|
||||
bne _02085CF8
|
||||
add fp, fp, #4
|
||||
ldr sl, [fp, #-4]
|
||||
add sb, sb, #1
|
||||
cmp sl, #0
|
||||
rsblt sl, sl, #0
|
||||
orrlt r5, r5, #8
|
||||
b _02085D20
|
||||
_02085CF8:
|
||||
mov r1, #0xa
|
||||
b _02085D0C
|
||||
_02085D00:
|
||||
ldrsb r4, [sb], #1
|
||||
mla r4, sl, r1, r4
|
||||
sub sl, r4, #0x30
|
||||
_02085D0C:
|
||||
ldrsb r4, [sb]
|
||||
cmp r4, #0x30
|
||||
blt _02085D20
|
||||
cmp r4, #0x39
|
||||
ble _02085D00
|
||||
_02085D20:
|
||||
ldrsb r1, [sb]
|
||||
cmp r1, #0x2e
|
||||
bne _02085D7C
|
||||
ldrsb r1, [sb, #1]!
|
||||
mov r6, #0
|
||||
cmp r1, #0x2a
|
||||
bne _02085D54
|
||||
add fp, fp, #4
|
||||
ldr r6, [fp, #-4]
|
||||
add sb, sb, #1
|
||||
cmp r6, #0
|
||||
mvnlt r6, #0
|
||||
b _02085D7C
|
||||
_02085D54:
|
||||
mov r1, #0xa
|
||||
b _02085D68
|
||||
_02085D5C:
|
||||
ldrsb r4, [sb], #1
|
||||
mla r4, r6, r1, r4
|
||||
sub r6, r4, #0x30
|
||||
_02085D68:
|
||||
ldrsb r4, [sb]
|
||||
cmp r4, #0x30
|
||||
blt _02085D7C
|
||||
cmp r4, #0x39
|
||||
ble _02085D5C
|
||||
_02085D7C:
|
||||
ldrsb r1, [sb]
|
||||
cmp r1, #0x68
|
||||
beq _02085D94
|
||||
cmp r1, #0x6c
|
||||
beq _02085DAC
|
||||
b _02085DC0
|
||||
_02085D94:
|
||||
ldrsb r1, [sb, #1]!
|
||||
cmp r1, #0x68
|
||||
orrne r5, r5, #0x40
|
||||
addeq sb, sb, #1
|
||||
orreq r5, r5, #0x100
|
||||
b _02085DC0
|
||||
_02085DAC:
|
||||
ldrsb r1, [sb, #1]!
|
||||
cmp r1, #0x6c
|
||||
orrne r5, r5, #0x20
|
||||
addeq sb, sb, #1
|
||||
orreq r5, r5, #0x80
|
||||
_02085DC0:
|
||||
ldrsb r1, [sb]
|
||||
cmp r1, #0x69
|
||||
bgt _02085E04
|
||||
cmp r1, #0x63
|
||||
blt _02085DE8
|
||||
beq _02085E74
|
||||
cmp r1, #0x64
|
||||
cmpne r1, #0x69
|
||||
beq _0208602C
|
||||
b _02086010
|
||||
_02085DE8:
|
||||
cmp r1, #0x25
|
||||
bgt _02085DF8
|
||||
beq _02085FF4
|
||||
b _02086010
|
||||
_02085DF8:
|
||||
cmp r1, #0x58
|
||||
beq _02085E60
|
||||
b _02086010
|
||||
_02085E04:
|
||||
cmp r1, #0x6e
|
||||
bgt _02085E14
|
||||
beq _02085F9C
|
||||
b _02086010
|
||||
_02085E14:
|
||||
sub r1, r1, #0x6f
|
||||
cmp r1, #9
|
||||
addls pc, pc, r1, lsl #2
|
||||
b _02086010
|
||||
_02085E24: ; jump table
|
||||
b _02085E4C ; case 0
|
||||
b _02085E68 ; case 1
|
||||
b _02086010 ; case 2
|
||||
b _02086010 ; case 3
|
||||
b _02085EE8 ; case 4
|
||||
b _02086010 ; case 5
|
||||
b _02085E58 ; case 6
|
||||
b _02086010 ; case 7
|
||||
b _02086010 ; case 8
|
||||
b _02086024 ; case 9
|
||||
_02085E4C:
|
||||
orr r5, r5, #0x1000
|
||||
mov r0, #8
|
||||
b _0208602C
|
||||
_02085E58:
|
||||
orr r5, r5, #0x1000
|
||||
b _0208602C
|
||||
_02085E60:
|
||||
mov r3, #0x37
|
||||
b _02086024
|
||||
_02085E68:
|
||||
orr r5, r5, #4
|
||||
mov r6, #8
|
||||
b _02086024
|
||||
_02085E74:
|
||||
cmp r6, #0
|
||||
bge _02086010
|
||||
add fp, fp, #4
|
||||
tst r5, #8
|
||||
ldr r4, [fp, #-4]
|
||||
beq _02085EB0
|
||||
mov r1, r4, lsl #0x18
|
||||
add r0, sp, #0xc
|
||||
mov r1, r1, asr #0x18
|
||||
bl string_put_char
|
||||
add r0, sp, #0xc
|
||||
sub r2, sl, #1
|
||||
mov r1, #0x20
|
||||
bl string_fill_char
|
||||
b _02085EE0
|
||||
_02085EB0:
|
||||
tst r5, #0x10
|
||||
movne r0, #0x30
|
||||
moveq r0, #0x20
|
||||
mov r1, r0, lsl #0x18
|
||||
add r0, sp, #0xc
|
||||
mov r1, r1, asr #0x18
|
||||
sub r2, sl, #1
|
||||
bl string_fill_char
|
||||
mov r1, r4, lsl #0x18
|
||||
add r0, sp, #0xc
|
||||
mov r1, r1, asr #0x18
|
||||
bl string_put_char
|
||||
_02085EE0:
|
||||
add sb, sb, #1
|
||||
b _020863F4
|
||||
_02085EE8:
|
||||
add fp, fp, #4
|
||||
cmp r6, #0
|
||||
ldr r7, [fp, #-4]
|
||||
mov r4, #0
|
||||
bge _02085F20
|
||||
ldrsb r0, [r7]
|
||||
cmp r0, #0
|
||||
beq _02085F34
|
||||
_02085F08:
|
||||
add r4, r4, #1
|
||||
ldrsb r0, [r7, r4]
|
||||
cmp r0, #0
|
||||
bne _02085F08
|
||||
b _02085F34
|
||||
_02085F1C:
|
||||
add r4, r4, #1
|
||||
_02085F20:
|
||||
cmp r4, r6
|
||||
bge _02085F34
|
||||
ldrsb r0, [r7, r4]
|
||||
cmp r0, #0
|
||||
bne _02085F1C
|
||||
_02085F34:
|
||||
tst r5, #8
|
||||
sub sl, sl, r4
|
||||
beq _02085F64
|
||||
add r0, sp, #0xc
|
||||
mov r1, r7
|
||||
mov r2, r4
|
||||
bl string_put_string
|
||||
add r0, sp, #0xc
|
||||
mov r2, sl
|
||||
mov r1, #0x20
|
||||
bl string_fill_char
|
||||
b _02085F94
|
||||
_02085F64:
|
||||
tst r5, #0x10
|
||||
movne r0, #0x30
|
||||
moveq r0, #0x20
|
||||
mov r1, r0, lsl #0x18
|
||||
add r0, sp, #0xc
|
||||
mov r2, sl
|
||||
mov r1, r1, asr #0x18
|
||||
bl string_fill_char
|
||||
add r0, sp, #0xc
|
||||
mov r1, r7
|
||||
mov r2, r4
|
||||
bl string_put_string
|
||||
_02085F94:
|
||||
add sb, sb, #1
|
||||
b _020863F4
|
||||
_02085F9C:
|
||||
ldr r1, [sp, #0x10]
|
||||
ldr r0, [sp, #0x14]
|
||||
tst r5, #0x100
|
||||
sub r2, r1, r0
|
||||
bne _02085FEC
|
||||
tst r5, #0x40
|
||||
beq _02085FC8
|
||||
add fp, fp, #4
|
||||
ldr r0, [fp, #-4]
|
||||
strh r2, [r0]
|
||||
b _02085FEC
|
||||
_02085FC8:
|
||||
add fp, fp, #4
|
||||
tst r5, #0x80
|
||||
ldreq r0, [fp, #-4]
|
||||
streq r2, [r0]
|
||||
beq _02085FEC
|
||||
ldr r0, [fp, #-4]
|
||||
mov r1, r2, asr #0x1f
|
||||
str r2, [r0]
|
||||
str r1, [r0, #4]
|
||||
_02085FEC:
|
||||
add sb, sb, #1
|
||||
b _020863F4
|
||||
_02085FF4:
|
||||
add r0, r2, #1
|
||||
cmp r0, sb
|
||||
bne _02086010
|
||||
add r0, sp, #0xc
|
||||
add sb, sb, #1
|
||||
bl string_put_char
|
||||
b _020863F4
|
||||
_02086010:
|
||||
mov r1, r2
|
||||
add r0, sp, #0xc
|
||||
sub r2, sb, r2
|
||||
bl string_put_string
|
||||
b _020863F4
|
||||
_02086024:
|
||||
orr r5, r5, #0x1000
|
||||
mov r0, #0x10
|
||||
_0208602C:
|
||||
tst r5, #8
|
||||
bicne r5, r5, #0x10
|
||||
cmp r6, #0
|
||||
bicge r5, r5, #0x10
|
||||
movlt r6, #1
|
||||
mov r4, #0
|
||||
tst r5, #0x1000
|
||||
beq _020860EC
|
||||
tst r5, #0x100
|
||||
beq _02086064
|
||||
add fp, fp, #4
|
||||
ldrb r7, [fp, #-4]
|
||||
mov r1, #0
|
||||
b _0208609C
|
||||
_02086064:
|
||||
tst r5, #0x40
|
||||
beq _0208607C
|
||||
add fp, fp, #4
|
||||
ldrh r7, [fp, #-4]
|
||||
mov r1, #0
|
||||
b _0208609C
|
||||
_0208607C:
|
||||
tst r5, #0x80
|
||||
addeq fp, fp, #4
|
||||
ldreq r7, [fp, #-4]
|
||||
moveq r1, #0
|
||||
beq _0208609C
|
||||
add fp, fp, #8
|
||||
ldr r7, [fp, #-8]
|
||||
ldr r1, [fp, #-4]
|
||||
_0208609C:
|
||||
bic r5, r5, #3
|
||||
tst r5, #4
|
||||
beq _020861AC
|
||||
cmp r0, #0x10
|
||||
bne _020860D4
|
||||
cmp r1, #0
|
||||
cmpeq r7, #0
|
||||
beq _020861AC
|
||||
add r4, r3, #0x21
|
||||
mov r2, #0x30
|
||||
strb r4, [sp, #8]
|
||||
strb r2, [sp, #9]
|
||||
mov r4, #2
|
||||
b _020861AC
|
||||
_020860D4:
|
||||
cmp r0, #8
|
||||
bne _020861AC
|
||||
mov r2, #0x30
|
||||
strb r2, [sp, #8]
|
||||
mov r4, #1
|
||||
b _020861AC
|
||||
_020860EC:
|
||||
tst r5, #0x100
|
||||
beq _02086104
|
||||
add fp, fp, #4
|
||||
ldrsb r7, [fp, #-4]
|
||||
mov r1, r7, asr #0x1f
|
||||
b _0208613C
|
||||
_02086104:
|
||||
tst r5, #0x40
|
||||
beq _0208611C
|
||||
add fp, fp, #4
|
||||
ldrsh r7, [fp, #-4]
|
||||
mov r1, r7, asr #0x1f
|
||||
b _0208613C
|
||||
_0208611C:
|
||||
tst r5, #0x80
|
||||
addeq fp, fp, #4
|
||||
ldreq r7, [fp, #-4]
|
||||
moveq r1, r7, asr #0x1f
|
||||
beq _0208613C
|
||||
add fp, fp, #8
|
||||
ldr r7, [fp, #-8]
|
||||
ldr r1, [fp, #-4]
|
||||
_0208613C:
|
||||
mov ip, #0
|
||||
and r2, ip, #0
|
||||
and r8, r1, #0x80000000
|
||||
cmp r2, #0
|
||||
cmpeq r8, #0
|
||||
beq _02086174
|
||||
mvn r4, r7
|
||||
mov r2, #0x2d
|
||||
mvn r1, r1
|
||||
strb r2, [sp, #8]
|
||||
adds r7, r4, #1
|
||||
adc r1, r1, ip
|
||||
mov r4, #1
|
||||
b _020861AC
|
||||
_02086174:
|
||||
cmp r1, ip
|
||||
cmpeq r7, ip
|
||||
cmpeq r6, #0
|
||||
beq _020861AC
|
||||
tst r5, #2
|
||||
beq _0208619C
|
||||
mov r2, #0x2b
|
||||
strb r2, [sp, #8]
|
||||
mov r4, #1
|
||||
b _020861AC
|
||||
_0208619C:
|
||||
tst r5, #1
|
||||
movne r2, #0x20
|
||||
strneb r2, [sp, #8]
|
||||
movne r4, #1
|
||||
_020861AC:
|
||||
cmp r0, #8
|
||||
mov r8, #0
|
||||
beq _020861CC
|
||||
cmp r0, #0xa
|
||||
beq _02086218
|
||||
cmp r0, #0x10
|
||||
beq _020862B0
|
||||
b _020862FC
|
||||
_020861CC:
|
||||
cmp r1, r8
|
||||
cmpeq r7, r8
|
||||
beq _020862FC
|
||||
add r2, sp, #0x18
|
||||
mov r0, r8
|
||||
mov lr, #7
|
||||
mov ip, r8
|
||||
_020861E8:
|
||||
and r3, r7, lr
|
||||
add r3, r3, #0x30
|
||||
strb r3, [r2, r8]
|
||||
mov r3, r1, lsr #3
|
||||
cmp r3, r0
|
||||
mov r7, r7, lsr #3
|
||||
orr r7, r7, r1, lsl #29
|
||||
mov r1, r3
|
||||
cmpeq r7, ip
|
||||
add r8, r8, #1
|
||||
bne _020861E8
|
||||
b _020862FC
|
||||
_02086218:
|
||||
mov r0, r8
|
||||
cmp r0, r8
|
||||
cmpeq r1, r8
|
||||
bne _02086264
|
||||
cmp r7, #0
|
||||
beq _020862FC
|
||||
ldr ip, _0208644C ; =0xCCCCCCCD
|
||||
add r3, sp, #0x18
|
||||
mov r2, #0xa
|
||||
_0208623C:
|
||||
umull r1, r0, r7, ip
|
||||
movs r0, r0, lsr #3
|
||||
mul r1, r0, r2
|
||||
sub r1, r7, r1
|
||||
mov r7, r0
|
||||
add r0, r1, #0x30
|
||||
strb r0, [r3, r8]
|
||||
add r8, r8, #1
|
||||
bne _0208623C
|
||||
b _020862FC
|
||||
_02086264:
|
||||
cmp r1, r8
|
||||
cmpeq r7, r8
|
||||
beq _020862FC
|
||||
_02086270:
|
||||
mov r0, r7
|
||||
mov r2, #0xa
|
||||
mov r3, #0
|
||||
bl _ll_udiv
|
||||
mov r2, #0xa
|
||||
umull r3, r2, r0, r2
|
||||
subs r2, r7, r3
|
||||
add r3, r2, #0x30
|
||||
add r2, sp, #0x18
|
||||
strb r3, [r2, r8]
|
||||
cmp r1, #0
|
||||
cmpeq r0, #0
|
||||
mov r7, r0
|
||||
add r8, r8, #1
|
||||
bne _02086270
|
||||
b _020862FC
|
||||
_020862B0:
|
||||
cmp r1, r8
|
||||
cmpeq r7, r8
|
||||
beq _020862FC
|
||||
add ip, sp, #0x18
|
||||
mov lr, #0xf
|
||||
_020862C4:
|
||||
and r2, r7, lr
|
||||
mov r7, r7, lsr #4
|
||||
mov r0, r1, lsr #4
|
||||
orr r7, r7, r1, lsl #28
|
||||
cmp r2, #0xa
|
||||
mov r1, r0
|
||||
addlt r0, r2, #0x30
|
||||
addge r0, r2, r3
|
||||
strb r0, [ip, r8]
|
||||
mov r0, #0
|
||||
cmp r1, r0
|
||||
cmpeq r7, r0
|
||||
add r8, r8, #1
|
||||
bne _020862C4
|
||||
_020862FC:
|
||||
cmp r4, #0
|
||||
ble _02086324
|
||||
ldrsb r0, [sp, #8]
|
||||
cmp r0, #0x30
|
||||
bne _02086324
|
||||
add r0, sp, #0x18
|
||||
mov r1, #0x30
|
||||
strb r1, [r0, r8]
|
||||
add r8, r8, #1
|
||||
mov r4, #0
|
||||
_02086324:
|
||||
tst r5, #0x10
|
||||
sub r6, r6, r8
|
||||
beq _02086340
|
||||
sub r0, sl, r8
|
||||
sub r0, r0, r4
|
||||
cmp r6, r0
|
||||
movlt r6, r0
|
||||
_02086340:
|
||||
cmp r6, #0
|
||||
subgt sl, sl, r6
|
||||
add r0, r4, r8
|
||||
sub sl, sl, r0
|
||||
ands r0, r5, #8
|
||||
str r0, [sp, #4]
|
||||
bne _0208636C
|
||||
add r0, sp, #0xc
|
||||
mov r2, sl
|
||||
mov r1, #0x20
|
||||
bl string_fill_char
|
||||
_0208636C:
|
||||
cmp r4, #0
|
||||
ble _02086398
|
||||
add r0, sp, #8
|
||||
add r5, r0, r4
|
||||
add r7, sp, #0xc
|
||||
_02086380:
|
||||
ldrsb r1, [r5, #-1]!
|
||||
mov r0, r7
|
||||
sub r4, r4, #1
|
||||
bl string_put_char
|
||||
cmp r4, #0
|
||||
bgt _02086380
|
||||
_02086398:
|
||||
add r0, sp, #0xc
|
||||
mov r2, r6
|
||||
mov r1, #0x30
|
||||
bl string_fill_char
|
||||
cmp r8, #0
|
||||
ble _020863D4
|
||||
add r0, sp, #0x18
|
||||
add r5, r0, r8
|
||||
add r4, sp, #0xc
|
||||
_020863BC:
|
||||
ldrsb r1, [r5, #-1]!
|
||||
mov r0, r4
|
||||
sub r8, r8, #1
|
||||
bl string_put_char
|
||||
cmp r8, #0
|
||||
bgt _020863BC
|
||||
_020863D4:
|
||||
ldr r0, [sp, #4]
|
||||
cmp r0, #0
|
||||
beq _020863F0
|
||||
add r0, sp, #0xc
|
||||
mov r2, sl
|
||||
mov r1, #0x20
|
||||
bl string_fill_char
|
||||
_020863F0:
|
||||
add sb, sb, #1
|
||||
_020863F4:
|
||||
ldrsb r0, [sb]
|
||||
cmp r0, #0
|
||||
bne _02085C00
|
||||
_02086400:
|
||||
ldr r0, [sp, #0xc]
|
||||
cmp r0, #0
|
||||
beq _0208641C
|
||||
ldr r0, [sp, #0x10]
|
||||
mov r1, #0
|
||||
strb r1, [r0]
|
||||
b _02086438
|
||||
_0208641C:
|
||||
ldr r0, [sp]
|
||||
cmp r0, #0
|
||||
beq _02086438
|
||||
ldr r1, [sp, #0x14]
|
||||
mov r2, #0
|
||||
add r0, r1, r0
|
||||
strb r2, [r0, #-1]
|
||||
_02086438:
|
||||
ldr r1, [sp, #0x10]
|
||||
ldr r0, [sp, #0x14]
|
||||
sub r0, r1, r0
|
||||
add sp, sp, #0x30
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
.align 2, 0
|
||||
_0208644C: .word 0xCCCCCCCD
|
||||
arm_func_end OS_VsNPrintfEx
|
||||
|
||||
@@ -6,7 +6,7 @@
|
||||
arm_func_start OS_InitReset
|
||||
OS_InitReset: ; 0x0207B87C
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr r0, _0207B8C8 ; =_022B99D0
|
||||
ldr r0, _0207B8C8 ; =OSi_IsInitReset
|
||||
ldrh r1, [r0, #2]
|
||||
cmp r1, #0
|
||||
ldmneia sp!, {r3, r4, r5, pc}
|
||||
@@ -26,7 +26,7 @@ _0207B8A4:
|
||||
bl PXI_SetFifoRecvCallback
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_0207B8C8: .word _022B99D0
|
||||
_0207B8C8: .word OSi_IsInitReset
|
||||
_0207B8CC: .word OSi_CommonCallback
|
||||
arm_func_end OS_InitReset
|
||||
|
||||
@@ -38,7 +38,7 @@ OSi_CommonCallback: ; 0x0207B8D0
|
||||
mov r0, r0, lsr #0x10
|
||||
cmp r0, #0x10
|
||||
bne _0207B8F8
|
||||
ldr r0, _0207B900 ; =_022B99D0
|
||||
ldr r0, _0207B900 ; =OSi_IsInitReset
|
||||
mov r1, #1
|
||||
strh r1, [r0]
|
||||
ldmia sp!, {r3, pc}
|
||||
@@ -46,7 +46,7 @@ _0207B8F8:
|
||||
bl WaitForever2
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207B900: .word _022B99D0
|
||||
_0207B900: .word OSi_IsInitReset
|
||||
arm_func_end OSi_CommonCallback
|
||||
|
||||
arm_func_start OSi_SendToPxi ; Osi_SendToPxi
|
||||
|
||||
@@ -180,7 +180,7 @@ OS_RescheduleThread: ; 0x02079340
|
||||
cmp r1, #0
|
||||
ldmneia sp!, {r4, r5, r6, pc}
|
||||
ldrh r0, [r0, #0x26]
|
||||
ldr r4, _02079404 ; =_022B966C
|
||||
ldr r4, _02079404 ; =OSi_ThreadInfo
|
||||
cmp r0, #0
|
||||
bne _02079370
|
||||
bl GetProcessorMode
|
||||
@@ -229,7 +229,7 @@ _020793EC:
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_02079400: .word THREAD_INFO_STRUCT
|
||||
_02079404: .word _022B966C
|
||||
_02079404: .word OSi_ThreadInfo
|
||||
arm_func_end OS_RescheduleThread
|
||||
|
||||
arm_func_start OS_InitThread
|
||||
@@ -278,7 +278,7 @@ _0207947C:
|
||||
str r2, [r3, #-4]
|
||||
ldr r2, [r1, #0x184]
|
||||
ldr ip, _02079538 ; =0x7BF9DD5B
|
||||
ldr r3, _0207953C ; =_022B966C
|
||||
ldr r3, _0207953C ; =OSi_ThreadInfo
|
||||
str ip, [r2]
|
||||
str r0, [r1, #0x194]
|
||||
str r0, [r1, #0x190]
|
||||
@@ -292,10 +292,10 @@ _0207947C:
|
||||
mov ip, #0x1f
|
||||
ldr r0, _02079544 ; =_022B967C
|
||||
ldr r1, _02079548 ; =_02079C04
|
||||
ldr r3, _0207954C ; =_022B98C4
|
||||
ldr r3, _0207954C ; =OSi_Initialized
|
||||
mov r2, #0
|
||||
str ip, [sp, #4]
|
||||
bl StartThread
|
||||
bl OS_CreateThread
|
||||
ldr r0, _02079518 ; =THREAD_INFO_STRUCT
|
||||
mov r1, #0x20
|
||||
str r1, [r0, #0xa4]
|
||||
@@ -313,24 +313,24 @@ _0207952C: .word OS_IRQTable
|
||||
_02079530: .word 0x00000800
|
||||
_02079534: .word 0xFDDB597D
|
||||
_02079538: .word 0x7BF9DD5B
|
||||
_0207953C: .word _022B966C
|
||||
_0207953C: .word OSi_ThreadInfo
|
||||
_02079540: .word 0x027FFFA0
|
||||
_02079544: .word _022B967C
|
||||
_02079548: .word OSi_IdleThreadProc
|
||||
_0207954C: .word _022B98C4
|
||||
_0207954C: .word OSi_Initialized
|
||||
arm_func_end OS_InitThread
|
||||
|
||||
arm_func_start OS_IsThreadAvailable
|
||||
OS_IsThreadAvailable: ; 0x02079550
|
||||
ldr r0, _0207955C ; =_022B9654
|
||||
ldr r0, _0207955C ; =OSi_IsThreadInitialized
|
||||
ldr r0, [r0]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207955C: .word _022B9654
|
||||
_0207955C: .word OSi_IsThreadInitialized
|
||||
arm_func_end OS_IsThreadAvailable
|
||||
|
||||
arm_func_start StartThread
|
||||
StartThread: ; 0x02079560
|
||||
arm_func_start OS_CreateThread
|
||||
OS_CreateThread: ; 0x02079560
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, lr}
|
||||
mov r8, r0
|
||||
mov r5, r1
|
||||
@@ -364,8 +364,8 @@ StartThread: ; 0x02079560
|
||||
str ip, [r8, #0xa0]
|
||||
mov r0, r8
|
||||
str ip, [r8, #0x9c]
|
||||
bl InitThread
|
||||
ldr r2, _02079658 ; =ThreadExit
|
||||
bl OS_InitContext
|
||||
ldr r2, _02079658 ; =OS_ExitThread
|
||||
str r7, [r8, #4]
|
||||
str r2, [r8, #0x3c]
|
||||
ldr r2, [sp, #0x18]
|
||||
@@ -394,11 +394,11 @@ StartThread: ; 0x02079560
|
||||
.align 2, 0
|
||||
_02079650: .word 0xFDDB597D
|
||||
_02079654: .word 0x7BF9DD5B
|
||||
_02079658: .word ThreadExit
|
||||
arm_func_end StartThread
|
||||
_02079658: .word OS_ExitThread
|
||||
arm_func_end OS_CreateThread
|
||||
|
||||
arm_func_start ThreadExit
|
||||
ThreadExit: ; 0x0207965C
|
||||
arm_func_start OS_ExitThread
|
||||
OS_ExitThread: ; 0x0207965C
|
||||
stmdb sp!, {r3, lr}
|
||||
bl EnableIrqFlag
|
||||
ldr r0, _02079678 ; =THREAD_INFO_STRUCT
|
||||
@@ -408,7 +408,7 @@ ThreadExit: ; 0x0207965C
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02079678: .word THREAD_INFO_STRUCT
|
||||
arm_func_end ThreadExit
|
||||
arm_func_end OS_ExitThread
|
||||
|
||||
arm_func_start OSi_ExitThread_ArgSpecified
|
||||
OSi_ExitThread_ArgSpecified: ; 0x0207967C
|
||||
@@ -420,7 +420,7 @@ OSi_ExitThread_ArgSpecified: ; 0x0207967C
|
||||
cmp r2, #0
|
||||
beq _020796C4
|
||||
ldr r1, _020796D4 ; =OSi_ExitThread
|
||||
bl InitThread
|
||||
bl OS_InitContext
|
||||
str r4, [r5, #4]
|
||||
ldr r1, [r5]
|
||||
mov r0, r5
|
||||
@@ -927,474 +927,3 @@ OS_SetThreadDestructor: ; 0x02079C7C
|
||||
bx lr
|
||||
arm_func_end OS_SetThreadDestructor
|
||||
|
||||
arm_func_start InitThread
|
||||
InitThread: ; 0x02079C84
|
||||
add r1, r1, #4
|
||||
str r1, [r0, #0x40]
|
||||
str r2, [r0, #0x44]
|
||||
sub r2, r2, #0x40
|
||||
tst r2, #4
|
||||
bne _02079CA0
|
||||
b _02079CA4
|
||||
_02079CA0:
|
||||
sub r2, r2, #4
|
||||
_02079CA4:
|
||||
str r2, [r0, #0x38]
|
||||
ands r1, r1, #1
|
||||
bne _02079CB4
|
||||
b _02079CB8
|
||||
_02079CB4:
|
||||
mov r1, #0x3f
|
||||
_02079CB8:
|
||||
beq _02079CC0
|
||||
b _02079CC4
|
||||
_02079CC0:
|
||||
mov r1, #0x1f
|
||||
_02079CC4:
|
||||
str r1, [r0]
|
||||
mov r1, #0
|
||||
str r1, [r0, #4]
|
||||
str r1, [r0, #8]
|
||||
str r1, [r0, #0xc]
|
||||
str r1, [r0, #0x10]
|
||||
str r1, [r0, #0x14]
|
||||
str r1, [r0, #0x18]
|
||||
str r1, [r0, #0x1c]
|
||||
str r1, [r0, #0x20]
|
||||
str r1, [r0, #0x24]
|
||||
str r1, [r0, #0x28]
|
||||
str r1, [r0, #0x2c]
|
||||
str r1, [r0, #0x30]
|
||||
str r1, [r0, #0x34]
|
||||
str r1, [r0, #0x3c]
|
||||
bx lr
|
||||
arm_func_end InitThread
|
||||
|
||||
arm_func_start OS_SaveContext
|
||||
OS_SaveContext: ; 0x02079D08
|
||||
stmdb sp!, {r0, lr}
|
||||
add r0, r0, #0x48
|
||||
ldr r1, _02079D50 ; =CP_SaveContext
|
||||
blx r1
|
||||
ldmia sp!, {r0, lr}
|
||||
add r1, r0, #0
|
||||
mrs r2, cpsr
|
||||
str r2, [r1], #4
|
||||
mov r0, #0xd3
|
||||
msr cpsr_c, r0
|
||||
str sp, [r1, #0x40]
|
||||
msr cpsr_c, r2
|
||||
mov r0, #1
|
||||
stmia r1, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sb, sl, fp, ip, sp, lr}
|
||||
add r0, pc, #0x8 ; =_02079D50
|
||||
str r0, [r1, #0x3c]
|
||||
mov r0, #0
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02079D50: .word CP_SaveContext
|
||||
arm_func_end OS_SaveContext
|
||||
|
||||
arm_func_start OS_LoadContext
|
||||
OS_LoadContext: ; 0x02079D54
|
||||
stmdb sp!, {r0, lr}
|
||||
add r0, r0, #0x48
|
||||
ldr r1, _02079D94 ; =CPi_RestoreContext
|
||||
blx r1
|
||||
ldmia sp!, {r0, lr}
|
||||
mrs r1, cpsr
|
||||
bic r1, r1, #0x1f
|
||||
orr r1, r1, #0xd3
|
||||
msr cpsr_c, r1
|
||||
ldr r1, [r0], #4
|
||||
msr spsr_fsxc, r1
|
||||
ldr sp, [r0, #0x40]
|
||||
ldr lr, [r0, #0x3c]
|
||||
ldmia r0, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sb, sl, fp, ip, sp, lr} ^
|
||||
mov r0, r0
|
||||
subs pc, lr, #4
|
||||
.align 2, 0
|
||||
_02079D94: .word CPi_RestoreContext
|
||||
arm_func_end OS_LoadContext
|
||||
|
||||
arm_func_start OS_IsRunOnEmulator
|
||||
OS_IsRunOnEmulator: ; 0x02079D98
|
||||
mov r0, #0
|
||||
bx lr
|
||||
arm_func_end OS_IsRunOnEmulator
|
||||
|
||||
arm_func_start OS_GetConsoleType
|
||||
OS_GetConsoleType: ; 0x02079DA0
|
||||
ldr r0, _02079DB0 ; =0x82000001
|
||||
ldr r1, _02079DB4 ; =_020B2BAC
|
||||
str r0, [r1]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02079DB0: .word 0x82000001
|
||||
_02079DB4: .word _020B2BAC
|
||||
arm_func_end OS_GetConsoleType
|
||||
|
||||
arm_func_start OS_InitMessageQueue
|
||||
OS_InitMessageQueue: ; 0x02079DB8
|
||||
mov r3, #0
|
||||
str r3, [r0, #4]
|
||||
str r3, [r0]
|
||||
str r3, [r0, #0xc]
|
||||
str r3, [r0, #8]
|
||||
str r1, [r0, #0x10]
|
||||
str r2, [r0, #0x14]
|
||||
str r3, [r0, #0x18]
|
||||
str r3, [r0, #0x1c]
|
||||
bx lr
|
||||
arm_func_end OS_InitMessageQueue
|
||||
|
||||
arm_func_start OS_SendMessage
|
||||
OS_SendMessage: ; 0x02079DE0
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
mov r5, r0
|
||||
mov r4, r1
|
||||
mov r7, r2
|
||||
bl EnableIrqFlag
|
||||
ldr r2, [r5, #0x1c]
|
||||
ldr r1, [r5, #0x14]
|
||||
mov r6, r0
|
||||
cmp r1, r2
|
||||
bgt _02079E3C
|
||||
and r7, r7, #1
|
||||
_02079E0C:
|
||||
cmp r7, #0
|
||||
bne _02079E24
|
||||
mov r0, r6
|
||||
bl SetIrqFlag
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
_02079E24:
|
||||
mov r0, r5
|
||||
bl OS_SleepThread
|
||||
ldr r2, [r5, #0x1c]
|
||||
ldr r1, [r5, #0x14]
|
||||
cmp r1, r2
|
||||
ble _02079E0C
|
||||
_02079E3C:
|
||||
ldr r0, [r5, #0x18]
|
||||
add r0, r0, r2
|
||||
bl _s32_div_f
|
||||
ldr r2, [r5, #0x10]
|
||||
add r0, r5, #8
|
||||
str r4, [r2, r1, lsl #2]
|
||||
ldr r1, [r5, #0x1c]
|
||||
add r1, r1, #1
|
||||
str r1, [r5, #0x1c]
|
||||
bl OS_WakeupThread
|
||||
mov r0, r6
|
||||
bl SetIrqFlag
|
||||
mov r0, #1
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
arm_func_end OS_SendMessage
|
||||
|
||||
arm_func_start OS_ReceiveMessage
|
||||
OS_ReceiveMessage: ; 0x02079E74
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
mov r6, r0
|
||||
mov r5, r1
|
||||
mov r7, r2
|
||||
bl EnableIrqFlag
|
||||
ldr r1, [r6, #0x1c]
|
||||
mov r4, r0
|
||||
cmp r1, #0
|
||||
bne _02079EC8
|
||||
and r7, r7, #1
|
||||
_02079E9C:
|
||||
cmp r7, #0
|
||||
bne _02079EB4
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
_02079EB4:
|
||||
add r0, r6, #8
|
||||
bl OS_SleepThread
|
||||
ldr r0, [r6, #0x1c]
|
||||
cmp r0, #0
|
||||
beq _02079E9C
|
||||
_02079EC8:
|
||||
cmp r5, #0
|
||||
beq _02079EE0
|
||||
ldr r1, [r6, #0x10]
|
||||
ldr r0, [r6, #0x18]
|
||||
ldr r0, [r1, r0, lsl #2]
|
||||
str r0, [r5]
|
||||
_02079EE0:
|
||||
ldr r0, [r6, #0x18]
|
||||
ldr r1, [r6, #0x14]
|
||||
add r0, r0, #1
|
||||
bl _s32_div_f
|
||||
str r1, [r6, #0x18]
|
||||
ldr r1, [r6, #0x1c]
|
||||
mov r0, r6
|
||||
sub r1, r1, #1
|
||||
str r1, [r6, #0x1c]
|
||||
bl OS_WakeupThread
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
mov r0, #1
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
arm_func_end OS_ReceiveMessage
|
||||
|
||||
arm_func_start OS_JamMessage
|
||||
OS_JamMessage: ; 0x02079F18
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
mov r6, r0
|
||||
mov r5, r1
|
||||
mov r7, r2
|
||||
bl EnableIrqFlag
|
||||
ldr r1, [r6, #0x14]
|
||||
ldr r2, [r6, #0x1c]
|
||||
mov r4, r0
|
||||
cmp r1, r2
|
||||
bgt _02079F74
|
||||
and r7, r7, #1
|
||||
_02079F44:
|
||||
cmp r7, #0
|
||||
bne _02079F5C
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
_02079F5C:
|
||||
mov r0, r6
|
||||
bl OS_SleepThread
|
||||
ldr r1, [r6, #0x14]
|
||||
ldr r0, [r6, #0x1c]
|
||||
cmp r1, r0
|
||||
ble _02079F44
|
||||
_02079F74:
|
||||
ldr r0, [r6, #0x18]
|
||||
add r0, r0, r1
|
||||
sub r0, r0, #1
|
||||
bl _s32_div_f
|
||||
str r1, [r6, #0x18]
|
||||
ldr r0, [r6, #0x10]
|
||||
str r5, [r0, r1, lsl #2]
|
||||
ldr r1, [r6, #0x1c]
|
||||
add r0, r6, #8
|
||||
add r1, r1, #1
|
||||
str r1, [r6, #0x1c]
|
||||
bl OS_WakeupThread
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
mov r0, #1
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
arm_func_end OS_JamMessage
|
||||
|
||||
arm_func_start OS_ReadMessage
|
||||
OS_ReadMessage: ; 0x02079FB4
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
mov r6, r0
|
||||
mov r5, r1
|
||||
mov r7, r2
|
||||
bl EnableIrqFlag
|
||||
ldr r1, [r6, #0x1c]
|
||||
mov r4, r0
|
||||
cmp r1, #0
|
||||
bne _0207A008
|
||||
and r7, r7, #1
|
||||
_02079FDC:
|
||||
cmp r7, #0
|
||||
bne _02079FF4
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
_02079FF4:
|
||||
add r0, r6, #8
|
||||
bl OS_SleepThread
|
||||
ldr r0, [r6, #0x1c]
|
||||
cmp r0, #0
|
||||
beq _02079FDC
|
||||
_0207A008:
|
||||
cmp r5, #0
|
||||
beq _0207A020
|
||||
ldr r1, [r6, #0x10]
|
||||
ldr r0, [r6, #0x18]
|
||||
ldr r0, [r1, r0, lsl #2]
|
||||
str r0, [r5]
|
||||
_0207A020:
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
mov r0, #1
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
arm_func_end OS_ReadMessage
|
||||
|
||||
arm_func_start OS_InitMutex
|
||||
OS_InitMutex: ; 0x0207A030
|
||||
mov r1, #0
|
||||
str r1, [r0, #4]
|
||||
str r1, [r0]
|
||||
str r1, [r0, #8]
|
||||
str r1, [r0, #0xc]
|
||||
bx lr
|
||||
arm_func_end OS_InitMutex
|
||||
|
||||
arm_func_start OS_LockMutex
|
||||
OS_LockMutex: ; 0x0207A048
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
mov r5, r0
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _0207A0C8 ; =_022B966C
|
||||
mov r4, r0
|
||||
ldr r7, [r1, #4]
|
||||
mov r6, #0
|
||||
_0207A064:
|
||||
ldr r0, [r5, #8]
|
||||
cmp r0, #0
|
||||
bne _0207A090
|
||||
str r7, [r5, #8]
|
||||
ldr r1, [r5, #0xc]
|
||||
mov r0, r7
|
||||
add r2, r1, #1
|
||||
mov r1, r5
|
||||
str r2, [r5, #0xc]
|
||||
bl OSi_EnqueueTail
|
||||
b _0207A0BC
|
||||
_0207A090:
|
||||
cmp r0, r7
|
||||
bne _0207A0A8
|
||||
ldr r0, [r5, #0xc]
|
||||
add r0, r0, #1
|
||||
str r0, [r5, #0xc]
|
||||
b _0207A0BC
|
||||
_0207A0A8:
|
||||
mov r0, r5
|
||||
str r5, [r7, #0x84]
|
||||
bl OS_SleepThread
|
||||
str r6, [r7, #0x84]
|
||||
b _0207A064
|
||||
_0207A0BC:
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_0207A0C8: .word _022B966C
|
||||
arm_func_end OS_LockMutex
|
||||
|
||||
arm_func_start OS_UnlockMutex
|
||||
OS_UnlockMutex: ; 0x0207A0CC
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
mov r5, r0
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _0207A124 ; =_022B966C
|
||||
mov r4, r0
|
||||
ldr r0, [r1, #4]
|
||||
ldr r1, [r5, #8]
|
||||
cmp r1, r0
|
||||
bne _0207A118
|
||||
ldr r1, [r5, #0xc]
|
||||
subs r1, r1, #1
|
||||
str r1, [r5, #0xc]
|
||||
bne _0207A118
|
||||
mov r1, r5
|
||||
bl OSi_DequeueItem
|
||||
mov r1, #0
|
||||
mov r0, r5
|
||||
str r1, [r5, #8]
|
||||
bl OS_WakeupThread
|
||||
_0207A118:
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_0207A124: .word _022B966C
|
||||
arm_func_end OS_UnlockMutex
|
||||
|
||||
arm_func_start OSi_UnlockAllMutex
|
||||
OSi_UnlockAllMutex: ; 0x0207A128
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
mov r5, r0
|
||||
ldr r0, [r5, #0x88]
|
||||
cmp r0, #0
|
||||
ldmeqia sp!, {r3, r4, r5, pc}
|
||||
mov r4, #0
|
||||
_0207A140:
|
||||
add r0, r5, #0x88
|
||||
bl OSi_RemoveMutexLinkFromQueue
|
||||
str r4, [r0, #0xc]
|
||||
str r4, [r0, #8]
|
||||
bl OS_WakeupThread
|
||||
ldr r0, [r5, #0x88]
|
||||
cmp r0, #0
|
||||
bne _0207A140
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
arm_func_end OSi_UnlockAllMutex
|
||||
|
||||
arm_func_start OS_TryLockMutex
|
||||
OS_TryLockMutex: ; 0x0207A164
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r5, r0
|
||||
bl EnableIrqFlag
|
||||
ldr r2, [r5, #8]
|
||||
ldr r1, _0207A1D4 ; =_022B966C
|
||||
mov r4, r0
|
||||
cmp r2, #0
|
||||
ldr r0, [r1, #4]
|
||||
bne _0207A1A8
|
||||
str r0, [r5, #8]
|
||||
ldr r2, [r5, #0xc]
|
||||
mov r1, r5
|
||||
add r2, r2, #1
|
||||
str r2, [r5, #0xc]
|
||||
bl OSi_EnqueueTail
|
||||
mov r6, #1
|
||||
b _0207A1C4
|
||||
_0207A1A8:
|
||||
cmp r2, r0
|
||||
movne r6, #0
|
||||
bne _0207A1C4
|
||||
ldr r0, [r5, #0xc]
|
||||
mov r6, #1
|
||||
add r0, r0, #1
|
||||
str r0, [r5, #0xc]
|
||||
_0207A1C4:
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
mov r0, r6
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_0207A1D4: .word _022B966C
|
||||
arm_func_end OS_TryLockMutex
|
||||
|
||||
arm_func_start OSi_EnqueueTail
|
||||
OSi_EnqueueTail: ; 0x0207A1D8
|
||||
ldr r2, [r0, #0x8c]
|
||||
cmp r2, #0
|
||||
streq r1, [r0, #0x88]
|
||||
strne r1, [r2, #0x10]
|
||||
str r2, [r1, #0x14]
|
||||
mov r2, #0
|
||||
str r2, [r1, #0x10]
|
||||
str r1, [r0, #0x8c]
|
||||
bx lr
|
||||
arm_func_end OSi_EnqueueTail
|
||||
|
||||
arm_func_start OSi_DequeueItem
|
||||
OSi_DequeueItem: ; 0x0207A1FC
|
||||
ldr r2, [r1, #0x10]
|
||||
ldr r1, [r1, #0x14]
|
||||
cmp r2, #0
|
||||
streq r1, [r0, #0x8c]
|
||||
strne r1, [r2, #0x14]
|
||||
cmp r1, #0
|
||||
streq r2, [r0, #0x88]
|
||||
strne r2, [r1, #0x10]
|
||||
bx lr
|
||||
arm_func_end OSi_DequeueItem
|
||||
|
||||
arm_func_start DC_Enable
|
||||
DC_Enable: ; 0x0207A220
|
||||
mrc p15, 0, r1, c1, c0, 0
|
||||
and r0, r1, #4
|
||||
mov r0, r0, lsr #2
|
||||
orr r1, r1, #4
|
||||
mcr p15, 0, r1, c1, c0, 0
|
||||
bx lr
|
||||
arm_func_end DC_Enable
|
||||
|
||||
|
||||
@@ -1,13 +0,0 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/nitro.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start PXI_Init
|
||||
PXI_Init: ; 0x0207D9A4
|
||||
ldr ip, _0207D9AC ; =PXI_InitFifo
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_0207D9AC: .word PXI_InitFifo
|
||||
arm_func_end PXI_Init
|
||||
|
||||
143
lib/NitroSDK/asm/rtc_convert.s
Normal file
143
lib/NitroSDK/asm/rtc_convert.s
Normal file
@@ -0,0 +1,143 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start Rtc_ConvertDateToDay
|
||||
Rtc_ConvertDateToDay: ; 0x02082F30
|
||||
ldr r3, [r0]
|
||||
cmp r3, #0x64
|
||||
bhs _02082F80
|
||||
ldr r2, [r0, #4]
|
||||
cmp r2, #1
|
||||
blo _02082F80
|
||||
cmp r2, #0xc
|
||||
bhi _02082F80
|
||||
ldr r1, [r0, #8]
|
||||
cmp r1, #1
|
||||
blo _02082F80
|
||||
cmp r1, #0x1f
|
||||
bhi _02082F80
|
||||
ldr r0, [r0, #0xc]
|
||||
cmp r0, #7
|
||||
bge _02082F80
|
||||
cmp r2, #1
|
||||
blo _02082F80
|
||||
cmp r2, #0xc
|
||||
bls _02082F88
|
||||
_02082F80:
|
||||
mvn r0, #0
|
||||
bx lr
|
||||
_02082F88:
|
||||
ldr r0, _02082FBC ; =_020B2E9C
|
||||
sub r1, r1, #1
|
||||
ldr r0, [r0, r2, lsl #2]
|
||||
cmp r2, #3
|
||||
add r2, r1, r0
|
||||
blo _02082FA8
|
||||
tst r3, #3
|
||||
addeq r2, r2, #1
|
||||
_02082FA8:
|
||||
ldr r0, _02082FC0 ; =0x0000016D
|
||||
add r1, r3, #3
|
||||
mla r0, r3, r0, r2
|
||||
add r0, r0, r1, lsr #2
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02082FBC: .word _020B2E9C
|
||||
_02082FC0: .word 0x0000016D
|
||||
arm_func_end Rtc_ConvertDateToDay
|
||||
|
||||
arm_func_start Rtci_ConvertTimeToSecond
|
||||
Rtci_ConvertTimeToSecond: ; 0x02082FC4
|
||||
mov r1, #0x3c
|
||||
ldmia r0, {r2, r3}
|
||||
mla r3, r2, r1, r3
|
||||
ldr r0, [r0, #8]
|
||||
mla r0, r3, r1, r0
|
||||
bx lr
|
||||
arm_func_end Rtci_ConvertTimeToSecond
|
||||
|
||||
arm_func_start Rtc_ConvertDateTimeToSecond
|
||||
Rtc_ConvertDateTimeToSecond: ; 0x02082FDC
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
mov r5, r1
|
||||
bl Rtc_ConvertDateToDay
|
||||
mov r4, r0
|
||||
mvn r0, #0
|
||||
cmp r4, r0
|
||||
moveq r1, r0
|
||||
ldmeqia sp!, {r3, r4, r5, pc}
|
||||
mov r0, r5
|
||||
bl Rtci_ConvertTimeToSecond
|
||||
mvn r2, #0
|
||||
cmp r0, r2
|
||||
moveq r1, r2
|
||||
beq _02083034
|
||||
ldr r1, _0208303C ; =0x00015180
|
||||
mov r2, #0
|
||||
umull ip, r3, r4, r1
|
||||
mla r3, r4, r2, r3
|
||||
mov r2, r4, asr #0x1f
|
||||
mla r3, r2, r1, r3
|
||||
adds r2, r0, ip
|
||||
adc r1, r3, r0, asr #31
|
||||
_02083034:
|
||||
mov r0, r2
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_0208303C: .word 0x00015180
|
||||
arm_func_end Rtc_ConvertDateTimeToSecond
|
||||
|
||||
arm_func_start Rtc_GetDayOfWeek
|
||||
Rtc_GetDayOfWeek: ; 0x02083040
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
ldr r1, [r0, #4]
|
||||
ldr r2, [r0]
|
||||
sub r1, r1, #2
|
||||
cmp r1, #1
|
||||
add ip, r2, #0x7d0
|
||||
sublt ip, ip, #1
|
||||
ldr r6, _020830F0 ; =0x51EB851F
|
||||
ldr lr, [r0, #8]
|
||||
smull r3, r2, r6, ip
|
||||
smull r4, r3, r6, ip
|
||||
mov r5, ip, lsr #0x1f
|
||||
add r3, r5, r3, asr #5
|
||||
add r2, r5, r2, asr #5
|
||||
mov r5, #0x64
|
||||
smull r2, r4, r5, r2
|
||||
sub r2, ip, r2
|
||||
addlt r1, r1, #0xc
|
||||
mov r0, #0x1a
|
||||
mul r0, r1, r0
|
||||
sub r1, r0, #2
|
||||
ldr r0, _020830F4 ; =0x66666667
|
||||
mov r5, r1, lsr #0x1f
|
||||
smull r1, ip, r0, r1
|
||||
add ip, r5, ip, asr #2
|
||||
mov r4, r2, asr #1
|
||||
add r0, lr, ip
|
||||
add r1, r2, r4, lsr #30
|
||||
add r2, r2, r0
|
||||
mov r6, r3, asr #1
|
||||
add r0, r3, r6, lsr #30
|
||||
add r1, r2, r1, asr #2
|
||||
add r1, r1, r0, asr #2
|
||||
add r0, r3, r3, lsl #2
|
||||
add r4, r1, r0
|
||||
ldr r3, _020830F8 ; =0x92492493
|
||||
mov r1, r4, lsr #0x1f
|
||||
smull r2, r0, r3, r4
|
||||
add r0, r4, r0
|
||||
add r0, r1, r0, asr #2
|
||||
mov r2, #7
|
||||
smull r0, r1, r2, r0
|
||||
sub r0, r4, r0
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_020830F0: .word 0x51EB851F
|
||||
_020830F4: .word 0x66666667
|
||||
_020830F8: .word 0x92492493
|
||||
arm_func_end Rtc_GetDayOfWeek
|
||||
|
||||
628
lib/NitroSDK/asm/rtc_external.s
Normal file
628
lib/NitroSDK/asm/rtc_external.s
Normal file
@@ -0,0 +1,628 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start Rtc_Init
|
||||
Rtc_Init: ; 0x0208266C
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr r0, _020826D0 ; =_022BB718
|
||||
ldrh r1, [r0]
|
||||
cmp r1, #0
|
||||
ldmneia sp!, {r3, r4, r5, pc}
|
||||
mov r1, #1
|
||||
strh r1, [r0]
|
||||
mov r1, #0
|
||||
str r1, [r0, #0xc]
|
||||
str r1, [r0, #0x10]
|
||||
str r1, [r0, #0x28]
|
||||
str r1, [r0, #0x14]
|
||||
str r1, [r0, #0x18]
|
||||
bl PXI_Init
|
||||
mov r5, #5
|
||||
mov r4, #1
|
||||
_020826AC:
|
||||
mov r0, r5
|
||||
mov r1, r4
|
||||
bl PXI_IsCallbackReady
|
||||
cmp r0, #0
|
||||
beq _020826AC
|
||||
ldr r1, _020826D4 ; =RtcCommonCallback
|
||||
mov r0, #5
|
||||
bl PXI_SetFifoRecvCallback
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_020826D0: .word _022BB718
|
||||
_020826D4: .word RtcCommonCallback
|
||||
arm_func_end Rtc_Init
|
||||
|
||||
arm_func_start Rtc_GetDateAsync
|
||||
Rtc_GetDateAsync: ; 0x020826D8
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r6, r0
|
||||
mov r5, r1
|
||||
mov r4, r2
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _02082744 ; =_022BB718
|
||||
ldr r2, [r1, #0xc]
|
||||
cmp r2, #0
|
||||
beq _02082708
|
||||
bl SetIrqFlag
|
||||
mov r0, #1
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_02082708:
|
||||
mov r2, #1
|
||||
str r2, [r1, #0xc]
|
||||
bl SetIrqFlag
|
||||
ldr r0, _02082744 ; =_022BB718
|
||||
mov r1, #0
|
||||
str r1, [r0, #0x20]
|
||||
str r1, [r0, #0x24]
|
||||
str r6, [r0, #0x14]
|
||||
str r5, [r0, #0x10]
|
||||
str r4, [r0, #0x1c]
|
||||
bl Rtci_ReadRawDateAsync
|
||||
cmp r0, #0
|
||||
movne r0, #0
|
||||
moveq r0, #3
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_02082744: .word _022BB718
|
||||
arm_func_end Rtc_GetDateAsync
|
||||
|
||||
arm_func_start Rtc_GetDate
|
||||
Rtc_GetDate: ; 0x02082748
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r1, _02082778 ; =RtcGetResultCallback
|
||||
mov r2, #0
|
||||
bl Rtc_GetDateAsync
|
||||
ldr r1, _0208277C ; =_022BB718
|
||||
cmp r0, #0
|
||||
str r0, [r1, #0x2c]
|
||||
bne _0208276C
|
||||
bl RtcWaitBusy
|
||||
_0208276C:
|
||||
ldr r0, _0208277C ; =_022BB718
|
||||
ldr r0, [r0, #0x2c]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02082778: .word RtcGetResultCallback
|
||||
_0208277C: .word _022BB718
|
||||
arm_func_end Rtc_GetDate
|
||||
|
||||
arm_func_start Rtc_GetTimeAsync
|
||||
Rtc_GetTimeAsync: ; 0x02082780
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
mov r6, r0
|
||||
mov r5, r1
|
||||
mov r4, r2
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _020827F0 ; =_022BB718
|
||||
ldr r2, [r1, #0xc]
|
||||
cmp r2, #0
|
||||
beq _020827B0
|
||||
bl SetIrqFlag
|
||||
mov r0, #1
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_020827B0:
|
||||
mov r2, #1
|
||||
str r2, [r1, #0xc]
|
||||
bl SetIrqFlag
|
||||
ldr r0, _020827F0 ; =_022BB718
|
||||
mov r1, #1
|
||||
str r1, [r0, #0x20]
|
||||
mov r1, #0
|
||||
str r1, [r0, #0x24]
|
||||
str r6, [r0, #0x14]
|
||||
str r5, [r0, #0x10]
|
||||
str r4, [r0, #0x1c]
|
||||
bl Rtci_ReadRawTimeAsync
|
||||
cmp r0, #0
|
||||
movne r0, #0
|
||||
moveq r0, #3
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_020827F0: .word _022BB718
|
||||
arm_func_end Rtc_GetTimeAsync
|
||||
|
||||
arm_func_start Rtc_GetTime
|
||||
Rtc_GetTime: ; 0x020827F4
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r1, _02082824 ; =RtcGetResultCallback
|
||||
mov r2, #0
|
||||
bl Rtc_GetTimeAsync
|
||||
ldr r1, _02082828 ; =_022BB718
|
||||
cmp r0, #0
|
||||
str r0, [r1, #0x2c]
|
||||
bne _02082818
|
||||
bl RtcWaitBusy
|
||||
_02082818:
|
||||
ldr r0, _02082828 ; =_022BB718
|
||||
ldr r0, [r0, #0x2c]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_02082824: .word RtcGetResultCallback
|
||||
_02082828: .word _022BB718
|
||||
arm_func_end Rtc_GetTime
|
||||
|
||||
arm_func_start Rtc_GetDateTimeAsync
|
||||
Rtc_GetDateTimeAsync: ; 0x0208282C
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
mov r7, r0
|
||||
mov r6, r1
|
||||
mov r5, r2
|
||||
mov r4, r3
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _020828A4 ; =_022BB718
|
||||
ldr r2, [r1, #0xc]
|
||||
cmp r2, #0
|
||||
beq _02082860
|
||||
bl SetIrqFlag
|
||||
mov r0, #1
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
_02082860:
|
||||
mov r2, #1
|
||||
str r2, [r1, #0xc]
|
||||
bl SetIrqFlag
|
||||
ldr r0, _020828A4 ; =_022BB718
|
||||
mov r1, #2
|
||||
str r1, [r0, #0x20]
|
||||
mov r1, #0
|
||||
str r1, [r0, #0x24]
|
||||
str r7, [r0, #0x14]
|
||||
str r6, [r0, #0x18]
|
||||
str r5, [r0, #0x10]
|
||||
str r4, [r0, #0x1c]
|
||||
bl Rtci_ReadRawDateTimeAsync
|
||||
cmp r0, #0
|
||||
movne r0, #0
|
||||
moveq r0, #3
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_020828A4: .word _022BB718
|
||||
arm_func_end Rtc_GetDateTimeAsync
|
||||
|
||||
arm_func_start Rtc_GetDateTime
|
||||
Rtc_GetDateTime: ; 0x020828A8
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r2, _020828D8 ; =RtcGetResultCallback
|
||||
mov r3, #0
|
||||
bl Rtc_GetDateTimeAsync
|
||||
ldr r1, _020828DC ; =_022BB718
|
||||
cmp r0, #0
|
||||
str r0, [r1, #0x2c]
|
||||
bne _020828CC
|
||||
bl RtcWaitBusy
|
||||
_020828CC:
|
||||
ldr r0, _020828DC ; =_022BB718
|
||||
ldr r0, [r0, #0x2c]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_020828D8: .word RtcGetResultCallback
|
||||
_020828DC: .word _022BB718
|
||||
arm_func_end Rtc_GetDateTime
|
||||
|
||||
arm_func_start RtcCommonCallback
|
||||
RtcCommonCallback: ; 0x020828E0
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
cmp r2, #0
|
||||
beq _0208293C
|
||||
ldr r0, _02082E20 ; =_022BB718
|
||||
ldr r1, [r0, #0x24]
|
||||
cmp r1, #0
|
||||
movne r1, #0
|
||||
strne r1, [r0, #0x24]
|
||||
ldr r0, _02082E20 ; =_022BB718
|
||||
ldr r1, [r0, #0xc]
|
||||
cmp r1, #0
|
||||
movne r1, #0
|
||||
strne r1, [r0, #0xc]
|
||||
ldr r0, _02082E20 ; =_022BB718
|
||||
ldr r2, [r0, #0x10]
|
||||
cmp r2, #0
|
||||
ldmeqia sp!, {r3, r4, r5, pc}
|
||||
mov r1, #0
|
||||
str r1, [r0, #0x10]
|
||||
ldr r1, [r0, #0x1c]
|
||||
mov r0, #6
|
||||
blx r2
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
_0208293C:
|
||||
and r0, r1, #0x7f00
|
||||
mov r0, r0, lsr #8
|
||||
and r0, r0, #0xff
|
||||
cmp r0, #0x30
|
||||
and r2, r1, #0xff
|
||||
bne _0208296C
|
||||
ldr r0, _02082E20 ; =_022BB718
|
||||
ldr r0, [r0, #0x28]
|
||||
cmp r0, #0
|
||||
ldmeqia sp!, {r3, r4, r5, pc}
|
||||
blx r0
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
_0208296C:
|
||||
cmp r2, #0
|
||||
bne _02082D90
|
||||
ldr r0, _02082E20 ; =_022BB718
|
||||
mov r4, #0
|
||||
ldr r1, [r0, #0x20]
|
||||
cmp r1, #0xf
|
||||
addls pc, pc, r1, lsl #2
|
||||
b _02082D7C
|
||||
_0208298C: ; jump table
|
||||
b _020829CC ; case 0
|
||||
b _02082A28 ; case 1
|
||||
b _02082A78 ; case 2
|
||||
b _02082DD8 ; case 3
|
||||
b _02082DD8 ; case 4
|
||||
b _02082DD8 ; case 5
|
||||
b _02082B20 ; case 6
|
||||
b _02082B50 ; case 7
|
||||
b _02082B74 ; case 8
|
||||
b _02082C1C ; case 9
|
||||
b _02082CD0 ; case 10
|
||||
b _02082DD8 ; case 11
|
||||
b _02082DD8 ; case 12
|
||||
b _02082DD8 ; case 13
|
||||
b _02082DD8 ; case 14
|
||||
b _02082DD8 ; case 15
|
||||
_020829CC:
|
||||
ldr r1, _02082E24 ; =0x027FFDE8
|
||||
ldr r5, [r0, #0x14]
|
||||
ldr r0, [r1]
|
||||
mov r0, r0, lsl #0x18
|
||||
mov r0, r0, lsr #0x18
|
||||
bl RtcBcd2Hex
|
||||
ldr r1, _02082E24 ; =0x027FFDE8
|
||||
str r0, [r5]
|
||||
ldr r0, [r1]
|
||||
mov r0, r0, lsl #0x13
|
||||
mov r0, r0, lsr #0x1b
|
||||
bl RtcBcd2Hex
|
||||
ldr r1, _02082E24 ; =0x027FFDE8
|
||||
str r0, [r5, #4]
|
||||
ldr r0, [r1]
|
||||
mov r0, r0, lsl #0xa
|
||||
mov r0, r0, lsr #0x1a
|
||||
bl RtcBcd2Hex
|
||||
str r0, [r5, #8]
|
||||
mov r0, r5
|
||||
bl Rtc_GetDayOfWeek
|
||||
str r0, [r5, #0xc]
|
||||
b _02082DD8
|
||||
_02082A28:
|
||||
ldr r1, _02082E28 ; =0x027FFDEC
|
||||
ldr r5, [r0, #0x14]
|
||||
ldr r0, [r1]
|
||||
mov r0, r0, lsl #0x1a
|
||||
mov r0, r0, lsr #0x1a
|
||||
bl RtcBcd2Hex
|
||||
ldr r1, _02082E28 ; =0x027FFDEC
|
||||
str r0, [r5]
|
||||
ldr r0, [r1]
|
||||
mov r0, r0, lsl #0x11
|
||||
mov r0, r0, lsr #0x19
|
||||
bl RtcBcd2Hex
|
||||
ldr r1, _02082E28 ; =0x027FFDEC
|
||||
str r0, [r5, #4]
|
||||
ldr r0, [r1]
|
||||
mov r0, r0, lsl #9
|
||||
mov r0, r0, lsr #0x19
|
||||
bl RtcBcd2Hex
|
||||
str r0, [r5, #8]
|
||||
b _02082DD8
|
||||
_02082A78:
|
||||
ldr r1, _02082E24 ; =0x027FFDE8
|
||||
ldr r5, [r0, #0x14]
|
||||
ldr r0, [r1]
|
||||
and r0, r0, #0xff
|
||||
bl RtcBcd2Hex
|
||||
ldr r1, _02082E24 ; =0x027FFDE8
|
||||
str r0, [r5]
|
||||
ldr r0, [r1]
|
||||
mov r0, r0, lsl #0x13
|
||||
mov r0, r0, lsr #0x1b
|
||||
bl RtcBcd2Hex
|
||||
ldr r1, _02082E24 ; =0x027FFDE8
|
||||
str r0, [r5, #4]
|
||||
ldr r0, [r1]
|
||||
mov r0, r0, lsl #0xa
|
||||
mov r0, r0, lsr #0x1a
|
||||
bl RtcBcd2Hex
|
||||
str r0, [r5, #8]
|
||||
mov r0, r5
|
||||
bl Rtc_GetDayOfWeek
|
||||
ldr r1, _02082E28 ; =0x027FFDEC
|
||||
str r0, [r5, #0xc]
|
||||
ldr r0, [r1]
|
||||
ldr r1, _02082E20 ; =_022BB718
|
||||
mov r0, r0, lsl #0x1a
|
||||
mov r0, r0, lsr #0x1a
|
||||
ldr r5, [r1, #0x18]
|
||||
bl RtcBcd2Hex
|
||||
ldr r1, _02082E28 ; =0x027FFDEC
|
||||
str r0, [r5]
|
||||
ldr r0, [r1]
|
||||
mov r0, r0, lsl #0x11
|
||||
mov r0, r0, lsr #0x19
|
||||
bl RtcBcd2Hex
|
||||
ldr r1, _02082E28 ; =0x027FFDEC
|
||||
str r0, [r5, #4]
|
||||
ldr r0, [r1]
|
||||
mov r0, r0, lsl #9
|
||||
mov r0, r0, lsr #0x19
|
||||
bl RtcBcd2Hex
|
||||
str r0, [r5, #8]
|
||||
b _02082DD8
|
||||
_02082B20:
|
||||
ldr r1, _02082E2C ; =0x027FFDEA
|
||||
ldr r2, [r0, #0x14]
|
||||
ldrh r0, [r1]
|
||||
mov r0, r0, lsl #0x1c
|
||||
mov r0, r0, lsr #0x1c
|
||||
cmp r0, #4
|
||||
bne _02082B48
|
||||
mov r0, #1
|
||||
str r0, [r2]
|
||||
b _02082DD8
|
||||
_02082B48:
|
||||
str r4, [r2]
|
||||
b _02082DD8
|
||||
_02082B50:
|
||||
ldr r1, _02082E2C ; =0x027FFDEA
|
||||
ldr r2, [r0, #0x14]
|
||||
ldrh r0, [r1]
|
||||
mov r0, r0, lsl #0x19
|
||||
movs r0, r0, lsr #0x1f
|
||||
movne r0, #1
|
||||
strne r0, [r2]
|
||||
streq r4, [r2]
|
||||
b _02082DD8
|
||||
_02082B74:
|
||||
ldr r1, _02082E28 ; =0x027FFDEC
|
||||
ldr r5, [r0, #0x14]
|
||||
ldr r0, [r1]
|
||||
mov r0, r0, lsl #0x1d
|
||||
mov r0, r0, lsr #0x1d
|
||||
str r0, [r5]
|
||||
ldr r0, [r1]
|
||||
mov r0, r0, lsl #0x12
|
||||
mov r0, r0, lsr #0x1a
|
||||
bl RtcBcd2Hex
|
||||
ldr r1, _02082E28 ; =0x027FFDEC
|
||||
str r0, [r5, #4]
|
||||
ldr r0, [r1]
|
||||
mov r0, r0, lsl #9
|
||||
mov r0, r0, lsr #0x19
|
||||
bl RtcBcd2Hex
|
||||
str r0, [r5, #8]
|
||||
mov r1, r4
|
||||
ldr r0, _02082E28 ; =0x027FFDEC
|
||||
str r1, [r5, #0xc]
|
||||
ldr r0, [r0]
|
||||
mov r0, r0, lsl #0x18
|
||||
movs r0, r0, lsr #0x1f
|
||||
ldrne r0, [r5, #0xc]
|
||||
addne r0, r0, #1
|
||||
strne r0, [r5, #0xc]
|
||||
ldr r0, _02082E28 ; =0x027FFDEC
|
||||
ldr r0, [r0]
|
||||
mov r0, r0, lsl #0x10
|
||||
movs r0, r0, lsr #0x1f
|
||||
ldrne r0, [r5, #0xc]
|
||||
addne r0, r0, #2
|
||||
strne r0, [r5, #0xc]
|
||||
ldr r0, _02082E28 ; =0x027FFDEC
|
||||
ldr r0, [r0]
|
||||
mov r0, r0, lsl #8
|
||||
movs r0, r0, lsr #0x1f
|
||||
beq _02082DD8
|
||||
ldr r0, [r5, #0xc]
|
||||
add r0, r0, #4
|
||||
str r0, [r5, #0xc]
|
||||
b _02082DD8
|
||||
_02082C1C:
|
||||
ldr r3, [r0, #0x24]
|
||||
cmp r3, #0
|
||||
bne _02082CC8
|
||||
ldr r1, [r0, #0x14]
|
||||
ldr r2, _02082E2C ; =0x027FFDEA
|
||||
ldr r1, [r1]
|
||||
cmp r1, #1
|
||||
ldrh r1, [r2]
|
||||
bne _02082C88
|
||||
mov r1, r1, lsl #0x1c
|
||||
mov r1, r1, lsr #0x1c
|
||||
cmp r1, #4
|
||||
beq _02082DD8
|
||||
add r1, r3, #1
|
||||
str r1, [r0, #0x24]
|
||||
ldrh r0, [r2]
|
||||
bic r0, r0, #0xf
|
||||
orr r0, r0, #4
|
||||
strh r0, [r2]
|
||||
bl Rtci_WriteRawStatus2Async
|
||||
cmp r0, #0
|
||||
bne _02082DD8
|
||||
ldr r0, _02082E20 ; =_022BB718
|
||||
mov r1, r4
|
||||
str r1, [r0, #0x24]
|
||||
mov r4, #3
|
||||
b _02082DD8
|
||||
_02082C88:
|
||||
mov r1, r1, lsl #0x1c
|
||||
movs r1, r1, lsr #0x1c
|
||||
beq _02082DD8
|
||||
add r1, r3, #1
|
||||
str r1, [r0, #0x24]
|
||||
ldrh r0, [r2]
|
||||
bic r0, r0, #0xf
|
||||
strh r0, [r2]
|
||||
bl Rtci_WriteRawStatus2Async
|
||||
cmp r0, #0
|
||||
bne _02082DD8
|
||||
ldr r0, _02082E20 ; =_022BB718
|
||||
mov r1, r4
|
||||
str r1, [r0, #0x24]
|
||||
mov r4, #3
|
||||
b _02082DD8
|
||||
_02082CC8:
|
||||
str r4, [r0, #0x24]
|
||||
b _02082DD8
|
||||
_02082CD0:
|
||||
ldr r3, [r0, #0x24]
|
||||
cmp r3, #0
|
||||
bne _02082D74
|
||||
ldr r1, [r0, #0x14]
|
||||
ldr r2, _02082E2C ; =0x027FFDEA
|
||||
ldr r1, [r1]
|
||||
cmp r1, #1
|
||||
ldrh r1, [r2]
|
||||
bne _02082D34
|
||||
mov r1, r1, lsl #0x19
|
||||
movs r1, r1, lsr #0x1f
|
||||
bne _02082DD8
|
||||
add r1, r3, #1
|
||||
str r1, [r0, #0x24]
|
||||
ldrh r0, [r2]
|
||||
orr r0, r0, #0x40
|
||||
strh r0, [r2]
|
||||
bl Rtci_WriteRawStatus2Async
|
||||
cmp r0, #0
|
||||
bne _02082DD8
|
||||
ldr r0, _02082E20 ; =_022BB718
|
||||
mov r1, r4
|
||||
str r1, [r0, #0x24]
|
||||
mov r4, #3
|
||||
b _02082DD8
|
||||
_02082D34:
|
||||
mov r1, r1, lsl #0x19
|
||||
movs r1, r1, lsr #0x1f
|
||||
beq _02082DD8
|
||||
add r1, r3, #1
|
||||
str r1, [r0, #0x24]
|
||||
ldrh r0, [r2]
|
||||
bic r0, r0, #0x40
|
||||
strh r0, [r2]
|
||||
bl Rtci_WriteRawStatus2Async
|
||||
cmp r0, #0
|
||||
bne _02082DD8
|
||||
ldr r0, _02082E20 ; =_022BB718
|
||||
mov r1, r4
|
||||
str r1, [r0, #0x24]
|
||||
mov r4, #3
|
||||
b _02082DD8
|
||||
_02082D74:
|
||||
str r4, [r0, #0x24]
|
||||
b _02082DD8
|
||||
_02082D7C:
|
||||
ldr r0, _02082E20 ; =_022BB718
|
||||
mov r1, #0
|
||||
str r1, [r0, #0x24]
|
||||
mov r4, #4
|
||||
b _02082DD8
|
||||
_02082D90:
|
||||
ldr r0, _02082E20 ; =_022BB718
|
||||
mov r1, #0
|
||||
str r1, [r0, #0x24]
|
||||
cmp r2, #4
|
||||
addls pc, pc, r2, lsl #2
|
||||
b _02082DD4
|
||||
_02082DA8: ; jump table
|
||||
b _02082DD4 ; case 0
|
||||
b _02082DBC ; case 1
|
||||
b _02082DC4 ; case 2
|
||||
b _02082DCC ; case 3
|
||||
b _02082DD4 ; case 4
|
||||
_02082DBC:
|
||||
mov r4, #4
|
||||
b _02082DD8
|
||||
_02082DC4:
|
||||
mov r4, #5
|
||||
b _02082DD8
|
||||
_02082DCC:
|
||||
mov r4, #1
|
||||
b _02082DD8
|
||||
_02082DD4:
|
||||
mov r4, #6
|
||||
_02082DD8:
|
||||
ldr r0, _02082E20 ; =_022BB718
|
||||
ldr r1, [r0, #0x24]
|
||||
cmp r1, #0
|
||||
ldmneia sp!, {r3, r4, r5, pc}
|
||||
ldr r1, [r0, #0xc]
|
||||
cmp r1, #0
|
||||
movne r1, #0
|
||||
strne r1, [r0, #0xc]
|
||||
ldr r0, _02082E20 ; =_022BB718
|
||||
ldr r2, [r0, #0x10]
|
||||
cmp r2, #0
|
||||
ldmeqia sp!, {r3, r4, r5, pc}
|
||||
mov r1, #0
|
||||
str r1, [r0, #0x10]
|
||||
ldr r1, [r0, #0x1c]
|
||||
mov r0, r4
|
||||
blx r2
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_02082E20: .word _022BB718
|
||||
_02082E24: .word 0x027FFDE8
|
||||
_02082E28: .word 0x027FFDEC
|
||||
_02082E2C: .word 0x027FFDEA
|
||||
arm_func_end RtcCommonCallback
|
||||
|
||||
arm_func_start RtcBcd2Hex
|
||||
RtcBcd2Hex: ; 0x02082E30
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
mov ip, #0
|
||||
mov r2, ip
|
||||
mov r3, ip
|
||||
_02082E40:
|
||||
mov r1, r0, lsr r3
|
||||
and r1, r1, #0xf
|
||||
cmp r1, #0xa
|
||||
movhs r0, #0
|
||||
ldmhsia sp!, {r3, r4, r5, pc}
|
||||
add r2, r2, #1
|
||||
cmp r2, #8
|
||||
add r3, r3, #4
|
||||
blt _02082E40
|
||||
mov r5, #0
|
||||
mov r4, r5
|
||||
mov lr, #1
|
||||
mov r2, #0xa
|
||||
_02082E74:
|
||||
mov r1, r0, lsr r4
|
||||
and r3, r1, #0xf
|
||||
mul r1, lr, r2
|
||||
mla ip, lr, r3, ip
|
||||
add r5, r5, #1
|
||||
mov lr, r1
|
||||
cmp r5, #8
|
||||
add r4, r4, #4
|
||||
blt _02082E74
|
||||
mov r0, ip
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
arm_func_end RtcBcd2Hex
|
||||
|
||||
arm_func_start RtcGetResultCallback
|
||||
RtcGetResultCallback: ; 0x02082EA0
|
||||
ldr r1, _02082EAC ; =_022BB718
|
||||
str r0, [r1, #0x2c]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02082EAC: .word _022BB718
|
||||
arm_func_end RtcGetResultCallback
|
||||
|
||||
arm_func_start RtcWaitBusy
|
||||
RtcWaitBusy: ; 0x02082EB0
|
||||
ldr ip, _02082EC4 ; =_022BB724
|
||||
_02082EB4:
|
||||
ldr r0, [ip]
|
||||
cmp r0, #1
|
||||
beq _02082EB4
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02082EC4: .word _022BB724
|
||||
arm_func_end RtcWaitBusy
|
||||
|
||||
55
lib/NitroSDK/asm/rtc_internal.s
Normal file
55
lib/NitroSDK/asm/rtc_internal.s
Normal file
@@ -0,0 +1,55 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start Rtci_ReadRawDateTimeAsync
|
||||
Rtci_ReadRawDateTimeAsync: ; 0x02082EC8
|
||||
ldr ip, _02082ED4 ; =RtcSendPxiCommand
|
||||
mov r0, #0x10
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02082ED4: .word RtcSendPxiCommand
|
||||
arm_func_end Rtci_ReadRawDateTimeAsync
|
||||
|
||||
arm_func_start Rtci_ReadRawDateAsync
|
||||
Rtci_ReadRawDateAsync: ; 0x02082ED8
|
||||
ldr ip, _02082EE4 ; =RtcSendPxiCommand
|
||||
mov r0, #0x11
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02082EE4: .word RtcSendPxiCommand
|
||||
arm_func_end Rtci_ReadRawDateAsync
|
||||
|
||||
arm_func_start Rtci_ReadRawTimeAsync
|
||||
Rtci_ReadRawTimeAsync: ; 0x02082EE8
|
||||
ldr ip, _02082EF4 ; =RtcSendPxiCommand
|
||||
mov r0, #0x12
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02082EF4: .word RtcSendPxiCommand
|
||||
arm_func_end Rtci_ReadRawTimeAsync
|
||||
|
||||
arm_func_start Rtci_WriteRawStatus2Async
|
||||
Rtci_WriteRawStatus2Async: ; 0x02082EF8
|
||||
ldr ip, _02082F04 ; =RtcSendPxiCommand
|
||||
mov r0, #0x27
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_02082F04: .word RtcSendPxiCommand
|
||||
arm_func_end Rtci_WriteRawStatus2Async
|
||||
|
||||
arm_func_start RtcSendPxiCommand
|
||||
RtcSendPxiCommand: ; 0x02082F08
|
||||
stmdb sp!, {r3, lr}
|
||||
mov r0, r0, lsl #8
|
||||
and r1, r0, #0x7f00
|
||||
mov r0, #5
|
||||
mov r2, #0
|
||||
bl PXI_SendWordByFifo
|
||||
cmp r0, #0
|
||||
movge r0, #1
|
||||
movlt r0, #0
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end RtcSendPxiCommand
|
||||
|
||||
@@ -8,7 +8,7 @@ SND_CommandInit: ; 0x0207CC70
|
||||
stmdb sp!, {r4, lr}
|
||||
bl InitPxi
|
||||
ldr lr, _0207CD2C ; =_022B9D00
|
||||
ldr r0, _0207CD30 ; =_022B9A20
|
||||
ldr r0, _0207CD30 ; =sReserveList
|
||||
mov r4, #0
|
||||
str lr, [r0]
|
||||
mov r0, #0x18
|
||||
@@ -27,7 +27,7 @@ _0207CCA8:
|
||||
mov r3, #0
|
||||
str r3, [r0, #0xac8]
|
||||
ldr r1, _0207CD38 ; =_022BB4E8
|
||||
ldr r2, _0207CD30 ; =_022B9A20
|
||||
ldr r2, _0207CD30 ; =sReserveList
|
||||
mov r0, #1
|
||||
str r1, [r2, #0x10]
|
||||
str r3, [r2, #8]
|
||||
@@ -37,7 +37,7 @@ _0207CCA8:
|
||||
str r3, [r2, #0x18]
|
||||
str r0, [r2, #0x20]
|
||||
ldr r0, _0207CD3C ; =_022B9A80
|
||||
ldr r1, _0207CD40 ; =_022BB560
|
||||
ldr r1, _0207CD40 ; =SNDi_SharedWork
|
||||
str r3, [r2, #4]
|
||||
str r0, [r1]
|
||||
bl Sndi_InitSharedWork
|
||||
@@ -46,7 +46,7 @@ _0207CCA8:
|
||||
cmp r0, #0
|
||||
ldmeqia sp!, {r4, pc}
|
||||
mov r2, #0x1d
|
||||
ldr r1, _0207CD40 ; =_022BB560
|
||||
ldr r1, _0207CD40 ; =SNDi_SharedWork
|
||||
str r2, [r0, #4]
|
||||
ldr r1, [r1]
|
||||
str r1, [r0, #8]
|
||||
@@ -56,11 +56,11 @@ _0207CCA8:
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207CD2C: .word _022B9D00
|
||||
_0207CD30: .word _022B9A20
|
||||
_0207CD30: .word sReserveList
|
||||
_0207CD34: .word _022BAA20
|
||||
_0207CD38: .word _022BB4E8
|
||||
_0207CD3C: .word _022B9A80
|
||||
_0207CD40: .word _022BB560
|
||||
_0207CD40: .word SNDi_SharedWork
|
||||
arm_func_end SND_CommandInit
|
||||
|
||||
arm_func_start Snd_RecvCommandReply
|
||||
@@ -72,7 +72,7 @@ Snd_RecvCommandReply: ; 0x0207CD44
|
||||
tst r5, #1
|
||||
beq _0207CDA0
|
||||
bl Sndi_GetFinishedCommandTag
|
||||
ldr r5, _0207CE4C ; =_022B9A20
|
||||
ldr r5, _0207CE4C ; =sReserveList
|
||||
ldr r1, [r5, #4]
|
||||
cmp r1, r0
|
||||
bne _0207CDC4
|
||||
@@ -91,7 +91,7 @@ _0207CD74:
|
||||
b _0207CDC4
|
||||
_0207CDA0:
|
||||
bl Sndi_GetFinishedCommandTag
|
||||
ldr r1, _0207CE4C ; =_022B9A20
|
||||
ldr r1, _0207CE4C ; =sReserveList
|
||||
ldr r1, [r1, #4]
|
||||
cmp r1, r0
|
||||
bne _0207CDC4
|
||||
@@ -100,7 +100,7 @@ _0207CDA0:
|
||||
mov r0, #0
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_0207CDC4:
|
||||
ldr r0, _0207CE4C ; =_022B9A20
|
||||
ldr r0, _0207CE4C ; =sReserveList
|
||||
ldr r2, _0207CE50 ; =_022B9A44
|
||||
ldr r3, [r0, #0x14]
|
||||
add r1, r3, #1
|
||||
@@ -119,12 +119,12 @@ _0207CDF8:
|
||||
cmp r0, #0
|
||||
bne _0207CDF8
|
||||
_0207CE08:
|
||||
ldr r0, _0207CE4C ; =_022B9A20
|
||||
ldr r0, _0207CE4C ; =sReserveList
|
||||
ldr r1, [r0, #0x10]
|
||||
cmp r1, #0
|
||||
strne r5, [r1]
|
||||
streq r5, [r0]
|
||||
ldr r1, _0207CE4C ; =_022B9A20
|
||||
ldr r1, _0207CE4C ; =sReserveList
|
||||
mov r0, r4
|
||||
str r2, [r1, #0x10]
|
||||
ldr r2, [r1, #0x1c]
|
||||
@@ -137,7 +137,7 @@ _0207CE08:
|
||||
mov r0, r5
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_0207CE4C: .word _022B9A20
|
||||
_0207CE4C: .word sReserveList
|
||||
_0207CE50: .word _022B9A44
|
||||
arm_func_end Snd_RecvCommandReply
|
||||
|
||||
@@ -188,7 +188,7 @@ Snd_PushCommand: ; 0x0207CEDC
|
||||
stmdb sp!, {r4, lr}
|
||||
mov r4, r0
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _0207CF10 ; =_022B9A20
|
||||
ldr r1, _0207CF10 ; =sReserveList
|
||||
ldr r2, [r1, #0xc]
|
||||
cmp r2, #0
|
||||
streq r4, [r1, #8]
|
||||
@@ -199,7 +199,7 @@ Snd_PushCommand: ; 0x0207CEDC
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207CF10: .word _022B9A20
|
||||
_0207CF10: .word sReserveList
|
||||
arm_func_end Snd_PushCommand
|
||||
|
||||
arm_func_start Snd_FlushCommand
|
||||
@@ -207,7 +207,7 @@ Snd_FlushCommand: ; 0x0207CF14
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
|
||||
mov sl, r0
|
||||
bl EnableIrqFlag
|
||||
ldr r4, _0207D0C4 ; =_022B9A20
|
||||
ldr r4, _0207D0C4 ; =sReserveList
|
||||
mov sb, r0
|
||||
ldr r1, [r4, #8]
|
||||
cmp r1, #0
|
||||
@@ -232,7 +232,7 @@ _0207CF64:
|
||||
ldr r0, [r4, #0x1c]
|
||||
cmp r0, #8
|
||||
bge _0207CF64
|
||||
ldr r0, _0207D0C4 ; =_022B9A20
|
||||
ldr r0, _0207D0C4 ; =sReserveList
|
||||
ldr r0, [r0, #8]
|
||||
cmp r0, #0
|
||||
bne _0207CF98
|
||||
@@ -244,7 +244,7 @@ _0207CF98:
|
||||
ldr r0, _0207D0C8 ; =_022B9D00
|
||||
mov r1, #0x1800
|
||||
bl DC_FlushRange
|
||||
ldr r1, _0207D0C4 ; =_022B9A20
|
||||
ldr r1, _0207D0C4 ; =sReserveList
|
||||
mov r0, #7
|
||||
ldr r1, [r1, #8]
|
||||
mov r2, #0
|
||||
@@ -263,7 +263,7 @@ _0207CFD8:
|
||||
mov r8, fp
|
||||
ldr r7, _0207D0C8 ; =_022B9D00
|
||||
mov r6, #0x1800
|
||||
ldr r4, _0207D0C4 ; =_022B9A20
|
||||
ldr r4, _0207D0C4 ; =sReserveList
|
||||
b _0207D034
|
||||
_0207CFF4:
|
||||
mov r0, sb
|
||||
@@ -293,7 +293,7 @@ _0207D034:
|
||||
cmp r0, #0
|
||||
blt _0207CFF4
|
||||
_0207D058:
|
||||
ldr r0, _0207D0C4 ; =_022B9A20
|
||||
ldr r0, _0207D0C4 ; =sReserveList
|
||||
ldr r2, _0207D0CC ; =_022B9A44
|
||||
ldr r3, [r0, #0x18]
|
||||
ldr r4, [r0, #8]
|
||||
@@ -303,7 +303,7 @@ _0207D058:
|
||||
cmp r1, #8
|
||||
movgt r1, #0
|
||||
strgt r1, [r0, #0x18]
|
||||
ldr r1, _0207D0C4 ; =_022B9A20
|
||||
ldr r1, _0207D0C4 ; =sReserveList
|
||||
mov r0, #0
|
||||
str r0, [r1, #8]
|
||||
str r0, [r1, #0xc]
|
||||
@@ -322,7 +322,7 @@ _0207D0BC:
|
||||
mov r0, #1
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
.align 2, 0
|
||||
_0207D0C4: .word _022B9A20
|
||||
_0207D0C4: .word sReserveList
|
||||
_0207D0C8: .word _022B9D00
|
||||
_0207D0CC: .word _022B9A44
|
||||
arm_func_end Snd_FlushCommand
|
||||
@@ -364,7 +364,7 @@ _0207D120:
|
||||
Snd_GetCurrentCommandTag: ; 0x0207D13C
|
||||
stmdb sp!, {r4, lr}
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _0207D164 ; =_022B9A20
|
||||
ldr r1, _0207D164 ; =sReserveList
|
||||
ldr r2, [r1, #8]
|
||||
cmp r2, #0
|
||||
ldreq r4, [r1, #4]
|
||||
@@ -373,7 +373,7 @@ Snd_GetCurrentCommandTag: ; 0x0207D13C
|
||||
mov r0, r4
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207D164: .word _022B9A20
|
||||
_0207D164: .word sReserveList
|
||||
arm_func_end Snd_GetCurrentCommandTag
|
||||
|
||||
arm_func_start Snd_IsFinishedCommandTag
|
||||
@@ -381,7 +381,7 @@ Snd_IsFinishedCommandTag: ; 0x0207D168
|
||||
stmdb sp!, {r4, lr}
|
||||
mov r4, r0
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _0207D1B4 ; =_022B9A20
|
||||
ldr r1, _0207D1B4 ; =sReserveList
|
||||
ldr r1, [r1, #4]
|
||||
cmp r4, r1
|
||||
bls _0207D198
|
||||
@@ -400,14 +400,14 @@ _0207D1A8:
|
||||
mov r0, r4
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207D1B4: .word _022B9A20
|
||||
_0207D1B4: .word sReserveList
|
||||
arm_func_end Snd_IsFinishedCommandTag
|
||||
|
||||
arm_func_start Snd_CountFreeCommand
|
||||
Snd_CountFreeCommand: ; 0x0207D1B8
|
||||
stmdb sp!, {r4, lr}
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _0207D1F0 ; =_022B9A20
|
||||
ldr r1, _0207D1F0 ; =sReserveList
|
||||
mov r4, #0
|
||||
ldr r1, [r1]
|
||||
cmp r1, #0
|
||||
@@ -422,14 +422,14 @@ _0207D1E4:
|
||||
mov r0, r4
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207D1F0: .word _022B9A20
|
||||
_0207D1F0: .word sReserveList
|
||||
arm_func_end Snd_CountFreeCommand
|
||||
|
||||
arm_func_start Snd_CountReservedCommand
|
||||
Snd_CountReservedCommand: ; 0x0207D1F4
|
||||
stmdb sp!, {r4, lr}
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _0207D22C ; =_022B9A20
|
||||
ldr r1, _0207D22C ; =sReserveList
|
||||
mov r4, #0
|
||||
ldr r1, [r1, #8]
|
||||
cmp r1, #0
|
||||
@@ -444,7 +444,7 @@ _0207D220:
|
||||
mov r0, r4
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207D22C: .word _022B9A20
|
||||
_0207D22C: .word sReserveList
|
||||
arm_func_end Snd_CountReservedCommand
|
||||
|
||||
arm_func_start Snd_CountWaitingCommand
|
||||
@@ -520,7 +520,7 @@ _0207D2DC:
|
||||
AllocCommand: ; 0x0207D2F8
|
||||
stmdb sp!, {r4, lr}
|
||||
bl EnableIrqFlag
|
||||
ldr r1, _0207D33C ; =_022B9A20
|
||||
ldr r1, _0207D33C ; =sReserveList
|
||||
ldr r4, [r1]
|
||||
cmp r4, #0
|
||||
bne _0207D31C
|
||||
@@ -537,7 +537,7 @@ _0207D31C:
|
||||
mov r0, r4
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_0207D33C: .word _022B9A20
|
||||
_0207D33C: .word sReserveList
|
||||
arm_func_end AllocCommand
|
||||
|
||||
arm_func_start IsCommandAvailable
|
||||
|
||||
@@ -1,44 +0,0 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/nitro.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start SND_Init
|
||||
SND_Init: ; 0x0207CC10
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r1, _0207CC40 ; =_022B99EC
|
||||
ldr r0, [r1]
|
||||
cmp r0, #0
|
||||
ldmneia sp!, {r3, pc}
|
||||
ldr r0, _0207CC44 ; =_022B99F0
|
||||
mov r2, #1
|
||||
str r2, [r1]
|
||||
bl OS_InitMutex
|
||||
bl SND_CommandInit
|
||||
bl Snd_AlarmInit
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207CC40: .word _022B99EC
|
||||
_0207CC44: .word _022B99F0
|
||||
arm_func_end SND_Init
|
||||
|
||||
arm_func_start Sndi_LockMutex
|
||||
Sndi_LockMutex: ; 0x0207CC48
|
||||
ldr ip, _0207CC54 ; =OS_LockMutex
|
||||
ldr r0, _0207CC58 ; =_022B99F0
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_0207CC54: .word OS_LockMutex
|
||||
_0207CC58: .word _022B99F0
|
||||
arm_func_end Sndi_LockMutex
|
||||
|
||||
arm_func_start Sndi_UnlockMutex
|
||||
Sndi_UnlockMutex: ; 0x0207CC5C
|
||||
ldr ip, _0207CC68 ; =OS_UnlockMutex
|
||||
ldr r0, _0207CC6C ; =_022B99F0
|
||||
bx ip
|
||||
.align 2, 0
|
||||
_0207CC68: .word OS_UnlockMutex
|
||||
_0207CC6C: .word _022B99F0
|
||||
arm_func_end Sndi_UnlockMutex
|
||||
|
||||
@@ -1,40 +0,0 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "include/nitro.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start Snd_CalcChannelVolume
|
||||
Snd_CalcChannelVolume: ; 0x0207D540
|
||||
ldr r1, _0207D5A8 ; =0xFFFFFD2D
|
||||
cmp r0, r1
|
||||
movlt r0, r1
|
||||
blt _0207D558
|
||||
cmp r0, #0
|
||||
movgt r0, #0
|
||||
_0207D558:
|
||||
add r1, r0, #0xd3
|
||||
mvn r2, #0xef
|
||||
cmp r0, r2
|
||||
ldr r3, _0207D5AC ; =ARM9_UNKNOWN_TABLE__NA_20AE924
|
||||
add r1, r1, #0x200
|
||||
ldrb r3, [r3, r1]
|
||||
movlt r0, #3
|
||||
blt _0207D598
|
||||
add r1, r2, #0x78
|
||||
cmp r0, r1
|
||||
movlt r0, #2
|
||||
blt _0207D598
|
||||
add r1, r2, #0xb4
|
||||
cmp r0, r1
|
||||
movlt r0, #1
|
||||
movge r0, #0
|
||||
_0207D598:
|
||||
orr r0, r3, r0, lsl #8
|
||||
mov r0, r0, lsl #0x10
|
||||
mov r0, r0, lsr #0x10
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_0207D5A8: .word 0xFFFFFD2D
|
||||
_0207D5AC: .word ARM9_UNKNOWN_TABLE__NA_20AE924
|
||||
arm_func_end Snd_CalcChannelVolume
|
||||
|
||||
@@ -6,48 +6,48 @@
|
||||
arm_func_start Snd_GetPlayerStatus
|
||||
Snd_GetPlayerStatus: ; 0x0207D444
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r0, _0207D46C ; =_022BB560
|
||||
ldr r0, _0207D46C ; =SNDi_SharedWork
|
||||
mov r1, #4
|
||||
ldr r0, [r0]
|
||||
add r0, r0, #4
|
||||
bl DC_InvalidateRange
|
||||
ldr r0, _0207D46C ; =_022BB560
|
||||
ldr r0, _0207D46C ; =SNDi_SharedWork
|
||||
ldr r0, [r0]
|
||||
ldr r0, [r0, #4]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207D46C: .word _022BB560
|
||||
_0207D46C: .word SNDi_SharedWork
|
||||
arm_func_end Snd_GetPlayerStatus
|
||||
|
||||
arm_func_start Snd_GetChannelStatus
|
||||
Snd_GetChannelStatus: ; 0x0207D470
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r0, _0207D498 ; =_022BB560
|
||||
ldr r0, _0207D498 ; =SNDi_SharedWork
|
||||
mov r1, #2
|
||||
ldr r0, [r0]
|
||||
add r0, r0, #8
|
||||
bl DC_InvalidateRange
|
||||
ldr r0, _0207D498 ; =_022BB560
|
||||
ldr r0, _0207D498 ; =SNDi_SharedWork
|
||||
ldr r0, [r0]
|
||||
ldrh r0, [r0, #8]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207D498: .word _022BB560
|
||||
_0207D498: .word SNDi_SharedWork
|
||||
arm_func_end Snd_GetChannelStatus
|
||||
|
||||
arm_func_start Sndi_GetFinishedCommandTag
|
||||
Sndi_GetFinishedCommandTag: ; 0x0207D49C
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r0, _0207D4C0 ; =_022BB560
|
||||
ldr r0, _0207D4C0 ; =SNDi_SharedWork
|
||||
mov r1, #4
|
||||
ldr r0, [r0]
|
||||
bl DC_InvalidateRange
|
||||
ldr r0, _0207D4C0 ; =_022BB560
|
||||
ldr r0, _0207D4C0 ; =SNDi_SharedWork
|
||||
ldr r0, [r0]
|
||||
ldr r0, [r0]
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_0207D4C0: .word _022BB560
|
||||
_0207D4C0: .word SNDi_SharedWork
|
||||
arm_func_end Sndi_GetFinishedCommandTag
|
||||
|
||||
arm_func_start Sndi_InitSharedWork
|
||||
|
||||
1025
lib/NitroSDK/asm/spi_pm.s
Normal file
1025
lib/NitroSDK/asm/spi_pm.s
Normal file
File diff suppressed because it is too large
Load Diff
793
lib/NitroSDK/asm/spi_tp.s
Normal file
793
lib/NitroSDK/asm/spi_tp.s
Normal file
@@ -0,0 +1,793 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start TPi_TpCallback
|
||||
TPi_TpCallback: ; 0x02080F6C
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, lr}
|
||||
sub sp, sp, #8
|
||||
mov r0, r1, lsl #0x10
|
||||
mov r3, r0, lsr #0x10
|
||||
and r0, r3, #0x7f00
|
||||
mov r0, r0, lsl #8
|
||||
cmp r2, #0
|
||||
mov r0, r0, lsr #0x10
|
||||
beq _02080FC8
|
||||
ldr r1, _020811E4 ; =_022BB670
|
||||
mov r2, #1
|
||||
ldrh r3, [r1, #0x38]
|
||||
orr r2, r3, r2, lsl r0
|
||||
strh r2, [r1, #0x38]
|
||||
ldr r3, [r1, #4]
|
||||
cmp r3, #0
|
||||
addeq sp, sp, #8
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
mov r1, #4
|
||||
mov r2, #0
|
||||
blx r3
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
_02080FC8:
|
||||
cmp r0, #0x10
|
||||
bne _02081080
|
||||
ldr r1, _020811E4 ; =_022BB670
|
||||
ldrh r2, [r1, #0x10]
|
||||
add r2, r2, #1
|
||||
strh r2, [r1, #0x10]
|
||||
ldrh r3, [r1, #0x10]
|
||||
ldrh r2, [r1, #0x18]
|
||||
cmp r3, r2
|
||||
movhs r2, #0
|
||||
strhsh r2, [r1, #0x10]
|
||||
ldr r2, _020811E8 ; =0x027FFFAA
|
||||
ldr r1, _020811E4 ; =_022BB670
|
||||
ldrh r3, [r2]
|
||||
ldrh r2, [r2, #2]
|
||||
ldrh lr, [r1, #0x10]
|
||||
strh r3, [sp, #4]
|
||||
strh r2, [sp, #6]
|
||||
ldr r5, [sp, #4]
|
||||
ldr r7, [r1, #0x14]
|
||||
mov r2, r5, lsl #7
|
||||
mov r3, r2, lsr #0x1f
|
||||
mov r4, r5, lsl #8
|
||||
mov r2, r5, lsl #5
|
||||
mov ip, r5, lsl #0x14
|
||||
mov r2, r2, lsr #0x1e
|
||||
mov r6, lr, lsl #3
|
||||
mov r5, ip, lsr #0x14
|
||||
strh r5, [r7, r6]
|
||||
add r5, r7, lr, lsl #3
|
||||
mov r4, r4, lsr #0x14
|
||||
strh r4, [r5, #2]
|
||||
and r3, r3, #0xff
|
||||
strh r3, [r5, #4]
|
||||
and r2, r2, #0xff
|
||||
strh r2, [r5, #6]
|
||||
ldr r3, [r1, #4]
|
||||
cmp r3, #0
|
||||
addeq sp, sp, #8
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
ldrh r2, [r1, #0x10]
|
||||
mov r1, #0
|
||||
and r2, r2, #0xff
|
||||
blx r3
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
_02081080:
|
||||
tst r1, #0x1000000
|
||||
addeq sp, sp, #8
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
and r1, r3, #0xff
|
||||
cmp r1, #4
|
||||
addls pc, pc, r1, lsl #2
|
||||
b _020811D8
|
||||
_0208109C: ; jump table
|
||||
b _020810B0 ; case 0
|
||||
b _020811D8 ; case 1
|
||||
b _02081184 ; case 2
|
||||
b _0208118C ; case 3
|
||||
b _0208117C ; case 4
|
||||
_020810B0:
|
||||
cmp r0, #0
|
||||
beq _020810D4
|
||||
cmp r0, #1
|
||||
beq _02081134
|
||||
cmp r0, #2
|
||||
ldreq r1, _020811E4 ; =_022BB670
|
||||
moveq r2, #0
|
||||
streqh r2, [r1, #0x36]
|
||||
b _02081140
|
||||
_020810D4:
|
||||
ldr r2, _020811E8 ; =0x027FFFAA
|
||||
ldr r1, _020811E4 ; =_022BB670
|
||||
ldrh r4, [r2]
|
||||
ldrh r3, [r2, #2]
|
||||
mov r2, #0
|
||||
strh r4, [sp]
|
||||
strh r3, [sp, #2]
|
||||
ldr r4, [sp]
|
||||
mov r3, r4, lsl #0x14
|
||||
mov r5, r3, lsr #0x14
|
||||
mov lr, r4, lsl #8
|
||||
mov r3, r4, lsl #7
|
||||
mov ip, r3, lsr #0x1f
|
||||
mov r3, r4, lsl #5
|
||||
mov r3, r3, lsr #0x1e
|
||||
strh r5, [r1, #8]
|
||||
mov lr, lr, lsr #0x14
|
||||
strh lr, [r1, #0xa]
|
||||
and ip, ip, #0xff
|
||||
strh ip, [r1, #0xc]
|
||||
and r3, r3, #0xff
|
||||
strh r3, [r1, #0xe]
|
||||
strh r2, [r1, #0x36]
|
||||
b _02081140
|
||||
_02081134:
|
||||
ldr r1, _020811E4 ; =_022BB670
|
||||
mov r2, #2
|
||||
strh r2, [r1, #0x36]
|
||||
_02081140:
|
||||
ldr r1, _020811E4 ; =_022BB670
|
||||
mov r2, #1
|
||||
ldrh r3, [r1, #0x3a]
|
||||
mvn r2, r2, lsl r0
|
||||
and r2, r3, r2
|
||||
strh r2, [r1, #0x3a]
|
||||
ldr r3, [r1, #4]
|
||||
cmp r3, #0
|
||||
addeq sp, sp, #8
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
mov r1, #0
|
||||
mov r2, r1
|
||||
blx r3
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
_0208117C:
|
||||
mov r4, #3
|
||||
b _02081190
|
||||
_02081184:
|
||||
mov r4, #1
|
||||
b _02081190
|
||||
_0208118C:
|
||||
mov r4, #2
|
||||
_02081190:
|
||||
ldr r1, _020811E4 ; =_022BB670
|
||||
mov ip, #1
|
||||
ldrh r3, [r1, #0x38]
|
||||
mvn r2, ip, lsl r0
|
||||
orr r3, r3, ip, lsl r0
|
||||
strh r3, [r1, #0x38]
|
||||
ldrh r3, [r1, #0x3a]
|
||||
and r2, r3, r2
|
||||
strh r2, [r1, #0x3a]
|
||||
ldr r3, [r1, #4]
|
||||
cmp r3, #0
|
||||
addeq sp, sp, #8
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
and r1, r4, #0xff
|
||||
mov r2, #0
|
||||
blx r3
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
_020811D8:
|
||||
bl WaitForever2
|
||||
add sp, sp, #8
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
||||
.align 2, 0
|
||||
_020811E4: .word _022BB670
|
||||
_020811E8: .word 0x027FFFAA
|
||||
arm_func_end TPi_TpCallback
|
||||
|
||||
arm_func_start TP_Init
|
||||
TP_Init: ; 0x020811EC
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr r0, _0208125C ; =_022BB670
|
||||
ldrh r1, [r0]
|
||||
cmp r1, #0
|
||||
ldmneia sp!, {r3, r4, r5, pc}
|
||||
mov r1, #1
|
||||
strh r1, [r0]
|
||||
bl PXI_Init
|
||||
ldr r0, _0208125C ; =_022BB670
|
||||
mov r1, #0
|
||||
strh r1, [r0, #0x10]
|
||||
str r1, [r0, #4]
|
||||
str r1, [r0, #0x14]
|
||||
strh r1, [r0, #0x36]
|
||||
strh r1, [r0, #0x34]
|
||||
strh r1, [r0, #0x3a]
|
||||
strh r1, [r0, #0x38]
|
||||
mov r5, #6
|
||||
mov r4, #1
|
||||
_02081238:
|
||||
mov r0, r5
|
||||
mov r1, r4
|
||||
bl PXI_IsCallbackReady
|
||||
cmp r0, #0
|
||||
beq _02081238
|
||||
ldr r1, _02081260 ; =_02080F6C
|
||||
mov r0, #6
|
||||
bl PXI_SetFifoRecvCallback
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_0208125C: .word _022BB670
|
||||
_02081260: .word TPi_TpCallback
|
||||
arm_func_end TP_Init
|
||||
|
||||
arm_func_start TP_GetUserInfo
|
||||
TP_GetUserInfo: ; 0x02081264
|
||||
stmdb sp!, {r3, r4, r5, r6, lr}
|
||||
sub sp, sp, #0x14
|
||||
ldr ip, _020812F4 ; =0x027FFC80
|
||||
mov r4, r0
|
||||
ldrh r1, [ip, #0x58]
|
||||
ldrh r2, [ip, #0x5a]
|
||||
ldrh r0, [ip, #0x5e]
|
||||
cmp r1, #0
|
||||
ldrh lr, [ip, #0x60]
|
||||
cmpeq r0, #0
|
||||
cmpeq r2, #0
|
||||
ldrb r3, [ip, #0x5c]
|
||||
ldrb r5, [ip, #0x5d]
|
||||
ldrb r6, [ip, #0x62]
|
||||
ldrb ip, [ip, #0x63]
|
||||
cmpeq lr, #0
|
||||
beq _020812C8
|
||||
str r5, [sp]
|
||||
stmib sp, {r0, lr}
|
||||
str r6, [sp, #0xc]
|
||||
mov r0, r4
|
||||
str ip, [sp, #0x10]
|
||||
bl TP_CalcCalibrateParam
|
||||
cmp r0, #0
|
||||
beq _020812E8
|
||||
_020812C8:
|
||||
mov r0, #0
|
||||
strh r0, [r4]
|
||||
strh r0, [r4, #2]
|
||||
strh r0, [r4, #4]
|
||||
strh r0, [r4, #6]
|
||||
add sp, sp, #0x14
|
||||
mov r0, #1
|
||||
ldmia sp!, {r3, r4, r5, r6, pc}
|
||||
_020812E8:
|
||||
mov r0, #1
|
||||
add sp, sp, #0x14
|
||||
ldmia sp!, {r3, r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_020812F4: .word 0x027FFC80
|
||||
arm_func_end TP_GetUserInfo
|
||||
|
||||
arm_func_start TP_SetCalibrateParam
|
||||
TP_SetCalibrateParam: ; 0x020812F8
|
||||
stmdb sp!, {r4, lr}
|
||||
movs r4, r0
|
||||
bne _02081314
|
||||
ldr r0, _02081414 ; =_022BB670
|
||||
mov r1, #0
|
||||
strh r1, [r0, #0x34]
|
||||
ldmia sp!, {r4, pc}
|
||||
_02081314:
|
||||
bl EnableIrqFlag
|
||||
ldrsh r2, [r4, #4]
|
||||
cmp r2, #0
|
||||
beq _02081378
|
||||
ldr r3, _02081418 ; =0x04000280
|
||||
mov r1, #0
|
||||
strh r1, [r3]
|
||||
mov r1, #0x10000000
|
||||
str r1, [r3, #0x10]
|
||||
str r2, [r3, #0x18]
|
||||
mov r1, #0
|
||||
str r1, [r3, #0x1c]
|
||||
ldrsh r2, [r4]
|
||||
ldr r1, _02081414 ; =_022BB670
|
||||
str r2, [r1, #0x1c]
|
||||
ldrsh r2, [r4, #4]
|
||||
str r2, [r1, #0x20]
|
||||
_02081358:
|
||||
ldrh r1, [r3]
|
||||
tst r1, #0x8000
|
||||
bne _02081358
|
||||
ldr r2, _0208141C ; =0x040002A0
|
||||
ldr r1, _02081414 ; =_022BB670
|
||||
ldr r2, [r2]
|
||||
str r2, [r1, #0x24]
|
||||
b _0208138C
|
||||
_02081378:
|
||||
ldr r1, _02081414 ; =_022BB670
|
||||
mov r2, #0
|
||||
str r2, [r1, #0x1c]
|
||||
str r2, [r1, #0x20]
|
||||
str r2, [r1, #0x24]
|
||||
_0208138C:
|
||||
ldrsh r2, [r4, #6]
|
||||
cmp r2, #0
|
||||
beq _020813EC
|
||||
ldr r3, _02081418 ; =0x04000280
|
||||
mov r1, #0
|
||||
strh r1, [r3]
|
||||
mov r1, #0x10000000
|
||||
str r1, [r3, #0x10]
|
||||
str r2, [r3, #0x18]
|
||||
mov r1, #0
|
||||
str r1, [r3, #0x1c]
|
||||
ldrsh r2, [r4, #2]
|
||||
ldr r1, _02081414 ; =_022BB670
|
||||
str r2, [r1, #0x28]
|
||||
ldrsh r2, [r4, #6]
|
||||
str r2, [r1, #0x2c]
|
||||
_020813CC:
|
||||
ldrh r1, [r3]
|
||||
tst r1, #0x8000
|
||||
bne _020813CC
|
||||
ldr r2, _0208141C ; =0x040002A0
|
||||
ldr r1, _02081414 ; =_022BB670
|
||||
ldr r2, [r2]
|
||||
str r2, [r1, #0x30]
|
||||
b _02081400
|
||||
_020813EC:
|
||||
ldr r1, _02081414 ; =_022BB670
|
||||
mov r2, #0
|
||||
str r2, [r1, #0x28]
|
||||
str r2, [r1, #0x2c]
|
||||
str r2, [r1, #0x30]
|
||||
_02081400:
|
||||
bl SetIrqFlag
|
||||
ldr r0, _02081414 ; =_022BB670
|
||||
mov r1, #1
|
||||
strh r1, [r0, #0x34]
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_02081414: .word _022BB670
|
||||
_02081418: .word 0x04000280
|
||||
_0208141C: .word 0x040002A0
|
||||
arm_func_end TP_SetCalibrateParam
|
||||
|
||||
arm_func_start TP_RequestSamplingAsync
|
||||
TP_RequestSamplingAsync: ; 0x02081420
|
||||
stmdb sp!, {r4, lr}
|
||||
bl EnableIrqFlag
|
||||
mov r4, r0
|
||||
mov r0, #6
|
||||
mov r1, #0x3000000
|
||||
mov r2, #0
|
||||
bl PXI_SendWordByFifo
|
||||
cmp r0, #0
|
||||
movge r0, #1
|
||||
movlt r0, #0
|
||||
cmp r0, #0
|
||||
bne _02081488
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
ldr r0, _020814B0 ; =_022BB670
|
||||
ldrh r1, [r0, #0x38]
|
||||
orr r1, r1, #1
|
||||
strh r1, [r0, #0x38]
|
||||
ldr r3, [r0, #4]
|
||||
cmp r3, #0
|
||||
ldmeqia sp!, {r4, pc}
|
||||
mov r0, #0
|
||||
mov r2, r0
|
||||
mov r1, #4
|
||||
blx r3
|
||||
ldmia sp!, {r4, pc}
|
||||
_02081488:
|
||||
ldr r1, _020814B0 ; =_022BB670
|
||||
mov r0, r4
|
||||
ldrh r2, [r1, #0x3a]
|
||||
orr r2, r2, #1
|
||||
strh r2, [r1, #0x3a]
|
||||
ldrh r2, [r1, #0x38]
|
||||
bic r2, r2, #1
|
||||
strh r2, [r1, #0x38]
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_020814B0: .word _022BB670
|
||||
arm_func_end TP_RequestSamplingAsync
|
||||
|
||||
arm_func_start TP_GetCalibratedResult
|
||||
TP_GetCalibratedResult: ; 0x020814B4
|
||||
stmdb sp!, {r3, lr}
|
||||
ldr r2, _020814FC ; =_022BB670
|
||||
ldrh r1, [r2, #0x38]
|
||||
tst r1, #1
|
||||
movne r0, #1
|
||||
ldmneia sp!, {r3, pc}
|
||||
ldrh ip, [r2, #8]
|
||||
ldrh r3, [r2, #0xa]
|
||||
mov r1, r0
|
||||
strh ip, [r0]
|
||||
strh r3, [r0, #2]
|
||||
ldrh r3, [r2, #0xc]
|
||||
ldrh r2, [r2, #0xe]
|
||||
strh r3, [r0, #4]
|
||||
strh r2, [r0, #6]
|
||||
bl TP_GetCalibratedPoint
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, pc}
|
||||
.align 2, 0
|
||||
_020814FC: .word _022BB670
|
||||
arm_func_end TP_GetCalibratedResult
|
||||
|
||||
arm_func_start TP_WaitCalibratedResult
|
||||
TP_WaitCalibratedResult: ; 0x02081500
|
||||
stmdb sp!, {r4, lr}
|
||||
mov r4, r0
|
||||
mov r0, #1
|
||||
bl TP_WaitBusy
|
||||
mov r0, r4
|
||||
bl TP_GetCalibratedResult
|
||||
ldmia sp!, {r4, pc}
|
||||
arm_func_end TP_WaitCalibratedResult
|
||||
|
||||
arm_func_start TP_RequestAutoSamplingStartAsync
|
||||
TP_RequestAutoSamplingStartAsync: ; 0x0208151C
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
ldr ip, _02081618 ; =_022BB670
|
||||
mov lr, #0
|
||||
str r2, [ip, #0x14]
|
||||
mov r5, r1
|
||||
strh lr, [ip, #0x10]
|
||||
strh r5, [ip, #0x12]
|
||||
mov r4, r0
|
||||
strh r3, [ip, #0x18]
|
||||
cmp r3, #0
|
||||
bls _02081564
|
||||
mov r1, lr
|
||||
_0208154C:
|
||||
ldr r0, [ip, #0x14]
|
||||
add r0, r0, lr, lsl #3
|
||||
add lr, lr, #1
|
||||
strh r1, [r0, #4]
|
||||
cmp lr, r3
|
||||
blo _0208154C
|
||||
_02081564:
|
||||
bl EnableIrqFlag
|
||||
and r1, r5, #0xff
|
||||
orr r1, r1, #0x100
|
||||
mov r5, r0
|
||||
orr r1, r1, #0x2000000
|
||||
mov r0, #6
|
||||
mov r2, #0
|
||||
bl PXI_SendWordByFifo
|
||||
cmp r0, #0
|
||||
movlt r0, #0
|
||||
blt _020815B0
|
||||
orr r1, r4, #0x10000
|
||||
orr r1, r1, #0x1000000
|
||||
mov r0, #6
|
||||
mov r2, #0
|
||||
bl PXI_SendWordByFifo
|
||||
cmp r0, #0
|
||||
movlt r0, #0
|
||||
movge r0, #1
|
||||
_020815B0:
|
||||
tst r0, #0xff
|
||||
bne _020815F0
|
||||
mov r0, r5
|
||||
bl SetIrqFlag
|
||||
ldr r0, _02081618 ; =_022BB670
|
||||
ldrh r1, [r0, #0x38]
|
||||
orr r1, r1, #2
|
||||
strh r1, [r0, #0x38]
|
||||
ldr r3, [r0, #4]
|
||||
cmp r3, #0
|
||||
ldmeqia sp!, {r3, r4, r5, pc}
|
||||
mov r0, #1
|
||||
mov r1, #4
|
||||
mov r2, #0
|
||||
blx r3
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
_020815F0:
|
||||
ldr r1, _02081618 ; =_022BB670
|
||||
mov r0, r5
|
||||
ldrh r2, [r1, #0x3a]
|
||||
orr r2, r2, #2
|
||||
strh r2, [r1, #0x3a]
|
||||
ldrh r2, [r1, #0x38]
|
||||
bic r2, r2, #2
|
||||
strh r2, [r1, #0x38]
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
.align 2, 0
|
||||
_02081618: .word _022BB670
|
||||
arm_func_end TP_RequestAutoSamplingStartAsync
|
||||
|
||||
arm_func_start sub_0208161C
|
||||
sub_0208161C: ; 0x0208161C
|
||||
stmdb sp!, {r4, lr}
|
||||
bl EnableIrqFlag
|
||||
mov r4, r0
|
||||
ldr r1, _020816AC ; =0x03000200
|
||||
mov r0, #6
|
||||
mov r2, #0
|
||||
bl PXI_SendWordByFifo
|
||||
cmp r0, #0
|
||||
movge r0, #1
|
||||
movlt r0, #0
|
||||
cmp r0, #0
|
||||
bne _02081684
|
||||
mov r0, r4
|
||||
bl SetIrqFlag
|
||||
ldr r0, _020816B0 ; =_022BB670
|
||||
ldrh r1, [r0, #0x38]
|
||||
orr r1, r1, #4
|
||||
strh r1, [r0, #0x38]
|
||||
ldr r3, [r0, #4]
|
||||
cmp r3, #0
|
||||
ldmeqia sp!, {r4, pc}
|
||||
mov r0, #2
|
||||
mov r1, #4
|
||||
mov r2, #0
|
||||
blx r3
|
||||
ldmia sp!, {r4, pc}
|
||||
_02081684:
|
||||
ldr r1, _020816B0 ; =_022BB670
|
||||
mov r0, r4
|
||||
ldrh r2, [r1, #0x3a]
|
||||
orr r2, r2, #4
|
||||
strh r2, [r1, #0x3a]
|
||||
ldrh r2, [r1, #0x38]
|
||||
bic r2, r2, #4
|
||||
strh r2, [r1, #0x38]
|
||||
bl SetIrqFlag
|
||||
ldmia sp!, {r4, pc}
|
||||
.align 2, 0
|
||||
_020816AC: .word 0x03000200
|
||||
_020816B0: .word _022BB670
|
||||
arm_func_end sub_0208161C
|
||||
|
||||
arm_func_start TP_GetLatestIndexInAuto
|
||||
TP_GetLatestIndexInAuto: ; 0x020816B4
|
||||
ldr r0, _020816C0 ; =_022BB670
|
||||
ldrh r0, [r0, #0x10]
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_020816C0: .word _022BB670
|
||||
arm_func_end TP_GetLatestIndexInAuto
|
||||
|
||||
arm_func_start TP_CalcCalibrateParam
|
||||
TP_CalcCalibrateParam: ; 0x020816C4
|
||||
stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
|
||||
mov sb, r1
|
||||
mov r8, r2
|
||||
cmp sb, #0x1000
|
||||
cmplo r8, #0x1000
|
||||
ldrloh r4, [sp, #0x2c]
|
||||
mov r7, r3
|
||||
mov sl, r0
|
||||
cmplo r4, #0x1000
|
||||
ldrloh r3, [sp, #0x30]
|
||||
cmplo r3, #0x1000
|
||||
movhs r0, #1
|
||||
ldmhsia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
cmp r7, #0x100
|
||||
ldrloh r2, [sp, #0x34]
|
||||
cmplo r2, #0x100
|
||||
ldrloh r1, [sp, #0x28]
|
||||
cmplo r1, #0xc0
|
||||
ldrloh r0, [sp, #0x38]
|
||||
cmplo r0, #0xc0
|
||||
movhs r0, #1
|
||||
ldmhsia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
cmp r7, r2
|
||||
cmpne r1, r0
|
||||
cmpne sb, r4
|
||||
cmpne r8, r3
|
||||
moveq r0, #1
|
||||
ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
bl EnableIrqFlag
|
||||
ldrh lr, [sp, #0x2c]
|
||||
ldrh ip, [sp, #0x34]
|
||||
ldr r3, _020818A8 ; =0x04000280
|
||||
sub r1, sb, lr
|
||||
mov r2, #0
|
||||
ldrh r4, [sp, #0x38]
|
||||
ldrh r5, [sp, #0x28]
|
||||
ldrh r6, [sp, #0x30]
|
||||
strh r2, [r3]
|
||||
mov r1, r1, lsl #8
|
||||
str r1, [r3, #0x10]
|
||||
sub r1, r7, ip
|
||||
str r1, [r3, #0x18]
|
||||
mov r1, r2
|
||||
sub r2, r5, r4
|
||||
str r1, [r3, #0x1c]
|
||||
sub r1, r8, r6
|
||||
str r2, [sp]
|
||||
_02081780:
|
||||
ldrh r2, [r3]
|
||||
tst r2, #0x8000
|
||||
bne _02081780
|
||||
mov fp, r1, lsl #8
|
||||
ldr r1, _020818AC ; =0x040002A0
|
||||
ldr r2, [r1]
|
||||
mov r1, #0
|
||||
strh r1, [r3]
|
||||
ldr r1, _020818AC ; =0x040002A0
|
||||
cmp r2, #0x8000
|
||||
str fp, [r1, #-0x10]
|
||||
sub r3, r1, #8
|
||||
ldr r1, [sp]
|
||||
mov fp, #0
|
||||
stmia r3, {r1, fp}
|
||||
bge _020817D0
|
||||
mov r1, fp
|
||||
sub r1, r1, #0x8000
|
||||
cmp r2, r1
|
||||
bge _020817DC
|
||||
_020817D0:
|
||||
bl SetIrqFlag
|
||||
mov r0, #1
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
_020817DC:
|
||||
strh r2, [sl, #4]
|
||||
ldrsh r2, [sl, #4]
|
||||
add r1, r7, ip
|
||||
add r3, sb, lr
|
||||
mul r1, r2, r1
|
||||
rsb r1, r1, r3, lsl #8
|
||||
mov r1, r1, lsl #9
|
||||
mov r2, r1, asr #0x10
|
||||
cmp r2, #0x8000
|
||||
bge _02081814
|
||||
mov r1, fp
|
||||
sub r1, r1, #0x8000
|
||||
cmp r2, r1
|
||||
bge _02081820
|
||||
_02081814:
|
||||
bl SetIrqFlag
|
||||
mov r0, #1
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
_02081820:
|
||||
ldr r1, _020818AC ; =0x040002A0
|
||||
strh r2, [sl]
|
||||
sub r2, r1, #0x20
|
||||
_0208182C:
|
||||
ldrh r1, [r2]
|
||||
tst r1, #0x8000
|
||||
bne _0208182C
|
||||
ldr r1, _020818AC ; =0x040002A0
|
||||
ldr r7, [r1]
|
||||
bl SetIrqFlag
|
||||
cmp r7, #0x8000
|
||||
bge _0208185C
|
||||
mov r1, #0x8000
|
||||
rsb r1, r1, #0
|
||||
cmp r7, r1
|
||||
bge _02081864
|
||||
_0208185C:
|
||||
mov r0, #1
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
_02081864:
|
||||
strh r7, [sl, #6]
|
||||
ldrsh r2, [sl, #6]
|
||||
add r0, r5, r4
|
||||
add r3, r8, r6
|
||||
mul r0, r2, r0
|
||||
rsb r0, r0, r3, lsl #8
|
||||
mov r0, r0, lsl #9
|
||||
mov r0, r0, asr #0x10
|
||||
cmp r0, #0x8000
|
||||
bge _02081894
|
||||
cmp r0, r1
|
||||
bge _0208189C
|
||||
_02081894:
|
||||
mov r0, #1
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
_0208189C:
|
||||
strh r0, [sl, #2]
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
.align 2, 0
|
||||
_020818A8: .word 0x04000280
|
||||
_020818AC: .word 0x040002A0
|
||||
arm_func_end TP_CalcCalibrateParam
|
||||
|
||||
arm_func_start TP_GetCalibratedPoint
|
||||
TP_GetCalibratedPoint: ; 0x020818B0
|
||||
stmdb sp!, {r4, r5, r6, lr}
|
||||
ldr r2, _020819CC ; =_022BB670
|
||||
ldrh r2, [r2, #0x34]
|
||||
cmp r2, #0
|
||||
bne _020818E8
|
||||
ldrh r3, [r1]
|
||||
ldrh r2, [r1, #2]
|
||||
strh r3, [r0]
|
||||
strh r2, [r0, #2]
|
||||
ldrh r2, [r1, #4]
|
||||
ldrh r1, [r1, #6]
|
||||
strh r2, [r0, #4]
|
||||
strh r1, [r0, #6]
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_020818E8:
|
||||
ldrh r3, [r1, #4]
|
||||
ldr r2, _020819D0 ; =_022BB68C
|
||||
strh r3, [r0, #4]
|
||||
ldrh r3, [r1, #6]
|
||||
strh r3, [r0, #6]
|
||||
ldrh r3, [r1, #4]
|
||||
cmp r3, #0
|
||||
bne _02081918
|
||||
mov r1, #0
|
||||
strh r1, [r0]
|
||||
strh r1, [r0, #2]
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
_02081918:
|
||||
ldrh r4, [r1]
|
||||
ldr r3, [r2]
|
||||
ldr lr, [r2, #8]
|
||||
mov r4, r4, lsl #2
|
||||
subs ip, r4, r3
|
||||
mov r3, r3, asr #0x1f
|
||||
rsc r3, r3, r4, asr #31
|
||||
umull r6, r5, lr, ip
|
||||
mla r5, lr, r3, r5
|
||||
mov r3, lr, asr #0x1f
|
||||
mla r5, r3, ip, r5
|
||||
mov r3, r6, lsr #0x16
|
||||
orr r3, r3, r5, lsl #10
|
||||
strh r3, [r0]
|
||||
ldrsh r3, [r0]
|
||||
cmp r3, #0
|
||||
movlt r3, #0
|
||||
strlth r3, [r0]
|
||||
blt _02081970
|
||||
cmp r3, #0xff
|
||||
movgt r3, #0xff
|
||||
strgth r3, [r0]
|
||||
_02081970:
|
||||
ldrh r3, [r1, #2]
|
||||
ldr r1, [r2, #0xc]
|
||||
ldr ip, [r2, #0x14]
|
||||
mov r2, r3, lsl #2
|
||||
subs r3, r2, r1
|
||||
mov r1, r1, asr #0x1f
|
||||
rsc r1, r1, r2, asr #31
|
||||
umull r4, lr, ip, r3
|
||||
mla lr, ip, r1, lr
|
||||
mov r1, ip, asr #0x1f
|
||||
mla lr, r1, r3, lr
|
||||
mov r1, r4, lsr #0x16
|
||||
orr r1, r1, lr, lsl #10
|
||||
strh r1, [r0, #2]
|
||||
ldrsh r1, [r0, #2]
|
||||
cmp r1, #0
|
||||
movlt r1, #0
|
||||
strlth r1, [r0, #2]
|
||||
ldmltia sp!, {r4, r5, r6, pc}
|
||||
cmp r1, #0xbf
|
||||
movgt r1, #0xbf
|
||||
strgth r1, [r0, #2]
|
||||
ldmia sp!, {r4, r5, r6, pc}
|
||||
.align 2, 0
|
||||
_020819CC: .word _022BB670
|
||||
_020819D0: .word _022BB68C
|
||||
arm_func_end TP_GetCalibratedPoint
|
||||
|
||||
arm_func_start TP_WaitBusy
|
||||
TP_WaitBusy: ; 0x020819D4
|
||||
ldr r1, _020819E8 ; =_022BB670
|
||||
_020819D8:
|
||||
ldrh r2, [r1, #0x3a]
|
||||
tst r2, r0
|
||||
bne _020819D8
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_020819E8: .word _022BB670
|
||||
arm_func_end TP_WaitBusy
|
||||
|
||||
arm_func_start TP_CheckBusy
|
||||
TP_CheckBusy: ; 0x020819EC
|
||||
ldr r1, _020819FC ; =_022BB670
|
||||
ldrh r1, [r1, #0x38]
|
||||
and r0, r1, r0
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_020819FC: .word _022BB670
|
||||
arm_func_end TP_CheckBusy
|
||||
|
||||
673
lib/NitroSDK/asm/std_string.s
Normal file
673
lib/NitroSDK/asm/std_string.s
Normal file
@@ -0,0 +1,673 @@
|
||||
.include "asm/macros.inc"
|
||||
.include "main_0207F894.inc"
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start Std_CopyLString
|
||||
Std_CopyLString: ; 0x02085244
|
||||
stmdb sp!, {r4, lr}
|
||||
sub ip, r2, #1
|
||||
mov r4, r1
|
||||
cmp ip, #0
|
||||
mov lr, #0
|
||||
ble _02085280
|
||||
_0208525C:
|
||||
ldrsb r3, [r4]
|
||||
strb r3, [r0, lr]
|
||||
ldrsb r3, [r4]
|
||||
cmp r3, #0
|
||||
beq _02085280
|
||||
add lr, lr, #1
|
||||
cmp lr, ip
|
||||
add r4, r4, #1
|
||||
blt _0208525C
|
||||
_02085280:
|
||||
sub r3, r2, #1
|
||||
cmp lr, r3
|
||||
blt _02085298
|
||||
cmp r2, #0
|
||||
movne r2, #0
|
||||
strneb r2, [r0, lr]
|
||||
_02085298:
|
||||
mov r0, r1
|
||||
bl Std_GetStringLength
|
||||
ldmia sp!, {r4, pc}
|
||||
arm_func_end Std_CopyLString
|
||||
|
||||
arm_func_start Std_GetStringLength
|
||||
Std_GetStringLength: ; 0x020852A4
|
||||
ldrsb r1, [r0]
|
||||
mov r2, #0
|
||||
cmp r1, #0
|
||||
beq _020852C4
|
||||
_020852B4:
|
||||
add r2, r2, #1
|
||||
ldrsb r1, [r0, r2]
|
||||
cmp r1, #0
|
||||
bne _020852B4
|
||||
_020852C4:
|
||||
mov r0, r2
|
||||
bx lr
|
||||
arm_func_end Std_GetStringLength
|
||||
|
||||
arm_func_start Std_CompareString__020852CC
|
||||
Std_CompareString__020852CC: ; 0x020852CC
|
||||
b _020852D8
|
||||
_020852D0:
|
||||
add r0, r0, #1
|
||||
add r1, r1, #1
|
||||
_020852D8:
|
||||
ldrsb r3, [r1]
|
||||
ldrsb r2, [r0]
|
||||
cmp r2, r3
|
||||
bne _020852F0
|
||||
cmp r2, #0
|
||||
bne _020852D0
|
||||
_020852F0:
|
||||
sub r0, r2, r3
|
||||
bx lr
|
||||
arm_func_end Std_CompareString__020852CC
|
||||
|
||||
arm_func_start Std_CompareNString
|
||||
Std_CompareNString: ; 0x020852F8
|
||||
stmdb sp!, {r3, lr}
|
||||
cmp r2, #0
|
||||
beq _02085330
|
||||
cmp r2, #0
|
||||
mov lr, #0
|
||||
ble _02085330
|
||||
_02085310:
|
||||
ldrb ip, [r0, lr]
|
||||
ldrb r3, [r1, lr]
|
||||
cmp ip, r3
|
||||
subne r0, ip, r3
|
||||
ldmneia sp!, {r3, pc}
|
||||
add lr, lr, #1
|
||||
cmp lr, r2
|
||||
blt _02085310
|
||||
_02085330:
|
||||
mov r0, #0
|
||||
ldmia sp!, {r3, pc}
|
||||
arm_func_end Std_CompareNString
|
||||
|
||||
arm_func_start Std_TsScanf
|
||||
Std_TsScanf: ; 0x02085338
|
||||
stmdb sp!, {r0, r1, r2, r3}
|
||||
stmdb sp!, {r3, lr}
|
||||
add r2, sp, #0xc
|
||||
bic r2, r2, #3
|
||||
ldr r1, [sp, #0xc]
|
||||
add r2, r2, #4
|
||||
bl Std_TvsScanf
|
||||
ldmia sp!, {r3, lr}
|
||||
add sp, sp, #0x10
|
||||
bx lr
|
||||
arm_func_end Std_TsScanf
|
||||
|
||||
arm_func_start Stdi_IsSpace
|
||||
Stdi_IsSpace: ; 0x02085360
|
||||
sub r3, r0, #9
|
||||
cmp r3, #0x17
|
||||
mov r0, #0
|
||||
bxhi lr
|
||||
ldr r1, _02085384 ; =0x0080001F
|
||||
mov r2, #1
|
||||
tst r1, r2, lsl r3
|
||||
movne r0, r2
|
||||
bx lr
|
||||
.align 2, 0
|
||||
_02085384: .word 0x0080001F
|
||||
arm_func_end Stdi_IsSpace
|
||||
|
||||
arm_func_start Stdi_FillBitset
|
||||
Stdi_FillBitset: ; 0x02085388
|
||||
stmdb sp!, {r3, r4, r5, lr}
|
||||
cmp r1, r2
|
||||
ldmhsia sp!, {r3, r4, r5, pc}
|
||||
and r3, r2, #0x1f
|
||||
mov ip, #1
|
||||
mov r3, ip, lsl r3
|
||||
sub r5, r3, #1
|
||||
mvn ip, #0
|
||||
_020853A8:
|
||||
and r3, r1, #0x1f
|
||||
mov lr, r1, lsr #5
|
||||
mov r4, ip, lsl r3
|
||||
add r1, lr, #1
|
||||
cmp r2, r1, lsl #5
|
||||
ldr r3, [r0, lr, lsl #2]
|
||||
andlo r4, r4, r5
|
||||
mov r1, r1, lsl #5
|
||||
orr r3, r3, r4
|
||||
cmp r1, r2
|
||||
str r3, [r0, lr, lsl #2]
|
||||
blo _020853A8
|
||||
ldmia sp!, {r3, r4, r5, pc}
|
||||
arm_func_end Stdi_FillBitset
|
||||
|
||||
arm_func_start Std_TvsScanf
|
||||
Std_TvsScanf: ; 0x020853DC
|
||||
stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
|
||||
sub sp, sp, #0x34
|
||||
mov r8, r1
|
||||
ldrsb r4, [r8]
|
||||
mov sb, r0
|
||||
mov r0, #0
|
||||
str r0, [sp, #0xc]
|
||||
str r2, [sp]
|
||||
str sb, [sp, #0x10]
|
||||
str r0, [sp, #4]
|
||||
cmp r4, #0
|
||||
beq _02085AD4
|
||||
_0208540C:
|
||||
mov r0, r4
|
||||
bl Stdi_IsSpace
|
||||
cmp r0, #0
|
||||
beq _02085460
|
||||
ldrsb r0, [r8]
|
||||
bl Stdi_IsSpace
|
||||
cmp r0, #0
|
||||
beq _0208543C
|
||||
_0208542C:
|
||||
ldrsb r0, [r8, #1]!
|
||||
bl Stdi_IsSpace
|
||||
cmp r0, #0
|
||||
bne _0208542C
|
||||
_0208543C:
|
||||
ldrsb r0, [sb]
|
||||
bl Stdi_IsSpace
|
||||
cmp r0, #0
|
||||
beq _02085AC8
|
||||
_0208544C:
|
||||
ldrsb r0, [sb, #1]!
|
||||
bl Stdi_IsSpace
|
||||
cmp r0, #0
|
||||
bne _0208544C
|
||||
b _02085AC8
|
||||
_02085460:
|
||||
cmp r4, #0x25
|
||||
beq _020854A0
|
||||
ldrsb r0, [sb]
|
||||
cmp r4, r0
|
||||
bne _02085AD4
|
||||
and r0, r4, #0xff
|
||||
eor r0, r0, #0x20
|
||||
sub r0, r0, #0xa1
|
||||
cmp r0, #0x3c
|
||||
bhs _02085494
|
||||
ldrsb r0, [sb, #1]!
|
||||
cmp r4, r0
|
||||
bne _02085AD4
|
||||
_02085494:
|
||||
add sb, sb, #1
|
||||
add r8, r8, #1
|
||||
b _02085AC8
|
||||
_020854A0:
|
||||
ldrsb r0, [r8, #1]
|
||||
cmp r0, #0x25
|
||||
bne _020854C0
|
||||
ldrsb r0, [sb]
|
||||
cmp r4, r0
|
||||
bne _02085AD4
|
||||
add r8, r8, #2
|
||||
b _02085AC8
|
||||
_020854C0:
|
||||
ldrsb r0, [r8, #1]!
|
||||
mov sl, #0
|
||||
mov r5, sl
|
||||
cmp r0, #0x2a
|
||||
mov fp, sl
|
||||
mov r6, sl
|
||||
orreq r5, sl, #0x2000
|
||||
ldreqsb r0, [r8, #1]!
|
||||
mov r1, #0xa
|
||||
b _020854F4
|
||||
_020854E8:
|
||||
mla r2, r6, r1, r0
|
||||
ldrsb r0, [r8, #1]!
|
||||
sub r6, r2, #0x30
|
||||
_020854F4:
|
||||
cmp r0, #0x30
|
||||
blt _02085504
|
||||
cmp r0, #0x39
|
||||
ble _020854E8
|
||||
_02085504:
|
||||
cmp r0, #0x68
|
||||
beq _02085518
|
||||
cmp r0, #0x6c
|
||||
beq _02085530
|
||||
b _02085544
|
||||
_02085518:
|
||||
ldrsb r0, [r8, #1]!
|
||||
cmp r0, #0x68
|
||||
orrne r5, r5, #0x40
|
||||
orreq r5, r5, #0x100
|
||||
ldreqsb r0, [r8, #1]!
|
||||
b _02085544
|
||||
_02085530:
|
||||
ldrsb r0, [r8, #1]!
|
||||
cmp r0, #0x6c
|
||||
orrne r5, r5, #0x20
|
||||
ldreqsb r0, [r8, #1]!
|
||||
orreq r5, r5, #0x80
|
||||
_02085544:
|
||||
cmp r0, #0x69
|
||||
bgt _02085590
|
||||
cmp r0, #0x64
|
||||
blt _02085564
|
||||
beq _020855D8
|
||||
cmp r0, #0x69
|
||||
beq _020855E0
|
||||
b _02085AD4
|
||||
_02085564:
|
||||
cmp r0, #0x5b
|
||||
bgt _02085584
|
||||
cmp r0, #0x58
|
||||
blt _02085AD4
|
||||
beq _020855FC
|
||||
cmp r0, #0x5b
|
||||
beq _020858D0
|
||||
b _02085AD4
|
||||
_02085584:
|
||||
cmp r0, #0x63
|
||||
beq _020857D8
|
||||
b _02085AD4
|
||||
_02085590:
|
||||
cmp r0, #0x6e
|
||||
bgt _020855A0
|
||||
beq _02085608
|
||||
b _02085AD4
|
||||
_020855A0:
|
||||
sub r1, r0, #0x6f
|
||||
cmp r1, #9
|
||||
addls pc, pc, r1, lsl #2
|
||||
b _02085AD4
|
||||
_020855B0: ; jump table
|
||||
b _020855E8 ; case 0
|
||||
b _020855FC ; case 1
|
||||
b _02085AD4 ; case 2
|
||||
b _02085AD4 ; case 3
|
||||
b _020857D8 ; case 4
|
||||
b _02085AD4 ; case 5
|
||||
b _020855F0 ; case 6
|
||||
b _02085AD4 ; case 7
|
||||
b _02085AD4 ; case 8
|
||||
b _020855FC ; case 9
|
||||
_020855D8:
|
||||
mov r4, #0xa
|
||||
b _0208562C
|
||||
_020855E0:
|
||||
mvn r4, #0
|
||||
b _0208562C
|
||||
_020855E8:
|
||||
mov r4, #8
|
||||
b _0208562C
|
||||
_020855F0:
|
||||
orr r5, r5, #0x1000
|
||||
mov r4, #0xa
|
||||
b _0208562C
|
||||
_020855FC:
|
||||
orr r5, r5, #0x1000
|
||||
mov r4, #0x10
|
||||
b _0208562C
|
||||
_02085608:
|
||||
tst r5, #0x2000
|
||||
ldreq r0, [sp, #4]
|
||||
add r8, r8, #1
|
||||
subeq r0, r0, #1
|
||||
streq r0, [sp, #4]
|
||||
ldr r0, [sp, #0x10]
|
||||
sub sl, sb, r0
|
||||
mov fp, sl, asr #0x1f
|
||||
b _0208574C
|
||||
_0208562C:
|
||||
ldrsb r7, [sb]
|
||||
add r8, r8, #1
|
||||
mov r0, r7
|
||||
bl Stdi_IsSpace
|
||||
cmp r0, #0
|
||||
beq _02085658
|
||||
_02085644:
|
||||
ldrsb r7, [sb, #1]!
|
||||
mov r0, r7
|
||||
bl Stdi_IsSpace
|
||||
cmp r0, #0
|
||||
bne _02085644
|
||||
_02085658:
|
||||
cmp r7, #0x2b
|
||||
orreq r5, r5, #2
|
||||
beq _02085670
|
||||
cmp r7, #0x2d
|
||||
bne _02085678
|
||||
orr r5, r5, #8
|
||||
_02085670:
|
||||
ldrsb r7, [sb, #1]!
|
||||
b _02085658
|
||||
_02085678:
|
||||
mvn r0, #0
|
||||
cmp r4, r0
|
||||
bne _020856A4
|
||||
cmp r7, #0x30
|
||||
movne r4, #0xa
|
||||
bne _020856A4
|
||||
ldrsb r0, [sb, #1]
|
||||
cmp r0, #0x78
|
||||
cmpne r0, #0x58
|
||||
moveq r4, #0x10
|
||||
movne r4, #8
|
||||
_020856A4:
|
||||
cmp r4, #0x10
|
||||
cmpeq r7, #0x30
|
||||
bne _020856C0
|
||||
ldrsb r0, [sb, #1]
|
||||
cmp r0, #0x78
|
||||
cmpne r0, #0x58
|
||||
ldreqsb r7, [sb, #2]!
|
||||
_020856C0:
|
||||
cmp r6, #0
|
||||
mvneq r6, #0x80000000
|
||||
cmp r6, #0
|
||||
mov r2, #0
|
||||
ble _0208572C
|
||||
mov ip, r4, asr #0x1f
|
||||
_020856D8:
|
||||
sub r3, r7, #0x30
|
||||
cmp r3, #0xa
|
||||
blo _02085700
|
||||
sub r0, r3, #0x31
|
||||
cmp r0, #6
|
||||
sublo r3, r3, #0x27
|
||||
blo _02085700
|
||||
sub r3, r3, #0x11
|
||||
cmp r3, #6
|
||||
addlo r3, r3, #0xa
|
||||
_02085700:
|
||||
cmp r3, r4
|
||||
bhs _0208572C
|
||||
ldrsb r7, [sb, #1]!
|
||||
add r2, r2, #1
|
||||
umull r1, r0, sl, r4
|
||||
mla r0, sl, ip, r0
|
||||
adds sl, r3, r1
|
||||
mla r0, fp, r4, r0
|
||||
adc fp, r0, #0
|
||||
cmp r2, r6
|
||||
blt _020856D8
|
||||
_0208572C:
|
||||
cmp r2, #0
|
||||
beq _02085AD4
|
||||
tst r5, #8
|
||||
beq _02085744
|
||||
rsbs sl, sl, #0
|
||||
rsc fp, fp, #0
|
||||
_02085744:
|
||||
mov r0, #1
|
||||
str r0, [sp, #0xc]
|
||||
_0208574C:
|
||||
tst r5, #0x2000
|
||||
bne _02085AC8
|
||||
ldr r0, [sp, #4]
|
||||
tst r5, #0x100
|
||||
add r0, r0, #1
|
||||
str r0, [sp, #4]
|
||||
beq _02085780
|
||||
ldr r0, [sp]
|
||||
add r0, r0, #4
|
||||
str r0, [sp]
|
||||
ldr r0, [r0, #-4]
|
||||
strb sl, [r0]
|
||||
b _02085AC8
|
||||
_02085780:
|
||||
tst r5, #0x40
|
||||
beq _020857A0
|
||||
ldr r0, [sp]
|
||||
add r0, r0, #4
|
||||
str r0, [sp]
|
||||
ldr r0, [r0, #-4]
|
||||
strh sl, [r0]
|
||||
b _02085AC8
|
||||
_020857A0:
|
||||
tst r5, #0x80
|
||||
beq _020857C0
|
||||
ldr r0, [sp]
|
||||
add r0, r0, #4
|
||||
str r0, [sp]
|
||||
ldr r0, [r0, #-4]
|
||||
stmia r0, {sl, fp}
|
||||
b _02085AC8
|
||||
_020857C0:
|
||||
ldr r0, [sp]
|
||||
add r0, r0, #4
|
||||
str r0, [sp]
|
||||
ldr r0, [r0, #-4]
|
||||
str sl, [r0]
|
||||
b _02085AC8
|
||||
_020857D8:
|
||||
mov r1, #1
|
||||
tst r5, #0x2000
|
||||
add r8, r8, #1
|
||||
mov r4, #0
|
||||
str r1, [sp, #0xc]
|
||||
bne _0208580C
|
||||
ldr r1, [sp]
|
||||
add r1, r1, #4
|
||||
str r1, [sp]
|
||||
ldr r4, [r1, #-4]
|
||||
ldr r1, [sp, #4]
|
||||
add r1, r1, #1
|
||||
str r1, [sp, #4]
|
||||
_0208580C:
|
||||
cmp r0, #0x73
|
||||
bne _02085888
|
||||
ldrsb r5, [sb]
|
||||
cmp r6, #0
|
||||
mvneq r6, #0x80000000
|
||||
mov r0, r5
|
||||
bl Stdi_IsSpace
|
||||
cmp r0, #0
|
||||
beq _02085858
|
||||
_02085830:
|
||||
ldrsb r5, [sb, #1]!
|
||||
mov r0, r5
|
||||
bl Stdi_IsSpace
|
||||
cmp r0, #0
|
||||
bne _02085830
|
||||
b _02085858
|
||||
_02085848:
|
||||
cmp r4, #0
|
||||
strneb r5, [r4], #1
|
||||
ldrsb r5, [sb, #1]!
|
||||
sub r6, r6, #1
|
||||
_02085858:
|
||||
cmp r5, #0
|
||||
beq _02085878
|
||||
mov r0, r5
|
||||
bl Stdi_IsSpace
|
||||
cmp r0, #0
|
||||
bne _02085878
|
||||
cmp r6, #0
|
||||
bgt _02085848
|
||||
_02085878:
|
||||
cmp r4, #0
|
||||
movne r0, #0
|
||||
strneb r0, [r4]
|
||||
b _02085AC8
|
||||
_02085888:
|
||||
cmp r6, #0
|
||||
moveq r6, #1
|
||||
ldrsb r0, [sb]
|
||||
b _020858A8
|
||||
_02085898:
|
||||
cmp r4, #0
|
||||
strneb r0, [r4], #1
|
||||
ldrsb r0, [sb, #1]!
|
||||
sub r6, r6, #1
|
||||
_020858A8:
|
||||
cmp r0, #0
|
||||
beq _020858B8
|
||||
cmp r6, #0
|
||||
bgt _02085898
|
||||
_020858B8:
|
||||
cmp r4, #0
|
||||
beq _02085AC8
|
||||
cmp r6, #0
|
||||
movgt r0, #0
|
||||
strgtb r0, [r4]
|
||||
b _02085AC8
|
||||
_020858D0:
|
||||
mov sl, #0
|
||||
mov r3, #1
|
||||
add r1, sp, #0x14
|
||||
mov r0, sl
|
||||
mov r2, #0x20
|
||||
mov r7, sl
|
||||
mov fp, sl
|
||||
str r3, [sp, #8]
|
||||
bl MTi_CpuClear32
|
||||
ldrsb r0, [r8, #1]!
|
||||
cmp r0, #0x5e
|
||||
moveq r0, sl
|
||||
addeq r8, r8, #1
|
||||
streq r0, [sp, #8]
|
||||
ldrsb r0, [r8]
|
||||
cmp r0, #0x5d
|
||||
bne _02085938
|
||||
and r2, r0, #0xff
|
||||
mov r0, r2, lsr #5
|
||||
add r1, sp, #0x14
|
||||
ldr r4, [r1, r0, lsl #2]
|
||||
and r2, r2, #0x1f
|
||||
mov r3, #1
|
||||
orr r2, r4, r3, lsl r2
|
||||
str r2, [r1, r0, lsl #2]
|
||||
add r8, r8, #1
|
||||
_02085938:
|
||||
add r4, sp, #0x14
|
||||
_0208593C:
|
||||
ldrsb r0, [r8]
|
||||
cmp r0, #0
|
||||
cmpne r0, #0x5d
|
||||
bne _0208598C
|
||||
cmp fp, #0
|
||||
beq _0208597C
|
||||
add r4, sp, #0x14
|
||||
mov r3, r7, lsr #5
|
||||
ldr r2, [r4, r3, lsl #2]
|
||||
and r0, r7, #0x1f
|
||||
mov r1, #1
|
||||
orr r0, r2, r1, lsl r0
|
||||
str r0, [r4, r3, lsl #2]
|
||||
ldr r0, [sp, #0x18]
|
||||
orr r0, r0, #0x2000
|
||||
str r0, [sp, #0x18]
|
||||
_0208597C:
|
||||
ldrsb r0, [r8]
|
||||
cmp r0, #0x5d
|
||||
addeq r8, r8, #1
|
||||
b _02085A38
|
||||
_0208598C:
|
||||
cmp fp, #0
|
||||
bne _020859CC
|
||||
cmp r7, #0
|
||||
beq _020859A8
|
||||
cmp r0, #0x2d
|
||||
moveq fp, #1
|
||||
beq _02085A30
|
||||
_020859A8:
|
||||
and r0, r0, #0xff
|
||||
mov r3, r0, lsr #5
|
||||
ldr r2, [r4, r3, lsl #2]
|
||||
and r1, r0, #0x1f
|
||||
mov r0, #1
|
||||
orr r0, r2, r0, lsl r1
|
||||
str r0, [r4, r3, lsl #2]
|
||||
ldrb r7, [r8]
|
||||
b _02085A30
|
||||
_020859CC:
|
||||
and r2, r0, #0xff
|
||||
cmp r7, r2
|
||||
bls _02085A18
|
||||
mov r1, r7, lsr #5
|
||||
ldr fp, [r4, r1, lsl #2]
|
||||
and r7, r7, #0x1f
|
||||
mov r3, #1
|
||||
orr r3, fp, r3, lsl r7
|
||||
str r3, [r4, r1, lsl #2]
|
||||
ldr r1, [sp, #0x18]
|
||||
mov r0, r2, lsr #5
|
||||
orr r1, r1, #0x2000
|
||||
str r1, [sp, #0x18]
|
||||
ldr r3, [r4, r0, lsl #2]
|
||||
and r2, r2, #0x1f
|
||||
mov r1, #1
|
||||
orr r1, r3, r1, lsl r2
|
||||
str r1, [r4, r0, lsl #2]
|
||||
b _02085A28
|
||||
_02085A18:
|
||||
mov r1, r7
|
||||
add r2, r2, #1
|
||||
mov r0, r4
|
||||
bl Stdi_FillBitset
|
||||
_02085A28:
|
||||
mov fp, #0
|
||||
mov r7, fp
|
||||
_02085A30:
|
||||
add r8, r8, #1
|
||||
b _0208593C
|
||||
_02085A38:
|
||||
mov r0, #1
|
||||
tst r5, #0x2000
|
||||
str r0, [sp, #0xc]
|
||||
bne _02085A64
|
||||
ldr r0, [sp]
|
||||
add r0, r0, #4
|
||||
str r0, [sp]
|
||||
ldr sl, [r0, #-4]
|
||||
ldr r0, [sp, #4]
|
||||
add r0, r0, #1
|
||||
str r0, [sp, #4]
|
||||
_02085A64:
|
||||
cmp r6, #0
|
||||
mvneq r6, #0x80000000
|
||||
ldrsb r0, [sb]
|
||||
add r3, sp, #0x14
|
||||
b _02085AAC
|
||||
_02085A78:
|
||||
and r4, r0, #0xff
|
||||
mov r1, r4, lsr #5
|
||||
ldr r2, [r3, r1, lsl #2]
|
||||
and r1, r4, #0x1f
|
||||
mov r1, r2, lsr r1
|
||||
and r2, r1, #1
|
||||
ldr r1, [sp, #8]
|
||||
cmp r1, r2
|
||||
bne _02085ABC
|
||||
cmp sl, #0
|
||||
strneb r0, [sl], #1
|
||||
ldrsb r0, [sb, #1]!
|
||||
sub r6, r6, #1
|
||||
_02085AAC:
|
||||
cmp r0, #0
|
||||
beq _02085ABC
|
||||
cmp r6, #0
|
||||
bgt _02085A78
|
||||
_02085ABC:
|
||||
cmp sl, #0
|
||||
movne r0, #0
|
||||
strneb r0, [sl]
|
||||
_02085AC8:
|
||||
ldrsb r4, [r8]
|
||||
cmp r4, #0
|
||||
bne _0208540C
|
||||
_02085AD4:
|
||||
ldrsb r0, [sb]
|
||||
cmp r0, #0
|
||||
ldreq r0, [sp, #0xc]
|
||||
cmpeq r0, #0
|
||||
mvneq r0, #0
|
||||
streq r0, [sp, #4]
|
||||
ldr r0, [sp, #4]
|
||||
add sp, sp, #0x34
|
||||
ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
|
||||
arm_func_end Std_TvsScanf
|
||||
|
||||
47
lib/NitroSDK/src/cp_context.c
Normal file
47
lib/NitroSDK/src/cp_context.c
Normal file
@@ -0,0 +1,47 @@
|
||||
#include <nitro.h>
|
||||
#include <nitro/cp/context.h>
|
||||
|
||||
#if defined(SDK_TCM_APPLY) && defined(SDK_ARM9)
|
||||
#include <nitro/itcm_begin.h>
|
||||
#endif
|
||||
|
||||
asm void CP_SaveContext (register CPContext *context)
|
||||
{
|
||||
ldr r1, = REG_DIV_NUMER_ADDR
|
||||
stmfd sp !, {r4}
|
||||
ldmia r1, {r2 - r4, r12}
|
||||
stmia r0 !, {r2 - r4, r12}
|
||||
ldrh r12, [r1, #REG_DIVCNT_OFFSET - REG_DIV_NUMER_OFFSET]
|
||||
add r1, r1, #REG_SQRT_PARAM_OFFSET - REG_DIV_NUMER_OFFSET
|
||||
ldmia r1, {r2 - r3}
|
||||
stmia r0 !, {r2 - r3}
|
||||
and r12, r12, #REG_CP_DIVCNT_MODE_MASK
|
||||
ldrh r2, [r1, #REG_SQRTCNT_OFFSET - REG_SQRT_PARAM_OFFSET]
|
||||
strh r12, [r0]
|
||||
and r2, r2, #REG_CP_SQRTCNT_MODE_MASK
|
||||
strh r2, [r0, #2]
|
||||
ldmfd sp !, {r4}
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void CPi_RestoreContext (register const CPContext *context)
|
||||
{
|
||||
stmfd sp !, {r4}
|
||||
ldr r1, = REG_DIV_NUMER_ADDR
|
||||
ldmia r0, {r2 - r4, r12}
|
||||
stmia r1, {r2 - r4, r12}
|
||||
ldrh r2, [r0, #CPContext.div_mode]
|
||||
ldrh r3, [r0, #CPContext.sqrt_mode]
|
||||
strh r2, [r1, #REG_DIVCNT_OFFSET - REG_DIV_NUMER_OFFSET]
|
||||
strh r3, [r1, #REG_SQRTCNT_OFFSET - REG_DIV_NUMER_OFFSET]
|
||||
add r0, r0, #CPContext.sqrt
|
||||
add r1, r1, #REG_SQRT_PARAM_OFFSET - REG_DIV_NUMER_OFFSET
|
||||
ldmia r0, {r2 - r3}
|
||||
stmia r1, {r2 - r3}
|
||||
ldmfd sp !, {r4}
|
||||
bx lr
|
||||
}
|
||||
|
||||
#if defined(SDK_TCM_APPLY) && defined(SDK_ARM9)
|
||||
#include <nitro/itcm_end.h>
|
||||
#endif
|
||||
@@ -1,6 +1,6 @@
|
||||
#include "main_0207E81C.h"
|
||||
|
||||
u8 FSi_OpenFileDirectCommand(s32 *param_0) // FSi_OpenFileDirectCommand
|
||||
u8 FSi_OpenFileDirectCommand(s32 *param_0)
|
||||
{
|
||||
param_0[9] = param_0[12];
|
||||
param_0[11] = param_0[12];
|
||||
@@ -10,7 +10,8 @@ u8 FSi_OpenFileDirectCommand(s32 *param_0) // FSi_OpenFileDirectCommand
|
||||
return 0;
|
||||
}
|
||||
|
||||
u8 FSi_CloseFileCommand() // FSi_CloseFileCommand
|
||||
u8 FSi_CloseFileCommand()
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1,9 +1,7 @@
|
||||
.include "asm/macros.inc"
|
||||
#include <nitro.h>
|
||||
|
||||
.text
|
||||
|
||||
arm_func_start GX_SendFifo48B
|
||||
GX_SendFifo48B: ; 0x020788C0
|
||||
asm void GX_SendFifo48B(register const void *pSrc, register void *pDest)
|
||||
{
|
||||
ldmia r0!, {r2, r3, ip}
|
||||
stmia r1, {r2, r3, ip}
|
||||
ldmia r0!, {r2, r3, ip}
|
||||
@@ -13,10 +11,10 @@ GX_SendFifo48B: ; 0x020788C0
|
||||
ldmia r0!, {r2, r3, ip}
|
||||
stmia r1, {r2, r3, ip}
|
||||
bx lr
|
||||
arm_func_end GX_SendFifo48B
|
||||
}
|
||||
|
||||
arm_func_start GX_SendFifo64B
|
||||
GX_SendFifo64B: ; 0x020788E4
|
||||
asm void GX_SendFifo64B(register const void *pSrc, register void *pDest)
|
||||
{
|
||||
stmdb sp!, {r4, r5, r6, r7, r8}
|
||||
ldmia r0!, {r2, r3, r4, r5, r6, r7, r8, ip}
|
||||
stmia r1, {r2, r3, r4, r5, r6, r7, r8, ip}
|
||||
@@ -24,5 +22,4 @@ GX_SendFifo64B: ; 0x020788E4
|
||||
stmia r1, {r2, r3, r4, r5, r6, r7, r8, ip}
|
||||
ldmia sp!, {r4, r5, r6, r7, r8}
|
||||
bx lr
|
||||
arm_func_end GX_SendFifo64B
|
||||
|
||||
}
|
||||
12
lib/NitroSDK/src/mi_init.c
Normal file
12
lib/NitroSDK/src/mi_init.c
Normal file
@@ -0,0 +1,12 @@
|
||||
#include <nitro.h>
|
||||
|
||||
extern void MI_StopDma(u32);
|
||||
|
||||
void MI_Init (void)
|
||||
{
|
||||
#ifdef SDK_ARM9
|
||||
MI_SetWramBank(MI_WRAM_ARM7_ALL);
|
||||
#endif
|
||||
|
||||
MI_StopDma(0);
|
||||
}
|
||||
6
lib/NitroSDK/src/mi_wram.c
Normal file
6
lib/NitroSDK/src/mi_wram.c
Normal file
@@ -0,0 +1,6 @@
|
||||
#include <nitro.h>
|
||||
|
||||
void MI_SetWramBank (MIWram cnt)
|
||||
{
|
||||
reg_GX_VRAMCNT_WRAM = (u8)cnt;
|
||||
}
|
||||
@@ -1,5 +1,14 @@
|
||||
#include <nitro.h>
|
||||
|
||||
asm BOOL DC_Enable (void) {
|
||||
mrc p15, 0, r1, c1, c0, 0
|
||||
and r0, r1, #HW_C1_DCACHE_ENABLE
|
||||
mov r0, r0, LSR #HW_C1_DCACHE_ENABLE_SHIFT
|
||||
orr r1, r1, #HW_C1_DCACHE_ENABLE
|
||||
mcr p15, 0, r1, c1, c0, 0
|
||||
bx lr
|
||||
}
|
||||
|
||||
asm void DC_InvalidateAll(void) {
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c6, 0
|
||||
|
||||
26
lib/NitroSDK/src/os_entropy.c
Normal file
26
lib/NitroSDK/src/os_entropy.c
Normal file
@@ -0,0 +1,26 @@
|
||||
#include <nitro.h>
|
||||
|
||||
extern vu64 OSi_TickCounter;
|
||||
|
||||
extern u16 OS_GetTickLo(void);
|
||||
|
||||
static inline s32 GX_GetVCount(){
|
||||
return reg_GX_VCOUNT;
|
||||
}
|
||||
|
||||
void OS_GetLowEntropyData (u32 buffer[OS_LOW_ENTROPY_DATA_SIZE / sizeof(u32)]) {
|
||||
const OSSystemWork *work = OS_GetSystemWork();
|
||||
const u8 *macAddress = (u8 *)((u32)(work->nvramUserInfo) + ((sizeof(NVRAMConfig) + 3) & ~0x00000003));
|
||||
buffer[0] = (GX_GetVCount() << 16) | OS_GetTickLo();
|
||||
buffer[1] = (*(u16 *)(macAddress + 4) << 16) ^ OSi_TickCounter;
|
||||
buffer[2] = (OSi_TickCounter >> 32) ^ *(u32 *)macAddress ^ work->vblankCount;
|
||||
#ifdef reg_G3X_GXSTAT
|
||||
buffer[2] ^= reg_G3X_GXSTAT;
|
||||
#endif
|
||||
buffer[3] = *(u32 *)(&work->real_time_clock[0]);
|
||||
buffer[4] = *(u32 *)(&work->real_time_clock[4]);
|
||||
buffer[5] = ((work->mic_sampling_data) << 16) ^ work->mic_last_address;
|
||||
buffer[6] = (*(u16 *)(&work->touch_panel[0]) << 16) | *(u16 *)(&work->touch_panel[2]);
|
||||
buffer[7] = (work->wm_rssi_pool << 16) | (reg_PAD_KEYINPUT | *(vu16 *)HW_BUTTON_XY_BUF);
|
||||
}
|
||||
|
||||
92
lib/NitroSDK/src/os_message.c
Normal file
92
lib/NitroSDK/src/os_message.c
Normal file
@@ -0,0 +1,92 @@
|
||||
#include <nitro.h>
|
||||
|
||||
void OS_InitMessageQueue(OSMessageQueue *mq, OSMessage *msgArray, s32 msgCount) {
|
||||
OS_InitThreadQueue(&mq->queueSend);
|
||||
OS_InitThreadQueue(&mq->queueReceive);
|
||||
mq->msgArray = msgArray;
|
||||
mq->msgCount = msgCount;
|
||||
mq->firstIndex = 0;
|
||||
mq->usedCount = 0;
|
||||
}
|
||||
|
||||
BOOL OS_SendMessage(OSMessageQueue *mq, OSMessage msg, s32 flags) {
|
||||
OSIntrMode enabled;
|
||||
s32 lastIndex;
|
||||
|
||||
enabled = EnableIrqFlag();
|
||||
|
||||
while (mq->msgCount <= mq->usedCount) {
|
||||
if (!(flags & OS_MESSAGE_BLOCK)) {
|
||||
SetIrqFlag(enabled);
|
||||
return FALSE;
|
||||
}
|
||||
OS_SleepThread(&mq->queueSend);
|
||||
}
|
||||
lastIndex = (mq->firstIndex + mq->usedCount) % mq->msgCount;
|
||||
mq->msgArray[lastIndex] = msg;
|
||||
mq->usedCount++;
|
||||
OS_WakeupThread(&mq->queueReceive);
|
||||
SetIrqFlag(enabled);
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
BOOL OS_ReceiveMessage(OSMessageQueue *mq, OSMessage *msg, s32 flags) {
|
||||
OSIntrMode enabled;
|
||||
|
||||
enabled = EnableIrqFlag();
|
||||
|
||||
while (mq->usedCount == 0) {
|
||||
if (!(flags & OS_MESSAGE_BLOCK)) {
|
||||
SetIrqFlag(enabled);
|
||||
return FALSE;
|
||||
}
|
||||
OS_SleepThread(&mq->queueReceive);
|
||||
}
|
||||
if (msg != NULL) {
|
||||
*msg = mq->msgArray[mq->firstIndex];
|
||||
}
|
||||
mq->firstIndex = (mq->firstIndex + 1) % mq->msgCount;
|
||||
mq->usedCount--;
|
||||
OS_WakeupThread(&mq->queueSend);
|
||||
SetIrqFlag(enabled);
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
BOOL OS_JamMessage(OSMessageQueue *mq, OSMessage msg, s32 flags) {
|
||||
OSIntrMode enabled;
|
||||
|
||||
enabled = EnableIrqFlag();
|
||||
|
||||
while (mq->msgCount <= mq->usedCount) {
|
||||
if (!(flags & OS_MESSAGE_BLOCK)) {
|
||||
SetIrqFlag(enabled);
|
||||
return FALSE;
|
||||
}
|
||||
OS_SleepThread(&mq->queueSend);
|
||||
}
|
||||
mq->firstIndex = (mq->firstIndex + mq->msgCount - 1) % mq->msgCount;
|
||||
mq->msgArray[mq->firstIndex] = msg;
|
||||
mq->usedCount++;
|
||||
OS_WakeupThread(&mq->queueReceive);
|
||||
SetIrqFlag(enabled);
|
||||
return TRUE;
|
||||
}
|
||||
|
||||
BOOL OS_ReadMessage(OSMessageQueue *mq, OSMessage *msg, s32 flags) {
|
||||
OSIntrMode enabled;
|
||||
|
||||
enabled = EnableIrqFlag();
|
||||
|
||||
while (mq->usedCount == 0) {
|
||||
if (!(flags & OS_MESSAGE_BLOCK)) {
|
||||
SetIrqFlag(enabled);
|
||||
return FALSE;
|
||||
}
|
||||
OS_SleepThread(&mq->queueReceive);
|
||||
}
|
||||
if (msg != NULL) {
|
||||
*msg = mq->msgArray[mq->firstIndex];
|
||||
}
|
||||
SetIrqFlag(enabled);
|
||||
return TRUE;
|
||||
}
|
||||
117
lib/NitroSDK/src/os_mutex.c
Normal file
117
lib/NitroSDK/src/os_mutex.c
Normal file
@@ -0,0 +1,117 @@
|
||||
#include <nitro.h>
|
||||
|
||||
void OSi_EnqueueTail(OSThread *thread, OSMutex *mtx);
|
||||
void OSi_DequeueItem(OSThread *thread, OSMutex *mtx);
|
||||
|
||||
// extern void OS_SleepThread(void *);
|
||||
// extern void OS_WakeupThread(void *);
|
||||
// extern OSMutex *OSi_RemoveMutexLinkFromQueue(void *);
|
||||
|
||||
void OS_InitMutex(OSMutex *mtx) {
|
||||
OS_InitThreadQueue(&mtx->queue);
|
||||
mtx->thread = NULL;
|
||||
mtx->count = 0;
|
||||
}
|
||||
|
||||
void OS_LockMutex(OSMutex *mtx) {
|
||||
OSIntrMode enable;
|
||||
OSThread *currentThread;
|
||||
|
||||
enable = EnableIrqFlag();
|
||||
currentThread = OS_GetCurrentThread();
|
||||
while (1) {
|
||||
if (mtx->thread == NULL) {
|
||||
mtx->thread = currentThread;
|
||||
mtx->count++;
|
||||
OSi_EnqueueTail(currentThread, mtx);
|
||||
break;
|
||||
} else if (mtx->thread == currentThread) {
|
||||
mtx->count++;
|
||||
break;
|
||||
} else {
|
||||
currentThread->mutex = mtx;
|
||||
OS_SleepThread(&mtx->queue);
|
||||
currentThread->mutex = NULL;
|
||||
}
|
||||
}
|
||||
SetIrqFlag(enable);
|
||||
}
|
||||
|
||||
void OS_UnlockMutex(OSMutex *mtx) {
|
||||
OSIntrMode enable;
|
||||
OSThread *currentThread;
|
||||
|
||||
enable = EnableIrqFlag();
|
||||
currentThread = OS_GetCurrentThread();
|
||||
if (mtx->thread == currentThread && --mtx->count == 0) {
|
||||
OSi_DequeueItem(currentThread, mtx);
|
||||
mtx->thread = NULL;
|
||||
OS_WakeupThread(&mtx->queue);
|
||||
}
|
||||
SetIrqFlag(enable);
|
||||
}
|
||||
|
||||
void OSi_UnlockAllMutex(OSThread *thread) {
|
||||
while (thread->mutexQueue.head) {
|
||||
OSMutex *mtx = OSi_RemoveMutexLinkFromQueue(&thread->mutexQueue);
|
||||
mtx->count = 0;
|
||||
mtx->thread = NULL;
|
||||
OS_WakeupThread(&mtx->queue);
|
||||
}
|
||||
}
|
||||
|
||||
BOOL OS_TryLockMutex(OSMutex *mtx) {
|
||||
OSIntrMode enable;
|
||||
OSThread *currentThread;
|
||||
BOOL success;
|
||||
|
||||
enable = EnableIrqFlag();
|
||||
currentThread = OS_GetCurrentThread();
|
||||
if (mtx->thread == NULL) {
|
||||
mtx->thread = currentThread;
|
||||
mtx->count++;
|
||||
OSi_EnqueueTail(currentThread, mtx);
|
||||
success = TRUE;
|
||||
} else if (mtx->thread == currentThread) {
|
||||
mtx->count++;
|
||||
success = TRUE;
|
||||
} else {
|
||||
success = FALSE;
|
||||
}
|
||||
SetIrqFlag(enable);
|
||||
return success;
|
||||
}
|
||||
|
||||
void OSi_EnqueueTail(OSThread *thread, OSMutex *mtx) {
|
||||
OSMutex *prev;
|
||||
|
||||
prev = thread->mutexQueue.tail;
|
||||
if (prev == NULL) {
|
||||
thread->mutexQueue.head = mtx;
|
||||
} else {
|
||||
prev->link.next = mtx;
|
||||
}
|
||||
mtx->link.prev = prev;
|
||||
mtx->link.next = NULL;
|
||||
thread->mutexQueue.tail = mtx;
|
||||
}
|
||||
|
||||
void OSi_DequeueItem(OSThread *thread, OSMutex *mtx) {
|
||||
OSMutex *next;
|
||||
OSMutex *prev;
|
||||
|
||||
next = mtx->link.next;
|
||||
prev = mtx->link.prev;
|
||||
|
||||
if (next == NULL) {
|
||||
thread->mutexQueue.tail = prev;
|
||||
} else {
|
||||
next->link.prev = prev;
|
||||
}
|
||||
|
||||
if (prev == NULL) {
|
||||
thread->mutexQueue.head = next;
|
||||
} else {
|
||||
prev->link.next = next;
|
||||
}
|
||||
}
|
||||
28
lib/NitroSDK/src/os_ownerInfo.c
Normal file
28
lib/NitroSDK/src/os_ownerInfo.c
Normal file
@@ -0,0 +1,28 @@
|
||||
#include <nitro.h>
|
||||
|
||||
extern void MTi_CpuCopy16(void *, void *, u32);
|
||||
extern void MI_CpuCopy8(void *, void *, u32);
|
||||
|
||||
void OS_GetMacAddress(u8 *macAddr) {
|
||||
MI_CpuCopy8(OS_GetSystemWork()->nvramUserInfo + ((sizeof(NVRAMConfig) + 3) & ~3), macAddr, 6);
|
||||
}
|
||||
|
||||
//void OS_GetOwnerInfo(OSOwnerInfo *info) {
|
||||
void GetDsFirmwareUserSettings(OSOwnerInfo *info) {
|
||||
NVRAMConfig *src = (NVRAMConfig *)OS_GetSystemWork()->nvramUserInfo;
|
||||
info->language = src->ncd.option.language;
|
||||
info->favoriteColor = src->ncd.owner.favouriteColour;
|
||||
info->birthday.month = src->ncd.owner.birthday.month;
|
||||
info->birthday.day = src->ncd.owner.birthday.day;
|
||||
info->nickNameLength = src->ncd.owner.nickname.length;
|
||||
info->commentLength = src->ncd.owner.comment.length;
|
||||
MTi_CpuCopy16(src->ncd.owner.nickname.str, info->nickName, 20);
|
||||
MTi_CpuCopy16(src->ncd.owner.comment.str, info->comment, 52);
|
||||
info->nickName[10] = 0;
|
||||
info->comment[26] = 0;
|
||||
}
|
||||
|
||||
//s64 OS_GetOwnerRtcOffset(void) {
|
||||
// NVRAMConfig *cfg = (NVRAMConfig *)OS_GetSystemWork()->nvramUserInfo;
|
||||
// return cfg->ncd.option.rtcOffset;
|
||||
//}
|
||||
45
lib/NitroSDK/src/os_printf_1.c
Normal file
45
lib/NitroSDK/src/os_printf_1.c
Normal file
@@ -0,0 +1,45 @@
|
||||
#include <nitro.h>
|
||||
|
||||
/* static */ void string_put_char (dst_string * p, char c)
|
||||
{
|
||||
if (p->len > 0)
|
||||
*p->cur = c, --p->len;
|
||||
|
||||
++p->cur;
|
||||
}
|
||||
|
||||
/* static */ void string_fill_char (dst_string * p, char c, int n)
|
||||
{
|
||||
if (n > 0) {
|
||||
size_t i, k = p->len;
|
||||
|
||||
if (k > (size_t) n)
|
||||
k = (size_t) n;
|
||||
|
||||
for (i = 0; i < k; ++i)
|
||||
p->cur[i] = c;
|
||||
|
||||
p->len -= k;
|
||||
p->cur += n;
|
||||
}
|
||||
}
|
||||
|
||||
/* static */ void string_put_string (dst_string * p, const char * s, int n)
|
||||
{
|
||||
if (n > 0) {
|
||||
size_t i, k = p->len;
|
||||
|
||||
if (k > (size_t) n)
|
||||
k = (size_t) n;
|
||||
|
||||
for (i = 0; i < k; ++i)
|
||||
p->cur[i] = s[i];
|
||||
|
||||
p->len -= k;
|
||||
p->cur += n;
|
||||
}
|
||||
}
|
||||
|
||||
// TODO: Add OS_VsNPrintfEx once unicode stuff is done
|
||||
// TODO: Enable static defs once func is moved to C
|
||||
|
||||
8
lib/NitroSDK/src/pxi_init.c
Normal file
8
lib/NitroSDK/src/pxi_init.c
Normal file
@@ -0,0 +1,8 @@
|
||||
#include <nitro.h>
|
||||
|
||||
extern void PXI_InitFifo(void);
|
||||
|
||||
void PXI_Init (void)
|
||||
{
|
||||
PXI_InitFifo();
|
||||
}
|
||||
35
lib/NitroSDK/src/snd_main.c
Normal file
35
lib/NitroSDK/src/snd_main.c
Normal file
@@ -0,0 +1,35 @@
|
||||
#include <nitro.h>
|
||||
|
||||
//static OSMutex sSndMutex;
|
||||
extern OSMutex sSndMutex;
|
||||
extern BOOL _022B99EC; // static bool initialized = FALSE
|
||||
|
||||
extern void OS_InitMutex(OSMutex *);
|
||||
extern void OS_LockMutex(OSMutex *);
|
||||
extern void OS_UnlockMutex(OSMutex *);
|
||||
extern void SND_CommandInit(void);
|
||||
extern void Snd_AlarmInit(void);
|
||||
|
||||
|
||||
void SND_Init (void)
|
||||
{
|
||||
{
|
||||
if (_022B99EC)
|
||||
return;
|
||||
_022B99EC = TRUE;
|
||||
}
|
||||
|
||||
OS_InitMutex(&sSndMutex);
|
||||
SND_CommandInit();
|
||||
Snd_AlarmInit();
|
||||
}
|
||||
|
||||
void Sndi_LockMutex (void)
|
||||
{
|
||||
OS_LockMutex(&sSndMutex);
|
||||
}
|
||||
|
||||
void Sndi_UnlockMutex (void)
|
||||
{
|
||||
OS_UnlockMutex(&sSndMutex);
|
||||
}
|
||||
38
lib/NitroSDK/src/snd_util.c
Normal file
38
lib/NitroSDK/src/snd_util.c
Normal file
@@ -0,0 +1,38 @@
|
||||
#include <nitro/snd/common/util.h>
|
||||
#include <nitro/snd/common/channel.h>
|
||||
|
||||
#define SND_VOLUME_SHIFT_2_MIN -240
|
||||
#define SND_VOLUME_SHIFT_1_MIN -120
|
||||
#define SND_VOLUME_SHIFT_0_MIN -60
|
||||
|
||||
extern const u8 VolumeTable[SND_VOLUME_TABLE_SIZE];
|
||||
|
||||
u16 Snd_CalcChannelVolume (int dB)
|
||||
{
|
||||
SNDChannelDataShift shift;
|
||||
u8 volume;
|
||||
|
||||
if (dB < SND_VOLUME_DB_MIN) {
|
||||
dB = SND_VOLUME_DB_MIN;
|
||||
} else if (dB > SND_VOLUME_DB_MAX) {
|
||||
dB = SND_VOLUME_DB_MAX;
|
||||
}
|
||||
|
||||
#ifdef SND_USE_SYSTEM_ROM_TABLE
|
||||
volume = SVC_GetVolumeTable(dB - SND_VOLUME_DB_MIN);
|
||||
#else
|
||||
volume = VolumeTable[dB - SND_VOLUME_DB_MIN];
|
||||
#endif
|
||||
|
||||
if (dB < SND_VOLUME_SHIFT_2_MIN) {
|
||||
shift = SND_CHANNEL_DATASHIFT_4BIT;
|
||||
} else if (dB < SND_VOLUME_SHIFT_1_MIN) {
|
||||
shift = SND_CHANNEL_DATASHIFT_2BIT;
|
||||
} else if (dB < SND_VOLUME_SHIFT_0_MIN) {
|
||||
shift = SND_CHANNEL_DATASHIFT_1BIT;
|
||||
} else {
|
||||
shift = SND_CHANNEL_DATASHIFT_NONE;
|
||||
}
|
||||
|
||||
return (u16)(shift << 8 | volume);
|
||||
}
|
||||
11
lib/include/MSL_C/stdlib.h
Normal file
11
lib/include/MSL_C/stdlib.h
Normal file
@@ -0,0 +1,11 @@
|
||||
#ifndef PMD_SKY_MSL_C_STDLIB_H
|
||||
#define PMD_SKY_MSL_C_STDLIB_H
|
||||
|
||||
// this file MUST be called stdlib.h, as the filename affects matching for some reason
|
||||
|
||||
int abs(int val);
|
||||
//void srand(unsigned int seed);
|
||||
//int rand(void);
|
||||
|
||||
#endif // PMD_SKY_MSL_C_STDLIB_H
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user