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added iwram region & enabled caching

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This commit is contained in:
Dave Murphy 2005-05-02 13:22:06 +00:00
parent 609ce6e417
commit fe8700d4fd
1 changed files with 76 additions and 15 deletions
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91
dka-crtls/ds_arm9_crt0.s
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@ -1,3 +1,25 @@
#define PAGE_4K (0b01011 << 1)
#define PAGE_8K (0b01100 << 1)
#define PAGE_16K (0b01101 << 1)
#define PAGE_32K (0b01110 << 1)
#define PAGE_64K (0b00111 << 1)
#define PAGE_128K (0b10000 << 1)
#define PAGE_256K (0b10001 << 1)
#define PAGE_512K (0b10010 << 1)
#define PAGE_1M (0b10011 << 1)
#define PAGE_2M (0b10100 << 1)
#define PAGE_4M (0b10101 << 1)
#define PAGE_8M (0b10110 << 1)
#define PAGE_16M (0b10111 << 1)
#define PAGE_32M (0b11000 << 1)
#define PAGE_64M (0b11001 << 1)
#define PAGE_128M (0b11010 << 1)
#define PAGE_256M (0b11011 << 1)
#define PAGE_512M (0b11100 << 1)
#define PAGE_1G (0b11101 << 1)
#define PAGE_2G (0b11110 << 1)
#define PAGE_4G (0b11111 << 1)
@---------------------------------------------------------------------------------
.section ".init"
.global _start
@ -34,52 +56,87 @@ _start:
@ Setup memory regions similar to Release Version
@ this code currently breaks dualis
@---------------------------------------------------------------------------------
/* ldr r0,=(0b110010 | 0x04000000 | 1)
@-------------------------------------------------------------------------
@ Region 0 - IO registers
@-------------------------------------------------------------------------
ldr r0,=( PAGE_64M | 0x04000000 | 1)
mcr p15, 0, r0, c6, c0, 0
ldr r0,=(0b101010 | 0x02000000 | 1)
@-------------------------------------------------------------------------
@ Region 1 - Main Memory
@-------------------------------------------------------------------------
ldr r0,=( PAGE_4M | 0x02000000 | 1)
mcr p15, 0, r0, c6, c1, 0
ldr r0,=(0b100010| 0x027C0000 | 1)
@-------------------------------------------------------------------------
@ Region 2 - iwram
@-------------------------------------------------------------------------
ldr r0,=( PAGE_32K | 0x037F8000 | 1)
mcr p15, 0, r0, c6, c2, 0
ldr r0,=(0b110100| 0x08000000 | 1)
@-------------------------------------------------------------------------
@ Region 3 - DS Accessory
@-------------------------------------------------------------------------
ldr r0,=( PAGE_128M | 0x08000000 | 1)
mcr p15, 0, r0, c6, c3, 0
@ldr r0,=(0b011010 | 0x027C0000 | 1)
ldr r0,=(0b011010 | 0x00800000 | 1)
@-------------------------------------------------------------------------
@ Region 4 - DTCM
@-------------------------------------------------------------------------
@ldr r0,=( PAGE_16K | 0x027C0000 | 1)
ldr r0,=( PAGE_16K | 0x00800000 | 1)
mcr p15, 0, r0, c6, c4, 0
ldr r0,=(0b011100 | 0x01000000 | 1)
@-------------------------------------------------------------------------
@ Region 5 - ITCM
@-------------------------------------------------------------------------
ldr r0,=( PAGE_32K | 0x01000000 | 1)
mcr p15, 0, r0, c6, c5, 0
ldr r0,=(0b011100 | 0xFFFF0000 | 1)
@-------------------------------------------------------------------------
@ Region 6 - System ROM
@-------------------------------------------------------------------------
ldr r0,=( PAGE_32K | 0xFFFF0000 | 1)
mcr p15, 0, r0, c6, c6, 0
ldr r0,=(0b010110 | 0x027FF000 | 1)
@-------------------------------------------------------------------------
@ Region 7
@-------------------------------------------------------------------------
ldr r0,=( PAGE_4K | 0x027FF000 | 1)
mcr p15, 0, r0, c6, c7, 0
*/
@-------------------------------------------------------------------------
@ Write buffer enable
ldr r0,=0x2
@-------------------------------------------------------------------------
ldr r0,=0b00000110
mcr p15, 0, r0, c3, c0, 0
@-------------------------------------------------------------------------
@ DCache & ICache enable
@-------------------------------------------------------------------------
ldr r0,=0b01000110
ldr r0,=0x42
mcr p15, 0, r0, c2, c0, 0
mcr p15, 0, r0, c2, c0, 1
@-------------------------------------------------------------------------
@ IAccess
ldr r0,=0x05100011
@-------------------------------------------------------------------------
ldr r0,=0x06300333
mcr p15, 0, r0, c5, c0, 3
@-------------------------------------------------------------------------
@ DAccess
ldr r0,=0x15111011
@-------------------------------------------------------------------------
ldr r0,=0x36633333
mcr p15, 0, r0, c5, c0, 2
@-------------------------------------------------------------------------
@ Enable ICache, DCache, ITCM & DTCM
@-------------------------------------------------------------------------
mrc p15, 0, r0, c1, c0, 0
ldr r1,=0x55004
ldr r1,=0x55005
orr r0,r0,r1
mcr p15, 0, r0, c1, c0, 0
@ -87,6 +144,10 @@ _start:
msr cpsr, r0
ldr sp, =__sp_irq @ Set IRQ stack
mov r0, #0x13 @ Switch to SVC Mode
msr cpsr, r0
ldr sp, =__sp_svc @ Set SVC stack
mov r0, #0x1F @ Switch to System Mode
msr cpsr, r0
ldr sp, =__sp_usr @ Set user stack