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moving mpu setup to libnds
This commit is contained in:
Dave Murphy
parent
b9c58d1cd9
commit
9b4510f9e9
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@ -4,39 +4,6 @@
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.arch armv5te
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.cpu arm946e-s
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@---------------------------------------------------------------------------------
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#define PAGE_4K (0b01011 << 1)
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#define PAGE_8K (0b01100 << 1)
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#define PAGE_16K (0b01101 << 1)
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#define PAGE_32K (0b01110 << 1)
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#define PAGE_64K (0b01111 << 1)
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#define PAGE_128K (0b10000 << 1)
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#define PAGE_256K (0b10001 << 1)
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#define PAGE_512K (0b10010 << 1)
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#define PAGE_1M (0b10011 << 1)
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#define PAGE_2M (0b10100 << 1)
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#define PAGE_4M (0b10101 << 1)
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#define PAGE_8M (0b10110 << 1)
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#define PAGE_16M (0b10111 << 1)
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#define PAGE_32M (0b11000 << 1)
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#define PAGE_64M (0b11001 << 1)
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#define PAGE_128M (0b11010 << 1)
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#define PAGE_256M (0b11011 << 1)
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#define PAGE_512M (0b11100 << 1)
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#define PAGE_1G (0b11101 << 1)
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#define PAGE_2G (0b11110 << 1)
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#define PAGE_4G (0b11111 << 1)
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#define ITCM_LOAD (1<<19)
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#define ITCM_ENABLE (1<<18)
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#define DTCM_LOAD (1<<17)
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#define DTCM_ENABLE (1<<16)
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#define DISABLE_TBIT (1<<15)
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#define ROUND_ROBIN (1<<14)
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#define ALT_VECTORS (1<<13)
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#define ICACHE_ENABLE (1<<12)
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#define BIG_ENDIAN (1<<7)
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#define DCACHE_ENABLE (1<<2)
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#define PROTECT_ENABLE (1<<0)
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.equ _libnds_argv,0x02FFFE70
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@ -52,164 +19,8 @@ _start:
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mov r0, #0x04000000 @ IME = 0;
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str r0, [r0, #0x208]
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@---------------------------------------------------------------------------------
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@ turn the power on for M3
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@---------------------------------------------------------------------------------
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ldr r1, =0x8203
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add r0,r0,#0x304
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strh r1, [r0]
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ldr r1, =0x00002078 @ disable TCM and protection unit
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mcr p15, 0, r1, c1, c0
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@---------------------------------------------------------------------------------
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@ Protection Unit Setup added by Sasq
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@---------------------------------------------------------------------------------
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@ Disable cache
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mov r0, #0
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mcr p15, 0, r0, c7, c5, 0 @ Instruction cache
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mcr p15, 0, r0, c7, c6, 0 @ Data cache
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@ Wait for write buffer to empty
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mcr p15, 0, r0, c7, c10, 4
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ldr r0, =__dtcm_start
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orr r0,r0,#0x0a
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mcr p15, 0, r0, c9, c1,0 @ DTCM base = __dtcm_start, size = 16 KB
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mov r0,#0x20
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mcr p15, 0, r0, c9, c1,1 @ ITCM base = 0 , size = 32 MB
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@---------------------------------------------------------------------------------
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@ Setup memory regions similar to Release Version
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@---------------------------------------------------------------------------------
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@-------------------------------------------------------------------------
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@ Region 0 - IO registers
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@-------------------------------------------------------------------------
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ldr r0,=( PAGE_64M | 0x04000000 | 1)
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mcr p15, 0, r0, c6, c0, 0
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@-------------------------------------------------------------------------
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@ Region 1 - System ROM
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@-------------------------------------------------------------------------
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ldr r0,=( PAGE_32K | 0xFFFF0000 | 1)
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mcr p15, 0, r0, c6, c1, 0
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@-------------------------------------------------------------------------
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@ Region 2 - alternate vector base
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@-------------------------------------------------------------------------
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ldr r0,=( PAGE_4K | 0x00000000 | 1)
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mcr p15, 0, r0, c6, c2, 0
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@-------------------------------------------------------------------------
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@ Region 3 - DTCM
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@-------------------------------------------------------------------------
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ldr r0,=__dtcm_start
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orr r0,r0,#(PAGE_16K | 1)
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mcr p15, 0, r0, c6, c3, 0
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@-------------------------------------------------------------------------
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@ Region 4 - ITCM
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@-------------------------------------------------------------------------
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ldr r0,=__itcm_start
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@ align to 32k boundary
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mov r0,r0,lsr #15
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mov r0,r0,lsl #15
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orr r0,r0,#(PAGE_32K | 1)
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mcr p15, 0, r0, c6, c4, 0
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ldr r0,=0x4004008
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ldr r0,[r0]
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ands r0,r0,#0x8000
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bne dsi_mode
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@ set sensible stacks to allow bios call
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mov r0, #0x13 @ Switch to SVC Mode
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msr cpsr, r0
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mov r1,#0x03000000
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sub r1,r1,#0x1000
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mov sp,r1
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mov r0, #0x1F @ Switch to System Mode
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msr cpsr, r0
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sub r1,r1,#0x100
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mov sp,r1
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swi 0xf0000
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ldr r1,=( PAGE_128M | 0x08000000 | 1)
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cmp r0,#0
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bne debug_mode
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ldr r2,=( PAGE_4M | 0x02000000 | 1)
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ldr r3,=( PAGE_4M | 0x02C00000 | 1)
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mov r8,#0x02400000
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b setregions
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debug_mode:
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ldr r2,=( PAGE_8M | 0x02000000 | 1)
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ldr r3,=( PAGE_8M | 0x02800000 | 1)
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mov r8,#0x02800000
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b setregions
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dsi_mode:
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ldr r1,=( PAGE_8M | 0x03000000 | 1)
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ldr r2,=( PAGE_16M | 0x02000000 | 1)
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ldr r3,=( PAGE_16M | 0x0C000000 | 1)
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mov r8,#0x03000000
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setregions:
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@-------------------------------------------------------------------------
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@ Region 5 - DS Accessory (GBA Cart) / DSi switchable iwram
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@-------------------------------------------------------------------------
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mcr p15, 0, r1, c6, c5, 0
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@-------------------------------------------------------------------------
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@ Region 6 - Main Memory
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@-------------------------------------------------------------------------
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mcr p15, 0, r2, c6, c6, 0
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@-------------------------------------------------------------------------
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@ Region 7 - non cacheable main ram
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@-------------------------------------------------------------------------
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mcr p15, 0, r3, c6, c7, 0
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@-------------------------------------------------------------------------
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@ Write buffer enable
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@-------------------------------------------------------------------------
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ldr r0,=0b00000010
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mcr p15, 0, r0, c3, c0, 0
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@-------------------------------------------------------------------------
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@ DCache & ICache enable
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@-------------------------------------------------------------------------
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ldr r0,=0b01000010
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mcr p15, 0, r0, c2, c0, 0
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mcr p15, 0, r0, c2, c0, 1
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@-------------------------------------------------------------------------
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@ IAccess
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@-------------------------------------------------------------------------
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ldr r0,=0x33333363
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mcr p15, 0, r0, c5, c0, 3
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@-------------------------------------------------------------------------
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@ DAccess
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@-------------------------------------------------------------------------
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mcr p15, 0, r0, c5, c0, 2
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@-------------------------------------------------------------------------
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@ Enable ICache, DCache, ITCM & DTCM
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@-------------------------------------------------------------------------
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mrc p15, 0, r0, c1, c0, 0
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ldr r1,= ITCM_ENABLE | DTCM_ENABLE | ICACHE_ENABLE | DCACHE_ENABLE | PROTECT_ENABLE
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orr r0,r0,r1
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mcr p15, 0, r0, c1, c0, 0
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ldr r3,=__libnds_mpu_setup
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blx r3
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mov r0, #0x12 @ Switch to IRQ Mode
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msr cpsr, r0
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