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devkitARM: use new devkitarm-crtls package

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This commit is contained in:
Dave Murphy
2019-02-19 16:03:52 +00:00
parent b10d1e133f
commit 21d8bd0e46
37 changed files with 7 additions and 4065 deletions
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3
build-devkit.sh
View File

@@ -31,6 +31,7 @@ GENERAL_TOOLS_VER=1.0.2
LIBGBA_VER=0.5.2
GBATOOLS_VER=1.1.0
DKARM_RULES_VER=1.0.0
DKARM_CRTLS_VER=1.0.0
LIBNDS_VER=1.7.2
DEFAULT_ARM7_VER=0.7.4
@@ -229,7 +230,7 @@ if [ $VERSION -eq 1 ]; then
dfu-util-$DFU_UTIL_VER.tar.bz2 stlink-$STLINK_VER.tar.bz2 3dstools-$TOOLS3DS_VER.tar.bz2
picasso-$PICASSO_VER.tar.bz2 tex3ds-$TEX3DS_VER.tar.bz2 3dslink-$LINK3DS_VER.tar.bz2"
archives="devkitarm-rules-$DKARM_RULES_VER.tar.xz $archives"
archives="devkitarm-rules-$DKARM_RULES_VER.tar.xz devkitarm-crtls-$DKARM_CRTLS_VER.tar.xz $archives"
fi
if [ $VERSION -eq 2 ]; then

195
dkarm-eabi/crtls/3dsx.ld
View File

@@ -1,195 +0,0 @@
/*--------------------------------------------------------------------------------
This Source Code Form is subject to the terms of the Mozilla Public License,
v. 2.0. If a copy of the MPL was not distributed with this file, You can
obtain one at https://mozilla.org/MPL/2.0/.
--------------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
PHDRS
{
code PT_LOAD FLAGS(5) /* Read | Execute */;
rodata PT_LOAD FLAGS(4) /* Read */;
data PT_LOAD FLAGS(6) /* Read | Write */;
}
SECTIONS
{
/* =========== CODE section =========== */
PROVIDE(__start__ = 0x100000);
. = __start__;
.text ALIGN(0x1000) :
{
/* .init */
KEEP( *(.crt0) )
KEEP( *(.init) )
. = ALIGN(4);
/* .text */
*(.text)
*(.text.*)
*(.glue_7)
*(.glue_7t)
*(.stub)
*(.gnu.warning)
*(.gnu.linkonce.t*)
. = ALIGN(4);
/* .fini */
KEEP( *(.fini) )
. = ALIGN(4);
} : code
/* =========== RODATA section =========== */
. = ALIGN(0x1000);
.rodata :
{
*(.rodata)
*(.roda)
*(.rodata.*)
*all.rodata*(*)
*(.gnu.linkonce.r*)
SORT(CONSTRUCTORS)
. = ALIGN(4);
} : rodata
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } : rodata
__exidx_start = .;
ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } : rodata
__exidx_end = .;
/* =========== DATA section =========== */
. = ALIGN(0x1000);
.data :
{
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
CONSTRUCTORS
. = ALIGN(4);
} : data
.tdata ALIGN(4) :
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__tdata_lma = .;
*(.tdata)
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*(.gnu.linkonce.td.*)
. = ALIGN(4);
__tdata_lma_end = .;
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.tbss ALIGN(4) :
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*(.gnu.linkonce.tb.*)
*(.tcommon)
. = ALIGN(4);
} : data
.preinit_array ALIGN(4) :
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PROVIDE (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE (__preinit_array_end = .);
} : data
.init_array ALIGN(4) :
{
PROVIDE (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
PROVIDE (__init_array_end = .);
} : data
.fini_array ALIGN(4) :
{
PROVIDE (__fini_array_start = .);
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
PROVIDE (__fini_array_end = .);
} : data
.ctors ALIGN(4) :
{
KEEP (*crtbegin.o(.ctors)) /* MUST be first -- GCC requires it */
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} : data
.dtors ALIGN(4) :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} : data
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*(COMMON)
. = ALIGN(4);
/* Reserve space for the TLS segment of the main thread */
__tls_start = .;
. += + SIZEOF(.tdata) + SIZEOF(.tbss);
__tls_end = .;
} : data
__bss_end__ = .;
__end__ = ABSOLUTE(.) ;
/* ==================
==== Metadata ====
================== */
/* Discard sections that difficult post-processing */
/DISCARD/ : { *(.group .comment .note) }
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
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.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
}

8
dkarm-eabi/crtls/3dsx.specs
View File

@@ -1,8 +0,0 @@
%rename link old_link
*link:
%(old_link) -T 3dsx.ld%s -d --emit-relocs --use-blx --gc-sections
*startfile:
3dsx_crt0%O%s crti%O%s crtbegin%O%s

79
dkarm-eabi/crtls/3dsx_crt0.s
View File

@@ -1,79 +0,0 @@
/*--------------------------------------------------------------------------------
This Source Code Form is subject to the terms of the Mozilla Public License,
v. 2.0. If a copy of the MPL was not distributed with this file, You can
obtain one at https://mozilla.org/MPL/2.0/.
--------------------------------------------------------------------------------*/
@---------------------------------------------------------------------------------
@ 3DS processor selection
@---------------------------------------------------------------------------------
.cpu mpcore
@---------------------------------------------------------------------------------
@---------------------------------------------------------------------------------
.section ".crt0","ax"
.global _start, __service_ptr, __apt_appid, __heap_size, __linear_heap_size, __system_arglist, __system_runflags
@---------------------------------------------------------------------------------
.align 2
.arm
@---------------------------------------------------------------------------------
_start:
@---------------------------------------------------------------------------------
b startup
.ascii "_prm"
__service_ptr:
.word 0 @ Pointer to service handle override list -- if non-NULL it is assumed that we have been launched from a homebrew launcher
__apt_appid:
.word 0x300 @ Program APPID
__heap_size:
.word 24*1024*1024 @ Default heap size (24 MiB)
__linear_heap_size:
.word 32*1024*1024 @ Default linear heap size (32 MiB)
__system_arglist:
.word 0 @ Pointer to argument list (argc (u32) followed by that many NULL terminated strings)
__system_runflags:
.word 0 @ Flags to signal runtime restrictions to ctrulib
startup:
@ Save return address
mov r4, lr
@ Clear the BSS section
ldr r0, =__bss_start__
ldr r1, =__bss_end__
sub r1, r1, r0
bl ClearMem
@ System initialization
mov r0, r4
bl initSystem
@ Set up argc/argv arguments for main()
ldr r0, =__system_argc
ldr r1, =__system_argv
ldr r0, [r0]
ldr r1, [r1]
@ Jump to user code
ldr r3, =main
ldr lr, =__ctru_exit
bx r3
@---------------------------------------------------------------------------------
@ Clear memory to 0x00 if length != 0
@ r0 = Start Address
@ r1 = Length
@---------------------------------------------------------------------------------
ClearMem:
@---------------------------------------------------------------------------------
mov r2, #3 @ Round down to nearest word boundary
add r1, r1, r2 @ Shouldn't be needed
bics r1, r1, r2 @ Clear 2 LSB (and set Z)
bxeq lr @ Quit if copy size is 0
mov r2, #0
ClrLoop:
stmia r0!, {r2}
subs r1, r1, #4
bne ClrLoop
bx lr

13
dkarm-eabi/crtls/Makefile
View File

@@ -1,13 +0,0 @@
include $(DEVKITARM)/base_rules
all:
$(CC) -x assembler-with-cpp -marm -c $(CRT)_crt0.s -o$(CRT)_crt0.o
$(CC) -x assembler-with-cpp -mthumb -c $(CRT)_crt0.s -o thumb/$(CRT)_crt0.o
ds_arm7_vram_crt0:
$(CC) -x assembler-with-cpp -marm -c -DVRAM ds_arm7_crt0.s -ods_arm7_vram_crt0.o
$(CC) -x assembler-with-cpp -mthumb -c -DVRAM ds_arm7_crt0.s -othumb/ds_arm7_vram_crt0.o
3dsx_crt0:
$(CC) -march=armv6k -mfloat-abi=hard -c 3dsx_crt0.s -o armv6k/fpu/3dsx_crt0.o

195
dkarm-eabi/crtls/dldi.ld
View File

@@ -1,195 +0,0 @@
/*--------------------------------------------------------------------------------
This Source Code Form is subject to the terms of the Mozilla Public License,
v. 2.0. If a copy of the MPL was not distributed with this file, You can
obtain one at https://mozilla.org/MPL/2.0/.
--------------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
MEMORY {
/* This base address is chosen to be a reserved instruction in THUMB mode,
and SWILT in ARM mode, with an impossible SWI value. This should allow
the patcher / linker to find all shifted addresses within each section.
Changed sections are: glue_7, got
*/
ddmem : ORIGIN = 0xBF800000, LENGTH = 16K
}
SECTIONS
{
.crt0 :
{
__text_start = . ;
KEEP (*(.crt0))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ddmem = 0xff
.text : /* ALIGN (4): */
{
*(.text.*)
*(.stub)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.gnu.linkonce.t*)
__glue_start = ABSOLUTE(.);
*(.glue_7)
*(.glue_7t)
__glue_end = ABSOLUTE(.);
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ddmem = 0xff
.fini :
{
KEEP (*(.fini))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ddmem =0xff
__text_end = . ;
.rodata :
{
*(.rodata)
*all.rodata*(*)
*(.roda)
*(.rodata.*)
*(.gnu.linkonce.r*)
SORT(CONSTRUCTORS)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ddmem = 0xff
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >ddmem
__exidx_start = .;
.ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } >ddmem
__exidx_end = .;
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
. = ALIGN(32 / 8);
PROVIDE (__preinit_array_start = .);
.preinit_array : { KEEP (*(.preinit_array)) } >ddmem = 0xff
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >ddmem = 0xff
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >ddmem = 0xff
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ddmem = 0xff
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ddmem = 0xff
.eh_frame :
{
KEEP (*(.eh_frame))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ddmem = 0xff
.gcc_except_table :
{
*(.gcc_except_table)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ddmem = 0xff
.jcr : { KEEP (*(.jcr)) } >ddmem = 0
__got_start = . ;
.got :
{
*(.got.plt)
*(.got)
*(.rel.got)
} >ddmem = 0
__got_end = . ;
.data ALIGN(4) : {
__data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
CONSTRUCTORS
. = ALIGN(4);
__data_end = ABSOLUTE(.) ;
} >ddmem = 0xff
__data_end = . ;
.bss ALIGN(4) :
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__bss_start = ABSOLUTE(.);
__bss_start__ = ABSOLUTE(.);
*(.dynbss)
*(.gnu.linkonce.b*)
*(.bss*)
*(COMMON)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ddmem
__bss_end = . ;
__bss_end__ = . ;
_end = . ;
__end__ = . ;
PROVIDE (end = _end);
/* Stabs debugging sections. */
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.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
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/* GNU DWARF 1 extensions */
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/* DWARF 1.1 and DWARF 2 */
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/* DWARF 2 */
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.stack 0x80000 : { _stack = .; *(.stack) }
/* These must appear regardless of . */
}

232
dkarm-eabi/crtls/ds_arm7.ld
View File

@@ -1,232 +0,0 @@
/*--------------------------------------------------------------------------------
This Source Code Form is subject to the terms of the Mozilla Public License,
v. 2.0. If a copy of the MPL was not distributed with this file, You can
obtain one at https://mozilla.org/MPL/2.0/.
--------------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
PHDRS {
crt0 PT_LOAD FLAGS(7);
arm7 PT_LOAD FLAGS(7);
arm7i PT_LOAD FLAGS(0x100007);
}
MEMORY {
ewram : ORIGIN = 0x02380000, LENGTH = 12M - 512K
rom : ORIGIN = 0x08000000, LENGTH = 32M
iwram : ORIGIN = 0x037f8000, LENGTH = 96K
twl_ewram : ORIGIN = 0x02e80000, LENGTH = 512K - 64K
twl_iwram : ORIGIN = 0x03000000, LENGTH = 256K
}
__iwram_start = ORIGIN(iwram);
__iwram_top = ORIGIN(iwram)+ LENGTH(iwram);
__sp_irq = __iwram_top - 0x100;
__sp_svc = __sp_irq - 0x100;
__sp_usr = __sp_svc - 0x100;
__irq_flags = 0x04000000 - 8;
__irq_flagsaux = 0x04000000 - 0x40;
__irq_vector = 0x04000000 - 4;
SECTIONS
{
.twl :
{
__arm7i_lma__ = LOADADDR(.twl);
__arm7i_start__ = .;
*(.twl)
*.twl*(.text .stub .text.* .gnu.linkonce.t.*)
*.twl*(.rodata)
*.twl*(.roda)
*.twl*(.rodata.*)
*.twl*(.data)
*.twl*(.data.*)
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__arm7i_end__ = .;
} >twl_iwram AT>twl_ewram :arm7i
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.crt0 :
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} >ewram :crt0
.text :
{
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__arm7_start__ = .;
KEEP (*(SORT_NONE(.init)))
*(.plt)
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >iwram AT>ewram :arm7
.fini :
{
KEEP (*(.fini))
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.rodata :
{
*(.rodata)
*all.rodata*(*)
*(.roda)
*(.rodata.*)
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.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >iwram AT>ewram
.ARM.exidx : {
__exidx_start = .;
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
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/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
.preinit_array : {
. = ALIGN(32 / 8);
PROVIDE (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE (__preinit_array_end = .);
} >iwram AT>ewram
.init_array : {
PROVIDE (__init_array_start = .);
KEEP (*(.init_array))
PROVIDE (__init_array_end = .);
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PROVIDE (__fini_array_start = .);
KEEP (*(.fini_array))
PROVIDE (__fini_array_end = .);
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.ctors :
{
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >iwram AT>ewram
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >iwram AT>ewram
.eh_frame :
{
KEEP (*(.eh_frame))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >iwram AT>ewram
.gcc_except_table :
{
*(.gcc_except_table)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >iwram AT>ewram
.jcr : { KEEP (*(.jcr)) } >iwram AT>ewram
.got : { *(.got.plt) *(.got) } >iwram AT>ewram
.data ALIGN(4) : {
__data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
CONSTRUCTORS
. = ALIGN(4);
__data_end = ABSOLUTE(.) ;
} >iwram AT>ewram
.bss ALIGN(4) (NOLOAD) :
{
__arm7_end__ = .;
__bss_start = ABSOLUTE(.);
__bss_start__ = ABSOLUTE(.);
*(.dynbss)
*(.gnu.linkonce.b*)
*(.bss*)
*(COMMON)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
__bss_end__ = ABSOLUTE(.);
__end__ = ABSOLUTE(.);
} >iwram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
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.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
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.debug_varnames 0 : { *(.debug_varnames) }
/* These must appear regardless of . */
}

8
dkarm-eabi/crtls/ds_arm7.specs
View File

@@ -1,8 +0,0 @@
%rename link old_link
*link:
%(old_link) -T ds_arm7.ld%s --gc-sections
*startfile:
ds_arm7_crt0%O%s crti%O%s crtbegin%O%s

185
dkarm-eabi/crtls/ds_arm7_crt0.s
View File

@@ -1,185 +0,0 @@
/*--------------------------------------------------------------------------------
This Source Code Form is subject to the terms of the Mozilla Public License,
v. 2.0. If a copy of the MPL was not distributed with this file, You can
obtain one at https://mozilla.org/MPL/2.0/.
--------------------------------------------------------------------------------*/
@---------------------------------------------------------------------------------
.section ".crt0","ax"
.global _start
@---------------------------------------------------------------------------------
.align 4
.arm
@---------------------------------------------------------------------------------
_start:
@---------------------------------------------------------------------------------
mov r0, #0x04000000 @ IME = 0;
mov r1, #0
str r1, [r0, #0x208]
mov r0, #0x12 @ Switch to IRQ Mode
msr cpsr, r0
ldr sp, =__sp_irq @ Set IRQ stack
mov r0, #0x13 @ Switch to SVC Mode
msr cpsr, r0
ldr sp, =__sp_svc @ Set SVC stack
mov r0, #0x1F @ Switch to System Mode
msr cpsr, r0
ldr sp, =__sp_usr @ Set user stack
#ifndef VRAM
adr r1, __sync_start @ Perform ARM7<->ARM9 sync code
ldr r2, =__arm7_start__
mov r3, #(__sync_end-__sync_start)
mov r8, r2
bl CopyMem
mov r3, r8
bl _blx_r3_stub
@---------------------------------------------------------------------------------
@ Copy arm7 binary from LMA to VMA (EWRAM to IWRAM)
@---------------------------------------------------------------------------------
adr r0, arm7lma @ Calculate ARM7 LMA
ldr r1, [r0]
add r1, r1, r0
ldr r2, =__arm7_start__
ldr r4, =__arm7_end__
bl CopyMemCheck
#else
bl __sync_start
#endif
ldr r0, =__bss_start__ @ Clear BSS section to 0x00
ldr r1, =__bss_end__
sub r1, r1, r0
bl ClearMem
cmp r10, #1
bne NotTWL
ldr r1, =__dsimode @ set DSi mode flag
strb r10, [r1]
#ifndef VRAM
ldr r1, =0x02ffe1d8 @ Get ARM7i LMA from header
ldr r1, [r1]
ldr r2, =__arm7i_start__
ldr r4, =__arm7i_end__
bl CopyMemCheck
ldr r0, =__twl_bss_start__ @ Clear TWL BSS section to 0x00
ldr r1, =__twl_bss_end__
sub r1, r1, r0
bl ClearMem
#endif
NotTWL:
ldr r3, =__libc_init_array @ global constructors
bl _blx_r3_stub
mov r0, #0 @ int argc
mov r1, #0 @ char *argv[]
ldr r3, =main
ldr lr,=__libnds_exit
mov r12, #0x4000000 @ tell arm9 we are ready
mov r9, #0
str r9, [r12, #0x180]
_blx_r3_stub:
bx r3
#ifndef VRAM
arm7lma:
.word __arm7_lma__ - .
#endif
.pool
@---------------------------------------------------------------------------------
@ ARM7<->ARM9 synchronization code
@---------------------------------------------------------------------------------
__sync_start:
push {lr}
mov r12, #0x4000000
mov r9, #0x0
bl IPCSync
mov r9, #(0x9<<8)
str r9, [r12, #0x180]
mov r9, #0xA
bl IPCSync
mov r9, #(0xB<<8)
str r9, [r12, #0x180]
mov r9, #0xC
bl IPCSync
mov r9, #(0xD<<8)
str r9, [r12, #0x180]
IPCRecvFlag:
ldr r10, [r12, #0x180]
and r10, r10, #0xF
cmp r10, #0xC
beq IPCRecvFlag
pop {pc}
IPCSync:
ldr r10, [r12, #0x180]
and r10, r10, #0xF
cmp r10, r9
bne IPCSync
bx lr
__sync_end:
@---------------------------------------------------------------------------------
@ Clear memory to 0x00 if length != 0
@ r0 = Start Address
@ r1 = Length
@---------------------------------------------------------------------------------
ClearMem:
@---------------------------------------------------------------------------------
mov r2, #3 @ Round down to nearest word boundary
add r1, r1, r2 @ Shouldn't be needed
bics r1, r1, r2 @ Clear 2 LSB (and set Z)
bxeq lr @ Quit if copy size is 0
mov r2, #0
ClrLoop:
stmia r0!, {r2}
subs r1, r1, #4
bne ClrLoop
bx lr
@---------------------------------------------------------------------------------
@ Copy memory if length != 0
@ r1 = Source Address
@ r2 = Dest Address
@ r4 = Dest Address + Length
@---------------------------------------------------------------------------------
CopyMemCheck:
@---------------------------------------------------------------------------------
cmp r1, r2
bxeq lr
sub r3, r4, r2 @ Is there any data to copy?
@---------------------------------------------------------------------------------
@ Copy memory
@ r1 = Source Address
@ r2 = Dest Address
@ r3 = Length
@---------------------------------------------------------------------------------
CopyMem:
@---------------------------------------------------------------------------------
mov r0, #3 @ These commands are used in cases where
add r3, r3, r0 @ the length is not a multiple of 4,
bics r3, r3, r0 @ even though it should be.
bxeq lr @ Length is zero, so exit
CIDLoop:
ldmia r1!, {r0}
stmia r2!, {r0}
subs r3, r3, #4
bne CIDLoop
bx lr
@---------------------------------------------------------------------------------
.align
.pool
.end
@---------------------------------------------------------------------------------

192
dkarm-eabi/crtls/ds_arm7_iwram.ld
View File

@@ -1,192 +0,0 @@
/*--------------------------------------------------------------------------------
This Source Code Form is subject to the terms of the Mozilla Public License,
v. 2.0. If a copy of the MPL was not distributed with this file, You can
obtain one at https://mozilla.org/MPL/2.0/.
--------------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
MEMORY {
rom : ORIGIN = 0x08000000, LENGTH = 32M
iwram : ORIGIN = 0x037f8000, LENGTH = 96K
}
__iwram_start = ORIGIN(iwram);
__iwram_top = ORIGIN(iwram)+ LENGTH(iwram);
__sp_irq = __iwram_top - 0x100;
__sp_svc = __sp_irq - 0x100;
__sp_usr = __sp_svc - 0x100;
__irq_flags = 0x04000000 - 8;
__irq_flagsaux = 0x04000000 - 0x40;
__irq_vector = 0x04000000 - 4;
SECTIONS
{
.crt0 :
{
__text_start = . ;
KEEP (*(.crt0))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >iwram = 0xff
.init :
{
KEEP (*(SORT_NONE(.init)))
} >iwram = 0xff
.plt : { *(.plt) } >iwram = 0xff
.text : /* ALIGN (4): */
{
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >iwram = 0xff
.fini :
{
KEEP (*(.fini))
} >iwram =0xff
__text_end = . ;
.rodata :
{
*(.rodata)
*all.rodata*(*)
*(.roda)
*(.rodata.*)
*(.gnu.linkonce.r*)
SORT(CONSTRUCTORS)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >iwram = 0xff
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >iwram
__exidx_start = .;
.ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } >iwram
__exidx_end = .;
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
. = ALIGN(32 / 8);
PROVIDE (__preinit_array_start = .);
.preinit_array : { KEEP (*(.preinit_array)) } >iwram = 0xff
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >iwram = 0xff
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >iwram = 0xff
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >iwram = 0xff
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >iwram = 0xff
.eh_frame :
{
KEEP (*(.eh_frame))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >iwram = 0xff
.gcc_except_table :
{
*(.gcc_except_table)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >iwram = 0xff
.jcr : { KEEP (*(.jcr)) } >iwram = 0
.got : { *(.got.plt) *(.got) } >iwram = 0
.data ALIGN(4) : {
__data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
CONSTRUCTORS
. = ALIGN(4);
__data_end = ABSOLUTE(.) ;
} >iwram = 0xff
__arm7_end__ = .;
.bss ALIGN(4) :
{
__bss_start = ABSOLUTE(.);
__bss_start__ = ABSOLUTE(.);
*(.dynbss)
*(.gnu.linkonce.b*)
*(.bss*)
*(COMMON)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
__bss_end__ = ABSOLUTE(.);
__end__ = ABSOLUTE(.);
} >iwram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack 0x80000 : { _stack = .; *(.stack) }
/* These must appear regardless of . */
}

8
dkarm-eabi/crtls/ds_arm7_iwram.specs
View File

@@ -1,8 +0,0 @@
%rename link old_link
*link:
%(old_link) -T ds_arm7_iwram.ld%s
*startfile:
ds_arm7_vram_crt0%O%s crti%O%s crtbegin%O%s

196
dkarm-eabi/crtls/ds_arm7_vram.ld
View File

@@ -1,196 +0,0 @@
/*--------------------------------------------------------------------------------
This Source Code Form is subject to the terms of the Mozilla Public License,
v. 2.0. If a copy of the MPL was not distributed with this file, You can
obtain one at https://mozilla.org/MPL/2.0/.
--------------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
MEMORY {
rom : ORIGIN = 0x08000000, LENGTH = 32M
iwram : ORIGIN = 0x037f8000, LENGTH = 96K
vram : ORIGIN = 0x06000000, LENGTH = 256K
}
__iwram_start = ORIGIN(iwram);
__iwram_top = ORIGIN(iwram)+ LENGTH(iwram);
__sp_irq = __iwram_top - 0x100;
__sp_svc = __sp_irq - 0x100;
__sp_usr = __sp_svc - 0x100;
__irq_flags = 0x04000000 - 8;
__irq_flagsaux = 0x04000000 - 0x40;
__irq_vector = 0x04000000 - 4;
SECTIONS
{
.crt0 :
{
__text_start = . ;
KEEP (*(.crt0))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >vram = 0xff
__arm7_lma__ = .;
__arm7_start__ = .;
.init :
{
KEEP (*(SORT_NONE(.init)))
} >vram = 0xff
.plt : { *(.plt) } >vram = 0xff
.text : /* ALIGN (4): */
{
*(.text .stub .text.* .twl .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >vram = 0xff
.fini :
{
KEEP (*(.fini))
} >vram =0xff
__text_end = . ;
.rodata :
{
*(.rodata)
*all.rodata*(*)
*(.roda)
*(.rodata.*)
*(.gnu.linkonce.r*)
SORT(CONSTRUCTORS)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >vram = 0xff
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >vram
__exidx_start = .;
.ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } >vram
__exidx_end = .;
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
. = ALIGN(32 / 8);
PROVIDE (__preinit_array_start = .);
.preinit_array : { KEEP (*(.preinit_array)) } >vram = 0xff
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >vram = 0xff
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >vram = 0xff
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >vram = 0xff
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >vram = 0xff
.eh_frame :
{
KEEP (*(.eh_frame))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >vram = 0xff
.gcc_except_table :
{
*(.gcc_except_table)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >vram = 0xff
.jcr : { KEEP (*(.jcr)) } >vram = 0
.got : { *(.got.plt) *(.got) } >vram = 0
.data ALIGN(4) : {
__data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
CONSTRUCTORS
. = ALIGN(4);
__data_end = ABSOLUTE(.) ;
} >vram = 0xff
__arm7_end__ = .;
.bss ALIGN(4) (NOLOAD) :
{
__bss_start = ABSOLUTE(.);
__bss_start__ = ABSOLUTE(.);
*(.dynbss)
*(.gnu.linkonce.b*)
*(.bss*)
*(.twl_bss)
*(COMMON)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
__bss_end__ = ABSOLUTE(.);
__end__ = ABSOLUTE(.);
} >vram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack 0x80000 : { _stack = .; *(.stack) }
/* These must appear regardless of . */
}

8
dkarm-eabi/crtls/ds_arm7_vram.specs
View File

@@ -1,8 +0,0 @@
%rename link old_link
*link:
%(old_link) -T ds_arm7_vram.ld%s
*startfile:
ds_arm7_vram_crt0%O%s crti%O%s crtbegin%O%s

284
dkarm-eabi/crtls/ds_arm9.ld
View File

@@ -1,284 +0,0 @@
/*--------------------------------------------------------------------------------
This Source Code Form is subject to the terms of the Mozilla Public License,
v. 2.0. If a copy of the MPL was not distributed with this file, You can
obtain one at https://mozilla.org/MPL/2.0/.
--------------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
__ewram_end = ORIGIN(ewram) + LENGTH(ewram);
__eheap_end = ORIGIN(ewram) + LENGTH(ewram);
__dtcm_top = ORIGIN(dtcm) + LENGTH(dtcm);
__irq_flags = __dtcm_top - 0x08;
__irq_vector = __dtcm_top - 0x04;
__sp_svc = __dtcm_top - 0x100;
__sp_irq = __sp_svc - 0x100;
__sp_usr = __sp_irq - 0x100;
PHDRS {
main PT_LOAD FLAGS(7);
dtcm PT_LOAD FLAGS(7);
itcm PT_LOAD FLAGS(7);
vectors PT_LOAD FLAGS(7);
twl PT_LOAD FLAGS(0x100007);
}
SECTIONS
{
/* Secure area crap */
.secure : { *(.secure) } >ewram :main = 0
.crt0 :
{
__text_start = . ;
KEEP (*(.crt0))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ewram :main = 0x00
.plt : { *(.plt) } >ewram :main = 0xff
.init :
{
KEEP (*(SORT_NONE(.init)))
} >ewram :main
.text : /* ALIGN (4): */
{
*(EXCLUDE_FILE(*.itcm* *.vectors* *.twl*) .text)
*(EXCLUDE_FILE(*.itcm* *.vectors* *.twl*) .stub)
*(EXCLUDE_FILE(*.itcm* *.vectors* *.twl*) .text.*)
/* .gnu.warning sections are handled specially by elf32.em. */
*(EXCLUDE_FILE(*.twl*) .gnu.warning)
*(EXCLUDE_FILE(*.twl*) .gnu.linkonce.t*)
*(.glue_7)
*(.glue_7t)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ewram :main = 0xff
.fini :
{
KEEP (*(.fini))
} >ewram :main =0xff
__text_end = . ;
.rodata :
{
*(EXCLUDE_FILE(*.twl*) .rodata)
*all.rodata*(*)
*(EXCLUDE_FILE(*.twl*) .roda)
*(EXCLUDE_FILE(*.twl*) .rodata.*)
*(EXCLUDE_FILE(*.twl*) .gnu.linkonce.r*)
SORT(CONSTRUCTORS)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ewram :main = 0xff
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >ewram :main
__exidx_start = .;
ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } >ewram :main
__exidx_end = .;
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
. = ALIGN(32 / 8);
PROVIDE (__preinit_array_start = .);
.preinit_array : { KEEP (*(.preinit_array)) } >ewram :main = 0xff
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array :
{
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
} >ewram :main = 0xff
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array :
{
KEEP (*(.fini_array))
KEEP (*(SORT(.fini_array.*)))
} >ewram :main = 0xff
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ewram :main = 0xff
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ewram :main = 0xff
.eh_frame :
{
KEEP (*(.eh_frame))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ewram :main = 0xff
.gcc_except_table :
{
*(.gcc_except_table)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ewram :main = 0xff
.jcr : { KEEP (*(.jcr)) } >ewram :main = 0
.got : { *(.got.plt) *(.got) *(.rel.got) } >ewram :main = 0
.ewram ALIGN(4) :
{
__ewram_start = ABSOLUTE(.) ;
*(.ewram)
*ewram.*(.text)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ewram :main = 0xff
.data ALIGN(4) :
{
__data_start = ABSOLUTE(.);
*(EXCLUDE_FILE(*.twl*) .data)
*(EXCLUDE_FILE(*.twl*) .data.*)
*(EXCLUDE_FILE(*.twl*) .gnu.linkonce.d*)
CONSTRUCTORS
. = ALIGN(4);
__data_end = ABSOLUTE(.) ;
} >ewram :main = 0xff
__bss_vma = . ;
.dtcm :
{
__dtcm_lma = LOADADDR(.dtcm);
__dtcm_start = ABSOLUTE(.);
*(.dtcm)
*(.dtcm.*)
. = ALIGN(4);
__dtcm_end = ABSOLUTE(.);
} >dtcm AT>ewram :dtcm = 0xff
.itcm :
{
__itcm_lma = LOADADDR(.itcm);
__itcm_start = ABSOLUTE(.);
*(.itcm)
*.itcm*(.text .stub .text.*)
. = ALIGN(4);
__itcm_end = ABSOLUTE(.);
} >itcm AT>ewram :itcm = 0xff
.vectors :
{
__vectors_lma = LOADADDR(.vectors);
__vectors_start = ABSOLUTE(.);
KEEP(*(.vectors .vectors.*))
. = ALIGN(4);
__vectors_end = ABSOLUTE(.);
} >vectors AT>ewram :vectors = 0xff
.sbss __dtcm_end (NOLOAD):
{
__sbss_start = ABSOLUTE(.);
__sbss_start__ = ABSOLUTE(.);
*(.sbss)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
__sbss_end = ABSOLUTE(.);
} >dtcm :NONE
.bss __bss_vma (NOLOAD):
{
__bss_start = ABSOLUTE(.);
__bss_start__ = ABSOLUTE(.);
*(EXCLUDE_FILE(*.twl*) .dynbss)
*(EXCLUDE_FILE(*.twl*) .gnu.linkonce.b*)
*(EXCLUDE_FILE(*.twl*) .bss*)
*(EXCLUDE_FILE(*.twl*) COMMON)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
__bss_end__ = ABSOLUTE(.) ;
__end__ = ABSOLUTE(.) ;
} >ewram :NONE
.twl __end__ : AT(MAX(0x2400000,MAX(__end__,LOADADDR(.vectors)+SIZEOF(.vectors))))
{
__arm9i_lma__ = LOADADDR(.twl);
__arm9i_start__ = ABSOLUTE(.);
*(.twl)
*.twl*(.text .stub .text.* .gnu.linkonce.t.*)
*.twl*(.rodata)
*.twl*(.roda)
*.twl*(.rodata.*)
*.twl*(.data)
*.twl*(.data.*)
*.twl*(.gnu.linkonce.d*)
__arm9i_end__ = ABSOLUTE(.);
} :twl
.twl_bss __arm9i_end__ (NOLOAD):
{
__twl_bss_start__ = ABSOLUTE(.);
*(.twl_bss)
*.twl*(.dynbss)
*.twl*(.gnu.linkonce.b*)
*.twl*(.bss*)
*.twl*(COMMON)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
__twl_bss_end__ = ABSOLUTE(.);
__twl_end__ = ABSOLUTE(.);
} :NONE
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack 0x80000 : { _stack = .; *(.stack) }
/* These must appear regardless of . */
}

11
dkarm-eabi/crtls/ds_arm9.mem
View File

@@ -1,11 +0,0 @@
/*--------------------------------------------------------------------------------
This Source Code Form is subject to the terms of the Mozilla Public License,
v. 2.0. If a copy of the MPL was not distributed with this file, You can
obtain one at https://mozilla.org/MPL/2.0/.
--------------------------------------------------------------------------------*/
MEMORY {
ewram : ORIGIN = 0x02000000, LENGTH = 4M - 512k
dtcm : ORIGIN = 0x0b000000, LENGTH = 16K
vectors : ORIGIN = 0x01000000, LENGTH = 256
itcm : ORIGIN = 0x01000100, LENGTH = 32K - 256
}

8
dkarm-eabi/crtls/ds_arm9.specs
View File

@@ -1,8 +0,0 @@
%rename link old_link
*link:
%(old_link) -T ds_arm9.mem%s -T ds_arm9.ld%s --gc-sections
*startfile:
ds_arm9_crt0%O%s crti%O%s crtbegin%O%s

272
dkarm-eabi/crtls/ds_arm9_crt0.s
View File

@@ -1,272 +0,0 @@
/*--------------------------------------------------------------------------------
This Source Code Form is subject to the terms of the Mozilla Public License,
v. 2.0. If a copy of the MPL was not distributed with this file, You can
obtain one at https://mozilla.org/MPL/2.0/.
--------------------------------------------------------------------------------*/
@---------------------------------------------------------------------------------
@ DS processor selection
@---------------------------------------------------------------------------------
.arch armv5te
.cpu arm946e-s
@---------------------------------------------------------------------------------
.equ _libnds_argv,0x02FFFE70
@---------------------------------------------------------------------------------
.section ".crt0","ax"
.global _start
@---------------------------------------------------------------------------------
.align 4
.arm
@---------------------------------------------------------------------------------
_start:
@---------------------------------------------------------------------------------
mov r0, #0x04000000 @ IME = 0;
str r0, [r0, #0x208]
@ set sensible stacks to allow bios call
mov r0, #0x13 @ Switch to SVC Mode
msr cpsr, r0
mov r1,#0x03000000
sub r1,r1,#0x1000
mov sp,r1
mov r0, #0x1F @ Switch to System Mode
msr cpsr, r0
sub r1,r1,#0x100
mov sp,r1
ldr r3, =__libnds_mpu_setup
blx r3
mov r0, #0x12 @ Switch to IRQ Mode
msr cpsr, r0
ldr sp, =__sp_irq @ Set IRQ stack
mov r0, #0x13 @ Switch to SVC Mode
msr cpsr, r0
ldr sp, =__sp_svc @ Set SVC stack
mov r0, #0x1F @ Switch to System Mode
msr cpsr, r0
ldr sp, =__sp_usr @ Set user stack
mov r12, #0x4000000 @ Read system ROM status (NTR/TWL)
ldrb r11, [r12,r12,lsr #12]
and r11, r11, #0x3
mov r9, #(0x0<<8) @ Synchronize with ARM7
str r9, [r12, #0x180]
mov r9, #0x9
bl IPCSync
mov r9, #(0xA<<8)
str r9, [r12, #0x180]
mov r9, #0xB
bl IPCSync
mov r9, #(0xC<<8)
str r9, [r12, #0x180]
mov r9, #0xD
bl IPCSync
mov r9, r11, lsl #8
str r9, [r12, #0x180]
mov r9, #0
bl IPCSync
str r9, [r12, #0x180]
ldr r1, =__itcm_lma @ Copy instruction tightly coupled memory (itcm section) from LMA to VMA
ldr r2, =__itcm_start
ldr r4, =__itcm_end
bl CopyMemCheck
ldr r1, =__vectors_lma @ Copy reserved vectors area (itcm section) from LMA to VMA
ldr r2, =__vectors_start
ldr r4, =__vectors_end
bl CopyMemCheck
ldr r1, =__dtcm_lma @ Copy data tightly coupled memory (dtcm section) from LMA to VMA
ldr r2, =__dtcm_start
ldr r4, =__dtcm_end
bl CopyMemCheck
cmp r11, #1
ldrne r10, =__end__ @ (DS mode) heap start
ldreq r10, =__twl_end__ @ (DSi mode) heap start
bl checkARGV @ check and process argv trickery
ldr r0, =__bss_start__ @ Clear BSS section
ldr r1, =__bss_end__
sub r1, r1, r0
bl ClearMem
ldr r0, =__sbss_start @ Clear SBSS section
ldr r1, =__sbss_end
sub r1, r1, r0
bl ClearMem
cmp r11, #1
bne NotTWL
ldr r9, =__dsimode @ set DSi mode flag
strb r11, [r9]
@ Copy TWL area (arm9i section) from LMA to VMA
ldr r1, =0x02ffe1c8 @ Get ARM9i LMA from header
ldr r1, [r1]
ldr r2, =__arm9i_start__
cmp r1, r2 @ skip copy if LMA=VMA
ldrne r4, =__arm9i_end__
blne CopyMemCheck
ldr r0, =__twl_bss_start__ @ Clear TWL BSS section
ldr r1, =__twl_bss_end__
sub r1, r1, r0
bl ClearMem
NotTWL:
ldr r0, =_libnds_argv
@ reset heap base
ldr r2, [r0,#20] @ newheap base
cmp r2, #0
moveq r2, r10
ldr r1, =fake_heap_start @ set heap start
str r2, [r1]
ldr r1, =fake_heap_end @ set heap end
sub r8, r8,#0xc000
str r8, [r1]
push {r0}
ldr r0, =__secure_area__
ldr r3, =initSystem
blx r3 @ system initialisation
ldr r3, =__libc_init_array @ global constructors
blx r3
pop {r0}
ldr r1, [r0,#16] @ argv
ldr r0, [r0,#12] @ argc
ldr r3, =main
ldr lr, =__libnds_exit
bx r3 @ jump to user code
@---------------------------------------------------------------------------------
@ check for a commandline
@---------------------------------------------------------------------------------
checkARGV:
@---------------------------------------------------------------------------------
ldr r0, =_libnds_argv @ argv structure
mov r1, #0
str r1, [r0,#12] @ clear argc
str r1, [r0,#16] @ clear argv
ldr r3, [r0] @ argv magic number
ldr r2, =0x5f617267 @ '_arg'
cmp r3, r2
strne r1, [r0,#20]
bxne lr @ bail out if no magic
ldr r1, [r0, #4] @ command line address
ldr r2, [r0, #8] @ length of command line
@ copy to heap
mov r3, r10 @ initial heap base
str r3, [r0, #4] @ set command line address
cmp r2, #0
subnes r4, r3, r1 @ dst-src
bxeq lr @ dst == src || len==0 : nothing to do.
cmphi r2, r4 @ len > (dst-src)
bhi .copybackward
.copyforward:
ldrb r4, [r1], #1
strb r4, [r3], #1
subs r2, r2, #1
bne .copyforward
b .copydone
.copybackward:
subs r2, r2, #1
ldrb r4, [r1, r2]
strb r4, [r3, r2]
bne .copybackward
.copydone:
push {lr}
ldr r3, =build_argv
blx r3
pop {lr}
bx lr
@---------------------------------------------------------------------------------
@ Clear memory to 0x00 if length != 0
@ r0 = Start Address
@ r1 = Length
@---------------------------------------------------------------------------------
ClearMem:
@---------------------------------------------------------------------------------
mov r2, #3 @ Round down to nearest word boundary
add r1, r1, r2 @ Shouldn't be needed
bics r1, r1, r2 @ Clear 2 LSB (and set Z)
bxeq lr @ Quit if copy size is 0
mov r2, #0
ClrLoop:
stmia r0!, {r2}
subs r1, r1, #4
bne ClrLoop
bx lr
@---------------------------------------------------------------------------------
@ Copy memory if length != 0
@ r1 = Source Address
@ r2 = Dest Address
@ r4 = Dest Address + Length
@---------------------------------------------------------------------------------
CopyMemCheck:
@---------------------------------------------------------------------------------
sub r3, r4, r2 @ Is there any data to copy?
@---------------------------------------------------------------------------------
@ Copy memory
@ r1 = Source Address
@ r2 = Dest Address
@ r3 = Length
@---------------------------------------------------------------------------------
CopyMem:
@---------------------------------------------------------------------------------
mov r0, #3 @ These commands are used in cases where
add r3, r3, r0 @ the length is not a multiple of 4,
bics r3, r3, r0 @ even though it should be.
bxeq lr @ Length is zero, so exit
CIDLoop:
ldmia r1!, {r0}
stmia r2!, {r0}
subs r3, r3, #4
bne CIDLoop
bx lr
@---------------------------------------------------------------------------------
@ Synchronize with ARM7
@---------------------------------------------------------------------------------
IPCSync:
@---------------------------------------------------------------------------------
ldr r10, [r12, #0x180]
and r10, r10, #0xF
cmp r10, r9
bne IPCSync
bx lr
@---------------------------------------------------------------------------------
.align
.pool
.end
@---------------------------------------------------------------------------------

229
dkarm-eabi/crtls/ds_cart.ld
View File

@@ -1,229 +0,0 @@
/*--------------------------------------------------------------------------------
This Source Code Form is subject to the terms of the Mozilla Public License,
v. 2.0. If a copy of the MPL was not distributed with this file, You can
obtain one at https://mozilla.org/MPL/2.0/.
--------------------------------------------------------------------------------*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
MEMORY {
rom : ORIGIN = 0x08000000, LENGTH = 32M
iwram : ORIGIN = 0x03800000, LENGTH = 64K
ewram : ORIGIN = 0x02000000, LENGTH = 4M
}
__ewram_start = ORIGIN(ewram);
__eheap_end = ORIGIN(ewram)+ LENGTH(ewram);
__iwram_start = ORIGIN(iwram);
__iwram_top = ORIGIN(iwram)+ LENGTH(iwram);
__sp_irq = __iwram_top - 0x60;
__sp_svc = __sp_irq - 0x100;
__sp_usr = __sp_svc - 0x100;
__irq_flags = __iwram_top - 8;
__irq_vector = __iwram_top - 4;
SECTIONS
{
.crt0 :
{
__text_start = . ;
KEEP (*(.crt0))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >rom = 0xff
.init :
{
KEEP (*(SORT_NONE(.init)))
} >rom = 0xff
.plt : { *(.plt) } >rom = 0xff
.init :
{
KEEP (*(SORT_NONE(.init)))
} >ewram
.text : /* ALIGN (4): */
{
*(EXCLUDE_FILE (*.iwram*) .text)
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >rom = 0xff
.fini :
{
KEEP (*(.fini))
} >rom =0xff
__text_end = . ;
.rodata :
{
*(.rodata)
*all.rodata*(*)
*(.roda)
*(.rodata.*)
*(.gnu.linkonce.r*)
SORT(CONSTRUCTORS)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >rom = 0xff
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
. = ALIGN(32 / 8);
PROVIDE (__preinit_array_start = .);
.preinit_array : { KEEP (*(.preinit_array)) } >rom = 0xff
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >rom = 0xff
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >rom = 0xff
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >rom = 0xff
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >rom = 0xff
.eh_frame :
{
KEEP (*(.eh_frame))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >rom = 0xff
.gcc_except_table :
{
*(.gcc_except_table)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >rom = 0xff
.jcr : { KEEP (*(.jcr)) } >rom = 0
.got : { *(.got.plt) *(.got) } >rom = 0
__ewram_lma = . ;
.ewram __ewram_start : AT (__ewram_lma)
{
__ewram_start = ABSOLUTE(.) ;
*(.ewram)
*ewram.*(.text)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ewram = 0xff
.sbss ALIGN(4):
{
__sbss_start = ABSOLUTE(.);
*(.sbss)
. = ALIGN(4);
} >ewram
__sbss_end = . ;
_end = . ;
__end__ = . ;
PROVIDE (end = _end);
__iwram_lma = __ewram_lma + SIZEOF(.ewram) + SIZEOF(.sbss);
.iwram __iwram_start : AT (__iwram_lma)
{
__iwram_start = ABSOLUTE(.) ;
*(.iwram)
*iwram.*(.text)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >iwram = 0xff
__iwram_end = . ;
__data_lma = __iwram_lma + SIZEOF(.iwram) ;
.data ALIGN(4) : AT (__data_lma)
{
__data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
CONSTRUCTORS
. = ALIGN(4);
} >iwram = 0xff
__data_end = . ;
__appended_data = __data_lma + SIZEOF(.data) ;
.bss ALIGN(4) :
{
__bss_start = ABSOLUTE(.);
__bss_start__ = ABSOLUTE(.);
*(.dynbss)
*(.gnu.linkonce.b*)
*(.bss*)
*(COMMON)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
__bss_end__ = ABSOLUTE(.);
__end__ = ABSOLUTE(.);
} >iwram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack 0x80000 : { _stack = .; *(.stack) }
/* These must appear regardless of . */
}

8
dkarm-eabi/crtls/ds_cart.specs
View File

@@ -1,8 +0,0 @@
%rename link old_link
*link:
%(old_link) -T ds_cart.ld%s --gc-sections
*startfile:
ds_cart_crt0%O%s crti%O%s crtbegin%O%s

166
dkarm-eabi/crtls/ds_cart_crt0.s
View File

@@ -1,166 +0,0 @@
/*--------------------------------------------------------------------------------
This Source Code Form is subject to the terms of the Mozilla Public License,
v. 2.0. If a copy of the MPL was not distributed with this file, You can
obtain one at https://mozilla.org/MPL/2.0/.
--------------------------------------------------------------------------------*/
@---------------------------------------------------------------------------------
.section ".crt0","ax"
.global _start
.arm
@---------------------------------------------------------------------------------
_start:
@---------------------------------------------------------------------------------
b rom_header_end
@---------------------------------------------------------------------------------
.fill 156,1,0 @ Nintendo Logo Character Data (8000004h)
.fill 16,1,0 @ Game Title
.byte 0x30,0x31 @ Maker Code (80000B0h)
.byte 0x96 @ Fixed Value (80000B2h)
.byte 0x00 @ Main Unit Code (80000B3h)
.byte 0x00 @ Device Type (80000B4h)
.fill 7,1,0 @ unused
.byte 0x00 @ Software Version No (80000BCh)
.byte 0xf0 @ Complement Check (80000BDh)
.byte 0x00,0x00 @ Checksum (80000BEh)
rom_header_end:
b start_vector @ This branch must be here for proper
@ positioning of the following header.
.GLOBAL __boot_method, __slave_number
__boot_method:
.byte 0 @ boot method (0=ROM boot, 3=Multiplay boot)
__slave_number:
.byte 0 @ slave # (1=slave#1, 2=slave#2, 3=slave#3)
.byte 0 @ reserved
.byte 0 @ reserved
.word 0 @ reserved
.word 0 @ reserved
.word 0 @ reserved
.word 0 @ reserved
.word 0 @ reserved
.word 0 @ reserved
@---------------------------------------------------------------------------------
.align 4
.arm
@---------------------------------------------------------------------------------
start_vector:
@---------------------------------------------------------------------------------
mov r0, #0x04000000 @ IME = 0;
str r0, [r0, #0x208]
mov r0, #0x12 @ Switch to IRQ Mode
msr cpsr, r0
ldr sp, =__sp_irq @ Set IRQ stack
mov r0, #0x13 @ Switch to SVC Mode
msr cpsr, r0
ldr sp, =__sp_svc @ Set SVC stack
mov r0, #0x1F @ Switch to System Mode
msr cpsr, r0
ldr sp, =__sp_usr @ Set user stack
mov r1, #0x42
strb r1, [r7], #1
mov r1, #0x35
strb r1, [r7], #1
mov r1, #0x2B
strb r1, [r7], #1
mov r1, #0x2B
strb r1, [r7], #1
ldr r1, =__data_lma @ Copy initialized data (data section) from LMA to VMA (ROM to RAM)
ldr r2, =__data_start
ldr r4, =__data_end
bl CopyMemChk
ldr r1, =__iwram_lma @ Copy internal work ram (iwram section) from LMA to VMA (ROM to RAM)
ldr r2, =__iwram_start
ldr r4, =__iwram_end
bl CopyMemChk
ldr r0, =__bss_start @ Clear BSS section to 0x00
ldr r1, =__bss_end
sub r1, r1, r0
bl ClearMem
ldr r0, =__sbss_start @ Clear SBSS section to 0x00
ldr r1, =__sbss_end
sub r1, r1, r0
bl ClearMem
ldr r1, =fake_heap_end @ set heap end
ldr r0, =__eheap_end
str r0, [r1]
ldr r3, =__libc_init_array @ global constructors
bl _call_via_r3
mov r0, #0 @ int argc
mov r1, #0 @ char *argv[]
ldr r3, =main
bl _call_via_r3 @ jump to user code
@---------------------------------------------------------------------------------
@ Clear memory to 0x00 if length != 0
@ r0 = Start Address
@ r1 = Length
@---------------------------------------------------------------------------------
ClearMem:
mov r2, #3 @ Round down to nearest word boundary
add r1, r1, r2 @ Shouldn't be needed
bics r1, r1, r2 @ Clear 2 LSB (and set Z)
bxeq lr @ Quit if copy size is 0
mov r2, #0
@---------------------------------------------------------------------------------
ClrLoop:
@---------------------------------------------------------------------------------
stmia r0!, {r2}
subs r1, r1, #4
bne ClrLoop
bx lr
@---------------------------------------------------------------------------------
@ Copy memory if length != 0
@ r1 = Source Address
@ r2 = Dest Address
@ r4 = Dest Address + Length
@---------------------------------------------------------------------------------
CopyMemChk:
@---------------------------------------------------------------------------------
sub r3, r4, r2 @ Is there any data to copy?
@---------------------------------------------------------------------------------
@ Copy memory
@ r1 = Source Address
@ r2 = Dest Address
@ r3 = Length
@---------------------------------------------------------------------------------
CopyMem:
@---------------------------------------------------------------------------------
mov r0, #3 @ These commands are used in cases where
add r3, r3, r0 @ the length is not a multiple of 4,
bics r3, r3, r0 @ even though it should be.
bxeq lr @ Length is zero so exit
@---------------------------------------------------------------------------------
CIDLoop:
@---------------------------------------------------------------------------------
ldmia r1!, {r0}
stmia r2!, {r0}
subs r3, r3, #4
bne CIDLoop
bx lr
@---------------------------------------------------------------------------------
.align
.pool
@---------------------------------------------------------------------------------
.end
@---------------------------------------------------------------------------------

11
dkarm-eabi/crtls/dsi_arm9.mem
View File

@@ -1,11 +0,0 @@
/*--------------------------------------------------------------------------------
This Source Code Form is subject to the terms of the Mozilla Public License,
v. 2.0. If a copy of the MPL was not distributed with this file, You can
obtain one at https://mozilla.org/MPL/2.0/.
--------------------------------------------------------------------------------*/
MEMORY {
ewram : ORIGIN = 0x02000000, LENGTH = 15M - 512k
dtcm : ORIGIN = 0x0b000000, LENGTH = 16K
vectors : ORIGIN = 0x01000000, LENGTH = 256
itcm : ORIGIN = 0x01000100, LENGTH = 32K - 256
}

8
dkarm-eabi/crtls/dsi_arm9.specs
View File

@@ -1,8 +0,0 @@
%rename link old_link
*link:
%(old_link) -T dsi_arm9.mem%s -T ds_arm9.ld%s --gc-sections
*startfile:
ds_arm9_crt0%O%s crti%O%s crtbegin%O%s

60
dkarm-eabi/crtls/er_crt0.s
View File

@@ -1,60 +0,0 @@
@---------------------------------------------------------------------------------
@ nintendo e-reader startup code
@---------------------------------------------------------------------------------
@ author : tim schuerewegen
@ version : 1.0
@---------------------------------------------------------------------------------
@ This Source Code Form is subject to the terms of the Mozilla Public License,
@ v. 2.0. If a copy of the MPL was not distributed with this file, You can
@ obtain one at https://mozilla.org/MPL/2.0/.
@---------------------------------------------------------------------------------
.section ".crt0","ax"
.global _start
.align
.arm
@---------------------------------------------------------------------------------
_start:
@---------------------------------------------------------------------------------
b start_vector
.long 0
.long 0x02000000
start_vector:
@ enter thumb mode
adr r0, _start_thumb + 1
bx r0
.thumb
_start_thumb:
@ save return address (rom)
mov r3, lr
@ clear bss section
ldr r0, =__bss_start
ldr r1, =__bss_end
mov r2, #0
_loop_bss_clear:
strb r2, [r0]
add r0, #1
cmp r0, r1
blt _loop_bss_clear
@ set return address (rom)
mov lr, r3
@ jump to main
ldr r3, =main
bx r3
.align
.pool
.end
.align
.pool
.end

8
dkarm-eabi/crtls/gba.specs
View File

@@ -1,8 +0,0 @@
%rename link old_link
*link:
%(old_link) -T gba_cart.ld%s --gc-sections
*startfile:
gba_crt0%O%s crti%O%s crtbegin%O%s

318
dkarm-eabi/crtls/gba_cart.ld
View File

@@ -1,318 +0,0 @@
/* Linker Script Original v1.3 by Jeff Frohwein */
/* v1.0 - Original release */
/* v1.1 - Added proper .data section support */
/* v1.2 - Added support for c++ & iwram overlays */
/* - Major contributions by Jason Wilkins. */
/* v1.3 - .ewram section now can be used when */
/* compiling for MULTIBOOT mode. This fixes */
/* malloc() in DevKitAdvance which depends */
/* on __eheap_start instead of end to define*/
/* the starting location of heap space. */
/* External global variable __gba_iwram_heap*/
/* support added to allow labels end, _end, */
/* & __end__ to point to end of iwram or */
/* the end of ewram. */
/* Additions by WinterMute */
/* v1.4 - .sbss section added for unitialised */
/* data in ewram */
/* v1.5 - padding section added to stop EZF */
/* stripping important data */
/* This file is released into the public domain */
/* for commercial or non-commercial use with no */
/* restrictions placed upon it. */
/* NOTE!!!: This linker script defines the RAM & */
/* ROM start addresses. In order for it to work */
/* properly, remove -Ttext and -Tbss linker */
/* options from your makefile if they are */
/* present. */
/* You can use the following to view section */
/* addresses in your .elf file: */
/* objdump -h file.elf */
/* Please note that empty sections may incorrectly*/
/* list the lma address as the vma address for */
/* some versions of objdump. */
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
/* SEARCH_DIR(/bin/arm); */
/* The linker script function "var1 += var2;" sometimes */
/* reports incorrect values in the *.map file but the */
/* actual value it calculates is usually, if not always, */
/* correct. If you leave out the ". = ALIGN(4);" at the */
/* end of each section then the return value of SIZEOF() */
/* is sometimes incorrect and "var1 += var2;" appears to */
/* not work as well. "var1 += var2" style functions are */
/* avoided below as a result. */
MEMORY {
rom : ORIGIN = 0x08000000, LENGTH = 32M
iwram : ORIGIN = 0x03000000, LENGTH = 32K
ewram : ORIGIN = 0x02000000, LENGTH = 256K
}
__text_start = ORIGIN(rom);
__eheap_end = ORIGIN(ewram) + LENGTH(ewram);
__iwram_start = ORIGIN(iwram);
__iwram_top = ORIGIN(iwram) + LENGTH(iwram);;
__sp_irq = __iwram_top - 0x060;
__sp_usr = __sp_irq - 0x0a0;
__irq_flags = 0x03007ff8;
SECTIONS
{
. = __text_start;
.crt0 :
{
KEEP (*(.crt0))
. = ALIGN(4);
} >rom =0xff
.init :
{
KEEP (*(SORT_NONE(.init)))
} >rom
.plt :
{
*(.plt)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >rom
.text : /* ALIGN (4): */
{
*(EXCLUDE_FILE (*.iwram*) .text)
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >rom = 0xff
__text_end = .;
.fini :
{
KEEP (*(.fini))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >rom =0
.rodata :
{
*(.rodata)
*all.rodata*(*)
*(.roda)
*(.rodata.*)
*(.gnu.linkonce.r*)
SORT(CONSTRUCTORS)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >rom = 0xff
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >rom
__exidx_start = .;
.ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } >rom
__exidx_end = .;
.ctors :
{
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >rom = 0
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >rom = 0
.eh_frame :
{
KEEP (*(.eh_frame))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >rom = 0
.gcc_except_table :
{
*(.gcc_except_table)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >rom = 0
__iwram_lma = .;
.iwram __iwram_start : AT (__iwram_lma)
{
__iwram_start__ = ABSOLUTE(.) ;
*(.iwram)
*iwram.*(.text)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
__iwram_end__ = ABSOLUTE(.) ;
} >iwram = 0xff
__data_lma = __iwram_lma + SIZEOF(.iwram) ;
.bss ALIGN(4) (NOLOAD) :
{
__bss_start = ABSOLUTE(.);
__bss_start__ = ABSOLUTE(.);
*(.dynbss)
*(.gnu.linkonce.b*)
*(.bss*)
*(COMMON)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
__bss_end__ = ABSOLUTE(.);
} AT>iwram
.data ALIGN(4) : AT (__data_lma)
{
__data_start__ = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
CONSTRUCTORS
. = ALIGN(4);
} >iwram = 0xff
__preinit_lma = __data_lma + SIZEOF(.data);
.preinit_array ALIGN(4) : AT (__preinit_lma)
{
__preinit_array_start = ABSOLUTE(.);
KEEP (*(.preinit_array))
__preinit_array_end = ABSOLUTE(.);
} >iwram
__init_lma = __preinit_lma + SIZEOF(.preinit_array);
.init_array ALIGN(4) : AT (__init_lma)
{
__init_array_start = ABSOLUTE(.);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array))
__init_array_end = ABSOLUTE(.);
} >iwram
__fini_lma = __init_lma + SIZEOF(.init_array);
.fini_array ALIGN(4) : AT (__fini_lma)
{
__fini_array_start = ABSOLUTE(.);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array))
__fini_array_end = ABSOLUTE(.);
} >iwram
__jcr_lma = __fini_lma + SIZEOF(.fini_array);
.jcr ALIGN(4) : AT (__jcr_lma) { KEEP (*(.jcr)) } >iwram
__data_end__ = ABSOLUTE(.);
__iwram_overlay_lma = __jcr_lma + SIZEOF(.jcr);
__iwram_overlay_start = . ;
OVERLAY ALIGN(4) : NOCROSSREFS AT (__iwram_overlay_lma)
{
.iwram0 { *(.iwram0) . = ALIGN(4);}
.iwram1 { *(.iwram1) . = ALIGN(4);}
.iwram2 { *(.iwram2) . = ALIGN(4);}
.iwram3 { *(.iwram3) . = ALIGN(4);}
.iwram4 { *(.iwram4) . = ALIGN(4);}
.iwram5 { *(.iwram5) . = ALIGN(4);}
.iwram6 { *(.iwram6) . = ALIGN(4);}
.iwram7 { *(.iwram7) . = ALIGN(4);}
.iwram8 { *(.iwram8) . = ALIGN(4);}
.iwram9 { *(.iwram9) . = ALIGN(4);}
}>iwram = 0xff
__iwram_overlay_end = . ;
__ewram_lma = __iwram_overlay_lma + (__iwram_overlay_end - __iwram_overlay_start) ;
__iheap_start = . ;
__ewram_start = ORIGIN(ewram);
.ewram __ewram_start : AT (__ewram_lma)
{
*(.ewram)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
__ewram_end = ABSOLUTE(.);
}>ewram = 0xff
__pad_lma = __ewram_lma + SIZEOF(.ewram);
.sbss ALIGN(4)(NOLOAD):
{
__sbss_start__ = ABSOLUTE(.);
*(.sbss)
. = ALIGN(4);
__sbss_end__ = ABSOLUTE(.);
__end__ = ABSOLUTE(.);
__eheap_start = ABSOLUTE(.);
} AT>ewram
/* EZF Advance strips trailing 0xff bytes, add a pad section so nothing important is removed */
.pad ALIGN(4) : AT (__pad_lma)
{
LONG(0x52416b64)
LONG(0x4d)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} = 0xff
__rom_end__ = __pad_lma + SIZEOF(.pad);
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack 0x80000 : { _stack = .; *(.stack) }
/* These must appear regardless of . */
.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }
.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) }
/DISCARD/ : { *(.note.GNU-stack) }
}

255
dkarm-eabi/crtls/gba_crt0.s
View File

@@ -1,255 +0,0 @@
/*--------------------------------------------------------------------------------
This Source Code Form is subject to the terms of the Mozilla Public License,
v. 2.0. If a copy of the MPL was not distributed with this file, You can
obtain one at https://mozilla.org/MPL/2.0/.
--------------------------------------------------------------------------------*/
.section ".crt0","ax"
.global _start
.align
.arm
.cpu arm7tdmi
@---------------------------------------------------------------------------------
_start:
@---------------------------------------------------------------------------------
b rom_header_end
.fill 156,1,0 @ Nintendo Logo Character Data (8000004h)
.fill 16,1,0 @ Game Title
.byte 0x30,0x31 @ Maker Code (80000B0h)
.byte 0x96 @ Fixed Value (80000B2h)
.byte 0x00 @ Main Unit Code (80000B3h)
.byte 0x00 @ Device Type (80000B4h)
.fill 7,1,0 @ unused
.byte 0x00 @ Software Version No (80000BCh)
.byte 0xf0 @ Complement Check (80000BDh)
.byte 0x00,0x00 @ Checksum (80000BEh)
@---------------------------------------------------------------------------------
rom_header_end:
@---------------------------------------------------------------------------------
b start_vector @ This branch must be here for proper
@ positioning of the following header.
.GLOBAL __boot_method, __slave_number
@---------------------------------------------------------------------------------
__boot_method:
@---------------------------------------------------------------------------------
.byte 0 @ boot method (0=ROM boot, 3=Multiplay boot)
@---------------------------------------------------------------------------------
__slave_number:
@---------------------------------------------------------------------------------
.byte 0 @ slave # (1=slave#1, 2=slave#2, 3=slave#3)
.byte 0 @ reserved
.byte 0 @ reserved
.word 0 @ reserved
.word 0 @ reserved
.word 0 @ reserved
.word 0 @ reserved
.word 0 @ reserved
.word 0 @ reserved
.global start_vector
.align
@---------------------------------------------------------------------------------
start_vector:
@---------------------------------------------------------------------------------
mov r0, #0x4000000 @ REG_BASE
str r0, [r0, #0x208]
mov r0, #0x12 @ Switch to IRQ Mode
msr cpsr, r0
ldr sp, =__sp_irq @ Set IRQ stack
mov r0, #0x1f @ Switch to System Mode
msr cpsr, r0
ldr sp, =__sp_usr @ Set user stack
@---------------------------------------------------------------------------------
@ Enter Thumb mode
@---------------------------------------------------------------------------------
add r0, pc, #1
bx r0
.thumb
ldr r0, =__text_start
lsl r0, #5 @ Was code compiled at 0x08000000 or higher?
bcs DoEWRAMClear @ yes, you can not run it in external WRAM
mov r0, pc
lsl r0, #5 @ Are we running from ROM (0x8000000 or higher) ?
bcc SkipEWRAMClear @ No, so no need to do a copy.
@---------------------------------------------------------------------------------
@ We were started in ROM, silly emulators. :P
@ So we need to copy to ExWRAM.
@---------------------------------------------------------------------------------
mov r2, #2
lsl r2, r2, #24 @ r2= 0x02000000
ldr r3, =__end__ @ last ewram address
sub r3, r2 @ r3= actual binary size
mov r6, r2 @ r6= 0x02000000
lsl r1, r2, #2 @ r1= 0x08000000
bl CopyMem
bx r6 @ Jump to the code to execute
@---------------------------------------------------------------------------------
DoEWRAMClear: @ Clear External WRAM to 0x00
@---------------------------------------------------------------------------------
mov r1, #0x40
lsl r1, #12 @ r1 = 0x40000
lsl r0, r1, #7 @ r0 = 0x2000000
bl ClearMem
@---------------------------------------------------------------------------------
SkipEWRAMClear: @ Clear Internal WRAM to 0x00
@---------------------------------------------------------------------------------
@---------------------------------------------------------------------------------
@ Clear BSS section to 0x00
@---------------------------------------------------------------------------------
ldr r0, =__bss_start__
ldr r1, =__bss_end__
sub r1, r0
bl ClearMem
@---------------------------------------------------------------------------------
@ Clear SBSS section to 0x00
@---------------------------------------------------------------------------------
ldr r0, =__sbss_start__
ldr r1, =__sbss_end__
sub r1, r0
bl ClearMem
@---------------------------------------------------------------------------------
@ Copy initialized data (data section) from LMA to VMA (ROM to RAM)
@---------------------------------------------------------------------------------
ldr r1, =__data_lma
ldr r2, =__data_start__
ldr r4, =__data_end__
bl CopyMemChk
@---------------------------------------------------------------------------------
@ Copy internal work ram (iwram section) from LMA to VMA (ROM to RAM)
@---------------------------------------------------------------------------------
ldr r1,= __iwram_lma
ldr r2,= __iwram_start__
ldr r4,= __iwram_end__
bl CopyMemChk
@---------------------------------------------------------------------------------
@ Copy internal work ram overlay 0 (iwram0 section) from LMA to VMA (ROM to RAM)
@---------------------------------------------------------------------------------
ldr r2,= __load_stop_iwram0
ldr r1,= __load_start_iwram0
sub r3, r2, r1 @ Is there any data to copy?
beq CIW0Skip @ no
ldr r2,= __iwram_overlay_start
bl CopyMem
@---------------------------------------------------------------------------------
CIW0Skip:
@---------------------------------------------------------------------------------
@ Copy external work ram (ewram section) from LMA to VMA (ROM to RAM)
@---------------------------------------------------------------------------------
ldr r1, =__ewram_lma
ldr r2, =__ewram_start
ldr r4, =__ewram_end
bl CopyMemChk
@---------------------------------------------------------------------------------
CEW0Skip:
@---------------------------------------------------------------------------------
@ set heap end
@---------------------------------------------------------------------------------
ldr r1, =fake_heap_end
ldr r0, =__eheap_end
str r0, [r1]
@---------------------------------------------------------------------------------
@ global constructors
@---------------------------------------------------------------------------------
ldr r3, =__libc_init_array
bl _blx_r3_stub
@---------------------------------------------------------------------------------
@ Jump to user code
@---------------------------------------------------------------------------------
mov r0, #0 @ int argc
mov r1, #0 @ char *argv[]
ldr r3, =main
bl _blx_r3_stub
@---------------------------------------------------------------------------------
@ Clear memory to 0x00 if length != 0
@---------------------------------------------------------------------------------
@ r0 = Start Address
@ r1 = Length
@---------------------------------------------------------------------------------
ClearMem:
@---------------------------------------------------------------------------------
mov r2,#3 @ These commands are used in cases where
add r1,r2 @ the length is not a multiple of 4,
bic r1,r2 @ even though it should be.
beq ClearMX @ Length is zero so exit
mov r2,#0
@---------------------------------------------------------------------------------
ClrLoop:
@---------------------------------------------------------------------------------
stmia r0!, {r2}
sub r1,#4
bne ClrLoop
@---------------------------------------------------------------------------------
ClearMX:
@---------------------------------------------------------------------------------
bx lr
@---------------------------------------------------------------------------------
_blx_r3_stub:
@---------------------------------------------------------------------------------
bx r3
@---------------------------------------------------------------------------------
@ Copy memory if length != 0
@---------------------------------------------------------------------------------
@ r1 = Source Address
@ r2 = Dest Address
@ r4 = Dest Address + Length
@---------------------------------------------------------------------------------
CopyMemChk:
@---------------------------------------------------------------------------------
sub r3, r4, r2 @ Is there any data to copy?
@---------------------------------------------------------------------------------
@ Copy memory
@---------------------------------------------------------------------------------
@ r1 = Source Address
@ r2 = Dest Address
@ r3 = Length
@---------------------------------------------------------------------------------
CopyMem:
@---------------------------------------------------------------------------------
mov r0, #3 @ These commands are used in cases where
add r3, r0 @ the length is not a multiple of 4,
bic r3, r0 @ even though it should be.
beq CIDExit @ Length is zero so exit
@---------------------------------------------------------------------------------
CIDLoop:
@---------------------------------------------------------------------------------
ldmia r1!, {r0}
stmia r2!, {r0}
sub r3, #4
bne CIDLoop
@---------------------------------------------------------------------------------
CIDExit:
@---------------------------------------------------------------------------------
bx lr
.align
.pool
.end

49
dkarm-eabi/crtls/gba_er.ld
View File

@@ -1,49 +0,0 @@
/***********************************/
/* NINTENDO E-READER LINKER SCRIPT */
/***********************************/
/* Author : Tim Schuerewegen */
/* Version : 1.0 */
/***********************************/
OUTPUT_FORMAT( "elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH( arm)
ENTRY( _start)
SECTIONS
{
. = 0x02000000;
.crt0 :
{
*(.crt0)
. = ALIGN(4);
} = 0xff
.text :
{
*(.text)
. = ALIGN(4);
} = 0xff
.rodata :
{
*(.rodata)
. = ALIGN(4);
} = 0xff
.data :
{
*(.data)
. = ALIGN(4);
} = 0xff
.bss :
{
__bss_start = .;
*(.bss)
. = ALIGN(4);
__bss_end__ = ABSOLUTE(.);
__end__ = ABSOLUTE(.);
}
}

8
dkarm-eabi/crtls/gba_er.specs
View File

@@ -1,8 +0,0 @@
%rename link old_link
%rename endfile old_endfile
*link:
-T gba_er.ld%s %(old_link) --gc-sections
*startfile:
er_crt0%O%s

303
dkarm-eabi/crtls/gba_mb.ld
View File

@@ -1,303 +0,0 @@
/* Linker Script Original v1.3 by Jeff Frohwein */
/* v1.0 - Original release */
/* v1.1 - Added proper .data section support */
/* v1.2 - Added support for c++ & iwram overlays */
/* - Major contributions by Jason Wilkins. */
/* v1.3 - .ewram section now can be used when */
/* compiling for MULTIBOOT mode. This fixes */
/* malloc() in DevKitAdvance which depends */
/* on __eheap_start instead of end to define*/
/* the starting location of heap space. */
/* External global variable __gba_iwram_heap*/
/* support added to allow labels end, _end, */
/* & __end__ to point to end of iwram or */
/* the end of ewram. */
/* Additions by WinterMute */
/* v1.4 - .sbss section added for unitialised */
/* data in ewram */
/* v1.5 - padding section added to stop EZF */
/* stripping important data */
/* v1.6 - added memory sections */
/* This file is released into the public domain */
/* for commercial or non-commercial use with no */
/* restrictions placed upon it. */
/* NOTE!!!: This linker script defines the RAM & */
/* ROM start addresses. In order for it to work */
/* properly, remove -Ttext and -Tbss linker */
/* options from your makefile if they are */
/* present. */
/* You can use the following to view section */
/* addresses in your .elf file: */
/* objdump -h file.elf */
/* Please note that empty sections may incorrectly*/
/* list the lma address as the vma address for */
/* some versions of objdump. */
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
MEMORY {
rom : ORIGIN = 0x08000000, LENGTH = 32M
iwram : ORIGIN = 0x03000000, LENGTH = 32K
ewram : ORIGIN = 0x02000000, LENGTH = 256K
}
__text_start = ORIGIN(ewram);
__eheap_end = ORIGIN(ewram) + LENGTH(ewram);
__iwram_start = ORIGIN(iwram);
__iwram_top = ORIGIN(iwram) + LENGTH(iwram);;
__sp_irq = __iwram_top - 0x060;
__sp_usr = __sp_irq - 0x0a0;
__irq_flags = 0x03007ff8;
SECTIONS
{
. = __text_start;
. = __text_start;
.crt0 :
{
KEEP (*(.crt0))
. = ALIGN(4);
} >ewram =0xff
.init :
{
KEEP (*(SORT_NONE(.init)))
} >ewram
.plt :
{
*(.plt)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ewram
.text ALIGN (4):
{
*(EXCLUDE_FILE (*.iwram*) .text)
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ewram = 0xff
__text_end = .;
.fini :
{
KEEP (*(.fini))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ewram =0
.rodata :
{
*(.rodata)
*all.rodata*(*)
*(.roda)
*(.rodata.*)
*(.gnu.linkonce.r*)
SORT(CONSTRUCTORS)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ewram = 0xff
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >ewram
__exidx_start = .;
.ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } >ewram
__exidx_end = .;
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
. = ALIGN(32 / 8);
PROVIDE (__preinit_array_start = .);
.preinit_array : { KEEP (*(.preinit_array)) } >ewram = 0xff
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >ewram = 0xff
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >ewram = 0xff
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ewram = 0
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ewram = 0
.jcr : { KEEP (*(.jcr)) } >ewram
.eh_frame :
{
KEEP (*(.eh_frame))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ewram = 0
.gcc_except_table :
{
*(.gcc_except_table)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ewram = 0
__iwram_lma = .;
.iwram __iwram_start : AT (__iwram_lma)
{
__iwram_start__ = ABSOLUTE(.) ;
*(.iwram)
*iwram.*(.text)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
__iwram_end__ = ABSOLUTE(.) ;
} >iwram = 0xff
__data_lma = __iwram_lma + SIZEOF(.iwram) ;
.bss ALIGN(4) (NOLOAD):
{
__bss_start__ = ABSOLUTE(.);
*(.dynbss)
*(.gnu.linkonce.b*)
*(.bss*)
*(COMMON)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
__bss_end__ = ABSOLUTE(.) ;
}
.data ALIGN(4) : AT (__data_lma)
{
__data_start__ = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
CONSTRUCTORS
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
__data_end__ = ABSOLUTE(.);
} >iwram = 0xff
__iwram_overlay_lma = __data_lma + SIZEOF(.data);
PROVIDE (edata = .);
__iwram_overlay_start = . ;
OVERLAY ALIGN(4) : NOCROSSREFS AT (__iwram_overlay_lma)
{
.iwram0 { *(.iwram0) . = ALIGN(4);}
.iwram1 { *(.iwram1) . = ALIGN(4);}
.iwram2 { *(.iwram2) . = ALIGN(4);}
.iwram3 { *(.iwram3) . = ALIGN(4);}
.iwram4 { *(.iwram4) . = ALIGN(4);}
.iwram5 { *(.iwram5) . = ALIGN(4);}
.iwram6 { *(.iwram6) . = ALIGN(4);}
.iwram7 { *(.iwram7) . = ALIGN(4);}
.iwram8 { *(.iwram8) . = ALIGN(4);}
.iwram9 { *(.iwram9) . = ALIGN(4);}
} >iwram = 0xff
__ewram_lma = LOADADDR(.iwram0) + SIZEOF(.iwram0)+SIZEOF(.iwram1)+SIZEOF(.iwram2)+SIZEOF(.iwram3)+SIZEOF(.iwram4)+SIZEOF(.iwram5)+SIZEOF(.iwram6)+SIZEOF(.iwram7)+SIZEOF(.iwram8)+SIZEOF(.iwram9);
__iwram_overlay_end = __ewram_lma ;
/* v1.3 */
__ewram_start = __ewram_lma ;
.ewram __ewram_start : AT (__ewram_lma)
{
*(.ewram)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
__ewram_end = ABSOLUTE(.);
} >ewram = 0xff
__ewram_overlay_lma = __ewram_lma + SIZEOF(.ewram);
.sbss ALIGN(4)(NOLOAD):
{
__sbss_start__ = ABSOLUTE(.);
*(.sbss)
. = ALIGN(4);
__sbss_end__ = ABSOLUTE(.);
__end__ = ABSOLUTE(.);
__eheap_start = ABSOLUTE(.);
}
OVERLAY ALIGN(4): NOCROSSREFS AT (__ewram_overlay_lma)
{
.ewram0 { *(.ewram0) . = ALIGN(4);}
.ewram1 { *(.ewram1) . = ALIGN(4);}
.ewram2 { *(.ewram2) . = ALIGN(4);}
.ewram3 { *(.ewram3) . = ALIGN(4);}
.ewram4 { *(.ewram4) . = ALIGN(4);}
.ewram5 { *(.ewram5) . = ALIGN(4);}
.ewram6 { *(.ewram6) . = ALIGN(4);}
.ewram7 { *(.ewram7) . = ALIGN(4);}
.ewram8 { *(.ewram8) . = ALIGN(4);}
.ewram9 { *(.ewram9) . = ALIGN(4);}
} >ewram = 0xff
__ewram_overlay_end = ABSOLUTE(.);
__eheap_start = __ewram_overlay_end ;
_end = __ewram_overlay_end;
__end__ = __ewram_overlay_end;
__rom_end__ = __ewram_overlay_end;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack 0x80000 : { _stack = .; *(.stack) }
/* These must appear regardless of . */
}

8
dkarm-eabi/crtls/gba_mb.specs
View File

@@ -1,8 +0,0 @@
%rename link old_link
*link:
-T gba_mb.ld%s %(old_link) --gc-sections
*startfile:
gba_crt0%O%s crti%O%s crtbegin%O%s

171
dkarm-eabi/crtls/gp32.ld
View File

@@ -1,171 +0,0 @@
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
MEMORY
{
ram : ORIGIN = 0xc000000, LENGTH = 8M
}
SECTIONS
{
.crt0 :
{
__text_start = . ;
KEEP (*(.crt0))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ram = 0xff
.init :
{
KEEP (*(SORT_NONE(.init)))
} >ram
.plt : { *(.plt) } >ram = 0xff
.text : /* ALIGN (4): */
{
*(.text .stub .text.* .gnu.linkonce.t.*)
KEEP (*(.text.*personality*))
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.glue_7t) *(.glue_7) *(.vfp11_veneer)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ram = 0xff
.fini :
{
KEEP (*(.fini))
} >ram =0xff
__text_end = . ;
.rodata :
{
*(.rodata)
*all.rodata*(*)
*(.roda)
*(.rodata.*)
*(.gnu.linkonce.r*)
SORT(CONSTRUCTORS)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ram = 0xff
.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >ram
__exidx_start = .;
.ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } >ram
__exidx_end = .;
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
. = ALIGN(32 / 8);
PROVIDE (__preinit_array_start = .);
.preinit_array : { KEEP (*(.preinit_array)) } >ram = 0xff
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >ram = 0xff
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >ram = 0xff
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ram = 0
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ram = 0
.eh_frame :
{
KEEP (*(.eh_frame))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ram = 0
.gcc_except_table :
{
*(.gcc_except_table)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ram = 0
.jcr : { KEEP (*(.jcr)) } >ram = 0
.got : { *(.got.plt) *(.got) } >ram = 0
__ro_end = . ;
.data ALIGN(4) :
{
__data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
CONSTRUCTORS
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
__data_end = ABSOLUTE(.);
} >ram = 0xff
.bss ALIGN(4) :
{
__bss_start = ABSOLUTE(.);
/* __bss_start__ = ABSOLUTE(.); */
*(.dynbss)
*(.gnu.linkonce.b*)
*(.bss*)
*(COMMON)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
__bss_end = ABSOLUTE(.) ;
__end__ = ABSOLUTE(.) ;
} > ram
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
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.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack 0x80000 : { _stack = .; *(.stack) }
/* These must appear regardless of . */
}

8
dkarm-eabi/crtls/gp32.specs
View File

@@ -1,8 +0,0 @@
%rename link old_link
*link:
%(old_link) -T gp32.ld%s --gc-sections
*startfile:
gp32_crt0%O%s crti%O%s crtbegin%O%s

80
dkarm-eabi/crtls/gp32_crt0.s
View File

@@ -1,80 +0,0 @@
/*--------------------------------------------------------------------------------
This Source Code Form is subject to the terms of the Mozilla Public License,
v. 2.0. If a copy of the MPL was not distributed with this file, You can
obtain one at https://mozilla.org/MPL/2.0/.
--------------------------------------------------------------------------------*/
.section ".crt0","ax"
.code 32
.align
.global _start
@---------------------------------------------------------------------------------
_start:
@---------------------------------------------------------------------------------
b _start2
@---------------------------------------------------------------------------------
@ AXF addresses
@---------------------------------------------------------------------------------
_text_start:
.word __text_start
_ro_end:
.word __ro_end
_data_start:
.word __data_start
.word __bss_end
_bss_start:
.word __bss_start
_bss_end:
.word __bss_end
@---------------------------------------------------------------------------------
@ GamePark magic sequence
@---------------------------------------------------------------------------------
.word 0x44450011
.word 0x44450011
.word 0x01234567
.word 0x12345678
.word 0x23456789
.word 0x34567890
.word 0x45678901
.word 0x56789012
.word 0x23456789
.word 0x34567890
.word 0x45678901
.word 0x56789012
.word 0x23456789
.word 0x34567890
.word 0x45678901
.word 0x56789012
@---------------------------------------------------------------------------------
_start2:
@---------------------------------------------------------------------------------
mrs r0, CPSR
orr r0, r0, #0xC0
msr CPSR_ctl, r0
mrs r0, CPSR
bic r0, r0, #0xC0
orr r0, r0, #0x40
msr CPSR_ctl,r0
@---------------------------------------------------------------------------------
@ global constructors
@---------------------------------------------------------------------------------
ldr r3,=_call_main
mov lr,r3
ldr r3,=__libc_init_array
bx r3
@---------------------------------------------------------------------------------
@ Jump to user code
@---------------------------------------------------------------------------------
_call_main:
@---------------------------------------------------------------------------------
mov lr, #0
ldr r3, =main
bx r3
.pool
.end

213
dkarm-eabi/crtls/gp32_gpsdk.ld
View File

@@ -1,213 +0,0 @@
/* GP32 Linker Script v1.2 by Jeff F */
/* v1.0 - Original release */
/* v1.1 - Cleaned up and added MEMORY command */
/* v1.2 - DJWillis - Added propper .init and */
/* .fini for GCC 3.3.2 and above */
/* */
/* This file is released into the public domain */
/* for commercial or non-commercial use with no */
/* restrictions placed upon it. */
/* */
/* NOTE!!!: This linker script defines the RAM */
/* start addresses. In order for it to work */
/* properly, remove -Ttext and -Tbss linker */
/* options from your makefile if they are */
/* present. */
/* */
/* You can use the following to view section */
/* addresses in your .elf file: */
/* objdump -h file.elf */
/* */
/* Please note that empty sections may incorrectly*/
/* list the lma address as the vma address for */
/* some versions of objdump. */
OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
/* SEARCH_DIR(/bin/arm); */
/* Then use it like this: IWRAMHEAP */
/* The linker script function "var1 += var2;" sometimes */
/* reports incorrect values in the *.map file but the */
/* actual value it calculates is usually, if not always, */
/* correct. If you leave out the ". = ALIGN(4);" at the */
/* end of each section then the return value of SIZEOF() */
/* is sometimes incorrect and "var1 += var2;" appears to */
/* not work as well. "var1 += var2" style functions are */
/* avoided below as a result. */
/* The linker script MEMORY directive is not used here due */
/* to the fact that __text_start is not always a fixed value. */
MEMORY
{
ram : ORIGIN = 0xc000000, LENGTH = 8M
}
SECTIONS
{
.text : /* ALIGN (4): */
{
__text_start = . ;
*(EXCLUDE_FILE (*text.iwram*) .text)
*(.text.*)
*(.stub)
/* .gnu.warning sections are handled specially by elf32.em. */
*(.gnu.warning)
*(.gnu.linkonce.t*)
*(.glue_7)
*(.glue_7t)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ram = 0xff
__text_end = . ;
.init :
{
*(.init)
} > ram = 0xff
.jcr :
{
*(.jcr)
} > ram = 0xff
.fini :
{
*(.fini)
} > ram = 0xff
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{
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*all.rodata*(*)
*(.roda)
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SORT(CONSTRUCTORS)
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} >ram = 0xff
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__exidx_start = .;
.ARM.exidx : { *(.ARM.exidx* .gnu.linkonce.armexidx.*) } >ram
__exidx_end = .;
/* Ensure the __preinit_array_start label is properly aligned. We
could instead move the label definition inside the section, but
the linker would then create the section even if it turns out to
be empty, which isn't pretty. */
. = ALIGN(32 / 8);
PROVIDE (__preinit_array_start = .);
.preinit_array : { KEEP (*(.preinit_array)) } >ram = 0xff
PROVIDE (__preinit_array_end = .);
PROVIDE (__init_array_start = .);
.init_array : { KEEP (*(.init_array)) } >ram = 0xff
PROVIDE (__init_array_end = .);
PROVIDE (__fini_array_start = .);
.fini_array : { KEEP (*(.fini_array)) } >ram = 0xff
PROVIDE (__fini_array_end = .);
.ctors :
{
/* gcc uses crtbegin.o to find the start of the constructors, so
we make sure it is first. Because this is a wildcard, it
doesn't matter if the user does not actually link against
crtbegin.o; the linker won't look for a file to match a
wildcard. The wildcard also means that it doesn't matter which
directory crtbegin.o is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ram = 0
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ram = 0
.eh_frame :
{
KEEP (*(.eh_frame))
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ram = 0
.gcc_except_table :
{
*(.gcc_except_table)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ram = 0
__ro_end = . ;
.data ALIGN(4) :
{
__data_start = ABSOLUTE(.);
*(.data)
*(.data.*)
*(.gnu.linkonce.d*)
CONSTRUCTORS
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
} >ram = 0xff
__data_end = . ;
.bss ALIGN(4) :
{
__bss_start = ABSOLUTE(.);
/* __bss_start__ = ABSOLUTE(.); */
*(.dynbss)
*(.gnu.linkonce.b*)
*(COMMON)
*(.bss*)
. = ALIGN(4); /* REQUIRED. LD is flaky without it. */
__bss_end = ABSOLUTE(.);
__end__ = ABSOLUTE(.);
} > ram
__eheap_end = . ;
/* Stabs debugging sections. */
.stab 0 : { *(.stab) }
.stabstr 0 : { *(.stabstr) }
.stab.excl 0 : { *(.stab.excl) }
.stab.exclstr 0 : { *(.stab.exclstr) }
.stab.index 0 : { *(.stab.index) }
.stab.indexstr 0 : { *(.stab.indexstr) }
.comment 0 : { *(.comment) }
/* DWARF debug sections.
Symbols in the DWARF debugging sections are relative to the beginning
of the section so we begin them at 0. */
/* DWARF 1 */
.debug 0 : { *(.debug) }
.line 0 : { *(.line) }
/* GNU DWARF 1 extensions */
.debug_srcinfo 0 : { *(.debug_srcinfo) }
.debug_sfnames 0 : { *(.debug_sfnames) }
/* DWARF 1.1 and DWARF 2 */
.debug_aranges 0 : { *(.debug_aranges) }
.debug_pubnames 0 : { *(.debug_pubnames) }
/* DWARF 2 */
.debug_info 0 : { *(.debug_info) }
.debug_abbrev 0 : { *(.debug_abbrev) }
.debug_line 0 : { *(.debug_line) }
.debug_frame 0 : { *(.debug_frame) }
.debug_str 0 : { *(.debug_str) }
.debug_loc 0 : { *(.debug_loc) }
.debug_macinfo 0 : { *(.debug_macinfo) }
/* SGI/MIPS DWARF 2 extensions */
.debug_weaknames 0 : { *(.debug_weaknames) }
.debug_funcnames 0 : { *(.debug_funcnames) }
.debug_typenames 0 : { *(.debug_typenames) }
.debug_varnames 0 : { *(.debug_varnames) }
.stack 0x80000 : { _stack = .; *(.stack) }
/* These must appear regardless of . */
}

8
dkarm-eabi/crtls/gp32_gpsdk.specs
View File

@@ -1,8 +0,0 @@
%rename link old_link
*link:
%(old_link) -T gp32_gpsdk.ld%s --gc-sections
*startfile:
gp32_gpsdk_crt0%O%s crti%O%s crtbegin%O%s

246
dkarm-eabi/crtls/gp32_gpsdk_crt0.s
View File

@@ -1,246 +0,0 @@
@****************************************************
@* gp32 crt0.S v1.0 by Jeff F *
@****************************************************
@ v1.0 - Original release
@
@ This file is released into the public domain for commercial
@ or non-commercial usage with no restrictions placed upon it.
.TEXT
@ Note: Normally it is the job of crt0.S to clear the BSS
@ (Zero Initialized) section to 0x00, but in the case of
@ the gp32 we do not have to do this because it is done
@ by the gp32 bios after it loads the app.
@ The official sdt dev kit uses 'Main ()' as the entry
@ point. If you would rather use 'main ()' instead then
@ comment out the next line.
@
@ You have to use 'main ()' at some point in your program
@ if you want to do c++ code. GCC will do a call to constructor
@ setup before executing 'main ()'. Using 'main ()' also increases
@ your program size by ~5500 bytes.
@ .equ __OfficialEntry, 1
@ The official sdt dev kit initializes various things in init.o
@ Crt0.S performs similar tasks for compatibility. If you don't
@ wish to use the official libs, or those that are compatible,
@ then you need to comment out the next line to prevent link errors.
.equ __OfficialInits, 1
.GLOBAL _start
_start:
.ALIGN
.CODE 32
@ Start Vector
b _GpInit
.word __text_start @ Start of text (Read Only) section
_roe: .word __ro_end @ End "
_rws: .word __data_start @ Start of data (Read/Write) section
.word __bss_end @ End of bss (this is the way sdt does it for some reason)
_zis: .word __bss_start @ Start of bss (Zero Initialized) section
_zie: .word __bss_end @ End "
.word 0x44450011
.word 0x44450011
.word 0x01234567
.word 0x12345678
.word 0x23456789
.word 0x34567890
.word 0x45678901
.word 0x56789012
.word 0x23456789
.word 0x34567890
.word 0x45678901
.word 0x56789012
.word 0x23456789
.word 0x34567890
.word 0x45678901
.word 0x56789012
_GpInit:
mrs r0,CPSR
orr r0,r0,#0xc0
msr CPSR_fsxc,r0
.ifdef __OfficialInits
@ Call function in user_init.s
@ bl asm_user_entry
@ Get pointer to GpSurfaceSet routine
mov r0,#0
swi 0xb
ldr r1,=GpSurfaceSet
ldr r2,=GpSurfaceFlip
str r0,[r1]
str r0,[r2]
@ Get time passed
mov r0,#6
swi 0xb
ldr r1,=_timepassed
str r0,[r1]
@ Get button stuff
mov r0,#0
swi 0x10
ldr r2,=_reg_io_key_a
ldr r3,=_reg_io_key_b
str r0,[r2]
str r1,[r3]
@ Set heap start location
ldr r0,_zie
ldr r1,=HEAPSTART
str r0,[r1]
@ Set heap end location
mov r0,#5
swi 0xb
ldr r1,=HEAPEND
sub r0,r0,#255
bic r0,r0,#3
str r0,[r1]
@ Set App Argument
swi 0x15
mov r10,r0
mov r11,r1 @ possibly not needed but left in anyway
mrs r0,CPSR
bic r0,r0,#192
orr r0,r0,#64
msr CPSR_fsxc,r0
mov r0,r10
mov r1,r11 @ possibly not needed but left in anyway
.endif
@ Jump to Main ()
.ifdef __OfficialEntry
ldr r3,=Main
.else
ldr r3,=main
.endif
bx r3 @ Init.o uses 'mov pc,r3' but
@ 'bx r3' is used here instead. This way
@ the main function can be ARM or Thumb.
.ifdef __OfficialInits
swi 0x12
orr r1,r1,r2
and r1,r1,r3
eor r1,r1,r4
mov r5,r1,lsr #4
add r1,r1,r7
sub r7,r7,r1
mov r8,#0
mov pc,r8
b .
b .
b .
b .
b .
b .
b .
b .
b .
b .
b .
b .
nop
nop
nop
nop
nop
nop
.GLOBAL _fw_init_for_dbg
_fw_init_for_dbg:
stmdb sp!,{r0-r12}
mov r10,lr
mov r11,sp
bic r0,r0,#31 @ 0x1f
orr r1,r0,#17 @ 0x11
orr r2,r0,#19 @ 0x13
msr cpsr_cxsf,r1
mov r12,#4
add r12,r12,pc
msr cpsr_cxsf,r2
swi 0x1ff
@ bl asm_user_entry_path
mov r0,r11
mov r1,r10
add r0,r0,#52
ldr r2,[r0]
mov lr,r1
stmdb sp!,{r2}
stmdb sp!,{r0-r12,lr}
@ Copy RW Base - ZI Base
ldr r0,=_roe @ |Image$$RO$$Limit|
ldr r3,=_zis @ |Image$$ZI$$Base|
ldr r2,=_rws @ |Image$$RW$$Base|
sub r3,r3,r2
CopyRWData:
cmp r3,#36
blt CopyRWData2
ldmia r0!,{r4-r12}
stmia r2!,{r4-r12}
sub r3,r3,#36
b CopyRWData
CopyRWData2:
cmp r3,#0
ble CopyRWData3
ldr r4,[r0],#4
str r4,[r2],#4
sub r3,r3,#4
b CopyRWData2
CopyRWData3:
@ Clear ZI section
ldr r1,=_zie @ |Image$$ZI$$Limit|
ldr r0,=_zis @ |Image$$ZI$$Base|
mov r2,#0
mov r3,r2
mov r4,r2
mov r5,r2
mov r6,r2
mov r7,r2
mov r8,r2
mov r9,r2
mov r10,r2
mov r11,r2
mov r12,r2
CopyZIData:
stmia r0!,{r2-r12}
cmp r0,r1
blt CopyZIData
ldmia sp!,{r0-r12,pc}
.endif
.ALIGN
.POOL
.END

18
dkarm-eabi/scripts/build-libs.sh
View File

@@ -19,20 +19,12 @@ make install
#---------------------------------------------------------------------------------
# Install and build the crt0 files
#---------------------------------------------------------------------------------
cd $BUILDDIR
cp -v $BUILDSCRIPTDIR/dkarm-eabi/crtls/* $prefix/$target/lib/
cd $prefix/$target/lib/
$MAKE CRT=gba
$MAKE CRT=gp32
$MAKE CRT=er
$MAKE CRT=gp32_gpsdk
$MAKE CRT=ds_arm7
$MAKE CRT=ds_arm9
$MAKE CRT=ds_cart
$MAKE ds_arm7_vram_crt0
$MAKE 3dsx_crt0
mkdir -p crtls
cd crtls
tar -xvf $SRCDIR/devkitarm-crtls-$DKARM_CRTLS_VER.tar.xz
make install
cd $BUILDDIR/libgba-$LIBGBA_VER
$MAKE || { echo "error building libgba"; exit 1; }