mirror of
https://github.com/pret/pokeplatinum.git
synced 2026-07-15 15:45:53 -05:00
233 lines
4.2 KiB
ArmAsm
233 lines
4.2 KiB
ArmAsm
.include "macros/function.inc"
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.include "include/_d_add.inc"
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.text
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arm_func_start _dadd
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arm_func_start _d_add
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_dadd:
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_d_add: ; 0x020DFC6C
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stmfd sp!, {r4, lr}
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eors ip, r1, r3
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eormi r3, r3, #0x80000000
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bmi __dsub_start
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arm_func_end _d_add
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arm_func_start __dadd_start
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__dadd_start: ; 0x020DFC7C
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subs ip, r0, r2
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sbcs lr, r1, r3
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bhs _020DFC98
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adds r2, r2, ip
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adc r3, r3, lr
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subs r0, r0, ip
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sbc r1, r1, lr
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_020DFC98:
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mov lr, #-0x80000000
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mov ip, r1, lsr #0x14
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orr r1, lr, r1, lsl #11
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orr r1, r1, r0, lsr #21
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mov r0, r0, lsl #0xb
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movs r4, ip, lsl #0x15
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cmnne r4, #0x200000
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beq _020DFD94
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mov r4, r3, lsr #0x14
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orr r3, lr, r3, lsl #11
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orr r3, r3, r2, lsr #21
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mov r2, r2, lsl #0xb
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movs lr, r4, lsl #0x15
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beq _020DFDDC
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_020DFCD0:
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subs r4, ip, r4
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beq _020DFD28
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cmp r4, #0x20
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ble _020DFD0C
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cmp r4, #0x38
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movge r4, #0x3f
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sub r4, r4, #0x20
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rsb lr, r4, #0x20
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orrs lr, r2, r3, lsl lr
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mov r2, r3, lsr r4
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orrne r2, r2, #1
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adds r0, r0, r2
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adcs r1, r1, #0
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blo _020DFD50
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b _020DFD34
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_020DFD0C:
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rsb lr, r4, #0x20
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movs lr, r2, lsl lr
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rsb lr, r4, #0x20
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mov r2, r2, lsr r4
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orr r2, r2, r3, lsl lr
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mov r3, r3, lsr r4
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orrne r2, r2, #1
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_020DFD28:
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adds r0, r0, r2
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adcs r1, r1, r3
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blo _020DFD50
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_020DFD34:
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add ip, ip, #1
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and r4, r0, #1
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movs r1, r1, rrx
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orr r0, r4, r0, rrx
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mov lr, ip, lsl #0x15
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cmn lr, #0x200000
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beq _020DFF60
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_020DFD50:
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movs r2, r0, lsl #0x15
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mov r0, r0, lsr #0xb
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orr r0, r0, r1, lsl #21
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add r1, r1, r1
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mov r1, r1, lsr #0xc
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orr r1, r1, ip, lsl #20
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tst r2, #-0x80000000
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ldmeqia sp!, {r4, lr}
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bxeq lr
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movs r2, r2, lsl #1
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andeqs r2, r0, #1
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ldmeqia sp!, {r4, lr}
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bxeq lr
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adds r0, r0, #1
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adc r1, r1, #0
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ldmia sp!, {r4, lr}
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bx lr
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_020DFD94:
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cmp ip, #0x800
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movge lr, #-0x80000000
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movlt lr, #0
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bics ip, ip, #0x800
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beq _020DFE00
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orrs r4, r0, r1, lsl #1
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bne _020DFF3C
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mov r4, r3, lsr #0x14
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mov r3, r3, lsl #0xb
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orr r3, r3, r2, lsr #21
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mov r2, r2, lsl #0xb
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movs r4, r4, lsl #0x15
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beq _020DFF28
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cmn r4, #0x200000
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bne _020DFF28
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orrs r4, r2, r3, lsl #1
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beq _020DFF28
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b _020DFF3C
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_020DFDDC:
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cmp r4, #0x800
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movge lr, #-0x80000000
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movlt lr, #0
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bic ip, ip, #0x800
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bics r4, r4, #0x800
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beq _020DFE6C
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orrs r4, r2, r3, lsl #1
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bne _020DFF3C
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b _020DFF28
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_020DFE00:
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orrs r4, r0, r1, lsl #1
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beq _020DFE40
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mov ip, #1
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bic r1, r1, #0x80000000
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mov r4, r3, lsr #0x14
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mov r3, r3, lsl #0xb
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orr r3, r3, r2, lsr #21
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mov r2, r2, lsl #0xb
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movs r4, r4, lsl #0x15
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cmnne r4, #0x200000
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mov r4, r4, lsr #0x15
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orr r4, r4, lr, lsr #20
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beq _020DFDDC
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orr r3, r3, #0x80000000
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orr ip, ip, lr, lsr #20
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b _020DFCD0
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_020DFE40:
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mov ip, r3, lsr #0x14
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mov r1, r3, lsl #0xb
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orr r1, r1, r2, lsr #21
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mov r0, r2, lsl #0xb
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movs r4, ip, lsl #0x15
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beq _020DFEF4
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cmn r4, #0x200000
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bne _020DFEF4
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orrs r4, r0, r1, lsl #1
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beq _020DFF28
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b _020DFF40
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_020DFE6C:
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orrs r4, r2, r3, lsl #1
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beq _020DFF04
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mov r4, #1
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bic r3, r3, #0x80000000
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cmp r1, #0
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bpl _020DFE90
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orr ip, ip, lr, lsr #20
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orr r4, r4, lr, lsr #20
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b _020DFCD0
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_020DFE90:
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adds r0, r0, r2
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adcs r1, r1, r3
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blo _020DFEB0
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add ip, ip, #1
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and r4, r0, #1
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movs r1, r1, rrx
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mov r0, r0, rrx
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orr r0, r0, r4
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_020DFEB0:
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cmp r1, #0
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subges ip, ip, #1
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movs r2, r0, lsl #0x15
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mov r0, r0, lsr #0xb
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orr r0, r0, r1, lsl #21
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add r1, r1, r1
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orr r1, lr, r1, lsr #12
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orr r1, r1, ip, lsl #20
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ldmeqia sp!, {r4, lr}
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bxeq lr
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tst r2, #-0x80000000
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ldmeqia sp!, {r4, lr}
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bxeq lr
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movs r2, r2, lsl #1
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andeqs r2, r0, #1
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ldmeqia sp!, {r4, lr}
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bxeq lr
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_020DFEF4:
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mov r1, r3
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mov r0, r2
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ldmia sp!, {r4, lr}
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bx lr
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_020DFF04:
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cmp r1, #0
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subges ip, ip, #1
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mov r0, r0, lsr #0xb
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orr r0, r0, r1, lsl #21
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add r1, r1, r1
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orr r1, lr, r1, lsr #12
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orr r1, r1, ip, lsl #20
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ldmia sp!, {r4, lr}
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bx lr
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_020DFF28:
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ldr r1, _020DFF80 ; =0x7FF00000
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orr r1, lr, r1
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mov r0, #0
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ldmia sp!, {r4, lr}
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bx lr
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_020DFF3C:
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mov r1, r3
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_020DFF40:
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mvn r0, #0
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bic r1, r0, #0x80000000
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ldmia sp!, {r4, lr}
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bx lr
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_020DFF50:
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.byte 0x00, 0x00, 0xE0, 0xE3, 0x02, 0x11, 0xC0, 0xE3, 0x10, 0x40, 0xBD, 0xE8, 0x1E, 0xFF, 0x2F, 0xE1
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_020DFF60:
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cmp ip, #0x800
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movge lr, #-0x80000000
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movlt lr, #0
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ldr r1, _020DFF80 ; =0x7FF00000
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orr r1, lr, r1
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mov r0, #0
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ldmia sp!, {r4, lr}
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bx lr
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; .align 2, 0
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_020DFF80:
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.word 0x7FF00000
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arm_func_end __dadd_start |