mirror of
https://github.com/pret/pokeplatinum.git
synced 2026-04-22 06:57:33 -05:00
716 lines
12 KiB
ArmAsm
716 lines
12 KiB
ArmAsm
.include "macros/function.inc"
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.include "include/sb_queryengine.inc"
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.extern Unk_ov4_0221AE50
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.extern Unk_ov4_02219B38
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.text
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arm_func_start ov4_021FD7CC
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ov4_021FD7CC: ; 0x021FD7CC
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ldr r2, [r0, #4]
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cmp r2, #0
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strne r1, [r2, #0x20]
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str r1, [r0, #4]
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mov r2, #0
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str r2, [r1, #0x20]
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ldr r2, [r0, #0]
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cmp r2, #0
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streq r1, [r0]
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ldr r1, [r0, #8]
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add r1, r1, #1
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str r1, [r0, #8]
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bx lr
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arm_func_end ov4_021FD7CC
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arm_func_start ov4_021FD800
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ov4_021FD800: ; 0x021FD800
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ldr r2, [r0, #0]
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str r2, [r1, #0x20]
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str r1, [r0, #0]
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ldr r2, [r0, #4]
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cmp r2, #0
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streq r1, [r0, #4]
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ldr r1, [r0, #8]
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add r1, r1, #1
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str r1, [r0, #8]
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bx lr
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arm_func_end ov4_021FD800
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arm_func_start ov4_021FD828
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ov4_021FD828: ; 0x021FD828
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ldr r2, [r0, #0]
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cmp r2, #0
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beq _021FD854
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ldr r1, [r2, #0x20]
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str r1, [r0, #0]
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cmp r1, #0
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moveq r1, #0
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streq r1, [r0, #4]
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ldr r1, [r0, #8]
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sub r1, r1, #1
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str r1, [r0, #8]
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_021FD854:
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mov r0, r2
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bx lr
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arm_func_end ov4_021FD828
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arm_func_start ov4_021FD85C
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ov4_021FD85C: ; 0x021FD85C
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ldr r2, [r0, #0]
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mov r3, #0
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cmp r2, #0
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beq _021FD8C0
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_021FD86C:
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cmp r2, r1
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bne _021FD8B0
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cmp r3, #0
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ldrne r1, [r2, #0x20]
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strne r1, [r3, #0x20]
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ldr r1, [r0, #0]
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cmp r1, r2
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ldreq r1, [r2, #0x20]
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streq r1, [r0]
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ldr r1, [r0, #4]
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cmp r1, r2
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streq r3, [r0, #4]
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ldr r1, [r0, #8]
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sub r1, r1, #1
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str r1, [r0, #8]
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mov r0, #1
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bx lr
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_021FD8B0:
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mov r3, r2
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ldr r2, [r2, #0x20]
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cmp r2, #0
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bne _021FD86C
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_021FD8C0:
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mov r0, #0
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bx lr
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arm_func_end ov4_021FD85C
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arm_func_start ov4_021FD8C8
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ov4_021FD8C8: ; 0x021FD8C8
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mov r1, #0
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str r1, [r0, #4]
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str r1, [r0, #0]
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str r1, [r0, #8]
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bx lr
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arm_func_end ov4_021FD8C8
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arm_func_start ov4_021FD8DC
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ov4_021FD8DC: ; 0x021FD8DC
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stmfd sp!, {r3, r4, r5, lr}
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sub sp, sp, #0x110
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mov r5, r0
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mov r4, r1
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add r0, r5, #8
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bl ov4_021FD7CC
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bl ov4_021EA840
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str r0, [r4, #0x1c]
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mov r0, #2
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strb r0, [sp, #9]
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ldrb r1, [r4, #0x14]
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tst r1, #0x20
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addne sp, sp, #0x110
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ldmneia sp!, {r3, r4, r5, pc}
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ldr r0, [r5, #0]
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cmp r0, #1
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bne _021FD9E0
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mov r2, #0xfe
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mov r1, #0xfd
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mov r0, #0
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strb r2, [sp, #0x10]
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strb r1, [sp, #0x11]
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strb r0, [sp, #0x12]
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ldrb r2, [r4, #0x1c]
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ldrb r1, [r4, #0x1d]
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add r3, sp, #0x13
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strb r2, [r3]
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strb r1, [r3, #1]
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ldrb r2, [r4, #0x1e]
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ldrb r1, [r4, #0x1f]
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strb r2, [r3, #2]
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strb r1, [r3, #3]
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ldrb r1, [r4, #0x14]
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tst r1, #4
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beq _021FD9C8
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ldr r1, [r5, #0x40]
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strb r1, [sp, #0x17]
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ldr r3, [r5, #0x40]
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cmp r3, #0
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ble _021FD9A0
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add r2, sp, #0x10
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_021FD980:
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add r1, r5, r0
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ldrb r1, [r1, #0x2c]
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add r0, r0, #1
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strb r1, [r2, #8]
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ldr r3, [r5, #0x40]
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add r2, r2, #1
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cmp r0, r3
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blt _021FD980
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_021FD9A0:
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add r1, sp, #0x10
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add r0, r3, #8
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mov r2, #0
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strb r2, [r1, r0]
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ldr r0, [r5, #0x40]
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add r0, r0, #9
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strb r2, [r1, r0]
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ldr r0, [r5, #0x40]
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add r2, r0, #0xa
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b _021FDA50
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_021FD9C8:
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mov r0, #0xff
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strb r0, [sp, #0x17]
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strb r0, [sp, #0x18]
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strb r0, [sp, #0x19]
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mov r2, #0xa
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b _021FDA50
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_021FD9E0:
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tst r1, #4
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add ip, sp, #0x10
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beq _021FDA24
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ldr r3, _021FDAB4 ; =0x02219F30
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mov r2, #6
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_021FD9F4:
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ldrb r1, [r3]
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ldrb r0, [r3, #1]
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add r3, r3, #2
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strb r1, [ip]
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strb r0, [ip, #1]
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add ip, ip, #2
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subs r2, r2, #1
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bne _021FD9F4
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ldrb r0, [r3]
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mov r2, #0xd
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strb r0, [ip]
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b _021FDA50
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_021FDA24:
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ldr r3, _021FDAB8 ; =0x02219F40
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mov r2, #4
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_021FDA2C:
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ldrb r1, [r3]
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ldrb r0, [r3, #1]
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add r3, r3, #2
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strb r1, [ip]
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strb r0, [ip, #1]
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add ip, ip, #2
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subs r2, r2, #1
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bne _021FDA2C
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mov r2, #8
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_021FDA50:
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ldr r1, [r4, #0]
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ldr r0, [r5, #0x28]
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cmp r1, r0
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bne _021FDA80
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ldrb r0, [r4, #0x15]
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tst r0, #2
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beq _021FDA80
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ldr r0, [r4, #8]
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str r0, [sp, #0xc]
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ldrh r0, [r4, #0xc]
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strh r0, [sp, #0xa]
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b _021FDA8C
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_021FDA80:
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str r1, [sp, #0xc]
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ldrh r0, [r4, #4]
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strh r0, [sp, #0xa]
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_021FDA8C:
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add r1, sp, #8
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str r1, [sp]
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mov r0, #8
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str r0, [sp, #4]
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ldr r0, [r5, #0x20]
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add r1, sp, #0x10
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mov r3, #0
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bl ov4_021EAE5C
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add sp, sp, #0x110
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ldmia sp!, {r3, r4, r5, pc}
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; .align 2, 0
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_021FDAB4: .word Unk_ov4_02219F30
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_021FDAB8: .word Unk_ov4_02219F40
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arm_func_end ov4_021FD8DC
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arm_func_start ov4_021FDABC
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ov4_021FDABC: ; 0x021FDABC
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stmfd sp!, {r4, r5, r6, lr}
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mov r6, r0
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mov r5, r1
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mov r4, r2
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cmp r3, #0
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bne _021FDAE4
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ldr r0, _021FDB2C ; =0x0221AE50
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ldr r0, [r0, #0]
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cmp r0, #1
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ldmneia sp!, {r4, r5, r6, pc}
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_021FDAE4:
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bl ov4_021EA8A4
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stmia r6, {r4, r5}
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mov r2, #0
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ldr r3, [sp, #0x10]
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str r2, [r6, #0x40]
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ldr r1, [sp, #0x14]
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str r3, [r6, #0x44]
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str r1, [r6, #0x48]
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mov r0, #2
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mov r1, r0
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str r2, [r6, #0x28]
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bl ov4_021EACDC
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str r0, [r6, #0x20]
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add r0, r6, #0x14
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bl ov4_021FD8C8
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add r0, r6, #8
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bl ov4_021FD8C8
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ldmia sp!, {r4, r5, r6, pc}
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; .align 2, 0
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_021FDB2C: .word Unk_ov4_0221AE50
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arm_func_end ov4_021FDABC
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arm_func_start ov4_021FDB30
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ov4_021FDB30: ; 0x021FDB30
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str r1, [r0, #0x28]
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bx lr
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arm_func_end ov4_021FDB30
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arm_func_start ov4_021FDB38
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ov4_021FDB38: ; 0x021FDB38
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stmfd sp!, {r4, lr}
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mov r4, r0
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add r0, r4, #0x14
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bl ov4_021FD8C8
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add r0, r4, #8
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bl ov4_021FD8C8
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ldmia sp!, {r4, pc}
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arm_func_end ov4_021FDB38
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arm_func_start ov4_021FDB54
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ov4_021FDB54: ; 0x021FDB54
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stmfd sp!, {r4, lr}
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mov r4, r0
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ldr r0, [r4, #0x20]
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bl ov4_021EACF0
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mvn r1, #0
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add r0, r4, #0x14
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str r1, [r4, #0x20]
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bl ov4_021FD8C8
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add r0, r4, #8
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bl ov4_021FD8C8
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ldmia sp!, {r4, pc}
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arm_func_end ov4_021FDB54
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arm_func_start ov4_021FDB80
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ov4_021FDB80: ; 0x021FDB80
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stmfd sp!, {r3, lr}
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ldrb ip, [r1, #0x14]
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cmp r3, #0
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and ip, ip, #0xc3
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strb ip, [r1, #0x14]
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bne _021FDBA8
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ldrb r3, [r1, #0x14]
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orr r3, r3, #4
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strb r3, [r1, #0x14]
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b _021FDBC8
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_021FDBA8:
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cmp r3, #1
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bne _021FDBC0
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ldrb r3, [r1, #0x14]
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orr r3, r3, #8
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strb r3, [r1, #0x14]
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b _021FDBC8
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_021FDBC0:
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cmp r3, #2
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ldmeqia sp!, {r3, pc}
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_021FDBC8:
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ldr ip, [r0, #0x10]
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ldr r3, [r0, #4]
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cmp ip, r3
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bge _021FDBE0
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bl ov4_021FD8DC
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ldmia sp!, {r3, pc}
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_021FDBE0:
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cmp r2, #0
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add r0, r0, #0x14
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beq _021FDBF4
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bl ov4_021FD800
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ldmia sp!, {r3, pc}
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_021FDBF4:
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bl ov4_021FD7CC
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ldmia sp!, {r3, pc}
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arm_func_end ov4_021FDB80
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arm_func_start ov4_021FDBFC
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ov4_021FDBFC: ; 0x021FDBFC
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stmfd sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
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mov r8, r2
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ldrsb r2, [r8]
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mov sl, r0
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mov sb, r1
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mov r7, r3
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cmp r2, #0
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ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
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ldrb r0, [sb, #0x14]
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add r8, r8, #5
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sub r7, r7, #5
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tst r0, #4
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beq _021FDC98
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ldr r0, [sl, #0x40]
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mov r6, #0
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cmp r0, #0
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ble _021FDC88
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ldr r4, _021FDCF8 ; =0x02219B38
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_021FDC44:
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mov r0, r8
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mov r1, r7
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bl ov4_021FF4AC
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movs r5, r0
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bmi _021FDC88
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add r0, sl, r6
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ldrb r1, [r0, #0x2c]
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mov r0, sb
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mov r2, r8
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ldr r1, [r4, r1, lsl #2]
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bl ov4_021FE1A8
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ldr r0, [sl, #0x40]
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add r6, r6, #1
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cmp r6, r0
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add r8, r8, r5
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sub r7, r7, r5
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blt _021FDC44
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_021FDC88:
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ldrb r0, [sb, #0x14]
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orr r0, r0, #0x41
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strb r0, [sb, #0x14]
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b _021FDCB4
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_021FDC98:
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mov r0, sb
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mov r1, r8
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mov r2, r7
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bl ov4_021FE51C
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ldrb r0, [sb, #0x14]
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orr r0, r0, #0x43
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strb r0, [sb, #0x14]
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_021FDCB4:
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ldrb r0, [sb, #0x14]
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and r0, r0, #0xf3
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strb r0, [sb, #0x14]
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bl ov4_021EA840
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ldr r2, [sb, #0x1c]
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mov r1, sb
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sub r0, r0, r2
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str r0, [sb, #0x1c]
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add r0, sl, #8
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bl ov4_021FD85C
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ldr r3, [sl, #0x48]
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ldr r4, [sl, #0x44]
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mov r0, sl
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mov r2, sb
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mov r1, #0
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blx r4
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ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
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; .align 2, 0
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_021FDCF8: .word Unk_ov4_02219B38
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arm_func_end ov4_021FDBFC
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arm_func_start ov4_021FDCFC
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ov4_021FDCFC: ; 0x021FDCFC
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stmfd sp!, {r3, r4, r5, r6, r7, lr}
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mov r4, r1
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mov r7, r2
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mov r5, r0
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ldr r1, _021FDD90 ; =0x02219F4C
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mov r0, r7
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bl strstr
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cmp r0, #0
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movne r6, #1
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moveq r6, #0
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mov r0, r4
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mov r1, r7
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bl ov4_021FE49C
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cmp r6, #0
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ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
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ldrb r0, [r4, #0x14]
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tst r0, #4
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orrne r0, r0, #0x41
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orreq r0, r0, #0x42
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strb r0, [r4, #0x14]
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ldrb r0, [r4, #0x14]
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and r0, r0, #0xf3
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strb r0, [r4, #0x14]
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bl ov4_021EA840
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ldr r2, [r4, #0x1c]
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mov r1, r4
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sub r0, r0, r2
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str r0, [r4, #0x1c]
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add r0, r5, #8
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bl ov4_021FD85C
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ldr r3, [r5, #0x48]
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ldr ip, [r5, #0x44]
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mov r0, r5
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mov r2, r4
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mov r1, #0
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blx ip
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ldmia sp!, {r3, r4, r5, r6, r7, pc}
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; .align 2, 0
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_021FDD90: .word Unk_ov4_02219F4C
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arm_func_end ov4_021FDCFC
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arm_func_start ov4_021FDD94
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ov4_021FDD94: ; 0x021FDD94
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mov r0, #1
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bx lr
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arm_func_end ov4_021FDD94
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arm_func_start ov4_021FDD9C
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ov4_021FDD9C: ; 0x021FDD9C
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stmfd sp!, {r4, r5, r6, r7, r8, sb, lr}
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sub sp, sp, #0x14
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sub sp, sp, #0x800
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|
movs r8, r1
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|
mov r1, #8
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|
mov sb, r0
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|
str r1, [sp, #8]
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ldrne r7, [sb, #0x24]
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ldreq r7, [sb, #0x20]
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mov r0, r7
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bl ov4_021EAB6C
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cmp r0, #0
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addeq sp, sp, #0x14
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addeq sp, sp, #0x800
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ldmeqia sp!, {r4, r5, r6, r7, r8, sb, pc}
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_021FDDD8:
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add r0, sp, #0xc
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str r0, [sp]
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add r4, sp, #8
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ldr r2, _021FDF2C ; =0x000007FF
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add r1, sp, #0x14
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mov r0, r7
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mov r3, #0
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str r4, [sp, #4]
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bl ov4_021EAE18
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mov r5, r0
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mvn r0, #0
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cmp r5, r0
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addeq sp, sp, #0x14
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addeq sp, sp, #0x800
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ldmeqia sp!, {r4, r5, r6, r7, r8, sb, pc}
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add r4, sp, #0x14
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mov r0, #0
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strb r0, [r4, r5]
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ldr r6, [sb, #8]
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cmp r6, #0
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beq _021FDF10
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_021FDE2C:
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cmp r8, #0
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beq _021FDE50
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ldrb r0, [r6, #0x15]
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tst r0, #8
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beq _021FDE50
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ldr r1, [r6, #0x10]
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ldr r0, [sp, #0x10]
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cmp r1, r0
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beq _021FDEA8
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_021FDE50:
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ldr r3, [sp, #0x10]
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ldr r2, [r6, #0]
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cmp r2, r3
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bne _021FDE78
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ldrh r1, [r6, #4]
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ldrh r0, [sp, #0xe]
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cmp r1, r0
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beq _021FDEA8
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cmp r8, #0
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bne _021FDEA8
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_021FDE78:
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ldr r0, [sb, #0x28]
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cmp r2, r0
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bne _021FDF04
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ldrb r0, [r6, #0x15]
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tst r0, #2
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beq _021FDF04
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ldr r0, [r6, #8]
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cmp r0, r3
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ldreqh r1, [r6, #0xc]
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ldreqh r0, [sp, #0xe]
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cmpeq r1, r0
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bne _021FDF04
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|
_021FDEA8:
|
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cmp r8, #0
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|
beq _021FDED0
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mov r0, sb
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mov r1, r6
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mov r2, r4
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mov r3, r5
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bl ov4_021FDD94
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cmp r0, #0
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bne _021FDF10
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b _021FDF04
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_021FDED0:
|
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ldr r0, [sb]
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add r2, sp, #0x14
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cmp r0, #1
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mov r0, sb
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bne _021FDEF4
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mov r1, r6
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mov r3, r5
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bl ov4_021FDBFC
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b _021FDF10
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_021FDEF4:
|
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mov r1, r6
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mov r3, r5
|
|
bl ov4_021FDCFC
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b _021FDF10
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|
_021FDF04:
|
|
ldr r6, [r6, #0x20]
|
|
cmp r6, #0
|
|
bne _021FDE2C
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|
_021FDF10:
|
|
mov r0, r7
|
|
bl ov4_021EAB6C
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|
cmp r0, #0
|
|
bne _021FDDD8
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|
add sp, sp, #0x14
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add sp, sp, #0x800
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|
ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
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|
; .align 2, 0
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|
_021FDF2C: .word 0x000007FF
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arm_func_end ov4_021FDD9C
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|
|
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arm_func_start ov4_021FDF30
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ov4_021FDF30: ; 0x021FDF30
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stmfd sp!, {r3, r4, r5, r6, r7, lr}
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mov r6, r0
|
|
bl ov4_021EA840
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ldr r3, [r6, #8]
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|
mov r5, r0
|
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cmp r3, #0
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|
ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
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|
ldr r4, _021FDFBC ; =0x000009C4
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|
mov r7, #1
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|
_021FDF54:
|
|
ldr r0, [r3, #0x1c]
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|
add r0, r0, #0x1c4
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|
add r0, r0, #0x800
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|
cmp r5, r0
|
|
ldmlsia sp!, {r3, r4, r5, r6, r7, pc}
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|
ldrb r2, [r3, #0x15]
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|
mov r0, r6
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|
mov r1, r7
|
|
orr r2, r2, #0x10
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|
strb r2, [r3, #0x15]
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|
ldr r2, [r6, #8]
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|
str r4, [r2, #0x1c]
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|
ldr r3, [r6, #8]
|
|
ldrb r2, [r3, #0x15]
|
|
and r2, r2, #0xd3
|
|
strb r2, [r3, #0x15]
|
|
ldr r2, [r6, #8]
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|
ldr r3, [r6, #0x48]
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|
ldr ip, [r6, #0x44]
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|
blx ip
|
|
add r0, r6, #8
|
|
bl ov4_021FD828
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ldr r3, [r6, #8]
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|
cmp r3, #0
|
|
bne _021FDF54
|
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ldmia sp!, {r3, r4, r5, r6, r7, pc}
|
|
; .align 2, 0
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|
_021FDFBC: .word 0x000009C4
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|
arm_func_end ov4_021FDF30
|
|
|
|
arm_func_start ov4_021FDFC0
|
|
ov4_021FDFC0: ; 0x021FDFC0
|
|
stmfd sp!, {r4, lr}
|
|
mov r4, r0
|
|
b _021FDFE0
|
|
_021FDFCC:
|
|
add r0, r4, #0x14
|
|
bl ov4_021FD828
|
|
mov r1, r0
|
|
mov r0, r4
|
|
bl ov4_021FD8DC
|
|
_021FDFE0:
|
|
ldr r1, [r4, #0x10]
|
|
ldr r0, [r4, #4]
|
|
cmp r1, r0
|
|
ldmgeia sp!, {r4, pc}
|
|
ldr r0, [r4, #0x1c]
|
|
cmp r0, #0
|
|
bgt _021FDFCC
|
|
ldmia sp!, {r4, pc}
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|
arm_func_end ov4_021FDFC0
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|
|
|
arm_func_start ov4_021FE000
|
|
ov4_021FE000: ; 0x021FE000
|
|
stmfd sp!, {r4, lr}
|
|
mov r4, r0
|
|
ldr r1, [r4, #0x10]
|
|
cmp r1, #0
|
|
ldmeqia sp!, {r4, pc}
|
|
mov r1, #0
|
|
bl ov4_021FDD9C
|
|
mov r0, r4
|
|
bl ov4_021FDF30
|
|
ldr r0, [r4, #0x1c]
|
|
cmp r0, #0
|
|
ble _021FE038
|
|
mov r0, r4
|
|
bl ov4_021FDFC0
|
|
_021FE038:
|
|
ldr r0, [r4, #0x10]
|
|
cmp r0, #0
|
|
ldmneia sp!, {r4, pc}
|
|
ldr r3, [r4, #0x48]
|
|
ldr ip, [r4, #0x44]
|
|
mov r0, r4
|
|
mov r1, #2
|
|
mov r2, #0
|
|
blx ip
|
|
ldmia sp!, {r4, pc}
|
|
arm_func_end ov4_021FE000
|
|
|
|
arm_func_start ov4_021FE060
|
|
ov4_021FE060: ; 0x021FE060
|
|
ldr r3, [r0, #0x40]
|
|
cmp r3, #0x14
|
|
bxge lr
|
|
add r2, r3, #1
|
|
str r2, [r0, #0x40]
|
|
add r0, r0, r3
|
|
strb r1, [r0, #0x2c]
|
|
bx lr
|
|
arm_func_end ov4_021FE060
|
|
|
|
arm_func_start ov4_021FE080
|
|
ov4_021FE080: ; 0x021FE080
|
|
stmfd sp!, {r3, r4, r5, lr}
|
|
mov r5, r0
|
|
add r0, r5, #8
|
|
mov r4, r1
|
|
bl ov4_021FD85C
|
|
cmp r0, #0
|
|
ldmneia sp!, {r3, r4, r5, pc}
|
|
mov r1, r4
|
|
add r0, r5, #0x14
|
|
bl ov4_021FD85C
|
|
ldmia sp!, {r3, r4, r5, pc}
|
|
arm_func_end ov4_021FE080
|
|
|
|
.data
|
|
|
|
|
|
.global Unk_ov4_02219F30
|
|
Unk_ov4_02219F30: ; 0x02219F30
|
|
.incbin "incbin/overlay4_data.bin", 0x40B0, 0x40C0 - 0x40B0
|
|
|
|
.global Unk_ov4_02219F40
|
|
Unk_ov4_02219F40: ; 0x02219F40
|
|
.incbin "incbin/overlay4_data.bin", 0x40C0, 0x40CC - 0x40C0
|
|
|
|
.global Unk_ov4_02219F4C
|
|
Unk_ov4_02219F4C: ; 0x02219F4C
|
|
.incbin "incbin/overlay4_data.bin", 0x40CC, 0x8
|
|
|