mirror of
https://github.com/pret/pokeplatinum.git
synced 2026-04-26 00:32:20 -05:00
916 lines
17 KiB
ArmAsm
916 lines
17 KiB
ArmAsm
.include "macros/function.inc"
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.include "include/nonport.inc"
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.extern Unk_020FE764
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.text
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arm_func_start ov4_021EA840
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ov4_021EA840: ; 0x021EA840
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stmfd sp!, {r3, lr}
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bl OS_IsTickAvailable
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cmp r0, #1
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beq _021EA864
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ldr r0, _021EA884 ; =0x022178F4
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ldr r1, _021EA888 ; =0x02217914
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ldr r2, _021EA88C ; =0x022178E4
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ldr r3, _021EA890 ; =0x00000109
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bl __msl_assertion_failed
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_021EA864:
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bl OS_GetTick
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mov r1, r1, lsl #6
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orr r1, r1, r0, lsr #26
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ldr r2, _021EA894 ; =0x000082EA
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mov r0, r0, lsl #6
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mov r3, #0
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bl _ull_div
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ldmia sp!, {r3, pc}
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; .align 2, 0
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_021EA884: .word Unk_ov4_022178F4
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_021EA888: .word Unk_ov4_02217914
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_021EA88C: .word Unk_ov4_022178E4
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_021EA890: .word 0x00000109
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_021EA894: .word 0x000082EA
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arm_func_end ov4_021EA840
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arm_func_start ov4_021EA898
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ov4_021EA898: ; 0x021EA898
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ldr ip, _021EA8A0 ; =OS_Sleep
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bx ip
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; .align 2, 0
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_021EA8A0: .word OS_Sleep
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arm_func_end ov4_021EA898
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arm_func_start ov4_021EA8A4
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ov4_021EA8A4: ; 0x021EA8A4
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bx lr
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arm_func_end ov4_021EA8A4
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arm_func_start ov4_021EA8A8
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ov4_021EA8A8: ; 0x021EA8A8
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bx lr
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arm_func_end ov4_021EA8A8
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arm_func_start ov4_021EA8AC
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ov4_021EA8AC: ; 0x021EA8AC
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stmfd sp!, {r3, r4, r5, lr}
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movs r5, r0
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moveq r0, #0
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ldmeqia sp!, {r3, r4, r5, pc}
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bl strlen
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add r0, r0, #1
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bl ov4_021D7880
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movs r4, r0
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beq _021EA8D8
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mov r1, r5
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bl strcpy
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_021EA8D8:
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mov r0, r4
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ldmia sp!, {r3, r4, r5, pc}
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arm_func_end ov4_021EA8AC
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arm_func_start ov4_021EA8E0
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ov4_021EA8E0: ; 0x021EA8E0
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ldrsb r3, [r0]
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mov r2, r0
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cmp r3, #0
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beq _021EA918
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ldr r1, _021EA920 ; =0x020FE764
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_021EA8F4:
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cmp r3, #0
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blt _021EA908
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cmp r3, #0x80
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bge _021EA908
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ldrb r3, [r1, r3]
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_021EA908:
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strb r3, [r0]
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ldrsb r3, [r0, #1]!
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cmp r3, #0
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bne _021EA8F4
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_021EA918:
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mov r0, r2
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bx lr
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; .align 2, 0
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_021EA920: .word Unk_020FE764
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arm_func_end ov4_021EA8E0
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arm_func_start ov4_021EA924
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ov4_021EA924: ; 0x021EA924
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stmfd sp!, {r3, r4, r5, lr}
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mov r4, r1
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mov r1, #3
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mov r2, #0
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mov r5, r0
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bl ov4_022087CC
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cmp r4, #0
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bicne r2, r0, #4
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orreq r2, r0, #4
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mov r0, r5
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mov r1, #4
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bl ov4_022087CC
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cmp r0, #0
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moveq r0, #1
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movne r0, #0
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ldmia sp!, {r3, r4, r5, pc}
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arm_func_end ov4_021EA924
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arm_func_start ov4_021EA964
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ov4_021EA964: ; 0x021EA964
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stmfd sp!, {r0, r1, r2, r3}
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stmfd sp!, {r3, lr}
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ldr r1, _021EA9A0 ; =0x0000FFFF
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mov ip, #4
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ldr r2, _021EA9A4 ; =0x00001002
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add r3, sp, #0xc
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str ip, [sp]
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bl ov4_021EAEDC
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mvn r1, #0
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cmp r0, r1
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movne r0, #1
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moveq r0, #0
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ldmia sp!, {r3, lr}
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add sp, sp, #0x10
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bx lr
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; .align 2, 0
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_021EA9A0: .word 0x0000FFFF
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_021EA9A4: .word 0x00001002
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arm_func_end ov4_021EA964
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arm_func_start ov4_021EA9A8
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ov4_021EA9A8: ; 0x021EA9A8
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stmfd sp!, {r0, r1, r2, r3}
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stmfd sp!, {r3, lr}
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ldr r1, _021EA9E4 ; =0x0000FFFF
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mov ip, #4
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add r3, sp, #0xc
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rsb r2, r1, #0x11000
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str ip, [sp]
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bl ov4_021EAEDC
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mvn r1, #0
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cmp r0, r1
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movne r0, #1
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moveq r0, #0
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ldmia sp!, {r3, lr}
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add sp, sp, #0x10
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bx lr
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; .align 2, 0
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_021EA9E4: .word 0x0000FFFF
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arm_func_end ov4_021EA9A8
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arm_func_start ov4_021EA9E8
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ov4_021EA9E8: ; 0x021EA9E8
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stmdb sp!, {lr}
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sub sp, sp, #0xc
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mov r1, #4
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str r1, [sp, #4]
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add ip, sp, #4
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ldr r1, _021EAA28 ; =0x0000FFFF
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ldr r2, _021EAA2C ; =0x00001002
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add r3, sp, #8
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str ip, [sp]
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bl ov4_021EAEB4
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mvn r1, #0
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cmp r0, r1
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ldrne r1, [sp, #8]
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mov r0, r1
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add sp, sp, #0xc
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ldmia sp!, {pc}
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; .align 2, 0
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_021EAA28: .word 0x0000FFFF
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_021EAA2C: .word 0x00001002
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arm_func_end ov4_021EA9E8
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arm_func_start ov4_021EAA30
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ov4_021EAA30: ; 0x021EAA30
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stmdb sp!, {lr}
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sub sp, sp, #0xc
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ldr r1, _021EAA70 ; =0x0000FFFF
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mov r2, #4
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str r2, [sp, #4]
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add ip, sp, #4
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add r3, sp, #8
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rsb r2, r1, #0x11000
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str ip, [sp]
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bl ov4_021EAEB4
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mvn r1, #0
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cmp r0, r1
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ldrne r1, [sp, #8]
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mov r0, r1
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add sp, sp, #0xc
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ldmia sp!, {pc}
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; .align 2, 0
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_021EAA70: .word 0x0000FFFF
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arm_func_end ov4_021EAA30
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arm_func_start ov4_021EAA74
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ov4_021EAA74: ; 0x021EAA74
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stmfd sp!, {r4, r5, r6, lr}
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sub sp, sp, #8
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movs r6, r1
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mov r1, #0
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strh r1, [sp, #4]
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str r0, [sp]
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ldrnesh r0, [sp, #4]
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mov r5, r2
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mov r2, #0
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orrne r0, r0, #1
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strneh r0, [sp, #4]
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cmp r5, #0
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ldrnesh r0, [sp, #4]
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mov r4, r3
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mov r3, r2
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orrne r0, r0, #8
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strneh r0, [sp, #4]
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add r0, sp, #0
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mov r1, #1
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strh r2, [sp, #6]
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bl ov4_02208B18
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cmp r0, #0
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addlt sp, sp, #8
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mvnlt r0, #0
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ldmltia sp!, {r4, r5, r6, pc}
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cmp r6, #0
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beq _021EAB04
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cmp r0, #0
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ble _021EAAFC
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ldrsh r1, [sp, #6]
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tst r1, #0x41
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movne r1, #1
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strne r1, [r6]
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bne _021EAB04
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_021EAAFC:
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mov r1, #0
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str r1, [r6, #0]
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_021EAB04:
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cmp r5, #0
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beq _021EAB30
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cmp r0, #0
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ble _021EAB28
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ldrsh r1, [sp, #6]
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tst r1, #8
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movne r1, #1
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strne r1, [r5]
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bne _021EAB30
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_021EAB28:
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mov r1, #0
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str r1, [r5, #0]
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_021EAB30:
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cmp r4, #0
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addeq sp, sp, #8
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ldmeqia sp!, {r4, r5, r6, pc}
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cmp r0, #0
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ble _021EAB5C
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ldrsh r1, [sp, #6]
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tst r1, #0x20
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movne r1, #1
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addne sp, sp, #8
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strne r1, [r4]
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ldmneia sp!, {r4, r5, r6, pc}
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_021EAB5C:
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mov r1, #0
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str r1, [r4, #0]
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add sp, sp, #8
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ldmia sp!, {r4, r5, r6, pc}
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arm_func_end ov4_021EAA74
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arm_func_start ov4_021EAB6C
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ov4_021EAB6C: ; 0x021EAB6C
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stmfd sp!, {r3, lr}
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mov r2, #0
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add r1, sp, #0
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mov r3, r2
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str r2, [sp]
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bl ov4_021EAA74
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cmp r0, #1
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ldreq r0, [sp]
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movne r0, #0
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ldmia sp!, {r3, pc}
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arm_func_end ov4_021EAB6C
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arm_func_start ov4_021EAB94
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ov4_021EAB94: ; 0x021EAB94
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stmfd sp!, {r3, lr}
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mov r1, #0
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add r2, sp, #0
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mov r3, r1
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str r1, [sp]
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bl ov4_021EAA74
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cmp r0, #1
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ldreq r0, [sp]
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movne r0, #0
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ldmia sp!, {r3, pc}
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arm_func_end ov4_021EAB94
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arm_func_start ov4_021EABBC
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ov4_021EABBC: ; 0x021EABBC
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stmfd sp!, {r3, lr}
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ldr r2, _021EAC30 ; =0x02217920
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ldr r0, _021EAC34 ; =0x0221AF2C
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ldr r1, _021EAC38 ; =0x0221AF2C
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str r2, [r0, #8]
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str r1, [r0, #0xc]
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mov r1, #2
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strh r1, [r0, #0x10]
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mov r2, #0
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ldr r1, _021EAC3C ; =0x0221AF58
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strh r2, [r0, #0x12]
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str r1, [r0, #0x14]
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str r2, [r0, #0x18]
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bl ov4_02208088
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ldr r1, _021EAC40 ; =0x0221AF44
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bl ov4_02208AF8
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ldr r1, _021EAC34 ; =0x0221AF2C
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ldr r0, [r1, #0x18]
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cmp r0, #0
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moveq r0, #0
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ldmeqia sp!, {r3, pc}
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ldr r2, _021EAC40 ; =0x0221AF44
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mov r0, #4
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str r2, [r1, #0x2c]
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strh r0, [r1, #0x12]
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mov r2, #0
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ldr r0, _021EAC44 ; =0x0221AF34
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str r2, [r1, #0x30]
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ldmia sp!, {r3, pc}
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; .align 2, 0
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_021EAC30: .word Unk_ov4_02217920
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_021EAC34: .word Unk_ov4_0221AF2C
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_021EAC38: .word Unk_ov4_0221AF2C
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_021EAC3C: .word Unk_ov4_0221AF58
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_021EAC40: .word Unk_ov4_0221AF44
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_021EAC44: .word Unk_ov4_0221AF34
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arm_func_end ov4_021EABBC
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arm_func_start ov4_021EAC48
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ov4_021EAC48: ; 0x021EAC48
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ldr r3, [r0, #0]
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mov r1, r3, lsr #0x18
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mov r0, r3, lsr #8
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mov r2, r3, lsl #8
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and r1, r1, #0xff
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and r0, r0, #0xff00
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mov r3, r3, lsl #0x18
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orr r0, r1, r0
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and r2, r2, #0xff0000
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and r1, r3, #0xff000000
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orr r0, r2, r0
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orr r1, r1, r0
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mov r0, r1, lsr #0x18
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and r2, r0, #0xff
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mov r0, r1, lsr #0x10
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and r0, r0, #0xff
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cmp r2, #0xa
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moveq r0, #1
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bxeq lr
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cmp r2, #0xac
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bne _021EACB0
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cmp r0, #0x10
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blt _021EACB0
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cmp r0, #0x1f
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movle r0, #1
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bxle lr
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_021EACB0:
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cmp r2, #0xc0
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cmpeq r0, #0xa8
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moveq r0, #1
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movne r0, #0
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bx lr
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arm_func_end ov4_021EAC48
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arm_func_start ov4_021EACC4
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ov4_021EACC4: ; 0x021EACC4
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cmp r0, #0
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ldrlt r2, _021EACD8 ; =0x0221AF2C
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strlt r0, [r2, #4]
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movlt r0, r1
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bx lr
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; .align 2, 0
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_021EACD8: .word Unk_ov4_0221AF2C
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arm_func_end ov4_021EACC4
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arm_func_start ov4_021EACDC
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ov4_021EACDC: ; 0x021EACDC
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stmfd sp!, {r3, lr}
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bl ov4_02208324
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mvn r1, #0
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bl ov4_021EACC4
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ldmia sp!, {r3, pc}
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arm_func_end ov4_021EACDC
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arm_func_start ov4_021EACF0
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ov4_021EACF0: ; 0x021EACF0
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stmfd sp!, {r3, lr}
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bl ov4_02208540
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mvn r1, #0
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bl ov4_021EACC4
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ldmia sp!, {r3, pc}
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arm_func_end ov4_021EACF0
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arm_func_start ov4_021EAD04
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ov4_021EAD04: ; 0x021EAD04
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stmfd sp!, {r3, lr}
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bl ov4_02208534
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mvn r1, #0
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bl ov4_021EACC4
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ldmia sp!, {r3, pc}
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arm_func_end ov4_021EAD04
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arm_func_start ov4_021EAD18
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ov4_021EAD18: ; 0x021EAD18
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stmfd sp!, {r4, lr}
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sub sp, sp, #8
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ldrh r3, [r1, #2]
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cmp r3, #0
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addeq sp, sp, #8
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moveq r0, #0
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ldmeqia sp!, {r4, pc}
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add r4, sp, #0
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mov lr, #4
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_021EAD3C:
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ldrb ip, [r1]
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ldrb r3, [r1, #1]
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add r1, r1, #2
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subs lr, lr, #1
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strb ip, [r4]
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strb r3, [r4, #1]
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add r4, r4, #2
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bne _021EAD3C
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add r1, sp, #0
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strb r2, [sp]
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bl ov4_02208350
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mvn r1, #0
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bl ov4_021EACC4
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add sp, sp, #8
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ldmia sp!, {r4, pc}
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arm_func_end ov4_021EAD18
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arm_func_start ov4_021EAD78
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ov4_021EAD78: ; 0x021EAD78
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stmfd sp!, {r4, lr}
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sub sp, sp, #8
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add r4, sp, #0
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mov lr, #4
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_021EAD88:
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ldrb ip, [r1]
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ldrb r3, [r1, #1]
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add r1, r1, #2
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subs lr, lr, #1
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strb ip, [r4]
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strb r3, [r4, #1]
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add r4, r4, #2
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bne _021EAD88
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add r1, sp, #0
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strb r2, [sp]
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bl ov4_0220837C
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mvn r1, #0
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bl ov4_021EACC4
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add sp, sp, #8
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ldmia sp!, {r4, pc}
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arm_func_end ov4_021EAD78
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|
|
arm_func_start ov4_021EADC4
|
|
ov4_021EADC4: ; 0x021EADC4
|
|
stmfd sp!, {r3, lr}
|
|
bl ov4_02208744
|
|
mvn r1, #0
|
|
bl ov4_021EACC4
|
|
ldmia sp!, {r3, pc}
|
|
arm_func_end ov4_021EADC4
|
|
|
|
arm_func_start ov4_021EADD8
|
|
ov4_021EADD8: ; 0x021EADD8
|
|
stmfd sp!, {r3, r4, r5, lr}
|
|
mov r4, r2
|
|
ldr r2, [r4, #0]
|
|
mov r5, r1
|
|
strb r2, [r5]
|
|
bl ov4_02208750
|
|
ldrb r2, [r5]
|
|
mvn r1, #0
|
|
str r2, [r4, #0]
|
|
bl ov4_021EACC4
|
|
ldmia sp!, {r3, r4, r5, pc}
|
|
arm_func_end ov4_021EADD8
|
|
|
|
arm_func_start ov4_021EAE04
|
|
ov4_021EAE04: ; 0x021EAE04
|
|
stmfd sp!, {r3, lr}
|
|
bl ov4_022083D8
|
|
mvn r1, #0
|
|
bl ov4_021EACC4
|
|
ldmia sp!, {r3, pc}
|
|
arm_func_end ov4_021EAE04
|
|
|
|
arm_func_start ov4_021EAE18
|
|
ov4_021EAE18: ; 0x021EAE18
|
|
stmfd sp!, {r3, r4, r5, lr}
|
|
ldr r4, [sp, #0x14]
|
|
ldr r5, [sp, #0x10]
|
|
ldr ip, [r4]
|
|
strb ip, [r5]
|
|
str r5, [sp]
|
|
bl ov4_022083FC
|
|
ldrb r2, [r5]
|
|
mvn r1, #0
|
|
str r2, [r4, #0]
|
|
bl ov4_021EACC4
|
|
ldmia sp!, {r3, r4, r5, pc}
|
|
arm_func_end ov4_021EAE18
|
|
|
|
arm_func_start ov4_021EAE48
|
|
ov4_021EAE48: ; 0x021EAE48
|
|
stmfd sp!, {r3, lr}
|
|
bl ov4_0220848C
|
|
mvn r1, #0
|
|
bl ov4_021EACC4
|
|
ldmia sp!, {r3, pc}
|
|
arm_func_end ov4_021EAE48
|
|
|
|
arm_func_start ov4_021EAE5C
|
|
ov4_021EAE5C: ; 0x021EAE5C
|
|
stmfd sp!, {r3, r4, r5, r6, lr}
|
|
sub sp, sp, #0xc
|
|
ldr r5, [sp, #0x20]
|
|
add r6, sp, #4
|
|
mov r4, #4
|
|
_021EAE70:
|
|
ldrb lr, [r5]
|
|
ldrb ip, [r5, #1]
|
|
add r5, r5, #2
|
|
subs r4, r4, #1
|
|
strb lr, [r6]
|
|
strb ip, [r6, #1]
|
|
add r6, r6, #2
|
|
bne _021EAE70
|
|
ldr lr, [sp, #0x24]
|
|
add ip, sp, #4
|
|
strb lr, [sp, #4]
|
|
str ip, [sp]
|
|
bl ov4_022084B0
|
|
mvn r1, #0
|
|
bl ov4_021EACC4
|
|
add sp, sp, #0xc
|
|
ldmia sp!, {r3, r4, r5, r6, pc}
|
|
arm_func_end ov4_021EAE5C
|
|
|
|
arm_func_start ov4_021EAEB4
|
|
ov4_021EAEB4: ; 0x021EAEB4
|
|
stmfd sp!, {r3, lr}
|
|
ldr r1, [sp, #8]
|
|
mov r0, r3
|
|
ldr r2, [r1, #0]
|
|
mov r1, #0
|
|
bl MI_CpuFill8
|
|
mov r0, #0
|
|
sub r1, r0, #1
|
|
bl ov4_021EACC4
|
|
ldmia sp!, {r3, pc}
|
|
arm_func_end ov4_021EAEB4
|
|
|
|
arm_func_start ov4_021EAEDC
|
|
ov4_021EAEDC: ; 0x021EAEDC
|
|
ldr ip, _021EAEEC ; =ov4_021EACC4
|
|
mov r0, #0
|
|
sub r1, r0, #1
|
|
bx ip
|
|
; .align 2, 0
|
|
_021EAEEC: .word ov4_021EACC4
|
|
arm_func_end ov4_021EAEDC
|
|
|
|
arm_func_start ov4_021EAEF0
|
|
ov4_021EAEF0: ; 0x021EAEF0
|
|
stmfd sp!, {r3, r4, r5, lr}
|
|
mov r4, r2
|
|
ldr r2, [r4, #0]
|
|
mov r5, r1
|
|
strb r2, [r5]
|
|
bl ov4_0220860C
|
|
ldrb r2, [r5]
|
|
mvn r1, #0
|
|
str r2, [r4, #0]
|
|
bl ov4_021EACC4
|
|
ldmia sp!, {r3, r4, r5, pc}
|
|
arm_func_end ov4_021EAEF0
|
|
|
|
arm_func_start ov4_021EAF1C
|
|
ov4_021EAF1C: ; 0x021EAF1C
|
|
stmfd sp!, {r3, lr}
|
|
add r1, sp, #0
|
|
bl ov4_02208A24
|
|
cmp r0, #0
|
|
mvneq r0, #0
|
|
ldrne r0, [sp]
|
|
ldmia sp!, {r3, pc}
|
|
arm_func_end ov4_021EAF1C
|
|
|
|
arm_func_start ov4_021EAF38
|
|
ov4_021EAF38: ; 0x021EAF38
|
|
ldr r0, _021EAF44 ; =0x0221AF2C
|
|
ldr r0, [r0, #4]
|
|
bx lr
|
|
; .align 2, 0
|
|
_021EAF44: .word Unk_ov4_0221AF2C
|
|
arm_func_end ov4_021EAF38
|
|
|
|
arm_func_start ov4_021EAF48
|
|
ov4_021EAF48: ; 0x021EAF48
|
|
stmfd sp!, {r4, lr}
|
|
mov r4, r0
|
|
bl OS_IsTickAvailable
|
|
cmp r0, #1
|
|
beq _021EAF70
|
|
ldr r0, _021EAF98 ; =0x022178F4
|
|
ldr r1, _021EAF9C ; =0x02217914
|
|
ldr r2, _021EAFA0 ; =0x022178DC
|
|
ldr r3, _021EAFA4 ; =0x00000667
|
|
bl __msl_assertion_failed
|
|
_021EAF70:
|
|
bl OS_GetTick
|
|
mov r1, r1, lsl #6
|
|
orr r1, r1, r0, lsr #26
|
|
ldr r2, _021EAFA8 ; =0x01FF6210
|
|
mov r0, r0, lsl #6
|
|
mov r3, #0
|
|
bl _ull_div
|
|
cmp r4, #0
|
|
strne r0, [r4]
|
|
ldmia sp!, {r4, pc}
|
|
; .align 2, 0
|
|
_021EAF98: .word Unk_ov4_022178F4
|
|
_021EAF9C: .word Unk_ov4_02217914
|
|
_021EAFA0: .word Unk_ov4_022178DC
|
|
_021EAFA4: .word 0x00000667
|
|
_021EAFA8: .word 0x01FF6210
|
|
arm_func_end ov4_021EAF48
|
|
|
|
arm_func_start ov4_021EAFAC
|
|
ov4_021EAFAC: ; 0x021EAFAC
|
|
ldr r2, _021EAFF4 ; =0x000041A7
|
|
mov r1, r0, lsl #0x10
|
|
mov r0, r0, lsr #0x10
|
|
mul r3, r0, r2
|
|
mov r1, r1, lsr #0x10
|
|
mul r2, r1, r2
|
|
mov r0, r3, lsl #0x11
|
|
add r0, r2, r0, lsr #1
|
|
mvn r1, #0x80000000
|
|
cmp r0, r1
|
|
bichi r0, r0, #0x80000000
|
|
addhi r0, r0, #1
|
|
add r0, r0, r3, lsr #15
|
|
mvn r1, #0x80000000
|
|
cmp r0, r1
|
|
bichi r0, r0, #0x80000000
|
|
addhi r0, r0, #1
|
|
bx lr
|
|
; .align 2, 0
|
|
_021EAFF4: .word 0x000041A7
|
|
arm_func_end ov4_021EAFAC
|
|
|
|
arm_func_start ov4_021EAFF8
|
|
ov4_021EAFF8: ; 0x021EAFF8
|
|
stmfd sp!, {r3, lr}
|
|
ldr r0, _021EB014 ; =0x022178D8
|
|
ldr r0, [r0, #0]
|
|
bl ov4_021EAFAC
|
|
ldr r1, _021EB014 ; =0x022178D8
|
|
str r0, [r1, #0]
|
|
ldmia sp!, {r3, pc}
|
|
; .align 2, 0
|
|
_021EB014: .word Unk_ov4_022178D8
|
|
arm_func_end ov4_021EAFF8
|
|
|
|
arm_func_start ov4_021EB018
|
|
ov4_021EB018: ; 0x021EB018
|
|
cmp r0, #0
|
|
bicne r1, r0, #0x80000000
|
|
ldr r0, _021EB030 ; =0x022178D8
|
|
moveq r1, #1
|
|
str r1, [r0, #0]
|
|
bx lr
|
|
; .align 2, 0
|
|
_021EB030: .word Unk_ov4_022178D8
|
|
arm_func_end ov4_021EB018
|
|
|
|
arm_func_start ov4_021EB034
|
|
ov4_021EB034: ; 0x021EB034
|
|
stmfd sp!, {r3, r4, r5, lr}
|
|
mov r5, r0
|
|
subs r4, r1, r5
|
|
ldmeqia sp!, {r3, r4, r5, pc}
|
|
bl ov4_021EAFF8
|
|
mov r1, r4
|
|
bl _s32_div_f
|
|
add r0, r1, r5
|
|
ldmia sp!, {r3, r4, r5, pc}
|
|
arm_func_end ov4_021EB034
|
|
|
|
arm_func_start ov4_021EB058
|
|
ov4_021EB058: ; 0x021EB058
|
|
stmfd sp!, {r3, lr}
|
|
cmp r2, #0
|
|
mov ip, #0
|
|
ble _021EB080
|
|
add lr, sp, #0
|
|
_021EB06C:
|
|
ldrsb r3, [r0, ip]
|
|
add ip, ip, #1
|
|
cmp ip, r2
|
|
strb r3, [lr], #1
|
|
blt _021EB06C
|
|
_021EB080:
|
|
cmp ip, #3
|
|
bge _021EB0A4
|
|
add r0, sp, #0
|
|
add r2, r0, ip
|
|
mov r0, #0
|
|
_021EB094:
|
|
add ip, ip, #1
|
|
cmp ip, #3
|
|
strb r0, [r2], #1
|
|
blt _021EB094
|
|
_021EB0A4:
|
|
ldrb r0, [sp]
|
|
mov r0, r0, asr #2
|
|
strb r0, [r1]
|
|
ldrb r2, [sp]
|
|
ldrb r0, [sp, #1]
|
|
mov r2, r2, lsl #0x1e
|
|
mov r0, r0, asr #4
|
|
orr r0, r0, r2, lsr #26
|
|
strb r0, [r1, #1]
|
|
ldrb r2, [sp, #1]
|
|
ldrb r0, [sp, #2]
|
|
mov r2, r2, lsl #0x1c
|
|
mov r0, r0, asr #6
|
|
orr r0, r0, r2, lsr #26
|
|
strb r0, [r1, #2]
|
|
ldrb r0, [sp, #2]
|
|
and r0, r0, #0x3f
|
|
strb r0, [r1, #3]
|
|
ldmia sp!, {r3, pc}
|
|
arm_func_end ov4_021EB058
|
|
|
|
arm_func_start B64Encode
|
|
B64Encode: ; 0x021EB0F0
|
|
stmfd sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
|
|
mov r7, r1
|
|
mov r6, r2
|
|
mov sl, r0
|
|
mov r5, r7
|
|
mov sb, r6
|
|
cmp r3, #1
|
|
beq _021EB11C
|
|
cmp r3, #2
|
|
beq _021EB124
|
|
b _021EB12C
|
|
_021EB11C:
|
|
ldr r4, _021EB218 ; =0x02215980
|
|
b _021EB130
|
|
_021EB124:
|
|
ldr r4, _021EB21C ; =0x02215984
|
|
b _021EB130
|
|
_021EB12C:
|
|
ldr r4, _021EB220 ; =0x02215988
|
|
_021EB130:
|
|
cmp r6, #0
|
|
ble _021EB168
|
|
mov r8, #3
|
|
_021EB13C:
|
|
cmp sb, #3
|
|
movlt r2, sb
|
|
movge r2, r8
|
|
mov r0, sl
|
|
mov r1, r7
|
|
bl ov4_021EB058
|
|
sub sb, sb, #3
|
|
cmp sb, #0
|
|
add r7, r7, #4
|
|
add sl, sl, #3
|
|
bgt _021EB13C
|
|
_021EB168:
|
|
ldr r1, _021EB224 ; =0x55555556
|
|
mov r2, #3
|
|
smull r0, r3, r1, r6
|
|
add r3, r3, r6, lsr #31
|
|
smull r0, r1, r2, r3
|
|
sub r3, r6, r0
|
|
mov r1, r7
|
|
cmp r3, #1
|
|
subeq r1, r7, #2
|
|
beq _021EB198
|
|
cmp r3, #2
|
|
subeq r1, r7, #1
|
|
_021EB198:
|
|
mov r0, #0
|
|
strb r0, [r7]
|
|
cmp r7, r5
|
|
ldmlsia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
|
|
_021EB1A8:
|
|
sub r7, r7, #1
|
|
cmp r7, r1
|
|
ldrhssb r0, [r4, #2]
|
|
strhsb r0, [r7]
|
|
bhs _021EB20C
|
|
ldrsb r0, [r7]
|
|
cmp r0, #0x19
|
|
addle r0, r0, #0x41
|
|
strleb r0, [r7]
|
|
ble _021EB20C
|
|
cmp r0, #0x33
|
|
addle r0, r0, #0x47
|
|
strleb r0, [r7]
|
|
ble _021EB20C
|
|
cmp r0, #0x3d
|
|
suble r0, r0, #4
|
|
strleb r0, [r7]
|
|
ble _021EB20C
|
|
cmp r0, #0x3e
|
|
ldreqsb r0, [r4]
|
|
streqb r0, [r7]
|
|
beq _021EB20C
|
|
cmp r0, #0x3f
|
|
ldreqsb r0, [r4, #1]
|
|
streqb r0, [r7]
|
|
_021EB20C:
|
|
cmp r7, r5
|
|
bhi _021EB1A8
|
|
ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
|
|
; .align 2, 0
|
|
_021EB218: .word Unk_ov4_02215980
|
|
_021EB21C: .word Unk_ov4_02215984
|
|
_021EB220: .word Unk_ov4_02215988
|
|
_021EB224: .word 0x55555556
|
|
arm_func_end B64Encode
|
|
|
|
.rodata
|
|
|
|
|
|
.global Unk_ov4_02215980
|
|
Unk_ov4_02215980: ; 0x02215980
|
|
.incbin "incbin/overlay4_rodata.bin", 0x118, 0x11C - 0x118
|
|
|
|
.global Unk_ov4_02215984
|
|
Unk_ov4_02215984: ; 0x02215984
|
|
.incbin "incbin/overlay4_rodata.bin", 0x11C, 0x120 - 0x11C
|
|
|
|
.global Unk_ov4_02215988
|
|
Unk_ov4_02215988: ; 0x02215988
|
|
.incbin "incbin/overlay4_rodata.bin", 0x120, 0x4
|
|
|
|
|
|
|
|
.data
|
|
|
|
|
|
.global Unk_ov4_022178D8
|
|
Unk_ov4_022178D8: ; 0x022178D8
|
|
.incbin "incbin/overlay4_data.bin", 0x1A58, 0x1A5C - 0x1A58
|
|
|
|
.global Unk_ov4_022178DC
|
|
Unk_ov4_022178DC: ; 0x022178DC
|
|
.incbin "incbin/overlay4_data.bin", 0x1A5C, 0x1A64 - 0x1A5C
|
|
|
|
.global Unk_ov4_022178E4
|
|
Unk_ov4_022178E4: ; 0x022178E4
|
|
.incbin "incbin/overlay4_data.bin", 0x1A64, 0x1A74 - 0x1A64
|
|
|
|
.global Unk_ov4_022178F4
|
|
Unk_ov4_022178F4: ; 0x022178F4
|
|
.incbin "incbin/overlay4_data.bin", 0x1A74, 0x1A94 - 0x1A74
|
|
|
|
.global Unk_ov4_02217914
|
|
Unk_ov4_02217914: ; 0x02217914
|
|
.incbin "incbin/overlay4_data.bin", 0x1A94, 0x1AA0 - 0x1A94
|
|
|
|
.global Unk_ov4_02217920
|
|
Unk_ov4_02217920: ; 0x02217920
|
|
.incbin "incbin/overlay4_data.bin", 0x1AA0, 0xA
|
|
|
|
|
|
|
|
.bss
|
|
|
|
|
|
.global Unk_ov4_0221AF2C
|
|
Unk_ov4_0221AF2C: ; 0x0221AF2C
|
|
.space 0x4
|
|
|
|
.global Unk_ov4_0221AF30
|
|
Unk_ov4_0221AF30: ; 0x0221AF30
|
|
.space 0x4
|
|
|
|
.global Unk_ov4_0221AF34
|
|
Unk_ov4_0221AF34: ; 0x0221AF34
|
|
.space 0x10
|
|
|
|
.global Unk_ov4_0221AF44
|
|
Unk_ov4_0221AF44: ; 0x0221AF44
|
|
.space 0x14
|
|
|
|
.global Unk_ov4_0221AF58
|
|
Unk_ov4_0221AF58: ; 0x0221AF58
|
|
.space 0x18
|
|
|