mirror of
https://github.com/pret/pokeplatinum.git
synced 2026-04-26 08:41:27 -05:00
409 lines
7.0 KiB
ArmAsm
409 lines
7.0 KiB
ArmAsm
.include "macros/function.inc"
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.include "include/gt2connection.inc"
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.text
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arm_func_start ov4_021F7F54
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ov4_021F7F54: ; 0x021F7F54
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stmfd sp!, {r4, lr}
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mov r4, r1
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bl ov4_021FA678
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cmp r0, #0
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ldmneia sp!, {r4, pc}
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ldr r1, [r4, #0]
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mov r0, #0
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str r0, [r1, #0xc]
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ldr r1, [r4, #0]
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mov r2, #1
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str r2, [r1, #0x10]
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ldmia sp!, {r4, pc}
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arm_func_end ov4_021F7F54
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arm_func_start ov4_021F7F84
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ov4_021F7F84: ; 0x021F7F84
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stmfd sp!, {r4, lr}
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mov r4, r1
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bl ov4_021FA678
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cmp r0, #0
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ldmneia sp!, {r4, pc}
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ldr r0, [r4, #0]
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mov r1, #2
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str r1, [r0, #0xc]
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ldr r1, [r4, #0]
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mov r0, #0
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str r0, [r1, #0x10]
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ldmia sp!, {r4, pc}
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arm_func_end ov4_021F7F84
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arm_func_start ov4_021F7FB4
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ov4_021F7FB4: ; 0x021F7FB4
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stmfd sp!, {r0, r1, r2, r3}
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stmfd sp!, {r3, r4, r5, lr}
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sub sp, sp, #0x20
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mov r5, r0
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add r0, sp, #0x34
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add r1, sp, #0x38
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mov r4, r3
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bl ov4_021FAE30
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ldr r0, [sp, #0x38]
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cmp r0, #0
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ble _021F8014
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bl DWCi_GsMalloc
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cmp r0, #0
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str r0, [r5, #0x38]
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addeq sp, sp, #0x20
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moveq r0, #1
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ldmeqia sp!, {r3, r4, r5, lr}
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addeq sp, sp, #0x10
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bxeq lr
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ldr r1, [sp, #0x34]
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ldr r2, [sp, #0x38]
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bl memcpy
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ldr r0, [sp, #0x38]
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str r0, [r5, #0x3c]
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_021F8014:
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cmp r4, #0
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addne ip, r5, #0x28
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ldmneia r4, {r0, r1, r2, r3}
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stmneia ip, {r0, r1, r2, r3}
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add r0, sp, #0
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bl ov4_021F71C4
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add r1, sp, #0
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add r0, r5, #0x68
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bl ov4_021F72E0
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add r1, sp, #0
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mov r0, r5
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bl ov4_021F9DB8
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mov r0, #0
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str r0, [r5, #0xc]
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add sp, sp, #0x20
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ldmia sp!, {r3, r4, r5, lr}
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add sp, sp, #0x10
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bx lr
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arm_func_end ov4_021F7FB4
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arm_func_start ov4_021F805C
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ov4_021F805C: ; 0x021F805C
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stmfd sp!, {r3, r4, r5, lr}
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mov r5, r0
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ldr r2, [r5, #0x14]
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mov r4, r1
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cmp r2, #0
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movne r0, #0
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strne r0, [r5, #0x14]
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ldmneia sp!, {r3, r4, r5, pc}
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mov r2, #0
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str r2, [r5, #0x14]
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ldr r1, [r5, #0xc]
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cmp r1, #4
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movne r0, r2
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ldmneia sp!, {r3, r4, r5, pc}
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bl ov4_021F9F1C
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mov r0, #5
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cmp r4, #0
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str r0, [r5, #0xc]
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addne ip, r5, #0x28
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ldmneia r4, {r0, r1, r2, r3}
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stmneia ip, {r0, r1, r2, r3}
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mov r0, #1
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ldmia sp!, {r3, r4, r5, pc}
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arm_func_end ov4_021F805C
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arm_func_start ov4_021F80B8
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ov4_021F80B8: ; 0x021F80B8
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stmfd sp!, {r0, r1, r2, r3}
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stmfd sp!, {r4, lr}
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mov r4, r0
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mov r0, #0
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str r0, [r4, #0x14]
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ldr r0, [r4, #0xc]
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cmp r0, #4
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ldmneia sp!, {r4, lr}
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addne sp, sp, #0x10
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bxne lr
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add r0, sp, #0xc
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add r1, sp, #0x10
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bl ov4_021FAE30
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ldr r1, [sp, #0xc]
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ldr r2, [sp, #0x10]
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mov r0, r4
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bl ov4_021F9F78
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mov r0, #6
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str r0, [r4, #0xc]
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ldmia sp!, {r4, lr}
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add sp, sp, #0x10
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bx lr
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arm_func_end ov4_021F80B8
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arm_func_start ov4_021F8110
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ov4_021F8110: ; 0x021F8110
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stmfd sp!, {r3, r4, lr}
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sub sp, sp, #4
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mov r4, r0
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str r2, [sp]
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mov r3, r1
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ldrh r2, [r4, #4]
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ldr r0, [r4, #8]
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ldr r1, [r4, #0]
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bl ov4_021FA94C
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cmp r0, #0
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addeq sp, sp, #4
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moveq r0, #0
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ldmeqia sp!, {r3, r4, pc}
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bl current_time
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str r0, [r4, #0x88]
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mov r0, #1
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add sp, sp, #4
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ldmia sp!, {r3, r4, pc}
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arm_func_end ov4_021F8110
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arm_func_start ov4_021F8158
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ov4_021F8158: ; 0x021F8158
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stmfd sp!, {r4, lr}
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mov r4, r0
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ldr r2, [r4, #0xc]
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cmp r2, #5
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bge _021F81F0
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ldr r0, [r4, #0x10]
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mov r3, #0
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cmp r0, #0
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beq _021F819C
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ldr r2, [r4, #0x20]
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cmp r2, #0
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beq _021F81B8
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ldr r0, [r4, #0x1c]
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sub r0, r1, r0
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cmp r0, r2
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movhi r3, #1
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b _021F81B8
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_021F819C:
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cmp r2, #4
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bge _021F81B8
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ldr r2, [r4, #0x1c]
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ldr r0, _021F81F8 ; =0x0000EA60
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sub r1, r1, r2
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cmp r1, r0
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movhi r3, #1
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_021F81B8:
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cmp r3, #0
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beq _021F81F0
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mov r0, r4
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bl ov4_021FA270
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mov r0, r4
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bl ov4_021F8390
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mov r2, #0
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mov r0, r4
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mov r3, r2
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mov r1, #6
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bl ov4_021F77F4
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cmp r0, #0
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moveq r0, #0
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ldmeqia sp!, {r4, pc}
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_021F81F0:
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mov r0, #1
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ldmia sp!, {r4, pc}
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; .align 2, 0
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_021F81F8: .word 0x0000EA60
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arm_func_end ov4_021F8158
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arm_func_start ov4_021F81FC
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ov4_021F81FC: ; 0x021F81FC
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stmfd sp!, {r3, r4, r5, r6, r7, lr}
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mov r7, r0
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ldr r0, [r7, #0x60]
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mov r6, r1
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bl ov4_021E9BBC
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mov r5, r0
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cmp r5, #0
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mov r4, #0
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ble _021F8260
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_021F8220:
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ldr r0, [r7, #0x60]
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mov r1, r4
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bl ov4_021E9BC4
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mov r1, r0
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ldr r0, [r1, #0xc]
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sub r0, r6, r0
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cmp r0, #0x3e8
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bls _021F8254
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mov r0, r7
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bl ov4_021FA2D8
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cmp r0, #0
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moveq r0, #0
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ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
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_021F8254:
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add r4, r4, #1
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cmp r4, r5
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blt _021F8220
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_021F8260:
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mov r0, #1
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ldmia sp!, {r3, r4, r5, r6, r7, pc}
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arm_func_end ov4_021F81FC
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arm_func_start ov4_021F8268
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ov4_021F8268: ; 0x021F8268
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stmfd sp!, {r3, lr}
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ldr r2, [r0, #0x90]
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cmp r2, #0
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moveq r0, #1
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ldmeqia sp!, {r3, pc}
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ldr r2, [r0, #0x94]
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sub r1, r1, r2
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cmp r1, #0x64
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bls _021F829C
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bl ov4_021FA16C
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cmp r0, #0
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moveq r0, #0
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ldmeqia sp!, {r3, pc}
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_021F829C:
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mov r0, #1
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ldmia sp!, {r3, pc}
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arm_func_end ov4_021F8268
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arm_func_start ov4_021F82A4
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ov4_021F82A4: ; 0x021F82A4
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stmfd sp!, {r3, lr}
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ldr r3, [r0, #0x88]
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ldr r2, _021F82D4 ; =0x00007530
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sub r1, r1, r3
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cmp r1, r2
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bls _021F82CC
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bl ov4_021FA048
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cmp r0, #0
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moveq r0, #0
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ldmeqia sp!, {r3, pc}
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_021F82CC:
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mov r0, #1
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ldmia sp!, {r3, pc}
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; .align 2, 0
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_021F82D4: .word 0x00007530
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arm_func_end ov4_021F82A4
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arm_func_start ov4_021F82D8
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ov4_021F82D8: ; 0x021F82D8
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stmfd sp!, {r3, r4, r5, lr}
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mov r5, r0
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mov r4, r1
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bl ov4_021F8158
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cmp r0, #0
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moveq r0, #0
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ldmeqia sp!, {r3, r4, r5, pc}
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mov r0, r5
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mov r1, r4
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bl ov4_021F82A4
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cmp r0, #0
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moveq r0, #0
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ldmeqia sp!, {r3, r4, r5, pc}
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mov r0, r5
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mov r1, r4
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bl ov4_021F81FC
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cmp r0, #0
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moveq r0, #0
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ldmeqia sp!, {r3, r4, r5, pc}
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mov r0, r5
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mov r1, r4
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bl ov4_021F8268
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cmp r0, #0
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movne r0, #1
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moveq r0, #0
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ldmia sp!, {r3, r4, r5, pc}
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arm_func_end ov4_021F82D8
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arm_func_start ov4_021F8340
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ov4_021F8340: ; 0x021F8340
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stmfd sp!, {r4, lr}
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mov r4, r0
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cmp r1, #0
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beq _021F8380
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ldr r1, [r4, #0xc]
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cmp r1, #7
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ldmgeia sp!, {r4, pc}
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bl ov4_021F8390
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mov r0, r4
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bl ov4_021FA270
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mov r0, r4
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mov r1, #0
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bl ov4_021F79C0
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mov r0, r4
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bl ov4_021FA888
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ldmia sp!, {r4, pc}
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_021F8380:
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mov r1, #6
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str r1, [r4, #0xc]
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bl ov4_021F9FEC
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ldmia sp!, {r4, pc}
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arm_func_end ov4_021F8340
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arm_func_start ov4_021F8390
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ov4_021F8390: ; 0x021F8390
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stmfd sp!, {r0, r1, r2, r3}
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stmfd sp!, {r3, lr}
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ldr r1, [sp, #8]
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ldr r0, [r1, #0xc]
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cmp r0, #7
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ldmeqia sp!, {r3, lr}
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addeq sp, sp, #0x10
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bxeq lr
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mov r0, #7
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str r0, [r1, #0xc]
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ldr r0, [sp, #8]
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add r1, sp, #8
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ldr r0, [r0, #8]
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ldr r0, [r0, #0xc]
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bl ov4_021EA4F4
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ldr r0, [sp, #8]
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add r1, sp, #8
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ldr r0, [r0, #8]
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ldr r0, [r0, #0x10]
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bl ov4_021E9C2C
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ldmia sp!, {r3, lr}
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add sp, sp, #0x10
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bx lr
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arm_func_end ov4_021F8390
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arm_func_start ov4_021F83EC
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ov4_021F83EC: ; 0x021F83EC
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stmfd sp!, {r4, lr}
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mov r4, r0
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ldr r0, [r4, #0x38]
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cmp r0, #0
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beq _021F8404
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bl DWCi_GsFree
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_021F8404:
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ldr r0, [r4, #0x44]
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cmp r0, #0
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beq _021F8414
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bl DWCi_GsFree
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_021F8414:
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ldr r0, [r4, #0x50]
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cmp r0, #0
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beq _021F8424
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bl DWCi_GsFree
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_021F8424:
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ldr r0, [r4, #0x5c]
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cmp r0, #0
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beq _021F8434
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bl ov4_021E9B50
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_021F8434:
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ldr r0, [r4, #0x60]
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cmp r0, #0
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beq _021F8444
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bl ov4_021E9B50
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_021F8444:
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ldr r0, [r4, #0x98]
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cmp r0, #0
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beq _021F8454
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bl ov4_021E9B50
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_021F8454:
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ldr r0, [r4, #0x9c]
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cmp r0, #0
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beq _021F8464
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bl ov4_021E9B50
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_021F8464:
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mov r0, r4
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bl DWCi_GsFree
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ldmia sp!, {r4, pc}
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arm_func_end ov4_021F83EC |