mirror of
https://github.com/pret/pokeplatinum.git
synced 2026-04-25 15:49:02 -05:00
541 lines
9.3 KiB
ArmAsm
541 lines
9.3 KiB
ArmAsm
.include "macros/function.inc"
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.include "include/dwc_ghttp.inc"
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.text
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arm_func_start DWC_InitGHTTP
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DWC_InitGHTTP: ; 0x021E558C
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stmfd sp!, {r3, lr}
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bl ov60_022215B4
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ldr r1, _021E55AC ; =0x0221AE24
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mov r0, #1
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ldr r2, [r1, #4]
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add r2, r2, #1
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str r2, [r1, #4]
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ldmia sp!, {r3, pc}
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; .align 2, 0
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_021E55AC: .word Unk_ov4_0221AE24
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arm_func_end DWC_InitGHTTP
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arm_func_start DWC_ShutdownGHTTP
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DWC_ShutdownGHTTP: ; 0x021E55B0
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stmfd sp!, {r3, lr}
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ldr r0, _021E55EC ; =0x0221AE24
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ldr r0, [r0, #4]
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cmp r0, #0
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movle r0, #1
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ldmleia sp!, {r3, pc}
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bl ov60_02221608
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ldr r0, _021E55EC ; =0x0221AE24
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ldr r1, [r0, #4]
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subs r1, r1, #1
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str r1, [r0, #4]
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bne _021E55E4
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bl ov4_021E5BC4
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_021E55E4:
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mov r0, #1
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ldmia sp!, {r3, pc}
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; .align 2, 0
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_021E55EC: .word Unk_ov4_0221AE24
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arm_func_end DWC_ShutdownGHTTP
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arm_func_start DWC_ProcessGHTTP
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DWC_ProcessGHTTP: ; 0x021E55F0
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stmfd sp!, {r3, lr}
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bl ov4_021D7708
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cmp r0, #0
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movne r0, #0
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ldmneia sp!, {r3, pc}
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bl ov60_022218EC
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mov r0, #1
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ldmia sp!, {r3, pc}
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arm_func_end DWC_ProcessGHTTP
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arm_func_start ov4_021E5610
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ov4_021E5610: ; 0x021E5610
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stmfd sp!, {r3, r4, r5, r6, r7, lr}
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ldr r4, [sp, #0x18]
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mov r7, r1
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ldr r5, [r4, #4]
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ldr r6, [r4, #0xc]
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cmp r5, #0
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beq _021E5668
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cmp r7, #0
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bne _021E564C
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mov r1, r3
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mov r0, r2
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ldr r3, [r4, #0]
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mov r2, r7
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blx r5
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b _021E5668
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_021E564C:
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mov r0, r7
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bl ov4_021E5988
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mov r0, #0
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ldr r3, [r4, #0]
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mov r1, r0
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mov r2, r7
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blx r5
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_021E5668:
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cmp r7, #0
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bne _021E5678
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cmp r6, #1
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bne _021E5694
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_021E5678:
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ldr r1, [r4, #0x10]
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cmp r1, #0
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moveq r6, #1
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beq _021E5694
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mov r0, #4
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mov r2, #0
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bl DWC_Free
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_021E5694:
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mov r0, r4
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bl ov4_021E5B40
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cmp r6, #0
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movne r0, #1
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moveq r0, #0
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ldmia sp!, {r3, r4, r5, r6, r7, pc}
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arm_func_end ov4_021E5610
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arm_func_start ov4_021E56AC
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ov4_021E56AC: ; 0x021E56AC
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stmfd sp!, {r4, lr}
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sub sp, sp, #8
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ldr r4, [sp, #0x18]
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ldr lr, [r4, #8]
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cmp lr, #0
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addeq sp, sp, #8
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ldmeqia sp!, {r4, pc}
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ldr ip, [sp, #0x14]
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mov r0, r1
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str ip, [sp]
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mov r1, r2
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mov r2, r3
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ldr ip, [r4]
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ldr r3, [sp, #0x10]
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str ip, [sp, #4]
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blx lr
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add sp, sp, #8
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ldmia sp!, {r4, pc}
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arm_func_end ov4_021E56AC
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arm_func_start DWC_GetGHTTPData
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DWC_GetGHTTPData: ; 0x021E56F4
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stmfd sp!, {r3, r4, r5, r6, r7, lr}
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sub sp, sp, #0x10
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mov r4, r0
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mov r7, r1
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mov r6, r2
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bl ov4_021D7708
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cmp r0, #0
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addne sp, sp, #0x10
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mvnne r0, #7
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ldmneia sp!, {r3, r4, r5, r6, r7, pc}
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mov r2, #0
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mov r1, #1
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add r0, sp, #0
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str r6, [sp]
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str r7, [sp, #4]
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str r2, [sp, #8]
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str r1, [sp, #0xc]
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bl ov4_021E5AE4
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movs r5, r0
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bne _021E576C
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mvn r0, #4
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bl ov4_021E5988
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mov r0, #0
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mov r1, r0
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mov r3, r6
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sub r2, r0, #5
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blx r7
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add sp, sp, #0x10
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mvn r0, #4
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ldmia sp!, {r3, r4, r5, r6, r7, pc}
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_021E576C:
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ldr r2, _021E57B8 ; =ov4_021E5610
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mov r0, r4
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mov r3, r5
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mov r1, #0
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bl ov60_02221664
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movs r4, r0
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bpl _021E57A8
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bl ov4_021E5988
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mov r0, #0
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mov r1, r0
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mov r2, r4
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mov r3, r6
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blx r7
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mov r0, r5
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bl ov4_021E5B40
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_021E57A8:
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mov r0, r4
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str r4, [r5, #0x14]
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add sp, sp, #0x10
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ldmia sp!, {r3, r4, r5, r6, r7, pc}
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; .align 2, 0
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_021E57B8: .word ov4_021E5610
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arm_func_end DWC_GetGHTTPData
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arm_func_start ov4_021E57BC
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ov4_021E57BC: ; 0x021E57BC
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stmfd sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
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sub sp, sp, #0x28
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ldr sb, [sp, #0x4c]
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ldr r8, [sp, #0x50]
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mov r5, r0
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mov r4, r1
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mov r7, r2
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mov sl, r3
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mov r6, #0
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bl ov4_021D7708
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cmp r0, #0
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addne sp, sp, #0x28
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mvnne r0, #7
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ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
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ldr r1, [sp, #0x48]
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add r0, sp, #0x18
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str r8, [sp, #0x18]
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str sb, [sp, #0x1c]
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str r1, [sp, #0x20]
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str r7, [sp, #0x24]
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bl ov4_021E5AE4
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movs r7, r0
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bne _021E5840
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mvn r0, #4
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bl ov4_021E5988
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mov r0, r6
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mov r1, r0
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mov r3, r8
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sub r2, r0, #5
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blx sb
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add sp, sp, #0x28
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mvn r0, #4
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ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
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_021E5840:
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cmp r4, #0
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ble _021E5890
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mov r1, r4
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mov r0, #4
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bl DWC_Alloc
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movs r6, r0
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bne _021E588C
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mvn r0, #4
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bl ov4_021E5988
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mov r0, #0
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mov r1, r0
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mov r3, r8
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sub r2, r0, #5
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blx sb
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mov r0, r7
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bl ov4_021E5B40
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add sp, sp, #0x28
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mvn r0, #4
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ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
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_021E588C:
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str r6, [r7, #0x10]
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_021E5890:
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cmp sl, #0
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mov r1, #0
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beq _021E58D0
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ldr r0, [sl]
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ldr r2, _021E5958 ; =ov4_021E56AC
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stmia sp, {r0, r1}
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str r1, [sp, #8]
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str r2, [sp, #0xc]
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ldr r0, _021E595C ; =ov4_021E5610
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mov r2, r6
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str r0, [sp, #0x10]
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mov r0, r5
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mov r3, r4
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str r7, [sp, #0x14]
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bl ov60_022216A0
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b _021E5900
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_021E58D0:
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str r1, [sp]
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str r1, [sp, #4]
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ldr r2, _021E5958 ; =ov4_021E56AC
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str r1, [sp, #8]
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str r2, [sp, #0xc]
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ldr r0, _021E595C ; =ov4_021E5610
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mov r2, r6
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str r0, [sp, #0x10]
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mov r0, r5
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mov r3, r4
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str r7, [sp, #0x14]
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bl ov60_022216A0
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_021E5900:
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mov r4, r0
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cmp r4, #0
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bge _021E5948
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mov r0, r4
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bl ov4_021E5988
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mov r0, #0
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mov r1, r0
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mov r2, r4
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mov r3, r8
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blx sb
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ldr r1, [r7, #0x10]
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cmp r1, #0
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beq _021E5940
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mov r0, #4
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mov r2, #0
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bl DWC_Free
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_021E5940:
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mov r0, r7
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bl ov4_021E5B40
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_021E5948:
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mov r0, r4
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str r4, [r7, #0x14]
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add sp, sp, #0x28
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ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
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; .align 2, 0
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_021E5958: .word ov4_021E56AC
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_021E595C: .word ov4_021E5610
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arm_func_end ov4_021E57BC
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arm_func_start DWC_GetGHTTPDataEx
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DWC_GetGHTTPDataEx: ; 0x021E5960
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stmdb sp!, {lr}
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sub sp, sp, #0xc
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ldr lr, [sp, #0x10]
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ldr ip, [sp, #0x14]
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stmia sp, {r3, lr}
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mov r3, #0
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str ip, [sp, #8]
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bl ov4_021E57BC
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add sp, sp, #0xc
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ldmia sp!, {pc}
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arm_func_end DWC_GetGHTTPDataEx
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arm_func_start ov4_021E5988
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ov4_021E5988: ; 0x021E5988
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stmfd sp!, {r4, lr}
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movs r4, r0
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mov r0, #7
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ldr r1, _021E5AC8 ; =0xFFFE8130
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moveq r0, #0
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ldmeqia sp!, {r4, pc}
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add r2, r4, #7
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cmp r2, #0x1a
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addls pc, pc, r2, lsl #2
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b _021E5ABC
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_021E59B0: ; jump table
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b _021E5A1C ; case 0
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b _021E5A24 ; case 1
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b _021E5A30 ; case 2
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b _021E5A38 ; case 3
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b _021E5A38 ; case 4
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b _021E5A38 ; case 5
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b _021E5A40 ; case 6
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b _021E5ABC ; case 7
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b _021E5A4C ; case 8
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b _021E5A58 ; case 9
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b _021E5A60 ; case 10
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b _021E5A6C ; case 11
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b _021E5A74 ; case 12
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b _021E5A7C ; case 13
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b _021E5A84 ; case 14
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b _021E5A8C ; case 15
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b _021E5A8C ; case 16
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b _021E5A8C ; case 17
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b _021E5A7C ; case 18
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b _021E5A7C ; case 19
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b _021E5A98 ; case 20
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b _021E5A98 ; case 21
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b _021E5AA0 ; case 22
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b _021E5AAC ; case 23
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b _021E5AB4 ; case 24
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b _021E5ABC ; case 25
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b _021E5A4C ; case 26
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_021E5A1C:
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sub r1, r1, #0x320
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b _021E5ABC
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_021E5A24:
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ldr r2, _021E5ACC ; =0xFFFFFCD6
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add r1, r1, r2
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b _021E5ABC
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_021E5A30:
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sub r1, r1, #0x348
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b _021E5ABC
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_021E5A38:
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sub r1, r1, #0x334
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b _021E5ABC
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_021E5A40:
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ldr r2, _021E5AD0 ; =0xFFFFFCC2
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add r1, r1, r2
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b _021E5ABC
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_021E5A4C:
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sub r1, r1, #1
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mov r0, #9
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b _021E5ABC
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_021E5A58:
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sub r1, r1, #0x348
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b _021E5ABC
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_021E5A60:
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ldr r2, _021E5AD4 ; =0xFFFFFCAE
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add r1, r1, r2
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b _021E5ABC
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_021E5A6C:
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sub r1, r1, #0x1e
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b _021E5ABC
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_021E5A74:
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sub r1, r1, #0x32
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b _021E5ABC
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_021E5A7C:
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sub r1, r1, #0x14
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b _021E5ABC
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_021E5A84:
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sub r1, r1, #0x35c
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b _021E5ABC
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_021E5A8C:
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ldr r2, _021E5AD8 ; =0xFFFFFC9A
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add r1, r1, r2
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b _021E5ABC
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_021E5A98:
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sub r1, r1, #0x370
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b _021E5ABC
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_021E5AA0:
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ldr r2, _021E5ADC ; =0xFFFFFC86
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add r1, r1, r2
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b _021E5ABC
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_021E5AAC:
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sub r1, r1, #0x384
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b _021E5ABC
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_021E5AB4:
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ldr r2, _021E5AE0 ; =0xFFFFFC72
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add r1, r1, r2
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_021E5ABC:
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bl ov4_021D7724
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mov r0, r4
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ldmia sp!, {r4, pc}
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; .align 2, 0
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_021E5AC8: .word 0xFFFE8130
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_021E5ACC: .word 0xFFFFFCD6
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_021E5AD0: .word 0xFFFFFCC2
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_021E5AD4: .word 0xFFFFFCAE
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_021E5AD8: .word 0xFFFFFC9A
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_021E5ADC: .word 0xFFFFFC86
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_021E5AE0: .word 0xFFFFFC72
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arm_func_end ov4_021E5988
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arm_func_start ov4_021E5AE4
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ov4_021E5AE4: ; 0x021E5AE4
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stmfd sp!, {r4, lr}
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mov r4, r0
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mov r0, #4
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mov r1, #0x1c
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bl DWC_Alloc
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movs ip, r0
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moveq r0, #0
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ldmeqia sp!, {r4, pc}
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ldmia r4, {r0, r1, r2, r3}
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stmia ip, {r0, r1, r2, r3}
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mov r0, #0
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str r0, [ip, #0x18]
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ldr r1, _021E5B3C ; =0x0221AE24
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str r0, [ip, #0x10]
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ldr r0, [r1, #0]
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cmp r0, #0
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moveq r0, ip
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streq ip, [r1]
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strne r0, [ip, #0x18]
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movne r0, ip
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strne ip, [r1]
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ldmia sp!, {r4, pc}
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; .align 2, 0
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_021E5B3C: .word Unk_ov4_0221AE24
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arm_func_end ov4_021E5AE4
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arm_func_start ov4_021E5B40
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ov4_021E5B40: ; 0x021E5B40
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stmfd sp!, {r4, lr}
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ldr r1, _021E5BC0 ; =0x0221AE24
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ldr r1, [r1, #0]
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cmp r1, #0
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ldmeqia sp!, {r4, pc}
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cmp r1, r0
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bne _021E5B78
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mov r0, #4
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mov r2, #0
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ldr r4, [r1, #0x18]
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bl DWC_Free
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ldr r0, _021E5BC0 ; =0x0221AE24
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str r4, [r0, #0]
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ldmia sp!, {r4, pc}
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_021E5B78:
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ldr r2, [r1, #0x18]
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cmp r2, #0
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ldmeqia sp!, {r4, pc}
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_021E5B84:
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cmp r2, r0
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movne r1, r2
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bne _021E5BB0
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ldr ip, [r1, #0x18]
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mov r0, #4
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ldr r3, [ip, #0x18]
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mov r2, #0
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str r3, [r1, #0x18]
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mov r1, ip
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bl DWC_Free
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ldmia sp!, {r4, pc}
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_021E5BB0:
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ldr r2, [r2, #0x18]
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cmp r2, #0
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bne _021E5B84
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ldmia sp!, {r4, pc}
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|
; .align 2, 0
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_021E5BC0: .word Unk_ov4_0221AE24
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arm_func_end ov4_021E5B40
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|
|
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arm_func_start ov4_021E5BC4
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ov4_021E5BC4: ; 0x021E5BC4
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stmfd sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
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|
ldr r0, _021E5C30 ; =0x0221AE24
|
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ldr r8, [r0]
|
|
cmp r8, #0
|
|
beq _021E5C20
|
|
mov r7, #4
|
|
mov r6, #0
|
|
mov r5, r7
|
|
mov r4, r6
|
|
_021E5BE8:
|
|
mov sb, r8
|
|
ldr r1, [sb, #0x10]
|
|
ldr r8, [r8, #0x18]
|
|
cmp r1, #0
|
|
beq _021E5C08
|
|
mov r0, r7
|
|
mov r2, r6
|
|
bl DWC_Free
|
|
_021E5C08:
|
|
mov r0, r5
|
|
mov r1, sb
|
|
mov r2, r4
|
|
bl DWC_Free
|
|
cmp r8, #0
|
|
bne _021E5BE8
|
|
_021E5C20:
|
|
ldr r0, _021E5C30 ; =0x0221AE24
|
|
mov r1, #0
|
|
str r1, [r0, #0]
|
|
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
|
|
; .align 2, 0
|
|
_021E5C30: .word Unk_ov4_0221AE24
|
|
arm_func_end ov4_021E5BC4
|
|
|
|
.bss
|
|
|
|
|
|
.global Unk_ov4_0221AE24
|
|
Unk_ov4_0221AE24: ; 0x0221AE24
|
|
.space 0x4
|
|
|
|
.global Unk_ov4_0221AE28
|
|
Unk_ov4_0221AE28: ; 0x0221AE28
|
|
.space 0x4
|
|
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