From 87d7b5e80ca12e721b399dc7a1bd36bd90f0ea3e Mon Sep 17 00:00:00 2001
From: Nomura <72407407+Nomura-RH@users.noreply.github.com>
Date: Sun, 1 Jan 2023 22:11:52 +0100
Subject: [PATCH] Match most files in overlay116

---
 asm/overlay116/ov116_02260440.inc |    6 -
 asm/overlay116/ov116_02260440.s   |  126 -
 asm/overlay116/ov116_022604C4.inc |  167 -
 asm/overlay116/ov116_022604C4.s   | 2365 ------------
 asm/overlay116/ov116_02262A44.inc |    2 -
 asm/overlay116/ov116_02262A44.s   |   56 -
 asm/overlay116/ov116_0226432C.inc |   75 -
 asm/overlay116/ov116_0226432C.s   | 5637 -----------------------------
 asm/overlay116/ov116_02266FEC.inc |   15 -
 asm/overlay116/ov116_02266FEC.s   |  809 -----
 asm/unk_020E0D24.s                |    3 +-
 asm/unk_020E1844.s                |    3 +-
 main.lsf                          |   10 +-
 src/overlay116/ov116_02260440.c   |  112 +
 src/overlay116/ov116_022604C4.c   | 1177 ++++++
 src/overlay116/ov116_02262A44.c   |   35 +
 src/overlay116/ov116_0226432C.c   | 2034 +++++++++++
 src/overlay116/ov116_02266FEC.c   |  107 +
 18 files changed, 3474 insertions(+), 9265 deletions(-)
 delete mode 100644 asm/overlay116/ov116_02260440.inc
 delete mode 100644 asm/overlay116/ov116_02260440.s
 delete mode 100644 asm/overlay116/ov116_022604C4.inc
 delete mode 100644 asm/overlay116/ov116_022604C4.s
 delete mode 100644 asm/overlay116/ov116_02262A44.inc
 delete mode 100644 asm/overlay116/ov116_02262A44.s
 delete mode 100644 asm/overlay116/ov116_0226432C.inc
 delete mode 100644 asm/overlay116/ov116_0226432C.s
 delete mode 100644 asm/overlay116/ov116_02266FEC.inc
 delete mode 100644 asm/overlay116/ov116_02266FEC.s
 create mode 100644 src/overlay116/ov116_02260440.c
 create mode 100644 src/overlay116/ov116_022604C4.c
 create mode 100644 src/overlay116/ov116_02262A44.c
 create mode 100644 src/overlay116/ov116_0226432C.c
 create mode 100644 src/overlay116/ov116_02266FEC.c

diff --git a/asm/overlay116/ov116_02260440.inc b/asm/overlay116/ov116_02260440.inc
deleted file mode 100644
index 117089ae18..0000000000
--- a/asm/overlay116/ov116_02260440.inc
+++ /dev/null
@@ -1,6 +0,0 @@
-.public sub_0201D2DC
-.public sub_02032798
-.public ov116_0226049C
-.public ov116_022604A4
-.public ov116_022617D4
-.public ov116_022617DC
diff --git a/asm/overlay116/ov116_02260440.s b/asm/overlay116/ov116_02260440.s
deleted file mode 100644
index 1c59323106..0000000000
--- a/asm/overlay116/ov116_02260440.s
+++ /dev/null
@@ -1,126 +0,0 @@
-	.include "macros/function.inc"
-	.include "overlay116/ov116_02260440.inc"
-
-	
-
-	.text
-
-
-	thumb_func_start ov116_02260440
-ov116_02260440: ; 0x02260440
-	push {r4, lr}
-	ldr r1, [r2, #0]
-	ldr r0, [r2, #4]
-	add r4, r3, #0
-	str r1, [r4, #0x14]
-	str r0, [r4, #0x18]
-	bl sub_0201D2DC
-	add r0, r4, #0
-	bl ov116_022617D4
-	pop {r4, pc}
-	thumb_func_end ov116_02260440
-
-	thumb_func_start ov116_02260458
-ov116_02260458: ; 0x02260458
-	add r0, r3, #0
-	ldr r3, _02260460 ; =ov116_022617DC
-	bx r3
-	nop
-_02260460: .word ov116_022617DC
-	thumb_func_end ov116_02260458
-
-	thumb_func_start ov116_02260464
-ov116_02260464: ; 0x02260464
-	ldr r1, [r3, #4]
-	lsl r0, r0, #2
-	add r1, r1, r0
-	ldr r2, [r2, #0]
-	ldr r0, _02260474 ; =0x00002B9C
-	str r2, [r1, r0]
-	bx lr
-	nop
-_02260474: .word 0x00002B9C
-	thumb_func_end ov116_02260464
-
-	thumb_func_start ov116_02260478
-ov116_02260478: ; 0x02260478
-	lsl r0, r0, #3
-	ldr r1, [r2, #0]
-	add r0, r3, r0
-	str r1, [r0, #0x24]
-	bx lr
-	; .align 2, 0
-	thumb_func_end ov116_02260478
-
-	thumb_func_start ov116_02260484
-ov116_02260484: ; 0x02260484
-	bx lr
-	; .align 2, 0
-	thumb_func_end ov116_02260484
-
-	thumb_func_start ov116_02260488
-ov116_02260488: ; 0x02260488
-	mov r0, #0
-	bx lr
-	thumb_func_end ov116_02260488
-
-	thumb_func_start ov116_0226048C
-ov116_0226048C: ; 0x0226048C
-	mov r0, #8
-	bx lr
-	thumb_func_end ov116_0226048C
-
-	thumb_func_start ov116_02260490
-ov116_02260490: ; 0x02260490
-	mov r0, #4
-	bx lr
-	thumb_func_end ov116_02260490
-
-	thumb_func_start ov116_02260494
-ov116_02260494: ; 0x02260494
-	mov r0, #8
-	bx lr
-	thumb_func_end ov116_02260494
-
-	thumb_func_start ov116_02260498
-ov116_02260498: ; 0x02260498
-	mov r0, #0x20
-	bx lr
-	thumb_func_end ov116_02260498
-
-	thumb_func_start ov116_0226049C
-ov116_0226049C: ; 0x0226049C
-	ldr r0, _022604A0 ; =0x02267740
-	bx lr
-	; .align 2, 0
-_022604A0: .word 0x02267740
-	thumb_func_end ov116_0226049C
-
-	thumb_func_start ov116_022604A4
-ov116_022604A4: ; 0x022604A4
-	mov r0, #5
-	bx lr
-	thumb_func_end ov116_022604A4
-
-	thumb_func_start ov116_022604A8
-ov116_022604A8: ; 0x022604A8
-	push {r3, r4, r5, lr}
-	add r5, r0, #0
-	bl ov116_0226049C
-	add r4, r0, #0
-	bl ov116_022604A4
-	add r1, r0, #0
-	add r0, r4, #0
-	add r2, r5, #0
-	bl sub_02032798
-	pop {r3, r4, r5, pc}
-	; .align 2, 0
-	thumb_func_end ov116_022604A8
-
-	.rodata
-
-
-	.global Unk_ov116_02267740
-Unk_ov116_02267740: ; 0x02267740
-	.incbin "incbin/overlay116_rodata.bin", 0x0, 0x3C
-
diff --git a/asm/overlay116/ov116_022604C4.inc b/asm/overlay116/ov116_022604C4.inc
deleted file mode 100644
index 5283d12439..0000000000
--- a/asm/overlay116/ov116_022604C4.inc
+++ /dev/null
@@ -1,167 +0,0 @@
-.public sub_02002F38
-.public sub_02002F54
-.public sub_02002F70
-.public sub_02002FA0
-.public sub_02002FBC
-.public sub_02003070
-.public sub_02003694
-.public sub_02003858
-.public sub_02005748
-.public sub_020057A4
-.public sub_020057D4
-.public sub_0200681C
-.public sub_0200682C
-.public sub_02006830
-.public sub_02006840
-.public sub_02006C24
-.public sub_02006CA8
-.public sub_0200964C
-.public sub_0200966C
-.public sub_02009704
-.public sub_0200C6E4
-.public sub_0200C704
-.public sub_0200C738
-.public sub_0200C73C
-.public sub_0200C7C0
-.public sub_0200C800
-.public sub_0200C8D4
-.public sub_0200CB30
-.public sub_0200D0B0
-.public sub_0200D33C
-.public sub_0200D370
-.public sub_0200D37C
-.public sub_0200D3E0
-.public sub_0200D3F4
-.public sub_0200D4C4
-.public sub_0200D9B0
-.public sub_0200F174
-.public sub_0200F2AC
-.public sub_0200F2C0
-.public sub_0200F370
-.public sub_02017164
-.public sub_020171A0
-.public sub_02017240
-.public sub_0201727C
-.public sub_02017348
-.public sub_02017798
-.public sub_020177A4
-.public sub_02017FC8
-.public sub_0201807C
-.public sub_020181C4
-.public sub_020182CC
-.public sub_02018340
-.public sub_02018368
-.public sub_020183C4
-.public sub_02019044
-.public sub_02019690
-.public sub_02019EBC
-.public sub_0201C2B8
-.public sub_0201D2D0
-.public sub_0201D2DC
-.public sub_0201DBEC
-.public sub_0201DC3C
-.public sub_0201DCAC
-.public sub_0201E3D8
-.public sub_0201E450
-.public sub_0201E530
-.public sub_0201FE94
-.public sub_0201FF00
-.public sub_0201FF0C
-.public sub_0201FF74
-.public sub_0201FFE8
-.public sub_020203AC
-.public sub_020203B8
-.public GF_AssertFail
-.public sub_02024220
-.public sub_020242C4
-.public sub_02032E64
-.public sub_02032EE8
-.public sub_020359DC
-.public sub_02035E18
-.public sub_0203608C
-.public sub_020364F0
-.public sub_02036540
-.public sub_020388F4
-.public sub_020394A8
-.public sub_02039734
-.public NNS_G2dGetUnpackedPaletteData
-.public MTX_MultVec43
-.public G2x_SetBlendAlpha_
-.public G3X_SetEdgeColorTable
-.public MIi_CpuClear32
-.public memset
-.public _f_add
-.public _f_ftoi
-.public _f_itof
-.public _f_sub
-.public _s32_div_f
-.public ov4_021D1E74
-.public ov4_021D1F18
-.public ov114_0225C700
-.public ov114_0225C820
-.public ov114_0225C838
-.public ov114_0225C8BC
-.public ov114_0225C8CC
-.public ov114_0225C8EC
-.public ov114_0225C904
-.public ov114_0225C9A0
-.public ov114_0225C9A4
-.public ov114_0225C9A8
-.public ov114_0225CA54
-.public ov114_0225CA98
-.public ov114_0225CAD4
-.public ov114_0225CB38
-.public ov114_0225CB8C
-.public ov114_0225CBB0
-.public ov114_0225CBE0
-.public ov116_022604A8
-.public ov116_022604C4
-.public ov116_02260A2C
-.public ov116_02260B6C
-.public ov116_022610FC
-.public ov116_02261244
-.public ov116_022612CC
-.public ov116_0226139C
-.public ov116_02261494
-.public ov116_022616CC
-.public ov116_02261768
-.public ov116_0226178C
-.public ov116_02261794
-.public ov116_022617C4
-.public ov116_022617E4
-.public ov116_022618A8
-.public ov116_022618B4
-.public ov116_0226192C
-.public ov116_02261940
-.public ov116_02261C88
-.public ov116_02261D08
-.public ov116_02261D70
-.public ov116_02261DF0
-.public ov116_02261E40
-.public ov116_02261F08
-.public ov116_02261F3C
-.public ov116_02261F70
-.public ov116_02262004
-.public ov116_02262034
-.public ov116_022620AC
-.public ov116_02262264
-.public ov116_022622C8
-.public ov116_022625A8
-.public ov116_02262724
-.public ov116_0226281C
-.public ov116_02262840
-.public ov116_022628AC
-.public ov116_022628B8
-.public ov116_02262A44
-.public ov116_02262A6C
-.public ov116_02262A74
-.public ov116_02262A8C
-.public ov116_02262C64
-.public ov116_02263B30
-.public ov116_0226432C
-.public ov116_0226452C
-.public ov116_02264680
-.public ov116_0226493C
-.public ov116_02265470
-.public ov116_02265A1C
-.public ov116_02266FEC
diff --git a/asm/overlay116/ov116_022604C4.s b/asm/overlay116/ov116_022604C4.s
deleted file mode 100644
index 5cb6e433ed..0000000000
--- a/asm/overlay116/ov116_022604C4.s
+++ /dev/null
@@ -1,2365 +0,0 @@
-	.include "macros/function.inc"
-	.include "overlay116/ov116_022604C4.inc"
-
-	
-
-	.text
-
-
-	thumb_func_start ov116_022604C4
-ov116_022604C4: ; 0x022604C4
-	push {r3, r4, r5, r6, r7, lr}
-	sub sp, #0xb8
-	add r5, r0, #0
-	bl sub_0201D2D0
-	add r1, r5, #0
-	add r1, #0x80
-	str r0, [r1, #0]
-	add r0, r5, #0
-	bl ov116_022612CC
-	ldr r0, _02260834 ; =ov116_02261794
-	add r1, r5, #0
-	bl sub_02017798
-	bl sub_020177A4
-	mov r0, #0x20
-	mov r1, #0x6a
-	bl sub_0201DBEC
-	ldr r1, _02260838 ; =0x00200010
-	mov r0, #1
-	bl sub_0200966C
-	mov r0, #1
-	bl sub_02009704
-	bl sub_02039734
-	mov r0, #0x6a
-	bl sub_020394A8
-	add r1, sp, #0x24
-	add r4, r0, #0
-	bl NNS_G2dGetUnpackedPaletteData
-	mov r0, #0x20
-	str r0, [sp]
-	ldr r1, [sp, #0x24]
-	ldr r0, [r5, #0x5c]
-	ldr r1, [r1, #0xc]
-	mov r2, #2
-	mov r3, #0xe0
-	bl sub_02002FBC
-	add r0, r4, #0
-	bl sub_020181C4
-	bl sub_02032E64
-	add r4, r0, #0
-	bl sub_0203608C
-	str r0, [r5, #0x44]
-	add r0, r5, #0
-	bl ov116_022604A8
-	add r0, r5, #0
-	bl ov116_022617C4
-	cmp r0, #1
-	bne _0226054E
-	add r1, r5, #0
-	add r0, r4, #0
-	add r1, #0x48
-	bl ov116_02262A44
-	str r0, [r5, #0]
-_0226054E:
-	add r2, r5, #0
-	ldr r1, [r5, #0x44]
-	add r0, r4, #0
-	add r2, #0x48
-	bl ov116_02262A8C
-	str r0, [r5, #4]
-	ldrb r2, [r5, #0x14]
-	ldr r1, _0226083C ; =0x00002BB4
-	str r2, [r0, r1]
-	add r0, r5, #0
-	add r0, #0x80
-	ldr r3, [r0, #0]
-	ldr r2, [r5, #4]
-	sub r0, r1, #4
-	str r3, [r2, r0]
-	bl sub_0201E3D8
-	mov r0, #4
-	bl sub_0201E450
-	add r0, r5, #0
-	bl ov116_022628B8
-	add r0, r5, #0
-	bl ov116_022622C8
-	ldr r1, [r5, #4]
-	add r0, r5, #0
-	bl ov116_022625A8
-	ldr r0, [r5, #4]
-	bl ov116_02261D70
-	ldr r0, [r5, #4]
-	bl ov116_02261D08
-	ldr r0, [r5, #4]
-	bl ov116_02262724
-	ldr r0, [r5, #4]
-	bl ov116_02262840
-	ldr r1, [r5, #0x44]
-	add r0, r5, #0
-	bl ov116_02264680
-	add r1, r0, #0
-	add r0, r5, #0
-	bl ov116_02262034
-	ldr r4, _02260840 ; =0x02267918
-	add r3, sp, #0x38
-	mov r2, #0x10
-_022605BA:
-	ldmia r4!, {r0, r1}
-	stmia r3!, {r0, r1}
-	sub r2, r2, #1
-	bne _022605BA
-	mov r0, #0
-	str r0, [sp, #0xc]
-	ldr r4, [sp, #0xc]
-	add r0, sp, #0x38
-	str r0, [sp, #8]
-	add r0, r5, #0
-	str r0, [sp, #0x10]
-	add r0, #0x6c
-	add r7, r4, #0
-	add r6, r4, #0
-	str r0, [sp, #0x10]
-_022605D8:
-	mov r0, #0xb5
-	ldr r2, [sp, #8]
-	ldr r1, [r5, #4]
-	lsl r0, r0, #4
-	add r0, r1, r0
-	ldr r1, [r5, #0x48]
-	ldr r2, [r2, #0]
-	add r0, r0, r4
-	bl ov116_022618A8
-	mov r0, #0xb5
-	ldr r1, [r5, #4]
-	lsl r0, r0, #4
-	add r0, r1, r0
-	ldrb r1, [r5, #0x14]
-	add r0, r0, r4
-	bl ov116_022618B4
-	ldr r1, [r5, #4]
-	mov r0, #0x6a
-	str r0, [sp]
-	ldr r0, [sp, #0x10]
-	ldr r2, _02260844 ; =0x00000BC8
-	str r0, [sp, #4]
-	ldr r0, _02260848 ; =0x00000BD8
-	ldr r3, [sp, #8]
-	add r0, r1, r0
-	add r1, r1, r2
-	ldr r2, [r5, #0x48]
-	ldr r3, [r3, #4]
-	add r0, r0, r4
-	add r1, r1, r4
-	bl sub_02017164
-	mov r0, #0xb5
-	ldr r1, [r5, #4]
-	lsl r0, r0, #4
-	add r0, r1, r0
-	ldr r2, _02260848 ; =0x00000BD8
-	add r0, r0, r4
-	add r1, r1, r2
-	add r1, r1, r4
-	bl sub_0201727C
-	ldr r1, [r5, #4]
-	ldr r0, _02260848 ; =0x00000BD8
-	add r0, r1, r0
-	add r0, r0, r4
-	mov r1, #0
-	bl sub_02017240
-	mov r0, #0xb5
-	ldr r1, [r5, #4]
-	lsl r0, r0, #4
-	add r0, r1, r0
-	add r0, r0, r4
-	mov r1, #0
-	bl sub_02017348
-	ldrb r0, [r5, #0x14]
-	ldr r1, [sp, #0xc]
-	cmp r0, #0
-	ldr r0, [sp, #0xc]
-	lsl r2, r1, #0x1f
-	lsr r0, r0, #0x1f
-	sub r2, r2, r0
-	mov r1, #0x1f
-	ror r2, r1
-	add r0, r0, r2
-	beq _022606A6
-	cmp r7, #0
-	ble _0226067A
-	add r0, r6, #0
-	bl _f_itof
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _02260688
-_0226067A:
-	add r0, r6, #0
-	bl _f_itof
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_02260688:
-	ldr r1, [r5, #4]
-	add r1, r1, r4
-	str r1, [sp, #0x14]
-	bl _f_ftoi
-	mov r1, #0xd3
-	ldr r2, [sp, #0x14]
-	lsl r1, r1, #4
-	ldr r1, [r2, r1]
-	add r2, r1, r0
-	mov r0, #0xd3
-	ldr r1, [sp, #0x14]
-	lsl r0, r0, #4
-	str r2, [r1, r0]
-	b _022606E6
-_022606A6:
-	cmp r7, #0
-	ble _022606BC
-	add r0, r6, #0
-	bl _f_itof
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _022606CA
-_022606BC:
-	add r0, r6, #0
-	bl _f_itof
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_022606CA:
-	ldr r1, [r5, #4]
-	add r1, r1, r4
-	str r1, [sp, #0x18]
-	bl _f_ftoi
-	mov r1, #0xd3
-	ldr r2, [sp, #0x18]
-	lsl r1, r1, #4
-	ldr r1, [r2, r1]
-	sub r2, r1, r0
-	mov r0, #0xd3
-	ldr r1, [sp, #0x18]
-	lsl r0, r0, #4
-	str r2, [r1, r0]
-_022606E6:
-	ldr r0, [sp, #0xc]
-	cmp r0, #8
-	bge _02260730
-	add r1, r0, #1
-	mov r0, #5
-	mul r0, r1
-	cmp r0, #0
-	ble _02260708
-	lsl r0, r0, #0xc
-	bl _f_itof
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _02260716
-_02260708:
-	lsl r0, r0, #0xc
-	bl _f_itof
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_02260716:
-	ldr r1, [r5, #4]
-	add r1, r1, r4
-	str r1, [sp, #0x1c]
-	bl _f_ftoi
-	ldr r2, [sp, #0x1c]
-	ldr r1, _0226084C ; =0x00000D38
-	ldr r1, [r2, r1]
-	add r2, r1, r0
-	ldr r1, [sp, #0x1c]
-	ldr r0, _0226084C ; =0x00000D38
-	str r2, [r1, r0]
-	b _0226076C
-_02260730:
-	cmp r7, #0
-	ble _02260746
-	add r0, r6, #0
-	bl _f_itof
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _02260754
-_02260746:
-	add r0, r6, #0
-	bl _f_itof
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_02260754:
-	ldr r1, [r5, #4]
-	add r1, r1, r4
-	str r1, [sp, #0x20]
-	bl _f_ftoi
-	ldr r2, [sp, #0x20]
-	ldr r1, _0226084C ; =0x00000D38
-	ldr r1, [r2, r1]
-	sub r2, r1, r0
-	ldr r1, [sp, #0x20]
-	ldr r0, _0226084C ; =0x00000D38
-	str r2, [r1, r0]
-_0226076C:
-	ldr r0, [sp, #8]
-	add r7, r7, #5
-	add r0, #8
-	str r0, [sp, #8]
-	mov r0, #0x83
-	lsl r0, r0, #2
-	add r4, r4, r0
-	mov r0, #5
-	lsl r0, r0, #0xc
-	add r6, r6, r0
-	ldr r0, [sp, #0xc]
-	add r0, r0, #1
-	str r0, [sp, #0xc]
-	cmp r0, #8
-	bge _0226078C
-	b _022605D8
-_0226078C:
-	ldr r1, [r5, #4]
-	ldr r0, _02260850 ; =0x00000944
-	mov r2, #0x47
-	add r0, r1, r0
-	ldr r1, [r5, #0x48]
-	bl ov116_022618A8
-	ldr r1, [r5, #4]
-	ldr r0, _02260850 ; =0x00000944
-	add r0, r1, r0
-	ldrb r1, [r5, #0x14]
-	bl ov116_022618B4
-	ldr r1, [r5, #4]
-	ldr r0, _02260850 ; =0x00000944
-	add r0, r1, r0
-	mov r1, #0
-	bl sub_02017348
-	ldr r3, _02260854 ; =0x022677A4
-	add r2, sp, #0x28
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	ldr r1, [r5, #0x44]
-	add r0, r5, #0
-	bl ov116_02264680
-	lsl r1, r0, #2
-	add r0, sp, #0x28
-	ldr r2, [r0, r1]
-	mov r0, #0x45
-	ldr r1, [r5, #4]
-	lsl r0, r0, #2
-	add r0, r1, r0
-	ldr r1, [r5, #0x48]
-	bl ov116_022618A8
-	mov r0, #0x45
-	ldr r1, [r5, #4]
-	lsl r0, r0, #2
-	add r0, r1, r0
-	ldrb r1, [r5, #0x14]
-	bl ov116_022618B4
-	mov r0, #0x32
-	ldr r1, [r5, #4]
-	lsl r0, r0, #4
-	add r0, r1, r0
-	ldr r1, [r5, #0x48]
-	mov r2, #0x33
-	bl ov116_022618A8
-	ldr r1, [r5, #4]
-	ldr r0, _02260858 ; =0x0000052C
-	mov r2, #0x39
-	add r0, r1, r0
-	ldr r1, [r5, #0x48]
-	bl ov116_022618A8
-	ldr r1, [r5, #4]
-	ldr r0, _0226085C ; =0x00000738
-	mov r2, #0x37
-	add r0, r1, r0
-	ldr r1, [r5, #0x48]
-	bl ov116_022618A8
-	mov r0, #0x32
-	ldr r1, [r5, #4]
-	lsl r0, r0, #4
-	add r0, r1, r0
-	ldrb r1, [r5, #0x14]
-	bl ov116_022618B4
-	ldr r1, [r5, #4]
-	ldr r0, _02260858 ; =0x0000052C
-	add r0, r1, r0
-	ldrb r1, [r5, #0x14]
-	bl ov116_022618B4
-	ldr r1, [r5, #4]
-	ldr r0, _0226085C ; =0x00000738
-	b _02260860
-	; .align 2, 0
-_02260834: .word ov116_02261794
-_02260838: .word 0x00200010
-_0226083C: .word 0x00002BB4
-_02260840: .word 0x02267918
-_02260844: .word 0x00000BC8
-_02260848: .word 0x00000BD8
-_0226084C: .word 0x00000D38
-_02260850: .word 0x00000944
-_02260854: .word 0x022677A4
-_02260858: .word 0x0000052C
-_0226085C: .word 0x00000738
-_02260860:
-	add r0, r1, r0
-	ldrb r1, [r5, #0x14]
-	bl ov116_022618B4
-	mov r6, #0x32
-	ldr r4, [r5, #4]
-	mov r0, #0x6a
-	str r0, [sp]
-	add r0, r5, #0
-	add r0, #0x6c
-	lsl r6, r6, #4
-	str r0, [sp, #4]
-	add r0, r4, r6
-	add r1, r4, r6
-	ldr r2, [r5, #0x48]
-	add r0, #0x88
-	add r1, #0x78
-	mov r3, #0x35
-	bl sub_02017164
-	add r0, r4, r6
-	add r1, r0, #0
-	add r1, #0x88
-	bl sub_0201727C
-	add r0, r4, r6
-	add r0, #0x88
-	mov r1, #0
-	bl sub_02017240
-	mov r0, #0x6a
-	str r0, [sp]
-	add r0, r5, #0
-	add r0, #0x6c
-	str r0, [sp, #4]
-	add r0, r4, r6
-	add r1, r4, r6
-	ldr r2, [r5, #0x48]
-	add r0, #0x9c
-	add r1, #0x78
-	mov r3, #0x34
-	bl sub_02017164
-	add r0, r4, r6
-	add r0, #0x9c
-	mov r1, #0
-	bl sub_02017240
-	mov r0, #0x6a
-	str r0, [sp]
-	add r0, r5, #0
-	add r0, #0x6c
-	str r0, [sp, #4]
-	add r0, r4, r6
-	add r1, r4, r6
-	ldr r2, [r5, #0x48]
-	add r0, #0xb0
-	add r1, #0x78
-	mov r3, #0x3a
-	bl sub_02017164
-	add r0, r4, r6
-	add r0, #0xb0
-	mov r1, #0
-	bl sub_02017240
-	ldr r4, [r5, #4]
-	mov r0, #0x6a
-	str r0, [sp]
-	add r0, r5, #0
-	ldr r6, _022609A0 ; =0x0000052C
-	add r0, #0x6c
-	str r0, [sp, #4]
-	add r0, r4, r6
-	add r1, r4, r6
-	ldr r2, [r5, #0x48]
-	add r0, #0x88
-	add r1, #0x78
-	mov r3, #0x38
-	bl sub_02017164
-	add r0, r4, r6
-	add r1, r0, #0
-	add r1, #0x88
-	bl sub_0201727C
-	add r0, r4, r6
-	add r0, #0x88
-	mov r1, #0
-	bl sub_02017240
-	ldr r4, [r5, #4]
-	mov r0, #0x6a
-	str r0, [sp]
-	add r0, r5, #0
-	ldr r6, _022609A4 ; =0x00000738
-	add r0, #0x6c
-	str r0, [sp, #4]
-	add r0, r4, r6
-	add r1, r4, r6
-	ldr r2, [r5, #0x48]
-	add r0, #0x88
-	add r1, #0x78
-	mov r3, #0x36
-	bl sub_02017164
-	add r0, r4, r6
-	add r1, r0, #0
-	add r1, #0x88
-	bl sub_0201727C
-	add r0, r4, r6
-	add r0, #0x88
-	mov r1, #0
-	bl sub_02017240
-	ldrb r0, [r5, #0x14]
-	cmp r0, #0
-	beq _0226096C
-	mov r1, #0xbe
-	ldr r0, _022609A8 ; =0xFFFF8000
-	ldr r2, [r5, #4]
-	lsl r1, r1, #2
-	str r0, [r2, r1]
-	ldr r2, [r5, #4]
-	ldr r1, _022609AC ; =0x00000504
-	str r0, [r2, r1]
-	add r1, r6, #0
-	ldr r2, [r5, #4]
-	sub r1, #0x28
-	str r0, [r2, r1]
-	ldr r2, [r5, #4]
-	ldr r1, _022609B0 ; =0x0000091C
-	str r0, [r2, r1]
-_0226096C:
-	ldr r0, [r5, #0x54]
-	bl sub_0200D9B0
-	mov r1, #0x6a
-	bl ov114_0225CAD4
-	add r1, r5, #0
-	add r1, #0x84
-	str r0, [r1, #0]
-	mov r1, #2
-	ldr r0, [r5, #0x5c]
-	mov r2, #0
-	lsl r3, r1, #8
-	bl sub_02003070
-	add r5, #0x88
-	ldr r0, [r5, #0]
-	ldr r0, [r0, #0x3c]
-	cmp r0, #0
-	beq _0226099A
-	mov r0, #0x6a
-	bl ov4_021D1E74
-_0226099A:
-	add sp, #0xb8
-	pop {r3, r4, r5, r6, r7, pc}
-	nop
-_022609A0: .word 0x0000052C
-_022609A4: .word 0x00000738
-_022609A8: .word 0xFFFF8000
-_022609AC: .word 0x00000504
-_022609B0: .word 0x0000091C
-	thumb_func_end ov116_022604C4
-
-	thumb_func_start ov116_022609B4
-ov116_022609B4: ; 0x022609B4
-	push {r3, r4, r5, r6, r7, lr}
-	sub sp, #8
-	mov r2, #0x65
-	add r4, r0, #0
-	mov r0, #3
-	mov r1, #0x6a
-	lsl r2, r2, #0xc
-	bl sub_02017FC8
-	add r0, r4, #0
-	mov r1, #0xd0
-	mov r2, #0x6a
-	bl sub_0200681C
-	mov r1, #0
-	mov r2, #0xd0
-	str r0, [sp, #4]
-	bl memset
-	add r0, r4, #0
-	bl sub_02006840
-	ldr r1, [sp, #4]
-	ldr r6, [sp, #4]
-	add r1, #0x88
-	str r0, [r1, #0]
-	mov r4, #0
-	add r5, r6, #0
-	mov r7, #0xff
-_022609EE:
-	add r0, r6, #0
-	add r0, #0xbc
-	str r7, [r0, #0]
-	add r0, r4, #0
-	bl sub_02032EE8
-	cmp r0, #0
-	beq _02260A06
-	add r0, r5, #0
-	add r0, #0xbc
-	str r4, [r0, #0]
-	add r5, r5, #4
-_02260A06:
-	add r4, r4, #1
-	add r6, r6, #4
-	cmp r4, #4
-	blt _022609EE
-	ldr r0, [sp, #4]
-	add r0, #0x88
-	ldr r3, [r0, #0]
-	ldr r0, [sp, #4]
-	str r3, [sp]
-	ldr r1, [r3, #0x38]
-	ldr r2, [r3, #0x34]
-	add r0, #0x8c
-	ldr r3, [r3, #0x3c]
-	str r0, [sp, #4]
-	bl ov114_0225C700
-	mov r0, #1
-	add sp, #8
-	pop {r3, r4, r5, r6, r7, pc}
-	thumb_func_end ov116_022609B4
-
-	thumb_func_start ov116_02260A2C
-ov116_02260A2C: ; 0x02260A2C
-	push {r4, r5, r6, r7, lr}
-	sub sp, #0x24
-	add r4, r1, #0
-	add r5, r0, #0
-	add r6, r2, #0
-	cmp r4, #0
-	bne _02260AC6
-	cmp r6, #0
-	bne _02260AC6
-	ldr r3, _02260B48 ; =0x00001FD4
-	mov r0, #0
-	mov r2, #0xc3
-	str r0, [r5, r3]
-	add r1, r3, #4
-	lsl r2, r2, #2
-	str r0, [r5, r1]
-	ldr r1, [r5, r2]
-	cmp r1, #0
-	beq _02260A82
-	mov r0, #0x45
-	lsl r0, r0, #2
-	mov r1, #0xfe
-	add r0, r5, r0
-	lsl r1, r1, #0x16
-	bl ov116_0226452C
-	ldr r4, _02260B4C ; =0x02267788
-	add r3, sp, #0x18
-	ldmia r4!, {r0, r1}
-	add r2, r3, #0
-	stmia r3!, {r0, r1}
-	ldr r0, [r4, #0]
-	mov r1, #0x4d
-	str r0, [r3, #0]
-	add r0, r2, #0
-	ldr r2, _02260B50 ; =0x00001FC8
-	lsl r1, r1, #4
-	add r1, r5, r1
-	add r2, r5, r2
-	bl MTX_MultVec43
-	add sp, #0x24
-	pop {r4, r5, r6, r7, pc}
-_02260A82:
-	add r1, r2, #4
-	str r0, [r5, r1]
-	add r2, #8
-	str r0, [r5, r2]
-	add r1, r3, #4
-	ldr r2, [r5, r1]
-	ldr r1, [r5, r3]
-	ldr r3, _02260B54 ; =0x3FF0A3D7
-	str r2, [sp]
-	str r3, [sp, #4]
-	str r0, [sp, #8]
-	mov r0, #0x45
-	lsl r0, r0, #2
-	add r0, r5, r0
-	add r3, r1, #0
-	bl ov116_0226432C
-	ldr r0, _02260B58 ; =0x00001FD8
-	ldr r2, [r5, r0]
-	sub r0, r0, #4
-	ldr r1, [r5, r0]
-	ldr r0, _02260B5C ; =0x3E6147AE
-	str r2, [sp]
-	str r0, [sp, #4]
-	mov r0, #0
-	str r0, [sp, #8]
-	mov r0, #0x32
-	lsl r0, r0, #4
-	add r0, r5, r0
-	add r3, r1, #0
-	bl ov116_0226432C
-	add sp, #0x24
-	pop {r4, r5, r6, r7, pc}
-_02260AC6:
-	ldr r0, _02260B60 ; =0x00001FCC
-	mov r1, #0x28
-	ldr r0, [r5, r0]
-	asr r7, r0, #0xc
-	mov r0, #0x64
-	sub r0, r0, r7
-	bl _s32_div_f
-	bl _f_itof
-	ldr r0, _02260B48 ; =0x00001FD4
-	cmp r7, #0x5f
-	ldr r1, [r5, r0]
-	cmp r1, #0
-	bne _02260AEA
-	str r4, [r5, r0]
-	add r0, r0, #4
-	str r6, [r5, r0]
-_02260AEA:
-	ldr r3, _02260B58 ; =0x00001FD8
-	add r1, r4, #0
-	ldr r0, [r5, r3]
-	sub r3, r3, #4
-	str r0, [sp]
-	mov r0, #1
-	lsl r0, r0, #0x1e
-	str r0, [sp, #4]
-	mov r0, #1
-	str r0, [sp, #8]
-	mov r0, #0x45
-	lsl r0, r0, #2
-	ldr r3, [r5, r3]
-	add r0, r5, r0
-	add r2, r6, #0
-	bl ov116_0226432C
-	ldr r3, _02260B64 ; =0x0226777C
-	add r2, sp, #0xc
-	ldmia r3!, {r0, r1}
-	add r7, r2, #0
-	stmia r2!, {r0, r1}
-	ldr r0, [r3, #0]
-	mov r1, #0x4d
-	str r0, [r2, #0]
-	ldr r2, _02260B50 ; =0x00001FC8
-	lsl r1, r1, #4
-	add r0, r7, #0
-	add r1, r5, r1
-	add r2, r5, r2
-	bl MTX_MultVec43
-	ldr r0, _02260B68 ; =0x00000572
-	bl sub_020057D4
-	cmp r0, #0
-	bne _02260B3A
-	ldr r0, _02260B68 ; =0x00000572
-	bl sub_02005748
-_02260B3A:
-	ldr r0, _02260B48 ; =0x00001FD4
-	str r4, [r5, r0]
-	add r0, r0, #4
-	str r6, [r5, r0]
-	add sp, #0x24
-	pop {r4, r5, r6, r7, pc}
-	nop
-_02260B48: .word 0x00001FD4
-_02260B4C: .word 0x02267788
-_02260B50: .word 0x00001FC8
-_02260B54: .word 0x3FF0A3D7
-_02260B58: .word 0x00001FD8
-_02260B5C: .word 0x3E6147AE
-_02260B60: .word 0x00001FCC
-_02260B64: .word 0x0226777C
-_02260B68: .word 0x00000572
-	thumb_func_end ov116_02260A2C
-
-	thumb_func_start ov116_02260B6C
-ov116_02260B6C: ; 0x02260B6C
-	push {r4, r5, r6, r7, lr}
-	sub sp, #0xcc
-	ldr r3, _02260CEC ; =0x02267998
-	add r5, r0, #0
-	add r2, sp, #0xc
-	mov r1, #0x60
-_02260B78:
-	ldrh r0, [r3]
-	add r3, r3, #2
-	strh r0, [r2]
-	add r2, r2, #2
-	sub r1, r1, #1
-	bne _02260B78
-	add r0, r5, #0
-	add r0, #0xf0
-	ldr r0, [r0, #0]
-	bl sub_0200D3E0
-	add r7, r0, #0
-	ldr r1, [r5, #0xc]
-	mov r0, #0xc
-	mul r0, r1
-	add r0, r7, r0
-	lsl r1, r0, #2
-	add r0, sp, #0xc
-	ldrsh r4, [r0, r1]
-	add r0, sp, #0xc
-	add r0, #2
-	ldrsh r6, [r0, r1]
-	cmp r4, #0
-	bne _02260BB8
-	cmp r6, #0
-	bne _02260BB8
-	mov r1, #0
-	add r0, r5, #0
-	add r2, r1, #0
-	bl ov116_02260A2C
-	b _02260BF0
-_02260BB8:
-	add r1, r4, #0
-	add r2, r6, #0
-	add r0, r5, #0
-	add r1, #0x80
-	add r2, #0x80
-	bl ov116_02260A2C
-	cmp r4, #0
-	beq _02260BDE
-	add r4, #0x58
-	add r6, #0x80
-	lsl r1, r4, #0x10
-	lsl r2, r6, #0x10
-	add r0, r5, #0
-	asr r1, r1, #0x10
-	asr r2, r2, #0x10
-	bl ov116_0226493C
-	b _02260BF0
-_02260BDE:
-	add r4, #0x80
-	add r6, #0x80
-	lsl r1, r4, #0x10
-	lsl r2, r6, #0x10
-	add r0, r5, #0
-	asr r1, r1, #0x10
-	asr r2, r2, #0x10
-	bl ov116_0226493C
-_02260BF0:
-	cmp r7, #0
-	bne _02260C00
-	ldr r0, [r5, #8]
-	cmp r0, r7
-	beq _02260C00
-	ldr r0, [r5, #0xc]
-	add r0, r0, #1
-	str r0, [r5, #0xc]
-_02260C00:
-	str r7, [r5, #8]
-	ldr r0, [r5, #0xc]
-	cmp r0, #2
-	bne _02260C76
-	add r0, r5, #0
-	add r0, #0xf0
-	ldr r0, [r0, #0]
-	bl sub_0200D37C
-	cmp r0, #2
-	beq _02260C76
-	add r0, r5, #0
-	add r0, #0xf0
-	ldr r0, [r0, #0]
-	mov r1, #0x80
-	mov r2, #0x64
-	bl sub_0200D4C4
-	add r0, r5, #0
-	add r0, #0xf0
-	ldr r0, [r0, #0]
-	mov r1, #2
-	bl sub_0200D370
-	mov r0, #0xa9
-	lsl r0, r0, #2
-	add r0, r5, r0
-	bl ov116_02266FEC
-	mov r0, #0xad
-	lsl r0, r0, #2
-	add r0, r5, r0
-	bl ov116_02266FEC
-	mov r3, #5
-	mov r1, #0
-	ldr r0, _02260CF0 ; =0x3F4CCCCD
-	str r3, [sp]
-	str r0, [sp, #4]
-	mov r0, #0x45
-	lsl r0, r0, #2
-	add r0, r5, r0
-	add r2, r1, #0
-	str r1, [sp, #8]
-	bl ov116_0226432C
-	mov r3, #4
-	mvn r3, r3
-	mov r1, #0
-	ldr r0, _02260CF0 ; =0x3F4CCCCD
-	str r3, [sp]
-	str r0, [sp, #4]
-	mov r0, #0x45
-	lsl r0, r0, #2
-	add r0, r5, r0
-	add r2, r1, #0
-	str r1, [sp, #8]
-	bl ov116_0226432C
-_02260C76:
-	ldr r0, [r5, #0xc]
-	cmp r0, #3
-	bne _02260CDC
-	cmp r7, #0xb
-	bne _02260CDC
-	mov r1, #0
-	str r1, [r5, #8]
-	add r0, r5, #0
-	str r1, [r5, #0xc]
-	add r0, #0xf0
-	ldr r0, [r0, #0]
-	bl sub_0200D3F4
-	mov r0, #0xa9
-	lsl r0, r0, #2
-	add r0, r5, r0
-	bl ov116_02266FEC
-	mov r0, #0xad
-	lsl r0, r0, #2
-	add r0, r5, r0
-	bl ov116_02266FEC
-	mov r3, #5
-	mov r1, #0
-	ldr r0, _02260CF0 ; =0x3F4CCCCD
-	str r3, [sp]
-	str r0, [sp, #4]
-	mov r0, #0x45
-	lsl r0, r0, #2
-	add r0, r5, r0
-	add r2, r1, #0
-	str r1, [sp, #8]
-	bl ov116_0226432C
-	mov r3, #4
-	mvn r3, r3
-	mov r1, #0
-	ldr r0, _02260CF0 ; =0x3F4CCCCD
-	str r3, [sp]
-	str r0, [sp, #4]
-	mov r0, #0x45
-	lsl r0, r0, #2
-	add r0, r5, r0
-	add r2, r1, #0
-	str r1, [sp, #8]
-	bl ov116_0226432C
-	add sp, #0xcc
-	mov r0, #1
-	pop {r4, r5, r6, r7, pc}
-_02260CDC:
-	add r5, #0xf0
-	ldr r0, [r5, #0]
-	bl sub_0200D33C
-	mov r0, #0
-	add sp, #0xcc
-	pop {r4, r5, r6, r7, pc}
-	nop
-_02260CEC: .word 0x02267998
-_02260CF0: .word 0x3F4CCCCD
-	thumb_func_end ov116_02260B6C
-
-	thumb_func_start ov116_02260CF4
-ov116_02260CF4: ; 0x02260CF4
-	push {r3, r4, r5, r6, r7, lr}
-	add r7, r1, #0
-	bl sub_0200682C
-	add r4, r0, #0
-	bl ov116_022617E4
-	cmp r0, #0
-	beq _02260D18
-	cmp r0, #1
-	beq _02260D10
-	cmp r0, #2
-	beq _02260D14
-	b _02260D18
-_02260D10:
-	mov r0, #0
-	pop {r3, r4, r5, r6, r7, pc}
-_02260D14:
-	mov r0, #1
-	pop {r3, r4, r5, r6, r7, pc}
-_02260D18:
-	ldr r0, [r7, #0]
-	cmp r0, #0x14
-	bls _02260D20
-	b _022610B8
-_02260D20:
-	add r0, r0, r0
-	add r0, pc
-	ldrh r0, [r0, #6]
-	lsl r0, r0, #0x10
-	asr r0, r0, #0x10
-	add pc, r0
-_02260D2C: ; jump table
-	.short _02260D56 - _02260D2C - 2 ; case 0
-	.short _02260D74 - _02260D2C - 2 ; case 1
-	.short _02260D8C - _02260D2C - 2 ; case 2
-	.short _02260DBE - _02260D2C - 2 ; case 3
-	.short _02260DDC - _02260D2C - 2 ; case 4
-	.short _02260DEE - _02260D2C - 2 ; case 5
-	.short _02260E0E - _02260D2C - 2 ; case 6
-	.short _02260E44 - _02260D2C - 2 ; case 7
-	.short _02260E52 - _02260D2C - 2 ; case 8
-	.short _02260E6A - _02260D2C - 2 ; case 9
-	.short _02260E92 - _02260D2C - 2 ; case 10
-	.short _02260EE6 - _02260D2C - 2 ; case 11
-	.short _02260F0E - _02260D2C - 2 ; case 12
-	.short _02260F26 - _02260D2C - 2 ; case 13
-	.short _02260F68 - _02260D2C - 2 ; case 14
-	.short _02260F96 - _02260D2C - 2 ; case 15
-	.short _02260FAA - _02260D2C - 2 ; case 16
-	.short _02260FC6 - _02260D2C - 2 ; case 17
-	.short _0226102A - _02260D2C - 2 ; case 18
-	.short _02261094 - _02260D2C - 2 ; case 19
-	.short _022610B8 - _02260D2C - 2 ; case 20
-_02260D56:
-	add r0, r4, #0
-	add r0, #0x8c
-	mov r1, #0x6a
-	bl ov114_0225C820
-	add r1, r4, #0
-	add r1, #0x9c
-	str r0, [r1, #0]
-	mov r1, #1
-	add r0, r4, #0
-	add r2, r1, #0
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02260D74:
-	add r0, r4, #0
-	add r0, #0x9c
-	ldr r0, [r0, #0]
-	bl ov114_0225C8BC
-	add r1, r0, #0
-	add r0, r4, #0
-	mov r2, #2
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02260D8C:
-	add r0, r4, #0
-	add r0, #0x9c
-	ldr r0, [r0, #0]
-	bl ov114_0225C8CC
-	strb r0, [r4, #0x14]
-	add r0, r4, #0
-	add r0, #0x9c
-	ldr r0, [r0, #0]
-	bl ov114_0225C838
-	add r0, r4, #0
-	mov r1, #0
-	add r0, #0x9c
-	str r1, [r0, #0]
-	add r0, r4, #0
-	bl ov116_022604C4
-	add r0, r4, #0
-	mov r1, #1
-	mov r2, #3
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02260DBE:
-	mov r0, #0x1b
-	bl ov116_02261768
-	add r5, r0, #0
-	ldr r1, [r4, #4]
-	add r0, r4, #0
-	bl ov116_022620AC
-	add r0, r4, #0
-	add r1, r5, #0
-	mov r2, #4
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02260DDC:
-	bl sub_0200F2AC
-	add r1, r0, #0
-	add r0, r4, #0
-	mov r2, #5
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02260DEE:
-	ldr r0, [r4, #4]
-	bl ov116_02261F70
-	ldr r0, [r4, #4]
-	bl ov116_02265470
-	ldr r0, [r4, #4]
-	bl ov116_02265A1C
-	add r0, r4, #0
-	mov r1, #1
-	mov r2, #6
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02260E0E:
-	ldr r0, [r4, #4]
-	bl ov116_02260B6C
-	add r5, r0, #0
-	beq _02260E36
-	add r0, r4, #0
-	bl ov116_022617C4
-	cmp r0, #1
-	bne _02260E36
-	add r0, r4, #0
-	add r0, #0x80
-	ldr r0, [r0, #0]
-	add r1, r4, #0
-	str r0, [r4, #0x18]
-	mov r0, #0x16
-	add r1, #0x14
-	mov r2, #8
-	bl sub_020359DC
-_02260E36:
-	add r0, r4, #0
-	add r1, r5, #0
-	mov r2, #7
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02260E44:
-	ldr r1, [r4, #8]
-	add r0, r4, #0
-	mov r2, #8
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02260E52:
-	add r0, r4, #0
-	add r0, #0x84
-	ldr r0, [r0, #0]
-	bl ov114_0225CB8C
-	add r0, r4, #0
-	mov r1, #1
-	mov r2, #9
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02260E6A:
-	add r0, r4, #0
-	add r0, #0x84
-	ldr r0, [r0, #0]
-	bl ov114_0225CBE0
-	add r5, r0, #0
-	beq _02260E84
-	ldr r0, [r4, #4]
-	bl ov116_02262264
-	ldr r0, [r4, #4]
-	bl ov116_02262004
-_02260E84:
-	add r0, r4, #0
-	add r1, r5, #0
-	mov r2, #0xa
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02260E92:
-	ldr r5, [r4, #0xc]
-	cmp r5, #0
-	beq _02260EA8
-	ldr r1, [r4, #4]
-	ldr r0, _022610E4 ; =0x00002AE4
-	ldr r1, [r1, r0]
-	mov r0, #0x4b
-	lsl r0, r0, #4
-	cmp r1, r0
-	bge _02260EA8
-	mov r5, #0
-_02260EA8:
-	cmp r5, #0
-	bne _02260ED8
-	add r0, r4, #0
-	bl ov116_022617C4
-	cmp r0, #1
-	bne _02260ED2
-	ldr r0, [r4, #0]
-	bl ov116_02262A74
-	cmp r0, #0
-	bne _02260ED2
-	ldr r0, _022610E8 ; =0x00000571
-	mov r1, #0
-	bl sub_020057A4
-	mov r1, #0
-	mov r0, #0x17
-	add r2, r1, #0
-	bl sub_020359DC
-_02260ED2:
-	ldr r0, [r4, #4]
-	bl ov116_02263B30
-_02260ED8:
-	add r0, r4, #0
-	add r1, r5, #0
-	mov r2, #0xb
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02260EE6:
-	ldr r0, _022610EC ; =0x00000573
-	mov r1, #0
-	bl sub_020057A4
-	ldr r0, _022610E8 ; =0x00000571
-	mov r1, #0
-	bl sub_020057A4
-	add r0, r4, #0
-	add r0, #0x84
-	ldr r0, [r0, #0]
-	bl ov114_0225CBB0
-	add r0, r4, #0
-	mov r1, #1
-	mov r2, #0xc
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02260F0E:
-	add r0, r4, #0
-	add r0, #0x84
-	ldr r0, [r0, #0]
-	bl ov114_0225CBE0
-	add r1, r0, #0
-	add r0, r4, #0
-	mov r2, #0xd
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02260F26:
-	ldr r1, [r4, #4]
-	ldr r0, _022610F0 ; =0x00002AF0
-	ldr r0, [r1, r0]
-	mov r1, #0xa
-	bl _s32_div_f
-	mov r1, #0x64
-	mul r1, r0
-	ldr r0, _022610F4 ; =0x000186A0
-	str r1, [r4, #0x1c]
-	cmp r1, r0
-	blo _02260F40
-	str r0, [r4, #0x1c]
-_02260F40:
-	ldr r1, [r4, #4]
-	ldr r0, _022610F8 ; =0x00002B94
-	ldr r0, [r1, r0]
-	cmp r0, #0
-	bne _02260F4E
-	mov r0, #1
-	str r0, [r4, #0x1c]
-_02260F4E:
-	add r1, r4, #0
-	mov r0, #0x19
-	add r1, #0x1c
-	mov r2, #8
-	bl sub_020359DC
-	add r0, r4, #0
-	mov r1, #1
-	mov r2, #0xe
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02260F68:
-	mov r1, #0
-	add r0, r1, #0
-	add r3, r1, #0
-	add r5, r4, #0
-_02260F70:
-	ldr r2, [r5, #0x24]
-	cmp r2, #0
-	beq _02260F78
-	add r0, r0, #1
-_02260F78:
-	add r3, r3, #1
-	add r5, #8
-	cmp r3, #4
-	blt _02260F70
-	ldr r2, [r4, #4]
-	ldr r2, [r2, #4]
-	cmp r0, r2
-	bne _02260F8A
-	mov r1, #1
-_02260F8A:
-	add r0, r4, #0
-	mov r2, #0xf
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02260F96:
-	mov r0, #0x1a
-	bl ov116_02261768
-	add r1, r0, #0
-	add r0, r4, #0
-	mov r2, #0x10
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02260FAA:
-	bl sub_0200F2AC
-	add r5, r0, #0
-	beq _02260FB8
-	add r0, r4, #0
-	bl ov116_022610FC
-_02260FB8:
-	add r0, r4, #0
-	add r1, r5, #0
-	mov r2, #0x11
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02260FC6:
-	mov r6, #0
-	add r5, r4, #0
-_02260FCA:
-	add r0, r4, #0
-	add r1, r6, #0
-	bl ov116_02264680
-	cmp r0, #0xff
-	beq _02260FF2
-	lsl r0, r0, #2
-	add r1, r4, r0
-	ldr r2, [r5, #0x24]
-	add r1, #0xa0
-	str r2, [r1, #0]
-	add r1, r4, r0
-	add r1, #0xa0
-	ldr r1, [r1, #0]
-	cmp r1, #1
-	bhi _02260FF2
-	add r1, r4, r0
-	add r1, #0xa0
-	mov r0, #0
-	str r0, [r1, #0]
-_02260FF2:
-	add r6, r6, #1
-	add r5, #8
-	cmp r6, #4
-	blt _02260FCA
-	add r1, r4, #0
-	add r1, #0x94
-	ldrb r1, [r1]
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov114_0225C9A8
-	add r0, r4, #0
-	add r1, r4, #0
-	add r0, #0x8c
-	add r1, #0xa0
-	mov r2, #0x6a
-	bl ov114_0225C8EC
-	add r1, r4, #0
-	add r1, #0xb8
-	str r0, [r1, #0]
-	add r0, r4, #0
-	mov r1, #1
-	mov r2, #0x12
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_0226102A:
-	add r0, r4, #0
-	add r0, #0xb8
-	ldr r0, [r0, #0]
-	bl ov114_0225C9A0
-	add r5, r0, #0
-	beq _02261086
-	add r0, r4, #0
-	add r0, #0xb8
-	ldr r0, [r0, #0]
-	bl ov114_0225C9A4
-	add r6, r0, #0
-	add r0, r4, #0
-	add r0, #0xb8
-	ldr r0, [r0, #0]
-	bl ov114_0225C904
-	add r0, r4, #0
-	mov r1, #0
-	add r0, #0xb8
-	str r1, [r0, #0]
-	cmp r6, #0
-	beq _02261086
-	add r0, r4, #0
-	mov r1, #1
-	add r0, #0xcc
-	str r1, [r0, #0]
-	add r0, r4, #0
-	bl ov116_02261244
-	add r0, r4, #0
-	add r1, r5, #0
-	mov r2, #0
-	add r3, r7, #0
-	bl ov116_0226178C
-	add r0, r4, #0
-	add r0, #0x88
-	ldr r0, [r0, #0]
-	ldr r0, [r0, #0x3c]
-	cmp r0, #0
-	beq _022610CA
-	bl ov4_021D1F18
-	b _022610CA
-_02261086:
-	add r0, r4, #0
-	add r1, r5, #0
-	mov r2, #0x13
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_02261094:
-	mov r0, #0x1b
-	bl sub_020364F0
-	add r0, r4, #0
-	add r0, #0x88
-	ldr r0, [r0, #0]
-	ldr r0, [r0, #0x3c]
-	cmp r0, #0
-	beq _022610AA
-	bl ov4_021D1F18
-_022610AA:
-	add r0, r4, #0
-	mov r1, #1
-	mov r2, #0x14
-	add r3, r7, #0
-	bl ov116_0226178C
-	b _022610CA
-_022610B8:
-	mov r0, #0x1b
-	bl sub_02036540
-	cmp r0, #1
-	bne _022610C6
-	mov r0, #1
-	pop {r3, r4, r5, r6, r7, pc}
-_022610C6:
-	mov r0, #0
-	pop {r3, r4, r5, r6, r7, pc}
-_022610CA:
-	ldr r0, [r7, #0]
-	cmp r0, #3
-	blt _022610E0
-	cmp r0, #0x10
-	bge _022610E0
-	ldr r0, [r4, #4]
-	bl ov116_02261F08
-	add r0, r4, #0
-	bl ov116_02261940
-_022610E0:
-	mov r0, #0
-	pop {r3, r4, r5, r6, r7, pc}
-	; .align 2, 0
-_022610E4: .word 0x00002AE4
-_022610E8: .word 0x00000571
-_022610EC: .word 0x00000573
-_022610F0: .word 0x00002AF0
-_022610F4: .word 0x000186A0
-_022610F8: .word 0x00002B94
-	thumb_func_end ov116_02260CF4
-
-	thumb_func_start ov116_022610FC
-ov116_022610FC: ; 0x022610FC
-	push {r3, r4, r5, r6, r7, lr}
-	add r5, r0, #0
-	mov r0, #0
-	add r1, r0, #0
-	bl sub_02017798
-	bl sub_020177A4
-	bl sub_0201DC3C
-	bl sub_0201E530
-	add r0, r5, #0
-	add r0, #0x80
-	ldr r0, [r0, #0]
-	bl sub_0201D2DC
-	ldr r0, [r5, #4]
-	bl ov116_02261F3C
-	ldr r0, [r5, #4]
-	bl ov116_02261DF0
-	ldr r0, [r5, #4]
-	bl ov116_02261E40
-	ldr r0, [r5, #4]
-	bl ov116_0226281C
-	ldr r0, [r5, #4]
-	bl ov116_022628AC
-	mov r0, #0x45
-	ldr r1, [r5, #4]
-	lsl r0, r0, #2
-	add r0, r1, r0
-	bl ov116_0226192C
-	mov r0, #0x32
-	ldr r1, [r5, #4]
-	lsl r0, r0, #4
-	add r0, r1, r0
-	bl ov116_0226192C
-	ldr r1, [r5, #4]
-	ldr r0, _0226122C ; =0x0000052C
-	add r0, r1, r0
-	bl ov116_0226192C
-	ldr r1, [r5, #4]
-	ldr r0, _02261230 ; =0x00000738
-	add r0, r1, r0
-	bl ov116_0226192C
-	ldr r1, [r5, #4]
-	ldr r0, _02261234 ; =0x00000944
-	add r0, r1, r0
-	bl ov116_0226192C
-	mov r0, #0xea
-	ldr r1, [r5, #4]
-	lsl r0, r0, #2
-	add r0, r1, r0
-	add r1, r5, #0
-	add r1, #0x6c
-	bl sub_020171A0
-	mov r0, #0xef
-	ldr r1, [r5, #4]
-	lsl r0, r0, #2
-	add r0, r1, r0
-	add r1, r5, #0
-	add r1, #0x6c
-	bl sub_020171A0
-	mov r0, #0x3d
-	ldr r1, [r5, #4]
-	lsl r0, r0, #4
-	add r0, r1, r0
-	add r1, r5, #0
-	add r1, #0x6c
-	bl sub_020171A0
-	ldr r1, [r5, #4]
-	ldr r0, _02261238 ; =0x000005B4
-	add r0, r1, r0
-	add r1, r5, #0
-	add r1, #0x6c
-	bl sub_020171A0
-	mov r0, #0x1f
-	ldr r1, [r5, #4]
-	lsl r0, r0, #6
-	add r0, r1, r0
-	add r1, r5, #0
-	add r1, #0x6c
-	bl sub_020171A0
-	mov r7, #0
-	add r6, r5, #0
-	add r4, r7, #0
-	add r6, #0x6c
-_022611C8:
-	mov r0, #0xb5
-	ldr r1, [r5, #4]
-	lsl r0, r0, #4
-	add r0, r1, r0
-	add r0, r0, r4
-	bl ov116_0226192C
-	ldr r1, [r5, #4]
-	ldr r0, _0226123C ; =0x00000BD8
-	add r0, r1, r0
-	add r0, r0, r4
-	add r1, r6, #0
-	bl sub_020171A0
-	ldr r1, [r5, #4]
-	ldr r0, _02261240 ; =0x00000BEC
-	add r0, r1, r0
-	add r0, r0, r4
-	add r1, r6, #0
-	bl sub_020171A0
-	mov r0, #0x83
-	lsl r0, r0, #2
-	add r7, r7, #1
-	add r4, r4, r0
-	cmp r7, #8
-	blt _022611C8
-	add r0, r5, #0
-	add r0, #0x84
-	ldr r0, [r0, #0]
-	bl ov114_0225CB38
-	add r0, r5, #0
-	bl ov116_0226139C
-	add r0, r5, #0
-	bl ov116_022617C4
-	cmp r0, #1
-	bne _0226121E
-	ldr r0, [r5, #0]
-	bl ov116_02262A6C
-_0226121E:
-	ldr r0, [r5, #4]
-	bl ov116_02262C64
-	mov r0, #0
-	str r0, [r5, #0]
-	str r0, [r5, #4]
-	pop {r3, r4, r5, r6, r7, pc}
-	; .align 2, 0
-_0226122C: .word 0x0000052C
-_02261230: .word 0x00000738
-_02261234: .word 0x00000944
-_02261238: .word 0x000005B4
-_0226123C: .word 0x00000BD8
-_02261240: .word 0x00000BEC
-	thumb_func_end ov116_022610FC
-
-	thumb_func_start ov116_02261244
-ov116_02261244: ; 0x02261244
-	mov r1, #0
-	str r1, [r0, #0xc]
-	str r1, [r0, #8]
-	str r1, [r0, #0x10]
-	add r2, r0, #0
-	strb r1, [r0, #0x1c]
-	add r2, #0x1c
-	strb r1, [r2, #1]
-	strb r1, [r2, #2]
-	strb r1, [r2, #3]
-	strb r1, [r2, #4]
-	strb r1, [r2, #5]
-	strb r1, [r2, #6]
-	strb r1, [r2, #7]
-	ldr r3, _02261268 ; =memset
-	add r0, #0x24
-	mov r2, #0x20
-	bx r3
-	; .align 2, 0
-_02261268: .word memset
-	thumb_func_end ov116_02261244
-
-	thumb_func_start ov116_0226126C
-ov116_0226126C: ; 0x0226126C
-	push {r4, r5, r6, lr}
-	add r5, r1, #0
-	ldr r1, [r5, #0]
-	add r6, r0, #0
-	cmp r1, #0
-	bne _022612AC
-	bl sub_0200682C
-	bl ov116_022617E4
-	add r4, r0, #0
-	add r0, r6, #0
-	bl sub_02006830
-	mov r0, #0x6a
-	bl sub_0201807C
-	mov r0, #0
-	mov r1, #1
-	bl sub_020388F4
-	cmp r4, #0
-	beq _0226129E
-	mov r0, #1
-	pop {r4, r5, r6, pc}
-_0226129E:
-	mov r0, #0xe7
-	bl sub_020364F0
-	ldr r0, [r5, #0]
-	add r0, r0, #1
-	str r0, [r5, #0]
-	b _022612C8
-_022612AC:
-	mov r0, #0xe7
-	bl sub_02036540
-	cmp r0, #1
-	beq _022612C4
-	bl sub_02035E18
-	add r4, r0, #0
-	bl sub_02032E64
-	cmp r4, r0
-	bge _022612C8
-_022612C4:
-	mov r0, #1
-	pop {r4, r5, r6, pc}
-_022612C8:
-	mov r0, #0
-	pop {r4, r5, r6, pc}
-	thumb_func_end ov116_0226126C
-
-	thumb_func_start ov116_022612CC
-ov116_022612CC: ; 0x022612CC
-	push {r4, lr}
-	sub sp, #8
-	add r4, r0, #0
-	mov r0, #0xa4
-	mov r1, #0x6a
-	bl sub_02006C24
-	str r0, [r4, #0x48]
-	mov r0, #0x9e
-	mov r1, #0x6a
-	bl sub_02006C24
-	str r0, [r4, #0x4c]
-	mov r0, #0x6a
-	bl sub_02018340
-	str r0, [r4, #0x58]
-	mov r0, #0x6a
-	bl sub_02002F38
-	str r0, [r4, #0x5c]
-	mov r0, #4
-	str r0, [sp]
-	mov r1, #0
-	str r1, [sp, #4]
-	mov r0, #0x6a
-	mov r2, #1
-	add r3, r1, #0
-	bl sub_02024220
-	str r0, [r4, #0x60]
-	mov r0, #0x6a
-	bl sub_020203AC
-	str r0, [r4, #0x64]
-	add r0, r4, #0
-	bl ov116_02261C88
-	ldr r0, [r4, #0x5c]
-	mov r1, #1
-	bl sub_02003858
-	mov r2, #2
-	ldr r0, [r4, #0x5c]
-	mov r1, #0
-	lsl r2, r2, #8
-	mov r3, #0x6a
-	bl sub_02002F70
-	mov r1, #1
-	ldr r0, [r4, #0x5c]
-	lsl r2, r1, #9
-	mov r3, #0x6a
-	bl sub_02002F70
-	mov r1, #2
-	ldr r0, [r4, #0x5c]
-	lsl r2, r1, #8
-	mov r3, #0x6a
-	bl sub_02002F70
-	mov r2, #2
-	ldr r0, [r4, #0x5c]
-	mov r1, #3
-	lsl r2, r2, #8
-	mov r3, #0x6a
-	bl sub_02002F70
-	ldr r0, [r4, #0x58]
-	bl ov116_02261494
-	add r0, r4, #0
-	bl ov116_022616CC
-	ldr r0, _02261390 ; =0x04000060
-	ldr r1, _02261394 ; =0xFFFFCFFF
-	ldrh r2, [r0]
-	add r3, r2, #0
-	and r3, r1
-	mov r2, #8
-	orr r2, r3
-	strh r2, [r0]
-	ldrh r2, [r0]
-	and r2, r1
-	mov r1, #0x20
-	orr r1, r2
-	strh r1, [r0]
-	ldr r0, _02261398 ; =0x022677B4
-	bl G3X_SetEdgeColorTable
-	add r4, #0x6c
-	add r0, r4, #0
-	mov r1, #0x6a
-	mov r2, #0x20
-	bl sub_020182CC
-	add sp, #8
-	pop {r4, pc}
-	; .align 2, 0
-_02261390: .word 0x04000060
-_02261394: .word 0xFFFFCFFF
-_02261398: .word 0x022677B4
-	thumb_func_end ov116_022612CC
-
-	thumb_func_start ov116_0226139C
-ov116_0226139C: ; 0x0226139C
-	push {r4, lr}
-	add r4, r0, #0
-	mov r0, #1
-	mov r1, #0
-	bl sub_0201FF0C
-	mov r0, #2
-	mov r1, #0
-	bl sub_0201FF0C
-	mov r0, #4
-	mov r1, #0
-	bl sub_0201FF0C
-	mov r0, #8
-	mov r1, #0
-	bl sub_0201FF0C
-	mov r0, #1
-	mov r1, #0
-	bl sub_0201FF74
-	mov r0, #2
-	mov r1, #0
-	bl sub_0201FF74
-	mov r0, #4
-	mov r1, #0
-	bl sub_0201FF74
-	mov r0, #8
-	mov r1, #0
-	bl sub_0201FF74
-	ldr r0, [r4, #0x58]
-	mov r1, #0
-	bl sub_02019044
-	ldr r0, [r4, #0x58]
-	mov r1, #1
-	bl sub_02019044
-	ldr r0, [r4, #0x58]
-	mov r1, #2
-	bl sub_02019044
-	ldr r0, [r4, #0x58]
-	mov r1, #3
-	bl sub_02019044
-	ldr r0, [r4, #0x58]
-	mov r1, #4
-	bl sub_02019044
-	ldr r0, [r4, #0x58]
-	mov r1, #5
-	bl sub_02019044
-	ldr r0, [r4, #0x58]
-	mov r1, #6
-	bl sub_02019044
-	ldr r0, [r4, #0x58]
-	mov r1, #7
-	bl sub_02019044
-	ldr r0, [r4, #0x58]
-	bl sub_020181C4
-	ldr r0, [r4, #0x5c]
-	mov r1, #0
-	bl sub_02002FA0
-	ldr r0, [r4, #0x5c]
-	mov r1, #1
-	bl sub_02002FA0
-	ldr r0, [r4, #0x5c]
-	mov r1, #2
-	bl sub_02002FA0
-	ldr r0, [r4, #0x5c]
-	mov r1, #3
-	bl sub_02002FA0
-	ldr r0, [r4, #0x5c]
-	bl sub_02002F54
-	ldr r0, [r4, #0x48]
-	bl sub_02006CA8
-	ldr r0, [r4, #0x4c]
-	bl sub_02006CA8
-	ldr r0, [r4, #0x60]
-	bl sub_020242C4
-	ldr r0, [r4, #0x64]
-	bl sub_020203B8
-	ldr r0, [r4, #0x50]
-	ldr r1, [r4, #0x54]
-	bl sub_0200D0B0
-	ldr r0, [r4, #0x50]
-	bl sub_0200C8D4
-	ldr r0, _02261488 ; =0x021BF6DC
-	mov r1, #0
-	strb r1, [r0, #5]
-	bl sub_0201FFE8
-	ldr r2, _0226148C ; =0x04000060
-	ldr r0, _02261490 ; =0x0000CFF7
-	ldrh r1, [r2]
-	and r0, r1
-	strh r0, [r2]
-	pop {r4, pc}
-	; .align 2, 0
-_02261488: .word 0x021BF6DC
-_0226148C: .word 0x04000060
-_02261490: .word 0x0000CFF7
-	thumb_func_end ov116_0226139C
-
-	thumb_func_start ov116_02261494
-ov116_02261494: ; 0x02261494
-	push {r4, r5, lr}
-	sub sp, #0x11c
-	add r4, r0, #0
-	bl sub_0201FF00
-	ldr r5, _022616B0 ; =0x02267794
-	add r3, sp, #0x2c
-	add r2, r3, #0
-	ldmia r5!, {r0, r1}
-	stmia r3!, {r0, r1}
-	ldmia r5!, {r0, r1}
-	stmia r3!, {r0, r1}
-	add r0, r2, #0
-	bl sub_02018368
-	ldr r5, _022616B4 ; =0x02267810
-	add r3, sp, #4
-	mov r2, #5
-_022614B8:
-	ldmia r5!, {r0, r1}
-	stmia r3!, {r0, r1}
-	sub r2, r2, #1
-	bne _022614B8
-	add r0, sp, #4
-	bl sub_0201FE94
-	mov r1, #6
-	mov r2, #2
-	mov r0, #0
-	lsl r1, r1, #0x18
-	lsl r2, r2, #0x12
-	bl MIi_CpuClear32
-	mov r1, #0x62
-	mov r2, #2
-	mov r0, #0
-	lsl r1, r1, #0x14
-	lsl r2, r2, #0x10
-	bl MIi_CpuClear32
-	mov r1, #0x19
-	mov r2, #1
-	mov r0, #0
-	lsl r1, r1, #0x16
-	lsl r2, r2, #0x12
-	bl MIi_CpuClear32
-	mov r1, #0x66
-	mov r2, #2
-	mov r0, #0
-	lsl r1, r1, #0x14
-	lsl r2, r2, #0x10
-	bl MIi_CpuClear32
-	ldr r5, _022616B8 ; =0x02267838
-	add r3, sp, #0xac
-	mov r2, #0xe
-_02261504:
-	ldmia r5!, {r0, r1}
-	stmia r3!, {r0, r1}
-	sub r2, r2, #1
-	bne _02261504
-	mov r0, #1
-	mov r1, #0x20
-	mov r2, #0
-	mov r3, #0x6a
-	bl sub_02019690
-	mov r0, #2
-	mov r1, #0x20
-	mov r2, #0
-	mov r3, #0x6a
-	bl sub_02019690
-	mov r0, #3
-	mov r1, #0x20
-	mov r2, #0
-	mov r3, #0x6a
-	bl sub_02019690
-	add r0, r4, #0
-	mov r1, #1
-	add r2, sp, #0xc8
-	mov r3, #0
-	bl sub_020183C4
-	add r0, r4, #0
-	mov r1, #2
-	add r2, sp, #0xe4
-	mov r3, #0
-	bl sub_020183C4
-	add r0, r4, #0
-	mov r1, #3
-	add r2, sp, #0x100
-	mov r3, #0
-	bl sub_020183C4
-	add r0, r4, #0
-	mov r1, #0
-	bl sub_02019EBC
-	add r0, r4, #0
-	mov r1, #1
-	bl sub_02019EBC
-	add r0, r4, #0
-	mov r1, #2
-	bl sub_02019EBC
-	add r0, r4, #0
-	mov r1, #3
-	bl sub_02019EBC
-	ldr r5, _022616BC ; =0x022678A8
-	add r3, sp, #0x3c
-	mov r2, #0xe
-_0226157A:
-	ldmia r5!, {r0, r1}
-	stmia r3!, {r0, r1}
-	sub r2, r2, #1
-	bne _0226157A
-	mov r0, #4
-	mov r1, #0x20
-	mov r2, #0
-	mov r3, #0x6a
-	bl sub_02019690
-	mov r0, #5
-	mov r1, #0x20
-	mov r2, #0
-	mov r3, #0x6a
-	bl sub_02019690
-	mov r0, #6
-	mov r1, #0x20
-	mov r2, #0
-	mov r3, #0x6a
-	bl sub_02019690
-	mov r0, #7
-	mov r1, #0x20
-	mov r2, #0
-	mov r3, #0x6a
-	bl sub_02019690
-	add r0, r4, #0
-	mov r1, #4
-	add r2, sp, #0x3c
-	mov r3, #0
-	bl sub_020183C4
-	add r0, r4, #0
-	mov r1, #5
-	add r2, sp, #0x58
-	mov r3, #0
-	bl sub_020183C4
-	add r0, r4, #0
-	mov r1, #6
-	add r2, sp, #0x74
-	mov r3, #0
-	bl sub_020183C4
-	add r0, r4, #0
-	mov r1, #7
-	add r2, sp, #0x90
-	mov r3, #0
-	bl sub_020183C4
-	add r0, r4, #0
-	mov r1, #4
-	bl sub_02019EBC
-	add r0, r4, #0
-	mov r1, #5
-	bl sub_02019EBC
-	add r0, r4, #0
-	mov r1, #6
-	bl sub_02019EBC
-	add r0, r4, #0
-	mov r1, #7
-	bl sub_02019EBC
-	mov r0, #4
-	mov r1, #0x20
-	mov r2, #0
-	mov r3, #0x6a
-	bl sub_02019690
-	mov r0, #5
-	mov r1, #0x20
-	mov r2, #0
-	mov r3, #0x6a
-	bl sub_02019690
-	mov r0, #6
-	mov r1, #0x20
-	mov r2, #0
-	mov r3, #0x6a
-	bl sub_02019690
-	mov r0, #7
-	mov r1, #0x20
-	mov r2, #0
-	mov r3, #0x6a
-	bl sub_02019690
-	mov r0, #1
-	add r1, r0, #0
-	bl sub_0201FF0C
-	mov r0, #2
-	mov r1, #1
-	bl sub_0201FF0C
-	mov r0, #4
-	mov r1, #1
-	bl sub_0201FF0C
-	mov r0, #8
-	mov r1, #1
-	bl sub_0201FF0C
-	mov r0, #0x10
-	mov r1, #1
-	bl sub_0201FF0C
-	mov r0, #1
-	add r1, r0, #0
-	bl sub_0201FF74
-	mov r0, #2
-	mov r1, #1
-	bl sub_0201FF74
-	mov r0, #4
-	mov r1, #1
-	bl sub_0201FF74
-	mov r0, #8
-	mov r1, #1
-	bl sub_0201FF74
-	mov r0, #0x10
-	mov r1, #1
-	bl sub_0201FF74
-	ldr r0, _022616C0 ; =0x021BF6DC
-	mov r1, #1
-	strb r1, [r0, #5]
-	bl sub_0201FFE8
-	mov r0, #0xa
-	str r0, [sp]
-	ldr r0, _022616C4 ; =0x04000050
-	mov r1, #0
-	mov r2, #0x1e
-	mov r3, #7
-	bl G2x_SetBlendAlpha_
-	mov r0, #0xa
-	str r0, [sp]
-	ldr r0, _022616C8 ; =0x04001050
-	mov r1, #0
-	mov r2, #0x11
-	mov r3, #7
-	bl G2x_SetBlendAlpha_
-	add sp, #0x11c
-	pop {r4, r5, pc}
-	; .align 2, 0
-_022616B0: .word 0x02267794
-_022616B4: .word 0x02267810
-_022616B8: .word 0x02267838
-_022616BC: .word 0x022678A8
-_022616C0: .word 0x021BF6DC
-_022616C4: .word 0x04000050
-_022616C8: .word 0x04001050
-	thumb_func_end ov116_02261494
-
-	thumb_func_start ov116_022616CC
-ov116_022616CC: ; 0x022616CC
-	push {r3, r4, r5, r6, lr}
-	sub sp, #0x4c
-	add r4, r0, #0
-	mov r0, #0x6a
-	bl sub_0200C6E4
-	add r2, sp, #0x2c
-	ldr r5, _0226175C ; =0x022677F0
-	str r0, [r4, #0x50]
-	ldmia r5!, {r0, r1}
-	add r3, r2, #0
-	stmia r2!, {r0, r1}
-	ldmia r5!, {r0, r1}
-	stmia r2!, {r0, r1}
-	ldmia r5!, {r0, r1}
-	stmia r2!, {r0, r1}
-	ldmia r5!, {r0, r1}
-	ldr r6, _02261760 ; =0x022677C4
-	stmia r2!, {r0, r1}
-	add r5, sp, #0x18
-	ldmia r6!, {r0, r1}
-	add r2, r5, #0
-	stmia r5!, {r0, r1}
-	ldmia r6!, {r0, r1}
-	stmia r5!, {r0, r1}
-	ldr r0, [r6, #0]
-	add r1, r3, #0
-	str r0, [r5, #0]
-	ldr r0, [r4, #0x50]
-	mov r3, #0x20
-	bl sub_0200C73C
-	ldr r3, _02261764 ; =0x022677D8
-	add r2, sp, #0
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	ldr r0, [r4, #0x50]
-	bl sub_0200C704
-	str r0, [r4, #0x54]
-	ldr r0, [r4, #0x50]
-	ldr r1, [r4, #0x54]
-	mov r2, #0xff
-	bl sub_0200C7C0
-	cmp r0, #0
-	bne _02261736
-	bl GF_AssertFail
-_02261736:
-	ldr r0, [r4, #0x50]
-	ldr r1, [r4, #0x54]
-	add r2, sp, #0
-	bl sub_0200CB30
-	cmp r0, #0
-	bne _02261748
-	bl GF_AssertFail
-_02261748:
-	ldr r0, [r4, #0x50]
-	bl sub_0200C738
-	mov r2, #1
-	mov r1, #0
-	lsl r2, r2, #0x14
-	bl sub_0200964C
-	add sp, #0x4c
-	pop {r3, r4, r5, r6, pc}
-	; .align 2, 0
-_0226175C: .word 0x022677F0
-_02261760: .word 0x022677C4
-_02261764: .word 0x022677D8
-	thumb_func_end ov116_022616CC
-
-	thumb_func_start ov116_02261768
-ov116_02261768: ; 0x02261768
-	push {lr}
-	sub sp, #0xc
-	add r1, r0, #0
-	mov r0, #6
-	str r0, [sp]
-	mov r0, #1
-	str r0, [sp, #4]
-	mov r0, #0x6a
-	str r0, [sp, #8]
-	mov r0, #0
-	add r2, r1, #0
-	add r3, r0, #0
-	bl sub_0200F174
-	mov r0, #1
-	add sp, #0xc
-	pop {pc}
-	; .align 2, 0
-	thumb_func_end ov116_02261768
-
-	thumb_func_start ov116_0226178C
-ov116_0226178C: ; 0x0226178C
-	cmp r1, #0
-	beq _02261792
-	str r2, [r3, #0]
-_02261792:
-	bx lr
-	thumb_func_end ov116_0226178C
-
-	thumb_func_start ov116_02261794
-ov116_02261794: ; 0x02261794
-	push {r4, lr}
-	add r4, r0, #0
-	bl sub_0201DCAC
-	bl sub_0200C800
-	ldr r0, [r4, #0x5c]
-	bl sub_02003694
-	ldr r0, [r4, #0x58]
-	bl sub_0201C2B8
-	ldr r3, _022617BC ; =0x027E0000
-	ldr r1, _022617C0 ; =0x00003FF8
-	mov r0, #1
-	ldr r2, [r3, r1]
-	orr r0, r2
-	str r0, [r3, r1]
-	pop {r4, pc}
-	nop
-_022617BC: .word 0x027E0000
-_022617C0: .word 0x00003FF8
-	thumb_func_end ov116_02261794
-
-	thumb_func_start ov116_022617C4
-ov116_022617C4: ; 0x022617C4
-	ldr r0, [r0, #0x44]
-	cmp r0, #0
-	bne _022617CE
-	mov r0, #1
-	bx lr
-_022617CE:
-	mov r0, #0
-	bx lr
-	; .align 2, 0
-	thumb_func_end ov116_022617C4
-
-	thumb_func_start ov116_022617D4
-ov116_022617D4: ; 0x022617D4
-	mov r1, #1
-	str r1, [r0, #8]
-	bx lr
-	; .align 2, 0
-	thumb_func_end ov116_022617D4
-
-	thumb_func_start ov116_022617DC
-ov116_022617DC: ; 0x022617DC
-	mov r1, #1
-	str r1, [r0, #0xc]
-	bx lr
-	; .align 2, 0
-	thumb_func_end ov116_022617DC
-
-	thumb_func_start ov116_022617E4
-ov116_022617E4: ; 0x022617E4
-	push {r4, lr}
-	add r4, r0, #0
-	add r0, #0x8c
-	bl ov114_0225CA54
-	cmp r0, #1
-	bne _0226186A
-	add r0, r4, #0
-	add r0, #0x7c
-	ldrb r0, [r0]
-	cmp r0, #0
-	bne _02261816
-	bl sub_0200F2AC
-	cmp r0, #1
-	bne _02261808
-	bl sub_0200F2C0
-_02261808:
-	mov r0, #0
-	bl sub_0200F370
-	mov r0, #1
-	add r4, #0x7c
-	strb r0, [r4]
-	pop {r4, pc}
-_02261816:
-	add r0, r4, #0
-	add r0, #0x8c
-	bl ov114_0225CA98
-	cmp r0, #0
-	bne _02261826
-	mov r0, #1
-	pop {r4, pc}
-_02261826:
-	ldr r0, [r4, #4]
-	cmp r0, #0
-	beq _0226183C
-	bl ov116_02262264
-	ldr r0, [r4, #4]
-	bl ov116_02262004
-	add r0, r4, #0
-	bl ov116_022610FC
-_0226183C:
-	add r0, r4, #0
-	add r0, #0xb8
-	ldr r0, [r0, #0]
-	cmp r0, #0
-	beq _02261852
-	bl ov114_0225C904
-	add r0, r4, #0
-	mov r1, #0
-	add r0, #0xb8
-	str r1, [r0, #0]
-_02261852:
-	add r0, r4, #0
-	add r0, #0x9c
-	ldr r0, [r0, #0]
-	cmp r0, #0
-	beq _02261866
-	bl ov114_0225C838
-	mov r0, #0
-	add r4, #0x9c
-	str r0, [r4, #0]
-_02261866:
-	mov r0, #2
-	pop {r4, pc}
-_0226186A:
-	mov r0, #0
-	pop {r4, pc}
-	; .align 2, 0
-	thumb_func_end ov116_022617E4
-
-	.rodata
-
-
-	.global Unk_ov116_0226777C
-Unk_ov116_0226777C: ; 0x0226777C
-	.incbin "incbin/overlay116_rodata.bin", 0x3C, 0x48 - 0x3C
-
-	.global Unk_ov116_02267788
-Unk_ov116_02267788: ; 0x02267788
-	.incbin "incbin/overlay116_rodata.bin", 0x48, 0x54 - 0x48
-
-	.global Unk_ov116_02267794
-Unk_ov116_02267794: ; 0x02267794
-	.incbin "incbin/overlay116_rodata.bin", 0x54, 0x64 - 0x54
-
-	.global Unk_ov116_022677A4
-Unk_ov116_022677A4: ; 0x022677A4
-	.incbin "incbin/overlay116_rodata.bin", 0x64, 0x74 - 0x64
-
-	.global Unk_ov116_022677B4
-Unk_ov116_022677B4: ; 0x022677B4
-	.incbin "incbin/overlay116_rodata.bin", 0x74, 0x84 - 0x74
-
-	.global Unk_ov116_022677C4
-Unk_ov116_022677C4: ; 0x022677C4
-	.incbin "incbin/overlay116_rodata.bin", 0x84, 0x98 - 0x84
-
-	.global Unk_ov116_022677D8
-Unk_ov116_022677D8: ; 0x022677D8
-	.incbin "incbin/overlay116_rodata.bin", 0x98, 0xB0 - 0x98
-
-	.global Unk_ov116_022677F0
-Unk_ov116_022677F0: ; 0x022677F0
-	.incbin "incbin/overlay116_rodata.bin", 0xB0, 0xD0 - 0xB0
-
-	.global Unk_ov116_02267810
-Unk_ov116_02267810: ; 0x02267810
-	.incbin "incbin/overlay116_rodata.bin", 0xD0, 0xF8 - 0xD0
-
-	.global Unk_ov116_02267838
-Unk_ov116_02267838: ; 0x02267838
-	.incbin "incbin/overlay116_rodata.bin", 0xF8, 0x168 - 0xF8
-
-	.global Unk_ov116_022678A8
-Unk_ov116_022678A8: ; 0x022678A8
-	.incbin "incbin/overlay116_rodata.bin", 0x168, 0x1D8 - 0x168
-
-	.global Unk_ov116_02267918
-Unk_ov116_02267918: ; 0x02267918
-	.incbin "incbin/overlay116_rodata.bin", 0x1D8, 0x258 - 0x1D8
-
-	.global Unk_ov116_02267998
-Unk_ov116_02267998: ; 0x02267998
-	.incbin "incbin/overlay116_rodata.bin", 0x258, 0xC0
-
diff --git a/asm/overlay116/ov116_02262A44.inc b/asm/overlay116/ov116_02262A44.inc
deleted file mode 100644
index f98ae6a8d6..0000000000
--- a/asm/overlay116/ov116_02262A44.inc
+++ /dev/null
@@ -1,2 +0,0 @@
-.public sub_02018144
-.public sub_020181C4
diff --git a/asm/overlay116/ov116_02262A44.s b/asm/overlay116/ov116_02262A44.s
deleted file mode 100644
index 675cc5a397..0000000000
--- a/asm/overlay116/ov116_02262A44.s
+++ /dev/null
@@ -1,56 +0,0 @@
-	.include "macros/function.inc"
-	.include "overlay116/ov116_02262A44.inc"
-
-	
-
-	.text
-
-
-	thumb_func_start ov116_02262A44
-ov116_02262A44: ; 0x02262A44
-	push {r3, r4, r5, lr}
-	add r5, r0, #0
-	add r4, r1, #0
-	mov r0, #0x6a
-	mov r1, #0x10
-	bl sub_02018144
-	add r3, r0, #0
-	mov r2, #0x10
-	mov r1, #0
-_02262A58:
-	strb r1, [r3]
-	add r3, r3, #1
-	sub r2, r2, #1
-	bne _02262A58
-	mov r1, #0x4b
-	str r5, [r0, #4]
-	lsl r1, r1, #4
-	strh r1, [r0, #8]
-	str r4, [r0, #0xc]
-	pop {r3, r4, r5, pc}
-	thumb_func_end ov116_02262A44
-
-	thumb_func_start ov116_02262A6C
-ov116_02262A6C: ; 0x02262A6C
-	ldr r3, _02262A70 ; =sub_020181C4
-	bx r3
-	; .align 2, 0
-_02262A70: .word sub_020181C4
-	thumb_func_end ov116_02262A6C
-
-	thumb_func_start ov116_02262A74
-ov116_02262A74: ; 0x02262A74
-	mov r1, #8
-	ldrsh r2, [r0, r1]
-	sub r2, r2, #1
-	strh r2, [r0, #8]
-	ldrsh r0, [r0, r1]
-	cmp r0, #0
-	ble _02262A86
-	mov r0, #1
-	bx lr
-_02262A86:
-	mov r0, #0
-	bx lr
-	; .align 2, 0
-	thumb_func_end ov116_02262A74
\ No newline at end of file
diff --git a/asm/overlay116/ov116_0226432C.inc b/asm/overlay116/ov116_0226432C.inc
deleted file mode 100644
index a91dba8841..0000000000
--- a/asm/overlay116/ov116_0226432C.inc
+++ /dev/null
@@ -1,75 +0,0 @@
-.public sub_02003A2C
-.public sub_02005748
-.public sub_020057A4
-.public sub_0200D0F4
-.public sub_0200D330
-.public sub_0200D33C
-.public sub_0200D364
-.public sub_0200D3F4
-.public sub_0200D430
-.public sub_0200D4C4
-.public sub_0200D550
-.public sub_0200D614
-.public sub_0200D638
-.public sub_0200D650
-.public sub_0200D67C
-.public sub_0200D9E8
-.public sub_0200DA58
-.public sub_0200F2AC
-.public sub_02017240
-.public sub_02017348
-.public sub_02018144
-.public sub_020181C4
-.public sub_0201C63C
-.public sub_0201D250
-.public sub_0201D264
-.public FX_Div
-.public FX_Sqrt
-.public FX_SinFx64c
-.public FX_CosFx64c
-.public _d_dtof
-.public _d_itod
-.public _d_mul
-.public _f_add
-.public _d_fne
-.public _f_fgt
-.public _fdiv
-.public _f_ftod
-.public _f_ftoi
-.public _f_itof
-.public _f_utof
-.public _f_lltof
-.public _f_mul
-.public _f_sub
-.public _ull_mul
-.public _s32_div_f
-.public ov116_02261E0C
-.public ov116_02261E28
-.public ov116_022626E8
-.public ov116_0226469C
-.public ov116_022646FC
-.public ov116_02264764
-.public ov116_02264774
-.public ov116_022647BC
-.public ov116_022649E4
-.public ov116_02264FEC
-.public ov116_0226501C
-.public ov116_0226510C
-.public ov116_02265260
-.public ov116_022652F4
-.public ov116_0226534C
-.public ov116_022655DC
-.public ov116_02265754
-.public ov116_022658C8
-.public ov116_0226591C
-.public ov116_02265D84
-.public ov116_02265D8C
-.public ov116_02265E64
-.public ov116_02265F1C
-.public ov116_02265FD4
-.public ov116_02266FFC
-.public ov116_0226700C
-.public ov116_02267160
-.public ov116_022671B8
-.public ov116_022671EC
-.public ov116_02267728
diff --git a/asm/overlay116/ov116_0226432C.s b/asm/overlay116/ov116_0226432C.s
deleted file mode 100644
index 88b7fde772..0000000000
--- a/asm/overlay116/ov116_0226432C.s
+++ /dev/null
@@ -1,5637 +0,0 @@
-	.include "macros/function.inc"
-	.include "overlay116/ov116_0226432C.inc"
-
-	
-
-	.text
-
-
-	thumb_func_start ov116_0226432C
-ov116_0226432C: ; 0x0226432C
-	push {r4, r5, r6, r7, lr}
-	sub sp, #0x4c
-	add r5, r0, #0
-	ldr r0, [sp, #0x64]
-	add r4, r1, #0
-	add r6, r3, #0
-	add r7, r2, #0
-	bl _f_ftod
-	str r0, [sp, #0x10]
-	sub r0, r4, r6
-	str r1, [sp, #4]
-	bl _d_itod
-	add r2, r0, #0
-	add r3, r1, #0
-	ldr r0, _02264514 ; =0x147AE148
-	ldr r1, _02264518 ; =0x3F7547AE
-	bl _d_mul
-	add r2, r0, #0
-	add r3, r1, #0
-	ldr r0, [sp, #0x10]
-	ldr r1, [sp, #4]
-	bl _d_mul
-	bl _d_dtof
-	add r6, r0, #0
-	ldr r0, [sp, #0x64]
-	bl _f_ftod
-	str r0, [sp, #0x14]
-	ldr r0, [sp, #0x60]
-	add r4, r1, #0
-	sub r0, r7, r0
-	bl _d_itod
-	add r2, r0, #0
-	add r3, r1, #0
-	ldr r0, _0226451C ; =0x55555555
-	ldr r1, _02264520 ; =0x3F755555
-	bl _d_mul
-	add r2, r0, #0
-	add r3, r1, #0
-	ldr r0, [sp, #0x14]
-	add r1, r4, #0
-	bl _d_mul
-	bl _d_dtof
-	add r4, r0, #0
-	ldr r0, [sp, #0x68]
-	cmp r0, #0
-	beq _022643E0
-	mov r0, #0x7f
-	lsl r0, r0, #2
-	str r6, [r5, r0]
-	add r1, r0, #4
-	str r4, [r5, r1]
-	sub r1, r0, #4
-	mov r2, #8
-	str r2, [r5, r1]
-	sub r0, r0, #4
-	ldr r0, [r5, r0]
-	bl _f_itof
-	add r1, r0, #0
-	mov r0, #0x7f
-	lsl r0, r0, #2
-	ldr r0, [r5, r0]
-	bl _fdiv
-	mov r1, #0x81
-	lsl r1, r1, #2
-	str r0, [r5, r1]
-	sub r1, #0xc
-	ldr r0, [r5, r1]
-	bl _f_itof
-	add r1, r0, #0
-	mov r0, #2
-	lsl r0, r0, #8
-	ldr r0, [r5, r0]
-	bl _fdiv
-	mov r1, #0x82
-	lsl r1, r1, #2
-	str r0, [r5, r1]
-_022643E0:
-	add r0, r6, #0
-	add r1, r6, #0
-	bl _f_mul
-	add r7, r0, #0
-	add r0, r4, #0
-	add r1, r4, #0
-	bl _f_mul
-	add r1, r0, #0
-	add r0, r7, #0
-	bl _f_add
-	mov r1, #0
-	add r7, r0, #0
-	bl _f_fgt
-	ldr r0, _02264524 ; =0x45800000
-	bls _02264418
-	add r1, r7, #0
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _02264426
-_02264418:
-	add r1, r7, #0
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_02264426:
-	bl _f_ftoi
-	bl FX_Sqrt
-	add r7, r0, #0
-	bl _f_itof
-	ldr r1, _02264524 ; =0x45800000
-	bl _fdiv
-	str r0, [sp, #0x18]
-	bl _f_ftod
-	add r2, r0, #0
-	mov r0, #0
-	add r3, r1, #0
-	add r1, r0, #0
-	bl _d_fne
-	beq _0226450E
-	add r0, r7, #0
-	bl FX_SinFx64c
-	str r0, [sp, #0x1c]
-	str r1, [sp, #0xc]
-	add r0, r7, #0
-	bl FX_CosFx64c
-	str r0, [sp, #0x20]
-	add r7, r1, #0
-	ldr r0, [sp, #0x1c]
-	ldr r1, [sp, #0xc]
-	bl _f_lltof
-	ldr r1, _02264528 ; =0x4F800000
-	bl _fdiv
-	str r0, [sp, #0x24]
-	ldr r0, [sp, #0x20]
-	add r1, r7, #0
-	bl _f_lltof
-	ldr r1, _02264528 ; =0x4F800000
-	bl _fdiv
-	add r7, r0, #0
-	ldr r0, [sp, #0x24]
-	ldr r1, [sp, #0x18]
-	bl _fdiv
-	str r0, [sp, #0x28]
-	ldr r1, [sp, #0x28]
-	add r0, r4, #0
-	str r7, [sp, #0x3c]
-	bl _f_mul
-	str r0, [sp, #0x40]
-	ldr r1, [sp, #0x28]
-	add r0, r6, #0
-	bl _f_mul
-	mov r2, #0x19
-	str r0, [sp, #0x44]
-	mov r0, #0
-	lsl r2, r2, #4
-	str r0, [sp, #0x48]
-	add r0, r5, r2
-	add r2, #0x10
-	add r1, sp, #0x3c
-	add r2, r5, r2
-	bl ov116_0226700C
-	mov r1, #0x15
-	lsl r1, r1, #4
-	add r0, r5, r1
-	add r1, #0x40
-	add r1, r5, r1
-	bl ov116_022671EC
-	mov r1, #0x1a
-	lsl r1, r1, #4
-	add r0, r5, r1
-	sub r1, #0x10
-	add r1, r5, r1
-	bl ov116_02266FFC
-	mov r1, #0x15
-	lsl r1, r1, #4
-	add r0, r5, r1
-	add r1, #0x60
-	add r1, r5, r1
-	bl ov116_02267728
-	mov r0, #0x19
-	lsl r0, r0, #4
-	add r0, r5, r0
-	bl ov116_02267160
-	mov r7, #0x19
-	lsl r7, r7, #4
-	add r3, sp, #0x2c
-	add r4, r5, r7
-	add r6, r0, #0
-	add r2, r3, #0
-	ldmia r4!, {r0, r1}
-	stmia r3!, {r0, r1}
-	ldmia r4!, {r0, r1}
-	stmia r3!, {r0, r1}
-	add r1, r2, #0
-	add r0, r5, r7
-	add r2, r6, #0
-	bl ov116_022671B8
-	add sp, #0x4c
-	mov r0, #1
-	pop {r4, r5, r6, r7, pc}
-_0226450E:
-	mov r0, #0
-	add sp, #0x4c
-	pop {r4, r5, r6, r7, pc}
-	; .align 2, 0
-_02264514: .word 0x147AE148
-_02264518: .word 0x3F7547AE
-_0226451C: .word 0x55555555
-_02264520: .word 0x3F755555
-_02264524: .word 0x45800000
-_02264528: .word 0x4F800000
-	thumb_func_end ov116_0226432C
-
-	thumb_func_start ov116_0226452C
-ov116_0226452C: ; 0x0226452C
-	push {r3, r4, r5, r6, r7, lr}
-	sub sp, #0x20
-	mov r1, #0x7f
-	lsl r1, r1, #2
-	add r5, r0, #0
-	add r0, r1, #4
-	ldr r4, [r5, r1]
-	ldr r0, [r5, r0]
-	add r1, #8
-	str r0, [sp]
-	ldr r1, [r5, r1]
-	add r0, r4, #0
-	bl _f_sub
-	mov r1, #0x7f
-	lsl r1, r1, #2
-	str r0, [r5, r1]
-	add r0, r1, #4
-	add r1, #0xc
-	ldr r0, [r5, r0]
-	ldr r1, [r5, r1]
-	bl _f_sub
-	mov r1, #2
-	lsl r1, r1, #8
-	str r0, [r5, r1]
-	add r0, r1, #0
-	sub r0, #8
-	ldr r0, [r5, r0]
-	sub r1, #8
-	sub r0, r0, #1
-	str r0, [r5, r1]
-	add r0, r4, #0
-	add r1, r4, #0
-	bl _f_mul
-	add r6, r0, #0
-	ldr r0, [sp]
-	add r1, r0, #0
-	bl _f_mul
-	add r1, r0, #0
-	add r0, r6, #0
-	bl _f_add
-	mov r1, #0
-	add r6, r0, #0
-	bl _f_fgt
-	ldr r0, _02264678 ; =0x45800000
-	bls _022645A4
-	add r1, r6, #0
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _022645B2
-_022645A4:
-	add r1, r6, #0
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_022645B2:
-	bl _f_ftoi
-	bl FX_Sqrt
-	add r6, r0, #0
-	bl _f_itof
-	ldr r1, _02264678 ; =0x45800000
-	bl _fdiv
-	str r0, [sp, #4]
-	bl _f_ftod
-	add r2, r0, #0
-	mov r0, #0
-	add r3, r1, #0
-	add r1, r0, #0
-	bl _d_fne
-	beq _02264672
-	add r0, r6, #0
-	bl FX_SinFx64c
-	str r0, [sp, #8]
-	add r0, r6, #0
-	add r7, r1, #0
-	bl FX_CosFx64c
-	str r0, [sp, #0xc]
-	add r6, r1, #0
-	ldr r0, [sp, #8]
-	add r1, r7, #0
-	bl _f_lltof
-	ldr r1, _0226467C ; =0x4F800000
-	bl _fdiv
-	add r7, r0, #0
-	ldr r0, [sp, #0xc]
-	add r1, r6, #0
-	bl _f_lltof
-	ldr r1, _0226467C ; =0x4F800000
-	bl _fdiv
-	add r6, r0, #0
-	ldr r1, [sp, #4]
-	add r0, r7, #0
-	bl _fdiv
-	add r7, r0, #0
-	ldr r0, [sp]
-	add r1, r7, #0
-	str r6, [sp, #0x10]
-	bl _f_mul
-	str r0, [sp, #0x14]
-	add r0, r4, #0
-	add r1, r7, #0
-	bl _f_mul
-	mov r2, #0x19
-	str r0, [sp, #0x18]
-	mov r0, #0
-	lsl r2, r2, #4
-	str r0, [sp, #0x1c]
-	add r0, r5, r2
-	add r2, #0x10
-	add r1, sp, #0x10
-	add r2, r5, r2
-	bl ov116_0226700C
-	mov r1, #0x15
-	lsl r1, r1, #4
-	add r0, r5, r1
-	add r1, #0x40
-	add r1, r5, r1
-	bl ov116_022671EC
-	mov r1, #0x1a
-	lsl r1, r1, #4
-	add r0, r5, r1
-	sub r1, #0x10
-	add r1, r5, r1
-	bl ov116_02266FFC
-	mov r1, #0x15
-	lsl r1, r1, #4
-	add r0, r5, r1
-	add r1, #0x60
-	add r1, r5, r1
-	bl ov116_02267728
-	add sp, #0x20
-	mov r0, #1
-	pop {r3, r4, r5, r6, r7, pc}
-_02264672:
-	mov r0, #0
-	add sp, #0x20
-	pop {r3, r4, r5, r6, r7, pc}
-	; .align 2, 0
-_02264678: .word 0x45800000
-_0226467C: .word 0x4F800000
-	thumb_func_end ov116_0226452C
-
-	thumb_func_start ov116_02264680
-ov116_02264680: ; 0x02264680
-	mov r3, #0
-_02264682:
-	add r2, r0, #0
-	add r2, #0xbc
-	ldr r2, [r2, #0]
-	cmp r1, r2
-	bne _02264690
-	add r0, r3, #0
-	bx lr
-_02264690:
-	add r3, r3, #1
-	add r0, r0, #4
-	cmp r3, #4
-	blt _02264682
-	mov r0, #0xff
-	bx lr
-	thumb_func_end ov116_02264680
-
-	thumb_func_start ov116_0226469C
-ov116_0226469C: ; 0x0226469C
-	push {r3, r4, r5, r6, r7, lr}
-	ldr r4, [sp, #0x18]
-	add r5, r0, #0
-	add r7, r2, #0
-	add r0, r3, #0
-	add r6, r1, #0
-	lsl r2, r4, #0xc
-	str r3, [sp]
-	asr r1, r0, #0x1f
-	asr r3, r2, #0x1f
-	bl _ull_mul
-	add r2, r0, #0
-	sub r0, r7, r6
-	mov r7, #2
-	mov r3, #0
-	lsl r7, r7, #0xa
-	add r2, r2, r7
-	adc r1, r3
-	lsl r1, r1, #0x14
-	lsr r2, r2, #0xc
-	orr r2, r1
-	sub r2, r0, r2
-	asr r1, r2, #0x1f
-	lsr r0, r2, #0x13
-	lsl r1, r1, #0xd
-	orr r1, r0
-	lsl r0, r2, #0xd
-	add r0, r0, r7
-	adc r1, r3
-	lsl r1, r1, #0x14
-	lsr r0, r0, #0xc
-	orr r0, r1
-	add r1, r4, #0
-	mul r1, r4
-	lsl r1, r1, #0xc
-	bl FX_Div
-	str r6, [r5, #0]
-	ldr r1, [sp]
-	str r6, [r5, #4]
-	str r1, [r5, #8]
-	str r0, [r5, #0xc]
-	mov r0, #0
-	str r0, [r5, #0x10]
-	str r4, [r5, #0x14]
-	pop {r3, r4, r5, r6, r7, pc}
-	; .align 2, 0
-	thumb_func_end ov116_0226469C
-
-	thumb_func_start ov116_022646FC
-ov116_022646FC: ; 0x022646FC
-	push {r4, r5, r6, lr}
-	add r5, r0, #0
-	ldr r6, [r5, #0x10]
-	ldr r0, [r5, #8]
-	lsl r2, r6, #0xc
-	asr r1, r0, #0x1f
-	asr r3, r2, #0x1f
-	bl _ull_mul
-	mov r2, #2
-	mov r3, #0
-	lsl r2, r2, #0xa
-	add r2, r0, r2
-	adc r1, r3
-	lsr r4, r2, #0xc
-	lsl r0, r1, #0x14
-	add r2, r6, #0
-	orr r4, r0
-	ldr r0, [r5, #0xc]
-	mul r2, r6
-	lsl r2, r2, #0xc
-	asr r1, r0, #0x1f
-	asr r3, r2, #0x1f
-	bl _ull_mul
-	mov r2, #2
-	mov r3, #0
-	lsl r2, r2, #0xa
-	add r0, r0, r2
-	adc r1, r3
-	lsl r1, r1, #0x14
-	lsr r0, r0, #0xc
-	orr r0, r1
-	lsl r1, r2, #2
-	bl FX_Div
-	ldr r1, [r5, #4]
-	add r0, r4, r0
-	add r0, r1, r0
-	str r0, [r5, #0]
-	ldr r0, [r5, #0x10]
-	ldr r1, [r5, #0x14]
-	add r0, r0, #1
-	cmp r0, r1
-	bgt _0226475C
-	str r0, [r5, #0x10]
-	mov r0, #0
-	pop {r4, r5, r6, pc}
-_0226475C:
-	str r1, [r5, #0x10]
-	mov r0, #1
-	pop {r4, r5, r6, pc}
-	; .align 2, 0
-	thumb_func_end ov116_022646FC
-
-	thumb_func_start ov116_02264764
-ov116_02264764: ; 0x02264764
-	str r1, [r0, #0]
-	str r1, [r0, #4]
-	sub r1, r2, r1
-	str r1, [r0, #0xc]
-	mov r1, #0
-	str r1, [r0, #0x10]
-	str r3, [r0, #0x14]
-	bx lr
-	thumb_func_end ov116_02264764
-
-	thumb_func_start ov116_02264774
-ov116_02264774: ; 0x02264774
-	push {r3, r4, r5, lr}
-	add r5, r0, #0
-	ldr r2, [r5, #0x14]
-	ldr r0, [r5, #0x10]
-	cmp r0, r2
-	blt _02264784
-	mov r4, #1
-	b _0226478C
-_02264784:
-	add r2, r0, #0
-	add r0, r0, #1
-	str r0, [r5, #0x10]
-	mov r4, #0
-_0226478C:
-	ldr r0, [r5, #0xc]
-	lsl r2, r2, #0xc
-	asr r1, r0, #0x1f
-	asr r3, r2, #0x1f
-	bl _ull_mul
-	mov r2, #2
-	mov r3, #0
-	lsl r2, r2, #0xa
-	add r0, r0, r2
-	adc r1, r3
-	lsl r1, r1, #0x14
-	lsr r0, r0, #0xc
-	orr r0, r1
-	ldr r1, [r5, #0x14]
-	lsl r1, r1, #0xc
-	bl FX_Div
-	ldr r1, [r5, #4]
-	add r0, r0, r1
-	str r0, [r5, #0]
-	add r0, r4, #0
-	pop {r3, r4, r5, pc}
-	; .align 2, 0
-	thumb_func_end ov116_02264774
-
-	thumb_func_start ov116_022647BC
-ov116_022647BC: ; 0x022647BC
-	push {r4, r5, r6, r7, lr}
-	sub sp, #0x74
-	ldr r3, _0226492C ; =0x02267D74
-	add r6, r0, #0
-	mov r0, #1
-	str r1, [sp, #4]
-	str r0, [sp, #0x18]
-	add r2, sp, #0x3c
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	ldr r3, _02264930 ; =0x02267D8C
-	add r2, sp, #0x24
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	bl sub_0200F2AC
-	cmp r0, #0
-	beq _022647FE
-	ldr r0, [sp, #4]
-	add r0, #0xa4
-	ldr r0, [r0, #0]
-	add r0, #0x34
-	ldrb r0, [r0]
-	cmp r0, #1
-	bne _02264820
-_022647FE:
-	ldr r5, [sp, #4]
-	mov r4, #0
-_02264802:
-	ldr r0, [r5, #8]
-	bl sub_0200D0F4
-	add r4, r4, #1
-	add r5, r5, #4
-	cmp r4, #3
-	blt _02264802
-	ldr r0, [sp, #4]
-	mov r1, #0
-	str r1, [r0, #0]
-	add r0, r6, #0
-	bl sub_0200DA58
-	add sp, #0x74
-	pop {r4, r5, r6, r7, pc}
-_02264820:
-	ldr r0, [sp, #4]
-	ldr r0, [r0, #4]
-	cmp r0, #0
-	beq _0226482E
-	cmp r0, #1
-	beq _02264898
-	b _0226490A
-_0226482E:
-	mov r0, #0
-	str r0, [sp, #8]
-	ldr r0, [sp, #4]
-	add r7, sp, #0x3c
-	add r6, r0, #0
-	add r5, r0, #0
-	str r0, [sp, #0x10]
-	add r6, #0x14
-	add r4, sp, #0x24
-	add r5, #0x2c
-_02264842:
-	ldr r0, [sp, #0x10]
-	add r1, sp, #0x20
-	ldr r0, [r0, #8]
-	add r2, sp, #0x1c
-	bl sub_0200D638
-	ldr r1, [sp, #0x20]
-	mov r0, #8
-	str r0, [sp]
-	ldr r2, [r7, #0]
-	ldr r3, _02264934 ; =0x000004CD
-	add r0, r6, #0
-	add r2, r1, r2
-	bl ov116_0226469C
-	ldr r1, [sp, #0x1c]
-	mov r0, #8
-	str r0, [sp]
-	ldr r2, [r4, #0]
-	ldr r3, _02264938 ; =0x00000333
-	add r0, r5, #0
-	add r2, r1, r2
-	bl ov116_0226469C
-	ldr r0, [sp, #0x10]
-	add r7, r7, #4
-	add r0, r0, #4
-	str r0, [sp, #0x10]
-	ldr r0, [sp, #8]
-	add r6, #0x30
-	add r0, r0, #1
-	add r4, r4, #4
-	add r5, #0x30
-	str r0, [sp, #8]
-	cmp r0, #3
-	blt _02264842
-	ldr r0, [sp, #4]
-	ldr r0, [r0, #4]
-	add r1, r0, #1
-	ldr r0, [sp, #4]
-	add sp, #0x74
-	str r1, [r0, #4]
-	pop {r4, r5, r6, r7, pc}
-_02264898:
-	mov r0, #0
-	str r0, [sp, #0xc]
-	ldr r0, [sp, #4]
-	ldr r7, [sp, #4]
-	ldr r6, [sp, #4]
-	str r0, [sp, #0x14]
-	add r0, #0x14
-	str r0, [sp, #0x14]
-	add r4, sp, #0x54
-	add r7, #0x2c
-	add r5, r6, #0
-_022648AE:
-	ldr r0, [sp, #0x14]
-	bl ov116_022646FC
-	str r0, [r4, #0]
-	add r0, r7, #0
-	bl ov116_022646FC
-	str r0, [r4, #4]
-	ldr r0, [r5, #8]
-	ldr r1, [r6, #0x14]
-	ldr r2, [r6, #0x2c]
-	bl sub_0200D614
-	ldr r0, [r4, #0]
-	cmp r0, #0
-	beq _022648D4
-	ldr r0, [r4, #4]
-	cmp r0, #0
-	bne _022648D8
-_022648D4:
-	mov r0, #0
-	str r0, [sp, #0x18]
-_022648D8:
-	ldr r0, [r5, #8]
-	bl sub_0200D330
-	ldr r0, [sp, #0x14]
-	add r4, #8
-	add r0, #0x30
-	str r0, [sp, #0x14]
-	ldr r0, [sp, #0xc]
-	add r7, #0x30
-	add r0, r0, #1
-	add r6, #0x30
-	add r5, r5, #4
-	str r0, [sp, #0xc]
-	cmp r0, #3
-	blt _022648AE
-	ldr r0, [sp, #0x18]
-	cmp r0, #0
-	beq _02264928
-	ldr r0, [sp, #4]
-	ldr r0, [r0, #4]
-	add r1, r0, #1
-	ldr r0, [sp, #4]
-	add sp, #0x74
-	str r1, [r0, #4]
-	pop {r4, r5, r6, r7, pc}
-_0226490A:
-	ldr r4, [sp, #4]
-	mov r5, #0
-_0226490E:
-	ldr r0, [r4, #8]
-	bl sub_0200D0F4
-	add r5, r5, #1
-	add r4, r4, #4
-	cmp r5, #3
-	blt _0226490E
-	ldr r0, [sp, #4]
-	mov r1, #0
-	str r1, [r0, #0]
-	add r0, r6, #0
-	bl sub_0200DA58
-_02264928:
-	add sp, #0x74
-	pop {r4, r5, r6, r7, pc}
-	; .align 2, 0
-_0226492C: .word 0x02267D74
-_02264930: .word 0x02267D8C
-_02264934: .word 0x000004CD
-_02264938: .word 0x00000333
-	thumb_func_end ov116_022647BC
-
-	thumb_func_start ov116_0226493C
-ov116_0226493C: ; 0x0226493C
-	push {r4, r5, r6, r7, lr}
-	sub sp, #0x14
-	str r0, [sp]
-	str r1, [sp, #4]
-	ldr r3, [sp]
-	ldr r1, _022649D4 ; =0x00002490
-	add r5, r2, #0
-	mov r0, #0
-_0226494C:
-	ldr r2, [r3, r1]
-	cmp r2, #1
-	beq _022649C8
-	mov r1, #0xa8
-	mul r1, r0
-	str r1, [sp, #0xc]
-	ldr r1, [sp]
-	mov r7, #0
-	ldr r3, [r1, #0x14]
-	add r2, r1, #0
-	ldr r1, [sp, #0xc]
-	add r6, r7, #0
-	add r4, r2, r1
-	ldr r2, _022649D8 ; =0x00002534
-	add r1, r2, #0
-	str r3, [r4, r2]
-	sub r1, #0xa0
-	str r7, [r4, r1]
-	ldr r1, [sp]
-	sub r2, #0xa4
-	add r1, r1, r2
-	str r1, [sp, #0x10]
-	add r2, r1, #0
-	ldr r1, [sp, #0xc]
-	mov r3, #1
-	str r3, [r2, r1]
-	add r1, r0, #1
-	ldr r0, [sp, #4]
-	mul r1, r0
-	str r1, [sp, #8]
-_02264988:
-	ldr r0, [sp]
-	ldr r1, [sp, #4]
-	add r2, r5, #0
-	bl ov116_022626E8
-	ldr r1, _022649DC ; =0x00002498
-	str r0, [r4, r1]
-	ldr r0, [sp, #8]
-	add r1, r6, r5
-	add r0, r0, r1
-	mov r1, #3
-	bl _s32_div_f
-	ldr r0, _022649DC ; =0x00002498
-	ldr r0, [r4, r0]
-	bl sub_0200D364
-	add r7, r7, #1
-	add r4, r4, #4
-	add r6, r6, r5
-	cmp r7, #3
-	blt _02264988
-	ldr r2, [sp, #0x10]
-	ldr r1, [sp, #0xc]
-	ldr r0, _022649E0 ; =ov116_022647BC
-	add r1, r2, r1
-	mov r2, #1
-	lsl r2, r2, #0xc
-	bl sub_0200D9E8
-	add sp, #0x14
-	pop {r4, r5, r6, r7, pc}
-_022649C8:
-	add r0, r0, #1
-	add r3, #0xa8
-	cmp r0, #8
-	blt _0226494C
-	add sp, #0x14
-	pop {r4, r5, r6, r7, pc}
-	; .align 2, 0
-_022649D4: .word 0x00002490
-_022649D8: .word 0x00002534
-_022649DC: .word 0x00002498
-_022649E0: .word ov116_022647BC
-	thumb_func_end ov116_0226493C
-
-	thumb_func_start ov116_022649E4
-ov116_022649E4: ; 0x022649E4
-	push {r3, r4, r5, r6, r7, lr}
-	sub sp, #0x30
-	add r4, r0, #0
-	ldr r0, [r1, #0]
-	str r1, [sp]
-	ldr r5, [r0, #0x14]
-	bl sub_0200F2AC
-	cmp r0, #0
-	beq _02264A00
-	add r5, #0x34
-	ldrb r0, [r5]
-	cmp r0, #1
-	bne _02264A18
-_02264A00:
-	ldr r0, [sp]
-	mov r1, #0
-	ldr r0, [r0, #0x10]
-	str r1, [r0, #0]
-	add r0, r4, #0
-	bl sub_0200DA58
-	ldr r0, [sp]
-	bl sub_020181C4
-	add sp, #0x30
-	pop {r3, r4, r5, r6, r7, pc}
-_02264A18:
-	ldr r0, [sp]
-	ldr r0, [r0, #4]
-	cmp r0, #0
-	beq _02264A2C
-	cmp r0, #1
-	beq _02264A3A
-	cmp r0, #2
-	bne _02264A2A
-	b _02264C8A
-_02264A2A:
-	b _02264FC2
-_02264A2C:
-	ldr r0, [sp]
-	mov r1, #0
-	str r1, [r0, #0xc]
-	ldr r0, [r0, #4]
-	add r1, r0, #1
-	ldr r0, [sp]
-	str r1, [r0, #4]
-_02264A3A:
-	ldr r3, _02264D78 ; =0x02267D60
-	add r2, sp, #0x1c
-	mov r1, #0xa
-_02264A40:
-	ldrh r0, [r3]
-	add r3, r3, #2
-	strh r0, [r2]
-	add r2, r2, #2
-	sub r1, r1, #1
-	bne _02264A40
-	ldr r0, [sp]
-	mov r5, #0
-	ldr r0, [r0, #0xc]
-	mov r6, #0x3f
-	lsl r1, r0, #2
-	add r0, sp, #0x1c
-	ldrsh r0, [r0, r1]
-	str r5, [sp, #0xc]
-	lsl r6, r6, #0x18
-	str r0, [sp, #0x18]
-	add r0, sp, #0x1c
-	add r0, #2
-	ldrsh r0, [r0, r1]
-	str r0, [sp, #0x14]
-	ldr r0, [sp]
-	str r5, [r0, #8]
-	add r4, r0, #0
-	ldr r0, [sp, #0x18]
-	lsl r0, r0, #0xc
-	str r0, [sp, #8]
-	ldr r0, [sp, #0x14]
-	lsl r0, r0, #0xc
-	str r0, [sp, #4]
-_02264A7A:
-	lsr r2, r5, #0x1f
-	lsl r1, r5, #0x1f
-	sub r1, r1, r2
-	mov r0, #0x1f
-	ror r1, r0
-	add r0, r4, #0
-	add r1, r2, r1
-	add r0, #0x3a
-	strb r1, [r0]
-	add r0, r5, #0
-	mov r1, #3
-	bl _s32_div_f
-	add r7, r1, #0
-	mov r0, #6
-	sub r0, r0, r7
-	lsl r0, r0, #0x10
-	asr r1, r0, #0x10
-	add r0, r4, #0
-	add r0, #0x42
-	strh r1, [r0]
-	add r0, r4, #0
-	add r0, #0x44
-	strh r1, [r0]
-	ldr r0, [sp]
-	ldr r1, [r0, #0]
-	ldr r0, [sp, #0xc]
-	add r0, r1, r0
-	ldr r0, [r0, #0x40]
-	mov r1, #3
-	str r0, [r4, #0x14]
-	add r0, r5, #0
-	bl _s32_div_f
-	mov r1, #0x1e
-	mul r1, r0
-	str r1, [r4, #0x3c]
-	add r0, r1, #0
-	mov r1, #0x5a
-	lsl r1, r1, #2
-	bl _s32_div_f
-	str r1, [r4, #0x3c]
-	add r1, r4, #0
-	add r1, #0x40
-	mov r0, #0
-	strh r0, [r1]
-	lsl r0, r7, #1
-	neg r1, r0
-	add r0, r4, #0
-	add r0, #0x46
-	strh r1, [r0]
-	ldr r0, [sp, #0x18]
-	cmp r0, #0
-	beq _02264AF8
-	ldr r0, [sp, #8]
-	bl _f_utof
-	add r1, r0, #0
-	add r0, r6, #0
-	bl _f_add
-	b _02264B04
-_02264AF8:
-	ldr r0, [sp, #8]
-	bl _f_utof
-	add r1, r6, #0
-	bl _f_sub
-_02264B04:
-	bl _f_ftoi
-	str r0, [r4, #0x20]
-	ldr r0, [sp, #0x14]
-	cmp r0, #0
-	beq _02264B20
-	ldr r0, [sp, #4]
-	bl _f_utof
-	add r1, r0, #0
-	add r0, r6, #0
-	bl _f_add
-	b _02264B2C
-_02264B20:
-	ldr r0, [sp, #4]
-	bl _f_utof
-	add r1, r6, #0
-	bl _f_sub
-_02264B2C:
-	bl _f_ftoi
-	str r0, [r4, #0x24]
-	mov r0, #0
-	str r0, [r4, #0x30]
-	str r0, [r4, #0x34]
-	str r0, [r4, #0x18]
-	str r0, [r4, #0x1c]
-	str r0, [r4, #0x28]
-	add r1, r4, #0
-	str r0, [r4, #0x2c]
-	add r1, #0x38
-	strb r0, [r1]
-	add r1, r4, #0
-	add r1, #0x39
-	mov r0, #1
-	strb r0, [r1]
-	add r1, r4, #0
-	add r1, #0x3b
-	mov r0, #0
-	strb r0, [r1]
-	ldr r0, [r4, #0x3c]
-	cmp r0, #0xb4
-	bne _02264B64
-	add r1, r4, #0
-	add r1, #0x38
-	mov r0, #2
-	strb r0, [r1]
-_02264B64:
-	ldr r1, [r4, #0x3c]
-	ldr r0, _02264D7C ; =0x0000010E
-	cmp r1, r0
-	blt _02264B78
-	cmp r1, #0x5a
-	bgt _02264B78
-	add r1, r4, #0
-	add r1, #0x38
-	mov r0, #1
-	strb r0, [r1]
-_02264B78:
-	mov r0, #0x42
-	ldrsh r0, [r4, r0]
-	cmp r0, #0
-	ble _02264B90
-	lsl r0, r0, #0xc
-	bl _f_itof
-	add r1, r0, #0
-	add r0, r6, #0
-	bl _f_add
-	b _02264B9C
-_02264B90:
-	lsl r0, r0, #0xc
-	bl _f_itof
-	add r1, r6, #0
-	bl _f_sub
-_02264B9C:
-	bl _f_ftoi
-	add r7, r0, #0
-	ldr r0, [r4, #0x3c]
-	lsl r0, r0, #0x10
-	lsr r0, r0, #0x10
-	bl sub_0201D250
-	asr r1, r0, #0x1f
-	asr r3, r7, #0x1f
-	add r2, r7, #0
-	bl _ull_mul
-	mov r2, #2
-	lsl r2, r2, #0xa
-	add r2, r0, r2
-	ldr r0, _02264D80 ; =0x00000000
-	adc r1, r0
-	lsl r0, r1, #0x14
-	lsr r1, r2, #0xc
-	orr r1, r0
-	str r1, [r4, #0x30]
-	mov r0, #0x44
-	ldrsh r0, [r4, r0]
-	cmp r0, #0
-	ble _02264BE0
-	lsl r0, r0, #0xc
-	bl _f_itof
-	add r1, r0, #0
-	add r0, r6, #0
-	bl _f_add
-	b _02264BEC
-_02264BE0:
-	lsl r0, r0, #0xc
-	bl _f_itof
-	add r1, r6, #0
-	bl _f_sub
-_02264BEC:
-	bl _f_ftoi
-	add r7, r0, #0
-	ldr r0, [r4, #0x3c]
-	lsl r0, r0, #0x10
-	lsr r0, r0, #0x10
-	bl sub_0201D264
-	asr r1, r0, #0x1f
-	asr r3, r7, #0x1f
-	add r2, r7, #0
-	bl _ull_mul
-	mov r2, #2
-	lsl r2, r2, #0xa
-	add r2, r0, r2
-	ldr r0, _02264D80 ; =0x00000000
-	adc r1, r0
-	lsl r0, r1, #0x14
-	lsr r1, r2, #0xc
-	orr r1, r0
-	str r1, [r4, #0x34]
-	mov r0, #0x40
-	ldrsh r0, [r4, r0]
-	cmp r0, #0
-	ble _02264C30
-	lsl r0, r0, #0xc
-	bl _f_itof
-	add r1, r0, #0
-	add r0, r6, #0
-	bl _f_add
-	b _02264C3C
-_02264C30:
-	lsl r0, r0, #0xc
-	bl _f_itof
-	add r1, r6, #0
-	bl _f_sub
-_02264C3C:
-	bl _f_ftoi
-	ldr r1, [r4, #0x1c]
-	add r0, r1, r0
-	str r0, [r4, #0x1c]
-	ldr r2, [r4, #0x28]
-	ldr r1, [r4, #0x20]
-	mov ip, r0
-	add r1, r2, r1
-	ldr r7, [r4, #0x30]
-	ldr r3, [r4, #0x18]
-	add r1, r7, r1
-	add r1, r3, r1
-	ldr r3, [r4, #0x2c]
-	ldr r2, [r4, #0x24]
-	ldr r7, [r4, #0x34]
-	add r2, r3, r2
-	add r2, r7, r2
-	mov r3, ip
-	add r2, r3, r2
-	mov r3, #0xe
-	ldr r0, [r4, #0x14]
-	lsl r3, r3, #0x10
-	bl sub_0200D650
-	ldr r0, [sp, #0xc]
-	add r5, r5, #1
-	add r0, r0, #4
-	add r4, #0x34
-	str r0, [sp, #0xc]
-	cmp r5, #0x24
-	bge _02264C7E
-	b _02264A7A
-_02264C7E:
-	ldr r0, [sp]
-	ldr r0, [r0, #4]
-	add r1, r0, #1
-	ldr r0, [sp]
-	str r1, [r0, #4]
-	b _02264FDA
-_02264C8A:
-	ldr r0, [sp]
-	ldr r0, [r0, #8]
-	cmp r0, #0
-	bne _02264CA8
-	add r1, r0, #1
-	ldr r0, [sp]
-	mov r2, #0
-	str r1, [r0, #8]
-	ldr r0, [r0, #0]
-	mov r1, #1
-	bl ov116_02261E0C
-	ldr r0, _02264D84 ; =0x00000573
-	bl sub_02005748
-_02264CA8:
-	ldr r0, [sp]
-	ldr r0, [r0, #8]
-	cmp r0, #0x1e
-	ble _02264CD4
-	ldr r0, [sp]
-	mov r1, #1
-	str r1, [r0, #4]
-	ldr r0, [r0, #0xc]
-	ldr r1, [sp]
-	add r0, r0, #1
-	str r0, [r1, #0xc]
-	mov r1, #5
-	bl _s32_div_f
-	ldr r0, [sp]
-	mov r2, #1
-	str r1, [r0, #0xc]
-	ldr r0, [r0, #0]
-	mov r1, #0
-	bl ov116_02261E0C
-	b _02264FAC
-_02264CD4:
-	add r1, r0, #1
-	ldr r0, [sp]
-	mov r4, #0x3f
-	str r1, [r0, #8]
-	mov r0, #0
-	ldr r5, [sp]
-	str r0, [sp, #0x10]
-	lsl r4, r4, #0x18
-_02264CE4:
-	mov r0, #0x46
-	ldrsh r0, [r5, r0]
-	add r1, r0, #1
-	add r0, r5, #0
-	add r0, #0x46
-	strh r1, [r0]
-	mov r0, #0x46
-	ldrsh r1, [r5, r0]
-	cmp r1, #0
-	bge _02264CFA
-	b _02264F9E
-_02264CFA:
-	add r0, r5, #0
-	add r0, #0x3a
-	ldrb r0, [r0]
-	add r0, #0xa
-	cmp r1, r0
-	blt _02264DB2
-	cmp r1, r0
-	bne _02264D12
-	ldr r0, [r5, #0x14]
-	mov r1, #0
-	bl sub_0200D364
-_02264D12:
-	mov r0, #0x46
-	ldrsh r1, [r5, r0]
-	add r0, r5, #0
-	add r0, #0x3a
-	ldrb r0, [r0]
-	add r0, #0x12
-	cmp r1, r0
-	bne _02264D2C
-	add r1, r5, #0
-	add r1, #0x39
-	mov r0, #0
-	strb r0, [r1]
-	b _02264D4A
-_02264D2C:
-	lsr r2, r1, #0x1f
-	lsl r1, r1, #0x1f
-	sub r1, r1, r2
-	mov r0, #0x1f
-	ror r1, r0
-	add r0, r2, r1
-	beq _02264D4A
-	add r0, r5, #0
-	add r0, #0x39
-	ldrb r1, [r0]
-	mov r0, #1
-	eor r1, r0
-	add r0, r5, #0
-	add r0, #0x39
-	strb r1, [r0]
-_02264D4A:
-	add r1, r5, #0
-	add r1, #0x39
-	ldrb r1, [r1]
-	ldr r0, [r5, #0x14]
-	bl sub_0200D3F4
-	add r0, r5, #0
-	add r0, #0x3b
-	ldrb r0, [r0]
-	cmp r0, #0
-	beq _02264D6A
-	cmp r0, #1
-	beq _02264D70
-	cmp r0, #2
-	beq _02264D8C
-	b _02264D92
-_02264D6A:
-	ldr r0, _02264D88 ; =0xFFFFF000
-	str r0, [r5, #0x28]
-	b _02264D92
-_02264D70:
-	mov r0, #0
-	str r0, [r5, #0x28]
-	b _02264D92
-	nop
-_02264D78: .word 0x02267D60
-_02264D7C: .word 0x0000010E
-_02264D80: .word 0x00000000
-_02264D84: .word 0x00000573
-_02264D88: .word 0xFFFFF000
-_02264D8C:
-	mov r0, #1
-	lsl r0, r0, #0xc
-	str r0, [r5, #0x28]
-_02264D92:
-	add r0, r5, #0
-	add r0, #0x3b
-	ldrb r0, [r0]
-	add r1, r0, #1
-	add r0, r5, #0
-	add r0, #0x3b
-	strb r1, [r0]
-	add r0, r5, #0
-	add r0, #0x3b
-	ldrb r0, [r0]
-	mov r1, #3
-	bl _s32_div_f
-	add r0, r5, #0
-	add r0, #0x3b
-	strb r1, [r0]
-_02264DB2:
-	mov r0, #0x46
-	ldrsh r1, [r5, r0]
-	cmp r1, #5
-	ble _02264DFA
-	add r0, r5, #0
-	add r0, #0x38
-	ldrb r0, [r0]
-	cmp r0, #0
-	beq _02264DEC
-	cmp r0, #1
-	beq _02264DDC
-	cmp r0, #2
-	bne _02264DFA
-	add r0, r1, #5
-	mov r1, #6
-	bl _s32_div_f
-	add r1, r5, #0
-	add r1, #0x40
-	strh r0, [r1]
-	b _02264DFA
-_02264DDC:
-	add r0, r1, #5
-	mov r1, #6
-	bl _s32_div_f
-	add r1, r5, #0
-	add r1, #0x40
-	strh r0, [r1]
-	b _02264DFA
-_02264DEC:
-	add r0, r1, #5
-	mov r1, #7
-	bl _s32_div_f
-	add r1, r5, #0
-	add r1, #0x40
-	strh r0, [r1]
-_02264DFA:
-	add r0, r5, #0
-	add r0, #0x38
-	ldrb r0, [r0]
-	cmp r0, #0
-	beq _02264E58
-	cmp r0, #1
-	beq _02264E32
-	cmp r0, #2
-	bne _02264E32
-	mov r0, #0x46
-	ldrsh r0, [r5, r0]
-	mov r1, #0x1e
-	add r2, r0, #5
-	sub r2, r1, r2
-	asr r1, r2, #2
-	lsr r1, r1, #0x1d
-	add r1, r2, r1
-	add r2, r0, #7
-	mov r0, #0x1e
-	sub r2, r0, r2
-	asr r0, r2, #2
-	lsr r0, r0, #0x1d
-	add r0, r2, r0
-	lsl r1, r1, #0xd
-	lsl r0, r0, #0xd
-	asr r1, r1, #0x10
-	asr r0, r0, #0x10
-	b _02264E7C
-_02264E32:
-	mov r0, #0x46
-	ldrsh r0, [r5, r0]
-	mov r1, #0x1e
-	add r2, r0, #5
-	sub r2, r1, r2
-	asr r1, r2, #2
-	lsr r1, r1, #0x1d
-	add r1, r2, r1
-	add r2, r0, #6
-	mov r0, #0x1e
-	sub r2, r0, r2
-	asr r0, r2, #2
-	lsr r0, r0, #0x1d
-	add r0, r2, r0
-	lsl r1, r1, #0xd
-	lsl r0, r0, #0xd
-	asr r1, r1, #0x10
-	asr r0, r0, #0x10
-	b _02264E7C
-_02264E58:
-	mov r0, #0x46
-	ldrsh r0, [r5, r0]
-	mov r1, #0x1e
-	add r2, r0, #5
-	sub r2, r1, r2
-	asr r1, r2, #2
-	lsr r1, r1, #0x1d
-	add r1, r2, r1
-	add r2, r0, #4
-	mov r0, #0x1e
-	sub r2, r0, r2
-	asr r0, r2, #2
-	lsr r0, r0, #0x1d
-	add r0, r2, r0
-	lsl r1, r1, #0xd
-	lsl r0, r0, #0xd
-	asr r1, r1, #0x10
-	asr r0, r0, #0x10
-_02264E7C:
-	cmp r1, #0
-	ble _02264E88
-	mov r2, #0x42
-	ldrsh r2, [r5, r2]
-	add r2, r2, r1
-	b _02264E8E
-_02264E88:
-	mov r1, #0x42
-	ldrsh r1, [r5, r1]
-	add r2, r1, #1
-_02264E8E:
-	add r1, r5, #0
-	add r1, #0x42
-	strh r2, [r1]
-	cmp r0, #0
-	ble _02264EA0
-	mov r1, #0x44
-	ldrsh r1, [r5, r1]
-	add r1, r1, r0
-	b _02264EA6
-_02264EA0:
-	mov r0, #0x44
-	ldrsh r0, [r5, r0]
-	add r1, r0, #1
-_02264EA6:
-	add r0, r5, #0
-	add r0, #0x44
-	strh r1, [r0]
-	mov r0, #0x42
-	ldrsh r0, [r5, r0]
-	cmp r0, #0
-	ble _02264EC4
-	lsl r0, r0, #0xc
-	bl _f_itof
-	add r1, r0, #0
-	add r0, r4, #0
-	bl _f_add
-	b _02264ED0
-_02264EC4:
-	lsl r0, r0, #0xc
-	bl _f_itof
-	add r1, r4, #0
-	bl _f_sub
-_02264ED0:
-	bl _f_ftoi
-	add r6, r0, #0
-	ldr r0, [r5, #0x3c]
-	lsl r0, r0, #0x10
-	lsr r0, r0, #0x10
-	bl sub_0201D250
-	asr r1, r0, #0x1f
-	asr r3, r6, #0x1f
-	add r2, r6, #0
-	bl _ull_mul
-	mov r2, #2
-	lsl r2, r2, #0xa
-	add r2, r0, r2
-	ldr r0, _02264FE8 ; =0x00000000
-	adc r1, r0
-	lsl r0, r1, #0x14
-	lsr r1, r2, #0xc
-	orr r1, r0
-	str r1, [r5, #0x30]
-	mov r0, #0x44
-	ldrsh r0, [r5, r0]
-	cmp r0, #0
-	ble _02264F14
-	lsl r0, r0, #0xc
-	bl _f_itof
-	add r1, r0, #0
-	add r0, r4, #0
-	bl _f_add
-	b _02264F20
-_02264F14:
-	lsl r0, r0, #0xc
-	bl _f_itof
-	add r1, r4, #0
-	bl _f_sub
-_02264F20:
-	bl _f_ftoi
-	add r6, r0, #0
-	ldr r0, [r5, #0x3c]
-	lsl r0, r0, #0x10
-	lsr r0, r0, #0x10
-	bl sub_0201D264
-	asr r1, r0, #0x1f
-	asr r3, r6, #0x1f
-	add r2, r6, #0
-	bl _ull_mul
-	mov r2, #2
-	lsl r2, r2, #0xa
-	add r2, r0, r2
-	ldr r0, _02264FE8 ; =0x00000000
-	adc r1, r0
-	lsl r0, r1, #0x14
-	lsr r1, r2, #0xc
-	orr r1, r0
-	str r1, [r5, #0x34]
-	mov r0, #0x40
-	ldrsh r0, [r5, r0]
-	cmp r0, #0
-	ble _02264F64
-	lsl r0, r0, #0xc
-	bl _f_itof
-	add r1, r0, #0
-	add r0, r4, #0
-	bl _f_add
-	b _02264F70
-_02264F64:
-	lsl r0, r0, #0xc
-	bl _f_itof
-	add r1, r4, #0
-	bl _f_sub
-_02264F70:
-	bl _f_ftoi
-	ldr r1, [r5, #0x1c]
-	add r7, r1, r0
-	str r7, [r5, #0x1c]
-	ldr r2, [r5, #0x28]
-	ldr r1, [r5, #0x20]
-	ldr r3, [r5, #0x30]
-	add r1, r2, r1
-	add r1, r3, r1
-	ldr r6, [r5, #0x18]
-	ldr r3, [r5, #0x2c]
-	ldr r2, [r5, #0x24]
-	add r1, r6, r1
-	add r2, r3, r2
-	ldr r6, [r5, #0x34]
-	mov r3, #0xe
-	add r2, r6, r2
-	ldr r0, [r5, #0x14]
-	add r2, r7, r2
-	lsl r3, r3, #0x10
-	bl sub_0200D650
-_02264F9E:
-	ldr r0, [sp, #0x10]
-	add r5, #0x34
-	add r0, r0, #1
-	str r0, [sp, #0x10]
-	cmp r0, #0x24
-	bge _02264FAC
-	b _02264CE4
-_02264FAC:
-	ldr r0, [sp]
-	ldr r0, [r0, #0x10]
-	ldr r0, [r0, #0]
-	cmp r0, #0
-	beq _02264FDA
-	ldr r0, [sp]
-	ldr r0, [r0, #4]
-	add r1, r0, #1
-	ldr r0, [sp]
-	str r1, [r0, #4]
-	b _02264FDA
-_02264FC2:
-	ldr r0, [sp]
-	mov r1, #0
-	ldr r0, [r0, #0]
-	add r2, r1, #0
-	bl ov116_02261E0C
-	ldr r0, [sp]
-	bl sub_020181C4
-	add r0, r4, #0
-	bl sub_0200DA58
-_02264FDA:
-	ldr r0, [sp]
-	ldr r0, [r0, #0]
-	bl ov116_02261E28
-	add sp, #0x30
-	pop {r3, r4, r5, r6, r7, pc}
-	nop
-_02264FE8: .word 0x00000000
-	thumb_func_end ov116_022649E4
-
-	thumb_func_start ov116_02264FEC
-ov116_02264FEC: ; 0x02264FEC
-	push {r3, r4, r5, lr}
-	add r4, r1, #0
-	add r5, r0, #0
-	ldr r1, _02265014 ; =0x00000764
-	mov r0, #0x6a
-	bl sub_02018144
-	add r1, r0, #0
-	mov r2, #1
-	str r5, [r1, #0]
-	mov r0, #0
-	str r0, [r1, #4]
-	str r0, [r1, #8]
-	ldr r0, _02265018 ; =ov116_022649E4
-	lsl r2, r2, #0xc
-	str r4, [r1, #0x10]
-	bl sub_0200D9E8
-	pop {r3, r4, r5, pc}
-	nop
-_02265014: .word 0x00000764
-_02265018: .word ov116_022649E4
-	thumb_func_end ov116_02264FEC
-
-	thumb_func_start ov116_0226501C
-ov116_0226501C: ; 0x0226501C
-	push {r3, r4, r5, r6, r7, lr}
-	add r4, r0, #0
-	ldr r1, [r4, #4]
-	ldr r0, [r4, #8]
-	ldr r5, [r4, #0xc]
-	ldr r6, [r4, #0x14]
-	ldr r7, [r4, #0x10]
-	cmp r1, #0
-	beq _0226510A
-	ldr r1, [r4, #0]
-	cmp r1, #3
-	bhi _022650FE
-	add r1, r1, r1
-	add r1, pc
-	ldrh r1, [r1, #6]
-	lsl r1, r1, #0x10
-	asr r1, r1, #0x10
-	add pc, r1
-_02265040: ; jump table
-	.short _02265048 - _02265040 - 2 ; case 0
-	.short _0226508E - _02265040 - 2 ; case 1
-	.short _022650A0 - _02265040 - 2 ; case 2
-	.short _022650B8 - _02265040 - 2 ; case 3
-_02265048:
-	ldr r0, [r5, #0]
-	cmp r0, #4
-	bge _02265054
-	add r0, r0, #1
-	str r0, [r5, #0]
-	b _0226505E
-_02265054:
-	mov r0, #4
-	str r0, [r5, #0]
-	ldr r0, [r4, #0]
-	add r0, r0, #1
-	str r0, [r4, #0]
-_0226505E:
-	mov r1, #0
-	str r1, [sp]
-	ldr r4, [r5, #0]
-	ldr r3, [r6, #0]
-	add r0, r7, #0
-	add r3, r4, r3
-	lsl r3, r3, #0x18
-	mov r2, #1
-	lsr r3, r3, #0x18
-	bl sub_02003A2C
-	mov r0, #0
-	str r0, [sp]
-	mov r1, #1
-	ldr r4, [r5, #0]
-	ldr r3, [r6, #0]
-	add r0, r7, #0
-	add r3, r4, r3
-	lsl r3, r3, #0x18
-	add r2, r1, #0
-	lsr r3, r3, #0x18
-	bl sub_02003A2C
-	pop {r3, r4, r5, r6, r7, pc}
-_0226508E:
-	mov r1, #1
-	bl sub_02017348
-	mov r0, #0
-	str r0, [r4, #0x28]
-	ldr r0, [r4, #0]
-	add r0, r0, #1
-	str r0, [r4, #0]
-	pop {r3, r4, r5, r6, r7, pc}
-_022650A0:
-	ldr r0, [r4, #0x50]
-	cmp r0, #1
-	bne _0226510A
-	ldr r0, [r4, #0x28]
-	add r0, r0, #1
-	str r0, [r4, #0x28]
-	cmp r0, #0xf
-	blt _0226510A
-	ldr r0, [r4, #0]
-	add r0, r0, #1
-	str r0, [r4, #0]
-	pop {r3, r4, r5, r6, r7, pc}
-_022650B8:
-	ldr r0, [r5, #0]
-	cmp r0, #0
-	ble _022650C4
-	sub r0, r0, #1
-	str r0, [r5, #0]
-	b _022650CE
-_022650C4:
-	mov r0, #0
-	str r0, [r5, #0]
-	ldr r0, [r4, #0]
-	add r0, r0, #1
-	str r0, [r4, #0]
-_022650CE:
-	mov r1, #0
-	str r1, [sp]
-	ldr r4, [r5, #0]
-	ldr r3, [r6, #0]
-	add r0, r7, #0
-	add r3, r4, r3
-	lsl r3, r3, #0x18
-	mov r2, #1
-	lsr r3, r3, #0x18
-	bl sub_02003A2C
-	mov r0, #0
-	str r0, [sp]
-	mov r1, #1
-	ldr r4, [r5, #0]
-	ldr r3, [r6, #0]
-	add r0, r7, #0
-	add r3, r4, r3
-	lsl r3, r3, #0x18
-	add r2, r1, #0
-	lsr r3, r3, #0x18
-	bl sub_02003A2C
-	pop {r3, r4, r5, r6, r7, pc}
-_022650FE:
-	mov r1, #0
-	str r1, [r4, #0x50]
-	str r1, [r4, #4]
-	str r1, [r4, #0]
-	bl sub_02017348
-_0226510A:
-	pop {r3, r4, r5, r6, r7, pc}
-	thumb_func_end ov116_0226501C
-
-	thumb_func_start ov116_0226510C
-ov116_0226510C: ; 0x0226510C
-	push {r3, r4, r5, r6, r7, lr}
-	sub sp, #0x30
-	add r5, r0, #0
-	ldr r0, _02265258 ; =0x02267D08
-	add r3, sp, #0x20
-	ldrh r1, [r0]
-	add r6, sp, #0x14
-	ldr r2, _0226525C ; =0x02267D40
-	strh r1, [r6, #4]
-	ldrh r1, [r0, #2]
-	add r4, r3, #0
-	add r7, sp, #0x18
-	strh r1, [r6, #6]
-	ldrh r1, [r0, #4]
-	ldrh r0, [r0, #6]
-	strh r1, [r6, #8]
-	strh r0, [r6, #0xa]
-	ldmia r2!, {r0, r1}
-	stmia r3!, {r0, r1}
-	ldmia r2!, {r0, r1}
-	stmia r3!, {r0, r1}
-	ldr r0, [r5, #4]
-	cmp r0, #0
-	bne _0226513E
-	b _02265252
-_0226513E:
-	ldr r0, [r5, #0]
-	cmp r0, #0
-	beq _0226514E
-	cmp r0, #1
-	beq _022651BE
-	cmp r0, #2
-	beq _022651D6
-	b _02265236
-_0226514E:
-	mov r0, #0
-	str r0, [sp, #0x10]
-	str r5, [sp, #8]
-_02265154:
-	ldr r0, [sp, #8]
-	ldr r0, [r0, #8]
-	str r0, [sp, #0xc]
-	cmp r0, #0
-	beq _02265188
-	add r1, sp, #0x14
-	add r1, #2
-	add r2, sp, #0x14
-	bl sub_0200D550
-	mov r0, #0
-	ldrsh r1, [r6, r0]
-	ldrsh r0, [r7, r0]
-	cmp r1, r0
-	ble _02265188
-	sub r0, r1, #6
-	strh r0, [r6]
-	mov r1, #2
-	mov r2, #0
-	ldrsh r1, [r6, r1]
-	ldrsh r2, [r6, r2]
-	ldr r0, [sp, #0xc]
-	bl sub_0200D4C4
-	mov r0, #0
-	str r0, [r4, #0]
-_02265188:
-	ldr r0, [sp, #8]
-	add r7, r7, #2
-	add r0, r0, #4
-	str r0, [sp, #8]
-	ldr r0, [sp, #0x10]
-	add r4, r4, #4
-	add r0, r0, #1
-	str r0, [sp, #0x10]
-	cmp r0, #4
-	blt _02265154
-	ldr r0, [sp, #0x20]
-	cmp r0, #0
-	beq _0226523E
-	ldr r0, [sp, #0x24]
-	cmp r0, #0
-	beq _0226523E
-	ldr r0, [sp, #0x28]
-	cmp r0, #0
-	beq _0226523E
-	beq _0226523E
-	mov r0, #0
-	str r0, [r5, #0x28]
-	str r0, [r5, #0x50]
-	ldr r0, [r5, #0]
-	add r0, r0, #1
-	str r0, [r5, #0]
-	b _0226523E
-_022651BE:
-	ldr r0, [r5, #0x50]
-	cmp r0, #1
-	bne _0226523E
-	ldr r0, [r5, #0x28]
-	add r0, r0, #1
-	str r0, [r5, #0x28]
-	cmp r0, #0xf
-	blt _0226523E
-	ldr r0, [r5, #0]
-	add r0, r0, #1
-	str r0, [r5, #0]
-	b _0226523E
-_022651D6:
-	mov r0, #0
-	str r0, [sp, #4]
-	add r7, r5, #0
-_022651DC:
-	ldr r0, [r7, #8]
-	str r0, [sp]
-	cmp r0, #0
-	beq _0226520C
-	add r1, sp, #0x14
-	add r1, #2
-	add r2, sp, #0x14
-	bl sub_0200D550
-	mov r0, #0
-	ldrsh r0, [r6, r0]
-	cmp r0, #0xe0
-	bge _0226520C
-	add r0, r0, #6
-	strh r0, [r6]
-	mov r1, #2
-	mov r2, #0
-	ldrsh r1, [r6, r1]
-	ldrsh r2, [r6, r2]
-	ldr r0, [sp]
-	bl sub_0200D4C4
-	mov r0, #0
-	str r0, [r4, #0]
-_0226520C:
-	ldr r0, [sp, #4]
-	add r7, r7, #4
-	add r0, r0, #1
-	add r4, r4, #4
-	str r0, [sp, #4]
-	cmp r0, #4
-	blt _022651DC
-	ldr r0, [sp, #0x20]
-	cmp r0, #0
-	beq _0226523E
-	ldr r0, [sp, #0x24]
-	cmp r0, #0
-	beq _0226523E
-	ldr r0, [sp, #0x28]
-	cmp r0, #0
-	beq _0226523E
-	beq _0226523E
-	ldr r0, [r5, #0]
-	add r0, r0, #1
-	str r0, [r5, #0]
-	b _0226523E
-_02265236:
-	mov r0, #0
-	str r0, [r5, #0x50]
-	str r0, [r5, #4]
-	str r0, [r5, #0]
-_0226523E:
-	mov r4, #0
-_02265240:
-	ldr r0, [r5, #8]
-	cmp r0, #0
-	beq _0226524A
-	bl sub_0200D33C
-_0226524A:
-	add r4, r4, #1
-	add r5, r5, #4
-	cmp r4, #4
-	blt _02265240
-_02265252:
-	add sp, #0x30
-	pop {r3, r4, r5, r6, r7, pc}
-	nop
-_02265258: .word 0x02267D08
-_0226525C: .word 0x02267D40
-	thumb_func_end ov116_0226510C
-
-	thumb_func_start ov116_02265260
-ov116_02265260: ; 0x02265260
-	push {r3, r4, r5, r6, r7, lr}
-	str r0, [sp]
-	ldr r0, [r0, #4]
-	cmp r0, #0
-	beq _022652F2
-	ldr r0, [sp]
-	ldr r0, [r0, #0]
-	cmp r0, #0
-	beq _02265278
-	cmp r0, #1
-	beq _022652B2
-	b _022652D2
-_02265278:
-	mov r7, #0
-	ldr r4, [sp]
-	add r5, r7, #0
-_0226527E:
-	ldr r6, [r4, #8]
-	add r0, r5, #0
-	mov r1, #0x28
-	bl _s32_div_f
-	add r0, r6, #0
-	add r0, #0x88
-	bl sub_02017240
-	add r0, r6, #0
-	mov r1, #1
-	bl sub_02017348
-	add r7, r7, #1
-	add r4, r4, #4
-	add r5, #0x14
-	cmp r7, #8
-	blt _0226527E
-	ldr r0, [sp]
-	mov r1, #0
-	str r1, [r0, #0x4c]
-	ldr r0, [r0, #0]
-	add r1, r0, #1
-	ldr r0, [sp]
-	str r1, [r0, #0]
-	pop {r3, r4, r5, r6, r7, pc}
-_022652B2:
-	ldr r0, [sp]
-	ldr r0, [r0, #0x50]
-	cmp r0, #1
-	bne _022652F2
-	ldr r0, [sp]
-	ldr r0, [r0, #0x4c]
-	add r1, r0, #1
-	ldr r0, [sp]
-	cmp r1, #0xf
-	str r1, [r0, #0x4c]
-	blt _022652F2
-	ldr r0, [r0, #0]
-	add r1, r0, #1
-	ldr r0, [sp]
-	str r1, [r0, #0]
-	pop {r3, r4, r5, r6, r7, pc}
-_022652D2:
-	mov r5, #0
-	ldr r4, [sp]
-	add r6, r5, #0
-_022652D8:
-	ldr r0, [r4, #8]
-	add r1, r6, #0
-	bl sub_02017348
-	add r5, r5, #1
-	add r4, r4, #4
-	cmp r5, #8
-	blt _022652D8
-	ldr r0, [sp]
-	mov r1, #0
-	str r1, [r0, #0x50]
-	str r1, [r0, #4]
-	str r1, [r0, #0]
-_022652F2:
-	pop {r3, r4, r5, r6, r7, pc}
-	thumb_func_end ov116_02265260
-
-	thumb_func_start ov116_022652F4
-ov116_022652F4: ; 0x022652F4
-	push {r4, lr}
-	add r4, r0, #0
-	ldr r0, [r4, #4]
-	cmp r0, #0
-	beq _0226534A
-	ldr r0, [r4, #0]
-	cmp r0, #0
-	beq _0226530A
-	cmp r0, #1
-	beq _02265320
-	b _0226533C
-_0226530A:
-	add r1, r4, #0
-	ldr r0, [r4, #8]
-	add r1, #0x54
-	bl ov116_02264FEC
-	mov r0, #0
-	str r0, [r4, #0x28]
-	ldr r0, [r4, #0]
-	add r0, r0, #1
-	str r0, [r4, #0]
-	pop {r4, pc}
-_02265320:
-	ldr r0, [r4, #0x50]
-	cmp r0, #1
-	bne _0226534A
-	ldr r0, [r4, #0x28]
-	add r0, r0, #1
-	str r0, [r4, #0x28]
-	cmp r0, #0xf
-	blt _0226534A
-	mov r0, #1
-	str r0, [r4, #0x54]
-	ldr r0, [r4, #0]
-	add r0, r0, #1
-	str r0, [r4, #0]
-	pop {r4, pc}
-_0226533C:
-	ldr r0, [r4, #0x54]
-	cmp r0, #0
-	bne _0226534A
-	mov r0, #0
-	str r0, [r4, #0x50]
-	str r0, [r4, #4]
-	str r0, [r4, #0]
-_0226534A:
-	pop {r4, pc}
-	thumb_func_end ov116_022652F4
-
-	thumb_func_start ov116_0226534C
-ov116_0226534C: ; 0x0226534C
-	push {r4, r5, r6, lr}
-	add r6, r0, #0
-	mov r0, #0x99
-	add r4, r1, #0
-	lsl r0, r0, #2
-	ldr r5, [r4, r0]
-	bl sub_0200F2AC
-	cmp r0, #0
-	beq _02265368
-	add r5, #0x34
-	ldrb r0, [r5]
-	cmp r0, #1
-	bne _02265370
-_02265368:
-	add r0, r6, #0
-	bl sub_0200DA58
-	pop {r4, r5, r6, pc}
-_02265370:
-	ldr r0, [r4, #4]
-	ldr r0, [r0, #0]
-	cmp r0, #5
-	bhi _0226540C
-	add r1, r0, r0
-	add r1, pc
-	ldrh r1, [r1, #6]
-	lsl r1, r1, #0x10
-	asr r1, r1, #0x10
-	add pc, r1
-_02265384: ; jump table
-	.short _0226540C - _02265384 - 2 ; case 0
-	.short _022653FC - _02265384 - 2 ; case 1
-	.short _022653DC - _02265384 - 2 ; case 2
-	.short _022653C2 - _02265384 - 2 ; case 3
-	.short _022653A4 - _02265384 - 2 ; case 4
-	.short _02265390 - _02265384 - 2 ; case 5
-_02265390:
-	mov r0, #0x7b
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	cmp r1, #0
-	bne _022653A4
-	mov r1, #1
-	str r1, [r4, r0]
-	mov r1, #0
-	add r0, #0x4c
-	str r1, [r4, r0]
-_022653A4:
-	mov r0, #0x5d
-	lsl r0, r0, #2
-	ldr r0, [r4, r0]
-	cmp r0, #0
-	bne _022653C2
-	ldr r0, _02265468 ; =0x0000060F
-	bl sub_02005748
-	mov r0, #0x5d
-	mov r1, #1
-	lsl r0, r0, #2
-	str r1, [r4, r0]
-	mov r1, #0
-	add r0, #0x4c
-	str r1, [r4, r0]
-_022653C2:
-	add r0, r4, #0
-	add r0, #0xfc
-	ldr r0, [r0, #0]
-	cmp r0, #0
-	bne _022653DC
-	add r0, r4, #0
-	mov r1, #1
-	add r0, #0xfc
-	str r1, [r0, #0]
-	mov r0, #0x52
-	mov r1, #0
-	lsl r0, r0, #2
-	str r1, [r4, r0]
-_022653DC:
-	add r0, r4, #0
-	add r0, #0x84
-	ldr r0, [r0, #0]
-	cmp r0, #0
-	bne _022653FC
-	ldr r0, _0226546C ; =0x00000571
-	bl sub_02005748
-	add r0, r4, #0
-	mov r1, #1
-	add r0, #0x84
-	str r1, [r0, #0]
-	add r0, r4, #0
-	mov r1, #0
-	add r0, #0xd0
-	str r1, [r0, #0]
-_022653FC:
-	ldr r0, [r4, #0xc]
-	cmp r0, #0
-	bne _02265434
-	mov r0, #1
-	str r0, [r4, #0xc]
-	mov r0, #0
-	str r0, [r4, #0x58]
-	b _02265434
-_0226540C:
-	ldr r1, [r4, #0]
-	cmp r0, r1
-	beq _02265434
-	mov r2, #1
-	add r0, r4, #0
-	mov r1, #0x52
-	str r2, [r4, #0x58]
-	add r0, #0xd0
-	lsl r1, r1, #2
-	str r2, [r0, #0]
-	add r0, r1, #0
-	str r2, [r4, r1]
-	add r0, #0x78
-	str r2, [r4, r0]
-	add r1, #0xf0
-	str r2, [r4, r1]
-	ldr r0, _0226546C ; =0x00000571
-	mov r1, #0
-	bl sub_020057A4
-_02265434:
-	add r0, r4, #0
-	add r0, #8
-	bl ov116_0226501C
-	add r0, r4, #0
-	add r0, #0x80
-	bl ov116_0226510C
-	add r0, r4, #0
-	add r0, #0xf8
-	bl ov116_02265260
-	mov r0, #0x17
-	lsl r0, r0, #4
-	add r0, r4, r0
-	bl ov116_0226510C
-	mov r0, #0x7a
-	lsl r0, r0, #2
-	add r0, r4, r0
-	bl ov116_022652F4
-	ldr r0, [r4, #4]
-	ldr r0, [r0, #0]
-	str r0, [r4, #0]
-	pop {r4, r5, r6, pc}
-	; .align 2, 0
-_02265468: .word 0x0000060F
-_0226546C: .word 0x00000571
-	thumb_func_end ov116_0226534C
-
-	thumb_func_start ov116_02265470
-ov116_02265470: ; 0x02265470
-	push {r4, r5, r6, lr}
-	sub sp, #8
-	add r4, r0, #0
-	ldr r1, [r4, #0x14]
-	ldr r0, _022655C0 ; =0x0000248C
-	mov r6, #0
-	str r1, [r4, r0]
-	ldr r0, _022655C4 ; =0x00002AE8
-	add r1, r4, r0
-	ldr r0, _022655C8 ; =0x0000222C
-	str r1, [r4, r0]
-	ldr r1, [r4, r0]
-	ldr r2, [r1, #0]
-	sub r1, r0, #4
-	add r0, r0, #4
-	str r2, [r4, r1]
-	add r5, r4, r0
-_02265492:
-	mov r1, #0
-	str r1, [r5, #0]
-	str r1, [r5, #4]
-	cmp r6, #4
-	bhi _02265540
-	add r0, r6, r6
-	add r0, pc
-	ldrh r0, [r0, #6]
-	lsl r0, r0, #0x10
-	asr r0, r0, #0x10
-	add pc, r0
-_022654A8: ; jump table
-	.short _022654B2 - _022654A8 - 2 ; case 0
-	.short _022654CE - _022654A8 - 2 ; case 1
-	.short _02265528 - _022654A8 - 2 ; case 2
-	.short _02265542 - _022654A8 - 2 ; case 3
-	.short _0226559C - _022654A8 - 2 ; case 4
-_022654B2:
-	ldr r0, _022655CC ; =0x00000944
-	add r0, r4, r0
-	str r0, [r5, #8]
-	mov r0, #0x42
-	lsl r0, r0, #2
-	add r1, r4, r0
-	add r0, r0, #4
-	str r1, [r5, #0xc]
-	add r0, r4, r0
-	str r0, [r5, #0x14]
-	ldr r0, [r4, #0x14]
-	ldr r0, [r0, #0x14]
-	str r0, [r5, #0x10]
-	b _0226559E
-_022654CE:
-	add r0, r4, #0
-	add r0, #0xd0
-	ldr r0, [r0, #0]
-	add r2, sp, #4
-	str r0, [r5, #8]
-	add r0, r4, #0
-	add r0, #0xd4
-	ldr r0, [r0, #0]
-	str r0, [r5, #0xc]
-	str r1, [r5, #0x10]
-	add r0, r4, #0
-	str r1, [r5, #0x14]
-	add r0, #0xd0
-	add r1, sp, #4
-	ldr r0, [r0, #0]
-	add r1, #2
-	bl sub_0200D550
-	add r0, r4, #0
-	add r0, #0xd0
-	add r2, sp, #0
-	mov r1, #6
-	ldrsh r1, [r2, r1]
-	ldr r0, [r0, #0]
-	mov r2, #0xe0
-	bl sub_0200D4C4
-	add r0, r4, #0
-	add r0, #0xd4
-	add r1, sp, #4
-	ldr r0, [r0, #0]
-	add r1, #2
-	add r2, sp, #4
-	bl sub_0200D550
-	add r0, r4, #0
-	add r0, #0xd4
-	add r2, sp, #0
-	mov r1, #6
-	ldrsh r1, [r2, r1]
-	ldr r0, [r0, #0]
-	mov r2, #0xe0
-	bl sub_0200D4C4
-	b _0226559E
-_02265528:
-	mov r0, #0xb5
-	lsl r0, r0, #4
-	add r2, r4, r0
-	mov r0, #0x83
-	add r3, r5, #0
-	lsl r0, r0, #2
-_02265534:
-	add r1, r1, #1
-	str r2, [r3, #8]
-	add r2, r2, r0
-	add r3, r3, #4
-	cmp r1, #8
-	blt _02265534
-_02265540:
-	b _0226559E
-_02265542:
-	str r1, [r5, #8]
-	add r0, r4, #0
-	str r1, [r5, #0xc]
-	add r0, #0xd8
-	ldr r0, [r0, #0]
-	add r1, sp, #0
-	str r0, [r5, #0x10]
-	add r0, r4, #0
-	add r0, #0xdc
-	ldr r0, [r0, #0]
-	add r1, #2
-	str r0, [r5, #0x14]
-	add r0, r4, #0
-	add r0, #0xd8
-	ldr r0, [r0, #0]
-	add r2, sp, #0
-	bl sub_0200D550
-	add r0, r4, #0
-	add r0, #0xd8
-	add r2, sp, #0
-	mov r1, #2
-	ldrsh r1, [r2, r1]
-	ldr r0, [r0, #0]
-	mov r2, #0xe0
-	bl sub_0200D4C4
-	add r0, r4, #0
-	add r0, #0xdc
-	add r1, sp, #0
-	ldr r0, [r0, #0]
-	add r1, #2
-	add r2, sp, #0
-	bl sub_0200D550
-	add r0, r4, #0
-	add r0, #0xdc
-	add r2, sp, #0
-	mov r1, #2
-	ldrsh r1, [r2, r1]
-	ldr r0, [r0, #0]
-	mov r2, #0xe0
-	bl sub_0200D4C4
-	b _0226559E
-_0226559C:
-	str r4, [r5, #8]
-_0226559E:
-	add r6, r6, #1
-	add r5, #0x78
-	cmp r6, #5
-	bge _022655A8
-	b _02265492
-_022655A8:
-	ldr r1, _022655D0 ; =0x00002228
-	mov r2, #1
-	ldr r0, _022655D4 ; =ov116_0226534C
-	add r1, r4, r1
-	lsl r2, r2, #0xc
-	bl sub_0200D9E8
-	ldr r1, _022655D8 ; =0x00002488
-	str r0, [r4, r1]
-	add sp, #8
-	pop {r4, r5, r6, pc}
-	nop
-_022655C0: .word 0x0000248C
-_022655C4: .word 0x00002AE8
-_022655C8: .word 0x0000222C
-_022655CC: .word 0x00000944
-_022655D0: .word 0x00002228
-_022655D4: .word ov116_0226534C
-_022655D8: .word 0x00002488
-	thumb_func_end ov116_02265470
-
-	thumb_func_start ov116_022655DC
-ov116_022655DC: ; 0x022655DC
-	push {r3, r4, r5, r6, r7, lr}
-	sub sp, #0x20
-	mov r1, #0x57
-	add r5, r0, #0
-	lsl r1, r1, #2
-	ldr r0, [r5, r1]
-	str r0, [sp, #8]
-	add r0, r1, #4
-	ldr r0, [r5, r0]
-	str r0, [sp, #4]
-	add r0, r1, #0
-	add r0, #0x14
-	ldr r0, [r5, r0]
-	cmp r0, #0
-	beq _02265604
-	cmp r0, #1
-	beq _02265642
-	cmp r0, #2
-	beq _022656E6
-	b _022656F4
-_02265604:
-	add r1, #0x24
-	mov r2, #0xa
-	add r0, r5, r1
-	mov r1, #0
-	lsl r2, r2, #0xe
-	mov r3, #0xa
-	bl ov116_02264764
-	mov r0, #0x66
-	lsl r0, r0, #2
-	mov r2, #5
-	add r0, r5, r0
-	mov r1, #0
-	lsl r2, r2, #0x10
-	mov r3, #0xa
-	bl ov116_02264764
-	mov r0, #0x1b
-	lsl r0, r0, #4
-	ldr r2, _02265750 ; =0xFFFB0000
-	add r0, r5, r0
-	mov r1, #0
-	mov r3, #0xa
-	bl ov116_02264764
-	mov r0, #0x17
-	lsl r0, r0, #4
-	ldr r1, [r5, r0]
-	add r1, r1, #1
-	str r1, [r5, r0]
-	b _022656F4
-_02265642:
-	add r1, #0x24
-	mov r7, #0
-	add r6, r5, r1
-	add r4, sp, #0xc
-_0226564A:
-	add r0, r6, #0
-	bl ov116_02264774
-	add r7, r7, #1
-	add r6, #0x18
-	stmia r4!, {r0}
-	cmp r7, #3
-	blt _0226564A
-	mov r0, #0x5f
-	lsl r0, r0, #2
-	mov r2, #3
-	ldr r0, [r5, r0]
-	lsl r3, r2, #7
-	ldr r3, [r5, r3]
-	ldr r0, [r0, #0x10]
-	mov r1, #7
-	asr r3, r3, #0xc
-	bl sub_0201C63C
-	mov r3, #0x5f
-	lsl r3, r3, #2
-	ldr r0, [r5, r3]
-	add r3, #0x1c
-	ldr r3, [r5, r3]
-	ldr r0, [r0, #0x10]
-	mov r1, #5
-	mov r2, #0
-	asr r3, r3, #0xc
-	bl sub_0201C63C
-	mov r3, #0x5f
-	lsl r3, r3, #2
-	ldr r0, [r5, r3]
-	add r3, #0x34
-	ldr r3, [r5, r3]
-	ldr r0, [r0, #0x10]
-	mov r1, #6
-	mov r2, #0
-	asr r3, r3, #0xc
-	bl sub_0201C63C
-	mov r3, #0x5f
-	lsl r3, r3, #2
-	ldr r0, [r5, r3]
-	add r3, #0x1c
-	ldr r3, [r5, r3]
-	ldr r0, [r0, #0x10]
-	mov r1, #1
-	mov r2, #0
-	asr r3, r3, #0xc
-	bl sub_0201C63C
-	mov r3, #0x5f
-	lsl r3, r3, #2
-	ldr r0, [r5, r3]
-	add r3, #0x34
-	ldr r3, [r5, r3]
-	ldr r0, [r0, #0x10]
-	mov r1, #2
-	mov r2, #0
-	asr r3, r3, #0xc
-	bl sub_0201C63C
-	ldr r0, [sp, #0xc]
-	cmp r0, #0
-	beq _022656F4
-	ldr r0, [sp, #0x10]
-	cmp r0, #0
-	beq _022656F4
-	ldr r0, [sp, #0x14]
-	cmp r0, #0
-	beq _022656F4
-	mov r0, #0x17
-	lsl r0, r0, #4
-	ldr r1, [r5, r0]
-	add r1, r1, #1
-	str r1, [r5, r0]
-	b _022656F4
-_022656E6:
-	add r0, r1, #0
-	mov r2, #1
-	add r0, #0x1c
-	str r2, [r5, r0]
-	mov r0, #0
-	add r1, #0x14
-	str r0, [r5, r1]
-_022656F4:
-	ldr r0, [sp, #4]
-	ldr r0, [r0, #0]
-	cmp r0, #6
-	bge _02265702
-	add r1, r0, #1
-	ldr r0, [sp, #4]
-	b _02265706
-_02265702:
-	ldr r0, [sp, #4]
-	mov r1, #6
-_02265706:
-	str r1, [r0, #0]
-	mov r1, #0
-	ldr r3, [sp, #8]
-	str r1, [sp]
-	ldr r4, [r3, #0]
-	ldr r3, [sp, #4]
-	mov r0, #0x5f
-	lsl r0, r0, #2
-	ldr r3, [r3, #0]
-	ldr r0, [r5, r0]
-	add r3, r4, r3
-	lsl r3, r3, #0x18
-	ldr r0, [r0, #0x14]
-	mov r2, #1
-	lsr r3, r3, #0x18
-	bl sub_02003A2C
-	mov r0, #0
-	str r0, [sp]
-	ldr r3, [sp, #8]
-	mov r0, #0x5f
-	ldr r4, [r3, #0]
-	ldr r3, [sp, #4]
-	lsl r0, r0, #2
-	ldr r3, [r3, #0]
-	ldr r0, [r5, r0]
-	add r3, r4, r3
-	mov r1, #1
-	lsl r3, r3, #0x18
-	ldr r0, [r0, #0x14]
-	add r2, r1, #0
-	lsr r3, r3, #0x18
-	bl sub_02003A2C
-	add sp, #0x20
-	pop {r3, r4, r5, r6, r7, pc}
-	nop
-_02265750: .word 0xFFFB0000
-	thumb_func_end ov116_022655DC
-
-	thumb_func_start ov116_02265754
-ov116_02265754: ; 0x02265754
-	push {r3, r4, r5, r6, r7, lr}
-	sub sp, #0x20
-	mov r1, #0x57
-	add r5, r0, #0
-	lsl r1, r1, #2
-	ldr r0, [r5, r1]
-	str r0, [sp, #8]
-	add r0, r1, #4
-	ldr r0, [r5, r0]
-	str r0, [sp, #4]
-	add r0, r1, #0
-	add r0, #0x14
-	ldr r0, [r5, r0]
-	cmp r0, #0
-	beq _0226577C
-	cmp r0, #1
-	beq _022657BA
-	cmp r0, #2
-	beq _0226585E
-	b _0226586A
-_0226577C:
-	add r1, #0x24
-	add r0, r5, r1
-	mov r1, #0xa
-	lsl r1, r1, #0xe
-	mov r2, #0
-	mov r3, #0xa
-	bl ov116_02264764
-	mov r0, #0x66
-	lsl r0, r0, #2
-	mov r1, #5
-	add r0, r5, r0
-	lsl r1, r1, #0x10
-	mov r2, #0
-	mov r3, #0xa
-	bl ov116_02264764
-	mov r0, #0x1b
-	lsl r0, r0, #4
-	ldr r1, _022658C4 ; =0xFFFB0000
-	add r0, r5, r0
-	mov r2, #0
-	mov r3, #0xa
-	bl ov116_02264764
-	mov r0, #0x17
-	lsl r0, r0, #4
-	ldr r1, [r5, r0]
-	add r1, r1, #1
-	str r1, [r5, r0]
-	b _0226586A
-_022657BA:
-	add r1, #0x24
-	mov r7, #0
-	add r6, r5, r1
-	add r4, sp, #0xc
-_022657C2:
-	add r0, r6, #0
-	bl ov116_02264774
-	add r7, r7, #1
-	add r6, #0x18
-	stmia r4!, {r0}
-	cmp r7, #3
-	blt _022657C2
-	mov r0, #0x5f
-	lsl r0, r0, #2
-	mov r2, #3
-	ldr r0, [r5, r0]
-	lsl r3, r2, #7
-	ldr r3, [r5, r3]
-	ldr r0, [r0, #0x10]
-	mov r1, #7
-	asr r3, r3, #0xc
-	bl sub_0201C63C
-	mov r3, #0x5f
-	lsl r3, r3, #2
-	ldr r0, [r5, r3]
-	add r3, #0x1c
-	ldr r3, [r5, r3]
-	ldr r0, [r0, #0x10]
-	mov r1, #5
-	mov r2, #0
-	asr r3, r3, #0xc
-	bl sub_0201C63C
-	mov r3, #0x5f
-	lsl r3, r3, #2
-	ldr r0, [r5, r3]
-	add r3, #0x34
-	ldr r3, [r5, r3]
-	ldr r0, [r0, #0x10]
-	mov r1, #6
-	mov r2, #0
-	asr r3, r3, #0xc
-	bl sub_0201C63C
-	mov r3, #0x5f
-	lsl r3, r3, #2
-	ldr r0, [r5, r3]
-	add r3, #0x1c
-	ldr r3, [r5, r3]
-	ldr r0, [r0, #0x10]
-	mov r1, #1
-	mov r2, #0
-	asr r3, r3, #0xc
-	bl sub_0201C63C
-	mov r3, #0x5f
-	lsl r3, r3, #2
-	ldr r0, [r5, r3]
-	add r3, #0x34
-	ldr r3, [r5, r3]
-	ldr r0, [r0, #0x10]
-	mov r1, #2
-	mov r2, #0
-	asr r3, r3, #0xc
-	bl sub_0201C63C
-	ldr r0, [sp, #0xc]
-	cmp r0, #0
-	beq _0226586A
-	ldr r0, [sp, #0x10]
-	cmp r0, #0
-	beq _0226586A
-	ldr r0, [sp, #0x14]
-	cmp r0, #0
-	beq _0226586A
-	mov r0, #0x17
-	lsl r0, r0, #4
-	ldr r1, [r5, r0]
-	add r1, r1, #1
-	str r1, [r5, r0]
-	b _0226586A
-_0226585E:
-	add r0, r1, #0
-	mov r2, #0
-	add r0, #0x1c
-	str r2, [r5, r0]
-	add r1, #0x14
-	str r2, [r5, r1]
-_0226586A:
-	ldr r0, [sp, #4]
-	ldr r0, [r0, #0]
-	cmp r0, #4
-	ble _02265878
-	sub r1, r0, #1
-	ldr r0, [sp, #4]
-	b _0226587C
-_02265878:
-	ldr r0, [sp, #4]
-	mov r1, #0
-_0226587C:
-	str r1, [r0, #0]
-	mov r1, #0
-	ldr r3, [sp, #8]
-	str r1, [sp]
-	ldr r4, [r3, #0]
-	ldr r3, [sp, #4]
-	mov r0, #0x5f
-	lsl r0, r0, #2
-	ldr r3, [r3, #0]
-	ldr r0, [r5, r0]
-	add r3, r4, r3
-	lsl r3, r3, #0x18
-	ldr r0, [r0, #0x14]
-	mov r2, #1
-	lsr r3, r3, #0x18
-	bl sub_02003A2C
-	mov r0, #0
-	str r0, [sp]
-	ldr r3, [sp, #8]
-	mov r0, #0x5f
-	ldr r4, [r3, #0]
-	ldr r3, [sp, #4]
-	lsl r0, r0, #2
-	ldr r3, [r3, #0]
-	ldr r0, [r5, r0]
-	add r3, r4, r3
-	mov r1, #1
-	lsl r3, r3, #0x18
-	ldr r0, [r0, #0x14]
-	add r2, r1, #0
-	lsr r3, r3, #0x18
-	bl sub_02003A2C
-	add sp, #0x20
-	pop {r3, r4, r5, r6, r7, pc}
-	; .align 2, 0
-_022658C4: .word 0xFFFB0000
-	thumb_func_end ov116_02265754
-
-	thumb_func_start ov116_022658C8
-ov116_022658C8: ; 0x022658C8
-	cmp r0, #0xa
-	bhi _02265916
-	add r0, r0, r0
-	add r0, pc
-	ldrh r0, [r0, #6]
-	lsl r0, r0, #0x10
-	asr r0, r0, #0x10
-	add pc, r0
-_022658D8: ; jump table
-	.short _02265916 - _022658D8 - 2 ; case 0
-	.short _022658EE - _022658D8 - 2 ; case 1
-	.short _022658F2 - _022658D8 - 2 ; case 2
-	.short _022658F6 - _022658D8 - 2 ; case 3
-	.short _022658FA - _022658D8 - 2 ; case 4
-	.short _022658FE - _022658D8 - 2 ; case 5
-	.short _02265902 - _022658D8 - 2 ; case 6
-	.short _02265906 - _022658D8 - 2 ; case 7
-	.short _0226590A - _022658D8 - 2 ; case 8
-	.short _0226590E - _022658D8 - 2 ; case 9
-	.short _02265912 - _022658D8 - 2 ; case 10
-_022658EE:
-	mov r0, #0x1c
-	bx lr
-_022658F2:
-	mov r0, #0xe
-	bx lr
-_022658F6:
-	mov r0, #0xc
-	bx lr
-_022658FA:
-	mov r0, #0xa
-	bx lr
-_022658FE:
-	mov r0, #9
-	bx lr
-_02265902:
-	mov r0, #0x20
-	bx lr
-_02265906:
-	mov r0, #0xe
-	bx lr
-_0226590A:
-	mov r0, #0xc
-	bx lr
-_0226590E:
-	mov r0, #0xb
-	bx lr
-_02265912:
-	mov r0, #0xb
-	bx lr
-_02265916:
-	mov r0, #9
-	bx lr
-	; .align 2, 0
-	thumb_func_end ov116_022658C8
-
-	thumb_func_start ov116_0226591C
-ov116_0226591C: ; 0x0226591C
-	push {r3, r4, r5, r6, r7, lr}
-	add r5, r0, #0
-	mov r0, #0x56
-	add r6, r1, #0
-	lsl r0, r0, #2
-	ldr r0, [r6, r0]
-	ldr r4, [r0, #0]
-	bl sub_0200F2AC
-	cmp r0, #0
-	beq _02265940
-	mov r1, #0x5f
-	lsl r1, r1, #2
-	ldr r0, [r6, r1]
-	add r0, #0x34
-	ldrb r0, [r0]
-	cmp r0, #1
-	bne _02265948
-_02265940:
-	add r0, r5, #0
-	bl sub_0200DA58
-	pop {r3, r4, r5, r6, r7, pc}
-_02265948:
-	add r0, r1, #0
-	sub r0, #8
-	ldr r0, [r6, r0]
-	cmp r0, #0
-	beq _022659DC
-	sub r0, r1, #4
-	ldr r0, [r6, r0]
-	cmp r0, #0
-	bne _02265960
-	add r0, r6, #0
-	bl ov116_022655DC
-_02265960:
-	mov r1, #0x59
-	lsl r1, r1, #2
-	ldr r0, [r6, r1]
-	cmp r0, #0
-	bne _022659F6
-	cmp r4, #0
-	beq _022659F6
-	cmp r4, #8
-	bge _022659F6
-	add r2, r4, #0
-	mov r0, #0x28
-	mul r2, r0
-	str r2, [sp]
-	ldr r2, _02265A08 ; =0x02267DA4
-	ldr r3, [sp]
-	mov r7, #0
-	ldr r3, [r2, r3]
-	ldr r4, _02265A0C ; =0x02267DA8
-	str r3, [r6, r1]
-	add r3, r1, #4
-	str r7, [r6, r3]
-	ldr r3, [sp]
-	lsl r0, r0, #3
-	ldr r3, [r4, r3]
-	add r5, r6, #0
-	sub r3, r3, #1
-	str r3, [r6, r0]
-	ldr r3, _02265A10 ; =0x02267DAC
-	ldr r0, [sp]
-	ldr r3, [r3, r0]
-	add r0, r1, #0
-	sub r0, #0x20
-	str r3, [r6, r0]
-	add r0, r3, #5
-	sub r1, #0x1c
-	str r0, [r6, r1]
-	ldr r0, [sp]
-	add r4, r2, r0
-_022659AC:
-	ldr r1, [r4, #0xc]
-	ldr r0, [r5, #0]
-	add r1, r1, #4
-	bl sub_0200D430
-	add r0, r5, #0
-	add r0, #0xa0
-	ldr r0, [r0, #0]
-	ldr r1, [r4, #0x18]
-	bl sub_0200D430
-	add r7, r7, #1
-	add r4, r4, #4
-	add r5, #0x50
-	cmp r7, #2
-	blt _022659AC
-	ldr r1, _02265A14 ; =0x02267DC8
-	ldr r0, [sp]
-	ldr r2, _02265A18 ; =0x00001001
-	ldr r0, [r1, r0]
-	add r1, r6, #0
-	bl sub_0200D9E8
-	b _022659F6
-_022659DC:
-	bne _022659F6
-	add r0, r1, #0
-	sub r0, #0x18
-	ldr r0, [r6, r0]
-	cmp r0, #0
-	bne _022659F6
-	sub r0, r1, #4
-	ldr r0, [r6, r0]
-	cmp r0, #1
-	bne _022659F6
-	add r0, r6, #0
-	bl ov116_02265754
-_022659F6:
-	mov r0, #0x59
-	lsl r0, r0, #2
-	ldr r1, [r6, r0]
-	cmp r1, #0
-	beq _02265A04
-	sub r1, r1, #1
-	str r1, [r6, r0]
-_02265A04:
-	pop {r3, r4, r5, r6, r7, pc}
-	nop
-_02265A08: .word 0x02267DA4
-_02265A0C: .word 0x02267DA8
-_02265A10: .word 0x02267DAC
-_02265A14: .word 0x02267DC8
-_02265A18: .word 0x00001001
-	thumb_func_end ov116_0226591C
-
-	thumb_func_start ov116_02265A1C
-ov116_02265A1C: ; 0x02265A1C
-	push {r4, r5, r6, lr}
-	add r4, r0, #0
-	ldr r0, _02265A90 ; =0x00002AF4
-	ldr r6, _02265A94 ; =0x00002030
-	add r1, r4, r0
-	ldr r0, _02265A98 ; =0x00002188
-	str r1, [r4, r0]
-	mov r1, #0x42
-	lsl r1, r1, #2
-	add r3, r4, r1
-	add r2, r0, #4
-	str r3, [r4, r2]
-	add r1, r1, #4
-	add r2, r4, r1
-	add r1, r0, #0
-	add r1, #8
-	str r2, [r4, r1]
-	add r1, r0, #0
-	ldr r2, [r4, #0x14]
-	add r1, #0x24
-	str r2, [r4, r1]
-	add r2, r0, #0
-	mov r1, #0
-	add r2, #0xc
-	str r1, [r4, r2]
-	add r2, r0, #0
-	add r2, #0x18
-	str r1, [r4, r2]
-	add r0, #0x1c
-	str r1, [r4, r0]
-	add r0, r6, #0
-	add r2, r4, #0
-	add r3, r4, #0
-	add r0, #0xa0
-_02265A60:
-	add r5, r2, #0
-	add r5, #0xe8
-	ldr r5, [r5, #0]
-	add r1, r1, #1
-	str r5, [r3, r6]
-	add r5, r2, #0
-	add r5, #0xe0
-	ldr r5, [r5, #0]
-	add r2, r2, #4
-	str r5, [r3, r0]
-	add r3, #0x50
-	cmp r1, #2
-	blt _02265A60
-	ldr r1, _02265A94 ; =0x00002030
-	mov r2, #1
-	ldr r0, _02265A9C ; =ov116_0226591C
-	add r1, r4, r1
-	lsl r2, r2, #0xc
-	bl sub_0200D9E8
-	ldr r1, _02265AA0 ; =0x00002184
-	str r0, [r4, r1]
-	pop {r4, r5, r6, pc}
-	nop
-_02265A90: .word 0x00002AF4
-_02265A94: .word 0x00002030
-_02265A98: .word 0x00002188
-_02265A9C: .word ov116_0226591C
-_02265AA0: .word 0x00002184
-	thumb_func_end ov116_02265A1C
-
-	thumb_func_start ov116_02265AA4
-ov116_02265AA4: ; 0x02265AA4
-	push {r4, r5, r6, lr}
-	sub sp, #8
-	add r5, r0, #0
-	add r4, r1, #0
-	bl sub_0200F2AC
-	cmp r0, #0
-	beq _02265AC2
-	mov r1, #0x5f
-	lsl r1, r1, #2
-	ldr r0, [r4, r1]
-	add r0, #0x34
-	ldrb r0, [r0]
-	cmp r0, #1
-	bne _02265ACC
-_02265AC2:
-	add r0, r5, #0
-	bl sub_0200DA58
-	add sp, #8
-	pop {r4, r5, r6, pc}
-_02265ACC:
-	add r0, r1, #0
-	sub r0, #0x14
-	ldr r0, [r4, r0]
-	cmp r0, #4
-	bls _02265AD8
-	b _02265D78
-_02265AD8:
-	add r0, r0, r0
-	add r0, pc
-	ldrh r0, [r0, #6]
-	lsl r0, r0, #0x10
-	asr r0, r0, #0x10
-	add pc, r0
-_02265AE4: ; jump table
-	.short _02265AEE - _02265AE4 - 2 ; case 0
-	.short _02265C5E - _02265AE4 - 2 ; case 1
-	.short _02265CA6 - _02265AE4 - 2 ; case 2
-	.short _02265CEC - _02265AE4 - 2 ; case 3
-	.short _02265D32 - _02265AE4 - 2 ; case 4
-_02265AEE:
-	mov r0, #0
-	strh r0, [r4, #8]
-	mov r0, #0x80
-	strh r0, [r4, #0x14]
-	mov r0, #0xa0
-	strh r0, [r4, #0x16]
-	mov r0, #0x40
-	str r0, [r4, #0x18]
-	mov r0, #0x18
-	str r0, [r4, #0x1c]
-	ldr r0, [r4, #0]
-	mov r1, #1
-	bl sub_0200D3F4
-	add r0, r4, #0
-	mov r1, #0
-	add r0, #0xa8
-	strh r1, [r0]
-	add r0, r4, #0
-	mov r1, #0x80
-	add r0, #0xb4
-	strh r1, [r0]
-	add r0, r4, #0
-	mov r1, #0xa0
-	add r0, #0xb6
-	strh r1, [r0]
-	add r0, r4, #0
-	mov r1, #0x40
-	add r0, #0xb8
-	str r1, [r0, #0]
-	add r0, r4, #0
-	mov r1, #0x18
-	add r0, #0xbc
-	str r1, [r0, #0]
-	add r0, r4, #0
-	add r0, #0xa0
-	ldr r0, [r0, #0]
-	mov r1, #1
-	bl sub_0200D3F4
-	mov r3, #1
-	ldr r0, [r4, #0]
-	add r1, sp, #4
-	add r2, sp, #0
-	lsl r3, r3, #0x14
-	bl sub_0200D67C
-	ldrh r0, [r4, #8]
-	bl sub_0201D250
-	mov r1, #0x14
-	ldrsh r1, [r4, r1]
-	lsl r2, r1, #0xc
-	ldr r1, [r4, #0x18]
-	mul r0, r1
-	add r5, r2, r0
-	ldrh r0, [r4, #8]
-	bl sub_0201D264
-	mov r1, #0x16
-	ldrsh r1, [r4, r1]
-	mov r3, #1
-	lsl r3, r3, #0x14
-	lsl r2, r1, #0xc
-	ldr r1, [r4, #0x1c]
-	mul r0, r1
-	add r6, r2, r0
-	ldr r0, [r4, #0]
-	add r1, r5, #0
-	add r2, r6, #0
-	bl sub_0200D650
-	mov r0, #0x52
-	lsl r0, r0, #2
-	ldr r0, [r4, r0]
-	bl ov116_022658C8
-	mov r2, #0x2d
-	add r3, r0, #0
-	add r0, r4, #0
-	lsl r2, r2, #0xe
-	add r0, #0x20
-	add r1, r5, #0
-	add r2, r5, r2
-	bl ov116_02264764
-	mov r0, #0x52
-	lsl r0, r0, #2
-	ldr r0, [r4, r0]
-	bl ov116_022658C8
-	mov r2, #6
-	add r3, r0, #0
-	add r0, r4, #0
-	lsl r2, r2, #0xe
-	add r0, #0x38
-	add r1, r6, #0
-	sub r2, r6, r2
-	bl ov116_02264764
-	add r0, r4, #0
-	add r0, #0xa0
-	mov r3, #1
-	ldr r0, [r0, #0]
-	add r1, sp, #4
-	add r2, sp, #0
-	lsl r3, r3, #0x14
-	bl sub_0200D67C
-	add r0, r4, #0
-	add r0, #0xa8
-	ldrh r0, [r0]
-	bl sub_0201D250
-	mov r1, #0xb4
-	ldrsh r1, [r4, r1]
-	lsl r2, r1, #0xc
-	add r1, r4, #0
-	add r1, #0xb8
-	ldr r1, [r1, #0]
-	mul r0, r1
-	add r6, r2, r0
-	add r0, r4, #0
-	add r0, #0xa8
-	ldrh r0, [r0]
-	bl sub_0201D264
-	mov r1, #0xb6
-	ldrsh r1, [r4, r1]
-	mov r3, #1
-	lsl r3, r3, #0x14
-	lsl r2, r1, #0xc
-	add r1, r4, #0
-	add r1, #0xbc
-	ldr r1, [r1, #0]
-	mul r0, r1
-	sub r5, r2, r0
-	add r0, r4, #0
-	add r0, #0xa0
-	ldr r0, [r0, #0]
-	add r1, r6, #0
-	add r2, r5, #0
-	bl sub_0200D650
-	mov r0, #0x51
-	lsl r0, r0, #2
-	ldr r0, [r4, r0]
-	bl ov116_022658C8
-	mov r2, #0x2d
-	add r3, r0, #0
-	add r0, r4, #0
-	lsl r2, r2, #0xe
-	add r0, #0xc0
-	add r1, r6, #0
-	sub r2, r6, r2
-	bl ov116_02264764
-	mov r0, #0x51
-	lsl r0, r0, #2
-	ldr r0, [r4, r0]
-	bl ov116_022658C8
-	mov r2, #6
-	add r3, r0, #0
-	add r0, r4, #0
-	lsl r2, r2, #0xe
-	add r0, #0xd8
-	add r1, r5, #0
-	add r2, r5, r2
-	bl ov116_02264764
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_02265C5E:
-	mov r1, #0x51
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	mov r2, #0
-	mov r3, #1
-	bl ov116_02265FD4
-	mov r1, #0x52
-	lsl r1, r1, #2
-	add r5, r0, #0
-	ldr r1, [r4, r1]
-	add r0, r4, #0
-	mov r2, #1
-	mov r3, #3
-	bl ov116_02265F1C
-	cmp r5, #0
-	beq _02265D7E
-	cmp r0, #0
-	beq _02265D7E
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add sp, #8
-	add r1, r1, #1
-	str r1, [r4, r0]
-	pop {r4, r5, r6, pc}
-_02265CA6:
-	sub r1, #0x38
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	mov r2, #0
-	mov r3, #3
-	bl ov116_02265D8C
-	mov r1, #0x52
-	lsl r1, r1, #2
-	add r5, r0, #0
-	ldr r1, [r4, r1]
-	add r0, r4, #0
-	mov r2, #1
-	mov r3, #2
-	bl ov116_02265D8C
-	cmp r5, #0
-	beq _02265D7E
-	cmp r0, #0
-	beq _02265D7E
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add sp, #8
-	add r1, r1, #1
-	str r1, [r4, r0]
-	pop {r4, r5, r6, pc}
-_02265CEC:
-	sub r1, #0x38
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	mov r2, #0
-	mov r3, #2
-	bl ov116_02265E64
-	mov r1, #0x52
-	lsl r1, r1, #2
-	add r5, r0, #0
-	ldr r1, [r4, r1]
-	add r0, r4, #0
-	mov r2, #1
-	mov r3, #3
-	bl ov116_02265F1C
-	cmp r5, #0
-	beq _02265D7E
-	cmp r0, #0
-	beq _02265D7E
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add sp, #8
-	add r1, r1, #1
-	str r1, [r4, r0]
-	pop {r4, r5, r6, pc}
-_02265D32:
-	sub r1, #0x38
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	mov r2, #0
-	mov r3, #1
-	bl ov116_02265FD4
-	mov r1, #0x52
-	lsl r1, r1, #2
-	add r5, r0, #0
-	ldr r1, [r4, r1]
-	add r0, r4, #0
-	mov r2, #1
-	mov r3, #2
-	bl ov116_02265D8C
-	cmp r5, #0
-	beq _02265D7E
-	cmp r0, #0
-	beq _02265D7E
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add sp, #8
-	add r1, r1, #1
-	str r1, [r4, r0]
-	pop {r4, r5, r6, pc}
-_02265D78:
-	add r0, r5, #0
-	bl sub_0200DA58
-_02265D7E:
-	add sp, #8
-	pop {r4, r5, r6, pc}
-	; .align 2, 0
-	thumb_func_end ov116_02265AA4
-
-	thumb_func_start ov116_02265D84
-ov116_02265D84: ; 0x02265D84
-	mov r1, #0
-	str r1, [r0, #4]
-	bx lr
-	; .align 2, 0
-	thumb_func_end ov116_02265D84
-
-	thumb_func_start ov116_02265D8C
-ov116_02265D8C: ; 0x02265D8C
-	push {r3, r4, r5, r6, r7, lr}
-	sub sp, #8
-	add r5, r0, #0
-	ldr r0, [r5, #4]
-	add r4, r1, #0
-	add r6, r2, #0
-	add r7, r3, #0
-	cmp r0, #0
-	beq _02265DA4
-	cmp r0, #1
-	beq _02265E2C
-	b _02265E56
-_02265DA4:
-	mov r3, #1
-	ldr r0, [r5, #0]
-	add r1, sp, #4
-	add r2, sp, #0
-	lsl r3, r3, #0x14
-	bl sub_0200D67C
-	cmp r6, #0
-	bne _02265DD2
-	add r0, r4, #0
-	ldr r6, [sp, #4]
-	bl ov116_022658C8
-	mov r2, #0x2d
-	add r3, r0, #0
-	add r0, r5, #0
-	lsl r2, r2, #0xe
-	add r0, #0x20
-	add r1, r6, #0
-	sub r2, r6, r2
-	bl ov116_02264764
-	b _02265DEC
-_02265DD2:
-	add r0, r4, #0
-	ldr r6, [sp, #4]
-	bl ov116_022658C8
-	mov r2, #0x2d
-	add r3, r0, #0
-	add r0, r5, #0
-	lsl r2, r2, #0xe
-	add r0, #0x20
-	add r1, r6, #0
-	add r2, r6, r2
-	bl ov116_02264764
-_02265DEC:
-	cmp r7, #2
-	bne _02265E0C
-	add r0, r4, #0
-	ldr r6, [sp]
-	bl ov116_022658C8
-	mov r2, #6
-	add r3, r0, #0
-	add r0, r5, #0
-	lsl r2, r2, #0xe
-	add r0, #0x38
-	add r1, r6, #0
-	sub r2, r6, r2
-	bl ov116_02264764
-	b _02265E26
-_02265E0C:
-	add r0, r4, #0
-	ldr r6, [sp]
-	bl ov116_022658C8
-	mov r2, #6
-	add r3, r0, #0
-	add r0, r5, #0
-	lsl r2, r2, #0xe
-	add r0, #0x38
-	add r1, r6, #0
-	add r2, r6, r2
-	bl ov116_02264764
-_02265E26:
-	ldr r0, [r5, #4]
-	add r0, r0, #1
-	str r0, [r5, #4]
-_02265E2C:
-	add r0, r5, #0
-	add r0, #0x20
-	bl ov116_02264774
-	add r4, r0, #0
-	add r0, r5, #0
-	add r0, #0x38
-	bl ov116_02264774
-	mov r3, #1
-	ldr r0, [r5, #0]
-	ldr r1, [r5, #0x20]
-	ldr r2, [r5, #0x38]
-	lsl r3, r3, #0x14
-	bl sub_0200D650
-	cmp r4, #0
-	beq _02265E5C
-	add sp, #8
-	mov r0, #1
-	pop {r3, r4, r5, r6, r7, pc}
-_02265E56:
-	add sp, #8
-	mov r0, #1
-	pop {r3, r4, r5, r6, r7, pc}
-_02265E5C:
-	mov r0, #0
-	add sp, #8
-	pop {r3, r4, r5, r6, r7, pc}
-	; .align 2, 0
-	thumb_func_end ov116_02265D8C
-
-	thumb_func_start ov116_02265E64
-ov116_02265E64: ; 0x02265E64
-	push {r4, r5, r6, lr}
-	add r5, r0, #0
-	ldr r0, [r5, #4]
-	add r4, r1, #0
-	add r6, r3, #0
-	cmp r0, #0
-	beq _02265E78
-	cmp r0, #1
-	beq _02265EE8
-	b _02265F10
-_02265E78:
-	cmp r2, #0
-	bne _02265E96
-	add r0, r4, #0
-	bl ov116_022658C8
-	add r3, r0, #0
-	add r0, r5, #0
-	mov r1, #0x4d
-	mov r2, #2
-	add r0, #0x20
-	lsl r1, r1, #0xe
-	lsl r2, r2, #0x12
-	bl ov116_02264764
-	b _02265EAC
-_02265E96:
-	add r0, r4, #0
-	bl ov116_022658C8
-	add r3, r0, #0
-	add r0, r5, #0
-	mov r2, #2
-	ldr r1, _02265F18 ; =0xFFFC2000
-	add r0, #0x20
-	lsl r2, r2, #0x12
-	bl ov116_02264764
-_02265EAC:
-	cmp r6, #2
-	bne _02265ECA
-	add r0, r4, #0
-	bl ov116_022658C8
-	add r3, r0, #0
-	add r0, r5, #0
-	mov r1, #0xa
-	mov r2, #0x22
-	add r0, #0x38
-	lsl r1, r1, #0x10
-	lsl r2, r2, #0xe
-	bl ov116_02264764
-	b _02265EE2
-_02265ECA:
-	add r0, r4, #0
-	bl ov116_022658C8
-	add r3, r0, #0
-	add r0, r5, #0
-	mov r1, #0xa
-	mov r2, #0x2e
-	add r0, #0x38
-	lsl r1, r1, #0x10
-	lsl r2, r2, #0xe
-	bl ov116_02264764
-_02265EE2:
-	ldr r0, [r5, #4]
-	add r0, r0, #1
-	str r0, [r5, #4]
-_02265EE8:
-	add r0, r5, #0
-	add r0, #0x20
-	bl ov116_02264774
-	add r4, r0, #0
-	add r0, r5, #0
-	add r0, #0x38
-	bl ov116_02264774
-	mov r3, #1
-	ldr r0, [r5, #0]
-	ldr r1, [r5, #0x20]
-	ldr r2, [r5, #0x38]
-	lsl r3, r3, #0x14
-	bl sub_0200D650
-	cmp r4, #0
-	beq _02265F14
-	mov r0, #1
-	pop {r4, r5, r6, pc}
-_02265F10:
-	mov r0, #1
-	pop {r4, r5, r6, pc}
-_02265F14:
-	mov r0, #0
-	pop {r4, r5, r6, pc}
-	; .align 2, 0
-_02265F18: .word 0xFFFC2000
-	thumb_func_end ov116_02265E64
-
-	thumb_func_start ov116_02265F1C
-ov116_02265F1C: ; 0x02265F1C
-	push {r4, r5, r6, lr}
-	add r5, r0, #0
-	ldr r0, [r5, #4]
-	add r4, r1, #0
-	add r6, r3, #0
-	cmp r0, #0
-	beq _02265F30
-	cmp r0, #1
-	beq _02265FA0
-	b _02265FC8
-_02265F30:
-	cmp r2, #0
-	bne _02265F4E
-	add r0, r4, #0
-	bl ov116_022658C8
-	add r3, r0, #0
-	add r0, r5, #0
-	mov r1, #0x4d
-	mov r2, #2
-	add r0, #0x20
-	lsl r1, r1, #0xe
-	lsl r2, r2, #0x12
-	bl ov116_02264764
-	b _02265F64
-_02265F4E:
-	add r0, r4, #0
-	bl ov116_022658C8
-	add r3, r0, #0
-	add r0, r5, #0
-	mov r2, #2
-	ldr r1, _02265FD0 ; =0xFFFC2000
-	add r0, #0x20
-	lsl r2, r2, #0x12
-	bl ov116_02264764
-_02265F64:
-	cmp r6, #2
-	bne _02265F82
-	add r0, r4, #0
-	bl ov116_022658C8
-	add r3, r0, #0
-	add r0, r5, #0
-	mov r1, #6
-	mov r2, #0x12
-	add r0, #0x38
-	lsl r1, r1, #0x10
-	lsl r2, r2, #0xe
-	bl ov116_02264764
-	b _02265F9A
-_02265F82:
-	add r0, r4, #0
-	bl ov116_022658C8
-	add r3, r0, #0
-	add r0, r5, #0
-	mov r1, #6
-	mov r2, #0x1e
-	add r0, #0x38
-	lsl r1, r1, #0x10
-	lsl r2, r2, #0xe
-	bl ov116_02264764
-_02265F9A:
-	ldr r0, [r5, #4]
-	add r0, r0, #1
-	str r0, [r5, #4]
-_02265FA0:
-	add r0, r5, #0
-	add r0, #0x20
-	bl ov116_02264774
-	add r4, r0, #0
-	add r0, r5, #0
-	add r0, #0x38
-	bl ov116_02264774
-	mov r3, #1
-	ldr r0, [r5, #0]
-	ldr r1, [r5, #0x20]
-	ldr r2, [r5, #0x38]
-	lsl r3, r3, #0x14
-	bl sub_0200D650
-	cmp r4, #0
-	beq _02265FCC
-	mov r0, #1
-	pop {r4, r5, r6, pc}
-_02265FC8:
-	mov r0, #1
-	pop {r4, r5, r6, pc}
-_02265FCC:
-	mov r0, #0
-	pop {r4, r5, r6, pc}
-	; .align 2, 0
-_02265FD0: .word 0xFFFC2000
-	thumb_func_end ov116_02265F1C
-
-	thumb_func_start ov116_02265FD4
-ov116_02265FD4: ; 0x02265FD4
-	push {r4, r5, r6, lr}
-	sub sp, #8
-	add r4, r0, #0
-	ldr r0, [r4, #4]
-	add r5, r2, #0
-	add r6, r3, #0
-	cmp r0, #0
-	beq _02265FEA
-	cmp r0, #1
-	beq _02265FF6
-	b _0226609A
-_02265FEA:
-	mov r0, #0
-	str r0, [r4, #0x10]
-	strh r0, [r4, #8]
-	ldr r0, [r4, #4]
-	add r0, r0, #1
-	str r0, [r4, #4]
-_02265FF6:
-	add r0, r1, #0
-	bl ov116_022658C8
-	add r1, r0, #0
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	bl _s32_div_f
-	mov r1, #8
-	ldrsh r2, [r4, r1]
-	add r0, r2, r0
-	strh r0, [r4, #8]
-	mov r0, #0x5a
-	ldrsh r1, [r4, r1]
-	lsl r0, r0, #2
-	cmp r1, r0
-	blt _0226601C
-	mov r0, #0
-	strh r0, [r4, #8]
-_0226601C:
-	mov r3, #1
-	ldr r0, [r4, #0]
-	add r1, sp, #4
-	add r2, sp, #0
-	lsl r3, r3, #0x14
-	bl sub_0200D67C
-	cmp r5, #0
-	ldrh r0, [r4, #8]
-	bne _02266048
-	bl sub_0201D250
-	mov r1, #0x14
-	ldrsh r1, [r4, r1]
-	lsl r2, r1, #0xc
-	ldr r1, [r4, #0x18]
-	mul r0, r1
-	sub r5, r2, r0
-	ldrh r0, [r4, #8]
-	bl sub_0201D264
-	b _0226605E
-_02266048:
-	bl sub_0201D250
-	mov r1, #0x14
-	ldrsh r1, [r4, r1]
-	lsl r2, r1, #0xc
-	ldr r1, [r4, #0x18]
-	mul r0, r1
-	add r5, r2, r0
-	ldrh r0, [r4, #8]
-	bl sub_0201D264
-_0226605E:
-	mov r1, #0x16
-	ldrsh r1, [r4, r1]
-	mov r3, #1
-	lsl r3, r3, #0x14
-	lsl r2, r1, #0xc
-	ldr r1, [r4, #0x1c]
-	mul r0, r1
-	sub r2, r2, r0
-	ldr r0, [r4, #0]
-	add r1, r5, #0
-	bl sub_0200D650
-	mov r0, #8
-	ldrsh r0, [r4, r0]
-	cmp r0, #0
-	bne _022660A0
-	ldr r0, [r4, #0x10]
-	add r0, r0, #1
-	str r0, [r4, #0x10]
-	cmp r0, r6
-	blt _02266094
-	ldr r0, [r4, #4]
-	add sp, #8
-	add r0, r0, #1
-	str r0, [r4, #4]
-	mov r0, #1
-	pop {r4, r5, r6, pc}
-_02266094:
-	mov r0, #1
-	str r0, [r4, #4]
-	b _022660A0
-_0226609A:
-	add sp, #8
-	mov r0, #1
-	pop {r4, r5, r6, pc}
-_022660A0:
-	mov r0, #0
-	add sp, #8
-	pop {r4, r5, r6, pc}
-	; .align 2, 0
-	thumb_func_end ov116_02265FD4
-
-	thumb_func_start ov116_022660A8
-ov116_022660A8: ; 0x022660A8
-	push {r4, r5, r6, r7, lr}
-	sub sp, #0x1c
-	ldr r3, _02266100 ; =0x02267D20
-	add r2, sp, #0xc
-	add r5, r0, #0
-	add r4, r1, #0
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	bl sub_0200F2AC
-	cmp r0, #0
-	beq _022660D2
-	mov r0, #0x5f
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, #0x34
-	ldrb r1, [r1]
-	cmp r1, #1
-	bne _022660DC
-_022660D2:
-	add r0, r5, #0
-	bl sub_0200DA58
-	add sp, #0x1c
-	pop {r4, r5, r6, r7, pc}
-_022660DC:
-	add r1, r0, #0
-	sub r1, #0x14
-	ldr r1, [r4, r1]
-	cmp r1, #4
-	bls _022660E8
-	b _02266442
-_022660E8:
-	add r1, r1, r1
-	add r1, pc
-	ldrh r1, [r1, #6]
-	lsl r1, r1, #0x10
-	asr r1, r1, #0x10
-	add pc, r1
-_022660F4: ; jump table
-	.short _02266104 - _022660F4 - 2 ; case 0
-	.short _0226623C - _022660F4 - 2 ; case 1
-	.short _022662BE - _022660F4 - 2 ; case 2
-	.short _0226633A - _022660F4 - 2 ; case 3
-	.short _022663B6 - _022660F4 - 2 ; case 4
-	nop
-_02266100: .word 0x02267D20
-_02266104:
-	sub r0, #0x3c
-	ldr r0, [r4, r0]
-	mov r1, #0
-	str r1, [sp]
-	cmp r0, #0
-	ble _0226620C
-	add r5, r4, #0
-_02266112:
-	mov r0, #0
-	strh r0, [r5, #8]
-	mov r0, #0x80
-	strh r0, [r5, #0x14]
-	mov r0, #0xa0
-	strh r0, [r5, #0x16]
-	mov r0, #0x40
-	str r0, [r5, #0x18]
-	mov r0, #0x18
-	str r0, [r5, #0x1c]
-	ldr r0, [r5, #0]
-	mov r1, #1
-	bl sub_0200D3F4
-	add r1, r5, #0
-	add r1, #0xa8
-	mov r0, #0
-	strh r0, [r1]
-	add r1, r5, #0
-	add r1, #0xb4
-	mov r0, #0x80
-	strh r0, [r1]
-	add r1, r5, #0
-	add r1, #0xb6
-	mov r0, #0xa0
-	strh r0, [r1]
-	add r1, r5, #0
-	add r1, #0xb8
-	mov r0, #0x40
-	str r0, [r1, #0]
-	add r1, r5, #0
-	add r1, #0xbc
-	mov r0, #0x18
-	str r0, [r1, #0]
-	add r0, r5, #0
-	add r0, #0xa0
-	ldr r0, [r0, #0]
-	mov r1, #1
-	bl sub_0200D3F4
-	mov r3, #1
-	ldr r0, [r5, #0]
-	add r1, sp, #8
-	add r2, sp, #4
-	lsl r3, r3, #0x14
-	bl sub_0200D67C
-	ldrh r0, [r5, #8]
-	bl sub_0201D250
-	mov r1, #0x14
-	ldrsh r1, [r5, r1]
-	lsl r6, r1, #0xc
-	ldr r1, [r5, #0x18]
-	add r7, r1, #0
-	mul r7, r0
-	ldrh r0, [r5, #8]
-	bl sub_0201D264
-	mov r1, #0x16
-	ldrsh r1, [r5, r1]
-	lsl r3, r1, #0xc
-	ldr r1, [r5, #0x1c]
-	add r2, r1, #0
-	mul r2, r0
-	add r2, r3, r2
-	mov r3, #1
-	ldr r0, [r5, #0]
-	add r1, r6, r7
-	lsl r3, r3, #0x14
-	bl sub_0200D650
-	add r0, r5, #0
-	add r0, #0xa0
-	mov r3, #1
-	ldr r0, [r0, #0]
-	add r1, sp, #8
-	add r2, sp, #4
-	lsl r3, r3, #0x14
-	bl sub_0200D67C
-	add r0, r5, #0
-	add r0, #0xa8
-	ldrh r0, [r0]
-	bl sub_0201D250
-	mov r1, #0xb4
-	ldrsh r1, [r5, r1]
-	lsl r6, r1, #0xc
-	add r1, r5, #0
-	add r1, #0xb8
-	ldr r1, [r1, #0]
-	add r7, r1, #0
-	mul r7, r0
-	add r0, r5, #0
-	add r0, #0xa8
-	ldrh r0, [r0]
-	bl sub_0201D264
-	mov r1, #0xb6
-	add r2, r5, #0
-	ldrsh r1, [r5, r1]
-	add r2, #0xbc
-	ldr r2, [r2, #0]
-	lsl r1, r1, #0xc
-	mul r0, r2
-	sub r2, r1, r0
-	add r0, r5, #0
-	add r0, #0xa0
-	mov r3, #1
-	ldr r0, [r0, #0]
-	add r1, r6, r7
-	lsl r3, r3, #0x14
-	bl sub_0200D650
-	ldr r0, [sp]
-	add r5, #0x50
-	add r0, r0, #1
-	str r0, [sp]
-	mov r0, #5
-	lsl r0, r0, #6
-	ldr r1, [r4, r0]
-	ldr r0, [sp]
-	cmp r0, r1
-	blt _02266112
-_0226620C:
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	ldr r0, [r4, #0x50]
-	mov r1, #0
-	bl sub_0200D3F4
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_0226623C:
-	mov r1, #0x51
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	mov r2, #0
-	mov r3, #3
-	bl ov116_02265D8C
-	mov r1, #0x51
-	str r0, [sp, #0xc]
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xf0
-	mov r2, #0
-	mov r3, #2
-	bl ov116_02265E64
-	mov r1, #0x52
-	str r0, [sp, #0x10]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, r4, #0
-	mov r2, #1
-	mov r3, #3
-	bl ov116_02265F1C
-	mov r2, #1
-	ldr r1, [sp, #0xc]
-	str r0, [sp, #0x14]
-	str r2, [sp, #0x18]
-	cmp r1, #0
-	beq _02266310
-	ldr r1, [sp, #0x10]
-	cmp r1, #0
-	beq _02266310
-	cmp r0, #0
-	beq _02266310
-	cmp r2, #0
-	beq _02266310
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	ldr r0, [r4, #0x50]
-	mov r1, #1
-	bl sub_0200D3F4
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_022662BE:
-	mov r3, #1
-	mov r1, #0x51
-	add r0, r4, #0
-	str r3, [sp, #0xc]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, #0xf0
-	mov r2, #0
-	bl ov116_02265FD4
-	mov r1, #0x52
-	str r0, [sp, #0x10]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, r4, #0
-	mov r2, #1
-	mov r3, #2
-	bl ov116_02265D8C
-	mov r1, #0x52
-	str r0, [sp, #0x14]
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0x50
-	mov r2, #1
-	mov r3, #3
-	bl ov116_02265F1C
-	ldr r1, [sp, #0xc]
-	str r0, [sp, #0x18]
-	cmp r1, #0
-	beq _02266310
-	ldr r1, [sp, #0x10]
-	cmp r1, #0
-	beq _02266310
-	ldr r1, [sp, #0x14]
-	cmp r1, #0
-	beq _02266310
-	cmp r0, #0
-	bne _02266312
-_02266310:
-	b _02266448
-_02266312:
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_0226633A:
-	mov r1, #0x51
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	mov r2, #0
-	mov r3, #2
-	bl ov116_02265E64
-	mov r1, #0x51
-	str r0, [sp, #0xc]
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xf0
-	mov r2, #0
-	mov r3, #3
-	bl ov116_02265D8C
-	mov r2, #1
-	mov r1, #0x52
-	str r0, [sp, #0x10]
-	add r0, r4, #0
-	str r2, [sp, #0x14]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, #0x50
-	mov r3, #2
-	bl ov116_02265D8C
-	ldr r1, [sp, #0xc]
-	str r0, [sp, #0x18]
-	cmp r1, #0
-	beq _02266448
-	ldr r1, [sp, #0x10]
-	cmp r1, #0
-	beq _02266448
-	ldr r1, [sp, #0x14]
-	cmp r1, #0
-	beq _02266448
-	cmp r0, #0
-	beq _02266448
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_022663B6:
-	mov r1, #0x51
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	mov r2, #0
-	mov r3, #1
-	bl ov116_02265FD4
-	mov r2, #1
-	mov r1, #0x52
-	str r0, [sp, #0xc]
-	add r0, r4, #0
-	str r2, [sp, #0x10]
-	str r2, [sp, #0x14]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, #0x50
-	mov r3, #2
-	bl ov116_02265D8C
-	ldr r1, [sp, #0xc]
-	str r0, [sp, #0x18]
-	cmp r1, #0
-	beq _02266448
-	ldr r1, [sp, #0x10]
-	cmp r1, #0
-	beq _02266448
-	ldr r1, [sp, #0x14]
-	cmp r1, #0
-	beq _02266448
-	cmp r0, #0
-	beq _02266448
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	mov r1, #0x53
-	lsl r1, r1, #2
-	ldr r0, [r4, r1]
-	cmp r0, #1
-	beq _0226642E
-	add r0, r0, #1
-	str r0, [r4, r1]
-	mov r0, #1
-	add r1, #0x1c
-	add sp, #0x1c
-	str r0, [r4, r1]
-	pop {r4, r5, r6, r7, pc}
-_0226642E:
-	mov r0, #0
-	str r0, [r4, r1]
-	add r0, r1, #0
-	add r0, #0x1c
-	ldr r0, [r4, r0]
-	add r1, #0x1c
-	add r0, r0, #1
-	add sp, #0x1c
-	str r0, [r4, r1]
-	pop {r4, r5, r6, r7, pc}
-_02266442:
-	add r0, r5, #0
-	bl sub_0200DA58
-_02266448:
-	add sp, #0x1c
-	pop {r4, r5, r6, r7, pc}
-	thumb_func_end ov116_022660A8
-
-	thumb_func_start ov116_0226644C
-ov116_0226644C: ; 0x0226644C
-	push {r4, r5, r6, r7, lr}
-	sub sp, #0x1c
-	ldr r3, _022664A4 ; =0x02267D10
-	add r2, sp, #0xc
-	add r5, r0, #0
-	add r4, r1, #0
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	bl sub_0200F2AC
-	cmp r0, #0
-	beq _02266476
-	mov r0, #0x5f
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, #0x34
-	ldrb r1, [r1]
-	cmp r1, #1
-	bne _02266480
-_02266476:
-	add r0, r5, #0
-	bl sub_0200DA58
-	add sp, #0x1c
-	pop {r4, r5, r6, r7, pc}
-_02266480:
-	add r1, r0, #0
-	sub r1, #0x14
-	ldr r1, [r4, r1]
-	cmp r1, #4
-	bls _0226648C
-	b _022667E8
-_0226648C:
-	add r1, r1, r1
-	add r1, pc
-	ldrh r1, [r1, #6]
-	lsl r1, r1, #0x10
-	asr r1, r1, #0x10
-	add pc, r1
-_02266498: ; jump table
-	.short _022664A8 - _02266498 - 2 ; case 0
-	.short _022665E0 - _02266498 - 2 ; case 1
-	.short _02266662 - _02266498 - 2 ; case 2
-	.short _022666E0 - _02266498 - 2 ; case 3
-	.short _0226675C - _02266498 - 2 ; case 4
-	nop
-_022664A4: .word 0x02267D10
-_022664A8:
-	sub r0, #0x3c
-	ldr r0, [r4, r0]
-	mov r1, #0
-	str r1, [sp]
-	cmp r0, #0
-	ble _022665B0
-	add r5, r4, #0
-_022664B6:
-	mov r0, #0
-	strh r0, [r5, #8]
-	mov r0, #0x80
-	strh r0, [r5, #0x14]
-	mov r0, #0xa0
-	strh r0, [r5, #0x16]
-	mov r0, #0x40
-	str r0, [r5, #0x18]
-	mov r0, #0x18
-	str r0, [r5, #0x1c]
-	ldr r0, [r5, #0]
-	mov r1, #1
-	bl sub_0200D3F4
-	add r1, r5, #0
-	add r1, #0xa8
-	mov r0, #0
-	strh r0, [r1]
-	add r1, r5, #0
-	add r1, #0xb4
-	mov r0, #0x80
-	strh r0, [r1]
-	add r1, r5, #0
-	add r1, #0xb6
-	mov r0, #0xa0
-	strh r0, [r1]
-	add r1, r5, #0
-	add r1, #0xb8
-	mov r0, #0x40
-	str r0, [r1, #0]
-	add r1, r5, #0
-	add r1, #0xbc
-	mov r0, #0x18
-	str r0, [r1, #0]
-	add r0, r5, #0
-	add r0, #0xa0
-	ldr r0, [r0, #0]
-	mov r1, #1
-	bl sub_0200D3F4
-	mov r3, #1
-	ldr r0, [r5, #0]
-	add r1, sp, #8
-	add r2, sp, #4
-	lsl r3, r3, #0x14
-	bl sub_0200D67C
-	ldrh r0, [r5, #8]
-	bl sub_0201D250
-	mov r1, #0x14
-	ldrsh r1, [r5, r1]
-	lsl r6, r1, #0xc
-	ldr r1, [r5, #0x18]
-	add r7, r1, #0
-	mul r7, r0
-	ldrh r0, [r5, #8]
-	bl sub_0201D264
-	mov r1, #0x16
-	ldrsh r1, [r5, r1]
-	lsl r3, r1, #0xc
-	ldr r1, [r5, #0x1c]
-	add r2, r1, #0
-	mul r2, r0
-	add r2, r3, r2
-	mov r3, #1
-	ldr r0, [r5, #0]
-	add r1, r6, r7
-	lsl r3, r3, #0x14
-	bl sub_0200D650
-	add r0, r5, #0
-	add r0, #0xa0
-	mov r3, #1
-	ldr r0, [r0, #0]
-	add r1, sp, #8
-	add r2, sp, #4
-	lsl r3, r3, #0x14
-	bl sub_0200D67C
-	add r0, r5, #0
-	add r0, #0xa8
-	ldrh r0, [r0]
-	bl sub_0201D250
-	mov r1, #0xb4
-	ldrsh r1, [r5, r1]
-	lsl r6, r1, #0xc
-	add r1, r5, #0
-	add r1, #0xb8
-	ldr r1, [r1, #0]
-	add r7, r1, #0
-	mul r7, r0
-	add r0, r5, #0
-	add r0, #0xa8
-	ldrh r0, [r0]
-	bl sub_0201D264
-	mov r1, #0xb6
-	add r2, r5, #0
-	ldrsh r1, [r5, r1]
-	add r2, #0xbc
-	ldr r2, [r2, #0]
-	lsl r1, r1, #0xc
-	mul r0, r2
-	sub r2, r1, r0
-	add r0, r5, #0
-	add r0, #0xa0
-	mov r3, #1
-	ldr r0, [r0, #0]
-	add r1, r6, r7
-	lsl r3, r3, #0x14
-	bl sub_0200D650
-	ldr r0, [sp]
-	add r5, #0x50
-	add r0, r0, #1
-	str r0, [sp]
-	mov r0, #5
-	lsl r0, r0, #6
-	ldr r1, [r4, r0]
-	ldr r0, [sp]
-	cmp r0, r1
-	blt _022664B6
-_022665B0:
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	ldr r0, [r4, #0x50]
-	mov r1, #0
-	bl sub_0200D3F4
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_022665E0:
-	mov r1, #0x51
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	mov r2, #0
-	mov r3, #3
-	bl ov116_02265D8C
-	mov r1, #0x51
-	str r0, [sp, #0xc]
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xf0
-	mov r2, #0
-	mov r3, #2
-	bl ov116_02265E64
-	mov r1, #0x52
-	str r0, [sp, #0x10]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, r4, #0
-	mov r2, #1
-	mov r3, #3
-	bl ov116_02265F1C
-	mov r2, #1
-	ldr r1, [sp, #0xc]
-	str r0, [sp, #0x14]
-	str r2, [sp, #0x18]
-	cmp r1, #0
-	beq _022666B6
-	ldr r1, [sp, #0x10]
-	cmp r1, #0
-	beq _022666B6
-	cmp r0, #0
-	beq _022666B6
-	cmp r2, #0
-	beq _022666B6
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	ldr r0, [r4, #0x50]
-	mov r1, #1
-	bl sub_0200D3F4
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_02266662:
-	mov r0, #1
-	mov r1, #0x51
-	str r0, [sp, #0xc]
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xf0
-	mov r2, #0
-	mov r3, #2
-	bl ov116_02265FD4
-	mov r1, #0x52
-	str r0, [sp, #0x10]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, r4, #0
-	mov r2, #1
-	mov r3, #2
-	bl ov116_02265D8C
-	mov r1, #0x52
-	str r0, [sp, #0x14]
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0x50
-	mov r2, #1
-	mov r3, #3
-	bl ov116_02265F1C
-	ldr r1, [sp, #0xc]
-	str r0, [sp, #0x18]
-	cmp r1, #0
-	beq _022666B6
-	ldr r1, [sp, #0x10]
-	cmp r1, #0
-	beq _022666B6
-	ldr r1, [sp, #0x14]
-	cmp r1, #0
-	beq _022666B6
-	cmp r0, #0
-	bne _022666B8
-_022666B6:
-	b _022667EE
-_022666B8:
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_022666E0:
-	mov r1, #0x51
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	mov r2, #0
-	mov r3, #2
-	bl ov116_02265E64
-	mov r1, #0x51
-	str r0, [sp, #0xc]
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xf0
-	mov r2, #0
-	mov r3, #3
-	bl ov116_02265D8C
-	mov r2, #1
-	mov r1, #0x52
-	str r0, [sp, #0x10]
-	add r0, r4, #0
-	str r2, [sp, #0x14]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, #0x50
-	mov r3, #2
-	bl ov116_02265D8C
-	ldr r1, [sp, #0xc]
-	str r0, [sp, #0x18]
-	cmp r1, #0
-	beq _022667EE
-	ldr r1, [sp, #0x10]
-	cmp r1, #0
-	beq _022667EE
-	ldr r1, [sp, #0x14]
-	cmp r1, #0
-	beq _022667EE
-	cmp r0, #0
-	beq _022667EE
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_0226675C:
-	mov r1, #0x51
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	mov r2, #0
-	mov r3, #2
-	bl ov116_02265FD4
-	mov r2, #1
-	mov r1, #0x52
-	str r0, [sp, #0xc]
-	add r0, r4, #0
-	str r2, [sp, #0x10]
-	str r2, [sp, #0x14]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, #0x50
-	mov r3, #2
-	bl ov116_02265D8C
-	ldr r1, [sp, #0xc]
-	str r0, [sp, #0x18]
-	cmp r1, #0
-	beq _022667EE
-	ldr r1, [sp, #0x10]
-	cmp r1, #0
-	beq _022667EE
-	ldr r1, [sp, #0x14]
-	cmp r1, #0
-	beq _022667EE
-	cmp r0, #0
-	beq _022667EE
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	mov r1, #0x53
-	lsl r1, r1, #2
-	ldr r0, [r4, r1]
-	cmp r0, #1
-	beq _022667D4
-	add r0, r0, #1
-	str r0, [r4, r1]
-	mov r0, #1
-	add r1, #0x1c
-	add sp, #0x1c
-	str r0, [r4, r1]
-	pop {r4, r5, r6, r7, pc}
-_022667D4:
-	mov r0, #0
-	str r0, [r4, r1]
-	add r0, r1, #0
-	add r0, #0x1c
-	ldr r0, [r4, r0]
-	add r1, #0x1c
-	add r0, r0, #1
-	add sp, #0x1c
-	str r0, [r4, r1]
-	pop {r4, r5, r6, r7, pc}
-_022667E8:
-	add r0, r5, #0
-	bl sub_0200DA58
-_022667EE:
-	add sp, #0x1c
-	pop {r4, r5, r6, r7, pc}
-	; .align 2, 0
-	thumb_func_end ov116_0226644C
-
-	thumb_func_start ov116_022667F4
-ov116_022667F4: ; 0x022667F4
-	push {r4, r5, r6, r7, lr}
-	sub sp, #0x1c
-	ldr r3, _02266850 ; =0x02267D30
-	add r2, sp, #0xc
-	add r5, r0, #0
-	add r4, r1, #0
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	bl sub_0200F2AC
-	cmp r0, #0
-	beq _0226681E
-	mov r0, #0x5f
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, #0x34
-	ldrb r1, [r1]
-	cmp r1, #1
-	bne _02266828
-_0226681E:
-	add r0, r5, #0
-	bl sub_0200DA58
-	add sp, #0x1c
-	pop {r4, r5, r6, r7, pc}
-_02266828:
-	add r1, r0, #0
-	sub r1, #0x14
-	ldr r1, [r4, r1]
-	cmp r1, #6
-	bls _02266834
-	b _02266BE6
-_02266834:
-	add r1, r1, r1
-	add r1, pc
-	ldrh r1, [r1, #6]
-	lsl r1, r1, #0x10
-	asr r1, r1, #0x10
-	add pc, r1
-_02266840: ; jump table
-	.short _02266854 - _02266840 - 2 ; case 0
-	.short _0226698C - _02266840 - 2 ; case 1
-	.short _02266A0E - _02266840 - 2 ; case 2
-	.short _02266A88 - _02266840 - 2 ; case 3
-	.short _02266AB4 - _02266840 - 2 ; case 4
-	.short _02266B30 - _02266840 - 2 ; case 5
-	.short _02266B9A - _02266840 - 2 ; case 6
-	nop
-_02266850: .word 0x02267D30
-_02266854:
-	sub r0, #0x3c
-	ldr r0, [r4, r0]
-	mov r1, #0
-	str r1, [sp]
-	cmp r0, #0
-	ble _0226695C
-	add r5, r4, #0
-_02266862:
-	mov r0, #0
-	strh r0, [r5, #8]
-	mov r0, #0x80
-	strh r0, [r5, #0x14]
-	mov r0, #0xa0
-	strh r0, [r5, #0x16]
-	mov r0, #0x40
-	str r0, [r5, #0x18]
-	mov r0, #0x18
-	str r0, [r5, #0x1c]
-	ldr r0, [r5, #0]
-	mov r1, #1
-	bl sub_0200D3F4
-	add r1, r5, #0
-	add r1, #0xa8
-	mov r0, #0
-	strh r0, [r1]
-	add r1, r5, #0
-	add r1, #0xb4
-	mov r0, #0x80
-	strh r0, [r1]
-	add r1, r5, #0
-	add r1, #0xb6
-	mov r0, #0xa0
-	strh r0, [r1]
-	add r1, r5, #0
-	add r1, #0xb8
-	mov r0, #0x40
-	str r0, [r1, #0]
-	add r1, r5, #0
-	add r1, #0xbc
-	mov r0, #0x18
-	str r0, [r1, #0]
-	add r0, r5, #0
-	add r0, #0xa0
-	ldr r0, [r0, #0]
-	mov r1, #1
-	bl sub_0200D3F4
-	mov r3, #1
-	ldr r0, [r5, #0]
-	add r1, sp, #8
-	add r2, sp, #4
-	lsl r3, r3, #0x14
-	bl sub_0200D67C
-	ldrh r0, [r5, #8]
-	bl sub_0201D250
-	mov r1, #0x14
-	ldrsh r1, [r5, r1]
-	lsl r6, r1, #0xc
-	ldr r1, [r5, #0x18]
-	add r7, r1, #0
-	mul r7, r0
-	ldrh r0, [r5, #8]
-	bl sub_0201D264
-	mov r1, #0x16
-	ldrsh r1, [r5, r1]
-	lsl r3, r1, #0xc
-	ldr r1, [r5, #0x1c]
-	add r2, r1, #0
-	mul r2, r0
-	add r2, r3, r2
-	mov r3, #1
-	ldr r0, [r5, #0]
-	add r1, r6, r7
-	lsl r3, r3, #0x14
-	bl sub_0200D650
-	add r0, r5, #0
-	add r0, #0xa0
-	mov r3, #1
-	ldr r0, [r0, #0]
-	add r1, sp, #8
-	add r2, sp, #4
-	lsl r3, r3, #0x14
-	bl sub_0200D67C
-	add r0, r5, #0
-	add r0, #0xa8
-	ldrh r0, [r0]
-	bl sub_0201D250
-	mov r1, #0xb4
-	ldrsh r1, [r5, r1]
-	lsl r6, r1, #0xc
-	add r1, r5, #0
-	add r1, #0xb8
-	ldr r1, [r1, #0]
-	add r7, r1, #0
-	mul r7, r0
-	add r0, r5, #0
-	add r0, #0xa8
-	ldrh r0, [r0]
-	bl sub_0201D264
-	mov r1, #0xb6
-	add r2, r5, #0
-	ldrsh r1, [r5, r1]
-	add r2, #0xbc
-	ldr r2, [r2, #0]
-	lsl r1, r1, #0xc
-	mul r0, r2
-	sub r2, r1, r0
-	add r0, r5, #0
-	add r0, #0xa0
-	mov r3, #1
-	ldr r0, [r0, #0]
-	add r1, r6, r7
-	lsl r3, r3, #0x14
-	bl sub_0200D650
-	ldr r0, [sp]
-	add r5, #0x50
-	add r0, r0, #1
-	str r0, [sp]
-	mov r0, #5
-	lsl r0, r0, #6
-	ldr r1, [r4, r0]
-	ldr r0, [sp]
-	cmp r0, r1
-	blt _02266862
-_0226695C:
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	ldr r0, [r4, #0x50]
-	mov r1, #0
-	bl sub_0200D3F4
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_0226698C:
-	mov r1, #0x51
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	mov r2, #0
-	mov r3, #3
-	bl ov116_02265D8C
-	mov r1, #0x51
-	str r0, [sp, #0xc]
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xf0
-	mov r2, #0
-	mov r3, #2
-	bl ov116_02265E64
-	mov r1, #0x52
-	str r0, [sp, #0x10]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, r4, #0
-	mov r2, #1
-	mov r3, #3
-	bl ov116_02265F1C
-	mov r2, #1
-	ldr r1, [sp, #0xc]
-	str r0, [sp, #0x14]
-	str r2, [sp, #0x18]
-	cmp r1, #0
-	beq _02266AA0
-	ldr r1, [sp, #0x10]
-	cmp r1, #0
-	beq _02266AA0
-	cmp r0, #0
-	beq _02266AA0
-	cmp r2, #0
-	beq _02266AA0
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	ldr r0, [r4, #0x50]
-	mov r1, #1
-	bl sub_0200D3F4
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_02266A0E:
-	mov r3, #1
-	mov r1, #0x51
-	add r0, r4, #0
-	str r3, [sp, #0xc]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, #0xf0
-	mov r2, #0
-	bl ov116_02265FD4
-	mov r1, #0x52
-	str r0, [sp, #0x10]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, r4, #0
-	mov r2, #1
-	mov r3, #2
-	bl ov116_02265D8C
-	mov r1, #0x52
-	str r0, [sp, #0x14]
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0x50
-	mov r2, #1
-	mov r3, #3
-	bl ov116_02265F1C
-	ldr r1, [sp, #0xc]
-	str r0, [sp, #0x18]
-	cmp r1, #0
-	beq _02266AA0
-	ldr r1, [sp, #0x10]
-	cmp r1, #0
-	beq _02266AA0
-	ldr r1, [sp, #0x14]
-	cmp r1, #0
-	beq _02266AA0
-	cmp r0, #0
-	beq _02266AA0
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_02266A88:
-	mov r1, #0x51
-	lsl r1, r1, #2
-	add r0, r4, #0
-	mov r2, #1
-	ldr r1, [r4, r1]
-	add r0, #0xf0
-	add r3, r2, #0
-	bl ov116_02265FD4
-	str r0, [sp, #0x10]
-	cmp r0, #0
-	bne _02266AA2
-_02266AA0:
-	b _02266BEC
-_02266AA2:
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_02266AB4:
-	mov r1, #0x51
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	mov r2, #0
-	mov r3, #2
-	bl ov116_02265E64
-	mov r1, #0x51
-	str r0, [sp, #0xc]
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xf0
-	mov r2, #0
-	mov r3, #3
-	bl ov116_02265D8C
-	mov r2, #1
-	mov r1, #0x52
-	str r0, [sp, #0x10]
-	add r0, r4, #0
-	str r2, [sp, #0x14]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, #0x50
-	mov r3, #2
-	bl ov116_02265D8C
-	ldr r1, [sp, #0xc]
-	str r0, [sp, #0x18]
-	cmp r1, #0
-	beq _02266BEC
-	ldr r1, [sp, #0x10]
-	cmp r1, #0
-	beq _02266BEC
-	ldr r1, [sp, #0x14]
-	cmp r1, #0
-	beq _02266BEC
-	cmp r0, #0
-	beq _02266BEC
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_02266B30:
-	mov r1, #0x51
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	mov r2, #0
-	mov r3, #1
-	bl ov116_02265FD4
-	mov r2, #1
-	mov r1, #0x52
-	str r0, [sp, #0xc]
-	add r0, r4, #0
-	str r2, [sp, #0x10]
-	str r2, [sp, #0x14]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, #0x50
-	mov r3, #2
-	bl ov116_02265D8C
-	ldr r1, [sp, #0xc]
-	str r0, [sp, #0x18]
-	cmp r1, #0
-	beq _02266BEC
-	ldr r1, [sp, #0x10]
-	cmp r1, #0
-	beq _02266BEC
-	ldr r1, [sp, #0x14]
-	cmp r1, #0
-	beq _02266BEC
-	cmp r0, #0
-	beq _02266BEC
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_02266B9A:
-	mov r1, #0x51
-	lsl r1, r1, #2
-	add r0, r4, #0
-	mov r2, #1
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	add r3, r2, #0
-	bl ov116_02265FD4
-	str r0, [sp, #0xc]
-	cmp r0, #0
-	beq _02266BEC
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	mov r1, #0x53
-	lsl r1, r1, #2
-	ldr r0, [r4, r1]
-	cmp r0, #1
-	beq _02266BD2
-	add r0, r0, #1
-	str r0, [r4, r1]
-	mov r0, #1
-	add r1, #0x1c
-	add sp, #0x1c
-	str r0, [r4, r1]
-	pop {r4, r5, r6, r7, pc}
-_02266BD2:
-	mov r0, #0
-	str r0, [r4, r1]
-	add r0, r1, #0
-	add r0, #0x1c
-	ldr r0, [r4, r0]
-	add r1, #0x1c
-	add r0, r0, #1
-	add sp, #0x1c
-	str r0, [r4, r1]
-	pop {r4, r5, r6, r7, pc}
-_02266BE6:
-	add r0, r5, #0
-	bl sub_0200DA58
-_02266BEC:
-	add sp, #0x1c
-	pop {r4, r5, r6, r7, pc}
-	thumb_func_end ov116_022667F4
-
-	thumb_func_start ov116_02266BF0
-ov116_02266BF0: ; 0x02266BF0
-	push {r4, r5, r6, r7, lr}
-	sub sp, #0x1c
-	ldr r3, _02266C4C ; =0x02267D50
-	add r2, sp, #0xc
-	add r5, r0, #0
-	add r4, r1, #0
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	ldmia r3!, {r0, r1}
-	stmia r2!, {r0, r1}
-	bl sub_0200F2AC
-	cmp r0, #0
-	beq _02266C1A
-	mov r0, #0x5f
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, #0x34
-	ldrb r1, [r1]
-	cmp r1, #1
-	bne _02266C24
-_02266C1A:
-	add r0, r5, #0
-	bl sub_0200DA58
-	add sp, #0x1c
-	pop {r4, r5, r6, r7, pc}
-_02266C24:
-	add r1, r0, #0
-	sub r1, #0x14
-	ldr r1, [r4, r1]
-	cmp r1, #6
-	bls _02266C30
-	b _02266FE2
-_02266C30:
-	add r1, r1, r1
-	add r1, pc
-	ldrh r1, [r1, #6]
-	lsl r1, r1, #0x10
-	asr r1, r1, #0x10
-	add pc, r1
-_02266C3C: ; jump table
-	.short _02266C50 - _02266C3C - 2 ; case 0
-	.short _02266D88 - _02266C3C - 2 ; case 1
-	.short _02266E0A - _02266C3C - 2 ; case 2
-	.short _02266E84 - _02266C3C - 2 ; case 3
-	.short _02266EB0 - _02266C3C - 2 ; case 4
-	.short _02266F2C - _02266C3C - 2 ; case 5
-	.short _02266F96 - _02266C3C - 2 ; case 6
-	nop
-_02266C4C: .word 0x02267D50
-_02266C50:
-	sub r0, #0x3c
-	ldr r0, [r4, r0]
-	mov r1, #0
-	str r1, [sp]
-	cmp r0, #0
-	ble _02266D58
-	add r5, r4, #0
-_02266C5E:
-	mov r0, #0
-	strh r0, [r5, #8]
-	mov r0, #0x80
-	strh r0, [r5, #0x14]
-	mov r0, #0xa0
-	strh r0, [r5, #0x16]
-	mov r0, #0x40
-	str r0, [r5, #0x18]
-	mov r0, #0x18
-	str r0, [r5, #0x1c]
-	ldr r0, [r5, #0]
-	mov r1, #1
-	bl sub_0200D3F4
-	add r1, r5, #0
-	add r1, #0xa8
-	mov r0, #0
-	strh r0, [r1]
-	add r1, r5, #0
-	add r1, #0xb4
-	mov r0, #0x80
-	strh r0, [r1]
-	add r1, r5, #0
-	add r1, #0xb6
-	mov r0, #0xa0
-	strh r0, [r1]
-	add r1, r5, #0
-	add r1, #0xb8
-	mov r0, #0x40
-	str r0, [r1, #0]
-	add r1, r5, #0
-	add r1, #0xbc
-	mov r0, #0x18
-	str r0, [r1, #0]
-	add r0, r5, #0
-	add r0, #0xa0
-	ldr r0, [r0, #0]
-	mov r1, #1
-	bl sub_0200D3F4
-	mov r3, #1
-	ldr r0, [r5, #0]
-	add r1, sp, #8
-	add r2, sp, #4
-	lsl r3, r3, #0x14
-	bl sub_0200D67C
-	ldrh r0, [r5, #8]
-	bl sub_0201D250
-	mov r1, #0x14
-	ldrsh r1, [r5, r1]
-	lsl r6, r1, #0xc
-	ldr r1, [r5, #0x18]
-	add r7, r1, #0
-	mul r7, r0
-	ldrh r0, [r5, #8]
-	bl sub_0201D264
-	mov r1, #0x16
-	ldrsh r1, [r5, r1]
-	lsl r3, r1, #0xc
-	ldr r1, [r5, #0x1c]
-	add r2, r1, #0
-	mul r2, r0
-	add r2, r3, r2
-	mov r3, #1
-	ldr r0, [r5, #0]
-	add r1, r6, r7
-	lsl r3, r3, #0x14
-	bl sub_0200D650
-	add r0, r5, #0
-	add r0, #0xa0
-	mov r3, #1
-	ldr r0, [r0, #0]
-	add r1, sp, #8
-	add r2, sp, #4
-	lsl r3, r3, #0x14
-	bl sub_0200D67C
-	add r0, r5, #0
-	add r0, #0xa8
-	ldrh r0, [r0]
-	bl sub_0201D250
-	mov r1, #0xb4
-	ldrsh r1, [r5, r1]
-	lsl r6, r1, #0xc
-	add r1, r5, #0
-	add r1, #0xb8
-	ldr r1, [r1, #0]
-	add r7, r1, #0
-	mul r7, r0
-	add r0, r5, #0
-	add r0, #0xa8
-	ldrh r0, [r0]
-	bl sub_0201D264
-	mov r1, #0xb6
-	add r2, r5, #0
-	ldrsh r1, [r5, r1]
-	add r2, #0xbc
-	ldr r2, [r2, #0]
-	lsl r1, r1, #0xc
-	mul r0, r2
-	sub r2, r1, r0
-	add r0, r5, #0
-	add r0, #0xa0
-	mov r3, #1
-	ldr r0, [r0, #0]
-	add r1, r6, r7
-	lsl r3, r3, #0x14
-	bl sub_0200D650
-	ldr r0, [sp]
-	add r5, #0x50
-	add r0, r0, #1
-	str r0, [sp]
-	mov r0, #5
-	lsl r0, r0, #6
-	ldr r1, [r4, r0]
-	ldr r0, [sp]
-	cmp r0, r1
-	blt _02266C5E
-_02266D58:
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	ldr r0, [r4, #0x50]
-	mov r1, #0
-	bl sub_0200D3F4
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_02266D88:
-	mov r1, #0x51
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	mov r2, #0
-	mov r3, #3
-	bl ov116_02265D8C
-	mov r1, #0x51
-	str r0, [sp, #0xc]
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xf0
-	mov r2, #0
-	mov r3, #2
-	bl ov116_02265E64
-	mov r1, #0x52
-	str r0, [sp, #0x10]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, r4, #0
-	mov r2, #1
-	mov r3, #3
-	bl ov116_02265F1C
-	mov r2, #1
-	ldr r1, [sp, #0xc]
-	str r0, [sp, #0x14]
-	str r2, [sp, #0x18]
-	cmp r1, #0
-	beq _02266E9C
-	ldr r1, [sp, #0x10]
-	cmp r1, #0
-	beq _02266E9C
-	cmp r0, #0
-	beq _02266E9C
-	cmp r2, #0
-	beq _02266E9C
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	ldr r0, [r4, #0x50]
-	mov r1, #1
-	bl sub_0200D3F4
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_02266E0A:
-	mov r3, #1
-	mov r1, #0x51
-	add r0, r4, #0
-	str r3, [sp, #0xc]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, #0xf0
-	mov r2, #0
-	bl ov116_02265FD4
-	mov r1, #0x52
-	str r0, [sp, #0x10]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, r4, #0
-	mov r2, #1
-	mov r3, #2
-	bl ov116_02265D8C
-	mov r1, #0x52
-	str r0, [sp, #0x14]
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0x50
-	mov r2, #1
-	mov r3, #3
-	bl ov116_02265F1C
-	ldr r1, [sp, #0xc]
-	str r0, [sp, #0x18]
-	cmp r1, #0
-	beq _02266E9C
-	ldr r1, [sp, #0x10]
-	cmp r1, #0
-	beq _02266E9C
-	ldr r1, [sp, #0x14]
-	cmp r1, #0
-	beq _02266E9C
-	cmp r0, #0
-	beq _02266E9C
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_02266E84:
-	mov r1, #0x51
-	lsl r1, r1, #2
-	add r0, r4, #0
-	mov r2, #1
-	ldr r1, [r4, r1]
-	add r0, #0xf0
-	add r3, r2, #0
-	bl ov116_02265FD4
-	str r0, [sp, #0x10]
-	cmp r0, #0
-	bne _02266E9E
-_02266E9C:
-	b _02266FE8
-_02266E9E:
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_02266EB0:
-	mov r1, #0x51
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	mov r2, #0
-	mov r3, #2
-	bl ov116_02265E64
-	mov r1, #0x51
-	str r0, [sp, #0xc]
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xf0
-	mov r2, #0
-	mov r3, #3
-	bl ov116_02265D8C
-	mov r2, #1
-	mov r1, #0x52
-	str r0, [sp, #0x10]
-	add r0, r4, #0
-	str r2, [sp, #0x14]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, #0x50
-	mov r3, #2
-	bl ov116_02265D8C
-	ldr r1, [sp, #0xc]
-	str r0, [sp, #0x18]
-	cmp r1, #0
-	beq _02266FE8
-	ldr r1, [sp, #0x10]
-	cmp r1, #0
-	beq _02266FE8
-	ldr r1, [sp, #0x14]
-	cmp r1, #0
-	beq _02266FE8
-	cmp r0, #0
-	beq _02266FE8
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_02266F2C:
-	mov r1, #0x51
-	lsl r1, r1, #2
-	add r0, r4, #0
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	mov r2, #0
-	mov r3, #1
-	bl ov116_02265FD4
-	mov r2, #1
-	mov r1, #0x52
-	str r0, [sp, #0xc]
-	add r0, r4, #0
-	str r2, [sp, #0x10]
-	str r2, [sp, #0x14]
-	lsl r1, r1, #2
-	ldr r1, [r4, r1]
-	add r0, #0x50
-	mov r3, #2
-	bl ov116_02265D8C
-	ldr r1, [sp, #0xc]
-	str r0, [sp, #0x18]
-	cmp r1, #0
-	beq _02266FE8
-	ldr r1, [sp, #0x10]
-	cmp r1, #0
-	beq _02266FE8
-	ldr r1, [sp, #0x14]
-	cmp r1, #0
-	beq _02266FE8
-	cmp r0, #0
-	beq _02266FE8
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0xf0
-	bl ov116_02265D84
-	add r0, r4, #0
-	bl ov116_02265D84
-	add r0, r4, #0
-	add r0, #0x50
-	bl ov116_02265D84
-	mov r0, #0x5a
-	lsl r0, r0, #2
-	ldr r1, [r4, r0]
-	add r1, r1, #1
-	str r1, [r4, r0]
-_02266F96:
-	mov r1, #0x51
-	lsl r1, r1, #2
-	add r0, r4, #0
-	mov r2, #1
-	ldr r1, [r4, r1]
-	add r0, #0xa0
-	add r3, r2, #0
-	bl ov116_02265FD4
-	str r0, [sp, #0xc]
-	cmp r0, #0
-	beq _02266FE8
-	add r0, r4, #0
-	add r0, #0xa0
-	bl ov116_02265D84
-	mov r1, #0x53
-	lsl r1, r1, #2
-	ldr r0, [r4, r1]
-	cmp r0, #8
-	beq _02266FCE
-	add r0, r0, #1
-	str r0, [r4, r1]
-	mov r0, #1
-	add r1, #0x1c
-	add sp, #0x1c
-	str r0, [r4, r1]
-	pop {r4, r5, r6, r7, pc}
-_02266FCE:
-	mov r0, #0
-	str r0, [r4, r1]
-	add r0, r1, #0
-	add r0, #0x1c
-	ldr r0, [r4, r0]
-	add r1, #0x1c
-	add r0, r0, #1
-	add sp, #0x1c
-	str r0, [r4, r1]
-	pop {r4, r5, r6, r7, pc}
-_02266FE2:
-	add r0, r5, #0
-	bl sub_0200DA58
-_02266FE8:
-	add sp, #0x1c
-	pop {r4, r5, r6, r7, pc}
-	thumb_func_end ov116_02266BF0
-
-	.rodata
-
-
-	.global Unk_ov116_02267D08
-Unk_ov116_02267D08: ; 0x02267D08
-	.incbin "incbin/overlay116_rodata.bin", 0x5C8, 0x5D0 - 0x5C8
-
-	.global Unk_ov116_02267D10
-Unk_ov116_02267D10: ; 0x02267D10
-	.incbin "incbin/overlay116_rodata.bin", 0x5D0, 0x5E0 - 0x5D0
-
-	.global Unk_ov116_02267D20
-Unk_ov116_02267D20: ; 0x02267D20
-	.incbin "incbin/overlay116_rodata.bin", 0x5E0, 0x5F0 - 0x5E0
-
-	.global Unk_ov116_02267D30
-Unk_ov116_02267D30: ; 0x02267D30
-	.incbin "incbin/overlay116_rodata.bin", 0x5F0, 0x600 - 0x5F0
-
-	.global Unk_ov116_02267D40
-Unk_ov116_02267D40: ; 0x02267D40
-	.incbin "incbin/overlay116_rodata.bin", 0x600, 0x610 - 0x600
-
-	.global Unk_ov116_02267D50
-Unk_ov116_02267D50: ; 0x02267D50
-	.incbin "incbin/overlay116_rodata.bin", 0x610, 0x620 - 0x610
-
-	.global Unk_ov116_02267D60
-Unk_ov116_02267D60: ; 0x02267D60
-	.incbin "incbin/overlay116_rodata.bin", 0x620, 0x634 - 0x620
-
-	.global Unk_ov116_02267D74
-Unk_ov116_02267D74: ; 0x02267D74
-	.incbin "incbin/overlay116_rodata.bin", 0x634, 0x64C - 0x634
-
-	.global Unk_ov116_02267D8C
-Unk_ov116_02267D8C: ; 0x02267D8C
-	.incbin "incbin/overlay116_rodata.bin", 0x64C, 0x664 - 0x64C
-
-	.global Unk_ov116_02267DA4
-Unk_ov116_02267DA4: ; 0x02267DA4
-	.incbin "incbin/overlay116_rodata.bin", 0x664, 0x168
-
diff --git a/asm/overlay116/ov116_02266FEC.inc b/asm/overlay116/ov116_02266FEC.inc
deleted file mode 100644
index d93ea7c2eb..0000000000
--- a/asm/overlay116/ov116_02266FEC.inc
+++ /dev/null
@@ -1,15 +0,0 @@
-.public MTX_Copy44To43_
-.public FX_Sqrt
-.public _d_dtof
-.public _d_mul
-.public _dsub
-.public _f_add
-.public _f_fgt
-.public _fdiv
-.public _f_ftod
-.public _f_ftoi
-.public _f_itof
-.public _f_mul
-.public _f_sub
-.public ov116_0226711C
-.public ov116_022673FC
diff --git a/asm/overlay116/ov116_02266FEC.s b/asm/overlay116/ov116_02266FEC.s
deleted file mode 100644
index 9429c31380..0000000000
--- a/asm/overlay116/ov116_02266FEC.s
+++ /dev/null
@@ -1,809 +0,0 @@
-	.include "macros/function.inc"
-	.include "overlay116/ov116_02266FEC.inc"
-
-	
-
-	.text
-
-
-	thumb_func_start ov116_02266FEC
-ov116_02266FEC: ; 0x02266FEC
-	mov r1, #0xfe
-	lsl r1, r1, #0x16
-	str r1, [r0, #0]
-	mov r1, #0
-	str r1, [r0, #4]
-	str r1, [r0, #8]
-	str r1, [r0, #0xc]
-	bx lr
-	thumb_func_end ov116_02266FEC
-
-	thumb_func_start ov116_02266FFC
-ov116_02266FFC: ; 0x02266FFC
-	add r3, r0, #0
-	add r2, r1, #0
-	ldmia r2!, {r0, r1}
-	stmia r3!, {r0, r1}
-	ldmia r2!, {r0, r1}
-	stmia r3!, {r0, r1}
-	bx lr
-	; .align 2, 0
-	thumb_func_end ov116_02266FFC
-
-	thumb_func_start ov116_0226700C
-ov116_0226700C: ; 0x0226700C
-	push {r3, r4, r5, r6, r7, lr}
-	sub sp, #0x10
-	add r5, r1, #0
-	add r4, r2, #0
-	add r6, r0, #0
-	ldr r0, [r5, #0]
-	ldr r1, [r4, #0]
-	bl _f_mul
-	add r7, r0, #0
-	ldr r0, [r5, #4]
-	ldr r1, [r4, #4]
-	bl _f_mul
-	add r1, r0, #0
-	add r0, r7, #0
-	bl _f_sub
-	add r7, r0, #0
-	ldr r0, [r5, #8]
-	ldr r1, [r4, #8]
-	bl _f_mul
-	add r1, r0, #0
-	add r0, r7, #0
-	bl _f_sub
-	add r7, r0, #0
-	ldr r0, [r5, #0xc]
-	ldr r1, [r4, #0xc]
-	bl _f_mul
-	add r1, r0, #0
-	add r0, r7, #0
-	bl _f_sub
-	str r0, [r6, #0]
-	ldr r0, [r5, #8]
-	ldr r1, [r4, #0xc]
-	bl _f_mul
-	add r7, r0, #0
-	ldr r0, [r5, #0]
-	ldr r1, [r4, #4]
-	bl _f_mul
-	str r0, [sp]
-	ldr r0, [r5, #4]
-	ldr r1, [r4, #0]
-	bl _f_mul
-	add r1, r0, #0
-	ldr r0, [sp]
-	bl _f_add
-	add r1, r0, #0
-	add r0, r7, #0
-	bl _f_add
-	add r7, r0, #0
-	ldr r0, [r5, #0xc]
-	ldr r1, [r4, #8]
-	bl _f_mul
-	add r1, r0, #0
-	add r0, r7, #0
-	bl _f_sub
-	str r0, [r6, #4]
-	ldr r0, [r5, #0xc]
-	ldr r1, [r4, #4]
-	bl _f_mul
-	add r7, r0, #0
-	ldr r0, [r5, #8]
-	ldr r1, [r4, #0]
-	bl _f_mul
-	str r0, [sp, #4]
-	ldr r0, [r5, #0]
-	ldr r1, [r4, #8]
-	bl _f_mul
-	str r0, [sp, #8]
-	ldr r0, [r5, #4]
-	ldr r1, [r4, #0xc]
-	bl _f_mul
-	add r1, r0, #0
-	ldr r0, [sp, #8]
-	bl _f_sub
-	add r1, r0, #0
-	ldr r0, [sp, #4]
-	bl _f_add
-	add r1, r0, #0
-	add r0, r7, #0
-	bl _f_add
-	str r0, [r6, #8]
-	ldr r0, [r5, #0xc]
-	ldr r1, [r4, #0]
-	bl _f_mul
-	str r0, [sp, #0xc]
-	ldr r0, [r5, #0]
-	ldr r1, [r4, #0xc]
-	bl _f_mul
-	add r7, r0, #0
-	ldr r0, [r5, #4]
-	ldr r1, [r4, #8]
-	bl _f_mul
-	add r1, r0, #0
-	add r0, r7, #0
-	bl _f_add
-	add r7, r0, #0
-	ldr r0, [r5, #8]
-	ldr r1, [r4, #4]
-	bl _f_mul
-	add r1, r0, #0
-	add r0, r7, #0
-	bl _f_sub
-	add r1, r0, #0
-	ldr r0, [sp, #0xc]
-	bl _f_add
-	str r0, [r6, #0xc]
-	add sp, #0x10
-	pop {r3, r4, r5, r6, r7, pc}
-	; .align 2, 0
-	thumb_func_end ov116_0226700C
-
-	thumb_func_start ov116_0226711C
-ov116_0226711C: ; 0x0226711C
-	push {r3, r4, r5, r6, r7, lr}
-	add r5, r0, #0
-	ldr r0, [r5, #0xc]
-	add r1, r0, #0
-	bl _f_add
-	add r4, r0, #0
-	ldr r0, [r5, #8]
-	add r1, r0, #0
-	bl _f_add
-	add r6, r0, #0
-	ldr r0, [r5, #0]
-	add r1, r0, #0
-	bl _f_mul
-	add r7, r0, #0
-	ldr r0, [r5, #4]
-	add r1, r0, #0
-	bl _f_add
-	add r1, r0, #0
-	add r0, r7, #0
-	bl _f_add
-	add r1, r0, #0
-	add r0, r6, #0
-	bl _f_add
-	add r1, r0, #0
-	add r0, r4, #0
-	bl _f_add
-	pop {r3, r4, r5, r6, r7, pc}
-	thumb_func_end ov116_0226711C
-
-	thumb_func_start ov116_02267160
-ov116_02267160: ; 0x02267160
-	push {r4, lr}
-	add r4, r0, #0
-	bl ov116_0226711C
-	mov r1, #0
-	bl _f_fgt
-	bls _0226718A
-	add r0, r4, #0
-	bl ov116_0226711C
-	add r1, r0, #0
-	ldr r0, _022671B4 ; =0x45800000
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _022671A0
-_0226718A:
-	add r0, r4, #0
-	bl ov116_0226711C
-	add r1, r0, #0
-	ldr r0, _022671B4 ; =0x45800000
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_022671A0:
-	bl _f_ftoi
-	bl FX_Sqrt
-	bl _f_itof
-	ldr r1, _022671B4 ; =0x45800000
-	bl _fdiv
-	pop {r4, pc}
-	; .align 2, 0
-_022671B4: .word 0x45800000
-	thumb_func_end ov116_02267160
-
-	thumb_func_start ov116_022671B8
-ov116_022671B8: ; 0x022671B8
-	push {r4, r5, r6, lr}
-	add r4, r1, #0
-	add r5, r0, #0
-	add r6, r2, #0
-	ldr r0, [r4, #0]
-	add r1, r6, #0
-	bl _fdiv
-	str r0, [r5, #0]
-	ldr r0, [r4, #4]
-	add r1, r6, #0
-	bl _fdiv
-	str r0, [r5, #4]
-	ldr r0, [r4, #8]
-	add r1, r6, #0
-	bl _fdiv
-	str r0, [r5, #8]
-	ldr r0, [r4, #0xc]
-	add r1, r6, #0
-	bl _fdiv
-	str r0, [r5, #0xc]
-	pop {r4, r5, r6, pc}
-	; .align 2, 0
-	thumb_func_end ov116_022671B8
-
-	thumb_func_start ov116_022671EC
-ov116_022671EC: ; 0x022671EC
-	push {r4, r5, r6, r7, lr}
-	sub sp, #0x24
-	add r5, r1, #0
-	add r4, r0, #0
-	ldr r0, [r5, #4]
-	add r1, r0, #0
-	bl _f_mul
-	bl _f_ftod
-	add r3, r1, #0
-	mov r1, #1
-	add r2, r0, #0
-	mov r0, #0
-	lsl r1, r1, #0x1e
-	bl _d_mul
-	bl _d_dtof
-	str r0, [sp, #8]
-	ldr r0, [r5, #8]
-	add r1, r0, #0
-	bl _f_mul
-	bl _f_ftod
-	add r3, r1, #0
-	mov r1, #1
-	add r2, r0, #0
-	mov r0, #0
-	lsl r1, r1, #0x1e
-	bl _d_mul
-	bl _d_dtof
-	str r0, [sp, #0xc]
-	ldr r0, [r5, #0xc]
-	add r1, r0, #0
-	bl _f_mul
-	bl _f_ftod
-	add r3, r1, #0
-	mov r1, #1
-	add r2, r0, #0
-	mov r0, #0
-	lsl r1, r1, #0x1e
-	bl _d_mul
-	bl _d_dtof
-	add r6, r0, #0
-	ldr r0, [r5, #4]
-	ldr r1, [r5, #8]
-	bl _f_mul
-	bl _f_ftod
-	add r3, r1, #0
-	mov r1, #1
-	add r2, r0, #0
-	mov r0, #0
-	lsl r1, r1, #0x1e
-	bl _d_mul
-	bl _d_dtof
-	str r0, [sp, #0x10]
-	ldr r0, [r5, #8]
-	ldr r1, [r5, #0xc]
-	bl _f_mul
-	bl _f_ftod
-	add r3, r1, #0
-	mov r1, #1
-	add r2, r0, #0
-	mov r0, #0
-	lsl r1, r1, #0x1e
-	bl _d_mul
-	bl _d_dtof
-	str r0, [sp, #0x14]
-	ldr r0, [r5, #0xc]
-	ldr r1, [r5, #4]
-	bl _f_mul
-	bl _f_ftod
-	add r3, r1, #0
-	mov r1, #1
-	add r2, r0, #0
-	mov r0, #0
-	lsl r1, r1, #0x1e
-	bl _d_mul
-	bl _d_dtof
-	str r0, [sp, #0x18]
-	ldr r0, [r5, #4]
-	ldr r1, [r5, #0]
-	bl _f_mul
-	bl _f_ftod
-	add r3, r1, #0
-	mov r1, #1
-	add r2, r0, #0
-	mov r0, #0
-	lsl r1, r1, #0x1e
-	bl _d_mul
-	bl _d_dtof
-	str r0, [sp, #0x1c]
-	ldr r0, [r5, #8]
-	ldr r1, [r5, #0]
-	bl _f_mul
-	bl _f_ftod
-	add r3, r1, #0
-	mov r1, #1
-	add r2, r0, #0
-	mov r0, #0
-	lsl r1, r1, #0x1e
-	bl _d_mul
-	bl _d_dtof
-	add r7, r0, #0
-	ldr r0, [r5, #0xc]
-	ldr r1, [r5, #0]
-	bl _f_mul
-	bl _f_ftod
-	add r3, r1, #0
-	mov r1, #1
-	add r2, r0, #0
-	mov r0, #0
-	lsl r1, r1, #0x1e
-	bl _d_mul
-	bl _d_dtof
-	add r5, r0, #0
-	ldr r0, [sp, #0xc]
-	bl _f_ftod
-	add r3, r1, #0
-	add r2, r0, #0
-	ldr r1, _022673F8 ; =0x3FF00000
-	mov r0, #0
-	bl _dsub
-	str r0, [sp, #0x20]
-	str r1, [sp, #4]
-	add r0, r6, #0
-	bl _f_ftod
-	add r2, r0, #0
-	add r3, r1, #0
-	ldr r0, [sp, #0x20]
-	ldr r1, [sp, #4]
-	bl _dsub
-	bl _d_dtof
-	str r0, [r4, #0]
-	ldr r0, [sp, #0x10]
-	add r1, r5, #0
-	bl _f_add
-	str r0, [r4, #4]
-	ldr r0, [sp, #0x18]
-	add r1, r7, #0
-	bl _f_sub
-	str r0, [r4, #8]
-	mov r0, #0
-	str r0, [r4, #0xc]
-	ldr r0, [sp, #0x10]
-	add r1, r5, #0
-	bl _f_sub
-	str r0, [r4, #0x10]
-	add r0, r6, #0
-	bl _f_ftod
-	add r3, r1, #0
-	add r2, r0, #0
-	ldr r1, _022673F8 ; =0x3FF00000
-	mov r0, #0
-	bl _dsub
-	add r6, r0, #0
-	ldr r0, [sp, #8]
-	add r5, r1, #0
-	bl _f_ftod
-	add r2, r0, #0
-	add r3, r1, #0
-	add r0, r6, #0
-	add r1, r5, #0
-	bl _dsub
-	bl _d_dtof
-	str r0, [r4, #0x14]
-	ldr r0, [sp, #0x14]
-	ldr r1, [sp, #0x1c]
-	bl _f_add
-	str r0, [r4, #0x18]
-	mov r0, #0
-	str r0, [r4, #0x1c]
-	ldr r0, [sp, #0x18]
-	add r1, r7, #0
-	bl _f_add
-	str r0, [r4, #0x20]
-	ldr r0, [sp, #0x14]
-	ldr r1, [sp, #0x1c]
-	bl _f_sub
-	str r0, [r4, #0x24]
-	ldr r0, [sp, #8]
-	bl _f_ftod
-	add r3, r1, #0
-	add r2, r0, #0
-	ldr r1, _022673F8 ; =0x3FF00000
-	mov r0, #0
-	bl _dsub
-	add r6, r0, #0
-	ldr r0, [sp, #0xc]
-	add r5, r1, #0
-	bl _f_ftod
-	add r2, r0, #0
-	add r3, r1, #0
-	add r0, r6, #0
-	add r1, r5, #0
-	bl _dsub
-	bl _d_dtof
-	str r0, [r4, #0x28]
-	mov r0, #0
-	str r0, [r4, #0x2c]
-	str r0, [r4, #0x30]
-	str r0, [r4, #0x34]
-	str r0, [r4, #0x38]
-	mov r0, #0xfe
-	lsl r0, r0, #0x16
-	str r0, [r4, #0x3c]
-	add sp, #0x24
-	pop {r4, r5, r6, r7, pc}
-	nop
-_022673F8: .word 0x3FF00000
-	thumb_func_end ov116_022671EC
-
-	thumb_func_start ov116_022673FC
-ov116_022673FC: ; 0x022673FC
-	push {r3, r4, r5, lr}
-	add r5, r0, #0
-	ldr r0, [r5, #0]
-	add r4, r1, #0
-	mov r1, #0
-	bl _f_fgt
-	ldr r0, _02267724 ; =0x45800000
-	bls _02267420
-	ldr r1, [r5, #0]
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _0226742E
-_02267420:
-	ldr r1, [r5, #0]
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_0226742E:
-	bl _f_ftoi
-	str r0, [r4, #0]
-	ldr r0, [r5, #4]
-	mov r1, #0
-	bl _f_fgt
-	ldr r0, _02267724 ; =0x45800000
-	bls _02267452
-	ldr r1, [r5, #4]
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _02267460
-_02267452:
-	ldr r1, [r5, #4]
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_02267460:
-	bl _f_ftoi
-	str r0, [r4, #4]
-	ldr r0, [r5, #8]
-	mov r1, #0
-	bl _f_fgt
-	ldr r0, _02267724 ; =0x45800000
-	bls _02267484
-	ldr r1, [r5, #8]
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _02267492
-_02267484:
-	ldr r1, [r5, #8]
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_02267492:
-	bl _f_ftoi
-	str r0, [r4, #8]
-	ldr r0, [r5, #0xc]
-	mov r1, #0
-	bl _f_fgt
-	ldr r0, _02267724 ; =0x45800000
-	bls _022674B6
-	ldr r1, [r5, #0xc]
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _022674C4
-_022674B6:
-	ldr r1, [r5, #0xc]
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_022674C4:
-	bl _f_ftoi
-	str r0, [r4, #0xc]
-	ldr r0, [r5, #0x10]
-	mov r1, #0
-	bl _f_fgt
-	ldr r0, _02267724 ; =0x45800000
-	bls _022674E8
-	ldr r1, [r5, #0x10]
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _022674F6
-_022674E8:
-	ldr r1, [r5, #0x10]
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_022674F6:
-	bl _f_ftoi
-	str r0, [r4, #0x10]
-	ldr r0, [r5, #0x14]
-	mov r1, #0
-	bl _f_fgt
-	ldr r0, _02267724 ; =0x45800000
-	bls _0226751A
-	ldr r1, [r5, #0x14]
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _02267528
-_0226751A:
-	ldr r1, [r5, #0x14]
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_02267528:
-	bl _f_ftoi
-	str r0, [r4, #0x14]
-	ldr r0, [r5, #0x18]
-	mov r1, #0
-	bl _f_fgt
-	ldr r0, _02267724 ; =0x45800000
-	bls _0226754C
-	ldr r1, [r5, #0x18]
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _0226755A
-_0226754C:
-	ldr r1, [r5, #0x18]
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_0226755A:
-	bl _f_ftoi
-	str r0, [r4, #0x18]
-	ldr r0, [r5, #0x1c]
-	mov r1, #0
-	bl _f_fgt
-	ldr r0, _02267724 ; =0x45800000
-	bls _0226757E
-	ldr r1, [r5, #0x1c]
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _0226758C
-_0226757E:
-	ldr r1, [r5, #0x1c]
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_0226758C:
-	bl _f_ftoi
-	str r0, [r4, #0x1c]
-	ldr r0, [r5, #0x20]
-	mov r1, #0
-	bl _f_fgt
-	ldr r0, _02267724 ; =0x45800000
-	bls _022675B0
-	ldr r1, [r5, #0x20]
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _022675BE
-_022675B0:
-	ldr r1, [r5, #0x20]
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_022675BE:
-	bl _f_ftoi
-	str r0, [r4, #0x20]
-	ldr r0, [r5, #0x24]
-	mov r1, #0
-	bl _f_fgt
-	ldr r0, _02267724 ; =0x45800000
-	bls _022675E2
-	ldr r1, [r5, #0x24]
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _022675F0
-_022675E2:
-	ldr r1, [r5, #0x24]
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_022675F0:
-	bl _f_ftoi
-	str r0, [r4, #0x24]
-	ldr r0, [r5, #0x28]
-	mov r1, #0
-	bl _f_fgt
-	ldr r0, _02267724 ; =0x45800000
-	bls _02267614
-	ldr r1, [r5, #0x28]
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _02267622
-_02267614:
-	ldr r1, [r5, #0x28]
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_02267622:
-	bl _f_ftoi
-	str r0, [r4, #0x28]
-	ldr r0, [r5, #0x2c]
-	mov r1, #0
-	bl _f_fgt
-	ldr r0, _02267724 ; =0x45800000
-	bls _02267646
-	ldr r1, [r5, #0x2c]
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _02267654
-_02267646:
-	ldr r1, [r5, #0x2c]
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_02267654:
-	bl _f_ftoi
-	str r0, [r4, #0x2c]
-	ldr r0, [r5, #0x30]
-	mov r1, #0
-	bl _f_fgt
-	ldr r0, _02267724 ; =0x45800000
-	bls _02267678
-	ldr r1, [r5, #0x30]
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _02267686
-_02267678:
-	ldr r1, [r5, #0x30]
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_02267686:
-	bl _f_ftoi
-	str r0, [r4, #0x30]
-	ldr r0, [r5, #0x34]
-	mov r1, #0
-	bl _f_fgt
-	ldr r0, _02267724 ; =0x45800000
-	bls _022676AA
-	ldr r1, [r5, #0x34]
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _022676B8
-_022676AA:
-	ldr r1, [r5, #0x34]
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_022676B8:
-	bl _f_ftoi
-	str r0, [r4, #0x34]
-	ldr r0, [r5, #0x38]
-	mov r1, #0
-	bl _f_fgt
-	ldr r0, _02267724 ; =0x45800000
-	bls _022676DC
-	ldr r1, [r5, #0x38]
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _022676EA
-_022676DC:
-	ldr r1, [r5, #0x38]
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_022676EA:
-	bl _f_ftoi
-	str r0, [r4, #0x38]
-	ldr r0, [r5, #0x3c]
-	mov r1, #0
-	bl _f_fgt
-	ldr r0, _02267724 ; =0x45800000
-	bls _0226770E
-	ldr r1, [r5, #0x3c]
-	bl _f_mul
-	add r1, r0, #0
-	mov r0, #0x3f
-	lsl r0, r0, #0x18
-	bl _f_add
-	b _0226771C
-_0226770E:
-	ldr r1, [r5, #0x3c]
-	bl _f_mul
-	mov r1, #0x3f
-	lsl r1, r1, #0x18
-	bl _f_sub
-_0226771C:
-	bl _f_ftoi
-	str r0, [r4, #0x3c]
-	pop {r3, r4, r5, pc}
-	; .align 2, 0
-_02267724: .word 0x45800000
-	thumb_func_end ov116_022673FC
-
-	thumb_func_start ov116_02267728
-ov116_02267728: ; 0x02267728
-	push {r4, lr}
-	sub sp, #0x40
-	add r4, r1, #0
-	add r1, sp, #0
-	bl ov116_022673FC
-	add r0, sp, #0
-	add r1, r4, #0
-	bl MTX_Copy44To43_
-	add sp, #0x40
-	pop {r4, pc}
-	; .align 2, 0
-	thumb_func_end ov116_02267728
\ No newline at end of file
diff --git a/asm/unk_020E0D24.s b/asm/unk_020E0D24.s
index 9496a038da..0b91875966 100644
--- a/asm/unk_020E0D24.s
+++ b/asm/unk_020E0D24.s
@@ -4,8 +4,9 @@
 
 	.text
 
-
+	arm_func_start _dgeq
 	arm_func_start _d_fge
+_dgeq:
 _d_fge: ; 0x020E0D24
 	mov ip, #0x200000
 	cmn ip, r1, lsl #1
diff --git a/asm/unk_020E1844.s b/asm/unk_020E1844.s
index d2dd4506eb..a1cb74f03d 100644
--- a/asm/unk_020E1844.s
+++ b/asm/unk_020E1844.s
@@ -5,8 +5,9 @@
 
 	.text
 
-
+	arm_func_start _ll_sto_f
 	arm_func_start _f_lltof
+_ll_sto_f:
 _f_lltof: ; 0x020E1844
 	ands r2, r1, #0x80000000
 	beq _020E1854
diff --git a/main.lsf b/main.lsf
index 97c8dbb12c..b8fe25ece6 100644
--- a/main.lsf
+++ b/main.lsf
@@ -2154,13 +2154,13 @@ Overlay overlay115
 Overlay overlay116
 {
 	After overlay114
-	Object asm/overlay116/ov116_02260440.o
-	Object asm/overlay116/ov116_022604C4.o
+	Object src/overlay116/ov116_02260440.o
+	Object src/overlay116/ov116_022604C4.o
 	Object asm/overlay116/ov116_02261870.o
-	Object asm/overlay116/ov116_02262A44.o
+	Object src/overlay116/ov116_02262A44.o
 	Object asm/overlay116/ov116_02262A8C.o
-	Object asm/overlay116/ov116_0226432C.o
-	Object asm/overlay116/ov116_02266FEC.o
+	Object src/overlay116/ov116_0226432C.o
+	Object src/overlay116/ov116_02266FEC.o
 }
 
 Overlay overlay117
diff --git a/src/overlay116/ov116_02260440.c b/src/overlay116/ov116_02260440.c
new file mode 100644
index 0000000000..f7ae810013
--- /dev/null
+++ b/src/overlay116/ov116_02260440.c
@@ -0,0 +1,112 @@
+#include <nitro.h>
+#include <string.h>
+
+#include "struct_defs/struct_02039A58.h"
+#include "overlay116/struct_ov116_0226048C.h"
+#include "overlay116/struct_ov116_02260490.h"
+#include "overlay116/struct_ov116_02260494.h"
+#include "overlay116/struct_ov116_02260498.h"
+#include "overlay116/struct_ov116_0226139C.h"
+
+#include "unk_0201D15C.h"
+#include "unk_02032798.h"
+#include "overlay116/ov116_02260440.h"
+#include "overlay116/ov116_022604C4.h"
+
+static void ov116_02260440(int param0, int param1, void * param2, void * param3);
+static void ov116_02260458(int param0, int param1, void * param2, void * param3);
+static void ov116_02260464(int param0, int param1, void * param2, void * param3);
+static void ov116_02260478(int param0, int param1, void * param2, void * param3);
+static void ov116_02260484(int param0, int param1, void * param2, void * param3);
+static int ov116_02260488(void);
+static int ov116_0226048C(void);
+static int ov116_02260490(void);
+static int ov116_02260494(void);
+static int ov116_02260498(void);
+
+static const UnkStruct_02039A58 Unk_ov116_02267740[] = {
+    {ov116_02260440, ov116_0226048C, NULL},
+    {ov116_02260458, ov116_02260488, NULL},
+    {ov116_02260464, ov116_02260490, NULL},
+    {ov116_02260478, ov116_02260494, NULL},
+    {ov116_02260484, ov116_02260498, NULL}
+};
+
+static void ov116_02260440 (int param0, int param1, void * param2, void * param3)
+{
+    UnkStruct_ov116_0226139C * v0 = param3;
+
+    v0->unk_14 = *((UnkStruct_ov116_0226048C *)param2);
+
+    sub_0201D2DC(v0->unk_14.unk_04);
+    ov116_022617D4(v0);
+}
+
+static void ov116_02260458 (int param0, int param1, void * param2, void * param3)
+{
+    UnkStruct_ov116_0226139C * v0 = param3;
+    ov116_022617DC(v0);
+}
+
+static void ov116_02260464 (int param0, int param1, void * param2, void * param3)
+{
+    UnkStruct_ov116_0226139C * v0 = param3;
+    UnkStruct_ov116_02260490 * v1;
+
+    v1 = ((UnkStruct_ov116_02260490 *)param2);
+    v0->unk_04->unk_2858[param0].unk_00 = v1->unk_00;
+}
+
+static void ov116_02260478 (int param0, int param1, void * param2, void * param3)
+{
+    UnkStruct_ov116_0226139C * v0 = param3;
+    UnkStruct_ov116_02260494 * v1;
+
+    v1 = ((UnkStruct_ov116_02260494 *)param2);
+    v0->unk_24.unk_00[param0].unk_00 = v1->unk_00;
+}
+
+static void ov116_02260484 (int param0, int param1, void * param2, void * param3)
+{
+    UnkStruct_ov116_0226139C * v0 = param3;
+}
+
+static int ov116_02260488 (void)
+{
+    return 0;
+}
+
+static int ov116_0226048C (void)
+{
+    return sizeof(UnkStruct_ov116_0226048C);
+}
+
+static int ov116_02260490 (void)
+{
+    return sizeof(UnkStruct_ov116_02260490);
+}
+
+static int ov116_02260494 (void)
+{
+    return sizeof(UnkStruct_ov116_02260494);
+}
+
+static int ov116_02260498 (void)
+{
+    return sizeof(UnkStruct_ov116_02260498);
+}
+
+const UnkStruct_02039A58 * ov116_0226049C (void)
+{
+    return Unk_ov116_02267740;
+}
+
+int ov116_022604A4 (void)
+{
+    return sizeof(Unk_ov116_02267740) / sizeof(UnkStruct_02039A58);
+}
+
+void ov116_022604A8 (UnkStruct_ov116_0226139C * param0)
+{
+    sub_02032798(ov116_0226049C(), ov116_022604A4(), param0);
+}
diff --git a/src/overlay116/ov116_022604C4.c b/src/overlay116/ov116_022604C4.c
new file mode 100644
index 0000000000..b2f7905de8
--- /dev/null
+++ b/src/overlay116/ov116_022604C4.c
@@ -0,0 +1,1177 @@
+#include <nitro.h>
+#include <string.h>
+
+#include "data_021BF67C.h"
+
+#include "struct_decls/struct_020067E8_decl.h"
+#include "struct_decls/struct_02018340_decl.h"
+
+#include "struct_defs/struct_02099F80.h"
+#include "overlay084/struct_ov84_0223BA5C.h"
+#include "overlay097/struct_ov97_0222DB78.h"
+#include "overlay104/struct_ov104_022412F4.h"
+#include "overlay104/struct_ov104_02241308.h"
+#include "overlay104/struct_ov104_0224133C.h"
+#include "overlay116/struct_ov116_0226048C.h"
+#include "overlay116/struct_ov116_02260494.h"
+#include "overlay116/struct_ov116_02260498.h"
+#include "overlay116/struct_ov116_0226139C.h"
+#include "overlay116/struct_ov116_02262A8C.h"
+#include "overlay116/struct_ov116_0226501C.h"
+
+#include "unk_02002F38.h"
+#include "unk_02005474.h"
+#include "unk_020067E8.h"
+#include "unk_020068C8.h"
+#include "unk_020093B4.h"
+#include "unk_0200C6E4.h"
+#include "unk_0200F174.h"
+#include "unk_020170BC.h"
+#include "unk_02017728.h"
+#include "unk_02017E74.h"
+#include "unk_02018340.h"
+#include "unk_0201D15C.h"
+#include "unk_0201DBEC.h"
+#include "unk_0201E3D8.h"
+#include "unk_0201FE94.h"
+#include "unk_02020020.h"
+#include "unk_02024220.h"
+#include "unk_020329E0.h"
+#include "unk_02034198.h"
+#include "unk_020363E8.h"
+#include "unk_020366A0.h"
+#include "unk_020393C8.h"
+#include "overlay004/ov4_021D0D80.h"
+#include "overlay114/ov114_0225C700.h"
+#include "overlay116/ov116_02260440.h"
+#include "overlay116/ov116_022604C4.h"
+#include "overlay116/ov116_02261870.h"
+#include "overlay116/ov116_02262A44.h"
+#include "overlay116/ov116_02262A8C.h"
+#include "overlay116/ov116_0226432C.h"
+#include "overlay116/ov116_02266FEC.h"
+
+static void ov116_022612CC(UnkStruct_ov116_0226139C * param0);
+static void ov116_02261494(UnkStruct_02018340 * param0);
+static void ov116_022616CC(UnkStruct_ov116_0226139C * param0);
+static BOOL ov116_02261768(int param0);
+static void ov116_0226178C(UnkStruct_ov116_0226139C * param0, BOOL param1, int param2, int * param3);
+static void ov116_02261794(void * param0);
+static void ov116_022610FC(UnkStruct_ov116_0226139C * param0);
+static void ov116_02261244(UnkStruct_ov116_0226139C * param0);
+static u32 ov116_022617E4(UnkStruct_ov116_0226139C * param0);
+
+static void ov116_022604C4 (UnkStruct_ov116_0226139C * param0)
+{
+    param0->unk_78 = sub_0201D2D0();
+
+    ov116_022612CC(param0);
+    sub_02017798(ov116_02261794, param0);
+    sub_020177A4();
+    sub_0201DBEC(32, 106);
+    sub_0200966C(NNS_G2D_VRAM_TYPE_2DMAIN, GX_OBJVRAMMODE_CHAR_1D_128K);
+    sub_02009704(NNS_G2D_VRAM_TYPE_2DMAIN);
+    sub_02039734();
+
+    {
+        NNSG2dPaletteData * v0;
+        void * v1 = sub_020394A8(106);
+
+        NNS_G2dGetUnpackedPaletteData(v1, &v0);
+        sub_02002FBC(param0->unk_48.unk_14, v0->pRawData, 2, 14 * 16, 32);
+        sub_020181C4(v1);
+    }
+
+    {
+        int v2 = sub_02032E64();
+
+        param0->unk_44 = sub_0203608C();
+        ov116_022604A8(param0);
+
+        if (ov116_022617C4(param0) == 1) {
+            param0->unk_00 = ov116_02262A44(v2, &param0->unk_48);
+        }
+
+        param0->unk_04 = ov116_02262A8C(v2, param0->unk_44, &param0->unk_48);
+        param0->unk_04->unk_2870 = param0->unk_14.unk_00;
+        param0->unk_04->unk_286C = param0->unk_78;
+    }
+
+    {
+        u32 v3;
+
+        sub_0201E3D8();
+        v3 = sub_0201E450(4);
+    }
+
+    ov116_022628B8(param0);
+    ov116_022622C8(param0);
+    ov116_022625A8(param0, param0->unk_04);
+    ov116_02261D70(param0->unk_04);
+    ov116_02261D08(param0->unk_04);
+    ov116_02262724(param0->unk_04);
+    ov116_02262840(param0->unk_04);
+    ov116_02262034(param0, ov116_02264680(param0, param0->unk_44));
+
+    {
+        {
+            int v4;
+            int v5[][2] = {
+                {44, 43},
+                {46, 45},
+                {48, 47},
+                {50, 49},
+                {44, 43},
+                {46, 45},
+                {48, 47},
+                {50, 49},
+                {44, 43},
+                {46, 45},
+                {48, 47},
+                {50, 49},
+                {44, 43},
+                {46, 45},
+                {48, 47},
+                {50, 49},
+            };
+
+            for (v4 = 0; v4 < 8; v4++) {
+                ov116_022618A8(&param0->unk_04->unk_B38[v4], param0->unk_48.unk_00, v5[v4][0]);
+                ov116_022618B4(&param0->unk_04->unk_B38[v4], param0->unk_14.unk_00);
+
+                sub_02017164(&param0->unk_04->unk_B38[v4].unk_88[0], &param0->unk_04->unk_B38[v4].unk_78, param0->unk_48.unk_00, v5[v4][1], 106, &param0->unk_48.unk_24);
+                sub_0201727C(&param0->unk_04->unk_B38[v4].unk_00, &param0->unk_04->unk_B38[v4].unk_88[0]);
+                sub_02017240(&param0->unk_04->unk_B38[v4].unk_88[0], 0);
+                sub_02017348(&param0->unk_04->unk_B38[v4].unk_00, 0);
+
+                {
+                    int v6 = 5;
+
+                    if (param0->unk_14.unk_00) {
+                        v6 = 5;
+                    }
+
+                    if (v4 % 2) {
+                        param0->unk_04->unk_B38[v4].unk_1E0.x += FX32_CONST(v4 * 5);
+                    } else {
+                        param0->unk_04->unk_B38[v4].unk_1E0.x -= FX32_CONST(v4 * 5);
+                    }
+
+                    if (v4 < 8) {
+                        param0->unk_04->unk_B38[v4].unk_1E0.z += FX32_CONST((v4 + 1) * v6);
+                    } else {
+                        param0->unk_04->unk_B38[v4].unk_1E0.z -= FX32_CONST(v4 * 5);
+                    }
+                }
+            }
+        }
+
+        ov116_022618A8(&param0->unk_04->unk_92C, param0->unk_48.unk_00, 71);
+        ov116_022618B4(&param0->unk_04->unk_92C, param0->unk_14.unk_00);
+        sub_02017348(&param0->unk_04->unk_92C.unk_00, 0);
+
+        {
+            int v7[] = {
+                0x3,
+                0x1,
+                0x4,
+                0x2,
+            };
+
+            int v8 = v7[ov116_02264680(param0, param0->unk_44)];
+
+            ov116_022618A8(&param0->unk_04->unk_FC, param0->unk_48.unk_00, v8);
+            ov116_022618B4(&param0->unk_04->unk_FC, param0->unk_14.unk_00);
+            ov116_022618A8(&param0->unk_04->unk_308[0], param0->unk_48.unk_00, 51);
+            ov116_022618A8(&param0->unk_04->unk_308[1], param0->unk_48.unk_00, 57);
+            ov116_022618A8(&param0->unk_04->unk_308[2], param0->unk_48.unk_00, 55);
+            ov116_022618B4(&param0->unk_04->unk_308[0], param0->unk_14.unk_00);
+            ov116_022618B4(&param0->unk_04->unk_308[1], param0->unk_14.unk_00);
+            ov116_022618B4(&param0->unk_04->unk_308[2], param0->unk_14.unk_00);
+
+            {
+                UnkStruct_ov116_0226501C * v9;
+                int v10;
+
+                v9 = &param0->unk_04->unk_308[0];
+
+                v10 = 53;
+                sub_02017164(&v9->unk_88[0], &v9->unk_78, param0->unk_48.unk_00, v10, 106, &param0->unk_48.unk_24);
+                sub_0201727C(&v9->unk_00, &v9->unk_88[0]);
+                sub_02017240(&v9->unk_88[0], 0);
+
+                v10 = 52;
+                sub_02017164(&v9->unk_88[1], &v9->unk_78, param0->unk_48.unk_00, v10, 106, &param0->unk_48.unk_24);
+                sub_02017240(&v9->unk_88[1], 0);
+
+                v10 = 58;
+                sub_02017164(&v9->unk_88[2], &v9->unk_78, param0->unk_48.unk_00, v10, 106, &param0->unk_48.unk_24);
+                sub_02017240(&v9->unk_88[2], 0);
+
+                v9 = &param0->unk_04->unk_308[1];
+                v10 = 56;
+                sub_02017164(&v9->unk_88[0], &v9->unk_78, param0->unk_48.unk_00, v10, 106, &param0->unk_48.unk_24);
+                sub_0201727C(&v9->unk_00, &v9->unk_88[0]);
+                sub_02017240(&v9->unk_88[0], 0);
+
+                v9 = &param0->unk_04->unk_308[2];
+                v10 = 54;
+                sub_02017164(&v9->unk_88[0], &v9->unk_78, param0->unk_48.unk_00, v10, 106, &param0->unk_48.unk_24);
+                sub_0201727C(&v9->unk_00, &v9->unk_88[0]);
+                sub_02017240(&v9->unk_88[0], 0);
+            }
+        }
+
+        if (param0->unk_14.unk_00) {
+            param0->unk_04->unk_FC.unk_1E0.y = (-8 * FX32_ONE);
+            param0->unk_04->unk_308[0].unk_1E0.y = (-8 * FX32_ONE);
+            param0->unk_04->unk_308[1].unk_1E0.y = (-8 * FX32_ONE);
+            param0->unk_04->unk_308[2].unk_1E0.y = (-8 * FX32_ONE);
+        }
+    }
+
+    param0->unk_7C = ov114_0225CAD4(sub_0200D9B0(param0->unk_48.unk_0C), 106);
+    sub_02003070(param0->unk_48.unk_14, 2, 0 * 16, 16 * 0x20);
+
+    if (param0->unk_80->unk_3C) {
+        ov4_021D1E74(106);
+    }
+}
+
+int ov116_022609B4 (UnkStruct_020067E8 * param0, int * param1)
+{
+    UnkStruct_ov116_0226139C * v0;
+
+    sub_02017FC8(3, 106, 0x65000);
+    v0 = sub_0200681C(param0, sizeof(UnkStruct_ov116_0226139C), 106);
+    memset(v0, 0, sizeof(UnkStruct_ov116_0226139C));
+
+    v0->unk_80 = sub_02006840(param0);
+
+    {
+        int v1;
+        int v2 = 0;
+
+        for (v1 = 0; v1 < 4; v1++) {
+            v0->unk_B4[v1] = 0xFF;
+
+            if (sub_02032EE8(v1) != NULL) {
+                v0->unk_B4[v2] = v1;
+                v2++;
+            }
+        }
+    }
+
+    ov114_0225C700(&v0->unk_84, v0->unk_80->unk_38, v0->unk_80->unk_34, v0->unk_80->unk_3C, &v0->unk_80->unk_00);
+    return 1;
+}
+
+static void ov116_02260A2C (UnkStruct_ov116_02262A8C * param0, u32 param1, u32 param2)
+{
+    s16 v0, v1;
+    BOOL v2;
+
+    if ((param1 == 0) && (param2 == 0)) {
+        param0->unk_1FBC.unk_00 = 0;
+        param0->unk_1FBC.unk_04 = 0;
+
+        if (param0->unk_FC.unk_1F8 != 0) {
+            v2 = ov116_0226452C(&param0->unk_FC, 1.0f);
+
+            if (v2 = 1) {
+                VecFx32 v3 = {0, (FX32_CONST(100)), 0};
+                VecFx32 v4;
+                MTX_MultVec43(&v3, &param0->unk_308[0].unk_1B0, &param0->unk_1FB0);
+            }
+        } else {
+            param0->unk_FC.unk_1FC = 0.0f;
+            param0->unk_FC.unk_200 = 0.0f;
+
+            ov116_0226432C(&param0->unk_FC, param0->unk_1FBC.unk_00, param0->unk_1FBC.unk_04, param0->unk_1FBC.unk_00, param0->unk_1FBC.unk_04, (2.35 * 0.80), 0);
+            ov116_0226432C(&param0->unk_308[0], param0->unk_1FBC.unk_00, param0->unk_1FBC.unk_04, param0->unk_1FBC.unk_00, param0->unk_1FBC.unk_04, (0.22), 0);
+        }
+    } else {
+        f32 v5 = ((100 - (param0->unk_1FB0.y >> FX32_SHIFT)) / 40);
+
+        if ((param0->unk_1FB0.y >> FX32_SHIFT) >= 95) {
+            v5 = 0.1f;
+        }
+
+        if (param0->unk_1FBC.unk_00 == 0) {
+            param0->unk_1FBC.unk_00 = param1;
+            param0->unk_1FBC.unk_04 = param2;
+        }
+
+        v2 = ov116_0226432C(&param0->unk_FC, param1, param2, param0->unk_1FBC.unk_00, param0->unk_1FBC.unk_04, (2.50 * 0.80), 1);
+
+        if (v2 = 1) {
+            VecFx32 v6 = {0, (FX32_CONST(100)), 0};
+            VecFx32 v7;
+            MTX_MultVec43(&v6, &param0->unk_308[0].unk_1B0, &param0->unk_1FB0);
+        }
+
+        if (sub_020057D4(1394) == 0) {
+            sub_02005748(1394);
+        }
+
+        param0->unk_1FBC.unk_00 = param1;
+        param0->unk_1FBC.unk_04 = param2;
+    }
+}
+
+static BOOL ov116_02260B6C (UnkStruct_ov116_02262A8C * param0)
+{
+    int v0;
+    int v1;
+    int v2, v3;
+    s16 v4[][2] = {
+        {0, 0},
+        {0, -40},
+        {0, -30},
+        {0, -20},
+        {0, -10},
+        {0, 0},
+        {0, 10},
+        {0, 20},
+        {0, 30},
+        {0, 40},
+        {0, 00},
+        {0, 0},
+        {0, 0},
+        {0, -40},
+        {0, -30},
+        {0, -20},
+        {0, -10},
+        {0, 0},
+        {0, 10},
+        {0, 20},
+        {0, 30},
+        {0, 40},
+        {0, 00},
+        {0, 0},
+        {0, 0},
+        {10, 0},
+        {20, 0},
+        {30, 0},
+        {40, 0},
+        {50, 0},
+        {60, 0},
+        {70, 0},
+        {80, 0},
+        {90, 0},
+        {0, 0},
+        {0, 0},
+        {0, 0},
+        {10, 0},
+        {20, 0},
+        {30, 0},
+        {40, 0},
+        {50, 0},
+        {60, 0},
+        {70, 0},
+        {80, 0},
+        {90, 0},
+        {0, 0},
+        {0, 0},
+    };
+
+    v0 = sub_0200D3E0(param0->unk_D8);
+    v1 = (param0->unk_0C * 12) + v0;
+    v2 = v4[v1][0];
+    v3 = v4[v1][1];
+
+    if ((v2 == 0) && (v3 == 0)) {
+        ov116_02260A2C(param0, 0, 0);
+    } else {
+        ov116_02260A2C(param0, 128 + v2, 128 + v3);
+
+        if (v2 != 0) {
+            ov116_0226493C(param0, 88 + v2, 128 + v3);
+        } else {
+            ov116_0226493C(param0, 128 + v2, 128 + v3);
+        }
+    }
+
+    if (v0 == 0) {
+        if (param0->unk_08 != v0) {
+            param0->unk_0C++;
+        }
+    }
+
+    param0->unk_08 = v0;
+
+    if (param0->unk_0C == 2) {
+        if (sub_0200D37C(param0->unk_D8) != 2) {
+            sub_0200D4C4(param0->unk_D8, 128, 100);
+            sub_0200D370(param0->unk_D8, 2);
+
+            ov116_02266FEC(&param0->unk_FC.unk_190);
+            ov116_02266FEC(&param0->unk_FC.unk_1A0);
+            ov116_0226432C(&param0->unk_FC, 0, 0, +5, +5, 0.80, 0);
+            ov116_0226432C(&param0->unk_FC, 0, 0, -5, -5, 0.80, 0);
+        }
+    }
+
+    if ((param0->unk_0C == 3) && (v0 == 11)) {
+        param0->unk_08 = 0;
+        param0->unk_0C = 0;
+
+        sub_0200D3F4(param0->unk_D8, 0);
+
+        ov116_02266FEC(&param0->unk_FC.unk_190);
+        ov116_02266FEC(&param0->unk_FC.unk_1A0);
+        ov116_0226432C(&param0->unk_FC, 0, 0, +5, +5, 0.80, 0);
+        ov116_0226432C(&param0->unk_FC, 0, 0, -5, -5, 0.80, 0);
+
+        return 1;
+    }
+
+    sub_0200D33C(param0->unk_D8);
+
+    return 0;
+}
+
+int ov116_02260CF4 (UnkStruct_020067E8 * param0, int * param1)
+{
+    UnkStruct_ov116_0226139C * v0 = sub_0200682C(param0);
+    BOOL v1 = 0;
+    u32 v2;
+
+    v2 = ov116_022617E4(v0);
+
+    switch (v2) {
+    case 1:
+        return 0;
+    case 2:
+        return 1;
+    case 0:
+    default:
+        break;
+    }
+
+    switch (*param1) {
+    case 0:
+        v1 = 1;
+        v0->unk_94 = ov114_0225C820(&v0->unk_84, 106);
+        ov116_0226178C(v0, v1, 1, param1);
+        break;
+    case 1:
+        v1 = ov114_0225C8BC(v0->unk_94);
+        ov116_0226178C(v0, v1, 2, param1);
+        break;
+    case 2:
+        v1 = 1;
+        v0->unk_14.unk_00 = ov114_0225C8CC(v0->unk_94);
+        ov114_0225C838(v0->unk_94);
+        v0->unk_94 = NULL;
+        ov116_022604C4(v0);
+        ov116_0226178C(v0, v1, 3, param1);
+        break;
+    case 3:
+        v1 = ov116_02261768(27);
+        ov116_022620AC(v0, v0->unk_04);
+        ov116_0226178C(v0, v1, 4, param1);
+        break;
+    case 4:
+        v1 = sub_0200F2AC();
+        ov116_0226178C(v0, v1, 5, param1);
+        break;
+    case 5:
+        v1 = 1;
+
+        if (v1 == 0) {
+            break;
+        }
+
+        ov116_02261F70(v0->unk_04);
+        ov116_02265470(v0->unk_04);
+        ov116_02265A1C(v0->unk_04);
+        ov116_0226178C(v0, v1, 6, param1);
+        break;
+    case 6:
+        v1 = ov116_02260B6C(v0->unk_04);
+
+        if (v1) {
+            if (ov116_022617C4(v0) == 1) {
+                v0->unk_14.unk_04 = v0->unk_78;
+                sub_020359DC(22, &v0->unk_14, sizeof(UnkStruct_ov116_0226048C));
+            }
+        }
+
+        ov116_0226178C(v0, v1, 7, param1);
+        break;
+    case 7:
+        v1 = v0->unk_08;
+        ov116_0226178C(v0, v1, 8, param1);
+        break;
+    case 8:
+        v1 = 1;
+        ov114_0225CB8C(v0->unk_7C);
+        ov116_0226178C(v0, v1, 9, param1);
+        break;
+    case 9:
+        v1 = 1;
+        v1 = ov114_0225CBE0(v0->unk_7C);
+
+        if (v1) {
+            ov116_02262264(v0->unk_04);
+            ov116_02262004(v0->unk_04);
+        }
+
+        ov116_0226178C(v0, v1, 10, param1);
+        break;
+    case 10:
+        v1 = v0->unk_0C;
+
+        if (v0->unk_0C) {
+            if (v0->unk_04->unk_279C.unk_04 < ((30 * 40) - 0)) {
+                v1 = 0;
+            }
+        }
+
+        if (v1 == 0) {
+            if (ov116_022617C4(v0) == 1) {
+                if (ov116_02262A74(v0->unk_00) == 0) {
+                    sub_020057A4(1393, 0);
+                    sub_020359DC(23, NULL, 0);
+                }
+            }
+            ov116_02263B30(v0->unk_04);
+        }
+        ov116_0226178C(v0, v1, 11, param1);
+        break;
+    case 11:
+        v1 = 1;
+        sub_020057A4(1395, 0);
+        sub_020057A4(1393, 0);
+        ov114_0225CBB0(v0->unk_7C);
+        ov116_0226178C(v0, v1, 12, param1);
+        break;
+    case 12:
+        v1 = ov114_0225CBE0(v0->unk_7C);
+        ov116_0226178C(v0, v1, 13, param1);
+        break;
+    case 13:
+        v1 = 1;
+        v0->unk_1C.unk_00 = (v0->unk_04->unk_279C.unk_10 / 10) * 100;
+
+        if (v0->unk_1C.unk_00 >= 100000) {
+            v0->unk_1C.unk_00 = 100000;
+        }
+
+        if (v0->unk_04->unk_279C.unk_B4 == 0) {
+            v0->unk_1C.unk_00 = 1;
+        }
+
+        sub_020359DC(25, &v0->unk_1C, sizeof(UnkStruct_ov116_02260494));
+        ov116_0226178C(v0, v1, 14, param1);
+        break;
+    case 14:
+        v1 = 0;
+        {
+            int v3;
+            int v4 = 0;
+
+            for (v3 = 0; v3 < 4; v3++) {
+                if (v0->unk_24.unk_00[v3].unk_00 != 0) {
+                    v4++;
+                }
+            }
+
+            if (v4 == v0->unk_04->unk_04) {
+                v1 = 1;
+            }
+        }
+        ov116_0226178C(v0, v1, 15, param1);
+        break;
+    case 15:
+        v1 = ov116_02261768(26);
+        ov116_0226178C(v0, v1, 16, param1);
+        break;
+    case 16:
+        v1 = sub_0200F2AC();
+
+        if (v1) {
+            ov116_022610FC(v0);
+        }
+
+        ov116_0226178C(v0, v1, 17, param1);
+        break;
+    case 17:
+        v1 = 1;
+        {
+            int v5;
+            int v6;
+
+            for (v5 = 0; v5 < 4; v5++) {
+                v6 = ov116_02264680(v0, v5);
+
+                if (v6 == 0xFF) {
+                    continue;
+                }
+
+                v0->unk_98.unk_00[v6] = v0->unk_24.unk_00[v5].unk_00;
+
+                if (v0->unk_98.unk_00[v6] <= 1) {
+                    v0->unk_98.unk_00[v6] = 0;
+                }
+            }
+
+            ov114_0225C9A8(&v0->unk_98, v0->unk_84.unk_08);
+        }
+        v0->unk_B0 = ov114_0225C8EC(&v0->unk_84, &v0->unk_98, 106);
+        ov116_0226178C(v0, v1, 18, param1);
+        break;
+    case 18:
+        v1 = ov114_0225C9A0(v0->unk_B0);
+
+        if (v1) {
+            BOOL v7 = ov114_0225C9A4(v0->unk_B0);
+
+            ov114_0225C904(v0->unk_B0);
+            v0->unk_B0 = NULL;
+
+            if (v7) {
+                v0->unk_C4 = 1;
+                ov116_02261244(v0);
+                ov116_0226178C(v0, v1, 0, param1);
+
+                if (v0->unk_80->unk_3C) {
+                    ov4_021D1F18();
+                }
+                break;
+            }
+        }
+        ov116_0226178C(v0, v1, 19, param1);
+        break;
+    case 19:
+        v1 = 1;
+        sub_020364F0(27);
+
+        if (v0->unk_80->unk_3C) {
+            ov4_021D1F18();
+        }
+
+        ov116_0226178C(v0, v1, 20, param1);
+        break;
+    case 20:
+    default:
+        v1 = sub_02036540(27);
+        return (v1 == 1) ? 1 : 0;
+        break;
+    }
+
+    if ((*param1 >= 3) && (*param1 < 16)) {
+        ov116_02261F08(v0->unk_04);
+        ov116_02261940(v0);
+    }
+
+    return 0;
+}
+
+static void ov116_022610FC (UnkStruct_ov116_0226139C * param0)
+{
+    sub_02017798(NULL, NULL);
+    sub_020177A4();
+    sub_0201DC3C();
+
+    {
+        u32 v0;
+        v0 = sub_0201E530();
+    }
+
+    sub_0201D2DC(param0->unk_78);
+
+    ov116_02261F3C(param0->unk_04);
+    ov116_02261DF0(param0->unk_04);
+    ov116_02261E40(param0->unk_04);
+    ov116_0226281C(param0->unk_04);
+    ov116_022628AC(param0->unk_04);
+    ov116_0226192C(&param0->unk_04->unk_FC);
+    ov116_0226192C(&param0->unk_04->unk_308[0]);
+    ov116_0226192C(&param0->unk_04->unk_308[1]);
+    ov116_0226192C(&param0->unk_04->unk_308[2]);
+    ov116_0226192C(&param0->unk_04->unk_92C);
+
+    sub_020171A0(&param0->unk_04->unk_308[0].unk_88[0], &param0->unk_48.unk_24);
+    sub_020171A0(&param0->unk_04->unk_308[0].unk_88[1], &param0->unk_48.unk_24);
+    sub_020171A0(&param0->unk_04->unk_308[0].unk_88[2], &param0->unk_48.unk_24);
+    sub_020171A0(&param0->unk_04->unk_308[1].unk_88[0], &param0->unk_48.unk_24);
+    sub_020171A0(&param0->unk_04->unk_308[2].unk_88[0], &param0->unk_48.unk_24);
+
+    {
+        int v1;
+
+        for (v1 = 0; v1 < 8; v1++) {
+            ov116_0226192C(&param0->unk_04->unk_B38[v1]);
+            sub_020171A0(&param0->unk_04->unk_B38[v1].unk_88[0], &param0->unk_48.unk_24);
+            sub_020171A0(&param0->unk_04->unk_B38[v1].unk_88[1], &param0->unk_48.unk_24);
+        }
+    }
+
+    ov114_0225CB38(param0->unk_7C);
+    ov116_0226139C(param0);
+
+    if (ov116_022617C4(param0) == 1) {
+        ov116_02262A6C(param0->unk_00);
+    }
+
+    ov116_02262C64(param0->unk_04);
+
+    param0->unk_00 = NULL;
+    param0->unk_04 = NULL;
+}
+
+static void ov116_02261244 (UnkStruct_ov116_0226139C * param0)
+{
+    param0->unk_0C = 0;
+    param0->unk_08 = 0;
+    param0->unk_10 = 0;
+
+    memset(&param0->unk_1C, 0, sizeof(UnkStruct_ov116_02260494));
+    memset(&param0->unk_24, 0, sizeof(UnkStruct_ov116_02260498));
+}
+
+int ov116_0226126C (UnkStruct_020067E8 * param0, int * param1)
+{
+    switch (*param1) {
+    case 0:
+    {
+        u32 v0;
+        UnkStruct_ov116_0226139C * v1 = sub_0200682C(param0);
+
+        v0 = ov116_022617E4(v1);
+
+        sub_02006830(param0);
+        sub_0201807C(106);
+        sub_020388F4(0, 1);
+
+        if (v0 != 0) {
+            return 1;
+        }
+
+        sub_020364F0(999);
+        (*param1)++;
+    }
+    break;
+    default:
+        if ((sub_02036540(999) == 1) || (sub_02035E18() < sub_02032E64())) {
+            return 1;
+        }
+        break;
+    }
+
+    return 0;
+}
+
+static void ov116_022612CC (UnkStruct_ov116_0226139C * param0)
+{
+    param0->unk_48.unk_00 = sub_02006C24(164, 106);
+    param0->unk_48.unk_04 = sub_02006C24(158, 106);
+    param0->unk_48.unk_10 = sub_02018340(106);
+    param0->unk_48.unk_14 = sub_02002F38(106);
+    param0->unk_48.unk_18 = sub_02024220(106, 0, 1, 0, 4, NULL);
+    param0->unk_48.unk_1C = sub_020203AC(106);
+
+    ov116_02261C88(param0);
+
+    sub_02003858(param0->unk_48.unk_14, 1);
+    sub_02002F70(param0->unk_48.unk_14, 0, 0x200, 106);
+    sub_02002F70(param0->unk_48.unk_14, 1, 0x200, 106);
+    sub_02002F70(param0->unk_48.unk_14, 2, 0x200, 106);
+    sub_02002F70(param0->unk_48.unk_14, 3, 0x200, 106);
+
+    ov116_02261494(param0->unk_48.unk_10);
+    ov116_022616CC(param0);
+
+    G3X_AlphaBlend(1);
+
+    {
+        static const GXRgb v0[8] = {
+            GX_RGB(0, 0, 0),
+            GX_RGB(4, 4, 4),
+            GX_RGB(4, 4, 4),
+            GX_RGB(4, 4, 4),
+            GX_RGB(4, 4, 4),
+            GX_RGB(4, 4, 4),
+            GX_RGB(4, 4, 4),
+            GX_RGB(4, 4, 4),
+        };
+
+        G3X_EdgeMarking(1);
+        G3X_SetEdgeColorTable(v0);
+    }
+
+    sub_020182CC(&param0->unk_48.unk_24, 106, 32);
+}
+
+void ov116_0226139C (UnkStruct_ov116_0226139C * param0)
+{
+    sub_0201FF0C(GX_PLANEMASK_BG0, 0);
+    sub_0201FF0C(GX_PLANEMASK_BG1, 0);
+    sub_0201FF0C(GX_PLANEMASK_BG2, 0);
+    sub_0201FF0C(GX_PLANEMASK_BG3, 0);
+    sub_0201FF74(GX_PLANEMASK_BG0, 0);
+    sub_0201FF74(GX_PLANEMASK_BG1, 0);
+    sub_0201FF74(GX_PLANEMASK_BG2, 0);
+    sub_0201FF74(GX_PLANEMASK_BG3, 0);
+    sub_02019044(param0->unk_48.unk_10, 0);
+    sub_02019044(param0->unk_48.unk_10, 1);
+    sub_02019044(param0->unk_48.unk_10, 2);
+    sub_02019044(param0->unk_48.unk_10, 3);
+    sub_02019044(param0->unk_48.unk_10, 4);
+    sub_02019044(param0->unk_48.unk_10, 5);
+    sub_02019044(param0->unk_48.unk_10, 6);
+    sub_02019044(param0->unk_48.unk_10, 7);
+    sub_020181C4(param0->unk_48.unk_10);
+    sub_02002FA0(param0->unk_48.unk_14, 0);
+    sub_02002FA0(param0->unk_48.unk_14, 1);
+    sub_02002FA0(param0->unk_48.unk_14, 2);
+    sub_02002FA0(param0->unk_48.unk_14, 3);
+    sub_02002F54(param0->unk_48.unk_14);
+    sub_02006CA8(param0->unk_48.unk_00);
+    sub_02006CA8(param0->unk_48.unk_04);
+    sub_020242C4(param0->unk_48.unk_18);
+    sub_020203B8(param0->unk_48.unk_1C);
+    sub_0200D0B0(param0->unk_48.unk_08, param0->unk_48.unk_0C);
+    sub_0200C8D4(param0->unk_48.unk_08);
+
+    Unk_021BF67C.unk_65 = 0;
+
+    sub_0201FFE8();
+    G3X_AlphaBlend(0);
+}
+
+static void ov116_02261494 (UnkStruct_02018340 * param0)
+{
+    sub_0201FF00();
+    {
+        UnkStruct_ov84_0223BA5C v0 = {
+            GX_DISPMODE_GRAPHICS,
+            GX_BGMODE_0,
+            GX_BGMODE_0,
+            GX_BG0_AS_3D,
+        };
+        sub_02018368(&v0);
+    }
+    {
+        UnkStruct_02099F80 v1 = {
+            GX_VRAM_BG_128_A,
+            GX_VRAM_BGEXTPLTT_NONE,
+            GX_VRAM_SUB_BG_128_C,
+            GX_VRAM_SUB_BGEXTPLTT_NONE,
+            GX_VRAM_OBJ_64_E,
+            GX_VRAM_OBJEXTPLTT_NONE,
+            GX_VRAM_SUB_OBJ_16_I,
+            GX_VRAM_SUB_OBJEXTPLTT_NONE,
+            GX_VRAM_TEX_0_B,
+            GX_VRAM_TEXPLTT_01_FG
+        };
+
+        sub_0201FE94(&v1);
+        MI_CpuClear32((void *)HW_BG_VRAM, HW_BG_VRAM_SIZE);
+        MI_CpuClear32((void *)HW_DB_BG_VRAM, HW_DB_BG_VRAM_SIZE);
+        MI_CpuClear32((void *)HW_OBJ_VRAM, HW_OBJ_VRAM_SIZE);
+        MI_CpuClear32((void *)HW_DB_OBJ_VRAM, HW_DB_OBJ_VRAM_SIZE);
+    }
+    {
+        UnkStruct_ov97_0222DB78 v2[] = {
+            {
+                0x0,
+                0x0,
+                0x800,
+                0x0,
+                0x1,
+                GX_BG_COLORMODE_16,
+                GX_BG_SCRBASE_0x2000,
+                GX_BG_CHARBASE_0x10000,
+                GX_BG_EXTPLTT_01,
+                0x3,
+                0x0,
+                0x0,
+                0x0
+            },
+            {
+                0x0,
+                0x0,
+                0x1000,
+                0x0,
+                0x3,
+                GX_BG_COLORMODE_16,
+                GX_BG_SCRBASE_0x2800,
+                GX_BG_CHARBASE_0x14000,
+                GX_BG_EXTPLTT_01,
+                0x2,
+                0x0,
+                0x0,
+                0x0
+            },
+            {
+                0x0,
+                0x0,
+                0x1000,
+                0x0,
+                0x3,
+                GX_BG_COLORMODE_16,
+                GX_BG_SCRBASE_0x3800,
+                GX_BG_CHARBASE_0x14000,
+                GX_BG_EXTPLTT_01,
+                0x2,
+                0x0,
+                0x0,
+                0x0
+            },
+            {
+                0x0,
+                0x0,
+                0x800,
+                0x0,
+                0x1,
+                GX_BG_COLORMODE_16,
+                GX_BG_SCRBASE_0x4800,
+                GX_BG_CHARBASE_0x10000,
+                GX_BG_EXTPLTT_01,
+                0x3,
+                0x0,
+                0x0,
+                0x0
+            },
+        };
+
+        sub_02019690(1, 32, 0, 106);
+        sub_02019690(2, 32, 0, 106);
+        sub_02019690(3, 32, 0, 106);
+        sub_020183C4(param0, 1, &v2[1], 0);
+        sub_020183C4(param0, 2, &v2[2], 0);
+        sub_020183C4(param0, 3, &v2[3], 0);
+        sub_02019EBC(param0, 0);
+        sub_02019EBC(param0, 1);
+        sub_02019EBC(param0, 2);
+        sub_02019EBC(param0, 3);
+    }
+    {
+        UnkStruct_ov97_0222DB78 v3[] = {
+            {
+                0,
+                0,
+                0x800,
+                0,
+                1,
+                GX_BG_COLORMODE_16,
+                GX_BG_SCRBASE_0xb000,
+                GX_BG_CHARBASE_0x00000,
+                GX_BG_EXTPLTT_01,
+                3,
+                0,
+                0,
+                0
+            },
+            {
+                0,
+                0,
+                0x1000,
+                0,
+                3,
+                GX_BG_COLORMODE_16,
+                GX_BG_SCRBASE_0xb800,
+                GX_BG_CHARBASE_0x04000,
+                GX_BG_EXTPLTT_01,
+                1,
+                0,
+                0,
+                0
+            },
+            {
+                0,
+                0,
+                0x1000,
+                0,
+                3,
+                GX_BG_COLORMODE_16,
+                GX_BG_SCRBASE_0xc800,
+                GX_BG_CHARBASE_0x04000,
+                GX_BG_EXTPLTT_01,
+                1,
+                0,
+                0,
+                0
+            },
+            {
+                0,
+                0,
+                0x1000,
+                0,
+                2,
+                GX_BG_COLORMODE_16,
+                GX_BG_SCRBASE_0xd800,
+                GX_BG_CHARBASE_0x04000,
+                GX_BG_EXTPLTT_01,
+                0,
+                0,
+                0,
+                0
+            },
+        };
+
+        sub_02019690(4, 32, 0, 106);
+        sub_02019690(5, 32, 0, 106);
+        sub_02019690(6, 32, 0, 106);
+        sub_02019690(7, 32, 0, 106);
+        sub_020183C4(param0, 4, &v3[0], 0);
+        sub_020183C4(param0, 5, &v3[1], 0);
+        sub_020183C4(param0, 6, &v3[2], 0);
+        sub_020183C4(param0, 7, &v3[3], 0);
+        sub_02019EBC(param0, 4);
+        sub_02019EBC(param0, 5);
+        sub_02019EBC(param0, 6);
+        sub_02019EBC(param0, 7);
+    }
+
+    sub_02019690(4, 32, 0, 106);
+    sub_02019690(5, 32, 0, 106);
+    sub_02019690(6, 32, 0, 106);
+    sub_02019690(7, 32, 0, 106);
+    sub_0201FF0C(GX_PLANEMASK_BG0, 1);
+    sub_0201FF0C(GX_PLANEMASK_BG1, 1);
+    sub_0201FF0C(GX_PLANEMASK_BG2, 1);
+    sub_0201FF0C(GX_PLANEMASK_BG3, 1);
+    sub_0201FF0C(GX_PLANEMASK_OBJ, 1);
+    sub_0201FF74(GX_PLANEMASK_BG0, 1);
+    sub_0201FF74(GX_PLANEMASK_BG1, 1);
+    sub_0201FF74(GX_PLANEMASK_BG2, 1);
+    sub_0201FF74(GX_PLANEMASK_BG3, 1);
+    sub_0201FF74(GX_PLANEMASK_OBJ, 1);
+
+    Unk_021BF67C.unk_65 = 1;
+
+    sub_0201FFE8();
+    G2_SetBlendAlpha(0, GX_BLEND_PLANEMASK_BG1 | GX_BLEND_PLANEMASK_BG2 | GX_BLEND_PLANEMASK_BG3 | GX_BLEND_PLANEMASK_OBJ, 7, 10);
+    G2S_SetBlendAlpha(0, GX_BLEND_PLANEMASK_BG0 | GX_BLEND_PLANEMASK_OBJ, 7, 10);
+}
+
+static void ov116_022616CC (UnkStruct_ov116_0226139C * param0)
+{
+    param0->unk_48.unk_08 = sub_0200C6E4(106);
+    {
+        const UnkStruct_ov104_0224133C v0 = {
+            0,
+            128,
+            0,
+            32,
+            0,
+            128,
+            0,
+            32,
+        };
+
+        const UnkStruct_ov104_022412F4 v1 = {
+            64 + 64,
+            1024 * 0x40,
+            512 * 0x20,
+            GX_OBJVRAMMODE_CHAR_1D_128K,
+            GX_OBJVRAMMODE_CHAR_1D_32K
+        };
+
+        sub_0200C73C(param0->unk_48.unk_08, &v0, &v1, 16 + 16);
+    }
+    {
+        BOOL v2;
+        const UnkStruct_ov104_02241308 v3 = {
+            64 + 64,
+            16 + 16,
+            128,
+            128,
+            16,
+            16,
+        };
+
+        param0->unk_48.unk_0C = sub_0200C704(param0->unk_48.unk_08);
+
+        v2 = sub_0200C7C0(param0->unk_48.unk_08, param0->unk_48.unk_0C, 255);
+        GF_ASSERT(v2);
+
+        v2 = sub_0200CB30(param0->unk_48.unk_08, param0->unk_48.unk_0C, &v3);
+        GF_ASSERT(v2);
+    }
+    sub_0200964C(sub_0200C738(param0->unk_48.unk_08), 0, (192 + 64) << FX32_SHIFT);
+}
+
+static BOOL ov116_02261768 (int param0)
+{
+    sub_0200F174(0, param0, param0, 0, 6, 1, 106);
+    return 1;
+}
+
+static void ov116_0226178C (UnkStruct_ov116_0226139C * param0, BOOL param1, int param2, int * param3)
+{
+    if (param1) {
+        *param3 = param2;
+    }
+}
+
+static void ov116_02261794 (void * param0)
+{
+    UnkStruct_ov116_0226139C * v0 = param0;
+
+    sub_0201DCAC();
+    sub_0200C800();
+    sub_02003694(v0->unk_48.unk_14);
+    sub_0201C2B8(v0->unk_48.unk_10);
+
+    OS_SetIrqCheckFlag(OS_IE_V_BLANK);
+}
+
+BOOL ov116_022617C4 (UnkStruct_ov116_0226139C * param0)
+{
+    return (param0->unk_44 == 0) ? 1 : 0;
+}
+
+void ov116_022617D4 (UnkStruct_ov116_0226139C * param0)
+{
+    param0->unk_08 = 1;
+}
+
+void ov116_022617DC (UnkStruct_ov116_0226139C * param0)
+{
+    param0->unk_0C = 1;
+}
+
+static u32 ov116_022617E4 (UnkStruct_ov116_0226139C * param0)
+{
+    if (ov114_0225CA54(&param0->unk_84) == 1) {
+        if (param0->unk_48.unk_2C.unk_00 == 0) {
+            if (sub_0200F2AC() == 1) {
+                sub_0200F2C0();
+            }
+
+            sub_0200F370(0x0);
+            param0->unk_48.unk_2C.unk_00 = 1;
+
+            return 1;
+        } else {
+            if (ov114_0225CA98(&param0->unk_84) == 0) {
+                return 1;
+            }
+
+            if (param0->unk_04 != NULL) {
+                ov116_02262264(param0->unk_04);
+                ov116_02262004(param0->unk_04);
+                ov116_022610FC(param0);
+            }
+
+            if (param0->unk_B0 != NULL) {
+                ov114_0225C904(param0->unk_B0);
+                param0->unk_B0 = NULL;
+            }
+
+            if (param0->unk_94 != NULL) {
+                ov114_0225C838(param0->unk_94);
+                param0->unk_94 = NULL;
+            }
+
+            return 2;
+        }
+    }
+
+    return 0;
+}
diff --git a/src/overlay116/ov116_02262A44.c b/src/overlay116/ov116_02262A44.c
new file mode 100644
index 0000000000..e887622aff
--- /dev/null
+++ b/src/overlay116/ov116_02262A44.c
@@ -0,0 +1,35 @@
+#include <nitro.h>
+#include <string.h>
+
+#include "overlay116/struct_ov116_02262A44.h"
+#include "overlay116/struct_ov116_022649E4.h"
+
+#include "unk_02017E74.h"
+#include "overlay116/ov116_02262A44.h"
+
+UnkStruct_ov116_02262A44 * ov116_02262A44 (int param0, UnkStruct_ov116_022649E4 * param1)
+{
+    UnkStruct_ov116_02262A44 * v0 = sub_02018144(106, sizeof(UnkStruct_ov116_02262A44));
+
+    memset(v0, 0, sizeof(UnkStruct_ov116_02262A44));
+
+    v0->unk_04 = param0;
+    v0->unk_08 = ((30 * 40) - 0);
+    v0->unk_0C = param1;
+
+    return v0;
+}
+
+void ov116_02262A6C (UnkStruct_ov116_02262A44 * param0)
+{
+    sub_020181C4(param0);
+}
+
+BOOL ov116_02262A74 (UnkStruct_ov116_02262A44 * param0)
+{
+    if ((--param0->unk_08) <= 0) {
+        return 0;
+    }
+
+    return 1;
+}
diff --git a/src/overlay116/ov116_0226432C.c b/src/overlay116/ov116_0226432C.c
new file mode 100644
index 0000000000..0d0ba4a1cf
--- /dev/null
+++ b/src/overlay116/ov116_0226432C.c
@@ -0,0 +1,2034 @@
+#include <nitro.h>
+#include <string.h>
+
+#include "inlines.h"
+
+#include "struct_decls/struct_02002F38_decl.h"
+#include "struct_decls/struct_0201CD38_decl.h"
+
+#include "struct_defs/struct_0200D0F4.h"
+#include "overlay116/struct_ov116_0226139C.h"
+#include "overlay116/struct_ov116_02262A8C.h"
+#include "overlay116/struct_ov116_0226469C.h"
+#include "overlay116/struct_ov116_022647BC.h"
+#include "overlay116/struct_ov116_022649E4.h"
+#include "overlay116/struct_ov116_0226501C.h"
+#include "overlay116/struct_ov116_0226534C.h"
+#include "overlay116/struct_ov116_02265470.h"
+#include "overlay116/struct_ov116_02265AA4.h"
+#include "overlay116/struct_ov116_02265D84.h"
+#include "overlay116/struct_ov116_022660A8.h"
+#include "overlay116/union_ov116_02266FEC.h"
+
+#include "unk_02002F38.h"
+#include "unk_02005474.h"
+#include "unk_0200C6E4.h"
+#include "unk_0200D9E8.h"
+#include "unk_0200F174.h"
+#include "unk_020170BC.h"
+#include "unk_02017E74.h"
+#include "unk_02018340.h"
+#include "unk_0201D15C.h"
+#include "overlay116/ov116_02261870.h"
+#include "overlay116/ov116_0226432C.h"
+#include "overlay116/ov116_02266FEC.h"
+
+typedef struct {
+    UnkStruct_0200D0F4 * unk_00;
+    fx32 unk_04;
+    fx32 unk_08;
+    fx32 unk_0C;
+    fx32 unk_10;
+    fx32 unk_14;
+    fx32 unk_18;
+    fx32 unk_1C;
+    fx32 unk_20;
+    u8 unk_24;
+    u8 unk_25;
+    u8 unk_26;
+    u8 unk_27;
+    int unk_28;
+    s16 unk_2C;
+    s16 unk_2E;
+    s16 unk_30;
+    s16 unk_32;
+} UnkStruct_ov116_02264FEC_sub1;
+
+typedef struct {
+    UnkStruct_ov116_02262A8C * unk_00;
+    int unk_04;
+    int unk_08;
+    int unk_0C;
+    BOOL * unk_10;
+    UnkStruct_ov116_02264FEC_sub1 unk_14[36];
+} UnkStruct_ov116_02264FEC;
+
+typedef struct {
+    int unk_00;
+    int unk_04;
+    int unk_08;
+    int unk_0C[3];
+    int unk_18[3];
+    void * unk_24;
+} UnkStruct_ov116_02267DA4;
+
+static void ov116_022647BC(UnkStruct_0201CD38 * param0, void * param1);
+static inline void inline_ov116_022649E4(UnkStruct_ov116_02264FEC_sub1 * param0);
+static inline void inline_ov116_022649E4_1(UnkStruct_ov116_02264FEC_sub1 * wk, fx32 x, fx32 y);
+static void ov116_022649E4(UnkStruct_0201CD38 * param0, void * param1);
+static void ov116_0226501C(UnkStruct_ov116_02265470 * param0);
+static void ov116_0226510C(UnkStruct_ov116_02265470 * param0);
+static void ov116_02265260(UnkStruct_ov116_02265470 * param0);
+static void ov116_022652F4(UnkStruct_ov116_02265470 * param0);
+static void ov116_0226534C(UnkStruct_0201CD38 * param0, void * param1);
+static void ov116_022655DC(UnkStruct_ov116_022660A8 * param0);
+static void ov116_02265754(UnkStruct_ov116_022660A8 * param0);
+static int ov116_022658C8(int param0);
+static void ov116_0226591C(UnkStruct_0201CD38 * param0, void * param1);
+static void ov116_02265AA4(UnkStruct_0201CD38 * param0, void * param1);
+static void ov116_02265D84(UnkStruct_ov116_02265D84 * param0);
+static BOOL ov116_02265D8C(UnkStruct_ov116_02265D84 * param0, int param1, int param2, int param3);
+static BOOL ov116_02265E64(UnkStruct_ov116_02265D84 * param0, int param1, int param2, int param3);
+static BOOL ov116_02265F1C(UnkStruct_ov116_02265D84 * param0, int param1, int param2, int param3);
+static BOOL ov116_02265FD4(UnkStruct_ov116_02265D84 * param0, int param1, int param2, int param3);
+static void ov116_022660A8(UnkStruct_0201CD38 * param0, void * param1);
+static void ov116_0226644C(UnkStruct_0201CD38 * param0, void * param1);
+static void ov116_022667F4(UnkStruct_0201CD38 * param0, void * param1);
+static void ov116_02266BF0(UnkStruct_0201CD38 * param0, void * param1);
+BOOL ov116_0226432C(UnkStruct_ov116_0226501C * param0, int param1, int param2, int param3, int param4, f32 param5, BOOL param6);
+BOOL ov116_0226452C(UnkStruct_ov116_0226501C * param0, f32 param1);
+int ov116_02264680(UnkStruct_ov116_0226139C * param0, int param1);
+void ov116_0226469C(UnkStruct_ov116_0226469C * param0, fx32 param1, fx32 param2, fx32 param3, int param4);
+BOOL ov116_022646FC(UnkStruct_ov116_0226469C * param0);
+void ov116_02264764(UnkStruct_ov116_0226469C * param0, fx32 param1, fx32 param2, s32 param3);
+BOOL ov116_02264774(UnkStruct_ov116_0226469C * param0);
+void ov116_0226493C(UnkStruct_ov116_02262A8C * param0, s16 param1, s16 param2);
+void ov116_02264FEC(UnkStruct_ov116_02262A8C * param0, BOOL * param1);
+void ov116_02265470(UnkStruct_ov116_02262A8C * param0);
+void ov116_02265A1C(UnkStruct_ov116_02262A8C * param0);
+
+BOOL ov116_0226432C (UnkStruct_ov116_0226501C * param0, int param1, int param2, int param3, int param4, f32 param5, BOOL param6)
+{
+    f32 v0;
+    fx32 v1;
+    f32 v2, v3;
+
+    v2 = (param1 - param3) * (((1.33) / 256)) * param5;
+    v3 = (param2 - param4) * (((1.00) / 192)) * param5;
+
+    if (param6) {
+        param0->unk_1FC = v2;
+        param0->unk_200 = v3;
+        param0->unk_1F8 = 8;
+        param0->unk_204 = param0->unk_1FC / param0->unk_1F8;
+        param0->unk_208 = param0->unk_200 / param0->unk_1F8;
+    }
+
+    {
+        f32 v4 = ((v2 * v2) + (v3 * v3));
+        fx32 v5 = FX_F32_TO_FX32(v4);
+
+        v1 = FX_Sqrt(v5);
+        v0 = FX_FX32_TO_F32(v1);
+        v0 *= (1.00);
+    }
+
+    if (v0 != 0.0) {
+        fx32 v6 = v1;
+        fx64c v7 = FX_SinFx64c(v6);
+        fx64c v8 = FX_CosFx64c(v6);
+        f32 v9 = FX_FX64C_TO_F32(v7);
+        f32 v10 = FX_FX64C_TO_F32(v8);
+        f32 v11 = v9 / v0;
+        UnkUnion_ov116_02266FEC v12;
+
+        v12.val2[0] = v10;
+        v12.val2[1] = v3 * v11;
+        v12.val2[2] = v2 * v11;
+        v12.val2[3] = 0.0;
+
+        ov116_0226700C(&param0->unk_190, &v12, &param0->unk_1A0);
+        ov116_022671EC(&param0->unk_150, &param0->unk_190);
+        ov116_02266FFC(&param0->unk_1A0, &param0->unk_190);
+        ov116_02267728(&param0->unk_150, &param0->unk_1B0);
+
+        {
+            UnkUnion_ov116_02266FEC v13;
+            f32 v14 = ov116_02267160(&param0->unk_190);
+
+            v13 = param0->unk_190;
+            ov116_022671B8(&param0->unk_190, &v13, v14);
+        }
+
+        return 1;
+    }
+
+    return 0;
+}
+
+BOOL ov116_0226452C (UnkStruct_ov116_0226501C * param0, f32 param1)
+{
+    f32 v0;
+    fx32 v1;
+    f32 v2, v3;
+
+    v2 = param0->unk_1FC;
+    v3 = param0->unk_200;
+
+    param0->unk_1FC -= param0->unk_204;
+    param0->unk_200 -= param0->unk_208;
+    param0->unk_1F8--;
+
+    {
+        f32 v4 = ((v2 * v2) + (v3 * v3));
+        fx32 v5 = FX_F32_TO_FX32(v4);
+
+        v1 = FX_Sqrt(v5);
+        v0 = FX_FX32_TO_F32(v1);
+        v0 *= (1.00);
+    }
+
+    if (v0 != 0.0) {
+        fx32 v6 = v1;
+        fx64c v7 = FX_SinFx64c(v6);
+        fx64c v8 = FX_CosFx64c(v6);
+        f32 v9 = FX_FX64C_TO_F32(v7);
+        f32 v10 = FX_FX64C_TO_F32(v8);
+        f32 v11 = v9 / v0;
+        UnkUnion_ov116_02266FEC v12;
+
+        v12.val2[0] = v10;
+        v12.val2[1] = v3 * v11;
+        v12.val2[2] = v2 * v11;
+        v12.val2[3] = 0.0;
+
+        ov116_0226700C(&param0->unk_190, &v12, &param0->unk_1A0);
+        ov116_022671EC(&param0->unk_150, &param0->unk_190);
+        ov116_02266FFC(&param0->unk_1A0, &param0->unk_190);
+        ov116_02267728(&param0->unk_150, &param0->unk_1B0);
+
+        return 1;
+    }
+
+    return 0;
+}
+
+int ov116_02264680 (UnkStruct_ov116_0226139C * param0, int param1)
+{
+    int v0;
+
+    for (v0 = 0; v0 < 4; v0++) {
+        if (param0->unk_B4[v0] == param1) {
+            return v0;
+        }
+    }
+
+    return 0xFF;
+}
+
+void ov116_0226469C (UnkStruct_ov116_0226469C * param0, fx32 param1, fx32 param2, fx32 param3, int param4)
+{
+    fx32 v0;
+    fx32 v1;
+    fx32 v2;
+    fx32 v3;
+
+    v2 = param2 - param1;
+
+    v0 = (param4 * param4) << FX32_SHIFT;
+    v1 = FX_Mul(param3, param4 * FX32_ONE);
+    v1 = v2 - v1;
+    v1 = FX_Mul(v1, 2 * FX32_ONE);
+    v3 = FX_Div(v1, v0);
+
+    param0->unk_00 = param1;
+    param0->unk_04 = param1;
+    param0->unk_08 = param3;
+    param0->unk_0C = v3;
+    param0->unk_10 = 0;
+    param0->unk_14 = param4;
+}
+
+BOOL ov116_022646FC (UnkStruct_ov116_0226469C * param0)
+{
+    fx32 v0;
+    fx32 v1;
+    fx32 v2;
+    fx32 v3;
+
+    v3 = FX_Mul(param0->unk_08, param0->unk_10 << FX32_SHIFT);
+    v1 = (param0->unk_10 * param0->unk_10) << FX32_SHIFT;
+    v2 = FX_Mul(param0->unk_0C, v1);
+    v2 = FX_Div(v2, 2 * FX32_ONE);
+    v0 = v3 + v2;
+
+    param0->unk_00 = param0->unk_04 + v0;
+
+    if ((param0->unk_10 + 1) <= param0->unk_14) {
+        param0->unk_10++;
+        return 0;
+    }
+
+    param0->unk_10 = param0->unk_14;
+
+    return 1;
+}
+
+void ov116_02264764 (UnkStruct_ov116_0226469C * param0, fx32 param1, fx32 param2, s32 param3)
+{
+    param0->unk_00 = param1;
+    param0->unk_04 = param1;
+    param0->unk_0C = param2 - param1;
+    param0->unk_10 = 0;
+    param0->unk_14 = param3;
+}
+
+BOOL ov116_02264774 (UnkStruct_ov116_0226469C * param0)
+{
+    s32 v0;
+    BOOL v1;
+    fx32 v2;
+
+    if (param0->unk_10 >= param0->unk_14) {
+        v0 = param0->unk_14;
+        v1 = 1;
+    } else {
+        v0 = param0->unk_10;
+        param0->unk_10++;
+        v1 = 0;
+    }
+
+    v2 = FX_Mul(param0->unk_0C, v0 << FX32_SHIFT);
+    v2 = FX_Div(v2, param0->unk_14 << FX32_SHIFT);
+    v2 += param0->unk_04;
+
+    param0->unk_00 = v2;
+
+    return v1;
+}
+
+static void ov116_022647BC (UnkStruct_0201CD38 * param0, void * param1)
+{
+    UnkStruct_ov116_022647BC * v0 = param1;
+    int v1;
+    fx32 v2, v3;
+    BOOL v4[4][2];
+    BOOL v5 = 1;
+    const fx32 v6[] = {
+        FX32_CONST(-5),
+        FX32_CONST(+3),
+        FX32_CONST(+4),
+        FX32_CONST(-3),
+        FX32_CONST(+3),
+        FX32_CONST(-2)
+    };
+    const fx32 v7[] = {
+        FX32_CONST(+4),
+        FX32_CONST(+5),
+        FX32_CONST(-4),
+        FX32_CONST(-5),
+        FX32_CONST(-3),
+        FX32_CONST(+2)
+    };
+
+    if ((sub_0200F2AC() == 0) || (v0->unk_A4->unk_2C.unk_00 == 1)) {
+        for (v1 = 0; v1 < 3; v1++) {
+            sub_0200D0F4(v0->unk_08[v1]);
+        }
+
+        v0->unk_00 = 0;
+        sub_0200DA58(param0);
+
+        return;
+    }
+
+    switch (v0->unk_04) {
+    case 0:
+        for (v1 = 0; v1 < 3; v1++) {
+            sub_0200D638(v0->unk_08[v1], &v2, &v3);
+            ov116_0226469C(&v0->unk_14[v1][0], v2, v2 + v6[v1], FX_F32_TO_FX32(0.3f), 8);
+            ov116_0226469C(&v0->unk_14[v1][1], v3, v3 + v7[v1], FX_F32_TO_FX32(0.2f), 8);
+        }
+
+        v0->unk_04++;
+        break;
+    case 1:
+        for (v1 = 0; v1 < 3; v1++) {
+            v4[v1][0] = ov116_022646FC(&v0->unk_14[v1][0]);
+            v4[v1][1] = ov116_022646FC(&v0->unk_14[v1][1]);
+
+            sub_0200D614(v0->unk_08[v1], v0->unk_14[v1][0].unk_00, v0->unk_14[v1][1].unk_00);
+
+            if ((v4[v1][0] == 0) || (v4[v1][1] == 0)) {
+                v5 = 0;
+            }
+
+            sub_0200D330(v0->unk_08[v1]);
+        }
+        if (v5) {
+            v0->unk_04++;
+        }
+
+        break;
+    default:
+        for (v1 = 0; v1 < 3; v1++) {
+            sub_0200D0F4(v0->unk_08[v1]);
+        }
+
+        v0->unk_00 = 0;
+
+        sub_0200DA58(param0);
+        break;
+    }
+}
+
+void ov116_0226493C (UnkStruct_ov116_02262A8C * param0, s16 param1, s16 param2)
+{
+    int v0;
+    int v1;
+
+    for (v0 = 0; v0 < 8; v0++) {
+        if (param0->unk_214C[v0].unk_00 == 1) {
+            continue;
+        }
+
+        param0->unk_214C[v0].unk_A4 = param0->unk_14;
+        param0->unk_214C[v0].unk_04 = 0;
+        param0->unk_214C[v0].unk_00 = 1;
+
+        for (v1 = 0; v1 < 3; v1++) {
+            param0->unk_214C[v0].unk_08[v1] = ov116_022626E8(param0, param1, param2);
+            sub_0200D364(param0->unk_214C[v0].unk_08[v1], ((param1 * (v0 + 1)) + (param2 * (v1 + 1))) % 3);
+        }
+
+        sub_0200D9E8(ov116_022647BC, &param0->unk_214C[v0], 4096);
+        break;
+    }
+}
+
+static inline void inline_ov116_022649E4 (UnkStruct_ov116_02264FEC_sub1 * param0)
+{
+    param0->unk_1C = FX_Mul(sub_0201D250(param0->unk_28), FX32_CONST(param0->unk_2E));
+    param0->unk_20 = FX_Mul(sub_0201D264(param0->unk_28), FX32_CONST(param0->unk_30));
+}
+
+static inline void inline_ov116_022649E4_1 (UnkStruct_ov116_02264FEC_sub1 * wk, fx32 x, fx32 y)
+{
+    wk->unk_04 += x;
+    wk->unk_08 += y;
+
+    sub_0200D650(wk->unk_00, wk->unk_14 + wk->unk_0C + wk->unk_1C + wk->unk_04, wk->unk_18 + wk->unk_10 + wk->unk_20 + wk->unk_08, FX32_CONST((192 + 32)));
+}
+
+static void ov116_022649E4 (UnkStruct_0201CD38 * param0, void * param1)
+{
+    UnkStruct_ov116_02264FEC * v0 = param1;
+    UnkStruct_ov116_022649E4 * v1 = v0->unk_00->unk_14;
+
+    if ((sub_0200F2AC() == 0) || (v1->unk_2C.unk_00 == 1)) {
+        *v0->unk_10 = 0;
+        sub_0200DA58(param0);
+        sub_020181C4(v0);
+        return;
+    }
+
+    switch (v0->unk_04) {
+    case 0:
+        v0->unk_0C = 0;
+        v0->unk_04++;
+    case 1:
+    {
+        int v2;
+        s16 v3[][2] = {
+            {96, 58}, {230, 48}, {128, 32}, {40, 64}, {180, 48}
+        };
+        u32 v4 = v3[v0->unk_0C][0];
+        u32 v5 = v3[v0->unk_0C][1];
+
+        v0->unk_08 = 0;
+
+        for (v2 = 0; v2 < (3 * 12); v2++) {
+            v0->unk_14[v2].unk_26 = v2 % 2;
+            v0->unk_14[v2].unk_2E = 6 - (v2 % 3);
+            v0->unk_14[v2].unk_30 = 6 - (v2 % 3);
+            v0->unk_14[v2].unk_00 = v0->unk_00->unk_28[v2];
+            v0->unk_14[v2].unk_28 = ((v2 / 3) * (360 / 12));
+            v0->unk_14[v2].unk_28 %= 360;
+            v0->unk_14[v2].unk_2C = 0;
+            v0->unk_14[v2].unk_32 = -((v2 % 3) * 2);
+            v0->unk_14[v2].unk_0C = FX32_CONST(v4);
+            v0->unk_14[v2].unk_10 = FX32_CONST(v5);
+            v0->unk_14[v2].unk_1C = 0;
+            v0->unk_14[v2].unk_20 = 0;
+            v0->unk_14[v2].unk_04 = 0;
+            v0->unk_14[v2].unk_08 = 0;
+            v0->unk_14[v2].unk_14 = 0;
+            v0->unk_14[v2].unk_18 = 0;
+            v0->unk_14[v2].unk_24 = 0;
+            v0->unk_14[v2].unk_25 = 1;
+            v0->unk_14[v2].unk_27 = 0;
+
+            if (v0->unk_14[v2].unk_28 == 180) {
+                v0->unk_14[v2].unk_24 = 2;
+            }
+
+            if ((v0->unk_14[v2].unk_28 >= 270) && (v0->unk_14[v2].unk_28 <= 90)) {
+                v0->unk_14[v2].unk_24 = 1;
+            }
+
+            inline_ov116_022649E4(&v0->unk_14[v2]);
+            inline_ov116_022649E4_1(&v0->unk_14[v2], FX32_CONST(0), FX32_CONST(v0->unk_14[v2].unk_2C));
+        }
+    }
+        v0->unk_04++;
+        break;
+
+    case 2:
+    {
+        int v6;
+        s16 v7, v8;
+        BOOL v9 = 1;
+
+        if (v0->unk_08 == 0) {
+            v0->unk_08++;
+            ov116_02261E0C(v0->unk_00, 1, 0);
+            sub_02005748(1395);
+        }
+
+        if (v0->unk_08 > 30) {
+            v0->unk_04 = 1;
+            v0->unk_0C++;
+            v0->unk_0C %= 5;
+            ov116_02261E0C(v0->unk_00, 0, 1);
+        } else {
+            v0->unk_08++;
+
+            for (v6 = 0; v6 < (3 * 12); v6++) {
+                if ((++v0->unk_14[v6].unk_32) < 0) {
+                    continue;
+                }
+
+                if (v0->unk_14[v6].unk_32 >= (10 + v0->unk_14[v6].unk_26)) {
+                    if (v0->unk_14[v6].unk_32 == (10 + v0->unk_14[v6].unk_26)) {
+                        sub_0200D364(v0->unk_14[v6].unk_00, 0);
+                    }
+
+                    if (v0->unk_14[v6].unk_32 == (18 + v0->unk_14[v6].unk_26)) {
+                        v0->unk_14[v6].unk_25 = 0;
+                    } else {
+                        if (v0->unk_14[v6].unk_32 % 2) {
+                            v0->unk_14[v6].unk_25 ^= 1;
+                        }
+                    }
+
+                    sub_0200D3F4(v0->unk_14[v6].unk_00, v0->unk_14[v6].unk_25);
+
+                    switch (v0->unk_14[v6].unk_27) {
+                    case 0:
+                        v0->unk_14[v6].unk_14 = FX32_CONST(-1);
+                        break;
+                    case 1:
+                        v0->unk_14[v6].unk_14 = FX32_CONST(+0);
+                        break;
+                    case 2:
+                        v0->unk_14[v6].unk_14 = FX32_CONST(+1);
+                        break;
+                    }
+
+                    v0->unk_14[v6].unk_27++;
+                    v0->unk_14[v6].unk_27 %= 3;
+                }
+                if (v0->unk_14[v6].unk_32 > 5) {
+                    switch (v0->unk_14[v6].unk_24) {
+                    case 2:
+                        v0->unk_14[v6].unk_2C = (v0->unk_14[v6].unk_32 + 5) / 6;
+                        break;
+                    case 1:
+                        v0->unk_14[v6].unk_2C = (v0->unk_14[v6].unk_32 + 5) / 6;
+                        break;
+                    case 0:
+                        v0->unk_14[v6].unk_2C = (v0->unk_14[v6].unk_32 + 5) / 7;
+                        break;
+                    }
+                }
+
+                switch (v0->unk_14[v6].unk_24) {
+                case 2:
+                    v7 = (30 - (v0->unk_14[v6].unk_32 + 5)) / 8;
+                    v8 = (30 - (v0->unk_14[v6].unk_32 + 7)) / 8;
+                    break;
+                case 1:
+                default:
+                    v7 = (30 - (v0->unk_14[v6].unk_32 + 5)) / 8;
+                    v8 = (30 - (v0->unk_14[v6].unk_32 + 6)) / 8;
+                    break;
+                case 0:
+                    v7 = (30 - (v0->unk_14[v6].unk_32 + 5)) / 8;
+                    v8 = (30 - (v0->unk_14[v6].unk_32 + 4)) / 8;
+                    break;
+                }
+
+                if (v7 > 0) {
+                    v0->unk_14[v6].unk_2E += v7;
+                } else {
+                    v0->unk_14[v6].unk_2E++;
+                }
+
+                if (v8 > 0) {
+                    v0->unk_14[v6].unk_30 += v8;
+                } else {
+                    v0->unk_14[v6].unk_30++;
+                }
+
+                inline_ov116_022649E4(&v0->unk_14[v6]);
+                inline_ov116_022649E4_1(&v0->unk_14[v6], FX32_CONST(0), FX32_CONST(v0->unk_14[v6].unk_2C));
+            }
+        }
+        if (*v0->unk_10) {
+            v0->unk_04++;
+        }
+    }
+    break;
+
+    default:
+        ov116_02261E0C(v0->unk_00, 0, 0);
+        sub_020181C4(v0);
+        sub_0200DA58(param0);
+        break;
+    }
+
+    ov116_02261E28(v0->unk_00);
+}
+
+void ov116_02264FEC (UnkStruct_ov116_02262A8C * param0, BOOL * param1)
+{
+    UnkStruct_ov116_02264FEC * v0 = sub_02018144(106, sizeof(UnkStruct_ov116_02264FEC));
+
+    v0->unk_00 = param0;
+    v0->unk_04 = 0;
+    v0->unk_08 = 0;
+    v0->unk_10 = param1;
+
+    sub_0200D9E8(ov116_022649E4, v0, 4096);
+}
+
+static void ov116_0226501C (UnkStruct_ov116_02265470 * param0)
+{
+    UnkStruct_ov116_0226501C * v0 = param0->unk_08[0];
+    int * v1 = param0->unk_08[1];
+    int * v2 = param0->unk_08[3];
+    UnkStruct_02002F38 * v3 = param0->unk_08[2];
+
+    if (param0->unk_04 == 0) {
+        return;
+    }
+
+    switch (param0->unk_00) {
+    case 0:
+        if (*v1 < 4) {
+            *v1 += 1;
+        } else {
+            *v1 = 4;
+            param0->unk_00++;
+        }
+
+        sub_02003A2C(v3, 0, 0x1, *v1 + *v2, 0x0);
+        sub_02003A2C(v3, 1, 0x1, *v1 + *v2, 0x0);
+        break;
+
+    case 1:
+        sub_02017348(&v0->unk_00, 1);
+        param0->unk_28[0] = 0;
+        param0->unk_00++;
+        break;
+
+    case 2:
+        if (param0->unk_50[0] == 1) {
+            if (++param0->unk_28[0] >= 15) {
+                param0->unk_00++;
+            }
+        }
+
+        break;
+
+    case 3:
+        if (*v1 > 0) {
+            *v1 -= 1;
+        } else {
+            *v1 = 0;
+            param0->unk_00++;
+        }
+
+        sub_02003A2C(v3, 0, 0x1, *v1 + *v2, 0x0);
+        sub_02003A2C(v3, 1, 0x1, *v1 + *v2, 0x0);
+        break;
+
+    default:
+        param0->unk_50[0] = 0;
+        param0->unk_04 = 0;
+        param0->unk_00 = 0;
+
+        sub_02017348(&v0->unk_00, 0);
+
+        break;
+    }
+}
+
+static void ov116_0226510C (UnkStruct_ov116_02265470 * param0)
+{
+    int v0;
+    s16 v1, v2;
+    s16 v3[] = {188, 188, 180, 180};
+    BOOL v4[4] = {1, 1, 1, 1};
+    UnkStruct_0200D0F4 * v5;
+
+    if (param0->unk_04 == 0) {
+        return;
+    }
+
+    switch (param0->unk_00) {
+    case 0:
+        for (v0 = 0; v0 < 4; v0++) {
+            v5 = param0->unk_08[v0];
+            if (v5 == NULL) {
+                continue;
+            }
+
+            sub_0200D550(v5, &v1, &v2);
+            if (v2 > v3[v0]) {
+                v2 -= 6;
+                sub_0200D4C4(v5, v1, v2);
+                v4[v0] = 0;
+            }
+        }
+        if (v4[0] && v4[1] && v4[2] && v4[2]) {
+            param0->unk_28[0] = 0;
+            param0->unk_50[0] = 0;
+            param0->unk_00++;
+        }
+
+        break;
+
+    case 1:
+        if (param0->unk_50[0] == 1) {
+            if (++param0->unk_28[0] >= 15) {
+                param0->unk_00++;
+            }
+        }
+
+        break;
+
+    case 2:
+        for (v0 = 0; v0 < 4; v0++) {
+            v5 = param0->unk_08[v0];
+            if (v5 == NULL) {
+                continue;
+            }
+
+            sub_0200D550(v5, &v1, &v2);
+            if (v2 < (192 + 32)) {
+                v2 += 6;
+                sub_0200D4C4(v5, v1, v2);
+                v4[v0] = 0;
+            }
+        }
+        if (v4[0] && v4[1] && v4[2] && v4[2]) {
+            param0->unk_00++;
+        }
+
+        break;
+
+    default:
+        param0->unk_50[0] = 0;
+        param0->unk_04 = 0;
+        param0->unk_00 = 0;
+
+        break;
+    }
+
+    for (v0 = 0; v0 < 4; v0++) {
+        v5 = param0->unk_08[v0];
+        if (v5 == NULL) {
+            continue;
+        }
+
+        sub_0200D33C(v5);
+    }
+}
+
+static void ov116_02265260 (UnkStruct_ov116_02265470 * param0)
+{
+    int v0;
+
+    if (param0->unk_04 == 0) {
+        return;
+    }
+
+    switch (param0->unk_00) {
+    case 0:
+        for (v0 = 0; v0 < 8; v0++) {
+            UnkStruct_ov116_0226501C * v1 = param0->unk_08[v0];
+
+            sub_02017240(&v1->unk_88[0], (v0 * 20) % 40);
+            sub_02017348(&v1->unk_00, 1);
+        }
+
+        param0->unk_28[9] = 0;
+        param0->unk_00++;
+        break;
+    case 1:
+        if (param0->unk_50[0] == 1) {
+            if (++param0->unk_28[9] >= 15) {
+                param0->unk_00++;
+            }
+        }
+        break;
+    default:
+        for (v0 = 0; v0 < 8; v0++) {
+            UnkStruct_ov116_0226501C * v2 = param0->unk_08[v0];
+
+            sub_02017348(&v2->unk_00, 0);
+        }
+
+        param0->unk_50[0] = 0;
+        param0->unk_04 = 0;
+        param0->unk_00 = 0;
+
+        break;
+    }
+}
+
+static void ov116_022652F4 (UnkStruct_ov116_02265470 * param0)
+{
+    if (param0->unk_04 == 0) {
+        return;
+    }
+
+    switch (param0->unk_00) {
+    case 0:
+        ov116_02264FEC(param0->unk_08[0], &param0->unk_50[1]);
+        param0->unk_28[0] = 0;
+        param0->unk_00++;
+        break;
+    case 1:
+        if (param0->unk_50[0] == 1) {
+            if (++param0->unk_28[0] >= 15) {
+                param0->unk_50[1] = 1;
+                param0->unk_00++;
+            }
+        }
+        break;
+    default:
+        if (param0->unk_50[1] == 0) {
+            param0->unk_50[0] = 0;
+            param0->unk_04 = 0;
+            param0->unk_00 = 0;
+        }
+        break;
+    }
+}
+
+static void ov116_0226534C (UnkStruct_0201CD38 * param0, void * param1)
+{
+    UnkStruct_ov116_0226534C * v0 = param1;
+    UnkStruct_ov116_022649E4 * v1 = v0->unk_84;
+
+    if ((sub_0200F2AC() == 0) || (v1->unk_2C.unk_00 == 1)) {
+        sub_0200DA58(param0);
+
+        return;
+    }
+
+    switch (*v0->unk_04) {
+    case 5:
+        if (v0->unk_08[4].unk_04 == 0) {
+            v0->unk_08[4].unk_04 = 1;
+            v0->unk_08[4].unk_50[0] = 0;
+        }
+    case 4:
+        if (v0->unk_08[3].unk_04 == 0) {
+            sub_02005748(1551);
+            v0->unk_08[3].unk_04 = 1;
+            v0->unk_08[3].unk_50[0] = 0;
+        }
+    case 3:
+        if (v0->unk_08[2].unk_04 == 0) {
+            v0->unk_08[2].unk_04 = 1;
+            v0->unk_08[2].unk_50[0] = 0;
+        }
+    case 2:
+        if (v0->unk_08[1].unk_04 == 0) {
+            sub_02005748(1393);
+            v0->unk_08[1].unk_04 = 1;
+            v0->unk_08[1].unk_50[0] = 0;
+        }
+    case 1:
+        if (v0->unk_08[0].unk_04 == 0) {
+            v0->unk_08[0].unk_04 = 1;
+            v0->unk_08[0].unk_50[0] = 0;
+        }
+        break;
+    default:
+        if (*v0->unk_04 != v0->unk_00) {
+            v0->unk_08[0].unk_50[0] = 1;
+            v0->unk_08[1].unk_50[0] = 1;
+            v0->unk_08[2].unk_50[0] = 1;
+            v0->unk_08[3].unk_50[0] = 1;
+            v0->unk_08[4].unk_50[0] = 1;
+            sub_020057A4(1393, 0);
+        }
+        break;
+    }
+
+    ov116_0226501C(&v0->unk_08[0]);
+    ov116_0226510C(&v0->unk_08[1]);
+    ov116_02265260(&v0->unk_08[2]);
+    ov116_0226510C(&v0->unk_08[3]);
+    ov116_022652F4(&v0->unk_08[4]);
+
+    v0->unk_00 = *v0->unk_04;
+}
+
+void ov116_02265470 (UnkStruct_ov116_02262A8C * param0)
+{
+    int v0;
+
+    param0->unk_20C4.unk_84 = param0->unk_14;
+    param0->unk_20C4.unk_04 = &param0->unk_279C.unk_08;
+    param0->unk_20C4.unk_00 = *param0->unk_20C4.unk_04;
+
+    for (v0 = 0; v0 < 5; v0++) {
+        UnkStruct_ov116_02265470 * v1 = &param0->unk_20C4.unk_08[v0];
+
+        v1->unk_00 = 0;
+        v1->unk_04 = 0;
+
+        switch (v0) {
+        case 0:
+            v1->unk_08[0] = &param0->unk_92C;
+            v1->unk_08[1] = &param0->unk_F0;
+            v1->unk_08[3] = &param0->unk_F4;
+            v1->unk_08[2] = param0->unk_14->unk_14;
+            break;
+        case 1:
+            v1->unk_08[0] = param0->unk_B8[0];
+            v1->unk_08[1] = param0->unk_B8[1];
+            v1->unk_08[2] = NULL;
+            v1->unk_08[3] = NULL;
+            {
+                s16 v2, v3;
+
+                sub_0200D550(param0->unk_B8[0], &v2, &v3);
+                sub_0200D4C4(param0->unk_B8[0], v2, (192 + 32));
+                sub_0200D550(param0->unk_B8[1], &v2, &v3);
+                sub_0200D4C4(param0->unk_B8[1], v2, (192 + 32));
+            }
+            break;
+        case 2:
+        {
+            int v4;
+
+            for (v4 = 0; v4 < 8; v4++) {
+                v1->unk_08[v4] = &param0->unk_B38[v4];
+            }
+        }
+        break;
+        case 3:
+            v1->unk_08[0] = NULL;
+            v1->unk_08[1] = NULL;
+            v1->unk_08[2] = param0->unk_B8[2];
+            v1->unk_08[3] = param0->unk_B8[3];
+            {
+                s16 v5, v6;
+
+                sub_0200D550(param0->unk_B8[2], &v5, &v6);
+                sub_0200D4C4(param0->unk_B8[2], v5, (192 + 32));
+                sub_0200D550(param0->unk_B8[3], &v5, &v6);
+                sub_0200D4C4(param0->unk_B8[3], v5, (192 + 32));
+            }
+            break;
+        case 4:
+            v1->unk_08[0] = param0;
+            break;
+        }
+    }
+
+    param0->unk_20C4.unk_80 = sub_0200D9E8(ov116_0226534C, &param0->unk_20C4, 4096);
+}
+
+static void ov116_022655DC (UnkStruct_ov116_022660A8 * param0)
+{
+    int * v0 = param0->unk_10;
+    int * v1 = param0->unk_14;
+    BOOL v2[5];
+
+    switch (param0->unk_24) {
+    case 0:
+        ov116_02264764(&param0->unk_34[0], FX32_CONST(0), FX32_CONST(+40), 10);
+        ov116_02264764(&param0->unk_34[1], FX32_CONST(0), FX32_CONST(+80), 10);
+        ov116_02264764(&param0->unk_34[2], FX32_CONST(0), FX32_CONST(-80), 10);
+
+        param0->unk_24++;
+        break;
+    case 1:
+    {
+        int v3;
+
+        for (v3 = 0; v3 < 3; v3++) {
+            v2[v3] = ov116_02264774(&param0->unk_34[v3]);
+        }
+
+        sub_0201C63C(param0->unk_30->unk_10, 7, 3, param0->unk_34[0].unk_00 >> FX32_SHIFT);
+        sub_0201C63C(param0->unk_30->unk_10, 5, 0, param0->unk_34[1].unk_00 >> FX32_SHIFT);
+        sub_0201C63C(param0->unk_30->unk_10, 6, 0, param0->unk_34[2].unk_00 >> FX32_SHIFT);
+        sub_0201C63C(param0->unk_30->unk_10, 1, 0, param0->unk_34[1].unk_00 >> FX32_SHIFT);
+        sub_0201C63C(param0->unk_30->unk_10, 2, 0, param0->unk_34[2].unk_00 >> FX32_SHIFT);
+
+        if (v2[0] && v2[1] && v2[2]) {
+            param0->unk_24++;
+        }
+    }
+    break;
+    case 2:
+        param0->unk_2C = 1;
+        param0->unk_24 = 0;
+        break;
+    }
+
+    if (*v1 < 6) {
+        *v1 += 1;
+    } else {
+        *v1 = 6;
+    }
+
+    sub_02003A2C(param0->unk_30->unk_14, 0, 0x1, *v0 + *v1, 0x0);
+    sub_02003A2C(param0->unk_30->unk_14, 1, 0x1, *v0 + *v1, 0x0);
+}
+
+static void ov116_02265754 (UnkStruct_ov116_022660A8 * param0)
+{
+    int * v0 = param0->unk_10;
+    int * v1 = param0->unk_14;
+    BOOL v2[5];
+
+    switch (param0->unk_24) {
+    case 0:
+        ov116_02264764(&param0->unk_34[0], FX32_CONST(+40), FX32_CONST(0), 10);
+        ov116_02264764(&param0->unk_34[1], FX32_CONST(+80), FX32_CONST(0), 10);
+        ov116_02264764(&param0->unk_34[2], FX32_CONST(-80), FX32_CONST(0), 10);
+        param0->unk_24++;
+        break;
+    case 1:
+    {
+        int v3;
+
+        for (v3 = 0; v3 < 3; v3++) {
+            v2[v3] = ov116_02264774(&param0->unk_34[v3]);
+        }
+
+        sub_0201C63C(param0->unk_30->unk_10, 7, 3, param0->unk_34[0].unk_00 >> FX32_SHIFT);
+        sub_0201C63C(param0->unk_30->unk_10, 5, 0, param0->unk_34[1].unk_00 >> FX32_SHIFT);
+        sub_0201C63C(param0->unk_30->unk_10, 6, 0, param0->unk_34[2].unk_00 >> FX32_SHIFT);
+        sub_0201C63C(param0->unk_30->unk_10, 1, 0, param0->unk_34[1].unk_00 >> FX32_SHIFT);
+        sub_0201C63C(param0->unk_30->unk_10, 2, 0, param0->unk_34[2].unk_00 >> FX32_SHIFT);
+
+        if (v2[0] && v2[1] && v2[2]) {
+            param0->unk_24++;
+        }
+    }
+    break;
+    case 2:
+        param0->unk_2C = 0;
+        param0->unk_24 = 0;
+        break;
+    }
+
+    if (*v1 > 4) {
+        *v1 -= 1;
+    } else {
+        *v1 = 0;
+    }
+
+    sub_02003A2C(param0->unk_30->unk_14, 0, 0x1, *v0 + *v1, 0x0);
+    sub_02003A2C(param0->unk_30->unk_14, 1, 0x1, *v0 + *v1, 0x0);
+}
+
+static int ov116_022658C8 (int param0)
+{
+    switch (param0) {
+    case 1:
+        return 28;
+    case 2:
+        return 14;
+    case 3:
+        return 12;
+    case 4:
+        return 10;
+    case 5:
+        return 9;
+    case 6:
+        return 32 * 1;
+    case 7:
+        return 14 * 1;
+    case 8:
+        return 12 * 1;
+    case 9:
+        return 11 * 1;
+    case 10:
+        return 11 * 1;
+    default:
+        return 9;
+    }
+}
+
+static const UnkStruct_ov116_02267DA4 Unk_ov116_02267DA4[] = {
+    {
+        0x96,
+        0x0,
+        0x0,
+        {0x0, 0x0, 0x0},
+        {0x0, 0x0, 0x0},
+        NULL
+    },
+    {
+        0x96,
+        0x2,
+        0x1,
+        {0x0, 0x0, 0x0},
+        {0x0, 0x0, 0x0},
+        ov116_02265AA4
+    },
+    {
+        0x96,
+        0x3,
+        0x2,
+        {0x0, 0x0, 0x0},
+        {0x0, 0x0, 0x0},
+        ov116_022660A8
+    },
+    {
+        0x96,
+        0x3,
+        0x2,
+        {0x0, 0x1, 0x0},
+        {0x1, 0x0, 0x0},
+        ov116_022660A8
+    },
+    {
+        0x96,
+        0x3,
+        0x3,
+        {0x0, 0x1, 0x2},
+        {0x2, 0x0, 0x0},
+        ov116_0226644C
+    },
+    {
+        0x96,
+        0x3,
+        0x4,
+        {0x0, 0x1, 0x2},
+        {0x2, 0x0, 0x0},
+        ov116_0226644C
+    },
+    {
+        0x96,
+        0x3,
+        0x5,
+        {0x2, 0x1, 0x0},
+        {0x1, 0x0, 0x0},
+        ov116_022667F4
+    },
+    {
+        0x96,
+        0x3,
+        0x5,
+        {0x2, 0x1, 0x0},
+        {0x2, 0x0, 0x0},
+        ov116_02266BF0
+    },
+    {
+        0x96,
+        0x3,
+        0x5,
+        {0x2, 0x1, 0x0},
+        {0x2, 0x0, 0x0},
+        ov116_02266BF0
+    }
+};
+
+static void ov116_0226591C (UnkStruct_0201CD38 * param0, void * param1)
+{
+    int v0;
+    int v1;
+    int v2;
+    UnkStruct_ov116_022660A8 * v3 = param1;
+    UnkStruct_ov116_02265AA4 * v4 = &v3->unk_00;
+
+    v2 = *v3->unk_0C;
+
+    if ((sub_0200F2AC() == 0) || (v3->unk_30->unk_2C.unk_00 == 1)) {
+        sub_0200DA58(param0);
+        return;
+    }
+
+    if (v3->unk_28) {
+        if (v3->unk_2C == 0) {
+            ov116_022655DC(v3);
+        }
+
+        if (v3->unk_18 == 0) {
+            if (v2 && (v2 < (8 - 0))) {
+                v3->unk_18 = Unk_ov116_02267DA4[v2].unk_00;
+                v3->unk_1C = 0;
+                v4->unk_140 = Unk_ov116_02267DA4[v2].unk_04 - 1;
+                v4->unk_144 = Unk_ov116_02267DA4[v2].unk_08;
+                v4->unk_148 = Unk_ov116_02267DA4[v2].unk_08 + 5;
+
+                for (v0 = 0; v0 < 2; v0++) {
+                    int v5 = Unk_ov116_02267DA4[v2].unk_0C[v0];
+
+                    sub_0200D430(v4->unk_00[v0].unk_00, 4 + v5);
+                    v5 = Unk_ov116_02267DA4[v2].unk_18[v0];
+                    sub_0200D430(v4->unk_A0[v0].unk_00, 0 + v5);
+                }
+
+                sub_0200D9E8(Unk_ov116_02267DA4[v2].unk_24, v3, 4097);
+            }
+        }
+    } else if ((v3->unk_28 == 0) && (v3->unk_18 == 0)) {
+        if (v3->unk_2C == 1) {
+            ov116_02265754(v3);
+        }
+    }
+
+    if (v3->unk_18) {
+        v3->unk_18--;
+    }
+}
+
+void ov116_02265A1C (UnkStruct_ov116_02262A8C * param0)
+{
+    param0->unk_2018.unk_0C = &param0->unk_279C.unk_14;
+    param0->unk_2018.unk_10 = &param0->unk_F0;
+    param0->unk_2018.unk_14 = &param0->unk_F4;
+    param0->unk_2018.unk_30 = param0->unk_14;
+    param0->unk_2018.unk_18 = 0;
+    param0->unk_2018.unk_24 = 0;
+    param0->unk_2018.unk_28 = 0;
+
+    {
+        int v0;
+
+        for (v0 = 0; v0 < 2; v0++) {
+            param0->unk_2018.unk_00.unk_00[v0].unk_00 = param0->unk_D0[v0];
+            param0->unk_2018.unk_00.unk_A0[v0].unk_00 = param0->unk_C8[v0];
+        }
+    }
+
+    param0->unk_2018.unk_08 = sub_0200D9E8(ov116_0226591C, &param0->unk_2018, 4096);
+}
+
+static void ov116_02265AA4 (UnkStruct_0201CD38 * param0, void * param1)
+{
+    UnkStruct_ov116_022660A8 * v0 = param1;
+    UnkStruct_ov116_02265AA4 * v1 = &v0->unk_00;
+    BOOL v2[2];
+    fx32 v3, v4;
+    fx32 v5, v6;
+
+    if ((sub_0200F2AC() == 0) || (v0->unk_30->unk_2C.unk_00 == 1)) {
+        sub_0200DA58(param0);
+        return;
+    }
+
+    switch (v0->unk_1C) {
+    case 0:
+        v1->unk_00[0].unk_08 = 0;
+        v1->unk_00[0].unk_14 = 128;
+        v1->unk_00[0].unk_16 = (128 + 32);
+        v1->unk_00[0].unk_18 = 64;
+        v1->unk_00[0].unk_1C = 24;
+
+        sub_0200D3F4(v1->unk_00[0].unk_00, 1);
+
+        v1->unk_A0[0].unk_08 = 0;
+        v1->unk_A0[0].unk_14 = 128;
+        v1->unk_A0[0].unk_16 = (128 + 32);
+        v1->unk_A0[0].unk_18 = 64;
+        v1->unk_A0[0].unk_1C = 24;
+
+        sub_0200D3F4(v1->unk_A0[0].unk_00, 1);
+
+        {
+            sub_0200D67C(v1->unk_00[0].unk_00, &v5, &v6, ((192 + 64) << FX32_SHIFT));
+
+            v3 = (v1->unk_00[0].unk_14 << FX32_SHIFT) + (sub_0201D250(v1->unk_00[0].unk_08) * v1->unk_00[0].unk_18);
+            v4 = (v1->unk_00[0].unk_16 << FX32_SHIFT) + (sub_0201D264(v1->unk_00[0].unk_08) * v1->unk_00[0].unk_1C);
+
+            sub_0200D650(v1->unk_00[0].unk_00, v3, v4, ((192 + 64) << FX32_SHIFT));
+            ov116_02264764(&v1->unk_00[0].unk_20, v3, v3 + FX32_CONST(180), ov116_022658C8(v1->unk_148));
+            ov116_02264764(&v1->unk_00[0].unk_38, v4, v4 - FX32_CONST(24), ov116_022658C8(v1->unk_148));
+            sub_0200D67C(v1->unk_A0[0].unk_00, &v5, &v6, ((192 + 64) << FX32_SHIFT));
+
+            v3 = (v1->unk_A0[0].unk_14 << FX32_SHIFT) + (sub_0201D250(v1->unk_A0[0].unk_08) * v1->unk_A0[0].unk_18);
+            v4 = (v1->unk_A0[0].unk_16 << FX32_SHIFT) - (sub_0201D264(v1->unk_A0[0].unk_08) * v1->unk_A0[0].unk_1C);
+
+            sub_0200D650(v1->unk_A0[0].unk_00, v3, v4, ((192 + 64) << FX32_SHIFT));
+            ov116_02264764(&v1->unk_A0[0].unk_20, v3, v3 - FX32_CONST(180), ov116_022658C8(v1->unk_144));
+            ov116_02264764(&v1->unk_A0[0].unk_38, v4, v4 + FX32_CONST(24), ov116_022658C8(v1->unk_144));
+        }
+
+        ov116_02265D84(&v1->unk_A0[0]);
+        ov116_02265D84(&v1->unk_00[0]);
+        v0->unk_1C++;
+    case 1:
+        v2[0] = ov116_02265FD4(&v1->unk_A0[0], v1->unk_144, 0, 1);
+        v2[1] = ov116_02265F1C(&v1->unk_00[0], v1->unk_148, 1, 3);
+
+        if (v2[0] && v2[1]) {
+            ov116_02265D84(&v1->unk_A0[0]);
+            ov116_02265D84(&v1->unk_00[0]);
+            v0->unk_1C++;
+        }
+        break;
+    case 2:
+        v2[0] = ov116_02265D8C(&v1->unk_A0[0], v1->unk_144, 0, 3);
+        v2[1] = ov116_02265D8C(&v1->unk_00[0], v1->unk_148, 1, 2);
+        if (v2[0] && v2[1]) {
+            ov116_02265D84(&v1->unk_A0[0]);
+            ov116_02265D84(&v1->unk_00[0]);
+            v0->unk_1C++;
+        }
+
+        break;
+    case 3:
+        v2[0] = ov116_02265E64(&v1->unk_A0[0], v1->unk_144, 0, 2);
+        v2[1] = ov116_02265F1C(&v1->unk_00[0], v1->unk_148, 1, 3);
+        if (v2[0] && v2[1]) {
+            ov116_02265D84(&v1->unk_A0[0]);
+            ov116_02265D84(&v1->unk_00[0]);
+            v0->unk_1C++;
+        }
+
+        break;
+    case 4:
+        v2[0] = ov116_02265FD4(&v1->unk_A0[0], v1->unk_144, 0, 1);
+        v2[1] = ov116_02265D8C(&v1->unk_00[0], v1->unk_148, 1, 2);
+
+        if (v2[0] && v2[1]) {
+            ov116_02265D84(&v1->unk_A0[0]);
+            ov116_02265D84(&v1->unk_00[0]);
+            v0->unk_1C++;
+        }
+        break;
+    default:
+        sub_0200DA58(param0);
+        break;
+    }
+}
+
+static void ov116_02265D84 (UnkStruct_ov116_02265D84 * param0)
+{
+    param0->unk_04 = 0;
+}
+
+static BOOL ov116_02265D8C (UnkStruct_ov116_02265D84 * param0, int param1, int param2, int param3)
+{
+    BOOL v0[2];
+    fx32 v1, v2;
+    fx32 v3, v4;
+
+    switch (param0->unk_04) {
+    case 0:
+        sub_0200D67C(param0->unk_00, &v1, &v2, ((192 + 64) << FX32_SHIFT));
+        if (param2 == 0) {
+            ov116_02264764(&param0->unk_20, v1, v1 - FX32_CONST(180), ov116_022658C8(param1));
+        } else {
+            ov116_02264764(&param0->unk_20, v1, v1 + FX32_CONST(180), ov116_022658C8(param1));
+        }
+
+        if (param3 == 2) {
+            ov116_02264764(&param0->unk_38, v2, v2 - FX32_CONST(24), ov116_022658C8(param1));
+        } else {
+            ov116_02264764(&param0->unk_38, v2, v2 + FX32_CONST(24), ov116_022658C8(param1));
+        }
+
+        param0->unk_04++;
+    case 1:
+        v0[0] = ov116_02264774(&param0->unk_20);
+        ov116_02264774(&param0->unk_38);
+        sub_0200D650(param0->unk_00, param0->unk_20.unk_00, param0->unk_38.unk_00, ((192 + 64) << FX32_SHIFT));
+
+        if (v0[0]) {
+            return 1;
+        }
+        break;
+    default:
+        return 1;
+    }
+
+    return 0;
+}
+
+static BOOL ov116_02265E64 (UnkStruct_ov116_02265D84 * param0, int param1, int param2, int param3)
+{
+    BOOL v0[2];
+    fx32 v1, v2;
+    fx32 v3, v4;
+
+    switch (param0->unk_04) {
+    case 0:
+        if (param2 == 0) {
+            ov116_02264764(&param0->unk_20, FX32_CONST(308), FX32_CONST(128), ov116_022658C8(param1));
+        } else {
+            ov116_02264764(&param0->unk_20, FX32_CONST(-62), FX32_CONST(128), ov116_022658C8(param1));
+        }
+
+        if (param3 == 2) {
+            ov116_02264764(&param0->unk_38, FX32_CONST((128 + 32)), FX32_CONST((128 + 32) - 24), ov116_022658C8(param1));
+        } else {
+            ov116_02264764(&param0->unk_38, FX32_CONST((128 + 32)), FX32_CONST((128 + 32) + 24), ov116_022658C8(param1));
+        }
+
+        param0->unk_04++;
+    case 1:
+        v0[0] = ov116_02264774(&param0->unk_20);
+        ov116_02264774(&param0->unk_38);
+        sub_0200D650(param0->unk_00, param0->unk_20.unk_00, param0->unk_38.unk_00, ((192 + 64) << FX32_SHIFT));
+
+        if (v0[0]) {
+            return 1;
+        }
+        break;
+    default:
+        return 1;
+    }
+
+    return 0;
+}
+
+static BOOL ov116_02265F1C (UnkStruct_ov116_02265D84 * param0, int param1, int param2, int param3)
+{
+    BOOL v0[2];
+    fx32 v1, v2;
+    fx32 v3, v4;
+
+    switch (param0->unk_04) {
+    case 0:
+        if (param2 == 0) {
+            ov116_02264764(&param0->unk_20, FX32_CONST(308), FX32_CONST(128), ov116_022658C8(param1));
+        } else {
+            ov116_02264764(&param0->unk_20, FX32_CONST(-62), FX32_CONST(128), ov116_022658C8(param1));
+        }
+
+        if (param3 == 2) {
+            ov116_02264764(&param0->unk_38, FX32_CONST(96), FX32_CONST(96 - 24), ov116_022658C8(param1));
+        } else {
+            ov116_02264764(&param0->unk_38, FX32_CONST(96), FX32_CONST(96 + 24), ov116_022658C8(param1));
+        }
+
+        param0->unk_04++;
+    case 1:
+        v0[0] = ov116_02264774(&param0->unk_20);
+        ov116_02264774(&param0->unk_38);
+        sub_0200D650(param0->unk_00, param0->unk_20.unk_00, param0->unk_38.unk_00, ((192 + 64) << FX32_SHIFT));
+
+        if (v0[0]) {
+            return 1;
+        }
+        break;
+    default:
+        return 1;
+    }
+
+    return 0;
+}
+
+static BOOL ov116_02265FD4 (UnkStruct_ov116_02265D84 * param0, int param1, int param2, int param3)
+{
+    BOOL v0[2];
+    fx32 v1, v2;
+    fx32 v3, v4;
+
+    switch (param0->unk_04) {
+    case 0:
+        param0->unk_10 = 0;
+        param0->unk_08 = 0;
+        param0->unk_04++;
+    case 1:
+        param0->unk_08 += (360 / ov116_022658C8(param1));
+
+        if (param0->unk_08 >= 360) {
+            param0->unk_08 = 0;
+        }
+
+        sub_0200D67C(param0->unk_00, &v3, &v4, ((192 + 64) << FX32_SHIFT));
+
+        if (param2 == 0) {
+            v1 = (param0->unk_14 << FX32_SHIFT) - (sub_0201D250(param0->unk_08) * param0->unk_18);
+            v2 = (param0->unk_16 << FX32_SHIFT) - (sub_0201D264(param0->unk_08) * param0->unk_1C);
+        } else {
+            v1 = (param0->unk_14 << FX32_SHIFT) + (sub_0201D250(param0->unk_08) * param0->unk_18);
+            v2 = (param0->unk_16 << FX32_SHIFT) - (sub_0201D264(param0->unk_08) * param0->unk_1C);
+        }
+
+        sub_0200D650(param0->unk_00, v1, v2, ((192 + 64) << FX32_SHIFT));
+
+        if (param0->unk_08 == 0) {
+            param0->unk_10++;
+
+            if (param0->unk_10 >= param3) {
+                param0->unk_04++;
+                return 1;
+            } else {
+                param0->unk_04 = 1;
+            }
+        }
+        break;
+    default:
+        return 1;
+    }
+
+    return 0;
+}
+
+static void ov116_022660A8 (UnkStruct_0201CD38 * param0, void * param1)
+{
+    int v0;
+    UnkStruct_ov116_022660A8 * v1 = param1;
+    UnkStruct_ov116_02265AA4 * v2 = &v1->unk_00;
+    BOOL v3[4] = {1, 1, 1, 1};
+    fx32 v4, v5;
+    fx32 v6, v7;
+
+    if ((sub_0200F2AC() == 0) || (v1->unk_30->unk_2C.unk_00 == 1)) {
+        sub_0200DA58(param0);
+        return;
+    }
+
+    switch (v1->unk_1C) {
+    case 0:
+        for (v0 = 0; v0 < v2->unk_140; v0++) {
+            v2->unk_00[v0].unk_08 = 0;
+            v2->unk_00[v0].unk_14 = 128;
+            v2->unk_00[v0].unk_16 = (128 + 32);
+            v2->unk_00[v0].unk_18 = 64;
+            v2->unk_00[v0].unk_1C = 24;
+
+            sub_0200D3F4(v2->unk_00[v0].unk_00, 1);
+
+            v2->unk_A0[v0].unk_08 = 0;
+            v2->unk_A0[v0].unk_14 = 128;
+            v2->unk_A0[v0].unk_16 = (128 + 32);
+            v2->unk_A0[v0].unk_18 = 64;
+            v2->unk_A0[v0].unk_1C = 24;
+
+            sub_0200D3F4(v2->unk_A0[v0].unk_00, 1);
+
+            sub_0200D67C(v2->unk_00[v0].unk_00, &v6, &v7, ((192 + 64) << FX32_SHIFT));
+            v4 = (v2->unk_00[v0].unk_14 << FX32_SHIFT) + (sub_0201D250(v2->unk_00[v0].unk_08) * v2->unk_00[v0].unk_18);
+            v5 = (v2->unk_00[v0].unk_16 << FX32_SHIFT) + (sub_0201D264(v2->unk_00[v0].unk_08) * v2->unk_00[v0].unk_1C);
+            sub_0200D650(v2->unk_00[v0].unk_00, v4, v5, ((192 + 64) << FX32_SHIFT));
+
+            sub_0200D67C(v2->unk_A0[v0].unk_00, &v6, &v7, ((192 + 64) << FX32_SHIFT));
+            v4 = (v2->unk_A0[v0].unk_14 << FX32_SHIFT) + (sub_0201D250(v2->unk_A0[v0].unk_08) * v2->unk_A0[v0].unk_18);
+            v5 = (v2->unk_A0[v0].unk_16 << FX32_SHIFT) - (sub_0201D264(v2->unk_A0[v0].unk_08) * v2->unk_A0[v0].unk_1C);
+            sub_0200D650(v2->unk_A0[v0].unk_00, v4, v5, ((192 + 64) << FX32_SHIFT));
+        }
+
+        ov116_02265D84(&v2->unk_A0[0]);
+        ov116_02265D84(&v2->unk_A0[1]);
+        ov116_02265D84(&v2->unk_00[0]);
+        ov116_02265D84(&v2->unk_00[1]);
+        sub_0200D3F4(v2->unk_00[1].unk_00, 0);
+        v1->unk_1C++;
+    case 1:
+        v3[0] = ov116_02265D8C(&v2->unk_A0[0], v2->unk_144, 0, 3);
+        v3[1] = ov116_02265E64(&v2->unk_A0[1], v2->unk_144, 0, 2);
+        v3[2] = ov116_02265F1C(&v2->unk_00[0], v2->unk_148, 1, 3);
+        v3[3] = 1;
+
+        if (v3[0] && v3[1] && v3[2] && v3[3]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+            ov116_02265D84(&v2->unk_A0[1]);
+            ov116_02265D84(&v2->unk_00[0]);
+            ov116_02265D84(&v2->unk_00[1]);
+            sub_0200D3F4(v2->unk_00[1].unk_00, 1);
+            v1->unk_1C++;
+        } else {
+            break;
+        }
+
+    case 2:
+        v3[0] = 1;
+        v3[1] = ov116_02265FD4(&v2->unk_A0[1], v2->unk_144, 0, 1);
+        v3[2] = ov116_02265D8C(&v2->unk_00[0], v2->unk_148, 1, 2);
+        v3[3] = ov116_02265F1C(&v2->unk_00[1], v2->unk_148, 1, 3);
+
+        if (v3[0] && v3[1] && v3[2] && v3[3]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+            ov116_02265D84(&v2->unk_A0[1]);
+            ov116_02265D84(&v2->unk_00[0]);
+            ov116_02265D84(&v2->unk_00[1]);
+            v1->unk_1C++;
+        } else {
+            break;
+        }
+
+    case 3:
+        v3[0] = ov116_02265E64(&v2->unk_A0[0], v2->unk_144, 0, 2);
+        v3[1] = ov116_02265D8C(&v2->unk_A0[1], v2->unk_144, 0, 3);
+        v3[2] = 1;
+        v3[3] = ov116_02265D8C(&v2->unk_00[1], v2->unk_148, 1, 2);
+
+        if (v3[0] && v3[1] && v3[2] && v3[3]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+            ov116_02265D84(&v2->unk_A0[1]);
+            ov116_02265D84(&v2->unk_00[0]);
+            ov116_02265D84(&v2->unk_00[1]);
+
+            v1->unk_1C++;
+        } else {
+            break;
+        }
+
+    case 4:
+        v3[0] = ov116_02265FD4(&v2->unk_A0[0], v2->unk_144, 0, 1);
+        v3[1] = 1;
+        v3[2] = 1;
+        v3[3] = ov116_02265D8C(&v2->unk_00[1], v2->unk_148, 1, 2);
+
+        if (v3[0] && v3[1] && v3[2] && v3[3]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+            ov116_02265D84(&v2->unk_A0[1]);
+            ov116_02265D84(&v2->unk_00[0]);
+            ov116_02265D84(&v2->unk_00[1]);
+
+            if (v2->unk_14C != 1) {
+                v2->unk_14C++;
+                v1->unk_1C = 1;
+            } else {
+                v2->unk_14C = 0;
+                v1->unk_1C++;
+            }
+        }
+        break;
+    default:
+        sub_0200DA58(param0);
+        break;
+    }
+}
+
+static void ov116_0226644C (UnkStruct_0201CD38 * param0, void * param1)
+{
+    int v0;
+    UnkStruct_ov116_022660A8 * v1 = param1;
+    UnkStruct_ov116_02265AA4 * v2 = &v1->unk_00;
+    BOOL v3[4] = {1, 1, 1, 1};
+    fx32 v4, v5;
+    fx32 v6, v7;
+
+    if ((sub_0200F2AC() == 0) || (v1->unk_30->unk_2C.unk_00 == 1)) {
+        sub_0200DA58(param0);
+        return;
+    }
+
+    switch (v1->unk_1C) {
+    case 0:
+        for (v0 = 0; v0 < v2->unk_140; v0++) {
+            v2->unk_00[v0].unk_08 = 0;
+            v2->unk_00[v0].unk_14 = 128;
+            v2->unk_00[v0].unk_16 = (128 + 32);
+            v2->unk_00[v0].unk_18 = 64;
+            v2->unk_00[v0].unk_1C = 24;
+
+            sub_0200D3F4(v2->unk_00[v0].unk_00, 1);
+
+            v2->unk_A0[v0].unk_08 = 0;
+            v2->unk_A0[v0].unk_14 = 128;
+            v2->unk_A0[v0].unk_16 = (128 + 32);
+            v2->unk_A0[v0].unk_18 = 64;
+            v2->unk_A0[v0].unk_1C = 24;
+
+            sub_0200D3F4(v2->unk_A0[v0].unk_00, 1);
+
+            sub_0200D67C(v2->unk_00[v0].unk_00, &v6, &v7, ((192 + 64) << FX32_SHIFT));
+            v4 = (v2->unk_00[v0].unk_14 << FX32_SHIFT) + (sub_0201D250(v2->unk_00[v0].unk_08) * v2->unk_00[v0].unk_18);
+            v5 = (v2->unk_00[v0].unk_16 << FX32_SHIFT) + (sub_0201D264(v2->unk_00[v0].unk_08) * v2->unk_00[v0].unk_1C);
+            sub_0200D650(v2->unk_00[v0].unk_00, v4, v5, ((192 + 64) << FX32_SHIFT));
+
+            sub_0200D67C(v2->unk_A0[v0].unk_00, &v6, &v7, ((192 + 64) << FX32_SHIFT));
+            v4 = (v2->unk_A0[v0].unk_14 << FX32_SHIFT) + (sub_0201D250(v2->unk_A0[v0].unk_08) * v2->unk_A0[v0].unk_18);
+            v5 = (v2->unk_A0[v0].unk_16 << FX32_SHIFT) - (sub_0201D264(v2->unk_A0[v0].unk_08) * v2->unk_A0[v0].unk_1C);
+            sub_0200D650(v2->unk_A0[v0].unk_00, v4, v5, ((192 + 64) << FX32_SHIFT));
+        }
+
+        ov116_02265D84(&v2->unk_A0[0]);
+        ov116_02265D84(&v2->unk_A0[1]);
+        ov116_02265D84(&v2->unk_00[0]);
+        ov116_02265D84(&v2->unk_00[1]);
+        sub_0200D3F4(v2->unk_00[1].unk_00, 0);
+        v1->unk_1C++;
+    case 1:
+        v3[0] = ov116_02265D8C(&v2->unk_A0[0], v2->unk_144, 0, 3);
+        v3[1] = ov116_02265E64(&v2->unk_A0[1], v2->unk_144, 0, 2);
+        v3[2] = ov116_02265F1C(&v2->unk_00[0], v2->unk_148, 1, 3);
+        v3[3] = 1;
+        if (v3[0] && v3[1] && v3[2] && v3[3]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+            ov116_02265D84(&v2->unk_A0[1]);
+            ov116_02265D84(&v2->unk_00[0]);
+            ov116_02265D84(&v2->unk_00[1]);
+            sub_0200D3F4(v2->unk_00[1].unk_00, 1);
+            v1->unk_1C++;
+        } else {
+            break;
+        }
+    case 2:
+        v3[0] = 1;
+        v3[1] = ov116_02265FD4(&v2->unk_A0[1], v2->unk_144, 0, 2);
+        v3[2] = ov116_02265D8C(&v2->unk_00[0], v2->unk_148, 1, 2);
+        v3[3] = ov116_02265F1C(&v2->unk_00[1], v2->unk_148, 1, 3);
+        if (v3[0] && v3[1] && v3[2] && v3[3]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+            ov116_02265D84(&v2->unk_A0[1]);
+            ov116_02265D84(&v2->unk_00[0]);
+            ov116_02265D84(&v2->unk_00[1]);
+            v1->unk_1C++;
+        } else {
+            break;
+        }
+    case 3:
+        v3[0] = ov116_02265E64(&v2->unk_A0[0], v2->unk_144, 0, 2);
+        v3[1] = ov116_02265D8C(&v2->unk_A0[1], v2->unk_144, 0, 3);
+        v3[2] = 1;
+        v3[3] = ov116_02265D8C(&v2->unk_00[1], v2->unk_148, 1, 2);
+        if (v3[0] && v3[1] && v3[2] && v3[3]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+            ov116_02265D84(&v2->unk_A0[1]);
+            ov116_02265D84(&v2->unk_00[0]);
+            ov116_02265D84(&v2->unk_00[1]);
+            v1->unk_1C++;
+        } else {
+            break;
+        }
+    case 4:
+        v3[0] = ov116_02265FD4(&v2->unk_A0[0], v2->unk_144, 0, 2);
+        v3[1] = 1;
+        v3[2] = 1;
+        v3[3] = ov116_02265D8C(&v2->unk_00[1], v2->unk_148, 1, 2);
+        if (v3[0] && v3[1] && v3[2] && v3[3]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+            ov116_02265D84(&v2->unk_A0[1]);
+            ov116_02265D84(&v2->unk_00[0]);
+            ov116_02265D84(&v2->unk_00[1]);
+            if (v2->unk_14C != 1) {
+                v2->unk_14C++;
+                v1->unk_1C = 1;
+            } else {
+                v2->unk_14C = 0;
+                v1->unk_1C++;
+            }
+        }
+        break;
+    default:
+        sub_0200DA58(param0);
+        break;
+    }
+}
+
+static void ov116_022667F4 (UnkStruct_0201CD38 * param0, void * param1)
+{
+    int v0;
+    UnkStruct_ov116_022660A8 * v1 = param1;
+    UnkStruct_ov116_02265AA4 * v2 = &v1->unk_00;
+    BOOL v3[4] = {1, 1, 1, 1};
+    fx32 v4, v5;
+    fx32 v6, v7;
+
+    if ((sub_0200F2AC() == 0) || (v1->unk_30->unk_2C.unk_00 == 1)) {
+        sub_0200DA58(param0);
+        return;
+    }
+
+    switch (v1->unk_1C) {
+    case 0:
+        for (v0 = 0; v0 < v2->unk_140; v0++) {
+            v2->unk_00[v0].unk_08 = 0;
+            v2->unk_00[v0].unk_14 = 128;
+            v2->unk_00[v0].unk_16 = (128 + 32);
+            v2->unk_00[v0].unk_18 = 64;
+            v2->unk_00[v0].unk_1C = 24;
+
+            sub_0200D3F4(v2->unk_00[v0].unk_00, 1);
+
+            v2->unk_A0[v0].unk_08 = 0;
+            v2->unk_A0[v0].unk_14 = 128;
+            v2->unk_A0[v0].unk_16 = (128 + 32);
+            v2->unk_A0[v0].unk_18 = 64;
+            v2->unk_A0[v0].unk_1C = 24;
+
+            sub_0200D3F4(v2->unk_A0[v0].unk_00, 1);
+
+            sub_0200D67C(v2->unk_00[v0].unk_00, &v6, &v7, ((192 + 64) << FX32_SHIFT));
+            v4 = (v2->unk_00[v0].unk_14 << FX32_SHIFT) + (sub_0201D250(v2->unk_00[v0].unk_08) * v2->unk_00[v0].unk_18);
+            v5 = (v2->unk_00[v0].unk_16 << FX32_SHIFT) + (sub_0201D264(v2->unk_00[v0].unk_08) * v2->unk_00[v0].unk_1C);
+            sub_0200D650(v2->unk_00[v0].unk_00, v4, v5, ((192 + 64) << FX32_SHIFT));
+
+            sub_0200D67C(v2->unk_A0[v0].unk_00, &v6, &v7, ((192 + 64) << FX32_SHIFT));
+            v4 = (v2->unk_A0[v0].unk_14 << FX32_SHIFT) + (sub_0201D250(v2->unk_A0[v0].unk_08) * v2->unk_A0[v0].unk_18);
+            v5 = (v2->unk_A0[v0].unk_16 << FX32_SHIFT) - (sub_0201D264(v2->unk_A0[v0].unk_08) * v2->unk_A0[v0].unk_1C);
+            sub_0200D650(v2->unk_A0[v0].unk_00, v4, v5, ((192 + 64) << FX32_SHIFT));
+        }
+
+        ov116_02265D84(&v2->unk_A0[0]);
+        ov116_02265D84(&v2->unk_A0[1]);
+        ov116_02265D84(&v2->unk_00[0]);
+        ov116_02265D84(&v2->unk_00[1]);
+        sub_0200D3F4(v2->unk_00[1].unk_00, 0);
+        v1->unk_1C++;
+
+    case 1:
+        v3[0] = ov116_02265D8C(&v2->unk_A0[0], v2->unk_144, 0, 3);
+        v3[1] = ov116_02265E64(&v2->unk_A0[1], v2->unk_144, 0, 2);
+        v3[2] = ov116_02265F1C(&v2->unk_00[0], v2->unk_148, 1, 3);
+        v3[3] = 1;
+
+        if (v3[0] && v3[1] && v3[2] && v3[3]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+            ov116_02265D84(&v2->unk_A0[1]);
+            ov116_02265D84(&v2->unk_00[0]);
+            ov116_02265D84(&v2->unk_00[1]);
+            sub_0200D3F4(v2->unk_00[1].unk_00, 1);
+            v1->unk_1C++;
+        } else {
+            break;
+        }
+
+    case 2:
+        v3[0] = 1;
+        v3[1] = ov116_02265FD4(&v2->unk_A0[1], v2->unk_144, 0, 1);
+        v3[2] = ov116_02265D8C(&v2->unk_00[0], v2->unk_148, 1, 2);
+        v3[3] = ov116_02265F1C(&v2->unk_00[1], v2->unk_148, 1, 3);
+
+        if (v3[0] && v3[1] && v3[2] && v3[3]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+            ov116_02265D84(&v2->unk_A0[1]);
+            ov116_02265D84(&v2->unk_00[0]);
+            ov116_02265D84(&v2->unk_00[1]);
+
+            v1->unk_1C++;
+        } else {
+            break;
+        }
+
+    case 3:
+        v3[1] = ov116_02265FD4(&v2->unk_A0[1], v2->unk_144, 1, 1);
+        if (v3[1]) {
+            ov116_02265D84(&v2->unk_A0[1]);
+            v1->unk_1C++;
+        } else {
+            break;
+        }
+
+    case 4:
+        v3[0] = ov116_02265E64(&v2->unk_A0[0], v2->unk_144, 0, 2);
+        v3[1] = ov116_02265D8C(&v2->unk_A0[1], v2->unk_144, 0, 3);
+        v3[2] = 1;
+        v3[3] = ov116_02265D8C(&v2->unk_00[1], v2->unk_148, 1, 2);
+
+        if (v3[0] && v3[1] && v3[2] && v3[3]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+            ov116_02265D84(&v2->unk_A0[1]);
+            ov116_02265D84(&v2->unk_00[0]);
+            ov116_02265D84(&v2->unk_00[1]);
+            v1->unk_1C++;
+        } else {
+            break;
+        }
+
+    case 5:
+        v3[0] = ov116_02265FD4(&v2->unk_A0[0], v2->unk_144, 0, 1);
+        v3[1] = 1;
+        v3[2] = 1;
+        v3[3] = ov116_02265D8C(&v2->unk_00[1], v2->unk_148, 1, 2);
+
+        if (v3[0] && v3[1] && v3[2] && v3[3]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+            ov116_02265D84(&v2->unk_A0[1]);
+            ov116_02265D84(&v2->unk_00[0]);
+            ov116_02265D84(&v2->unk_00[1]);
+            v1->unk_1C++;
+        } else {
+            break;
+        }
+
+    case 6:
+        v3[0] = ov116_02265FD4(&v2->unk_A0[0], v2->unk_144, 1, 1);
+
+        if (v3[0]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+            if (v2->unk_14C != 1) {
+                v2->unk_14C++;
+                v1->unk_1C = 1;
+            } else {
+                v2->unk_14C = 0;
+                v1->unk_1C++;
+            }
+        }
+        break;
+    default:
+        sub_0200DA58(param0);
+        break;
+    }
+}
+
+static void ov116_02266BF0 (UnkStruct_0201CD38 * param0, void * param1)
+{
+    int v0;
+    UnkStruct_ov116_022660A8 * v1 = param1;
+    UnkStruct_ov116_02265AA4 * v2 = &v1->unk_00;
+    BOOL v3[4] = {1, 1, 1, 1};
+    fx32 v4, v5;
+    fx32 v6, v7;
+
+    if ((sub_0200F2AC() == 0) || (v1->unk_30->unk_2C.unk_00 == 1)) {
+        sub_0200DA58(param0);
+        return;
+    }
+
+    switch (v1->unk_1C) {
+    case 0:
+        for (v0 = 0; v0 < v2->unk_140; v0++) {
+            v2->unk_00[v0].unk_08 = 0;
+            v2->unk_00[v0].unk_14 = 128;
+            v2->unk_00[v0].unk_16 = (128 + 32);
+            v2->unk_00[v0].unk_18 = 64;
+            v2->unk_00[v0].unk_1C = 24;
+
+            sub_0200D3F4(v2->unk_00[v0].unk_00, 1);
+
+            v2->unk_A0[v0].unk_08 = 0;
+            v2->unk_A0[v0].unk_14 = 128;
+            v2->unk_A0[v0].unk_16 = (128 + 32);
+            v2->unk_A0[v0].unk_18 = 64;
+            v2->unk_A0[v0].unk_1C = 24;
+
+            sub_0200D3F4(v2->unk_A0[v0].unk_00, 1);
+
+            sub_0200D67C(v2->unk_00[v0].unk_00, &v6, &v7, ((192 + 64) << FX32_SHIFT));
+            v4 = (v2->unk_00[v0].unk_14 << FX32_SHIFT) + (sub_0201D250(v2->unk_00[v0].unk_08) * v2->unk_00[v0].unk_18);
+            v5 = (v2->unk_00[v0].unk_16 << FX32_SHIFT) + (sub_0201D264(v2->unk_00[v0].unk_08) * v2->unk_00[v0].unk_1C);
+            sub_0200D650(v2->unk_00[v0].unk_00, v4, v5, ((192 + 64) << FX32_SHIFT));
+
+            sub_0200D67C(v2->unk_A0[v0].unk_00, &v6, &v7, ((192 + 64) << FX32_SHIFT));
+            v4 = (v2->unk_A0[v0].unk_14 << FX32_SHIFT) + (sub_0201D250(v2->unk_A0[v0].unk_08) * v2->unk_A0[v0].unk_18);
+            v5 = (v2->unk_A0[v0].unk_16 << FX32_SHIFT) - (sub_0201D264(v2->unk_A0[v0].unk_08) * v2->unk_A0[v0].unk_1C);
+            sub_0200D650(v2->unk_A0[v0].unk_00, v4, v5, ((192 + 64) << FX32_SHIFT));
+        }
+
+        ov116_02265D84(&v2->unk_A0[0]);
+        ov116_02265D84(&v2->unk_A0[1]);
+        ov116_02265D84(&v2->unk_00[0]);
+        ov116_02265D84(&v2->unk_00[1]);
+        sub_0200D3F4(v2->unk_00[1].unk_00, 0);
+        v1->unk_1C++;
+    case 1:
+        v3[0] = ov116_02265D8C(&v2->unk_A0[0], v2->unk_144, 0, 3);
+        v3[1] = ov116_02265E64(&v2->unk_A0[1], v2->unk_144, 0, 2);
+        v3[2] = ov116_02265F1C(&v2->unk_00[0], v2->unk_148, 1, 3);
+        v3[3] = 1;
+
+        if (v3[0] && v3[1] && v3[2] && v3[3]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+            ov116_02265D84(&v2->unk_A0[1]);
+            ov116_02265D84(&v2->unk_00[0]);
+            ov116_02265D84(&v2->unk_00[1]);
+            sub_0200D3F4(v2->unk_00[1].unk_00, 1);
+            v1->unk_1C++;
+        } else {
+            break;
+        }
+
+    case 2:
+        v3[0] = 1;
+        v3[1] = ov116_02265FD4(&v2->unk_A0[1], v2->unk_144, 0, 1);
+        v3[2] = ov116_02265D8C(&v2->unk_00[0], v2->unk_148, 1, 2);
+        v3[3] = ov116_02265F1C(&v2->unk_00[1], v2->unk_148, 1, 3);
+
+        if (v3[0] && v3[1] && v3[2] && v3[3]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+            ov116_02265D84(&v2->unk_A0[1]);
+            ov116_02265D84(&v2->unk_00[0]);
+            ov116_02265D84(&v2->unk_00[1]);
+
+            v1->unk_1C++;
+        } else {
+            break;
+        }
+
+    case 3:
+        v3[1] = ov116_02265FD4(&v2->unk_A0[1], v2->unk_144, 1, 1);
+
+        if (v3[1]) {
+            ov116_02265D84(&v2->unk_A0[1]);
+            v1->unk_1C++;
+        } else {
+            break;
+        }
+
+    case 4:
+        v3[0] = ov116_02265E64(&v2->unk_A0[0], v2->unk_144, 0, 2);
+        v3[1] = ov116_02265D8C(&v2->unk_A0[1], v2->unk_144, 0, 3);
+        v3[2] = 1;
+        v3[3] = ov116_02265D8C(&v2->unk_00[1], v2->unk_148, 1, 2);
+
+        if (v3[0] && v3[1] && v3[2] && v3[3]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+            ov116_02265D84(&v2->unk_A0[1]);
+            ov116_02265D84(&v2->unk_00[0]);
+            ov116_02265D84(&v2->unk_00[1]);
+
+            v1->unk_1C++;
+        } else {
+            break;
+        }
+
+    case 5:
+        v3[0] = ov116_02265FD4(&v2->unk_A0[0], v2->unk_144, 0, 1);
+        v3[1] = 1;
+        v3[2] = 1;
+        v3[3] = ov116_02265D8C(&v2->unk_00[1], v2->unk_148, 1, 2);
+
+        if (v3[0] && v3[1] && v3[2] && v3[3]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+            ov116_02265D84(&v2->unk_A0[1]);
+            ov116_02265D84(&v2->unk_00[0]);
+            ov116_02265D84(&v2->unk_00[1]);
+
+            v1->unk_1C++;
+        } else {
+            break;
+        }
+
+    case 6:
+        v3[0] = ov116_02265FD4(&v2->unk_A0[0], v2->unk_144, 1, 1);
+
+        if (v3[0]) {
+            ov116_02265D84(&v2->unk_A0[0]);
+
+            if (v2->unk_14C != 8) {
+                v2->unk_14C++;
+                v1->unk_1C = 1;
+            } else {
+                v2->unk_14C = 0;
+                v1->unk_1C++;
+            }
+        }
+
+        break;
+    default:
+        sub_0200DA58(param0);
+        break;
+    }
+}
diff --git a/src/overlay116/ov116_02266FEC.c b/src/overlay116/ov116_02266FEC.c
new file mode 100644
index 0000000000..fa1c04c071
--- /dev/null
+++ b/src/overlay116/ov116_02266FEC.c
@@ -0,0 +1,107 @@
+#include <nitro.h>
+#include <string.h>
+
+#include "overlay116/union_ov116_02266FEC.h"
+#include "overlay116/union_ov116_022671EC.h"
+
+#include "overlay116/ov116_02266FEC.h"
+
+void ov116_02266FEC (UnkUnion_ov116_02266FEC * param0)
+{
+    param0->val1_00 = 1.0;
+    param0->val1_04 = 0;
+    param0->val1_08 = 0;
+    param0->val1_0C = 0;
+}
+
+void ov116_02266FFC (UnkUnion_ov116_02266FEC * param0, UnkUnion_ov116_02266FEC * param1)
+{
+    *param0 = *param1;
+}
+
+void ov116_0226700C (UnkUnion_ov116_02266FEC * param0, const UnkUnion_ov116_02266FEC * param1, const UnkUnion_ov116_02266FEC * param2)
+{
+    param0->val1_00 = (param1->val1_00 * param2->val1_00) - (param1->val1_04 * param2->val1_04) - (param1->val1_08 * param2->val1_08) - (param1->val1_0C * param2->val1_0C);
+    param0->val1_04 = (param1->val1_00 * param2->val1_04) + (param1->val1_04 * param2->val1_00) + (param1->val1_08 * param2->val1_0C) - (param1->val1_0C * param2->val1_08);
+    param0->val1_08 = (param1->val1_00 * param2->val1_08) - (param1->val1_04 * param2->val1_0C) + (param1->val1_08 * param2->val1_00) + (param1->val1_0C * param2->val1_04);
+    param0->val1_0C = (param1->val1_00 * param2->val1_0C) + (param1->val1_04 * param2->val1_08) - (param1->val1_08 * param2->val1_04) + (param1->val1_0C * param2->val1_00);
+}
+
+f32 ov116_0226711C (const UnkUnion_ov116_02266FEC * param0)
+{
+    return (param0->val1_00 * param0->val1_00) + (param0->val1_04 + param0->val1_04) + (param0->val1_08 + param0->val1_08) + (param0->val1_0C + param0->val1_0C);
+}
+
+f32 ov116_02267160 (const UnkUnion_ov116_02266FEC * param0)
+{
+    fx32 v0;
+
+    v0 = FX_F32_TO_FX32(ov116_0226711C(param0));
+    return FX_FX32_TO_F32(FX_Sqrt(v0));
+}
+
+void ov116_022671B8 (UnkUnion_ov116_02266FEC * param0, const UnkUnion_ov116_02266FEC * param1, f32 param2)
+{
+    param0->val1_00 = param1->val1_00 / param2;
+    param0->val1_04 = param1->val1_04 / param2;
+    param0->val1_08 = param1->val1_08 / param2;
+    param0->val1_0C = param1->val1_0C / param2;
+}
+
+void ov116_022671EC (UnkUnion_ov116_022671EC * param0, const UnkUnion_ov116_02266FEC * param1)
+{
+    f32 v0 = param1->val1_04 * param1->val1_04 * 2.0;
+    f32 v1 = param1->val1_08 * param1->val1_08 * 2.0;
+    f32 v2 = param1->val1_0C * param1->val1_0C * 2.0;
+    f32 v3 = param1->val1_04 * param1->val1_08 * 2.0;
+    f32 v4 = param1->val1_08 * param1->val1_0C * 2.0;
+    f32 v5 = param1->val1_0C * param1->val1_04 * 2.0;
+    f32 v6 = param1->val1_04 * param1->val1_00 * 2.0;
+    f32 v7 = param1->val1_08 * param1->val1_00 * 2.0;
+    f32 v8 = param1->val1_0C * param1->val1_00 * 2.0;
+
+    param0->val1_00 = 1.0 - v1 - v2;
+    param0->val1_04 = v3 + v8;
+    param0->val1_08 = v5 - v7;
+    param0->val1_0C = 0.0;
+    param0->val1_10 = v3 - v8;
+    param0->val1_14 = 1.0 - v2 - v0;
+    param0->val1_18 = v4 + v6;
+    param0->val1_1C = 0.0;
+    param0->val1_20 = v5 + v7;
+    param0->val1_24 = v4 - v6;
+    param0->val1_28 = 1.0 - v0 - v1;
+    param0->val1_2C = 0.0;
+    param0->val1_30 = 0.0;
+    param0->val1_34 = 0.0;
+    param0->val1_38 = 0.0;
+    param0->val1_3C = 1.0;
+}
+
+void ov116_022673FC (const UnkUnion_ov116_022671EC * param0, MtxFx44 * param1)
+{
+    param1->_00 = FX32_CONST(param0->val1_00);
+    param1->_01 = FX32_CONST(param0->val1_04);
+    param1->_02 = FX32_CONST(param0->val1_08);
+    param1->_03 = FX32_CONST(param0->val1_0C);
+    param1->_10 = FX32_CONST(param0->val1_10);
+    param1->_11 = FX32_CONST(param0->val1_14);
+    param1->_12 = FX32_CONST(param0->val1_18);
+    param1->_13 = FX32_CONST(param0->val1_1C);
+    param1->_20 = FX32_CONST(param0->val1_20);
+    param1->_21 = FX32_CONST(param0->val1_24);
+    param1->_22 = FX32_CONST(param0->val1_28);
+    param1->_23 = FX32_CONST(param0->val1_2C);
+    param1->_30 = FX32_CONST(param0->val1_30);
+    param1->_31 = FX32_CONST(param0->val1_34);
+    param1->_32 = FX32_CONST(param0->val1_38);
+    param1->_33 = FX32_CONST(param0->val1_3C);
+}
+
+void ov116_02267728 (const UnkUnion_ov116_022671EC * param0, MtxFx43 * param1)
+{
+    MtxFx44 v0;
+
+    ov116_022673FC(param0, &v0);
+    MTX_Copy44To43(&v0, param1);
+}