diff --git a/lib/include/ansi_params.h b/lib/include/ansi_params.h
new file mode 100644
index 0000000000..45f5522e4d
--- /dev/null
+++ b/lib/include/ansi_params.h
@@ -0,0 +1,16 @@
+#ifndef _MSL_MSLEXTERN_H
+#define _MSL_MSLEXTERN_H
+
+#ifdef __cplusplus
+#define _MSL_BEGIN_NAMESPACE_STD  namespace std {
+#define _MSL_BEGIN_EXTERN_C       extern "C" {
+#define _MSL_END_EXTERN_C         }
+#define _MSL_END_NAMESPACE_STD    }
+#else
+#define _MSL_BEGIN_NAMESPACE_STD
+#define _MSL_BEGIN_EXTERN_C
+#define _MSL_END_EXTERN_C
+#define _MSL_END_NAMESPACE_STD
+#endif //__cplusplus
+
+#endif //_MSL_MSLEXTERN_H
diff --git a/lib/include/assert.h b/lib/include/assert.h
new file mode 100644
index 0000000000..a96a4d8ac5
--- /dev/null
+++ b/lib/include/assert.h
@@ -0,0 +1,17 @@
+#ifndef _MSL_ASSERT_H_
+#define _MSL_ASSERT_H_
+
+#define assert(expr)                ((expr) ? (void)0 : __msl_assertion_failed(#expr, __FILE__, __func__, __LINE__))
+
+// For matching
+#define assert_ex(expr, file, line) ((expr) ? (void)0 : __msl_assertion_failed(#expr, file, __func__, line))
+
+// Assertion (%s) failed in "%s", function "%s", line %d
+extern void __msl_assertion_failed(
+    const char *expr,
+    const char *file,
+    const char *func,
+    int line
+);
+
+#endif //_MSL_ASSERT_H_
diff --git a/lib/include/cw.h b/lib/include/cw.h
new file mode 100644
index 0000000000..b39e2e3653
--- /dev/null
+++ b/lib/include/cw.h
@@ -0,0 +1,6 @@
+#ifndef GUARD_CW_H
+#define GUARD_CW_H
+
+#include <cw/function_target.h>
+
+#endif //GUARD_CW_H
diff --git a/lib/include/cw/function_target.h b/lib/include/cw/function_target.h
new file mode 100644
index 0000000000..a176094502
--- /dev/null
+++ b/lib/include/cw/function_target.h
@@ -0,0 +1,17 @@
+#ifndef GUARD_CW_FUNCTION_TARGET_H
+#define GUARD_CW_FUNCTION_TARGET_H
+
+#define ARM_FUNC _Pragma("thumb off")
+#define THUMB_FUNC _Pragma("thumb on")
+
+#define ENUMS_ALWAYS_INT_ON _Pragma("enumsalwaysint on")
+#define ENUMS_ALWAYS_INT_OFF _Pragma("enumsalwaysint off")
+#define ENUMS_ALWAYS_INT_RESET _Pragma("enumsalwaysint reset")
+
+#define ALIGN(num) __attribute__ ((aligned(num)))
+
+#ifdef __CLION_IDE__
+#define asm
+#endif //__CLION_IDE__
+
+#endif //GUARD_CW_FUNCTION_TARGET_H
diff --git a/lib/include/nitro.h b/lib/include/nitro.h
new file mode 100644
index 0000000000..1379eefc0f
--- /dev/null
+++ b/lib/include/nitro.h
@@ -0,0 +1,24 @@
+#ifndef NITRO_H_
+#define NITRO_H_
+
+#include <nitro/types.h>
+
+#include <nitro/mi.h>
+#include <nitro/fx.h>
+#include <nitro/math.h>
+#include <nitro/cp.h>
+#include <nitro/os.h>
+#include <nitro/fs.h>
+#include <nitro/std.h>
+#include <nitro/pxi.h>
+#include <nitro/card.h>
+#include <nitro/gx.h>
+#include <nitro/ctrdg.h>
+#include <nitro/mb.h>
+#include <nitro/spi.h>
+#include <nitro/snd.h>
+#include <nitro/pad.h>
+#include <nitro/rtc.h>
+#include <nitro/exi.h>
+
+#endif //NITRO_H_
diff --git a/lib/include/nitro/card.h b/lib/include/nitro/card.h
new file mode 100644
index 0000000000..3914b68d1b
--- /dev/null
+++ b/lib/include/nitro/card.h
@@ -0,0 +1,9 @@
+#ifndef NITRO_CARD_H_
+#define NITRO_CARD_H_
+
+#include <nitro/card/pullOut.h>
+#include <nitro/card/backup.h>
+
+void CARD_Init(void);
+
+#endif //NITRO_CARD_H_
diff --git a/lib/include/nitro/card/backup.h b/lib/include/nitro/card/backup.h
new file mode 100644
index 0000000000..8280b2e7b5
--- /dev/null
+++ b/lib/include/nitro/card/backup.h
@@ -0,0 +1,47 @@
+#ifndef NITRO_CARD_BACKUP_BACKUP_H_
+#define NITRO_CARD_BACKUP_BACKUP_H_
+
+BOOL CARD_TryWaitBackupAsync(void);
+void CARD_CancelBackupAsync(void);
+
+BOOL CARDi_RequestStreamCommand(u32 src, u32 dst, u32 len, MIDmaCallback callback, void *arg, BOOL is_async, CARDRequest req_type, int req_retry, CARDRequestMode req_mode);
+
+static inline BOOL CARDi_ReadBackup(u32 src, void *dst, u32 len, MIDmaCallback callback, void *arg, BOOL is_async) {
+    return CARDi_RequestStreamCommand((u32)src, (u32)dst, len, callback, arg, is_async, CARD_REQ_READ_BACKUP, 1, CARD_REQUEST_MODE_RECV);
+}
+
+static inline void CARD_ReadBackupAsync(u32 src, void *dst, u32 len, MIDmaCallback callback, void *arg) {
+    CARDi_ReadBackup(src, dst, len, callback, arg, TRUE);
+}
+
+BOOL CARD_WaitBackupAsync(void);
+
+static inline BOOL CARD_ReadBackup(u32 src, void *dst, u32 len) {
+    return CARDi_ReadBackup(src, dst, len, NULL, NULL, FALSE);
+}
+
+static inline BOOL CARDi_WriteBackup(u32 dst, const void *src, u32 len, MIDmaCallback callback, void *arg, BOOL is_async) {
+    return CARDi_RequestStreamCommand((u32)src, (u32)dst, len, callback, arg, is_async, CARD_REQ_WRITE_BACKUP, CARD_RETRY_COUNT_MAX, CARD_REQUEST_MODE_SEND);
+}
+
+static inline void CARD_WriteBackupAsync(u32 dst, const void *src, u32 len, MIDmaCallback callback, void *arg) {
+    CARDi_WriteBackup(dst, src, len, callback, arg, TRUE);
+}
+
+static inline BOOL CARD_WriteBackup(u32 dst, const void *src, u32 len) {
+    return CARDi_WriteBackup(dst, src, len, NULL, NULL, FALSE);
+}
+
+static inline BOOL CARDi_WriteAndVerifyBackup(u32 dst, const void *src, u32 len, MIDmaCallback callback, void *arg, BOOL is_async) {
+    return CARDi_RequestStreamCommand((u32)src, (u32)dst, len, callback, arg, is_async, CARD_REQ_WRITE_BACKUP, CARD_RETRY_COUNT_MAX, CARD_REQUEST_MODE_SEND_VERIFY);
+}
+
+static inline void CARD_WriteAndVerifyBackupAsync(u32 dst, const void *src, u32 len, MIDmaCallback callback, void *arg) {
+    CARDi_WriteAndVerifyBackup(dst, src, len, callback, arg, TRUE);
+}
+
+static inline BOOL CARD_WriteAndVerifyBackup(u32 dst, const void *src, u32 len) {
+    return CARDi_WriteAndVerifyBackup(dst, src, len, NULL, NULL, FALSE);
+}
+
+#endif //NITRO_CARD_BACKUP_BACKUP_H_
diff --git a/lib/include/nitro/card/common.h b/lib/include/nitro/card/common.h
new file mode 100644
index 0000000000..a22dfddb14
--- /dev/null
+++ b/lib/include/nitro/card/common.h
@@ -0,0 +1,239 @@
+#ifndef NITRO_CARD_COMMON_H_
+#define NITRO_CARD_COMMON_H_
+
+#include <cw/function_target.h>
+#include <nitro/os/thread.h>
+#include <nitro/os/system.h>
+#include <nitro/mi/dma.h>
+#include <nitro/pxi/fifo.h>
+
+#define CARD_PXI_COMMAND_MASK           0x3f
+#define CARD_PXI_COMMAND_PULLED_OUT     0x0011
+#define CARD_PXI_COMMAND_TERMINATE      0x0001
+
+#define	CARD_THREAD_PRIORITY_DEFAULT	4
+
+#define	CARD_BACKUP_TYPE_DEVICE_SHIFT	0
+#define	CARD_BACKUP_TYPE_DEVICE_MASK	0xFF
+#define	CARD_BACKUP_TYPE_DEVICE_EEPROM	1
+#define	CARD_BACKUP_TYPE_DEVICE_FLASH	2
+#define	CARD_BACKUP_TYPE_DEVICE_FRAM	3
+#define	CARD_BACKUP_TYPE_SIZEBIT_SHIFT	8
+#define	CARD_BACKUP_TYPE_SIZEBIT_MASK	0xFF
+#define	CARD_BACKUP_TYPE_VENDER_SHIFT	16
+#define	CARD_BACKUP_TYPE_DEFINE(type, size, vender)	\
+	(((CARD_BACKUP_TYPE_DEVICE_ ## type) << CARD_BACKUP_TYPE_DEVICE_SHIFT) |	\
+	((size) << CARD_BACKUP_TYPE_SIZEBIT_SHIFT) |	\
+	((vender) << CARD_BACKUP_TYPE_VENDER_SHIFT))
+
+#define ALIGN_MASK(a)            ((a) - 1)
+#define CARD_ALIGN_HI_BIT(n)     (((u32)(n)) & ~ALIGN_MASK(CARD_ROM_PAGE_SIZE))
+#define CARD_ALIGN_LO_BIT(n)     (((u32)(n)) & ALIGN_MASK(CARD_ROM_PAGE_SIZE))
+
+#define CARD_BACKUP_CAPS_AVAILABLE      (u32)(CARD_BACKUP_CAPS_READ - 1)
+#define CARD_BACKUP_CAPS_READ           (u32)(1 << CARD_REQ_READ_BACKUP)
+#define CARD_BACKUP_CAPS_WRITE          (u32)(1 << CARD_REQ_WRITE_BACKUP)
+#define CARD_BACKUP_CAPS_PROGRAM        (u32)(1 << CARD_REQ_PROGRAM_BACKUP)
+#define CARD_BACKUP_CAPS_VERIFY         (u32)(1 << CARD_REQ_VERIFY_BACKUP)
+#define CARD_BACKUP_CAPS_ERASE_PAGE     (u32)(1 << CARD_REQ_ERASE_PAGE_BACKUP)
+#define CARD_BACKUP_CAPS_ERASE_SECTOR   (u32)(1 << CARD_REQ_ERASE_SECTOR_BACKUP)
+#define CARD_BACKUP_CAPS_ERASE_CHIP     (u32)(1 << CARD_REQ_ERASE_CHIP_BACKUP)
+
+typedef enum
+{
+    CARD_BACKUP_TYPE_EEPROM_4KBITS = CARD_BACKUP_TYPE_DEFINE(EEPROM, 9, 0),
+    CARD_BACKUP_TYPE_EEPROM_64KBITS = CARD_BACKUP_TYPE_DEFINE(EEPROM, 13, 0),
+    CARD_BACKUP_TYPE_EEPROM_512KBITS = CARD_BACKUP_TYPE_DEFINE(EEPROM, 16, 0),
+    CARD_BACKUP_TYPE_FLASH_2MBITS = CARD_BACKUP_TYPE_DEFINE(FLASH, 18, 0),
+    CARD_BACKUP_TYPE_FLASH_4MBITS = CARD_BACKUP_TYPE_DEFINE(FLASH, 19, 0),
+    CARD_BACKUP_TYPE_FLASH_8MBITS = CARD_BACKUP_TYPE_DEFINE(FLASH, 20, 0),
+    CARD_BACKUP_TYPE_FRAM_256KBITS = CARD_BACKUP_TYPE_DEFINE(FRAM, 15, 0),
+    CARD_BACKUP_TYPE_NOT_USE = 0
+} CARDBackupType;
+
+#define CARD_BACKUP_TYPE_FLASH_4MBITS_EX (CARDBackupType)(CARD_BACKUP_TYPE_FLASH_4MBITS | (255<<CARD_BACKUP_TYPE_VENDER_SHIFT))
+
+typedef enum
+{
+    CARD_RESULT_SUCCESS = 0,
+    CARD_RESULT_FAILURE,
+    CARD_RESULT_INVALID_PARAM,
+    CARD_RESULT_UNSUPPORTED,
+    CARD_RESULT_TIMEOUT,
+    CARD_RESULT_ERROR,
+    CARD_RESULT_NO_RESPONSE,
+    CARD_RESULT_CANCELED
+} CARDResult;
+
+typedef enum
+{
+    CARD_TARGET_NONE,
+    CARD_TARGET_ROM,
+    CARD_TARGET_BACKUP
+} CARDTargetMode;
+
+typedef enum
+{
+    CARD_REQ_INIT = 0,
+    CARD_REQ_ACK,
+    CARD_REQ_IDENTIFY,
+    CARD_REQ_READ_ID,
+    CARD_REQ_READ_ROM,
+    CARD_REQ_WRITE_ROM,
+    CARD_REQ_READ_BACKUP,
+    CARD_REQ_WRITE_BACKUP,
+    CARD_REQ_PROGRAM_BACKUP,
+    CARD_REQ_VERIFY_BACKUP,
+    CARD_REQ_ERASE_PAGE_BACKUP,
+    CARD_REQ_ERASE_SECTOR_BACKUP,
+    CARD_REQ_ERASE_CHIP_BACKUP,
+    CARD_REQ_MAX
+} CARDRequest;
+
+typedef enum
+{
+    CARD_REQUEST_MODE_RECV,
+    CARD_REQUEST_MODE_SEND,
+    CARD_REQUEST_MODE_SEND_VERIFY,
+    CARD_REQUEST_MODE_SPECIAL
+} CARDRequestMode;
+
+enum
+{
+    CARD_STAT_INIT = (1 << 0),
+    CARD_STAT_INIT_CMD = (1 << 1),
+    CARD_STAT_BUSY = (1 << 2),
+    CARD_STAT_TASK = (1 << 3),
+    CARD_STAT_RECV = (1 << 4),
+    CARD_STAT_REQ = (1 << 5),
+    CARD_STAT_CANCEL = (1 << 6)
+};
+
+typedef s32 CARDiOwner;
+
+typedef struct CARDiCommandArg
+{
+    CARDResult result;
+    CARDBackupType type;
+    u32 id;
+    u32 src;
+    u32 dest;
+    u32 len;
+
+    struct
+    {
+        u32 total_size;
+        u32 sect_size;
+        u32 page_size;
+        u32 addr_width;
+        u32 program_page;
+        u32 write_page;
+        u32 write_page_total;
+        u32 erase_chip;
+        u32 erase_chip_total;
+        u32 erase_sector;
+        u32 erase_sector_total;
+        u32 erase_page;
+        u8 initial_status;
+        u8 padding1[3];
+        u32 caps;
+        u8 padding2[16];
+    } spec;
+} CARDiCommandArg;
+
+typedef struct CARDiCommon
+{
+    CARDiCommandArg *cmd;
+    s32 command;
+
+    volatile CARDiOwner lock_owner;
+    volatile s32 lock_ref;
+    OSThreadQueue lock_queue[1];
+    CARDTargetMode lock_target;
+
+    u32 src;
+    u32 dst;
+    u32 len;
+    u32 dma;
+    CARDRequest req_type;
+    s32 req_retry;
+    CARDRequestMode req_mode;
+    MIDmaCallback callback;
+    void *callback_arg;
+    void (*task_func) (struct CARDiCommon *);
+
+    OSThread thread[1];
+    OSThread *cur_th;
+
+    u32 priority;
+    OSThreadQueue busy_q[1];
+
+    volatile u32 flag;
+
+    u8 dummy[8];
+
+    u8 backup_cache_page_buf[256] ALIGN(32);
+} CARDiCommon;
+
+static inline void CARDi_EndTask(CARDiCommon *p, BOOL is_own_task)
+{
+    const MIDmaCallback func = p->callback;
+    void *const arg = p->callback_arg;
+
+    {
+        OSIntrMode bak_psr = OS_DisableInterrupts();
+
+        p->flag &= ~(CARD_STAT_BUSY | CARD_STAT_TASK | CARD_STAT_CANCEL);
+        OS_WakeupThread(p->busy_q);
+        if ((p->flag & CARD_STAT_RECV) != 0)
+        {
+            OS_WakeupThreadDirect(p->thread);
+        }
+        (void)OS_RestoreInterrupts(bak_psr);
+    }
+
+    if (is_own_task && func)
+    {
+        (*func)(arg);
+    }
+}
+
+static inline void CARDi_WaitTask(CARDiCommon *p, MIDmaCallback callback, void *callback_arg)
+{
+    OSIntrMode bak_psr = OS_DisableInterrupts();
+    while ((p->flag & CARD_STAT_BUSY) != 0)
+    {
+        OS_SleepThread(p->busy_q);
+    }
+    p->flag |= CARD_STAT_BUSY;
+    p->callback = callback;
+    p->callback_arg = callback_arg;
+    (void)OS_RestoreInterrupts(bak_psr);
+}
+
+void CARDi_SetTask(void (*task) (CARDiCommon *));
+void CARDi_InitCommon(void);
+BOOL CARD_IsEnabled(void);
+void CARD_CheckEnabled(void);
+void CARD_Enable(BOOL enable);
+BOOL CARDi_WaitAsync(void);
+BOOL CARDi_TryWaitAsync(void);
+CARDResult CARD_GetResultCode(void);
+void CARD_LockRom(u16 lock_id);
+void CARD_UnlockRom(u16 lock_id);
+void CARD_UnlockBackup(u16 lock_id);
+
+#define CARD_RETRY_COUNT_MAX 10
+
+static inline void CARDi_SendPxi(u32 data)
+{
+    while (PXI_SendWordByFifo(PXI_FIFO_TAG_FS, data, TRUE) < 0)
+        ;
+}
+
+void CARD_SetCacheFlushThreshold(u32 icache, u32 dcache);
+BOOL CARD_IdentifyBackup(CARDBackupType type);
+void CARD_LockBackup(u16 lock_id);
+void CARD_UnlockBackup(u16 lock_id);
+
+#endif //NITRO_CARD_COMMON_H_
diff --git a/lib/include/nitro/card/pullOut.h b/lib/include/nitro/card/pullOut.h
new file mode 100644
index 0000000000..4a64f5ae1e
--- /dev/null
+++ b/lib/include/nitro/card/pullOut.h
@@ -0,0 +1,6 @@
+#ifndef NITRO_CARD_PULLOUT_H_
+#define NITRO_CARD_PULLOUT_H_
+
+BOOL CARD_IsPulledOut(void);
+
+#endif //NITRO_CARD_PULLOUT_H_
diff --git a/lib/include/nitro/card/rom.h b/lib/include/nitro/card/rom.h
new file mode 100644
index 0000000000..49b0ef8118
--- /dev/null
+++ b/lib/include/nitro/card/rom.h
@@ -0,0 +1,101 @@
+#ifndef NITRO_CARD_ROM_H_
+#define NITRO_CARD_ROM_H_
+
+#include <nitro/mi/exMemory.h>
+#include <nitro/mi/dma.h>
+#include <nitro/card/common.h>
+#include <nitro/os/tcm.h>
+
+#define CARD_ROM_PAGE_SIZE	512
+
+#define CARDMST_SEL_ROM     0x00
+#define CARDMST_IF_ENABLE   0x40
+#define CARDMST_ENABLE      0x80
+
+#define CARD_DATA_READY     0x00800000
+#define CARD_COMMAND_PAGE   0x01000000
+#define CARD_COMMAND_ID     0x07000000
+#define CARD_COMMAND_MASK   0x07000000
+#define CARD_RESET_HI       0x20000000
+#define CARD_READ_MODE      0x00000000
+#define CARD_START          0x80000000
+#define CARD_LATENCY1_MASK  0x00001FFF
+
+#define MROMOP_G_READ_PAGE  0xB7000000
+#define MROMOP_G_READ_ID    0xB8000000
+
+extern CARDiCommon cardi_common;
+
+typedef struct
+{
+    u32 offset;
+    u32 length;
+}
+CARDRomRegion;
+
+typedef struct CARDRomStat
+{
+    void (*read_func) (struct CARDRomStat *);
+    u32 ctrl;
+    u8 *cache_page;
+    u32 dummy[5];
+    u8 cache_buf[CARD_ROM_PAGE_SIZE];
+} CARDRomStat;
+
+static inline const CARDRomRegion * CARD_GetRomRegionOVT(MIProcessor target)
+{
+    return (target == MI_PROCESSOR_ARM9)
+    ? (const CARDRomRegion *)((const u8 *)HW_ROM_HEADER_BUF + 0x50)
+    : (const CARDRomRegion *)((const u8 *)HW_ROM_HEADER_BUF + 0x58);
+}
+
+BOOL CARDi_TryReadCardDma(CARDRomStat *p);
+void CARDi_ReadCard(CARDRomStat *p);
+u32 CARDi_ReadRomIDCore(void);
+void CARDi_CheckPulledOutCore(u32 id);
+void CARDi_ReadRom(u32 dma, const void *src, void *dst, u32 len, MIDmaCallback callback, void *arg, BOOL is_async);
+void CARD_Init(void);
+void CARD_WaitRomAsync(void);
+void (*CARDi_GetRomAccessor(void)) (CARDRomStat *);
+
+static inline void CARD_ReadRomAsync(u32 dma, const void * src, void * dst, u32 len, MIDmaCallback callback, void * arg)
+{
+    CARDi_ReadRom(dma, src, dst, len, callback, arg, TRUE);
+}
+
+static inline const CARDRomRegion * CARD_GetRomRegionFNT() {
+    return (const CARDRomRegion *)((const u8 *)HW_ROM_HEADER_BUF + 0x40);
+}
+
+static inline const CARDRomRegion * CARD_GetRomRegionFAT() {
+    return (const CARDRomRegion *)((const u8 *)HW_ROM_HEADER_BUF + 0x48);
+}
+
+static inline void CARDi_ReadEnd(void)
+{
+    CARDiCommon *const p = &cardi_common;
+    CARDi_CheckPulledOutCore(CARDi_ReadRomIDCore());
+    p->cmd->result = CARD_RESULT_SUCCESS;
+    CARDi_EndTask(p, TRUE);
+}
+
+#ifdef SDK_ARM9
+static inline BOOL CARDi_IsInTcm(u32 buf, u32 len)
+{
+    const u32 i = (u32)HW_ITCM;
+    const u32 d = OS_GetDTCMAddress();
+    return ((i < buf + len) && (i + HW_ITCM_SIZE > buf)) ||
+           ((d < buf + len) && (d + HW_DTCM_SIZE > buf));
+}
+#endif
+
+extern u32 cardi_rom_header_addr;
+
+static inline u32 CARDi_GetRomFlag(u32 flag)
+{
+    const u32 rom_ctrl = *(vu32 *)(cardi_rom_header_addr + 0x60);
+    return (u32)((rom_ctrl & ~CARD_COMMAND_MASK) | flag |
+                 CARD_READ_MODE | CARD_START | CARD_RESET_HI);
+}
+
+#endif //NITRO_CARD_ROM_H_
diff --git a/lib/include/nitro/code16.h b/lib/include/nitro/code16.h
new file mode 100644
index 0000000000..2f9a8e9fa0
--- /dev/null
+++ b/lib/include/nitro/code16.h
@@ -0,0 +1,17 @@
+#pragma thumb on
+// Prepare to switch the definition of FX_Mul
+#ifdef FX_Mul
+#undef FX_Mul
+#endif
+// Prepare to switch the definition of FX_MulFx64c
+#ifdef FX_Mul32x64c
+#undef FX_Mul32x64c
+#endif
+// Prepare to switch the definition of MATH_CountLeadingZeros
+#ifdef MATH_CountLeadingZeros
+#undef MATH_CountLeadingZeros
+#endif
+// Because CPU is in THUMB mode, function versions are used.
+#define FX_Mul(v1, v2)                 FX_MulFunc(v1, v2)
+#define FX_Mul32x64c(v32, v64c)        FX_Mul32x64cFunc(v32, v64c)
+#define MATH_CountLeadingZeros(x)      MATH_CountLeadingZerosFunc(x)
diff --git a/lib/include/nitro/code32.h b/lib/include/nitro/code32.h
new file mode 100644
index 0000000000..c699204ef6
--- /dev/null
+++ b/lib/include/nitro/code32.h
@@ -0,0 +1,17 @@
+#pragma thumb off
+// Prepare to switch the definition of FX_Mul
+#ifdef FX_Mul
+#undef FX_Mul
+#endif
+// Prepare to switch the definition of FX_MulFx64c
+#ifdef FX_Mul32x64c
+#undef FX_Mul32x64c
+#endif
+// Prepare to switch the definition of MATH_CountLeadingZeros
+#ifdef MATH_CountLeadingZeros
+#undef MATH_CountLeadingZeros
+#endif
+// Because CPU is in ARM mode, inline versions are used.
+#define FX_Mul(v1, v2)                 FX_MulInline(v1, v2)
+#define FX_Mul32x64c(v32, v64c)        FX_Mul32x64cInline(v32, v64c)
+#define MATH_CountLeadingZeros(x)      MATH_CountLeadingZerosInline(x)
diff --git a/lib/include/nitro/codereset.h b/lib/include/nitro/codereset.h
new file mode 100644
index 0000000000..90e578e700
--- /dev/null
+++ b/lib/include/nitro/codereset.h
@@ -0,0 +1,5 @@
+#ifdef SDK_CODE_ARM
+#include <nitro/code32.h>
+#else
+#include <nitro/code16.h>
+#endif
diff --git a/lib/include/nitro/cp.h b/lib/include/nitro/cp.h
new file mode 100644
index 0000000000..b226202463
--- /dev/null
+++ b/lib/include/nitro/cp.h
@@ -0,0 +1,6 @@
+#ifndef NITRO_CP_H_
+#define NITRO_CP_H_
+
+#include <nitro/cp/context.h>
+
+#endif //NITRO_CP_H_
diff --git a/lib/include/nitro/cp/context.h b/lib/include/nitro/cp/context.h
new file mode 100644
index 0000000000..9c8fac7b4e
--- /dev/null
+++ b/lib/include/nitro/cp/context.h
@@ -0,0 +1,17 @@
+#ifndef NITRO_CP_CONTEXT_H_
+#define NITRO_CP_CONTEXT_H_
+
+#include <nitro/types.h>
+
+typedef struct CPContext {
+    u64 div_numer;
+    u64 div_denom;
+    u64 sqrt;
+    u16 div_mode;
+    u16 sqrt_mode;
+} CPContext;
+
+void CP_SaveContext(register CPContext *context);
+void CPi_RestoreContext(register CPContext *context);
+
+#endif //NITRO_CP_CONTEXT_H_
diff --git a/lib/include/nitro/ctrdg.h b/lib/include/nitro/ctrdg.h
new file mode 100644
index 0000000000..c2c524e69f
--- /dev/null
+++ b/lib/include/nitro/ctrdg.h
@@ -0,0 +1,12 @@
+#ifndef NITRO_CTRDG_H_
+#define NITRO_CTRDG_H_
+
+#include <nitro/ctrdg/common/ctrdg_common.h>
+
+#ifdef SDK_ARM7
+#include <nitro/ctrdg/ARM7/vibrate.h>
+#endif //SDK_ARM7
+
+void CTRDG_Init(void);
+
+#endif //NITRO_CTRDG_H_
diff --git a/lib/include/nitro/ctrdg/ARM7/vibrate.h b/lib/include/nitro/ctrdg/ARM7/vibrate.h
new file mode 100644
index 0000000000..68c4f8c132
--- /dev/null
+++ b/lib/include/nitro/ctrdg/ARM7/vibrate.h
@@ -0,0 +1,6 @@
+#ifndef NITRO_CTRDG_ARM7_VIBRATE_H_
+#define NITRO_CTRDG_ARM7_VIBRATE_H_
+
+void CTRDG_VibPulseEdgeUpdate(int value);
+
+#endif //NITRO_CTRDG_ARM7_VIBRATE_H_
diff --git a/lib/include/nitro/ctrdg/common/ctrdg_common.h b/lib/include/nitro/ctrdg/common/ctrdg_common.h
new file mode 100644
index 0000000000..f0e237beb9
--- /dev/null
+++ b/lib/include/nitro/ctrdg/common/ctrdg_common.h
@@ -0,0 +1,6 @@
+#ifndef NITRO_CTRDG_COMMON_CTRDG_COMMON_H
+#define NITRO_CTRDG_COMMON_CTRDG_COMMON_H
+
+BOOL CTRDG_IsPulledOut(void);
+
+#endif //NITRO_CTRDG_COMMON_CTRDG_COMMON_H
diff --git a/lib/include/nitro/dgt/common.h b/lib/include/nitro/dgt/common.h
new file mode 100644
index 0000000000..08a49dc06d
--- /dev/null
+++ b/lib/include/nitro/dgt/common.h
@@ -0,0 +1,11 @@
+#ifndef NITRO_DGT_COMMON_H_
+#define NITRO_DGT_COMMON_H_
+
+#define DGT_HASH1_DIGEST_SIZE   (128/8)
+#define DGT_HASH2_DIGEST_SIZE   (160/8)
+#define DGT_HASH_DIGEST_SIZE_MAX  DGT_HASH2_DIGEST_SIZE
+#define	DGT_HASH_BLOCK_SIZE	(512/8)
+
+
+
+#endif //NITRO_DGT_COMMON_H_
diff --git a/lib/include/nitro/dtcm_begin.h b/lib/include/nitro/dtcm_begin.h
new file mode 100644
index 0000000000..ec8c5c15e7
--- /dev/null
+++ b/lib/include/nitro/dtcm_begin.h
@@ -0,0 +1,4 @@
+#include <nitro/section.h>
+#ifdef SDK_ARM9
+#pragma section DTCM begin
+#endif
diff --git a/lib/include/nitro/dtcm_end.h b/lib/include/nitro/dtcm_end.h
new file mode 100644
index 0000000000..796bb7ae4e
--- /dev/null
+++ b/lib/include/nitro/dtcm_end.h
@@ -0,0 +1,4 @@
+#include <nitro/section.h>
+#ifdef SDK_ARM9
+#pragma section DTCM end
+#endif
diff --git a/lib/include/nitro/exi.h b/lib/include/nitro/exi.h
new file mode 100644
index 0000000000..2c0c42361e
--- /dev/null
+++ b/lib/include/nitro/exi.h
@@ -0,0 +1,8 @@
+#ifndef GUARD_EXI_H
+#define GUARD_EXI_H
+
+#ifdef SDK_ARM7
+#include <nitro/exi/ARM7/genPort.h>
+#endif //SDK_ARM7
+
+#endif //GUARD_EXI_H
diff --git a/lib/include/nitro/exi/ARM7/genPort.h b/lib/include/nitro/exi/ARM7/genPort.h
new file mode 100644
index 0000000000..76f1735c46
--- /dev/null
+++ b/lib/include/nitro/exi/ARM7/genPort.h
@@ -0,0 +1,16 @@
+#ifndef NITRO_EXI_GENPORT_H_
+#define NITRO_EXI_GENPORT_H_
+
+#include <nitro/hw/ARM7/io_reg.h>
+
+typedef enum {
+    EXI_GPIOIF_SERIAL = 0x0000,
+    EXI_GPIOIF_UNDEF = REG_EXI_RCNT0_L_RE0_MASK,
+    EXI_GPIOIF_GPIO = REG_EXI_RCNT0_L_RE1_MASK,
+    EXI_GPIOIF_JOY = REG_EXI_RCNT0_L_RE1_MASK | REG_EXI_RCNT0_L_RE0_MASK
+} EXIGpioIF;
+
+void EXIi_SetBitRcnt0L(u16 mask, u16 data);
+void EXIi_SelectRcnt(EXIGpioIF type);
+
+#endif //NITRO_EXI_GENPORT_H_
diff --git a/lib/include/nitro/fs.h b/lib/include/nitro/fs.h
new file mode 100644
index 0000000000..81ca52bd05
--- /dev/null
+++ b/lib/include/nitro/fs.h
@@ -0,0 +1,8 @@
+#ifndef NITRO_FS_H_
+#define NITRO_FS_H_
+
+#include <nitro/fs/archive.h>
+#include <nitro/fs/file.h>
+#include <nitro/fs/overlay.h>
+
+#endif //NITRO_FS_H_
diff --git a/lib/include/nitro/fs/archive.h b/lib/include/nitro/fs/archive.h
new file mode 100644
index 0000000000..84fad2691c
--- /dev/null
+++ b/lib/include/nitro/fs/archive.h
@@ -0,0 +1,218 @@
+#ifndef NITRO_FS_ARCHIVE_H_
+#define NITRO_FS_ARCHIVE_H_
+
+#include <nitro/os/thread.h>
+
+struct FSFile;
+struct FSArchive;
+
+#define FS_ARCHIVE_NAME_LEN_MAX 3
+
+#define	FS_ARCHIVE_FLAG_REGISTER	0x00000001
+#define	FS_ARCHIVE_FLAG_LOADED		0x00000002
+#define	FS_ARCHIVE_FLAG_TABLE_LOAD	0x00000004
+#define	FS_ARCHIVE_FLAG_SUSPEND		0x00000008
+#define	FS_ARCHIVE_FLAG_RUNNING		0x00000010
+#define	FS_ARCHIVE_FLAG_CANCELING	0x00000020
+#define	FS_ARCHIVE_FLAG_SUSPENDING	0x00000040
+#define	FS_ARCHIVE_FLAG_UNLOADING	0x00000080
+#define	FS_ARCHIVE_FLAG_IS_ASYNC	0x00000100
+#define	FS_ARCHIVE_FLAG_IS_SYNC		0x00000200
+
+typedef enum {
+    FS_COMMAND_ASYNC_BEGIN = 0,
+    FS_COMMAND_READFILE = FS_COMMAND_ASYNC_BEGIN,
+    FS_COMMAND_WRITEFILE,
+    FS_COMMAND_ASYNC_END,
+
+    FS_COMMAND_SYNC_BEGIN = FS_COMMAND_ASYNC_END,
+    FS_COMMAND_SEEKDIR = FS_COMMAND_SYNC_BEGIN,
+    FS_COMMAND_READDIR,
+    FS_COMMAND_FINDPATH,
+    FS_COMMAND_GETPATH,
+    FS_COMMAND_OPENFILEFAST,
+    FS_COMMAND_OPENFILEDIRECT,
+    FS_COMMAND_CLOSEFILE,
+    FS_COMMAND_SYNC_END,
+
+    FS_COMMAND_STATUS_BEGIN = FS_COMMAND_SYNC_END,
+    FS_COMMAND_ACTIVATE = FS_COMMAND_STATUS_BEGIN,
+    FS_COMMAND_IDLE,
+    FS_COMMAND_SUSPEND,
+    FS_COMMAND_RESUME,
+    FS_COMMAND_STATUS_END,
+
+    FS_COMMAND_INVALID
+} FSCommandType;
+
+/* Asynchronous commands*/
+#define	FS_ARCHIVE_PROC_READFILE		(1 << FS_COMMAND_READFILE)
+#define	FS_ARCHIVE_PROC_WRITEFILE		(1 << FS_COMMAND_WRITEFILE)
+/* All asynchronous commands*/
+#define	FS_ARCHIVE_PROC_ASYNC	\
+	(FS_ARCHIVE_PROC_READFILE | FS_ARCHIVE_PROC_WRITEFILE)
+
+/* Synchronous commands*/
+#define	FS_ARCHIVE_PROC_SEEKDIR			(1 << FS_COMMAND_SEEKDIR)
+#define	FS_ARCHIVE_PROC_READDIR			(1 << FS_COMMAND_READDIR)
+#define	FS_ARCHIVE_PROC_FINDPATH		(1 << FS_COMMAND_FINDPATH)
+#define	FS_ARCHIVE_PROC_GETPATH			(1 << FS_COMMAND_GETPATH)
+#define	FS_ARCHIVE_PROC_OPENFILEFAST	(1 << FS_COMMAND_OPENFILEFAST)
+#define	FS_ARCHIVE_PROC_OPENFILEDIRECT	(1 << FS_COMMAND_OPENFILEDIRECT)
+#define	FS_ARCHIVE_PROC_CLOSEFILE		(1 << FS_COMMAND_CLOSEFILE)
+/* All synchronous commands*/
+#define	FS_ARCHIVE_PROC_SYNC	\
+	(FS_ARCHIVE_PROC_SEEKDIR | FS_ARCHIVE_PROC_READDIR |	\
+	 FS_ARCHIVE_PROC_FINDPATH | FS_ARCHIVE_PROC_GETPATH |	\
+	FS_ARCHIVE_PROC_OPENFILEFAST | FS_ARCHIVE_PROC_OPENFILEDIRECT | FS_ARCHIVE_PROC_CLOSEFILE)
+
+/* Messages when status changes*/
+#define	FS_ARCHIVE_PROC_ACTIVATE		(1 << FS_COMMAND_ACTIVATE)
+#define	FS_ARCHIVE_PROC_IDLE			(1 << FS_COMMAND_IDLE)
+#define	FS_ARCHIVE_PROC_SUSPENDING		(1 << FS_COMMAND_SUSPEND)
+#define	FS_ARCHIVE_PROC_RESUME			(1 << FS_COMMAND_RESUME)
+/* All messages when status changes*/
+#define	FS_ARCHIVE_PROC_STATUS	\
+	(FS_ARCHIVE_PROC_ACTIVATE | FS_ARCHIVE_PROC_IDLE |	\
+	 FS_ARCHIVE_PROC_SUSPENDING | FS_ARCHIVE_PROC_RESUME)
+
+#define	FS_ARCHIVE_PROC_ALL	(~0)
+
+typedef enum {
+    FS_RESULT_SUCCESS = 0,
+    FS_RESULT_FAILURE,
+    FS_RESULT_BUSY,
+    FS_RESULT_CANCELED,
+    FS_RESULT_CANCELLED = FS_RESULT_CANCELED, // SDK alias
+    FS_RESULT_UNSUPPORTED,
+    FS_RESULT_ERROR,
+    FS_RESULT_PROC_ASYNC,
+    FS_RESULT_PROC_DEFAULT,
+    FS_RESULT_PROC_UNKNOWN
+}
+FSResult;
+
+typedef FSResult (*FS_ARCHIVE_READ_FUNC) (struct FSArchive *p, void *dst, u32 pos, u32 size);
+typedef FSResult (*FS_ARCHIVE_WRITE_FUNC) (struct FSArchive *p, const void *src, u32 pos, u32 size);
+typedef FSResult (*FS_ARCHIVE_PROC_FUNC) (struct FSFile *, FSCommandType);
+
+typedef struct
+{
+    struct FSFile * prev;
+    struct FSFile * next;
+}
+FSFileLink;
+
+typedef struct
+{
+    u32 start;
+    u16 index;
+    u16 parent;
+} FSArchiveFNT;
+
+typedef struct
+{
+    u32 top;
+    u32 bottom;
+} FSArchiveFAT;
+
+typedef struct FSArchive
+{
+    union
+    {
+        char ptr[4];
+        u32 pack;
+    } name;
+    struct FSArchive * next;
+    struct FSArchive * prev;
+    OSThreadQueue sync_q;
+    OSThreadQueue stat_q;
+    u32 flag;
+    FSFileLink list;
+    u32 base;
+    u32 fat;
+    u32 fat_size;
+    u32 fnt;
+    u32 fnt_size;
+    u32 fat_bak;
+    u32 fnt_bak;
+    void * load_mem;
+    FS_ARCHIVE_READ_FUNC read_func;
+    FS_ARCHIVE_WRITE_FUNC write_func;
+    FS_ARCHIVE_READ_FUNC table_func;
+    FS_ARCHIVE_PROC_FUNC proc;
+    u32 proc_flag;
+} FSArchive;
+
+static inline BOOL FS_IsArchiveLoaded(volatile const FSArchive * p_arc)
+{
+    return (p_arc->flag & FS_ARCHIVE_FLAG_LOADED) ? TRUE : FALSE;
+}
+
+static inline u32 FS_GetArchiveOffset(const FSArchive * p_arc, u32 pos)
+{
+    return p_arc->base + pos;
+}
+
+static inline BOOL FSi_IsArchiveCanceling(volatile const FSArchive * p_arc)
+{
+    return (p_arc->flag & FS_ARCHIVE_FLAG_CANCELING) != 0;
+}
+
+static inline BOOL FS_IsArchiveSuspended(volatile const FSArchive * p_arc)
+{
+    return (p_arc->flag & FS_ARCHIVE_FLAG_SUSPEND) ? TRUE : FALSE;
+}
+
+static inline BOOL FSi_IsArchiveSuspending(volatile const FSArchive * p_arc)
+{
+    return (p_arc->flag & FS_ARCHIVE_FLAG_SUSPENDING) != 0;
+}
+
+static inline BOOL FSi_IsArchiveRunning(volatile const FSArchive * p_arc)
+{
+    return (p_arc->flag & FS_ARCHIVE_FLAG_RUNNING) != 0;
+}
+
+static inline BOOL FSi_IsArchiveUnloading(volatile const FSArchive * p_arc)
+{
+    return (p_arc->flag & FS_ARCHIVE_FLAG_UNLOADING) != 0;
+}
+
+static inline BOOL FSi_IsArchiveAsync(volatile const FSArchive * p_arc)
+{
+    return (p_arc->flag & FS_ARCHIVE_FLAG_IS_ASYNC) != 0;
+}
+
+static inline BOOL FSi_IsArchiveSync(volatile const FSArchive * p_arc)
+{
+    return (p_arc->flag & FS_ARCHIVE_FLAG_IS_SYNC) != 0;
+}
+
+static inline BOOL FS_IsArchiveTableLoaded(volatile const FSArchive * p_arc)
+{
+    return (p_arc->flag & FS_ARCHIVE_FLAG_TABLE_LOAD) ? TRUE : FALSE;
+}
+
+u32 FSi_GetPackedName(const char * name, int name_len);
+FSResult FSi_ReadMemCallback(struct FSArchive * p_arc, void * dest, u32 pos, u32 size);
+FSResult FSi_WriteMemCallback(struct FSArchive * p_arc, const void * src, u32 pos, u32 size);
+FSResult FSi_ReadMemoryCore(struct FSArchive * p_arc, void * dest, u32 pos, u32 size);
+struct FSFile * FSi_NextCommand(struct FSArchive * p_arc);
+void FSi_ExecuteAsyncCommand(struct FSFile * p_file);
+BOOL FSi_ExecuteSyncCommand(struct FSFile * file);
+BOOL FSi_SendCommand(struct FSFile * file, FSCommandType command);
+void FS_InitArchive(struct FSArchive * p_arc);
+struct FSArchive * const FS_FindArchive(const char * path, int offset);
+BOOL FS_RegisterArchiveName(struct FSArchive * p_arc, const char * name, int name_len);
+void FS_ReleaseArchiveName(struct FSArchive * p_arc);
+BOOL FS_LoadArchive(struct FSArchive * p_arc, u32 base, u32 fat, u32 fat_size, u32 fnt, u32 fnt_size, FS_ARCHIVE_READ_FUNC read_func, FS_ARCHIVE_WRITE_FUNC write_func);
+BOOL FS_UnloadArchive(struct FSArchive * p_arc);
+u32 FS_LoadArchiveTables(struct FSArchive *p_arc, void *p_mem, u32 max_size);
+void * FS_UnloadArchiveTables(struct FSArchive * p_arc);
+BOOL FS_SuspendArchive(struct FSArchive * p_arc);
+BOOL FS_ResumeArchive(struct FSArchive * p_arc);
+void FS_SetArchiveProc(struct FSArchive * p_arc, FS_ARCHIVE_PROC_FUNC proc, u32 flags);
+void FS_NotifyArchiveAsyncEnd(struct FSArchive *p_arc, FSResult ret);
+
+#endif //NITRO_FS_ARCHIVE_H_
diff --git a/lib/include/nitro/fs/file.h b/lib/include/nitro/fs/file.h
new file mode 100644
index 0000000000..2079566a54
--- /dev/null
+++ b/lib/include/nitro/fs/file.h
@@ -0,0 +1,227 @@
+#ifndef NITRO_FS_FILE_H_
+#define NITRO_FS_FILE_H_
+
+#include <nitro/fs/archive.h>
+
+#define FS_FILE_STATUS_BUSY      0x00000001
+#define FS_FILE_STATUS_CANCEL    0x00000002
+#define FS_FILE_STATUS_SYNC      0x00000004
+#define FS_FILE_STATUS_ASYNC     0x00000008
+#define FS_FILE_STATUS_IS_FILE   0x00000010
+#define FS_FILE_STATUS_IS_DIR    0x00000020
+#define FS_FILE_STATUS_OPERATING 0x00000040
+
+#define FS_FILE_NAME_MAX 127
+
+typedef enum FSSeekFileMode
+{
+    FS_SEEK_SET = 0,
+    FS_SEEK_CUR,
+    FS_SEEK_END
+} FSSeekFileMode;
+
+struct FSFile;
+
+#define FS_DMA_NOT_USE ((u32)~0)
+
+typedef struct FSDirPos
+{
+    struct FSArchive *arc;
+    u16 own_id;
+    u16 index;
+    u32 pos;
+}
+FSDirPos; // size = 0xC
+
+typedef struct FSFileID
+{
+    struct FSArchive *arc;
+    u32 file_id;
+}
+FSFileID;
+
+typedef struct
+{
+    union
+    {
+        FSFileID file_id;
+        FSDirPos dir_id;
+    };
+    u32 is_directory;
+    u32 name_len;
+    char name[128];
+}
+FSDirEntry;
+
+
+typedef struct
+{
+    FSDirPos pos;
+}
+FSSeekDirInfo;
+
+
+typedef struct
+{
+    FSDirEntry *p_entry;
+    BOOL skip_string;
+}
+FSReadDirInfo;
+
+
+typedef struct
+{
+    FSDirPos pos;
+    const char *path;
+    BOOL find_directory;
+    union
+    {
+        FSFileID *file;
+        FSDirPos *dir;
+    }
+    result;
+}
+FSFindPathInfo;
+
+
+typedef struct
+{
+    u8 *buf;
+    u32 buf_len;
+    u16 total_len;
+    u16 dir_id;
+}
+FSGetPathInfo;
+
+
+typedef struct
+{
+    FSFileID id;
+}
+FSOpenFileFastInfo;
+
+
+typedef struct
+{
+    u32 top;
+    u32 bottom;
+    u32 index;
+}
+FSOpenFileDirectInfo;
+
+
+typedef struct
+{
+    u32 reserved;
+}
+FSCloseFileInfo;
+
+
+typedef struct
+{
+    void *dst;
+    u32 len_org;
+    u32 len;
+}
+FSReadFileInfo;
+
+
+typedef struct
+{
+    const void *src;
+    u32 len_org;
+    u32 len;
+}
+FSWriteFileInfo;
+
+typedef struct FSFile
+{
+    FSFileLink link;                         // 0x00
+    struct FSArchive *arc;                   // 0x08
+    u32 stat;                                // 0xC
+    FSCommandType command;                   // 0x10
+    FSResult error;                          // 0x14
+    OSThreadQueue queue[1];                  // 0x18
+    union {
+        struct
+        {
+            u32 own_id;                      // 0x20
+            u32 top;                         // 0x24
+            u32 bottom;                      // 0x28
+            u32 pos;                         // 0x2C
+        } file;
+        struct
+        {
+            FSDirPos pos;                    // 0x20
+            u32 parent;                      // 0x2C
+        } dir;
+    } prop;                                  // 0x20
+
+    union {
+        FSReadFileInfo readfile;             // 0x30
+        FSWriteFileInfo writefile;           // 0x30
+
+        FSSeekDirInfo seekdir;               // 0x30
+        FSReadDirInfo readdir;               // 0x30
+        FSFindPathInfo findpath;             // 0x30
+        FSGetPathInfo getpath;               // 0x30
+        FSOpenFileFastInfo openfilefast;     // 0x30
+        FSOpenFileDirectInfo openfiledirect; // 0x30
+        FSCloseFileInfo closefile;           // 0x30
+    } arg;                                   // 0x30
+}
+FSFile; // size = 0x50
+
+void FS_Init(u32 default_dma_no);
+BOOL FS_IsAvailable(void);
+void FS_InitFile(FSFile * p_file);
+int FSi_ReadFileCore(FSFile * p_file, void * dst, s32 len, BOOL async);
+BOOL FS_ConvertPathToFileID(FSFileID * p_file_id, const char * path);
+BOOL FS_OpenFileDirect(FSFile * p_file, FSArchive * p_arc, u32 image_top, u32 image_bottom, u32 file_index);
+BOOL FS_OpenFileFast(FSFile * p_file, FSFileID file_id);
+BOOL FS_OpenFile(FSFile * p_file, const char * path);
+BOOL FS_CloseFile(FSFile * p_file);
+BOOL FS_WaitAsync(FSFile * p_file);
+int FS_ReadFileAsync(FSFile * p_file, void * dst, s32 len);
+int FS_ReadFile(FSFile * p_file, void * dst, s32 len);
+BOOL FS_SeekFile(FSFile * p_file, s32 offset, FSSeekFileMode origin);
+BOOL FS_ChangeDir(const char * path);
+u32 FS_SetDefaultDMA(u32 dma_no);
+
+static inline u32 const FS_GetFileImageTop(volatile const FSFile * p_file) {
+    return p_file->prop.file.top;
+}
+
+static inline u32 const FS_GetLength(volatile const FSFile * p_file)
+{
+    return p_file->prop.file.bottom - p_file->prop.file.top;
+}
+
+static inline BOOL FS_IsCanceling(volatile const FSFile * p_file)
+{
+    return (p_file->stat & FS_FILE_STATUS_CANCEL) ? TRUE : FALSE;
+}
+
+static inline BOOL FS_IsFileSyncMode(volatile const FSFile * p_file)
+{
+    return (p_file->stat & FS_FILE_STATUS_SYNC) ? TRUE : FALSE;
+}
+
+static inline BOOL FS_IsBusy(volatile const FSFile * p_file)
+{
+    return p_file->stat & FS_FILE_STATUS_BUSY ? TRUE : FALSE;
+}
+
+static inline BOOL FS_IsSucceeded(volatile const FSFile * p_file)
+{
+    return (p_file->error == FS_RESULT_SUCCESS) ? TRUE : FALSE;
+}
+
+static inline BOOL FS_IsDir(volatile const FSFile * p_file)
+{
+    return (p_file->stat & FS_FILE_STATUS_IS_DIR) ? TRUE : FALSE;
+}
+
+u32 FS_TryLoadTable(void *p_mem, u32 maxsize);
+
+#endif //NITRO_FS_FILE_H_
diff --git a/lib/include/nitro/fs/overlay.h b/lib/include/nitro/fs/overlay.h
new file mode 100644
index 0000000000..41c23e5ebd
--- /dev/null
+++ b/lib/include/nitro/fs/overlay.h
@@ -0,0 +1,77 @@
+#ifndef NITRO_FS_OVERLAY_H_
+#define NITRO_FS_OVERLAY_H_
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#ifdef SDK_ASM
+#define FS_EXTERN_OVERLAY(name) .public SDK_OVERLAY_##name##_ID
+#define FS_OVERLAY_ID(name) SDK_OVERLAY_##name##_ID
+#else
+#include <nitro/mi/exMemory.h>
+#include <nitro/fs/file.h>
+#include <nitro/card/rom.h>
+
+typedef u32 FSOverlayID;
+
+#define	FS_EXTERN_OVERLAY(name)	extern u32 SDK_OVERLAY_ ## name ## _ID[1]
+#define	FS_OVERLAY_ID(name)	((u32)&(SDK_OVERLAY_ ## name ## _ID))
+
+typedef void (* FSOverlayInitFunc)(void);
+
+typedef struct FSOverlayInfoHeader
+{
+    u32 id;
+    u8 * ram_address;
+    u32 ram_size;
+    u32 bss_size;
+    FSOverlayInitFunc * sinit_init;
+    FSOverlayInitFunc * sinit_init_end;
+    u32 file_id;
+    u32 compressed: 24;
+    u32 flag: 8;
+} FSOverlayInfoHeader;
+
+typedef struct FSOverlayInfo
+{
+    FSOverlayInfoHeader header;
+    MIProcessor target;
+    CARDRomRegion file_pos;
+} FSOverlayInfo;
+
+static inline u8 * const FS_GetOverlayAddress(FSOverlayInfo * p_ovi)
+{
+    return p_ovi->header.ram_address;
+}
+
+static inline u32 const FS_GetOverlayImageSize(FSOverlayInfo * p_ovi)
+{
+    return p_ovi->header.ram_size;
+}
+
+static inline u32 const FS_GetOverlayTotalSize(FSOverlayInfo * p_ovi)
+{
+    return p_ovi->header.ram_size + p_ovi->header.bss_size;
+}
+
+u32 FSi_GetOverlayBinarySize(FSOverlayInfo * p_ovi);
+void FS_ClearOverlayImage(FSOverlayInfo * p_ovi);
+FSFileID FS_GetOverlayFileID(FSOverlayInfo * p_ovi);
+BOOL FSi_LoadOverlayInfoCore(FSOverlayInfo * p_ovi, MIProcessor target, FSOverlayID id, FSArchive * arc, u32 offset_arm9, u32 len_arm9, u32 offset_arm7, u32 len_arm7);
+BOOL FS_LoadOverlayInfo(FSOverlayInfo * p_ovi, MIProcessor target, FSOverlayID id);
+BOOL FS_LoadOverlayImageAsync(FSOverlayInfo * p_ovi, FSFile * p_file);
+BOOL FS_LoadOverlayImage(FSOverlayInfo * p_ovi);
+BOOL FSi_CompareDigest(const u8 * spec_digest, void * src, u32 len);
+void FS_StartOverlay(FSOverlayInfo * p_ovi);
+void FS_EndOverlay(FSOverlayInfo * p_ovi);
+BOOL FS_UnloadOverlayImage(FSOverlayInfo * p_ovi);
+BOOL FS_LoadOverlay(MIProcessor target, FSOverlayID id);
+BOOL FS_UnloadOverlay(MIProcessor target, FSOverlayID id);
+#endif
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif //NITRO_FS_OVERLAY_H_
diff --git a/lib/include/nitro/fx.h b/lib/include/nitro/fx.h
new file mode 100644
index 0000000000..3e53474b94
--- /dev/null
+++ b/lib/include/nitro/fx.h
@@ -0,0 +1,11 @@
+#ifndef NITRO_FX_H_
+#define NITRO_FX_H_
+
+#include <nitro/fx/fx.h>
+#include <nitro/fx/fx_trig.h>
+#include <nitro/fx/fx_mtx22.h>
+#include <nitro/fx/fx_mtx33.h>
+#include <nitro/fx/fx_mtx43.h>
+#include <nitro/fx/fx_vec.h>
+
+#endif //NITRO_FX_H_
diff --git a/lib/include/nitro/fx/fx.h b/lib/include/nitro/fx/fx.h
new file mode 100644
index 0000000000..fe70c575a0
--- /dev/null
+++ b/lib/include/nitro/fx/fx.h
@@ -0,0 +1,186 @@
+#ifndef NITRO_FX_FX_H_
+#define NITRO_FX_FX_H_
+
+// 19.12
+typedef s32 fx32;
+#define FX32_SHIFT          12
+#define FX32_INT_SIZE       19
+#define FX32_DEC_SIZE       12
+
+#define FX32_INT_MASK       0x7ffff000
+#define FX32_DEC_MASK       0x00000fff
+#define FX32_SIGN_MASK      0x80000000
+
+#define FX32_MAX            ((fx32)0x7fffffff)
+#define FX32_MIN            ((fx32)0x80000000)
+
+#define FX_MUL(v1, v2)       FX32_CAST(((fx64)(v1) * (v2) + 0x800LL) >> FX32_SHIFT)
+#define FX_MUL32x64C(v1, v2) FX32_CAST(((v2) * (v1) + 0x80000000LL) >> 32)
+
+#define FX_FX32_TO_F32(x)    ((f32)((x) / (f32)(1 << FX32_SHIFT)))
+#define FX_F32_TO_FX32(x)    ((fx32)(((x) > 0) ? \
+                                     ((x) * (1 << FX32_SHIFT) + 0.5f ) : \
+                                     ((x) * (1 << FX32_SHIFT) - 0.5f )))
+
+#define FX32_CONST(x)        FX_F32_TO_FX32(x)
+
+// 51.12
+typedef s64 fx64;
+#define FX64_SHIFT          12
+#define FX64_INT_SIZE       51
+#define FX64_DEC_SIZE       12
+
+#define FX64_INT_MASK       ((fx64)0x7ffffffffffff000)
+#define FX64_DEC_MASK       ((fx64)0x0000000000000fff)
+#define FX64_SIGN_MASK      ((fx64)0x8000000000000000)
+
+#define FX64_MAX            ((fx64)0x7fffffffffffffff)
+#define FX64_MIN            ((fx64)0x8000000000000000)
+
+#define FX_FX64_TO_F32(x)   ((f32)((x) / (f32)(1 << FX64_SHIFT)))
+#define FX_F32_TO_FX64(x)   ((fx64)(((x) > 0) ? \
+                                    ((x) * (1 << FX32_SHIFT) + 0.5f ) : \
+                                    ((x) * (1 << FX32_SHIFT) - 0.5f )))
+
+#define FX64_CONST(x)       FX_F32_TO_FX64(x)
+
+// 31.32
+typedef s64 fx64c;
+#define FX64C_SHIFT          32
+#define FX64C_INT_SIZE       31
+#define FX64C_DEC_SIZE       32
+
+#define FX64C_INT_MASK       ((fx64c)0x7fffffff00000000)
+#define FX64C_DEC_MASK       ((fx64c)0x00000000ffffffff)
+#define FX64C_SIGN_MASK      ((fx64c)0x8000000000000000)
+
+#define FX64C_MAX            ((fx64c)0x7fffffffffffffff)
+#define FX64C_MIN            ((fx64c)0x8000000000000000)
+
+#define FX_FX64C_TO_F32(x)   ((f32)((x) / (f32)((fx64c)1 << FX64C_SHIFT)))
+#define FX_F32_TO_FX64C(x)   ((fx64c)(((x) > 0) ? \
+                                      ((x) * ((fx64c)1 << FX64C_SHIFT) + 0.5f ) : \
+                                      ((x) * ((fx64c)1 << FX64C_SHIFT) - 0.5f )))
+
+#define FX64C_CONST(x)      FX_F32_TO_FX64C(x)
+
+// 3.12
+typedef s16 fx16;
+#define FX16_SHIFT          12
+#define FX16_INT_SIZE       3
+#define FX16_DEC_SIZE       12
+
+#define FX16_INT_MASK       0x7000
+#define FX16_DEC_MASK       0x0fff
+#define FX16_SIGN_MASK      0x8000
+
+/* 7.999759  */
+#define FX16_MAX            ((fx16)0x7fff)
+/* -8        */
+#define FX16_MIN            ((fx16)0x8000)
+
+#define FX_FX16_TO_F32(x)    ((f32)((x) / (f32)(1 << FX16_SHIFT)))
+#define FX_F32_TO_FX16(x)    ((fx16)(((x) > 0) ? \
+                                     (fx16)((x) * (1 << FX16_SHIFT) + 0.5f ) : \
+                                     (fx16)((x) * (1 << FX16_SHIFT) - 0.5f )))
+
+#define FX16_CONST(x)       FX_F32_TO_FX16(x)
+
+// Vectors
+typedef struct {
+    fx32 x;
+    fx32 y;
+    fx32 z;
+} VecFx32;
+
+typedef struct {
+    fx16 x;
+    fx16 y;
+    fx16 z;
+} VecFx16;
+
+// Matrices
+typedef union {
+    struct {
+        fx32 _00, _01, _02, _03;
+        fx32 _10, _11, _12, _13;
+        fx32 _20, _21, _22, _23;
+        fx32 _30, _31, _32, _33;
+    };
+    fx32 m[4][4];
+    fx32 a[16];
+} MtxFx44;
+
+typedef union {
+    struct {
+        fx32 _00, _01, _02;
+        fx32 _10, _11, _12;
+        fx32 _20, _21, _22;
+        fx32 _30, _31, _32;
+    };
+    fx32 m[4][3];
+    fx32 a[12];
+} MtxFx43;
+
+typedef union {
+    struct {
+        fx32 _00, _01, _02;
+        fx32 _10, _11, _12;
+        fx32 _20, _21, _22;
+    };
+    fx32 m[3][3];
+    fx32 a[9];
+} MtxFx33;
+
+typedef union {
+    struct {
+        fx32 _00, _01;
+        fx32 _10, _11;
+    };
+    fx32 m[2][2];
+    fx32 a[4];
+} MtxFx22;
+
+static inline s32 FX_Whole(fx32 v) {
+    return v >> FX32_SHIFT;
+}
+
+static inline fx32 FX_Floor(fx32 v) {
+    return v & (FX32_INT_MASK | FX32_SIGN_MASK);
+}
+
+static inline fx32 FX32_CAST(s64 res) {
+    return (fx32)res;
+}
+
+fx32 FX_MulFunc(fx32 v1, fx32 v2);
+static inline fx32 FX_MulInline(fx32 v1, fx32 v2) {
+    return ((s64)v1 * v2 + 0x800LL) >> FX32_SHIFT;
+}
+
+fx32 FX_Mul32x64cFunc(fx32 v32, fx64c v64c);
+static inline fx32 FX_Mul32x64cInline(fx32 v32, fx64c v64c) {
+    fx64c tmp = v64c * v32 + 0x80000000LL;    // for better precision
+    return FX32_CAST(tmp >> FX64C_SHIFT);
+}
+
+// ARM uses the inline version, THUMB uses the function version
+#ifndef FX_Mul
+#ifdef SDK_CODE_ARM
+#define FX_Mul(v1, v2) FX_MulInline(v1, v2)
+#else
+#define FX_Mul(v1, v2) FX_MulFunc(v1, v2)
+#endif //SDK_CODE_ARM
+#endif //FX_Mul
+
+#ifndef FX_Mul32x64c
+#ifdef SDK_CODE_ARM
+#define FX_Mul32x64c(v32, v64c) FX_Mul32x64cInline(v32, v64c)
+#else
+#define FX_Mul32x64c(v32, v64c) FX_Mul32x64cFunc(v32, v64c)
+#endif //SDK_CODE_ARM
+#endif //FX_Mul32x64c
+
+void FX_Init(void);
+
+#endif //NITRO_FX_FX_H_
diff --git a/lib/include/nitro/fx/fx_mtx22.h b/lib/include/nitro/fx/fx_mtx22.h
new file mode 100644
index 0000000000..b1b3dfc9e4
--- /dev/null
+++ b/lib/include/nitro/fx/fx_mtx22.h
@@ -0,0 +1,9 @@
+#ifndef NITR_FX_FX_MTX22_H_
+#define NITR_FX_FX_MTX22_H_
+
+#include <nitro/fx/fx.h>
+
+void MTX_Rot22_(MtxFx22 *mtx, fx16 x, fx16 y);
+void MTX_ScaleApply22(MtxFx22 *a, MtxFx22 *b, fx32 x, fx32 y);
+
+#endif //NITR_FX_FX_MTX22_H_
diff --git a/lib/include/nitro/fx/fx_mtx33.h b/lib/include/nitro/fx/fx_mtx33.h
new file mode 100644
index 0000000000..f7ae99bdcb
--- /dev/null
+++ b/lib/include/nitro/fx/fx_mtx33.h
@@ -0,0 +1,26 @@
+#ifndef NITRO_FX_FX_MTX33_H_
+#define NITRO_FX_FX_MTX33_H_
+
+static inline void MTX_Copy33(const MtxFx33 *pSrc, MtxFx33 *pDst) {
+    MI_Copy36B(pSrc, pDst);
+}
+
+void MTX_Identity33_(register MtxFx33 *pDst);
+void MTX_RotX33_(register MtxFx33 *pDst, register fx32 sinVal, register fx32 cosVal);
+void MTX_RotY33_(register MtxFx33 *pDst, register fx32 sinVal, register fx32 cosVal);
+void MTX_Concat33(const MtxFx33 *a, const MtxFx33 *b, MtxFx33 *ab);
+void MTX_MultVec33(const VecFx32 *vec, const MtxFx33 *m, VecFx32 *dst);
+
+static inline void MTX_Identity33(MtxFx33 *pDst) {
+    MTX_Identity33_(pDst);
+}
+
+static inline void MTX_RotY33(MtxFx33 *pDst, fx32 sinVal, fx32 cosVal) {
+    MTX_RotY33_(pDst, sinVal, cosVal);
+}
+
+static inline void MTX_RotX33(MtxFx33 *pDst, fx32 sinVal, fx32 cosVal) {
+    MTX_RotX33_(pDst, sinVal, cosVal);
+}
+
+#endif //NITRO_FX_FX_MTX33_H_
diff --git a/lib/include/nitro/fx/fx_mtx43.h b/lib/include/nitro/fx/fx_mtx43.h
new file mode 100644
index 0000000000..000b5f539c
--- /dev/null
+++ b/lib/include/nitro/fx/fx_mtx43.h
@@ -0,0 +1,27 @@
+#ifndef NITRO_FX_FX_MTX43_H_
+#define NITRO_FX_FX_MTX43_H_
+
+void MTX_Identity43_(register MtxFx43 *pDst);
+void MTX_TransApply43(const MtxFx43 *pSrc, MtxFx43 *pDst, fx32 x, fx32 y, fx32 z);
+void MTX_Concat43(const MtxFx43 *a, const MtxFx43 *b, MtxFx43 *ab);
+void MTX_RotX43_(register MtxFx43 *pDst, register fx32 sinVal, register fx32 cosVal);
+void MTX_RotY43_(register MtxFx43 *pDst, register fx32 sinVal, register fx32 cosVal);
+void MTX_Scale43_(register MtxFx43 *pDst, register fx32 x, register fx32 y, register fx32 z);
+
+static inline void MTX_Identity43(MtxFx43 *pDst) {
+    MTX_Identity43_(pDst);
+}
+
+static inline void MTX_RotX43(MtxFx43 *pDst, fx32 sinVal, fx32 cosVal) {
+    MTX_RotX43_(pDst, sinVal, cosVal);
+}
+
+static inline void MTX_RotY43(MtxFx43 *pDst, fx32 sinVal, fx32 cosVal) {
+    MTX_RotY43_(pDst, sinVal, cosVal);
+}
+
+static inline void MTX_Scale43(MtxFx43 *pDst, fx32 x, fx32 y, fx32 z) {
+    MTX_Scale43_(pDst, x, y, z);
+}
+
+#endif //NITRO_FX_FX_MTX43_H_
diff --git a/lib/include/nitro/fx/fx_trig.h b/lib/include/nitro/fx/fx_trig.h
new file mode 100644
index 0000000000..d55eb49691
--- /dev/null
+++ b/lib/include/nitro/fx/fx_trig.h
@@ -0,0 +1,27 @@
+#ifndef NITRO_FX_FX_TRIG_H_
+#define NITRO_FX_FX_TRIG_H_
+
+#include <nitro/fx/fx_const.h>
+
+// deg must be in fx32/fx16 format
+#define FX_DEG_TO_RAD(deg) ((fx32)((FX64C_TWOPI_360 * (deg) + 0x80000000LL) >> 32))
+#define FX_DEG_TO_IDX(deg) ((u16) ((FX64C_65536_360 * (deg) + 0x80000000000LL) >> 44))
+
+// rad must be in fx32/fx16 format
+#define FX_RAD_TO_DEG(rad) ((fx32)((FX64C_360_TWOPI * (rad) + 0x80000000LL) >> 32))
+#define FX_RAD_TO_IDX(rad) ((u16)((FX64C_65536_TWOPI * (rad) + 0x80000000000LL) >> 44))
+
+#define FX_IDX_TO_RAD(idx) ((fx32)((FX64C_TWOPI_65536 * (idx) + 0x80000LL) >> 20))
+#define FX_IDX_TO_DEG(idx) ((fx32)((FX64C_360_65536 * (idx) + 0x80000LL) >> 20))
+
+extern const fx16 FX_SinCosTable_[];
+
+static inline fx16 FX_SinIdx(int idx) {
+    return FX_SinCosTable_[((idx >> 4) << 1)];
+}
+
+static inline fx16 FX_CosIdx(int idx) {
+    return FX_SinCosTable_[((idx >> 4) << 1) + 1];
+}
+
+#endif //NITRO_FX_FX_TRIG_H_
diff --git a/lib/include/nitro/fx/fx_vec.h b/lib/include/nitro/fx/fx_vec.h
new file mode 100644
index 0000000000..4c697f534c
--- /dev/null
+++ b/lib/include/nitro/fx/fx_vec.h
@@ -0,0 +1,7 @@
+#ifndef NITRO_FX_FX_VEC_H_
+#define NITRO_FX_FX_VEC_H_
+
+void VEC_Add(const VecFx32 *a, const VecFx32 *b, VecFx32 *ab);
+void VEC_Subtract(const VecFx32 *a, const VecFx32 *b, VecFx32 *ab);
+
+#endif //NITRO_FX_FX_VEC_H_
diff --git a/lib/include/nitro/gx.h b/lib/include/nitro/gx.h
new file mode 100644
index 0000000000..c8596224fb
--- /dev/null
+++ b/lib/include/nitro/gx.h
@@ -0,0 +1,18 @@
+#ifndef NITRO_GX_H_
+#define NITRO_GX_H_
+
+#include <nitro/gx/gxcommon.h>
+#include <nitro/gx/gx.h>
+#include <nitro/gx/gx_bgcnt.h>
+#include <nitro/gx/g2.h>
+#include <nitro/gx/g3.h>
+#include <nitro/gx/g3x.h>
+#include <nitro/gx/g3imm.h>
+#include <nitro/gx/gx_load.h>
+#include <nitro/gx/g2_oam.h>
+
+#ifdef SDK_ARM9
+#include <nitro/gx/gx_vramcnt.h>
+#endif //SDK_ARM9
+
+#endif //NITRO_GX_H_
diff --git a/lib/include/nitro/gx/g2.h b/lib/include/nitro/gx/g2.h
new file mode 100644
index 0000000000..842ab3fd33
--- /dev/null
+++ b/lib/include/nitro/gx/g2.h
@@ -0,0 +1,121 @@
+#ifndef NITRO_GX_GX_G2_H_
+#define NITRO_GX_GX_G2_H_
+
+void G2x_SetBGyAffine_(u32 addr, const MtxFx22 *mtx, fx32 a, fx32 b, fx32 c, fx32 d);
+void G2x_SetBlendAlpha_(u32 addr, int plane1, int plane2, int ev1, int ev2);
+void G2x_SetBlendBrightness_(u16 *ptr, fx32 a, fx32 brightness);
+void G2x_SetBlendBrightnessExt_(u16 *ptr, fx32 a, fx32 b, fx32 c, fx32 d, fx32 brightness);
+void G2x_ChangeBlendBrightness_(u16 *ptr, fx32 brightness);
+
+typedef struct {
+    u8 planeMask:5;
+    u8 effect:1;
+    u8 _reserve:2;
+} GXWndPlane;
+
+typedef enum {
+    GX_BLEND_PLANEMASK_NONE = 0x0000,
+    GX_BLEND_PLANEMASK_BG0 = 0x0001,
+    GX_BLEND_PLANEMASK_BG1 = 0x0002,
+    GX_BLEND_PLANEMASK_BG2 = 0x0004,
+    GX_BLEND_PLANEMASK_BG3 = 0x0008,
+    GX_BLEND_PLANEMASK_OBJ = 0x0010,
+    GX_BLEND_PLANEMASK_BD = 0x0020
+} GXBlendPlaneMask;
+
+typedef enum {
+    GX_WND_PLANEMASK_NONE = 0x0000,
+    GX_WND_PLANEMASK_BG0 = 0x0001,
+    GX_WND_PLANEMASK_BG1 = 0x0002,
+    GX_WND_PLANEMASK_BG2 = 0x0004,
+    GX_WND_PLANEMASK_BG3 = 0x0008,
+    GX_WND_PLANEMASK_OBJ = 0x0010
+} GXWndPlaneMask;
+
+static inline void G2_SetWndOutsidePlane(int wnd, BOOL effect) {
+    u32     tmp;
+
+    tmp = ((reg_G2_WINOUT & ~REG_G2_WINOUT_WINOUT_MASK) | ((u32)wnd << REG_G2_WINOUT_WINOUT_SHIFT));
+
+    if (effect) {
+        tmp |= (0x20 << REG_G2_WINOUT_WINOUT_SHIFT);    // EFCT
+    }
+
+    reg_G2_WINOUT = (u16)tmp;
+}
+
+static inline void G2_SetBG0Offset(int hOffset, int vOffset) {
+    reg_G2_BG0OFS = (u32)(((hOffset << REG_G2_BG0OFS_HOFFSET_SHIFT) & REG_G2_BG0OFS_HOFFSET_MASK) |
+                          ((vOffset << REG_G2_BG0OFS_VOFFSET_SHIFT) & REG_G2_BG0OFS_VOFFSET_MASK));
+}
+
+static inline void G2_SetBG1Offset(int hOffset, int vOffset) {
+    reg_G2_BG1OFS = (u32)(((hOffset << REG_G2_BG1OFS_HOFFSET_SHIFT) & REG_G2_BG1OFS_HOFFSET_MASK) |
+                          ((vOffset << REG_G2_BG1OFS_VOFFSET_SHIFT) & REG_G2_BG1OFS_VOFFSET_MASK));
+}
+
+static inline void G2_SetBG2Offset(int hOffset, int vOffset) {
+    reg_G2_BG2OFS = (u32)(((hOffset << REG_G2_BG2OFS_HOFFSET_SHIFT) & REG_G2_BG2OFS_HOFFSET_MASK) |
+                          ((vOffset << REG_G2_BG2OFS_VOFFSET_SHIFT) & REG_G2_BG2OFS_VOFFSET_MASK));
+}
+
+static inline void G2_SetBG3Offset(int hOffset, int vOffset) {
+    reg_G2_BG3OFS = (u32)(((hOffset << REG_G2_BG3OFS_HOFFSET_SHIFT) & REG_G2_BG3OFS_HOFFSET_MASK) |
+                          ((vOffset << REG_G2_BG3OFS_VOFFSET_SHIFT) & REG_G2_BG3OFS_VOFFSET_MASK));
+}
+
+static inline void G2S_SetBG0Offset(int hOffset, int vOffset) {
+    reg_G2S_DB_BG0OFS = (u32)(((hOffset << REG_G2S_DB_BG0OFS_HOFFSET_SHIFT) & REG_G2S_DB_BG0OFS_HOFFSET_MASK) |
+                              ((vOffset << REG_G2S_DB_BG0OFS_VOFFSET_SHIFT) & REG_G2S_DB_BG0OFS_VOFFSET_MASK));
+}
+
+static inline void G2S_SetBG1Offset(int hOffset, int vOffset) {
+    reg_G2S_DB_BG1OFS = (u32)(((hOffset << REG_G2S_DB_BG1OFS_HOFFSET_SHIFT) & REG_G2S_DB_BG1OFS_HOFFSET_MASK) |
+                              ((vOffset << REG_G2S_DB_BG1OFS_VOFFSET_SHIFT) & REG_G2S_DB_BG1OFS_VOFFSET_MASK));
+}
+
+static inline void G2S_SetBG2Offset(int hOffset, int vOffset) {
+    reg_G2S_DB_BG2OFS = (u32)(((hOffset << REG_G2S_DB_BG2OFS_HOFFSET_SHIFT) & REG_G2S_DB_BG2OFS_HOFFSET_MASK) |
+                              ((vOffset << REG_G2S_DB_BG2OFS_VOFFSET_SHIFT) & REG_G2S_DB_BG2OFS_VOFFSET_MASK));
+}
+
+static inline void G2S_SetBG3Offset(int hOffset, int vOffset) {
+    reg_G2S_DB_BG3OFS = (u32)(((hOffset << REG_G2S_DB_BG3OFS_HOFFSET_SHIFT) & REG_G2S_DB_BG3OFS_HOFFSET_MASK) |
+                              ((vOffset << REG_G2S_DB_BG3OFS_VOFFSET_SHIFT) & REG_G2S_DB_BG3OFS_VOFFSET_MASK));
+}
+
+static inline void G2_SetBG2Affine(const MtxFx22 *mtx, int centerX, int centerY, int x1, int y1) {
+    G2x_SetBGyAffine_((u32)&reg_G2_BG2PA, mtx, centerX, centerY, x1, y1);
+}
+
+static inline void G2_SetBG3Affine(const MtxFx22 *mtx, int centerX, int centerY, int x1, int y1) {
+    G2x_SetBGyAffine_((u32)&reg_G2_BG3PA, mtx, centerX, centerY, x1, y1);
+}
+
+static inline void G2S_SetBG2Affine(const MtxFx22 *mtx, int centerX, int centerY, int x1, int y1) {
+    G2x_SetBGyAffine_((u32)&reg_G2S_DB_BG2PA, mtx, centerX, centerY, x1, y1);
+}
+
+static inline void G2S_SetBG3Affine(const MtxFx22 *mtx, int centerX, int centerY, int x1, int y1) {
+    G2x_SetBGyAffine_((u32)&reg_G2S_DB_BG3PA, mtx, centerX, centerY, x1, y1);
+}
+
+static inline void G2_BlendNone(void) {
+    reg_G2_BLDCNT = 0;
+}
+
+static inline void G2S_BlendNone(void) {
+    reg_G2S_DB_BLDCNT = 0;
+}
+
+static inline void G2_SetBlendAlpha(int plane1, int plane2, int ev1, int ev2) {
+    G2x_SetBlendAlpha_((u32)&reg_G2_BLDCNT, plane1, plane2, ev1, ev2);
+}
+
+static inline void G2S_SetBlendAlpha(int plane1, int plane2, int ev1, int ev2) {
+    G2x_SetBlendAlpha_((u32)&reg_G2S_DB_BLDCNT, plane1, plane2, ev1, ev2);
+}
+
+//The g2 and g2_oam headers contain a lot of inline functions and enums that may want to be ported over at some point
+
+#endif //NITRO_GX_GX_G2_H_
diff --git a/lib/include/nitro/gx/g2_oam.h b/lib/include/nitro/gx/g2_oam.h
new file mode 100644
index 0000000000..d1b2a9f811
--- /dev/null
+++ b/lib/include/nitro/gx/g2_oam.h
@@ -0,0 +1,52 @@
+#ifndef NITRO_GX_G2_OAM_H_
+#define NITRO_GX_G2_OAM_H_
+
+typedef struct {
+    union {
+        u32 attr01;
+        struct {
+            u16 attr0;
+            u16 attr1;
+        };
+        struct {
+            u32 y:8;
+            u32 rsMode:2;
+            u32 objMode:2;
+            u32 mosaic:1;
+            u32 colorMode:1;
+            u32 shape:2;
+
+            u32 x:9;
+            u32 rsParam:5;
+            u32 size:2;
+        };
+        struct {
+            u32 _0:28;
+            u32 flipH:1;
+            u32 flipV:1;
+            u32 _1:2;
+        };
+    };
+    union {
+        struct {
+            u16 attr2;
+            u16 _3;
+        };
+        u32 attr23;
+        struct {
+            u32 charNo:10;
+            u32 priority:2;
+            u32 cParam:4;
+            u32 _2:16;
+        };
+    };
+} GXOamAttr;
+
+typedef enum {
+    GX_OAM_MODE_NORMAL = 0,
+    GX_OAM_MODE_XLU = 1,
+    GX_OAM_MODE_OBJWND = 2,
+    GX_OAM_MODE_BITMAPOBJ = 3
+} GXOamMode;
+
+#endif //NITRO_GX_G2_OAM_H_
diff --git a/lib/include/nitro/gx/g3.h b/lib/include/nitro/gx/g3.h
new file mode 100644
index 0000000000..6c8916e7e2
--- /dev/null
+++ b/lib/include/nitro/gx/g3.h
@@ -0,0 +1,152 @@
+#ifndef NITRO_GX_G3_H_
+#define NITRO_GX_G3_H_
+
+#define G3OP_NOP                0x00
+
+#define G3OP_MTX_MODE           0x10
+#define G3OP_MTX_PUSH           0x11
+#define G3OP_MTX_POP            0x12
+#define G3OP_MTX_STORE          0x13
+#define G3OP_MTX_RESTORE        0x14
+#define G3OP_MTX_IDENTITY       0x15
+#define G3OP_MTX_LOAD_4x4       0x16
+#define G3OP_MTX_LOAD_4x3       0x17
+#define G3OP_MTX_MULT_4x4       0x18
+#define G3OP_MTX_MULT_4x3       0x19
+#define G3OP_MTX_MULT_3x3       0x1a
+#define G3OP_MTX_SCALE          0x1b
+#define G3OP_MTX_TRANS          0x1c
+
+#define G3OP_COLOR              0x20
+#define G3OP_NORMAL             0x21
+#define G3OP_TEXCOORD           0x22
+#define G3OP_VTX_16             0x23
+#define G3OP_VTX_10             0x24
+#define G3OP_VTX_XY             0x25
+#define G3OP_VTX_XZ             0x26
+#define G3OP_VTX_YZ             0x27
+#define G3OP_VTX_DIFF           0x28
+#define G3OP_POLYGON_ATTR       0x29
+#define G3OP_TEXIMAGE_PARAM     0x2a
+#define G3OP_TEXPLTT_BASE       0x2b
+
+#define G3OP_DIF_AMB            0x30
+#define G3OP_SPE_EMI            0x31
+#define G3OP_LIGHT_VECTOR       0x32
+#define G3OP_LIGHT_COLOR        0x33
+#define G3OP_SHININESS          0x34
+
+#define G3OP_BEGIN              0x40
+#define G3OP_END                0x41
+
+#define G3OP_SWAP_BUFFERS       0x50
+
+#define G3OP_VIEWPORT           0x60
+
+#define G3OP_BOX_TEST           0x70
+#define G3OP_POS_TEST           0x71
+#define G3OP_VEC_TEST           0x72
+
+#define G3OP_DUMMY_COMMAND      0xFF
+
+#define G3OP_NOP_NPARAMS                0
+
+#define G3OP_MTX_MODE_NPARAMS           1
+#define G3OP_MTX_PUSH_NPARAMS           0
+#define G3OP_MTX_POP_NPARAMS            1
+#define G3OP_MTX_STORE_NPARAMS          1
+#define G3OP_MTX_RESTORE_NPARAMS        1
+#define G3OP_MTX_IDENTITY_NPARAMS       0
+#define G3OP_MTX_LOAD_4x4_NPARAMS       16
+#define G3OP_MTX_LOAD_4x3_NPARAMS       12
+#define G3OP_MTX_MULT_4x4_NPARAMS       16
+#define G3OP_MTX_MULT_4x3_NPARAMS       12
+#define G3OP_MTX_MULT_3x3_NPARAMS       9
+#define G3OP_MTX_SCALE_NPARAMS          3
+#define G3OP_MTX_TRANS_NPARAMS          3
+
+#define G3OP_COLOR_NPARAMS              1
+#define G3OP_NORMAL_NPARAMS             1
+#define G3OP_TEXCOORD_NPARAMS           1
+#define G3OP_VTX_16_NPARAMS             2
+#define G3OP_VTX_10_NPARAMS             1
+#define G3OP_VTX_XY_NPARAMS             1
+#define G3OP_VTX_XZ_NPARAMS             1
+#define G3OP_VTX_YZ_NPARAMS             1
+#define G3OP_VTX_DIFF_NPARAMS           1
+#define G3OP_POLYGON_ATTR_NPARAMS       1
+#define G3OP_TEXIMAGE_PARAM_NPARAMS     1
+#define G3OP_TEXPLTT_BASE_NPARAMS       1
+
+#define G3OP_DIF_AMB_NPARAMS            1
+#define G3OP_SPE_EMI_NPARAMS            1
+#define G3OP_LIGHT_VECTOR_NPARAMS       1
+#define G3OP_LIGHT_COLOR_NPARAMS        1
+#define G3OP_SHININESS_NPARAMS          32
+
+#define G3OP_BEGIN_NPARAMS              1
+#define G3OP_END_NPARAMS                0
+
+#define G3OP_SWAP_BUFFERS_NPARAMS       1
+
+#define G3OP_VIEWPORT_NPARAMS           1
+
+#define G3OP_BOX_TEST_NPARAMS           3
+#define G3OP_POS_TEST_NPARAMS           2
+#define G3OP_VEC_TEST_NPARAMS           1
+
+typedef enum {
+    GX_TEXSIZE_S8 = 0,
+    GX_TEXSIZE_S16 = 1,
+    GX_TEXSIZE_S32 = 2,
+    GX_TEXSIZE_S64 = 3,
+    GX_TEXSIZE_S128 = 4,
+    GX_TEXSIZE_S256 = 5,
+    GX_TEXSIZE_S512 = 6,
+    GX_TEXSIZE_S1024 = 7
+} GXTexSizeS;
+
+typedef enum {
+    GX_TEXSIZE_T8 = 0,
+    GX_TEXSIZE_T16 = 1,
+    GX_TEXSIZE_T32 = 2,
+    GX_TEXSIZE_T64 = 3,
+    GX_TEXSIZE_T128 = 4,
+    GX_TEXSIZE_T256 = 5,
+    GX_TEXSIZE_T512 = 6,
+    GX_TEXSIZE_T1024 = 7
+} GXTexSizeT;
+
+typedef enum {
+    GX_TEXFMT_NONE = 0,
+    GX_TEXFMT_A3I5 = 1,
+    GX_TEXFMT_PLTT4 = 2,
+    GX_TEXFMT_PLTT16 = 3,
+    GX_TEXFMT_PLTT256 = 4,
+    GX_TEXFMT_COMP4x4 = 5,
+    GX_TEXFMT_A5I3 = 6,
+    GX_TEXFMT_DIRECT = 7
+} GXTexFmt;
+
+typedef enum {
+    GX_TEXPLTTCOLOR0_USE = 0,
+    GX_TEXPLTTCOLOR0_TRNS = 1
+} GXTexPlttColor0;
+
+typedef enum {
+    GX_LIGHTID_0 = 0,
+    GX_LIGHTID_1 = 1,
+    GX_LIGHTID_2 = 2,
+    GX_LIGHTID_3 = 3
+} GXLightId;
+
+typedef enum {
+    GX_MTXMODE_PROJECTION = 0,
+    GX_MTXMODE_POSITION = 1,
+    GX_MTXMODE_POSITION_VECTOR = 2,
+    GX_MTXMODE_TEXTURE = 3
+} GXMtxMode;
+
+#define GX_PACK_VIEWPORT_PARAM(x1, y1, x2, y2)  ((u32)((x1) | ((y1) << 8) | ((x2) << 16) | ((y2) << 24)))
+
+#endif //NITRO_GX_G3_H_
diff --git a/lib/include/nitro/gx/g3imm.h b/lib/include/nitro/gx/g3imm.h
new file mode 100644
index 0000000000..92858ae466
--- /dev/null
+++ b/lib/include/nitro/gx/g3imm.h
@@ -0,0 +1,26 @@
+#ifndef NITRO_GX_G3IMM_H_
+#define NITRO_GX_G3IMM_H_
+
+typedef enum {
+    GX_SORTMODE_AUTO = 0,
+    GX_SORTMODE_MANUAL = 1
+} GXSortMode;
+
+typedef enum {
+    GX_BUFFERMODE_Z = 0,
+    GX_BUFFERMODE_W = 1
+} GXBufferMode;
+
+#define GX_PACK_SWAPBUFFERS_PARAM(am, zw) \
+    ((u32) (((am) << REG_G3_SWAP_BUFFERS_XS_SHIFT) | \
+            ((zw) << REG_G3_SWAP_BUFFERS_DP_SHIFT)))
+
+static inline void G3_SwapBuffers(GXSortMode am, GXBufferMode zw) {
+    reg_G3_SWAP_BUFFERS = GX_PACK_SWAPBUFFERS_PARAM(am, zw);
+}
+
+static inline void G3_ViewPort(int x1, int y1, int x2, int y2) {
+    reg_G3_VIEWPORT = GX_PACK_VIEWPORT_PARAM(x1, y1, x2, y2);
+}
+
+#endif //NITRO_GX_G3IMM_H_
diff --git a/lib/include/nitro/gx/g3x.h b/lib/include/nitro/gx/g3x.h
new file mode 100644
index 0000000000..9095b194d4
--- /dev/null
+++ b/lib/include/nitro/gx/g3x.h
@@ -0,0 +1,87 @@
+#ifndef NITRO_GX_G3X_H_
+#define NITRO_GX_G3X_H_
+
+typedef enum {
+    GX_SHADING_TOON = 0,
+    GX_SHADING_HIGHLIGHT = 1
+} GXShading;
+
+typedef enum {
+    GX_FOGBLEND_COLOR_ALPHA = 0,
+    GX_FOGBLEND_ALPHA = 1
+} GXFogBlend;
+
+typedef enum {
+    GX_FOGSLOPE_0x8000 = 0,
+    GX_FOGSLOPE_0x4000 = 1,
+    GX_FOGSLOPE_0x2000 = 2,
+    GX_FOGSLOPE_0x1000 = 3,
+    GX_FOGSLOPE_0x0800 = 4,
+    GX_FOGSLOPE_0x0400 = 5,
+    GX_FOGSLOPE_0x0200 = 6,
+    GX_FOGSLOPE_0x0100 = 7,
+    GX_FOGSLOPE_0x0080 = 8,
+    GX_FOGSLOPE_0x0040 = 9,
+    GX_FOGSLOPE_0x0020 = 10
+} GXFogSlope;
+
+void G3X_Init(void);
+void G3X_InitMtxStack(void);
+void G3X_ResetMtxStack(void);
+void G3X_InitTable(void);
+void G3X_Reset(void);
+void G3X_SetFog(BOOL enable, GXFogBlend fogMode, GXFogSlope fogSlope, int fogOffset);
+void G3X_SetClearColor(GXRgb rgb, int alpha, int depth, int polygonID, BOOL fog);
+
+static inline void G3X_SetShading(GXShading shading) {
+    reg_G3X_DISP3DCNT = (u16)((reg_G3X_DISP3DCNT & ~(REG_G3X_DISP3DCNT_THS_MASK | REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK)) | (shading << REG_G3X_DISP3DCNT_THS_SHIFT));
+}
+
+static inline void G3X_AlphaTest(BOOL enable, int ref) {
+    if (enable) {
+        reg_G3X_DISP3DCNT = (u16)(reg_G3X_DISP3DCNT &
+                                  ~(REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK) |
+                                  REG_G3X_DISP3DCNT_ATE_MASK);
+        reg_G3X_ALPHA_TEST_REF = (u16)ref;
+    } else {
+        reg_G3X_DISP3DCNT &= (u16)~(REG_G3X_DISP3DCNT_ATE_MASK |
+                                    REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK);
+    }
+}
+
+static inline void G3X_AlphaBlend(BOOL enable) {
+    if (enable) {
+        reg_G3X_DISP3DCNT = (u16)(reg_G3X_DISP3DCNT &
+                                  ~(REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK) |
+                                  REG_G3X_DISP3DCNT_ABE_MASK);
+    } else {
+        reg_G3X_DISP3DCNT &= (u16)~(REG_G3X_DISP3DCNT_ABE_MASK |
+                                    REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK);
+    }
+}
+
+static inline void G3X_AntiAlias(BOOL enable) {
+    if (enable) {
+        reg_G3X_DISP3DCNT = (u16)(reg_G3X_DISP3DCNT &
+                                  ~(REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK) |
+                                  REG_G3X_DISP3DCNT_AAE_MASK);
+    } else {
+        reg_G3X_DISP3DCNT &= (u16)~(REG_G3X_DISP3DCNT_AAE_MASK |
+                                    REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK);
+    }
+}
+
+static inline void G3X_EdgeMarking(BOOL enable) {
+    if (enable) {
+        reg_G3X_DISP3DCNT = (u16)(reg_G3X_DISP3DCNT &
+                                  ~(REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK) |
+                                  REG_G3X_DISP3DCNT_EME_MASK);
+    } else {
+        reg_G3X_DISP3DCNT &= (u16)~(REG_G3X_DISP3DCNT_EME_MASK |
+                                    REG_G3X_DISP3DCNT_RO_MASK | REG_G3X_DISP3DCNT_GO_MASK);
+    }
+}
+
+void G3X_SetEdgeColorTable(const GXRgb *rgb_8);
+
+#endif //NITRO_GX_G3X_H_
diff --git a/lib/include/nitro/gx/gx.h b/lib/include/nitro/gx/gx.h
new file mode 100644
index 0000000000..07499da706
--- /dev/null
+++ b/lib/include/nitro/gx/gx.h
@@ -0,0 +1,157 @@
+#ifndef NITRO_GX_GX_H_
+#define NITRO_GX_GX_H_
+
+#include <nitro/hw/io_reg.h>
+
+typedef enum {
+    GX_DISPMODE_GRAPHICS = 0x01,
+    GX_DISPMODE_VRAM_A = 0x02,
+    GX_DISPMODE_VRAM_B = 0x06,
+    GX_DISPMODE_VRAM_C = 0x0a,
+    GX_DISPMODE_VRAM_D = 0x0e,
+    GX_DISPMODE_MMEM = 0x03
+} GXDispMode;
+
+typedef enum {
+    GX_BGMODE_0 = 0,
+    GX_BGMODE_1 = 1,
+    GX_BGMODE_2 = 2,
+    GX_BGMODE_3 = 3,
+    GX_BGMODE_4 = 4,
+    GX_BGMODE_5 = 5,
+    GX_BGMODE_6 = 6
+} GXBGMode;
+
+typedef enum {
+    GX_BG0_AS_2D = 0,
+    GX_BG0_AS_3D = 1
+} GXBG0As;
+
+typedef enum {
+    GX_BGSCROFFSET_0x00000 = 0x00,
+    GX_BGSCROFFSET_0x10000 = 0x01,
+    GX_BGSCROFFSET_0x20000 = 0x02,
+    GX_BGSCROFFSET_0x30000 = 0x03,
+    GX_BGSCROFFSET_0x40000 = 0x04,
+    GX_BGSCROFFSET_0x50000 = 0x05,
+    GX_BGSCROFFSET_0x60000 = 0x06,
+    GX_BGSCROFFSET_0x70000 = 0x07
+} GXBGScrOffset;
+
+typedef enum {
+    GX_BGCHAROFFSET_0x00000 = 0x00,
+    GX_BGCHAROFFSET_0x10000 = 0x01,
+    GX_BGCHAROFFSET_0x20000 = 0x02,
+    GX_BGCHAROFFSET_0x30000 = 0x03,
+    GX_BGCHAROFFSET_0x40000 = 0x04,
+    GX_BGCHAROFFSET_0x50000 = 0x05,
+    GX_BGCHAROFFSET_0x60000 = 0x06,
+    GX_BGCHAROFFSET_0x70000 = 0x07
+} GXBGCharOffset;
+
+typedef enum {
+    GX_OBJVRAMMODE_CHAR_2D = (0 << REG_GX_DISPCNT_OBJMAP_SHIFT) | (0 << REG_GX_DISPCNT_EXOBJ_SHIFT),
+    GX_OBJVRAMMODE_CHAR_1D_32K =
+    (1 << REG_GX_DISPCNT_OBJMAP_SHIFT) | (0 << REG_GX_DISPCNT_EXOBJ_SHIFT),
+    GX_OBJVRAMMODE_CHAR_1D_64K =
+    (1 << REG_GX_DISPCNT_OBJMAP_SHIFT) | (1 << REG_GX_DISPCNT_EXOBJ_SHIFT),
+    GX_OBJVRAMMODE_CHAR_1D_128K =
+    (1 << REG_GX_DISPCNT_OBJMAP_SHIFT) | (2 << REG_GX_DISPCNT_EXOBJ_SHIFT),
+    GX_OBJVRAMMODE_CHAR_1D_256K =
+    (1 << REG_GX_DISPCNT_OBJMAP_SHIFT) | (3 << REG_GX_DISPCNT_EXOBJ_SHIFT)
+} GXOBJVRamModeChar;
+
+typedef enum {
+    GX_POWER_OFF = 0,
+
+    GX_POWER_2D_MAIN = 1 << REG_GX_POWCNT_E2DG_SHIFT,
+    GX_POWER_2D_SUB = 1 << REG_GX_POWCNT_E2DGB_SHIFT,
+
+    GX_POWER_RE = 1 << REG_GX_POWCNT_RE_SHIFT,
+    GX_POWER_GE = 1 << REG_GX_POWCNT_GE_SHIFT,
+
+    GX_POWER_2D = GX_POWER_2D_MAIN | GX_POWER_2D_SUB,
+    GX_POWER_3D = GX_POWER_RE | GX_POWER_GE,
+
+    GX_POWER_ALL = GX_POWER_2D | GX_POWER_3D
+} GXPower;
+
+typedef enum {
+    GX_DISP_SELECT_SUB_MAIN = 0,
+    GX_DISP_SELECT_MAIN_SUB = 1
+} GXDispSelect;
+
+void GX_SetGraphicsMode(GXDispMode dispMode, GXBGMode bgMode, GXBG0As bg0_2d3d);
+void GXS_SetGraphicsMode(GXBGMode bgMode);
+
+static inline s32 GX_GetVCount() {
+    return reg_GX_VCOUNT;
+}
+
+static inline s32 GX_GetVCountEqVal(void) {
+    u16 val = reg_GX_DISPSTAT;
+    return ((val >> 8) & 0x00ff) | ((val << 1) & 0x0100);
+}
+
+static inline void GX_VCountEqIntr(BOOL enable) {
+    if (enable) {
+        reg_GX_DISPSTAT |= REG_GX_DISPSTAT_VQI_MASK;
+    } else {
+        reg_GX_DISPSTAT &= ~REG_GX_DISPSTAT_VQI_MASK;
+    }
+}
+
+static inline void GX_SetVCountEqVal(s32 val) {
+    reg_GX_DISPSTAT = (u16)(reg_GX_DISPSTAT & (REG_GX_DISPSTAT_VBLK_MASK | REG_GX_DISPSTAT_HBLK_MASK | REG_GX_DISPSTAT_LYC_MASK | REG_GX_DISPSTAT_VBI_MASK | REG_GX_DISPSTAT_HBI_MASK | REG_GX_DISPSTAT_VQI_MASK) | ((val & 0xFF) << 8) | ((val & 0x100) >> 1));
+}
+
+static inline void GX_SetBGScrOffset(GXBGScrOffset offset)
+{
+    reg_GX_DISPCNT = (u32)((reg_GX_DISPCNT & ~REG_GX_DISPCNT_BGSCREENOFFSET_MASK) |
+                           (offset << REG_GX_DISPCNT_BGSCREENOFFSET_SHIFT));
+}
+
+static inline void GX_SetBGCharOffset(GXBGCharOffset offset) {
+    reg_GX_DISPCNT = (u32)((reg_GX_DISPCNT & ~REG_GX_DISPCNT_BGCHAROFFSET_MASK) |
+                           (offset << REG_GX_DISPCNT_BGCHAROFFSET_SHIFT));
+}
+
+s32 GX_VBlankIntr(BOOL enable);
+s32 GX_HBlankIntr(BOOL enable);
+void GX_Init(void);
+void GX_DispOff(void);
+void GX_DispOn(void);
+
+static inline void GX_SetPower(GXPower gxbit_power) {
+    reg_GX_POWCNT = (reg_GX_POWCNT & ~GX_POWER_ALL) | gxbit_power;
+}
+
+static inline void GXS_DispOff(void) {
+    reg_GXS_DB_DISPCNT &= ~REG_GXS_DB_DISPCNT_MODE_MASK;
+}
+
+static inline void GXS_DispOn(void) {
+    reg_GXS_DB_DISPCNT |= REG_GXS_DB_DISPCNT_MODE_MASK;
+}
+
+static inline void GX_SetDispSelect(GXDispSelect sel) {
+    reg_GX_POWCNT = (reg_GX_POWCNT & ~REG_GX_POWCNT_DSEL_MASK) | (sel << REG_GX_POWCNT_DSEL_SHIFT);
+}
+
+static inline void GX_SetVisiblePlane(int plane) {
+    reg_GX_DISPCNT = (u32)((reg_GX_DISPCNT & ~REG_GX_DISPCNT_DISPLAY_MASK) | (plane << REG_GX_DISPCNT_DISPLAY_SHIFT));
+}
+
+static inline void GXS_SetVisiblePlane(int plane) {
+    reg_GXS_DB_DISPCNT = (u32)((reg_GXS_DB_DISPCNT & ~REG_GXS_DB_DISPCNT_DISPLAY_MASK) | (plane << REG_GXS_DB_DISPCNT_DISPLAY_SHIFT));
+}
+
+static inline void GX_SetVisibleWnd(int window) {
+    reg_GX_DISPCNT = (u32)((reg_GX_DISPCNT & ~(REG_GX_DISPCNT_W0_MASK | REG_GX_DISPCNT_W1_MASK | REG_GX_DISPCNT_OW_MASK)) | (window << REG_GX_DISPCNT_W0_SHIFT));
+}
+
+static inline void GXS_SetVisibleWnd(int window) {
+    reg_GXS_DB_DISPCNT = (u32)((reg_GXS_DB_DISPCNT & ~(REG_GXS_DB_DISPCNT_W0_MASK | REG_GXS_DB_DISPCNT_W1_MASK | REG_GXS_DB_DISPCNT_OW_MASK)) | (window << REG_GXS_DB_DISPCNT_W0_SHIFT));
+}
+
+#endif //NITRO_GX_GX_H_
diff --git a/lib/include/nitro/gx/gx_bgcnt.h b/lib/include/nitro/gx/gx_bgcnt.h
new file mode 100644
index 0000000000..cefd4ae38b
--- /dev/null
+++ b/lib/include/nitro/gx/gx_bgcnt.h
@@ -0,0 +1,614 @@
+#ifndef NITRO_GX_GX_BGCNT_H
+#define NITRO_GX_GX_BGCNT_H
+
+void *G2_GetBG0ScrPtr();
+void *G2S_GetBG0ScrPtr();
+void *G2_GetBG1ScrPtr();
+void *G2S_GetBG1ScrPtr();
+void *G2_GetBG2ScrPtr();
+void *G2S_GetBG2ScrPtr();
+void *G2_GetBG3ScrPtr();
+void *G2S_GetBG3ScrPtr();
+void *G2_GetBG0CharPtr();
+void *G2S_GetBG0CharPtr();
+void *G2_GetBG1CharPtr();
+void *G2S_GetBG1CharPtr();
+void *G2_GetBG2CharPtr();
+void *G2S_GetBG2CharPtr();
+void *G2_GetBG3CharPtr();
+void *G2S_GetBG3CharPtr();
+
+typedef union {
+    u16     raw;
+    struct {
+        u16     priority:2;
+        u16     charBase:4;
+        u16     mosaic:1;
+        u16     colorMode:1;
+        u16     screenBase:5;
+        u16     bgExtPltt:1;
+        u16     screenSize:2;
+    };
+} GXBg01Control;
+
+typedef union {
+    u16     raw;
+    struct {
+        u16     priority:2;
+        u16     charBase:4;
+        u16     mosaic:1;
+        u16     colorMode:1;
+        u16     screenBase:5;
+        u16     _reserve:1;
+        u16     screenSize:2;
+    };
+} GXBg23ControlText;
+
+typedef union {
+    u16     raw;
+    struct {
+        u16     priority:2;
+        u16     charBase:4;
+        u16     mosaic:1;
+        u16     _reserve:1;
+        u16     screenBase:5;
+        u16     areaOver:1;
+        u16     screenSize:2;
+    };
+} GXBg23ControlAffine;
+
+typedef union {
+    u16     raw;
+    struct {
+        u16     priority:2;
+        u16     _reserve1:1;
+        u16     charBase:3;
+        u16     mosaic:1;
+        u16     _reserve2:1;
+        u16     screenBase:5;
+        u16     areaOver:1;
+        u16     screenSize:2;
+    };
+} GXBg23Control256x16Pltt;
+
+
+typedef union {
+    u16     raw;
+    struct {
+        u16     priority:2;
+        u16     _reserve1:4;
+        u16     mosaic:1;
+        u16     _reserve2:1;
+        u16     screenBase:5;
+        u16     areaOver:1;
+        u16     screenSize:2;
+    };
+}
+ GXBg23Control256Bmp, GXBg23ControlDCBmp;
+
+typedef union {
+    u16     raw;
+    struct {
+        u16     priority:2;
+        u16     _reserve1:4;
+        u16     mosaic:1;
+        u16     _reserve2:6;
+        u16     areaOver:1;
+        u16     screenSize:2;
+    };
+} GXBg2ControlLargeBmp;
+
+
+
+typedef enum {
+    GX_BG_SCRSIZE_TEXT_256x256 = 0,
+    GX_BG_SCRSIZE_TEXT_512x256 = 1,
+    GX_BG_SCRSIZE_TEXT_256x512 = 2,
+    GX_BG_SCRSIZE_TEXT_512x512 = 3
+} GXBGScrSizeText;
+
+typedef enum {
+    GX_BG_SCRSIZE_AFFINE_128x128 = 0,
+    GX_BG_SCRSIZE_AFFINE_256x256 = 1,
+    GX_BG_SCRSIZE_AFFINE_512x512 = 2,
+    GX_BG_SCRSIZE_AFFINE_1024x1024 = 3
+} GXBGScrSizeAffine;
+
+typedef enum {
+    GX_BG_SCRSIZE_256x16PLTT_128x128 = 0,
+    GX_BG_SCRSIZE_256x16PLTT_256x256 = 1,
+    GX_BG_SCRSIZE_256x16PLTT_512x512 = 2,
+    GX_BG_SCRSIZE_256x16PLTT_1024x1024 = 3
+} GXBGScrSize256x16Pltt;
+
+typedef enum {
+    GX_BG_SCRSIZE_256BMP_128x128 = 0,
+    GX_BG_SCRSIZE_256BMP_256x256 = 1,
+    GX_BG_SCRSIZE_256BMP_512x256 = 2,
+    GX_BG_SCRSIZE_256BMP_512x512 = 3
+} GXBGScrSize256Bmp;
+
+typedef enum {
+    GX_BG_SCRSIZE_DCBMP_128x128 = 0,
+    GX_BG_SCRSIZE_DCBMP_256x256 = 1,
+    GX_BG_SCRSIZE_DCBMP_512x256 = 2,
+    GX_BG_SCRSIZE_DCBMP_512x512 = 3
+} GXBGScrSizeDcBmp;
+
+typedef enum {
+    GX_BG_SCRSIZE_LARGEBMP_512x1024 = 0,
+    GX_BG_SCRSIZE_LARGEBMP_1024x512 = 1
+} GXBGScrSizeLargeBmp;
+
+typedef enum {
+    GX_BG_COLORMODE_16 = 0,
+    GX_BG_COLORMODE_256 = 1
+} GXBGColorMode;
+
+typedef enum {
+    GX_BG_AREAOVER_XLU = 0,
+    GX_BG_AREAOVER_REPEAT = 1
+} GXBGAreaOver;
+
+typedef enum {
+    GX_BG_CHARBASE_0x00000 = 0,
+    GX_BG_CHARBASE_0x04000 = 1,
+    GX_BG_CHARBASE_0x08000 = 2,
+    GX_BG_CHARBASE_0x0c000 = 3,
+    GX_BG_CHARBASE_0x10000 = 4,
+    GX_BG_CHARBASE_0x14000 = 5,
+    GX_BG_CHARBASE_0x18000 = 6,
+    GX_BG_CHARBASE_0x1c000 = 7,
+    GX_BG_CHARBASE_0x20000 = 8,
+    GX_BG_CHARBASE_0x24000 = 9,
+    GX_BG_CHARBASE_0x28000 = 10,
+    GX_BG_CHARBASE_0x2c000 = 11,
+    GX_BG_CHARBASE_0x30000 = 12,
+    GX_BG_CHARBASE_0x34000 = 13,
+    GX_BG_CHARBASE_0x38000 = 14,
+    GX_BG_CHARBASE_0x3c000 = 15
+} GXBGCharBase;
+
+typedef enum {
+    GX_BG_SCRBASE_0x0000 = 0,
+    GX_BG_SCRBASE_0x0800 = 1,
+    GX_BG_SCRBASE_0x1000 = 2,
+    GX_BG_SCRBASE_0x1800 = 3,
+    GX_BG_SCRBASE_0x2000 = 4,
+    GX_BG_SCRBASE_0x2800 = 5,
+    GX_BG_SCRBASE_0x3000 = 6,
+    GX_BG_SCRBASE_0x3800 = 7,
+    GX_BG_SCRBASE_0x4000 = 8,
+    GX_BG_SCRBASE_0x4800 = 9,
+    GX_BG_SCRBASE_0x5000 = 10,
+    GX_BG_SCRBASE_0x5800 = 11,
+    GX_BG_SCRBASE_0x6000 = 12,
+    GX_BG_SCRBASE_0x6800 = 13,
+    GX_BG_SCRBASE_0x7000 = 14,
+    GX_BG_SCRBASE_0x7800 = 15,
+    GX_BG_SCRBASE_0x8000 = 16,
+    GX_BG_SCRBASE_0x8800 = 17,
+    GX_BG_SCRBASE_0x9000 = 18,
+    GX_BG_SCRBASE_0x9800 = 19,
+    GX_BG_SCRBASE_0xa000 = 20,
+    GX_BG_SCRBASE_0xa800 = 21,
+    GX_BG_SCRBASE_0xb000 = 22,
+    GX_BG_SCRBASE_0xb800 = 23,
+    GX_BG_SCRBASE_0xc000 = 24,
+    GX_BG_SCRBASE_0xc800 = 25,
+    GX_BG_SCRBASE_0xd000 = 26,
+    GX_BG_SCRBASE_0xd800 = 27,
+    GX_BG_SCRBASE_0xe000 = 28,
+    GX_BG_SCRBASE_0xe800 = 29,
+    GX_BG_SCRBASE_0xf000 = 30,
+    GX_BG_SCRBASE_0xf800 = 31
+} GXBGScrBase;
+
+typedef enum {
+    GX_BG_BMPSCRBASE_0x00000 = 0,
+    GX_BG_BMPSCRBASE_0x04000 = 1,
+    GX_BG_BMPSCRBASE_0x08000 = 2,
+    GX_BG_BMPSCRBASE_0x0c000 = 3,
+    GX_BG_BMPSCRBASE_0x10000 = 4,
+    GX_BG_BMPSCRBASE_0x14000 = 5,
+    GX_BG_BMPSCRBASE_0x18000 = 6,
+    GX_BG_BMPSCRBASE_0x1c000 = 7,
+    GX_BG_BMPSCRBASE_0x20000 = 8,
+    GX_BG_BMPSCRBASE_0x24000 = 9,
+    GX_BG_BMPSCRBASE_0x28000 = 10,
+    GX_BG_BMPSCRBASE_0x2c000 = 11,
+    GX_BG_BMPSCRBASE_0x30000 = 12,
+    GX_BG_BMPSCRBASE_0x34000 = 13,
+    GX_BG_BMPSCRBASE_0x38000 = 14,
+    GX_BG_BMPSCRBASE_0x3c000 = 15,
+    GX_BG_BMPSCRBASE_0x40000 = 16,
+    GX_BG_BMPSCRBASE_0x44000 = 17,
+    GX_BG_BMPSCRBASE_0x48000 = 18,
+    GX_BG_BMPSCRBASE_0x4c000 = 19,
+    GX_BG_BMPSCRBASE_0x50000 = 20,
+    GX_BG_BMPSCRBASE_0x54000 = 21,
+    GX_BG_BMPSCRBASE_0x58000 = 22,
+    GX_BG_BMPSCRBASE_0x5c000 = 23,
+    GX_BG_BMPSCRBASE_0x60000 = 24,
+    GX_BG_BMPSCRBASE_0x64000 = 25,
+    GX_BG_BMPSCRBASE_0x68000 = 26,
+    GX_BG_BMPSCRBASE_0x6c000 = 27,
+    GX_BG_BMPSCRBASE_0x70000 = 28,
+    GX_BG_BMPSCRBASE_0x74000 = 29,
+    GX_BG_BMPSCRBASE_0x78000 = 30,
+    GX_BG_BMPSCRBASE_0x7c000 = 31
+} GXBGBmpScrBase;
+
+typedef enum {
+    GX_BG_EXTPLTT_01 = 0,
+    GX_BG_EXTPLTT_23 = 1
+} GXBGExtPltt;
+
+typedef enum {
+    GX_BG_EXTMODE_256x16PLTT = (0 << REG_G2_BG2CNT_CHARBASE_SHIFT) | (0 << REG_G2_BG2CNT_COLORMODE_SHIFT),
+    GX_BG_EXTMODE_256BITMAP  = (0 << REG_G2_BG2CNT_CHARBASE_SHIFT) | (1 << REG_G2_BG2CNT_COLORMODE_SHIFT),
+    GX_BG_EXTMODE_DCBITMAP   = (1 << REG_G2_BG2CNT_CHARBASE_SHIFT) | (1 << REG_G2_BG2CNT_COLORMODE_SHIFT)
+} GXBGExtMode;
+
+//GX_capture
+typedef enum {
+    GX_CAPTURE_DEST_VRAM_A_0x00000 = 0,
+    GX_CAPTURE_DEST_VRAM_B_0x00000 = 1,
+    GX_CAPTURE_DEST_VRAM_C_0x00000 = 2,
+    GX_CAPTURE_DEST_VRAM_D_0x00000 = 3,
+
+    GX_CAPTURE_DEST_VRAM_A_0x08000 = 4,
+    GX_CAPTURE_DEST_VRAM_B_0x08000 = 5,
+    GX_CAPTURE_DEST_VRAM_C_0x08000 = 6,
+    GX_CAPTURE_DEST_VRAM_D_0x08000 = 7,
+
+    GX_CAPTURE_DEST_VRAM_A_0x10000 = 8,
+    GX_CAPTURE_DEST_VRAM_B_0x10000 = 9,
+    GX_CAPTURE_DEST_VRAM_C_0x10000 = 10,
+    GX_CAPTURE_DEST_VRAM_D_0x10000 = 11,
+
+    GX_CAPTURE_DEST_VRAM_A_0x18000 = 12,
+    GX_CAPTURE_DEST_VRAM_B_0x18000 = 13,
+    GX_CAPTURE_DEST_VRAM_C_0x18000 = 14,
+    GX_CAPTURE_DEST_VRAM_D_0x18000 = 15
+} GXCaptureDest;
+
+typedef enum {
+    GX_CAPTURE_SIZE_128x128 = 0,
+    GX_CAPTURE_SIZE_256x64 = 1,
+    GX_CAPTURE_SIZE_256x128 = 2,
+    GX_CAPTURE_SIZE_256x192 = 3
+} GXCaptureSize;
+
+typedef enum {
+    GX_CAPTURE_SRCA_2D3D = 0,
+    GX_CAPTURE_SRCA_3D = 1
+} GXCaptureSrcA;
+
+typedef enum {
+    GX_CAPTURE_SRCB_VRAM_0x00000 = 0,
+    GX_CAPTURE_SRCB_MRAM = 1,
+    GX_CAPTURE_SRCB_VRAM_0x08000 = 2,
+    GX_CAPTURE_SRCB_VRAM_0x10000 = 4,
+    GX_CAPTURE_SRCB_VRAM_0x18000 = 6
+} GXCaptureSrcB;
+
+typedef enum {
+    GX_CAPTURE_MODE_A = 0,
+    GX_CAPTURE_MODE_B = 1,
+    GX_CAPTURE_MODE_AB = 2
+} GXCaptureMode;
+
+static inline void G2_SetBG0Control(GXBGScrSizeText screenSize, GXBGColorMode colorMode, GXBGScrBase screenBase, GXBGCharBase charBase, GXBGExtPltt bgExtPltt) {
+    reg_G2_BG0CNT = (u16)((reg_G2_BG0CNT & (REG_G2_BG0CNT_PRIORITY_MASK | REG_G2_BG0CNT_MOSAIC_MASK)) | (screenSize << REG_G2_BG0CNT_SCREENSIZE_SHIFT) | (colorMode << REG_G2_BG0CNT_COLORMODE_SHIFT) | (screenBase << REG_G2_BG0CNT_SCREENBASE_SHIFT) | (charBase << REG_G2_BG0CNT_CHARBASE_SHIFT) | (bgExtPltt << REG_G2_BG0CNT_BGPLTTSLOT_SHIFT));
+}
+
+static inline void G2S_SetBG0Control(GXBGScrSizeText screenSize, GXBGColorMode colorMode, GXBGScrBase screenBase, GXBGCharBase charBase, GXBGExtPltt bgExtPltt) {
+    reg_G2S_DB_BG0CNT = (u16)((reg_G2S_DB_BG0CNT & (REG_G2S_DB_BG0CNT_PRIORITY_MASK | REG_G2S_DB_BG0CNT_MOSAIC_MASK)) | (screenSize << REG_G2S_DB_BG0CNT_SCREENSIZE_SHIFT) | (colorMode << REG_G2S_DB_BG0CNT_COLORMODE_SHIFT) | (screenBase << REG_G2S_DB_BG0CNT_SCREENBASE_SHIFT) | (charBase << REG_G2S_DB_BG0CNT_CHARBASE_SHIFT) | (bgExtPltt << REG_G2S_DB_BG0CNT_BGPLTTSLOT_SHIFT));
+}
+
+static inline void G2_SetBG1Control(GXBGScrSizeText screenSize, GXBGColorMode colorMode, GXBGScrBase screenBase, GXBGCharBase charBase, GXBGExtPltt bgExtPltt) {
+    reg_G2_BG1CNT = (u16)((reg_G2_BG1CNT & (REG_G2_BG1CNT_PRIORITY_MASK | REG_G2_BG1CNT_MOSAIC_MASK)) | (screenSize << REG_G2_BG1CNT_SCREENSIZE_SHIFT) | (colorMode << REG_G2_BG1CNT_COLORMODE_SHIFT) | (screenBase << REG_G2_BG1CNT_SCREENBASE_SHIFT) | (charBase << REG_G2_BG1CNT_CHARBASE_SHIFT) | (bgExtPltt << REG_G2_BG1CNT_BGPLTTSLOT_SHIFT));
+}
+
+static inline void G2S_SetBG1Control(GXBGScrSizeText screenSize, GXBGColorMode colorMode, GXBGScrBase screenBase, GXBGCharBase charBase, GXBGExtPltt bgExtPltt) {
+    reg_G2S_DB_BG1CNT = (u16)((reg_G2S_DB_BG1CNT & (REG_G2S_DB_BG1CNT_PRIORITY_MASK | REG_G2S_DB_BG1CNT_MOSAIC_MASK)) | (screenSize << REG_G2S_DB_BG1CNT_SCREENSIZE_SHIFT) | (colorMode << REG_G2S_DB_BG1CNT_COLORMODE_SHIFT) | (screenBase << REG_G2S_DB_BG1CNT_SCREENBASE_SHIFT) | (charBase << REG_G2S_DB_BG1CNT_CHARBASE_SHIFT) | (bgExtPltt << REG_G2S_DB_BG1CNT_BGPLTTSLOT_SHIFT));
+}
+
+static inline void G2_SetBG2ControlText(GXBGScrSizeText screenSize, GXBGColorMode colorMode, GXBGScrBase screenBase, GXBGCharBase charBase) {
+    reg_G2_BG2CNT = (u16)((reg_G2_BG2CNT & ((REG_G2_BG2CNT_PRIORITY_MASK | REG_G2_BG2CNT_MOSAIC_MASK))) | (screenSize << REG_G2_BG2CNT_SCREENSIZE_SHIFT) | (colorMode << REG_G2_BG2CNT_COLORMODE_SHIFT) | (screenBase << REG_G2_BG2CNT_SCREENBASE_SHIFT) | (charBase << REG_G2_BG2CNT_CHARBASE_SHIFT));
+}
+
+static inline void G2S_SetBG2ControlText(GXBGScrSizeText screenSize, GXBGColorMode colorMode, GXBGScrBase screenBase, GXBGCharBase charBase) {
+    reg_G2S_DB_BG2CNT = (u16)((reg_G2S_DB_BG2CNT & ((REG_G2S_DB_BG2CNT_PRIORITY_MASK | REG_G2S_DB_BG2CNT_MOSAIC_MASK))) | (screenSize << REG_G2S_DB_BG2CNT_SCREENSIZE_SHIFT) | (colorMode << REG_G2S_DB_BG2CNT_COLORMODE_SHIFT) | (screenBase << REG_G2S_DB_BG2CNT_SCREENBASE_SHIFT) | (charBase << REG_G2S_DB_BG2CNT_CHARBASE_SHIFT));
+}
+
+static inline void G2_SetBG2ControlAffine(GXBGScrSizeAffine screenSize, GXBGAreaOver areaOver, GXBGScrBase screenBase, GXBGCharBase charBase) {
+    reg_G2_BG2CNT = (u16)((reg_G2_BG2CNT & ((REG_G2_BG2CNT_PRIORITY_MASK | REG_G2_BG2CNT_MOSAIC_MASK))) | (screenSize << REG_G2_BG2CNT_SCREENSIZE_SHIFT) | (screenBase << REG_G2_BG2CNT_SCREENBASE_SHIFT) | (charBase << REG_G2_BG2CNT_CHARBASE_SHIFT) | (areaOver << REG_G2_BG2CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2S_SetBG2ControlAffine(GXBGScrSizeAffine screenSize, GXBGAreaOver areaOver, GXBGScrBase screenBase, GXBGCharBase charBase) {
+    reg_G2S_DB_BG2CNT = (u16)((reg_G2S_DB_BG2CNT & ((REG_G2S_DB_BG2CNT_PRIORITY_MASK | REG_G2S_DB_BG2CNT_MOSAIC_MASK))) | (screenSize << REG_G2S_DB_BG2CNT_SCREENSIZE_SHIFT) | (screenBase << REG_G2S_DB_BG2CNT_SCREENBASE_SHIFT) | (charBase << REG_G2S_DB_BG2CNT_CHARBASE_SHIFT) | (areaOver << REG_G2S_DB_BG2CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2_SetBG2Control256x16Pltt(GXBGScrSize256x16Pltt screenSize, GXBGAreaOver areaOver, GXBGScrBase screenBase, GXBGCharBase charBase) {
+    reg_G2_BG2CNT = (u16)((reg_G2_BG2CNT & (REG_G2_BG2CNT_PRIORITY_MASK | REG_G2_BG2CNT_MOSAIC_MASK)) | (screenSize << REG_G2_BG2CNT_SCREENSIZE_SHIFT) | (charBase << REG_G2_BG2CNT_CHARBASE_SHIFT) | GX_BG_EXTMODE_256x16PLTT | (screenBase << REG_G2_BG2CNT_SCREENBASE_SHIFT) | (areaOver << REG_G2_BG2CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2S_SetBG2Control256x16Pltt(GXBGScrSize256x16Pltt screenSize, GXBGAreaOver areaOver, GXBGScrBase screenBase, GXBGCharBase charBase) {
+    reg_G2S_DB_BG2CNT = (u16)((reg_G2S_DB_BG2CNT & (REG_G2S_DB_BG2CNT_PRIORITY_MASK | REG_G2S_DB_BG2CNT_MOSAIC_MASK)) | (screenSize << REG_G2S_DB_BG2CNT_SCREENSIZE_SHIFT) | (charBase << REG_G2S_DB_BG2CNT_CHARBASE_SHIFT) | GX_BG_EXTMODE_256x16PLTT | (screenBase << REG_G2S_DB_BG2CNT_SCREENBASE_SHIFT) | (areaOver << REG_G2S_DB_BG2CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2_SetBG2Control256Bmp(GXBGScrSize256Bmp screenSize, GXBGAreaOver areaOver, GXBGBmpScrBase screenBase) {
+    reg_G2_BG2CNT = (u16)((reg_G2_BG2CNT & (REG_G2_BG2CNT_PRIORITY_MASK | REG_G2_BG2CNT_MOSAIC_MASK)) | (screenSize << REG_G2_BG2CNT_SCREENSIZE_SHIFT) | GX_BG_EXTMODE_256BITMAP | (screenBase << REG_G2_BG2CNT_SCREENBASE_SHIFT) | (areaOver << REG_G2_BG2CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2S_SetBG2Control256Bmp(GXBGScrSize256Bmp screenSize, GXBGAreaOver areaOver, GXBGBmpScrBase screenBase) {
+    reg_G2S_DB_BG2CNT = (u16)((reg_G2S_DB_BG2CNT & (REG_G2S_DB_BG2CNT_PRIORITY_MASK | REG_G2S_DB_BG2CNT_MOSAIC_MASK)) | (screenSize << REG_G2S_DB_BG2CNT_SCREENSIZE_SHIFT) | GX_BG_EXTMODE_256BITMAP | (screenBase << REG_G2S_DB_BG2CNT_SCREENBASE_SHIFT) | (areaOver << REG_G2S_DB_BG2CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2_SetBG2ControlDCBmp(GXBGScrSizeDcBmp screenSize, GXBGAreaOver areaOver, GXBGBmpScrBase screenBase) {
+    reg_G2_BG2CNT = (u16)((reg_G2_BG2CNT & (REG_G2_BG2CNT_PRIORITY_MASK | REG_G2_BG2CNT_MOSAIC_MASK)) | (screenSize << REG_G2_BG2CNT_SCREENSIZE_SHIFT) | GX_BG_EXTMODE_DCBITMAP | (screenBase << REG_G2_BG2CNT_SCREENBASE_SHIFT) | (areaOver << REG_G2_BG2CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2S_SetBG2ControlDCBmp(GXBGScrSizeDcBmp screenSize, GXBGAreaOver areaOver, GXBGBmpScrBase screenBase) {
+    reg_G2S_DB_BG2CNT = (u16)((reg_G2S_DB_BG2CNT & (REG_G2S_DB_BG2CNT_PRIORITY_MASK | REG_G2S_DB_BG2CNT_MOSAIC_MASK)) | (screenSize << REG_G2S_DB_BG2CNT_SCREENSIZE_SHIFT) | GX_BG_EXTMODE_DCBITMAP | (screenBase << REG_G2S_DB_BG2CNT_SCREENBASE_SHIFT) | (areaOver << REG_G2S_DB_BG2CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2_SetBG2ControlLargeBmp(GXBGScrSizeLargeBmp screenSize, GXBGAreaOver areaOver) {
+    reg_G2_BG2CNT = (u16)((reg_G2_BG2CNT & (REG_G2_BG2CNT_PRIORITY_MASK | REG_G2_BG2CNT_MOSAIC_MASK)) | (screenSize << REG_G2_BG2CNT_SCREENSIZE_SHIFT) | (areaOver << REG_G2_BG2CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2S_SetBG2ControlLargeBmp(GXBGScrSizeLargeBmp screenSize, GXBGAreaOver areaOver) {
+    reg_G2S_DB_BG2CNT = (u16)((reg_G2S_DB_BG2CNT & (REG_G2S_DB_BG2CNT_PRIORITY_MASK | REG_G2S_DB_BG2CNT_MOSAIC_MASK)) | (screenSize << REG_G2S_DB_BG2CNT_SCREENSIZE_SHIFT) | (areaOver << REG_G2S_DB_BG2CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2_SetBG3ControlText(GXBGScrSizeText screenSize, GXBGColorMode colorMode, GXBGScrBase screenBase, GXBGCharBase charBase) {
+    reg_G2_BG3CNT = (u16)((reg_G2_BG3CNT & ((REG_G2_BG3CNT_PRIORITY_MASK | REG_G2_BG3CNT_MOSAIC_MASK))) | (screenSize << REG_G2_BG3CNT_SCREENSIZE_SHIFT) | (colorMode << REG_G2_BG3CNT_COLORMODE_SHIFT) | (screenBase << REG_G2_BG3CNT_SCREENBASE_SHIFT) | (charBase << REG_G2_BG3CNT_CHARBASE_SHIFT));
+}
+
+static inline void G2S_SetBG3ControlText(GXBGScrSizeText screenSize, GXBGColorMode colorMode, GXBGScrBase screenBase, GXBGCharBase charBase) {
+    reg_G2S_DB_BG3CNT = (u16)((reg_G2S_DB_BG3CNT & ((REG_G2S_DB_BG3CNT_PRIORITY_MASK | REG_G2S_DB_BG3CNT_MOSAIC_MASK))) | (screenSize << REG_G2S_DB_BG3CNT_SCREENSIZE_SHIFT) | (colorMode << REG_G2S_DB_BG3CNT_COLORMODE_SHIFT) | (screenBase << REG_G2S_DB_BG3CNT_SCREENBASE_SHIFT) | (charBase << REG_G2S_DB_BG3CNT_CHARBASE_SHIFT));
+}
+
+static inline void G2_SetBG3ControlAffine(GXBGScrSizeAffine screenSize, GXBGAreaOver areaOver, GXBGScrBase screenBase, GXBGCharBase charBase) {
+    reg_G2_BG3CNT = (u16)((reg_G2_BG3CNT & ((REG_G2_BG3CNT_PRIORITY_MASK | REG_G2_BG3CNT_MOSAIC_MASK))) | (screenSize << REG_G2_BG3CNT_SCREENSIZE_SHIFT) | (screenBase << REG_G2_BG3CNT_SCREENBASE_SHIFT) | (charBase << REG_G2_BG3CNT_CHARBASE_SHIFT) | (areaOver << REG_G2_BG3CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2S_SetBG3ControlAffine(GXBGScrSizeAffine screenSize, GXBGAreaOver areaOver, GXBGScrBase screenBase, GXBGCharBase charBase) {
+    reg_G2S_DB_BG3CNT = (u16)((reg_G2S_DB_BG3CNT & ((REG_G2S_DB_BG3CNT_PRIORITY_MASK | REG_G2S_DB_BG3CNT_MOSAIC_MASK))) | (screenSize << REG_G2S_DB_BG3CNT_SCREENSIZE_SHIFT) | (screenBase << REG_G2S_DB_BG3CNT_SCREENBASE_SHIFT) | (charBase << REG_G2S_DB_BG3CNT_CHARBASE_SHIFT) | (areaOver << REG_G2S_DB_BG3CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2_SetBG3Control256x16Pltt(GXBGScrSize256x16Pltt screenSize, GXBGAreaOver areaOver, GXBGScrBase screenBase, GXBGCharBase charBase) {
+    reg_G2_BG3CNT = (u16)((reg_G2_BG3CNT & (REG_G2_BG3CNT_PRIORITY_MASK | REG_G2_BG3CNT_MOSAIC_MASK)) | (screenSize << REG_G2_BG3CNT_SCREENSIZE_SHIFT) | (charBase << REG_G2_BG3CNT_CHARBASE_SHIFT) | GX_BG_EXTMODE_256x16PLTT | (screenBase << REG_G2_BG3CNT_SCREENBASE_SHIFT) | (areaOver << REG_G2_BG3CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2S_SetBG3Control256x16Pltt(GXBGScrSize256x16Pltt screenSize, GXBGAreaOver areaOver, GXBGScrBase screenBase, GXBGCharBase charBase) {
+    reg_G2S_DB_BG3CNT = (u16)((reg_G2S_DB_BG3CNT & (REG_G2S_DB_BG3CNT_PRIORITY_MASK | REG_G2S_DB_BG3CNT_MOSAIC_MASK)) | (screenSize << REG_G2S_DB_BG3CNT_SCREENSIZE_SHIFT) | (charBase << REG_G2S_DB_BG3CNT_CHARBASE_SHIFT) | GX_BG_EXTMODE_256x16PLTT | (screenBase << REG_G2S_DB_BG3CNT_SCREENBASE_SHIFT) | (areaOver << REG_G2S_DB_BG3CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2_SetBG3Control256Bmp(GXBGScrSize256Bmp screenSize, GXBGAreaOver areaOver, GXBGBmpScrBase screenBase) {
+    reg_G2_BG3CNT = (u16)((reg_G2_BG3CNT & (REG_G2_BG3CNT_PRIORITY_MASK | REG_G2_BG3CNT_MOSAIC_MASK)) | (screenSize << REG_G2_BG3CNT_SCREENSIZE_SHIFT) | GX_BG_EXTMODE_256BITMAP | (screenBase << REG_G2_BG3CNT_SCREENBASE_SHIFT) | (areaOver << REG_G2_BG3CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2S_SetBG3Control256Bmp(GXBGScrSize256Bmp screenSize, GXBGAreaOver areaOver, GXBGBmpScrBase screenBase) {
+    reg_G2S_DB_BG3CNT = (u16)((reg_G2S_DB_BG3CNT & (REG_G2S_DB_BG3CNT_PRIORITY_MASK | REG_G2S_DB_BG3CNT_MOSAIC_MASK)) | (screenSize << REG_G2S_DB_BG3CNT_SCREENSIZE_SHIFT) | GX_BG_EXTMODE_256BITMAP | (screenBase << REG_G2S_DB_BG3CNT_SCREENBASE_SHIFT) | (areaOver << REG_G2S_DB_BG3CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2_SetBG3ControlDCBmp(GXBGScrSizeDcBmp screenSize, GXBGAreaOver areaOver, GXBGBmpScrBase screenBase) {
+    reg_G2_BG3CNT = (u16)((reg_G2_BG3CNT & (REG_G2_BG3CNT_PRIORITY_MASK | REG_G2_BG3CNT_MOSAIC_MASK)) | (screenSize << REG_G2_BG3CNT_SCREENSIZE_SHIFT) | GX_BG_EXTMODE_DCBITMAP | (screenBase << REG_G2_BG3CNT_SCREENBASE_SHIFT) | (areaOver << REG_G2_BG3CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2S_SetBG3ControlDCBmp(GXBGScrSizeDcBmp screenSize, GXBGAreaOver areaOver, GXBGBmpScrBase screenBase) {
+    reg_G2S_DB_BG3CNT = (u16)((reg_G2S_DB_BG3CNT & (REG_G2S_DB_BG3CNT_PRIORITY_MASK | REG_G2S_DB_BG3CNT_MOSAIC_MASK)) | (screenSize << REG_G2S_DB_BG3CNT_SCREENSIZE_SHIFT) | GX_BG_EXTMODE_DCBITMAP | (screenBase << REG_G2S_DB_BG3CNT_SCREENBASE_SHIFT) | (areaOver << REG_G2S_DB_BG3CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2_SetBG3ControlLargeBmp(GXBGScrSizeLargeBmp screenSize, GXBGAreaOver areaOver) {
+    reg_G2_BG3CNT = (u16)((reg_G2_BG3CNT & (REG_G2_BG3CNT_PRIORITY_MASK | REG_G2_BG3CNT_MOSAIC_MASK)) | (screenSize << REG_G2_BG3CNT_SCREENSIZE_SHIFT) | (areaOver << REG_G2_BG3CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2S_SetBG3ControlLargeBmp(GXBGScrSizeLargeBmp screenSize, GXBGAreaOver areaOver) {
+    reg_G2S_DB_BG3CNT = (u16)((reg_G2S_DB_BG3CNT & (REG_G2S_DB_BG3CNT_PRIORITY_MASK | REG_G2S_DB_BG3CNT_MOSAIC_MASK)) | (screenSize << REG_G2S_DB_BG3CNT_SCREENSIZE_SHIFT) | (areaOver << REG_G2S_DB_BG3CNT_AREAOVER_SHIFT));
+}
+
+static inline void G2_BG0Mosaic(BOOL enable) {
+    if (enable) {
+        reg_G2_BG0CNT |= REG_G2_BG0CNT_MOSAIC_MASK;
+    } else {
+        reg_G2_BG0CNT &= ~REG_G2_BG0CNT_MOSAIC_MASK;
+    }
+}
+
+static inline void G2S_BG0Mosaic(BOOL enable) {
+    if (enable) {
+        reg_G2S_DB_BG0CNT |= REG_G2S_DB_BG0CNT_MOSAIC_MASK;
+    } else {
+        reg_G2S_DB_BG0CNT &= ~REG_G2S_DB_BG0CNT_MOSAIC_MASK;
+    }
+}
+
+static inline void G2_BG1Mosaic(BOOL enable) {
+    if (enable) {
+        reg_G2_BG1CNT |= REG_G2_BG1CNT_MOSAIC_MASK;
+    } else {
+        reg_G2_BG1CNT &= ~REG_G2_BG1CNT_MOSAIC_MASK;
+    }
+}
+
+static inline void G2S_BG1Mosaic(BOOL enable) {
+    if (enable) {
+        reg_G2S_DB_BG1CNT |= REG_G2S_DB_BG1CNT_MOSAIC_MASK;
+    } else {
+        reg_G2S_DB_BG1CNT &= ~REG_G2S_DB_BG1CNT_MOSAIC_MASK;
+    }
+}
+
+static inline void G2_BG2Mosaic(BOOL enable) {
+    if (enable) {
+        reg_G2_BG2CNT |= REG_G2_BG2CNT_MOSAIC_MASK;
+    } else {
+        reg_G2_BG2CNT &= ~REG_G2_BG2CNT_MOSAIC_MASK;
+    }
+}
+
+static inline void G2S_BG2Mosaic(BOOL enable) {
+    if (enable) {
+        reg_G2S_DB_BG2CNT |= REG_G2S_DB_BG2CNT_MOSAIC_MASK;
+    } else {
+        reg_G2S_DB_BG2CNT &= ~REG_G2S_DB_BG2CNT_MOSAIC_MASK;
+    }
+}
+
+static inline void G2_BG3Mosaic(BOOL enable) {
+    if (enable) {
+        reg_G2_BG3CNT |= REG_G2_BG3CNT_MOSAIC_MASK;
+    } else {
+        reg_G2_BG3CNT &= ~REG_G2_BG3CNT_MOSAIC_MASK;
+    }
+}
+
+static inline void G2S_BG3Mosaic(BOOL enable) {
+    if (enable) {
+        reg_G2S_DB_BG3CNT |= REG_G2S_DB_BG3CNT_MOSAIC_MASK;
+    } else {
+        reg_G2S_DB_BG3CNT &= ~REG_G2S_DB_BG3CNT_MOSAIC_MASK;
+    }
+}
+
+static inline void G2_SetBG0Priority(int priority) {
+    reg_G2_BG0CNT = (u16)((reg_G2_BG0CNT & ~REG_G2_BG0CNT_PRIORITY_MASK) | (priority << REG_G2_BG0CNT_PRIORITY_SHIFT));
+}
+
+static inline void G2S_SetBG0Priority(int priority) {
+    reg_G2S_DB_BG0CNT = (u16)((reg_G2S_DB_BG0CNT & ~REG_G2S_DB_BG0CNT_PRIORITY_MASK) | (priority << REG_G2S_DB_BG0CNT_PRIORITY_SHIFT));
+}
+
+static inline void G2_SetBG1Priority(int priority) {
+    reg_G2_BG1CNT = (u16)((reg_G2_BG1CNT & ~REG_G2_BG1CNT_PRIORITY_MASK) | (priority << REG_G2_BG1CNT_PRIORITY_SHIFT));
+}
+
+static inline void G2S_SetBG1Priority(int priority) {
+    reg_G2S_DB_BG1CNT = (u16)((reg_G2S_DB_BG1CNT & ~REG_G2S_DB_BG1CNT_PRIORITY_MASK) | (priority << REG_G2S_DB_BG1CNT_PRIORITY_SHIFT));
+}
+
+static inline void G2_SetBG2Priority(int priority) {
+    reg_G2_BG2CNT = (u16)((reg_G2_BG2CNT & ~REG_G2_BG2CNT_PRIORITY_MASK) | (priority << REG_G2_BG2CNT_PRIORITY_SHIFT));
+}
+
+static inline void G2S_SetBG2Priority(int priority) {
+    reg_G2S_DB_BG2CNT = (u16)((reg_G2S_DB_BG2CNT & ~REG_G2S_DB_BG2CNT_PRIORITY_MASK) | (priority << REG_G2S_DB_BG2CNT_PRIORITY_SHIFT));
+}
+
+static inline void G2_SetBG3Priority(int priority) {
+    reg_G2_BG3CNT = (u16)((reg_G2_BG3CNT & ~REG_G2_BG3CNT_PRIORITY_MASK) | (priority << REG_G2_BG3CNT_PRIORITY_SHIFT));
+}
+
+static inline void G2S_SetBG3Priority(int priority) {
+    reg_G2S_DB_BG3CNT = (u16)((reg_G2S_DB_BG3CNT & ~REG_G2S_DB_BG3CNT_PRIORITY_MASK) | (priority << REG_G2S_DB_BG3CNT_PRIORITY_SHIFT));
+}
+
+static inline GXBg01Control G2_GetBG0Control(void) {
+    return *(volatile GXBg01Control *)&reg_G2_BG0CNT;
+}
+
+static inline GXBg01Control G2S_GetBG0Control(void) {
+    return *(volatile GXBg01Control *)&reg_G2S_DB_BG0CNT;
+}
+
+static inline GXBg01Control G2_GetBG1Control(void) {
+    return *(volatile GXBg01Control *)&reg_G2_BG1CNT;
+}
+
+static inline GXBg01Control G2S_GetBG1Control(void) {
+    return *(volatile GXBg01Control *)&reg_G2S_DB_BG1CNT;
+}
+
+static inline GXBg23ControlText G2_GetBG2ControlText(void) {
+    return *(volatile GXBg23ControlText *)&reg_G2_BG2CNT;
+}
+
+static inline GXBg23ControlText G2S_GetBG2ControlText(void) {
+    return *(volatile GXBg23ControlText *)&reg_G2S_DB_BG2CNT;
+}
+
+static inline GXBg23ControlAffine G2_GetBG2ControlAffine(void) {
+    return *(volatile GXBg23ControlAffine *)&reg_G2_BG2CNT;
+}
+
+static inline GXBg23ControlAffine G2S_GetBG2ControlAffine(void) {
+    return *(volatile GXBg23ControlAffine *)&reg_G2S_DB_BG2CNT;
+}
+
+static inline GXBg23Control256x16Pltt G2_GetBG2Control256x16Pltt(void) {
+    return *(volatile GXBg23Control256x16Pltt *)&reg_G2_BG2CNT;
+}
+
+static inline GXBg23Control256x16Pltt G2S_GetBG2Control256x16Pltt(void) {
+    return *(volatile GXBg23Control256x16Pltt *)&reg_G2S_DB_BG2CNT;
+}
+
+static inline GXBg23Control256Bmp G2_GetBG2Control256Bmp(void) {
+    return *(volatile GXBg23Control256Bmp *)&reg_G2_BG2CNT;
+}
+
+static inline GXBg23Control256Bmp G2S_GetBG2Control256Bmp(void) {
+    return *(volatile GXBg23Control256Bmp *)&reg_G2S_DB_BG2CNT;
+}
+
+static inline GXBg23ControlDCBmp G2_GetBG2ControlDCBmp(void) {
+    return *(volatile GXBg23ControlDCBmp *)&reg_G2_BG2CNT;
+}
+
+static inline GXBg23ControlDCBmp G2S_GetBG2ControlDCBmp(void) {
+    return *(volatile GXBg23ControlDCBmp *)&reg_G2S_DB_BG2CNT;
+}
+
+static inline GXBg2ControlLargeBmp G2_GetBG2ControlLargeBmp(void) {
+    return *(volatile GXBg2ControlLargeBmp *)&reg_G2_BG2CNT;
+}
+
+static inline GXBg2ControlLargeBmp G2S_GetBG2ControlLargeBmp(void) {
+    return *(volatile GXBg2ControlLargeBmp *)&reg_G2S_DB_BG2CNT;
+}
+
+static inline GXBg23ControlText G2_GetBG3ControlText(void) {
+    return *(volatile GXBg23ControlText *)&reg_G2_BG3CNT;
+}
+
+static inline GXBg23ControlText G2S_GetBG3ControlText(void) {
+    return *(volatile GXBg23ControlText *)&reg_G2S_DB_BG3CNT;
+}
+
+static inline GXBg23ControlAffine G2_GetBG3ControlAffine(void) {
+    return *(volatile GXBg23ControlAffine *)&reg_G2_BG3CNT;
+}
+
+static inline GXBg23ControlAffine G2S_GetBG3ControlAffine(void) {
+    return *(volatile GXBg23ControlAffine *)&reg_G2S_DB_BG3CNT;
+}
+
+static inline GXBg23Control256x16Pltt G2_GetBG3Control256x16Pltt(void) {
+    return *(volatile GXBg23Control256x16Pltt *)&reg_G2_BG3CNT;
+}
+
+static inline GXBg23Control256x16Pltt G2S_GetBG3Control256x16Pltt(void) {
+    return *(volatile GXBg23Control256x16Pltt *)&reg_G2S_DB_BG3CNT;
+}
+
+static inline GXBg23Control256Bmp G2_GetBG3Control256Bmp(void) {
+    return *(volatile GXBg23Control256Bmp *)&reg_G2_BG3CNT;
+}
+
+static inline GXBg23Control256Bmp G2S_GetBG3Control256Bmp(void) {
+    return *(volatile GXBg23Control256Bmp *)&reg_G2S_DB_BG3CNT;
+}
+
+static inline GXBg23ControlDCBmp G2_GetBG3ControlDCBmp(void) {
+    return *(volatile GXBg23ControlDCBmp *)&reg_G2_BG3CNT;
+}
+
+static inline GXBg23ControlDCBmp G2S_GetBG3ControlDCBmp(void) {
+    return *(volatile GXBg23ControlDCBmp *)&reg_G2S_DB_BG3CNT;
+}
+
+#endif //NITRO_GX_GX_BGCNT_H
diff --git a/lib/include/nitro/gx/gx_load.h b/lib/include/nitro/gx/gx_load.h
new file mode 100644
index 0000000000..ef6744fbcd
--- /dev/null
+++ b/lib/include/nitro/gx/gx_load.h
@@ -0,0 +1,43 @@
+#ifndef NITRO_GX_GX_LOAD_H_
+#define NITRO_GX_GX_LOAD_H_
+
+void GX_LoadBG0Scr(const void *pSrc, u32 offset, u32 szByte);
+void GX_LoadBG1Scr(const void *pSrc, u32 offset, u32 szByte);
+void GX_LoadBG2Scr(const void *pSrc, u32 offset, u32 szByte);
+void GX_LoadBG3Scr(const void *pSrc, u32 offset, u32 szByte);
+void GXS_LoadBG0Scr(const void *pSrc, u32 offset, u32 szByte);
+void GXS_LoadBG1Scr(const void *pSrc, u32 offset, u32 szByte);
+void GXS_LoadBG2Scr(const void *pSrc, u32 offset, u32 szByte);
+void GXS_LoadBG3Scr(const void *pSrc, u32 offset, u32 szByte);
+
+void GX_LoadBG0Char(const void *pSrc, u32 offset, u32 szByte);
+void GX_LoadBG1Char(const void *pSrc, u32 offset, u32 szByte);
+void GX_LoadBG2Char(const void *pSrc, u32 offset, u32 szByte);
+void GX_LoadBG3Char(const void *pSrc, u32 offset, u32 szByte);
+void GXS_LoadBG0Char(const void *pSrc, u32 offset, u32 szByte);
+void GXS_LoadBG1Char(const void *pSrc, u32 offset, u32 szByte);
+void GXS_LoadBG2Char(const void *pSrc, u32 offset, u32 szByte);
+void GXS_LoadBG3Char(const void *pSrc, u32 offset, u32 szByte);
+
+void GX_BeginLoadBGExtPltt(void);
+void GX_EndLoadBGExtPltt(void);
+void GXS_BeginLoadBGExtPltt(void);
+void GXS_EndLoadBGExtPltt(void);
+void GX_BeginLoadOBJExtPltt(void);
+void GX_EndLoadOBJExtPltt(void);
+void GXS_BeginLoadOBJExtPltt(void);
+void GXS_EndLoadOBJExtPltt(void);
+
+void GX_LoadBGPltt(const void *pSrc, u32 offset, u32 szByte);
+void GX_LoadOBJPltt(const void *pSrc, u32 offset, u32 szByte);
+void GX_LoadBGExtPltt(const void *pSrc, u32 offset, u32 szByte);
+void GX_LoadOBJExtPltt(const void *pSrc, u32 offset, u32 szByte);
+void GXS_LoadBGPltt(const void *pSrc, u32 offset, u32 szByte);
+void GXS_LoadOBJPltt(const void *pSrc, u32 offset, u32 szByte);
+void GXS_LoadBGExtPltt(const void *pSrc, u32 offset, u32 szByte);
+void GXS_LoadOBJExtPltt(const void *pSrc, u32 offset, u32 szByte);
+
+void GX_LoadOBJ(const void *pSrc, u32 offset, u32 szByte);
+void GXS_LoadOBJ(const void *pSrc, u32 offset, u32 szByte);
+
+#endif //NITRO_GX_GX_LOAD_H_
diff --git a/lib/include/nitro/gx/gx_vramcnt.h b/lib/include/nitro/gx/gx_vramcnt.h
new file mode 100644
index 0000000000..f148ad8489
--- /dev/null
+++ b/lib/include/nitro/gx/gx_vramcnt.h
@@ -0,0 +1,213 @@
+#ifndef NITRO_GX_GX_VRAMCNT_H_
+#define NITRO_GX_GX_VRAMCNT_H_
+
+typedef enum {
+    GX_VRAM_A = OS_VRAM_BANK_ID_A,// VRAM-A
+    GX_VRAM_B = OS_VRAM_BANK_ID_B,// VRAM-B
+    GX_VRAM_C = OS_VRAM_BANK_ID_C,// VRAM-C
+    GX_VRAM_D = OS_VRAM_BANK_ID_D,// VRAM-D
+    GX_VRAM_E = OS_VRAM_BANK_ID_E,// VRAM-E
+    GX_VRAM_F = OS_VRAM_BANK_ID_F,// VRAM-F
+    GX_VRAM_G = OS_VRAM_BANK_ID_G,// VRAM-G
+    GX_VRAM_H = OS_VRAM_BANK_ID_H,// VRAM-H
+    GX_VRAM_I = OS_VRAM_BANK_ID_I,// VRAM-I
+    GX_VRAM_ALL = OS_VRAM_BANK_ID_ALL
+} GXVRam;
+
+typedef enum {
+    GX_VRAM_LCDC_NONE = 0x0000,
+    GX_VRAM_LCDC_A = GX_VRAM_A,
+    GX_VRAM_LCDC_B = GX_VRAM_B,
+    GX_VRAM_LCDC_C = GX_VRAM_C,
+    GX_VRAM_LCDC_D = GX_VRAM_D,
+    GX_VRAM_LCDC_E = GX_VRAM_E,
+    GX_VRAM_LCDC_F = GX_VRAM_F,
+    GX_VRAM_LCDC_G = GX_VRAM_G,
+    GX_VRAM_LCDC_H = GX_VRAM_H,
+    GX_VRAM_LCDC_I = GX_VRAM_I,
+    GX_VRAM_LCDC_ALL = GX_VRAM_ALL
+} GXVRamLCDC;
+
+typedef enum {
+    GX_VRAM_BG_NONE = 0x0000,
+    GX_VRAM_BG_16_F = GX_VRAM_F,
+    GX_VRAM_BG_16_G = GX_VRAM_G,
+    GX_VRAM_BG_32_FG = GX_VRAM_F | GX_VRAM_G,
+    GX_VRAM_BG_64_E = GX_VRAM_E,
+    GX_VRAM_BG_80_EF = GX_VRAM_E | GX_VRAM_F,
+    GX_VRAM_BG_96_EFG = GX_VRAM_E | GX_VRAM_F | GX_VRAM_G,
+    GX_VRAM_BG_128_A = GX_VRAM_A,
+    GX_VRAM_BG_128_B = GX_VRAM_B,
+    GX_VRAM_BG_128_C = GX_VRAM_C,
+    GX_VRAM_BG_128_D = GX_VRAM_D,
+    GX_VRAM_BG_256_AB = GX_VRAM_A | GX_VRAM_B,
+    GX_VRAM_BG_256_BC = GX_VRAM_B | GX_VRAM_C,
+    GX_VRAM_BG_256_CD = GX_VRAM_C | GX_VRAM_D,
+    GX_VRAM_BG_384_ABC = GX_VRAM_A | GX_VRAM_B | GX_VRAM_C,
+    GX_VRAM_BG_384_BCD = GX_VRAM_B | GX_VRAM_C | GX_VRAM_D,
+    GX_VRAM_BG_512_ABCD = GX_VRAM_A | GX_VRAM_B | GX_VRAM_C | GX_VRAM_D,
+    GX_VRAM_BG_80_EG = GX_VRAM_E | GX_VRAM_G,
+    GX_VRAM_BG_256_AC = GX_VRAM_A | GX_VRAM_C,
+    GX_VRAM_BG_256_AD = GX_VRAM_A | GX_VRAM_D,
+    GX_VRAM_BG_256_BD = GX_VRAM_B | GX_VRAM_D,
+    GX_VRAM_BG_384_ABD = GX_VRAM_A | GX_VRAM_B | GX_VRAM_D,
+    GX_VRAM_BG_384_ACD = GX_VRAM_A | GX_VRAM_C | GX_VRAM_D
+} GXVRamBG;
+
+typedef enum {
+    GX_VRAM_OBJ_NONE = 0x0000,
+    GX_VRAM_OBJ_16_F = GX_VRAM_F,
+    GX_VRAM_OBJ_16_G = GX_VRAM_G,
+    GX_VRAM_OBJ_32_FG = GX_VRAM_F | GX_VRAM_G,
+    GX_VRAM_OBJ_64_E = GX_VRAM_E,
+    GX_VRAM_OBJ_80_EF = GX_VRAM_E | GX_VRAM_F,
+    GX_VRAM_OBJ_80_EG = GX_VRAM_E | GX_VRAM_G,
+    GX_VRAM_OBJ_96_EFG = GX_VRAM_E | GX_VRAM_F | GX_VRAM_G,
+    GX_VRAM_OBJ_128_A = GX_VRAM_A,
+    GX_VRAM_OBJ_128_B = GX_VRAM_B,
+    GX_VRAM_OBJ_256_AB = GX_VRAM_A | GX_VRAM_B
+} GXVRamOBJ;
+
+typedef enum {
+    GX_VRAM_TEX_NONE = 0x0000,
+    GX_VRAM_TEX_0_A = GX_VRAM_A,
+    GX_VRAM_TEX_0_B = GX_VRAM_B,
+    GX_VRAM_TEX_0_C = GX_VRAM_C,
+    GX_VRAM_TEX_0_D = GX_VRAM_D,
+    GX_VRAM_TEX_01_AB = GX_VRAM_A | GX_VRAM_B,
+    GX_VRAM_TEX_01_BC = GX_VRAM_B | GX_VRAM_C,
+    GX_VRAM_TEX_01_CD = GX_VRAM_C | GX_VRAM_D,
+    GX_VRAM_TEX_012_ABC = GX_VRAM_A | GX_VRAM_B | GX_VRAM_C,
+    GX_VRAM_TEX_012_BCD = GX_VRAM_B | GX_VRAM_C | GX_VRAM_D,
+    GX_VRAM_TEX_0123_ABCD = GX_VRAM_A | GX_VRAM_B | GX_VRAM_C | GX_VRAM_D,
+    GX_VRAM_TEX_01_AC = GX_VRAM_A | GX_VRAM_C,
+    GX_VRAM_TEX_01_AD = GX_VRAM_A | GX_VRAM_D,
+    GX_VRAM_TEX_01_BD = GX_VRAM_B | GX_VRAM_D,
+    GX_VRAM_TEX_012_ABD = GX_VRAM_A | GX_VRAM_B | GX_VRAM_D,
+    GX_VRAM_TEX_012_ACD = GX_VRAM_A | GX_VRAM_C | GX_VRAM_D
+} GXVRamTex;
+
+typedef enum {
+    GX_VRAM_CLEARIMAGE_NONE = 0x0000,
+    GX_VRAM_CLEARIMAGE_256_AB = GX_VRAM_A | GX_VRAM_B,
+    GX_VRAM_CLEARIMAGE_256_CD = GX_VRAM_C | GX_VRAM_D,
+    GX_VRAM_CLEARDEPTH_128_A = GX_VRAM_A,
+    GX_VRAM_CLEARDEPTH_128_B = GX_VRAM_B,
+    GX_VRAM_CLEARDEPTH_128_C = GX_VRAM_C,
+    GX_VRAM_CLEARDEPTH_128_D = GX_VRAM_D
+} GXVRamClearImage;
+
+typedef enum {
+    GX_VRAM_TEXPLTT_NONE = 0x0000,
+    GX_VRAM_TEXPLTT_0_F = GX_VRAM_F,
+    GX_VRAM_TEXPLTT_0_G = GX_VRAM_G,
+    GX_VRAM_TEXPLTT_01_FG = GX_VRAM_F | GX_VRAM_G,
+    GX_VRAM_TEXPLTT_0123_E = GX_VRAM_E,
+    GX_VRAM_TEXPLTT_01234_EF = GX_VRAM_E | GX_VRAM_F,
+    GX_VRAM_TEXPLTT_012345_EFG = GX_VRAM_E | GX_VRAM_F | GX_VRAM_G
+} GXVRamTexPltt;
+
+typedef enum {
+    GX_VRAM_BGEXTPLTT_NONE = 0x0000,
+    GX_VRAM_BGEXTPLTT_01_F = GX_VRAM_F,
+    GX_VRAM_BGEXTPLTT_23_G = GX_VRAM_G,
+    GX_VRAM_BGEXTPLTT_0123_E = GX_VRAM_E,
+    GX_VRAM_BGEXTPLTT_0123_FG = GX_VRAM_F | GX_VRAM_G
+} GXVRamBGExtPltt;
+
+typedef enum {
+    GX_VRAM_OBJEXTPLTT_NONE = 0,
+    GX_VRAM_OBJEXTPLTT_0_F = GX_VRAM_F,
+    GX_VRAM_OBJEXTPLTT_0_G = GX_VRAM_G
+} GXVRamOBJExtPltt;
+
+typedef enum {
+    GX_VRAM_SUB_BG_NONE = 0x0000,
+    GX_VRAM_SUB_BG_128_C = GX_VRAM_C,
+    GX_VRAM_SUB_BG_32_H = GX_VRAM_H,
+    GX_VRAM_SUB_BG_48_HI = GX_VRAM_H | GX_VRAM_I
+} GXVRamSubBG;
+
+typedef enum {
+    GX_VRAM_SUB_OBJ_NONE = 0x0000,
+    GX_VRAM_SUB_OBJ_128_D = GX_VRAM_D,
+    GX_VRAM_SUB_OBJ_16_I = GX_VRAM_I
+} GXVRamSubOBJ;
+
+typedef enum {
+    GX_VRAM_SUB_BGEXTPLTT_NONE = 0x0000,
+    GX_VRAM_SUB_BGEXTPLTT_0123_H = GX_VRAM_H
+} GXVRamSubBGExtPltt;
+
+typedef enum {
+    GX_VRAM_SUB_OBJEXTPLTT_NONE = 0x0000,
+    GX_VRAM_SUB_OBJEXTPLTT_0_I = GX_VRAM_I
+} GXVRamSubOBJExtPltt;
+
+void GX_SetBankForLCDC(GXVRamLCDC lcdc);
+GXVRamLCDC GX_DisableBankForLCDC(void);
+
+void GX_SetBankForBG(GXVRamBG bank);
+BOOL GX_TrySetBankForBG(GXVRamBG bank);
+void GX_SetBankForOBJ(GXVRamOBJ bank);
+BOOL GX_TrySetBankForOBJ(GXVRamOBJ bank);
+void GX_SetBankForBGExtPltt(GXVRamBGExtPltt bank);
+BOOL GX_TrySetBankForBGExtPltt(GXVRamBGExtPltt bank);
+void GX_SetBankForOBJExtPltt(GXVRamOBJExtPltt bank);
+BOOL GX_TrySetBankForOBJExtPltt(GXVRamOBJExtPltt bank);
+void GX_SetBankForTex(GXVRamTex bank);
+BOOL GX_TrySetBankForTex(GXVRamTex bank);
+void GX_SetBankForTexPltt(GXVRamTexPltt bank);
+BOOL GX_TrySetBankForTexPltt(GXVRamTexPltt bank);
+void GX_SetBankForClearImage(GXVRamClearImage bank);
+BOOL GX_TrySetBankForClearImage(GXVRamClearImage bank);
+
+GXVRamBG GX_GetBankForBG(void);
+GXVRamOBJ GX_GetBankForOBJ(void);
+GXVRamBGExtPltt GX_GetBankForBGExtPltt(void);
+GXVRamOBJExtPltt GX_GetBankForOBJExtPltt(void);
+GXVRamTex GX_GetBankForTex(void);
+GXVRamTexPltt GX_GetBankForTexPltt(void);
+GXVRamClearImage GX_GetBankForClearImage(void);
+
+GXVRamBG GX_ResetBankForBG(void);
+GXVRamOBJ GX_ResetBankForOBJ(void);
+GXVRamBGExtPltt GX_ResetBankForBGExtPltt(void);
+GXVRamOBJExtPltt GX_ResetBankForOBJExtPltt(void);
+GXVRamTex GX_ResetBankForTex(void);
+GXVRamTexPltt GX_ResetBankForTexPltt(void);
+GXVRamClearImage GX_ResetBankForClearImage(void);
+
+GXVRamBG GX_DisableBankForBG(void);
+GXVRamOBJ GX_DisableBankForOBJ(void);
+GXVRamBGExtPltt GX_DisableBankForBGExtPltt(void);
+GXVRamOBJExtPltt GX_DisableBankForOBJExtPltt(void);
+GXVRamTex GX_DisableBankForTex(void);
+GXVRamTexPltt GX_DisableBankForTexPltt(void);
+GXVRamClearImage GX_DisableBankForClearImage(void);
+
+void GX_SetBankForSubBG(GXVRamSubBG bank);
+BOOL GX_TrySetBankForSubBG(GXVRamSubBG bank);
+void GX_SetBankForSubOBJ(GXVRamSubOBJ bank);
+BOOL GX_TrySetBankForSubOBJ(GXVRamSubOBJ bank);
+void GX_SetBankForSubBGExtPltt(GXVRamSubBGExtPltt bank);
+BOOL GX_TrySetBankForSubBGExtPltt(GXVRamSubBGExtPltt bank);
+void GX_SetBankForSubOBJExtPltt(GXVRamSubOBJExtPltt bank);
+BOOL GX_TrySetBankForSubOBJExtPltt(GXVRamSubOBJExtPltt bank);
+
+GXVRamSubBG GX_GetBankForSubBG(void);
+GXVRamSubOBJ GX_GetBankForSubOBJ(void);
+GXVRamSubBGExtPltt GX_GetBankForSubBGExtPltt(void);
+GXVRamSubOBJExtPltt GX_GetBankForSubOBJExtPltt(void);
+
+GXVRamSubBG GX_ResetBankForSubBG(void);
+GXVRamSubOBJ GX_ResetBankForSubOBJ(void);
+GXVRamSubBGExtPltt GX_ResetBankForSubBGExtPltt(void);
+GXVRamSubOBJExtPltt GX_ResetBankForSubOBJExtPltt(void);
+
+GXVRamSubBG GX_DisableBankForSubBG(void);
+GXVRamSubOBJ GX_DisableBankForSubOBJ(void);
+GXVRamSubBGExtPltt GX_DisableBankForSubBGExtPltt(void);
+GXVRamSubOBJExtPltt GX_DisableBankForSubOBJExtPltt(void);
+
+#endif //NITRO_GX_GX_VRAMCNT_H_
diff --git a/lib/include/nitro/gx/gxcommon.h b/lib/include/nitro/gx/gxcommon.h
new file mode 100644
index 0000000000..9e387d307d
--- /dev/null
+++ b/lib/include/nitro/gx/gxcommon.h
@@ -0,0 +1,22 @@
+#ifndef NITRO_GX_GXCOMMON_H_
+#define NITRO_GX_GXCOMMON_H_
+
+#ifndef SDK_ASM
+typedef u16 GXRgb;
+#endif
+
+#define GX_RGB_R_SHIFT            (0)
+#define GX_RGB_R_MASK             (0x001f)
+#define GX_RGB_G_SHIFT            (5)
+#define GX_RGB_G_MASK             (0x03e0)
+#define GX_RGB_B_SHIFT            (10)
+#define GX_RGB_B_MASK             (0x7c00)
+#ifdef SDK_ASM
+#define GX_RGB(r, g, b)           ((((r) << GX_RGB_R_SHIFT) | ((g) << GX_RGB_G_SHIFT) | ((b) << GX_RGB_B_SHIFT)))
+#else
+#define GX_RGB(r, g, b)           ((GXRgb)(((r) << GX_RGB_R_SHIFT) | ((g) << GX_RGB_G_SHIFT) | ((b) << GX_RGB_B_SHIFT)))
+#endif
+
+#define GX_DEFAULT_DMAID 3
+
+#endif //NITRO_GX_GXCOMMON_H_
diff --git a/lib/include/nitro/hw/ARM7/io_reg.h b/lib/include/nitro/hw/ARM7/io_reg.h
new file mode 100644
index 0000000000..b7356171a2
--- /dev/null
+++ b/lib/include/nitro/hw/ARM7/io_reg.h
@@ -0,0 +1,211 @@
+#ifndef NITRO_HW_ARM7_IO_REG_H_
+#define NITRO_HW_ARM7_IO_REG_H_
+
+#define REG_MAINPINTF_OFFSET        0x180
+#define REG_MAINPINTF_ADDR          (HW_REG_BASE + REG_MAINPINTF_OFFSET)
+#define reg_PXI_MAINPINTF           (*( REGType16v *) REG_MAINPINTF_ADDR)
+
+#define REG_MAINP_FIFO_CNT_OFFSET   (0x184)
+#define REG_MAINP_FIFO_CNT_ADDR     (HW_REG_BASE + REG_MAINP_FIFO_CNT_OFFSET)
+#define reg_PXI_MAINP_FIFO_CNT      (*(REGType16v *)REG_MAINP_FIFO_CNT_ADDR)
+
+#define REG_SEND_FIFO_OFFSET                               0x188
+#define REG_SEND_FIFO_ADDR                                 (HW_REG_BASE + REG_SEND_FIFO_OFFSET)
+#define reg_PXI_SEND_FIFO                                  (*( REGType32v *) REG_SEND_FIFO_ADDR)
+
+/* RECV_FIFO */
+
+#define REG_RECV_FIFO_OFFSET                               0x100000
+#define REG_RECV_FIFO_ADDR                                 (HW_REG_BASE + REG_RECV_FIFO_OFFSET)
+#define reg_PXI_RECV_FIFO                                  (*( REGType32v *) REG_RECV_FIFO_ADDR)
+
+#define REG_PXI_MAINPINTF_I_SHIFT                          14
+#define REG_PXI_MAINPINTF_I_SIZE                           1
+#define REG_PXI_MAINPINTF_I_MASK                           0x4000
+
+#define REG_PXI_MAINPINTF_IREQ_SHIFT                       13
+#define REG_PXI_MAINPINTF_IREQ_SIZE                        1
+#define REG_PXI_MAINPINTF_IREQ_MASK                        0x2000
+
+#define REG_PXI_MAINPINTF_A7STATUS_SHIFT                   8
+#define REG_PXI_MAINPINTF_A7STATUS_SIZE                    4
+#define REG_PXI_MAINPINTF_A7STATUS_MASK                    0x0f00
+
+#define REG_PXI_MAINPINTF_A9STATUS_SHIFT                   0
+#define REG_PXI_MAINPINTF_A9STATUS_SIZE                    4
+#define REG_PXI_MAINPINTF_A9STATUS_MASK                    0x000f
+
+#ifndef SDK_ASM
+#define REG_PXI_MAINPINTF_FIELD( i, ireq, a7status, a9status ) \
+    (u16)( \
+    ((u32)(i) << REG_PXI_MAINPINTF_I_SHIFT) | \
+    ((u32)(ireq) << REG_PXI_MAINPINTF_IREQ_SHIFT) | \
+    ((u32)(a7status) << REG_PXI_MAINPINTF_A7STATUS_SHIFT) | \
+    ((u32)(a9status) << REG_PXI_MAINPINTF_A9STATUS_SHIFT))
+#endif
+
+#define REG_PXI_MAINP_FIFO_CNT_E_SHIFT                     15
+#define REG_PXI_MAINP_FIFO_CNT_E_SIZE                      1
+#define REG_PXI_MAINP_FIFO_CNT_E_MASK                      0x8000
+
+#define REG_PXI_MAINP_FIFO_CNT_ERR_SHIFT                   14
+#define REG_PXI_MAINP_FIFO_CNT_ERR_SIZE                    1
+#define REG_PXI_MAINP_FIFO_CNT_ERR_MASK                    0x4000
+
+#define REG_PXI_MAINP_FIFO_CNT_RECV_RI_SHIFT               10
+#define REG_PXI_MAINP_FIFO_CNT_RECV_RI_SIZE                1
+#define REG_PXI_MAINP_FIFO_CNT_RECV_RI_MASK                0x0400
+
+#define REG_PXI_MAINP_FIFO_CNT_RECV_FULL_SHIFT             9
+#define REG_PXI_MAINP_FIFO_CNT_RECV_FULL_SIZE              1
+#define REG_PXI_MAINP_FIFO_CNT_RECV_FULL_MASK              0x0200
+
+#define REG_PXI_MAINP_FIFO_CNT_RECV_EMP_SHIFT              8
+#define REG_PXI_MAINP_FIFO_CNT_RECV_EMP_SIZE               1
+#define REG_PXI_MAINP_FIFO_CNT_RECV_EMP_MASK               0x0100
+
+#define REG_PXI_MAINP_FIFO_CNT_SEND_CL_SHIFT               3
+#define REG_PXI_MAINP_FIFO_CNT_SEND_CL_SIZE                1
+#define REG_PXI_MAINP_FIFO_CNT_SEND_CL_MASK                0x0008
+
+#define REG_PXI_MAINP_FIFO_CNT_SEND_TI_SHIFT               2
+#define REG_PXI_MAINP_FIFO_CNT_SEND_TI_SIZE                1
+#define REG_PXI_MAINP_FIFO_CNT_SEND_TI_MASK                0x0004
+
+#define REG_PXI_MAINP_FIFO_CNT_SEND_FULL_SHIFT             1
+#define REG_PXI_MAINP_FIFO_CNT_SEND_FULL_SIZE              1
+#define REG_PXI_MAINP_FIFO_CNT_SEND_FULL_MASK              0x0002
+
+#define REG_PXI_MAINP_FIFO_CNT_SEND_EMP_SHIFT              0
+#define REG_PXI_MAINP_FIFO_CNT_SEND_EMP_SIZE               1
+#define REG_PXI_MAINP_FIFO_CNT_SEND_EMP_MASK               0x0001
+
+#ifndef SDK_ASM
+#define REG_PXI_MAINP_FIFO_CNT_FIELD( e, err, recv_ri, recv_full, recv_emp, send_cl, send_ti, send_full, send_emp ) \
+    (u16)( \
+    ((u32)(e) << REG_PXI_MAINP_FIFO_CNT_E_SHIFT) | \
+    ((u32)(err) << REG_PXI_MAINP_FIFO_CNT_ERR_SHIFT) | \
+    ((u32)(recv_ri) << REG_PXI_MAINP_FIFO_CNT_RECV_RI_SHIFT) | \
+    ((u32)(recv_full) << REG_PXI_MAINP_FIFO_CNT_RECV_FULL_SHIFT) | \
+    ((u32)(recv_emp) << REG_PXI_MAINP_FIFO_CNT_RECV_EMP_SHIFT) | \
+    ((u32)(send_cl) << REG_PXI_MAINP_FIFO_CNT_SEND_CL_SHIFT) | \
+    ((u32)(send_ti) << REG_PXI_MAINP_FIFO_CNT_SEND_TI_SHIFT) | \
+    ((u32)(send_full) << REG_PXI_MAINP_FIFO_CNT_SEND_FULL_SHIFT) | \
+    ((u32)(send_emp) << REG_PXI_MAINP_FIFO_CNT_SEND_EMP_SHIFT))
+#endif
+
+
+#define REG_RCNT0_L_OFFSET                    0x134
+#define REG_RCNT0_L_ADDR                      (HW_REG_BASE + REG_RCNT0_L_OFFSET)
+#define reg_EXI_RCNT0_L                       (*(REGType16v *)REG_RCNT0_L_ADDR)
+
+#define REG_RCNT0_H_OFFSET                    0x136
+#define REG_RCNT0_H_ADDR                      (HW_REG_BASE + REG_RCNT0_H_OFFSET)
+#define reg_EXI_RCNT0_H                       (*(REGType16v *)REG_RCNT0_H_ADDR)
+
+#define REG_EXI_RCNT0_L_RE1_SHIFT                          15
+#define REG_EXI_RCNT0_L_RE1_SIZE                           1
+#define REG_EXI_RCNT0_L_RE1_MASK                           0x8000
+
+#define REG_EXI_RCNT0_L_RE0_SHIFT                          14
+#define REG_EXI_RCNT0_L_RE0_SIZE                           1
+#define REG_EXI_RCNT0_L_RE0_MASK                           0x4000
+
+#define REG_EXI_RCNT0_L_I_SHIFT                            8
+#define REG_EXI_RCNT0_L_I_SIZE                             1
+#define REG_EXI_RCNT0_L_I_MASK                             0x0100
+
+#define REG_EXI_RCNT0_L_DIR_SO_SHIFT                       7
+#define REG_EXI_RCNT0_L_DIR_SO_SIZE                        1
+#define REG_EXI_RCNT0_L_DIR_SO_MASK                        0x0080
+
+#define REG_EXI_RCNT0_L_DIR_SI_SHIFT                       6
+#define REG_EXI_RCNT0_L_DIR_SI_SIZE                        1
+#define REG_EXI_RCNT0_L_DIR_SI_MASK                        0x0040
+
+#define REG_EXI_RCNT0_L_DIR_SD_SHIFT                       5
+#define REG_EXI_RCNT0_L_DIR_SD_SIZE                        1
+#define REG_EXI_RCNT0_L_DIR_SD_MASK                        0x0020
+
+#define REG_EXI_RCNT0_L_DIR_SC_SHIFT                       4
+#define REG_EXI_RCNT0_L_DIR_SC_SIZE                        1
+#define REG_EXI_RCNT0_L_DIR_SC_MASK                        0x0010
+
+#define REG_EXI_RCNT0_L_DATA_SO_SHIFT                      3
+#define REG_EXI_RCNT0_L_DATA_SO_SIZE                       1
+#define REG_EXI_RCNT0_L_DATA_SO_MASK                       0x0008
+
+#define REG_EXI_RCNT0_L_DATA_SI_SHIFT                      2
+#define REG_EXI_RCNT0_L_DATA_SI_SIZE                       1
+#define REG_EXI_RCNT0_L_DATA_SI_MASK                       0x0004
+
+#define REG_EXI_RCNT0_L_DATA_SD_SHIFT                      1
+#define REG_EXI_RCNT0_L_DATA_SD_SIZE                       1
+#define REG_EXI_RCNT0_L_DATA_SD_MASK                       0x0002
+
+#define REG_EXI_RCNT0_L_DATA_SC_SHIFT                      0
+#define REG_EXI_RCNT0_L_DATA_SC_SIZE                       1
+#define REG_EXI_RCNT0_L_DATA_SC_MASK                       0x0001
+
+#ifndef SDK_ASM
+#define REG_EXI_RCNT0_L_FIELD( re1, re0, i, dir_so, dir_si, dir_sd, dir_sc, data_so, data_si, data_sd, data_sc ) \
+    (u16)( \
+    ((u32)(re1) << REG_EXI_RCNT0_L_RE1_SHIFT) | \
+    ((u32)(re0) << REG_EXI_RCNT0_L_RE0_SHIFT) | \
+    ((u32)(i) << REG_EXI_RCNT0_L_I_SHIFT) | \
+    ((u32)(dir_so) << REG_EXI_RCNT0_L_DIR_SO_SHIFT) | \
+    ((u32)(dir_si) << REG_EXI_RCNT0_L_DIR_SI_SHIFT) | \
+    ((u32)(dir_sd) << REG_EXI_RCNT0_L_DIR_SD_SHIFT) | \
+    ((u32)(dir_sc) << REG_EXI_RCNT0_L_DIR_SC_SHIFT) | \
+    ((u32)(data_so) << REG_EXI_RCNT0_L_DATA_SO_SHIFT) | \
+    ((u32)(data_si) << REG_EXI_RCNT0_L_DATA_SI_SHIFT) | \
+    ((u32)(data_sd) << REG_EXI_RCNT0_L_DATA_SD_SHIFT) | \
+    ((u32)(data_sc) << REG_EXI_RCNT0_L_DATA_SC_SHIFT))
+#endif
+
+#define REG_EXI_RCNT0_H_DATA_R7_SHIFT                      7
+#define REG_EXI_RCNT0_H_DATA_R7_SIZE                       1
+#define REG_EXI_RCNT0_H_DATA_R7_MASK                       0x0080
+
+#define REG_EXI_RCNT0_H_DATA_R6_SHIFT                      6
+#define REG_EXI_RCNT0_H_DATA_R6_SIZE                       1
+#define REG_EXI_RCNT0_H_DATA_R6_MASK                       0x0040
+
+#define REG_EXI_RCNT0_H_DATA_R5_SHIFT                      5
+#define REG_EXI_RCNT0_H_DATA_R5_SIZE                       1
+#define REG_EXI_RCNT0_H_DATA_R5_MASK                       0x0020
+
+#define REG_EXI_RCNT0_H_DATA_R4_SHIFT                      4
+#define REG_EXI_RCNT0_H_DATA_R4_SIZE                       1
+#define REG_EXI_RCNT0_H_DATA_R4_MASK                       0x0010
+
+#define REG_EXI_RCNT0_H_DATA_R3_SHIFT                      3
+#define REG_EXI_RCNT0_H_DATA_R3_SIZE                       1
+#define REG_EXI_RCNT0_H_DATA_R3_MASK                       0x0008
+
+#define REG_EXI_RCNT0_H_DATA_R2_SHIFT                      2
+#define REG_EXI_RCNT0_H_DATA_R2_SIZE                       1
+#define REG_EXI_RCNT0_H_DATA_R2_MASK                       0x0004
+
+#define REG_EXI_RCNT0_H_DATA_R1_SHIFT                      1
+#define REG_EXI_RCNT0_H_DATA_R1_SIZE                       1
+#define REG_EXI_RCNT0_H_DATA_R1_MASK                       0x0002
+
+#define REG_EXI_RCNT0_H_DATA_R0_SHIFT                      0
+#define REG_EXI_RCNT0_H_DATA_R0_SIZE                       1
+#define REG_EXI_RCNT0_H_DATA_R0_MASK                       0x0001
+
+#ifndef SDK_ASM
+#define REG_EXI_RCNT0_H_FIELD( data_r7, data_r6, data_r5, data_r4, data_r3, data_r2, data_r1, data_r0 ) \
+    (u16)( \
+    ((u32)(data_r7) << REG_EXI_RCNT0_H_DATA_R7_SHIFT) | \
+    ((u32)(data_r6) << REG_EXI_RCNT0_H_DATA_R6_SHIFT) | \
+    ((u32)(data_r5) << REG_EXI_RCNT0_H_DATA_R5_SHIFT) | \
+    ((u32)(data_r4) << REG_EXI_RCNT0_H_DATA_R4_SHIFT) | \
+    ((u32)(data_r3) << REG_EXI_RCNT0_H_DATA_R3_SHIFT) | \
+    ((u32)(data_r2) << REG_EXI_RCNT0_H_DATA_R2_SHIFT) | \
+    ((u32)(data_r1) << REG_EXI_RCNT0_H_DATA_R1_SHIFT) | \
+    ((u32)(data_r0) << REG_EXI_RCNT0_H_DATA_R0_SHIFT))
+#endif
+
+#endif //NITRO_HW_ARM7_IO_REG_H_
diff --git a/lib/include/nitro/hw/ARM7/mmap.h b/lib/include/nitro/hw/ARM7/mmap.h
new file mode 100644
index 0000000000..4275c0f4f8
--- /dev/null
+++ b/lib/include/nitro/hw/ARM7/mmap.h
@@ -0,0 +1,32 @@
+#ifndef NITRO_HW_ARM7_MMAP_H
+#define NITRO_HW_ARM7_MMAP_H
+
+#define HW_WRAM_END                 0x03800000
+#define HW_PRV_WRAM                 0x03800000
+#define HW_PRV_WRAM_END             0x03810000
+
+#define HW_PRV_WRAM_SIZE            (HW_PRV_WRAM_END-HW_PRV_WRAM)
+
+#define HW_PRV_WRAM_SYSRV_SIZE      0x40
+
+#define HW_MAIN_MEM_SUB_SIZE        (HW_MAIN_MEM_SIZE - HW_MAIN_MEM_MAIN_SIZE - HW_MAIN_MEM_SHARED_SIZE)
+
+#define HW_MAIN_MEM_SUB             (HW_MAIN_MEM_MAIN_END + 0x400000)
+#define HW_MAIN_MEM_SUB_END         (HW_MAIN_MEM_SUB + HW_MAIN_MEM_SUB_SIZE)
+#define HW_ROM_HEADER_BUF       (HW_MAIN_MEM + 0x007ffe00)      // ROM registration area data buffer
+
+#define HW_PRV_WRAM_IRQ_STACK_END   (HW_PRV_WRAM_SVC_STACK)
+#define HW_PRV_WRAM_SVC_STACK       (HW_PRV_WRAM_SVC_STACK_END - HW_SVC_STACK_SIZE)
+#define HW_PRV_WRAM_SVC_STACK_END   (HW_PRV_WRAM_SYSRV)
+
+#define HW_PRV_WRAM_SYSRV           (HW_PRV_WRAM + HW_PRV_WRAM_SIZE - HW_PRV_WRAM_SYSRV_SIZE)
+
+#define HW_INTR_CHECK_BUF           (HW_PRV_WRAM_SYSRV + 0x38)
+#define HW_INTR_VECTOR_BUF          (HW_PRV_WRAM_SYSRV + 0x3C)
+
+#define HW_VBLANK_COUNT_BUF         (HW_MAIN_MEM + 0x007ffc3c)
+#define HW_LOCK_ID_FLAG_SUB         (HW_MAIN_MEM + 0x007fffb8)
+
+#define HW_CARD_LOCK_BUF            (HW_MAIN_MEM + 0x007FFFE0)
+
+#endif //NITRO_HW_ARM7_MMAP_H
diff --git a/lib/include/nitro/hw/ARM9/io_reg.h b/lib/include/nitro/hw/ARM9/io_reg.h
new file mode 100644
index 0000000000..5fbd3499c7
--- /dev/null
+++ b/lib/include/nitro/hw/ARM9/io_reg.h
@@ -0,0 +1,11 @@
+#ifndef NITRO_HW_ARM9_IO_REG_H_
+#define NITRO_HW_ARM9_IO_REG_H_
+
+#define REG_SUBPINTF_ADDR          0x4000180
+#define reg_PXI_SUBPINTF           (*(REGType16v *)REG_SUBPINTF_ADDR)
+#define reg_PXI_SUBP_FIFO_CNT      (*(REGType16v *)0x4000184)
+#define reg_PXI_SEND_FIFO          (*(REGType32v *)0x4000188)
+
+#define reg_PXI_RECV_FIFO          (*(REGType32v *)0x4100000)
+
+#endif //NITRO_HW_ARM9_IO_REG_H_
diff --git a/lib/include/nitro/hw/ARM9/mmap.h b/lib/include/nitro/hw/ARM9/mmap.h
new file mode 100644
index 0000000000..94a847004a
--- /dev/null
+++ b/lib/include/nitro/hw/ARM9/mmap.h
@@ -0,0 +1,114 @@
+#ifndef NITRO_HW_ARM9_MMAP_H
+#define NITRO_HW_ARM9_MMAP_H
+
+extern u32 SDK_AUTOLOAD_DTCM_START[];
+
+#define HW_MAIN_MEM_EX_SIZE     0x00800000
+#define HW_MAIN_MEM_DEBUGGER_OFFSET     0x00700000
+
+#define HW_ITCM_IMAGE 0x01000000
+#define HW_ITCM                 0x01FF8000
+#define HW_ITCM_SIZE            0x00008000
+#define HW_ITCM_END (HW_ITCM + HW_ITCM_SIZE)
+
+#define HW_IOREG                0x04000000
+#define HW_CTRDG_ROM            0x08000000
+#define HW_BIOS                 0xffff0000
+
+#define HW_DTCM                 ((u32)SDK_AUTOLOAD_DTCM_START)
+#define HW_DTCM_SIZE            0x00004000
+#define HW_DTCM_END             (HW_DTCM + HW_DTCM_SIZE)
+
+#define HW_DTCM_SYSRV           (HW_DTCM + 0x00003fc0)
+#define HW_INTR_CHECK_BUF       (HW_DTCM_SYSRV + 0x38)
+#define HW_EXCP_VECTOR_BUF      (HW_DTCM_SYSRV + 0x1C)
+
+
+#define HW_CARD_ROM_HEADER_SIZE 0x00000160
+#define HW_DOWNLOAD_PARAMETER_SIZE      0x00000020
+
+#define HW_CHECK_DEBUGGER_SW    0x027ffc10
+#define HW_CARD_ROM_HEADER      (HW_MAIN_MEM + 0x007ffa80)
+#define HW_BOOT_CHECK_INFO_BUF  (HW_MAIN_MEM + 0x007ffc00)
+#define HW_RESET_PARAMETER_BUF  (HW_MAIN_MEM + 0x007ffc20)
+#define HW_ROM_BASE_OFFSET_BUF  (HW_MAIN_MEM + 0x007ffc2c)
+#define HW_CTRDG_MODULE_INFO_BUF        (HW_MAIN_MEM + 0x007ffc30)
+#define HW_ROM_HEADER_BUF       (HW_MAIN_MEM + 0x007ffe00)      // ROM registration area data buffer
+#define HW_RED_RESERVED         (HW_MAIN_MEM + 0x007ff800)      // Some kind of reserved data for shared memory
+#define HW_MAIN_MEM_EX_END      (HW_MAIN_MEM + HW_MAIN_MEM_EX_SIZE)
+#define HW_MAIN_MEM_SHARED      (HW_MAIN_MEM_EX_END - HW_MAIN_MEM_SHARED_SIZE)
+#define HW_DTCM_SVC_STACK_END   (HW_DTCM + 0x00003fc0)
+#define HW_DTCM_SVC_STACK       (HW_DTCM_SVC_STACK_END - HW_SVC_STACK_SIZE)
+#define HW_DTCM_IRQ_STACK_END   (HW_DTCM_SVC_STACK)
+
+#define HW_MAIN_MEM_SUB         (HW_MAIN_MEM_MAIN_END + 0x400000)
+
+#define HW_BIOS_EXCP_STACK_MAIN (HW_MAIN_MEM + 0x007ffd80)
+#define HW_EXCP_VECTOR_MAIN     (HW_MAIN_MEM + 0x007ffd9c)
+
+#define HW_PXI_SIGNAL_PARAM_ARM9 (HW_MAIN_MEM + 0x007fff80)
+
+#define HW_WM_RSSI_POOL         (HW_MAIN_MEM + 0x007fff98)
+
+#define HW_COMPONENT_PARAM      (HW_MAIN_MEM + 0x007fff9c)
+
+#define HW_LOCK_ID_FLAG_MAIN    (HW_MAIN_MEM + 0x007fffb0)
+#define HW_SHARED_LOCK_BUF      (HW_MAIN_MEM + 0x007fffc0)
+#define HW_CARD_LOCK_BUF        (HW_MAIN_MEM + 0x007fffe0)
+
+extern void SDK_SECTION_ARENA_EX_START(void);
+#define OSi_MAIN_ARENA_HI_DEFAULT       (HW_MAIN_MEM_MAIN_END)
+#define OSi_MAINEX_ARENA_HI_DEFAULT     (HW_MAIN_MEM + HW_MAIN_MEM_DEBUGGER_OFFSET)
+#define OSi_MAINEX_ARENA_LO_DEFAULT     ((u32)SDK_SECTION_ARENA_EX_START)
+#define HW_ITCM_ARENA_HI_DEFAULT        (HW_ITCM + HW_ITCM_SIZE)
+#define HW_SHARED_ARENA_HI_DEFAULT      (HW_RED_RESERVED - HW_CARD_ROM_HEADER_SIZE - HW_DOWNLOAD_PARAMETER_SIZE)
+#define HW_SHARED_ARENA_LO_DEFAULT      (HW_MAIN_MEM_SHARED)
+#define OSi_WRAM_MAIN_ARENA_HI_DEFAULT  (HW_WRAM)
+#define OSi_WRAM_MAIN_ARENA_LO_DEFAULT  (HW_WRAM)
+
+#define HW_BG_PLTT              0x05000000
+#define HW_BG_PLTT_END          0x05000200
+#define HW_BG_PLTT_SIZE         (HW_BG_PLTT_END-HW_BG_PLTT)
+#define HW_OBJ_PLTT             0x05000200
+#define HW_OBJ_PLTT_END         0x05000400
+#define HW_OBJ_PLTT_SIZE        (HW_OBJ_PLTT_END-HW_OBJ_PLTT)
+#define HW_PLTT                 HW_BG_PLTT
+#define HW_PLTT_END             HW_OBJ_PLTT_END
+#define HW_PLTT_SIZE            (HW_PLTT_END-HW_PLTT)
+#define HW_DB_BG_PLTT           0x05000400
+#define HW_DB_BG_PLTT_END       0x05000600
+#define HW_DB_BG_PLTT_SIZE      (HW_DB_BG_PLTT_END-HW_DB_BG_PLTT)
+#define HW_DB_OBJ_PLTT          0x05000600
+#define HW_DB_OBJ_PLTT_END      0x05000800
+#define HW_DB_OBJ_PLTT_SIZE     (HW_DB_OBJ_PLTT_END-HW_DB_OBJ_PLTT)
+#define HW_DB_PLTT              HW_DB_BG_PLTT
+#define HW_DB_PLTT_END          HW_DB_OBJ_PLTT_END
+#define HW_DB_PLTT_SIZE         (HW_DB_PLTT_END-HW_DB_PLTT)
+#define HW_BG_VRAM              0x06000000
+#define HW_BG_VRAM_END          0x06080000
+#define HW_BG_VRAM_SIZE         (HW_BG_VRAM_END-HW_BG_VRAM)
+#define HW_DB_BG_VRAM           0x06200000
+#define HW_DB_BG_VRAM_END       0x06220000
+#define HW_DB_BG_VRAM_SIZE      (HW_DB_BG_VRAM_END-HW_DB_BG_VRAM)
+#define HW_OBJ_VRAM             0x06400000
+#define HW_OBJ_VRAM_END         0x06440000
+#define HW_OBJ_VRAM_SIZE        (HW_OBJ_VRAM_END-HW_OBJ_VRAM)
+#define HW_DB_OBJ_VRAM          0x06600000
+#define HW_DB_OBJ_VRAM_END      0x06620000
+#define HW_DB_OBJ_VRAM_SIZE     (HW_DB_OBJ_VRAM_END-HW_DB_OBJ_VRAM)
+#define HW_LCDC_VRAM            0x6800000
+#define HW_LCDC_VRAM_END        0x68a4000
+#define HW_LCDC_VRAM_SIZE       (HW_LCDC_VRAM_END - HW_LCDC_VRAM)
+#define HW_OAM                  0x07000000
+#define HW_OAM_END              0x07000400
+#define HW_OAM_SIZE             (HW_OAM_END-HW_OAM)
+#define HW_DB_OAM               0x07000400
+#define HW_DB_OAM_END           0x07000800
+#define HW_DB_OAM_SIZE          (HW_DB_OAM_END-HW_DB_OAM)
+
+#define HW_CTRDG_RAM_END        0x0a010000
+
+#define HW_DTCM_SYSRV_OFS_INTR_VECTOR   0x3c
+#define HW_RESET_VECTOR         0xffff0000
+
+#endif //NITRO_HW_ARM9_MMAP_H
diff --git a/lib/include/nitro/hw/common/io_reg.h b/lib/include/nitro/hw/common/io_reg.h
new file mode 100644
index 0000000000..ea996f7fab
--- /dev/null
+++ b/lib/include/nitro/hw/common/io_reg.h
@@ -0,0 +1,1205 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+#ifndef NITRO_HW_IO_REG_SHARED_H_
+#define NITRO_HW_IO_REG_SHARED_H_
+
+#define HW_REG_BASE                0x04000000
+
+#define REG_TM0CNT_L_OFFSET        0x100
+#define REG_TM0CNT_L_ADDR          (HW_REG_BASE + REG_TM0CNT_L_OFFSET)
+#define reg_OS_TM0CNT_L            (*(REGType16v *)REG_TM0CNT_L_ADDR)
+
+#define REG_TM0CNT_H_OFFSET        0x102
+#define REG_TM0CNT_H_ADDR          (HW_REG_BASE + REG_TM0CNT_H_OFFSET)
+#define reg_OS_TM0CNT_H            (*(REGType16v *)REG_TM0CNT_H_ADDR)
+
+#define REG_TM1CNT_L_OFFSET        0x104
+#define REG_TM1CNT_L_ADDR          (HW_REG_BASE + REG_TM1CNT_L_OFFSET)
+#define reg_OS_TM1CNT_L            (*(REGType16v *)REG_TM1CNT_L_ADDR)
+
+#define REG_TM1CNT_H_OFFSET        0x106
+#define REG_TM1CNT_H_ADDR          (HW_REG_BASE + REG_TM1CNT_H_OFFSET)
+#define reg_OS_TM1CNT_H            (*(REGType16v *)REG_TM1CNT_H_ADDR)
+
+#define REG_TM2CNT_L_OFFSET        0x108
+#define REG_TM2CNT_L_ADDR          (HW_REG_BASE + REG_TM2CNT_L_OFFSET)
+#define reg_OS_TM2CNT_L            (*(REGType16v *)REG_TM2CNT_L_ADDR)
+
+#define REG_TM2CNT_H_OFFSET        0x10A
+#define REG_TM2CNT_H_ADDR          (HW_REG_BASE + REG_TM2CNT_H_OFFSET)
+#define reg_OS_TM2CNT_H            (*(REGType16v *)REG_TM2CNT_H_ADDR)
+
+#define REG_TM3CNT_L_OFFSET        0x10C
+#define REG_TM3CNT_L_ADDR          (HW_REG_BASE + REG_TM3CNT_L_OFFSET)
+#define reg_OS_TM3CNT_L            (*(REGType16v *)REG_TM3CNT_L_ADDR)
+
+#define REG_TM3CNT_H_OFFSET        0x10E
+#define REG_TM3CNT_H_ADDR          (HW_REG_BASE + REG_TM3CNT_H_OFFSET)
+#define reg_OS_TM3CNT_H            (*(REGType16v *)REG_TM3CNT_H_ADDR)
+
+#define REG_IE_OFFSET              0x210
+#define REG_IE_ADDR                (HW_REG_BASE + REG_IE_OFFSET)
+#define reg_OS_IE                  (*(REGType32v *)REG_IE_ADDR)
+
+#define REG_IME_OFFSET             0x208
+#define REG_IME_ADDR               (HW_REG_BASE + REG_IME_OFFSET)
+#define reg_OS_IME                 (*(REGType16v *)REG_IME_ADDR)
+
+#define REG_IF_OFFSET              0x214
+#define REG_IF_ADDR                (HW_REG_BASE + REG_IF_OFFSET)
+#define reg_OS_IF                  (*(REGType32v *)REG_IF_ADDR)
+
+#ifdef SDK_ARM7
+#define REG_MAINPINTF_OFFSET       0x180
+#define REG_MAINPINTF_ADDR         (HW_REG_BASE + REG_MAINPINTF_OFFSET)
+#define reg_OS_MAININTF            (*(REGType16v *)REG_MAINPINTF_ADDR)
+#else
+#define REG_SUBINTF_OFFSET         0x180
+#define REG_SUBINTF_ADDR           (HW_REG_BASE + REG_SUBINTF_OFFSET)
+#define reg_OS_SUBINTF             (*(REGType16v *)REG_SUBINTF_ADDR)
+#endif //SDK_ARM7
+
+#define REG_OS_TM0CNT_H_PS_SHIFT                           0
+
+#define REG_VCOUNT_OFFSET          0x6
+
+#define reg_GX_DISPCNT             (*(REGType32v *)0x4000000)
+#define reg_GX_DISPSTAT            (*(REGType16v *)0x4000004)
+#define reg_GX_VCOUNT              (*(REGType16v *)(HW_REG_BASE + REG_VCOUNT_OFFSET))
+
+#define reg_G2_BG0CNT              (*(REGType16v *)0x4000008)
+#define reg_G2_BG1CNT              (*(REGType16v *)0x400000a)
+#define reg_G2_BG2CNT              (*(REGType16v *)0x400000c)
+#define reg_G2_BG3CNT              (*(REGType16v *)0x400000e)
+#define reg_G2_BG0OFS              (*(REGType32v *)0x4000010)
+#define reg_G2_BG0HOFS             (*(REGType16v *)0x4000010)
+#define reg_G2_BG0VOFS             (*(REGType16v *)0x4000012)
+#define reg_G2_BG1OFS              (*(REGType32v *)0x4000014)
+#define reg_G2_BG1HOFS             (*(REGType16v *)0x4000014)
+#define reg_G2_BG1VOFS             (*(REGType16v *)0x4000016)
+#define reg_G2_BG2OFS              (*(REGType32v *)0x4000018)
+#define reg_G2_BG2HOFS             (*(REGType16v *)0x4000018)
+#define reg_G2_BG2VOFS             (*(REGType16v *)0x400001a)
+#define reg_G2_BG3OFS              (*(REGType32v *)0x400001c)
+#define reg_G2_BG3HOFS             (*(REGType16v *)0x400001c)
+#define reg_G2_BG3VOFS             (*(REGType16v *)0x400001e)
+#define reg_G2_BG2PA               (*(REGType16v *)0x4000020)
+#define reg_G2_BG2PB               (*(REGType16v *)0x4000022)
+#define reg_G2_BG2PC               (*(REGType16v *)0x4000024)
+#define reg_G2_BG2PD               (*(REGType16v *)0x4000026)
+#define reg_G2_BG2X                (*(REGType32v *)0x4000028)
+#define reg_G2_BG2Y                (*(REGType32v *)0x400002c)
+#define reg_G2_BG3PA               (*(REGType16v *)0x4000030)
+#define reg_G2_BG3PB               (*(REGType16v *)0x4000032)
+#define reg_G2_BG3PC               (*(REGType16v *)0x4000034)
+#define reg_G2_BG3PD               (*(REGType16v *)0x4000036)
+#define reg_G2_BG3X                (*(REGType32v *)0x4000038)
+#define reg_G2_BG3Y                (*(REGType32v *)0x400003c)
+#define reg_G2_WIN0H               (*(REGType16v *)0x4000040)
+#define reg_G2_WIN1H               (*(REGType16v *)0x4000042)
+#define reg_G2_WIN0V               (*(REGType16v *)0x4000044)
+#define reg_G2_WIN1V               (*(REGType16v *)0x4000046)
+#define reg_G2_WININ               (*(REGType16v *)0x4000048)
+#define reg_G2_WINOUT              (*(REGType16v *)0x400004a)
+#define reg_G2_MOSAIC              (*(REGType16v *)0x400004c)
+#define reg_G2_BLDCNT              (*(REGType16v *)0x4000050)
+#define reg_G2_BLDALPHA            (*(REGType16v *)0x4000052)
+#define reg_G2_BLDY                (*(REGType16v *)0x4000054)
+
+#define reg_G3X_DISP3DCNT          (*(REGType16v *)0x4000060)
+
+#define reg_GX_DISPCAPCNT          (*(REGType32v *)0x4000064)
+#define reg_GX_DISP_MMEM_FIFO      (*(REGType32v *)0x4000068)
+#define reg_GX_DISP_MMEM_FIFO_L    (*(REGType16v *)0x4000068)
+#define reg_GX_DISP_MMEM_FIFO_H    (*(REGType16v *)0x400006a)
+#define reg_GX_MASTER_BRIGHT       (*(REGType16v *)0x400006c)
+#define reg_GX_TVOUTCNT            (*(REGType16v *)0x4000070)
+
+#define reg_MI_DMA0SAD             (*(REGType32v *)0x40000b0)
+#define reg_MI_DMA0DAD             (*(REGType32v *)0x40000b4)
+#define reg_MI_DMA0CNT             (*(REGType32v *)0x40000b8)
+#define reg_MI_DMA1SAD             (*(REGType32v *)0x40000bc)
+#define reg_MI_DMA1DAD             (*(REGType32v *)0x40000c0)
+#define reg_MI_DMA1CNT             (*(REGType32v *)0x40000c4)
+#define reg_MI_DMA2SAD             (*(REGType32v *)0x40000c8)
+#define reg_MI_DMA2DAD             (*(REGType32v *)0x40000cc)
+#define reg_MI_DMA2CNT             (*(REGType32v *)0x40000d0)
+#define reg_MI_DMA3SAD             (*(REGType32v *)0x40000d4)
+#define reg_MI_DMA3DAD             (*(REGType32v *)0x40000d8)
+#define reg_MI_DMA3CNT             (*(REGType32v *)0x40000dc)
+#define reg_MI_DMA0_CLR_DATA       (*(REGType32v *)0x40000e0)
+#define reg_MI_DMA1_CLR_DATA       (*(REGType32v *)0x40000e4)
+#define reg_MI_DMA2_CLR_DATA       (*(REGType32v *)0x40000e8)
+#define reg_MI_DMA3_CLR_DATA       (*(REGType32v *)0x40000ec)
+
+#define reg_EXI_SIODATA32          (*(REGType32v *)0x4000120)
+#define reg_EXI_SIOCNT             (*(REGType16v *)0x4000128)
+#define reg_EXI_SIOSEL             (*(REGType32v *)0x400012c)
+
+#define reg_PAD_KEYINPUT           (*(REGType16v *)0x4000130)
+#define reg_PAD_KEYCNT             (*(REGType16v *)0x4000132)
+
+#define reg_MI_MCCNT0              (*(REGType16v *)0x40001a0)
+#define reg_CARD_MASTERCNT         (*(REGType8v  *)0x40001a1) //?
+#define reg_MI_MCD0                (*(REGType16v *)0x40001a2)
+#define reg_MI_MCCNT1              (*(REGType32v *)0x40001a4)
+#define reg_CARD_CNT               (*(REGType32v *)0x40001a4) //?
+#define reg_MI_MCCMD0              (*(REGType32v *)0x40001a8)
+#define reg_CARD_CMD               (*(REGType8v  *)0x40001a8) //?
+#define reg_MI_MCCMD1              (*(REGType32v *)0x40001ac)
+#define reg_MI_EXMEMCNT            (*(REGType16v *)0x4000204)
+
+#define reg_OS_PAUSE               (*(REGType16v *)0x4000300)
+
+#define reg_GX_VRAMCNT             (*(REGType32v *)0x4000240)
+#define reg_GX_VRAMCNT_A           (*(REGType8v  *)0x4000240)
+#define reg_GX_VRAMCNT_B           (*(REGType8v  *)0x4000241)
+#define reg_GX_VRAMCNT_C           (*(REGType8v  *)0x4000242)
+#define reg_GX_VRAMCNT_D           (*(REGType8v  *)0x4000243)
+#define reg_GX_WVRAMCNT            (*(REGType32v *)0x4000244)
+#define reg_GX_VRAMCNT_E           (*(REGType8v  *)0x4000244)
+#define reg_GX_VRAMCNT_F           (*(REGType8v  *)0x4000245)
+#define reg_GX_VRAMCNT_G           (*(REGType8v  *)0x4000246)
+#define reg_GX_VRAMCNT_WRAM        (*(REGType8v  *)0x4000247)
+#define reg_GX_VRAM_HI_CNT         (*(REGType16v *)0x4000248)
+#define reg_GX_VRAMCNT_H           (*(REGType8v  *)0x4000248)
+#define reg_GX_VRAMCNT_I           (*(REGType8v  *)0x4000249)
+
+#define reg_CP_DIVCNT              (*(REGType16v *)0x4000280)
+
+#define REG_DIV_NUMER_ADDR         0x4000290
+#define reg_CP_DIV_NUMER           (*(REGType64v *)REG_DIV_NUMER_ADDR)
+#define reg_CP_DIV_NUMER_L         (*(REGType32v *)REG_DIV_NUMER_ADDR)
+#define reg_CP_DIV_NUMER_H         (*(REGType32v *)0x4000294)
+#define reg_CP_DIV_DENOM           (*(REGType64v *)0x4000298)
+#define reg_CP_DIV_DENOM_L         (*(REGType32v *)0x4000298)
+#define reg_CP_DIV_DENOM_H         (*(REGType32v *)0x400029c)
+#define reg_CP_DIV_RESULT          (*(REGType64v *)0x40002A0)
+#define reg_CP_DIV_RESULT_L        (*(REGType32v *)0x40002A0)
+#define reg_CP_DIV_RESULT_H        (*(REGType32v *)0x40002A4)
+#define reg_CP_DIVREM_RESULT       (*(REGType64v *)0x40002A8)
+#define reg_CP_DIVREM_RESULT_L     (*(REGType32v *)0x40002A8)
+#define reg_CP_DIVREM_RESULT_H     (*(REGType32v *)0x40002Ac)
+#define reg_CP_SQRTCNT             (*(REGType16v *)0x40002B0)
+#define reg_CP_SQRT_RESULT         (*(REGType32v *)0x40002B4)
+#define reg_CP_SQRT_PARAM          (*(REGType64v *)0x40002B8)
+#define reg_CP_SQRT_PARAM_L        (*(REGType32v *)0x40002B8)
+#define reg_CP_SQRT_PARAM_H        (*(REGType32v *)0x40002Bc)
+
+#define reg_GX_POWCNT              (*(REGType16v *)0x4000304)
+
+#define reg_G3X_RDLINES_COUNT      (*(const REGType16v *)0x4000320)
+#define reg_G3X_EDGE_COLOR_0       (*(REGType32v *)0x4000330)
+#define reg_G3X_EDGE_COLOR_0_L     (*(REGType16v *)0x4000330)
+#define reg_G3X_EDGE_COLOR_0_H     (*(REGType16v *)0x4000332)
+#define reg_G3X_EDGE_COLOR_1       (*(REGType32v *)0x4000334)
+#define reg_G3X_EDGE_COLOR_1_L     (*(REGType16v *)0x4000334)
+#define reg_G3X_EDGE_COLOR_1_H     (*(REGType16v *)0x4000336)
+#define reg_G3X_EDGE_COLOR_2       (*(REGType32v *)0x4000338)
+#define reg_G3X_EDGE_COLOR_2_L     (*(REGType16v *)0x4000338)
+#define reg_G3X_EDGE_COLOR_2_H     (*(REGType16v *)0x400033a)
+#define reg_G3X_EDGE_COLOR_3       (*(REGType32v *)0x400033c)
+#define reg_G3X_EDGE_COLOR_3_L     (*(REGType16v *)0x400033c)
+#define reg_G3X_EDGE_COLOR_3_H     (*(REGType16v *)0x400033e)
+#define reg_G3X_ALPHA_TEST_REF     (*(REGType16v *)0x4000340)
+#define reg_G3X_CLEAR_COLOR        (*(REGType32v *)0x4000350)
+#define reg_G3X_CLEAR_DEPTH        (*(REGType16v *)0x4000354)
+#define reg_G3X_CLRIMAGE_OFFSET    (*(REGType16v *)0x4000356)
+#define reg_G3X_FOG_COLOR          (*(REGType32v *)0x4000358)
+#define reg_G3X_FOG_OFFSET         (*(REGType16v *)0x400035c)
+#define reg_G3X_FOG_TABLE_0        (*(REGType32v *)0x4000360)
+#define reg_G3X_FOG_TABLE_0_L      (*(REGType16v *)0x4000360)
+#define reg_G3X_FOG_TABLE_0_H      (*(REGType16v *)0x4000362)
+#define reg_G3X_FOG_TABLE_1        (*(REGType32v *)0x4000364)
+#define reg_G3X_FOG_TABLE_1_L      (*(REGType16v *)0x4000364)
+#define reg_G3X_FOG_TABLE_1_H      (*(REGType16v *)0x4000366)
+#define reg_G3X_FOG_TABLE_2        (*(REGType32v *)0x4000368)
+#define reg_G3X_FOG_TABLE_2_L      (*(REGType16v *)0x4000368)
+#define reg_G3X_FOG_TABLE_2_H      (*(REGType16v *)0x400036a)
+#define reg_G3X_FOG_TABLE_3        (*(REGType32v *)0x400036c)
+#define reg_G3X_FOG_TABLE_3_L      (*(REGType16v *)0x400036c)
+#define reg_G3X_FOG_TABLE_3_H      (*(REGType16v *)0x400036e)
+#define reg_G3X_FOG_TABLE_4        (*(REGType32v *)0x4000370)
+#define reg_G3X_FOG_TABLE_4_L      (*(REGType16v *)0x4000370)
+#define reg_G3X_FOG_TABLE_4_H      (*(REGType16v *)0x4000372)
+#define reg_G3X_FOG_TABLE_5        (*(REGType32v *)0x4000374)
+#define reg_G3X_FOG_TABLE_5_L      (*(REGType16v *)0x4000374)
+#define reg_G3X_FOG_TABLE_5_H      (*(REGType16v *)0x4000376)
+#define reg_G3X_FOG_TABLE_6        (*(REGType32v *)0x4000378)
+#define reg_G3X_FOG_TABLE_6_L      (*(REGType16v *)0x4000378)
+#define reg_G3X_FOG_TABLE_6_H      (*(REGType16v *)0x400037a)
+#define reg_G3X_FOG_TABLE_7        (*(REGType32v *)0x400037c)
+#define reg_G3X_FOG_TABLE_7_L      (*(REGType16v *)0x400037c)
+#define reg_G3X_FOG_TABLE_7_H      (*(REGType16v *)0x400037e)
+#define reg_G3X_TOON_TABLE_0       (*(REGType32v *)0x4000380)
+#define reg_G3X_TOON_TABLE_0_L     (*(REGType16v *)0x4000380)
+#define reg_G3X_TOON_TABLE_0_H     (*(REGType16v *)0x4000382)
+#define reg_G3X_TOON_TABLE_1       (*(REGType32v *)0x4000384)
+#define reg_G3X_TOON_TABLE_1_L     (*(REGType16v *)0x4000384)
+#define reg_G3X_TOON_TABLE_1_H     (*(REGType16v *)0x4000386)
+#define reg_G3X_TOON_TABLE_2       (*(REGType32v *)0x4000388)
+#define reg_G3X_TOON_TABLE_2_L     (*(REGType16v *)0x4000388)
+#define reg_G3X_TOON_TABLE_2_H     (*(REGType16v *)0x400038a)
+#define reg_G3X_TOON_TABLE_3       (*(REGType32v *)0x400038c)
+#define reg_G3X_TOON_TABLE_3_L     (*(REGType16v *)0x400038c)
+#define reg_G3X_TOON_TABLE_3_H     (*(REGType16v *)0x400038e)
+#define reg_G3X_TOON_TABLE_4       (*(REGType32v *)0x4000390)
+#define reg_G3X_TOON_TABLE_4_L     (*(REGType16v *)0x4000390)
+#define reg_G3X_TOON_TABLE_4_H     (*(REGType16v *)0x4000392)
+#define reg_G3X_TOON_TABLE_5       (*(REGType32v *)0x4000394)
+#define reg_G3X_TOON_TABLE_5_L     (*(REGType16v *)0x4000394)
+#define reg_G3X_TOON_TABLE_5_H     (*(REGType16v *)0x4000396)
+#define reg_G3X_TOON_TABLE_7       (*(REGType32v *)0x400039c)
+#define reg_G3X_TOON_TABLE_7_L     (*(REGType16v *)0x400039c)
+#define reg_G3X_TOON_TABLE_7_H     (*(REGType16v *)0x400039e)
+#define reg_G3X_TOON_TABLE_8       (*(REGType32v *)0x40003a0)
+#define reg_G3X_TOON_TABLE_8_L     (*(REGType16v *)0x40003a0)
+#define reg_G3X_TOON_TABLE_8_H     (*(REGType16v *)0x40003a2)
+#define reg_G3X_TOON_TABLE_9       (*(REGType32v *)0x40003a4)
+#define reg_G3X_TOON_TABLE_9_L     (*(REGType16v *)0x40003a4)
+#define reg_G3X_TOON_TABLE_9_H     (*(REGType16v *)0x40003a6)
+#define reg_G3X_TOON_TABLE_10      (*(REGType32v *)0x40003a8)
+#define reg_G3X_TOON_TABLE_10_L    (*(REGType16v *)0x40003a8)
+#define reg_G3X_TOON_TABLE_10_H    (*(REGType16v *)0x40003aa)
+#define reg_G3X_TOON_TABLE_11      (*(REGType32v *)0x40003ac)
+#define reg_G3X_TOON_TABLE_11_L    (*(REGType16v *)0x40003ac)
+#define reg_G3X_TOON_TABLE_11_H    (*(REGType16v *)0x40003ae)
+#define reg_G3X_TOON_TABLE_12      (*(REGType32v *)0x40003b0)
+#define reg_G3X_TOON_TABLE_12_L    (*(REGType16v *)0x40003b0)
+#define reg_G3X_TOON_TABLE_12_H    (*(REGType16v *)0x40003b2)
+#define reg_G3X_TOON_TABLE_13      (*(REGType32v *)0x40003b4)
+#define reg_G3X_TOON_TABLE_13_L    (*(REGType16v *)0x40003b4)
+#define reg_G3X_TOON_TABLE_13_H    (*(REGType16v *)0x40003b6)
+#define reg_G3X_TOON_TABLE_14      (*(REGType32v *)0x40003b8)
+#define reg_G3X_TOON_TABLE_14_L    (*(REGType16v *)0x40003b8)
+#define reg_G3X_TOON_TABLE_14_H    (*(REGType16v *)0x40003ba)
+#define reg_G3X_TOON_TABLE_15      (*(REGType32v *)0x40003bc)
+#define reg_G3X_TOON_TABLE_15_L    (*(REGType16v *)0x40003bc)
+#define reg_G3X_TOON_TABLE_15_H    (*(REGType16v *)0x40003be)
+#define reg_G3X_GXFIFO             (*(REGType32v *)0x4000400)
+
+#define reg_G3_MTX_MODE            (*(REGType32v *)0x4000440)
+#define reg_G3_MTX_PUSH            (*(REGType32v *)0x4000444)
+#define reg_G3_MTX_POP             (*(REGType32v *)0x4000448)
+#define reg_G3_MTX_STORE           (*(REGType32v *)0x400044c)
+#define reg_G3_MTX_RESTORE         (*(REGType32v *)0x4000450)
+#define reg_G3_MTX_IDENTITY        (*(REGType32v *)0x4000454)
+#define reg_G3_MTX_LOAD_4x4        (*(REGType32v *)0x4000458)
+#define reg_G3_MTX_LOAD_4x3        (*(REGType32v *)0x400045c)
+#define reg_G3_MTX_MULT_4x4        (*(REGType32v *)0x4000460)
+#define reg_G3_MTX_MULT_4x3        (*(REGType32v *)0x4000464)
+#define reg_G3_MTX_MULT_3x3        (*(REGType32v *)0x4000468)
+#define reg_G3_MTX_SCALE           (*(REGType32v *)0x400046c)
+#define reg_G3_MTX_TRANS           (*(REGType32v *)0x4000470)
+#define reg_G3_COLOR               (*(REGType32v *)0x4000480)
+#define reg_G3_NORMAL              (*(REGType32v *)0x4000484)
+#define reg_G3_TEXCOORD            (*(REGType32v *)0x4000488)
+#define reg_G3_VTX_16              (*(REGType32v *)0x400048c)
+#define reg_G3_VTX_10              (*(REGType32v *)0x4000490)
+#define reg_G3_VTX_XY              (*(REGType32v *)0x4000494)
+#define reg_G3_VTX_XZ              (*(REGType32v *)0x4000498)
+#define reg_G3_VTX_YZ              (*(REGType32v *)0x400049c)
+#define reg_G3_VTX_DIFF            (*(REGType32v *)0x40004a0)
+#define reg_G3_POLYGON_ATTR        (*(REGType32v *)0x40004a4)
+#define reg_G3_TEXIMAGE_PARAM      (*(REGType32v *)0x40004a8)
+#define reg_G3_TEXPLTT_BASE        (*(REGType32v *)0x40004ac)
+#define reg_G3_DIF_AMB             (*(REGType32v *)0x40004c0)
+#define reg_G3_SPE_EMI             (*(REGType32v *)0x40004c4)
+#define reg_G3_LIGHT_VECTOR        (*(REGType32v *)0x40004c8)
+#define reg_G3_LIGHT_COLOR         (*(REGType32v *)0x40004cc)
+#define reg_G3_SHININESS           (*(REGType32v *)0x40004d0)
+#define reg_G3_BEGIN_VTXS          (*(REGType32v *)0x4000500)
+#define reg_G3_END_VTXS            (*(REGType32v *)0x4000504)
+#define reg_G3_SWAP_BUFFERS        (*(REGType32v *)0x4000540)
+#define reg_G3_VIEWPORT            (*(REGType32v *)0x4000580)
+#define reg_G3_BOX_TEST            (*(REGType32v *)0x40005c0)
+#define reg_G3_POS_TEST            (*(REGType32v *)0x40005c4)
+#define reg_G3_VEC_TEST            (*(REGType32v *)0x40005c8)
+
+#define reg_G3X_GXSTAT             (*(REGType32v *)0x4000600)
+#define reg_G3X_LISTRAM_COUNT      (*(REGType16v *)0x4000604)
+#define reg_G3X_VTXRAM_COUNT       (*(REGType16v *)0x4000606)
+#define reg_G3X_DISP_1DOT_DEPTH    (*(REGType16v *)0x4000610)
+#define reg_G3X_POS_RESULT_X       (*(const REGType32v *)0x4000620)
+#define reg_G3X_POS_RESULT_Y       (*(const REGType32v *)0x4000624)
+#define reg_G3X_POS_RESULT_Z       (*(const REGType32v *)0x4000628)
+#define reg_G3X_POS_RESULT_W       (*(const REGType32v *)0x400062c)
+#define reg_G3X_VEC_RESULT_X       (*(const REGType16v *)0x4000630)
+#define reg_G3X_VEC_RESULT_Y       (*(const REGType16v *)0x4000632)
+#define reg_G3X_VEC_RESULT_Z       (*(const REGType16v *)0x4000634)
+#define reg_G3X_CLIPMTX_RESULT_0   (*(const REGType32v *)0x4000640)
+#define reg_G3X_CLIPMTX_RESULT_1   (*(const REGType32v *)0x4000644)
+#define reg_G3X_CLIPMTX_RESULT_2   (*(const REGType32v *)0x4000648)
+#define reg_G3X_CLIPMTX_RESULT_3   (*(const REGType32v *)0x400064c)
+#define reg_G3X_CLIPMTX_RESULT_4   (*(const REGType32v *)0x4000650)
+#define reg_G3X_CLIPMTX_RESULT_5   (*(const REGType32v *)0x4000654)
+#define reg_G3X_CLIPMTX_RESULT_6   (*(const REGType32v *)0x4000658)
+#define reg_G3X_CLIPMTX_RESULT_7   (*(const REGType32v *)0x400065c)
+#define reg_G3X_CLIPMTX_RESULT_8   (*(const REGType32v *)0x4000660)
+#define reg_G3X_CLIPMTX_RESULT_9   (*(const REGType32v *)0x4000664)
+#define reg_G3X_CLIPMTX_RESULT_10  (*(const REGType32v *)0x4000668)
+#define reg_G3X_CLIPMTX_RESULT_11  (*(const REGType32v *)0x400066c)
+#define reg_G3X_CLIPMTX_RESULT_12  (*(const REGType32v *)0x4000670)
+#define reg_G3X_CLIPMTX_RESULT_13  (*(const REGType32v *)0x4000674)
+#define reg_G3X_CLIPMTX_RESULT_14  (*(const REGType32v *)0x4000678)
+#define reg_G3X_CLIPMTX_RESULT_15  (*(const REGType32v *)0x400067c)
+#define reg_G3X_VECMTX_RESULT_0    (*(const REGType32v *)0x4000680)
+#define reg_G3X_VECMTX_RESULT_1    (*(const REGType32v *)0x4000684)
+#define reg_G3X_VECMTX_RESULT_2    (*(const REGType32v *)0x4000688)
+#define reg_G3X_VECMTX_RESULT_3    (*(const REGType32v *)0x400068c)
+#define reg_G3X_VECMTX_RESULT_4    (*(const REGType32v *)0x4000690)
+#define reg_G3X_VECMTX_RESULT_5    (*(const REGType32v *)0x4000694)
+#define reg_G3X_VECMTX_RESULT_6    (*(const REGType32v *)0x4000698)
+#define reg_G3X_VECMTX_RESULT_7    (*(const REGType32v *)0x400069c)
+#define reg_G3X_VECMTX_RESULT_8    (*(const REGType32v *)0x40006a0)
+
+#define reg_GXS_DB_DISPCNT         (*(REGType32v *)0x4001000)
+
+#define reg_G2S_DB_BG0CNT          (*(REGType16v *)0x4001008)
+#define reg_G2S_DB_BG1CNT          (*(REGType16v *)0x400100a)
+#define reg_G2S_DB_BG2CNT          (*(REGType16v *)0x400100c)
+#define reg_G2S_DB_BG3CNT          (*(REGType16v *)0x400100e)
+#define reg_G2S_DB_BG0OFS          (*(REGType32v *)0x4001010)
+#define reg_G2S_DB_BG0HOFS         (*(REGType16v *)0x4001010)
+#define reg_G2S_DB_BG0VOFS         (*(REGType16v *)0x4001012)
+#define reg_G2S_DB_BG1OFS          (*(REGType32v *)0x4001014)
+#define reg_G2S_DB_BG1HOFS         (*(REGType16v *)0x4001014)
+#define reg_G2S_DB_BG1VOFS         (*(REGType16v *)0x4001016)
+#define reg_G2S_DB_BG2OFS          (*(REGType32v *)0x4001018)
+#define reg_G2S_DB_BG2HOFS         (*(REGType16v *)0x4001018)
+#define reg_G2S_DB_BG2VOFS         (*(REGType16v *)0x400101a)
+#define reg_G2S_DB_BG3OFS          (*(REGType32v *)0x400101c)
+#define reg_G2S_DB_BG3HOFS         (*(REGType16v *)0x400101c)
+#define reg_G2S_DB_BG3VOFS         (*(REGType16v *)0x400101e)
+#define reg_G2S_DB_BG2PA           (*(REGType16v *)0x4001020)
+#define reg_G2S_DB_BG2PB           (*(REGType16v *)0x4001022)
+#define reg_G2S_DB_BG2PC           (*(REGType16v *)0x4001024)
+#define reg_G2S_DB_BG2PD           (*(REGType16v *)0x4001026)
+#define reg_G2S_DB_BG2X            (*(REGType32v *)0x4001028)
+#define reg_G2S_DB_BG2Y            (*(REGType32v *)0x400102c)
+#define reg_G2S_DB_BG3PA           (*(REGType16v *)0x4001030)
+#define reg_G2S_DB_BG3PB           (*(REGType16v *)0x4001032)
+#define reg_G2S_DB_BG3PC           (*(REGType16v *)0x4001034)
+#define reg_G2S_DB_BG3PD           (*(REGType16v *)0x4001036)
+#define reg_G2S_DB_BG3X            (*(REGType32v *)0x4001038)
+#define reg_G2S_DB_BG3Y            (*(REGType32v *)0x400103c)
+#define reg_G2S_DB_WIN0H           (*(REGType16v *)0x4001040)
+#define reg_G2S_DB_WIN1H           (*(REGType16v *)0x4001042)
+#define reg_G2S_DB_WIN0V           (*(REGType16v *)0x4001044)
+#define reg_G2S_DB_WIN1V           (*(REGType16v *)0x4001046)
+#define reg_G2S_DB_WININ           (*(REGType16v *)0x4001048)
+#define reg_G2S_DB_WINOUT          (*(REGType16v *)0x400104a)
+#define reg_G2S_DB_MOSAIC          (*(REGType16v *)0x400104c)
+#define reg_G2S_DB_BLDCNT          (*(REGType16v *)0x4001050)
+#define reg_G2S_DB_BLDALPHA        (*(REGType16v *)0x4001052)
+#define reg_G2S_DB_BLDY            (*(REGType16v *)0x4001054)
+
+#define reg_GXS_DB_MASTER_BRIGHT   (*(REGType16v *)0x400106c)
+
+#define reg_MI_MCD1                (*(REGType32v *)0x4100010)
+#define reg_CARD_DATA              (*(REGType32v *)0x4100010) //?
+
+#define REG_OS_IE_VB_SHIFT                                 0
+#define REG_OS_IE_HB_SHIFT                                 1
+#define REG_OS_IE_VE_SHIFT                                 2
+#define REG_OS_IE_T0_SHIFT                                 3
+#define REG_OS_IE_T1_SHIFT                                 4
+#define REG_OS_IE_T2_SHIFT                                 5
+#define REG_OS_IE_T3_SHIFT                                 6
+#define REG_OS_IE_D0_SHIFT                                 8
+#define REG_OS_IE_D1_SHIFT                                 9
+#define REG_OS_IE_D2_SHIFT                                 10
+#define REG_OS_IE_D3_SHIFT                                 11
+#define REG_OS_IE_K_SHIFT                                  12
+#define REG_OS_IE_I_D_SHIFT                                13
+#define REG_OS_IE_A7_SHIFT                                 16
+#define REG_OS_IE_IFE_SHIFT                                17
+#define REG_OS_IE_IFN_SHIFT                                18
+#define REG_OS_IE_MC_SHIFT                                 19
+#define REG_OS_IE_MI_SHIFT                                 20
+#define REG_OS_IE_PM_SHIFT                                 22
+#define REG_OS_IE_SPI_SHIFT                                23
+#define REG_OS_IE_WL_SHIFT                                 24
+
+#define REG_PAD_KEYINPUT_L_SHIFT                           9
+#define REG_PAD_KEYINPUT_L_SIZE                            1
+#define REG_PAD_KEYINPUT_L_MASK                            0x0200
+
+#define REG_PAD_KEYINPUT_R_SHIFT                           8
+#define REG_PAD_KEYINPUT_R_SIZE                            1
+#define REG_PAD_KEYINPUT_R_MASK                            0x0100
+
+#define REG_PAD_KEYINPUT_DOWN_SHIFT                        7
+#define REG_PAD_KEYINPUT_DOWN_SIZE                         1
+#define REG_PAD_KEYINPUT_DOWN_MASK                         0x0080
+
+#define REG_PAD_KEYINPUT_UP_SHIFT                          6
+#define REG_PAD_KEYINPUT_UP_SIZE                           1
+#define REG_PAD_KEYINPUT_UP_MASK                           0x0040
+
+#define REG_PAD_KEYINPUT_LEFT_SHIFT                        5
+#define REG_PAD_KEYINPUT_LEFT_SIZE                         1
+#define REG_PAD_KEYINPUT_LEFT_MASK                         0x0020
+
+#define REG_PAD_KEYINPUT_RIGHT_SHIFT                       4
+#define REG_PAD_KEYINPUT_RIGHT_SIZE                        1
+#define REG_PAD_KEYINPUT_RIGHT_MASK                        0x0010
+
+#define REG_PAD_KEYINPUT_START_SHIFT                       3
+#define REG_PAD_KEYINPUT_START_SIZE                        1
+#define REG_PAD_KEYINPUT_START_MASK                        0x0008
+
+#define REG_PAD_KEYINPUT_SEL_SHIFT                         2
+#define REG_PAD_KEYINPUT_SEL_SIZE                          1
+#define REG_PAD_KEYINPUT_SEL_MASK                          0x0004
+
+#define REG_PAD_KEYINPUT_B_SHIFT                           1
+#define REG_PAD_KEYINPUT_B_SIZE                            1
+#define REG_PAD_KEYINPUT_B_MASK                            0x0002
+
+#define REG_PAD_KEYINPUT_A_SHIFT                           0
+#define REG_PAD_KEYINPUT_A_SIZE                            1
+#define REG_PAD_KEYINPUT_A_MASK                            0x0001
+
+#ifndef SDK_ASM
+#define REG_PAD_KEYINPUT_FIELD( l, r, down, up, left, right, start, sel, b, a ) \
+    (u16)( \
+    ((u32)(l) << REG_PAD_KEYINPUT_L_SHIFT) | \
+    ((u32)(r) << REG_PAD_KEYINPUT_R_SHIFT) | \
+    ((u32)(down) << REG_PAD_KEYINPUT_DOWN_SHIFT) | \
+    ((u32)(up) << REG_PAD_KEYINPUT_UP_SHIFT) | \
+    ((u32)(left) << REG_PAD_KEYINPUT_LEFT_SHIFT) | \
+    ((u32)(right) << REG_PAD_KEYINPUT_RIGHT_SHIFT) | \
+    ((u32)(start) << REG_PAD_KEYINPUT_START_SHIFT) | \
+    ((u32)(sel) << REG_PAD_KEYINPUT_SEL_SHIFT) | \
+    ((u32)(b) << REG_PAD_KEYINPUT_B_SHIFT) | \
+    ((u32)(a) << REG_PAD_KEYINPUT_A_SHIFT))
+#endif
+
+#define REG_PAD_KEYCNT_LOGIC_SHIFT                         15
+#define REG_PAD_KEYCNT_LOGIC_SIZE                          1
+#define REG_PAD_KEYCNT_LOGIC_MASK                          0x8000
+
+#define REG_PAD_KEYCNT_INTR_SHIFT                          14
+#define REG_PAD_KEYCNT_INTR_SIZE                           1
+#define REG_PAD_KEYCNT_INTR_MASK                           0x4000
+
+#define REG_PAD_KEYCNT_L_SHIFT                             9
+#define REG_PAD_KEYCNT_L_SIZE                              1
+#define REG_PAD_KEYCNT_L_MASK                              0x0200
+
+#define REG_PAD_KEYCNT_R_SHIFT                             8
+#define REG_PAD_KEYCNT_R_SIZE                              1
+#define REG_PAD_KEYCNT_R_MASK                              0x0100
+
+#define REG_PAD_KEYCNT_DOWN_SHIFT                          7
+#define REG_PAD_KEYCNT_DOWN_SIZE                           1
+#define REG_PAD_KEYCNT_DOWN_MASK                           0x0080
+
+#define REG_PAD_KEYCNT_UP_SHIFT                            6
+#define REG_PAD_KEYCNT_UP_SIZE                             1
+#define REG_PAD_KEYCNT_UP_MASK                             0x0040
+
+#define REG_PAD_KEYCNT_LEFT_SHIFT                          5
+#define REG_PAD_KEYCNT_LEFT_SIZE                           1
+#define REG_PAD_KEYCNT_LEFT_MASK                           0x0020
+
+#define REG_PAD_KEYCNT_RIGHT_SHIFT                         4
+#define REG_PAD_KEYCNT_RIGHT_SIZE                          1
+#define REG_PAD_KEYCNT_RIGHT_MASK                          0x0010
+
+#define REG_PAD_KEYCNT_START_SHIFT                         3
+#define REG_PAD_KEYCNT_START_SIZE                          1
+#define REG_PAD_KEYCNT_START_MASK                          0x0008
+
+#define REG_PAD_KEYCNT_SEL_SHIFT                           2
+#define REG_PAD_KEYCNT_SEL_SIZE                            1
+#define REG_PAD_KEYCNT_SEL_MASK                            0x0004
+
+#define REG_PAD_KEYCNT_B_SHIFT                             1
+#define REG_PAD_KEYCNT_B_SIZE                              1
+#define REG_PAD_KEYCNT_B_MASK                              0x0002
+
+#define REG_PAD_KEYCNT_A_SHIFT                             0
+#define REG_PAD_KEYCNT_A_SIZE                              1
+#define REG_PAD_KEYCNT_A_MASK                              0x0001
+
+#define REG_G2_WINOUT_OBJWININ_SHIFT                       8
+#define REG_G2_WINOUT_OBJWININ_SIZE                        6
+#define REG_G2_WINOUT_OBJWININ_MASK                        0x3f00
+
+#define REG_G2_WINOUT_WINOUT_SHIFT                         0
+#define REG_G2_WINOUT_WINOUT_SIZE                          6
+#define REG_G2_WINOUT_WINOUT_MASK                          0x003f
+
+#define REG_G2_WINOUT_FIELD( objwinin, winout ) \
+    (u16)( \
+    ((u32)(objwinin) << REG_G2_WINOUT_OBJWININ_SHIFT) | \
+    ((u32)(winout) << REG_G2_WINOUT_WINOUT_SHIFT))
+
+#ifndef SDK_ASM
+#define REG_PAD_KEYCNT_FIELD( logic, intr, l, r, down, up, left, right, start, sel, b, a ) \
+    (u16)( \
+    ((u32)(logic) << REG_PAD_KEYCNT_LOGIC_SHIFT) | \
+    ((u32)(intr) << REG_PAD_KEYCNT_INTR_SHIFT) | \
+    ((u32)(l) << REG_PAD_KEYCNT_L_SHIFT) | \
+    ((u32)(r) << REG_PAD_KEYCNT_R_SHIFT) | \
+    ((u32)(down) << REG_PAD_KEYCNT_DOWN_SHIFT) | \
+    ((u32)(up) << REG_PAD_KEYCNT_UP_SHIFT) | \
+    ((u32)(left) << REG_PAD_KEYCNT_LEFT_SHIFT) | \
+    ((u32)(right) << REG_PAD_KEYCNT_RIGHT_SHIFT) | \
+    ((u32)(start) << REG_PAD_KEYCNT_START_SHIFT) | \
+    ((u32)(sel) << REG_PAD_KEYCNT_SEL_SHIFT) | \
+    ((u32)(b) << REG_PAD_KEYCNT_B_SHIFT) | \
+    ((u32)(a) << REG_PAD_KEYCNT_A_SHIFT))
+#endif
+
+#define REG_GX_POWCNT_GE_SHIFT                             3
+#define REG_GX_POWCNT_GE_SIZE                              1
+#define REG_GX_POWCNT_GE_MASK                              0x0008
+
+#define REG_GX_POWCNT_RE_SHIFT                             2
+#define REG_GX_POWCNT_RE_SIZE                              1
+#define REG_GX_POWCNT_RE_MASK                              0x0004
+
+#define REG_GX_POWCNT_E2DG_SHIFT                           1
+#define REG_GX_POWCNT_E2DG_SIZE                            1
+#define REG_GX_POWCNT_E2DG_MASK                            0x0002
+
+#define REG_GX_POWCNT_LCD_SHIFT                            0
+#define REG_GX_POWCNT_LCD_SIZE                             1
+#define REG_GX_POWCNT_LCD_MASK                             0x0001
+
+#define REG_GX_POWCNT_LCDB_SHIFT                           8
+#define REG_GX_POWCNT_LCDB_SIZE                            1
+#define REG_GX_POWCNT_LCDB_MASK                            0x0100
+
+#define REG_GX_POWCNT_E2DGB_SHIFT                          9
+#define REG_GX_POWCNT_E2DGB_SIZE                           1
+#define REG_GX_POWCNT_E2DGB_MASK                           0x0200
+
+#define REG_GX_POWCNT_DSEL_SHIFT                           15
+#define REG_GX_POWCNT_DSEL_SIZE                            1
+#define REG_GX_POWCNT_DSEL_MASK                            0x8000
+
+// GX_DISPCNT
+#define REG_GX_DISPCNT_O_SHIFT                             31
+#define REG_GX_DISPCNT_O_SIZE                              1
+#define REG_GX_DISPCNT_O_MASK                              0x80000000
+
+#define REG_GX_DISPCNT_BG_SHIFT                            30
+#define REG_GX_DISPCNT_BG_SIZE                             1
+#define REG_GX_DISPCNT_BG_MASK                             0x40000000
+
+#define REG_GX_DISPCNT_BGSCREENOFFSET_SHIFT                27
+#define REG_GX_DISPCNT_BGSCREENOFFSET_SIZE                 3
+#define REG_GX_DISPCNT_BGSCREENOFFSET_MASK                 0x38000000
+
+#define REG_GX_DISPCNT_BGCHAROFFSET_SHIFT                  24
+#define REG_GX_DISPCNT_BGCHAROFFSET_SIZE                   3
+#define REG_GX_DISPCNT_BGCHAROFFSET_MASK                   0x07000000
+
+#define REG_GX_DISPCNT_OH_SHIFT                            23
+#define REG_GX_DISPCNT_OH_SIZE                             1
+#define REG_GX_DISPCNT_OH_MASK                             0x00800000
+
+#define REG_GX_DISPCNT_EXOBJ_SHIFT                         20
+#define REG_GX_DISPCNT_EXOBJ_SIZE                          3
+#define REG_GX_DISPCNT_EXOBJ_MASK                          0x00700000
+
+#define REG_GX_DISPCNT_VRAM_SHIFT                          18
+#define REG_GX_DISPCNT_VRAM_SIZE                           2
+#define REG_GX_DISPCNT_VRAM_MASK                           0x000c0000
+
+#define REG_GX_DISPCNT_MODE_SHIFT                          16
+#define REG_GX_DISPCNT_MODE_SIZE                           2
+#define REG_GX_DISPCNT_MODE_MASK                           0x00030000
+
+#define REG_GX_DISPCNT_OW_SHIFT                            15
+#define REG_GX_DISPCNT_OW_SIZE                             1
+#define REG_GX_DISPCNT_OW_MASK                             0x00008000
+
+#define REG_GX_DISPCNT_W1_SHIFT                            14
+#define REG_GX_DISPCNT_W1_SIZE                             1
+#define REG_GX_DISPCNT_W1_MASK                             0x00004000
+
+#define REG_GX_DISPCNT_W0_SHIFT                            13
+#define REG_GX_DISPCNT_W0_SIZE                             1
+#define REG_GX_DISPCNT_W0_MASK                             0x00002000
+
+#define REG_GX_DISPCNT_DISPLAY_SHIFT                       8
+#define REG_GX_DISPCNT_DISPLAY_SIZE                        5
+#define REG_GX_DISPCNT_DISPLAY_MASK                        0x00001f00
+
+#define REG_GX_DISPCNT_BLANK_SHIFT                         7
+#define REG_GX_DISPCNT_BLANK_SIZE                          1
+#define REG_GX_DISPCNT_BLANK_MASK                          0x00000080
+
+#define REG_GX_DISPCNT_OBJMAP_SHIFT                        4
+#define REG_GX_DISPCNT_OBJMAP_SIZE                         3
+#define REG_GX_DISPCNT_OBJMAP_MASK                         0x00000070
+
+#define REG_GX_DISPCNT_BG02D3D_SHIFT                       3
+#define REG_GX_DISPCNT_BG02D3D_SIZE                        1
+#define REG_GX_DISPCNT_BG02D3D_MASK                        0x00000008
+
+#define REG_GX_DISPCNT_BGMODE_SHIFT                        0
+#define REG_GX_DISPCNT_BGMODE_SIZE                         3
+#define REG_GX_DISPCNT_BGMODE_MASK                         0x00000007
+
+#define REG_GX_DISPCNT_OBJMAP_CH_SHIFT                     4
+#define REG_GX_DISPCNT_OBJMAP_CH_SIZE                      1
+#define REG_GX_DISPCNT_OBJMAP_CH_MASK                      0x00000010
+
+#define REG_GX_DISPCNT_OBJMAP_BM_SHIFT                     5
+#define REG_GX_DISPCNT_OBJMAP_BM_SIZE                      2
+#define REG_GX_DISPCNT_OBJMAP_BM_MASK                      0x00000060
+
+#define REG_GX_DISPCNT_EXOBJ_CH_SHIFT                      20
+#define REG_GX_DISPCNT_EXOBJ_CH_SIZE                       2
+#define REG_GX_DISPCNT_EXOBJ_CH_MASK                       0x00300000
+
+#define REG_GX_DISPCNT_EXOBJ_BM_SHIFT                      22
+#define REG_GX_DISPCNT_EXOBJ_BM_SIZE                       1
+#define REG_GX_DISPCNT_EXOBJ_BM_MASK                       0x00400000
+
+// GXS_DB_DISPCNT
+#define REG_GXS_DB_DISPCNT_O_SHIFT                         31
+#define REG_GXS_DB_DISPCNT_O_SIZE                          1
+#define REG_GXS_DB_DISPCNT_O_MASK                          0x80000000
+
+#define REG_GXS_DB_DISPCNT_BG_SHIFT                        30
+#define REG_GXS_DB_DISPCNT_BG_SIZE                         1
+#define REG_GXS_DB_DISPCNT_BG_MASK                         0x40000000
+
+#define REG_GXS_DB_DISPCNT_OH_SHIFT                        23
+#define REG_GXS_DB_DISPCNT_OH_SIZE                         1
+#define REG_GXS_DB_DISPCNT_OH_MASK                         0x00800000
+
+#define REG_GXS_DB_DISPCNT_EXOBJ_SHIFT                     20
+#define REG_GXS_DB_DISPCNT_EXOBJ_SIZE                      2
+#define REG_GXS_DB_DISPCNT_EXOBJ_MASK                      0x00300000
+
+#define REG_GXS_DB_DISPCNT_MODE_SHIFT                      16
+#define REG_GXS_DB_DISPCNT_MODE_SIZE                       1
+#define REG_GXS_DB_DISPCNT_MODE_MASK                       0x00010000
+
+#define REG_GXS_DB_DISPCNT_OW_SHIFT                        15
+#define REG_GXS_DB_DISPCNT_OW_SIZE                         1
+#define REG_GXS_DB_DISPCNT_OW_MASK                         0x00008000
+
+#define REG_GXS_DB_DISPCNT_W1_SHIFT                        14
+#define REG_GXS_DB_DISPCNT_W1_SIZE                         1
+#define REG_GXS_DB_DISPCNT_W1_MASK                         0x00004000
+
+#define REG_GXS_DB_DISPCNT_W0_SHIFT                        13
+#define REG_GXS_DB_DISPCNT_W0_SIZE                         1
+#define REG_GXS_DB_DISPCNT_W0_MASK                         0x00002000
+
+#define REG_GXS_DB_DISPCNT_DISPLAY_SHIFT                   8
+#define REG_GXS_DB_DISPCNT_DISPLAY_SIZE                    5
+#define REG_GXS_DB_DISPCNT_DISPLAY_MASK                    0x00001f00
+
+#define REG_GXS_DB_DISPCNT_BLANK_SHIFT                     7
+#define REG_GXS_DB_DISPCNT_BLANK_SIZE                      1
+#define REG_GXS_DB_DISPCNT_BLANK_MASK                      0x00000080
+
+#define REG_GXS_DB_DISPCNT_OBJMAP_SHIFT                    4
+#define REG_GXS_DB_DISPCNT_OBJMAP_SIZE                     3
+#define REG_GXS_DB_DISPCNT_OBJMAP_MASK                     0x00000070
+
+#define REG_GXS_DB_DISPCNT_BGMODE_SHIFT                    0
+#define REG_GXS_DB_DISPCNT_BGMODE_SIZE                     3
+#define REG_GXS_DB_DISPCNT_BGMODE_MASK                     0x00000007
+
+#define REG_GXS_DB_DISPCNT_OBJMAP_CH_SHIFT                 4
+#define REG_GXS_DB_DISPCNT_OBJMAP_CH_SIZE                  1
+#define REG_GXS_DB_DISPCNT_OBJMAP_CH_MASK                  0x00000010
+
+#define REG_GXS_DB_DISPCNT_OBJMAP_BM_SHIFT                 5
+#define REG_GXS_DB_DISPCNT_OBJMAP_BM_SIZE                  2
+#define REG_GXS_DB_DISPCNT_OBJMAP_BM_MASK                  0x00000060
+
+#define REG_GXS_DB_DISPCNT_EXOBJ_CH_SHIFT                  20
+#define REG_GXS_DB_DISPCNT_EXOBJ_CH_SIZE                   2
+#define REG_GXS_DB_DISPCNT_EXOBJ_CH_MASK                   0x00300000
+
+// MASTER BRIGHT
+#define REG_GX_MASTER_BRIGHT_E_MOD_SHIFT                   14
+#define REG_GX_MASTER_BRIGHT_E_MOD_SIZE                    2
+#define REG_GX_MASTER_BRIGHT_E_MOD_MASK                    0xc000
+
+#define REG_GX_MASTER_BRIGHT_E_VALUE_SHIFT                 0
+#define REG_GX_MASTER_BRIGHT_E_VALUE_SIZE                  5
+#define REG_GX_MASTER_BRIGHT_E_VALUE_MASK                  0x001f
+
+// DISPSTAT
+#define REG_GX_DISPSTAT_VCOUNTER_SHIFT                     7
+#define REG_GX_DISPSTAT_VCOUNTER_SIZE                      9
+#define REG_GX_DISPSTAT_VCOUNTER_MASK                      0xff80
+
+#define REG_GX_DISPSTAT_VQI_SHIFT                          5
+#define REG_GX_DISPSTAT_VQI_SIZE                           1
+#define REG_GX_DISPSTAT_VQI_MASK                           0x0020
+
+#define REG_GX_DISPSTAT_HBI_SHIFT                          4
+#define REG_GX_DISPSTAT_HBI_SIZE                           1
+#define REG_GX_DISPSTAT_HBI_MASK                           0x0010
+
+#define REG_GX_DISPSTAT_VBI_SHIFT                          3
+#define REG_GX_DISPSTAT_VBI_SIZE                           1
+#define REG_GX_DISPSTAT_VBI_MASK                           0x0008
+
+#define REG_GX_DISPSTAT_LYC_SHIFT                          2
+#define REG_GX_DISPSTAT_LYC_SIZE                           1
+#define REG_GX_DISPSTAT_LYC_MASK                           0x0004
+
+#define REG_GX_DISPSTAT_HBLK_SHIFT                         1
+#define REG_GX_DISPSTAT_HBLK_SIZE                          1
+#define REG_GX_DISPSTAT_HBLK_MASK                          0x0002
+
+#define REG_GX_DISPSTAT_VBLK_SHIFT                         0
+#define REG_GX_DISPSTAT_VBLK_SIZE                          1
+#define REG_GX_DISPSTAT_VBLK_MASK                          0x0001
+
+// G2_BG0CNT
+#define REG_G2_BG0CNT_SCREENSIZE_SHIFT                     14
+#define REG_G2_BG0CNT_SCREENSIZE_SIZE                      2
+#define REG_G2_BG0CNT_SCREENSIZE_MASK                      0xc000
+
+#define REG_G2_BG0CNT_BGPLTTSLOT_SHIFT                     13
+#define REG_G2_BG0CNT_BGPLTTSLOT_SIZE                      1
+#define REG_G2_BG0CNT_BGPLTTSLOT_MASK                      0x2000
+
+#define REG_G2_BG0CNT_SCREENBASE_SHIFT                     8
+#define REG_G2_BG0CNT_SCREENBASE_SIZE                      5
+#define REG_G2_BG0CNT_SCREENBASE_MASK                      0x1f00
+
+#define REG_G2_BG0CNT_COLORMODE_SHIFT                      7
+#define REG_G2_BG0CNT_COLORMODE_SIZE                       1
+#define REG_G2_BG0CNT_COLORMODE_MASK                       0x0080
+
+#define REG_G2_BG0CNT_MOSAIC_SHIFT                         6
+#define REG_G2_BG0CNT_MOSAIC_SIZE                          1
+#define REG_G2_BG0CNT_MOSAIC_MASK                          0x0040
+
+#define REG_G2_BG0CNT_CHARBASE_SHIFT                       2
+#define REG_G2_BG0CNT_CHARBASE_SIZE                        4
+#define REG_G2_BG0CNT_CHARBASE_MASK                        0x003c
+
+#define REG_G2_BG0CNT_PRIORITY_SHIFT                       0
+#define REG_G2_BG0CNT_PRIORITY_SIZE                        2
+#define REG_G2_BG0CNT_PRIORITY_MASK                        0x0003
+
+// G2_BG1CNT
+#define REG_G2_BG1CNT_SCREENSIZE_SHIFT                     14
+#define REG_G2_BG1CNT_SCREENSIZE_SIZE                      2
+#define REG_G2_BG1CNT_SCREENSIZE_MASK                      0xc000
+
+#define REG_G2_BG1CNT_BGPLTTSLOT_SHIFT                     13
+#define REG_G2_BG1CNT_BGPLTTSLOT_SIZE                      1
+#define REG_G2_BG1CNT_BGPLTTSLOT_MASK                      0x2000
+
+#define REG_G2_BG1CNT_SCREENBASE_SHIFT                     8
+#define REG_G2_BG1CNT_SCREENBASE_SIZE                      5
+#define REG_G2_BG1CNT_SCREENBASE_MASK                      0x1f00
+
+#define REG_G2_BG1CNT_COLORMODE_SHIFT                      7
+#define REG_G2_BG1CNT_COLORMODE_SIZE                       1
+#define REG_G2_BG1CNT_COLORMODE_MASK                       0x0080
+
+#define REG_G2_BG1CNT_MOSAIC_SHIFT                         6
+#define REG_G2_BG1CNT_MOSAIC_SIZE                          1
+#define REG_G2_BG1CNT_MOSAIC_MASK                          0x0040
+
+#define REG_G2_BG1CNT_CHARBASE_SHIFT                       2
+#define REG_G2_BG1CNT_CHARBASE_SIZE                        4
+#define REG_G2_BG1CNT_CHARBASE_MASK                        0x003c
+
+#define REG_G2_BG1CNT_PRIORITY_SHIFT                       0
+#define REG_G2_BG1CNT_PRIORITY_SIZE                        2
+#define REG_G2_BG1CNT_PRIORITY_MASK                        0x0003
+
+// G2_BG2CNT
+#define REG_G2_BG2CNT_SCREENSIZE_SHIFT                     14
+#define REG_G2_BG2CNT_SCREENSIZE_SIZE                      2
+#define REG_G2_BG2CNT_SCREENSIZE_MASK                      0xc000
+
+#define REG_G2_BG2CNT_AREAOVER_SHIFT                       13
+#define REG_G2_BG2CNT_AREAOVER_SIZE                        1
+#define REG_G2_BG2CNT_AREAOVER_MASK                        0x2000
+
+#define REG_G2_BG2CNT_SCREENBASE_SHIFT                     8
+#define REG_G2_BG2CNT_SCREENBASE_SIZE                      5
+#define REG_G2_BG2CNT_SCREENBASE_MASK                      0x1f00
+
+#define REG_G2_BG2CNT_COLORMODE_SHIFT                      7
+#define REG_G2_BG2CNT_COLORMODE_SIZE                       1
+#define REG_G2_BG2CNT_COLORMODE_MASK                       0x0080
+
+#define REG_G2_BG2CNT_MOSAIC_SHIFT                         6
+#define REG_G2_BG2CNT_MOSAIC_SIZE                          1
+#define REG_G2_BG2CNT_MOSAIC_MASK                          0x0040
+
+#define REG_G2_BG2CNT_CHARBASE_SHIFT                       2
+#define REG_G2_BG2CNT_CHARBASE_SIZE                        4
+#define REG_G2_BG2CNT_CHARBASE_MASK                        0x003c
+
+#define REG_G2_BG2CNT_PRIORITY_SHIFT                       0
+#define REG_G2_BG2CNT_PRIORITY_SIZE                        2
+#define REG_G2_BG2CNT_PRIORITY_MASK                        0x0003
+
+// G2_BG3CNT
+#define REG_G2_BG3CNT_SCREENSIZE_SHIFT                     14
+#define REG_G2_BG3CNT_SCREENSIZE_SIZE                      2
+#define REG_G2_BG3CNT_SCREENSIZE_MASK                      0xc000
+
+#define REG_G2_BG3CNT_AREAOVER_SHIFT                       13
+#define REG_G2_BG3CNT_AREAOVER_SIZE                        1
+#define REG_G2_BG3CNT_AREAOVER_MASK                        0x2000
+
+#define REG_G2_BG3CNT_SCREENBASE_SHIFT                     8
+#define REG_G2_BG3CNT_SCREENBASE_SIZE                      5
+#define REG_G2_BG3CNT_SCREENBASE_MASK                      0x1f00
+
+#define REG_G2_BG3CNT_COLORMODE_SHIFT                      7
+#define REG_G2_BG3CNT_COLORMODE_SIZE                       1
+#define REG_G2_BG3CNT_COLORMODE_MASK                       0x0080
+
+#define REG_G2_BG3CNT_MOSAIC_SHIFT                         6
+#define REG_G2_BG3CNT_MOSAIC_SIZE                          1
+#define REG_G2_BG3CNT_MOSAIC_MASK                          0x0040
+
+#define REG_G2_BG3CNT_CHARBASE_SHIFT                       2
+#define REG_G2_BG3CNT_CHARBASE_SIZE                        4
+#define REG_G2_BG3CNT_CHARBASE_MASK                        0x003c
+
+#define REG_G2_BG3CNT_PRIORITY_SHIFT                       0
+#define REG_G2_BG3CNT_PRIORITY_SIZE                        2
+#define REG_G2_BG3CNT_PRIORITY_MASK                        0x0003
+
+// G2S_DB_BG0CNT
+#define REG_G2S_DB_BG0CNT_SCREENSIZE_SHIFT                 14
+#define REG_G2S_DB_BG0CNT_SCREENSIZE_SIZE                  2
+#define REG_G2S_DB_BG0CNT_SCREENSIZE_MASK                  0xc000
+
+#define REG_G2S_DB_BG0CNT_BGPLTTSLOT_SHIFT                 13
+#define REG_G2S_DB_BG0CNT_BGPLTTSLOT_SIZE                  1
+#define REG_G2S_DB_BG0CNT_BGPLTTSLOT_MASK                  0x2000
+
+#define REG_G2S_DB_BG0CNT_SCREENBASE_SHIFT                 8
+#define REG_G2S_DB_BG0CNT_SCREENBASE_SIZE                  5
+#define REG_G2S_DB_BG0CNT_SCREENBASE_MASK                  0x1f00
+
+#define REG_G2S_DB_BG0CNT_COLORMODE_SHIFT                  7
+#define REG_G2S_DB_BG0CNT_COLORMODE_SIZE                   1
+#define REG_G2S_DB_BG0CNT_COLORMODE_MASK                   0x0080
+
+#define REG_G2S_DB_BG0CNT_MOSAIC_SHIFT                     6
+#define REG_G2S_DB_BG0CNT_MOSAIC_SIZE                      1
+#define REG_G2S_DB_BG0CNT_MOSAIC_MASK                      0x0040
+
+#define REG_G2S_DB_BG0CNT_CHARBASE_SHIFT                   2
+#define REG_G2S_DB_BG0CNT_CHARBASE_SIZE                    4
+#define REG_G2S_DB_BG0CNT_CHARBASE_MASK                    0x003c
+
+#define REG_G2S_DB_BG0CNT_PRIORITY_SHIFT                   0
+#define REG_G2S_DB_BG0CNT_PRIORITY_SIZE                    2
+#define REG_G2S_DB_BG0CNT_PRIORITY_MASK                    0x0003
+
+// G2S_DB_BG1CNT
+#define REG_G2S_DB_BG1CNT_SCREENSIZE_SHIFT                 14
+#define REG_G2S_DB_BG1CNT_SCREENSIZE_SIZE                  2
+#define REG_G2S_DB_BG1CNT_SCREENSIZE_MASK                  0xc000
+
+#define REG_G2S_DB_BG1CNT_BGPLTTSLOT_SHIFT                 13
+#define REG_G2S_DB_BG1CNT_BGPLTTSLOT_SIZE                  1
+#define REG_G2S_DB_BG1CNT_BGPLTTSLOT_MASK                  0x2000
+
+#define REG_G2S_DB_BG1CNT_SCREENBASE_SHIFT                 8
+#define REG_G2S_DB_BG1CNT_SCREENBASE_SIZE                  5
+#define REG_G2S_DB_BG1CNT_SCREENBASE_MASK                  0x1f00
+
+#define REG_G2S_DB_BG1CNT_COLORMODE_SHIFT                  7
+#define REG_G2S_DB_BG1CNT_COLORMODE_SIZE                   1
+#define REG_G2S_DB_BG1CNT_COLORMODE_MASK                   0x0080
+
+#define REG_G2S_DB_BG1CNT_MOSAIC_SHIFT                     6
+#define REG_G2S_DB_BG1CNT_MOSAIC_SIZE                      1
+#define REG_G2S_DB_BG1CNT_MOSAIC_MASK                      0x0040
+
+#define REG_G2S_DB_BG1CNT_CHARBASE_SHIFT                   2
+#define REG_G2S_DB_BG1CNT_CHARBASE_SIZE                    4
+#define REG_G2S_DB_BG1CNT_CHARBASE_MASK                    0x003c
+
+#define REG_G2S_DB_BG1CNT_PRIORITY_SHIFT                   0
+#define REG_G2S_DB_BG1CNT_PRIORITY_SIZE                    2
+#define REG_G2S_DB_BG1CNT_PRIORITY_MASK                    0x0003
+
+// G2S_DB_BG2CNT
+#define REG_G2S_DB_BG2CNT_SCREENSIZE_SHIFT                 14
+#define REG_G2S_DB_BG2CNT_SCREENSIZE_SIZE                  2
+#define REG_G2S_DB_BG2CNT_SCREENSIZE_MASK                  0xc000
+
+#define REG_G2S_DB_BG2CNT_AREAOVER_SHIFT                   13
+#define REG_G2S_DB_BG2CNT_AREAOVER_SIZE                    1
+#define REG_G2S_DB_BG2CNT_AREAOVER_MASK                    0x2000
+
+#define REG_G2S_DB_BG2CNT_SCREENBASE_SHIFT                 8
+#define REG_G2S_DB_BG2CNT_SCREENBASE_SIZE                  5
+#define REG_G2S_DB_BG2CNT_SCREENBASE_MASK                  0x1f00
+
+#define REG_G2S_DB_BG2CNT_COLORMODE_SHIFT                  7
+#define REG_G2S_DB_BG2CNT_COLORMODE_SIZE                   1
+#define REG_G2S_DB_BG2CNT_COLORMODE_MASK                   0x0080
+
+#define REG_G2S_DB_BG2CNT_MOSAIC_SHIFT                     6
+#define REG_G2S_DB_BG2CNT_MOSAIC_SIZE                      1
+#define REG_G2S_DB_BG2CNT_MOSAIC_MASK                      0x0040
+
+#define REG_G2S_DB_BG2CNT_CHARBASE_SHIFT                   2
+#define REG_G2S_DB_BG2CNT_CHARBASE_SIZE                    4
+#define REG_G2S_DB_BG2CNT_CHARBASE_MASK                    0x003c
+
+#define REG_G2S_DB_BG2CNT_PRIORITY_SHIFT                   0
+#define REG_G2S_DB_BG2CNT_PRIORITY_SIZE                    2
+#define REG_G2S_DB_BG2CNT_PRIORITY_MASK                    0x0003
+
+// G2S_DB_BG3CNT
+#define REG_G2S_DB_BG3CNT_SCREENSIZE_SHIFT                 14
+#define REG_G2S_DB_BG3CNT_SCREENSIZE_SIZE                  2
+#define REG_G2S_DB_BG3CNT_SCREENSIZE_MASK                  0xc000
+
+#define REG_G2S_DB_BG3CNT_AREAOVER_SHIFT                   13
+#define REG_G2S_DB_BG3CNT_AREAOVER_SIZE                    1
+#define REG_G2S_DB_BG3CNT_AREAOVER_MASK                    0x2000
+
+#define REG_G2S_DB_BG3CNT_SCREENBASE_SHIFT                 8
+#define REG_G2S_DB_BG3CNT_SCREENBASE_SIZE                  5
+#define REG_G2S_DB_BG3CNT_SCREENBASE_MASK                  0x1f00
+
+#define REG_G2S_DB_BG3CNT_COLORMODE_SHIFT                  7
+#define REG_G2S_DB_BG3CNT_COLORMODE_SIZE                   1
+#define REG_G2S_DB_BG3CNT_COLORMODE_MASK                   0x0080
+
+#define REG_G2S_DB_BG3CNT_MOSAIC_SHIFT                     6
+#define REG_G2S_DB_BG3CNT_MOSAIC_SIZE                      1
+#define REG_G2S_DB_BG3CNT_MOSAIC_MASK                      0x0040
+
+#define REG_G2S_DB_BG3CNT_CHARBASE_SHIFT                   2
+#define REG_G2S_DB_BG3CNT_CHARBASE_SIZE                    4
+#define REG_G2S_DB_BG3CNT_CHARBASE_MASK                    0x003c
+
+#define REG_G2S_DB_BG3CNT_PRIORITY_SHIFT                   0
+#define REG_G2S_DB_BG3CNT_PRIORITY_SIZE                    2
+#define REG_G2S_DB_BG3CNT_PRIORITY_MASK                    0x0003
+
+// G2_BG0OFS
+#define REG_G2_BG0OFS_VOFFSET_SHIFT                        16
+#define REG_G2_BG0OFS_VOFFSET_SIZE                         9
+#define REG_G2_BG0OFS_VOFFSET_MASK                         0x01ff0000
+
+#define REG_G2_BG0OFS_HOFFSET_SHIFT                        0
+#define REG_G2_BG0OFS_HOFFSET_SIZE                         9
+#define REG_G2_BG0OFS_HOFFSET_MASK                         0x000001ff
+
+// G2_BG1OFS
+#define REG_G2_BG1OFS_VOFFSET_SHIFT                        16
+#define REG_G2_BG1OFS_VOFFSET_SIZE                         9
+#define REG_G2_BG1OFS_VOFFSET_MASK                         0x01ff0000
+
+#define REG_G2_BG1OFS_HOFFSET_SHIFT                        0
+#define REG_G2_BG1OFS_HOFFSET_SIZE                         9
+#define REG_G2_BG1OFS_HOFFSET_MASK                         0x000001ff
+
+// G2_BG2OFS
+#define REG_G2_BG2OFS_VOFFSET_SHIFT                        16
+#define REG_G2_BG2OFS_VOFFSET_SIZE                         9
+#define REG_G2_BG2OFS_VOFFSET_MASK                         0x01ff0000
+
+#define REG_G2_BG2OFS_HOFFSET_SHIFT                        0
+#define REG_G2_BG2OFS_HOFFSET_SIZE                         9
+#define REG_G2_BG2OFS_HOFFSET_MASK                         0x000001ff
+
+// G2_BG3OFS
+#define REG_G2_BG3OFS_VOFFSET_SHIFT                        16
+#define REG_G2_BG3OFS_VOFFSET_SIZE                         9
+#define REG_G2_BG3OFS_VOFFSET_MASK                         0x01ff0000
+
+#define REG_G2_BG3OFS_HOFFSET_SHIFT                        0
+#define REG_G2_BG3OFS_HOFFSET_SIZE                         9
+#define REG_G2_BG3OFS_HOFFSET_MASK                         0x000001ff
+
+// G2S_DB_BG0OFS
+#define REG_G2S_DB_BG0OFS_VOFFSET_SHIFT                    16
+#define REG_G2S_DB_BG0OFS_VOFFSET_SIZE                     9
+#define REG_G2S_DB_BG0OFS_VOFFSET_MASK                     0x01ff0000
+
+#define REG_G2S_DB_BG0OFS_HOFFSET_SHIFT                    0
+#define REG_G2S_DB_BG0OFS_HOFFSET_SIZE                     9
+#define REG_G2S_DB_BG0OFS_HOFFSET_MASK                     0x000001ff
+
+// G2S_DB_BG1OFS
+#define REG_G2S_DB_BG1OFS_VOFFSET_SHIFT                    16
+#define REG_G2S_DB_BG1OFS_VOFFSET_SIZE                     9
+#define REG_G2S_DB_BG1OFS_VOFFSET_MASK                     0x01ff0000
+
+#define REG_G2S_DB_BG1OFS_HOFFSET_SHIFT                    0
+#define REG_G2S_DB_BG1OFS_HOFFSET_SIZE                     9
+#define REG_G2S_DB_BG1OFS_HOFFSET_MASK                     0x000001ff
+
+// G2S_DB_BG2OFS
+#define REG_G2S_DB_BG2OFS_VOFFSET_SHIFT                    16
+#define REG_G2S_DB_BG2OFS_VOFFSET_SIZE                     9
+#define REG_G2S_DB_BG2OFS_VOFFSET_MASK                     0x01ff0000
+
+#define REG_G2S_DB_BG2OFS_HOFFSET_SHIFT                    0
+#define REG_G2S_DB_BG2OFS_HOFFSET_SIZE                     9
+#define REG_G2S_DB_BG2OFS_HOFFSET_MASK                     0x000001ff
+
+// G2S_DB_BG3OFS
+#define REG_G2S_DB_BG3OFS_VOFFSET_SHIFT                    16
+#define REG_G2S_DB_BG3OFS_VOFFSET_SIZE                     9
+#define REG_G2S_DB_BG3OFS_VOFFSET_MASK                     0x01ff0000
+
+#define REG_G2S_DB_BG3OFS_HOFFSET_SHIFT                    0
+#define REG_G2S_DB_BG3OFS_HOFFSET_SIZE                     9
+#define REG_G2S_DB_BG3OFS_HOFFSET_MASK                     0x000001ff
+
+// Timer control
+
+#define REG_OS_TM0CNT_L_TIMER0CNT_SHIFT                    0
+#define REG_OS_TM0CNT_L_TIMER0CNT_SIZE                     16
+#define REG_OS_TM0CNT_L_TIMER0CNT_MASK                     0xffff
+
+#define REG_OS_TM0CNT_H_E_SHIFT                            7
+#define REG_OS_TM0CNT_H_E_SIZE                             1
+#define REG_OS_TM0CNT_H_E_MASK                             0x0080
+
+#define REG_OS_TM0CNT_H_I_SHIFT                            6
+#define REG_OS_TM0CNT_H_I_SIZE                             1
+#define REG_OS_TM0CNT_H_I_MASK                             0x0040
+
+#define REG_OS_TM0CNT_H_PS_SHIFT                           0
+#define REG_OS_TM0CNT_H_PS_SIZE                            2
+#define REG_OS_TM0CNT_H_PS_MASK                            0x0003
+
+#define REG_OS_TM1CNT_L_TIMER0CNT_SHIFT                    0
+#define REG_OS_TM1CNT_L_TIMER0CNT_SIZE                     16
+#define REG_OS_TM1CNT_L_TIMER0CNT_MASK                     0xffff
+
+#define REG_OS_TM1CNT_H_E_SHIFT                            7
+#define REG_OS_TM1CNT_H_E_SIZE                             1
+#define REG_OS_TM1CNT_H_E_MASK                             0x0080
+
+#define REG_OS_TM1CNT_H_I_SHIFT                            6
+#define REG_OS_TM1CNT_H_I_SIZE                             1
+#define REG_OS_TM1CNT_H_I_MASK                             0x0040
+
+#define REG_OS_TM1CNT_H_PS_SHIFT                           0
+#define REG_OS_TM1CNT_H_PS_SIZE                            2
+#define REG_OS_TM1CNT_H_PS_MASK                            0x0003
+
+#define REG_OS_TM2CNT_L_TIMER0CNT_SHIFT                    0
+#define REG_OS_TM2CNT_L_TIMER0CNT_SIZE                     16
+#define REG_OS_TM2CNT_L_TIMER0CNT_MASK                     0xffff
+
+#define REG_OS_TM2CNT_H_E_SHIFT                            7
+#define REG_OS_TM2CNT_H_E_SIZE                             1
+#define REG_OS_TM2CNT_H_E_MASK                             0x0080
+
+#define REG_OS_TM2CNT_H_I_SHIFT                            6
+#define REG_OS_TM2CNT_H_I_SIZE                             1
+#define REG_OS_TM2CNT_H_I_MASK                             0x0040
+
+#define REG_OS_TM2CNT_H_PS_SHIFT                           0
+#define REG_OS_TM2CNT_H_PS_SIZE                            2
+#define REG_OS_TM2CNT_H_PS_MASK                            0x0003
+
+#define REG_OS_TM3CNT_L_TIMER0CNT_SHIFT                    0
+#define REG_OS_TM3CNT_L_TIMER0CNT_SIZE                     16
+#define REG_OS_TM3CNT_L_TIMER0CNT_MASK                     0xffff
+
+#define REG_OS_TM3CNT_H_E_SHIFT                            7
+#define REG_OS_TM3CNT_H_E_SIZE                             1
+#define REG_OS_TM3CNT_H_E_MASK                             0x0080
+
+#define REG_OS_TM3CNT_H_I_SHIFT                            6
+#define REG_OS_TM3CNT_H_I_SIZE                             1
+#define REG_OS_TM3CNT_H_I_MASK                             0x0040
+
+#define REG_OS_TM3CNT_H_PS_SHIFT                           0
+#define REG_OS_TM3CNT_H_PS_SIZE                            2
+#define REG_OS_TM3CNT_H_PS_MASK                            0x0003
+
+#define REG_G3X_DISP3DCNT_PRI_SHIFT                        14
+#define REG_G3X_DISP3DCNT_PRI_SIZE                         1
+#define REG_G3X_DISP3DCNT_PRI_MASK                         0x4000
+
+#define REG_G3X_DISP3DCNT_GO_SHIFT                         13
+#define REG_G3X_DISP3DCNT_GO_SIZE                          1
+#define REG_G3X_DISP3DCNT_GO_MASK                          0x2000
+
+#define REG_G3X_DISP3DCNT_RO_SHIFT                         12
+#define REG_G3X_DISP3DCNT_RO_SIZE                          1
+#define REG_G3X_DISP3DCNT_RO_MASK                          0x1000
+
+#define REG_G3X_DISP3DCNT_FOG_SHIFT_SHIFT                  8
+#define REG_G3X_DISP3DCNT_FOG_SHIFT_SIZE                   4
+#define REG_G3X_DISP3DCNT_FOG_SHIFT_MASK                   0x0f00
+
+#define REG_G3X_DISP3DCNT_FME_SHIFT                        7
+#define REG_G3X_DISP3DCNT_FME_SIZE                         1
+#define REG_G3X_DISP3DCNT_FME_MASK                         0x0080
+
+#define REG_G3X_DISP3DCNT_FMOD_SHIFT                       6
+#define REG_G3X_DISP3DCNT_FMOD_SIZE                        1
+#define REG_G3X_DISP3DCNT_FMOD_MASK                        0x0040
+
+#define REG_G3X_DISP3DCNT_EME_SHIFT                        5
+#define REG_G3X_DISP3DCNT_EME_SIZE                         1
+#define REG_G3X_DISP3DCNT_EME_MASK                         0x0020
+
+#define REG_G3X_DISP3DCNT_AAE_SHIFT                        4
+#define REG_G3X_DISP3DCNT_AAE_SIZE                         1
+#define REG_G3X_DISP3DCNT_AAE_MASK                         0x0010
+
+#define REG_G3X_DISP3DCNT_ABE_SHIFT                        3
+#define REG_G3X_DISP3DCNT_ABE_SIZE                         1
+#define REG_G3X_DISP3DCNT_ABE_MASK                         0x0008
+
+#define REG_G3X_DISP3DCNT_ATE_SHIFT                        2
+#define REG_G3X_DISP3DCNT_ATE_SIZE                         1
+#define REG_G3X_DISP3DCNT_ATE_MASK                         0x0004
+
+#define REG_G3X_DISP3DCNT_THS_SHIFT                        1
+#define REG_G3X_DISP3DCNT_THS_SIZE                         1
+#define REG_G3X_DISP3DCNT_THS_MASK                         0x0002
+
+#define REG_G3X_DISP3DCNT_TME_SHIFT                        0
+#define REG_G3X_DISP3DCNT_TME_SIZE                         1
+#define REG_G3X_DISP3DCNT_TME_MASK                         0x0001
+
+#ifndef SDK_ASM
+#define REG_G3X_DISP3DCNT_FIELD( pri, go, ro, fog_shift, fme, fmod, eme, aae, abe, ate, ths, tme ) \
+    (u16)( \
+    ((u32)(pri) << REG_G3X_DISP3DCNT_PRI_SHIFT) | \
+    ((u32)(go) << REG_G3X_DISP3DCNT_GO_SHIFT) | \
+    ((u32)(ro) << REG_G3X_DISP3DCNT_RO_SHIFT) | \
+    ((u32)(fog_shift) << REG_G3X_DISP3DCNT_FOG_SHIFT_SHIFT) | \
+    ((u32)(fme) << REG_G3X_DISP3DCNT_FME_SHIFT) | \
+    ((u32)(fmod) << REG_G3X_DISP3DCNT_FMOD_SHIFT) | \
+    ((u32)(eme) << REG_G3X_DISP3DCNT_EME_SHIFT) | \
+    ((u32)(aae) << REG_G3X_DISP3DCNT_AAE_SHIFT) | \
+    ((u32)(abe) << REG_G3X_DISP3DCNT_ABE_SHIFT) | \
+    ((u32)(ate) << REG_G3X_DISP3DCNT_ATE_SHIFT) | \
+    ((u32)(ths) << REG_G3X_DISP3DCNT_THS_SHIFT) | \
+    ((u32)(tme) << REG_G3X_DISP3DCNT_TME_SHIFT))
+#endif
+
+#endif //NITRO_HW_IO_REG_SHARED_H_
diff --git a/lib/include/nitro/hw/consts.h b/lib/include/nitro/hw/consts.h
new file mode 100644
index 0000000000..fbd4ac31f7
--- /dev/null
+++ b/lib/include/nitro/hw/consts.h
@@ -0,0 +1,68 @@
+#ifndef NITRO_HW_CONSTS_H_
+#define NITRO_HW_CONSTS_H_
+
+#include <nitro/hw/consts_shared.h>
+#include <nitro/hw/mmap.h>
+#include <nitro/hw/io_reg.h>
+#include <nitro/os/systemWork.h>
+
+#define HW_C5_PERMIT_MASK          0xf
+
+#define HW_C5_PERMIT_RO            5
+#define HW_C5_PERMIT_RW            1
+
+#define HW_C5_PR3_SFT              12
+
+#define HW_C6_PR_4KB               0x16
+#define HW_C6_PR_8KB               0x18
+#define HW_C6_PR_16KB              0x1a
+#define HW_C6_PR_32KB              0x1c
+#define HW_C6_PR_64KB              0x1e
+#define HW_C6_PR_128KB             0x20
+#define HW_C6_PR_256KB             0x22
+#define HW_C6_PR_512KB             0x24
+#define HW_C6_PR_1MB               0x26
+#define HW_C6_PR_2MB               0x28
+#define HW_C6_PR_4MB               0x2a
+#define HW_C6_PR_8MB               0x2c
+#define HW_C6_PR_16MB              0x2e
+#define HW_C6_PR_32MB              0x30
+#define HW_C6_PR_64MB              0x32
+#define HW_C6_PR_128MB             0x34
+#define HW_C6_PR_256MB             0x36
+#define HW_C6_PR_512MB             0x38
+#define HW_C6_PR_1GB               0x3a
+#define HW_C6_PR_2GB               0x3c
+#define HW_C6_PR_4GB               0x3e
+
+#define HW_C6_PR_ENABLE            1
+
+#define HW_C9_TCMR_16KB            0x0a
+#define HW_C9_TCMR_32MB            0x20
+
+#define HW_ICACHE_SIZE             0x2000
+#define HW_DCACHE_SIZE             0x1000
+#define HW_CACHE_LINE_SIZE         32
+
+#define OSi_CONSOLE_NOT_DETECT     0xffffffff
+
+#define OS_CONSOLE_NITRO           0x80000000
+#define OS_CONSOLE_DEV_CARD        0x02000000
+#define OS_CONSOLE_SIZE_MASK       0x00000003
+#define OS_CONSOLE_SIZE_4MB        0x00000001
+
+#define OSi_TCM_REGION_BASE_MASK   0xfffff000
+
+#define OS_IE_V_BLANK              (1UL << 0)
+#define OS_IE_H_BLANK              (1UL << 1)
+
+#define HW_CPU_CLOCK_ARM9          67027964
+
+#define REG_PXI_SUBP_FIFO_CNT_E_MASK                       0x8000
+#define REG_PXI_SUBP_FIFO_CNT_ERR_MASK                     0x4000
+#define REG_PXI_SUBP_FIFO_CNT_RECV_RI_MASK                 0x0400
+#define REG_PXI_SUBP_FIFO_CNT_RECV_EMP_MASK                0x0100
+#define REG_PXI_SUBP_FIFO_CNT_SEND_CL_MASK                 0x0008
+#define REG_PXI_SUBP_FIFO_CNT_SEND_FULL_MASK               0x0002
+
+#endif //NITRO_HW_CONSTS_H_
diff --git a/lib/include/nitro/hw/consts_shared.h b/lib/include/nitro/hw/consts_shared.h
new file mode 100644
index 0000000000..d93e33adb8
--- /dev/null
+++ b/lib/include/nitro/hw/consts_shared.h
@@ -0,0 +1,42 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include consts.h from the specific proc's lib
+ */
+
+#ifndef NITRO_HW_CONSTS_SHARED_H_
+#define NITRO_HW_CONSTS_SHARED_H_
+
+#include <nitro/hw/mmap_shared.h>
+#include <nitro/hw/common/io_reg.h>
+
+//Shared Consts
+
+#define HW_PSR_CPU_MODE_MASK       0x1f // CPU mode
+
+#define HW_PSR_DISABLE_FIQ         0x40 // Disable FIQ
+#define HW_PSR_DISABLE_IRQ         0x80 // Disable IRQ
+#define HW_PSR_DISABLE_IRQ_FIQ     0xc0 // Disable FIQ and IRQ
+
+#define OSi_ROUND(n, a)            (((u32) (n) + (a) - 1) & ~((a) - 1))
+#define OSi_TRUNC(n, a)            (((u32) (n)) & ~((a) - 1))
+#define OSi_InRange(targ, a, b)    ((u32)(a) <= (u32)(targ) && (u32)(targ) < (u32)(b))
+#define OSi_OFFSET(n, a)           (((u32) (n)) & ((a) - 1))
+
+#define OS_THREAD_SPECIFIC_MAX     0x03
+
+#define OS_THREAD_LAUNCHER_PRIORITY 0x10
+#define OS_THREAD_PRIORITY_MIN     0x00
+#define OS_THREAD_PRIORITY_MAX     0x1F
+
+#define HW_SYSTEM_CLOCK            33514000
+
+#define OSi_GetArenaInfo()         (*(OSArenaInfo*)HW_ARENA_INFO_BUF)
+
+#endif //NITRO_HW_CONSTS_SHARED_H_
diff --git a/lib/include/nitro/hw/io_reg.h b/lib/include/nitro/hw/io_reg.h
new file mode 100644
index 0000000000..8349c772d7
--- /dev/null
+++ b/lib/include/nitro/hw/io_reg.h
@@ -0,0 +1,121 @@
+#ifndef NITRO_IO_REG_H_
+#define NITRO_IO_REG_H_
+
+#include <nitro/hw/common/io_reg.h>
+
+#ifdef SDK_ARM9
+#include <nitro/hw/ARM9/io_reg.h>
+#else
+#include <nitro/hw/ARM7/io_reg.h>
+#endif
+
+#define REG_OS_IME_IME_SHIFT                               0
+#define REG_OS_IME_IME_SIZE                                1
+#define REG_OS_IME_IME_MASK                                0x0001
+
+#define REG_INTF_OFFSET               (0x180)
+#define REG_INTF_ADDR                 (HW_REG_BASE + REG_INTF_OFFSET)
+#define reg_PXI_INTF                  (*(REGType16v *)REG_INTF_ADDR)
+
+#define REG_FIFO_CNT_OFFSET           (0x184)
+#define REG_FIFO_CNT_ADDR             (HW_REG_BASE + REG_FIFO_CNT_OFFSET)
+#define reg_PXI_FIFO_CNT              (*(REGType16v *)REG_FIFO_CNT_ADDR)
+
+#define REG_PXI_INTF_I_SHIFT                          14
+#define REG_PXI_INTF_I_SIZE                           1
+#define REG_PXI_INTF_I_MASK                           0x4000
+
+#define REG_PXI_INTF_IREQ_SHIFT                       13
+#define REG_PXI_INTF_IREQ_SIZE                        1
+#define REG_PXI_INTF_IREQ_MASK                        0x2000
+
+#define REG_PXI_INTF_A7STATUS_SHIFT                   8
+#define REG_PXI_INTF_A7STATUS_SIZE                    4
+#define REG_PXI_INTF_A7STATUS_MASK                    0x0f00
+
+#define REG_PXI_INTF_A9STATUS_SHIFT                   0
+#define REG_PXI_INTF_A9STATUS_SIZE                    4
+#define REG_PXI_INTF_A9STATUS_MASK                    0x000f
+
+#ifndef SDK_ASM
+#define REG_PXI_INTF_FIELD( i, ireq, a7status, a9status ) \
+    (u16)( \
+    ((u32)(i) << REG_PXI_INTF_I_SHIFT) | \
+    ((u32)(ireq) << REG_PXI_INTF_IREQ_SHIFT) | \
+    ((u32)(a7status) << REG_PXI_INTF_A7STATUS_SHIFT) | \
+    ((u32)(a9status) << REG_PXI_INTF_A9STATUS_SHIFT))
+#endif
+
+#define REG_PXI_FIFO_CNT_E_SHIFT                     15
+#define REG_PXI_FIFO_CNT_E_SIZE                      1
+#define REG_PXI_FIFO_CNT_E_MASK                      0x8000
+
+#define REG_PXI_FIFO_CNT_ERR_SHIFT                   14
+#define REG_PXI_FIFO_CNT_ERR_SIZE                    1
+#define REG_PXI_FIFO_CNT_ERR_MASK                    0x4000
+
+#define REG_PXI_FIFO_CNT_RECV_RI_SHIFT               10
+#define REG_PXI_FIFO_CNT_RECV_RI_SIZE                1
+#define REG_PXI_FIFO_CNT_RECV_RI_MASK                0x0400
+
+#define REG_PXI_FIFO_CNT_RECV_FULL_SHIFT             9
+#define REG_PXI_FIFO_CNT_RECV_FULL_SIZE              1
+#define REG_PXI_FIFO_CNT_RECV_FULL_MASK              0x0200
+
+#define REG_PXI_FIFO_CNT_RECV_EMP_SHIFT              8
+#define REG_PXI_FIFO_CNT_RECV_EMP_SIZE               1
+#define REG_PXI_FIFO_CNT_RECV_EMP_MASK               0x0100
+
+#define REG_PXI_FIFO_CNT_SEND_CL_SHIFT               3
+#define REG_PXI_FIFO_CNT_SEND_CL_SIZE                1
+#define REG_PXI_FIFO_CNT_SEND_CL_MASK                0x0008
+
+#define REG_PXI_FIFO_CNT_SEND_TI_SHIFT               2
+#define REG_PXI_FIFO_CNT_SEND_TI_SIZE                1
+#define REG_PXI_FIFO_CNT_SEND_TI_MASK                0x0004
+
+#define REG_PXI_FIFO_CNT_SEND_FULL_SHIFT             1
+#define REG_PXI_FIFO_CNT_SEND_FULL_SIZE              1
+#define REG_PXI_FIFO_CNT_SEND_FULL_MASK              0x0002
+
+#define REG_PXI_FIFO_CNT_SEND_EMP_SHIFT              0
+#define REG_PXI_FIFO_CNT_SEND_EMP_SIZE               1
+#define REG_PXI_FIFO_CNT_SEND_EMP_MASK               0x0001
+
+#ifndef SDK_ASM
+#define REG_PXI_FIFO_CNT_FIELD( e, err, recv_ri, recv_full, recv_emp, send_cl, send_ti, send_full, send_emp ) \
+    (u16)( \
+    ((u32)(e) << REG_PXI_FIFO_CNT_E_SHIFT) | \
+    ((u32)(err) << REG_PXI_FIFO_CNT_ERR_SHIFT) | \
+    ((u32)(recv_ri) << REG_PXI_FIFO_CNT_RECV_RI_SHIFT) | \
+    ((u32)(recv_full) << REG_PXI_FIFO_CNT_RECV_FULL_SHIFT) | \
+    ((u32)(recv_emp) << REG_PXI_FIFO_CNT_RECV_EMP_SHIFT) | \
+    ((u32)(send_cl) << REG_PXI_FIFO_CNT_SEND_CL_SHIFT) | \
+    ((u32)(send_ti) << REG_PXI_FIFO_CNT_SEND_TI_SHIFT) | \
+    ((u32)(send_full) << REG_PXI_FIFO_CNT_SEND_FULL_SHIFT) | \
+    ((u32)(send_emp) << REG_PXI_FIFO_CNT_SEND_EMP_SHIFT))
+#endif
+
+#define REG_G3_SWAP_BUFFERS_DP_SHIFT                       1
+#define REG_G3_SWAP_BUFFERS_DP_SIZE                        1
+#define REG_G3_SWAP_BUFFERS_DP_MASK                        0x00000002
+
+#define REG_G3_SWAP_BUFFERS_XS_SHIFT                       0
+#define REG_G3_SWAP_BUFFERS_XS_SIZE                        1
+#define REG_G3_SWAP_BUFFERS_XS_MASK                        0x00000001
+#define REG_G3_SWAP_BUFFERS_DP_SHIFT                       1
+#define REG_G3_SWAP_BUFFERS_DP_SIZE                        1
+#define REG_G3_SWAP_BUFFERS_DP_MASK                        0x00000002
+
+#define REG_G3_SWAP_BUFFERS_XS_SHIFT                       0
+#define REG_G3_SWAP_BUFFERS_XS_SIZE                        1
+#define REG_G3_SWAP_BUFFERS_XS_MASK                        0x00000001
+
+#ifndef SDK_ASM
+#define REG_G3_SWAP_BUFFERS_FIELD( dp, xs ) \
+    (u32)( \
+    ((u32)(dp) << REG_G3_SWAP_BUFFERS_DP_SHIFT) | \
+    ((u32)(xs) << REG_G3_SWAP_BUFFERS_XS_SHIFT))
+#endif
+
+#endif //NITRO_IO_REG_H_
diff --git a/lib/include/nitro/hw/mmap.h b/lib/include/nitro/hw/mmap.h
new file mode 100644
index 0000000000..8fe3254854
--- /dev/null
+++ b/lib/include/nitro/hw/mmap.h
@@ -0,0 +1,13 @@
+#ifndef NITRO_HW_MMAP_H_
+#define NITRO_HW_MMAP_H_
+
+#include <nitro/types.h>
+#include <nitro/hw/mmap_shared.h>
+
+#ifdef SDK_ARM7
+#include <nitro/hw/ARM7/mmap.h>
+#else //ARM9
+#include <nitro/hw/ARM9/mmap.h>
+#endif
+
+#endif //NITRO_HW_MMAP_H_
diff --git a/lib/include/nitro/hw/mmap_shared.h b/lib/include/nitro/hw/mmap_shared.h
new file mode 100644
index 0000000000..693dd317f8
--- /dev/null
+++ b/lib/include/nitro/hw/mmap_shared.h
@@ -0,0 +1,40 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include mmap.h from the specific proc's lib
+ */
+
+#ifndef NITRO_HW_MMAP_SHARED_H_
+#define NITRO_HW_MMAP_SHARED_H_
+
+#define HW_MAIN_MEM             0x02000000
+#define HW_MAIN_MEM_SIZE        0x00400000
+#define HW_MAIN_MEM_MAIN_SIZE   0x003E0000
+#define HW_MAIN_MEM_SHARED_SIZE 0x00001000
+
+#define HW_WRAM                 0x037F8000
+
+#define HW_MAIN_MEM_SYSTEM      (HW_MAIN_MEM + 0x007ffc00)
+#define HW_WM_BOOT_BUF          (HW_MAIN_MEM + 0x007ffc40)
+#define HW_ARENA_INFO_BUF       (HW_MAIN_MEM + 0x007ffda0)
+#define HW_CTRDG_LOCK_BUF       (HW_MAIN_MEM + 0x007fffe8)
+#define HW_INIT_LOCK_BUF        (HW_MAIN_MEM + 0x007ffff0)
+#define HW_MAIN_MEM_MAIN        (HW_MAIN_MEM)
+#define HW_MAIN_MEM_MAIN_END    (HW_MAIN_MEM + HW_MAIN_MEM_MAIN_SIZE)
+
+#define HW_SVC_STACK_SIZE       0x00000040
+
+#define HW_BUTTON_XY_BUF        (HW_MAIN_MEM + 0x007FFFA8)
+
+#define HW_PXI_SIGNAL_PARAM_ARM9        (HW_MAIN_MEM + 0x007fff80)
+#define HW_PXI_SIGNAL_PARAM_ARM7        (HW_MAIN_MEM + 0x007fff84)
+#define HW_PXI_HANDLE_CHECKER_ARM9      (HW_MAIN_MEM + 0x007fff88)
+#define HW_PXI_HANDLE_CHECKER_ARM7      (HW_MAIN_MEM + 0x007fff8c)
+
+#endif //NITRO_HW_MMAP_SHARED_H_
diff --git a/lib/include/nitro/itcm_begin.h b/lib/include/nitro/itcm_begin.h
new file mode 100644
index 0000000000..582c8bcfa0
--- /dev/null
+++ b/lib/include/nitro/itcm_begin.h
@@ -0,0 +1,4 @@
+#include <nitro/section.h>
+#ifdef SDK_ARM9
+#pragma section ITCM begin
+#endif
diff --git a/lib/include/nitro/itcm_end.h b/lib/include/nitro/itcm_end.h
new file mode 100644
index 0000000000..ad3474e05a
--- /dev/null
+++ b/lib/include/nitro/itcm_end.h
@@ -0,0 +1,4 @@
+#include <nitro/section.h>
+#ifdef SDK_ARM9
+#pragma section ITCM end
+#endif
diff --git a/lib/include/nitro/math.h b/lib/include/nitro/math.h
new file mode 100644
index 0000000000..72ac0f437a
--- /dev/null
+++ b/lib/include/nitro/math.h
@@ -0,0 +1,7 @@
+#ifndef NITRO_MATH_H_
+#define NITRO_MATH_H_
+
+#include <nitro/math/crc.h>
+#include <nitro/math/dgt.h>
+
+#endif //NITRO_MATH_H_
diff --git a/lib/include/nitro/math/crc.h b/lib/include/nitro/math/crc.h
new file mode 100644
index 0000000000..60abf72c0b
--- /dev/null
+++ b/lib/include/nitro/math/crc.h
@@ -0,0 +1,97 @@
+#ifndef NITRO_MATH_CRC_H_
+#define NITRO_MATH_CRC_H_
+
+#define MATH_CRC8_STANDARD_POLY     0x07
+#define MATH_CRC8_STANDARD_INIT     0
+
+#define MATH_CRC16_STANDARD_POLY    0xa001
+#define MATH_CRC16_STANDARD_INIT    0
+#define MATH_CRC16_CCITT_POLY       0x1021
+#define MATH_CRC16_CCITT_INIT       0xffff
+
+#define MATH_CRC32_STANDARD_POLY    0xedb88320
+#define MATH_CRC32_STANDARD_INIT    0xffffffff
+#define MATH_CRC32_POSIX_POLY       0x04c11db7
+#define MATH_CRC32_POSIX_INIT       0
+
+typedef u8 MATHCRC8Context;
+typedef u16 MATHCRC16Context;
+typedef u32 MATHCRC32Context;
+
+typedef struct MATHCRC8Table {
+    u8 table[256];
+} MATHCRC8Table;
+
+typedef struct MATHCRC16Table {
+    u16 table[256];
+} MATHCRC16Table;
+
+typedef struct MATHCRC32Table {
+    u32 table[256];
+} MATHCRC32Table;
+
+void MATHi_CRC8InitTable(MATHCRC8Table *table, u8 poly);
+void MATHi_CRC8InitTableRev(MATHCRC8Table *table, u8 poly);
+
+static inline void MATHi_CRC8Init(MATHCRC8Context *context, u8 init) {
+    *context = init;
+}
+
+void MATHi_CRC8Update(const MATHCRC8Table *table, MATHCRC8Context *context, const void *input, u32 length);
+static inline void MATHi_CRC8UpdateRev(const MATHCRC8Table *table, MATHCRC8Context *context, const void *input, u32 length) {
+    MATHi_CRC8Update(table, context, input, length);
+}
+
+static inline u8 MATHi_CRC8GetHash(MATHCRC8Context *context) {
+    return *context;
+}
+
+static inline void MATH_CRC8InitTable(MATHCRC8Table *table) {
+    MATHi_CRC8InitTable(table, MATH_CRC8_STANDARD_POLY);
+}
+
+static inline void MATH_CRC8Init(MATHCRC8Context *context) {
+    MATHi_CRC8Init(context, MATH_CRC8_STANDARD_INIT);
+}
+
+static inline void MATH_CRC8Update(const MATHCRC8Table *table, MATHCRC8Context *context, const void *input, u32 length) {
+    MATHi_CRC8Update(table, context, input, length);
+}
+
+static inline u8 MATH_CRC8GetHash(MATHCRC8Context *context) {
+    return MATHi_CRC8GetHash(context);
+}
+
+void MATHi_CRC16InitTable(MATHCRC16Table *table, u16 poly);
+void MATHi_CRC16InitTableRev(MATHCRC16Table *table, u16 poly);
+
+static inline void MATHi_CRC16Init(MATHCRC16Context *context, u16 init) {
+    *context = init;
+}
+
+void MATHi_CRC16Update(const MATHCRC16Table *table, MATHCRC16Context *context, const void *input, u32 length);
+void MATHi_CRC16UpdateRev(const MATHCRC16Table *table, MATHCRC16Context *context, const void *input, u32 length);
+
+static inline u16 MATHi_CRC16GetHash(MATHCRC16Context *context) {
+    return *context;
+}
+
+static inline void MATH_CRC16InitTable(MATHCRC16Table *table) {
+    MATHi_CRC16InitTable(table, MATH_CRC16_CCITT_POLY);
+}
+
+static inline void MATH_CRC16Init(MATHCRC16Context *context) {
+    MATHi_CRC16Init(context, MATH_CRC16_CCITT_INIT);
+}
+
+static inline void MATH_CRC16Update(const MATHCRC16Table *table, MATHCRC16Context *context, const void *input, u32 length) {
+    MATHi_CRC16Update(table, context, input, length);
+}
+
+static inline u16 MATH_CRC16GetHash(MATHCRC16Context *context) {
+    return MATHi_CRC16GetHash(context);
+}
+
+u16 MATH_CalcCRC16CCITT(const MATHCRC16Table *table, const void *input, u32 length);
+
+#endif //NITRO_MATH_CRC_H_
diff --git a/lib/include/nitro/math/dgt.h b/lib/include/nitro/math/dgt.h
new file mode 100644
index 0000000000..54dfcbb1ca
--- /dev/null
+++ b/lib/include/nitro/math/dgt.h
@@ -0,0 +1,14 @@
+#ifndef NITRO_MATH_DGT_H_
+#define NITRO_MATH_DGT_H_
+
+#include <nitro/dgt/common.h>
+
+#define MATH_MD5_DIGEST_SIZE    DGT_HASH1_DIGEST_SIZE
+#define MATH_SHA1_DIGEST_SIZE   DGT_HASH2_DIGEST_SIZE
+#define MATH_MD5_BLOCK_SIZE     DGT_HASH_BLOCK_SIZE
+#define MATH_SHA1_BLOCK_SIZE    DGT_HASH_BLOCK_SIZE
+
+void MATH_CalcMD5(void *digest, const void *data, u32 dataLength);
+void MATH_CalcSHA1(void *digest, const void *data, u32 dataLength);
+
+#endif //NITRO_MATH_DGT_H_
diff --git a/lib/include/nitro/mb.h b/lib/include/nitro/mb.h
new file mode 100644
index 0000000000..1eff81b82e
--- /dev/null
+++ b/lib/include/nitro/mb.h
@@ -0,0 +1,42 @@
+#ifndef NITRO_MB_H_
+#define NITRO_MB_H_
+
+#define MB_TYPE_ILLEGAL                 0
+#define MB_TYPE_NORMAL                  1
+#define MB_TYPE_MULTIBOOT               2
+
+typedef struct {
+    u16 length;
+    u16 rssi;
+    u16 bssid[3];
+    u16 ssidLength;
+    u8 ssid[32];
+    u16 capaInfo;
+    struct {
+        u16 basic;
+        u16 support;
+    } rateSet;
+    u16 beaconPeriod;
+    u16 dtimPeriod;
+    u16 channel;
+    u16 cfpPeriod;
+    u16 cfpMaxDuration;
+}
+MBParentBssDesc;
+
+typedef struct {
+    u16 boot_type;
+    MBParentBssDesc parent_bss_desc;
+} MBParam;
+
+static inline const MBParam *MB_GetMultiBootParam(void)
+{
+    return (const MBParam *)HW_WM_BOOT_BUF;
+}
+
+static inline BOOL MB_IsMultiBootChild(void)
+{
+    return MB_GetMultiBootParam()->boot_type == MB_TYPE_MULTIBOOT;
+}
+
+#endif //NITRO_MB_H_
diff --git a/lib/include/nitro/mi.h b/lib/include/nitro/mi.h
new file mode 100644
index 0000000000..31e16bcdf7
--- /dev/null
+++ b/lib/include/nitro/mi.h
@@ -0,0 +1,12 @@
+#ifndef NITRO_MI_H_
+#define NITRO_MI_H_
+
+#include <nitro/mi/memory.h>
+#include <nitro/mi/exMemory.h>
+#include <nitro/mi/swap.h>
+#include <nitro/mi/dma.h>
+#include <nitro/mi/uncompress.h>
+
+void MI_Init(void);
+
+#endif //NITRO_MI_H_
diff --git a/lib/include/nitro/mi/dma.h b/lib/include/nitro/mi/dma.h
new file mode 100644
index 0000000000..283a85ff66
--- /dev/null
+++ b/lib/include/nitro/mi/dma.h
@@ -0,0 +1,80 @@
+#ifndef NITRO_MI_DMA_H_
+#define NITRO_MI_DMA_H_
+
+#include <nitro/mi/dma_shared.h>
+#include <nitro/hw/io_reg.h>
+#include <nitro/os/system.h>
+
+typedef void (*MIDmaCallback)(void *);
+
+#define MI_DMA_MAX_NUM          3
+
+#define REG_ADDR_DMA0CNT        0x40000b8
+#define REG_ADDR_DMA0_CLR_DATA  0x40000e0
+
+#define MI_CNT_CLEAR32(size)    (0x85000000 | ((size)/4))
+#define MI_CNT_CLEAR32_IF(size) (0xc5000000 | ((size)/4))
+#define MI_CNT_COPY32(size)     (0x84000000 | ((size)/4))
+#define MI_CNT_COPY32_IF(size)  (0xc4000000 | ((size)/4))
+#define MI_CNT_COPY16(size)     (0x80000000 | ((size)/2))
+
+#define MI_DMA_SRC_FIX          (2UL << 23)
+#define MI_DMA_SRC_INC          (0UL << 23)
+
+#define MI_DMA_16BIT_BUS        (0UL << 26)
+#define MI_DMA_32BIT_BUS        (1UL << 26)
+
+#define MIi_DMA_TIMING_ANY      (u32)(~0)
+#define MI_DMA_TIMING_H_BLANK   (2UL << 27)
+
+typedef union
+{
+    u32 b32;
+    u16 b16;
+} MIiDmaClearSrc;
+
+void MI_DmaFill32(u32 dmaNo, void *dest, u32 data, u32 size);
+void MI_DmaCopy32(u32 dmaNo, const void *src, void *dest, u32 size);
+void MI_DmaCopy16(u32 dmaNo, const void *src, void *dest, u32 size);
+void MI_DmaFill32Async(u32 dmaNo, void *dest, u32 data, u32 size, MIDmaCallback callback, void *arg);
+void MI_DmaCopy32Async(u32 dmaNo, const void *src, void *dest, u32 size, MIDmaCallback callback, void *arg);
+void MI_WaitDma(u32 dmaNo);
+void MI_StopDma(u32 dmaNo);
+void MIi_CheckAnotherAutoDMA(u32 dmaNo, u32 dmaType);
+void MIi_CheckDma0SourceAddress(u32 dmaNo, u32 src, u32 size, u32 dir);
+void MIi_DmaSetParams(u32 dmaNo, u32 src, u32 dest, u32 ctrl);
+void MIi_DmaSetParams_wait(u32 dmaNo, u32 src, u32 dest, u32 ctrl);
+void MIi_DmaSetParams_noInt(u32 dmaNo, u32 src, u32 dest, u32 ctrl);
+void MIi_DmaSetParams_wait_noInt(u32 dmaNo, u32 src, u32 dest, u32 ctrl);
+
+static inline void MIi_DmaSetParams_wait_src32(u32 dmaNo, u32 data, u32 dest, u32 ctrl)
+{
+    OSIntrMode lastIntrMode = OS_DisableInterrupts();
+
+    MIiDmaClearSrc *scrp = (MIiDmaClearSrc *) ((u32)REG_ADDR_DMA0_CLR_DATA + dmaNo * 4);
+    scrp->b32 = data;
+    MIi_DmaSetParams_wait_noInt(dmaNo, (u32)scrp, dest, ctrl);
+
+    (void)OS_RestoreInterrupts(lastIntrMode);
+}
+
+static inline void MIi_DmaSetParams_src32(u32 dmaNo, u32 data, u32 dest, u32 ctrl)
+{
+    OSIntrMode lastIntrMode = OS_DisableInterrupts();
+
+    MIiDmaClearSrc *srcp = (MIiDmaClearSrc *) ((u32)REG_ADDR_DMA0_CLR_DATA + dmaNo * 4);
+    srcp->b32 = data;
+    MIi_DmaSetParams_noInt(dmaNo, (u32)srcp, dest, ctrl);
+
+    (void)OS_RestoreInterrupts(lastIntrMode);
+}
+
+static inline void MIi_CallCallback(MIDmaCallback callback, void *arg)
+{
+    if (callback)
+    {
+        (callback) (arg);
+    }
+}
+
+#endif //NITRO_MI_DMA_H_
diff --git a/lib/include/nitro/mi/dma_shared.h b/lib/include/nitro/mi/dma_shared.h
new file mode 100644
index 0000000000..e839417a9a
--- /dev/null
+++ b/lib/include/nitro/mi/dma_shared.h
@@ -0,0 +1,37 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include MI_dma.h from the specific proc's lib
+ */
+
+#ifndef GUARD_DMA_SHARED_H
+#define GUARD_DMA_SHARED_H
+
+#define REG_ADDR_DMA0SAD 0x040000b0
+
+#define DMA_DEST_INC      0x0000
+#define DMA_DEST_DEC      0x0020
+#define DMA_DEST_FIXED    0x0040
+#define DMA_DEST_RELOAD   0x0060
+#define DMA_SRC_INC       0x0000
+#define DMA_SRC_DEC       0x0080
+#define DMA_SRC_FIXED     0x0100
+#define DMA_REPEAT        0x0200
+#define DMA_16BIT         0x0000
+#define DMA_32BIT         0x0400
+#define DMA_DREQ_ON       0x0800
+#define DMA_START_NOW     0x0000
+#define DMA_START_VBLANK  0x1000
+#define DMA_START_HBLANK  0x2000
+#define DMA_START_SPECIAL 0x3000
+#define DMA_START_MASK    0x3000
+#define DMA_INTR_ENABLE   0x4000
+#define DMA_ENABLE        0x8000
+
+#endif
diff --git a/lib/include/nitro/mi/exMemory.h b/lib/include/nitro/mi/exMemory.h
new file mode 100644
index 0000000000..47c0a33134
--- /dev/null
+++ b/lib/include/nitro/mi/exMemory.h
@@ -0,0 +1,75 @@
+#ifndef NITRO_MI_EXMEMORY_H_
+#define NITRO_MI_EXMEMORY_H_
+
+#include <nitro/hw/consts.h>
+
+typedef enum {
+    MI_PROCESSOR_ARM9 = 0,
+    MI_PROCESSOR_ARM7 = 1
+} MIProcessor;
+
+typedef enum
+{
+    MI_CTRDG_ROMCYCLE1_10 = 0,
+    MI_CTRDG_ROMCYCLE1_8 = 1,
+    MI_CTRDG_ROMCYCLE1_6 = 2,
+    MI_CTRDG_ROMCYCLE1_18 = 3
+} MICartridgeRomCycle1st;
+
+typedef enum
+{
+    MI_CTRDG_ROMCYCLE2_6 = 0,
+    MI_CTRDG_ROMCYCLE2_4 = 1
+} MICartridgeRomCycle2nd;
+
+typedef enum
+{
+    MI_CTRDG_RAMCYCLE_10 = 0,
+    MI_CTRDG_RAMCYCLE_8 = 1,
+    MI_CTRDG_RAMCYCLE_6 = 2,
+    MI_CTRDG_RAMCYCLE_18 = 3
+} MICartridgeRamCycle;
+
+static inline void MIi_SetCardProcessor(MIProcessor proc)
+{
+    reg_MI_EXMEMCNT =
+            (u16)((reg_MI_EXMEMCNT & ~0x0800) | (proc << 11));
+}
+
+static inline void MIi_SetCartridgeProcessor(MIProcessor proc)
+{
+    reg_MI_EXMEMCNT =
+            (u16)((reg_MI_EXMEMCNT & ~0x0080) | (proc << 7));
+}
+
+static inline MICartridgeRomCycle1st MI_GetCartridgeRomCycle1st(void)
+{
+    return (MICartridgeRomCycle1st)((reg_MI_EXMEMCNT & 0xc) >> 2);
+}
+
+static inline MICartridgeRomCycle2nd MI_GetCartridgeRomCycle2nd(void)
+{
+    return (MICartridgeRomCycle2nd)((reg_MI_EXMEMCNT & 0x10) >> 4);
+}
+
+static inline void MI_SetCartridgeRomCycle1st(MICartridgeRomCycle1st c1)
+{
+    reg_MI_EXMEMCNT = (u16)((reg_MI_EXMEMCNT & ~0xc) | (c1 << 2));
+}
+
+static inline void MI_SetCartridgeRomCycle2nd(MICartridgeRomCycle2nd c2)
+{
+    reg_MI_EXMEMCNT = (u16)((reg_MI_EXMEMCNT & ~0x10) | (c2 << 4));
+}
+
+static inline void MI_SetCartridgeRamCycle(MICartridgeRamCycle c)
+{
+    reg_MI_EXMEMCNT = (u16)((reg_MI_EXMEMCNT & ~3) | (c << 0));
+}
+
+static inline MICartridgeRamCycle MI_GetCartridgeRamCycle(void)
+{
+    return (MICartridgeRamCycle)((reg_MI_EXMEMCNT & 3) >> 0);
+}
+
+#endif //NITRO_MI_EXMEMORY_H_
diff --git a/lib/include/nitro/mi/memory.h b/lib/include/nitro/mi/memory.h
new file mode 100644
index 0000000000..bd53141eab
--- /dev/null
+++ b/lib/include/nitro/mi/memory.h
@@ -0,0 +1,57 @@
+#ifndef NITRO_MI_MEMORY_H
+#define NITRO_MI_MEMORY_H
+
+#include <nitro/types.h>
+
+void MIi_CpuClear16(register u16 value, register u16 * dst, register u32 size);
+void MIi_CpuCopy16(const register u16 * src, register u16 * dst, register u32 size);
+void MIi_CpuClear32(register u32 value, register u32 * dst, register u32 size);
+void MIi_CpuCopy32(const register u32 * src, register u32 * dst, register u32 size);
+void MIi_CpuClearFast(register u32 value, register u32 * dst, register u32 size);
+void MIi_CpuCopyFast(const register u32 * src, register u32 * dst, register u32 size);
+void MI_CpuFill8(void *dest, u8 data, u32 size);
+void MI_CpuCopy8(const void * src, void * dst, u32 size);
+
+static inline void MI_CpuCopy16(const void *src, void *dst, u32 size) {
+    MIi_CpuCopy16(src, dst, size);
+}
+
+static inline void MI_CpuClear16(void *dest, u32 size) {
+    MIi_CpuClear16(0, dest, size);
+}
+
+static inline void MI_CpuFill16(void *dest, u16 data, u32 size) {
+    MIi_CpuClear16(data, dest, size);
+}
+
+static inline void MI_CpuFill32(void *dest, u32 data, u32 size) {
+    MIi_CpuClear32(data, dest, size);
+}
+
+static inline void MI_CpuClear32(void *dest, u32 size) {
+    MI_CpuFill32(dest, 0, size);
+}
+
+static inline void MI_CpuCopy32(const void *src, void *dst, u32 size) {
+    MIi_CpuCopy32((u32 *)src, (u32 *)dst, size);
+}
+
+static inline void MI_CpuClearFast(void *dst, u32 size) {
+    MIi_CpuClearFast(0, dst, size);
+}
+
+static inline void MI_CpuCopyFast(const void *src, void *dst, u32 size) {
+    MIi_CpuCopyFast(src, dst, size);
+}
+
+static inline void MI_CpuFillFast(void *dst, int data, u32 size) {
+    MIi_CpuClearFast(data, dst, size);
+}
+
+static inline void MI_CpuClear8(void *dst, u32 size) {
+    MI_CpuFill8(dst, 0, size);
+}
+
+void MI_Copy36B(const void *pSrc, void *pDst);
+
+#endif //NITRO_MI_MEMORY_H
diff --git a/lib/include/nitro/mi/swap.h b/lib/include/nitro/mi/swap.h
new file mode 100644
index 0000000000..51c44d0b2a
--- /dev/null
+++ b/lib/include/nitro/mi/swap.h
@@ -0,0 +1,7 @@
+#ifndef NITRO_SWAP_H_
+#define NITRO_SWAP_H_
+
+u32 MI_SwapWord(u32 setData, vu32 *destp);
+u8 MI_SwapByte(u32 setData, vu8 *destp);
+
+#endif //NITRO_SWAP_H_
diff --git a/lib/include/nitro/mi/uncompress.h b/lib/include/nitro/mi/uncompress.h
new file mode 100644
index 0000000000..0ad7aa70c3
--- /dev/null
+++ b/lib/include/nitro/mi/uncompress.h
@@ -0,0 +1,10 @@
+#ifndef NITRO_MI_UNCOMPRESS_H_
+#define NITRO_MI_UNCOMPRESS_H_
+
+void MI_UncompressLZ8(const void *srcp, void *destp);
+
+static inline u32 MI_GetUncompressedSize(const void *srcp) {
+    return (*(u32 *)srcp >> 8);
+}
+
+#endif //NITRO_MI_UNCOMPRESS_H_
diff --git a/lib/include/nitro/os.h b/lib/include/nitro/os.h
new file mode 100644
index 0000000000..0afe9cd041
--- /dev/null
+++ b/lib/include/nitro/os.h
@@ -0,0 +1,45 @@
+#ifndef NITRO_OS_H_
+#define NITRO_OS_H_
+
+#include <nitro/os/context.h>
+#include <nitro/os/system.h>
+#include <nitro/os/systemWork.h>
+#include <nitro/os/thread.h>
+#include <nitro/os/mutex.h>
+#include <nitro/os/interrupt.h>
+#include <nitro/os/systemCall.h>
+#include <nitro/os/spinLock.h>
+#include <nitro/os/printf.h>
+#include <nitro/os/init.h>
+#include <nitro/os/exception.h>
+#include <nitro/os/valarm.h>
+#include <nitro/os/emulator.h>
+#include <nitro/os/tick.h>
+#include <nitro/os/alarm.h>
+#include <nitro/os/ownerInfo.h>
+#include <nitro/os/context.h>
+#include <nitro/os/system.h>
+#include <nitro/os/systemWork.h>
+#include <nitro/os/thread.h>
+#include <nitro/os/mutex.h>
+#include <nitro/os/interrupt.h>
+#include <nitro/os/systemCall.h>
+#include <nitro/os/spinLock.h>
+#include <nitro/os/printf.h>
+#include <nitro/os/init.h>
+#include <nitro/os/exception.h>
+#include <nitro/os/valarm.h>
+#include <nitro/os/emulator.h>
+#include <nitro/os/tick.h>
+#include <nitro/os/alarm.h>
+#include <nitro/os/common/entropy.h>
+
+#ifdef SDK_ARM9
+#include <nitro/os/cache.h>
+#include <nitro/os/protectionRegion.h>
+#include <nitro/os/protectionUnit.h>
+#include <nitro/os/tcm.h>
+#include <nitro/os/ARM9/vramExclusive.h>
+#endif //SDK_ARM9
+
+#endif //NITRO_OS_H_
diff --git a/lib/include/nitro/os/ARM7/alarm.h b/lib/include/nitro/os/ARM7/alarm.h
new file mode 100644
index 0000000000..05a2cfe1a1
--- /dev/null
+++ b/lib/include/nitro/os/ARM7/alarm.h
@@ -0,0 +1,16 @@
+/*
+ * NOTE:
+ * This file is specific to ARM7
+ * DO NOT PUT SHARED/ARM9 CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include <nitro/os/alarm.h> instead!
+ */
+
+#ifndef NITRO_OS_ARM7_ALARM_H
+#define NITRO_OS_ARM7_ALARM_H
+
+#endif //NITRO_OS_ARM7_ALARM_H
diff --git a/lib/include/nitro/os/ARM7/interrupt.h b/lib/include/nitro/os/ARM7/interrupt.h
new file mode 100644
index 0000000000..81bd0b34db
--- /dev/null
+++ b/lib/include/nitro/os/ARM7/interrupt.h
@@ -0,0 +1,28 @@
+/*
+ * NOTE:
+ * This file is specific to ARM7
+ * DO NOT PUT SHARED/ARM9 CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include <nitro/os/interrupt.h> instead!
+ */
+
+#ifndef NITRO_OS_ARM7_INTERRUPT_H
+#define NITRO_OS_ARM7_INTERRUPT_H
+
+#include <nitro/hw/consts.h>
+
+extern OSIrqFunction OS_IRQTable[];
+extern OSIrqCallbackInfo OSi_IrqCallbackInfo[9];
+
+#define OS_IE_FIFO_RECV       (1UL << REG_OS_IE_IFN_SHIFT)
+
+static inline void OSi_SetVBlankCount(u32 count)
+{
+    *(u32 *)HW_VBLANK_COUNT_BUF = count;
+}
+
+#endif //NITRO_OS_ARM7_INTERRUPT_H
diff --git a/lib/include/nitro/os/ARM7/system.h b/lib/include/nitro/os/ARM7/system.h
new file mode 100644
index 0000000000..0d333e12ec
--- /dev/null
+++ b/lib/include/nitro/os/ARM7/system.h
@@ -0,0 +1,10 @@
+#ifndef NITRO_OS_ARM7_SYSTEM_H
+#define NITRO_OS_ARM7_SYSTEM_H
+
+#include <nitro/os/systemCall.h>
+
+static inline void OS_Halt(void) {
+    SVC_Halt();
+}
+
+#endif //NITRO_OS_ARM7_SYSTEM_H
diff --git a/lib/include/nitro/os/ARM9/system.h b/lib/include/nitro/os/ARM9/system.h
new file mode 100644
index 0000000000..2a716fc6fa
--- /dev/null
+++ b/lib/include/nitro/os/ARM9/system.h
@@ -0,0 +1,6 @@
+#ifndef NITRO_OS_ARM9_SYSTEM_H
+#define NITRO_OS_ARM9_SYSTEM_H
+
+extern void OS_Halt(void);
+
+#endif //NITRO_OS_ARM9_SYSTEM_H
diff --git a/lib/include/nitro/os/ARM9/vramExclusive.h b/lib/include/nitro/os/ARM9/vramExclusive.h
new file mode 100644
index 0000000000..295f62a7d4
--- /dev/null
+++ b/lib/include/nitro/os/ARM9/vramExclusive.h
@@ -0,0 +1,19 @@
+#ifndef NITRO_OS_VRAMEXCLUSIVE_H_
+#define NITRO_OS_VRAMEXCLUSIVE_H_
+
+#define		OS_VRAM_BANK_ID_A		0x0001
+#define		OS_VRAM_BANK_ID_B		0x0002
+#define		OS_VRAM_BANK_ID_C		0x0004
+#define		OS_VRAM_BANK_ID_D		0x0008
+#define		OS_VRAM_BANK_ID_E		0x0010
+#define		OS_VRAM_BANK_ID_F		0x0020
+#define		OS_VRAM_BANK_ID_G		0x0040
+#define		OS_VRAM_BANK_ID_H		0x0080
+#define		OS_VRAM_BANK_ID_I		0x0100
+#define		OS_VRAM_BANK_ID_ALL		0x01ff
+
+#define		OS_VRAM_BANK_KINDS		9
+
+void OSi_InitVramExclusive(void);
+
+#endif //NITRO_OS_VRAMEXCLUSIVE_H_
diff --git a/lib/include/nitro/os/alarm.h b/lib/include/nitro/os/alarm.h
new file mode 100644
index 0000000000..dc341bf7d9
--- /dev/null
+++ b/lib/include/nitro/os/alarm.h
@@ -0,0 +1,18 @@
+#ifndef NITRO_OS_ALARM_H
+#define NITRO_OS_ALARM_H
+
+#include <nitro/os/thread.h>
+#include <nitro/os/common/alarm_shared.h>
+
+#ifdef SDK_ARM7
+#include <nitro/os/ARM7/alarm.h>
+#endif
+
+struct OSiAlarmQueue
+{
+    OSAlarm *head;
+    OSAlarm *tail;
+};
+struct OSiAlarmQueue *OSi_GetAlarmQueue(void);
+
+#endif //NITRO_OS_ALARM_H
diff --git a/lib/include/nitro/os/alloc.h b/lib/include/nitro/os/alloc.h
new file mode 100644
index 0000000000..db7278bed3
--- /dev/null
+++ b/lib/include/nitro/os/alloc.h
@@ -0,0 +1,14 @@
+#ifndef NITRO_OS_ALLOC_H
+#define NITRO_OS_ALLOC_H
+
+#include <nitro/os/arena.h>
+#include <nitro/os/common/alloc_shared.h>
+
+void* OS_AllocFromHeap(OSArenaId id, OSHeapHandle heap, u32 size);
+void OS_FreeToHeap(OSArenaId id, OSHeapHandle heap, void* ptr);
+OSHeapHandle OS_SetCurrentHeap(OSArenaId id, OSHeapHandle heap);
+void *OS_InitAlloc(OSArenaId id, void *arenaStart, void *arenaEnd, s32 maxHeaps);
+OSHeapHandle OS_CreateHeap(OSArenaId id, void *start, void *end);
+s32 OS_CheckHeap(OSArenaId id, OSHeapHandle heap);
+
+#endif //NITRO_OS_ALLOC_H
diff --git a/lib/include/nitro/os/arena.h b/lib/include/nitro/os/arena.h
new file mode 100644
index 0000000000..a67f642e73
--- /dev/null
+++ b/lib/include/nitro/os/arena.h
@@ -0,0 +1,17 @@
+#ifndef NITRO_OS_ARENA_H
+#define NITRO_OS_ARENA_H
+
+#include <nitro/os/common/arena_shared.h>
+
+void OS_InitArena(void);
+void OS_InitArenaHiAndLo(OSArenaId id);
+void* OS_GetArenaHi(OSArenaId id);
+void* OS_GetArenaLo(OSArenaId id);
+void* OS_GetInitArenaHi(OSArenaId id);
+void* OS_GetInitArenaLo(OSArenaId id);
+void OS_SetArenaHi(OSArenaId id, void* newHi);
+void OS_SetArenaLo(OSArenaId id, void* newLo);
+void *OS_AllocFromArenaHi(OSArenaId arena, u32 size, u32 align);
+void *OS_AllocFromArenaLo(OSArenaId id, u32 size, u32 align);
+
+#endif //NITRO_OS_ARENA_H
diff --git a/lib/include/nitro/os/cache.h b/lib/include/nitro/os/cache.h
new file mode 100644
index 0000000000..159223e4d2
--- /dev/null
+++ b/lib/include/nitro/os/cache.h
@@ -0,0 +1,11 @@
+#ifndef NITRO_OS_CACHE_H_
+#define NITRO_OS_CACHE_H_
+
+void DC_FlushAll(void);
+void DC_InvalidateAll(void);
+void DC_StoreAll(void);
+void IC_InvalidateAll(void);
+void DC_WaitWriteBufferEmpty(void);
+void DC_FlushRange(const void *data, u32 size);
+
+#endif //NITRO_OS_CACHE_H_
diff --git a/lib/include/nitro/os/common/alarm_shared.h b/lib/include/nitro/os/common/alarm_shared.h
new file mode 100644
index 0000000000..d7836ed2b8
--- /dev/null
+++ b/lib/include/nitro/os/common/alarm_shared.h
@@ -0,0 +1,42 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include OS_alarm.h from the specific proc's lib
+ */
+
+#ifndef NITRO_OS_ALARM_SHARED_H
+#define NITRO_OS_ALARM_SHARED_H
+
+#include <nitro/types.h>
+#include <nitro/os/common/tick_shared.h>
+#include <nitro/os/common/thread_shared.h>
+
+typedef void (*OSAlarmHandler) (void *);
+
+struct OSiAlarm
+{
+    OSAlarmHandler handler;
+    void *arg;
+
+    u32 tag;
+    OSTick fire;
+    OSAlarm *prev;
+    OSAlarm *next;
+
+    OSTick period;
+    OSTick start;
+};
+
+void OS_CreateAlarm(OSAlarm *alarm);
+void OS_CancelAlarm(OSAlarm *alarm);
+BOOL OS_IsAlarmAvailable(void);
+void OS_SetAlarm(OSAlarm *alarm, OSTick tick, OSAlarmHandler handler, void *arg);
+void OS_SetPeriodicAlarm(OSAlarm *alarm, OSTick start, OSTick period, OSAlarmHandler handler, void *arg);
+
+#endif //NITRO_OS_ALARM_SHARED_H
diff --git a/lib/include/nitro/os/common/alloc_shared.h b/lib/include/nitro/os/common/alloc_shared.h
new file mode 100644
index 0000000000..875ed3fe21
--- /dev/null
+++ b/lib/include/nitro/os/common/alloc_shared.h
@@ -0,0 +1,42 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include OS_alloc.h from the specific proc's lib
+ */
+
+#ifndef NITRO_OS_ALLOC_SHARED_H
+#define NITRO_OS_ALLOC_SHARED_H
+
+#include <nitro/types.h>
+
+typedef s32 OSHeapHandle;
+
+typedef struct Cell Cell;
+
+struct Cell {
+    Cell* prev;
+    Cell* next;
+    long size;
+};
+
+typedef struct {
+    long size;
+    Cell *free;
+    Cell *allocated;
+} HeapDesc;
+
+typedef struct {
+    volatile OSHeapHandle currentHeap;
+    int numHeaps;
+    void* arenaStart;
+    void* arenaEnd;
+    HeapDesc* heapArray;
+} OSHeapInfo;
+
+#endif //NITRO_OS_ALLOC_SHARED_H
diff --git a/lib/include/nitro/os/common/arena_shared.h b/lib/include/nitro/os/common/arena_shared.h
new file mode 100644
index 0000000000..a9a1d04a89
--- /dev/null
+++ b/lib/include/nitro/os/common/arena_shared.h
@@ -0,0 +1,39 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include OS_arena.h from the specific proc's lib
+ */
+
+#ifndef NITRO_OS_ARENA_SHARED_H
+#define NITRO_OS_ARENA_SHARED_H
+
+#include <nitro/types.h>
+#include <nitro/hw/consts_shared.h>
+
+typedef enum {
+    OS_ARENA_MAIN = 0,
+    OS_ARENA_MAIN_SUBPRIV = 1,
+    OS_ARENA_MAINEX = 2,
+    OS_ARENA_ITCM = 3,
+    OS_ARENA_DTCM = 4,
+    OS_ARENA_SHARED = 5,
+    OS_ARENA_WRAM_MAIN = 6,
+    OS_ARENA_WRAM_SUB = 7,
+    OS_ARENA_WRAM_SUBPRIV = 8,
+    OS_ARENA_MAX = 9
+} OSArenaId;
+
+typedef struct {
+    void* lo[OS_ARENA_MAX];
+    void* hi[OS_ARENA_MAX];
+    u16 initialized;
+    u8 padding[2];
+} OSArenaInfo;
+
+#endif //NITRO_OS_ARENA_SHARED_H
diff --git a/lib/include/nitro/os/common/armArch.h b/lib/include/nitro/os/common/armArch.h
new file mode 100644
index 0000000000..c831af448a
--- /dev/null
+++ b/lib/include/nitro/os/common/armArch.h
@@ -0,0 +1,37 @@
+#ifndef NITRO_OS_COMMON_ARMARCH_H_
+#define NITRO_OS_COMMON_ARMARCH_H_
+
+#define HW_PSR_CPU_MODE_MASK       0x1f
+
+#define HW_PSR_USER_MODE           0x10
+#define HW_PSR_FIQ_MODE            0x11
+#define HW_PSR_IRQ_MODE            0x12
+#define HW_PSR_SVC_MODE            0x13
+#define HW_PSR_ABORT_MODE          0x17
+#define HW_PSR_UNDEF_MODE          0x1b
+#define HW_PSR_SYS_MODE            0x1f
+
+#define HW_PSR_ARM_STATE           0x0
+#define HW_PSR_THUMB_STATE         0x20
+
+#define HW_PSR_FIQ_DISABLE         0x40
+#define HW_PSR_IRQ_DISABLE         0x80
+#define HW_PSR_IRQ_FIQ_DISABLE     0xc0
+
+#define HW_PSR_Q_FLAG              0x08000000
+#define HW_PSR_V_FLAG              0x10000000
+#define HW_PSR_C_FLAG              0x20000000
+#define HW_PSR_Z_FLAG              0x40000000
+#define HW_PSR_N_FLAG              0x80000000
+
+#define HW_C7_ICACHE_INDEX_MASK    0x00000fe0
+#define HW_C7_DCACHE_INDEX_MASK    0x000003e0
+#define HW_C7_CACHE_SET_NO_MASK    0xc0000000
+
+#define HW_C7_CACHE_INDEX_SHIFT    5
+#define HW_C7_CACHE_SET_NO_SHIFT   30
+
+#define HW_CPU_CLOCK_ARM7           33513982
+#define HW_CPU_CLOCK_ARM9           67027964
+
+#endif //NITRO_OS_COMMON_ARMARCH_H_
diff --git a/lib/include/nitro/os/common/entropy.h b/lib/include/nitro/os/common/entropy.h
new file mode 100644
index 0000000000..47d81fe716
--- /dev/null
+++ b/lib/include/nitro/os/common/entropy.h
@@ -0,0 +1,7 @@
+#ifndef NITRO_OS_COMMON_ENTROPY_H_
+#define NITRO_OS_COMMON_ENTROPY_H_
+
+#define OS_LOW_ENTROPY_DATA_SIZE 32
+void OS_GetLowEntropyData(u32 buffer[OS_LOW_ENTROPY_DATA_SIZE / sizeof(u32)]);
+
+#endif //NITRO_OS_COMMON_ENTROPY_H_
diff --git a/lib/include/nitro/os/common/interrupt_shared.h b/lib/include/nitro/os/common/interrupt_shared.h
new file mode 100644
index 0000000000..c5b6093db7
--- /dev/null
+++ b/lib/include/nitro/os/common/interrupt_shared.h
@@ -0,0 +1,49 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include OS_interrupt.h from the specific proc's lib
+ */
+
+#ifndef NITRO_OS_INTERRUPT_SHARED_H
+#define NITRO_OS_INTERRUPT_SHARED_H
+
+#include <nitro/types.h>
+
+typedef u32 OSIrqMask;
+
+typedef void (*OSIrqFunction) (void);
+
+#define OS_IE_VBLANK        (1UL << REG_OS_IE_VB_SHIFT)
+#define OS_IE_HBLANK        (1UL << REG_OS_IE_HB_SHIFT)
+#define OS_IE_V_COUNT       (1UL << REG_OS_IE_VE_SHIFT)
+#define OS_IE_TIMER0        (1UL << REG_OS_IE_T0_SHIFT)
+#define OS_IE_TIMER1        (1UL << REG_OS_IE_T1_SHIFT)
+#define OS_IE_TIMER2        (1UL << REG_OS_IE_T2_SHIFT)
+#define OS_IE_TIMER3        (1UL << REG_OS_IE_T3_SHIFT)
+#define OS_IE_SIO           (1UL << 7                 )
+#define OS_IE_DMA0          (1UL << REG_OS_IE_D0_SHIFT)
+#define OS_IE_DMA1          (1UL << REG_OS_IE_D1_SHIFT)
+#define OS_IE_DMA2          (1UL << REG_OS_IE_D2_SHIFT)
+#define OS_IE_DMA3          (1UL << REG_OS_IE_D3_SHIFT)
+#define OS_IE_KEY           (1UL << REG_OS_IE_K_SHIFT)
+#define OS_IE_CARTRIDGE     (1UL << REG_OS_IE_I_D_SHIFT)
+#define OS_IE_SUBP          (1UL << REG_OS_IE_A7_SHIFT)
+#define OS_IE_SPFIFO_SEND   (1UL << REG_OS_IE_IFE_SHIFT)
+#define OS_IE_SPFIFO_RECV   (1UL << REG_OS_IE_IFN_SHIFT)
+#define OS_IE_CARD_DATA     (1UL << REG_OS_IE_MC_SHIFT)
+#define OS_IE_CARD_IREQ     (1UL << REG_OS_IE_MI_SHIFT)
+
+typedef struct
+{
+    void (*func) (void *);
+    u32 enable;
+    void* arg;
+} OSIrqCallbackInfo;
+
+#endif //NITRO_OS_INTERRUPT_SHARED_H
diff --git a/lib/include/nitro/os/common/message_shared.h b/lib/include/nitro/os/common/message_shared.h
new file mode 100644
index 0000000000..871679163b
--- /dev/null
+++ b/lib/include/nitro/os/common/message_shared.h
@@ -0,0 +1,34 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include OS_message.h from the specific proc's lib
+ */
+
+#ifndef NITRO_OS_MESSAGE_SHARED_H
+#define NITRO_OS_MESSAGE_SHARED_H
+
+#include <nitro/types.h>
+#include <nitro/os/common/thread_shared.h>
+
+typedef void *OSMessage;
+
+#define  OS_MESSAGE_NOBLOCK   0
+#define  OS_MESSAGE_BLOCK     1
+
+typedef struct OSMessageQueue
+{
+    OSThreadQueue queueSend;
+    OSThreadQueue queueReceive;
+    OSMessage *msgArray;
+    s32 msgCount;
+    s32 firstIndex;
+    s32 usedCount;
+} OSMessageQueue;
+
+#endif //NITRO_OS_MESSAGE_SHARED_H
diff --git a/lib/include/nitro/os/common/mutex_shared.h b/lib/include/nitro/os/common/mutex_shared.h
new file mode 100644
index 0000000000..3cbabefcbc
--- /dev/null
+++ b/lib/include/nitro/os/common/mutex_shared.h
@@ -0,0 +1,26 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include OS_mutex.h from the specific proc's lib
+ */
+
+#ifndef NITRO_OS_MUTEX_SHARED_H
+#define NITRO_OS_MUTEX_SHARED_H
+
+#include <nitro/os/common/thread_shared.h>
+#include <nitro/types.h>
+
+struct OSMutex {
+    OSThreadQueue queue;
+    OSThread *thread;
+    s32 count;
+    OSMutexLink link;
+};
+
+#endif //NITRO_OS_MUTEX_SHARED_H
diff --git a/lib/include/nitro/os/common/reset_shared.h b/lib/include/nitro/os/common/reset_shared.h
new file mode 100644
index 0000000000..414e51e40f
--- /dev/null
+++ b/lib/include/nitro/os/common/reset_shared.h
@@ -0,0 +1,23 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include OS_reset.h from the specific proc's lib
+ */
+
+#ifndef NITRO_OS_RESET_SHARED_H
+#define NITRO_OS_RESET_SHARED_H
+
+#define OS_PXI_COMMAND_MASK 0x7f00
+#define OS_PXI_COMMAND_SHIFT 8
+#define OS_PXI_COMMAND_RESET 0x10
+
+#define OS_PXI_DATA_MASK    0xFF
+#define OS_PXI_DATA_SHIFT      0
+
+#endif //NITRO_OS_RESET_SHARED_H
diff --git a/lib/include/nitro/os/common/spinLock_shared.h b/lib/include/nitro/os/common/spinLock_shared.h
new file mode 100644
index 0000000000..3f8d76630c
--- /dev/null
+++ b/lib/include/nitro/os/common/spinLock_shared.h
@@ -0,0 +1,24 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include OS_spinLock.h from the specific proc's lib
+ */
+
+#ifndef NITRO_OS_SPINLOCK_SHARED_H_
+#define NITRO_OS_SPINLOCK_SHARED_H_
+
+#include <nitro/types.h>
+
+typedef volatile struct OSLockWord {
+    u32 lockFlag;
+    u16 ownerID;
+    u16 extension;
+} OSLockWord;
+
+#endif //NITRO_OS_SPINLOCK_SHARED_H_
diff --git a/lib/include/nitro/os/common/systemWork_shared.h b/lib/include/nitro/os/common/systemWork_shared.h
new file mode 100644
index 0000000000..8ab3f57f6b
--- /dev/null
+++ b/lib/include/nitro/os/common/systemWork_shared.h
@@ -0,0 +1,65 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include consts.h from the specific proc's lib
+ */
+
+#ifndef NITRO_OS_SYSTEMWORK_SHARED_H_
+#define NITRO_OS_SYSTEMWORK_SHARED_H_
+
+#include <nitro/hw/mmap_shared.h>
+#include <nitro/os/common/thread_shared.h>
+#include <nitro/os/common/spinLock_shared.h>
+
+typedef struct {
+    u8      bootCheckInfo[0x20];       // 000-01f:   32byte boot check info
+    u32     resetParameter;            // 020-023:    4byte reset parameter
+    u8      padding5[0x8];             // 024-02c:  (8byte)
+    u32     romBaseOffset;             // 02c-02f:    4byte ROM offset of own program
+    u8      cartridgeModuleInfo[12];   // 030-03b:   12byte cartridge module info
+    u32     vblankCount;               // 03c-03f:    4byte V-Blank Count
+    u8      wmBootBuf[0x40];           // 040-07f:   64byte WM multiboot buffer
+    u8      nvramUserInfo[0x100];      // 080-17f: 256bytes NVRAM user info
+    u8      isd_reserved1[0x20];       // 180-19f:  32bytes ISDebugger reserved
+    u8      arenaInfo[0x48];           // 1a0-1e7:  72byte Arena information
+    u8      real_time_clock[8];        // 1e8-1ef:   8bytes RTC
+    u32     dmaClearBuf[4];            // 1f0-1ff:  16bytes DMA clear information buffer (for ARM9-TEG)
+    u8      rom_header[0x160];         // 200-35f: 352bytes ROM registration area info storage buffer
+    u8      isd_reserved2[32];         // 360-37f:  32bytes ISDebugger reserved
+    u32     pxiSignalParam[2];         // 380-387:   8bytes Param for PXI Signal
+    u32     pxiHandleChecker[2];       // 388-38f:   8bytes Flag  for PXI Command Handler Installed
+    u32     mic_last_address;          // 390-393:   4bytes MIC latest sampling result storage address
+    u16     mic_sampling_data;         // 394-395:   2bytes MIC sampling result
+    u16     wm_callback_control;       // 396-397:   2bytes Parameter for WM callback synchronization
+    u16     wm_rssi_pool;              // 398-399:   2bytes Random number source depends on WM received signal intensity
+    u8      padding3[2];               // 39a-39b: (2bytes)
+    u32     component_param;           // 39c-39f:   4bytes Parameter for Component synchronization
+    OSThreadInfo *threadinfo_mainp;    // 3a0-3a3:   4bytes Verify that the pointer to ARM9 thread information is initial value 0
+    OSThreadInfo *threadinfo_subp;     // 3a4-3a7:   4bytes Verify that the pointer to ARM7 thread information is initial value 0
+    u16     button_XY;                 // 3a8-3a9:   2bytes XY button information storage location
+    u8      touch_panel[4];            // 3aa-3ad:   4bytes Touch Screen information storage location
+    u16     autoloadSync;              // 3ae-3af:   2bytes autoload sync between processors
+    u32     lockIDFlag_mainp[2];       // 3b0-3b7:   8bytes lockID management flag (ARM9)
+    u32     lockIDFlag_subp[2];        // 3b8-3bf:   8bytes lockID management flag (ARM7)
+    struct OSLockWord lock_VRAM_C;     // 3c0-3c7:   8bytes           C - lock buffer
+    struct OSLockWord lock_VRAM_D;     // 3c8-3cf:   8bytes VRAM-D - lock buffer
+    struct OSLockWord lock_WRAM_BLOCK0; // 3d0-3d7:   8bytes   Block0 - lock buffer
+    struct OSLockWord lock_WRAM_BLOCK1; // 3d8-3df:   8bytes CPU internal work RAM - Block1 - lock buffer
+    struct OSLockWord lock_CARD;       // 3e0-3e7:   8bytes Game Card - lock buffer
+    struct OSLockWord lock_CARTRIDGE;  // 3e8-3ef:   8bytes DS Pak - lock buffer
+    struct OSLockWord lock_INIT;       // 3f0-3f7:   8bytes Initialization lock buffer
+    u16     mmem_checker_mainp;        // 3f8-3f9:   2bytes MainMomory Size Checker for System processor
+    u16     mmem_checker_subp;         // 3fa-3fb:   2bytes MainMomory Size Checker for Sub processor
+    u8      padding4[2];               // 3fc-3fd: (2bytes)
+    u16     command_area;              // 3fe-3ff:   2bytes Command Area
+} OSSystemWork; //0x027FFC00
+
+#define OS_GetSystemWork()      ((OSSystemWork *)HW_MAIN_MEM_SYSTEM)
+
+#endif //NITRO_OS_SYSTEMWORK_SHARED_H_
diff --git a/lib/include/nitro/os/common/system_shared.h b/lib/include/nitro/os/common/system_shared.h
new file mode 100644
index 0000000000..2352a3b908
--- /dev/null
+++ b/lib/include/nitro/os/common/system_shared.h
@@ -0,0 +1,39 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include OS_system.h from the specific proc's lib
+ */
+
+#ifndef NITRO_OS_SYSTEM_SHARED_H_
+#define NITRO_OS_SYSTEM_SHARED_H_
+
+#include <nitro/hw/consts_shared.h>
+
+typedef enum {
+    OS_PROCMODE_USER=16,
+    OS_PROCMODE_FIQ=17,
+    OS_PROCMODE_IRQ=18,
+    OS_PROCMODE_SVC=19,
+    OS_PROCMODE_ABORT=23,
+    OS_PROCMODE_UNDEF=27,
+    OS_PROCMODE_SYS=31
+} OSProcMode;
+
+typedef enum {
+    OS_INTRMODE_DISABLE_IRQ = HW_PSR_DISABLE_IRQ,
+    OS_INTRMODE_DISABLE_FIQ = HW_PSR_DISABLE_FIQ,
+    OS_INTRMODE_ENABLE = 0
+} OSIntrMode;
+
+typedef enum {
+    OS_INTRMODE_IRQ_DISABLE = HW_PSR_DISABLE_IRQ,
+    OS_INTRMODE_IRQ_ENABLE = 0
+} OSIntrMode_Irq;
+
+#endif //NITRO_OS_SYSTEM_SHARED_H_
diff --git a/lib/include/nitro/os/common/thread_shared.h b/lib/include/nitro/os/common/thread_shared.h
new file mode 100644
index 0000000000..c6f39766d1
--- /dev/null
+++ b/lib/include/nitro/os/common/thread_shared.h
@@ -0,0 +1,126 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include OS_thread.h from the specific proc's lib
+ */
+
+#ifndef NITRO_OS_THREAD_SHARED_H_
+#define NITRO_OS_THREAD_SHARED_H_
+
+typedef struct OSiAlarm OSAlarm;
+
+typedef struct _OSThread OSThread;
+
+typedef struct _OSThreadQueue OSThreadQueue;
+typedef struct _OSThreadLink OSThreadLink;
+typedef struct _OSMutexQueue OSMutexQueue;
+typedef struct _OSMutexLink OSMutexLink;
+typedef struct OSMutex OSMutex;
+
+struct _OSThreadQueue
+{
+    OSThread *head;
+    OSThread *tail;
+};
+
+struct _OSThreadLink
+{
+    OSThread *prev;
+    OSThread *next;
+};
+
+struct _OSMutexQueue
+{
+    OSMutex *head;
+    OSMutex *tail;
+};
+
+struct _OSMutexLink
+{
+    OSMutex *next;
+    OSMutex *prev;
+};
+
+typedef struct OSThreadInfo {
+    u16 isNeedRescheduling;
+    u16 irqDepth;
+    OSThread* current;
+    OSThread* list;
+    void* switchCallback; // type: OSSwitchThreadCallback
+} OSThreadInfo;
+
+typedef enum {
+    OS_THREAD_STATE_WAITING = 0,
+    OS_THREAD_STATE_READY = 1,
+    OS_THREAD_STATE_TERMINATED = 2
+} OSThreadState;
+
+typedef void (*OSSwitchThreadCallback) (OSThread *from, OSThread *to);
+
+typedef void (*OSThreadDestructor) (void *);
+
+struct _OSThread
+{
+    OSContext context;
+    OSThreadState state;
+    OSThread *next;
+    u32 id;
+    u32 priority;
+    void *profiler;
+
+    OSThreadQueue *queue;
+    OSThreadLink link;
+
+    OSMutex *mutex;
+    OSMutexQueue mutexQueue;
+
+    u32 stackTop;
+    u32 stackBottom;
+    u32 stackWarningOffset;
+
+    OSThreadQueue joinQueue;
+
+    void *specific[3];
+    OSAlarm *alarmForSleep;
+    OSThreadDestructor destructor;
+    void *userParameter;
+
+    u32 systemErrno;
+};
+
+extern OSThreadInfo OSi_ThreadInfo;
+
+static inline OSThreadInfo *OS_GetThreadInfo(void)
+{
+    return &OSi_ThreadInfo;
+}
+
+static inline BOOL OS_IsThreadRunnable(const OSThread *thread)
+{
+    return thread->state == OS_THREAD_STATE_READY;
+}
+
+static inline void OS_InitThreadQueue(OSThreadQueue * queue)
+{
+    queue->head = queue->tail = NULL;
+}
+
+static inline OSThread *OS_GetCurrentThread(void)
+{
+    return OS_GetThreadInfo()->current;
+}
+
+static inline void OS_SetCurrentThread(OSThread *thread)
+{
+    OS_GetThreadInfo()->current = thread;
+}
+
+#define OSi_GetCurrentThread()          (*OSi_CurrentThreadPtr)
+
+#endif //NITRO_OS_THREAD_SHARED_H_
diff --git a/lib/include/nitro/os/common/tick_shared.h b/lib/include/nitro/os/common/tick_shared.h
new file mode 100644
index 0000000000..8135c72867
--- /dev/null
+++ b/lib/include/nitro/os/common/tick_shared.h
@@ -0,0 +1,24 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include OS_tick.h from the specific proc's lib
+ */
+
+#ifndef NITRO_OS_TICK_SHARED_H
+#define NITRO_OS_TICK_SHARED_H
+
+#include <nitro/types.h>
+
+typedef u64 OSTick;
+
+#define OS_SYSTEM_CLOCK HW_SYSTEM_CLOCK
+
+#define OS_MilliSecondsToTicks(msec) ((OSTick)(((OS_SYSTEM_CLOCK/1000) * (u64)(msec)) / 64))
+
+#endif //NITRO_OS_TICK_SHARED_H
diff --git a/lib/include/nitro/os/common/timer_shared.h b/lib/include/nitro/os/common/timer_shared.h
new file mode 100644
index 0000000000..48d5485fec
--- /dev/null
+++ b/lib/include/nitro/os/common/timer_shared.h
@@ -0,0 +1,32 @@
+#ifndef NITRO_OS_TIMER_SHARED_H
+#define NITRO_OS_TIMER_SHARED_H
+
+#include <nitro/hw/consts_shared.h>
+
+typedef enum
+{
+    OS_TIMER_PRESCALER_1 = (0UL << REG_OS_TM0CNT_H_PS_SHIFT),
+    OS_TIMER_PRESCALER_64 = (1UL << REG_OS_TM0CNT_H_PS_SHIFT),
+    OS_TIMER_PRESCALER_256 = (2UL << REG_OS_TM0CNT_H_PS_SHIFT),
+    OS_TIMER_PRESCALER_1024 = (3UL << REG_OS_TM0CNT_H_PS_SHIFT)
+} OSTimerPrescaler;
+
+typedef enum
+{
+    OS_TIMER_0 = 0,
+    OS_TIMER_1 = 1,
+    OS_TIMER_2 = 2,
+    OS_TIMER_3 = 3
+} OSTimer;
+
+static inline void OS_SetTimerCount(OSTimer id, u16 count)
+{
+    *((REGType16 *)((u32)&reg_OS_TM0CNT_L + id * 4)) = count;
+}
+
+static inline void OS_SetTimerControl(OSTimer id, u16 control)
+{
+    *((REGType16 *)((u32)&reg_OS_TM0CNT_H + id * 4)) = control;
+}
+
+#endif //NITRO_OS_TIMER_SHARED_H
diff --git a/lib/include/nitro/os/context.h b/lib/include/nitro/os/context.h
new file mode 100644
index 0000000000..d9e7902408
--- /dev/null
+++ b/lib/include/nitro/os/context.h
@@ -0,0 +1,67 @@
+#ifndef NITRO_OS_CONTEXT_H_
+#define NITRO_OS_CONTEXT_H_
+
+#include <nitro/os/system.h>
+
+#ifdef SDK_ARM9
+#include <nitro/cp/context.h>
+#endif
+
+#define SDK_CONTEXT_HAS_SP_SVC
+
+// All the context functions are plain ASM,
+// so these offsets are defined for readibility.
+#define OS_CONTEXT_CPSR      0
+#define OS_CONTEXT_R0        4
+#define OS_CONTEXT_R1        8
+#define OS_CONTEXT_R2       12
+#define OS_CONTEXT_R3       16
+#define OS_CONTEXT_R4       20
+#define OS_CONTEXT_R5       24
+#define OS_CONTEXT_R6       28
+#define OS_CONTEXT_R7       32
+#define OS_CONTEXT_R8       36
+#define OS_CONTEXT_R9       40
+#define OS_CONTEXT_R10      44
+#define OS_CONTEXT_R11      48
+#define OS_CONTEXT_R12      52
+#define OS_CONTEXT_R13      56
+#define OS_CONTEXT_R14      60
+#define OS_CONTEXT_PC_PLUS4 64
+
+#define OS_CONTEXT_SP       OS_CONTEXT_R13
+#define OS_CONTEXT_LR       OS_CONTEXT_R14
+
+#ifdef  SDK_CONTEXT_HAS_SP_SVC
+#define OS_CONTEXT_R13_SVC  68
+#define OS_CONTEXT_SP_SVC   OS_CONTEXT_R13_SVC
+#endif
+
+#ifdef SDK_ARM9
+#ifdef SDK_CONTEXT_HAS_SP_SVC
+#define OS_CONTEXT_CP_CONTEXT 72
+#else
+#define OS_CONTEXT_CP_CONTEXT 68
+#endif
+#endif
+
+typedef struct OSContext
+{
+    u32 cpsr;
+    u32 r[13];
+    u32 sp;
+    u32 lr;
+    u32 pc_plus4;
+#ifdef SDK_CONTEXT_HAS_SP_SVC
+    u32 sp_svc;
+#endif
+#ifdef SDK_ARM9
+    CPContext cp_context;
+#endif
+} OSContext;
+
+void OS_InitContext(register OSContext *context, register u32 newpc, register u32 newsp);
+BOOL OS_SaveContext(register OSContext *context);
+void OS_LoadContext(register OSContext *context);
+
+#endif //NITRO_OS_CONTEXT_H_
diff --git a/lib/include/nitro/os/emulator.h b/lib/include/nitro/os/emulator.h
new file mode 100644
index 0000000000..81834b1b01
--- /dev/null
+++ b/lib/include/nitro/os/emulator.h
@@ -0,0 +1,6 @@
+#ifndef NITRO_OS_EMULATOR_H_
+#define NITRO_OS_EMULATOR_H_
+
+u32 OS_GetConsoleType(void);
+
+#endif //NITRO_OS_EMULATOR_H_
diff --git a/lib/include/nitro/os/exception.h b/lib/include/nitro/os/exception.h
new file mode 100644
index 0000000000..a211e3c826
--- /dev/null
+++ b/lib/include/nitro/os/exception.h
@@ -0,0 +1,8 @@
+#ifndef NITRO_OS_EXCEPTION_H_
+#define NITRO_OS_EXCEPTION_H_
+
+typedef void (*OSExceptionHandler) (u32, void *);
+
+void OS_InitException(void);
+
+#endif //NITRO_OS_EXCEPTION_H_
diff --git a/lib/include/nitro/os/init.h b/lib/include/nitro/os/init.h
new file mode 100644
index 0000000000..3447489e02
--- /dev/null
+++ b/lib/include/nitro/os/init.h
@@ -0,0 +1,22 @@
+#ifndef NITRO_SUB_OS_INIT_H
+#define NITRO_SUB_OS_INIT_H
+
+#include <nitro/types.h>
+#include <nitro/hw/consts.h>
+#include <nitro/os/system.h>
+#include <nitro/os/arena.h>
+#include <nitro/os/alloc.h>
+#include <nitro/os/reset.h>
+#include <nitro/os/terminate_proc.h>
+#include <nitro/os/spinLock.h>
+#include <nitro/os/context.h>
+#include <nitro/os/interrupt.h>
+#include <nitro/os/irqTable.h>
+#include <nitro/os/timer.h>
+#include <nitro/os/tick.h>
+#include <nitro/os/message.h>
+
+void OS_Init(void);
+void OS_InitArenaEx(void);
+
+#endif //NITRO_SUB_OS_INIT_H
diff --git a/lib/include/nitro/os/interrupt.h b/lib/include/nitro/os/interrupt.h
new file mode 100644
index 0000000000..7d45480ff5
--- /dev/null
+++ b/lib/include/nitro/os/interrupt.h
@@ -0,0 +1,86 @@
+#ifndef NITRO_SUB_OS_INTERRUPT_H
+#define NITRO_SUB_OS_INTERRUPT_H
+
+#include <nitro/os/common/interrupt_shared.h>
+#include <nitro/hw/consts.h>
+
+#define OS_IME_DISABLE      (0UL << REG_OS_IME_IME_SHIFT)
+#define OS_IME_ENABLE       (1UL << REG_OS_IME_IME_SHIFT)
+
+#ifdef SDK_ARM7
+#include <nitro/os/ARM7/interrupt.h>
+#define OS_IRQ_TABLE_MAX 25
+#else // SDK_ARM9
+//#include <nitro/os/ARM9/interrupt.h>
+#define OS_IRQ_TABLE_MAX 22
+#endif //SDK_ARM7 SDK_ARM9
+
+#define OSi_IRQCALLBACK_NO_DMA0         0
+#define OSi_IRQCALLBACK_NO_DMA1         1
+#define OSi_IRQCALLBACK_NO_DMA2         2
+#define OSi_IRQCALLBACK_NO_DMA3         3
+#define OSi_IRQCALLBACK_NO_TIMER0       4
+#define OSi_IRQCALLBACK_NO_TIMER1       5
+#define OSi_IRQCALLBACK_NO_TIMER2       6
+#define OSi_IRQCALLBACK_NO_TIMER3       7
+#ifdef SDK_ARM7
+#define OSi_IRQCALLBACK_NO_VBLANK  8
+#endif //SDK_ARM7
+#ifdef SDK_ARM9
+#define OSi_IRQCALLBACK_NUM       (7+1)
+#else // SDK_ARM7
+#define OSi_IRQCALLBACK_NUM       (8+1)
+#endif // SDK_ARM9 SDK_ARM7
+
+extern OSIrqFunction OS_IRQTable[];
+extern OSIrqCallbackInfo OSi_IrqCallbackInfo[OSi_IRQCALLBACK_NUM];
+
+static inline void OS_ClearIrqCheckFlag(OSIrqMask intr) {
+    *(vu32 *)HW_INTR_CHECK_BUF &= (u32)~intr;
+}
+
+static inline u32 OS_GetIrqCheckFlag(void) {
+    return *(vu32 *)HW_INTR_CHECK_BUF;
+}
+
+static inline void OS_SetIrqCheckFlag(OSIrqMask intr) {
+    *(vu32 *)HW_INTR_CHECK_BUF |= (u32)intr;
+}
+
+static inline BOOL OS_EnableIrq(void) {
+    u16 prep = reg_OS_IME;
+    reg_OS_IME = OS_IME_ENABLE;
+    return (BOOL)prep;
+}
+
+#ifdef SDK_ARM9
+static inline BOOL OS_DisableIrq(void) {
+    BOOL ime = reg_OS_IME;
+    reg_OS_IME = OS_IME_DISABLE;
+    return ime;
+}
+#else
+BOOL OS_DisableIrq(void);
+#endif
+
+static inline BOOL OS_RestoreIrq(BOOL enable) {
+    BOOL ime = reg_OS_IME;
+    reg_OS_IME = enable;
+    return ime;
+}
+
+static inline OSIrqMask OS_GetIrqMask(void) {
+    return reg_OS_IE;
+}
+
+void OS_InitIrqTable(void);
+void OS_SetIrqFunction(OSIrqMask intrBit, OSIrqFunction function);
+void OSi_EnterTimerCallback(u32 timerNo, void (*callback) (void *), void *arg);
+OSIrqMask OS_SetIrqMask(OSIrqMask mask);
+OSIrqMask OS_EnableIrqMask(OSIrqMask mask);
+OSIrqMask OS_DisableIrqMask(OSIrqMask mask);
+OSIrqMask OS_ResetRequestIrqMask(OSIrqMask mask);
+void OS_SetIrqStackChecker(void);
+void OS_WaitIrq(BOOL clear, OSIrqMask irqFlags);
+
+#endif //NITRO_SUB_OS_INTERRUPT_H
diff --git a/lib/include/nitro/os/irqTable.h b/lib/include/nitro/os/irqTable.h
new file mode 100644
index 0000000000..0a7bff89e0
--- /dev/null
+++ b/lib/include/nitro/os/irqTable.h
@@ -0,0 +1,19 @@
+#ifndef NITRO_OS_IRQTABLE_H
+#define NITRO_OS_IRQTABLE_H
+
+#include <nitro/hw/mmap.h>
+#include <nitro/os/interrupt.h>
+
+void OS_IrqDummy(void);
+void OSi_IrqCallback(s32 index);
+void OSi_IrqDma0(void);
+void OSi_IrqDma1(void);
+void OSi_IrqDma2(void);
+void OSi_IrqDma3(void);
+void OSi_IrqTimer0(void);
+void OSi_IrqTimer1(void);
+void OSi_IrqTimer2(void);
+void OSi_IrqTimer3(void);
+void OSi_IrqVBlank(void);
+
+#endif //NITRO_OS_IRQTABLE_H
diff --git a/lib/include/nitro/os/message.h b/lib/include/nitro/os/message.h
new file mode 100644
index 0000000000..67b7e3deac
--- /dev/null
+++ b/lib/include/nitro/os/message.h
@@ -0,0 +1,14 @@
+#ifndef NITRO_OS_MESSAGE_H
+#define NITRO_OS_MESSAGE_H
+
+#include <nitro/os/thread.h>
+#include <nitro/os/context.h>
+#include <nitro/types.h>
+#include <nitro/os/common/message_shared.h>
+
+void OS_InitMessageQueue(OSMessageQueue *mq, OSMessage *msgArray, s32 msgCount);
+BOOL OS_SendMessage(OSMessageQueue *mq, OSMessage msg, s32 flags);
+BOOL OS_ReceiveMessage(OSMessageQueue *mq, OSMessage *msg, s32 flags);
+BOOL OS_ReadMessage(OSMessageQueue *mq, OSMessage *msg, s32 flags);
+
+#endif //NITRO_OS_MESSAGE_H
diff --git a/lib/include/nitro/os/mutex.h b/lib/include/nitro/os/mutex.h
new file mode 100644
index 0000000000..68a6b8469b
--- /dev/null
+++ b/lib/include/nitro/os/mutex.h
@@ -0,0 +1,14 @@
+#ifndef NITRO_OS_MUTEX_H
+#define NITRO_OS_MUTEX_H
+
+#include <nitro/os/context.h>
+#include <nitro/os/common/mutex_shared.h>
+
+void OSi_DequeueItem(OSThread * thread, OSMutex * mutex);
+void OSi_EnqueueTail(OSThread * thread, OSMutex * mutex);
+void OS_InitMutex(OSMutex* mutex);
+void OS_LockMutex(OSMutex* mutex);
+void OS_UnlockMutex(OSMutex* mutex);
+void OSi_UnlockAllMutex(OSThread * thread);
+
+#endif //NITRO_OS_MUTEX_H
diff --git a/lib/include/nitro/os/ownerInfo.h b/lib/include/nitro/os/ownerInfo.h
new file mode 100644
index 0000000000..44a0040767
--- /dev/null
+++ b/lib/include/nitro/os/ownerInfo.h
@@ -0,0 +1,23 @@
+#ifndef NITRO_OS_OWNERINFO_H_
+#define NITRO_OS_OWNERINFO_H_
+
+typedef struct OSBirthday {
+    u8 month;
+    u8 day;
+} OSBirthday;
+
+typedef struct OSOwnerInfo {
+    u8 language;
+    u8 favoriteColor;
+    OSBirthday birthday;
+    u16 nickName[11];
+    u16 nickNameLength;
+    u16 comment[27];
+    u16 commentLength;
+} OSOwnerInfo;
+
+void OS_GetMacAddress(u8 *macAddr);
+void OS_GetOwnerInfo(OSOwnerInfo *info);
+s64 OS_GetOwnerRtcOffset(void);
+
+#endif //NITRO_OS_OWNERINFO_H_
diff --git a/lib/include/nitro/os/printf.h b/lib/include/nitro/os/printf.h
new file mode 100644
index 0000000000..49bc43f94f
--- /dev/null
+++ b/lib/include/nitro/os/printf.h
@@ -0,0 +1,17 @@
+#ifndef NITRO_OS_PRINTF_H_
+#define NITRO_OS_PRINTF_H_
+
+#include <stdarg.h>
+#include <nitro/std/string.h>
+
+int OS_SPrintf(char * dest, const char * format, ...);
+int OS_SNPrintf(char * dest, u32 len, const char * format, ...);
+int OS_VSPrintf(char * dest, const char * format, va_list va);
+int OS_VSNPrintf(char * dest, u32 len, const char * format, va_list va);
+
+void OS_Terminate();
+
+#define OS_Panic(...) OS_Terminate()
+#define OS_Printf(...)
+
+#endif //NITRO_OS_PRINTF_H_
diff --git a/lib/include/nitro/os/protectionRegion.h b/lib/include/nitro/os/protectionRegion.h
new file mode 100644
index 0000000000..b268fa2d5c
--- /dev/null
+++ b/lib/include/nitro/os/protectionRegion.h
@@ -0,0 +1,60 @@
+#ifndef NITRO_OS_PROTECTIONREGION_H_
+#define NITRO_OS_PROTECTIONREGION_H_
+
+typedef enum
+{
+    OSi_PR_BASE_MASK_4KB = 0xfffff000,
+    OSi_PR_BASE_MASK_8KB = 0xffffe000,
+    OSi_PR_BASE_MASK_16KB = 0xffffc000,
+    OSi_PR_BASE_MASK_32KB = 0xffff8000,
+    OSi_PR_BASE_MASK_64KB = 0xffff0000,
+    OSi_PR_BASE_MASK_128KB = 0xfffe0000,
+    OSi_PR_BASE_MASK_256KB = 0xfffc0000,
+    OSi_PR_BASE_MASK_512KB = 0xfff80000,
+    OSi_PR_BASE_MASK_1MB = 0xfff00000,
+    OSi_PR_BASE_MASK_2MB = 0xffe00000,
+    OSi_PR_BASE_MASK_4MB = 0xffc00000,
+    OSi_PR_BASE_MASK_8MB = 0xff800000,
+    OSi_PR_BASE_MASK_16MB = 0xff000000,
+    OSi_PR_BASE_MASK_32MB = 0xfe000000,
+    OSi_PR_BASE_MASK_64MB = 0xfc000000,
+    OSi_PR_BASE_MASK_128MB = 0xf8000000,
+    OSi_PR_BASE_MASK_256MB = 0xf0000000,
+    OSi_PR_BASE_MASK_512MB = 0xe0000000,
+    OSi_PR_BASE_MASK_1GB = 0xc0000000,
+    OSi_PR_BASE_MASK_2GB = 0x80000000,
+    OSi_PR_BASE_MASK_4GB = 0x00000000
+}
+OSiProtectionRegionBaseMask;
+
+static inline u32 OSi_CalcPRParam(u32 address, u32 size, OSiProtectionRegionBaseMask mask)
+{
+    return ((address & mask) | size);
+}
+
+void OS_SetProtectionRegion0(u32 param);
+void OS_SetProtectionRegion1(u32 param);
+void OS_SetProtectionRegion2(u32 param);
+void OS_SetProtectionRegion3(u32 param);
+void OS_SetProtectionRegion4(u32 param);
+void OS_SetProtectionRegion5(u32 param);
+void OS_SetProtectionRegion6(u32 param);
+void OS_SetProtectionRegion7(u32 param);
+
+#define OS_SetProtectionRegionParam( regionNo, param )   OSi_SetPR##regionNo##_param( param )
+
+#define OSi_SetPR0_param( param )  OS_SetProtectionRegion0( param )
+#define OSi_SetPR1_param( param )  OS_SetProtectionRegion1( param )
+#define OSi_SetPR2_param( param )  OS_SetProtectionRegion2( param )
+#define OSi_SetPR3_param( param )  OS_SetProtectionRegion3( param )
+#define OSi_SetPR4_param( param )  OS_SetProtectionRegion4( param )
+#define OSi_SetPR5_param( param )  OS_SetProtectionRegion5( param )
+#define OSi_SetPR6_param( param )  OS_SetProtectionRegion6( param )
+#define OSi_SetPR7_param( param )  OS_SetProtectionRegion7( param )
+
+
+#define OS_SetProtectionRegion( regionNo, address, sizeStr )  \
+  OSi_SetPR##regionNo##_param( OSi_CalcPRParam( address, HW_C6_PR_##sizeStr, OSi_PR_BASE_MASK_##sizeStr ) \
+                              | HW_C6_PR_ENABLE )
+
+#endif //NITRO_OS_PROTECTIONREGION_H_
diff --git a/lib/include/nitro/os/protectionUnit.h b/lib/include/nitro/os/protectionUnit.h
new file mode 100644
index 0000000000..eef7af8bb9
--- /dev/null
+++ b/lib/include/nitro/os/protectionUnit.h
@@ -0,0 +1,7 @@
+#ifndef NITRO_OS_PROTECTIONUNIT_H_
+#define NITRO_OS_PROTECTIONUNIT_H_
+
+void OS_DisableProtectionUnit(void);
+void OS_EnableProtectionUnit(void);
+
+#endif //NITRO_OS_PROTECTIONUNIT_H_
diff --git a/lib/include/nitro/os/reset.h b/lib/include/nitro/os/reset.h
new file mode 100644
index 0000000000..a6db1d91d8
--- /dev/null
+++ b/lib/include/nitro/os/reset.h
@@ -0,0 +1,23 @@
+#ifndef NITRO_OS_RESET_H
+#define NITRO_OS_RESET_H
+
+#include <nitro/types.h>
+#include <nitro/os/common/reset_shared.h>
+#include <nitro/pxi/fifo.h>
+
+void OS_InitReset(void);
+BOOL OS_IsResetOccurred(void);
+void OSi_CommonCallback(PXIFifoTag tag, u32 data, BOOL err);
+void OSi_SendToPxi(u16 data);
+
+#ifdef SDK_ARM9
+void OS_ResetSystem(u32 parameter);
+
+static inline u32 OS_GetResetParameter(void) {
+    return *(u32 *)HW_RESET_PARAMETER_BUF;
+}
+#else
+void OS_ResetSystem(void);
+#endif
+
+#endif //NITRO_OS_RESET_H
diff --git a/lib/include/nitro/os/spinLock.h b/lib/include/nitro/os/spinLock.h
new file mode 100644
index 0000000000..965fe39eb9
--- /dev/null
+++ b/lib/include/nitro/os/spinLock.h
@@ -0,0 +1,32 @@
+#ifndef NITRO_OS_SPINLOCK_H
+#define NITRO_OS_SPINLOCK_H
+
+#include <nitro/hw/consts.h>
+#include <nitro/os/common/spinLock_shared.h>
+
+#define OS_MAINP_SYSTEM_LOCK_ID 0x7F
+#define OS_SUBP_SYSTEM_LOCK_ID  0xBF
+
+#define OS_MAINP_LOCK_ID_START  0x40
+#define OS_SUBP_LOCK_ID_START   0x80
+
+#define OS_LOCK_ID_ERROR (-3)
+
+void OS_InitLock(void);
+void FUN_037F8CB4(s32 ct);
+s32 OSi_DoLockByWord(u16 lockId, OSLockWord *lockp, void (*ctrlFuncp) (void), BOOL disableFiq);
+s32 OSi_DoUnlockByWord(u16 lockID, OSLockWord *lockp, void (*ctrlFuncp) (void), BOOL disableFIQ);
+s32 OSi_DoTryLockByWord(u16 lockID, OSLockWord *lockp, void (*ctrlFuncp) (void), BOOL disableFiq);
+s32 OS_LockCartridge(u16 lockID);
+s32 OS_UnlockCartridge(u16 lockID);
+s32 OS_TryLockCartridge(u16 lockID);
+void OSi_AllocateCartridgeBus(void);
+void OSi_FreeCartridgeBus(void);
+u16 OS_ReadOwnerOfLockWord(OSLockWord * lock);
+s32 OS_UnLockCartridge(u16 lockID);
+s32 OS_GetLockID(void);
+void OS_ReleaseLockID(register u16 lockID);
+s32 OS_LockByWord(u16 lockID, OSLockWord *lockp, void (*ctrlFuncp) (void));
+s32 OS_UnlockByWord(u16 lockID, OSLockWord *lockp, void (*ctrlFuncp) (void));
+
+#endif //NITRO_OS_SPINLOCK_H
diff --git a/lib/include/nitro/os/system.h b/lib/include/nitro/os/system.h
new file mode 100644
index 0000000000..5ebeda92eb
--- /dev/null
+++ b/lib/include/nitro/os/system.h
@@ -0,0 +1,25 @@
+#ifndef NITRO_OS_SYSTEM_H_
+#define NITRO_OS_SYSTEM_H_
+
+#include <nitro/types.h>
+#include <nitro/hw/io_reg.h>
+#include <nitro/os/common/system_shared.h>
+#include <nitro/os/common/armArch.h>
+
+#ifdef SDK_ARM9
+#include <nitro/os/ARM9/system.h>
+#else
+#include <nitro/os/ARM7/system.h>
+#endif //SDK_ARM9
+
+OSIntrMode OS_EnableInterrupts(void);
+OSIntrMode OS_DisableInterrupts(void);
+OSIntrMode OS_RestoreInterrupts(OSIntrMode state);
+OSIntrMode OS_DisableInterrupts_IrqAndFiq(void);
+OSIntrMode OS_RestoreInterrupts_IrqAndFiq(OSIntrMode state);
+OSIntrMode_Irq OS_GetCpsrIrq(void);
+OSProcMode OS_GetProcMode(void);
+void OS_SpinWait(u32 cycles);
+void OS_WaitVBlankIntr(void);
+
+#endif //NITRO_OS_SYSTEM_H_
diff --git a/lib/include/nitro/os/systemCall.h b/lib/include/nitro/os/systemCall.h
new file mode 100644
index 0000000000..3920984be3
--- /dev/null
+++ b/lib/include/nitro/os/systemCall.h
@@ -0,0 +1,7 @@
+#ifndef NITRO_OS_SYSTEMCALL_H_
+#define NITRO_OS_SYSTEMCALL_H_
+
+void SVC_Halt(void);
+void SVC_WaitByLoop(s32 count);
+
+#endif //NITRO_OS_SYSTEMCALL_H_
diff --git a/lib/include/nitro/os/systemWork.h b/lib/include/nitro/os/systemWork.h
new file mode 100644
index 0000000000..7d40d25749
--- /dev/null
+++ b/lib/include/nitro/os/systemWork.h
@@ -0,0 +1,7 @@
+#ifndef NITRO_OS_SYSTEMWORK_H_
+#define NITRO_OS_SYSTEMWORK_H_
+
+#include <nitro/os/context.h>
+#include <nitro/os/common/systemWork_shared.h>
+
+#endif //NITRO_OS_SYSTEMWORK_H_
diff --git a/lib/include/nitro/os/tcm.h b/lib/include/nitro/os/tcm.h
new file mode 100644
index 0000000000..be3c91b658
--- /dev/null
+++ b/lib/include/nitro/os/tcm.h
@@ -0,0 +1,12 @@
+//
+// Created by red031000 on 2020-05-05.
+//
+
+#ifndef NITRO_OS_TCM_H
+#define NITRO_OS_TCM_H
+
+#include <nitro/hw/consts.h>
+
+u32 OS_GetDTCMAddress(void);
+
+#endif //NITRO_OS_TCM_H
diff --git a/lib/include/nitro/os/terminate_proc.h b/lib/include/nitro/os/terminate_proc.h
new file mode 100644
index 0000000000..5d3310244f
--- /dev/null
+++ b/lib/include/nitro/os/terminate_proc.h
@@ -0,0 +1,6 @@
+#ifndef NITRO_OS_TERMINATE_PROC_H
+#define NITRO_OS_TERMINATE_PROC_H
+
+void OS_Terminate(void);
+
+#endif //NITRO_OS_TERMINATE_PROC_H
diff --git a/lib/include/nitro/os/thread.h b/lib/include/nitro/os/thread.h
new file mode 100644
index 0000000000..18a9798061
--- /dev/null
+++ b/lib/include/nitro/os/thread.h
@@ -0,0 +1,31 @@
+#ifndef NITRO_OS_THREAD_H_
+#define NITRO_OS_THREAD_H_
+
+#include <nitro/os/context.h>
+#include <nitro/os/common/thread_shared.h>
+
+#define SDK_THREAD_INFINITY
+
+OSMutex *OSi_RemoveMutexLinkFromQueue(OSMutexQueue *queue);
+void OS_InitThread(void);
+BOOL OS_IsThreadAvailable(void);
+void OS_CreateThread(OSThread *thread, void (*func) (void *), void *arg, void *stack, u32 stackSize, u32 prio);
+void OS_ExitThread(void);
+void OS_DestroyThread(OSThread *thread);
+void OS_JoinThread(OSThread *thread);
+BOOL OS_IsThreadTerminated(const OSThread *thread);
+void OS_SleepThread(OSThreadQueue *queue);
+void OS_WakeupThread(OSThreadQueue *queue);
+void OS_WakeupThreadDirect(OSThread *thread);
+OSThread *OS_SelectThread(void);
+void OS_RescheduleThread(void);
+void OS_YieldThread(void);
+BOOL OS_SetThreadPriority(OSThread *thread, u32 prio);
+u32 OS_GetThreadPriority(const OSThread *thread);
+void OS_Sleep(u32 msec);
+OSSwitchThreadCallback OS_SetSwitchThreadCallback(OSSwitchThreadCallback callback);
+u32 OS_DisableScheduler(void);
+u32 OS_EnableScheduler(void);
+void OS_SetThreadDestructor(OSThread *thread, OSThreadDestructor dtor);
+
+#endif //NITRO_OS_THREAD_H_
diff --git a/lib/include/nitro/os/tick.h b/lib/include/nitro/os/tick.h
new file mode 100644
index 0000000000..0756d68a1a
--- /dev/null
+++ b/lib/include/nitro/os/tick.h
@@ -0,0 +1,14 @@
+#ifndef NITRO_OS_TICK_H
+#define NITRO_OS_TICK_H
+
+#include <nitro/os/common/tick_shared.h>
+
+void OS_InitTick(void);
+BOOL OS_IsTickAvailable(void);
+void OSi_CountUpTick(void);
+OSTick OS_GetTick(void);
+u16 OS_GetTickLo(void);
+
+extern vu64 OSi_TickCounter;
+
+#endif //NITRO_OS_TICK_H
diff --git a/lib/include/nitro/os/timer.h b/lib/include/nitro/os/timer.h
new file mode 100644
index 0000000000..456f32ec5d
--- /dev/null
+++ b/lib/include/nitro/os/timer.h
@@ -0,0 +1,9 @@
+#ifndef NITRO_OS_TIMER_H
+#define NITRO_OS_TIMER_H
+
+#include <nitro/os/common/timer_shared.h>
+#include <nitro/types.h>
+
+void OSi_SetTimerReserved(s32 timerNum);
+
+#endif //NITRO_OS_TIMER_H
diff --git a/lib/include/nitro/os/valarm.h b/lib/include/nitro/os/valarm.h
new file mode 100644
index 0000000000..441477cdcb
--- /dev/null
+++ b/lib/include/nitro/os/valarm.h
@@ -0,0 +1,24 @@
+#ifndef NITRO_OS_VALARM_H_
+#define NITRO_OS_VALARM_H_
+
+typedef void (*OSVAlarmHandler)(void *);
+
+typedef struct OSiVAlarm OSVAlarm;
+
+struct OSiVAlarm {
+    OSVAlarmHandler handler;
+    void *arg;
+    u32 tag;
+    u32 frame;
+    s16 fire;
+    s16 delay;
+    OSVAlarm *prev;
+    OSVAlarm *next;
+    BOOL period;
+    BOOL finish;
+    BOOL canceled;
+};
+
+void OS_InitVAlarm(void);
+
+#endif //NITRO_OS_VALARM_H_
diff --git a/lib/include/nitro/pad.h b/lib/include/nitro/pad.h
new file mode 100644
index 0000000000..af1102597c
--- /dev/null
+++ b/lib/include/nitro/pad.h
@@ -0,0 +1,9 @@
+#ifndef NITRO_PAD_H_
+#define NITRO_PAD_H_
+
+#include <nitro/pad/common/pad.h>
+#ifdef SDK_ARM7
+#include <nitro/pad/ARM7/xyButton.h>
+#endif
+
+#endif //NITRO_PAD_H_
diff --git a/lib/include/nitro/pad/ARM7/xyButton.h b/lib/include/nitro/pad/ARM7/xyButton.h
new file mode 100644
index 0000000000..ff5a6d087e
--- /dev/null
+++ b/lib/include/nitro/pad/ARM7/xyButton.h
@@ -0,0 +1,6 @@
+#ifndef NITRO_PAD_XYBUTTON_H_
+#define NITRO_PAD_XYBUTTON_H_
+
+extern BOOL PADi_XYButtonAvailable;
+
+#endif //NITRO_PAD_XYBUTTON_H_
diff --git a/lib/include/nitro/pad/common/pad.h b/lib/include/nitro/pad/common/pad.h
new file mode 100644
index 0000000000..e375be9ad2
--- /dev/null
+++ b/lib/include/nitro/pad/common/pad.h
@@ -0,0 +1,38 @@
+#ifndef NITRO_PAD_PAD_H_
+#define NITRO_PAD_PAD_H_
+
+#include <nitro/hw/common/io_reg.h>
+
+#define PAD_PLUS_KEY_MASK       0x00f0
+#define PAD_BUTTON_MASK         0x2f0f
+#define PAD_DEBUG_BUTTON_MASK   0x2000
+#define PAD_ALL_MASK            0x2fff
+#define PAD_RCNTPORT_MASK       0x2c00
+#define PAD_KEYPORT_MASK        0x03ff
+
+#define PAD_DETECT_FOLD_MASK    0x8000
+
+#define PAD_BUTTON_A            0x0001
+#define PAD_BUTTON_B            0x0002
+#define PAD_BUTTON_SELECT       0x0004
+#define PAD_BUTTON_START        0x0008
+#define PAD_KEY_RIGHT           0x0010
+#define PAD_KEY_LEFT            0x0020
+#define PAD_KEY_UP              0x0040
+#define PAD_KEY_DOWN            0x0080
+#define PAD_BUTTON_R            0x0100
+#define PAD_BUTTON_L            0x0200
+#define PAD_BUTTON_X            0x0400
+#define PAD_BUTTON_Y            0x0800
+#define PAD_BUTTON_DEBUG        0x2000
+
+static inline u16 PAD_Read(void) {
+    return (u16)(((reg_PAD_KEYINPUT | *(vu16 *)HW_BUTTON_XY_BUF) ^
+                  (PAD_PLUS_KEY_MASK | PAD_BUTTON_MASK)) & (PAD_PLUS_KEY_MASK | PAD_BUTTON_MASK));
+}
+
+static inline BOOL PAD_DetectFold(void) {
+    return (BOOL)((*(vu16 *)HW_BUTTON_XY_BUF & PAD_DETECT_FOLD_MASK) >> 15);
+}
+
+#endif //NITRO_PAD_PAD_H_
diff --git a/lib/include/nitro/pxi.h b/lib/include/nitro/pxi.h
new file mode 100644
index 0000000000..8c49408769
--- /dev/null
+++ b/lib/include/nitro/pxi.h
@@ -0,0 +1,6 @@
+#ifndef NITRO_PXI_H_
+#define NITRO_PXI_H_
+
+void PXI_Init(void);
+
+#endif //NITRO_PXI_H_
diff --git a/lib/include/nitro/pxi/fifo.h b/lib/include/nitro/pxi/fifo.h
new file mode 100644
index 0000000000..e8e35ea917
--- /dev/null
+++ b/lib/include/nitro/pxi/fifo.h
@@ -0,0 +1,35 @@
+#ifndef NITRO_PXI_FIFO_H_
+#define NITRO_PXI_FIFO_H_
+
+#include <nitro/pxi/fifo_shared.h>
+
+typedef enum
+{
+    PXI_FIFO_SUCCESS = 0,
+    PXI_FIFO_FAIL_SEND_ERR = -1,
+    PXI_FIFO_FAIL_SEND_FULL = -2,
+    PXI_FIFO_FAIL_RECV_ERR = -3,
+    PXI_FIFO_FAIL_RECV_EMPTY = -4,
+    PXI_FIFO_NO_CALLBACK_ENTRY = -5
+} PXIFifoStatus;
+
+typedef void (*PXIFifoCallback) (PXIFifoTag tag, u32 data, BOOL err);
+
+typedef union
+{
+    struct
+    {
+        u32 tag:5;
+        u32 err:1;
+        u32 data:26;
+    } e;
+    u32 raw;
+} PXIFifoMessage;
+
+void PXI_InitFifo(void);
+void PXI_SetFifoRecvCallback(s32 fifotag, PXIFifoCallback callback);
+BOOL PXI_IsCallbackReady(s32 fifotag, PXIProc proc);
+s32 PXI_SendWordByFifo(s32 fifotag, u32 data, BOOL err);
+void PXIi_HandlerRecvFifoNotEmpty(void);
+
+#endif //NITRO_PXI_FIFO_H_
diff --git a/lib/include/nitro/pxi/fifo_shared.h b/lib/include/nitro/pxi/fifo_shared.h
new file mode 100644
index 0000000000..b8e457b219
--- /dev/null
+++ b/lib/include/nitro/pxi/fifo_shared.h
@@ -0,0 +1,43 @@
+/*
+ * NOTE:
+ * This file is shared between ARM9 and ARM7
+ * DO NOT PUT PROC SPECIFIC CODE IN HERE
+ * Thank You!
+ */
+
+/*
+ * DO NOT INCLUDE THIS FILE DIRECTLY
+ * Include PXI_fifo.h from the specific proc's lib
+ */
+
+#ifndef NITRO_PXI_FIFO_SHARED_H_
+#define NITRO_PXI_FIFO_SHARED_H_
+
+typedef enum
+{
+    PXI_PROC_ARM9 = 0,
+    PXI_PROC_ARM7 = 1
+} PXIProc;
+
+typedef enum {
+    PXI_FIFO_TAG_EX = 0,               // Extension format
+    PXI_FIFO_TAG_USER_0,               // for application programmer, use it in free
+    PXI_FIFO_TAG_USER_1,               // for application programmer, use it in free
+    PXI_FIFO_TAG_SYSTEM,               // SDK inner usage
+    PXI_FIFO_TAG_NVRAM,                // NVRAM
+    PXI_FIFO_TAG_RTC,                  // RTC
+    PXI_FIFO_TAG_TOUCHPANEL,           // Touch Panel
+    PXI_FIFO_TAG_SOUND,                // Sound
+    PXI_FIFO_TAG_PM,                   // Power Management
+    PXI_FIFO_TAG_MIC,                  // Microphone
+    PXI_FIFO_TAG_WM,                   // Wireless Manager
+    PXI_FIFO_TAG_FS,                   // File System
+    PXI_FIFO_TAG_OS,                   // OS
+    PXI_FIFO_TAG_CTRDG,                // Cartridge
+    PXI_FIFO_TAG_CARD,                 // Card
+    PXI_FIFO_TAG_WVR,                  // Control driving wireless library
+    PXI_FIFO_TAG_CTRDG_Ex,             // Cartridge Ex
+    PXI_MAX_FIFO_TAG = 32              // MAX FIFO TAG
+} PXIFifoTag;
+
+#endif //NITRO_PXI_FIFO_SHARED_H_
diff --git a/lib/include/nitro/rtc.h b/lib/include/nitro/rtc.h
new file mode 100644
index 0000000000..0a90f41ae0
--- /dev/null
+++ b/lib/include/nitro/rtc.h
@@ -0,0 +1,9 @@
+#ifndef NITRO_RTC_H_
+#define NITRO_RTC_H_
+
+#ifdef SDK_ARM9
+#include <nitro/rtc/ARM9/api.h>
+#include <nitro/rtc/ARM9/convert.h>
+#endif //SDK_ARM9
+
+#endif //NITRO_RTC_H_
diff --git a/lib/include/nitro/rtc/ARM9/api.h b/lib/include/nitro/rtc/ARM9/api.h
new file mode 100644
index 0000000000..4dd074ed9c
--- /dev/null
+++ b/lib/include/nitro/rtc/ARM9/api.h
@@ -0,0 +1,45 @@
+#ifndef NITRO_RTC_API_H_
+#define NITRO_RTC_API_H_
+
+typedef enum RTCWeek {
+    RTC_WEEK_SUNDAY = 0,
+    RTC_WEEK_MONDAY,
+    RTC_WEEK_TUESDAY,
+    RTC_WEEK_WEDNESDAY,
+    RTC_WEEK_THURSDAY,
+    RTC_WEEK_FRIDAY,
+    RTC_WEEK_SATURDAY,
+    RTC_WEEK_MAX
+} RTCWeek;
+
+typedef enum RTCResult
+{
+    RTC_RESULT_SUCCESS = 0,
+    RTC_RESULT_BUSY,
+    RTC_RESULT_ILLEGAL_PARAMETER,
+    RTC_RESULT_SEND_ERROR,
+    RTC_RESULT_INVALID_COMMAND,
+    RTC_RESULT_ILLEGAL_STATUS,
+    RTC_RESULT_FATAL_ERROR,
+    RTC_RESULT_MAX
+} RTCResult;
+
+typedef struct RTCDate {
+    u32 year;
+    u32 month;
+    u32 day;
+    RTCWeek week;
+} RTCDate;
+
+typedef struct RTCTime {
+    u32 hour;
+    u32 minute;
+    u32 second;
+} RTCTime;
+
+typedef void (*RTCCallback)(RTCResult result, void *arg);
+
+void RTC_Init(void);
+RTCResult RTC_GetDateTimeAsync(RTCDate *date, RTCTime *time, RTCCallback callback, void *arg);
+
+#endif //NITRO_RTC_API_H_
diff --git a/lib/include/nitro/rtc/ARM9/convert.h b/lib/include/nitro/rtc/ARM9/convert.h
new file mode 100644
index 0000000000..55a4cb7bd4
--- /dev/null
+++ b/lib/include/nitro/rtc/ARM9/convert.h
@@ -0,0 +1,8 @@
+#ifndef NITRO_RTC_CONVERT_H_
+#define NITRO_RTC_CONVERT_H_
+
+s64 RTC_ConvertDateTimeToSecond(const RTCDate *date, const RTCTime *time);
+s32 RTC_ConvertDateToDay(const RTCDate *date);
+void RTC_ConvertSecondToDateTime(RTCDate *date, RTCTime *time, s64 sec);
+
+#endif //NITRO_RTC_CONVERT_H_
diff --git a/lib/include/nitro/section.h b/lib/include/nitro/section.h
new file mode 100644
index 0000000000..d3318a4660
--- /dev/null
+++ b/lib/include/nitro/section.h
@@ -0,0 +1,14 @@
+#ifndef NITRO_SECTION_H_
+#define NITRO_SECTION_H_
+
+#ifdef SDK_ARM9
+#pragma define_section ITCM ".itcm" ".itcm.bss" abs32 RWX
+#pragma define_section DTCM ".dtcm" ".dtcm.bss" abs32 RWX
+#else
+#pragma define_section WRAM ".wram" ".wram.bss" abs32 RWX
+#endif
+
+#pragma define_section PARENT ".parent" abs32 RWX
+#pragma define_section VERSION ".version" abs32 RWX
+
+#endif //NITRO_SECTION_H_
diff --git a/lib/include/nitro/snd.h b/lib/include/nitro/snd.h
new file mode 100644
index 0000000000..cc7bdb1a3a
--- /dev/null
+++ b/lib/include/nitro/snd.h
@@ -0,0 +1,10 @@
+#ifndef NITRO_SND_H_
+#define NITRO_SND_H_
+
+#include <nitro/snd/common/global.h>
+#include <nitro/snd/common/exchannel.h>
+#include <nitro/snd/common/channel.h>
+#include <nitro/snd/common/data.h>
+#include <nitro/snd/common/work.h>
+
+#endif //NITRO_SND_H_
diff --git a/lib/include/nitro/snd/common/channel.h b/lib/include/nitro/snd/common/channel.h
new file mode 100644
index 0000000000..c7987fd8a0
--- /dev/null
+++ b/lib/include/nitro/snd/common/channel.h
@@ -0,0 +1,6 @@
+#ifndef NITRO_SND_CHANNEL_H_
+#define NITRO_SND_CHANNEL_H_
+
+#define SND_CHANNEL_NUM 16
+
+#endif //NITRO_SND_CHANNEL_H_
diff --git a/lib/include/nitro/snd/common/data.h b/lib/include/nitro/snd/common/data.h
new file mode 100644
index 0000000000..60404fc7e7
--- /dev/null
+++ b/lib/include/nitro/snd/common/data.h
@@ -0,0 +1,18 @@
+#ifndef NITRO_SND_DATA_H_
+#define NITRO_SND_DATA_H_
+
+typedef struct SNDBinaryFileHeader {
+    char signature[4];
+    u16 byteOrder;
+    u16 version;
+    u32 fileSize;
+    u16 headerSize;
+    u16 dataBlocks;
+} SNDBinaryFileHeader;
+
+typedef struct SNDBinaryBlockHeader {
+    u32 kind;
+    u32 size;
+} SNDBinaryBlockHeader;
+
+#endif //NITRO_SND_DATA_H_
diff --git a/lib/include/nitro/snd/common/exchannel.h b/lib/include/nitro/snd/common/exchannel.h
new file mode 100644
index 0000000000..3c8ee664ce
--- /dev/null
+++ b/lib/include/nitro/snd/common/exchannel.h
@@ -0,0 +1,11 @@
+#ifndef NITRO_SND_EXCHANNEL_H_
+#define NITRO_SND_EXCHANNEL_H_
+
+typedef enum SNDEnvStatus {
+    SND_ENV_ATTACK,
+    SND_ENV_DECAY,
+    SND_ENV_SUSTAIN,
+    SND_ENV_RELEASE
+} SNDEnvStatus;
+
+#endif //NITRO_SND_EXCHANNEL_H_
diff --git a/lib/include/nitro/snd/common/global.h b/lib/include/nitro/snd/common/global.h
new file mode 100644
index 0000000000..979597508b
--- /dev/null
+++ b/lib/include/nitro/snd/common/global.h
@@ -0,0 +1,6 @@
+#ifndef NITRO_SND_GLOBAL_H_
+#define NITRO_SND_GLOBAL_H_
+
+void SND_Shutdown(void);
+
+#endif //NITRO_SND_GLOBAL_H_
diff --git a/lib/include/nitro/snd/common/work.h b/lib/include/nitro/snd/common/work.h
new file mode 100644
index 0000000000..462ddb131d
--- /dev/null
+++ b/lib/include/nitro/snd/common/work.h
@@ -0,0 +1,26 @@
+#ifndef NITRO_SND_WORK_H_
+#define NITRO_SND_WORK_H_
+
+typedef struct SNDChannelInfo {
+    BOOL activeFlag: 1;
+    BOOL lockFlag: 1;
+    u16 volume;
+    u8 pan;
+    u8 pad_;
+    SNDEnvStatus envStatus;
+} SNDChannelInfo;
+
+typedef struct SNDTrackInfo {
+    u16 prgNo;
+    u8 volume;
+    u8 volume2;
+    s8 pitchBend;
+    u8 bendRange;
+    u8 pan;
+    s8 transpose;
+    u8 pad_;
+    u8 chCount;
+    u8 channel[SND_CHANNEL_NUM];
+} SNDTrackInfo;
+
+#endif //NITRO_SND_WORK_H_
diff --git a/lib/include/nitro/spi.h b/lib/include/nitro/spi.h
new file mode 100644
index 0000000000..3dfa471211
--- /dev/null
+++ b/lib/include/nitro/spi.h
@@ -0,0 +1,12 @@
+#ifndef NITRO_SPI_H_
+#define NITRO_SPI_H_
+
+#include <nitro/spi/userInfo.h>
+#include <nitro/spi/common/pm_common.h>
+#ifdef SDK_ARM9
+#include <nitro/spi/ARM9/mic.h>
+#include <nitro/spi/ARM9/pm.h>
+#include <nitro/spi/ARM9/tp.h>
+#endif //SDK_ARM9
+
+#endif //NITRO_SPI_H_
diff --git a/lib/include/nitro/spi/ARM9/mic.h b/lib/include/nitro/spi/ARM9/mic.h
new file mode 100644
index 0000000000..d9977b398d
--- /dev/null
+++ b/lib/include/nitro/spi/ARM9/mic.h
@@ -0,0 +1,50 @@
+#ifndef NITRO_SPI_ARM9_MIC_H_
+#define NITRO_SPI_ARM9_MIC_H_
+
+#include <nitro/os/common/armArch.h>
+
+typedef enum MICResult {
+    MIC_RESULT_SUCCESS = 0,
+    MIC_RESULT_BUSY,
+    MIC_RESULT_ILLEGAL_PARAMETER,
+    MIC_RESULT_SEND_ERROR,
+    MIC_RESULT_INVALID_COMMAND,
+    MIC_RESULT_ILLEGAL_STATUS,
+    MIC_RESULT_FATAL_ERROR,
+    MIC_RESULT_MAX
+} MICResult;
+
+typedef enum MICSamplingType {
+    MIC_SAMPLING_TYPE_8BIT = 0,
+    MIC_SAMPLING_TYPE_12BIT,
+    MIC_SAMPLING_TYPE_SIGNED_8BIT,
+    MIC_SAMPLING_TYPE_SIGNED_12BIT,
+    MIC_SAMPLING_TYPE_12BIT_FILTER_OFF,
+    MIC_SAMPLING_TYPE_SIGNED_12BIT_FILTER_OFF,
+    MIC_SAMPLING_TYPE_MAX
+} MICSamplingType;
+
+typedef enum MICSamplingRate {
+    MIC_SAMPLING_RATE_8K = (HW_CPU_CLOCK_ARM7 / 8000),
+    MIC_SAMPLING_RATE_11K = (HW_CPU_CLOCK_ARM7 / 11025),
+    MIC_SAMPLING_RATE_16K = (HW_CPU_CLOCK_ARM7 / 16000),
+    MIC_SAMPLING_RATE_22K = (HW_CPU_CLOCK_ARM7 / 22050),
+    MIC_SAMPLING_RATE_32K = (HW_CPU_CLOCK_ARM7 / 32000),
+    MIC_SAMPLING_RATE_LIMIT = 1024
+} MICSamplingRate;
+
+typedef void (*MICCallback)(MICResult result, void *arg);
+
+typedef struct MICAutoParam {
+    MICSamplingType type;
+    void *buffer;
+    u32 size;
+    u32 rate;
+    BOOL loop_enable;
+    MICCallback full_callback;
+    void *full_arg;
+} MICAutoParam;
+
+void MIC_Init(void);
+
+#endif //NITRO_SPI_ARM9_MIC_H_
diff --git a/lib/include/nitro/spi/ARM9/pm.h b/lib/include/nitro/spi/ARM9/pm.h
new file mode 100644
index 0000000000..f58914d291
--- /dev/null
+++ b/lib/include/nitro/spi/ARM9/pm.h
@@ -0,0 +1,37 @@
+#ifndef NITRO_SPI_ARM9_PM_H_
+#define NITRO_SPI_ARM9_PM_H_
+
+typedef enum {
+    PM_BACKLIGHT_OFF = 0,
+    PM_BACKLIGHT_ON = 1
+} PMBackLightSwitch;
+
+typedef enum {
+    PM_AMP_OFF = 0,
+    PM_AMP_ON = 1
+} PMAmpSwitch;
+
+typedef enum {
+    PM_AMPGAIN_20 = 0,
+    PM_AMPGAIN_40 = 1,
+    PM_AMPGAIN_80 = 2,
+    PM_AMPGAIN_160 = 3,
+    PM_AMPGAIN_DEFAULT = PM_AMPGAIN_40
+} PMAmpGain;
+
+typedef enum {
+    PM_LCD_TOP = 0,
+    PM_LCD_BOTTOM = 1,
+    PM_LCD_ALL = 2
+} PMLCDTarget;
+
+
+void PM_Init(void);
+u32 PM_SetAmp(PMAmpSwitch sw);
+u32 PM_SetAmpGain(PMAmpGain gain);
+void PM_GetBackLight(PMBackLightSwitch *top, PMBackLightSwitch *bottom);
+void PM_GoSleepMode(PMWakeUpTrigger trigger, PMLogic logic, u16 keyPattern);
+u32 PM_ForceToPowerOff(void);
+u32 PM_SetBackLight(PMLCDTarget target, PMBackLightSwitch status);
+
+#endif //NITRO_SPI_ARM9_PM_H_
diff --git a/lib/include/nitro/spi/ARM9/tp.h b/lib/include/nitro/spi/ARM9/tp.h
new file mode 100644
index 0000000000..4b4753948b
--- /dev/null
+++ b/lib/include/nitro/spi/ARM9/tp.h
@@ -0,0 +1,39 @@
+#ifndef NITRO_SPI_ARM9_TP_H
+#define NITRO_SPI_ARM9_TP_H
+
+#define     TP_TOUCH_OFF                0
+#define     TP_TOUCH_ON                 1
+
+#define     TP_VALIDITY_VALID           0
+#define     TP_VALIDITY_INVALID_X       1
+#define     TP_VALIDITY_INVALID_Y       2
+#define     TP_VALIDITY_INVALID_XY      (TP_VALIDITY_INVALID_X | TP_VALIDITY_INVALID_Y)
+
+typedef struct {
+    u16 x;
+    u16 y;
+    u16 touch;
+    u16 validity;
+} TPData;
+
+typedef struct NvTpData {
+    s16 x0;
+    s16 y0;
+    s16 xDotSize;
+    s16 yDotSize;
+} TPCalibrateParam;
+
+void TP_Init(void);
+void TP_SetCalibrateParam(const TPCalibrateParam *param);
+BOOL TP_GetUserInfo(TPCalibrateParam *param);
+void TP_RequestSamplingAsync(void);
+u32 TP_WaitRawResult(TPData *result);
+void TP_GetLatestRawPointInAuto(TPData *result);
+void TP_GetCalibratedPoint(TPData *calib, const TPData *raw);
+
+static inline u32 TP_RequestRawSampling(TPData *result) {
+    TP_RequestSamplingAsync();
+    return TP_WaitRawResult(result);
+}
+
+#endif //NITRO_SPI_ARM9_TP_H
diff --git a/lib/include/nitro/spi/common/pm_common.h b/lib/include/nitro/spi/common/pm_common.h
new file mode 100644
index 0000000000..b328e2e83f
--- /dev/null
+++ b/lib/include/nitro/spi/common/pm_common.h
@@ -0,0 +1,15 @@
+#ifndef NITRO_SPI_COMMON_PM_COMMON_H_
+#define NITRO_SPI_COMMON_PM_COMMON_H_
+
+#define PM_TRIGGER_KEY              (1 << 0)
+#define PM_TRIGGER_RTC_ALARM        (1 << 1)
+#define PM_TRIGGER_COVER_OPEN       (1 << 2)
+#define PM_TRIGGER_CARD             (1 << 3)
+#define PM_TRIGGER_CARTRIDGE        (1 << 4)
+typedef u32 PMWakeUpTrigger;
+
+#define PM_PAD_LOGIC_OR    (0 << REG_PAD_KEYCNT_LOGIC_SHIFT)
+#define PM_PAD_LOGIC_AND   (1 << REG_PAD_KEYCNT_LOGIC_SHIFT)
+typedef u32 PMLogic;
+
+#endif //NITRO_SPI_COMMON_PM_COMMON_H_
diff --git a/lib/include/nitro/spi/userInfo.h b/lib/include/nitro/spi/userInfo.h
new file mode 100644
index 0000000000..3319ce278a
--- /dev/null
+++ b/lib/include/nitro/spi/userInfo.h
@@ -0,0 +1,92 @@
+#ifndef NITRO_SPI_USERINFO_H_
+#define NITRO_SPI_USERINFO_H_
+
+typedef struct NVRAMConfigDate
+{
+    u8 month;            //0x00
+    u8 day;              //0x01
+} NVRAMConfigDate;       //0x02
+
+typedef struct NVRAMConfigNickname
+{
+    u16 str[10];         //0x00
+    u8 length;           //0x14
+    u8 rsv;              //0x15
+} NVRAMConfigNickname;   //0x16
+
+typedef struct NVRAMConfigComment
+{
+    u16 str[26];         //0x00
+    u8 length;           //0x34
+    u8 rsv;              //0x35
+} NVRAMConfigComment;    //0x36
+
+typedef struct NVRAMConfigOwnerInfo
+{
+    u8 favouriteColour:4;         //0x00 (0-3)
+    u8 rsv:4;                     //0x00 (4-7)
+    NVRAMConfigDate birthday;     //0x01
+    u8 pad;                       //0x03
+    NVRAMConfigNickname nickname; //0x04
+    NVRAMConfigComment comment;   //0x1a
+} NVRAMConfigOwnerInfo;           //0x50
+
+typedef struct NVRAMConfigAlarm
+{
+    u8 hour;             //0x00
+    u8 minute;           //0x01
+    u8 second;           //0x02
+    u8 pad;              //0x03
+    u16 enableWeek:7;    //0x04 (0-6)
+    u16 alarmOn:1;       //0x04 (7)
+    u16 rsv:8;           //0x04 (8-15)
+} NVRAMConfigAlarm;      //0x06
+
+typedef struct NVRAMConfigTpCalibData
+{
+    u16 raw_x1;           //0x00
+    u16 raw_y1;           //0x02
+    u8 dx1;               //0x04
+    u8 dy1;               //0x05
+    u16 raw_x2;           //0x06
+    u16 raw_y2;           //0x08
+    u8 dx2;               //0x0a
+    u8 dy2;               //0x0b
+} NVRAMConfigTpCalibData; //0x0c
+
+typedef struct NVRAMConfigOption
+{
+    u16 language:3;               //0x00 (0-2)
+    u16 agbLcd:1;                 //0x00 (3)
+    u16 detectPullOutCardFlag:1;  //0x00 (4)
+    u16 detectPullOutCtrdgFlag:1; //0x00 (5)
+    u16 autoBootFlag:1;           //0x00 (6)
+    u16 rsv:4;                    //0x00 (7-10)
+    u16 input_favouriteColour:1;  //0x00 (11)
+    u16 input_tp:1;               //0x00 (12)
+    u16 input_language:1;         //0x00 (13)
+    u16 input_rtc:1;              //0x00 (14)
+    u16 input_nickname:1;         //0x00 (15)
+    u8 timeZone;                  //0x02
+    u8 rtcClockAdjust;            //0x03
+    s64 rtcOffset;                //0x04
+} NVRAMConfigOption;              //0x0c
+
+typedef struct NVRAMConfigData
+{
+    u8 version;                   //0x00
+    u8 pad;                       //0x01
+    NVRAMConfigOwnerInfo owner;   //0x02
+    NVRAMConfigAlarm alarm;       //0x52
+    NVRAMConfigTpCalibData tp;    //0x58
+    NVRAMConfigOption option;     //0x64
+} NVRAMConfigData;                //0x70
+
+typedef struct NVRAMConfig
+{
+    NVRAMConfigData ncd; //0x00
+    u16 saveCount;       //0x70
+    u16 crc16;           //0x72
+} NVRAMConfig;           //0x74
+
+#endif //NITRO_SPI_USERINFO_H_
diff --git a/lib/include/nitro/std.h b/lib/include/nitro/std.h
new file mode 100644
index 0000000000..4ad59b0e2f
--- /dev/null
+++ b/lib/include/nitro/std.h
@@ -0,0 +1,6 @@
+#ifndef NITRO_STD_H_
+#define NITRO_STD_H_
+
+#include <nitro/std/string.h>
+
+#endif //NITRO_STD_H_
diff --git a/lib/include/nitro/std/string.h b/lib/include/nitro/std/string.h
new file mode 100644
index 0000000000..b7db894f24
--- /dev/null
+++ b/lib/include/nitro/std/string.h
@@ -0,0 +1,8 @@
+#ifndef NITRO_STD_STRING_H_
+#define NITRO_STD_STRING_H_
+
+#include <stdarg.h>
+
+int STD_TVSNPrintf(char * dest, u32 len, const char * format, va_list va);
+
+#endif //NITRO_STD_STRING_H_
diff --git a/lib/include/nitro/types.h b/lib/include/nitro/types.h
new file mode 100644
index 0000000000..a8211470ab
--- /dev/null
+++ b/lib/include/nitro/types.h
@@ -0,0 +1,56 @@
+#ifndef NITRO_TYPES_H_
+#define NITRO_TYPES_H_
+
+#ifndef SDK_ASM
+typedef unsigned char u8;
+typedef unsigned short int u16;
+typedef unsigned long u32;
+
+typedef signed char s8;
+typedef signed short int s16;
+typedef signed long s32;
+
+typedef unsigned long long int u64;
+typedef signed long long int s64;
+
+typedef volatile u8 vu8;
+typedef volatile u16 vu16;
+typedef volatile u32 vu32;
+typedef volatile u64 vu64;
+
+typedef volatile s8 vs8;
+typedef volatile s16 vs16;
+typedef volatile s32 vs32;
+typedef volatile s64 vs64;
+
+typedef float f32;
+typedef volatile f32 vf32;
+
+typedef u8 REGType8;
+typedef u16 REGType16;
+typedef u32 REGType32;
+typedef u64 REGType64;
+
+typedef vu8 REGType8v;
+typedef vu16 REGType16v;
+typedef vu32 REGType32v;
+typedef vu64 REGType64v;
+
+typedef int BOOL;
+#endif
+
+#define TRUE 1
+#define FALSE 0
+
+#ifndef SDK_ASM
+#ifndef NULL
+#ifdef  __cplusplus
+#define NULL 0
+#else  // __cplusplus
+#define NULL ((void *)0)
+#endif // __cplusplus
+#endif
+
+#define SDK_FORCE_EXPORT __declspec(force_export)
+#endif //SDK_ASM
+#endif //NITRO_TYPES_H_
diff --git a/lib/include/nitro/wram_begin.h b/lib/include/nitro/wram_begin.h
new file mode 100644
index 0000000000..175389d8b8
--- /dev/null
+++ b/lib/include/nitro/wram_begin.h
@@ -0,0 +1,4 @@
+#include <nitro/section.h>
+#ifdef SDK_ARM7
+#pragma section WRAM begin
+#endif //SDK_ARM7
diff --git a/lib/include/nitro/wram_end.h b/lib/include/nitro/wram_end.h
new file mode 100644
index 0000000000..6a95467a3f
--- /dev/null
+++ b/lib/include/nitro/wram_end.h
@@ -0,0 +1,4 @@
+#include <nitro/section.h>
+#ifdef SDK_ARM7
+#pragma section WRAM end
+#endif //SDK_ARM7
diff --git a/lib/include/nnsys.h b/lib/include/nnsys.h
new file mode 100644
index 0000000000..ee210c14e6
--- /dev/null
+++ b/lib/include/nnsys.h
@@ -0,0 +1,10 @@
+#ifndef NNSYS_H_
+#define NNSYS_H_
+
+#include <nnsys/fnd.h>
+#include <nnsys/snd.h>
+#include <nnsys/gfd.h>
+#include <nnsys/g2d.h>
+#include <nnsys/g3d.h>
+
+#endif //NNSYS_H_
diff --git a/lib/include/nnsys/fnd.h b/lib/include/nnsys/fnd.h
new file mode 100644
index 0000000000..e0190779c6
--- /dev/null
+++ b/lib/include/nnsys/fnd.h
@@ -0,0 +1,9 @@
+#ifndef NNSYS_FND_H_
+#define NNSYS_FND_H_
+
+#include <nnsys/fnd/list.h>
+#include <nnsys/fnd/heapcommon.h>
+#include <nnsys/fnd/expheap.h>
+#include <nnsys/fnd/allocator.h>
+
+#endif //NNSYS_FND_H_
diff --git a/lib/include/nnsys/fnd/allocator.h b/lib/include/nnsys/fnd/allocator.h
new file mode 100644
index 0000000000..d9143b570f
--- /dev/null
+++ b/lib/include/nnsys/fnd/allocator.h
@@ -0,0 +1,27 @@
+#ifndef NNSYS_FND_ALLOCATOR_H_
+#define NNSYS_FND_ALLOCATOR_H_
+
+#include <nnsys/fnd/heapcommon.h>
+
+typedef struct NNSFndAllocator NNSFndAllocator;
+
+typedef void *(*NNSFndFuncAllocatorAlloc)(NNSFndAllocator *pAllocator, u32 size);
+typedef void (*NNSFndFuncAllocatorFree)(NNSFndAllocator *pAllocator,void *memBlock);
+
+typedef struct NNSFndAllocatorFunc NNSFndAllocatorFunc;
+
+struct NNSFndAllocatorFunc {
+    NNSFndFuncAllocatorAlloc pfAlloc;
+    NNSFndFuncAllocatorFree pfFree;
+};
+
+struct NNSFndAllocator {
+    NNSFndAllocatorFunc const * pFunc;
+    void *pHeap;
+    u32 heapParam1;
+    u32 heapParam2;
+};
+
+void NNS_FndInitAllocatorForExpHeap(NNSFndAllocator *pAllocator, NNSFndHeapHandle heap, int alignment);
+
+#endif //NNSYS_FND_ALLOCATOR_H_
diff --git a/lib/include/nnsys/fnd/expheap.h b/lib/include/nnsys/fnd/expheap.h
new file mode 100644
index 0000000000..a223bebc05
--- /dev/null
+++ b/lib/include/nnsys/fnd/expheap.h
@@ -0,0 +1,16 @@
+#ifndef NNSYS_FND_EXPHEAP_H_
+#define NNSYS_FND_EXPHEAP_H_
+
+#include <nnsys/fnd/heapcommon.h>
+
+#define NNS_FndCreateExpHeap(startAddress, size) NNS_FndCreateExpHeapEx(startAddress, size, 0)
+
+NNSFndHeapHandle NNS_FndCreateExpHeapEx(void *startAddress, u32 size, u16 optFlag);
+void *NNS_FndAllocFromExpHeapEx(NNSFndHeapHandle heap, u32 size, int alignment);
+void NNS_FndDestroyExpHeap(NNSFndHeapHandle heap);
+void NNS_FndFreeToExpHeap(NNSFndHeapHandle heap, void *memBlock);
+u32 NNS_FndGetTotalFreeSizeForExpHeap(NNSFndHeapHandle heap);
+u32 NNS_FndGetSizeForMBlockExpHeap(const void *memBlock);
+u32 NNS_FndResizeForMBlockExpHeap(NNSFndHeapHandle heap, void *memBlock, u32 size);
+
+#endif //NNSYS_FND_EXPHEAP_H_
diff --git a/lib/include/nnsys/fnd/heapcommon.h b/lib/include/nnsys/fnd/heapcommon.h
new file mode 100644
index 0000000000..232b40b6e5
--- /dev/null
+++ b/lib/include/nnsys/fnd/heapcommon.h
@@ -0,0 +1,23 @@
+#ifndef NNSYS_FND_HEAPCOMMON_H_
+#define NNSYS_FND_HEAPCOMMON_H_
+
+#include <nnsys/fnd/list.h>
+
+typedef struct NNSiFndHeapHead NNSiFndHeapHead;
+
+struct NNSiFndHeapHead
+{
+    u32 signature;
+
+    NNSFndLink link;
+    NNSFndList childList;
+
+    void *heapStart;
+    void *heapEnd;
+
+    u32 attribute;
+};
+
+typedef NNSiFndHeapHead* NNSFndHeapHandle;
+
+#endif //NNSYS_FND_HEAPCOMMON_H_
diff --git a/lib/include/nnsys/fnd/list.h b/lib/include/nnsys/fnd/list.h
new file mode 100644
index 0000000000..bb7c9d3cc1
--- /dev/null
+++ b/lib/include/nnsys/fnd/list.h
@@ -0,0 +1,18 @@
+#ifndef NNSYS_FND_LIST_H_
+#define NNSYS_FND_LIST_H_
+
+typedef struct {
+    void *prevObject;
+    void *nextObject;
+
+} NNSFndLink;
+
+typedef struct {
+    void *headObject;
+    void *tailObject;
+    u16 numObjects;
+    u16 offset;
+
+} NNSFndList;
+
+#endif //NNSYS_FND_LIST_H_
diff --git a/lib/include/nnsys/g2d.h b/lib/include/nnsys/g2d.h
new file mode 100644
index 0000000000..3f17c01e90
--- /dev/null
+++ b/lib/include/nnsys/g2d.h
@@ -0,0 +1,24 @@
+#ifndef NNSYS_G2D_H_
+#define NNSYS_G2D_H_
+
+#include <nnsys/g2d/fmt/g2d_Character_data.h>
+#include <nnsys/g2d/fmt/g2d_Screen_data.h>
+#include <nnsys/g2d/fmt/g2d_Cell_data.h>
+#include <nnsys/g2d/fmt/g2d_Anim_data.h>
+#include <nnsys/g2d/fmt/g2d_MultiCell_data.h>
+#include <nnsys/g2d/load/g2d_NCG_load.h>
+#include <nnsys/g2d/load/g2d_NSC_load.h>
+#include <nnsys/g2d/load/g2d_NCL_load.h>
+#include <nnsys/g2d/load/g2d_NCE_load.h>
+#include <nnsys/g2d/load/g2d_NAN_load.h>
+#include <nnsys/g2d/load/g2d_NMC_load.h>
+#include <nnsys/g2d/g2d_Image.h>
+#include <nnsys/g2d/g2d_OAM.h>
+#include <nnsys/g2d/g2d_CellAnimation.h>
+#include <nnsys/g2d/g2d_MultiCellAnimation.h>
+#include <nnsys/g2d/g2d_Vec_data.h>
+#include <nnsys/g2d/g2d_PaletteTable.h>
+#include <nnsys/g2d/g2d_RendererCore.h>
+#include <nnsys/g2d/g2d_Renderer.h>
+
+#endif //NNSYS_G2D_H_
diff --git a/lib/include/nnsys/g2d/fmt/g2d_Anim_data.h b/lib/include/nnsys/g2d/fmt/g2d_Anim_data.h
new file mode 100644
index 0000000000..60d8d6e788
--- /dev/null
+++ b/lib/include/nnsys/g2d/fmt/g2d_Anim_data.h
@@ -0,0 +1,39 @@
+#ifndef NNSYS_G2D_FMT_G2D_ANIM_DATA_H_
+#define NNSYS_G2D_FMT_G2D_ANIM_DATA_H_
+
+typedef enum NNSG2dAnimationPlayMode {
+    NNS_G2D_ANIMATIONPLAYMODE_INVALID = 0x0,
+    NNS_G2D_ANIMATIONPLAYMODE_FORWARD,
+    NNS_G2D_ANIMATIONPLAYMODE_FORWARD_LOOP,
+    NNS_G2D_ANIMATIONPLAYMODE_REVERSE,
+    NNS_G2D_ANIMATIONPLAYMODE_REVERSE_LOOP,
+    NNS_G2D_ANIMATIONPLAYMODE_MAX
+} NNSG2dAnimationPlayMode;
+
+typedef struct NNSG2dAnimFrameData {
+    void* pContent;
+    u16 frames;
+    u16 pad16;
+
+} NNSG2dAnimFrameData;
+
+typedef struct NNSG2dAnimSequenceData {
+    u16 numFrames;
+    u16 loopStartFrameIdx;
+    u32 animType;
+    NNSG2dAnimationPlayMode playMode;
+    NNSG2dAnimFrameData *pAnmFrameArray;
+
+} NNSG2dAnimSequenceData;
+
+typedef struct NNSG2dAnimBankData {
+    u16 numSequences;
+    u16 numTotalFrames;
+    NNSG2dAnimSequenceData* pSequenceArrayHead;
+    NNSG2dAnimFrameData* pFrameArrayHead;
+    void* pAnimContents;
+    void* pStringBank;
+    void* pExtendedData;
+} NNSG2dAnimBankData;
+
+#endif //NNSYS_G2D_FMT_G2D_ANIM_DATA_H_
diff --git a/lib/include/nnsys/g2d/fmt/g2d_Cell_data.h b/lib/include/nnsys/g2d/fmt/g2d_Cell_data.h
new file mode 100644
index 0000000000..0cdff43930
--- /dev/null
+++ b/lib/include/nnsys/g2d/fmt/g2d_Cell_data.h
@@ -0,0 +1,39 @@
+#ifndef NNSYS_G2D_FMT_G2D_CELL_DATA_H_
+#define NNSYS_G2D_FMT_G2D_CELL_DATA_H_
+
+typedef struct NNSG2dCellOAMAttrData {
+    u16 attr0;
+    u16 attr1;
+    u16 attr2;
+
+} NNSG2dCellOAMAttrData;
+
+typedef struct NNSG2dCellData {
+    u16 numOAMAttrs;
+    u16 cellAttr;
+    NNSG2dCellOAMAttrData* pOamAttrArray;
+} NNSG2dCellData;
+
+typedef struct NNSG2dCellVramTransferData {
+    u32 srcDataOffset;
+    u32 szByte;
+
+} NNSG2dCellVramTransferData;
+
+typedef struct NNSG2dVramTransferData {
+    u32 szByteMax;
+    NNSG2dCellVramTransferData* pCellTransferDataArray;
+
+} NNSG2dVramTransferData;
+
+typedef struct NNSG2dCellDataBank {
+    u16 numCells;
+    u16 cellBankAttr;
+    NNSG2dCellData* pCellDataArrayHead;
+    NNSG2dCharacterDataMapingType mappingMode;
+    NNSG2dVramTransferData* pVramTransferData;
+    void* pStringBank;
+    void* pExtendedData;
+} NNSG2dCellDataBank;
+
+#endif //NNSYS_G2D_FMT_G2D_CELL_DATA_H_
diff --git a/lib/include/nnsys/g2d/fmt/g2d_Character_data.h b/lib/include/nnsys/g2d/fmt/g2d_Character_data.h
new file mode 100644
index 0000000000..33bc315da2
--- /dev/null
+++ b/lib/include/nnsys/g2d/fmt/g2d_Character_data.h
@@ -0,0 +1,36 @@
+#ifndef NNSYS_G2D_FMT_G2D_CHARACTER_DATA_H_
+#define NNSYS_G2D_FMT_G2D_CHARACTER_DATA_H_
+
+typedef enum NNSG2dCharacterDataMapingType {
+    NNS_G2D_CHARACTERMAPING_1D_32,
+    NNS_G2D_CHARACTERMAPING_1D_64,
+    NNS_G2D_CHARACTERMAPING_1D_128,
+    NNS_G2D_CHARACTERMAPING_1D_256,
+    NNS_G2D_CHARACTERMAPING_2D,
+    NNS_G2D_CHARACTERMAPING_MAX
+} NNSG2dCharacterDataMapingType;
+
+typedef struct NNSG2dCharacterData {
+    u16 H;
+    u16 W;
+    GXTexFmt pixelFmt;
+    GXOBJVRamModeChar mapingType;
+    u32 characterFmt;
+    u32 szByte;
+    void* pRawData;
+} NNSG2dCharacterData;
+
+typedef struct NNSG2dPaletteCompressInfo {
+    u16 numPalette;
+    u16 pad16;
+    void* pPlttIdxTbl;
+} NNSG2dPaletteCompressInfo;
+
+typedef struct NNSG2dPaletteData {
+    GXTexFmt fmt;
+    BOOL bExtendedPlt;
+    u32 szByte;
+    void* pRawData;
+} NNSG2dPaletteData;
+
+#endif //NNSYS_G2D_FMT_G2D_CHARACTER_DATA_H_
diff --git a/lib/include/nnsys/g2d/fmt/g2d_MultiCell_data.h b/lib/include/nnsys/g2d/fmt/g2d_MultiCell_data.h
new file mode 100644
index 0000000000..18d8f607dc
--- /dev/null
+++ b/lib/include/nnsys/g2d/fmt/g2d_MultiCell_data.h
@@ -0,0 +1,26 @@
+#ifndef NNSYS_G2D_FMT_G2D_MULTICELL_DATA_H_
+#define NNSYS_G2D_FMT_G2D_MULTICELL_DATA_H_
+
+typedef struct NNSG2dMultiCellHierarchyData {
+    u16 animSequenceIdx;
+    s16 posX;
+    s16 posY;
+    u16 nodeAttr;
+} NNSG2dMultiCellHierarchyData;
+
+typedef struct NNSG2dMultiCellData {
+    u16 numNodes;
+    u16 numCellAnim;
+    NNSG2dMultiCellHierarchyData* pHierDataArray;
+} NNSG2dMultiCellData;
+
+typedef struct NNSG2dMultiCellDataBank {
+    u16 numMultiCellData;
+    u16 pad16;
+    NNSG2dMultiCellData* pMultiCellDataArray;
+    NNSG2dMultiCellHierarchyData* pHierarchyDataArray;
+    void* pStringBank;
+    void* pExtendedData;
+} NNSG2dMultiCellDataBank;
+
+#endif //NNSYS_G2D_FMT_G2D_MULTICELL_DATA_H_
diff --git a/lib/include/nnsys/g2d/fmt/g2d_Screen_data.h b/lib/include/nnsys/g2d/fmt/g2d_Screen_data.h
new file mode 100644
index 0000000000..b4aa2c71b3
--- /dev/null
+++ b/lib/include/nnsys/g2d/fmt/g2d_Screen_data.h
@@ -0,0 +1,13 @@
+#ifndef NNSYS_G2D_FMT_G2D_SCREEN_DATA_H_
+#define NNSYS_G2D_FMT_G2D_SCREEN_DATA_H_
+
+typedef struct NNSG2dScreenData {
+    u16 screenWidth;
+    u16 screenHeight;
+    u16 colorMode;
+    u16 screenFormat;
+    u32 szByte;
+    u32 rawData[1];
+} NNSG2dScreenData;
+
+#endif //NNSYS_G2D_FMT_G2D_SCREEN_DATA_H_
diff --git a/lib/include/nnsys/g2d/g2d_CellAnimation.h b/lib/include/nnsys/g2d/g2d_CellAnimation.h
new file mode 100644
index 0000000000..3ffbcdab49
--- /dev/null
+++ b/lib/include/nnsys/g2d/g2d_CellAnimation.h
@@ -0,0 +1,6 @@
+#ifndef NNSYS_G2D_G2D_CELLANIMATION_H_
+#define NNSYS_G2D_G2D_CELLANIMATION_H_
+
+typedef NNSG2dAnimBankData NNSG2dCellAnimBankData;
+
+#endif //NNSYS_G2D_G2D_CELLANIMATION_H_
diff --git a/lib/include/nnsys/g2d/g2d_Image.h b/lib/include/nnsys/g2d/g2d_Image.h
new file mode 100644
index 0000000000..71b0226c86
--- /dev/null
+++ b/lib/include/nnsys/g2d/g2d_Image.h
@@ -0,0 +1,42 @@
+#ifndef NNSYS_G2D_G2D_IMAGE_H_
+#define NNSYS_G2D_G2D_IMAGE_H_
+
+typedef enum NNS_G2D_VRAM_TYPE {
+    NNS_G2D_VRAM_TYPE_3DMAIN = 0,
+    NNS_G2D_VRAM_TYPE_2DMAIN = 1,
+    NNS_G2D_VRAM_TYPE_2DSUB  = 2,
+    NNS_G2D_VRAM_TYPE_MAX    = 3
+} NNS_G2D_VRAM_TYPE;
+
+typedef struct NNSG2dVRamLocation {
+    u32 baseAddrOfVram[ NNS_G2D_VRAM_TYPE_MAX ];
+} NNSG2dVRamLocation;
+
+typedef struct NNSG2dImageAttr {
+    GXTexSizeS sizeS;
+    GXTexSizeT sizeT;
+    GXTexFmt fmt;
+    BOOL bExtendedPlt;
+    GXTexPlttColor0 plttUse;
+    GXOBJVRamModeChar mappingType;
+} NNSG2dImageAttr;
+
+typedef struct NNSG2dImageProxy {
+    NNSG2dVRamLocation vramLocation;
+    NNSG2dImageAttr attr;
+} NNSG2dImageProxy;
+
+typedef struct NNSG2dImagePaletteProxy {
+    GXTexFmt fmt;
+    BOOL bExtendedPlt;
+    NNSG2dVRamLocation vramLocation;
+} NNSG2dImagePaletteProxy;
+
+void NNS_G2dLoadPaletteEx(const NNSG2dPaletteData* pSrcData, const NNSG2dPaletteCompressInfo* pCmpInfo, u32 addr, NNS_G2D_VRAM_TYPE type, NNSG2dImagePaletteProxy* pPltProxy);
+void NNS_G2dLoadPalette(const NNSG2dPaletteData* pSrcData, u32 addr, NNS_G2D_VRAM_TYPE type, NNSG2dImagePaletteProxy* pPltProxy);
+void NNS_G2dLoadImage1DMapping(const NNSG2dCharacterData* pSrcData, u32 baseAddr, NNS_G2D_VRAM_TYPE type, NNSG2dImageProxy* pImgProxy);
+void NNS_G2dLoadImage2DMapping(const NNSG2dCharacterData* pSrcData, u32 baseAddr, NNS_G2D_VRAM_TYPE type, NNSG2dImageProxy* pImgProxy);
+u32 NNS_G2dGetImageLocation (const NNSG2dImageProxy* pImg, NNS_G2D_VRAM_TYPE type);
+u32 NNS_G2dGetImagePaletteLocation(const NNSG2dImagePaletteProxy* pImg, NNS_G2D_VRAM_TYPE type);
+
+#endif //NNSYS_G2D_G2D_IMAGE_H_
diff --git a/lib/include/nnsys/g2d/g2d_MultiCellAnimation.h b/lib/include/nnsys/g2d/g2d_MultiCellAnimation.h
new file mode 100644
index 0000000000..c4779a320f
--- /dev/null
+++ b/lib/include/nnsys/g2d/g2d_MultiCellAnimation.h
@@ -0,0 +1,6 @@
+#ifndef NNSYS_G2D_G2D_MULTICELLANIMATION_H_
+#define NNSYS_G2D_G2D_MULTICELLANIMATION_H_
+
+typedef NNSG2dAnimBankData NNSG2dMultiCellAnimBankData;
+
+#endif //NNSYS_G2D_G2D_MULTICELLANIMATION_H_
diff --git a/lib/include/nnsys/g2d/g2d_OAM.h b/lib/include/nnsys/g2d/g2d_OAM.h
new file mode 100644
index 0000000000..35242de677
--- /dev/null
+++ b/lib/include/nnsys/g2d/g2d_OAM.h
@@ -0,0 +1,6 @@
+#ifndef NNSYS_G2D_G2D_OAM_H_
+#define NNSYS_G2D_G2D_OAM_H_
+
+void NNS_G2dInitOamManagerModule();
+
+#endif //NNSYS_G2D_G2D_OAM_H_
diff --git a/lib/include/nnsys/g2d/g2d_PaletteTable.h b/lib/include/nnsys/g2d/g2d_PaletteTable.h
new file mode 100644
index 0000000000..c69b6117ea
--- /dev/null
+++ b/lib/include/nnsys/g2d/g2d_PaletteTable.h
@@ -0,0 +1,10 @@
+#ifndef NNSYS_G2D_G2D_PALETTE_TABLE_H_
+#define NNSYS_G2D_G2D_PALETTE_TABLE_H_
+
+#define NNS_G2D_NUM_COLOR_PALETTE   16
+
+typedef struct NNSG2dPaletteSwapTable {
+    u16 paletteIndex[NNS_G2D_NUM_COLOR_PALETTE];
+} NNSG2dPaletteSwapTable;
+
+#endif //NNSYS_G2D_G2D_PALETTE_TABLE_H_
diff --git a/lib/include/nnsys/g2d/g2d_Renderer.h b/lib/include/nnsys/g2d/g2d_Renderer.h
new file mode 100644
index 0000000000..ca74c7d52e
--- /dev/null
+++ b/lib/include/nnsys/g2d/g2d_Renderer.h
@@ -0,0 +1,52 @@
+#ifndef NNSYS_G2D_G2D_RENDERER_H_
+#define NNSYS_G2D_G2D_RENDERER_H_
+
+struct NNSG2dRendererInstance;
+struct NNSG2dRenderSurface;
+
+typedef BOOL(*NNSG2dRndCellCullingFunction)(const NNSG2dCellData* pCell, const MtxFx32* pMtx, const NNSG2dViewRect* pViewRec);
+
+typedef void(*NNSG2dRndDrawCellCallBack)(struct NNSG2dRendererInstance* pRend, struct NNSG2dRenderSurface* pSurface, const NNSG2dCellData* pCell, const MtxFx32* pMtx);
+
+typedef void(*NNSG2dRndDrawOamCallBack)(struct NNSG2dRendererInstance* pRend, struct NNSG2dRenderSurface* pSurface, const NNSG2dCellData* pCell, u16 oamIdx, const MtxFx32* pMtx);
+
+typedef struct NNSG2dRenderSurface {
+    union {
+        NNSG2dRndCoreSurface coreSurface;
+        struct {
+            NNSG2dViewRect viewRect;
+            BOOL bActive;
+            NNSG2dSurfaceType type;
+            NNSG2dRndCoreDrawCellCallBack pBeforeCoreDrawCellBack;
+            NNSG2dRndCoreDrawCellCallBack pAfterCoreDrawCellBack;
+            NNSG2dRndCoreDrawOamCallBack pBeforeCoreDrawOamBack;
+            NNSG2dRndCoreDrawOamCallBack pAfterCoreDrawOamBack;
+        };
+    };
+    NNSG2dOamRegisterFunction pFuncOamRegister;
+    NNSG2dAffineRegisterFunction pFuncOamAffineRegister;
+    void* pNextSurface;
+    NNSG2dRndCellCullingFunction pFuncVisibilityCulling;
+    NNSG2dRndDrawCellCallBack pBeforeDrawCellBackFunc;
+    NNSG2dRndDrawCellCallBack pAfterDrawCellBackFunc;
+    NNSG2dRndDrawOamCallBack pBeforeDrawOamBackFunc;
+    NNSG2dRndDrawOamCallBack pAfterDrawOamBackFunc;
+} NNSG2dRenderSurface;
+
+typedef struct NNSG2dRendererInstance {
+    NNSG2dRndCoreInstance rendererCore;
+    NNSG2dRenderSurface* pTargetSurfaceList;
+    NNSG2dRenderSurface* pCurrentSurface;
+    const NNSG2dPaletteSwapTable* pPaletteSwapTbl;
+    u32 opzHint;
+    fx32 spriteZoffsetStep;
+    u32 overwriteEnableFlag;
+    u16 overwritePriority;
+    u16 overwritePlttNo;
+    GXOamMode overwriteObjMode;
+    BOOL overwriteMosaicFlag;
+    u16 overwritePlttNoOffset;
+    u16 pad16_;
+} NNSG2dRendererInstance;
+
+#endif //NNSYS_G2D_G2D_RENDERER_H_
diff --git a/lib/include/nnsys/g2d/g2d_RendererCore.h b/lib/include/nnsys/g2d/g2d_RendererCore.h
new file mode 100644
index 0000000000..45e8c38d66
--- /dev/null
+++ b/lib/include/nnsys/g2d/g2d_RendererCore.h
@@ -0,0 +1,72 @@
+#ifndef NNSYS_G2D_G2D_RENDERERCORE_H_
+#define NNSYS_G2D_G2D_RENDERERCORE_H_
+
+#define MtxCache_NOT_AVAILABLE                  0xFFFF
+#define MtxCache_NOT_AVAILABLE_ForMemFill       0xFFFFFFFF
+#define NNS_G2D_NUMBER_OF_2DGRAPHICS_ENGINE     2
+#define NNS_G2D_RNDCORE_INTERNAL_OAMBUFFER_SIZE 128
+#define NNS_G2D_OAMFLIP_PATTERN_NUM             0x04
+
+struct NNSG2dRndCoreInstance;
+
+typedef struct NNSG2dRndCore2DMtxCache {
+    MtxFx22 m22;
+    u16 affineIndex[NNS_G2D_OAMFLIP_PATTERN_NUM][NNS_G2D_NUMBER_OF_2DGRAPHICS_ENGINE];
+} NNSG2dRndCore2DMtxCache;
+
+typedef struct NNSG2dViewRect {
+    NNSG2dFVec2 posTopLeft;
+    NNSG2dFVec2 sizeView;
+} NNSG2dViewRect;
+
+typedef enum NNSG2dSurfaceType {
+    NNS_G2D_SURFACETYPE_MAIN3D = 0x00,
+    NNS_G2D_SURFACETYPE_MAIN2D = 0x01,
+    NNS_G2D_SURFACETYPE_SUB2D  = 0x02,
+    NNS_G2D_SURFACETYPE_MAX    = 0x03
+} NNSG2dSurfaceType;
+
+typedef enum NNSG2dRendererAffineTypeOverwiteMode {
+    NNS_G2D_RND_AFFINE_OVERWRITE_NONE,
+    NNS_G2D_RND_AFFINE_OVERWRITE_NORMAL,
+    NNS_G2D_RND_AFFINE_OVERWRITE_DOUBLE
+} NNSG2dRendererAffineTypeOverwiteMode;
+
+typedef void(*NNSG2dRndCoreDrawCellCallBack)(struct NNSG2dRndCoreInstance* pRend, const NNSG2dCellData* pCell);
+
+typedef void(*NNSG2dRndCoreDrawOamCallBack)(struct NNSG2dRndCoreInstance* pRend, const NNSG2dCellData* pCell, u16 oamIdx);
+
+typedef BOOL (*NNSG2dOamRegisterFunction) (const GXOamAttr* pOam, u16 affineIndex, BOOL bDoubleAffine);
+
+typedef u16 (*NNSG2dAffineRegisterFunction) (const MtxFx22* mtx);
+
+typedef struct NNSG2dRndCoreSurface {
+    NNSG2dViewRect viewRect;
+    BOOL bActive;
+    NNSG2dSurfaceType type;
+    NNSG2dRndCoreDrawCellCallBack pBeforeDrawCellBackFunc;
+    NNSG2dRndCoreDrawCellCallBack pAfterDrawCellBackFunc;
+    NNSG2dRndCoreDrawOamCallBack pBeforeDrawOamBackFunc;
+    NNSG2dRndCoreDrawOamCallBack pAfterDrawOamBackFunc;
+} NNSG2dRndCoreSurface;
+
+typedef struct NNSG2dRndCoreInstance {
+    NNSG2dRndCoreSurface* pCurrentTargetSurface;
+    NNSG2dRendererAffineTypeOverwiteMode affineOverwriteMode;
+    const struct NNSG2dImageProxy* pImgProxy;
+    const struct NNSG2dImagePaletteProxy* pPltProxy;
+    u32 base2DCharOffset;
+    u32 baseTexAddr3D;
+    u32 basePltAddr3D;
+    NNSG2dOamRegisterFunction pFuncOamRegister;
+    NNSG2dAffineRegisterFunction pFuncOamAffineRegister;
+    u32 flipFlag;
+    NNSG2dRndCore2DMtxCache* pCurrentMtxCacheFor2D;
+    const MtxFx32* pCurrentMxt;
+    BOOL bDrawEnable;
+    fx32 zFor3DSoftwareSprite;
+    GXOamAttr currentOam;
+    MtxFx43 mtxFor3DGE;
+} NNSG2dRndCoreInstance;
+
+#endif //NNSYS_G2D_G2D_RENDERERCORE_H_
diff --git a/lib/include/nnsys/g2d/g2d_Vec_data.h b/lib/include/nnsys/g2d/g2d_Vec_data.h
new file mode 100644
index 0000000000..0109afe927
--- /dev/null
+++ b/lib/include/nnsys/g2d/g2d_Vec_data.h
@@ -0,0 +1,19 @@
+#ifndef NNSYS_G2D_G2D_VEC_DATA_H_
+#define NNSYS_G2D_G2D_VEC_DATA_H_
+
+typedef struct NNSG2dFVec2 {
+    fx32 x;
+    fx32 y;
+} NNSG2dFVec2;
+
+typedef union {
+    struct {
+        fx32 _00, _01;
+        fx32 _10, _11;
+        fx32 _20, _21;
+    };
+    fx32 m[3][2];
+    fx32 a[6];
+} MtxFx32;
+
+#endif //NNSYS_G2D_G2D_VEC_DATA_H_
diff --git a/lib/include/nnsys/g2d/load/g2d_NAN_load.h b/lib/include/nnsys/g2d/load/g2d_NAN_load.h
new file mode 100644
index 0000000000..f59b57da61
--- /dev/null
+++ b/lib/include/nnsys/g2d/load/g2d_NAN_load.h
@@ -0,0 +1,7 @@
+#ifndef NNSYS_G2D_LOAD_G2D_NAN_LOAD_H_
+#define NNSYS_G2D_LOAD_G2D_NAN_LOAD_H_
+
+BOOL NNS_G2dGetUnpackedAnimBank(void *pNanrFile, NNSG2dAnimBankData **ppAnimBank);
+BOOL NNS_G2dGetUnpackedMCAnimBank(void* pNanrFile, NNSG2dAnimBankData** ppAnimBank);
+
+#endif //NNSYS_G2D_LOAD_G2D_NAN_LOAD_H_
diff --git a/lib/include/nnsys/g2d/load/g2d_NCE_load.h b/lib/include/nnsys/g2d/load/g2d_NCE_load.h
new file mode 100644
index 0000000000..05d566cf26
--- /dev/null
+++ b/lib/include/nnsys/g2d/load/g2d_NCE_load.h
@@ -0,0 +1,6 @@
+#ifndef NNSYS_G2D_LOAD_G2D_NCE_LOAD_H_
+#define NNSYS_G2D_LOAD_G2D_NCE_LOAD_H_
+
+BOOL NNS_G2dGetUnpackedCellBank(void *pNcerFile, NNSG2dCellDataBank **ppCellBank);
+
+#endif //NNSYS_G2D_LOAD_G2D_NCE_LOAD_H_
diff --git a/lib/include/nnsys/g2d/load/g2d_NCG_load.h b/lib/include/nnsys/g2d/load/g2d_NCG_load.h
new file mode 100644
index 0000000000..a8089ed8dd
--- /dev/null
+++ b/lib/include/nnsys/g2d/load/g2d_NCG_load.h
@@ -0,0 +1,7 @@
+#ifndef NNSYS_G2D_LOAD_G2D_NCG_LOAD_H_
+#define NNSYS_G2D_LOAD_G2D_NCG_LOAD_H_
+
+BOOL NNS_G2dGetUnpackedBGCharacterData(void *pNcgrFile, NNSG2dCharacterData **ppCharData);
+BOOL NNS_G2dGetUnpackedCharacterData(void *pNcgrFile, NNSG2dCharacterData **ppCharData);
+
+#endif //NNSYS_G2D_LOAD_G2D_NCG_LOAD_H_
diff --git a/lib/include/nnsys/g2d/load/g2d_NCL_load.h b/lib/include/nnsys/g2d/load/g2d_NCL_load.h
new file mode 100644
index 0000000000..471ae04fa6
--- /dev/null
+++ b/lib/include/nnsys/g2d/load/g2d_NCL_load.h
@@ -0,0 +1,7 @@
+#ifndef NNSYS_G2D_LOAD_G2D_NCL_LOAD_H_
+#define NNSYS_G2D_LOAD_G2D_NCL_LOAD_H_
+
+BOOL NNS_G2dGetUnpackedPaletteData(void *pNclrFile, NNSG2dPaletteData** ppPlttData);
+BOOL NNS_G2dGetUnpackedPaletteCompressInfo(void *pNclrFile, NNSG2dPaletteCompressInfo** ppPltCmpInfo);
+
+#endif //NNSYS_G2D_LOAD_G2D_NCL_LOAD_H_
diff --git a/lib/include/nnsys/g2d/load/g2d_NMC_load.h b/lib/include/nnsys/g2d/load/g2d_NMC_load.h
new file mode 100644
index 0000000000..65873703db
--- /dev/null
+++ b/lib/include/nnsys/g2d/load/g2d_NMC_load.h
@@ -0,0 +1,6 @@
+#ifndef NNSYS_G2D_LOAD_G2D_NMC_LOAD_H_
+#define NNSYS_G2D_LOAD_G2D_NMC_LOAD_H_
+
+BOOL NNS_G2dGetUnpackedMultiCellBank (void* pNmcrFile, NNSG2dMultiCellDataBank** ppMCBank);
+
+#endif //NNSYS_G2D_LOAD_G2D_NMC_LOAD_H_
diff --git a/lib/include/nnsys/g2d/load/g2d_NSC_load.h b/lib/include/nnsys/g2d/load/g2d_NSC_load.h
new file mode 100644
index 0000000000..00739f7958
--- /dev/null
+++ b/lib/include/nnsys/g2d/load/g2d_NSC_load.h
@@ -0,0 +1,6 @@
+#ifndef NNSYS_G2D_LOAD_G2D_NSC_LOAD_H_
+#define NNSYS_G2D_LOAD_G2D_NSC_LOAD_H_
+
+BOOL NNS_G2dGetUnpackedScreenData(void* pNscrFile, NNSG2dScreenData** ppScrData);
+
+#endif //NNSYS_G2D_LOAD_G2D_NSC_LOAD_H_
diff --git a/lib/include/nnsys/g3d.h b/lib/include/nnsys/g3d.h
new file mode 100644
index 0000000000..2ed7c5df61
--- /dev/null
+++ b/lib/include/nnsys/g3d.h
@@ -0,0 +1,18 @@
+#ifndef NNSYS_G3D_H_
+#define NNSYS_G3D_H_
+
+#include <nnsys/g3d/binres/res_struct.h>
+#include <nnsys/g3d/binres/res_struct_accessor.h>
+#include <nnsys/g3d/binres/res_struct_accessor_anm.h>
+#include <nnsys/g3d/binres/res_struct_accessor_inline.h>
+#include <nnsys/g3d/config.h>
+#include <nnsys/g3d/kernel.h>
+#include <nnsys/g3d/kernel_inline.h>
+#include <nnsys/g3d/util.h>
+#include <nnsys/g3d/glbstate.h>
+#include <nnsys/g3d/glbstate_inline.h>
+#include <nnsys/g3d/gecom.h>
+#include <nnsys/g3d/gecom_inline.h>
+#include <nnsys/g3d/mem.h>
+
+#endif //NNSYS_G3D_H_
diff --git a/lib/include/nnsys/g3d/binres/res_struct.h b/lib/include/nnsys/g3d/binres/res_struct.h
new file mode 100644
index 0000000000..bd6b2fc4e0
--- /dev/null
+++ b/lib/include/nnsys/g3d/binres/res_struct.h
@@ -0,0 +1,146 @@
+#ifndef NNSYS_G3D_BINRES_RES_STRUCT_H_
+#define NNSYS_G3D_BINRES_RES_STRUCT_H_
+
+typedef struct NNSG3dResDataBlockHeader_ {
+    union {
+        u32 kind;
+        char chr[4];
+    };
+    u32 size;
+} NNSG3dResDataBlockHeader;
+
+typedef struct NNSG3dResTexInfo_ {
+    NNSGfdTexKey vramKey;
+    u16 sizeTex;
+    u16 ofsDict;
+    u16 flag;
+    u16 dummy_;
+    u32 ofsTex;
+} NNSG3dResTexInfo;
+
+typedef struct NNSG3dResTex4x4Info_ {
+    NNSGfdTexKey vramKey;
+    u16 sizeTex;
+    u16 ofsDict;
+    u16 flag;
+    u16 dummy_;
+    u32 ofsTex;
+    u32 ofsTexPlttIdx;
+} NNSG3dResTex4x4Info;
+
+typedef struct NNSG3dResPlttInfo_ {
+    NNSGfdTexKey vramKey;
+    u16 sizePltt;
+    u16 flag;
+    u16 ofsDict;
+    u16 dummy_;
+    u32 ofsPlttData;
+} NNSG3dResPlttInfo;
+
+typedef struct NNSG3dResMdlInfo_ {
+    u8 sbcType;
+    u8 scalingRule;
+    u8 texMtxMode;
+    u8 numNode;
+    u8 numMat;
+    u8 numShp;
+    u8 firstUnusedMtxStackID;
+    u8 dummy_;
+    fx32 posScale;
+    fx32 invPosScale;
+    u16 numVertex;
+    u16 numPolygon;
+    u16 numTriangle;
+    u16 numQuad;
+    fx16 boxX, boxY, boxZ;
+    fx16 boxW, boxH, boxD;
+    fx32 boxPosScale;
+    fx32 boxInvPosScale;
+} NNSG3dResMdlInfo;
+
+typedef struct NNSG3dResDictTreeNode_ {
+    u8 refBit;
+    u8 idxLeft;
+    u8 idxRight;
+    u8 idxEntry;
+} NNSG3dResDictTreeNode;
+
+typedef struct NNSG3dResDict_ {
+    u8 revision;
+    u8 numEntry;
+    u16 sizeDictBlk;
+    u16 dummy_;
+    u16 ofsEntry;
+    NNSG3dResDictTreeNode node[1];
+} NNSG3dResDict;
+
+
+#define NNS_G3D_RESNAME_SIZE    (16)
+#define NNS_G3D_RESNAME_VALSIZE (NNS_G3D_RESNAME_SIZE / sizeof(u32))
+typedef union NNSG3dResName_ {
+    char name[NNS_G3D_RESNAME_SIZE];
+    u32 val[NNS_G3D_RESNAME_VALSIZE];
+} NNSG3dResName;
+
+typedef struct NNSG3dResNodeInfo_ {
+    NNSG3dResDict dict;
+} NNSG3dResNodeInfo;
+
+typedef struct NNSG3dResTex_ {
+    NNSG3dResDataBlockHeader header;
+    NNSG3dResTexInfo         texInfo;
+    NNSG3dResTex4x4Info      tex4x4Info;
+    NNSG3dResPlttInfo        plttInfo;
+    NNSG3dResDict            dict;
+} NNSG3dResTex;
+
+typedef struct NNSG3dResMdl_ {
+    u32 size;
+    u32 ofsSbc;
+    u32 ofsMat;
+    u32 ofsShp;
+    u32 ofsEvpMtx;
+    NNSG3dResMdlInfo info;
+    NNSG3dResNodeInfo nodeInfo;
+} NNSG3dResMdl;
+
+typedef struct NNSG3dResFileHeader_ {
+    union {
+        char signature[4];
+        u32  sigVal;
+    };
+    u16 byteOrder;
+    u16 version;
+    u32 fileSize;
+    u16 headerSize;
+    u16 dataBlocks;
+} NNSG3dResFileHeader;
+
+typedef struct NNSG3dResMdlSet_ {
+    NNSG3dResDataBlockHeader header;
+    NNSG3dResDict dict;
+} NNSG3dResMdlSet;
+
+typedef struct NNSG3dResAnmHeader_ {
+    u8 category0;
+    u8 revision;
+    u16 category1;
+} NNSG3dResAnmHeader;
+
+typedef struct {
+    NNSG3dResAnmHeader anmHeader;
+    u16 numFrame;
+    u16 dummy_;
+} NNSG3dResAnmCommon;
+
+typedef struct NNSG3dResDictEntryHeader_ {
+    u16 sizeUnit;
+    u16 ofsName;
+    u8 data[4];
+} NNSG3dResDictEntryHeader;
+
+typedef struct NNSG3dResDictMdlSetData_ {
+    u32 offset;
+} NNSG3dResDictMdlSetData;
+
+#endif //NNSYS_G3D_BINRES_RES_STRUCT_H_
diff --git a/lib/include/nnsys/g3d/binres/res_struct_accessor.h b/lib/include/nnsys/g3d/binres/res_struct_accessor.h
new file mode 100644
index 0000000000..9bb4f276b6
--- /dev/null
+++ b/lib/include/nnsys/g3d/binres/res_struct_accessor.h
@@ -0,0 +1,7 @@
+#ifndef NNSYS_G3D_BINRES_RES_STRUCT_ACCESSOR_H
+#define NNSYS_G3D_BINRES_RES_STRUCT_ACCESSOR_H
+
+NNSG3dResMdlSet* NNS_G3dGetMdlSet(const NNSG3dResFileHeader* header);
+NNSG3dResTex* NNS_G3dGetTex(const NNSG3dResFileHeader* header);
+
+#endif //NNSYS_G3D_BINRES_RES_STRUCT_ACCESSOR_H
diff --git a/lib/include/nnsys/g3d/binres/res_struct_accessor_anm.h b/lib/include/nnsys/g3d/binres/res_struct_accessor_anm.h
new file mode 100644
index 0000000000..44bd6cd933
--- /dev/null
+++ b/lib/include/nnsys/g3d/binres/res_struct_accessor_anm.h
@@ -0,0 +1,6 @@
+#ifndef NNSYS_G3D_RES_STRUCT_ACCESSOR_ANM_H_
+#define NNSYS_G3D_RES_STRUCT_ACCESSOR_ANM_H_
+
+void* NNS_G3dGetAnmByIdx(const void* pRes, u32 idx);
+
+#endif //NNSYS_G3D_RES_STRUCT_ACCESSOR_ANM_H_
diff --git a/lib/include/nnsys/g3d/binres/res_struct_accessor_inline.h b/lib/include/nnsys/g3d/binres/res_struct_accessor_inline.h
new file mode 100644
index 0000000000..06d9c11a8c
--- /dev/null
+++ b/lib/include/nnsys/g3d/binres/res_struct_accessor_inline.h
@@ -0,0 +1,27 @@
+#ifndef NNSYS_G3D_BINRES_RES_STRUCT_ACCESSOR_INLINE_H_
+#define NNSYS_G3D_BINRES_RES_STRUCT_ACCESSOR_INLINE_H_
+
+static inline void* NNS_G3dGetResDataByIdx(const NNSG3dResDict* dict, u32 idx) {
+    NNSG3dResDictEntryHeader* hdr;
+
+    if (dict != NULL && idx < dict->numEntry) {
+        hdr = (NNSG3dResDictEntryHeader*)((u8*)dict + dict->ofsEntry);
+        return (void*)(&hdr->data[0] + hdr->sizeUnit * idx);
+    } else {
+        return NULL;
+    }
+}
+
+static inline NNSG3dResMdl* NNS_G3dGetMdlByIdx(const NNSG3dResMdlSet* mdlSet, u32 idx) {
+    NNSG3dResDictMdlSetData* data;
+
+    if (mdlSet) {
+        data = (NNSG3dResDictMdlSetData*)NNS_G3dGetResDataByIdx(&mdlSet->dict, idx);
+        if (data) {
+            return (NNSG3dResMdl*)((u8*)mdlSet + data->offset);
+        }
+    }
+    return NULL;
+}
+
+#endif //NNSYS_G3D_BINRES_RES_STRUCT_ACCESSOR_INLINE_H_
diff --git a/lib/include/nnsys/g3d/config.h b/lib/include/nnsys/g3d/config.h
new file mode 100644
index 0000000000..5e9b2291fe
--- /dev/null
+++ b/lib/include/nnsys/g3d/config.h
@@ -0,0 +1,16 @@
+#ifndef NNSYS_G3D_CONFIG_H_
+#define NNSYS_G3D_CONFIG_H_
+
+#ifndef NNS_G3D_SIZE_JNT_MAX
+#define NNS_G3D_SIZE_JNT_MAX 64
+#endif
+
+#ifndef NNS_G3D_SIZE_MAT_MAX
+#define NNS_G3D_SIZE_MAT_MAX 64
+#endif
+
+#ifndef NNS_G3D_SIZE_SHP_MAX
+#define NNS_G3D_SIZE_SHP_MAX 64
+#endif
+
+#endif //NNSYS_G3D_CONFIG_H_
diff --git a/lib/include/nnsys/g3d/gecom.h b/lib/include/nnsys/g3d/gecom.h
new file mode 100644
index 0000000000..5edf2db28d
--- /dev/null
+++ b/lib/include/nnsys/g3d/gecom.h
@@ -0,0 +1,6 @@
+#ifndef NNSYS_G3D_GECOM_H_
+#define NNSYS_G3D_GECOM_H_
+
+void NNS_G3dGeBufferOP_N(u32 op, const u32* args, u32 num);
+
+#endif //NNSYS_G3D_GECOM_H_
diff --git a/lib/include/nnsys/g3d/gecom_inline.h b/lib/include/nnsys/g3d/gecom_inline.h
new file mode 100644
index 0000000000..69c44845c1
--- /dev/null
+++ b/lib/include/nnsys/g3d/gecom_inline.h
@@ -0,0 +1,20 @@
+#ifndef NNSYS_G3D_GECOM_INLINE_H_
+#define NNSYS_G3D_GECOM_INLINE_H_
+
+static inline void NNS_G3dGeMtxMode(GXMtxMode mode) {
+    NNS_G3dGeBufferOP_N(G3OP_MTX_MODE, (u32*)&mode, G3OP_MTX_MODE_NPARAMS);
+}
+
+static inline void NNS_G3dGePushMtx(void) {
+    NNS_G3dGeBufferOP_N(G3OP_MTX_PUSH, NULL, G3OP_MTX_PUSH_NPARAMS);
+}
+
+static inline void NNS_G3dGePopMtx(int num) {
+    NNS_G3dGeBufferOP_N(G3OP_MTX_POP, (u32*)&num, G3OP_MTX_POP_NPARAMS);
+}
+
+static inline void NNS_G3dGeMultMtx43(const MtxFx43* m) {
+    NNS_G3dGeBufferOP_N(G3OP_MTX_MULT_4x3, (u32*) m, G3OP_MTX_MULT_4x3_NPARAMS);
+}
+
+#endif //NNSYS_G3D_GECOM_INLINE_H_
diff --git a/lib/include/nnsys/g3d/glbstate.h b/lib/include/nnsys/g3d/glbstate.h
new file mode 100644
index 0000000000..b46849015b
--- /dev/null
+++ b/lib/include/nnsys/g3d/glbstate.h
@@ -0,0 +1,63 @@
+#ifndef NNSYS_G3D_GLBSTATE_H_
+#define NNSYS_G3D_GLBSTATE_H_
+
+typedef enum {
+    NNS_G3D_GLB_FLAG_FLUSH_WVP              = 0x00000001,
+    NNS_G3D_GLB_FLAG_FLUSH_VP               = 0x00000002,
+    NNS_G3D_GLB_FLAG_INVBASE_UPTODATE       = 0x00000004,
+    NNS_G3D_GLB_FLAG_INVCAMERA_UPTODATE     = 0x00000008,
+    NNS_G3D_GLB_FLAG_INVPROJ_UPTODATE       = 0x00000010,
+    NNS_G3D_GLB_FLAG_INVBASECAMERA_UPTODATE = 0x00000020,
+    NNS_G3D_GLB_FLAG_INVCAMERAPROJ_UPTODATE = 0x00000040,
+
+    NNS_G3D_GLB_FLAG_BASECAMERA_UPTODATE    = 0x00000080,
+
+    NNS_G3D_GLB_FLAG_SRTCAMERA_UPTODATE     = NNS_G3D_GLB_FLAG_BASECAMERA_UPTODATE,
+    NNS_G3D_GLB_FLAG_FLUSH_ALT              = NNS_G3D_GLB_FLAG_FLUSH_WVP
+} NNSG3dGlbFlag;
+
+typedef struct {
+    u32 cmd0;
+    u32 mtxmode_proj;
+    MtxFx44 projMtx;
+    u32 mtxmode_posvec;
+    MtxFx43 cameraMtx;
+    u32 cmd1;
+    u32 lightVec[4];
+    u32 cmd2;
+    u32 prmMatColor0;
+    u32 prmMatColor1;
+    u32 prmPolygonAttr;
+    u32 prmViewPort;
+    u32 cmd3;
+    u32 lightColor[4];
+    u32 cmd4;
+    MtxFx33 prmBaseRot;
+    VecFx32 prmBaseTrans;
+    VecFx32 prmBaseScale;
+    u32 prmTexImageParam;
+    u32 flag;
+    MtxFx43 invCameraMtx;
+    MtxFx43 srtCameraMtx;
+    MtxFx43 invSrtCameraMtx;
+    MtxFx43 invBaseMtx;
+    MtxFx44 invProjMtx;
+    MtxFx44 invCameraProjMtx;
+    VecFx32 camPos;
+    VecFx32 camUp;
+    VecFx32 camTarget;
+} NNSG3dGlb;
+
+extern NNSG3dGlb NNS_G3dGlb;
+
+void NNS_G3dGlbSetBaseTrans(const VecFx32 *pTrans);
+
+void NNS_G3dGlbSetBaseScale(const VecFx32 *pScale);
+void NNS_G3dGlbFlushP(void);
+void NNS_G3dDraw(NNSG3dRenderObj *pRenderObj);
+void NNS_G3dGlbLightVector(GXLightId lightID, fx16 x, fx16 y, fx16 z);
+void NNS_G3dGlbLightColor(GXLightId lightID, GXRgb rgb);
+void NNS_G3dGlbMaterialColorDiffAmb(GXRgb diffuse, GXRgb ambient, BOOL IsSetVtxColor);
+void NNS_G3dGlbMaterialColorSpecEmi(GXRgb specular, GXRgb emission, BOOL IsShininess);
+
+#endif //NNSYS_G3D_GLBSTATE_H_
diff --git a/lib/include/nnsys/g3d/glbstate_inline.h b/lib/include/nnsys/g3d/glbstate_inline.h
new file mode 100644
index 0000000000..0c568cd3d9
--- /dev/null
+++ b/lib/include/nnsys/g3d/glbstate_inline.h
@@ -0,0 +1,13 @@
+#ifndef NNSYS_G3D_GLBSTATE_INLINE_H_
+#define NNSYS_G3D_GLBSTATE_INLINE_H_
+
+static inline void NNS_G3dGlbSetBaseRot(const MtxFx33 *pRot) {
+    MI_Copy36B(pRot, &NNS_G3dGlb.prmBaseRot);
+    NNS_G3dGlb.flag &= ~(NNS_G3D_GLB_FLAG_BASECAMERA_UPTODATE | NNS_G3D_GLB_FLAG_INVBASE_UPTODATE | NNS_G3D_GLB_FLAG_INVBASECAMERA_UPTODATE);
+}
+
+static inline void NNS_G3dGlbFlush(void) {
+    NNS_G3dGlbFlushP();
+}
+
+#endif //NNSYS_G3D_GLBSTATE_INLINE_H_
diff --git a/lib/include/nnsys/g3d/kernel.h b/lib/include/nnsys/g3d/kernel.h
new file mode 100644
index 0000000000..9c16cfbb57
--- /dev/null
+++ b/lib/include/nnsys/g3d/kernel.h
@@ -0,0 +1,54 @@
+#ifndef NNSYS_G3D_KERNEL_H_
+#define NNSYS_G3D_KERNEL_H_
+
+typedef struct NNSG3dAnmObj_ {
+    fx32 frame;
+    fx32 ratio;
+    void* resAnm;
+    void* funcAnm;
+    struct NNSG3dAnmObj_* next;
+    const NNSG3dResTex* resTex;
+    u8 priority;
+    u8 numMapData;
+    u16 mapData[1];
+} NNSG3dAnmObj;
+
+struct NNSG3dMatAnmResult_;
+struct NNSG3dJntAnmResult_;
+struct NNSG3dVisAnmResult_;
+
+typedef BOOL (*NNSG3dFuncAnmBlendMat)(struct NNSG3dMatAnmResult_*, const NNSG3dAnmObj*, u32);
+typedef BOOL (*NNSG3dFuncAnmBlendJnt)(struct NNSG3dJntAnmResult_*, const NNSG3dAnmObj*, u32);
+typedef BOOL (*NNSG3dFuncAnmBlendVis)(struct NNSG3dVisAnmResult_*, const NNSG3dAnmObj*, u32);
+
+struct NNSG3dRS_;
+typedef void (*NNSG3dSbcCallBackFunc)(struct NNSG3dRS_*);
+
+typedef struct NNSG3dRenderObj_ {
+    u32 flag;
+    NNSG3dResMdl* resMdl;
+    NNSG3dAnmObj* anmMat;
+    NNSG3dFuncAnmBlendMat funcBlendMat;
+    NNSG3dAnmObj* anmJnt; // 10
+    NNSG3dFuncAnmBlendJnt funcBlendJnt;
+    NNSG3dAnmObj* anmVis;
+    NNSG3dFuncAnmBlendVis funcBlendVis;
+    NNSG3dSbcCallBackFunc cbFunc; // 20
+    u8 cbCmd;
+    u8 cbTiming;
+    u16 dummy_;
+    NNSG3dSbcCallBackFunc cbInitFunc;
+    void* ptrUser;
+    u8* ptrUserSbc; // 30
+    struct NNSG3dJntAnmResult_* recJntAnm;
+    struct NNSG3dMatAnmResult_* recMatAnm;
+    u32 hintMatAnmExist[NNS_G3D_SIZE_MAT_MAX / 32];
+    u32 hintJntAnmExist[NNS_G3D_SIZE_JNT_MAX / 32];
+    u32 hintVisAnmExist[NNS_G3D_SIZE_JNT_MAX / 32];
+} NNSG3dRenderObj; // size=0x54
+
+void NNS_G3dRenderObjAddAnmObj(NNSG3dRenderObj* pRenderObj, NNSG3dAnmObj* pAnmObj);
+void NNS_G3dRenderObjRemoveAnmObj(NNSG3dRenderObj* pRenderObj, NNSG3dAnmObj* pAnmObj);
+void NNS_G3dRenderObjInit(NNSG3dRenderObj* pRenderObj, NNSG3dResMdl* pResMdl);
+void NNS_G3dAnmObjInit(NNSG3dAnmObj* pAnmObj, void* pResAnm, const NNSG3dResMdl* pResMdl, const NNSG3dResTex* pResTex);
+#endif //NNSYS_G3D_KERNEL_H_
diff --git a/lib/include/nnsys/g3d/kernel_inline.h b/lib/include/nnsys/g3d/kernel_inline.h
new file mode 100644
index 0000000000..0361a58863
--- /dev/null
+++ b/lib/include/nnsys/g3d/kernel_inline.h
@@ -0,0 +1,14 @@
+#ifndef NNSYS_G3D_KERNEL_INLINE_H_
+#define NNSYS_G3D_KERNEL_INLINE_H_
+
+static inline void NNS_G3dAnmObjSetFrame(NNSG3dAnmObj* pAnmObj, fx32 frame) {
+    pAnmObj->frame = frame;
+}
+
+static inline fx32 NNS_G3dAnmObjGetNumFrame(const NNSG3dAnmObj* pAnmObj) {
+    const NNSG3dResAnmCommon* p;
+    p = (const NNSG3dResAnmCommon*) pAnmObj->resAnm;
+    return p->numFrame * FX32_ONE;
+}
+
+#endif //NNSYS_G3D_KERNEL_INLINE_H_
diff --git a/lib/include/nnsys/g3d/mem.h b/lib/include/nnsys/g3d/mem.h
new file mode 100644
index 0000000000..08ed6f38ac
--- /dev/null
+++ b/lib/include/nnsys/g3d/mem.h
@@ -0,0 +1,7 @@
+#ifndef NNSYS_G3D_MEM_H_
+#define NNSYS_G3D_MEM_H_
+
+NNSG3dAnmObj* NNS_G3dAllocAnmObj(NNSFndAllocator* pAlloc, const void* pAnm, const NNSG3dResMdl* pMdl);
+void NNS_G3dFreeAnmObj(NNSFndAllocator* pAlloc, NNSG3dAnmObj* pAnmObj);
+
+#endif //NNSYS_G3D_MEM_H_
diff --git a/lib/include/nnsys/g3d/util.h b/lib/include/nnsys/g3d/util.h
new file mode 100644
index 0000000000..93ad59874a
--- /dev/null
+++ b/lib/include/nnsys/g3d/util.h
@@ -0,0 +1,7 @@
+#ifndef NNS_G3D_UTIL_H_
+#define NNS_G3D_UTIL_H_
+
+void NNS_G3dInit(void);
+int NNS_G3dScrPosToWorldLine(int px, int py, VecFx32* pNear, VecFx32* pFar);
+
+#endif //NNS_G3D_UTIL_H_
diff --git a/lib/include/nnsys/gfd.h b/lib/include/nnsys/gfd.h
new file mode 100644
index 0000000000..48aed99c14
--- /dev/null
+++ b/lib/include/nnsys/gfd.h
@@ -0,0 +1,12 @@
+#ifndef NNSYS_GFD_H
+#define NNSYS_GFD_H
+
+#include <nnsys/gfd/VramManager/gfd_TexVramMan_Types.h>
+#include <nnsys/gfd/VramManager/gfd_PlttVramMan_Types.h>
+#include <nnsys/gfd/VramManager/gfd_LinkedListTexVramMan.h>
+#include <nnsys/gfd/VramManager/gfd_FrameTexVramMan.h>
+#include <nnsys/gfd/VramManager/gfd_LinkedListPlttVramMan.h>
+#include <nnsys/gfd/VramManager/gfd_FramePlttVramMan.h>
+#include <nnsys/gfd/VramTransferMan/gfd_VramTransferManager.h>
+
+#endif //NNSYS_GFD_H
diff --git a/lib/include/nnsys/gfd/VramManager/gfd_FramePlttVramMan.h b/lib/include/nnsys/gfd/VramManager/gfd_FramePlttVramMan.h
new file mode 100644
index 0000000000..cb8de0598a
--- /dev/null
+++ b/lib/include/nnsys/gfd/VramManager/gfd_FramePlttVramMan.h
@@ -0,0 +1,6 @@
+#ifndef NNSYS_GFD_VRAMMANAGER_GFD_FRAMEPLTTVRAMMAN_H_
+#define NNSYS_GFD_VRAMMANAGER_GFD_FRAMEPLTTVRAMMAN_H_
+
+void NNS_GfdInitFrmPlttVramManager(u32 szByte, BOOL useAsDefault);
+
+#endif //NNSYS_GFD_VRAMMANAGER_GFD_FRAMEPLTTVRAMMAN_H_
diff --git a/lib/include/nnsys/gfd/VramManager/gfd_FrameTexVramMan.h b/lib/include/nnsys/gfd/VramManager/gfd_FrameTexVramMan.h
new file mode 100644
index 0000000000..de7ad0937a
--- /dev/null
+++ b/lib/include/nnsys/gfd/VramManager/gfd_FrameTexVramMan.h
@@ -0,0 +1,6 @@
+#ifndef NNSYS_GFD_VRAMMANAGER_GFD_FRAMETEXVRAMMANAGER_H_
+#define NNSYS_GFD_VRAMMANAGER_GFD_FRAMETEXVRAMMANAGER_H_
+
+void NNS_GfdInitFrmTexVramManager(u16 numSlot, BOOL useAsDefault);
+
+#endif //NNSYS_GFD_VRAMMANAGER_GFD_FRAMETEXVRAMMANAGER_H_
diff --git a/lib/include/nnsys/gfd/VramManager/gfd_LinkedListPlttVramMan.h b/lib/include/nnsys/gfd/VramManager/gfd_LinkedListPlttVramMan.h
new file mode 100644
index 0000000000..8654468b2b
--- /dev/null
+++ b/lib/include/nnsys/gfd/VramManager/gfd_LinkedListPlttVramMan.h
@@ -0,0 +1,7 @@
+#ifndef NNSYS_GFD_VRAMMANAGER_GFD_LINKEDLISTPLTTVRAMMAN_H_
+#define NNSYS_GFD_VRAMMANAGER_GFD_LINKEDLISTPLTTVRAMMAN_H_
+
+u32 NNS_GfdGetLnkPlttVramManagerWorkSize(u32 numMemBlk);
+void NNS_GfdInitLnkPlttVramManager(u32 szByte, void *pManagementWork, u32 szByteManagementWork, BOOL useAsDefault);
+
+#endif //NNSYS_GFD_VRAMMANAGER_GFD_LINKEDLISTPLTTVRAMMAN_H_
diff --git a/lib/include/nnsys/gfd/VramManager/gfd_LinkedListTexVramMan.h b/lib/include/nnsys/gfd/VramManager/gfd_LinkedListTexVramMan.h
new file mode 100644
index 0000000000..16bd257b90
--- /dev/null
+++ b/lib/include/nnsys/gfd/VramManager/gfd_LinkedListTexVramMan.h
@@ -0,0 +1,7 @@
+#ifndef NNSYS_GFD_VRAMMANAGER_GFD_LINKEDLISTTEXVRAMMAN_H_
+#define NNSYS_GFD_VRAMMANAGER_GFD_LINKEDLISTTEXVRAMMAN_H_
+
+u32 NNS_GfdGetLnkTexVramManagerWorkSize( u32 numMemBlk );
+void NNS_GfdInitLnkTexVramManager(u32 szByte, u32 szByteFor4x4, void *pManagementWork, u32 szByteManagementWork, BOOL useAsDefault);
+
+#endif //NNSYS_GFD_VRAMMANAGER_GFD_LINKEDLISTTEXVRAMMAN_H_
diff --git a/lib/include/nnsys/gfd/VramManager/gfd_PlttVramMan_Types.h b/lib/include/nnsys/gfd/VramManager/gfd_PlttVramMan_Types.h
new file mode 100644
index 0000000000..8cdc6b20e3
--- /dev/null
+++ b/lib/include/nnsys/gfd/VramManager/gfd_PlttVramMan_Types.h
@@ -0,0 +1,20 @@
+#ifndef NNSYS_GFD_VRAMMANAGER_GFD_PLTTVRAMMAN_TYPES_H_
+#define NNSYS_GFD_VRAMMANAGER_GFD_PLTTVRAMMAN_TYPES_H_
+
+typedef u32 NNSGfdPlttKey;
+
+#define NNS_GFD_ALLOC_ERROR_PLTTKEY         (u32)0x0
+
+#define NNS_GFD_PLTTKEY_ADDR_SHIFT 3
+
+typedef NNSGfdPlttKey (*NNSGfdFuncAllocPlttVram)(u32 szByte, BOOL is4pltt, u32 opt);
+typedef int (*NNSGfdFuncFreePlttVram)(NNSGfdPlttKey plttKey);
+
+extern NNSGfdFuncAllocPlttVram NNS_GfdDefaultFuncAllocPlttVram;
+extern NNSGfdFuncFreePlttVram NNS_GfdDefaultFuncFreePlttVram;
+
+static inline u32 NNS_GfdGetPlttKeyAddr(NNSGfdPlttKey plttKey) {
+    return (u32)((0x0000FFFF & plttKey) << NNS_GFD_PLTTKEY_ADDR_SHIFT);
+}
+
+#endif //NNSYS_GFD_VRAMMANAGER_GFD_PLTTVRAMMAN_TYPES_H_
diff --git a/lib/include/nnsys/gfd/VramManager/gfd_TexVramMan_Types.h b/lib/include/nnsys/gfd/VramManager/gfd_TexVramMan_Types.h
new file mode 100644
index 0000000000..24d4a069a7
--- /dev/null
+++ b/lib/include/nnsys/gfd/VramManager/gfd_TexVramMan_Types.h
@@ -0,0 +1,20 @@
+#ifndef NNSYS_GFD_VRAMMANAGER_GFD_TEXVRAMMAN_TYPES_H_
+#define NNSYS_GFD_VRAMMANAGER_GFD_TEXVRAMMAN_TYPES_H_
+
+typedef u32 NNSGfdTexKey;
+
+#define NNS_GFD_ALLOC_ERROR_TEXKEY          (u32)0x0
+
+#define NNS_GFD_TEXKEY_ADDR_SHIFT 3
+
+typedef NNSGfdTexKey (*NNSGfdFuncAllocTexVram)(u32 szByte, BOOL is4x4comp, u32 opt);
+typedef int (*NNSGfdFuncFreeTexVram)(NNSGfdTexKey key);
+
+extern NNSGfdFuncAllocTexVram NNS_GfdDefaultFuncAllocTexVram;
+extern NNSGfdFuncFreeTexVram NNS_GfdDefaultFuncFreeTexVram;
+
+static inline u32 NNS_GfdGetTexKeyAddr(NNSGfdTexKey memKey) {
+    return (u32)((0x0000FFFF & memKey) << NNS_GFD_TEXKEY_ADDR_SHIFT);
+}
+
+#endif //NNSYS_GFD_VRAMMANAGER_GFD_TEXVRAMMAN_TYPES_H_
diff --git a/lib/include/nnsys/gfd/VramTransferMan/gfd_VramTransferManager.h b/lib/include/nnsys/gfd/VramTransferMan/gfd_VramTransferManager.h
new file mode 100644
index 0000000000..cc17411e8f
--- /dev/null
+++ b/lib/include/nnsys/gfd/VramTransferMan/gfd_VramTransferManager.h
@@ -0,0 +1,58 @@
+#ifndef NNSYS_GFD_VRAMTRANSFERMAN_GFD_VRAMTRANSFERMANAGER_H_
+#define NNSYS_GFD_VRAMTRANSFERMAN_GFD_VRAMTRANSFERMANAGER_H_
+
+typedef enum NNS_GFD_DST_TYPE {
+    NNS_GFD_DST_3D_TEX_VRAM = 0,
+    NNS_GFD_DST_3D_TEX_PLTT,
+    NNS_GFD_DST_3D_CLRIMG_COLOR,
+    NNS_GFD_DST_3D_CLRIMG_DEPTH,
+
+    NNS_GFD_DST_2D_BG0_CHAR_MAIN,
+    NNS_GFD_DST_2D_BG1_CHAR_MAIN,
+    NNS_GFD_DST_2D_BG2_CHAR_MAIN,
+    NNS_GFD_DST_2D_BG3_CHAR_MAIN,
+    NNS_GFD_DST_2D_BG0_SCR_MAIN,
+    NNS_GFD_DST_2D_BG1_SCR_MAIN,
+    NNS_GFD_DST_2D_BG2_SCR_MAIN,
+    NNS_GFD_DST_2D_BG3_SCR_MAIN,
+    NNS_GFD_DST_2D_BG2_BMP_MAIN,
+    NNS_GFD_DST_2D_BG3_BMP_MAIN,
+    NNS_GFD_DST_2D_OBJ_PLTT_MAIN,
+    NNS_GFD_DST_2D_BG_PLTT_MAIN,
+    NNS_GFD_DST_2D_OBJ_EXTPLTT_MAIN,
+    NNS_GFD_DST_2D_BG_EXTPLTT_MAIN,
+    NNS_GFD_DST_2D_OBJ_OAM_MAIN,
+    NNS_GFD_DST_2D_OBJ_CHAR_MAIN,
+
+    NNS_GFD_DST_2D_BG0_CHAR_SUB,
+    NNS_GFD_DST_2D_BG1_CHAR_SUB,
+    NNS_GFD_DST_2D_BG2_CHAR_SUB,
+    NNS_GFD_DST_2D_BG3_CHAR_SUB,
+    NNS_GFD_DST_2D_BG0_SCR_SUB,
+    NNS_GFD_DST_2D_BG1_SCR_SUB,
+    NNS_GFD_DST_2D_BG2_SCR_SUB,
+    NNS_GFD_DST_2D_BG3_SCR_SUB,
+    NNS_GFD_DST_2D_BG2_BMP_SUB,
+    NNS_GFD_DST_2D_BG3_BMP_SUB,
+    NNS_GFD_DST_2D_OBJ_PLTT_SUB,
+    NNS_GFD_DST_2D_BG_PLTT_SUB,
+    NNS_GFD_DST_2D_OBJ_EXTPLTT_SUB,
+    NNS_GFD_DST_2D_BG_EXTPLTT_SUB,
+    NNS_GFD_DST_2D_OBJ_OAM_SUB,
+    NNS_GFD_DST_2D_OBJ_CHAR_SUB,
+
+    NNS_GFD_DST_MAX
+} NNS_GFD_DST_TYPE;
+
+typedef struct NNSGfdVramTransferTask {
+    NNS_GFD_DST_TYPE type;
+    void* pSrc;
+    u32 dstAddr;
+    u32 szByte;
+} NNSGfdVramTransferTask;
+
+void NNS_GfdInitVramTransferManager (NNSGfdVramTransferTask* pTaskArray, u32 lengthOfArray);
+BOOL NNS_GfdRegisterNewVramTransferTask (NNS_GFD_DST_TYPE type, u32 dstAddr, void* pSrc, u32 szByte);
+void NNS_GfdDoVramTransfer(void);
+
+#endif //NNSYS_GFD_VRAMTRANSFERMAN_GFD_VRAMTRANSFERMANAGER_H_
diff --git a/lib/include/nnsys/snd.h b/lib/include/nnsys/snd.h
new file mode 100644
index 0000000000..154cd51ff1
--- /dev/null
+++ b/lib/include/nnsys/snd.h
@@ -0,0 +1,13 @@
+#ifndef NNSYS_SND_H_
+#define NNSYS_SND_H_
+
+#include <nnsys/snd/heap.h>
+#include <nnsys/snd/seqdata.h>
+#include <nnsys/snd/sndarc.h>
+#include <nnsys/snd/player.h>
+#include <nnsys/snd/sndarc_loader.h>
+#include <nnsys/snd/sndarc_player.h>
+#include <nnsys/snd/main.h>
+#include <nnsys/snd/waveout.h>
+
+#endif //NNSYS_SND_H_
diff --git a/lib/include/nnsys/snd/heap.h b/lib/include/nnsys/snd/heap.h
new file mode 100644
index 0000000000..af3edf8cc8
--- /dev/null
+++ b/lib/include/nnsys/snd/heap.h
@@ -0,0 +1,13 @@
+#ifndef NNSYS_SND_HEAP_H_
+#define NNSYS_SND_HEAP_H_
+
+struct NNSSndHeap;
+typedef struct NNSSndHeap* NNSSndHeapHandle;
+
+NNSSndHeapHandle NNS_SndHeapCreate(void *buf, u32 maxsize);
+int NNS_SndHeapSaveState(NNSSndHeapHandle heap);
+int NNS_SndHeapLoadState(NNSSndHeapHandle heap, int level);
+u32 NNS_SndHeapGetSize(NNSSndHeapHandle heap);
+u32 NNS_SndHeapGetFreeSize(NNSSndHeapHandle heap);
+
+#endif //NNSYS_SND_HEAP_H_
diff --git a/lib/include/nnsys/snd/main.h b/lib/include/nnsys/snd/main.h
new file mode 100644
index 0000000000..65342413ad
--- /dev/null
+++ b/lib/include/nnsys/snd/main.h
@@ -0,0 +1,10 @@
+#ifndef NNSYS_SND_MAIN_H_
+#define NNSYS_SND_MAIN_H_
+
+void NNS_SndInit(void);
+void NNS_SndMain(void);
+BOOL NNS_SndUpdateDriverInfo(void);
+BOOL NNS_SndReadDriverChannelInfo(int chNo, SNDChannelInfo* info);
+BOOL NNS_SndPlayerReadDriverTrackInfo(NNSSndHandle* handle, int trackNo, struct SNDTrackInfo* info);
+
+#endif //NNSYS_SND_MAIN_H_
diff --git a/lib/include/nnsys/snd/player.h b/lib/include/nnsys/snd/player.h
new file mode 100644
index 0000000000..ad185ed932
--- /dev/null
+++ b/lib/include/nnsys/snd/player.h
@@ -0,0 +1,18 @@
+#ifndef GUARD_PLAYER_H
+#define GUARD_PLAYER_H
+
+typedef struct NNSSndHandle
+{
+    struct NNSSndSeqPlayer* player;
+} NNSSndHandle;
+
+void NNS_SndHandleInit(NNSSndHandle *handle);
+void NNS_SndHandleReleaseSeq(NNSSndHandle *handle);
+void NNS_SndPlayerStopSeqByPlayerNo(int playerNo, int fadeFrame);
+void NNS_SndPlayerSetAllocatableChannel(int playerNo, u32 chBitFlag);
+void NNS_SndPlayerSetPlayableSeqCount(int playerNo, int seqCount);
+BOOL NNS_SndPlayerCreateHeap(int playerNo, NNSSndHeapHandle heap, u32 size);
+void NNS_SndPlayerPauseByPlayerNo(int playerNo, BOOL flag);
+int NNS_SndPlayerCountPlayingSeqByPlayerNo(int playerNo);
+
+#endif //GUARD_PLAYER_H
diff --git a/lib/include/nnsys/snd/seqdata.h b/lib/include/nnsys/snd/seqdata.h
new file mode 100644
index 0000000000..2f6b041898
--- /dev/null
+++ b/lib/include/nnsys/snd/seqdata.h
@@ -0,0 +1,13 @@
+#ifndef GUARD_SEQDATA_H
+#define GUARD_SEQDATA_H
+
+typedef struct NNSSndSeqParam {
+    u16 bankNo;
+    u8 volume;
+    u8 channelPrio;
+    u8 playerPrio;
+    u8 playerNo;
+    u16 reserved;
+} NNSSndSeqParam;
+
+#endif //GUARD_SEQDATA_H
diff --git a/lib/include/nnsys/snd/sndarc.h b/lib/include/nnsys/snd/sndarc.h
new file mode 100644
index 0000000000..041fd1bae5
--- /dev/null
+++ b/lib/include/nnsys/snd/sndarc.h
@@ -0,0 +1,79 @@
+#ifndef NNSYS_SND_SNDARC_H_
+#define NNSYS_SND_SNDARC_H_
+
+typedef struct NNSSndArcFileInfo
+{
+    u32 offset;
+    u32 size;
+    void* mem;
+    u32 reserved;
+} NNSSndArcFileInfo;
+
+typedef struct NNSSndArcFat
+{
+    struct SNDBinaryBlockHeader blockHeader;
+
+    u32 count;
+    NNSSndArcFileInfo files[0];
+} NNSSndArcFat;
+
+typedef struct NNSSndArcInfo
+{
+    struct SNDBinaryBlockHeader blockHeader;
+
+    u32 seqOffset;
+    u32 seqArcOffset;
+    u32 bankOffset;
+    u32 waveArcOffset;
+    u32 playerInfoOffset;
+    u32 groupInfoOffset;
+    u32 strmPlayerInfoOffset;
+    u32 strmOffset;
+} NNSSndArcInfo;
+
+typedef struct NNSSndArcSymbol
+{
+    struct SNDBinaryBlockHeader blockHeader;
+
+    u32 seqOffset;
+    u32 seqArcOffset;
+    u32 bankOffset;
+    u32 waveArcOffset;
+    u32 playerOffset;
+    u32 groupOffset;
+    u32 strmPlayerOffset;
+    u32 strmOffset;
+} NNSSndArcSymbol;
+
+typedef struct NNSSndArcHeader
+{
+    struct SNDBinaryFileHeader fileHeader;
+    u32 symbolDataOffset;
+    u32 symbolDataSize;
+    u32 infoOffset;
+    u32 infoSize;
+    u32 fatOffset;
+    u32 fatSize;
+    u32 fileImageOffset;
+    u32 fileImageSize;
+} NNSSndArcHeader;
+
+typedef struct NNSSndArc
+{
+    NNSSndArcHeader header;
+    BOOL file_open;
+#ifndef NNS_FROM_TOOL
+    FSFile file;
+    FSFileID fileId;
+#endif // NNS_FROM_TOOL
+    struct NNSSndArcFat* fat;
+    struct NNSSndArcSymbol* symbol;
+    struct NNSSndArcInfo* info;
+    s32 loadBlockSize;
+} NNSSndArc;
+
+void NNS_SndArcInit(NNSSndArc *arc, const char *filePath, NNSSndHeapHandle heap, BOOL symbolLoadFlag);
+
+const NNSSndSeqParam* NNS_SndArcGetSeqParam(int seqNo);
+
+#endif //NNSYS_SND_SNDARC_H_
diff --git a/lib/include/nnsys/snd/sndarc_loader.h b/lib/include/nnsys/snd/sndarc_loader.h
new file mode 100644
index 0000000000..274bfb8f36
--- /dev/null
+++ b/lib/include/nnsys/snd/sndarc_loader.h
@@ -0,0 +1,11 @@
+#ifndef NNSYS_SND_SNDARC_LOADER_H_
+#define NNSYS_SND_SNDARC_LOADER_H_
+
+BOOL NNS_SndArcLoadGroup(int groupNo, NNSSndHeapHandle heap);
+BOOL NNS_SndArcLoadSeq(int seqNo, NNSSndHeapHandle heap);
+BOOL NNS_SndArcLoadBank(int bankNo, NNSSndHeapHandle heap);
+BOOL NNS_SndArcLoadWaveArc(int waveArcNo, NNSSndHeapHandle heap);
+BOOL NNS_SndArcLoadSeqEx(int seqNo, u32 loadFlag, NNSSndHeapHandle heap);
+BOOL NNS_SndArcLoadBankEx(int bankNo, u32 loadFlag, NNSSndHeapHandle heap);
+
+#endif //NNSYS_SND_SNDARC_LOADER_H_
diff --git a/lib/include/nnsys/snd/sndarc_player.h b/lib/include/nnsys/snd/sndarc_player.h
new file mode 100644
index 0000000000..9ac5fd4e2e
--- /dev/null
+++ b/lib/include/nnsys/snd/sndarc_player.h
@@ -0,0 +1,9 @@
+#ifndef NNSYS_SND_SNDARC_PLAYER_H_
+#define NNSYS_SND_SNDARC_PLAYER_H_
+
+struct NNSSndHandle;
+
+BOOL NNS_SndArcPlayerSetup(NNSSndHeapHandle heap);
+BOOL NNS_SndArcPlayerStartSeqEx(struct NNSSndHandle* handle, int playerNo, int bankNo, int playerPrio, int seqNo);
+
+#endif //NNSYS_SND_SNDARC_PLAYER_H_
diff --git a/lib/include/nnsys/snd/waveout.h b/lib/include/nnsys/snd/waveout.h
new file mode 100644
index 0000000000..c2b8c205df
--- /dev/null
+++ b/lib/include/nnsys/snd/waveout.h
@@ -0,0 +1,12 @@
+#ifndef NNSYS_SND_WAVEOUT_H_
+#define NNSYS_SND_WAVEOUT_H_
+
+typedef enum NNSSndWaveFormat {
+    NNS_SND_WAVE_FORMAT_PCM8,
+    NNS_SND_WAVE_FORMAT_PCM16
+} NNSSndWaveFormat;
+
+struct NNSSndWaveOut;
+typedef struct NNSSndWaveOut* NNSSndWaveOutHandle;
+
+#endif //NNSYS_SND_WAVEOUT_H_
diff --git a/lib/include/size_t.h b/lib/include/size_t.h
new file mode 100644
index 0000000000..78277f503a
--- /dev/null
+++ b/lib/include/size_t.h
@@ -0,0 +1,14 @@
+#ifndef _MSL_SIZE_T_H
+#define _MSL_SIZE_T_H
+
+#include <ansi_params.h>
+
+_MSL_BEGIN_NAMESPACE_STD
+_MSL_BEGIN_EXTERN_C
+
+typedef __typeof__(sizeof(0)) size_t;
+
+_MSL_END_EXTERN_C
+_MSL_END_NAMESPACE_STD
+
+#endif //_MSL_SIZE_T_H
diff --git a/lib/include/stdarg.h b/lib/include/stdarg.h
new file mode 100644
index 0000000000..bbdf017101
--- /dev/null
+++ b/lib/include/stdarg.h
@@ -0,0 +1,23 @@
+#ifndef MSL_STDARG_H
+#define MSL_STDARG_H
+
+#include <ansi_params.h>
+
+_MSL_BEGIN_NAMESPACE_STD
+_MSL_BEGIN_EXTERN_C
+
+#ifndef _MSL_VA_LIST_TYPE
+#define _MSL_VA_LIST_TYPE char*
+#endif //_MSL_VA_LIST_TYPE
+#ifndef _MSL_VA_LIST_DEFINED
+typedef _MSL_VA_LIST_TYPE va_list;
+#define _MSL_VA_LIST_DEFINED
+#endif
+
+#define va_start(list, arg) ({ list = (va_list)(((u32)&(arg) & ~3) + 4); })
+#define va_end(list)        ((void)0)
+
+_MSL_END_EXTERN_C
+_MSL_END_NAMESPACE_STD
+
+#endif //MSL_STDARG_H
diff --git a/lib/include/stddef.h b/lib/include/stddef.h
new file mode 100644
index 0000000000..a111ec5ed2
--- /dev/null
+++ b/lib/include/stddef.h
@@ -0,0 +1,14 @@
+#ifndef MSL_STDDEF_H_
+#define MSL_STDDEF_H_
+
+#include <size_t.h>
+
+_MSL_BEGIN_NAMESPACE_STD
+_MSL_BEGIN_EXTERN_C
+
+#define offsetof(type, field) ((size_t)&((type *)0)->field)
+
+_MSL_END_EXTERN_C
+_MSL_END_NAMESPACE_STD
+
+#endif //MSL_STDDEF_H_
diff --git a/lib/include/string.h b/lib/include/string.h
new file mode 100644
index 0000000000..e9222d2abb
--- /dev/null
+++ b/lib/include/string.h
@@ -0,0 +1,28 @@
+#ifndef MSL_STRING_H_
+#define MSL_STRING_H_
+
+#include <ansi_params.h>
+#include <size_t.h>
+
+_MSL_BEGIN_NAMESPACE_STD
+_MSL_BEGIN_EXTERN_C
+
+void *memset(void *data, int value, size_t size);
+void *memmove(void *dest, const void *src, size_t size);
+void *memcpy(void *dest, const void *src, size_t size);
+void *memchr(const void *arr, int value, size_t size);
+int memcmp(const void *a, const void *b, size_t size);
+char *strcpy(char *dest, const char *src);
+unsigned strlen(const char *str);
+char *strncpy(char *dest, const char *src, size_t n);
+int strcmp(const char *a, const char *b);
+char *strcat(char *dest, const char *src);
+char *strncat(char *dest, const char *src, size_t n);
+unsigned strspn(const char *a, const char *b);
+char *strtok(char *str, const char *sep);
+char *strstr(const char *haystack, const char *needle);
+
+_MSL_END_EXTERN_C
+_MSL_END_NAMESPACE_STD
+
+#endif //MSL_STRING_H_