mirror of
https://github.com/pret/pokeheartgold.git
synced 2026-06-01 05:01:11 -05:00
340 lines
5.8 KiB
ArmAsm
340 lines
5.8 KiB
ArmAsm
.include "asm/macros.inc"
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.include "global.inc"
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.text
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.public GetRomValidLanguage
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.public VBlankIntr
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arm_func_start NitroSpMain
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NitroSpMain: ; 0x037F8000
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stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
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sub sp, sp, #0x210
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bl WVR_ShelterExtWram
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bl OS_Init
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bl OS_InitThread
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add r2, sp, #4
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mov r0, #0x20
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mov r1, #2
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bl NVRAM_ReadDataBytes
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ldr r0, [sp, #4]
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add r2, sp, #0x10
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mov r0, r0, lsl #3
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str r0, [sp, #4]
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mov r1, #0x100
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bl NVRAM_ReadDataBytes
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ldr r0, [sp, #4]
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mov r1, #0x100
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add r0, r0, #0x100
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add r2, sp, #0x110
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bl NVRAM_ReadDataBytes
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mov r0, #0x1d
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mov r1, #1
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add r2, sp, #0
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mov r6, #0
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bl NVRAM_ReadDataBytes
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ldrb r0, [sp]
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cmp r0, #0xff
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moveq r0, r6
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beq _037F8080
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tst r0, #0x50
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movne r0, #1
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moveq r0, r6
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_037F8080:
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cmp r0, #0
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beq _037F8154
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bl GetRomValidLanguage
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mov r8, r0
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mov fp, #1
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and r7, r8, #0x40
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mov sl, #0
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add r5, sp, #0x10
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mov r4, fp
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b _037F8148
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_037F80A8:
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ldr r0, _037F8458 ; =0x0000FFFF
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add sb, r5, sl, lsl #8
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mov r1, sb
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mov r2, #0x70
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bl __Veneer_SVC_GetCRC16
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mov r2, sb
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ldrh r1, [r2, #0x72]
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cmp r0, r1
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bne _037F813C
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ldrh r0, [r2, #0x70]
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cmp r0, #0x80
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bhs _037F813C
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ldr r0, _037F8458 ; =0x0000FFFF
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mov r2, #0x8a
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add r1, sb, #0x74
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bl __Veneer_SVC_GetCRC16
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mov r2, sb
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ldrh r1, [r2, #0xfe]
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cmp r0, r1
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bne _037F813C
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ldrh r1, [r2, #0x76]
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ldrb r0, [r2, #0x75]
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tst r1, r4, lsl r0
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beq _037F813C
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tst r8, r1
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ldrneh r1, [sb, #0x64]
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andne r0, r0, #7
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bicne r1, r1, #7
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orrne r0, r1, r0
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strneh r0, [sb, #0x64]
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add r0, r5, sl, lsl #8
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ldrh r0, [r0, #0x76]
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mvn r0, r0
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tst r7, r0
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movne r6, #3
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bne _037F81F4
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orr r6, r6, fp, lsl sl
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_037F813C:
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add r0, sl, #1
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mov r0, r0, lsl #0x10
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mov sl, r0, lsr #0x10
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_037F8148:
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cmp sl, #2
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blo _037F80A8
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b _037F81B8
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_037F8154:
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bl GetRomValidLanguage
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tst r0, #0x40
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movne r6, #3
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bne _037F81F4
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ldr r8, _037F8458 ; =0x0000FFFF
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mov sb, #0
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add r7, sp, #0x10
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mov r4, #1
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mov r5, #0x70
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_037F8178:
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mov r0, r8
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mov r2, r5
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add r1, r7, sb, lsl #8
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bl __Veneer_SVC_GetCRC16
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add r2, r7, sb, lsl #8
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ldrh r1, [r2, #0x72]
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cmp r0, r1
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bne _037F81A4
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ldrh r0, [r2, #0x70]
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cmp r0, #0x80
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orrlo r6, r6, r4, lsl sb
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_037F81A4:
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add r0, sb, #1
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mov r0, r0, lsl #0x10
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mov sb, r0, lsr #0x10
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cmp sb, #2
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blo _037F8178
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_037F81B8:
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cmp r6, #1
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cmpne r6, #2
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beq _037F81F4
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cmp r6, #3
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bne _037F81F0
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ldrh r1, [sp, #0x80]
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add r0, sp, #0x100
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add r1, r1, #1
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ldrh r0, [r0, #0x80]
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and r1, r1, #0x7f
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cmp r1, r0
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moveq r6, #2
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movne r6, #1
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b _037F81F4
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_037F81F0:
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mov r6, #0
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_037F81F4:
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cmp r6, #3
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blt _037F8210
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ldr r1, _037F845C ; =0x027FFC80
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mvn r0, #0
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mov r2, #0x74
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bl MIi_CpuClear32
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b _037F82CC
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_037F8210:
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cmp r6, #0
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beq _037F82BC
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ldr r0, _037F8460 ; =0xFFFFFF2A
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mov r1, r6, lsl #8
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add r0, sp, r0
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ldrb r0, [r0, r6, lsl #8]
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cmp r0, #0xa
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bhs _037F825C
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add r0, sp, #0x10
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mov r3, #0xa
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mov r2, #0
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add r1, r0, r1
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b _037F8250
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_037F8244:
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add r0, r1, r3, lsl #1
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strh r2, [r0, #-0xfc]
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sub r3, r3, #1
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_037F8250:
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ldrb r0, [r1, #-0xe6]
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cmp r3, r0
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bgt _037F8244
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_037F825C:
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ldr r0, _037F8464 ; =0xFFFFFF60
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mov r1, r6, lsl #8
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add r0, sp, r0
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ldrb r0, [r0, r6, lsl #8]
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cmp r0, #0x1a
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bhs _037F82A0
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add r0, sp, #0x10
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mov r3, #0x1a
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mov r2, #0
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add r1, r0, r1
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b _037F8294
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_037F8288:
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add r0, r1, r3, lsl #1
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strh r2, [r0, #-0xe6]
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sub r3, r3, #1
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_037F8294:
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ldrb r0, [r1, #-0xb0]
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cmp r3, r0
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bgt _037F8288
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_037F82A0:
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ldr r1, _037F845C ; =0x027FFC80
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add r2, sp, #0x10
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sub r0, r6, #1
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add r0, r2, r0, lsl #8
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mov r2, #0x74
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bl MIi_CpuCopy32
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b _037F82CC
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_037F82BC:
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ldr r1, _037F845C ; =0x027FFC80
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mov r0, #0
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mov r2, #0x74
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bl MIi_CpuClear32
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_037F82CC:
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add r2, sp, #8
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mov r0, #0x36
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mov r1, #6
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bl NVRAM_ReadDataBytes
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ldr r4, _037F845C ; =0x027FFC80
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add r0, sp, #8
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add r1, r4, #0x74
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mov r2, #6
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bl MI_CpuCopy8
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add r2, sp, #2
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mov r0, #0x3c
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mov r1, #2
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bl NVRAM_ReadDataBytes
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ldrh r0, [sp, #2]
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mov r0, r0, lsl #0xf
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mov r0, r0, lsr #0x10
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bl WMSP_GetAllowedChannel
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strh r0, [r4, #0x7a]
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bl PXI_Init
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mov r0, #8
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bl OS_GetArenaHi
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mov r4, r0
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mov r0, #8
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bl OS_GetArenaLo
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mov r1, r0
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mov r2, r4
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mov r0, #8
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mov r3, #1
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bl OS_InitAlloc
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mov r4, r0
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mov r0, #8
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bl OS_GetArenaHi
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sub r2, r0, r4
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mov r0, r4
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mov r1, #0
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bl MI_CpuFill8
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mov r1, r4
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mov r0, #8
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bl OS_SetArenaLo
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mov r0, #8
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bl OS_GetArenaHi
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mov r4, r0
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mov r0, #8
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bl OS_GetArenaLo
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mov r1, r0
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mov r2, r4
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mov r0, #8
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bl OS_CreateHeap
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movs r4, r0
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bpl _037F8398
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bl OS_Terminate
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_037F8398:
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mov r1, r4
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mov r0, #8
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bl OS_SetCurrentHeap
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mov r1, r4
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mov r0, #8
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bl OS_CheckHeap
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cmp r0, #0x2100
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bhs _037F83BC
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bl OS_Terminate
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_037F83BC:
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mov r0, #6
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bl SND_Init
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bl PAD_InitXYButton
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ldr r1, _037F8468 ; =VBlankIntr
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mov r0, #1
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bl OS_SetIrqFunction
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mov r0, #1
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bl OS_EnableIrqMask
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ldr r3, _037F846C ; =0x04000004
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mov r0, #1
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ldrh r1, [r3]
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ldrh r1, [r3]
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add r2, r3, #0x204
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orr r1, r1, #8
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strh r1, [r3]
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ldrh r1, [r2]
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strh r0, [r2]
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bl OS_EnableInterrupts
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mvn r0, #0
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bl FS_Init
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mov r0, #0xf
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bl CARD_SetThreadPriority
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mov r0, #0xc
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bl RTC_Init
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mov r0, r4
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bl WVR_Init
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mov r0, #2
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bl SPI_Init
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mov r4, #0
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_037F8430:
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bl SVC_Halt
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bl OS_IsResetOccurred
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cmp r0, #0
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beq _037F844C
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mov r0, r4
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bl CTRDG_VibPulseEdgeUpdate
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bl OS_ResetSystem
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; noreturn
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_037F844C:
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bl CTRDG_CheckPullOut_Polling
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bl CARD_CheckPullOut_Polling
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b _037F8430
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.align 2, 0
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_037F8458: .word 0x0000FFFF
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_037F845C: .word 0x027FFC80
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_037F8460: .word 0xFFFFFF2A
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_037F8464: .word 0xFFFFFF60
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_037F8468: .word VBlankIntr
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_037F846C: .word 0x04000004
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arm_func_end NitroSpMain
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; Routine generated by linktime interworking
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; Defined explicitly to force order in ASM
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.arm
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.balign 4, 0
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__Veneer_SVC_GetCRC16: ; 0x037F8470
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ldr ip, _037F8478 ; =SVC_GetCRC16
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bx ip
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.align 2, 0
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_037F8478: .word SVC_GetCRC16
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arm_func_end __Veneer_SVC_GetCRC16
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; ; Routine generated by linktime interworking
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; arm_func_start SVC_Halt
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; SVC_Halt: ; 0x037F847C
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; ldr ip, _037F8484 ; =SVC_Halt
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; bx ip
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; .align 2, 0
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; _037F8484: .word SVC_Halt
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; arm_func_end SVC_Halt
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