mirror of
https://github.com/pret/pokeheartgold.git
synced 2026-05-23 12:46:23 -05:00
423 lines
6.6 KiB
ArmAsm
423 lines
6.6 KiB
ArmAsm
.include "asm/macros.inc"
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.include "mi_memory.inc"
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.include "global.inc"
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.text
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arm_func_start MIi_CpuClear16
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MIi_CpuClear16: ; 0x020D4790
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mov r3, #0
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_020D4794:
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cmp r3, r2
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blt _020D47A0
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b _020D47A4
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_020D47A0:
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strh r0, [r1, r3]
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_020D47A4:
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blt _020D47AC
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b _020D47B0
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_020D47AC:
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add r3, r3, #2
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_020D47B0:
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blt _020D4794
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bx lr
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arm_func_end MIi_CpuClear16
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arm_func_start MIi_CpuCopy16
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MIi_CpuCopy16: ; 0x020D47B8
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mov ip, #0
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_020D47BC:
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cmp ip, r2
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blt _020D47C8
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b _020D47CC
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_020D47C8:
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ldrh r3, [r0, ip]
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_020D47CC:
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blt _020D47D4
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b _020D47D8
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_020D47D4:
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strh r3, [r1, ip]
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_020D47D8:
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blt _020D47E0
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b _020D47E4
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_020D47E0:
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add ip, ip, #2
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_020D47E4:
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blt _020D47BC
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bx lr
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arm_func_end MIi_CpuCopy16
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arm_func_start MIi_CpuClear32
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MIi_CpuClear32: ; 0x020D47EC
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add ip, r1, r2
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_020D47F0:
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cmp r1, ip
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blt _020D47FC
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b _020D4800
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_020D47FC:
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stmia r1!, {r0}
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_020D4800:
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blt _020D47F0
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bx lr
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arm_func_end MIi_CpuClear32
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arm_func_start MIi_CpuCopy32
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MIi_CpuCopy32: ; 0x020D4808
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add ip, r1, r2
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_020D480C:
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cmp r1, ip
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blt _020D4818
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b _020D481C
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_020D4818:
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ldmia r0!, {r2}
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_020D481C:
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blt _020D4824
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b _020D4828
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_020D4824:
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stmia r1!, {r2}
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_020D4828:
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blt _020D480C
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bx lr
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arm_func_end MIi_CpuCopy32
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arm_func_start MIi_CpuSend32
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MIi_CpuSend32: ; 0x020D4830
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add ip, r0, r2
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_020D4834:
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cmp r0, ip
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blt _020D4840
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b _020D4844
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_020D4840:
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ldmia r0!, {r2}
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_020D4844:
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blt _020D484C
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b _020D4850
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_020D484C:
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str r2, [r1]
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_020D4850:
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blt _020D4834
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bx lr
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arm_func_end MIi_CpuSend32
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arm_func_start MIi_CpuClearFast
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MIi_CpuClearFast: ; 0x020D4858
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stmdb sp!, {r4, r5, r6, r7, r8, sb}
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add sb, r1, r2
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mov ip, r2, lsr #5
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add ip, r1, ip, lsl #5
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mov r2, r0
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mov r3, r2
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mov r4, r2
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mov r5, r2
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mov r6, r2
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mov r7, r2
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mov r8, r2
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_020D4884:
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cmp r1, ip
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blt _020D4890
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b _020D4894
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_020D4890:
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stmia r1!, {r0, r2, r3, r4, r5, r6, r7, r8}
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_020D4894:
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blt _020D4884
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_020D4898:
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cmp r1, sb
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blt _020D48A4
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b _020D48A8
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_020D48A4:
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stmia r1!, {r0}
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_020D48A8:
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blt _020D4898
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ldmia sp!, {r4, r5, r6, r7, r8, sb}
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bx lr
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arm_func_end MIi_CpuClearFast
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arm_func_start MIi_CpuCopyFast
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MIi_CpuCopyFast: ; 0x020D48B4
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stmdb sp!, {r4, r5, r6, r7, r8, sb, sl}
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add sl, r1, r2
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mov ip, r2, lsr #5
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add ip, r1, ip, lsl #5
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_020D48C4:
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cmp r1, ip
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blt _020D48D0
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b _020D48D4
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_020D48D0:
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ldmia r0!, {r2, r3, r4, r5, r6, r7, r8, sb}
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_020D48D4:
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blt _020D48DC
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b _020D48E0
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_020D48DC:
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stmia r1!, {r2, r3, r4, r5, r6, r7, r8, sb}
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_020D48E0:
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blt _020D48C4
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_020D48E4:
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cmp r1, sl
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blt _020D48F0
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b _020D48F4
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_020D48F0:
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ldmia r0!, {r2}
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_020D48F4:
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blt _020D48FC
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b _020D4900
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_020D48FC:
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stmia r1!, {r2}
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_020D4900:
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blt _020D48E4
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ldmia sp!, {r4, r5, r6, r7, r8, sb, sl}
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bx lr
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arm_func_end MIi_CpuCopyFast
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arm_func_start MI_Copy32B
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MI_Copy32B: ; 0x020D490C
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ldmia r0!, {r2, r3, ip}
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stmia r1!, {r2, r3, ip}
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ldmia r0!, {r2, r3, ip}
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stmia r1!, {r2, r3, ip}
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ldmia r0!, {r2, r3}
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stmia r1!, {r2, r3}
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bx lr
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arm_func_end MI_Copy32B
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arm_func_start MI_Copy36B
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MI_Copy36B: ; 0x020D4928
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ldmia r0!, {r2, r3, ip}
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stmia r1!, {r2, r3, ip}
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ldmia r0!, {r2, r3, ip}
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stmia r1!, {r2, r3, ip}
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ldmia r0!, {r2, r3, ip}
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stmia r1!, {r2, r3, ip}
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bx lr
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arm_func_end MI_Copy36B
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arm_func_start MI_Copy48B
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MI_Copy48B: ; 0x020D4944
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ldmia r0!, {r2, r3, ip}
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stmia r1!, {r2, r3, ip}
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ldmia r0!, {r2, r3, ip}
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stmia r1!, {r2, r3, ip}
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ldmia r0!, {r2, r3, ip}
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stmia r1!, {r2, r3, ip}
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ldmia r0!, {r2, r3, ip}
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stmia r1!, {r2, r3, ip}
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bx lr
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arm_func_end MI_Copy48B
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arm_func_start MI_Copy64B
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MI_Copy64B: ; 0x020D4968
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ldmia r0!, {r2, r3, ip}
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stmia r1!, {r2, r3, ip}
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ldmia r0!, {r2, r3, ip}
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stmia r1!, {r2, r3, ip}
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ldmia r0!, {r2, r3, ip}
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stmia r1!, {r2, r3, ip}
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ldmia r0!, {r2, r3, ip}
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stmia r1!, {r2, r3, ip}
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ldmia r0, {r0, r2, r3, ip}
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stmia r1!, {r0, r2, r3, ip}
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bx lr
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arm_func_end MI_Copy64B
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arm_func_start MI_CpuFill8
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MI_CpuFill8: ; 0x020D4994
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cmp r2, #0
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beq _020D49A0
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b _020D49A4
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_020D49A0:
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bx lr
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_020D49A4:
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tst r0, #1
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beq _020D49D0
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ldrh ip, [r0, #-1]
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and ip, ip, #0xff
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orr r3, ip, r1, lsl #8
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strh r3, [r0, #-1]
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add r0, r0, #1
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subs r2, r2, #1
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beq _020D49CC
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b _020D49D0
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_020D49CC:
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bx lr
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_020D49D0:
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cmp r2, #2
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blo _020D4A28
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orr r1, r1, r1, lsl #8
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tst r0, #2
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beq _020D49F8
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strh r1, [r0], #2
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subs r2, r2, #2
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beq _020D49F4
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b _020D49F8
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_020D49F4:
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bx lr
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_020D49F8:
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orr r1, r1, r1, lsl #16
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bics r3, r2, #3
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beq _020D4A18
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sub r2, r2, r3
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add ip, r3, r0
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_020D4A0C:
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str r1, [r0], #4
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cmp r0, ip
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blo _020D4A0C
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_020D4A18:
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tst r2, #2
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bne _020D4A24
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b _020D4A28
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_020D4A24:
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strh r1, [r0], #2
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_020D4A28:
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tst r2, #1
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beq _020D4A34
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b _020D4A38
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_020D4A34:
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bx lr
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_020D4A38:
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ldrh r3, [r0]
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and r3, r3, #0xff00
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and r1, r1, #0xff
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orr r1, r1, r3
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strh r1, [r0]
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bx lr
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arm_func_end MI_CpuFill8
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arm_func_start MI_CpuCopy8
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MI_CpuCopy8: ; 0x020D4A50
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cmp r2, #0
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beq _020D4A5C
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b _020D4A60
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_020D4A5C:
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bx lr
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_020D4A60:
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tst r1, #1
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beq _020D4AB8
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ldrh ip, [r1, #-1]
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and ip, ip, #0xff
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tst r0, #1
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bne _020D4A7C
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b _020D4A80
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_020D4A7C:
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ldrh r3, [r0, #-1]
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_020D4A80:
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bne _020D4A88
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b _020D4A8C
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_020D4A88:
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mov r3, r3, lsr #8
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_020D4A8C:
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beq _020D4A94
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b _020D4A98
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_020D4A94:
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ldrh r3, [r0]
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_020D4A98:
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orr r3, ip, r3, lsl #8
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strh r3, [r1, #-1]
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add r0, r0, #1
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add r1, r1, #1
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subs r2, r2, #1
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beq _020D4AB4
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b _020D4AB8
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_020D4AB4:
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bx lr
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_020D4AB8:
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eor ip, r1, r0
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tst ip, #1
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beq _020D4B14
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bic r0, r0, #1
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ldrh ip, [r0], #2
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mov r3, ip, lsr #8
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subs r2, r2, #2
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blo _020D4AF0
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_020D4AD8:
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ldrh ip, [r0], #2
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orr ip, r3, ip, lsl #8
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strh ip, [r1], #2
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mov r3, ip, lsr #0x10
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subs r2, r2, #2
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bhs _020D4AD8
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_020D4AF0:
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tst r2, #1
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beq _020D4AFC
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b _020D4B00
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_020D4AFC:
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bx lr
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_020D4B00:
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ldrh ip, [r1]
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and ip, ip, #0xff00
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orr ip, ip, r3
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strh ip, [r1]
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bx lr
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_020D4B14:
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tst ip, #2
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beq _020D4B40
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bics r3, r2, #1
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beq _020D4BA4
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sub r2, r2, r3
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add ip, r3, r1
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_020D4B2C:
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ldrh r3, [r0], #2
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strh r3, [r1], #2
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cmp r1, ip
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blo _020D4B2C
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b _020D4BA4
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_020D4B40:
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cmp r2, #2
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blo _020D4BA4
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tst r1, #2
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beq _020D4B68
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ldrh r3, [r0], #2
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strh r3, [r1], #2
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subs r2, r2, #2
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beq _020D4B64
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b _020D4B68
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_020D4B64:
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bx lr
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_020D4B68:
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bics r3, r2, #3
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beq _020D4B88
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sub r2, r2, r3
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add ip, r3, r1
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_020D4B78:
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ldr r3, [r0], #4
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str r3, [r1], #4
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cmp r1, ip
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blo _020D4B78
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_020D4B88:
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tst r2, #2
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bne _020D4B94
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b _020D4B98
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_020D4B94:
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ldrh r3, [r0], #2
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_020D4B98:
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bne _020D4BA0
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b _020D4BA4
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_020D4BA0:
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strh r3, [r1], #2
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_020D4BA4:
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tst r2, #1
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beq _020D4BB0
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b _020D4BB4
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_020D4BB0:
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bx lr
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_020D4BB4:
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ldrh r2, [r1]
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ldrh r0, [r0]
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and r2, r2, #0xff00
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and r0, r0, #0xff
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orr r0, r2, r0
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strh r0, [r1]
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bx lr
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arm_func_end MI_CpuCopy8
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thumb_func_start MI_Zero36B
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MI_Zero36B: ; 0x020D4BD0
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mov r1, #0
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mov r2, #0
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mov r3, #0
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stmia r0!, {r1, r2, r3}
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stmia r0!, {r1, r2, r3}
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stmia r0!, {r1, r2, r3}
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bx lr
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thumb_func_end MI_Zero36B
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.balign 4, 0
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