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Carve out pokedex, 202A888, options, 202ADEC

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This commit is contained in:
PikalaxALT 2021-09-05 19:17:06 -04:00
parent 91ed90c3f1
commit 08e092a6cc
44 changed files with 55087 additions and 55063 deletions
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54510
asm/daycare.s
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File diff suppressed because it is too large Load Diff

245
asm/options.s Normal file
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@ -0,0 +1,245 @@
.include "asm/macros.inc"
.include "global.inc"
.text
thumb_func_start sub_0202AC88
sub_0202AC88: ; 0x0202AC88
push {r4, lr}
mov r1, #2
bl AllocFromHeap
add r4, r0, #0
bl sub_0202ACA8
add r0, r4, #0
pop {r4, pc}
.balign 4, 0
thumb_func_end sub_0202AC88
thumb_func_start sub_0202AC9C
sub_0202AC9C: ; 0x0202AC9C
ldr r3, _0202ACA4 ; =MIi_CpuCopy8
mov r2, #2
bx r3
nop
_0202ACA4: .word MIi_CpuCopy8
thumb_func_end sub_0202AC9C
thumb_func_start sub_0202ACA8
sub_0202ACA8: ; 0x0202ACA8
push {r4, lr}
add r4, r0, #0
mov r1, #0
mov r2, #2
bl MIi_CpuFill8
ldrh r1, [r4]
mov r0, #0xf
bic r1, r0
mov r0, #1
orr r0, r1
strh r0, [r4]
ldrh r1, [r4]
mov r0, #0x30
bic r1, r0
strh r1, [r4]
ldrh r1, [r4]
mov r0, #0x40
bic r1, r0
strh r1, [r4]
ldrh r1, [r4]
mov r0, #0x80
bic r1, r0
strh r1, [r4]
ldrh r1, [r4]
ldr r0, _0202ACEC ; =0xFFFFFCFF
and r0, r1
strh r0, [r4]
ldrh r1, [r4]
ldr r0, _0202ACF0 ; =0xFFFF83FF
and r0, r1
strh r0, [r4]
pop {r4, pc}
nop
_0202ACEC: .word 0xFFFFFCFF
_0202ACF0: .word 0xFFFF83FF
thumb_func_end sub_0202ACA8
thumb_func_start sub_0202ACF4
sub_0202ACF4: ; 0x0202ACF4
push {r3, lr}
cmp r0, #0
beq _0202AD04
bl Sav2_PlayerData_GetOptionsAddr
bl sub_0202ADAC
add r1, r0, #0
_0202AD04:
cmp r1, #0
beq _0202AD14
cmp r1, #1
bne _0202AD14
ldr r0, _0202AD1C ; =gMain
mov r1, #3
str r1, [r0, #0x34]
pop {r3, pc}
_0202AD14:
ldr r0, _0202AD1C ; =gMain
mov r1, #0
str r1, [r0, #0x34]
pop {r3, pc}
.balign 4, 0
_0202AD1C: .word gMain
thumb_func_end sub_0202ACF4
thumb_func_start sub_0202AD20
sub_0202AD20: ; 0x0202AD20
ldrh r0, [r0]
lsl r0, r0, #0x1c
lsr r0, r0, #0x1c
bx lr
thumb_func_end sub_0202AD20
thumb_func_start sub_0202AD28
sub_0202AD28: ; 0x0202AD28
ldrh r3, [r0]
mov r2, #0xf
lsl r1, r1, #0x10
bic r3, r2
lsr r2, r1, #0x10
mov r1, #0xf
and r1, r2
orr r1, r3
strh r1, [r0]
bx lr
thumb_func_end sub_0202AD28
thumb_func_start sub_0202AD3C
sub_0202AD3C: ; 0x0202AD3C
push {r3, lr}
bl sub_0202AD20
cmp r0, #0
bne _0202AD4A
mov r0, #8
pop {r3, pc}
_0202AD4A:
cmp r0, #1
bne _0202AD52
mov r0, #4
pop {r3, pc}
_0202AD52:
mov r0, #1
pop {r3, pc}
.balign 4, 0
thumb_func_end sub_0202AD3C
thumb_func_start sub_0202AD58
sub_0202AD58: ; 0x0202AD58
ldrh r0, [r0]
lsl r0, r0, #0x1a
lsr r0, r0, #0x1e
bx lr
thumb_func_end sub_0202AD58
thumb_func_start sub_0202AD60
sub_0202AD60: ; 0x0202AD60
lsl r1, r1, #0x10
lsr r1, r1, #0x10
lsl r1, r1, #0x1e
ldrh r3, [r0]
mov r2, #0x30
lsr r1, r1, #0x1a
bic r3, r2
orr r1, r3
strh r1, [r0]
bx lr
thumb_func_end sub_0202AD60
thumb_func_start sub_0202AD74
sub_0202AD74: ; 0x0202AD74
ldrh r0, [r0]
lsl r0, r0, #0x18
lsr r0, r0, #0x1f
bx lr
thumb_func_end sub_0202AD74
thumb_func_start sub_0202AD7C
sub_0202AD7C: ; 0x0202AD7C
lsl r1, r1, #0x10
lsr r1, r1, #0x10
lsl r1, r1, #0x1f
ldrh r3, [r0]
mov r2, #0x80
lsr r1, r1, #0x18
bic r3, r2
orr r1, r3
strh r1, [r0]
bx lr
thumb_func_end sub_0202AD7C
thumb_func_start sub_0202AD90
sub_0202AD90: ; 0x0202AD90
ldrh r0, [r0]
lsl r0, r0, #0x19
lsr r0, r0, #0x1f
bx lr
thumb_func_end sub_0202AD90
thumb_func_start sub_0202AD98
sub_0202AD98: ; 0x0202AD98
lsl r1, r1, #0x10
lsr r1, r1, #0x10
lsl r1, r1, #0x1f
ldrh r3, [r0]
mov r2, #0x40
lsr r1, r1, #0x19
bic r3, r2
orr r1, r3
strh r1, [r0]
bx lr
thumb_func_end sub_0202AD98
thumb_func_start sub_0202ADAC
sub_0202ADAC: ; 0x0202ADAC
ldrh r0, [r0]
lsl r0, r0, #0x16
lsr r0, r0, #0x1e
bx lr
thumb_func_end sub_0202ADAC
thumb_func_start sub_0202ADB4
sub_0202ADB4: ; 0x0202ADB4
lsl r1, r1, #0x10
lsr r1, r1, #0x10
lsl r1, r1, #0x1e
ldrh r3, [r0]
ldr r2, _0202ADC8 ; =0xFFFFFCFF
lsr r1, r1, #0x16
and r2, r3
orr r1, r2
strh r1, [r0]
bx lr
.balign 4, 0
_0202ADC8: .word 0xFFFFFCFF
thumb_func_end sub_0202ADB4
thumb_func_start sub_0202ADCC
sub_0202ADCC: ; 0x0202ADCC
ldrh r0, [r0]
lsl r0, r0, #0x11
lsr r0, r0, #0x1b
bx lr
thumb_func_end sub_0202ADCC
thumb_func_start sub_0202ADD4
sub_0202ADD4: ; 0x0202ADD4
lsl r1, r1, #0x10
lsr r1, r1, #0x10
lsl r1, r1, #0x1b
ldrh r3, [r0]
ldr r2, _0202ADE8 ; =0xFFFF83FF
lsr r1, r1, #0x11
and r2, r3
orr r1, r2
strh r1, [r0]
bx lr
.balign 4, 0
_0202ADE8: .word 0xFFFF83FF
thumb_func_end sub_0202ADD4

8
asm/overlay_00_thumb.s
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@ -879,7 +879,7 @@ _021E5FD0:
add r0, r5, #0
add r1, r1, #4
add r2, r4, #0
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r2, _021E601C ; =_0221A680
ldr r1, _021E6024 ; =0x00001078
ldr r3, [r2]
@ -952,7 +952,7 @@ _021E6062:
add r0, r5, #0
add r1, r1, #4
add r2, r4, #0
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _021E60D8 ; =_0221A680
mov r2, #1
ldr r1, [r0]
@ -1042,7 +1042,7 @@ _021E6112:
add r0, r5, #0
add r1, r1, #4
add r2, r4, #0
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _021E6198 ; =_0221A680
mov r2, #1
ldr r1, [r0]
@ -1532,7 +1532,7 @@ _021E64E2:
add r0, r4, #4
add r1, r5, #0
add r2, r6, #0
bl sub_020D4A50
bl MIi_CpuCopy8
bl ov00_021EE490
cmp r0, #0
bne _021E651E

2
asm/overlay_100.s
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@ -3076,7 +3076,7 @@ ov100_021E7014: ; 0x021E7014
ldr r0, [sp]
ldr r1, [r4, #4]
mul r2, r3
bl sub_020D4A50
bl MIi_CpuCopy8
ldrb r0, [r4, #2]
cmp r5, r0
blo _021E7074

2
asm/overlay_103.s
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@ -557,7 +557,7 @@ _021ECDCE:
add r1, r0, #0
add r0, r6, #0
add r2, r7, #0
bl sub_020D4A50
bl MIi_CpuCopy8
add r4, r4, #1
cmp r4, #0xa
bls _021ECDCE

8
asm/overlay_109.s
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@ -664,17 +664,17 @@ ov109_021E5DB8: ; 0x021E5DB8
add r0, r4, r6
add r1, sp, #0
mov r2, #8
bl sub_020D4A50
bl MIi_CpuCopy8
add r5, #0xcc
lsl r7, r7, #3
add r0, r5, r7
add r1, r4, r6
mov r2, #8
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, sp, #0
add r1, r5, r7
mov r2, #8
bl sub_020D4A50
bl MIi_CpuCopy8
add sp, #8
pop {r3, r4, r5, r6, r7, pc}
thumb_func_end ov109_021E5DB8
@ -707,7 +707,7 @@ _021E5E12:
add r0, r6, r0
add r1, r6, r1
mov r2, #8
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r4, #1
lsl r0, r0, #0x18
lsr r4, r0, #0x18

370
asm/overlay_112.s
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6
asm/overlay_12.s
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@ -96548,7 +96548,7 @@ ov12_02266508: ; 0x02266508
add r1, r7, #0
add r1, #0x1c
mov r2, #0x22
bl sub_020D4A50
bl MIi_CpuCopy8
_02266526:
ldr r0, _02266628 ; =0x0000068E
mov r1, #0
@ -103751,7 +103751,7 @@ _02269E82:
ldr r0, _02269F4C ; =0x0226E218
add r1, sp, #8
mov r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r4, #0
mov r1, #2
mov r2, #3
@ -103935,7 +103935,7 @@ ov12_02269FA4: ; 0x02269FA4
ldr r0, _0226A290 ; =0x0226E210
add r1, sp, #0x50
mov r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
add r1, sp, #0x58
add r0, r6, #0
add r1, #2

12
asm/overlay_13_thumb_2.s
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@ -4210,10 +4210,10 @@ ov13_02222968: ; 0x02222968
add r3, r0, #0
add r0, r1, #0
add r1, r3, #0
ldr r3, _02222974 ; =sub_020D4A50
ldr r3, _02222974 ; =MIi_CpuCopy8
bx r3
nop
_02222974: .word sub_020D4A50
_02222974: .word MIi_CpuCopy8
thumb_func_end ov13_02222968
thumb_func_start ov13_02222978
@ -4585,7 +4585,7 @@ ov13_02222BC0: ; 0x02222BC0
ldrh r2, [r4, #0xa]
add r0, r5, #4
add r1, #0xc
bl sub_020D4A50
bl MIi_CpuCopy8
pop {r3, r4, r5, pc}
.balign 4, 0
thumb_func_end ov13_02222BC0
@ -5101,7 +5101,7 @@ _02222F88:
add r1, r2, r1
ldr r2, [r7, #0x28]
add r0, #0x2c
bl sub_020D4A50
bl MIi_CpuCopy8
bl sub_020AF9BC
ldr r2, [r7]
ldr r3, _022230E0 ; =0x0030BFFE
@ -6004,7 +6004,7 @@ ov13_02223634: ; 0x02223634
ldr r1, [r1, #0x24]
add r0, r5, #0
mov r2, #0x50
bl sub_020D4A50
bl MIi_CpuCopy8
b _02223660
_02223656:
ldr r0, [r1, #0x24]
@ -6857,7 +6857,7 @@ ov13_02223CA0: ; 0x02223CA0
ldr r1, [r1, #0x28]
add r0, r5, #0
mov r2, #0x60
bl sub_020D4A50
bl MIi_CpuCopy8
b _02223CCC
_02223CC2:
ldr r0, [r1, #0x28]

4
asm/overlay_14.s
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@ -29960,7 +29960,7 @@ _021F4660:
ldr r0, [r0, #0x14]
add r1, r4, #0
lsl r2, r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #9
lsl r0, r0, #6
str r0, [sp]
@ -30355,7 +30355,7 @@ ov14_021F4958: ; 0x021F4958
ldr r0, [r0, #0x14]
add r1, r1, r4
lsl r2, r2, #0xa
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r7, #0
bl FreeToHeap
add r0, r5, #0

2
asm/overlay_17.s
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@ -1963,7 +1963,7 @@ _02202AC8:
ldr r0, _02202B54 ; =0x02203EA8
add r1, sp, #0
mov r2, #0x28
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r6, #1
mov r1, #0x1b
add r2, r0, #0

4
asm/overlay_24.s
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@ -640,7 +640,7 @@ _02259D7E:
ldr r0, [sp, #8]
add r0, r0, r1
ldr r1, [sp, #4]
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r7, #0
add r0, #0x7a
ldrh r4, [r0]
@ -722,7 +722,7 @@ _02259E3A:
add r0, r4, r0
add r1, r5, #0
mov r2, #0x50
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r4, #0
bl FreeToHeap
add r0, sp, #0

10
asm/overlay_39_thumb.s
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@ -179,17 +179,17 @@ ov39_022271A4: ; 0x022271A4
add r0, r5, #0
add r1, r4, #0
mov r2, #0x80
bl sub_020D4A50
bl MIi_CpuCopy8
pop {r3, r4, r5, pc}
thumb_func_end ov39_022271A4
thumb_func_start ov39_022271C0
ov39_022271C0: ; 0x022271C0
ldr r3, _022271C8 ; =sub_020D4A50
ldr r3, _022271C8 ; =MIi_CpuCopy8
mov r2, #0x80
bx r3
nop
_022271C8: .word sub_020D4A50
_022271C8: .word MIi_CpuCopy8
thumb_func_end ov39_022271C0
thumb_func_start ov39_022271CC
@ -614,7 +614,7 @@ _022274E8:
lsl r1, r1, #2
add r1, r5, r1
mov r2, #4
bl sub_020D4A50
bl MIi_CpuCopy8
mov r2, #0x19
lsl r2, r2, #4
ldr r0, [r5]
@ -674,7 +674,7 @@ _02227556:
add r1, r0, #0
add r0, r4, #0
mov r2, #0x80
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _02227588 ; =0x00000411
mov r1, #0x3c
strb r1, [r5, r0]

22
asm/overlay_40.s
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@ -8709,7 +8709,7 @@ _0222FC8C:
add r1, r6, #0
ldr r0, [r5, r0]
mov r2, #0xe4
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _0222FCC4 ; =0x00002608
ldr r1, [sp]
ldr r0, [r5, r0]
@ -26669,7 +26669,7 @@ _02238ED4:
ldr r2, _02238EFC ; =0x00002A30
add r0, r4, r0
add r1, r4, r1
bl sub_020D4A50
bl MIi_CpuCopy8
pop {r4, pc}
nop
_02238EFC: .word 0x00002A30
@ -29129,7 +29129,7 @@ _0223A33E:
ldr r0, [r4, r1]
sub r1, #0xc
add r1, r4, r1
bl sub_020D4A50
bl MIi_CpuCopy8
pop {r4, pc}
nop
_0223A35C: .word 0x0000071C
@ -29166,13 +29166,13 @@ _0223A382:
ldr r0, [r4, r0]
ldr r2, _0223A3B4 ; =0x00000558
add r1, #0xe0
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _0223A3B8 ; =0x00000718
mov r2, #0xd8
ldr r0, [r4, r1]
sub r1, #0xe0
add r1, r4, r1
bl sub_020D4A50
bl MIi_CpuCopy8
pop {r4, pc}
.balign 4, 0
_0223A3B0: .word 0x00000714
@ -29665,7 +29665,7 @@ _0223A794:
add r1, r4, r2
ldr r0, [r5, r0]
ldr r2, _0223A830 ; =0x00001D4C
bl sub_020D4A50
bl MIi_CpuCopy8
_0223A7CC:
mov r0, #0x6f
lsl r0, r0, #4
@ -34453,7 +34453,7 @@ ov40_0223CFA8: ; 0x0223CFA8
ldr r0, [r2, r0]
mov r2, #0x64
add r0, #0x80
bl sub_020D4A50
bl MIi_CpuCopy8
pop {r3, r4, r5, pc}
nop
_0223D000: .word 0x000004D4
@ -40317,7 +40317,7 @@ _0223FEE0:
ldr r0, [r5, r0]
ldr r2, _0223FF88 ; =0x00001D4C
add r1, r4, r1
bl sub_020D4A50
bl MIi_CpuCopy8
_0223FF18:
mov r0, #0x6f
lsl r0, r0, #4
@ -41371,7 +41371,7 @@ _022407BA:
ldr r0, [r5, r0]
ldr r2, _02240858 ; =0x00001D4C
add r1, r4, r1
bl sub_020D4A50
bl MIi_CpuCopy8
_022407EE:
ldr r0, _0224083C ; =0x000006F4
mov r1, #0
@ -41455,7 +41455,7 @@ ov40_0224085C: ; 0x0224085C
ldr r0, [r4, r0]
mov r2, #0x64
add r0, #0x80
bl sub_020D4A50
bl MIi_CpuCopy8
pop {r4, pc}
nop
_022408A8: .word 0x000004BC
@ -41503,7 +41503,7 @@ ov40_022408AC: ; 0x022408AC
ldr r0, [r2, r0]
mov r2, #0x64
add r0, #0x80
bl sub_020D4A50
bl MIi_CpuCopy8
pop {r3, r4, r5, pc}
.balign 4, 0
_02240908: .word 0x000004D4

22
asm/overlay_45_thumb.s
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@ -818,11 +818,11 @@ ov45_0222A498: ; 0x0222A498
mov r2, #0x3e
lsl r2, r2, #4
add r0, r0, r2
ldr r3, _0222A4A4 ; =sub_020D4A50
ldr r3, _0222A4A4 ; =MIi_CpuCopy8
mov r2, #4
bx r3
.balign 4, 0
_0222A4A4: .word sub_020D4A50
_0222A4A4: .word MIi_CpuCopy8
thumb_func_end ov45_0222A498
thumb_func_start ov45_0222A4A8
@ -1788,11 +1788,11 @@ ov45_0222AB38: ; 0x0222AB38
mov r2, #0xf3
lsl r2, r2, #2
add r0, r0, r2
ldr r3, _0222AB44 ; =sub_020D4A50
ldr r3, _0222AB44 ; =MIi_CpuCopy8
mov r2, #0x14
bx r3
.balign 4, 0
_0222AB44: .word sub_020D4A50
_0222AB44: .word MIi_CpuCopy8
thumb_func_end ov45_0222AB38
thumb_func_start ov45_0222AB48
@ -3910,7 +3910,7 @@ _0222BA5E:
add r1, #0x18
add r1, r5, r1
mov r2, #0x10
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #0x4a
lsl r0, r0, #2
add r0, r5, r0
@ -3921,7 +3921,7 @@ _0222BA5E:
add r1, #0x28
add r1, r5, r1
mov r2, #0x10
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #0x42
lsl r0, r0, #2
ldr r1, [r5]
@ -3992,26 +3992,26 @@ _0222BB10:
add r0, r4, #0
add r1, #0x20
add r2, r7, #0
bl sub_020D4A50
bl MIi_CpuCopy8
b _0222BB3A
_0222BB2E:
add r1, r5, #0
add r0, r4, #0
add r1, #0x20
mov r2, #0x94
bl sub_020D4A50
bl MIi_CpuCopy8
_0222BB3A:
add r4, #8
add r1, r5, #0
add r0, r4, #0
add r1, #0x10
mov r2, #0x10
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r5, #0
add r5, #0x28
add r1, r5, #0
mov r2, #0x10
bl sub_020D4A50
bl MIi_CpuCopy8
pop {r3, r4, r5, r6, r7, pc}
.balign 4, 0
thumb_func_end ov45_0222BB00
@ -4274,7 +4274,7 @@ ov45_0222BCE4: ; 0x0222BCE4
add r0, r4, #0
add r1, #8
mov r2, #0x10
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, [r5]
add r0, r6, #0
add r2, r7, #0

2
asm/overlay_50.s
View File

@ -214,7 +214,7 @@ _021E5A4E:
mov r2, #6
add r1, #0x68
lsl r2, r2, #8
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #0
pop {r3, r4, r5, pc}
.balign 4, 0

2
asm/overlay_63.s
View File

@ -1458,7 +1458,7 @@ ov63_0221C99C: ; 0x0221C99C
add r1, r2, r1
add r0, r0, r6
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
pop {r4, r5, r6, pc}
.balign 4, 0
_0221C9DC: .word 0x0000328C

2
asm/overlay_67.s
View File

@ -1385,7 +1385,7 @@ _021E6406:
strb r0, [r4, #7]
add r0, r5, #0
add r0, #0x18
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, [r7]
mov r0, #8
bl String_ctor

10
asm/overlay_74_thumb.s
View File

@ -18804,7 +18804,7 @@ ov74_02230714: ; 0x02230714
ldrh r2, [r6, #0x10]
ldr r0, [r6, #0xc]
ldr r1, [r4, #0xc]
bl sub_020D4A50
bl MIi_CpuCopy8
bl ov74_022311AC
ldr r1, [r5]
lsl r1, r1, #0x18
@ -18865,7 +18865,7 @@ ov74_0223078C: ; 0x0223078C
ldrh r2, [r6, #0x10]
ldr r0, [r6, #0xc]
ldr r1, [r4, #0xc]
bl sub_020D4A50
bl MIi_CpuCopy8
bl ov74_022311AC
ldr r1, [r5]
lsl r1, r1, #0x18
@ -18945,7 +18945,7 @@ _0223083C:
ldrh r2, [r6, #0x10]
ldr r0, [r6, #0xc]
ldr r1, [r4, #0xc]
bl sub_020D4A50
bl MIi_CpuCopy8
bl ov74_022311AC
ldr r1, [r5]
lsl r1, r1, #0x18
@ -18990,7 +18990,7 @@ _022308AA:
add r0, r1, r0
ldr r1, [r4, #4]
lsr r2, r2, #8
bl sub_020D4A50
bl MIi_CpuCopy8
_022308BC:
ldr r1, [r5, #8]
ldr r0, _022308DC ; =0xFFFF00FF
@ -20600,7 +20600,7 @@ ov74_022312C0: ; 0x022312C0
lsr r1, r1, #0x18
add r1, r5, r1
add r2, r6, #0
bl sub_020D4A50
bl MIi_CpuCopy8
_022313BE:
add r0, r5, #0
bl ov74_0223145C

18
asm/overlay_80.s
View File

@ -2476,7 +2476,7 @@ ov80_0222B070: ; 0x0222B070
ldr r1, _0222B0B4 ; =0x00000784
add r2, r4, #0
add r1, r5, r1
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _0222B0B4 ; =0x00000784
mov r2, #2
mov r0, #0x26
@ -2514,7 +2514,7 @@ ov80_0222B0B8: ; 0x0222B0B8
add r2, r0, #0
ldr r1, [r4, r1]
add r0, r6, #0
bl sub_020D4A50
bl MIi_CpuCopy8
_0222B0E2:
pop {r4, r5, r6, pc}
.balign 4, 0
@ -3736,7 +3736,7 @@ _0222B990:
ldr r1, [sp, #4]
add r2, r6, #0
add r1, r1, r5
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sp]
add r4, r4, #1
add r5, r5, r6
@ -3797,7 +3797,7 @@ _0222BA0E:
add r1, r6, #0
add r0, r0, r4
add r2, r5, #0
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sp, #4]
add r1, r6, #0
ldr r0, [r0, #0x28]
@ -4217,7 +4217,7 @@ _0222BD06:
ldr r1, [sp, #4]
add r2, r6, #0
add r1, r1, r5
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sp]
add r4, r4, #1
add r5, r5, r6
@ -4279,7 +4279,7 @@ _0222BD86:
add r1, r6, #0
add r0, r0, r4
add r2, r5, #0
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sp, #4]
add r1, r6, #0
ldr r0, [r0, #0x70]
@ -25679,7 +25679,7 @@ _022362F0:
add r0, #0x30
add r1, #0xa1
mov r2, #2
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r4, #0
add r0, #0xa8
ldr r0, [r0]
@ -26201,7 +26201,7 @@ ov80_022366D4: ; 0x022366D4
add r0, r1, r0
add r1, r5, #0
ldr r7, _02236730 ; =0x0223C0AC
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _02236728 ; =0x0223C050
ldr r0, [sp]
mov r4, #0
@ -26216,7 +26216,7 @@ _0223670C:
mul r0, r1
add r0, r7, r0
add r1, r5, #0
bl sub_020D4A50
bl MIi_CpuCopy8
add r4, r4, #1
add r5, #0x38
cmp r4, #4

4
asm/overlay_93_thumb_1.s
View File

@ -4951,13 +4951,13 @@ _0225ECD0:
ldr r1, [r5, r1]
add r0, r6, r7
add r2, r4, #0
bl sub_020D4A50
bl MIi_CpuCopy8
mov r1, #0x25
lsl r1, r1, #4
ldr r1, [r5, r1]
add r0, r6, r7
add r2, r4, #0
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #0x25
lsl r0, r0, #4
ldr r0, [r5, r0]

6
asm/overlay_96.s
View File

@ -6887,7 +6887,7 @@ ov96_021E8BB4: ; 0x021E8BB4
_021E8BE2:
add r1, r6, #0
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r5, #0
bl FreeToHeap
pop {r4, r5, r6, pc}
@ -22661,7 +22661,7 @@ _021F04C6:
add r0, #0x48
add r1, #0x68
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sp, #0x50]
mov r1, #0x10
add r0, r5, r0
@ -101787,7 +101787,7 @@ _022175A0:
add r0, r4, #0
add r1, r5, #0
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r5, #0
mov r1, #0x10
bl sub_02003F04

8
asm/overlay_99.s
View File

@ -2445,7 +2445,7 @@ _021E6C96:
_021E6C98:
add r1, sp, #0x28
mov r2, #0x18
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sp, #0x6c]
cmp r0, #0
beq _021E6CAA
@ -6719,7 +6719,7 @@ _021E8DCC:
lsr r4, r0, #0x18
ldr r0, _021E8EB8 ; =0x021EA394
add r1, sp, #0x40
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #1
str r0, [sp, #0x3c]
ldr r1, [sp, #0xc]
@ -7407,7 +7407,7 @@ ov99_021E92EC: ; 0x021E92EC
add r1, r2, #0
mov r2, #0x6e
lsl r2, r2, #2
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _021E93D8 ; =0x021EA350
mov r0, #0
str r0, [sp, #0xc]
@ -7474,7 +7474,7 @@ _021E9364:
add r0, sp, #0x24
add r0, #2
add r1, r4, #2
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sp, #0x1c]
mov r1, #0
bl ov98_0221EFA4

4
asm/player_data.s
View File

@ -86,11 +86,11 @@ sub_02028ED0: ; 0x02028ED0
thumb_func_start sub_02028EE4
sub_02028EE4: ; 0x02028EE4
ldr r3, _02028EEC ; =sub_020D4A50
ldr r3, _02028EEC ; =MIi_CpuCopy8
mov r2, #0x20
bx r3
nop
_02028EEC: .word sub_020D4A50
_02028EEC: .word MIi_CpuCopy8
thumb_func_end sub_02028EE4
thumb_func_start sub_02028EF0

2930
asm/pokedex.s Normal file
View File

File diff suppressed because it is too large Load Diff

12
asm/pokemon.s
View File

@ -10453,7 +10453,7 @@ _02072926:
add r0, r0, #3
add r1, r4, #0
mov r2, #0x28
bl sub_020D4A50
bl MIi_CpuCopy8
add sp, #0x60
pop {r4, r5, r6, pc}
thumb_func_end sub_02072914
@ -22332,11 +22332,11 @@ _020781B0: .word 0x0000079C
thumb_func_start sub_020781B4
sub_020781B4: ; 0x020781B4
ldr r3, _020781BC ; =sub_020D4A50
ldr r3, _020781BC ; =MIi_CpuCopy8
ldr r2, _020781C0 ; =0x0000079C
bx r3
nop
_020781BC: .word sub_020D4A50
_020781BC: .word MIi_CpuCopy8
_020781C0: .word 0x0000079C
thumb_func_end sub_020781B4
@ -83011,7 +83011,7 @@ _02095FAE:
mul r0, r2
add r0, r7, r0
add r1, r4, #0
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r6, #0
bl sub_02095F68
ldrb r0, [r4]
@ -84269,7 +84269,7 @@ sub_02096998: ; 0x02096998
add r1, r4, r1
add r0, #0x3e
mov r2, #0x1c
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _020969C0 ; =0x0000083E
mov r0, #0x3f
add r1, r4, r1
@ -84306,7 +84306,7 @@ sub_020969C4: ; 0x020969C4
add r0, r6, #0
add r1, r4, #0
mov r2, #0x1c
bl sub_020D4A50
bl MIi_CpuCopy8
_020969F0:
pop {r4, r5, r6, pc}
nop

4
asm/save.s
View File

@ -2688,7 +2688,7 @@ _020284DC:
add r0, r5, #0
add r1, sp, #0x2c
mov r2, #4
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [r4, #4]
ldr r2, [sp, #0x18]
add r0, #0x40
@ -2706,7 +2706,7 @@ _020284DC:
add r0, r5, #0
add r1, sp, #0x28
mov r2, #4
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sp, #8]
mov r1, #1
str r1, [r0]

36
asm/scrcmd.s
View File

@ -22635,7 +22635,7 @@ _0204B680:
add r0, r5, #0
add r1, r4, #0
mov r2, #0x1c
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #1
pop {r3, r4, r5, pc}
thumb_func_end sub_0204B66C
@ -22708,13 +22708,13 @@ sub_0204B708: ; 0x0204B708
ldr r1, _0204B718 ; =0x0000083E
add r2, r0, #0
add r1, r2, r1
ldr r3, _0204B71C ; =sub_020D4A50
ldr r3, _0204B71C ; =MIi_CpuCopy8
add r0, #0x3e
mov r2, #0x1c
bx r3
nop
_0204B718: .word 0x0000083E
_0204B71C: .word sub_020D4A50
_0204B71C: .word MIi_CpuCopy8
thumb_func_end sub_0204B708
thumb_func_start sub_0204B720
@ -30412,7 +30412,7 @@ _0204F424:
add r0, #0x30
add r1, r5, #6
mov r2, #2
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r4, #0
add r0, #0x26
ldrb r0, [r0]
@ -31595,7 +31595,7 @@ _0204FD7C:
add r0, #0x30
add r1, r5, #6
mov r2, #3
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r4, #0
add r0, #0x26
ldrb r0, [r0]
@ -32272,7 +32272,7 @@ _020502BC:
add r0, #0x30
add r1, r5, #6
mov r2, #3
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r4, #0
add r0, #0x26
ldrb r0, [r0]
@ -36143,7 +36143,7 @@ _0205211E:
add r0, r4, #0
add r1, sp, #0x28
mov r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
mov r6, #0
add r1, r6, #0
add r2, sp, #0x28
@ -50239,7 +50239,7 @@ _02058C92:
add r0, #0x30
add r1, #0x3d
mov r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [r4, #4]
add r0, #0x26
ldrb r0, [r0]
@ -51524,7 +51524,7 @@ _020596CE:
bl sub_02074644
add r1, r4, #0
add r2, r6, #0
bl sub_020D4A50
bl MIi_CpuCopy8
add r5, r5, #1
add r4, r4, r6
cmp r5, #3
@ -51693,7 +51693,7 @@ sub_020597D4: ; 0x020597D4
mul r2, r4
add r1, r3, r2
add r2, r4, #0
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [r6, #0x50]
mov r1, #3
bl sub_020744DC
@ -52314,7 +52314,7 @@ _02059CCC:
add r1, r4, #0
ldr r2, _02059D40 ; =0x0000066C
add r1, #0x2c
bl sub_020D4A50
bl MIi_CpuCopy8
add r1, r4, #0
add r0, r5, #0
add r1, #0x2c
@ -82336,7 +82336,7 @@ _02066FC4:
add r0, #0x30
add r1, #0xe
mov r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r4, #0
add r0, #0x26
ldrb r0, [r0]
@ -87181,7 +87181,7 @@ _020693DC:
add r4, #0x68
ldr r0, [sp, #0x14]
add r1, r4, #0
bl sub_020D4A50
bl MIi_CpuCopy8
pop {r3, r4, r5, pc}
nop
_02069400: .word 0x000F423F
@ -87307,7 +87307,7 @@ _020694E4:
ldr r0, [r5, #4]
ldr r2, _02069524 ; =0x0000066C
add r1, #8
bl sub_020D4A50
bl MIi_CpuCopy8
add r1, r5, #0
add r0, r4, #0
add r1, #8
@ -87359,7 +87359,7 @@ sub_02069528: ; 0x02069528
add r1, r7, #0
add r1, #0xa8
mov r2, #0x10
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r4, #0
bl sub_02028F84
add r1, r7, #0
@ -87426,7 +87426,7 @@ _020695E4:
ldr r1, [sp, #8]
mov r2, #8
add r1, r1, r5
bl sub_020D4A50
bl MIi_CpuCopy8
add r4, r4, #1
add r5, #8
cmp r4, #3
@ -87437,7 +87437,7 @@ _020695E4:
add r1, r7, #0
add r1, #0xc0
mov r2, #8
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sp]
cmp r0, #0
bne _0206963E
@ -91011,7 +91011,7 @@ sub_0206B014: ; 0x0206B014
strh r0, [r5, #0x3e]
ldr r0, _0206B26C ; =0x021100C4
mov r2, #0x24
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r5, #0
ldr r1, [sp, #0x58]
add r0, #0x40

6
asm/unk_02007FD8.s
View File

@ -814,14 +814,14 @@ _02008586:
thumb_func_start sub_020085C8
sub_020085C8: ; 0x020085C8
add r2, r0, #0
ldr r3, _020085D8 ; =sub_020D4A50
ldr r3, _020085D8 ; =MIi_CpuCopy8
add r2, #0x84
add r0, r1, #0
add r1, r2, #0
mov r2, #0x28
bx r3
nop
_020085D8: .word sub_020D4A50
_020085D8: .word MIi_CpuCopy8
thumb_func_end sub_020085C8
thumb_func_start sub_020085DC
@ -1029,7 +1029,7 @@ _02008654:
add r1, r4, r6
add r1, #0x84
mov r2, #0x28
bl sub_020D4A50
bl MIi_CpuCopy8
_02008764:
add r0, r4, r6
add sp, #0xc

2
asm/unk_020183F0.s
View File

@ -111,7 +111,7 @@ sub_02018498: ; 0x02018498
add r0, r7, #0
add r1, r4, #4
mov r2, #0x18
bl sub_020D4A50
bl MIi_CpuCopy8
str r5, [r4]
add r0, sp, #8
ldrb r1, [r0, #0x18]

4
asm/unk_02027010.s
View File

@ -26,12 +26,12 @@ _02027020:
ldr r0, _02027080 ; =0x027FFE00
ldr r1, _02027084 ; =0x027FF000
lsl r2, r2, #4
bl sub_020D4A50
bl MIi_CpuCopy8
mov r2, #0x16
ldr r0, _02027080 ; =0x027FFE00
ldr r1, _02027088 ; =0x027FFA80
lsl r2, r2, #4
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _0202708C ; =0x4A414441
ldr r0, _0202707C ; =0x027FF00C
str r1, [r0]

4
asm/unk_020290B4.s
View File

@ -17,11 +17,11 @@ sub_020290B8: ; 0x020290B8
thumb_func_start sub_020290BC
sub_020290BC: ; 0x020290BC
ldr r3, _020290C4 ; =sub_020D4A50
ldr r3, _020290C4 ; =MIi_CpuCopy8
mov r2, #0x20
bx r3
nop
_020290C4: .word sub_020D4A50
_020290C4: .word MIi_CpuCopy8
thumb_func_end sub_020290BC
thumb_func_start sub_020290C8

618
asm/unk_0202A888.s Normal file
View File

@ -0,0 +1,618 @@
.include "asm/macros.inc"
.include "global.inc"
.text
thumb_func_start sub_0202A888
sub_0202A888: ; 0x0202A888
push {r4, lr}
mov r1, #0
mov r2, #0x30
add r4, r0, #0
bl MIi_CpuFill8
mov r1, #0
add r0, r1, #0
_0202A898:
strb r0, [r4, #1]
strb r0, [r4]
add r1, r1, #1
add r4, #0xc
cmp r1, #4
blt _0202A898
pop {r4, pc}
.balign 4, 0
thumb_func_end sub_0202A888
thumb_func_start sub_0202A8A8
sub_0202A8A8: ; 0x0202A8A8
ldr r3, _0202A8B0 ; =GF_RTC_CopyDateTime
add r1, r0, #0
add r1, #0x10
bx r3
.balign 4, 0
_0202A8B0: .word GF_RTC_CopyDateTime
thumb_func_end sub_0202A8A8
thumb_func_start sub_0202A8B4
sub_0202A8B4: ; 0x0202A8B4
mov r0, #0x2e
lsl r0, r0, #4
bx lr
.balign 4, 0
thumb_func_end sub_0202A8B4
thumb_func_start sub_0202A8BC
sub_0202A8BC: ; 0x0202A8BC
push {r4, lr}
add r4, r0, #0
mov r2, #0x2e
mov r0, #0
add r1, r4, #0
lsl r2, r2, #4
bl MIi_CpuClearFast
add r0, r4, #0
bl sub_0202ADEC
mov r0, #2
lsl r0, r0, #8
add r0, r4, r0
bl sub_0202A888
mov r0, #0x23
lsl r0, r0, #4
add r0, r4, r0
bl sub_0202A8A8
mov r0, #0x93
lsl r0, r0, #2
add r0, r4, r0
bl sub_0202AE8C
mov r1, #0x27
lsl r1, r1, #4
ldr r0, _0202A948 ; =0x0000FFFF
add r1, r4, r1
mov r2, #8
bl sub_020D4790
mov r0, #0xa
lsl r0, r0, #6
add r0, r4, r0
mov r1, #0xff
mov r2, #8
bl MIi_CpuFill8
mov r0, #0x2a
lsl r0, r0, #4
add r0, r4, r0
mov r1, #4
bl MailMsg_init_withBank
ldr r0, _0202A94C ; =0x000002A2
mov r1, #0
strh r1, [r4, r0]
ldr r0, _0202A950 ; =0x0000011F
mov r1, #0x63
bl GetECWordIndexByPair
mov r1, #0xa9
lsl r1, r1, #2
strh r0, [r4, r1]
ldr r2, _0202A948 ; =0x0000FFFF
add r0, r1, #2
strh r2, [r4, r0]
mov r3, #0
add r0, r1, #4
sub r2, r3, #1
add r1, #0x18
_0202A93A:
str r2, [r4, r0]
str r2, [r4, r1]
add r3, r3, #1
add r4, r4, #4
cmp r3, #5
blt _0202A93A
pop {r4, pc}
.balign 4, 0
_0202A948: .word 0x0000FFFF
_0202A94C: .word 0x000002A2
_0202A950: .word 0x0000011F
thumb_func_end sub_0202A8BC
thumb_func_start sub_0202A954
sub_0202A954: ; 0x0202A954
ldr r3, _0202A95C ; =SavArray_get
mov r1, #9
bx r3
nop
_0202A95C: .word SavArray_get
thumb_func_end sub_0202A954
thumb_func_start sub_0202A960
sub_0202A960: ; 0x0202A960
ldr r3, _0202A968 ; =sub_020272EC
mov r1, #9
bx r3
nop
_0202A968: .word sub_020272EC
thumb_func_end sub_0202A960
thumb_func_start sub_0202A96C
sub_0202A96C: ; 0x0202A96C
ldr r3, _0202A974 ; =SavArray_get
mov r1, #9
bx r3
nop
_0202A974: .word SavArray_get
thumb_func_end sub_0202A96C
thumb_func_start sub_0202A978
sub_0202A978: ; 0x0202A978
push {r3, lr}
mov r1, #9
bl SavArray_get
mov r1, #2
lsl r1, r1, #8
add r0, r0, r1
pop {r3, pc}
thumb_func_end sub_0202A978
thumb_func_start sub_0202A988
sub_0202A988: ; 0x0202A988
push {r3, lr}
mov r1, #9
bl SavArray_get
mov r1, #0x23
lsl r1, r1, #4
add r0, r0, r1
pop {r3, pc}
thumb_func_end sub_0202A988
thumb_func_start sub_0202A998
sub_0202A998: ; 0x0202A998
push {r3, lr}
mov r1, #9
bl SavArray_get
mov r1, #0x93
lsl r1, r1, #2
add r0, r0, r1
pop {r3, pc}
thumb_func_end sub_0202A998
thumb_func_start GetRivalNamePtr
GetRivalNamePtr: ; 0x0202A9A8
mov r1, #0x27
lsl r1, r1, #4
add r0, r0, r1
bx lr
thumb_func_end GetRivalNamePtr
thumb_func_start sub_0202A9B0
sub_0202A9B0: ; 0x0202A9B0
add r2, r0, #0
add r0, r1, #0
mov r1, #0x27
lsl r1, r1, #4
add r1, r2, r1
ldr r3, _0202A9C0 ; =CopyStringToU16Array
mov r2, #8
bx r3
.balign 4, 0
_0202A9C0: .word CopyStringToU16Array
thumb_func_end sub_0202A9B0
thumb_func_start sub_0202A9C4
sub_0202A9C4: ; 0x0202A9C4
ldr r2, _0202A9D4 ; =0x0000029B
mov r1, #1
ldrb r3, [r0, r2]
bic r3, r1
mov r1, #1
orr r1, r3
strb r1, [r0, r2]
bx lr
.balign 4, 0
_0202A9D4: .word 0x0000029B
thumb_func_end sub_0202A9C4
thumb_func_start sub_0202A9D8
sub_0202A9D8: ; 0x0202A9D8
ldr r1, _0202A9E4 ; =0x0000029B
ldrb r0, [r0, r1]
lsl r0, r0, #0x1f
lsr r0, r0, #0x1f
bx lr
nop
_0202A9E4: .word 0x0000029B
thumb_func_end sub_0202A9D8
thumb_func_start sub_0202A9E8
sub_0202A9E8: ; 0x0202A9E8
push {r4, r5}
mov r4, #0xa6
lsl r4, r4, #2
strh r1, [r0, r4]
add r1, r4, #2
ldrb r1, [r0, r1]
mov r5, #0x7f
lsl r2, r2, #0x18
bic r1, r5
lsr r5, r2, #0x18
mov r2, #0x7f
and r2, r5
orr r2, r1
add r1, r4, #2
strb r2, [r0, r1]
ldrb r1, [r0, r1]
mov r2, #0x80
bic r1, r2
lsl r2, r3, #0x18
lsr r2, r2, #0x18
lsl r2, r2, #0x1f
lsr r2, r2, #0x18
orr r2, r1
add r1, r4, #2
strb r2, [r0, r1]
pop {r4, r5}
bx lr
.balign 4, 0
thumb_func_end sub_0202A9E8
thumb_func_start sub_0202AA20
sub_0202AA20: ; 0x0202AA20
push {r4, r5}
mov r4, #0xa6
lsl r4, r4, #2
ldrh r5, [r0, r4]
str r5, [r1]
add r1, r4, #2
ldrb r1, [r0, r1]
lsl r1, r1, #0x19
lsr r1, r1, #0x19
str r1, [r2]
add r1, r4, #2
ldrb r0, [r0, r1]
lsl r0, r0, #0x18
lsr r0, r0, #0x1f
str r0, [r3]
pop {r4, r5}
bx lr
.balign 4, 0
thumb_func_end sub_0202AA20
thumb_func_start sub_0202AA44
sub_0202AA44: ; 0x0202AA44
push {r4, r5, r6, r7}
add r4, r2, #0
cmp r1, #2
bls _0202AA52
mov r0, #0
pop {r4, r5, r6, r7}
bx lr
_0202AA52:
ldr r3, _0202AA94 ; =0x020F677D
lsl r1, r1, #1
ldrb r3, [r3, r1]
mov r2, #0
cmp r3, #0
ble _0202AA8E
ldr r5, _0202AA98 ; =0x020F677C
ldrb r3, [r5, r1]
add r5, r5, r1
ldrb r1, [r5]
add r3, r0, r3
ldrb r6, [r5, #1]
add r0, r0, r1
mov r1, #0xa
lsl r1, r1, #6
add r5, r1, #0
_0202AA72:
ldrb r7, [r3, r5]
cmp r7, #0xff
beq _0202AA8E
add r7, r2, r0
ldrb r7, [r7, r1]
cmp r4, r7
bne _0202AA86
mov r0, #1
pop {r4, r5, r6, r7}
bx lr
_0202AA86:
add r2, r2, #1
add r3, r3, #1
cmp r2, r6
blt _0202AA72
_0202AA8E:
mov r0, #0
pop {r4, r5, r6, r7}
bx lr
.balign 4, 0
_0202AA94: .word 0x020F677D
_0202AA98: .word 0x020F677C
thumb_func_end sub_0202AA44
thumb_func_start sub_0202AA9C
sub_0202AA9C: ; 0x0202AA9C
push {r4, r5}
cmp r1, #2
bhi _0202AAC8
lsl r4, r1, #1
ldr r1, _0202AACC ; =0x020F677D
mov r2, #0
ldrb r1, [r1, r4]
cmp r1, #0
ble _0202AAC8
ldr r3, _0202AAD0 ; =0x020F677C
ldrb r1, [r3, r4]
add r4, r3, r4
mov r3, #0xff
add r5, r0, r1
mov r0, #0xa
lsl r0, r0, #6
_0202AABC:
strb r3, [r5, r0]
ldrb r1, [r4, #1]
add r2, r2, #1
add r5, r5, #1
cmp r2, r1
blt _0202AABC
_0202AAC8:
pop {r4, r5}
bx lr
.balign 4, 0
_0202AACC: .word 0x020F677D
_0202AAD0: .word 0x020F677C
thumb_func_end sub_0202AA9C
thumb_func_start sub_0202AAD4
sub_0202AAD4: ; 0x0202AAD4
push {r4, r5}
mov r2, #0
cmp r1, #2
bls _0202AAE2
add r0, r2, #0
pop {r4, r5}
bx lr
_0202AAE2:
lsl r4, r1, #1
ldr r1, _0202AB10 ; =0x020F677C
ldr r3, _0202AB14 ; =0x020F677D
ldrb r1, [r1, r4]
ldrb r3, [r3, r4]
add r3, r1, r3
sub r5, r3, #1
cmp r1, r5
bgt _0202AB08
mov r3, #0xa
lsl r3, r3, #6
_0202AAF8:
add r4, r0, r1
ldrb r4, [r4, r3]
cmp r4, #0xff
beq _0202AB02
add r2, r2, #1
_0202AB02:
add r1, r1, #1
cmp r1, r5
ble _0202AAF8
_0202AB08:
lsl r0, r2, #0x18
lsr r0, r0, #0x18
pop {r4, r5}
bx lr
.balign 4, 0
_0202AB10: .word 0x020F677C
_0202AB14: .word 0x020F677D
thumb_func_end sub_0202AAD4
thumb_func_start sub_0202AB18
sub_0202AB18: ; 0x0202AB18
push {r4, r5, r6, r7, lr}
sub sp, #0xc
str r1, [sp]
str r3, [sp, #4]
add r4, r0, #0
ldr r0, [sp]
mov ip, r2
cmp r0, #2
bhi _0202ABA2
lsl r7, r0, #1
ldr r0, _0202ABA8 ; =0x020F677D
ldrb r6, [r0, r7]
ldr r0, _0202ABAC ; =0x020F677C
ldrb r0, [r0, r7]
str r0, [sp, #8]
add r0, r0, r6
ldr r3, [sp, #8]
sub r5, r0, #1
add r0, r3, #0
cmp r0, r5
bgt _0202AB60
mov r0, #0xa
lsl r0, r0, #6
_0202AB46:
add r2, r4, r3
ldrb r1, [r2, r0]
cmp r1, #0xff
bne _0202AB5A
mov r1, #0xa
ldr r0, [sp, #4]
lsl r1, r1, #6
strb r0, [r2, r1]
add sp, #0xc
pop {r4, r5, r6, r7, pc}
_0202AB5A:
add r3, r3, #1
cmp r3, r5
ble _0202AB46
_0202AB60:
add r1, r6, #1
mov r0, ip
cmp r0, r1
bne _0202AB80
ldr r1, [sp]
add r0, r4, #0
bl sub_0202AA9C
ldr r0, [sp, #8]
mov r1, #0xa
add r2, r4, r0
ldr r0, [sp, #4]
lsl r1, r1, #6
strb r0, [r2, r1]
add sp, #0xc
pop {r4, r5, r6, r7, pc}
_0202AB80:
mov r0, #0xa
ldr r2, _0202ABAC ; =0x020F677C
lsl r0, r0, #6
add r1, r4, r0
ldr r0, [sp, #8]
ldrb r2, [r2, r7]
add r0, r0, #1
add r0, r1, r0
add r1, r1, r2
sub r2, r6, #1
bl MIi_CpuCopy8
mov r1, #0xa
ldr r0, [sp, #4]
add r2, r4, r5
lsl r1, r1, #6
strb r0, [r2, r1]
_0202ABA2:
add sp, #0xc
pop {r4, r5, r6, r7, pc}
nop
_0202ABA8: .word 0x020F677D
_0202ABAC: .word 0x020F677C
thumb_func_end sub_0202AB18
thumb_func_start sub_0202ABB0
sub_0202ABB0: ; 0x0202ABB0
mov r3, #0xb6
lsl r3, r3, #2
str r1, [r0, r3]
add r1, r3, #4
strb r2, [r0, r1]
bx lr
thumb_func_end sub_0202ABB0
thumb_func_start sub_0202ABBC
sub_0202ABBC: ; 0x0202ABBC
push {r3, r4}
mov r3, #0xb6
lsl r3, r3, #2
ldr r4, [r0, r3]
str r4, [r1]
add r1, r3, #4
ldrb r0, [r0, r1]
strb r0, [r2]
pop {r3, r4}
bx lr
thumb_func_end sub_0202ABBC
thumb_func_start sub_0202ABD0
sub_0202ABD0: ; 0x0202ABD0
mov r2, #0x2a
lsl r2, r2, #4
ldrh r3, [r0, r2]
strh r3, [r1]
add r3, r2, #2
ldrh r3, [r0, r3]
strh r3, [r1, #2]
add r3, r2, #4
ldrh r3, [r0, r3]
add r2, r2, #6
strh r3, [r1, #4]
ldrh r0, [r0, r2]
strh r0, [r1, #6]
bx lr
thumb_func_end sub_0202ABD0
thumb_func_start sub_0202ABEC
sub_0202ABEC: ; 0x0202ABEC
push {r3, r4}
ldrh r3, [r1]
mov r2, #0x2a
lsl r2, r2, #4
strh r3, [r0, r2]
ldrh r4, [r1, #2]
add r3, r2, #2
strh r4, [r0, r3]
ldrh r4, [r1, #4]
add r3, r2, #4
strh r4, [r0, r3]
ldrh r3, [r1, #6]
add r1, r2, #6
strh r3, [r0, r1]
pop {r3, r4}
bx lr
thumb_func_end sub_0202ABEC
thumb_func_start sub_0202AC0C
sub_0202AC0C: ; 0x0202AC0C
ldr r2, _0202AC18 ; =0x0000029B
ldrb r0, [r0, r2]
lsl r0, r0, #0x1b
lsr r0, r0, #0x1c
strb r0, [r1]
bx lr
.balign 4, 0
_0202AC18: .word 0x0000029B
thumb_func_end sub_0202AC0C
thumb_func_start sub_0202AC1C
sub_0202AC1C: ; 0x0202AC1C
push {r3, r4}
ldr r3, _0202AC34 ; =0x0000029B
lsl r1, r1, #0x1c
ldrb r4, [r0, r3]
mov r2, #0x1e
lsr r1, r1, #0x1b
bic r4, r2
orr r1, r4
strb r1, [r0, r3]
pop {r3, r4}
bx lr
nop
_0202AC34: .word 0x0000029B
thumb_func_end sub_0202AC1C
thumb_func_start sub_0202AC38
sub_0202AC38: ; 0x0202AC38
push {r3, r4, r5, r6}
sub r4, r1, #1
lsl r1, r4, #2
mov r5, #0xaa
add r1, r0, r1
lsl r5, r5, #2
ldr r6, [r1, r5]
add r0, r0, r4
str r6, [r2]
add r2, r5, #0
add r2, #0x14
ldr r1, [r1, r2]
add r5, #0x28
str r1, [r3]
ldrb r1, [r0, r5]
ldr r0, [sp, #0x10]
strb r1, [r0]
pop {r3, r4, r5, r6}
bx lr
.balign 4, 0
thumb_func_end sub_0202AC38
thumb_func_start sub_0202AC60
sub_0202AC60: ; 0x0202AC60
push {r4, r5}
sub r1, r1, #1
lsl r4, r1, #2
add r5, r0, r4
mov r4, #0xaa
lsl r4, r4, #2
str r2, [r5, r4]
add r2, r4, #0
add r2, #0x14
str r3, [r5, r2]
ldr r2, _0202AC84 ; =0xFFFFFFF8
add r0, r0, r1
add r2, sp
ldrb r2, [r2, #0x10]
add r4, #0x28
strb r2, [r0, r4]
pop {r4, r5}
bx lr
.balign 4, 0
_0202AC84: .word 0xFFFFFFF8
thumb_func_end sub_0202AC60

50736
asm/unk_0202ADEC.s Normal file
View File

File diff suppressed because it is too large Load Diff

3
global.inc
View File

@ -27317,7 +27317,7 @@
.public sub_020D48B4
.public MI_Copy36B
.public sub_020D4968
.public sub_020D4A50
.public MIi_CpuCopy8
.public sub_020D4BD0
.public MI_UncompressLZ8
.public sub_020D4D5C
@ -28971,3 +28971,4 @@
.public sub_02055408
.public sub_020669F0
.public sub_0206D328
.public sub_0202ADEC

66
lib/asm/nitro.s
View File

@ -11371,13 +11371,13 @@ _020D3C3C: .word 0x00000800
arm_func_start OS_GetMacAddress
OS_GetMacAddress: ; 0x020D3C40
ldr ip, _020D3C54 ; =sub_020D4A50
ldr ip, _020D3C54 ; =MIi_CpuCopy8
mov r1, r0
ldr r0, _020D3C58 ; =0x027FFCF4
mov r2, #6
bx ip
.align 2, 0
_020D3C54: .word sub_020D4A50
_020D3C54: .word MIi_CpuCopy8
_020D3C58: .word 0x027FFCF4
arm_func_end OS_GetMacAddress
@ -12528,8 +12528,8 @@ _020D4A38:
bx lr
arm_func_end MIi_CpuFill8
arm_func_start sub_020D4A50
sub_020D4A50: ; 0x020D4A50
arm_func_start MIi_CpuCopy8
MIi_CpuCopy8: ; 0x020D4A50
cmp r2, #0
beq _020D4A5C
b _020D4A60
@ -12653,7 +12653,7 @@ _020D4BB4:
orr r0, r2, r0
strh r0, [r1]
bx lr
arm_func_end sub_020D4A50
arm_func_end MIi_CpuCopy8
thumb_func_start sub_020D4BD0
sub_020D4BD0: ; 0x020D4BD0
@ -15687,12 +15687,12 @@ _020D71C8:
ldr r0, [sp]
mov r1, r5
mov r2, r8
bl sub_020D4A50
bl MIi_CpuCopy8
add r1, r7, r8
ldr r0, _020D733C ; =_02110C98
add r1, r5, r1
mov r2, #2
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, sp, #4
mov r1, sb
bl sub_020D6B60
@ -15727,7 +15727,7 @@ _020D7254:
add r0, sp, #0x60
mov r2, r6
sub r1, r1, r6
bl sub_020D4A50
bl MIi_CpuCopy8
sub r4, r4, r6
b _020D7288
_020D7278:
@ -15769,7 +15769,7 @@ _020D72D8:
add r0, sp, #0x60
mov r2, sb
sub r1, r1, sb
bl sub_020D4A50
bl MIi_CpuCopy8
sub r4, r4, sb
b _020D7324
_020D7310:
@ -15880,7 +15880,7 @@ sub_020D7448: ; 0x020D7448
ldr r0, [r0, #0x28]
add r0, r0, r2
mov r2, r3
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #0
ldmia sp!, {r3, pc}
arm_func_end sub_020D7448
@ -15892,7 +15892,7 @@ sub_020D7464: ; 0x020D7464
mov r0, r1
add r1, ip, r2
mov r2, r3
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #0
ldmia sp!, {r3, pc}
arm_func_end sub_020D7464
@ -15902,7 +15902,7 @@ sub_020D7484: ; 0x020D7484
stmdb sp!, {r3, lr}
mov r0, r2
mov r2, r3
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #0
ldmia sp!, {r3, pc}
arm_func_end sub_020D7484
@ -17478,7 +17478,7 @@ FS_LoadOverlayInfo: ; 0x020D88C0
mov r1, r5
add r0, ip, r3
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, sp, #0x18
str r4, [r5, #0x20]
bl FS_InitFile
@ -17621,7 +17621,7 @@ FSi_CompareDigest: ; 0x020D8AD8
ldr r2, _020D8B68 ; =_02110CA0
add r1, sp, #4
ldmia r2, {r0, r2}
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r3, _020D8B68 ; =_02110CA0
mov r1, r6
ldr ip, [r3, #4]
@ -17899,14 +17899,14 @@ sub_020D8E40: ; 0x020D8E40
add r1, r6, #0x18
mov r0, r5
add r1, r1, ip
bl sub_020D4A50
bl MIi_CpuCopy8
ldmia sp!, {r4, r5, r6, r7, r8, pc}
_020D8E94:
add r1, r6, #0x18
mov r0, r5
mov r2, r7
add r1, r1, ip
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r6
bl sub_020D8FC0
sub r4, r4, r7
@ -17919,7 +17919,7 @@ _020D8EC8:
mov r0, r7
mov r2, r5
add r1, r6, #0x18
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r6
add r7, r7, #0x40
bl sub_020D8FC0
@ -17931,7 +17931,7 @@ _020D8EF0:
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
mov r0, r7
add r1, r6, #0x18
bl sub_020D4A50
bl MIi_CpuCopy8
ldmia sp!, {r4, r5, r6, r7, r8, pc}
arm_func_end sub_020D8E40
@ -17978,7 +17978,7 @@ _020D8F88:
mov r0, r4
mov r1, r5
mov r2, #0x10
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r4
mov r1, #0
mov r2, #0x58
@ -18287,7 +18287,7 @@ sub_020D93C4: ; 0x020D93C4
mov r0, sb
mov r2, r4
add r1, r6, r1
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _020D9514 ; =_02110E70
mov r0, sl
ldr r3, [r1]
@ -18303,7 +18303,7 @@ _020D945C:
mov r0, sb
mov r2, r8
add r1, r6, r1
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sl, #0x1c]
add r0, r0, r8
str r0, [sl, #0x1c]
@ -18331,7 +18331,7 @@ _020D94C0:
mov r0, sb
mov r1, r6
mov r2, r5
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r3, [r4]
mov r0, sl
mov r1, r6
@ -18348,7 +18348,7 @@ _020D94F4:
mov r0, sb
mov r1, r6
mov r2, r8
bl sub_020D4A50
bl MIi_CpuCopy8
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
.align 2, 0
_020D9514: .word _02110E70
@ -22286,7 +22286,7 @@ sub_020DC7A8: ; 0x020DC7A8
ldr r0, _020DC8A8 ; =0x027FFE00
mov r2, #0x160
sub r1, r0, #0x380
bl sub_020D4A50
bl MIi_CpuCopy8
_020DC81C:
mov r2, #0
mov r0, #4
@ -22773,7 +22773,7 @@ _020DCE3C:
ldr r0, [sb, #0x1c]
mov r1, r6
mov r2, r8
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r6
mov r1, r8
bl DC_FlushRange
@ -22813,7 +22813,7 @@ _020DCEC8:
ldr r1, [sb, #0x20]
mov r0, r6
mov r2, r8
bl sub_020D4A50
bl MIi_CpuCopy8
_020DCEE0:
ldr r0, [sb, #0x1c]
add r0, r0, r8
@ -23068,7 +23068,7 @@ sub_020DD1D4: ; 0x020DD1D4
ldr r1, [r4, #0x20]
mov r2, r5
add r0, r0, r3
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r2, [r4, #0x1c]
ldr r1, [r4, #0x20]
ldr r0, [r4, #0x24]
@ -24604,7 +24604,7 @@ sub_020DE5E4: ; 0x020DE5E4
mov r0, r6
mov r1, r5
mov r2, r4
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r5
mov r1, r4
bl sub_020D2878
@ -24902,7 +24902,7 @@ _020DE988:
ldr r1, _020DEB00 ; =0x021E4284
mov r2, #6
strh r3, [ip, #0x8c]
bl sub_020D4A50
bl MIi_CpuCopy8
cmp fp, #0
mov r2, #0x18
beq _020DEA40
@ -26023,7 +26023,7 @@ _020DF884:
strh r3, [sp, #8]
ldrh r3, [r4, #8]
strh r3, [sp, #0xa]
bl sub_020D4A50
bl MIi_CpuCopy8
ldrh r2, [r4, #0x10]
add r1, sp, #0x16
add r0, r4, #0x14
@ -26033,7 +26033,7 @@ _020DF884:
strh r3, [sp, #0x36]
ldrh r3, [r4, #0x12]
strh r3, [sp, #0x14]
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, sp, #0
mov r1, #0x3c
bl sub_020DE5E4
@ -26101,7 +26101,7 @@ sub_020DF94C: ; 0x020DF94C
beq _020DF9E4
add r1, sp, #8
mov r0, r5
bl sub_020D4A50
bl MIi_CpuCopy8
b _020DF9F0
_020DF9E4:
add r0, sp, #8
@ -26556,7 +26556,7 @@ sub_020DFFBC: ; 0x020DFFBC
add r1, sp, #8
mov r0, r6
mov r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
str r5, [sp]
str r4, [sp, #4]
ldr r2, [sp, #8]

2
lib/asm/nnsys.s
View File

@ -26161,7 +26161,7 @@ _020CA4DC:
add r0, r5, #0x3c
mov r2, r6
add r1, r0, r1, lsl #2
bl sub_020D4A50
bl MIi_CpuCopy8
mov r2, r6
add r0, r5, #0x3c
mov r1, #0

232
lib/asm/sdk.s
View File

@ -6925,7 +6925,7 @@ sub_0209E430: ; 0x0209E430
ldr r0, _0209E4F0 ; =0x021D43D4
mov r1, r4
mov r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _0209E4F4 ; =0x000007FF
ldr r3, [r4]
sub r0, r1, #0x800
@ -6937,7 +6937,7 @@ sub_0209E430: ; 0x0209E430
ldr r0, _0209E4F8 ; =0x021D43D9
add r1, r4, #8
mov r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, [r4, #8]
ldr r0, [r4, #0xc]
mov r1, r1, lsr #3
@ -6955,7 +6955,7 @@ sub_0209E430: ; 0x0209E430
ldr r0, _0209E4FC ; =0x021D43DE
add r1, r4, #0x10
mov r2, #2
bl sub_020D4A50
bl MIi_CpuCopy8
ldrh r1, [r4, #0x10]
ldr r3, _0209E500 ; =0x000003FF
ldr r0, _0209E504 ; =0x021D43E0
@ -6966,7 +6966,7 @@ sub_0209E430: ; 0x0209E430
mov r2, #2
and r3, ip, r3
strh r3, [r4, #0x10]
bl sub_020D4A50
bl MIi_CpuCopy8
ldmia sp!, {r4, pc}
.align 2, 0
_0209E4F0: .word 0x021D43D4
@ -7007,7 +7007,7 @@ _0209E564:
mov r0, r6
mov r2, fp
add r1, sl, #0xf0
bl sub_020D4A50
bl MIi_CpuCopy8
mov r1, sl
mov r2, #0xfe
add r0, sl, #0x200
@ -7166,12 +7166,12 @@ _0209E76C: .word 0x021D43C8
arm_func_start sub_0209E770
sub_0209E770: ; 0x0209E770
ldr ip, _0209E780 ; =sub_020D4A50
ldr ip, _0209E780 ; =MIi_CpuCopy8
ldr r1, _0209E784 ; =0x021D43D4
mov r2, #0xe
bx ip
.align 2, 0
_0209E780: .word sub_020D4A50
_0209E780: .word MIi_CpuCopy8
_0209E784: .word 0x021D43D4
arm_func_end sub_0209E770
@ -7244,11 +7244,11 @@ sub_0209E824: ; 0x0209E824
add r1, sp, #4
mov r0, r5
mov r2, #4
bl sub_020D4A50
bl MIi_CpuCopy8
add r1, sp, #0
mov r0, r4
mov r2, #4
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r3, [sp]
ldr r2, [sp, #4]
mvn r0, #1
@ -7761,7 +7761,7 @@ sub_0209EF2C: ; 0x0209EF2C
str r2, [sp, #4]
str r3, [sp]
mov r2, #5
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r2, [sp]
ldr r1, [sp, #4]
mov ip, r2, lsr #5
@ -7779,7 +7779,7 @@ sub_0209EF2C: ; 0x0209EF2C
str ip, [sp]
str r3, [sp, #4]
mov r2, #4
bl sub_020D4A50
bl MIi_CpuCopy8
ldrh r0, [r4, #0x10]
ldr r1, [sp, #4]
ldr r3, _0209EFE0 ; =0x021D43D4
@ -7793,7 +7793,7 @@ sub_0209EF2C: ; 0x0209EF2C
mov r4, r2, asr #2
mov r2, #2
strb r4, [r3, #0xb]
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _0209EFE0 ; =0x021D43D4
add sp, sp, #8
ldmia sp!, {r4, pc}
@ -7946,7 +7946,7 @@ _0209F1D4:
add r0, r8, #0x1f0
add r1, r8, #0xf0
mov r2, #0xe
bl sub_020D4A50
bl MIi_CpuCopy8
ldrb r0, [r8, #0x1ef]
strb r0, [r8, #0xef]
b _0209F234
@ -7960,7 +7960,7 @@ _0209F204:
add r0, r8, #0xf0
add r1, r8, #0x1f0
mov r2, #0xe
bl sub_020D4A50
bl MIi_CpuCopy8
ldrb r0, [r8, #0xef]
strb r0, [r8, #0x1ef]
_0209F234:
@ -8121,7 +8121,7 @@ _0209F454:
mov r0, r5
mov r2, r4
add r1, r7, #0xf0
bl sub_020D4A50
bl MIi_CpuCopy8
add r6, r6, #1
cmp r6, #2
add r7, r7, #0x100
@ -8198,7 +8198,7 @@ _0209F534:
add r0, sp, #8
add r1, sp, #0
mov r2, #8
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r4, _0209F62C ; =0x02108FA0
add r3, sp, #0
mov r5, #0
@ -10968,7 +10968,7 @@ sub_020A181C: ; 0x020A181C
mov r1, r8
mov r2, r7
movne r5, r7
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, [sb, #0x64]
ldrsb r0, [r1, #0xfe]
cmp r0, #0
@ -11125,7 +11125,7 @@ _020A1A78:
movhi sl, r1
ldr r1, [sp, #0xc]
mov r2, sl
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, sl
bl sub_020A6E4C
add sp, sp, #0x14
@ -11268,7 +11268,7 @@ _020A1C68:
ldr r1, [sp]
ldr r2, [sp, #4]
add r0, r7, #0xc
bl sub_020D4A50
bl MIi_CpuCopy8
cmp fp, #0
ldrneh r0, [r7, #6]
ldr r1, [sp, #0x30]
@ -11341,7 +11341,7 @@ sub_020A1D10: ; 0x020A1D10
strh r3, [r5, #6]
ldr r3, [r7, #0x1c]
str r3, [r5, #8]
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [r4, #0x100]
cmp r0, #0
ldrne r0, [r4, #0x100]
@ -11636,12 +11636,12 @@ _020A216C:
ldr r1, [r5, #0x18]
mov r2, r7
add r0, r6, r0
bl sub_020D4A50
bl MIi_CpuCopy8
_020A2198:
ldr r1, [r5, #0x10]
ldr r2, [r5, #0x14]
mov r0, r6
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r4, #0x100
ldrh r6, [r0]
strh r7, [r5, #0x20]
@ -11851,7 +11851,7 @@ _020A245C:
ldr r0, [r6, #0x10]
mov r1, r7
mov r2, r4
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [r6, #0x10]
add r0, r0, r4
str r0, [r6, #0x10]
@ -11864,7 +11864,7 @@ _020A248C:
ldr r0, [r6, #0x18]
mov r2, r5
add r1, r7, r4
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [r6, #0x18]
add r0, r0, r5
str r0, [r6, #0x18]
@ -13269,7 +13269,7 @@ sub_020A35FC: ; 0x020A35FC
mov r0, r1
add r1, sp, #0x10
mov r2, #4
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sp, #0x10]
add r1, sp, #0xc
bl sub_020A3680
@ -14012,7 +14012,7 @@ sub_020A3F64: ; 0x020A3F64
add r1, r7, #6
mov r2, #6
mov r4, r3
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r7
mov r3, r5
add r1, r7, #6
@ -14126,7 +14126,7 @@ _020A4100:
ldr r1, [ip, #0x28]
add r1, r3, r1
add r1, r1, #2
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _020A41A8 ; =0x021D4620
mov r0, r7
ldr r3, [r1, #0x58]
@ -14134,7 +14134,7 @@ _020A4100:
mov r2, #6
add r1, r3, r1
add r1, r1, #8
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _020A41A8 ; =0x021D4620
add r0, r6, #6
ldr r3, [r1, #0x58]
@ -14142,7 +14142,7 @@ _020A4100:
sub r2, r5, #6
add r1, r3, r1
add r1, r1, #0xe
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sp, #0x18]
cmp r0, #0
ldrne r2, [sp, #0x1c]
@ -14154,7 +14154,7 @@ _020A4100:
add r1, r3, r1
add r1, r1, #8
add r1, r1, r5
bl sub_020D4A50
bl MIi_CpuCopy8
_020A419C:
ldr r0, _020A41A8 ; =0x021D4620
str r4, [r0, #0x28]
@ -14348,7 +14348,7 @@ sub_020A43E0: ; 0x020A43E0
ldr r0, _020A44CC ; =0x021D4B08
add r1, sp, #6
mov r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #1
ldr r1, _020A44D0 ; =0x00000608
strb r0, [sp, #0xf]
@ -14361,7 +14361,7 @@ sub_020A43E0: ; 0x020A43E0
ldr r0, _020A44CC ; =0x021D4B08
add r1, sp, #0x16
mov r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _020A44D8 ; =0x021D4620
mov r1, r4, lsr #0x10
ldr r3, [r0, #0x50]
@ -14475,7 +14475,7 @@ _020A45B0:
add r1, r1, #4
mov r2, #6
strh r4, [r3, r5]
bl sub_020D4A50
bl MIi_CpuCopy8
ldmia sp!, {r3, r4, r5, r6, r7, pc}
_020A45E8:
add r1, r1, #1
@ -14512,7 +14512,7 @@ _020A4648:
add r1, r1, #4
mov r2, #6
str r6, [r3, r5]
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _020A4684 ; =0x021D46AA
strh r4, [r0, r5]
ldmia sp!, {r3, r4, r5, r6, r7, pc}
@ -14553,7 +14553,7 @@ _020A46E4:
ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
sub r1, r8, #0xe
mov r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
b _020A472C
_020A46FC:
mov r0, #1
@ -14572,7 +14572,7 @@ _020A472C:
ldr r0, _020A4754 ; =0x021D4B08
sub r1, r8, #8
mov r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
mov r2, r6
mov r3, r5
sub r0, r8, #0xe
@ -14643,7 +14643,7 @@ _020A482C:
ldr r0, _020A4878 ; =_02110690
sub r1, r8, #0x1c
mov r2, #8
bl sub_020D4A50
bl MIi_CpuCopy8
bl sub_020D3A38
mov r4, r0
ldr r0, _020A487C ; =0x021D4B08
@ -15107,11 +15107,11 @@ sub_020A4ED8: ; 0x020A4ED8
add r1, r4, #0x12
mov r2, #0xa
strh r3, [r4, #6]
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _020A4F78 ; =0x021D4B08
add r1, r4, #8
mov r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r3, _020A4F7C ; =0x021D4620
add r0, r4, #0x12
ldr r2, [r3, #0x50]
@ -15129,11 +15129,11 @@ sub_020A4ED8: ; 0x020A4ED8
mov r3, ip, lsl #8
orr r3, r3, ip, asr #8
strh r3, [r4, #0x10]
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _020A4F78 ; =0x021D4B08
sub r1, r4, #8
mov r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
sub r0, r4, #0xe
mov r1, #0x2a
mov r2, #0
@ -15346,7 +15346,7 @@ _020A51D0:
ldr r1, [r4, #0x40]
ldr r2, [r4, #0x44]
add r0, r7, #8
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [r4, #4]
cmp r0, #3
bne _020A5298
@ -16127,7 +16127,7 @@ _020A5C94:
mov r2, r8
add r0, sb, r1, asr #2
add r1, ip, r3
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, [r5, #0x44]
mov r0, r4
add r1, r1, r8
@ -16499,7 +16499,7 @@ _020A61F4:
ldr r1, [r4, #0x40]
ldr r2, [r4, #0x44]
add r0, r7, #8
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [r4, #4]
cmp r0, #3
bne _020A6244
@ -16633,7 +16633,7 @@ _020A639C:
ldr r1, [r6, #0x34]
mov r2, r5
add r1, r1, #0xe
bl sub_020D4A50
bl MIi_CpuCopy8
_020A6408:
ldrh r0, [r7, #4]
cmp r0, #8
@ -16671,7 +16671,7 @@ _020A6440:
strh r1, [r7, #4]
ldr r1, [r7, #0x30]
add r1, r1, fp, lsl #3
bl sub_020D4A50
bl MIi_CpuCopy8
ldrh r4, [r7, #8]
cmp r4, #0
addeq sp, sp, #0xc
@ -18220,7 +18220,7 @@ sub_020A77B8: ; 0x020A77B8
orr r3, r2, r3, asr #8
mov r2, #6
strh r3, [r6, #0xe]
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _020A7934 ; =0x00008263
ldr r1, _020A7938 ; =0x00006353
strh r0, [r6, #0xec]
@ -18237,14 +18237,14 @@ sub_020A77B8: ; 0x020A77B8
add r1, r6, #0xf6
mov r2, #6
strb r3, [r6, #0xf5]
bl sub_020D4A50
bl MIi_CpuCopy8
mov r1, #0xc
strb r1, [r6, #0xfc]
mov r2, #0xa
ldr r0, _020A7940 ; =_0211069C
add r1, r6, #0xfe
strb r2, [r6, #0xfd]
bl sub_020D4A50
bl MIi_CpuCopy8
mov r1, #0x37
strb r1, [r6, #0x108]
mov r2, #3
@ -18955,7 +18955,7 @@ _020A82AC:
bhi _020A82DC
mov r1, fp
add r0, r0, #0xa
bl sub_020D4A50
bl MIi_CpuCopy8
mov r4, #1
b _020A82DC
_020A82CC:
@ -19197,7 +19197,7 @@ _020A85B8:
mov r1, r7
add r0, r6, #0x20
mov r2, #0x30
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #1
strb r0, [r7, #0x30]
b _020A861C
@ -19237,11 +19237,11 @@ _020A8650:
mov r0, r5
add r1, r8, #0x74
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
mov r1, r8
add r0, r5, #0x20
mov r2, #0x30
bl sub_020D4A50
bl MIi_CpuCopy8
bl sub_020D34B0
mov r0, r0, lsr #0x10
orr r0, r0, r1, lsl #16
@ -19313,11 +19313,11 @@ _020A8774:
mov r1, sb
add r0, r8, #0x74
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r8
add r1, sb, #0x20
mov r2, #0x30
bl sub_020D4A50
bl MIi_CpuCopy8
str r5, [sb, #0x50]
mov r0, #1
strb r0, [sb, #0x5a]
@ -19661,7 +19661,7 @@ _020A8BAC:
add r1, sb, #0x94
mov r2, r4
add r1, r1, #0x400
bl sub_020D4A50
bl MIi_CpuCopy8
str r4, [sb, #0x594]
b _020A8C44
_020A8BCC:
@ -19697,7 +19697,7 @@ _020A8C28:
add r1, sb, #0x198
mov r2, r4
add r1, r1, #0x400
bl sub_020D4A50
bl MIi_CpuCopy8
str r4, [sb, #0x5a0]
_020A8C44:
ldr r0, [sp, #4]
@ -19803,7 +19803,7 @@ _020A8D6C:
ldr r0, [sp, #4]
mov r2, r4
add r1, sb, #0x7b0
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, sb, r4
mov r1, #0
strb r1, [r0, #0x7b0]
@ -20327,7 +20327,7 @@ sub_020A94C8: ; 0x020A94C8
add r0, r5, #2
add r1, r6, #0x54
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
ldrb r7, [r6, #0x30]
ldrb r4, [r5, #0x22]
add r5, r5, #0x23
@ -20355,7 +20355,7 @@ _020A9530:
mov r0, r5
add r1, r6, #0x74
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #1
_020A9550:
strb r0, [r6, #0x30]
@ -20474,7 +20474,7 @@ sub_020A9638: ; 0x020A9638
add r0, r6, r4
add r1, r7, #0x34
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
b _020A96F0
_020A96D0:
add r0, r7, #0x34
@ -20484,7 +20484,7 @@ _020A96D0:
mov r2, r5
add r0, r6, r4
sub r1, r1, r5
bl sub_020D4A50
bl MIi_CpuCopy8
_020A96F0:
mov r0, #1
strb r0, [r7, #0x455]
@ -20506,7 +20506,7 @@ sub_020A9700: ; 0x020A9700
add r0, r6, #2
add r1, r4, #0x34
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
ldrb r5, [r6, #0x22]
add r6, r6, #0x23
cmp r5, #0x20
@ -20516,7 +20516,7 @@ sub_020A9700: ; 0x020A9700
mov r0, r6
add r1, r4, #0x74
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r4
bl sub_020A8598
_020A9760:
@ -20751,7 +20751,7 @@ sub_020A9A78: ; 0x020A9A78
add r0, sp, #0
mov r1, r4
mov r2, #0x30
bl sub_020D4A50
bl MIi_CpuCopy8
add sp, sp, #0x30
ldmia sp!, {r4, pc}
.align 2, 0
@ -21040,7 +21040,7 @@ sub_020A9E98: ; 0x020A9E98
add r0, r5, #0x3a4
add r1, r5, #0x3fc
mov r2, #0x58
bl sub_020D4A50
bl MIi_CpuCopy8
add r1, sp, #0
mov r0, r5
mov r2, #1
@ -21048,7 +21048,7 @@ sub_020A9E98: ; 0x020A9E98
add r0, r5, #0x3fc
add r1, r5, #0x3a4
mov r2, #0x58
bl sub_020D4A50
bl MIi_CpuCopy8
add r1, sp, #0
mov r0, r4
mov r2, #0x10
@ -21061,7 +21061,7 @@ sub_020A9E98: ; 0x020A9E98
add r0, r5, #0x2ec
add r1, r5, #0x348
mov r2, #0x5c
bl sub_020D4A50
bl MIi_CpuCopy8
add r1, sp, #0
mov r0, r5
mov r2, #1
@ -21069,7 +21069,7 @@ sub_020A9E98: ; 0x020A9E98
add r0, r5, #0x348
add r1, r5, #0x2ec
mov r2, #0x5c
bl sub_020D4A50
bl MIi_CpuCopy8
add r1, sp, #0
add r0, r4, #0x10
mov r2, #0x14
@ -21409,7 +21409,7 @@ _020AA3DC:
strhi r6, [sp]
ldr r2, [sp]
mov r1, r7
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sp]
mov r1, r5
bl sub_020A6DBC
@ -21902,7 +21902,7 @@ _020AAA90:
add r1, r5, #0xb
mov r2, #0x20
strb r3, [r5, #0xa]
bl sub_020D4A50
bl MIi_CpuCopy8
mov r2, #0x20
strb r2, [r5, #0x2b]
ldrb r0, [r4, #0x30]
@ -21910,7 +21910,7 @@ _020AAA90:
beq _020AAAF8
add r0, r4, #0x74
add r1, r5, #0x2c
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #1
strb r0, [r4, #0x31]
add r6, r5, #0x4c
@ -21932,7 +21932,7 @@ _020AAAF8:
add r1, r4, #0x74
mov r2, #0x20
strb r3, [r5, #0x4b]
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _020AAC78 ; =0x021D5E60
mov r1, #0
ldr r2, [r0, #4]
@ -21976,7 +21976,7 @@ _020AAB54:
ldr r0, [r7, #4]
mov r1, r6
mov r2, r8
bl sub_020D4A50
bl MIi_CpuCopy8
add r6, r6, r8
_020AABEC:
mov r0, #0xe
@ -22066,7 +22066,7 @@ sub_020AAC80: ; 0x020AAC80
add r1, r5, #0x3fc
mov r2, #0x58
strb r3, [r4, #0xe]
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r5
add r1, r4, #0xf
mov r2, #0
@ -22074,11 +22074,11 @@ sub_020AAC80: ; 0x020AAC80
add r0, r5, #0x3fc
add r1, r5, #0x3a4
mov r2, #0x58
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r5, #0x2ec
add r1, r5, #0x348
mov r2, #0x5c
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r5
add r1, r4, #0x1f
mov r2, #0
@ -22086,7 +22086,7 @@ sub_020AAC80: ; 0x020AAC80
add r0, r5, #0x348
add r1, r5, #0x2ec
mov r2, #0x5c
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r5
add r1, r4, #0xb
mov r2, #0x28
@ -22142,7 +22142,7 @@ sub_020AADD8: ; 0x020AADD8
add r0, r4, #0x34
add r1, r5, #0xb
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
ldrh r2, [r7, #0x18]
ldr r1, [r7, #0x1c]
mov r0, r4
@ -22157,7 +22157,7 @@ sub_020AADD8: ; 0x020AADD8
add r0, r4, #0x74
add r1, r5, #0x2c
strb r2, [r5, #0x2b]
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r5, #0x4c
_020AAE90:
mov r6, #0
@ -22269,7 +22269,7 @@ _020AAFA0:
sub r1, r1, #0x30
mov r2, #0x30
strb r5, [r8, r3]
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _020AB224 ; =0x021D4634
mov r0, r7, lsl #3
ldr r1, [r1]
@ -22737,7 +22737,7 @@ _020AB648:
ldr r2, [sp]
add r1, r3, r1
movlo r6, #0
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sp]
mov r1, r5
bl sub_020A6DBC
@ -22836,14 +22836,14 @@ _020AB790:
add r1, r4, #5
mov r2, r7
sub fp, r6, r7
bl sub_020D4A50
bl MIi_CpuCopy8
add r1, r4, #5
mov r0, r8
add r1, r1, r7
mov r2, fp
add sl, sl, r7
sub sb, sb, r7
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #0x17
strb r0, [r4]
mov r0, #3
@ -23040,24 +23040,24 @@ _020ABA70: .word 0x021D5E68
arm_func_start sub_020ABA74
sub_020ABA74: ; 0x020ABA74
ldr ip, _020ABA88 ; =sub_020D4A50
ldr ip, _020ABA88 ; =MIi_CpuCopy8
mov r3, r0
mov r0, r1
mov r1, r3
bx ip
.align 2, 0
_020ABA88: .word sub_020D4A50
_020ABA88: .word MIi_CpuCopy8
arm_func_end sub_020ABA74
arm_func_start sub_020ABA8C
sub_020ABA8C: ; 0x020ABA8C
ldr ip, _020ABAA0 ; =sub_020D4A50
ldr ip, _020ABAA0 ; =MIi_CpuCopy8
mov r3, r0
mov r0, r1
mov r1, r3
bx ip
.align 2, 0
_020ABAA0: .word sub_020D4A50
_020ABAA0: .word MIi_CpuCopy8
arm_func_end sub_020ABA8C
arm_func_start sub_020ABAA4
@ -23380,7 +23380,7 @@ sub_020ABF08: ; 0x020ABF08
mov r0, r7
mov r2, r5
add r1, r1, r4
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r8
add r1, r8, #0x18
mov r4, #0
@ -23404,7 +23404,7 @@ _020ABFA8:
add r0, r7, r5
add r1, r1, r4
sub r2, r6, r5
bl sub_020D4A50
bl MIi_CpuCopy8
ldmia sp!, {r4, r5, r6, r7, r8, pc}
arm_func_end sub_020ABF08
@ -23983,7 +23983,7 @@ sub_020AC7D4: ; 0x020AC7D4
mov r0, r7
mov r2, r5
add r1, r1, r4
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r8
add r1, r8, #0x1c
mov r4, #0
@ -24007,7 +24007,7 @@ _020AC874:
add r0, r7, r5
add r1, r1, r4
sub r2, r6, r5
bl sub_020D4A50
bl MIi_CpuCopy8
ldmia sp!, {r4, r5, r6, r7, r8, pc}
arm_func_end sub_020AC7D4
@ -24626,13 +24626,13 @@ sub_020ACFBC: ; 0x020ACFBC
ldr r0, [sp, #4]
mov r1, r7
mov r2, sb, lsl #1
bl sub_020D4A50
bl MIi_CpuCopy8
b _020AD154
_020AD048:
ldr r0, [sp, #4]
add r1, r6, r4, lsl #1
mov r2, fp, lsl #1
bl sub_020D4A50
bl MIi_CpuCopy8
cmp r5, #2
ble _020AD07C
add r0, sl, r5, lsl #1
@ -24708,7 +24708,7 @@ _020AD154:
ldr r1, [sp]
mov r0, r6
mov r2, sb, lsl #1
bl sub_020D4A50
bl MIi_CpuCopy8
_020AD170:
ldr r0, [sp, #8]
cmp r0, #0
@ -24717,7 +24717,7 @@ _020AD170:
ldr r1, [sp, #8]
mov r0, r7
mov r2, sb, lsl #1
bl sub_020D4A50
bl MIi_CpuCopy8
add sp, sp, #0x20
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
.align 2, 0
@ -24766,7 +24766,7 @@ _020AD214:
ldr r0, [sp, #8]
mov r1, sl
mov r2, r8, lsl #1
bl sub_020D4A50
bl MIi_CpuCopy8
add r6, r6, #1
b _020AD250
_020AD244:
@ -24785,7 +24785,7 @@ _020AD25C:
mov r0, r4
mov r1, sl
mov r2, fp
bl sub_020D4A50
bl MIi_CpuCopy8
cmp r7, #0
beq _020AD2A0
str r8, [sp]
@ -24811,7 +24811,7 @@ _020AD2A0:
mov r0, r4
mov r1, sl
mov r2, fp
bl sub_020D4A50
bl MIi_CpuCopy8
cmp r7, #0
beq _020AD304
str r8, [sp]
@ -24856,11 +24856,11 @@ sub_020AD330: ; 0x020AD330
str r2, [sp, #0xc]
mov r1, sb
mov r2, r8
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sp, #0xc]
mov r1, r4
mov r2, r8
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #1
strh r0, [r4, r8]
mov r0, sb
@ -24880,11 +24880,11 @@ _020AD3A4:
mov r0, sb
mov r1, r4
mov r2, r8
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r7
mov r1, sb
mov r2, r8
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r7
mov r1, fp
mov r2, r5
@ -24898,11 +24898,11 @@ _020AD3A4:
mov r0, r5
mov r1, r6
mov r2, r8
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r7
mov r1, r5
mov r2, r8
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, sb
mov r1, sl
bl sub_020ACA2C
@ -24936,7 +24936,7 @@ sub_020AD47C: ; 0x020AD47C
mov r7, r0
mov sb, r1
ldr r5, [sp, #0x20]
bl sub_020D4A50
bl MIi_CpuCopy8
cmp r8, #1
bne _020AD4BC
mov r0, r7
@ -25776,7 +25776,7 @@ _020ADFA0:
_020ADFDC:
add r0, r6, #2
add r1, r1, #0x2200
bl sub_020D4A50
bl MIi_CpuCopy8
b _020ADFFC
_020ADFEC:
add r0, ip, #0x2200
@ -25789,7 +25789,7 @@ _020ADFFC:
ldr r1, [r1]
mov r2, #0xc0
add r1, r1, #0x2140
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _020AE0E8 ; =0x021D5FEC
mov r0, r5
ldr r1, [r1]
@ -26302,7 +26302,7 @@ _020AE690:
ldr r1, [r1]
add r1, r1, #0x92
add r1, r1, #0x2200
bl sub_020D4A50
bl MIi_CpuCopy8
b _020AE704
_020AE6EC:
ldr r1, _020AE7A8 ; =0x021D5FEC
@ -26310,7 +26310,7 @@ _020AE6EC:
ldr r1, [r1]
add r1, r1, #0x92
add r1, r1, #0x2200
bl sub_020D4A50
bl MIi_CpuCopy8
_020AE704:
cmp r4, #0
ldrne r0, _020AE7B0 ; =0x02108FC8
@ -26322,7 +26322,7 @@ _020AE704:
ldr r1, [r1]
add r1, r1, #0x29c
add r1, r1, #0x2000
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _020AE7A8 ; =0x021D5FEC
mov r1, #0
ldr r0, [r0]
@ -26335,7 +26335,7 @@ _020AE748:
ldr r1, [r1]
add r1, r1, #0x29c
add r1, r1, #0x2000
bl sub_020D4A50
bl MIi_CpuCopy8
mov r1, #0
_020AE764:
ldrb r0, [r4]
@ -28236,14 +28236,14 @@ _020B007C:
mov r0, sb
mov r2, r8
add r1, r7, #0xf00
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r2, [sp, #0x20]
cmp r2, #0
ble _020B00A8
add r1, r7, #0xf00
mov r0, r6
add r1, r1, r8
bl sub_020D4A50
bl MIi_CpuCopy8
_020B00A8:
ldr r1, [sp, #0x20]
ldr r0, _020B0160 ; =sub_020B016C
@ -30642,7 +30642,7 @@ _020B2174:
sub r1, r0, r2
add r0, sb, #0xc
str r1, [sp]
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [r5, #0x34]
sub r1, r8, #0xc
strb r0, [r4, #0x11]
@ -33145,7 +33145,7 @@ sub_020B41A8: ; 0x020B41A8
ldmeqia sp!, {r3, pc}
ldr r0, _020B41C4 ; =_02110904
mov r2, #0x10
bl sub_020D4A50
bl MIi_CpuCopy8
ldmia sp!, {r3, pc}
.align 2, 0
_020B41C4: .word _02110904

92
lib/dwc/asm/overlay_00_arm.s
View File

@ -270,7 +270,7 @@ _021E7ECC:
mov r2, #0x1c4
add r0, r0, #8
add r0, r0, #0x1000
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, [r4]
ldr r0, _021E7F28 ; =0x00004E20
cmp r1, r0
@ -1081,7 +1081,7 @@ _021E8A30:
ldr r0, _021E8C44 ; =0x027FFE0C
add r1, r4, #0x15
mov r2, #4
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _021E8C48 ; =0x027FFE10
ldrb r0, [r0]
cmp r0, #0
@ -1091,7 +1091,7 @@ _021E8A54:
ldr r0, _021E8C48 ; =0x027FFE10
add r1, r4, #0x1a
mov r2, #2
bl sub_020D4A50
bl MIi_CpuCopy8
mov r1, #0x30
add r0, sp, #0x16
strb r1, [r4, #0x1d]
@ -1123,7 +1123,7 @@ _021E8A84:
add r0, sp, #0x3c
add r1, r4, #0x7e
mov r2, #0x14
bl sub_020D4A50
bl MIi_CpuCopy8
ldrb r1, [sp, #0x3b]
ldr r2, _021E8C50 ; =_02216568
add r0, r4, #0x2f
@ -1208,7 +1208,7 @@ _021E8C10:
mov r0, r5
add r1, r4, #0x4e
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r4, #0x72
bl ov00_021FAA70
mov r0, r6
@ -1910,7 +1910,7 @@ _021E95D4:
cmp sb, r2
movge sb, r2
mov r2, sb
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [r7, #4]
cmp fp, #1
add r1, r0, sb
@ -2353,7 +2353,7 @@ ov00_021E9BDC: ; 0x021E9BDC
ldr r0, [r6]
ldr r2, [r6, #0xc]
mov r1, r4
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, [r6]
ldr r0, _021E9C80 ; =_022167CC
mov r2, #0
@ -4810,7 +4810,7 @@ _021EBE84:
mov r0, sl
add r1, sp, #4
mov r2, sb
bl sub_020D4A50
bl MIi_CpuCopy8
ldrb r0, [sp, #4]
ldr r1, [r5]
cmp r6, #2
@ -5206,7 +5206,7 @@ ov00_021EC33C: ; 0x021EC33C
mov r0, r7
mov r1, r4
mov r2, r5
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r8
mov r1, r7
mov r2, r6
@ -5755,7 +5755,7 @@ _021ECA74:
mov r0, r5
add r1, r4, #0x33
mov r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [r4]
cmp r0, #0
blt _021ECAD8
@ -5777,7 +5777,7 @@ _021ECAC8:
ldrh r2, [sp]
mov r0, r5
add r1, r4, #0x12
bl sub_020D4A50
bl MIi_CpuCopy8
_021ECAD8:
mov r0, r6
bl sub_020D3A4C
@ -5799,7 +5799,7 @@ _021ECB08:
add r1, r4, #8
mov r2, #9
str r3, [r4, #4]
bl sub_020D4A50
bl MIi_CpuCopy8
b _021ECB34
_021ECB2C:
mov r0, #0xff
@ -5982,7 +5982,7 @@ _021ECD4C:
mov r2, #9
add r1, r1, #0x48
add r1, r1, #0x1c00
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _021ECDB0 ; =_0221A764
ldr r3, _021ECDC0 ; =ov00_021EC2A8
ldr r0, [r1]
@ -6871,7 +6871,7 @@ _021ED934:
ldr r1, _021ED9A8 ; =_0221B430
mov r0, r4
mov r2, r5
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sp, #0x20]
ldr r1, _021ED9A8 ; =_0221B430
mov r2, #0
@ -6887,7 +6887,7 @@ _021ED970:
ldr r0, [sp, #0x20]
ldr r1, _021ED9AC ; =_0221B530
mov r2, r4
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _021ED9AC ; =_0221B530
mov r1, #0
strb r1, [r0, r4]
@ -9242,7 +9242,7 @@ _021EF808:
add r2, r2, #2
ldr r0, [r1, #0x10]
add r1, sp, #0
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _021EF8A4 ; =_0221A90C
add r0, sp, #0x34
ldr r1, [r1, #4]
@ -9392,7 +9392,7 @@ _021EFA2C:
add r2, r2, #2
ldr r0, [r1, #0x10]
add r1, sp, #0
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _021EFAB0 ; =_0221A90C
add r0, sp, #0x34
ldr r1, [r1, #4]
@ -11733,7 +11733,7 @@ _021F1978:
_021F19D8:
mov r0, r7
mov r2, r4
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _021F1B10 ; =_0221A928
mov r1, #0
ldr r0, [r0, #8]
@ -14697,7 +14697,7 @@ _021F43B8:
mov r0, r5
add r1, fp, r6
mov r2, r4
bl sub_020D4A50
bl MIi_CpuCopy8
add r7, r7, #1
add r6, r6, r4
cmp r7, r8
@ -14874,7 +14874,7 @@ ov00_021F45E0: ; 0x021F45E0
mov r0, r7
mov r1, r6
mov r2, r5
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #0
strb r0, [r6, r5]
_021F467C:
@ -14929,7 +14929,7 @@ _021F46FC:
mov r0, sb
mov r1, r4
mov r2, r5
bl sub_020D4A50
bl MIi_CpuCopy8
mov r1, #0
mov r0, r5
strb r1, [r4, r5]
@ -20231,7 +20231,7 @@ _021F9068:
mov r0, sl
mov r1, r7
mov r2, r6
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r7
mov r1, r5
mov r2, fp
@ -20244,7 +20244,7 @@ _021F9068:
ldrb r2, [sp, #0x11]
mov r1, r4
add r0, sl, #0x14
bl sub_020D4A50
bl MIi_CpuCopy8
str r4, [sp]
ldrb r0, [sp, #0x11]
mov r0, r0, asr #2
@ -20902,7 +20902,7 @@ ov00_021F992C: ; 0x021F992C
sub sp, sp, #8
add r1, sp, #0
mov r2, #8
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _021F9964 ; =_02217B88
add r0, sp, #6
mov r2, #2
@ -21364,7 +21364,7 @@ _021F9EFC:
add r1, sp, #0
mov r0, r7
mov r2, #8
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, [sp]
mov r0, #0
str r1, [r4, #0x18]
@ -21420,7 +21420,7 @@ _021F9FC0:
mov r0, r6
mov r2, r5
add r1, r1, r3
bl sub_020D4A50
bl MIi_CpuCopy8
_021F9FD4:
ldr r0, [r4, #0x10]
add r0, r0, r5
@ -22256,7 +22256,7 @@ ov00_021FAA70: ; 0x021FAA70
mov r1, r5
add r0, r2, #0x18
mov r2, #0xa
bl sub_020D4A50
bl MIi_CpuCopy8
mov r4, #1
_021FAABC:
mov r0, r4
@ -22300,7 +22300,7 @@ ov00_021FAB04: ; 0x021FAB04
beq _021FAB40
mov r0, r5
add r1, r4, #0x18
bl sub_020D4A50
bl MIi_CpuCopy8
b _021FAB4C
_021FAB40:
add r0, r4, #0x18
@ -22360,7 +22360,7 @@ _021FABE0:
_021FABF8:
mov r0, r6
add r1, r4, #0x80
bl sub_020D4A50
bl MIi_CpuCopy8
ldrb r1, [r4, #0xe6]
and r0, r5, #0xff
and r0, r0, #3
@ -23537,7 +23537,7 @@ _021FBB48:
mov r3, r2, lsr #0x1e
mov r2, #0x10
strb r3, [r4]
bl sub_020D4A50
bl MIi_CpuCopy8
b _021FBBDC
_021FBB6C:
add r0, r0, #0x100
@ -23549,7 +23549,7 @@ _021FBB74:
add r1, r4, #2
mov r2, #5
strb r3, [r4]
bl sub_020D4A50
bl MIi_CpuCopy8
b _021FBBDC
_021FBB90:
mov r1, #2
@ -23933,7 +23933,7 @@ ov00_021FC004: ; 0x021FC004
ldr r0, _021FC060 ; =_02216060
add r1, r4, #4
mov r2, #8
bl sub_020D4A50
bl MIi_CpuCopy8
mov r1, #8
strb r1, [r4, #3]
add r0, r5, #1
@ -23963,7 +23963,7 @@ ov00_021FC064: ; 0x021FC064
ldr r0, _021FC144 ; =_02217B8C
add r1, r5, #4
mov r2, #8
bl sub_020D4A50
bl MIi_CpuCopy8
mov r1, #8
add r0, r4, #1
strb r1, [r5, #3]
@ -23980,7 +23980,7 @@ _021FC0C0:
ldr r0, _021FC148 ; =_02216058
add r1, r5, #4
mov r2, #8
bl sub_020D4A50
bl MIi_CpuCopy8
mov r1, #8
add r0, r4, #1
strb r1, [r5, #3]
@ -23997,7 +23997,7 @@ _021FC100:
ldr r0, _021FC14C ; =_02216068
add r1, r5, #4
mov r2, #0xb
bl sub_020D4A50
bl MIi_CpuCopy8
mov r1, #0xb
add r0, r4, #1
strb r1, [r5, #3]
@ -25091,7 +25091,7 @@ ov00_021FCF2C: ; 0x021FCF2C
ldr r0, _021FCFE8 ; =_022160A8
mov r1, r4
mov r2, #0x58
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [r6]
str r0, [r4, #4]
ldr r0, [r6, #4]
@ -25276,7 +25276,7 @@ ov00_021FD17C: ; 0x021FD17C
add r0, sp, #8
mov r1, r4
mov r2, #0xa
bl sub_020D4A50
bl MIi_CpuCopy8
add sp, sp, #0x18
ldmia sp!, {r4, pc}
.balign 4, 0
@ -25400,7 +25400,7 @@ ov00_021FD300: ; 0x021FD300
add r0, sp, #3
mov r1, r4
mov r2, #0xd
bl sub_020D4A50
bl MIi_CpuCopy8
add sp, sp, #0x6c
ldmia sp!, {r4, r5, pc}
arm_func_end ov00_021FD300
@ -25453,7 +25453,7 @@ _021FD3CC:
add r1, sp, #0
mov r0, r4
mov r2, #0xd
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r3, _021FD4F0 ; =_0221611C
add r2, sp, #0
mov ip, #0
@ -25732,17 +25732,17 @@ _021FD794:
ldr r3, [r3, #0xa8c]
add r1, r1, #0x1000
mla r1, r3, r2, r1
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _021FD9BC ; =_0221613C
add r1, sp, #0
mov r2, #4
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r6, r5, lsl #2
ldr r0, [r0, #0x10]
add r1, sp, #4
add r0, r0, #6
mov r2, #4
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, sp, #8
add r1, sp, #0
mov r2, #8
@ -26049,7 +26049,7 @@ _021FDBE0:
add r0, r0, #0x348
add r0, r0, #0x1000
mla r0, r5, r2, r0
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #0
ldmia sp!, {r3, r4, r5, pc}
.balign 4, 0
@ -26302,7 +26302,7 @@ _021FDF80:
mla r0, r2, r0, r1
ldr r1, [r4]
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _021FE050 ; =_0221B0C4
mov r0, #0x78
ldr r4, [r1]
@ -26312,7 +26312,7 @@ _021FDF80:
add r4, r4, #0x56
mla r0, r3, r0, r4
add r1, r1, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r1, _021FE050 ; =_0221B0C4
mov r0, #0x78
ldr r4, [r1]
@ -26328,7 +26328,7 @@ _021FDF80:
add r4, r4, #0x32
mla r0, r3, r0, r4
add r1, r1, #0x44
bl sub_020D4A50
bl MIi_CpuCopy8
mov r6, #2
b _021FE048
_021FE01C:

28
lib/dwc/asm/overlay_13_arm_1.s
View File

@ -40,7 +40,7 @@ ov13_0221BA98: ; 0x0221BA98
mla r0, r1, r2, r0
add r1, r3, #0x72
add r1, r1, #0x1700
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r4
bl sub_020D3A4C
ldr r0, _0221BB18 ; =0x0224CF4C
@ -563,7 +563,7 @@ _0221C1F0:
ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
add r1, sp, #0
mov r2, #0x1d
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r2, _0221C63C ; =0x0224CF4C
sub r0, r6, #1
ldr r1, [r2]
@ -581,7 +581,7 @@ _0221C1F0:
add r1, r1, #0x1340
mla r1, r0, r2, r1
add r0, sp, #4
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _0221C63C ; =0x0224CF4C
sub r2, r6, #1
ldr r3, [r0]
@ -1022,7 +1022,7 @@ _0221C854:
add r0, r0, #0x388
add r0, r0, #0x1400
mla r0, r4, r3, r0
bl sub_020D4A50
bl MIi_CpuCopy8
_0221C8A4:
ldr r0, _0221C8C0 ; =0x0224CF4C
mov r1, r5
@ -1544,7 +1544,7 @@ _0221CF44:
mov r1, sb
mov r2, #0x160
add sl, sp, #0x24
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sb, #0x60]
orr r0, r0, #0x6000
orr r0, r0, #0x400000
@ -1594,7 +1594,7 @@ _0221D054:
mov r0, r8
mov r2, r7
add r1, r6, #0x10
bl sub_020D4A50
bl MIi_CpuCopy8
str r7, [r6, #0x14]
str r8, [r6, #0x18]
b _0221D074
@ -1822,7 +1822,7 @@ _0221D3A0:
add r0, r3, lr
add r1, r1, lr
sub r2, r2, lr
bl sub_020D4A50
bl MIi_CpuCopy8
ldmia sp!, {r3, pc}
arm_func_end ov13_0221D344
@ -1899,7 +1899,7 @@ _0221D480:
add r0, r8, #0x1c
add r1, sb, #0xc4
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _0221D640 ; =0x0224CF4C
mov r1, sb
ldr r0, [r0]
@ -2032,7 +2032,7 @@ _0221D680:
add r0, r4, #0x160
add r1, r5, #0x3c
mov r2, #0x88
bl sub_020D4A50
bl MIi_CpuCopy8
ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
.balign 4, 0
_0221D6BC: .word _02242658
@ -4457,7 +4457,7 @@ _0221F7D0:
mov r0, sb
add r1, r5, #0x1300
mov r2, #0x16
bl sub_020D4A50
bl MIi_CpuCopy8
ldrb r0, [sb, #1]
cmp r0, #0xa
bhs _0221F7FC
@ -5241,7 +5241,7 @@ _022201E0:
mov r1, r7
mov r2, r6
add r0, r3, r0
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #0
str r0, [sb]
mov r4, #1
@ -5667,7 +5667,7 @@ _02220744:
ldr r2, [r0, #8]
add r0, r6, #2
add r1, r5, #3
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r5
mov r1, r4
bl ov13_02220808
@ -5698,7 +5698,7 @@ _022207AC:
strh r2, [r5, #2]
ldr r2, [r1, #8]
add r1, r5, #4
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _02220804 ; =0x0224CF84
ldr r0, [r0, #8]
add r4, r4, r0
@ -5732,7 +5732,7 @@ ov13_02220808: ; 0x02220808
add r1, r3, r4, lsl #5
mla r1, r5, r2, r1
add r0, r0, #3
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _02220890 ; =0x0224CF84
mov r1, #1
ldr r2, [r0, #4]

74
lib/dwc/asm/overlay_13_arm_2.s
View File

@ -5016,7 +5016,7 @@ ov13_0222B254: ; 0x0222B254
add r1, sp, #4
strb r3, [sp]
strh r2, [sp, #2]
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _0222B354 ; =0x0224F4C4
mov r2, #3
ldr r1, [r0, #4]
@ -7841,7 +7841,7 @@ _0222D5FC:
mov r0, r5
mov r1, r6
mov r2, r4
bl sub_020D4A50
bl MIi_CpuCopy8
add r7, r7, #1
cmp r7, #2
add r5, r5, #0x20
@ -13788,7 +13788,7 @@ ov13_02232168: ; 0x02232168
add r0, r3, r2
add r1, sp, #0
mov r2, #3
bl sub_020D4A50
bl MIi_CpuCopy8
mov r2, #0
add r3, sp, #0
strb r2, [sp, #3]
@ -21083,11 +21083,11 @@ ov13_022380A8: ; 0x022380A8
bl sub_0209EFEC
add r1, r4, #0xf0
mov r2, #0xe
bl sub_020D4A50
bl MIi_CpuCopy8
bl sub_0209EFEC
add r1, r4, #0x1f0
mov r2, #0xe
bl sub_020D4A50
bl MIi_CpuCopy8
bl ov13_02227028
mov r0, #0
bl ov13_02240B04
@ -23518,11 +23518,11 @@ _02239EA0:
add r0, r4, #4
add r1, sb, #0x20
mov r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
mov r1, sb
add r0, r4, #0xc
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, fp, sl, lsl #1
ldrh r0, [r0, #0x50]
strh r0, [sb, #0x26]
@ -23649,7 +23649,7 @@ ov13_0223A02C: ; 0x0223A02C
mov r2, #0x20
ldr r1, [r1]
add r1, r1, #0x440
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _0223A058 ; =0x0224F5A4
mov r1, #0
ldr r0, [r0]
@ -23722,7 +23722,7 @@ _0223A114:
strb r3, [r4, #0x4e6]
ldr r1, [r1]
add r1, r1, #0x480
bl sub_020D4A50
bl MIi_CpuCopy8
_0223A140:
cmp r5, #5
bgt _0223A158
@ -23846,13 +23846,13 @@ ov13_0223A28C: ; 0x0223A28C
ldr r2, _0223A2A8 ; =0x0224F5A4
mov r1, r0
ldr r0, [r2]
ldr ip, _0223A2AC ; =sub_020D4A50
ldr ip, _0223A2AC ; =MIi_CpuCopy8
mov r2, #0x20
add r0, r0, #0x440
bx ip
.balign 4, 0
_0223A2A8: .word 0x0224F5A4
_0223A2AC: .word sub_020D4A50
_0223A2AC: .word MIi_CpuCopy8
arm_func_end ov13_0223A28C
arm_func_start ov13_0223A2B0
@ -24075,11 +24075,11 @@ _0223A518:
_0223A56C:
add r0, r4, #0xc0
add r1, r5, #0xc0
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r4, #0xc4
add r1, r5, #0xc4
mov r2, #4
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r4, #0xf0
bl sub_0209E788
_0223A590:
@ -24095,7 +24095,7 @@ _0223A590:
_0223A5B4:
add r0, r4, #0xc8
add r1, r5, #0xc8
bl sub_020D4A50
bl MIi_CpuCopy8
_0223A5C0:
ldrb r0, [r4, #0xf4]
bl ov13_0223A8F0
@ -24117,7 +24117,7 @@ ov13_0223A5D0: ; 0x0223A5D0
mov r0, r6
add r1, r4, #0x440
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [r6, #0x20]
cmp r0, #1
beq _0223A620
@ -24163,7 +24163,7 @@ _0223A690:
mov r0, r8
mov r1, r7
mov r2, r5
bl sub_020D4A50
bl MIi_CpuCopy8
add r6, r6, #1
cmp r6, #4
add r7, r7, #0x10
@ -24198,43 +24198,43 @@ ov13_0223A6E4: ; 0x0223A6E4
mov r0, r5
add r1, r4, #0xd1
mov r2, #5
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r5, #6
add r1, r4, #0xd6
mov r2, #5
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r5, #0xc
add r1, r4, #0xdb
mov r2, #5
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r5, #0x12
add r1, r4, #0xe0
mov r2, #5
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r5, #0x18
add r1, r4, #0x60
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r5, #0x39
add r1, r4, #0x80
mov r2, #0xd
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r5, #0x47
add r1, r4, #0x90
mov r2, #0xd
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r5, #0x55
add r1, r4, #0xa0
mov r2, #0xd
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r5, #0x63
add r1, r4, #0xb0
mov r2, #0xd
bl sub_020D4A50
bl MIi_CpuCopy8
add r0, r5, #0x71
add r1, r4, #0x40
mov r2, #0x20
bl sub_020D4A50
bl MIi_CpuCopy8
ldrb r2, [r4, #0xe6]
mov r1, #1
add r0, r4, #0xf0
@ -24320,7 +24320,7 @@ _0223A8A4:
add r1, r1, r7
mov r2, r5
add r1, r1, #0xf0
bl sub_020D4A50
bl MIi_CpuCopy8
add r8, r8, #1
cmp r8, #2
add r7, r7, #0x100
@ -24456,7 +24456,7 @@ _0223AA8C:
mov r1, r6
mov r2, r5
add r0, sl, r8
bl sub_020D4A50
bl MIi_CpuCopy8
mov r1, fp
mov r2, r6
_0223AAA4:
@ -25510,7 +25510,7 @@ _0223B814:
mov r2, #8
add r1, r1, #0x388
add r1, r1, #0x1000
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r2, _0223B8F4 ; =0x0224F5B4
mov r3, #1
ldr r1, [r2]
@ -25522,7 +25522,7 @@ _0223B814:
add r1, r1, #0x394
add r1, r1, #0x1000
mov r2, r2, lsl #1
bl sub_020D4A50
bl MIi_CpuCopy8
bl ov13_0223B90C
cmp r0, #0
beq _0223B8DC
@ -25764,7 +25764,7 @@ _0223BB9C:
add r0, r6, #4
add r1, r1, r4
mov r2, #6
bl sub_020D4A50
bl MIi_CpuCopy8
ldrb r0, [r6, #0x15]
tst r0, #1
ldr r0, _0223BC1C ; =0x0224F5B4
@ -26826,7 +26826,7 @@ ov13_0223CA14: ; 0x0223CA14
add r1, sp, #0x14
mov r2, r3, lsl #1
strb r3, [sp, #0x13]
bl sub_020D4A50
bl MIi_CpuCopy8
ldrb r2, [sp, #0x12]
ldr r0, _0223CB2C ; =0x0224F5BC
add lr, sp, #4
@ -27450,7 +27450,7 @@ _0223D2A4:
add r3, r3, #0xe
mla r1, r2, r1, r3
mov r2, #0x16
bl sub_020D4A50
bl MIi_CpuCopy8
ldmia sp!, {r4, r5, r6, pc}
_0223D2F8:
ldr r0, _0223D444 ; =0x0224F5BC
@ -27619,7 +27619,7 @@ _0223D50C:
mov r0, r2
add r1, sp, #0
mov r2, #0xe
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, r5
bl sub_020D3A4C
ldrh r0, [sp, #4]
@ -29279,7 +29279,7 @@ ov13_0223E9D8: ; 0x0223E9D8
ldr r1, [r3]
ldr r0, [r1, #0xaa4]
add r1, r1, #0xa50
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, _0223EA54 ; =0x0224F5C8
mov r2, #0
ldr r1, [r0]
@ -30058,7 +30058,7 @@ ov13_0223F400: ; 0x0223F400
ldr r1, [r3]
ldr r1, [r1, #0xab0]
add r1, r1, #4
bl sub_020D4A50
bl MIi_CpuCopy8
b _0223F474
_0223F448:
ldr r0, [r5, #0x204]
@ -30127,7 +30127,7 @@ _0223F510:
mov r2, r6
add r1, r1, #0x100
mla r1, r7, r8, r1
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [sb]
add r0, r0, r7, lsl #2
str r5, [r0, #0x208]

8
lib/dwc/asm/overlay_45_arm.s
View File

@ -355,7 +355,7 @@ ov45_02231514: ; 0x02231514
ldr r2, [sp, #0x10]
mov r0, r5
mov r1, r4
bl sub_020D4A50
bl MIi_CpuCopy8
_02231580:
cmp r4, #0
beq _022315C8
@ -8948,7 +8948,7 @@ _02238BAC:
ldr r2, [r5, #0x30]
add r1, r4, #0x10
mov r2, r2, lsl #3
bl sub_020D4A50
bl MIi_CpuCopy8
_02238C00:
mov r0, #1
ldmia sp!, {r3, r4, r5, pc}
@ -11448,7 +11448,7 @@ ov45_0223AEDC: ; 0x0223AEDC
ldmeqia sp!, {r3, pc}
add r0, r0, #0x5c
mov r2, #0x2d8
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #1
ldmia sp!, {r3, pc}
arm_func_end ov45_0223AEDC
@ -11460,7 +11460,7 @@ ov45_0223AF04: ; 0x0223AF04
mov r0, r1
add r1, r4, #0x5c
mov r2, #0x2d8
bl sub_020D4A50
bl MIi_CpuCopy8
mov r0, #1
str r0, [r4, #0x334]
ldmia sp!, {r4, pc}

6
lib/dwc/asm/overlay_74_arm.s
View File

@ -823,7 +823,7 @@ _02237C20:
ldr r0, [r0, r2, lsl #2]
mov r1, r8
mov r2, sl, lsl #2
bl sub_020D4A50
bl MIi_CpuCopy8
cmp sb, #0
beq _02237DF8
mov r0, #0xff
@ -4431,7 +4431,7 @@ _0223AE50:
ldr r0, [r4]
ldr r1, [r5]
mov r2, r2, lsl #2
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [r4, #4]
str r0, [r5, #4]
ldr r0, [r5, #4]
@ -4476,7 +4476,7 @@ ov74_0223AEB4: ; 0x0223AEB4
ldr r2, [r5, #4]
mov r1, r6
mov r2, r2, lsl #2
bl sub_020D4A50
bl MIi_CpuCopy8
ldr r0, [r5]
bl ov74_0223B230
_0223AF20:

4
main.lsf
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@ -90,6 +90,10 @@ Static main
Object player_data.o
Object unk_020290B4.o
Object daycare.o
Object pokedex.o
Object unk_0202A888.o
Object options.o
Object unk_0202ADEC.o
Object scrcmd.o
Object pokemon.o
### Vendor libraries ###