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sub_812D420

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This commit is contained in:
PikalaxALT 2018-11-25 18:46:32 -05:00
parent 83dc744b85
commit 5090c3fab2
3 changed files with 31 additions and 140 deletions
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140
asm/fame_checker.s
View File

@ -5,146 +5,6 @@
.text
thumb_func_start sub_812D420
sub_812D420: @ 812D420
push {r4-r7,lr}
mov r7, r8
push {r7}
sub sp, 0x8
movs r3, 0xC0
lsls r3, 19
movs r4, 0xC0
lsls r4, 9
add r0, sp, 0x4
mov r8, r0
mov r2, sp
movs r6, 0
ldr r1, _0812D550 @ =0x040000d4
movs r5, 0x80
lsls r5, 5
ldr r7, _0812D554 @ =0x81000800
movs r0, 0x81
lsls r0, 24
mov r12, r0
_0812D446:
strh r6, [r2]
mov r0, sp
str r0, [r1]
str r3, [r1, 0x4]
str r7, [r1, 0x8]
ldr r0, [r1, 0x8]
adds r3, r5
subs r4, r5
cmp r4, r5
bhi _0812D446
strh r6, [r2]
mov r2, sp
str r2, [r1]
str r3, [r1, 0x4]
lsrs r0, r4, 1
mov r2, r12
orrs r0, r2
str r0, [r1, 0x8]
ldr r0, [r1, 0x8]
movs r0, 0xE0
lsls r0, 19
movs r3, 0x80
lsls r3, 3
movs r4, 0
str r4, [sp, 0x4]
ldr r2, _0812D550 @ =0x040000d4
mov r1, r8
str r1, [r2]
str r0, [r2, 0x4]
lsrs r0, r3, 2
movs r1, 0x85
lsls r1, 24
orrs r0, r1
str r0, [r2, 0x8]
ldr r0, [r2, 0x8]
movs r1, 0xA0
lsls r1, 19
mov r0, sp
strh r4, [r0]
str r0, [r2]
str r1, [r2, 0x4]
lsrs r3, 1
movs r0, 0x81
lsls r0, 24
orrs r3, r0
str r3, [r2, 0x8]
ldr r0, [r2, 0x8]
movs r0, 0
movs r1, 0
bl SetGpuReg
movs r0, 0x8
movs r1, 0
bl SetGpuReg
movs r0, 0x10
movs r1, 0
bl SetGpuReg
movs r0, 0x12
movs r1, 0
bl SetGpuReg
movs r0, 0xA
movs r1, 0
bl SetGpuReg
movs r0, 0x14
movs r1, 0
bl SetGpuReg
movs r0, 0x16
movs r1, 0
bl SetGpuReg
movs r0, 0xC
movs r1, 0
bl SetGpuReg
movs r0, 0x18
movs r1, 0
bl SetGpuReg
movs r0, 0x1A
movs r1, 0
bl SetGpuReg
movs r0, 0xE
movs r1, 0
bl SetGpuReg
movs r0, 0x1C
movs r1, 0
bl SetGpuReg
movs r0, 0x1E
movs r1, 0
bl SetGpuReg
movs r0, 0x40
movs r1, 0
bl SetGpuReg
movs r0, 0x44
movs r1, 0
bl SetGpuReg
movs r0, 0x48
movs r1, 0
bl SetGpuReg
movs r0, 0x4A
movs r1, 0
bl SetGpuReg
movs r0, 0x50
movs r1, 0
bl SetGpuReg
movs r0, 0x52
movs r1, 0
bl SetGpuReg
movs r0, 0x54
movs r1, 0
bl SetGpuReg
add sp, 0x8
pop {r3}
mov r8, r3
pop {r4-r7}
pop {r0}
bx r0
.align 2, 0
_0812D550: .4byte 0x040000d4
_0812D554: .4byte 0x81000800
thumb_func_end sub_812D420
thumb_func_start sub_812D558
sub_812D558: @ 812D558
push {lr}

3
include/gba/macro.h
View File

@ -125,6 +125,9 @@
#define DmaCopyLarge32(dmaNum, src, dest, size, block) DmaCopyLarge(dmaNum, src, dest, size, block, 32)
#define DmaClearLarge16(dmaNum, dest, size, block) DmaClearLarge(dmaNum, dest, size, block, 16)
#define DmaClearLarge32(dmaNum, dest, size, block) DmaClearLarge(dmaNum, dest, size, block, 32)
#define DmaCopyDefvars(dmaNum, src, dest, size, bit) \
{ \
const void *_src = src; \

28
src/fame_checker.c
View File

@ -671,3 +671,31 @@ void sub_812D388(void)
}
}
}
void sub_812D420(void)
{
void * vram = (void *)VRAM;
DmaClearLarge16(3, vram, VRAM_SIZE, 0x1000);
DmaClear32(3, OAM, OAM_SIZE);
DmaClear16(3, PLTT, PLTT_SIZE);
SetGpuReg(REG_OFFSET_DISPCNT, 0);
SetGpuReg(REG_OFFSET_BG0CNT, 0);
SetGpuReg(REG_OFFSET_BG0HOFS, 0);
SetGpuReg(REG_OFFSET_BG0VOFS, 0);
SetGpuReg(REG_OFFSET_BG1CNT, 0);
SetGpuReg(REG_OFFSET_BG1HOFS, 0);
SetGpuReg(REG_OFFSET_BG1VOFS, 0);
SetGpuReg(REG_OFFSET_BG2CNT, 0);
SetGpuReg(REG_OFFSET_BG2HOFS, 0);
SetGpuReg(REG_OFFSET_BG2VOFS, 0);
SetGpuReg(REG_OFFSET_BG3CNT, 0);
SetGpuReg(REG_OFFSET_BG3HOFS, 0);
SetGpuReg(REG_OFFSET_BG3VOFS, 0);
SetGpuReg(REG_OFFSET_WIN0H, 0);
SetGpuReg(REG_OFFSET_WIN0V, 0);
SetGpuReg(REG_OFFSET_WININ, 0);
SetGpuReg(REG_OFFSET_WINOUT, 0);
SetGpuReg(REG_OFFSET_BLDCNT, 0);
SetGpuReg(REG_OFFSET_BLDALPHA, 0);
SetGpuReg(REG_OFFSET_BLDY, 0);
}