mirror of
https://github.com/pret/pokediamond.git
synced 2026-08-07 03:04:19 -05:00
826 lines
15 KiB
ArmAsm
826 lines
15 KiB
ArmAsm
.include "asm/macros.inc"
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.include "global.inc"
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.section .bss
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.global UNK_021D5E28
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UNK_021D5E28: ; 0x021D5E28
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.space 0x4
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.global UNK_021D5E2C
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UNK_021D5E2C: ; 0x021D5E2C
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.space 0x4
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.global UNK_021D5E30
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UNK_021D5E30: ; 0x021D5E30
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.space 0x20
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.global UNK_021D5E50
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UNK_021D5E50: ; 0x021D5E50
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.space 0x28
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.global UNK_021D5E78
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UNK_021D5E78: ; 0x021D5E78
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.space 0x14
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.global UNK_021D5E8C
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UNK_021D5E8C: ; 0x021D5E8C
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.space 0x10
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.global UNK_021D5E9C
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UNK_021D5E9C: ; 0x021D5E9C
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.space 0x24
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.global UNK_021D5EC0
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UNK_021D5EC0: ; 0x021D5EC0
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.space 0xa00
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.text
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arm_func_start WMi_GetMPReadyAIDs
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WMi_GetMPReadyAIDs: ; 0x020D7DE0
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stmdb sp!, {r4-r5,lr}
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sub sp, sp, #0x4
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bl OS_DisableInterrupts
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ldr r1, _020D7E30 ; =UNK_021D5E2C
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mov r4, r0
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ldr r0, [r1, #0x0]
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cmp r0, #0x0
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moveq r5, #0x0
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beq _020D7E18
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ldr r5, [r0, #0x4]
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mov r1, #0x2
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add r0, r5, #0x86
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bl DC_InvalidateRange
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ldrh r5, [r5, #0x86]
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_020D7E18:
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mov r0, r4
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bl OS_RestoreInterrupts
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mov r0, r5
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add sp, sp, #0x4
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ldmia sp!, {r4-r5,lr}
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bx lr
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.balign 4
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_020D7E30: .word UNK_021D5E2C
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arm_func_start WM_GetConnectedAIDs
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WM_GetConnectedAIDs: ; 0x020D7E34
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stmdb sp!, {r4,lr}
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bl OS_DisableInterrupts
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ldr r1, _020D7E64 ; =UNK_021D5E2C
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ldr r1, [r1, #0x0]
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cmp r1, #0x0
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ldrne r4, [r1, #0x14c]
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moveq r4, #0x0
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bl OS_RestoreInterrupts
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mov r0, r4, lsl #0x10
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mov r0, r0, lsr #0x10
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ldmia sp!, {r4,lr}
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bx lr
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.balign 4
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_020D7E64: .word UNK_021D5E2C
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arm_func_start WM_GetAID
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WM_GetAID: ; 0x020D7E68
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stmdb sp!, {r4,lr}
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bl OS_DisableInterrupts
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ldr r1, _020D7E98 ; =UNK_021D5E2C
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ldr r1, [r1, #0x0]
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cmp r1, #0x0
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addne r1, r1, #0x100
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ldrneh r4, [r1, #0x50]
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moveq r4, #0x0
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bl OS_RestoreInterrupts
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mov r0, r4
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ldmia sp!, {r4,lr}
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bx lr
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.balign 4
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_020D7E98: .word UNK_021D5E2C
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arm_func_start WMi_GetStatusAddress
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WMi_GetStatusAddress: ; 0x020D7E9C
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stmdb sp!, {lr}
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sub sp, sp, #0x4
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bl WMi_CheckInitialized
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_020D7EA8: ; 0x020D7EA8
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cmp r0, #0x0
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movne r0, #0x0
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ldreq r0, _020D7EC8 ; =UNK_021D5E2C
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ldreq r0, [r0, #0x0]
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ldreq r0, [r0, #0x4]
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add sp, sp, #0x4
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ldmia sp!, {lr}
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bx lr
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.balign 4
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_020D7EC8: .word UNK_021D5E2C
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arm_func_start WmClearFifoRecvFlag
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WmClearFifoRecvFlag: ; 0x020D7ECC
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ldr r1, _020D7EE4 ; =0x027FFF96
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ldrh r0, [r1, #0x0]
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ands r2, r0, #0x1
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bicne r0, r0, #0x1
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strneh r0, [r1, #0x0]
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bx lr
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.balign 4
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_020D7EE4: .word 0x027FFF96
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arm_func_start WmReceiveFifo
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WmReceiveFifo: ; 0x020D7EE8
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stmdb sp!, {r4-r11,lr}
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sub sp, sp, #0xc
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ldr r0, _020D82B0 ; =UNK_021D5E2C
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cmp r2, #0x0
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ldr r8, [r0, #0x0]
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mov r10, r1
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addne sp, sp, #0xc
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ldmneia sp!, {r4-r11,lr}
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bxne lr
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ldr r0, [r8, #0x10]
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mov r1, #0x100
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bl DC_InvalidateRange
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ldrh r0, [r8, #0x16]
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cmp r0, #0x0
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bne _020D7F30
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ldr r0, [r8, #0x4]
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mov r1, #0x800
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bl DC_InvalidateRange
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_020D7F30:
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ldr r0, [r8, #0x10]
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cmp r10, r0
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beq _020D7F48
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mov r0, r10
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mov r1, #0x100
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bl DC_InvalidateRange
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_020D7F48:
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ldrh r0, [r10, #0x0]
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cmp r0, #0x2c
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blo _020D8000
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cmp r0, #0x80
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bne _020D7F84
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ldrh r0, [r10, #0x2]
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cmp r0, #0x13
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bne _020D7F6C
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bl OS_Terminate
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_020D7F6C:
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ldr r1, [r8, #0xc8]
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cmp r1, #0x0
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beq _020D8268
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mov r0, r10
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blx r1
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b _020D8268
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_020D7F84:
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cmp r0, #0x82
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bne _020D7FD8
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ldrh r0, [r10, #0x6]
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add r1, r8, r0, lsl #0x2
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ldr r0, [r1, #0xcc]
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cmp r0, #0x0
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beq _020D8268
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ldr r0, [r1, #0x10c]
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str r0, [r10, #0x1c]
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ldr r0, [r8, #0x14c]
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strh r0, [r10, #0x22]
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ldr r1, [r8, #0x4]
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ldr r0, [r10, #0x8]
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ldrh r1, [r1, #0x72]
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bl DC_InvalidateRange
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ldrh r1, [r10, #0x6]
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mov r0, r10
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add r1, r8, r1, lsl #0x2
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ldr r1, [r1, #0xcc]
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blx r1
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b _020D8268
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_020D7FD8:
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cmp r0, #0x81
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bne _020D8268
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mov r0, #0xf
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strh r0, [r10, #0x0]
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ldr r1, [r10, #0x1c]
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cmp r1, #0x0
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beq _020D8268
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mov r0, r10
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blx r1
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b _020D8268
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_020D8000:
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cmp r0, #0xe
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bne _020D8040
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ldrh r1, [r10, #0x4]
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ldr r0, _020D82B4 ; =0x0000FFF5
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add r0, r1, r0
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mov r0, r0, lsl #0x10
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mov r0, r0, lsr #0x10
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cmp r0, #0x1
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bhi _020D8040
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ldrh r0, [r10, #0x2]
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cmp r0, #0x0
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bne _020D8040
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ldr r1, [r8, #0x4]
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ldr r0, [r10, #0x8]
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ldrh r1, [r1, #0x72]
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bl DC_InvalidateRange
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_020D8040:
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ldrh r1, [r10, #0x0]
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cmp r1, #0x2
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bne _020D8088
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ldrh r0, [r10, #0x2]
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cmp r0, #0x0
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bne _020D8088
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add r0, r8, r1, lsl #0x2
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ldr r4, [r0, #0x18]
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bl WM_Finish
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_020D8064: ; 0x020D8064
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cmp r4, #0x0
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addeq sp, sp, #0xc
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ldmeqia sp!, {r4-r11,lr}
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bxeq lr
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mov r0, r10
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blx r4
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add sp, sp, #0xc
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ldmia sp!, {r4-r11,lr}
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bx lr
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_020D8088:
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add r0, r8, r1, lsl #0x2
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ldr r1, [r0, #0x18]
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cmp r1, #0x0
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beq _020D80B8
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mov r0, r10
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blx r1
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ldr r0, _020D82B8 ; =UNK_021D5E28
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ldrh r0, [r0, #0x0]
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cmp r0, #0x0
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addeq sp, sp, #0xc
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ldmeqia sp!, {r4-r11,lr}
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bxeq lr
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_020D80B8:
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ldrh r0, [r10, #0x0]
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cmp r0, #0x8
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beq _020D80CC
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cmp r0, #0xc
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bne _020D8268
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_020D80CC:
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cmp r0, #0x8
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bne _020D8100
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add r0, r10, #0xa
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str r0, [sp, #0x0]
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ldrh r0, [r10, #0x2c]
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add r11, r10, #0x14
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ldrh r7, [r10, #0x8]
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ldrh r6, [r10, #0x10]
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ldrh r4, [r10, #0x12]
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str r0, [sp, #0x4]
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ldrh r9, [r10, #0x2e]
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mov r5, #0x0
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b _020D8130
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_020D8100:
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cmp r0, #0xc
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bne _020D8130
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ldrh r0, [r10, #0x16]
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mov r6, #0x0
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ldrh r7, [r10, #0x8]
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str r0, [sp, #0x4]
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add r0, r10, #0x10
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ldrh r5, [r10, #0xa]
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ldrh r4, [r10, #0xc]
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ldrh r9, [r10, #0x18]
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mov r11, r6
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str r0, [sp, #0x0]
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_020D8130:
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cmp r7, #0x7
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beq _020D8148
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cmp r7, #0x9
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beq _020D8148
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cmp r7, #0x1a
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bne _020D8268
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_020D8148:
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cmp r7, #0x7
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ldreq r1, [r8, #0x14c]
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moveq r0, #0x1
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orreq r0, r1, r0, lsl r6
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streq r0, [r8, #0x14c]
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movne r0, #0x1
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mvnne r0, r0, lsl r6
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ldrne r1, [r8, #0x14c]
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add r3, r8, #0x100
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andne r0, r1, r0
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strne r0, [r8, #0x14c]
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ldr r0, _020D82BC ; =UNK_021D5E78
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mov r1, #0x0
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mov r2, #0x44
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strh r5, [r3, #0x50]
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bl MI_CpuFill8
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ldr r3, _020D82BC ; =UNK_021D5E78
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mov r1, #0x0
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mov r2, #0x82
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strh r2, [r3, #0x0]
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strh r7, [r3, #0x4]
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strh r6, [r3, #0x12]
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strh r5, [r3, #0x20]
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strh r1, [r3, #0x2]
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str r1, [r3, #0x8]
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str r1, [r3, #0xc]
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strh r1, [r3, #0x10]
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ldr r1, [r8, #0x14c]
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ldr r2, _020D82C0 ; =0x0000FFFF
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strh r1, [r3, #0x22]
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strh r2, [r3, #0x1a]
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ldr r0, [sp, #0x0]
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ldr r1, _020D82C4 ; =UNK_021D5E8C
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mov r2, #0x6
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strh r4, [r3, #0x3c]
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bl MI_CpuCopy8
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_020D81D8: ; 0x020D81D8
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cmp r11, #0x0
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beq _020D81F4
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ldr r1, _020D82C8 ; =UNK_021D5E9C
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mov r0, r11
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mov r2, #0x18
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bl MIi_CpuCopy16
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b _020D8204
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_020D81F4:
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ldr r1, _020D82C8 ; =UNK_021D5E9C
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mov r0, #0x0
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mov r2, #0x18
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bl MIi_CpuClear16
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_020D8204:
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cmp r5, #0x0
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ldreq r1, [sp, #0x4]
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ldr r0, _020D82BC ; =UNK_021D5E78
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movne r1, r9
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cmp r5, #0x0
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ldrne r9, [sp, #0x4]
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ldr r5, _020D82BC ; =UNK_021D5E78
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strh r1, [r0, #0x40]
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mov r4, #0x0
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strh r9, [r5, #0x42]
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_020D822C:
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strh r4, [r5, #0x6]
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add r2, r8, r4, lsl #0x2
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ldr r0, [r2, #0xcc]
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cmp r0, #0x0
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beq _020D8254
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ldr r1, [r2, #0x10c]
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mov r0, r5
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str r1, [r5, #0x1c]
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ldr r1, [r2, #0xcc]
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blx r1
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_020D8254:
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add r0, r4, #0x1
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mov r0, r0, lsl #0x10
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mov r4, r0, lsr #0x10
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cmp r4, #0x10
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blo _020D822C
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_020D8268:
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ldr r0, [r8, #0x10]
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mov r1, #0x100
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bl DC_InvalidateRange
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bl WmClearFifoRecvFlag
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ldr r0, [r8, #0x10]
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cmp r10, r0
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addeq sp, sp, #0xc
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ldmeqia sp!, {r4-r11,lr}
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bxeq lr
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ldrh r2, [r10, #0x0]
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mov r0, r10
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mov r1, #0x100
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orr r2, r2, #0x8000
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strh r2, [r10, #0x0]
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bl DC_StoreRange
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add sp, sp, #0xc
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ldmia sp!, {r4-r11,lr}
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bx lr
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.balign 4
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_020D82B0: .word UNK_021D5E2C
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_020D82B4: .word 0x0000FFF5
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_020D82B8: .word UNK_021D5E28
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_020D82BC: .word UNK_021D5E78
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_020D82C0: .word 0x0000FFFF
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_020D82C4: .word UNK_021D5E8C
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_020D82C8: .word UNK_021D5E9C
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arm_func_start WMi_CheckStateEx
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WMi_CheckStateEx:
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stmdb sp!, {r0-r3}
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stmdb sp!, {lr}
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sub sp, sp, #0x4
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bl WMi_CheckInitialized
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_020D82DC: ; 0x020D82DC
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cmp r0, #0x0
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addne sp, sp, #0x4
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ldmneia sp!, {lr}
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addne sp, sp, #0x10
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bxne lr
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ldr r0, _020D8370 ; =UNK_021D5E2C
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mov r1, #0x2
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ldr r0, [r0, #0x0]
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ldr r0, [r0, #0x4]
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bl DC_InvalidateRange
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ldr r0, _020D8370 ; =UNK_021D5E2C
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add r1, sp, #0x8
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ldr r2, [r0, #0x0]
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ldr r0, [sp, #0x8]
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ldr r2, [r2, #0x4]
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cmp r0, #0x0
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bic r1, r1, #0x3
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addeq sp, sp, #0x4
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add r12, r1, #0x4
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ldrh r3, [r2, #0x0]
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mov r0, #0x3
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ldmeqia sp!, {lr}
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addeq sp, sp, #0x10
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bxeq lr
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mov r2, #0x0
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_020D8340:
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add r12, r12, #0x4
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ldr r1, [r12, #-0x4]
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cmp r1, r3
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ldr r1, [sp, #0x8]
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moveq r0, r2
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subs r1, r1, #0x1
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str r1, [sp, #0x8]
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bne _020D8340
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add sp, sp, #0x4
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ldmia sp!, {lr}
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add sp, sp, #0x10
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bx lr
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.balign 4
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_020D8370: .word UNK_021D5E2C
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arm_func_start WMi_CheckIdle
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WMi_CheckIdle:
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stmdb sp!, {lr}
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sub sp, sp, #0x4
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bl WMi_CheckInitialized
|
|
_020D8380: ; 0x020D8380
|
|
cmp r0, #0x0
|
|
addne sp, sp, #0x4
|
|
ldmneia sp!, {lr}
|
|
bxne lr
|
|
ldr r0, _020D83CC ; =UNK_021D5E2C
|
|
mov r1, #0x2
|
|
ldr r0, [r0, #0x0]
|
|
ldr r0, [r0, #0x4]
|
|
bl DC_InvalidateRange
|
|
ldr r0, _020D83CC ; =UNK_021D5E2C
|
|
ldr r0, [r0, #0x0]
|
|
ldr r0, [r0, #0x4]
|
|
ldrh r0, [r0, #0x0]
|
|
cmp r0, #0x1
|
|
movls r0, #0x3
|
|
movhi r0, #0x0
|
|
add sp, sp, #0x4
|
|
ldmia sp!, {lr}
|
|
bx lr
|
|
.balign 4
|
|
_020D83CC: .word UNK_021D5E2C
|
|
|
|
arm_func_start WMi_CheckInitialized
|
|
WMi_CheckInitialized:
|
|
ldr r0, _020D83E8 ; =UNK_021D5E28
|
|
ldrh r0, [r0, #0x0]
|
|
cmp r0, #0x0
|
|
movne r0, #0x0
|
|
moveq r0, #0x3
|
|
bx lr
|
|
.balign 4
|
|
_020D83E8: .word UNK_021D5E28
|
|
|
|
arm_func_start WMi_GetSystemWork
|
|
WMi_GetSystemWork: ; 0x020D83EC
|
|
ldr r0, _020D83F8 ; =UNK_021D5E2C
|
|
ldr r0, [r0, #0x0]
|
|
bx lr
|
|
.balign 4
|
|
_020D83F8: .word UNK_021D5E2C
|
|
|
|
arm_func_start WMi_SendCommandDirect
|
|
WMi_SendCommandDirect:
|
|
stmdb sp!, {r4-r6,lr}
|
|
mov r6, r0
|
|
mov r4, r1
|
|
bl WmGetCommandBuffer4Arm7
|
|
movs r5, r0
|
|
moveq r0, #0x8
|
|
ldmeqia sp!, {r4-r6,lr}
|
|
bxeq lr
|
|
mov r0, r6
|
|
mov r1, r5
|
|
mov r2, r4
|
|
bl MI_CpuCopy8
|
|
mov r0, r5
|
|
mov r1, r4
|
|
bl DC_StoreRange
|
|
mov r1, r5
|
|
mov r0, #0xa
|
|
mov r2, #0x0
|
|
bl PXI_SendWordByFifo
|
|
mov r4, r0
|
|
ldr r0, _020D8470 ; =UNK_021D5E30
|
|
mov r1, r5
|
|
mov r2, #0x1
|
|
bl OS_SendMessage
|
|
_020D845C: ; 0x020D845C
|
|
cmp r4, #0x0
|
|
movlt r0, #0x8
|
|
movge r0, #0x2
|
|
ldmia sp!, {r4-r6,lr}
|
|
bx lr
|
|
.balign 4
|
|
_020D8470: .word UNK_021D5E30
|
|
|
|
arm_func_start WMi_SendCommand
|
|
WMi_SendCommand:
|
|
stmdb sp!, {r0-r3}
|
|
stmdb sp!, {r4-r5,lr}
|
|
sub sp, sp, #0x4
|
|
mov r4, r0
|
|
bl WmGetCommandBuffer4Arm7
|
|
movs r5, r0
|
|
addeq sp, sp, #0x4
|
|
moveq r0, #0x8
|
|
ldmeqia sp!, {r4-r5,lr}
|
|
addeq sp, sp, #0x10
|
|
bxeq lr
|
|
strh r4, [r5, #0x0]
|
|
ldrh r2, [sp, #0x14]
|
|
add r0, sp, #0x14
|
|
bic r0, r0, #0x3
|
|
mov r3, #0x0
|
|
cmp r2, #0x0
|
|
add r4, r0, #0x4
|
|
ble _020D84DC
|
|
_020D84C0:
|
|
add r4, r4, #0x4
|
|
ldr r1, [r4, #-0x4]
|
|
add r0, r5, r3, lsl #0x2
|
|
add r3, r3, #0x1
|
|
str r1, [r0, #0x4]
|
|
cmp r3, r2
|
|
blt _020D84C0
|
|
_020D84DC:
|
|
mov r0, r5
|
|
mov r1, #0x100
|
|
bl DC_StoreRange
|
|
mov r1, r5
|
|
mov r0, #0xa
|
|
mov r2, #0x0
|
|
bl PXI_SendWordByFifo
|
|
mov r4, r0
|
|
ldr r0, _020D8528 ; =UNK_021D5E30
|
|
mov r1, r5
|
|
mov r2, #0x1
|
|
bl OS_SendMessage
|
|
_020D850C: ; 0x020D850C
|
|
cmp r4, #0x0
|
|
movlt r0, #0x8
|
|
movge r0, #0x2
|
|
add sp, sp, #0x4
|
|
ldmia sp!, {r4-r5,lr}
|
|
add sp, sp, #0x10
|
|
bx lr
|
|
.balign 4
|
|
_020D8528: .word UNK_021D5E30
|
|
|
|
arm_func_start WmGetCommandBuffer4Arm7
|
|
WmGetCommandBuffer4Arm7: ; 0x020D852C
|
|
stmdb sp!, {lr}
|
|
sub sp, sp, #0x4
|
|
ldr r0, _020D859C ; =UNK_021D5E30
|
|
add r1, sp, #0x0
|
|
mov r2, #0x0
|
|
bl OS_ReceiveMessage
|
|
_020D8544: ; 0x020D8544
|
|
cmp r0, #0x0
|
|
addeq sp, sp, #0x4
|
|
moveq r0, #0x0
|
|
ldmeqia sp!, {lr}
|
|
bxeq lr
|
|
ldr r0, [sp, #0x0]
|
|
mov r1, #0x2
|
|
bl DC_InvalidateRange
|
|
ldr r1, [sp, #0x0]
|
|
ldrh r0, [r1, #0x0]
|
|
ands r0, r0, #0x8000
|
|
addne sp, sp, #0x4
|
|
movne r0, r1
|
|
ldmneia sp!, {lr}
|
|
bxne lr
|
|
ldr r0, _020D859C ; =UNK_021D5E30
|
|
mov r2, #0x1
|
|
bl OS_JamMessage
|
|
_020D858C: ; 0x020D858C
|
|
mov r0, #0x0
|
|
add sp, sp, #0x4
|
|
ldmia sp!, {lr}
|
|
bx lr
|
|
.balign 4
|
|
_020D859C: .word UNK_021D5E30
|
|
|
|
arm_func_start WMi_SetCallbackTable
|
|
WMi_SetCallbackTable: ; 0x020D85A0
|
|
ldr r2, _020D85B4 ; =UNK_021D5E2C
|
|
ldr r2, [r2, #0x0]
|
|
add r0, r2, r0, lsl #0x2
|
|
str r1, [r0, #0x18]
|
|
bx lr
|
|
.balign 4
|
|
_020D85B4: .word UNK_021D5E2C
|
|
|
|
arm_func_start WM_Finish
|
|
WM_Finish:
|
|
stmdb sp!, {r4,lr}
|
|
bl OS_DisableInterrupts
|
|
mov r4, r0
|
|
bl WMi_CheckInitialized
|
|
_020D85C8: ; 0x020D85C8
|
|
cmp r0, #0x0
|
|
beq _020D85E4
|
|
mov r0, r4
|
|
bl OS_RestoreInterrupts
|
|
mov r0, #0x3
|
|
ldmia sp!, {r4,lr}
|
|
bx lr
|
|
_020D85E4:
|
|
mov r0, #0x1
|
|
mov r1, #0x0
|
|
bl WMi_CheckStateEx
|
|
_020D85F0: ; 0x020D85F0
|
|
cmp r0, #0x0
|
|
ldmneia sp!, {r4,lr}
|
|
bxne lr
|
|
bl WmClearFifoRecvFlag
|
|
mov r0, #0xa
|
|
mov r1, #0x0
|
|
bl PXI_SetFifoRecvCallback
|
|
ldr r2, _020D8634 ; =UNK_021D5E2C
|
|
mov r3, #0x0
|
|
ldr r1, _020D8638 ; =UNK_021D5E28
|
|
mov r0, r4
|
|
str r3, [r2, #0x0]
|
|
strh r3, [r1, #0x0]
|
|
bl OS_RestoreInterrupts
|
|
_020D8628: ; 0x020D8628
|
|
mov r0, #0x0
|
|
ldmia sp!, {r4,lr}
|
|
bx lr
|
|
.balign 4
|
|
_020D8634: .word UNK_021D5E2C
|
|
_020D8638: .word UNK_021D5E28
|
|
|
|
arm_func_start WmInitCore
|
|
WmInitCore:
|
|
stmdb sp!, {r4-r10,lr}
|
|
mov r6, r0
|
|
mov r5, r1
|
|
mov r7, r2
|
|
bl OS_DisableInterrupts
|
|
ldr r1, _020D881C ; =UNK_021D5E28
|
|
mov r4, r0
|
|
ldrh r1, [r1, #0x0]
|
|
cmp r1, #0x0
|
|
beq _020D8674
|
|
bl OS_RestoreInterrupts
|
|
mov r0, #0x3
|
|
ldmia sp!, {r4-r10,lr}
|
|
bx lr
|
|
_020D8674:
|
|
cmp r6, #0x0
|
|
bne _020D868C
|
|
bl OS_RestoreInterrupts
|
|
mov r0, #0x6
|
|
ldmia sp!, {r4-r10,lr}
|
|
bx lr
|
|
_020D868C:
|
|
cmp r5, #0x3
|
|
bls _020D86A4
|
|
bl OS_RestoreInterrupts
|
|
mov r0, #0x6
|
|
ldmia sp!, {r4-r10,lr}
|
|
bx lr
|
|
_020D86A4:
|
|
ands r1, r6, #0x1f
|
|
beq _020D86BC
|
|
bl OS_RestoreInterrupts
|
|
mov r0, #0x6
|
|
ldmia sp!, {r4-r10,lr}
|
|
bx lr
|
|
_020D86BC:
|
|
bl PXI_Init
|
|
mov r0, #0xa
|
|
mov r1, #0x1
|
|
bl PXI_IsCallbackReady
|
|
_020D86CC: ; 0x020D86CC
|
|
cmp r0, #0x0
|
|
bne _020D86E8
|
|
mov r0, r4
|
|
bl OS_RestoreInterrupts
|
|
mov r0, #0x4
|
|
ldmia sp!, {r4-r10,lr}
|
|
bx lr
|
|
_020D86E8:
|
|
mov r0, r6
|
|
mov r1, r7
|
|
bl DC_InvalidateRange
|
|
mov r0, r5
|
|
mov r1, r6
|
|
mov r3, r7
|
|
mov r2, #0x0
|
|
bl MI_DmaFill32
|
|
ldr r0, _020D8820 ; =UNK_021D5E2C
|
|
add r1, r6, #0x200
|
|
str r6, [r0, #0x0]
|
|
str r1, [r6, #0x0]
|
|
ldr r2, [r0, #0x0]
|
|
ldr r1, [r2, #0x0]
|
|
add r1, r1, #0x300
|
|
str r1, [r2, #0x4]
|
|
ldr r2, [r0, #0x0]
|
|
ldr r1, [r2, #0x4]
|
|
add r1, r1, #0x800
|
|
str r1, [r2, #0xc]
|
|
ldr r1, [r0, #0x0]
|
|
ldr r0, [r1, #0xc]
|
|
add r0, r0, #0x100
|
|
str r0, [r1, #0x10]
|
|
bl WmClearFifoRecvFlag
|
|
ldr r1, _020D8820 ; =UNK_021D5E2C
|
|
mov r3, #0x0
|
|
ldr r0, [r1, #0x0]
|
|
strh r5, [r0, #0x14]
|
|
ldr r0, [r1, #0x0]
|
|
str r3, [r0, #0x14c]
|
|
ldr r0, [r1, #0x0]
|
|
add r0, r0, #0x100
|
|
strh r3, [r0, #0x50]
|
|
mov r2, r3
|
|
_020D8774:
|
|
ldr r0, [r1, #0x0]
|
|
add r0, r0, r3, lsl #0x2
|
|
str r2, [r0, #0xcc]
|
|
ldr r0, [r1, #0x0]
|
|
add r0, r0, r3, lsl #0x2
|
|
add r3, r3, #0x1
|
|
str r2, [r0, #0x10c]
|
|
cmp r3, #0x10
|
|
blt _020D8774
|
|
ldr r0, _020D8824 ; =UNK_021D5E30
|
|
ldr r1, _020D8828 ; =UNK_021D5E50
|
|
mov r2, #0xa
|
|
bl OS_InitMessageQueue
|
|
ldr sb, _020D882C ; =UNK_021D5EC0
|
|
mov r10, #0x0
|
|
ldr r6, _020D8824 ; =UNK_021D5E30
|
|
mov r8, #0x8000
|
|
mov r7, #0x2
|
|
mov r5, #0x1
|
|
_020D87C0:
|
|
mov r0, r9
|
|
mov r1, r7
|
|
strh r8, [r9, #0x0]
|
|
bl DC_StoreRange
|
|
mov r0, r6
|
|
mov r1, r9
|
|
mov r2, r5
|
|
bl OS_SendMessage
|
|
add r10, r10, #0x1
|
|
cmp r10, #0xa
|
|
add r9, r9, #0x100
|
|
blt _020D87C0
|
|
ldr r1, _020D8830 ; =WmReceiveFifo
|
|
mov r0, #0xa
|
|
bl PXI_SetFifoRecvCallback
|
|
ldr r1, _020D881C ; =UNK_021D5E28
|
|
mov r2, #0x1
|
|
mov r0, r4
|
|
strh r2, [r1, #0x0]
|
|
bl OS_RestoreInterrupts
|
|
_020D8810: ; 0x020D8810
|
|
mov r0, #0x0
|
|
ldmia sp!, {r4-r10,lr}
|
|
bx lr
|
|
.balign 4
|
|
_020D881C: .word UNK_021D5E28
|
|
_020D8820: .word UNK_021D5E2C
|
|
_020D8824: .word UNK_021D5E30
|
|
_020D8828: .word UNK_021D5E50
|
|
_020D882C: .word UNK_021D5EC0
|
|
_020D8830: .word WmReceiveFifo
|
|
|
|
arm_func_start WM_Init
|
|
WM_Init:
|
|
stmdb sp!, {lr}
|
|
sub sp, sp, #0x4
|
|
mov r2, #0xf00
|
|
bl WmInitCore
|
|
_020D8844: ; 0x020D8844
|
|
cmp r0, #0x0
|
|
ldreq r1, _020D8864 ; =UNK_021D5E2C
|
|
moveq r2, #0x0
|
|
ldreq r1, [r1, #0x0]
|
|
streqh r2, [r1, #0x16]
|
|
add sp, sp, #0x4
|
|
ldmia sp!, {lr}
|
|
bx lr
|
|
.balign 4
|
|
_020D8864: .word UNK_021D5E2C
|