mirror of
https://github.com/pret/pmd-sky.git
synced 2026-08-05 10:46:00 -05:00
383 lines
6.7 KiB
ArmAsm
383 lines
6.7 KiB
ArmAsm
.include "asm/macros.inc"
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.include "main_0207F894.inc"
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.text
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arm_func_start MD5_Init
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MD5_Init: ; 0x020800FC
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ldr r2, _0208012C ; =0x67452301
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ldr r1, _02080130 ; =0xEFCDAB89
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str r2, [r0]
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ldr r2, _02080134 ; =0x98BADCFE
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str r1, [r0, #4]
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ldr r1, _02080138 ; =0x10325476
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str r2, [r0, #8]
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str r1, [r0, #0xc]
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mov r1, #0
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str r1, [r0, #0x10]
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str r1, [r0, #0x14]
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bx lr
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.align 2, 0
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_0208012C: .word 0x67452301
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_02080130: .word 0xEFCDAB89
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_02080134: .word 0x98BADCFE
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_02080138: .word 0x10325476
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arm_func_end MD5_Init
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arm_func_start MD5_Update
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MD5_Update: ; 0x0208013C
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stmdb sp!, {r4, r5, r6, r7, r8, lr}
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mov r6, r0
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ldr r3, [r6, #0x10]
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mov r4, r2
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and ip, r3, #0x3f
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ldr r0, [r6, #0x14]
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adds r3, r3, r4
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str r3, [r6, #0x10]
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adc r0, r0, #0
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rsb r7, ip, #0x40
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mov r5, r1
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str r0, [r6, #0x14]
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cmp r7, r4
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bls _02080190
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cmp r4, #0
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ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
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add r1, r6, #0x18
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mov r0, r5
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add r1, r1, ip
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bl MI_CpuCopy8
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ldmia sp!, {r4, r5, r6, r7, r8, pc}
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_02080190:
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add r1, r6, #0x18
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mov r0, r5
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mov r2, r7
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add r1, r1, ip
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bl MI_CpuCopy8
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mov r0, r6
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bl MD5_Transform
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sub r4, r4, r7
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mov r8, r4, lsr #6
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cmp r8, #0
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add r7, r5, r7
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ble _020801EC
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mov r5, #0x40
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_020801C4:
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mov r0, r7
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mov r2, r5
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add r1, r6, #0x18
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bl MI_CpuCopy8
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mov r0, r6
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add r7, r7, #0x40
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bl MD5_Transform
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sub r8, r8, #1
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cmp r8, #0
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bgt _020801C4
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_020801EC:
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ands r2, r4, #0x3f
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ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
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mov r0, r7
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add r1, r6, #0x18
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bl MI_CpuCopy8
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ldmia sp!, {r4, r5, r6, r7, r8, pc}
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arm_func_end MD5_Update
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arm_func_start MD5_Digest
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MD5_Digest: ; 0x02080204
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stmdb sp!, {r3, r4, r5, r6, r7, lr}
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mov r4, r1
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ldr r1, [r4, #0x14]
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ldr r3, [r4, #0x10]
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mov r5, r0
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mov r6, r1, lsl #3
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ldr r1, _020802B8 ; =_020B2BC0
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mov r0, r4
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mov r2, #1
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orr r6, r6, r3, lsr #29
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mov r7, r3, lsl #3
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bl MD5_Update
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ldr r0, [r4, #0x10]
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mov r1, #0
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and r3, r0, #0x3f
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rsb r2, r3, #0x40
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cmp r2, #8
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bhs _02080268
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add r0, r4, #0x18
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add r0, r0, r3
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bl MI_CpuFill8
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mov r0, r4
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bl MD5_Transform
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mov r3, #0
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mov r2, #0x40
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_02080268:
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cmp r2, #8
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bls _02080284
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add r0, r4, #0x18
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add r0, r0, r3
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sub r2, r2, #8
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mov r1, #0
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bl MI_CpuFill8
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_02080284:
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str r7, [r4, #0x50]
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mov r0, r4
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str r6, [r4, #0x54]
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bl MD5_Transform
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mov r0, r4
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mov r1, r5
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mov r2, #0x10
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bl MI_CpuCopy8
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mov r0, r4
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mov r1, #0
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mov r2, #0x58
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bl MI_CpuFill8
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ldmia sp!, {r3, r4, r5, r6, r7, pc}
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.align 2, 0
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_020802B8: .word _020B2BC0
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arm_func_end MD5_Digest
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arm_func_start MD5_Transform
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MD5_Transform: ; 0x020802BC
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stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
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ldmia r0, {r2, r3, ip, lr}
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add r4, r0, #0x18
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ldr r5, _02080668 ; =_020B2C84
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mov r7, r4
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mov r8, #0
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_020802D4:
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mvn r1, r3
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and r6, r3, ip
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and r1, r1, lr
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orr r1, r6, r1
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ldr r6, [r7]
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add r1, r2, r1
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ldr r2, [r5]
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add r1, r6, r1
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add r2, r2, r1
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mov r1, r2, lsr #0x19
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orr r1, r1, r2, lsl #7
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add r2, r3, r1
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mvn r1, r2
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and r6, r2, r3
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and r1, r1, ip
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orr r1, r6, r1
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ldr r6, [r7, #4]
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add r1, lr, r1
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ldr sb, [r5, #4]
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add r1, r6, r1
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add r6, sb, r1
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mov r1, r6, lsr #0x14
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orr r1, r1, r6, lsl #12
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add lr, r2, r1
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mvn r1, lr
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and r6, lr, r2
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and r1, r1, r3
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orr r1, r6, r1
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ldr sb, [r7, #8]
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add r6, ip, r1
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ldr r1, [r7, #0xc]
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add sb, sb, r6
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ldr sl, [r5, #8]
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ldr r6, [r5, #0xc]
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add sl, sl, sb
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mov sb, sl, lsr #0xf
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orr sb, sb, sl, lsl #17
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add ip, lr, sb
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add r5, r5, #0x10
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add r7, r7, #0x10
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and sl, ip, lr
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mvn sb, ip
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and sb, sb, r2
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orr sb, sl, sb
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add r3, r3, sb
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add r1, r1, r3
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add r3, r6, r1
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mov r1, r3, lsr #0xa
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orr r1, r1, r3, lsl #22
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add r3, ip, r1
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add r8, r8, #1
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cmp r8, #4
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blt _020802D4
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ldr r1, _0208066C ; =_020B2BC4
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mov r6, #0
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_020803B0:
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mvn r7, lr
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ldr sb, [r1]
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and r8, r3, lr
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and r7, ip, r7
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orr r7, r8, r7
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ldr r8, [r4, sb, lsl #2]
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add r2, r2, r7
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ldr r7, [r5]
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add r2, r8, r2
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add r7, r7, r2
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mov r2, r7, lsr #0x1b
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orr r2, r2, r7, lsl #5
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add r2, r3, r2
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mvn r8, ip
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ldr r7, [r1, #4]
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and sb, r2, ip
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and r8, r3, r8
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orr sl, sb, r8
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mvn r8, r3
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ldr sb, [r1, #8]
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ldr fp, [r4, r7, lsl #2]
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add r7, lr, sl
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add r7, fp, r7
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ldr sl, [r5, #4]
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ldr sb, [r4, sb, lsl #2]
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add sl, sl, r7
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ldr r7, [r1, #0xc]
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and r8, r2, r8
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ldr r7, [r4, r7, lsl #2]
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mov fp, sl, lsr #0x17
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orr sl, fp, sl, lsl #9
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add lr, r2, sl
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ldr sl, [r5, #8]
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and fp, lr, r3
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orr r8, fp, r8
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add r8, ip, r8
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add r8, sb, r8
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add sb, sl, r8
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mov r8, sb, lsr #0x12
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orr r8, r8, sb, lsl #14
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add ip, lr, r8
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mvn r8, r2
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and sb, lr, r8
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ldr r8, [r5, #0xc]
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add r5, r5, #0x10
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add r1, r1, #0x10
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and sl, ip, r2
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orr sb, sl, sb
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add r3, r3, sb
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add r3, r7, r3
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add r7, r8, r3
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mov r3, r7, lsr #0xc
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orr r3, r3, r7, lsl #20
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add r3, ip, r3
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add r6, r6, #1
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cmp r6, #4
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blt _020803B0
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mov r6, #0
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_02080498:
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ldr r8, [r1]
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eor r7, r3, ip
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eor r7, lr, r7
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ldr r8, [r4, r8, lsl #2]
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add r2, r2, r7
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ldr r7, [r5]
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add r2, r8, r2
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add r7, r7, r2
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mov r2, r7, lsr #0x1c
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orr r2, r2, r7, lsl #4
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add r2, r3, r2
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ldr r8, [r1, #4]
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eor r7, r2, r3
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eor r7, ip, r7
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ldr r8, [r4, r8, lsl #2]
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add r7, lr, r7
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ldr sb, [r1, #8]
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ldr sl, [r5, #4]
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add r7, r8, r7
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add r8, sl, r7
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mov r7, r8, lsr #0x15
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orr r7, r7, r8, lsl #11
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add lr, r2, r7
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eor r8, lr, r2
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ldr r7, [r1, #0xc]
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ldr sb, [r4, sb, lsl #2]
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eor r8, r3, r8
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add r8, ip, r8
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add sb, sb, r8
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ldr sl, [r5, #8]
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ldr r8, [r4, r7, lsl #2]
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add sb, sl, sb
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mov r7, sb, lsr #0x10
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orr r7, r7, sb, lsl #16
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add ip, lr, r7
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eor r7, ip, lr
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eor r7, r2, r7
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add r3, r3, r7
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add r3, r8, r3
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ldr r7, [r5, #0xc]
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add r5, r5, #0x10
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add r7, r7, r3
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add r1, r1, #0x10
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mov r3, r7, lsr #9
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orr r3, r3, r7, lsl #23
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add r3, ip, r3
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add r6, r6, #1
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cmp r6, #4
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blt _02080498
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mov r8, #0
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_02080560:
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mvn r6, lr
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ldr r7, [r1]
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orr r6, r3, r6
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eor r6, ip, r6
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ldr r7, [r4, r7, lsl #2]
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add r2, r2, r6
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ldr r6, [r5]
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add r2, r7, r2
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add r6, r6, r2
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mov r2, r6, lsr #0x1a
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orr r2, r2, r6, lsl #6
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add r2, r3, r2
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mvn r6, ip
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ldr sb, [r1, #4]
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orr r6, r2, r6
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eor r7, r3, r6
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ldr r6, [r1, #8]
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ldr sb, [r4, sb, lsl #2]
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add r7, lr, r7
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ldr sl, [r5, #4]
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add r7, sb, r7
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add sb, sl, r7
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mov r7, sb, lsr #0x16
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orr sb, r7, sb, lsl #10
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ldr r7, [r1, #0xc]
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add lr, r2, sb
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mvn sb, r3
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ldr r6, [r4, r6, lsl #2]
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orr sb, lr, sb
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eor sb, r2, sb
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add sb, ip, sb
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add sb, r6, sb
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ldr sl, [r5, #8]
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ldr r6, [r4, r7, lsl #2]
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add sb, sl, sb
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mov r7, sb, lsr #0x11
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orr sb, r7, sb, lsl #15
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ldr r7, [r5, #0xc]
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add ip, lr, sb
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add r5, r5, #0x10
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add r1, r1, #0x10
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mvn sb, r2
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orr sb, ip, sb
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eor sb, lr, sb
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add r3, r3, sb
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add r3, r6, r3
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add r6, r7, r3
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mov r3, r6, lsr #0xb
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orr r3, r3, r6, lsl #21
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add r3, ip, r3
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add r8, r8, #1
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cmp r8, #4
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blt _02080560
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ldr r1, [r0]
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add r1, r1, r2
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str r1, [r0]
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ldr r1, [r0, #4]
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add r1, r1, r3
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str r1, [r0, #4]
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ldr r1, [r0, #8]
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add r1, r1, ip
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str r1, [r0, #8]
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ldr r1, [r0, #0xc]
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add r1, r1, lr
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str r1, [r0, #0xc]
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ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
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.align 2, 0
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_02080668: .word _020B2C84
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_0208066C: .word _020B2BC4
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arm_func_end MD5_Transform
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