.include "asm/macros.inc"
	.include "overlay_00.inc"

	.text

; https://decomp.me/scratch/rqTSp
	arm_func_start ov00_022BCA80
ov00_022BCA80: ; 0x022BCA80
	stmdb sp!, {r4, r5, r6, lr}
	ldr r1, _022BCB9C ; =ov00_023187A0
	mov r5, r0
	ldr r0, [r1, #8]
	cmp r0, #0
	addgt r0, r0, #1
	strgt r0, [r1, #8]
	movgt r0, #0
	ldmgtia sp!, {r4, r5, r6, pc}
	bl sub_0207AFF0
	mov r0, #0x720
	mov r1, #8
	bl MemAlloc
	mov r6, r0
	add r0, r6, #0x1f
	bic r0, r0, #0x1f
	bl ov00_022DB054
	mov r4, r0
	mov r0, r6
	bl MemFree
	mov r0, #0x40000
	mov r1, #8
	bl MemAlloc
	ldr r3, _022BCB9C ; =ov00_023187A0
	add r1, r0, #0x1f
	str r0, [r3, #0x10]
	bic r1, r1, #0x1f
	str r1, [r3, #0x20]
	mov r2, #0
	str r2, [r1]
	ldr ip, [r3, #0x20]
	ldr r1, [r3, #0x10]
	ldr r0, _022BCBA0 ; =0x0003FFE0
	sub r1, ip, r1
	sub r0, r0, r1
	mov r0, r0, lsr #5
	str r0, [ip, #4]
	ldr r1, [r3, #0x20]
	sub ip, r2, #1
	str ip, [r1, #8]
	ldr lr, [r3, #0x20]
	ldr r0, _022BCBA4 ; =ov00_022BDE30
	ldr ip, [lr, #4]
	ldr r1, _022BCBA8 ; =ov00_022BDF1C
	add ip, lr, ip, lsl #5
	add ip, ip, #0x20
	str ip, [r3, #0x18]
	str r2, [r3, #0x14]
	bl ov00_022E03DC
	ldr r0, _022BCB9C ; =ov00_023187A0
	cmp r4, #3
	str r5, [r0, #0xc]
	ldr r1, [r0, #8]
	add r1, r1, #1
	str r1, [r0, #8]
	addls pc, pc, r4, lsl #2
	b _022BCB94
_022BCB64: ; jump table
	b _022BCB74 ; case 0
	b _022BCB7C ; case 1
	b _022BCB84 ; case 2
	b _022BCB8C ; case 3
_022BCB74:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022BCB7C:
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
_022BCB84:
	mov r0, #2
	ldmia sp!, {r4, r5, r6, pc}
_022BCB8C:
	mov r0, #3
	ldmia sp!, {r4, r5, r6, pc}
_022BCB94:
	mov r0, #4
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022BCB9C: .word ov00_023187A0
_022BCBA0: .word 0x0003FFE0
_022BCBA4: .word ov00_022BDE30
_022BCBA8: .word ov00_022BDF1C
	arm_func_end ov00_022BCA80

	arm_func_start ov00_022BCBAC
ov00_022BCBAC: ; 0x022BCBAC
	stmdb sp!, {r3, lr}
	cmp r0, #0
	beq _022BCBF0
	ldr r0, _022BCC2C ; =ov00_023187A0
	ldr r0, [r0, #0x10]
	cmp r0, #0
	beq _022BCBE0
	bl MemFree
	ldr r0, _022BCC2C ; =ov00_023187A0
	mov r1, #0
	str r1, [r0, #0x10]
	str r1, [r0, #0x20]
	str r1, [r0, #0x18]
_022BCBE0:
	ldr r0, _022BCC2C ; =ov00_023187A0
	mov r1, #0
	str r1, [r0, #8]
	ldmia sp!, {r3, pc}
_022BCBF0:
	ldr r0, _022BCC2C ; =ov00_023187A0
	ldr r1, [r0, #8]
	cmp r1, #0
	ldmleia sp!, {r3, pc}
	subs r1, r1, #1
	str r1, [r0, #8]
	ldmneia sp!, {r3, pc}
	ldr r0, [r0, #0x10]
	bl MemFree
	ldr r0, _022BCC2C ; =ov00_023187A0
	mov r1, #0
	str r1, [r0, #0x10]
	str r1, [r0, #0x20]
	str r1, [r0, #0x18]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BCC2C: .word ov00_023187A0
	arm_func_end ov00_022BCBAC

	arm_func_start ov00_022BCC30
ov00_022BCC30: ; 0x022BCC30
	stmdb sp!, {r3, lr}
	cmp r0, #0
	bne _022BCC64
	ldr r0, _022BCC88 ; =ov00_023187A0
	ldr r0, [r0, #0xc]
	bl ov00_022DB7BC
	cmp r0, #0
	beq _022BCC64
	ldr r0, _022BCC88 ; =ov00_023187A0
	ldr r0, [r0, #0xc]
	bl ov00_022DBC64
	mov r0, #1
	ldmia sp!, {r3, pc}
_022BCC64:
#ifdef EUROPE
	bl GetLanguage
	ldr r1, _022BCC88 ; =ov00_023187A0
	mov r3, r0
	ldr r2, _022BD5D8 ; =ov00_02318758_EU
	ldr r0, [r1, #0xc]
	ldr r1, [r2, r3, lsl #2]
#else
	ldr r0, _022BCC88 ; =ov00_023187A0
	ldr r1, _022BCC8C ; =0x59465945
	ldr r0, [r0, #0xc]
#endif
	bl ov00_022DB7B0
	ldr r0, _022BCC88 ; =ov00_023187A0
	ldr r0, [r0, #0xc]
	bl ov00_022DBC64
	mov r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BCC88: .word ov00_023187A0
#if defined(EUROPE)
_022BD5D8: .word ov00_02318758_EU
#elif defined(JAPAN)
_022BCC8C: .word 0x5946594A
#else
_022BCC8C: .word 0x59465945
#endif
	arm_func_end ov00_022BCC30

	arm_func_start ov00_022BCC90
ov00_022BCC90: ; 0x022BCC90
	stmdb sp!, {r3, lr}
	ldr r0, _022BCCA8 ; =ov00_023187A0
	ldr r0, [r0, #0xc]
	bl ov00_022DB8F0
	and r0, r0, #0xff
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BCCA8: .word ov00_023187A0
	arm_func_end ov00_022BCC90

	arm_func_start ov00_022BCCAC
ov00_022BCCAC: ; 0x022BCCAC
	stmdb sp!, {r3, lr}
	ldr r0, _022BCCC4 ; =ov00_023187A0
	ldr r0, [r0, #0xc]
	bl ov00_022DB800
	and r0, r0, #0xff
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BCCC4: .word ov00_023187A0
	arm_func_end ov00_022BCCAC

	arm_func_start ov00_022BCCC8
ov00_022BCCC8: ; 0x022BCCC8
	stmdb sp!, {lr}
	sub sp, sp, #0xc
	add r0, sp, #0
	bl ov00_022BCD4C
	ldr r0, _022BCCF0 ; =ov00_023187A0
	add r1, sp, #0
	ldr r0, [r0, #0xc]
	bl ov00_022DB98C
	add sp, sp, #0xc
	ldmia sp!, {pc}
	.align 2, 0
_022BCCF0: .word ov00_023187A0
	arm_func_end ov00_022BCCC8

	arm_func_start ov00_022BCCF4
ov00_022BCCF4: ; 0x022BCCF4
	stmdb sp!, {r3, lr}
	ldr r0, _022BCD0C ; =ov00_023187A0
	ldr r0, [r0, #0xc]
	bl ov00_022DB830
	and r0, r0, #0xff
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BCD0C: .word ov00_023187A0
	arm_func_end ov00_022BCCF4

	arm_func_start ov00_022BCD10
ov00_022BCD10: ; 0x022BCD10
	ldr r1, _022BCD24 ; =ov00_023187A0
	ldr ip, _022BCD28 ; =MemcpySimple
	mov r2, #0x40
	ldr r1, [r1, #0xc]
	bx ip
	.align 2, 0
_022BCD24: .word ov00_023187A0
_022BCD28: .word MemcpySimple
	arm_func_end ov00_022BCD10

	arm_func_start ov00_022BCD2C
ov00_022BCD2C: ; 0x022BCD2C
	ldr r2, _022BCD44 ; =ov00_023187A0
	ldr ip, _022BCD48 ; =MemcpySimple
	mov r1, r0
	ldr r0, [r2, #0xc]
	mov r2, #0x40
	bx ip
	.align 2, 0
_022BCD44: .word ov00_023187A0
_022BCD48: .word MemcpySimple
	arm_func_end ov00_022BCD2C

	arm_func_start ov00_022BCD4C
ov00_022BCD4C: ; 0x022BCD4C
	stmdb sp!, {r4, lr}
	ldr r1, _022BCDA0 ; =ov00_023187A0
	mov r4, r0
	ldr r0, [r1, #0xc]
	bl ov00_022DB800
	tst r0, #0xff
	bne _022BCD7C
	ldr r0, _022BCDA0 ; =ov00_023187A0
	mov r1, r4
	ldr r0, [r0, #0xc]
	bl ov00_022DBA58
	ldmia sp!, {r4, pc}
_022BCD7C:
	ldr r0, _022BCDA0 ; =ov00_023187A0
	ldr r0, [r0, #0xc]
	bl ov00_022DB9EC
	mov r3, r0
	mov r2, r1
	mov r0, r4
	mov r1, r3
	bl ov00_022DBA1C
	ldmia sp!, {r4, pc}
	.align 2, 0
_022BCDA0: .word ov00_023187A0
	arm_func_end ov00_022BCD4C

	arm_func_start ov00_022BCDA4
ov00_022BCDA4: ; 0x022BCDA4
	ldr r0, _022BCDB4 ; =ov00_023187A0
	ldr ip, _022BCDB8 ; =ov00_022DB9EC
	ldr r0, [r0, #0xc]
	bx ip
	.align 2, 0
_022BCDB4: .word ov00_023187A0
_022BCDB8: .word ov00_022DB9EC
	arm_func_end ov00_022BCDA4

	arm_func_start ov00_022BCDBC
ov00_022BCDBC: ; 0x022BCDBC
#ifdef JAPAN
#define OV00_022BCDBC_OFFSET -0x50
#else
#define OV00_022BCDBC_OFFSET 0
#endif
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x10
	movs sl, r0
	mov sb, r1
	str r2, [sp]
	moveq r0, #4
	beq _022BCF08
	bl ov00_022DB78C
	cmp r0, #0
	moveq r0, #4
	beq _022BCF08
	add r0, sp, #4
	bl ov00_022BCD4C
	add r1, sp, #4
	mov r0, sl
	bl ov00_022DBAF8
	cmp r0, #0
	movne r0, #1
	bne _022BCF08
	ldr r0, _022BCF10 ; =ov00_023187A0
	mov r1, sl
	ldr r0, [r0, #0xc]
	bl ov00_022DB98C
	mov r5, #0
	mov r7, r0
	sub r6, r5, #1
	mvn fp, #0
	b _022BCEB0
_022BCE2C:
	mov r0, #0xc
	mul r8, r5, r0
	ldr r0, _022BCF10 ; =ov00_023187A0
	ldr r0, [r0, #0xc]
	add r0, r0, #0xe0 + OV00_022BCDBC_OFFSET
	add r0, r0, r8
	bl ov00_022DB78C
	cmp r0, #0
	beq _022BCEA4
	ldr r0, _022BCF10 ; =ov00_023187A0
	ldr r0, [r0, #0xc]
	add r1, r0, #0xe0 + OV00_022BCDBC_OFFSET
	add r1, r1, r8
	bl ov00_022DB98C
	ldr r1, _022BCF10 ; =ov00_023187A0
	mov r4, r0
	ldr r1, [r1, #0xc]
	add r0, r1, #0xe0 + OV00_022BCDBC_OFFSET
	add r1, r0, r8
	mov r0, sl
	bl ov00_022DBAF8
	cmp r0, #0
	bne _022BCE9C
	cmp r4, #0
	cmpgt r7, #0
	ble _022BCEAC
	cmp r4, r7
	bne _022BCEAC
_022BCE9C:
	mov r0, #2
	b _022BCF08
_022BCEA4:
	cmp r6, fp
	moveq r6, r5
_022BCEAC:
	add r5, r5, #1
_022BCEB0:
	cmp r5, #0x10
	blt _022BCE2C
	cmp r6, #0
	blt _022BCF04
	ldr r0, [sp]
	cmp r0, #0
	beq _022BCEFC
	cmp sb, #0
	moveq r0, #4
	beq _022BCF08
	mov r0, r6, lsl #0x10
	mov r1, sl
	mov r2, sb
	mov r0, r0, lsr #0x10
	bl ov00_022BCF6C
	mov r0, r6, lsl #0x10
	mov r0, r0, lsr #0x10
	mov r1, #0
	bl ov00_022BD2A4
_022BCEFC:
	mov r0, #0
	b _022BCF08
_022BCF04:
	mov r0, #3
_022BCF08:
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022BCF10: .word ov00_023187A0
	arm_func_end ov00_022BCDBC

	arm_func_start ov00_022BCF14
ov00_022BCF14: ; 0x022BCF14
	stmdb sp!, {r4, lr}
#ifdef JAPAN
	mov r4, r1
	cmp r0, #0x10
	mov lr, r2
	movhs r0, #0
	ldmhsia sp!, {r4, pc}
	ldr r2, _022BCF68 ; =ov00_023187A0
	mov r1, #0xc
	ldr ip, [r2, #0xc]
	add r3, r0, r0, lsl #2
	mla r1, r0, r1, ip
	add r0, r1, #0x90
	ldmia r0, {r0, r1, r2}
	stmia r4, {r0, r1, r2}
	add r1, ip, #0x40
	mov r0, lr
	add r1, r1, r3
	mov r2, #5
#else
	mov r4, r0
	cmp r4, #0x10
	mov lr, r1
	mov ip, r2
	movhs r0, #0
	ldmhsia sp!, {r4, pc}
	ldr r1, _022BCF68 ; =ov00_023187A0
	mov r0, #0xc
	ldr r3, [r1, #0xc]
	mla r0, r4, r0, r3
	add r0, r0, #0xe0
	ldmia r0, {r0, r1, r2}
	stmia lr, {r0, r1, r2}
	add r0, r3, #0x40
	mov r2, #0xa
	mla r1, r4, r2, r0
	mov r0, ip
#endif
	bl MemcpySimple
	mov r0, #1
	ldmia sp!, {r4, pc}
	.align 2, 0
_022BCF68: .word ov00_023187A0
	arm_func_end ov00_022BCF14

	arm_func_start ov00_022BCF6C
ov00_022BCF6C: ; 0x022BCF6C
	stmdb sp!, {r4, lr}
#ifdef JAPAN
	mov r4, r2
	cmp r0, #0x10
	movhs r0, #0
	ldmhsia sp!, {r4, pc}
	cmp r4, #0
	cmpne r1, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	ldr r3, _022BCFCC ; =ov00_023187A0
	mov r2, #0xc
	ldr lr, [r3, #0xc]
	add r3, r0, r0, lsl #2
	mla r2, r0, r2, lr
	add ip, r2, #0x90
	ldmia r1, {r0, r1, r2}
	stmia ip, {r0, r1, r2}
	add r0, lr, #0x40
	mov r1, r4
	add r0, r0, r3
	mov r2, #5
#else
	mov r4, r0
	cmp r4, #0x10
	mov lr, r2
	movhs r0, #0
	ldmhsia sp!, {r4, pc}
	cmp lr, #0
	cmpne r1, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	ldr r0, _022BCFCC ; =ov00_023187A0
	mov r3, #0xc
	ldr ip, [r0, #0xc]
	ldmia r1, {r0, r1, r2}
	mla r3, r4, r3, ip
	add r3, r3, #0xe0
	stmia r3, {r0, r1, r2}
	add r0, ip, #0x40
	mov r2, #0xa
	mla r0, r4, r2, r0
	mov r1, lr
#endif
	bl MemcpySimple
	mov r0, #1
	ldmia sp!, {r4, pc}
	.align 2, 0
_022BCFCC: .word ov00_023187A0
	arm_func_end ov00_022BCF6C

	arm_func_start ov00_022BCFD0
ov00_022BCFD0: ; 0x022BCFD0
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	cmp r5, #0x10
	mov r4, r1
	movhs r0, #0
	ldmhsia sp!, {r3, r4, r5, pc}
	cmp r4, #0
	beq _022BCFFC
	bl ov00_022BD0A0
	cmp r0, #0
	bne _022BD004
_022BCFFC:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022BD004:
	ldr r0, _022BD028 ; =ov00_023187A0
#ifdef JAPAN
	add r2, r5, r5, lsl #2
#else
	mov r2, #0xa
#endif
	ldr r0, [r0, #0xc]
	mov r1, r4
	add r0, r0, #0x40
#ifdef JAPAN
	add r0, r0, r2
	mov r2, #5
#else
	mla r0, r5, r2, r0
#endif
	bl MemcpySimple
	mov r0, #1
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022BD028: .word ov00_023187A0
	arm_func_end ov00_022BCFD0

	arm_func_start ov00_022BD02C
ov00_022BD02C: ; 0x022BD02C
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r6, r0
	mov r4, #0
	ldr r8, _022BD09C ; =ov00_023187A0
	mov r7, #0xc
	b _022BD08C
_022BD044:
	ldr r0, [r8, #0xc]
	smulbb r5, r4, r7
#ifdef JAPAN
	add r0, r0, #0x90
#else
	add r0, r0, #0xe0
#endif
	add r0, r0, r5
	bl ov00_022DB78C
	cmp r0, #0
	beq _022BD080
	ldr r1, [r8, #0xc]
	mov r0, r6
#ifdef JAPAN
	add r1, r1, #0x90
#else
	add r1, r1, #0xe0
#endif
	add r1, r1, r5
	bl ov00_022DBAF8
	cmp r0, #0
	movne r0, r4
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
_022BD080:
	add r0, r4, #1
	mov r0, r0, lsl #0x10
	mov r4, r0, asr #0x10
_022BD08C:
	cmp r4, #0x10
	blt _022BD044
	mvn r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022BD09C: .word ov00_023187A0
	arm_func_end ov00_022BD02C

	arm_func_start ov00_022BD0A0
ov00_022BD0A0: ; 0x022BD0A0
	stmdb sp!, {r3, lr}
	cmp r0, #0x10
	movhs r0, #0
	ldmhsia sp!, {r3, pc}
	ldr r2, _022BD0D0 ; =ov00_023187A0
	mov r1, #0xc
	ldr r2, [r2, #0xc]
#ifdef JAPAN
	add r2, r2, #0x90
#else
	add r2, r2, #0xe0
#endif
	mla r0, r1, r0, r2
	bl ov00_022DB78C
	and r0, r0, #0xff
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BD0D0: .word ov00_023187A0
	arm_func_end ov00_022BD0A0

	arm_func_start ov00_022BD0D4
ov00_022BD0D4: ; 0x022BD0D4
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022BD0A0
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
#ifdef JAPAN
	ldr r0, _022BD104 ; =ov00_023187A0
	add r1, r4, r4, lsl #2
	ldr r0, [r0, #0xc]
	add r0, r0, #0x40
	add r0, r0, r1
#else
	ldr r1, _022BD104 ; =ov00_023187A0
	mov r0, #0xa
	ldr r1, [r1, #0xc]
	add r1, r1, #0x40
	mla r0, r4, r0, r1
#endif
	ldmia sp!, {r4, pc}
	.align 2, 0
_022BD104: .word ov00_023187A0
	arm_func_end ov00_022BD0D4

	arm_func_start ov00_022BD108
ov00_022BD108: ; 0x022BD108
	stmdb sp!, {r3, lr}
	cmp r0, #0x10
	movhs r0, #0
	movhs r1, r0
	ldmhsia sp!, {r3, pc}
	ldr r2, _022BD138 ; =ov00_023187A0
	mov r1, #0xc
	ldr r2, [r2, #0xc]
#ifdef JAPAN
	add r2, r2, #0x90
#else
	add r2, r2, #0xe0
#endif
	mla r0, r1, r0, r2
	bl ov00_022DB964
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BD138: .word ov00_023187A0
	arm_func_end ov00_022BD108

	arm_func_start ov00_022BD13C
ov00_022BD13C: ; 0x022BD13C
	stmdb sp!, {r3, lr}
	mov r3, r0
	cmp r3, #0x10
	movhs r0, #0
	ldmhsia sp!, {r3, pc}
	ldr r0, _022BD16C ; =ov00_023187A0
	mov r1, #0xc
	ldr r0, [r0, #0xc]
#ifdef JAPAN
	add r2, r0, #0x90
#else
	add r2, r0, #0xe0
#endif
	mla r1, r3, r1, r2
	bl ov00_022DB98C
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BD16C: .word ov00_023187A0
	arm_func_end ov00_022BD13C

	arm_func_start ov00_022BD170
ov00_022BD170: ; 0x022BD170
	stmdb sp!, {r3, lr}
	cmp r0, #0x10
	movhs r0, #0
	ldmhsia sp!, {r3, pc}
	ldr r2, _022BD19C ; =ov00_023187A0
	mov r1, #0xc
	ldr r2, [r2, #0xc]
#ifdef JAPAN
	add r2, r2, #0x90
#else
	add r2, r2, #0xe0
#endif
	mla r0, r1, r0, r2
	bl ov00_022DB254
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BD19C: .word ov00_023187A0
	arm_func_end ov00_022BD170

	arm_func_start ov00_022BD1A0
ov00_022BD1A0: ; 0x022BD1A0
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	mov r4, #0
	b _022BD1C8
_022BD1B4:
	mov r0, r4, lsl #0x10
	mov r0, r0, lsr #0x10
	bl ov00_022BD170
	str r0, [r6, r4, lsl #2]
	add r4, r4, #1
_022BD1C8:
	cmp r4, r5
	blt _022BD1B4
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022BD1A0

	arm_func_start ov00_022BD1D4
ov00_022BD1D4: ; 0x022BD1D4
	stmdb sp!, {r3, lr}
	cmp r2, #0
	movlt r2, #0
	blt _022BD1EC
	cmp r2, #0x10
	movgt r2, #0x10
_022BD1EC:
	mov lr, #0
	b _022BD20C
_022BD1F4:
	ldrb ip, [r0, lr]
	ldrb r3, [r1, lr]
	cmp ip, r3
	movne r0, #0
	ldmneia sp!, {r3, pc}
	add lr, lr, #1
_022BD20C:
	cmp lr, r2
	blt _022BD1F4
	mov r0, #1
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022BD1D4

	arm_func_start ov00_022BD21C
ov00_022BD21C: ; 0x022BD21C
	stmdb sp!, {r3, lr}
	cmp r2, #0
	movlt r2, #0
	blt _022BD234
	cmp r2, #0x10
	movgt r2, #0x10
_022BD234:
	mov lr, #0
	b _022BD254
_022BD23C:
	ldr ip, [r0, lr, lsl #2]
	ldr r3, [r1, lr, lsl #2]
	cmp ip, r3
	movne r0, #0
	ldmneia sp!, {r3, pc}
	add lr, lr, #1
_022BD254:
	cmp lr, r2
	blt _022BD23C
	mov r0, #1
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022BD21C

	arm_func_start ov00_022BD264
ov00_022BD264: ; 0x022BD264
	ldr r1, _022BD270 ; =ov00_023187A0
	strb r0, [r1]
	bx lr
	.align 2, 0
_022BD270: .word ov00_023187A0
	arm_func_end ov00_022BD264

	arm_func_start ov00_022BD274
ov00_022BD274: ; 0x022BD274
	ldr r0, _022BD280 ; =ov00_023187A0
	ldrb r0, [r0]
	bx lr
	.align 2, 0
_022BD280: .word ov00_023187A0
	arm_func_end ov00_022BD274

	arm_func_start ov00_022BD284
ov00_022BD284: ; 0x022BD284
	cmp r0, #0x10
	ldrlo r1, _022BD2A0 ; =ov00_023187A0
	movhs r0, #0
	ldrlo r1, [r1, #0xc]
	addlo r0, r1, r0
#ifdef JAPAN
	ldrlob r0, [r0, #0x150]
#else
	ldrlob r0, [r0, #0x1a0]
#endif
	bx lr
	.align 2, 0
_022BD2A0: .word ov00_023187A0
	arm_func_end ov00_022BD284

	arm_func_start ov00_022BD2A4
ov00_022BD2A4: ; 0x022BD2A4
	cmp r0, #0x10
	ldrlo r2, _022BD2BC ; =ov00_023187A0
	ldrlo r2, [r2, #0xc]
	addlo r0, r2, r0
#ifdef JAPAN
	strlob r1, [r0, #0x150]
#else
	strlob r1, [r0, #0x1a0]
#endif
	bx lr
	.align 2, 0
_022BD2BC: .word ov00_023187A0
	arm_func_end ov00_022BD2A4

	arm_func_start ov00_022BD2C0
ov00_022BD2C0: ; 0x022BD2C0
	stmdb sp!, {r3, lr}
	cmp r0, #0x10
	movhs r0, #0
	ldmhsia sp!, {r3, pc}
	ldr r2, _022BD2F0 ; =ov00_023187A0
	mov r1, #0xc
	ldr r2, [r2, #0xc]
#ifdef JAPAN
	add r2, r2, #0x90
#else
	add r2, r2, #0xe0
#endif
	mla r0, r1, r0, r2
	bl ov00_022DB1B4
	and r0, r0, #0xff
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BD2F0: .word ov00_023187A0
	arm_func_end ov00_022BD2C0

	arm_func_start ov00_022BD2F4
ov00_022BD2F4: ; 0x022BD2F4
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, #0
	ldr r5, _022BD334 ; =ov00_023187A0
	mov r6, r7
	mov r4, #0xc
_022BD308:
	ldr r0, [r5, #0xc]
#ifdef JAPAN
	add r0, r0, #0x90
#else
	add r0, r0, #0xe0
#endif
	mla r0, r6, r4, r0
	bl ov00_022DB78C
	cmp r0, #0
	add r6, r6, #1
	addne r7, r7, #1
	cmp r6, #0x10
	blt _022BD308
	mov r0, r7
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022BD334: .word ov00_023187A0
	arm_func_end ov00_022BD2F4

	arm_func_start ov00_022BD338
ov00_022BD338: ; 0x022BD338
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r5, #0
	ldr r8, _022BD394 ; =ov00_023187A0
	mov r4, r5
	mov r7, #0xc
_022BD34C:
	mul r6, r4, r7
	ldr r0, [r8, #0xc]
#ifdef JAPAN
	add r0, r0, #0x90
#else
	add r0, r0, #0xe0
#endif
	add r0, r0, r6
	bl ov00_022DB78C
	cmp r0, #0
	beq _022BD380
	ldr r0, [r8, #0xc]
#ifdef JAPAN
	add r0, r0, #0x90
#else
	add r0, r0, #0xe0
#endif
	add r0, r0, r6
	bl ov00_022DB1B4
	cmp r0, #0
	addne r5, r5, #1
_022BD380:
	add r4, r4, #1
	cmp r4, #0x10
	blt _022BD34C
	mov r0, r5
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022BD394: .word ov00_023187A0
	arm_func_end ov00_022BD338

	arm_func_start ov00_022BD398
ov00_022BD398: ; 0x022BD398
	stmdb sp!, {r3, lr}
	bl ov00_022BD2F4
	cmp r0, #0x10
	movlt r0, #1
	movge r0, #0
	and r0, r0, #0xff
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022BD398

	arm_func_start ov00_022BD3B4
ov00_022BD3B4: ; 0x022BD3B4
	stmdb sp!, {r4, lr}
	ldr r1, _022BD3F0 ; =ov00_023187A0
	mov r4, r0
#ifdef JAPAN
	ldr r1, [r1, #0xc]
	add r0, r4, r4, lsl #2
	add r1, r1, #0x40
	add r0, r1, r0
	mov r1, #5
#else
	ldr r0, [r1, #0xc]
	mov r1, #0xa
	add r0, r0, #0x40
	mla r0, r4, r1, r0
#endif
	bl MemZero
	ldr r1, _022BD3F0 ; =ov00_023187A0
	mov r0, #0xc
	ldr r1, [r1, #0xc]
#ifdef JAPAN
	add r1, r1, #0x90
#else
	add r1, r1, #0xe0
#endif
	mla r0, r4, r0, r1
	bl ov00_022E3680
	ldmia sp!, {r4, pc}
	.align 2, 0
_022BD3F0: .word ov00_023187A0
	arm_func_end ov00_022BD3B4

	arm_func_start ov00_022BD3F4
ov00_022BD3F4: ; 0x022BD3F4
	stmdb sp!, {r4, r5, r6, lr}
	ldr r5, _022BD438 ; =ov00_023187A0
	mov r6, #0
	mov r4, #0xc
_022BD404:
	ldr r0, [r5, #0xc]
#ifdef JAPAN
	add r0, r0, #0x90
#else
	add r0, r0, #0xe0
#endif
	mla r0, r6, r4, r0
	bl ov00_022DB78C
	cmp r0, #0
	beq _022BD428
	mov r0, r6, lsl #0x10
	mov r0, r0, lsr #0x10
	bl ov00_022BD3B4
_022BD428:
	add r6, r6, #1
	cmp r6, #0x10
	blt _022BD404
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022BD438: .word ov00_023187A0
	arm_func_end ov00_022BD3F4

	arm_func_start ov00_022BD43C
ov00_022BD43C: ; 0x022BD43C
	stmdb sp!, {r4, r5, r6, lr}
	ldr r3, _022BD47C ; =ov00_023187A0
	mov r6, r0
	ldr r0, [r3, #0xc]
	mov r5, r1
	mov r4, r2
	bl ov00_022DB3E0
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_022DBA1C
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022BD47C: .word ov00_023187A0
	arm_func_end ov00_022BD43C

	arm_func_start ov00_022BD480
ov00_022BD480: ; 0x022BD480
	stmdb sp!, {lr}
	sub sp, sp, #0xc
	ldr r2, _022BD4CC ; =ov00_0231D420
	mov r1, #0
	strb r1, [r2, #2]
	ldr r0, _022BD4D0 ; =ov00_022BE058
	strb r1, [r2]
	bl ov00_022E3714
	mov r0, #0
	ldr r1, _022BD4D4 ; =ov00_022BE044
	mov r2, r0
	stmia sp, {r0, r1}
	ldr r1, _022BD4D8 ; =ov00_022BE020
	mov r3, r0
	str r0, [sp, #8]
	bl ov00_022E1E0C
	and r0, r0, #0xff
	add sp, sp, #0xc
	ldmia sp!, {pc}
	.align 2, 0
_022BD4CC: .word ov00_0231D420
_022BD4D0: .word ov00_022BE058
_022BD4D4: .word ov00_022BE044
_022BD4D8: .word ov00_022BE020
	arm_func_end ov00_022BD480

	arm_func_start ov00_022BD4DC
ov00_022BD4DC: ; 0x022BD4DC
	ldr r0, _022BD4E8 ; =ov00_0231D420
	ldrb r0, [r0, #2]
	bx lr
	.align 2, 0
_022BD4E8: .word ov00_0231D420
	arm_func_end ov00_022BD4DC

	arm_func_start ov00_022BD4EC
ov00_022BD4EC: ; 0x022BD4EC
#ifdef JAPAN
#define OV00_022BD4EC_OFFSET -0x50
#else
#define OV00_022BD4EC_OFFSET 0
#endif
	stmdb sp!, {r3, r4, r5, lr}
	ldr r0, _022BD570 ; =ov00_023187A0
	mov r1, #0x36
	ldr r0, [r0, #0xc]
	add r0, r0, #0x1b0 + OV00_022BD4EC_OFFSET
	bl MemZero
	ldr r1, _022BD570 ; =ov00_023187A0
	ldr r3, _022BD574 ; =0x00003FFF
	ldr r0, [r1, #0xc]
	mov r4, #0
	add r0, r0, #0x100
	strh r3, [r0, #0xe6 + OV00_022BD4EC_OFFSET]
	ldr r0, [r1, #0xc]
	mov r2, #1
	add r0, r0, #0x100
	strh r3, [r0, #0xe8 + OV00_022BD4EC_OFFSET]
	ldr r0, [r1, #0xc]
	mov r5, r4
	strb r2, [r0, #0x1ea + OV00_022BD4EC_OFFSET]
	ldr r0, [r1, #0xc]
	strb r2, [r0, #0x1eb + OV00_022BD4EC_OFFSET]
	ldr r0, [r1, #0xc]
	strb r2, [r0, #0x1ec + OV00_022BD4EC_OFFSET]
	ldr r0, [r1, #0xc]
	strb r4, [r0, #0x1ed + OV00_022BD4EC_OFFSET]
_022BD550:
	mov r0, r4, lsl #0x10
	mov r1, r5
	mov r0, r0, lsr #0x10
	bl ov00_022BD2A4
	add r4, r4, #1
	cmp r4, #0x10
	blt _022BD550
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022BD570: .word ov00_023187A0
_022BD574: .word 0x00003FFF
	arm_func_end ov00_022BD4EC

#ifndef EUROPE
	arm_func_start ov00_022BD578
ov00_022BD578: ; 0x022BD578
	ldr r1, _022BD59C ; =ov00_023187A0
	mov r2, #0x27
	ldr r1, [r1, #0xc]
#ifdef JAPAN
	add r3, r1, #0x150
#else
	add r3, r1, #0x1a0
#endif
_022BD588:
	ldrh r1, [r3], #2
	subs r2, r2, #1
	strh r1, [r0], #2
	bne _022BD588
	bx lr
	.align 2, 0
_022BD59C: .word ov00_023187A0
	arm_func_end ov00_022BD578

	arm_func_start ov00_022BD5A0
ov00_022BD5A0: ; 0x022BD5A0
	ldr r1, _022BD5C4 ; =ov00_023187A0
	mov r2, #0x27
	ldr r1, [r1, #0xc]
#ifdef JAPAN
	add r3, r1, #0x150
#else
	add r3, r1, #0x1a0
#endif
_022BD5B0:
	ldrh r1, [r0], #2
	subs r2, r2, #1
	strh r1, [r3], #2
	bne _022BD5B0
	bx lr
	.align 2, 0
_022BD5C4: .word ov00_023187A0
	arm_func_end ov00_022BD5A0
#endif

	arm_func_start ov00_022BD5C8
ov00_022BD5C8: ; 0x022BD5C8
	ldr r0, _022BD5E8 ; =ov00_023187A0
	ldr r0, [r0, #0xc]
#ifdef JAPAN
	ldrb r0, [r0, #0x160]
#else
	ldrb r0, [r0, #0x1b0]
#endif
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	and r0, r0, #0xff
	bx lr
	.align 2, 0
_022BD5E8: .word ov00_023187A0
	arm_func_end ov00_022BD5C8

	arm_func_start ov00_022BD5EC
ov00_022BD5EC: ; 0x022BD5EC
	ldr r0, _022BD5FC ; =ov00_023187A0
	ldr r0, [r0, #0xc]
#ifdef JAPAN
	add r0, r0, #0x160
#else
	add r0, r0, #0x1b0
#endif
	bx lr
	.align 2, 0
_022BD5FC: .word ov00_023187A0
	arm_func_end ov00_022BD5EC

#ifndef EUROPE
	arm_func_start ov00_022BD600
ov00_022BD600: ; 0x022BD600
	ldr r0, _022BD628 ; =ov00_023187A0
	ldr r1, _022BD62C ; =0x00002710
	ldr r0, [r0, #0xc]
	add r0, r0, #0x100
#ifdef JAPAN
	ldrh r0, [r0, #0x96]
#else
	ldrh r0, [r0, #0xe6]
#endif
	cmp r0, r1
	movlo r0, #1
	movhs r0, #0
	and r0, r0, #0xff
	bx lr
	.align 2, 0
_022BD628: .word ov00_023187A0
_022BD62C: .word 0x00002710
	arm_func_end ov00_022BD600

	arm_func_start ov00_022BD630
ov00_022BD630: ; 0x022BD630
	ldr r0, _022BD644 ; =ov00_023187A0
	ldr r0, [r0, #0xc]
	add r0, r0, #0x100
#ifdef JAPAN
	ldrh r0, [r0, #0x96]
#else
	ldrh r0, [r0, #0xe6]
#endif
	bx lr
	.align 2, 0
_022BD644: .word ov00_023187A0
	arm_func_end ov00_022BD630

	arm_func_start ov00_022BD648
ov00_022BD648: ; 0x022BD648
	ldr r1, _022BD65C ; =ov00_023187A0
	ldr r1, [r1, #0xc]
	add r1, r1, #0x100
#ifdef JAPAN
	strh r0, [r1, #0x96]
#else
	strh r0, [r1, #0xe6]
#endif
	bx lr
	.align 2, 0
_022BD65C: .word ov00_023187A0
	arm_func_end ov00_022BD648
#endif

	arm_func_start ov00_022BD660
ov00_022BD660: ; 0x022BD660
	ldr r0, _022BD688 ; =ov00_023187A0
	ldr r1, _022BD68C ; =0x00002710
	ldr r0, [r0, #0xc]
	add r0, r0, #0x100
#ifdef JAPAN
	ldrh r0, [r0, #0x98]
#else
	ldrh r0, [r0, #0xe8]
#endif
	cmp r0, r1
	movlo r0, #1
	movhs r0, #0
	and r0, r0, #0xff
	bx lr
	.align 2, 0
_022BD688: .word ov00_023187A0
_022BD68C: .word 0x00002710
	arm_func_end ov00_022BD660

	arm_func_start ov00_022BD690
ov00_022BD690: ; 0x022BD690
	ldr r0, _022BD6A4 ; =ov00_023187A0
	ldr r0, [r0, #0xc]
	add r0, r0, #0x100
#ifdef JAPAN
	ldrh r0, [r0, #0x98]
#else
	ldrh r0, [r0, #0xe8]
#endif
	bx lr
	.align 2, 0
_022BD6A4: .word ov00_023187A0
	arm_func_end ov00_022BD690

#ifndef EUROPE
	arm_func_start ov00_022BD6A8
ov00_022BD6A8: ; 0x022BD6A8
	ldr r1, _022BD6BC ; =ov00_023187A0
	ldr r1, [r1, #0xc]
	add r1, r1, #0x100
#ifdef JAPAN
	strh r0, [r1, #0x98]
#else
	strh r0, [r1, #0xe8]
#endif
	bx lr
	.align 2, 0
_022BD6BC: .word ov00_023187A0
	arm_func_end ov00_022BD6A8

	arm_func_start ov00_022BD6C0
ov00_022BD6C0: ; 0x022BD6C0
	ldr r0, _022BD6D8 ; =ov00_023187A0
	ldr r1, _022BD6DC ; =0x00003FFF
	ldr r0, [r0, #0xc]
	add r0, r0, #0x100
#ifdef JAPAN
	strh r1, [r0, #0x98]
#else
	strh r1, [r0, #0xe8]
#endif
	bx lr
	.align 2, 0
_022BD6D8: .word ov00_023187A0
_022BD6DC: .word 0x00003FFF
	arm_func_end ov00_022BD6C0
#endif

	arm_func_start ov00_022BD6E0
ov00_022BD6E0: ; 0x022BD6E0
	ldr r0, _022BD6F0 ; =ov00_023187A0
	ldr r0, [r0, #0xc]
#ifdef JAPAN
	ldrb r0, [r0, #0x19a]
#else
	ldrb r0, [r0, #0x1ea]
#endif
	bx lr
	.align 2, 0
_022BD6F0: .word ov00_023187A0
	arm_func_end ov00_022BD6E0

	arm_func_start ov00_022BD6F4
ov00_022BD6F4: ; 0x022BD6F4
	ldr r0, _022BD704 ; =ov00_023187A0
	ldr r0, [r0, #0xc]
#ifdef JAPAN
	ldrb r0, [r0, #0x19b]
#else
	ldrb r0, [r0, #0x1eb]
#endif
	bx lr
	.align 2, 0
_022BD704: .word ov00_023187A0
	arm_func_end ov00_022BD6F4

	arm_func_start ov00_022BD708
ov00_022BD708: ; 0x022BD708
	ldr r0, _022BD718 ; =ov00_023187A0
	ldr r0, [r0, #0xc]
#ifdef JAPAN
	ldrb r0, [r0, #0x19c]
#else
	ldrb r0, [r0, #0x1ec]
#endif
	bx lr
	.align 2, 0
_022BD718: .word ov00_023187A0
	arm_func_end ov00_022BD708

	arm_func_start ov00_022BD71C
ov00_022BD71C: ; 0x022BD71C
	ldr r0, _022BD72C ; =ov00_023187A0
	ldr r0, [r0, #0xc]
#ifdef JAPAN
	ldrb r0, [r0, #0x19d]
#else
	ldrb r0, [r0, #0x1ed]
#endif
	bx lr
	.align 2, 0
_022BD72C: .word ov00_023187A0
	arm_func_end ov00_022BD71C

#ifndef EUROPE
	arm_func_start ov00_022BD730
ov00_022BD730: ; 0x022BD730
	ldr r1, _022BD740 ; =ov00_023187A0
	ldr r1, [r1, #0xc]
#ifdef JAPAN
	strb r0, [r1, #0x19a]
#else
	strb r0, [r1, #0x1ea]
#endif
	bx lr
	.align 2, 0
_022BD740: .word ov00_023187A0
	arm_func_end ov00_022BD730

	arm_func_start ov00_022BD744
ov00_022BD744: ; 0x022BD744
	ldr r1, _022BD754 ; =ov00_023187A0
	ldr r1, [r1, #0xc]
#ifdef JAPAN
	strb r0, [r1, #0x19b]
#else
	strb r0, [r1, #0x1eb]
#endif
	bx lr
	.align 2, 0
_022BD754: .word ov00_023187A0
	arm_func_end ov00_022BD744

	arm_func_start ov00_022BD758
ov00_022BD758: ; 0x022BD758
	ldr r1, _022BD768 ; =ov00_023187A0
	ldr r1, [r1, #0xc]
#ifdef JAPAN
	strb r0, [r1, #0x19c]
#else
	strb r0, [r1, #0x1ec]
#endif
	bx lr
	.align 2, 0
_022BD768: .word ov00_023187A0
	arm_func_end ov00_022BD758

	arm_func_start ov00_022BD76C
ov00_022BD76C: ; 0x022BD76C
	ldr r1, _022BD77C ; =ov00_023187A0
	ldr r1, [r1, #0xc]
#ifdef JAPAN
	strb r0, [r1, #0x19d]
#else
	strb r0, [r1, #0x1ed]
#endif
	bx lr
	.align 2, 0
_022BD77C: .word ov00_023187A0
	arm_func_end ov00_022BD76C
#endif

	arm_func_start ov00_022BD780
ov00_022BD780: ; 0x022BD780
	ldr r0, _022BD790 ; =ov00_023187A0
	ldr ip, _022BD794 ; =ov00_022DB914
	ldr r0, [r0, #0xc]
	bx ip
	.align 2, 0
_022BD790: .word ov00_023187A0
_022BD794: .word ov00_022DB914
	arm_func_end ov00_022BD780

	arm_func_start ov00_022BD798
ov00_022BD798: ; 0x022BD798
	stmdb sp!, {r3, lr}
	ldr r0, _022BD7B4 ; =ov00_0231D42C
	bl ov00_022E05B0
	mov r0, #2
	bl ov00_022E05C8
	bl ov00_022E0618
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BD7B4: .word ov00_0231D42C
	arm_func_end ov00_022BD798

	arm_func_start ov00_022BD7B8
ov00_022BD7B8: ; 0x022BD7B8
	stmdb sp!, {r3, lr}
	bl ov00_022E0780
	bl ov00_022E0728
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	and r0, r0, #0xff
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022BD7B8

	arm_func_start ov00_022BD7D8
ov00_022BD7D8: ; 0x022BD7D8
	stmdb sp!, {r3, lr}
	bl ov00_022E0AFC
	and r0, r0, #0xff
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022BD7D8

	arm_func_start ov00_022BD7E8
ov00_022BD7E8: ; 0x022BD7E8
	stmdb sp!, {r3, lr}
	bl ov00_022E089C
	cmp r0, #8
	addls pc, pc, r0, lsl #2
	b _022BD868
_022BD7FC: ; jump table
	b _022BD820 ; case 0
	b _022BD828 ; case 1
	b _022BD830 ; case 2
	b _022BD838 ; case 3
	b _022BD840 ; case 4
	b _022BD848 ; case 5
	b _022BD850 ; case 6
	b _022BD858 ; case 7
	b _022BD860 ; case 8
_022BD820:
	mov r0, #0
	ldmia sp!, {r3, pc}
_022BD828:
	mov r0, #1
	ldmia sp!, {r3, pc}
_022BD830:
	mov r0, #2
	ldmia sp!, {r3, pc}
_022BD838:
	mov r0, #3
	ldmia sp!, {r3, pc}
_022BD840:
	mov r0, #4
	ldmia sp!, {r3, pc}
_022BD848:
	mov r0, #5
	ldmia sp!, {r3, pc}
_022BD850:
	mov r0, #6
	ldmia sp!, {r3, pc}
_022BD858:
	mov r0, #7
	ldmia sp!, {r3, pc}
_022BD860:
	mov r0, #8
	ldmia sp!, {r3, pc}
_022BD868:
	mov r0, #9
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022BD7E8

	arm_func_start ov00_022BD870
ov00_022BD870: ; 0x022BD870
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #0x14
	ldr r1, _022BD8E0 ; =ov00_023187A0
	mov r4, r0
	ldr r1, [r1, #0xc]
	ldr r2, _022BD8E4 ; =ov00_02317F54
	mov r0, #0
	str r2, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
#ifdef JAPAN
	add ip, r1, #0x90
#else
	add ip, r1, #0xe0
#endif
	ldr r0, _022BD8E8 ; =ov00_0231D490
	ldr r2, _022BD8EC ; =0x00002B1A
	ldr r3, _022BD8F0 ; =ov00_02317F44
	str ip, [sp, #0xc]
	mov ip, #0x10
	str ip, [sp, #0x10]
	bl ov00_022E1690
	mov r1, #0
	ldr ip, _022BD8F4 ; =ov00_0231D420
	ldr r2, _022BD8F8 ; =ov00_022BE008
	mov r0, r4
	mov r3, r1
	strb r1, [ip, #1]
	bl ov00_022E1D04
	and r0, r0, #0xff
	add sp, sp, #0x14
	ldmia sp!, {r3, r4, pc}
	.align 2, 0
_022BD8E0: .word ov00_023187A0
_022BD8E4: .word ov00_02317F54
_022BD8E8: .word ov00_0231D490
_022BD8EC: .word 0x00002B1A
_022BD8F0: .word ov00_02317F44
_022BD8F4: .word ov00_0231D420
_022BD8F8: .word ov00_022BE008
	arm_func_end ov00_022BD870

	arm_func_start ov00_022BD8FC
ov00_022BD8FC: ; 0x022BD8FC
	ldr ip, _022BD904 ; =ov00_022E1A84
	bx ip
	.align 2, 0
_022BD904: .word ov00_022E1A84
	arm_func_end ov00_022BD8FC

	arm_func_start ov00_022BD908
ov00_022BD908: ; 0x022BD908
	ldr r0, _022BD914 ; =ov00_0231D420
	ldrb r0, [r0, #1]
	bx lr
	.align 2, 0
_022BD914: .word ov00_0231D420
	arm_func_end ov00_022BD908

	arm_func_start ov00_022BD918
ov00_022BD918: ; 0x022BD918
	stmdb sp!, {r3, lr}
	bl ov00_022E0DAC
	cmp r0, #0
	beq _022BD93C
	cmp r0, #1
	beq _022BD944
	cmp r0, #2
	beq _022BD94C
	b _022BD954
_022BD93C:
	mov r0, #0
	ldmia sp!, {r3, pc}
_022BD944:
	mov r0, #1
	ldmia sp!, {r3, pc}
_022BD94C:
	mov r0, #2
	ldmia sp!, {r3, pc}
_022BD954:
	mov r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022BD918

	arm_func_start ov00_022BD95C
ov00_022BD95C: ; 0x022BD95C
	ldr ip, _022BD964 ; =ov00_022E1914
	bx ip
	.align 2, 0
_022BD964: .word ov00_022E1914
	arm_func_end ov00_022BD95C

	arm_func_start ov00_022BD968
ov00_022BD968: ; 0x022BD968
	ldr ip, _022BD978 ; =ov00_022EF210
	ldr r1, _022BD97C ; =ov00_02317F5C
	mov r0, #0
	bx ip
	.align 2, 0
_022BD978: .word ov00_022EF210
_022BD97C: .word ov00_02317F5C
	arm_func_end ov00_022BD968

	arm_func_start ov00_022BD980
ov00_022BD980: ; 0x022BD980
	stmdb sp!, {r3, lr}
	bl ov00_022EF4D8
	ldr r0, _022BD998 ; =ov00_023187A0
	mov r1, #0
	strb r1, [r0, #1]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BD998: .word ov00_023187A0
	arm_func_end ov00_022BD980

	arm_func_start ov00_022BD99C
ov00_022BD99C: ; 0x022BD99C
	stmdb sp!, {r3, lr}
	ldr ip, [sp, #8]
	str ip, [sp]
	bl ov00_022EF7AC
	cmp r0, #3
	addls pc, pc, r0, lsl #2
	b _022BD9E0
_022BD9B8: ; jump table
	b _022BD9E0 ; case 0
	b _022BD9C8 ; case 1
	b _022BD9D0 ; case 2
	b _022BD9D8 ; case 3
_022BD9C8:
	mov r0, #1
	ldmia sp!, {r3, pc}
_022BD9D0:
	mov r0, #2
	ldmia sp!, {r3, pc}
_022BD9D8:
	mov r0, #3
	ldmia sp!, {r3, pc}
_022BD9E0:
	mov r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022BD99C

	arm_func_start ov00_022BD9E8
ov00_022BD9E8: ; 0x022BD9E8
	stmdb sp!, {r3, lr}
	bl ov00_022EF380
	cmp r0, #8
	addls pc, pc, r0, lsl #2
	b _022BDA60
_022BD9FC: ; jump table
	b _022BDA20 ; case 0
	b _022BDA28 ; case 1
	b _022BDA30 ; case 2
	b _022BDA38 ; case 3
	b _022BDA40 ; case 4
	b _022BDA48 ; case 5
	b _022BDA50 ; case 6
	b _022BDA58 ; case 7
	b _022BDA60 ; case 8
_022BDA20:
	mov r0, #0
	ldmia sp!, {r3, pc}
_022BDA28:
	mov r0, #1
	ldmia sp!, {r3, pc}
_022BDA30:
	mov r0, #2
	ldmia sp!, {r3, pc}
_022BDA38:
	mov r0, #3
	ldmia sp!, {r3, pc}
_022BDA40:
	mov r0, #4
	ldmia sp!, {r3, pc}
_022BDA48:
	mov r0, #5
	ldmia sp!, {r3, pc}
_022BDA50:
	mov r0, #6
	ldmia sp!, {r3, pc}
_022BDA58:
	mov r0, #7
	ldmia sp!, {r3, pc}
_022BDA60:
	mov r0, #8
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022BD9E8

	arm_func_start ov00_022BDA68
ov00_022BDA68: ; 0x022BDA68
	ldr ip, _022BDA70 ; =ov00_022EF548
	bx ip
	.align 2, 0
_022BDA70: .word ov00_022EF548
	arm_func_end ov00_022BDA68

	arm_func_start ov00_022BDA74
ov00_022BDA74: ; 0x022BDA74
	stmdb sp!, {r3, lr}
	ldr r0, _022BDA90 ; =ov00_023187A0
	ldrb r0, [r0, #1]
	cmp r0, #0
	ldmeqia sp!, {r3, pc}
	bl ov00_022EF4AC
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BDA90: .word ov00_023187A0
	arm_func_end ov00_022BDA74

	arm_func_start ov00_022BDA94
ov00_022BDA94: ; 0x022BDA94
	stmdb sp!, {r3, lr}
	ldr r0, _022BDABC ; =ov00_022BE06C
	ldr r1, _022BDAC0 ; =ov00_023187D0
	ldr r2, _022BDAC4 ; =ov00_023187D8
	bl ov00_022E1178
	ldr r0, _022BDAC8 ; =ov00_0231D420
	mov r1, #0
	str r1, [r0, #4]
	str r1, [r0, #8]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BDABC: .word ov00_022BE06C
_022BDAC0: .word ov00_023187D0
_022BDAC4: .word ov00_023187D8
_022BDAC8: .word ov00_0231D420
	arm_func_end ov00_022BDA94

	arm_func_start ov00_022BDACC
ov00_022BDACC: ; 0x022BDACC
	ldr r0, _022BDAD8 ; =ov00_0231D420
	ldr r0, [r0, #8]
	bx lr
	.align 2, 0
_022BDAD8: .word ov00_0231D420
	arm_func_end ov00_022BDACC

	arm_func_start ov00_022BDADC
ov00_022BDADC: ; 0x022BDADC
	stmdb sp!, {r3, lr}
	movs r2, r0
	ldreq r2, _022BDB00 ; =ov00_023187C4
	ldmia r2, {r0, r1, r2}
	bl ov00_022E12DC
	cmp r0, #0
	moveq r0, #0
	movne r0, #1
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BDB00: .word ov00_023187C4
	arm_func_end ov00_022BDADC

	arm_func_start ov00_022BDB04
ov00_022BDB04: ; 0x022BDB04
	stmdb sp!, {r3, lr}
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	bl ov00_022E1310
	cmp r0, #0
	ldrne r0, _022BDB34 ; =ov00_0231D420
	movne r1, #0
	strne r1, [r0, #8]
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BDB34: .word ov00_0231D420
	arm_func_end ov00_022BDB04

	arm_func_start ov00_022BDB38
ov00_022BDB38: ; 0x022BDB38
	stmdb sp!, {r3, lr}
	cmp r2, #0
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	bl ov00_022E1334
	cmp r0, #0
	ldrne r0, _022BDB68 ; =ov00_0231D420
	movne r1, #0
	strne r1, [r0, #8]
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BDB68: .word ov00_0231D420
	arm_func_end ov00_022BDB38

	arm_func_start ov00_022BDB6C
ov00_022BDB6C: ; 0x022BDB6C
	stmdb sp!, {r3, lr}
	cmp r0, #0
	cmpne r1, #0
	cmpne r2, #0
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	bl ov00_022E137C
	cmp r0, #0
	ldrne r0, _022BDBA4 ; =ov00_0231D420
	movne r1, #0
	strne r1, [r0, #8]
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BDBA4: .word ov00_0231D420
	arm_func_end ov00_022BDB6C

	arm_func_start ov00_022BDBA8
ov00_022BDBA8: ; 0x022BDBA8
	stmdb sp!, {r3, lr}
	ldr r0, _022BDBE0 ; =ov00_0231D420
	ldr r0, [r0, #8]
	cmp r0, #1
	beq _022BDBD8
	bl ov00_022E13B4
	cmp r0, #0
	ldrne r1, _022BDBE0 ; =ov00_0231D420
	movne r0, #1
	strne r0, [r1, #8]
	moveq r0, #0
	ldmia sp!, {r3, pc}
_022BDBD8:
	mov r0, #1
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BDBE0: .word ov00_0231D420
	arm_func_end ov00_022BDBA8

	arm_func_start ov00_022BDBE4
ov00_022BDBE4: ; 0x022BDBE4
	stmdb sp!, {r3, lr}
	ldr r0, _022BDC54 ; =ov00_0231D420
	ldr r1, [r0, #8]
	cmp r1, #1
	movne r0, #0
	ldmneia sp!, {r3, pc}
	ldr r0, [r0, #4]
	cmp r0, #0
	beq _022BDC1C
	cmp r0, #1
	beq _022BDC4C
	cmp r0, #2
	beq _022BDC44
	b _022BDC4C
_022BDC1C:
	ldr r0, _022BDC58 ; =ov00_022BE080
	bl ov00_022E1290
	cmp r0, #0
	beq _022BDC4C
	ldr r0, _022BDC54 ; =ov00_0231D420
	ldr r1, [r0, #4]
	cmp r1, #0
	moveq r1, #1
	streq r1, [r0, #4]
	b _022BDC4C
_022BDC44:
	mov r0, #1
	ldmia sp!, {r3, pc}
_022BDC4C:
	mov r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BDC54: .word ov00_0231D420
_022BDC58: .word ov00_022BE080
	arm_func_end ov00_022BDBE4

	arm_func_start ov00_022BDC5C
ov00_022BDC5C: ; 0x022BDC5C
	ldr ip, _022BDC68 ; =ov00_022E05C8
	mov r0, #2
	bx ip
	.align 2, 0
_022BDC68: .word ov00_022E05C8
	arm_func_end ov00_022BDC5C

	arm_func_start ov00_022BDC6C
ov00_022BDC6C: ; 0x022BDC6C
	stmdb sp!, {r3, lr}
	bl ov00_022E0BEC
	cmp r0, #3
	addls pc, pc, r0, lsl #2
	b _022BDCB0
_022BDC80: ; jump table
	b _022BDC90 ; case 0
	b _022BDC98 ; case 1
	b _022BDCA0 ; case 2
	b _022BDCA8 ; case 3
_022BDC90:
	mov r0, #0
	ldmia sp!, {r3, pc}
_022BDC98:
	mov r0, #1
	ldmia sp!, {r3, pc}
_022BDCA0:
	mov r0, #2
	ldmia sp!, {r3, pc}
_022BDCA8:
	mov r0, #3
	ldmia sp!, {r3, pc}
_022BDCB0:
	mvn r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022BDC6C

	arm_func_start ov00_022BDCB8
ov00_022BDCB8: ; 0x022BDCB8
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #4
	mov r4, r1
	add r1, sp, #0
	bl ov00_022E025C
	ldr r1, [sp]
	cmp r1, #7
	addls pc, pc, r1, lsl #2
	b _022BDD34
_022BDCDC: ; jump table
	b _022BDD34 ; case 0
	b _022BDCFC ; case 1
	b _022BDD04 ; case 2
	b _022BDD0C ; case 3
	b _022BDD14 ; case 4
	b _022BDD1C ; case 5
	b _022BDD24 ; case 6
	b _022BDD2C ; case 7
_022BDCFC:
	mov r1, #1
	b _022BDD38
_022BDD04:
	mov r1, #2
	b _022BDD38
_022BDD0C:
	mov r1, #3
	b _022BDD38
_022BDD14:
	mov r1, #4
	b _022BDD38
_022BDD1C:
	mov r1, #5
	b _022BDD38
_022BDD24:
	mov r1, #6
	b _022BDD38
_022BDD2C:
	mov r1, #7
	b _022BDD38
_022BDD34:
	mov r1, #0
_022BDD38:
	str r1, [r4]
	cmp r0, #0x11
	addls pc, pc, r0, lsl #2
	b _022BDE18
_022BDD48: ; jump table
	b _022BDE18 ; case 0
	b _022BDD90 ; case 1
	b _022BDD98 ; case 2
	b _022BDDA0 ; case 3
	b _022BDDA8 ; case 4
	b _022BDDB0 ; case 5
	b _022BDDB8 ; case 6
	b _022BDDC0 ; case 7
	b _022BDDC8 ; case 8
	b _022BDDD0 ; case 9
	b _022BDDD8 ; case 10
	b _022BDDE0 ; case 11
	b _022BDDE8 ; case 12
	b _022BDDF0 ; case 13
	b _022BDDF8 ; case 14
	b _022BDE00 ; case 15
	b _022BDE08 ; case 16
	b _022BDE10 ; case 17
_022BDD90:
	mov r0, #1
	b _022BDE1C
_022BDD98:
	mov r0, #2
	b _022BDE1C
_022BDDA0:
	mov r0, #3
	b _022BDE1C
_022BDDA8:
	mov r0, #4
	b _022BDE1C
_022BDDB0:
	mov r0, #5
	b _022BDE1C
_022BDDB8:
	mov r0, #6
	b _022BDE1C
_022BDDC0:
	mov r0, #7
	b _022BDE1C
_022BDDC8:
	mov r0, #8
	b _022BDE1C
_022BDDD0:
	mov r0, #9
	b _022BDE1C
_022BDDD8:
	mov r0, #0xa
	b _022BDE1C
_022BDDE0:
	mov r0, #0xb
	b _022BDE1C
_022BDDE8:
	mov r0, #0xc
	b _022BDE1C
_022BDDF0:
	mov r0, #0xd
	b _022BDE1C
_022BDDF8:
	mov r0, #0xe
	b _022BDE1C
_022BDE00:
	mov r0, #0xf
	b _022BDE1C
_022BDE08:
	mov r0, #0x10
	b _022BDE1C
_022BDE10:
	mov r0, #0x11
	b _022BDE1C
_022BDE18:
	mov r0, #0
_022BDE1C:
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
	arm_func_end ov00_022BDCB8

	arm_func_start ov00_022BDE24
ov00_022BDE24: ; 0x022BDE24
	ldr ip, _022BDE2C ; =ov00_022E0358
	bx ip
	.align 2, 0
_022BDE2C: .word ov00_022E0358
	arm_func_end ov00_022BDE24

	arm_func_start ov00_022BDE30
ov00_022BDE30: ; 0x022BDE30
	stmdb sp!, {r4, r5, r6, lr}
	ldr r0, _022BDF18 ; =ov00_023187A0
	add r2, r1, #0x1f
	ldr r5, [r0, #0x20]
	mov r6, r2, lsr #5
	mov r4, #0
	cmp r1, #0
	moveq r0, r4
	ldmeqia sp!, {r4, r5, r6, pc}
	bl EnableIrqFlag
	ldr r1, _022BDF18 ; =ov00_023187A0
	ldr r1, [r1, #0x18]
	b _022BDEE4
_022BDE64:
	ldr r2, [r5]
	cmp r2, #0
	bne _022BDED8
	ldr r2, [r5, #4]
	cmp r6, r2
	bhs _022BDEC8
	add r2, r5, r6, lsl #5
	mov r1, #0
	str r1, [r2, #0x20]
	ldr r1, [r5, #4]
	add r3, r2, #0x20
	sub r1, r1, r6
	sub r1, r1, #1
	stmib r3, {r1, r6}
	ldr r2, [r3, #4]
	ldr r1, _022BDF18 ; =ov00_023187A0
	add r3, r3, r2, lsl #5
	ldr r1, [r1, #0x18]
	add r3, r3, #0x20
	cmp r3, r1
	strlo r2, [r3, #8]
	mov r1, #1
	stmia r5, {r1, r6}
	add r4, r5, #0x20
	b _022BDEEC
_022BDEC8:
	moveq r1, #1
	streq r1, [r5]
	addeq r4, r5, #0x20
	beq _022BDEEC
_022BDED8:
	ldr r2, [r5, #4]
	add r2, r5, r2, lsl #5
	add r5, r2, #0x20
_022BDEE4:
	cmp r5, r1
	blo _022BDE64
_022BDEEC:
	bl SetIrqFlag
	ldr r0, _022BDF18 ; =ov00_023187A0
	add r1, r6, #1
	ldr r2, [r0, #0x14]
	add r2, r2, r1
	str r2, [r0, #0x14]
	ldr r1, [r0, #4]
	cmp r2, r1
	strgt r2, [r0, #4]
	mov r0, r4
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022BDF18: .word ov00_023187A0
	arm_func_end ov00_022BDE30

	arm_func_start ov00_022BDF1C
ov00_022BDF1C: ; 0x022BDF1C
	stmdb sp!, {r4, r5, r6, lr}
	mov r4, #0
	movs r6, r1
	mov r5, r4
	ldmeqia sp!, {r4, r5, r6, pc}
	bl EnableIrqFlag
	sub r1, r6, #0x20
	ldr r2, _022BE004 ; =ov00_023187A0
	ldr r3, [r1, #4]
	ldr ip, [r2, #0x14]
	add r3, r3, #1
	sub r3, ip, r3
	str r3, [r2, #0x14]
	mov r2, r4
	str r2, [r6, #-0x20]
	ldr r2, [r1, #8]
	ldr r3, [r1, #4]
	cmp r2, #0
	subge r2, r1, r2, lsl #5
	subge r5, r2, #0x20
	ldr r2, _022BE004 ; =ov00_023187A0
	add r3, r1, r3, lsl #5
	ldr r2, [r2, #0x18]
	add r3, r3, #0x20
	cmp r3, r2
	movlo r4, r3
	cmp r5, #0
	beq _022BDFBC
	ldr r2, [r5]
	cmp r2, #0
	bne _022BDFBC
	ldr r1, [r1, #4]
	ldr r2, [r5, #4]
	add r1, r1, #1
	add r1, r2, r1
	str r1, [r5, #4]
	cmp r4, #0
	ldrne r1, [r5, #4]
	strne r1, [r4, #8]
	mov r1, r5
_022BDFBC:
	cmp r4, #0
	beq _022BDFFC
	ldr r2, [r4]
	cmp r2, #0
	bne _022BDFFC
	ldr r2, [r4, #4]
	ldr r3, [r1, #4]
	add r2, r2, #1
	add r4, r3, r2
	ldr r2, _022BE004 ; =ov00_023187A0
	add r3, r1, r4, lsl #5
	str r4, [r1, #4]
	ldr r1, [r2, #0x18]
	add r2, r3, #0x20
	cmp r2, r1
	strlo r4, [r2, #8]
_022BDFFC:
	bl SetIrqFlag
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022BE004: .word ov00_023187A0
	arm_func_end ov00_022BDF1C

	arm_func_start ov00_022BE008
ov00_022BE008: ; 0x022BE008
	cmp r0, #0
	ldreq r0, _022BE01C ; =ov00_0231D420
	moveq r1, #1
	streqb r1, [r0, #1]
	bx lr
	.align 2, 0
_022BE01C: .word ov00_0231D420
	arm_func_end ov00_022BE008

	arm_func_start ov00_022BE020
ov00_022BE020: ; 0x022BE020
	cmp r0, #0
	bxne lr
	ldr r0, _022BE040 ; =ov00_0231D420
	mov r2, #1
	strb r2, [r0, #2]
	cmp r1, #0
	strneb r2, [r0]
	bx lr
	.align 2, 0
_022BE040: .word ov00_0231D420
	arm_func_end ov00_022BE020

	arm_func_start ov00_022BE044
ov00_022BE044: ; 0x022BE044
	ldr r0, _022BE054 ; =ov00_0231D420
	mov r1, #1
	strb r1, [r0]
	bx lr
	.align 2, 0
_022BE054: .word ov00_0231D420
	arm_func_end ov00_022BE044

	arm_func_start ov00_022BE058
ov00_022BE058: ; 0x022BE058
	ldr r0, _022BE068 ; =ov00_0231D420
	mov r1, #1
	strb r1, [r0]
	bx lr
	.align 2, 0
_022BE068: .word ov00_0231D420
	arm_func_end ov00_022BE058

	arm_func_start ov00_022BE06C
ov00_022BE06C: ; 0x022BE06C
	ldr r0, _022BE07C ; =ov00_0231D420
	mov r1, #1
	str r1, [r0, #8]
	bx lr
	.align 2, 0
_022BE07C: .word ov00_0231D420
	arm_func_end ov00_022BE06C

	arm_func_start ov00_022BE080
ov00_022BE080: ; 0x022BE080
	ldr r0, _022BE090 ; =ov00_0231D420
	mov r1, #2
	str r1, [r0, #4]
	bx lr
	.align 2, 0
_022BE090: .word ov00_0231D420
	arm_func_end ov00_022BE080

	arm_func_start ov00_022BE094
ov00_022BE094: ; 0x022BE094
	stmdb sp!, {r3, lr}
	ldr r0, _022BE0B0 ; =ov00_02317FA0
	bl InitMenu
	cmp r0, #0
	ldmeqia sp!, {r3, pc}
	bl ov01_0232F3F4
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BE0B0: .word ov00_02317FA0
	arm_func_end ov00_022BE094

	arm_func_start ov00_022BE0B4
ov00_022BE0B4: ; 0x022BE0B4
	ldr ip, _022BE0C0 ; =InitMenu
	ldr r0, _022BE0C4 ; =ov00_02317FB0
	bx ip
	.align 2, 0
_022BE0C0: .word InitMenu
_022BE0C4: .word ov00_02317FB0
	arm_func_end ov00_022BE0B4

	arm_func_start ov00_022BE0C8
ov00_022BE0C8: ; 0x022BE0C8
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x130
	mov sl, r0
	cmp sl, #3
	bne _022BE108
	bl sub_0204A1CC
	bl ov00_022BCA80
	mov r0, #1
	bl ov00_022BCC30
	bl ov00_022BD3F4
	bl ov00_022BD4EC
	bl ov00_022BD780
	mov r0, #1
	bl ov00_022BCBAC
	mov r0, #2
	b _022BE3B0
_022BE108:
	cmp sl, #4
	bne _022BE134
	bl sub_0204A1CC
	bl ov00_022BCA80
	mov r4, r0
	mov r0, #1
	bl ov00_022BCBAC
	cmp r4, #3
	beq _022BE184
	mov r0, #0x16
	b _022BE3B0
_022BE134:
	bl sub_0204A1CC
	bl ov00_022BCA80
	mov r0, #0
	bl ov00_022BCC30
	cmp r0, #0
	bne _022BE17C
	bl ov00_022BD3F4
	bl sub_0205B80C
	mov r0, #0
	bl sub_0205B77C
	mov r1, #0
	str r1, [r0, #0xc]
	str r1, [r0, #0x10]
	mov r0, r1
	bl sub_020590DC
	bl ov00_022BD4EC
	cmp sl, #0
	moveq sl, #5
_022BE17C:
	mov r0, #1
	bl ov00_022BCBAC
_022BE184:
	ldr r0, _022BE3B8 ; =ov00_0231E2A0
	mov r1, #1
	str r1, [r0, #4]
	mov r1, #0
	str r1, [r0]
	bl sub_02028E2C
	bl sub_02017A68
	mov r0, #2
	bl PlayBgmByIdVeneer
	bl sub_020519D0
	bl sub_0201DC90
	bl ov00_022BE4D8
	bl ov01_0232E768
	ldr r1, _022BE3BC ; =ov00_023187EC
	mov r2, #1
	ldr r0, _022BE3C0 ; =ov00_022BE3CC
	strb r2, [r1]
	bl sub_0200383C
	mov r6, #0
	ldr r7, _022BE3C4 ; =ov00_022BE4C8
	ldr r4, _022BE3B8 ; =ov00_0231E2A0
	mov fp, r6
	mov r5, r6
	mov r8, #3
	mov sb, #2
_022BE1E8:
	bl sub_020038E8
	ldr r0, [r4, #4]
	cmp r0, #0
	beq _022BE2AC
	cmp r0, #1
	streq sb, [r4, #4]
	beq _022BE304
	cmp r0, #2
	bne _022BE234
	bl SelectRandomBackground
	cmp sl, #1
	bne _022BE224
	mov r0, #0
	bl ov00_022BE57C
	b _022BE22C
_022BE224:
	mov r0, #0x1e
	bl ov00_022BE57C
_022BE22C:
	str r8, [r4, #4]
	b _022BE304
_022BE234:
	bl ov00_022BE680
	cmp r0, #0
	bne _022BE304
	bl ov00_022BE6AC
	cmp r0, #0
	bne _022BE304
	ldr r0, [r4, #4]
	cmp r0, #3
	bne _022BE320
	cmp sl, #4
	bne _022BE268
	bl ov01_0233AE64
	b _022BE2A4
_022BE268:
	cmp sl, #2
	bne _022BE278
	bl ov01_02337914
	b _022BE2A4
_022BE278:
	cmp sl, #5
	bne _022BE29C
#ifdef JAPAN
	ldr r0, _022BFB70 ; =0x000004D9
#else
	mov r0, #0x248
#endif
	mov r1, #0x100
	add r2, sp, #0x98
	str r7, [sp, #0x11c]
	str r6, [sp, #0x120]
	bl sub_02046804
	b _022BE2A4
_022BE29C:
	mov r0, #0
	bl ov01_023310B8
_022BE2A4:
	str r5, [r4, #4]
	b _022BE304
_022BE2AC:
	ldr r0, [r4]
	cmp r0, #0
	beq _022BE304
	cmp r0, #0x14
	beq _022BE320
	cmp r0, #8
	bne _022BE2E4
	str r7, [sp, #0x84]
	str fp, [sp, #0x88]
	mov r0, #0x100
	add r1, sp, #0
	str fp, [r4]
	bl sub_02049A40
	b _022BE304
_022BE2E4:
	mov r0, #0x1e
	bl sub_02017ACC
	mov r0, #0x1e
	bl ov00_022BE5C8
	mov r0, #0x1e
	bl ov00_022BE630
	mov r0, #4
	str r0, [r4, #4]
_022BE304:
	bl sub_02006E14
	bl ov01_0232EA30
	bl sub_020039E4
	bl ov01_0232EC30
	bl HandleMenus
	bl sub_02028848
	b _022BE1E8
_022BE320:
	mov r0, #0
	bl sub_0200383C
	bl ov01_0232E7E8
	bl sub_02034710
	bl ov01_0232E7C0
	bl ov00_022BE51C
	bl sub_0201DCD0
	bl sub_02051B44
	ldr r0, _022BE3B8 ; =ov00_0231E2A0
	ldr r0, [r0]
	cmp r0, #0x15
	bne _022BE398
	mov r0, #4
	bl UnloadOverlay
	mov r0, #5
	bl LoadOverlay
	bl sub_020184B4
	bl sub_020024B0
	bl ov02_02329520
	ldr r2, _022BE3C8 ; =0x04000208
	mov r0, #1
	ldrh r1, [r2]
	strh r0, [r2]
	bl sub_020024C0
	bl sub_020184C0
	mov r0, #3
	bl sub_02002448
	mov r0, #3
	bl sub_02002448
	b _022BE3A8
_022BE398:
	cmp r0, #3
	bne _022BE3A8
	mov r0, #5
	bl sub_02002448
_022BE3A8:
	ldr r0, _022BE3B8 ; =ov00_0231E2A0
	ldr r0, [r0]
_022BE3B0:
	add sp, sp, #0x130
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022BE3B8: .word ov00_0231E2A0
_022BE3BC: .word ov00_023187EC
_022BE3C0: .word ov00_022BE3CC
_022BE3C4: .word ov00_022BE4C8
#ifdef JAPAN
_022BFB70: .word 0x000004D9
#endif
_022BE3C8: .word 0x04000208
	arm_func_end ov00_022BE0C8

	arm_func_start ov00_022BE3CC
ov00_022BE3CC: ; 0x022BE3CC
	stmdb sp!, {r4, lr}
	bl sub_0201BF64
	bl sub_02028E40
	bl sub_020038D8
	cmp r0, #0
	beq _022BE3EC
	bl ov00_022BE6D0
	bl sub_02003990
_022BE3EC:
	bl ov01_0232BE98
	bl ov01_0233103C
	bl ov01_0232ED5C
	bl ov00_022BE774
	bl ov01_0232C244
	bl ov01_0232C4D8
	bl sub_0201DD48
	bl sub_0201F464
	ldr r0, _022BE4A4 ; =ov00_023187EC
	ldrb r0, [r0]
	cmp r0, #0
	bne _022BE420
	bl sub_0201DDFC
_022BE420:
	bl sub_02008F84
	bl sub_0201BE28
	bl sub_02017A80
	bl sub_02003A40
	ldr r1, _022BE4A4 ; =ov00_023187EC
	mov r4, r0
	ldrb r0, [r1]
	cmp r0, #0
	beq _022BE464
	mov r0, #0
	bl sub_02008ED0
	mov r0, #0
	mov r1, #2
	bl sub_02008F64
	mov r0, #1
	mov r1, #2
	bl sub_02008F64
_022BE464:
	bl ov01_0232ED84
	mov r0, r4
	bl sub_02028A64
	bl sub_0201BE5C
	bl sub_0201BE84
	bl G3X_Reset
	bl sub_0201DE10
	bl sub_02028E88
	bl sub_02051C24
	bl sub_0201BF4C
	bl sub_02008F88
	ldr r1, _022BE4A4 ; =ov00_023187EC
	mov r2, #0
	mov r0, r4
	strb r2, [r1]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022BE4A4: .word ov00_023187EC
	arm_func_end ov00_022BE3CC

	arm_func_start ov00_022BE4A8
ov00_022BE4A8: ; 0x022BE4A8
	ldr r1, _022BE4C4 ; =ov00_0231E2A0
	ldr r2, [r1]
	cmp r2, #0
	streq r0, [r1]
	moveq r0, #1
	movne r0, #0
	bx lr
	.align 2, 0
_022BE4C4: .word ov00_0231E2A0
	arm_func_end ov00_022BE4A8

	arm_func_start ov00_022BE4C8
ov00_022BE4C8: ; 0x022BE4C8
	ldr ip, _022BE4D4 ; =ov01_023310B8
	mov r0, #0
	bx ip
	.align 2, 0
_022BE4D4: .word ov01_023310B8
	arm_func_end ov00_022BE4C8

	arm_func_start ov00_022BE4D8
ov00_022BE4D8: ; 0x022BE4D8
	stmdb sp!, {r3, lr}
	ldr r0, _022BE514 ; =ov00_0231E2FC
	mov r1, #1
	bl sub_0200B894
	ldr r0, _022BE518 ; =ov00_0231E2B8
	mov r1, #1
	bl sub_0200B894
	bl ov00_022BE53C
	ldr r0, _022BE518 ; =ov00_0231E2B8
	mov r1, #1
	bl sub_0200B8D4
	ldr r0, _022BE518 ; =ov00_0231E2B8
	ldrsh r0, [r0, #0x14]
	bl ov00_022BE868
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BE514: .word ov00_0231E2FC
_022BE518: .word ov00_0231E2B8
	arm_func_end ov00_022BE4D8

	arm_func_start ov00_022BE51C
ov00_022BE51C: ; 0x022BE51C
	stmdb sp!, {r3, lr}
	ldr r0, _022BE534 ; =ov00_0231E2FC
	bl sub_0200B8B8
	ldr r0, _022BE538 ; =ov00_0231E2B8
	bl sub_0200B8B8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BE534: .word ov00_0231E2FC
_022BE538: .word ov00_0231E2B8
	arm_func_end ov00_022BE51C

	arm_func_start ov00_022BE53C
ov00_022BE53C: ; 0x022BE53C
	stmdb sp!, {r3, lr}
	ldr r2, _022BE574 ; =ov00_0231E2A8
	mov r1, #0
	strb r1, [r2]
	str r1, [r2, #0xc]
	ldr r0, _022BE578 ; =ov00_0231E2FC
	str r1, [r2, #8]
	mov r1, #1
	strb r1, [r2, #1]
	bl sub_0200B8D4
	ldr r0, _022BE578 ; =ov00_0231E2FC
	ldrsh r0, [r0, #0x14]
	bl ov00_022BE868
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BE574: .word ov00_0231E2A8
_022BE578: .word ov00_0231E2FC
	arm_func_end ov00_022BE53C

	arm_func_start ov00_022BE57C
ov00_022BE57C: ; 0x022BE57C
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #2
	bl sub_02002878
	cmp r0, #0
	ldreq r0, _022BE5C0 ; =ov00_0231E2A8
	moveq r1, #1
	streq r1, [r0, #8]
	streq r4, [r0, #4]
	beq _022BE5B8
	ldr r0, _022BE5C4 ; =ov00_0231E2FC
	mov r1, r4
	bl sub_0200BB60
	ldr r0, _022BE5C0 ; =ov00_0231E2A8
	mov r1, #1
_022BE5B8:
	strb r1, [r0, #1]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022BE5C0: .word ov00_0231E2A8
_022BE5C4: .word ov00_0231E2FC
	arm_func_end ov00_022BE57C

	arm_func_start ov00_022BE5C8
ov00_022BE5C8: ; 0x022BE5C8
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #2
	bl sub_02002878
	cmp r0, #0
	ldreq r0, _022BE610 ; =ov00_0231E2A8
	moveq r1, #2
	streq r1, [r0, #8]
	streq r4, [r0, #4]
	beq _022BE604
	ldr r0, _022BE614 ; =ov00_0231E2FC
	mov r2, r4
	mov r1, #1
	bl sub_0200BB74
	ldr r0, _022BE610 ; =ov00_0231E2A8
_022BE604:
	mov r1, #1
	strb r1, [r0, #1]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022BE610: .word ov00_0231E2A8
_022BE614: .word ov00_0231E2FC
	arm_func_end ov00_022BE5C8

	arm_func_start ov00_022BE618
ov00_022BE618: ; 0x022BE618
	ldr ip, _022BE628 ; =sub_0200BB60
	mov r1, r0
	ldr r0, _022BE62C ; =ov00_0231E2B8
	bx ip
	.align 2, 0
_022BE628: .word sub_0200BB60
_022BE62C: .word ov00_0231E2B8
	arm_func_end ov00_022BE618

	arm_func_start ov00_022BE630
ov00_022BE630: ; 0x022BE630
	ldr ip, _022BE644 ; =sub_0200BB74
	mov r2, r0
	ldr r0, _022BE648 ; =ov00_0231E2B8
	mov r1, #1
	bx ip
	.align 2, 0
_022BE644: .word sub_0200BB74
_022BE648: .word ov00_0231E2B8
	arm_func_end ov00_022BE630

	arm_func_start ov00_022BE64C
ov00_022BE64C: ; 0x022BE64C
	stmdb sp!, {r3, lr}
	mov r2, r0
	ldr r0, _022BE67C ; =ov00_0231E2B8
	ldrsh r1, [r0, #0x14]
	cmp r1, #0
	ble _022BE670
	mov r1, #2
	bl sub_0200BB74
	ldmia sp!, {r3, pc}
_022BE670:
	mov r1, #1
	bl sub_0200BB74
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BE67C: .word ov00_0231E2B8
	arm_func_end ov00_022BE64C

	arm_func_start ov00_022BE680
ov00_022BE680: ; 0x022BE680
	stmdb sp!, {r3, lr}
	ldr r0, _022BE6A4 ; =ov00_0231E2A8
	ldrb r0, [r0]
	cmp r0, #0
	movne r0, #1
	ldmneia sp!, {r3, pc}
	ldr r0, _022BE6A8 ; =ov00_0231E2FC
	bl sub_0200BD14
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BE6A4: .word ov00_0231E2A8
_022BE6A8: .word ov00_0231E2FC
	arm_func_end ov00_022BE680

	arm_func_start ov00_022BE6AC
ov00_022BE6AC: ; 0x022BE6AC
	ldr ip, _022BE6B8 ; =sub_0200BD14
	ldr r0, _022BE6BC ; =ov00_0231E2B8
	bx ip
	.align 2, 0
_022BE6B8: .word sub_0200BD14
_022BE6BC: .word ov00_0231E2B8
	arm_func_end ov00_022BE6AC

	arm_func_start ov00_022BE6C0
ov00_022BE6C0: ; 0x022BE6C0
	ldr r0, _022BE6CC ; =ov00_0231E2B8
	ldrsh r0, [r0, #0x14]
	bx lr
	.align 2, 0
_022BE6CC: .word ov00_0231E2B8
	arm_func_end ov00_022BE6C0

	arm_func_start ov00_022BE6D0
ov00_022BE6D0: ; 0x022BE6D0
	stmdb sp!, {r3, lr}
	ldr r0, _022BE76C ; =ov00_0231E2A8
	ldr r1, [r0, #8]
	cmp r1, #0
	beq _022BE74C
	cmp r1, #1
	beq _022BE700
	cmp r1, #2
	beq _022BE710
	cmp r1, #3
	beq _022BE724
	b _022BE734
_022BE700:
	ldr r1, [r0, #4]
	ldr r0, _022BE770 ; =ov00_0231E2FC
	bl sub_0200BB60
	b _022BE734
_022BE710:
	ldr r2, [r0, #4]
	ldr r0, _022BE770 ; =ov00_0231E2FC
	mov r1, #1
	bl sub_0200BB74
	b _022BE734
_022BE724:
	ldr r2, [r0, #4]
	ldr r0, _022BE770 ; =ov00_0231E2FC
	mov r1, #2
	bl sub_0200BB74
_022BE734:
	ldr r0, _022BE76C ; =ov00_0231E2A8
	mov r1, #0
	str r1, [r0, #8]
	mov r1, #1
	strb r1, [r0, #1]
	ldmia sp!, {r3, pc}
_022BE74C:
	ldr r0, _022BE770 ; =ov00_0231E2FC
	ldr r0, [r0, #4]
	cmp r0, #0
	movne r1, #1
	ldr r0, _022BE76C ; =ov00_0231E2A8
	moveq r1, #0
	strb r1, [r0, #1]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BE76C: .word ov00_0231E2A8
_022BE770: .word ov00_0231E2FC
	arm_func_end ov00_022BE6D0

	arm_func_start ov00_022BE774
ov00_022BE774: ; 0x022BE774
	stmdb sp!, {r4, lr}
	ldr r0, _022BE85C ; =ov00_0231E2A8
	mov r4, #1
	ldrb r0, [r0]
	cmp r0, #0
	beq _022BE830
	ldr r0, _022BE860 ; =ov00_0231E2FC
	bl GetFadeStatus
	cmp r0, #0
	bne _022BE7B8
	ldr r1, _022BE85C ; =ov00_0231E2A8
	ldr r0, _022BE860 ; =ov00_0231E2FC
	ldr r2, [r1, #0xc]
	mov r1, r4
	bl sub_0200BB74
	mov r4, #0
	b _022BE7C8
_022BE7B8:
	ldr r0, _022BE860 ; =ov00_0231E2FC
	bl sub_0200BC54
	cmp r0, #0
	movne r4, #0
_022BE7C8:
	ldr r0, _022BE860 ; =ov00_0231E2FC
	ldrsh r0, [r0, #0x14]
	bl ov00_022BE868
	ldr r0, _022BE864 ; =ov00_0231E2B8
	bl GetFadeStatus
	cmp r0, #0
	bne _022BE800
	ldr r1, _022BE85C ; =ov00_0231E2A8
	ldr r0, _022BE864 ; =ov00_0231E2B8
	ldr r2, [r1, #0xc]
	mov r1, #1
	bl sub_0200BB74
	mov r4, #0
	b _022BE810
_022BE800:
	ldr r0, _022BE864 ; =ov00_0231E2B8
	bl sub_0200BC54
	cmp r0, #0
	movne r4, #0
_022BE810:
	ldr r0, _022BE864 ; =ov00_0231E2B8
	ldrsh r0, [r0, #0x14]
	bl ov00_022BE89C
	cmp r4, #0
	ldrne r0, _022BE85C ; =ov00_0231E2A8
	movne r1, #0
	strneb r1, [r0]
	ldmia sp!, {r4, pc}
_022BE830:
	ldr r0, _022BE860 ; =ov00_0231E2FC
	bl sub_0200BC54
	ldr r0, _022BE860 ; =ov00_0231E2FC
	ldrsh r0, [r0, #0x14]
	bl ov00_022BE868
	ldr r0, _022BE864 ; =ov00_0231E2B8
	bl sub_0200BC54
	ldr r0, _022BE864 ; =ov00_0231E2B8
	ldrsh r0, [r0, #0x14]
	bl ov00_022BE89C
	ldmia sp!, {r4, pc}
	.align 2, 0
_022BE85C: .word ov00_0231E2A8
_022BE860: .word ov00_0231E2FC
_022BE864: .word ov00_0231E2B8
	arm_func_end ov00_022BE774

	arm_func_start ov00_022BE868
ov00_022BE868: ; 0x022BE868
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #1
	bl Debug_GetDebugFlag
	cmp r0, #0
	mov r0, #0
	beq _022BE890
	mov r1, r0
	bl sub_02008F3C
	ldmia sp!, {r4, pc}
_022BE890:
	mov r1, r4
	bl sub_02008F3C
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022BE868

	arm_func_start ov00_022BE89C
ov00_022BE89C: ; 0x022BE89C
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #1
	bl Debug_GetDebugFlag
	cmp r0, #0
	mov r0, #1
	beq _022BE8C4
	mov r1, #0
	bl sub_02008F3C
	ldmia sp!, {r4, pc}
_022BE8C4:
	mov r1, r4
	bl sub_02008F3C
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022BE89C

	arm_func_start ov00_022BE8D0
ov00_022BE8D0: ; 0x022BE8D0
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	ldr r0, _022BE910 ; =ov00_023187F0
	mov r1, #0
	ldr r3, [r0]
	mov r2, #1
	str r3, [r0]
	str r2, [sp]
	ldr r0, _022BE914 ; =ov00_023187F4
	str r1, [sp, #4]
	ldr r0, [r0, r3, lsl #2]
	mov r2, r1
	mov r3, r1
	bl sub_02052060
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BE910: .word ov00_023187F0
_022BE914: .word ov00_023187F4
	arm_func_end ov00_022BE8D0

	arm_func_start SelectRandomBackground
SelectRandomBackground: ; 0x022BE918
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	mov r0, #7
	bl RandInt
	mov r1, #0
	ldr r2, _022BE95C ; =ov00_023187F0
	mov r3, #1
	str r0, [r2]
	str r3, [sp]
	ldr r2, _022BE960 ; =ov00_023187F4
	str r1, [sp, #4]
	ldr r0, [r2, r0, lsl #2]
	mov r2, r1
	mov r3, r1
	bl sub_02052060
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BE95C: .word ov00_023187F0
_022BE960: .word ov00_023187F4
	arm_func_end SelectRandomBackground

	arm_func_start ov00_022BE964
ov00_022BE964: ; 0x022BE964
	stmdb sp!, {r3, lr}
	mov r2, #0xf00
	bl ov00_022BE990
	cmp r0, #0
	ldmneia sp!, {r3, pc}
	ldr r1, _022BE98C ; =ov00_0231E340
	mov r2, #0
	ldr r1, [r1, #4]
	strh r2, [r1, #0x16]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BE98C: .word ov00_0231E340
	arm_func_end ov00_022BE964

	arm_func_start ov00_022BE990
ov00_022BE990: ; 0x022BE990
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	mov r6, r0
	mov r4, r1
	mov r7, r2
	bl EnableIrqFlag
	ldr r1, _022BEB60 ; =ov00_0231E340
	mov r5, r0
	ldrh r1, [r1]
	cmp r1, #0
	beq _022BE9C4
	bl SetIrqFlag
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022BE9C4:
	cmp r6, #0
	bne _022BE9D8
	bl SetIrqFlag
	mov r0, #6
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022BE9D8:
	cmp r4, #3
	bls _022BE9EC
	bl SetIrqFlag
	mov r0, #6
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022BE9EC:
	tst r6, #0x1f
	beq _022BEA00
	bl SetIrqFlag
	mov r0, #6
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022BEA00:
	bl PXI_Init
	mov r0, #0xa
	mov r1, #1
	bl PXI_IsCallbackReady
	cmp r0, #0
	bne _022BEA28
	mov r0, r5
	bl SetIrqFlag
	mov r0, #4
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022BEA28:
	mov r0, r6
	mov r1, r7
	bl DC_InvalidateRange
	mov r0, r4
	mov r1, r6
	mov r3, r7
	mov r2, #0
	bl sub_0207BC4C
	ldr r0, _022BEB60 ; =ov00_0231E340
	add r1, r6, #0x200
	str r6, [r0, #4]
	str r1, [r6]
	ldr r2, [r0, #4]
	ldr r1, [r2]
	add r1, r1, #0x300
	str r1, [r2, #4]
	ldr r2, [r0, #4]
	ldr r1, [r2, #4]
	add r1, r1, #0x800
	str r1, [r2, #0xc]
	ldr r1, [r0, #4]
	ldr r0, [r1, #0xc]
	add r0, r0, #0x100
	str r0, [r1, #0x10]
	bl ov00_022BF224
	ldr r1, _022BEB60 ; =ov00_0231E340
	mov r3, #0
	ldr r0, [r1, #4]
	mov r2, r3
	strh r4, [r0, #0x14]
	ldr r0, [r1, #4]
	str r3, [r0, #0x14c]
	ldr r0, [r1, #4]
	add r0, r0, #0x100
	strh r3, [r0, #0x50]
	b _022BEAD4
_022BEAB8:
	ldr r0, [r1, #4]
	add r0, r0, r3, lsl #2
	str r2, [r0, #0xcc]
	ldr r0, [r1, #4]
	add r0, r0, r3, lsl #2
	str r2, [r0, #0x10c]
	add r3, r3, #1
_022BEAD4:
	cmp r3, #0x10
	blt _022BEAB8
	ldr r0, _022BEB64 ; =ov00_0231E348
	ldr r1, _022BEB68 ; =ov00_0231E368
	mov r2, #0xa
	bl sub_02079DB8
	mov r6, #0
	mov r4, #0x8000
	ldr sl, _022BEB6C ; =ov00_0231E3E0
	mov sb, #2
	ldr r8, _022BEB64 ; =ov00_0231E348
	mov r7, #1
	b _022BEB30
_022BEB08:
	mov r2, r6, lsl #8
	mov r1, sb
	add r0, sl, r6, lsl #8
	strh r4, [sl, r2]
	bl sub_0207A2C0
	mov r0, r8
	mov r2, r7
	add r1, sl, r6, lsl #8
	bl sub_02079DE0
	add r6, r6, #1
_022BEB30:
	cmp r6, #0xa
	blt _022BEB08
	ldr r1, _022BEB70 ; =ov00_022BEE78
	mov r0, #0xa
	bl PXI_SetFifoRecvCallback
	ldr r1, _022BEB60 ; =ov00_0231E340
	mov r2, #1
	mov r0, r5
	strh r2, [r1]
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022BEB60: .word ov00_0231E340
_022BEB64: .word ov00_0231E348
_022BEB68: .word ov00_0231E368
_022BEB6C: .word ov00_0231E3E0
_022BEB70: .word ov00_022BEE78
	arm_func_end ov00_022BE990

	arm_func_start ov00_022BEB74
ov00_022BEB74: ; 0x022BEB74
	stmdb sp!, {r4, lr}
	bl EnableIrqFlag
	mov r4, r0
	bl ov00_022BED80
	cmp r0, #0
	beq _022BEB9C
	mov r0, r4
	bl SetIrqFlag
	mov r0, #3
	ldmia sp!, {r4, pc}
_022BEB9C:
	mov r0, #1
	mov r1, #0
	bl ov00_022BEDE4
	cmp r0, #0
	ldmneia sp!, {r4, pc}
	bl ov00_022BF224
	mov r0, #0xa
	mov r1, #0
	bl PXI_SetFifoRecvCallback
	ldr r1, _022BEBE0 ; =ov00_0231E340
	mov r2, #0
	str r2, [r1, #4]
	mov r0, r4
	strh r2, [r1]
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r4, pc}
	.align 2, 0
_022BEBE0: .word ov00_0231E340
	arm_func_end ov00_022BEB74

	arm_func_start ov00_022BEBE4
ov00_022BEBE4: ; 0x022BEBE4
	ldr r2, _022BEBF8 ; =ov00_0231E340
	ldr r2, [r2, #4]
	add r0, r2, r0, lsl #2
	str r1, [r0, #0x18]
	bx lr
	.align 2, 0
_022BEBF8: .word ov00_0231E340
	arm_func_end ov00_022BEBE4

	arm_func_start ov00_022BEBFC
ov00_022BEBFC: ; 0x022BEBFC
	stmdb sp!, {r3, lr}
	ldr r0, _022BEC50 ; =ov00_0231E348
	add r1, sp, #0
	mov r2, #0
	bl sub_02079E74
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	ldr r0, [sp]
	mov r1, #2
	bl DC_InvalidateRange
	ldr r1, [sp]
	ldrh r0, [r1]
	tst r0, #0x8000
	movne r0, r1
	ldmneia sp!, {r3, pc}
	ldr r0, _022BEC50 ; =ov00_0231E348
	mov r2, #1
	bl sub_02079F18
	mov r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BEC50: .word ov00_0231E348
	arm_func_end ov00_022BEBFC

	arm_func_start ov00_022BEC54
ov00_022BEC54: ; 0x022BEC54
	stmdb sp!, {r0, r1, r2, r3}
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	bl ov00_022BEBFC
	movs r4, r0
	moveq r0, #8
	ldmeqia sp!, {r3, r4, r5, lr}
	addeq sp, sp, #0x10
	bxeq lr
	strh r5, [r4]
	ldrh r5, [sp, #0x14]
	add r0, sp, #0x14
	bic r0, r0, #3
	mov r3, #0
	cmp r5, #0
	add r2, r0, #4
	ble _022BECB4
_022BEC98:
	add r2, r2, #4
	ldr r1, [r2, #-4]
	add r0, r4, r3, lsl #2
	add r3, r3, #1
	str r1, [r0, #4]
	cmp r3, r5
	blt _022BEC98
_022BECB4:
	mov r0, r4
	mov r1, #0x100
	bl sub_0207A2C0
	mov r1, r4
	mov r0, #0xa
	mov r2, #0
	bl PXI_SendWordByFifo
	mov r5, r0
	ldr r0, _022BECFC ; =ov00_0231E348
	mov r1, r4
	mov r2, #1
	bl sub_02079DE0
	cmp r5, #0
	movlt r0, #8
	movge r0, #2
	ldmia sp!, {r3, r4, r5, lr}
	add sp, sp, #0x10
	bx lr
	.align 2, 0
_022BECFC: .word ov00_0231E348
	arm_func_end ov00_022BEC54

	arm_func_start ov00_022BED00
ov00_022BED00: ; 0x022BED00
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r4, r1
	bl ov00_022BEBFC
	movs r5, r0
	moveq r0, #8
	ldmeqia sp!, {r4, r5, r6, pc}
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl MemcpyFast
	mov r0, r5
	mov r1, r4
	bl sub_0207A2C0
	mov r1, r5
	mov r0, #0xa
	mov r2, #0
	bl PXI_SendWordByFifo
	mov r4, r0
	ldr r0, _022BED6C ; =ov00_0231E348
	mov r1, r5
	mov r2, #1
	bl sub_02079DE0
	cmp r4, #0
	movlt r0, #8
	movge r0, #2
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022BED6C: .word ov00_0231E348
	arm_func_end ov00_022BED00

	arm_func_start ov00_022BED70
ov00_022BED70: ; 0x022BED70
	ldr r0, _022BED7C ; =ov00_0231E340
	ldr r0, [r0, #4]
	bx lr
	.align 2, 0
_022BED7C: .word ov00_0231E340
	arm_func_end ov00_022BED70

	arm_func_start ov00_022BED80
ov00_022BED80: ; 0x022BED80
	ldr r0, _022BED98 ; =ov00_0231E340
	ldrh r0, [r0]
	cmp r0, #0
	movne r0, #0
	moveq r0, #3
	bx lr
	.align 2, 0
_022BED98: .word ov00_0231E340
	arm_func_end ov00_022BED80

	arm_func_start ov00_022BED9C
ov00_022BED9C: ; 0x022BED9C
	stmdb sp!, {r3, lr}
	bl ov00_022BED80
	cmp r0, #0
	ldmneia sp!, {r3, pc}
	ldr r0, _022BEDE0 ; =ov00_0231E340
	mov r1, #2
	ldr r0, [r0, #4]
	ldr r0, [r0, #4]
	bl DC_InvalidateRange
	ldr r0, _022BEDE0 ; =ov00_0231E340
	ldr r0, [r0, #4]
	ldr r0, [r0, #4]
	ldrh r0, [r0]
	cmp r0, #1
	movls r0, #3
	movhi r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BEDE0: .word ov00_0231E340
	arm_func_end ov00_022BED9C

	arm_func_start ov00_022BEDE4
ov00_022BEDE4: ; 0x022BEDE4
	stmdb sp!, {r0, r1, r2, r3}
	stmdb sp!, {r3, lr}
	bl ov00_022BED80
	cmp r0, #0
	ldmneia sp!, {r3, lr}
	addne sp, sp, #0x10
	bxne lr
	ldr r0, _022BEE74 ; =ov00_0231E340
	mov r1, #2
	ldr r0, [r0, #4]
	ldr r0, [r0, #4]
	bl DC_InvalidateRange
	ldr r0, _022BEE74 ; =ov00_0231E340
	ldr r3, [sp, #8]
	ldr r0, [r0, #4]
	add r1, sp, #8
	ldr r2, [r0, #4]
	bic r0, r1, #3
	add ip, r0, #4
	ldrh lr, [r2]
	cmp r3, #0
	mov r0, #3
	ldmeqia sp!, {r3, lr}
	addeq sp, sp, #0x10
	bxeq lr
	mov r1, #0
_022BEE4C:
	add ip, ip, #4
	ldr r2, [ip, #-4]
	cmp r2, lr
	moveq r0, r1
	subs r3, r3, #1
	str r3, [sp, #8]
	bne _022BEE4C
	ldmia sp!, {r3, lr}
	add sp, sp, #0x10
	bx lr
	.align 2, 0
_022BEE74: .word ov00_0231E340
	arm_func_end ov00_022BEDE4

	arm_func_start ov00_022BEE78
ov00_022BEE78: ; 0x022BEE78
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #8
	ldr r0, _022BF210 ; =ov00_0231E340
	cmp r2, #0
	ldr r4, [r0, #4]
	mov sl, r1
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r4, #0x10]
	mov r1, #0x100
	bl DC_InvalidateRange
	ldrh r0, [r4, #0x16]
	cmp r0, #0
	bne _022BEEBC
	ldr r0, [r4, #4]
	mov r1, #0x800
	bl DC_InvalidateRange
_022BEEBC:
	ldr r0, [r4, #0x10]
	cmp sl, r0
	beq _022BEED4
	mov r0, sl
	mov r1, #0x100
	bl DC_InvalidateRange
_022BEED4:
	ldrh r0, [sl]
	cmp r0, #0x2c
	blo _022BEF8C
	cmp r0, #0x80
	bne _022BEF10
	ldrh r0, [sl, #2]
	cmp r0, #0x13
	bne _022BEEF8
	bl WaitForever2
_022BEEF8:
	ldr r1, [r4, #0xc8]
	cmp r1, #0
	beq _022BF1D0
	mov r0, sl
	blx r1
	b _022BF1D0
_022BEF10:
	cmp r0, #0x82
	bne _022BEF64
	ldrh r0, [sl, #6]
	add r1, r4, r0, lsl #2
	ldr r0, [r1, #0xcc]
	cmp r0, #0
	beq _022BF1D0
	ldr r0, [r1, #0x10c]
	str r0, [sl, #0x1c]
	ldr r0, [r4, #0x14c]
	strh r0, [sl, #0x22]
	ldr r1, [r4, #4]
	ldr r0, [sl, #8]
	ldrh r1, [r1, #0x72]
	bl DC_InvalidateRange
	ldrh r1, [sl, #6]
	mov r0, sl
	add r1, r4, r1, lsl #2
	ldr r1, [r1, #0xcc]
	blx r1
	b _022BF1D0
_022BEF64:
	cmp r0, #0x81
	bne _022BF1D0
	mov r0, #0xf
	strh r0, [sl]
	ldr r1, [sl, #0x1c]
	cmp r1, #0
	beq _022BF1D0
	mov r0, sl
	blx r1
	b _022BF1D0
_022BEF8C:
	cmp r0, #0xe
	bne _022BEFCC
	ldrh r0, [sl, #4]
	add r0, r0, #0xf5
	add r0, r0, #0xff00
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	cmp r0, #1
	bhi _022BEFCC
	ldrh r0, [sl, #2]
	cmp r0, #0
	bne _022BEFCC
	ldr r1, [r4, #4]
	ldr r0, [sl, #8]
	ldrh r1, [r1, #0x72]
	bl DC_InvalidateRange
_022BEFCC:
	ldrh r1, [sl]
	cmp r1, #2
	ldreqh r0, [sl, #2]
	cmpeq r0, #0
	add r0, r4, r1, lsl #2
	bne _022BF008
	ldr r4, [r0, #0x18]
	bl ov00_022BEB74
	cmp r4, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r0, sl
	blx r4
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022BF008:
	ldr r1, [r0, #0x18]
	cmp r1, #0
	beq _022BF030
	mov r0, sl
	blx r1
	ldr r0, _022BF210 ; =ov00_0231E340
	ldrh r0, [r0]
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022BF030:
	ldrh r0, [sl]
	cmp r0, #8
	cmpne r0, #0xc
	bne _022BF1D0
	cmp r0, #8
	bne _022BF074
	add r0, sl, #0xa
	str r0, [sp]
	ldrh r5, [sl, #8]
	ldrh r6, [sl, #0x10]
	ldrh r0, [sl, #0x12]
	add fp, sl, #0x14
	mov r7, #0
	str r0, [sp, #4]
	ldrh r8, [sl, #0x2c]
	ldrh sb, [sl, #0x2e]
	b _022BF0A4
_022BF074:
	cmp r0, #0xc
	bne _022BF0A4
	ldrh r5, [sl, #8]
	ldrh r7, [sl, #0xa]
	ldrh r0, [sl, #0xc]
	mov r6, #0
	mov fp, r6
	str r0, [sp, #4]
	add r0, sl, #0x10
	ldrh r8, [sl, #0x16]
	ldrh sb, [sl, #0x18]
	str r0, [sp]
_022BF0A4:
	cmp r5, #7
	cmpne r5, #9
	cmpne r5, #0x1a
	bne _022BF1D0
	cmp r5, #7
	ldreq r1, [r4, #0x14c]
	mov r0, #1
	orreq r0, r1, r0, lsl r6
	mvnne r0, r0, lsl r6
	ldrne r1, [r4, #0x14c]
	add r3, r4, #0x100
	andne r0, r1, r0
	str r0, [r4, #0x14c]
	ldr r0, _022BF214 ; =ov00_0231E390
	mov r1, #0
	mov r2, #0x44
	strh r7, [r3, #0x50]
	bl MemsetFast
	ldr ip, _022BF210 ; =ov00_0231E340
	mov r1, #0x82
	strh r1, [ip, #0x50]
	mov r1, #0
	strh r1, [ip, #0x52]
	strh r5, [ip, #0x54]
	str r1, [ip, #0x58]
	str r1, [ip, #0x5c]
	strh r1, [ip, #0x60]
	strh r6, [ip, #0x62]
	strh r7, [ip, #0x70]
	ldr r2, [r4, #0x14c]
	ldr r1, _022BF218 ; =0x0000FFFF
	strh r2, [ip, #0x72]
	strh r1, [ip, #0x6a]
	ldr r3, [sp, #4]
	ldr r0, [sp]
	ldr r1, _022BF21C ; =ov00_0231E3A4
	mov r2, #6
	strh r3, [ip, #0x8c]
	bl MemcpyFast
	cmp fp, #0
	mov r2, #0x18
	beq _022BF15C
	ldr r1, _022BF220 ; =ov00_0231E3B4
	mov r0, fp
	bl ArrayCopy16
	b _022BF168
_022BF15C:
	ldr r1, _022BF220 ; =ov00_0231E3B4
	mov r0, #0
	bl ArrayFill16
_022BF168:
	cmp r7, #0
	moveq r1, r8
	movne r1, sb
	cmp r7, #0
	ldr r0, _022BF210 ; =ov00_0231E340
	ldr r7, _022BF210 ; =ov00_0231E340
	strh r1, [r0, #0x90]
	movne sb, r8
	ldr r5, _022BF214 ; =ov00_0231E390
	mov r6, #0
	strh sb, [r7, #0x92]
_022BF194:
	strh r6, [r7, #0x56]
	add r2, r4, r6, lsl #2
	ldr r0, [r2, #0xcc]
	cmp r0, #0
	beq _022BF1BC
	ldr r1, [r2, #0x10c]
	mov r0, r5
	str r1, [r7, #0x6c]
	ldr r1, [r2, #0xcc]
	blx r1
_022BF1BC:
	add r0, r6, #1
	mov r0, r0, lsl #0x10
	mov r6, r0, lsr #0x10
	cmp r6, #0x10
	blo _022BF194
_022BF1D0:
	ldr r0, [r4, #0x10]
	mov r1, #0x100
	bl DC_InvalidateRange
	bl ov00_022BF224
	ldr r0, [r4, #0x10]
	cmp sl, r0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldrh r2, [sl]
	mov r0, sl
	mov r1, #0x100
	orr r2, r2, #0x8000
	strh r2, [sl]
	bl sub_0207A2C0
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022BF210: .word ov00_0231E340
_022BF214: .word ov00_0231E390
_022BF218: .word 0x0000FFFF
_022BF21C: .word ov00_0231E3A4
_022BF220: .word ov00_0231E3B4
	arm_func_end ov00_022BEE78

	arm_func_start ov00_022BF224
ov00_022BF224: ; 0x022BF224
	ldr r1, _022BF23C ; =0x027FFF96
	ldrh r0, [r1]
	tst r0, #1
	bicne r0, r0, #1
	strneh r0, [r1]
	bx lr
	.align 2, 0
_022BF23C: .word 0x027FFF96
	arm_func_end ov00_022BF224

	arm_func_start ov00_022BF240
ov00_022BF240: ; 0x022BF240
	stmdb sp!, {r3, lr}
	bl ov00_022BED80
	cmp r0, #0
	movne r0, #0
	ldreq r0, _022BF260 ; =ov00_0231E340
	ldreq r0, [r0, #4]
	ldreq r0, [r0, #4]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BF260: .word ov00_0231E340
	arm_func_end ov00_022BF240

	arm_func_start ov00_022BF264
ov00_022BF264: ; 0x022BF264
	stmdb sp!, {r4, lr}
	bl EnableIrqFlag
	ldr r1, _022BF290 ; =ov00_0231E340
	ldr r1, [r1, #4]
	cmp r1, #0
	addne r1, r1, #0x100
	ldrneh r4, [r1, #0x50]
	moveq r4, #0
	bl SetIrqFlag
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022BF290: .word ov00_0231E340
	arm_func_end ov00_022BF264

	arm_func_start ov00_022BF294
ov00_022BF294: ; 0x022BF294
	stmdb sp!, {r4, lr}
	bl EnableIrqFlag
	ldr r1, _022BF2C0 ; =ov00_0231E340
	ldr r1, [r1, #4]
	cmp r1, #0
	ldrne r4, [r1, #0x14c]
	moveq r4, #0
	bl SetIrqFlag
	mov r0, r4, lsl #0x10
	mov r0, r0, lsr #0x10
	ldmia sp!, {r4, pc}
	.align 2, 0
_022BF2C0: .word ov00_0231E340
	arm_func_end ov00_022BF294

	arm_func_start ov00_022BF2C4
ov00_022BF2C4: ; 0x022BF2C4
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	bl EnableIrqFlag
	mov r5, r0
	bl ov00_022BED80
	movs r4, r0
	beq _022BF2F0
	mov r0, r5
	bl SetIrqFlag
	mov r0, r4
	ldmia sp!, {r4, r5, r6, pc}
_022BF2F0:
	bl ov00_022BED70
	str r6, [r0, #0xc8]
	mov r0, r5
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022BF2C4

	arm_func_start ov00_022BF308
ov00_022BF308: ; 0x022BF308
	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
	sub sp, sp, #0x44
	movs r5, r1
	mov r6, r0
	mov r4, r2
	beq _022BF370
	add r0, sp, #0
	mov r1, #0
	mov r2, #0x44
	bl MemsetFast
	mov r3, #0
	ldr r1, _022BF3DC ; =0x0000FFFF
	mov r7, #0x82
	mov r2, #0x19
	add r0, sp, #0x14
	strh r7, [sp]
	strh r3, [sp, #2]
	strh r2, [sp, #4]
	strh r6, [sp, #6]
	str r3, [sp, #8]
	str r3, [sp, #0xc]
	strh r3, [sp, #0x10]
	strh r1, [sp, #0x1a]
	str r4, [sp, #0x1c]
	strh r3, [sp, #0x12]
	bl sub_0207B9EC
_022BF370:
	bl EnableIrqFlag
	mov r8, r0
	bl ov00_022BED80
	movs r7, r0
	beq _022BF398
	mov r0, r8
	bl SetIrqFlag
	add sp, sp, #0x44
	mov r0, r7
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022BF398:
	bl ov00_022BED70
	add r0, r0, r6, lsl #2
	str r5, [r0, #0xcc]
	str r4, [r0, #0x10c]
	cmp r5, #0
	beq _022BF3C8
	bl ov00_022BF294
	strh r0, [sp, #0x22]
	bl ov00_022BF264
	strh r0, [sp, #0x20]
	add r0, sp, #0
	blx r5
_022BF3C8:
	mov r0, r8
	bl SetIrqFlag
	mov r0, #0
	add sp, sp, #0x44
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022BF3DC: .word 0x0000FFFF
	arm_func_end ov00_022BF308

	arm_func_start ov00_022BF3E0
ov00_022BF3E0: ; 0x022BF3E0
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	bl ov00_022BED70
	mov r4, r0
	bl ov00_022BED80
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	cmp r5, #0
	moveq r0, #6
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r0, [r4, #4]
	mov r1, #0x7d0
	bl DC_InvalidateRange
	ldr r0, [r4, #4]
	mov r1, r5
	mov r2, #0x7d0
	bl ArrayCopy32Fast
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022BF3E0

	arm_func_start ov00_022BF42C
ov00_022BF42C: ; 0x022BF42C
	stmdb sp!, {r4, lr}
	bl ov00_022BED70
	mov r4, r0
	mov r0, #2
	mov r1, #7
	mov r2, #8
	bl ov00_022BEDE4
	cmp r0, #0
	movne r0, #0
	ldmneia sp!, {r4, pc}
	ldr r0, [r4, #4]
	mov r1, #4
	add r0, r0, #0xc
	bl DC_InvalidateRange
	ldr r1, [r4, #4]
	ldr r0, [r1, #0xc]
	cmp r0, #1
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	add r0, r1, #0x3c
	mov r1, #4
	bl DC_InvalidateRange
	ldr r0, [r4, #4]
	ldrh r0, [r0, #0x3c]
	add r0, r0, #0x1f
	bic r0, r0, #0x1f
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022BF42C

	arm_func_start ov00_022BF498
ov00_022BF498: ; 0x022BF498
	stmdb sp!, {r3, r4, r5, lr}
	bl ov00_022BED70
	mov r4, r0
	mov r0, #2
	mov r1, #7
	mov r2, #8
	bl ov00_022BEDE4
	cmp r0, #0
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r0, [r4, #4]
	mov r1, #4
	add r0, r0, #0xc
	bl DC_InvalidateRange
	ldr r1, [r4, #4]
	ldr r0, [r1, #0xc]
	cmp r0, #1
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	add r0, r1, #0x188
	mov r1, #2
	bl DC_InvalidateRange
	ldr r1, [r4, #4]
	add r0, r1, #0x100
	ldrh r0, [r0, #0x88]
	cmp r0, #0
	moveq r5, #1
	add r0, r1, #0x3e
	mov r1, #2
	movne r5, #0
	bl DC_InvalidateRange
	ldr r0, [r4, #4]
	cmp r5, #1
	ldrh r5, [r0, #0x3e]
	addne r0, r5, #0x51
	bicne r0, r0, #0x1f
	movne r0, r0, lsl #1
	ldmneia sp!, {r3, r4, r5, pc}
	add r0, r0, #0xf8
	mov r1, #2
	bl DC_InvalidateRange
	ldr r0, [r4, #4]
	add r1, r5, #0xc
	ldrh r0, [r0, #0xf8]
	mul r0, r1, r0
	add r0, r0, #0x29
	bic r0, r0, #0x1f
	mov r0, r0, lsl #1
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022BF498

	arm_func_start ov00_022BF55C
ov00_022BF55C: ; 0x022BF55C
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #0x3c
	mov r5, r0
	mov r4, r1
	bl ov00_022BED70
	mov r6, r0
	bl ov00_022BED80
	cmp r0, #0
	addne sp, sp, #0x3c
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, r6, pc}
	cmp r4, #1
	blo _022BF598
	cmp r4, #0xf
	bls _022BF5A4
_022BF598:
	add sp, sp, #0x3c
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, pc}
_022BF5A4:
	ldr r0, [r6, #4]
	mov r1, #2
	add r0, r0, #0x82
	add r0, r0, #0x100
	bl DC_InvalidateRange
	ldr r0, [r6, #4]
	mov r1, #1
	add r0, r0, #0x100
	ldrh r0, [r0, #0x82]
	tst r0, r1, lsl r4
	addeq sp, sp, #0x3c
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	ldrh r0, [r5, #4]
	cmp r0, #0
	addeq sp, sp, #0x3c
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	add r0, r5, #0xa
	str r0, [sp]
	mov r3, #0
	add r2, sp, #0
_022BF5FC:
	ldr r0, [r2, r3, lsl #2]
	ldrh r1, [r0, #4]
	cmp r4, r1
	addeq sp, sp, #0x3c
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	add r3, r3, #1
	add r0, r2, r3, lsl #2
	ldrh r1, [r5, #6]
	ldr r0, [r0, #-4]
	add r0, r1, r0
	str r0, [r2, r3, lsl #2]
	ldrh r0, [r5, #4]
	cmp r3, r0
	blt _022BF5FC
	mov r0, #0
	add sp, sp, #0x3c
	ldmia sp!, {r3, r4, r5, r6, pc}
	arm_func_end ov00_022BF55C

	arm_func_start ov00_022BF640
ov00_022BF640: ; 0x022BF640
	stmdb sp!, {r3, lr}
	bl ov00_022BED80
	cmp r0, #0
	movne r0, #0x8000
	ldreq r0, _022BF65C ; =0x027FFCFA
	ldreqh r0, [r0]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BF65C: .word 0x027FFCFA
	arm_func_end ov00_022BF640

	arm_func_start ov00_022BF660
ov00_022BF660: ; 0x022BF660
	stmdb sp!, {r4, lr}
	bl ov00_022BED70
	mov r4, r0
	bl ov00_022BED80
	cmp r0, #0
	movne r0, #0
	ldmneia sp!, {r4, pc}
	ldr r0, [r4, #4]
	mov r1, #2
	bl DC_InvalidateRange
	ldr r1, [r4, #4]
	ldrh r0, [r1]
	cmp r0, #9
	beq _022BF6A8
	cmp r0, #0xa
	cmpne r0, #0xb
	beq _022BF6D0
	b _022BF6E8
_022BF6A8:
	add r0, r1, #0x82
	add r0, r0, #0x100
	mov r1, #2
	bl DC_InvalidateRange
	ldr r1, [r4, #4]
	add r0, r1, #0x100
	ldrh r0, [r0, #0x82]
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
_022BF6D0:
	add r0, r1, #0xbc
	mov r1, #2
	bl DC_InvalidateRange
	ldr r0, [r4, #4]
	ldrh r0, [r0, #0xbc]
	ldmia sp!, {r4, pc}
_022BF6E8:
	mov r0, #0
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022BF660

	arm_func_start ov00_022BF6F0
ov00_022BF6F0: ; 0x022BF6F0
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	add r0, sp, #0
	bl sub_0207B9EC
	mov r2, #0
	add r3, sp, #0
	mov r1, r2
_022BF70C:
	ldrb r0, [r3], #1
	add r2, r2, #1
	cmp r2, #6
	add r0, r1, r0
	mov r0, r0, lsl #0x10
	mov r1, r0, lsr #0x10
	blt _022BF70C
	ldr r0, _022BF778 ; =0x027FFC3C
	ldr ip, _022BF77C ; =0x66666667
	ldr r0, [r0]
	mov r3, #0x14
	add r0, r1, r0
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	rsb r0, r0, r0, lsl #3
	mov r0, r0, lsl #0x10
	mov r2, r0, lsr #0x10
	mov r1, r2, lsr #0x1f
	smull r2, lr, ip, r2
	add lr, r1, lr, asr #3
	smull r1, r2, r3, lr
	rsb lr, r1, r0, lsr #16
	add r0, lr, #0xc8
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BF778: .word 0x027FFC3C
_022BF77C: .word 0x66666667
	arm_func_end ov00_022BF6F0

	arm_func_start ov00_022BF780
ov00_022BF780: ; 0x022BF780
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	add r0, sp, #0
	bl sub_0207B9EC
	mov r1, #0
	add r3, sp, #0
	mov r2, r1
_022BF79C:
	ldrb r0, [r3], #1
	add r1, r1, #1
	cmp r1, #6
	add r0, r2, r0
	mov r0, r0, lsl #0x10
	mov r2, r0, lsr #0x10
	blt _022BF79C
	ldr r0, _022BF80C ; =0x027FFC3C
	mov r1, #0xd
	ldr r0, [r0]
	ldr r3, _022BF810 ; =0x66666667
	add r0, r2, r0
	mov r0, r0, lsl #0x10
	mov r2, r0, lsr #0x10
	mul r0, r2, r1
	mov r0, r0, lsl #0x10
	mov r2, r0, lsr #0x10
	mov r1, r2, lsr #0x1f
	smull r2, ip, r3, r2
	add ip, r1, ip, asr #2
	mov r3, #0xa
	smull r1, r2, r3, ip
	rsb ip, r1, r0, lsr #16
	add r0, ip, #0x1e
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022BF80C: .word 0x027FFC3C
_022BF810: .word 0x66666667
	arm_func_end ov00_022BF780

	arm_func_start ov00_022BF814
ov00_022BF814: ; 0x022BF814
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #0x84
	ldrh r2, [r1, #0x3c]
	mov lr, r0
	cmp r2, #0
	beq _022BF85C
	mov r0, #0
	add r5, sp, #0
	strb r0, [sp]
	mov r4, #8
_022BF83C:
	ldmia r5!, {r0, r1, r2, r3}
	stmia lr!, {r0, r1, r2, r3}
	subs r4, r4, #1
	bne _022BF83C
	ldr r0, [r5]
	add sp, sp, #0x84
	str r0, [lr]
	ldmia sp!, {r3, r4, r5, r6, pc}
_022BF85C:
	ldrh r0, [r1, #0x3e]
	strb r0, [sp]
	ands r0, r0, #0xff
	bne _022BF894
	add r5, sp, #0
	mov r4, #8
_022BF874:
	ldmia r5!, {r0, r1, r2, r3}
	stmia lr!, {r0, r1, r2, r3}
	subs r4, r4, #1
	bne _022BF874
	ldr r0, [r5]
	add sp, sp, #0x84
	str r0, [lr]
	ldmia sp!, {r3, r4, r5, r6, pc}
_022BF894:
	cmp r0, #0x10
	movhi r0, #0x10
	strhib r0, [sp]
	ldrh r2, [r1]
	ldrb r0, [sp]
	mov r3, #0
	mov r2, r2, lsl #1
	sub r4, r2, #0x40
	cmp r0, #0
	add r0, r1, #0x40
	mov r2, r3
	and r1, r4, #0xff
	ble _022BF944
	add ip, sp, #0
_022BF8CC:
	ldrb r5, [r0]
	add r6, ip, r2, lsl #3
	add r4, r0, #2
	strb r5, [r6, #4]
	ldrb r5, [r0, #1]
	strb r5, [r6, #5]
	str r4, [r6, #8]
	ldrb r4, [r6, #5]
	add r4, r4, #2
	and r5, r4, #0xff
	add r3, r3, r5
	and r3, r3, #0xff
	cmp r3, r1
	bls _022BF930
	mov r0, #0
	strb r0, [sp]
	mov r4, #8
_022BF910:
	ldmia ip!, {r0, r1, r2, r3}
	stmia lr!, {r0, r1, r2, r3}
	subs r4, r4, #1
	bne _022BF910
	ldr r0, [ip]
	add sp, sp, #0x84
	str r0, [lr]
	ldmia sp!, {r3, r4, r5, r6, pc}
_022BF930:
	ldrb r4, [sp]
	add r2, r2, #1
	add r0, r0, r5
	cmp r2, r4
	blt _022BF8CC
_022BF944:
	add r4, sp, #0
	mov ip, #8
_022BF94C:
	ldmia r4!, {r0, r1, r2, r3}
	stmia lr!, {r0, r1, r2, r3}
	subs ip, ip, #1
	bne _022BF94C
	ldr r0, [r4]
	str r0, [lr]
	add sp, sp, #0x84
	ldmia sp!, {r3, r4, r5, r6, pc}
	arm_func_end ov00_022BF814

	arm_func_start ov00_022BF96C
ov00_022BF96C: ; 0x022BF96C
	stmdb sp!, {lr}
	sub sp, sp, #0xc
	ldr r0, _022BF9DC ; =ov00_02318810
	ldr r0, [r0]
	cmp r0, #0x10000
	bne _022BF9B4
	bl sub_0208266C
	add r0, sp, #0
	bl sub_020827F4
	cmp r0, #0
	bne _022BF9B4
	ldr r2, [sp, #8]
	ldr r0, [sp, #4]
	ldr r1, _022BF9DC ; =ov00_02318810
	add r0, r2, r0, lsl #8
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	str r0, [r1]
_022BF9B4:
	ldr r1, _022BF9DC ; =ov00_02318810
	ldr r0, [r1]
	add r0, r0, #1
	mov r0, r0, lsl #0x10
	mov r2, r0, lsr #0x10
	mov r0, r2, lsl #0x10
	str r2, [r1]
	mov r0, r0, lsr #0x10
	add sp, sp, #0xc
	ldmia sp!, {pc}
	.align 2, 0
_022BF9DC: .word ov00_02318810
	arm_func_end ov00_022BF96C

	arm_func_start ov00_022BF9E0
ov00_022BF9E0: ; 0x022BF9E0
	ldr ip, _022BF9EC ; =ov00_022BF9F0
	mov r1, #0
	bx ip
	.align 2, 0
_022BF9EC: .word ov00_022BF9F0
	arm_func_end ov00_022BF9E0

	arm_func_start ov00_022BF9F0
ov00_022BF9F0: ; 0x022BF9F0
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #8
	mov r5, r0
	mov r4, r1
	mov r0, #1
	mov r1, #0
	bl ov00_022BEDE4
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, pc}
	mov r1, r5
	mov r0, #3
	bl ov00_022BEBE4
	bl ov00_022BED70
	mov r3, r0
	ldr r1, [r3, #0x10]
	mov r0, #3
	stmia sp, {r1, r4}
	mov r1, #4
	ldmia r3, {r2, r3}
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022BF9F0

	arm_func_start ov00_022BFA54
ov00_022BFA54: ; 0x022BFA54
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #1
	mov r1, r0
	bl ov00_022BEDE4
	cmp r0, #0
	ldmneia sp!, {r4, pc}
	mov r1, r4
	mov r0, #4
	bl ov00_022BEBE4
	mov r0, #4
	mov r1, #0
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022BFA54

	arm_func_start ov00_022BFA94
ov00_022BFA94: ; 0x022BFA94
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #1
	mov r1, r0
	bl ov00_022BEDE4
	cmp r0, #0
	ldmneia sp!, {r4, pc}
	mov r1, r4
	mov r0, #5
	bl ov00_022BEBE4
	mov r0, #5
	mov r1, #0
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022BFA94

	arm_func_start ov00_022BFAD4
ov00_022BFAD4: ; 0x022BFAD4
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #1
	mov r1, #2
	bl ov00_022BEDE4
	cmp r0, #0
	ldmneia sp!, {r4, pc}
	mov r1, r4
	mov r0, #6
	bl ov00_022BEBE4
	mov r0, #6
	mov r1, #0
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022BFAD4

	arm_func_start ov00_022BFB14
ov00_022BFB14: ; 0x022BFB14
	ldr ip, _022BFB20 ; =ov00_022BFB3C
	mov r3, #0
	bx ip
	.align 2, 0
_022BFB20: .word ov00_022BFB3C
	arm_func_end ov00_022BFB14

	arm_func_start ov00_022BFB24
ov00_022BFB24: ; 0x022BFB24
	ldr ip, _022BFB38 ; =ov00_022BFB3C
	cmp r3, #0
	mov r3, #1
	orreq r3, r3, #2
	bx ip
	.align 2, 0
_022BFB38: .word ov00_022BFB3C
	arm_func_end ov00_022BFB24

	arm_func_start ov00_022BFB3C
ov00_022BFB3C: ; 0x022BFB3C
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #8
	mov r5, r1
	mov r1, r2
	mov r4, r3
	bl ov00_022BE964
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, pc}
	mov r1, r5
	mov r0, #0
	bl ov00_022BEBE4
	bl ov00_022BED70
	mov r3, r0
	ldr r1, [r3, #0x10]
	mov r0, #0
	stmia sp, {r1, r4}
	mov r1, #4
	ldmia r3, {r2, r3}
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022BFB3C

	arm_func_start ov00_022BFB9C
ov00_022BFB9C: ; 0x022BFB9C
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022BED9C
	cmp r0, #0
	ldmneia sp!, {r4, pc}
	mov r1, r4
	mov r0, #1
	bl ov00_022BEBE4
	mov r0, #1
	mov r1, #0
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022BFB9C

	arm_func_start ov00_022BFBD4
ov00_022BFBD4: ; 0x022BFBD4
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #1
	mov r1, #2
	bl ov00_022BEDE4
	cmp r0, #0
	ldmneia sp!, {r4, pc}
	mov r1, r4
	mov r0, #2
	bl ov00_022BEBE4
	mov r0, #2
	mov r1, #0
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022BFBD4

	arm_func_start ov00_022BFC14
ov00_022BFC14: ; 0x022BFC14
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	mov r0, #1
	mov r1, #2
	bl ov00_022BEDE4
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	cmp r4, #0
	moveq r0, #6
	ldmeqia sp!, {r3, r4, r5, pc}
	ldrh r0, [r4, #4]
	cmp r0, #0
	beq _022BFC5C
	ldr r0, [r4]
	cmp r0, #0
	moveq r0, #6
	ldmeqia sp!, {r3, r4, r5, pc}
_022BFC5C:
	ldrh r1, [r4, #0x14]
	ldrh r0, [r4, #0x34]
	cmp r1, #0
	movne r2, #0x2a
	moveq r2, #0
	add r0, r0, r2
	cmp r0, #0x200
	bgt _022BFC98
	ldrh r0, [r4, #0x36]
	cmp r1, #0
	movne r1, #6
	moveq r1, #0
	add r0, r0, r1
	cmp r0, #0x200
	ble _022BFCA0
_022BFC98:
	mov r0, #6
	ldmia sp!, {r3, r4, r5, pc}
_022BFCA0:
	mov r0, r4
	bl ov00_022BFCF0
	mov r1, r5
	mov r0, #7
	bl ov00_022BEBE4
	mov r0, r4
	mov r1, #0x40
	bl sub_0207A2C0
	ldrh r1, [r4, #4]
	cmp r1, #0
	beq _022BFCD4
	ldr r0, [r4]
	bl sub_0207A2C0
_022BFCD4:
	mov r2, r4
	mov r0, #7
	mov r1, #1
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022BFC14

	arm_func_start ov00_022BFCF0
ov00_022BFCF0: ; 0x022BFCF0
	ldrh r1, [r0, #4]
	cmp r1, #0x70
	movhi r0, #0
	bxhi lr
	ldrh r1, [r0, #0x18]
	cmp r1, #0xa
	blo _022BFD14
	cmp r1, #0x3e8
	bls _022BFD1C
_022BFD14:
	mov r0, #0
	bx lr
_022BFD1C:
	ldrh r0, [r0, #0x32]
	cmp r0, #1
	blo _022BFD30
	cmp r0, #0xe
	bls _022BFD38
_022BFD30:
	mov r0, #0
	bx lr
_022BFD38:
	mov r0, #1
	bx lr
	arm_func_end ov00_022BFCF0

	arm_func_start ov00_022BFD40
ov00_022BFD40: ; 0x022BFD40
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	mov r0, #1
	mov r1, #2
	bl ov00_022BEDE4
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	bl ov00_022BED70
	add r1, r0, #0x100
	mov r2, #0
	strh r2, [r1, #0x50]
	str r2, [r0, #0x14c]
	mov r1, r5
	mov r0, #8
	bl ov00_022BEBE4
	mov r2, r4
	mov r0, #8
	mov r1, #1
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022BFD40

	arm_func_start ov00_022BFD9C
ov00_022BFD9C: ; 0x022BFD9C
	ldr ip, _022BFDA8 ; =ov00_022BFD40
	mov r1, #1
	bx ip
	.align 2, 0
_022BFDA8: .word ov00_022BFD40
	arm_func_end ov00_022BFD9C

	arm_func_start ov00_022BFDAC
ov00_022BFDAC: ; 0x022BFDAC
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #1
	mov r1, #7
	bl ov00_022BEDE4
	cmp r0, #0
	ldmneia sp!, {r4, pc}
	mov r1, r4
	mov r0, #9
	bl ov00_022BEBE4
	mov r0, #9
	mov r1, #0
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022BFDAC

	arm_func_start ov00_022BFDEC
ov00_022BFDEC: ; 0x022BFDEC
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0x10
	mov r5, r0
	mov r0, #3
	mov r4, r1
	mov r2, r0
	mov r1, #2
	mov r3, #5
	bl ov00_022BEDE4
	cmp r0, #0
	addne sp, sp, #0x10
	ldmneia sp!, {r3, r4, r5, pc}
	cmp r4, #0
	addeq sp, sp, #0x10
	moveq r0, #6
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r0, [r4]
	cmp r0, #0
	addeq sp, sp, #0x10
	moveq r0, #6
	ldmeqia sp!, {r3, r4, r5, pc}
	ldrh r0, [r4, #4]
	cmp r0, #1
	blo _022BFE54
	cmp r0, #0xe
	bls _022BFE60
_022BFE54:
	add sp, sp, #0x10
	mov r0, #6
	ldmia sp!, {r3, r4, r5, pc}
_022BFE60:
	mov r1, r5
	mov r0, #0xa
	bl ov00_022BEBE4
	mov r0, #0xa
	strh r0, [sp]
	ldrh r2, [r4, #4]
	add r0, sp, #0
	mov r1, #0x10
	strh r2, [sp, #2]
	ldr r2, [r4]
	str r2, [sp, #4]
	ldrh r2, [r4, #6]
	strh r2, [sp, #8]
	ldrb r2, [r4, #8]
	strb r2, [sp, #0xa]
	ldrb r2, [r4, #9]
	strb r2, [sp, #0xb]
	ldrb r2, [r4, #0xa]
	strb r2, [sp, #0xc]
	ldrb r2, [r4, #0xb]
	strb r2, [sp, #0xd]
	ldrb r2, [r4, #0xc]
	strb r2, [sp, #0xe]
	ldrb r2, [r4, #0xd]
	strb r2, [sp, #0xf]
	bl ov00_022BED00
	cmp r0, #0
	moveq r0, #2
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022BFDEC

	arm_func_start ov00_022BFED8
ov00_022BFED8: ; 0x022BFED8
	stmdb sp!, {r4, r5, lr}
	sub sp, sp, #0x3c
	mov r5, r0
	mov r0, #3
	mov r4, r1
	mov r2, r0
	mov r1, #2
	mov r3, #5
	bl ov00_022BEDE4
	cmp r0, #0
	addne sp, sp, #0x3c
	ldmneia sp!, {r4, r5, pc}
	cmp r4, #0
	addeq sp, sp, #0x3c
	moveq r0, #6
	ldmeqia sp!, {r4, r5, pc}
	ldr r0, [r4]
	cmp r0, #0
	addeq sp, sp, #0x3c
	moveq r0, #6
	ldmeqia sp!, {r4, r5, pc}
	ldrh r0, [r4, #4]
	cmp r0, #0x400
	addhi sp, sp, #0x3c
	movhi r0, #6
	ldmhiia sp!, {r4, r5, pc}
	ldrh r0, [r4, #0x12]
	cmp r0, #0x20
	addhi sp, sp, #0x3c
	movhi r0, #6
	ldmhiia sp!, {r4, r5, pc}
	ldrh r0, [r4, #0x10]
	cmp r0, #0
	cmpne r0, #1
	cmpne r0, #2
	cmpne r0, #3
	addne sp, sp, #0x3c
	movne r0, #6
	ldmneia sp!, {r4, r5, pc}
	add r0, r0, #0xfe
	add r0, r0, #0xff00
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	cmp r0, #1
	bhi _022BFFA0
	ldrh r0, [r4, #0x34]
	cmp r0, #0x20
	addhi sp, sp, #0x3c
	movhi r0, #6
	ldmhiia sp!, {r4, r5, pc}
_022BFFA0:
	mov r1, r5
	mov r0, #0x26
	bl ov00_022BEBE4
	mov r0, #0x26
	strh r0, [sp]
	ldrh r2, [r4, #6]
	add r1, sp, #0xc
	add r0, r4, #0xa
	strh r2, [sp, #2]
	ldr r3, [r4]
	mov r2, #6
	str r3, [sp, #4]
	ldrh r3, [r4, #4]
	strh r3, [sp, #8]
	ldrh r3, [r4, #8]
	strh r3, [sp, #0xa]
	bl MemcpyFast
	ldrh r2, [r4, #0x10]
	add r1, sp, #0x16
	add r0, r4, #0x14
	strh r2, [sp, #0x12]
	ldrh r3, [r4, #0x34]
	mov r2, #0x20
	strh r3, [sp, #0x36]
	ldrh r3, [r4, #0x12]
	strh r3, [sp, #0x14]
	bl MemcpyFast
	add r0, sp, #0
	mov r1, #0x3c
	bl ov00_022BED00
	cmp r0, #0
	moveq r0, #2
	add sp, sp, #0x3c
	ldmia sp!, {r4, r5, pc}
	arm_func_end ov00_022BFED8

	arm_func_start ov00_022C0028
ov00_022C0028: ; 0x022C0028
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #1
	mov r1, #5
	bl ov00_022BEDE4
	cmp r0, #0
	ldmneia sp!, {r4, pc}
	mov r1, r4
	mov r0, #0xb
	bl ov00_022BEBE4
	mov r0, #0xb
	mov r1, #0
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022C0028

	arm_func_start ov00_022C0068
ov00_022C0068: ; 0x022C0068
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x28
	mov r7, r0
	mov r6, r1
	mov r0, #1
	mov r1, #2
	mov r5, r2
	mov r4, r3
	bl ov00_022BEDE4
	cmp r0, #0
	addne sp, sp, #0x28
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r6, #0
	addeq sp, sp, #0x28
	moveq r0, #6
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldrh r1, [r6]
	mov r0, r6
	mov r1, r1, lsl #1
	bl sub_0207A2C0
	bl ov00_022BED70
	add r1, r0, #0x100
	mov r2, #0
	strh r2, [r1, #0x50]
	str r2, [r0, #0x14c]
	mov r1, r7
	mov r0, #0xc
	bl ov00_022BEBE4
	mov r0, #0xc
	strh r0, [sp]
	str r6, [sp, #4]
	cmp r5, #0
	mov r2, #0x18
	beq _022C0100
	add r1, sp, #8
	mov r0, r5
	bl MemcpyFast
	b _022C010C
_022C0100:
	add r0, sp, #8
	mov r1, #0
	bl MemsetFast
_022C010C:
	ldrh r2, [sp, #0x40]
	add r0, sp, #0
	mov r1, #0x28
	str r4, [sp, #0x20]
	strh r2, [sp, #0x26]
	bl ov00_022BED00
	cmp r0, #0
	moveq r0, #2
	add sp, sp, #0x28
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022C0068

	arm_func_start ov00_022C0134
ov00_022C0134: ; 0x022C0134
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #8
	mov r5, r0
	mov r4, r1
	bl ov00_022BED70
	mov r1, #0xa
	mov r6, r0
	str r1, [sp]
	mov ip, #0xb
	mov r0, #5
	mov r1, #7
	mov r2, #9
	mov r3, #8
	str ip, [sp, #4]
	bl ov00_022BEDE4
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r4, r5, r6, pc}
	ldr r1, [r6, #4]
	ldrh r0, [r1]
	cmp r0, #7
	cmpne r0, #9
	bne _022C01E0
	cmp r4, #1
	blo _022C01A0
	cmp r4, #0xf
	bls _022C01AC
_022C01A0:
	add sp, sp, #8
	mov r0, #6
	ldmia sp!, {r4, r5, r6, pc}
_022C01AC:
	add r0, r1, #0x82
	add r0, r0, #0x100
	mov r1, #2
	bl DC_InvalidateRange
	ldr r0, [r6, #4]
	mov r1, #1
	add r0, r0, #0x100
	ldrh r0, [r0, #0x82]
	tst r0, r1, lsl r4
	bne _022C01F0
	add sp, sp, #8
	mov r0, #7
	ldmia sp!, {r4, r5, r6, pc}
_022C01E0:
	cmp r4, #0
	addne sp, sp, #8
	movne r0, #6
	ldmneia sp!, {r4, r5, r6, pc}
_022C01F0:
	mov r1, r5
	mov r0, #0xd
	bl ov00_022BEBE4
	mov r1, #1
	mov r2, r1, lsl r4
	mov r0, #0xd
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022C0134

	arm_func_start ov00_022C021C
ov00_022C021C: ; 0x022C021C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x40
	mov r8, r0
	mov r7, r1
	mov r6, r2
	mov r5, r3
	bl ov00_022BED70
	ldr r4, [r0, #4]
	mov r0, #2
	mov r1, #7
	mov r2, #8
	bl ov00_022BEDE4
	cmp r0, #0
	addne sp, sp, #0x40
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	add r0, r4, #0x188
	mov r1, #2
	bl DC_InvalidateRange
	add r0, r4, #0xc6
	mov r1, #2
	bl DC_InvalidateRange
	add r0, r4, #0x100
	ldrh r0, [r0, #0x88]
	cmp r0, #0
	ldrneh r0, [r4, #0xc6]
	cmpne r0, #1
	addne sp, sp, #0x40
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	add r0, r4, #0xc
	mov r1, #4
	bl DC_InvalidateRange
	ldr r0, [r4, #0xc]
	cmp r0, #1
	addeq sp, sp, #0x40
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	tst r6, #0x3f
	addne sp, sp, #0x40
	movne r0, #6
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	ldrh sb, [sp, #0x60]
	tst sb, #0x1f
	addne sp, sp, #0x40
	movne r0, #6
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	add r0, r4, #0x9c
	mov r1, #2
	bl DC_InvalidateRange
	ldrh r0, [r4, #0x9c]
	cmp r0, #0
	bne _022C0314
	bl ov00_022BF498
	cmp r6, r0
	addlt sp, sp, #0x40
	movlt r0, #6
	ldmltia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	bl ov00_022BF42C
	cmp sb, r0
	addlt sp, sp, #0x40
	movlt r0, #6
	ldmltia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022C0314:
	mov r1, r8
	mov r0, #0xe
	bl ov00_022BEBE4
	add r1, sp, #0
	mov r0, #0
	mov r2, #0x40
	bl ArrayFill32
	mov r4, r6, lsr #1
	ldrh r3, [sp, #0x60]
	mov r6, #0xe
	add r1, sp, #0x14
	mov r0, #0
	mov r2, #0x1c
	strh r6, [sp]
	str r7, [sp, #4]
	str r4, [sp, #8]
	str r5, [sp, #0xc]
	str r3, [sp, #0x10]
	bl ArrayFill32
	ldr r0, [sp, #0x64]
	add r1, sp, #0x30
	mov r2, #0x10
	bl ArrayCopy32
	add r0, sp, #0
	mov r1, #0x40
	bl ov00_022BED00
	cmp r0, #0
	moveq r0, #2
	add sp, sp, #0x40
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022C021C

	arm_func_start ov00_022C038C
ov00_022C038C: ; 0x022C038C
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	sub sp, sp, #0x18
	mov r7, r1
	mov r8, r0
	mov r6, r2
	add r1, sp, #8
	mov r0, #0
	mov r2, #0x10
	mov r5, r3
	ldr r4, [sp, #0x34]
	bl ArrayFill32
	ldr r1, [sp, #0x48]
	ldrh ip, [sp, #0x38]
	ldr r0, [sp, #0x44]
	ldr lr, _022C042C ; =0x00001E03
	ldr r3, [sp, #0x3c]
	ldr r2, [sp, #0x40]
	strb r1, [sp, #0x16]
	cmp r0, #0
	cmpne r4, #0
	strb r3, [sp, #0x14]
	strb r2, [sp, #0x15]
	ldrh r1, [sp, #0x30]
	str lr, [sp, #8]
	orrne r0, lr, #4
	strne r0, [sp, #8]
	strh ip, [sp, #0x12]
	strh r4, [sp, #0xc]
	strh r4, [sp, #0xe]
	strneh r4, [sp, #0x10]
	str r1, [sp]
	add r4, sp, #8
	mov r0, r8
	mov r1, r7
	mov r2, r6
	mov r3, r5
	str r4, [sp, #4]
	bl ov00_022C021C
	add sp, sp, #0x18
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022C042C: .word 0x00001E03
	arm_func_end ov00_022C038C

	arm_func_start ov00_022C0430
ov00_022C0430: ; 0x022C0430
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x18
	mov r6, r1
	mov r7, r0
	mov r5, r2
	add r1, sp, #8
	mov r0, #0
	mov r2, #0x10
	mov r4, r3
	bl ArrayFill32
	ldrh ip, [sp, #0x34]
	mov r0, #3
	str r0, [sp, #8]
	ldrh lr, [sp, #0x30]
	strh ip, [sp, #0xc]
	strh ip, [sp, #0xe]
	mov r0, r7
	mov r1, r6
	mov r2, r5
	mov r3, r4
	add ip, sp, #8
	str lr, [sp]
	str ip, [sp, #4]
	bl ov00_022C021C
	add sp, sp, #0x18
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022C0430

	arm_func_start ov00_022C0498
ov00_022C0498: ; 0x022C0498
	stmdb sp!, {r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x14
	mov sb, r0
	mov r8, r1
	mov r7, r2
	mov r6, r3
	mov r4, #1
	bl ov00_022BED70
	ldr r5, [r0, #4]
	mov r0, #2
	mov r1, #9
	mov r2, #0xa
	bl ov00_022BEDE4
	cmp r0, #0
	addne sp, sp, #0x14
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, pc}
	add r0, r5, #0x188
	mov r1, #2
	bl DC_InvalidateRange
	add r0, r5, #0x100
	ldrh r0, [r0, #0x88]
	cmp r0, #0
	bne _022C0518
	add r0, r5, #0x82
	add r0, r0, #0x100
	mov r1, #2
	bl DC_InvalidateRange
	add r2, r5, #0x100
	add r0, r5, #0x86
	mov r1, #2
	ldrh r4, [r2, #0x82]
	bl DC_InvalidateRange
_022C0518:
	cmp r7, #0
	addeq sp, sp, #0x14
	moveq r0, #6
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, pc}
	cmp r4, #0
	addeq sp, sp, #0x14
	moveq r0, #7
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, pc}
	add r0, r5, #0x7c
	mov r1, #2
	bl DC_InvalidateRange
	ldr r0, [r5, #0x7c]
	cmp r7, r0
	addeq sp, sp, #0x14
	moveq r0, #6
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, pc}
	cmp r6, #0x200
	addhi sp, sp, #0x14
	movhi r0, #6
	ldmhiia sp!, {r4, r5, r6, r7, r8, sb, pc}
	cmp r6, #0
	addeq sp, sp, #0x14
	moveq r0, #6
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, pc}
	mov r0, r7
	mov r1, r6
	bl sub_0207A2C0
	ldrh r2, [sp, #0x30]
	ldrh r1, [sp, #0x34]
	ldrh r0, [sp, #0x38]
	str r2, [sp]
	str r1, [sp, #4]
	str r0, [sp, #8]
	str sb, [sp, #0xc]
	mov r2, r7
	mov r3, r6
	mov r0, #0xf
	mov r1, #7
	str r8, [sp, #0x10]
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022C0498

	arm_func_start ov00_022C05C8
ov00_022C05C8: ; 0x022C05C8
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	bl ov00_022BED70
	mov r4, r0
	mov r0, #2
	mov r1, #9
	mov r2, #0xa
	bl ov00_022BEDE4
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r0, [r4, #4]
	mov r1, #4
	add r0, r0, #0xc
	bl DC_InvalidateRange
	ldr r0, [r4, #4]
	ldr r0, [r0, #0xc]
	cmp r0, #0
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, pc}
	mov r1, r5
	mov r0, #0x10
	bl ov00_022BEBE4
	mov r0, #0x10
	mov r1, #0
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022C05C8

	arm_func_start ov00_022C0638
ov00_022C0638: ; 0x022C0638
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r6, r1
	mov r5, r2
	bl ov00_022BED70
	mov r4, r0
	mov r0, #1
	mov r1, #8
	bl ov00_022BEDE4
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r0, [r4, #4]
	mov r1, #4
	add r0, r0, #0x10
	bl DC_InvalidateRange
	ldr r0, [r4, #4]
	ldr r0, [r0, #0x10]
	cmp r0, #1
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r5, #0x10
	movlo r0, #6
	ldmloia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r6, #0
	moveq r0, #6
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r0, r6
	mov r1, r5
	bl sub_0207A2C0
	mov r1, r7
	mov r0, #0x11
	bl ov00_022BEBE4
	mov r2, r6
	mov r3, r5
	mov r0, #0x11
	mov r1, #2
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022C0638

	arm_func_start ov00_022C06D8
ov00_022C06D8: ; 0x022C06D8
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	sub sp, sp, #0x10
	mov r7, r0
	mov r6, r1
	mov r5, r2
	mov r4, r3
	bl ov00_022BED70
	mov r8, r0
	mov r0, #1
	mov r1, #0xb
	bl ov00_022BEDE4
	cmp r0, #0
	addne sp, sp, #0x10
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r0, [r8, #4]
	mov r1, #4
	add r0, r0, #0x10
	bl DC_InvalidateRange
	ldr r0, [r8, #4]
	ldr r0, [r0, #0x10]
	cmp r0, #0
	addeq sp, sp, #0x10
	moveq r0, #3
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r0, _022C07A0 ; =0x000005E4
	cmp r4, r0
	addhi sp, sp, #0x10
	movhi r0, #6
	ldmhiia sp!, {r4, r5, r6, r7, r8, pc}
	mov r0, r5
	mov r1, r4
	bl sub_0207A2C0
	mov r1, r7
	mov r0, #0x12
	bl ov00_022BEBE4
	add r1, sp, #8
	mov r0, r6
	mov r2, #6
	bl MemcpyFast
	str r5, [sp]
	str r4, [sp, #4]
	ldr r2, [sp, #8]
	ldr r3, [sp, #0xc]
	mov r0, #0x12
	mov r1, #4
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	add sp, sp, #0x10
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022C07A0: .word 0x000005E4
	arm_func_end ov00_022C06D8

	arm_func_start ov00_022C07A4
ov00_022C07A4: ; 0x022C07A4
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	bl ov00_022BED70
	mov r4, r0
	mov r0, #1
	mov r1, #0xb
	bl ov00_022BEDE4
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r0, [r4, #4]
	mov r1, #4
	add r0, r0, #0x10
	bl DC_InvalidateRange
	ldr r0, [r4, #4]
	ldr r0, [r0, #0x10]
	cmp r0, #0
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, pc}
	mov r1, r5
	mov r0, #0x13
	bl ov00_022BEBE4
	mov r0, #0x13
	mov r1, #0
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022C07A4

	arm_func_start ov00_022C0810
ov00_022C0810: ; 0x022C0810
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0xc
	mov sl, r0
	mov r7, r1
	mov r6, r2
	mov r0, #2
	mov r1, #9
	mov r2, #0xa
	mov r5, r3
	mov r8, #1
	bl ov00_022BEDE4
	cmp r0, #0
	addne sp, sp, #0xc
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp sl, #0
	addeq sp, sp, #0xc
	moveq r0, #6
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp r7, #0x10
	addhs sp, sp, #0xc
	movhs r0, #6
	ldmhsia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp r6, #0
	addeq sp, sp, #0xc
	moveq r0, #6
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	bl ov00_022BF264
	movs r4, r0
	bne _022C088C
	bl ov00_022BF294
	mov r8, r0
_022C088C:
	mov r1, sl
	mov r0, #0
	mov r2, #0x820
	bl ArrayFill32Fast
	add r0, sl, #0x800
	mov r2, #0
	strh r2, [r0, #8]
	strh r2, [r0, #0xa]
	strh r2, [r0, #0xc]
	strh r5, [r0, #0x10]
	strh r7, [r0, #0x16]
	strh r2, [r0, #0xe]
	mov r0, #1
	ldr r1, [sp, #0x30]
	orr r0, r6, r0, lsl r4
	cmp r1, #0
	mov r0, r0, lsl #0x10
	movne r2, #1
	add r1, sl, #0x800
	strh r2, [r1, #0x18]
	mov r0, r0, lsr #0x10
	strh r0, [r1, #0xe]
	bl sub_02084F34
	add r3, sl, #0x800
	mul r1, r5, r0
	strh r0, [r3, #0x12]
	strh r1, [r3, #0x14]
	ldrh r0, [r3, #0x14]
	cmp r0, #0x1fc
	bls _022C0918
	mov r0, #0
	strh r0, [r3, #0xe]
	add sp, sp, #0xc
	mov r0, #6
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C0918:
	add r0, r0, #4
	strh r0, [r3, #0x14]
	mov r0, #1
	strh r0, [r3, #0x1c]
	cmp r4, #0
	bne _022C0A30
	orr r4, r8, #1
	mov r2, #0
_022C0938:
	ldrh r1, [r3, #0xe]
	mov r0, r2, lsl #9
	add r2, r2, #1
	and r1, r1, r4
	strh r1, [sl, r0]
	cmp r2, #4
	blt _022C0938
	ldr r1, _022C0A54 ; =ov00_022C0ECC
	mov r0, r7
	mov r2, sl
	bl ov00_022BF308
	mov r7, sl
	mov sb, #0
	add r4, sl, #0x800
	mov r6, #1
	ldr fp, _022C0A58 ; =ov00_022C0DF4
	ldr r5, _022C0A5C ; =0x0000FFFF
	b _022C0A14
_022C0980:
	ldrh r2, [r4, #8]
	mov r0, fp
	mov r1, sl
	add r2, r2, #1
	and r2, r2, #3
	strh r2, [r4, #8]
	ldrh r3, [r4, #0xe]
	mov r2, r7
	and r3, r3, r8
	mov r3, r3, lsl #0x10
	mov r3, r3, lsr #0x10
	str r3, [sp]
	ldrh r3, [r4, #0x16]
	stmib sp, {r3, r6}
	ldrh r3, [r4, #0x14]
	bl ov00_022C0498
	cmp r0, #7
	bne _022C09E8
	add r0, sl, sb, lsl #1
	add r0, r0, #0x800
	strh r5, [r0]
	ldrh r0, [r4, #0xa]
	add r0, r0, #1
	and r0, r0, #3
	strh r0, [r4, #0xa]
	b _022C0A0C
_022C09E8:
	cmp r0, #0
	cmpne r0, #2
	beq _022C0A0C
	add r0, sl, #0x800
	mov r1, #5
	strh r1, [r0, #0x1c]
	add sp, sp, #0xc
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C0A0C:
	add r7, r7, #0x200
	add sb, sb, #1
_022C0A14:
	ldrh r0, [r4, #0x18]
	cmp r0, #1
	movne r0, #1
	moveq r0, #2
	cmp sb, r0
	blt _022C0980
	b _022C0A48
_022C0A30:
	ldr r1, _022C0A60 ; =ov00_022C0FF8
	mov r4, #3
	mov r0, r7
	mov r2, sl
	strh r4, [r3, #0xa]
	bl ov00_022BF308
_022C0A48:
	mov r0, #0
	add sp, sp, #0xc
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022C0A54: .word ov00_022C0ECC
_022C0A58: .word ov00_022C0DF4
_022C0A5C: .word 0x0000FFFF
_022C0A60: .word ov00_022C0FF8
	arm_func_end ov00_022C0810

	arm_func_start ov00_022C0A64
ov00_022C0A64: ; 0x022C0A64
	stmdb sp!, {r4, lr}
	movs r4, r0
	moveq r0, #6
	ldmeqia sp!, {r4, pc}
	add r0, r4, #0x800
	ldrh r1, [r0, #0xe]
	cmp r1, #0
	moveq r0, #3
	ldmeqia sp!, {r4, pc}
	ldrh r0, [r0, #0x16]
	mov r1, #0
	mov r2, r1
	bl ov00_022BF308
	add r1, r4, #0x800
	mov r0, #0
	strh r0, [r1, #0xe]
	strh r0, [r1, #0x1c]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022C0A64

	arm_func_start ov00_022C0AAC
ov00_022C0AAC: ; 0x022C0AAC
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0xc
	mov sl, r0
	mov sb, r1
	mov r8, r2
	mov r0, #2
	mov r1, #9
	mov r2, #0xa
	bl ov00_022BEDE4
	cmp r0, #0
	addne sp, sp, #0xc
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp sl, #0
	addeq sp, sp, #0xc
	moveq r0, #6
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp sb, #0
	addeq sp, sp, #0xc
	moveq r0, #6
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp r8, #0
	addeq sp, sp, #0xc
	moveq r0, #6
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	bl ov00_022BF264
	movs r5, r0
	bne _022C0B20
	bl ov00_022BF294
	mov r4, r0
_022C0B20:
	add r0, sl, #0x800
	ldrh r0, [r0, #0x1c]
	cmp r0, #5
	addeq sp, sp, #0xc
	moveq r0, #1
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp r0, #1
	cmpne r0, #4
	addne sp, sp, #0xc
	movne r0, #3
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp r5, #0
	mov r7, #5
	bne _022C0CE4
	mov r5, #0
	mov fp, r5
	cmp r0, #4
	bne _022C0C08
	add ip, sl, #0x800
	mov r2, #1
	strh r2, [ip, #0x1c]
	ldrh r3, [ip, #0xe]
	ldrh r1, [ip, #8]
	ldr r0, _022C0DEC ; =ov00_022C0DF4
	and r3, r3, r4
	mov r3, r3, lsl #0x10
	mov r3, r3, lsr #0x10
	str r3, [sp]
	ldrh r3, [ip, #0x16]
	add r1, r1, #3
	and r6, r1, #3
	str r3, [sp, #4]
	str r2, [sp, #8]
	ldrh r3, [ip, #0x14]
	mov r1, sl
	add r2, sl, r6, lsl #9
	bl ov00_022C0498
	cmp r0, #7
	bne _022C0BE4
	add r0, sl, r6, lsl #1
	ldr r1, _022C0DF0 ; =0x0000FFFF
	add r0, r0, #0x800
	strh r1, [r0]
	add r0, sl, #0x800
	ldrh r1, [r0, #0xa]
	add r1, r1, #1
	and r1, r1, #3
	strh r1, [r0, #0xa]
	b _022C0C08
_022C0BE4:
	cmp r0, #0
	cmpne r0, #2
	beq _022C0C08
	add r0, sl, #0x800
	mov r1, r7
	strh r1, [r0, #0x1c]
	add sp, sp, #0xc
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C0C08:
	add r0, sl, #0x800
	ldrh r2, [r0, #0xc]
	ldrh r1, [r0, #0xa]
	cmp r2, r1
	beq _022C0CA0
	mov r5, r2, lsl #9
	ldrh r3, [sl, r5]
	mov r1, r8
	mov r2, #0x200
	orr r3, r3, #1
	strh r3, [sl, r5]
	ldrh r0, [r0, #0xc]
	add r0, sl, r0, lsl #9
	bl ArrayCopy16
	add r1, sl, #0x800
	ldrh r0, [r1, #0xc]
	mov r5, #1
	mov r7, #0
	add r0, sl, r0, lsl #1
	add r0, r0, #0x800
	ldrh r0, [r0]
	strh r0, [r1, #0x1a]
	ldrh r0, [r1, #0xc]
	add r0, r0, #1
	and r0, r0, #3
	strh r0, [r1, #0xc]
	ldrh r0, [r1, #0x18]
	cmp r0, #0
	bne _022C0C9C
	cmp r4, #0
	beq _022C0C9C
	ldrh r0, [r1, #8]
	mov r0, r0, lsl #9
	ldrh r0, [sl, r0]
	cmp r0, #1
	moveq fp, r5
	beq _022C0CA0
_022C0C9C:
	mov fp, #0
_022C0CA0:
	mov r0, sl
	mov r1, #0
	bl ov00_022C11B8
	cmp r5, #0
	beq _022C0DE0
	mov r0, sl
	mov r2, sb
	mov r1, #0
	bl ov00_022C10EC
	add r0, sl, #0x800
	ldrh r0, [r0, #0x18]
	cmp r0, #0
	bne _022C0DE0
	mov r0, sl
	mov r1, fp
	bl ov00_022C11B8
	b _022C0DE0
_022C0CE4:
	cmp r0, #4
	mov r0, #0
	add r1, sl, #0x800
	moveq r0, #1
	streqh r0, [r1, #0x1c]
	beq _022C0D64
	ldrh r2, [r1, #0xc]
	ldrh r1, [r1, #8]
	cmp r2, r1
	beq _022C0D64
	mov r2, r2, lsl #9
	ldrh r1, [sl, r2]
	tst r1, #1
	orreq r1, r1, #1
	streqh r1, [sl, r2]
	beq _022C0D64
	mov r1, r8
	add r0, sl, r2
	mov r2, #0x200
	bl ArrayCopy16
	add r2, sl, #0x800
	ldrh r1, [r2, #0xc]
	mov r0, #1
	mov r7, #0
	add r1, sl, r1, lsl #1
	add r1, r1, #0x800
	ldrh r1, [r1]
	strh r1, [r2, #0x1a]
	ldrh r1, [r2, #0xc]
	add r1, r1, #1
	and r1, r1, #3
	strh r1, [r2, #0xc]
_022C0D64:
	cmp r0, #0
	beq _022C0DE0
	add r0, sl, #0x800
	ldrh r1, [r0, #0xa]
	ldrh r2, [r0, #0x10]
	mov r0, sb
	add r6, sl, r1, lsl #9
	add r1, r6, #0x20
	bl ArrayCopy16
	add r3, sl, #0x800
	ldrh r1, [r3, #0xe]
	mov r4, #1
	ldr r0, _022C0DEC ; =ov00_022C0DF4
	str r1, [sp]
	ldrh r5, [r3, #0x16]
	mov r1, sl
	add r2, r6, #0x20
	str r5, [sp, #4]
	str r4, [sp, #8]
	ldrh r3, [r3, #0x10]
	bl ov00_022C0498
	add r1, sl, #0x800
	ldrh r2, [r1, #0xa]
	cmp r0, #2
	cmpne r0, #0
	add r2, r2, #1
	and r2, r2, #3
	strh r2, [r1, #0xa]
	movne r0, #5
	strneh r0, [r1, #0x1c]
	movne r7, r4
_022C0DE0:
	mov r0, r7
	add sp, sp, #0xc
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022C0DEC: .word ov00_022C0DF4
_022C0DF0: .word 0x0000FFFF
	arm_func_end ov00_022C0AAC

	arm_func_start ov00_022C0DF4
ov00_022C0DF4: ; 0x022C0DF4
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	bl ov00_022BED70
	ldrh r2, [r5, #0xa]
	ldr r1, _022C0EC4 ; =ov00_022C0ECC
	add r0, r0, r2, lsl #2
	ldr r2, [r0, #0xcc]
	ldr r4, [r0, #0x10c]
	cmp r2, r1
	ldrne r0, _022C0EC8 ; =ov00_022C0FF8
	cmpne r2, r0
	ldmneia sp!, {r3, r4, r5, pc}
	cmp r4, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r0, [r5, #0x20]
	cmp r4, r0
	ldmneia sp!, {r3, r4, r5, pc}
	bl ov00_022BF264
	ldrh r1, [r5, #2]
	cmp r1, #0
	bne _022C0E80
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	add r1, r4, #0x800
	ldrh r0, [r1, #0xa]
	ldrh r2, [r5, #0x1a]
	add r0, r4, r0, lsl #1
	mov r2, r2, asr #1
	add r0, r0, #0x800
	strh r2, [r0]
	ldrh r0, [r1, #0xa]
	add r0, r0, #1
	and r0, r0, #3
	strh r0, [r1, #0xa]
	ldmia sp!, {r3, r4, r5, pc}
_022C0E80:
	cmp r1, #0xa
	bne _022C0EB4
	cmp r0, #0
	beq _022C0EA4
	add r0, r4, #0x800
	ldrh r1, [r0, #0xa]
	add r1, r1, #3
	and r1, r1, #3
	strh r1, [r0, #0xa]
_022C0EA4:
	add r0, r4, #0x800
	mov r1, #4
	strh r1, [r0, #0x1c]
	ldmia sp!, {r3, r4, r5, pc}
_022C0EB4:
	add r0, r4, #0x800
	mov r1, #5
	strh r1, [r0, #0x1c]
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022C0EC4: .word ov00_022C0ECC
_022C0EC8: .word ov00_022C0FF8
	arm_func_end ov00_022C0DF4

	arm_func_start ov00_022C0ECC
ov00_022C0ECC: ; 0x022C0ECC
	stmdb sp!, {r4, r5, r6, lr}
	ldr r4, [r0, #0x1c]
	cmp r4, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	ldrh r1, [r0, #2]
	cmp r1, #0
	bne _022C0FE8
	ldrh r1, [r0, #4]
	cmp r1, #0x15
	bgt _022C0F18
	bge _022C0F38
	cmp r1, #9
	ldmgtia sp!, {r4, r5, r6, pc}
	cmp r1, #7
	ldmltia sp!, {r4, r5, r6, pc}
	beq _022C0F58
	cmp r1, #9
	beq _022C0F68
	ldmia sp!, {r4, r5, r6, pc}
_022C0F18:
	cmp r1, #0x1a
	ldmgtia sp!, {r4, r5, r6, pc}
	cmp r1, #0x19
	ldmltia sp!, {r4, r5, r6, pc}
	ldmeqia sp!, {r4, r5, r6, pc}
	cmp r1, #0x1a
	beq _022C0F68
	ldmia sp!, {r4, r5, r6, pc}
_022C0F38:
	ldrh r1, [r0, #0x12]
	ldr r2, [r0, #0xc]
	mov r0, r4
	bl ov00_022C10EC
	mov r0, r4
	mov r1, #0
	bl ov00_022C11B8
	ldmia sp!, {r4, r5, r6, pc}
_022C0F58:
	mov r0, r4
	mov r1, #0
	bl ov00_022C11B8
	ldmia sp!, {r4, r5, r6, pc}
_022C0F68:
	ldrh r5, [r0, #0x12]
	mov r6, #1
	bl EnableIrqFlag
	add r1, r4, #0x800
	ldrh lr, [r1, #8]
	mvn ip, r6, lsl r5
	mov r3, lr, lsl #9
	ldrh r2, [r4, r3]
	and r2, r2, ip
	strh r2, [r4, r3]
	ldrh r1, [r1, #0x18]
	cmp r1, #1
	bne _022C0FB8
	add r1, lr, #1
	and r1, r1, #3
	mov r1, r1, lsl #0x10
	mov r2, r1, lsr #7
	ldrh r1, [r4, r2]
	and r1, r1, ip
	strh r1, [r4, r2]
_022C0FB8:
	bl SetIrqFlag
	mov r0, r4
	mov r1, #0
	bl ov00_022C11B8
	add r0, r4, #0x800
	ldrh r0, [r0, #0x18]
	cmp r0, #1
	ldmneia sp!, {r4, r5, r6, pc}
	mov r0, r4
	mov r1, #0
	bl ov00_022C11B8
	ldmia sp!, {r4, r5, r6, pc}
_022C0FE8:
	add r0, r4, #0x800
	mov r1, #5
	strh r1, [r0, #0x1c]
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022C0ECC

	arm_func_start ov00_022C0FF8
ov00_022C0FF8: ; 0x022C0FF8
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r8, r0
	ldr r4, [r8, #0x1c]
	cmp r4, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	ldrh r0, [r8, #2]
	cmp r0, #0
	bne _022C10DC
	ldrh r0, [r8, #4]
	cmp r0, #0x15
	bgt _022C1040
	bge _022C1058
	cmp r0, #9
	ldmgtia sp!, {r4, r5, r6, r7, r8, pc}
	cmp r0, #7
	ldmltia sp!, {r4, r5, r6, r7, r8, pc}
	cmpne r0, #9
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022C1040:
	cmp r0, #0x1a
	ldmgtia sp!, {r4, r5, r6, r7, r8, pc}
	cmp r0, #0x19
	ldmltia sp!, {r4, r5, r6, r7, r8, pc}
	cmpne r0, #0x1a
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022C1058:
	ldr r7, [r8, #0xc]
	ldrh r5, [r8, #0x10]
	ldrh r6, [r7]
	bl ov00_022BF264
	add r1, r4, #0x800
	ldrh r1, [r1, #0x14]
	cmp r5, r1
	beq _022C1080
	cmp r5, #0x200
	movhi r5, #0x200
_022C1080:
	cmp r5, #4
	ldmloia sp!, {r4, r5, r6, r7, r8, pc}
	mov r1, #1
	tst r6, r1, lsl r0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	add r0, r4, #0x800
	ldrh r1, [r0, #8]
	mov r0, r7
	mov r2, r5
	add r1, r4, r1, lsl #9
	bl ArrayCopy16
	add r1, r4, #0x800
	ldrh r0, [r1, #8]
	ldrh r2, [r8, #0x1a]
	add r0, r4, r0, lsl #1
	mov r2, r2, asr #1
	add r0, r0, #0x800
	strh r2, [r0]
	ldrh r0, [r1, #8]
	add r0, r0, #1
	and r0, r0, #3
	strh r0, [r1, #8]
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022C10DC:
	add r0, r4, #0x800
	mov r1, #5
	strh r1, [r0, #0x1c]
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022C0FF8

	arm_func_start ov00_022C10EC
ov00_022C10EC: ; 0x022C10EC
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r6, r0
	mov r3, r1
	mov r1, #1
	mov r4, r1, lsl r3
	add r0, r6, #0x800
	ldrh r1, [r0, #0xe]
	mov r7, r4, lsl #0x10
	mov r5, r2
	tst r1, r7, lsr #16
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldrh r4, [r0, #8]
	mov r2, r4, lsl #9
	ldrh r2, [r6, r2]
	tst r2, r7, lsr #16
	bne _022C1150
	ldrh r0, [r0, #0x18]
	cmp r0, #1
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	add r0, r4, #1
	and r4, r0, #3
	mov r0, r4, lsl #9
	ldrh r0, [r6, r0]
	tst r0, r7, lsr #16
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
_022C1150:
	add r2, r6, r4, lsl #9
	mov r0, r6
	add r2, r2, #4
	bl ov00_022C1360
	mov r1, r0
	add r0, r6, #0x800
	cmp r5, #0
	ldrh r2, [r0, #0x10]
	beq _022C1180
	mov r0, r5
	bl ArrayCopy16
	b _022C1188
_022C1180:
	mov r0, #0
	bl ArrayFill16
_022C1188:
	bl EnableIrqFlag
	mov r4, r4, lsl #9
	ldrh r3, [r6, r4]
	mvn r1, r7, lsr #16
	add r2, r6, #2
	and r1, r3, r1
	strh r1, [r6, r4]
	ldrh r1, [r2, r4]
	orr r1, r1, r7, lsr #16
	strh r1, [r2, r4]
	bl SetIrqFlag
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022C10EC

	arm_func_start ov00_022C11B8
ov00_022C11B8: ; 0x022C11B8
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #0xc
	mov sl, r0
	mov sb, r1
	bl EnableIrqFlag
	add r1, sl, #0x800
	ldrh r1, [r1, #8]
	mov r4, r0
	mov r1, r1, lsl #9
	ldrh r1, [sl, r1]
	cmp r1, #0
	bne _022C12F8
	bl ov00_022BF294
	add r1, sl, #0x800
	ldrh r6, [r1, #8]
	ldrh r1, [r1, #0x18]
	mov r7, r0
	add r0, r6, #1
	and r5, r0, #3
	cmp r1, #1
	addeq r0, r5, #1
	andeq r8, r0, #3
	movne r8, r5
	add r1, sl, r8, lsl #9
	mov r0, #0
	mov r2, #0x200
	bl ArrayFill16
	add r0, sl, #0x800
	ldrh r3, [r0, #0xe]
	orr r2, r7, #1
	mov r1, r8, lsl #9
	and r2, r3, r2
	strh r2, [sl, r1]
	strh r5, [r0, #8]
	ldrh r0, [r0, #0xe]
	mov r1, r6, lsl #9
	cmp sb, #1
	strh r0, [sl, r1]
	ldreqh r0, [sl, r1]
	biceq r0, r0, #1
	streqh r0, [sl, r1]
	mov r0, r4
	bl SetIrqFlag
	add r3, sl, #0x800
	ldrh r1, [r3, #0xe]
	mov r4, #1
	ldr r0, _022C1304 ; =ov00_022C0DF4
	and r1, r1, r7
	mov r1, r1, lsl #0x10
	mov r1, r1, lsr #0x10
	str r1, [sp]
	ldrh r5, [r3, #0x16]
	mov r1, sl
	add r2, sl, r6, lsl #9
	str r5, [sp, #4]
	str r4, [sp, #8]
	ldrh r3, [r3, #0x14]
	bl ov00_022C0498
	cmp r0, #7
	bne _022C12D4
	add r0, sl, r6, lsl #1
	ldr r1, _022C1308 ; =0x0000FFFF
	add r0, r0, #0x800
	strh r1, [r0]
	add r0, sl, #0x800
	ldrh r1, [r0, #0xa]
	add sp, sp, #0xc
	add r1, r1, #1
	and r1, r1, #3
	strh r1, [r0, #0xa]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
_022C12D4:
	cmp r0, #0
	cmpne r0, #2
	addeq sp, sp, #0xc
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	add r0, sl, #0x800
	mov r1, #5
	strh r1, [r0, #0x1c]
	add sp, sp, #0xc
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
_022C12F8:
	bl SetIrqFlag
	add sp, sp, #0xc
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022C1304: .word ov00_022C0DF4
_022C1308: .word 0x0000FFFF
	arm_func_end ov00_022C11B8

	arm_func_start ov00_022C130C
ov00_022C130C: ; 0x022C130C
	stmdb sp!, {r3, lr}
	mov lr, r1
	mov r3, r2
	cmp r0, #0
	ldrh r1, [lr]
	ldrh ip, [lr, #2]
	mov r2, #1
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	cmp lr, #0
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	tst r1, r2, lsl r3
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	tst ip, r2, lsl r3
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	add r2, lr, #4
	bl ov00_022C1360
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022C130C

	arm_func_start ov00_022C1360
ov00_022C1360: ; 0x022C1360
	stmdb sp!, {r3, r4, r5, lr}
	mov ip, #1
	mov r3, ip, lsl r3
	sub r3, r3, #1
	mov r5, r0
	and r0, r1, r3
	mov r4, r2
	bl sub_02084F34
	add r1, r5, #0x800
	ldrh r1, [r1, #0x10]
	mla r0, r1, r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022C1360

	arm_func_start ov00_022C1390
ov00_022C1390: ; 0x022C1390
	stmdb sp!, {r3, lr}
	mov ip, #1
	rsb r2, ip, #0x10000
	mov r3, #2
	str ip, [sp]
	bl ov00_022C0810
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022C1390

	arm_func_start ov00_022C13AC
ov00_022C13AC: ; 0x022C13AC
	ldr ip, _022C13B4 ; =ov00_022C0A64
	bx ip
	.align 2, 0
_022C13B4: .word ov00_022C0A64
	arm_func_end ov00_022C13AC

	arm_func_start ov00_022C13B8
ov00_022C13B8: ; 0x022C13B8
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	mov r4, r2
	bl ov00_022BED9C
	cmp r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	cmp r5, #3
	movhi r0, #6
	ldmhiia sp!, {r4, r5, r6, pc}
	cmp r5, #0
	beq _022C1400
	cmp r4, #0
	moveq r0, #6
	ldmeqia sp!, {r4, r5, r6, pc}
	mov r0, r4
	mov r1, #0x50
	bl sub_0207A2C0
_022C1400:
	mov r1, r6
	mov r0, #0x14
	bl ov00_022BEBE4
	mov r2, r5
	mov r3, r4
	mov r0, #0x14
	mov r1, #2
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022C13B8

	arm_func_start ov00_022C142C
ov00_022C142C: ; 0x022C142C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r6, r1
	mov r5, r2
	mov r4, r3
	bl ov00_022BED9C
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r6, #3
	movhi r0, #6
	ldmhiia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r6, #0
	beq _022C1478
	cmp r4, #0
	moveq r0, #6
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r0, r4
	mov r1, #0x50
	bl sub_0207A2C0
_022C1478:
	mov r1, r7
	mov r0, #0x27
	bl ov00_022BEBE4
	mov r2, r6
	mov r3, r4
	mov r0, #0x27
	mov r1, #3
	str r5, [sp]
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022C142C

	arm_func_start ov00_022C14A8
ov00_022C14A8: ; 0x022C14A8
	stmdb sp!, {r4, r5, r6, r7, lr}
	sub sp, sp, #0xc
	mov r7, r0
	mov r6, r1
	mov r5, r2
	mov r0, #2
	mov r1, #7
	mov r2, #9
	mov r4, r3
	bl ov00_022BEDE4
	cmp r0, #0
	addne sp, sp, #0xc
	ldmneia sp!, {r4, r5, r6, r7, pc}
	cmp r6, #0
	addeq sp, sp, #0xc
	moveq r0, #6
	ldmeqia sp!, {r4, r5, r6, r7, pc}
	cmp r5, #0x70
	addhi sp, sp, #0xc
	movhi r0, #6
	ldmhiia sp!, {r4, r5, r6, r7, pc}
	ldr r1, _022C155C ; =ov00_0231EDE0
	mov r0, r6
	mov r2, r5
	bl ArrayCopy16
	ldr r0, _022C155C ; =ov00_0231EDE0
	mov r1, r5
	bl sub_0207A2C0
	mov r1, r7
	mov r0, #0x18
	bl ov00_022BEBE4
	ldrh r0, [sp, #0x20]
	str r4, [sp]
	ldrb r1, [sp, #0x24]
	str r0, [sp, #4]
	ldr r2, _022C155C ; =ov00_0231EDE0
	str r1, [sp, #8]
	mov r3, r5
	mov r0, #0x18
	mov r1, #5
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	add sp, sp, #0xc
	ldmia sp!, {r4, r5, r6, r7, pc}
	.align 2, 0
_022C155C: .word ov00_0231EDE0
	arm_func_end ov00_022C14A8

	arm_func_start ov00_022C1560
ov00_022C1560: ; 0x022C1560
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	bl ov00_022BED9C
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	cmp r4, #0
	cmpne r4, #1
	movne r0, #6
	ldmneia sp!, {r3, r4, r5, pc}
	mov r1, r5
	mov r0, #0x19
	bl ov00_022BEBE4
	mov r2, r4
	mov r0, #0x19
	mov r1, #1
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022C1560

	arm_func_start ov00_022C15B0
ov00_022C15B0: ; 0x022C15B0
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #8
	mov r7, r0
	mov r6, r1
	mov r5, r2
	mov r4, r3
	bl ov00_022BED9C
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	mov r1, r7
	mov r0, #0x1d
	bl ov00_022BEBE4
	ldrh ip, [sp, #0x20]
	mov r2, r6
	mov r3, r5
	mov r0, #0x1d
	mov r1, #4
	stmia sp, {r4, ip}
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022C15B0

	arm_func_start ov00_022C1610
ov00_022C1610: ; 0x022C1610
	stmdb sp!, {r4, r5, r6, r7, lr}
	sub sp, sp, #0xc
	mov r7, r0
	mov r6, r1
	mov r5, r2
	mov r4, r3
	bl ov00_022BED70
	mov r0, #1
	mov r1, #2
	bl ov00_022BEDE4
	cmp r0, #0
	addne sp, sp, #0xc
	ldmneia sp!, {r4, r5, r6, r7, pc}
	mov r1, r7
	mov r0, #0x1e
	bl ov00_022BEBE4
	ldrh r2, [sp, #0x20]
	mov r3, #0x1e
	add r0, sp, #0
	mov r1, #0xa
	strh r3, [sp]
	strh r6, [sp, #2]
	strh r5, [sp, #4]
	strh r4, [sp, #6]
	strh r2, [sp, #8]
	bl ov00_022BED00
	cmp r0, #0
	moveq r0, #2
	add sp, sp, #0xc
	ldmia sp!, {r4, r5, r6, r7, pc}
	arm_func_end ov00_022C1610

	arm_func_start ov00_022C1688
ov00_022C1688: ; 0x022C1688
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	mov r0, #2
	mov r1, #7
	mov r2, #9
	bl ov00_022BEDE4
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	mov r1, r5
	mov r0, #0x21
	bl ov00_022BEBE4
	mov r2, r4
	mov r0, #0x21
	mov r1, #1
	bl ov00_022BEC54
	cmp r0, #0
	moveq r0, #2
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022C1688

	arm_func_start ov00_022C16D4
ov00_022C16D4: ; 0x022C16D4
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r6, r1
	ldr r1, [sp, #0x1c]
	mov r5, r2
	ldr ip, [sp, #0x18]
	add r2, r5, r1
	mov r7, r0
	stmia r6, {r5, ip}
	sub r0, r2, #1
	mov r4, r3
	bl _s32_div_f
	str r0, [r6, #0xc]
	mov r0, #0
	str r0, [r6, #8]
	mov r0, r7
	mov r1, r5
	str r4, [r6, #0x10]
	bl ov00_022C2BB8
	mov r2, r0
	mov r0, r4
	mov r1, #0
	bl MemsetFast
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022C16D4

	arm_func_start ov00_022C1730
ov00_022C1730: ; 0x022C1730
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	ldr r0, [r7, #0x10]
	mov r6, r1, asr #5
	ldr r0, [r0, r6, lsl #2]
	and r4, r1, #0x1f
	mov r5, #1
	tst r0, r5, lsl r4
	mov r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	mul ip, r1, r2
	ldmia r7, {r0, r1}
	sub r0, r0, ip
	cmp r2, r0
	movhi r2, r0
	mov r0, r3
	add r1, r1, ip
	bl MemcpyFast
	ldr r2, [r7, #0x10]
	mov r0, #1
	ldr r1, [r2, r6, lsl #2]
	orr r1, r1, r5, lsl r4
	str r1, [r2, r6, lsl #2]
	ldr r1, [r7, #8]
	add r1, r1, #1
	str r1, [r7, #8]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022C1730

	arm_func_start ov00_022C179C
ov00_022C179C: ; 0x022C179C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr r1, [r0, #0x14]
	ldr r6, [r0, #0xc]
	add r5, r1, #1
	cmp r5, r6
	movge r5, #0
	ldr r7, [r0, #0x10]
	mov r0, r5, asr #5
	add r4, r7, r0, lsl #2
	mov r0, #0
	mov ip, r5
	and lr, r5, #0x1f
	mov r1, r0
	mov r2, #1
_022C17D4:
	ldr r3, [r4]
	tst r3, r2, lsl lr
	beq _022C1818
	add r5, r5, #1
	cmp r5, r6
	blt _022C17FC
	mov r5, r1
	mov lr, r1
	mov r4, r7
	b _022C180C
_022C17FC:
	add lr, lr, #1
	cmp lr, #0x20
	movge lr, r0
	addge r4, r4, #4
_022C180C:
	cmp r5, ip
	bne _022C17D4
	mvn r5, #0
_022C1818:
	mov r0, r5
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022C179C

	arm_func_start ov00_022C1820
ov00_022C1820: ; 0x022C1820
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	ldr r4, [r6, #0x2f4]
	mov lr, #0
	mov r5, r2
	mov r2, lr
	cmp r4, #0
	beq _022C18A0
_022C1840:
	cmp r1, #0x3e8
	bhs _022C1880
	cmp r1, r2
	bne _022C1890
	ldr ip, _022C18B8 ; =ov00_0231EE60
	ldmia r4!, {r0, r1, r2, r3}
	mov lr, ip
	stmia ip!, {r0, r1, r2, r3}
	ldmia r4!, {r0, r1, r2, r3}
	stmia ip!, {r0, r1, r2, r3}
	ldmia r4, {r0, r1}
	stmia ip, {r0, r1}
	ldr r0, _022C18BC ; =ov00_0231EE60
	ldr r1, [r0, #4]
	str r1, [r0, #4]
	b _022C18A0
_022C1880:
	ldr r0, [r4]
	cmp r1, r0
	ldreq lr, [r4, #0x2c]
	beq _022C18A0
_022C1890:
	ldr r4, [r4, #0x28]
	add r2, r2, #1
	cmp r4, #0
	bne _022C1840
_022C18A0:
	cmp lr, #0
	addne r0, r6, #0x200
	ldrnesh r0, [r0, #0xf2]
	mlane lr, r5, r0, lr
	mov r0, lr
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022C18B8: .word ov00_0231EE60
_022C18BC: .word ov00_0231EE60
	arm_func_end ov00_022C1820

	arm_func_start ov00_022C18C0
ov00_022C18C0: ; 0x022C18C0
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #8
	mov r8, r0
	ldr r0, [r8]
	cmp r0, #0
	addne r7, r0, #4
	moveq r7, #0
	cmp r7, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	ldrb r0, [r8, #0x2f8]
	add r0, r0, #1
	strb r0, [r8, #0x2f8]
	tst r0, #0xff
	ldreqb r0, [r8, #0x2f8]
	addeq r0, r0, #1
	streqb r0, [r8, #0x2f8]
	ldrb r0, [r8, #0x2f8]
	strb r0, [r7, #0xc]
	ldr r0, [r7]
	cmp r0, #0xa
	addls pc, pc, r0, lsl #2
	b _022C19AC
_022C191C: ; jump table
	b _022C19AC ; case 0
	b _022C19AC ; case 1
	b _022C19B4 ; case 2
	b _022C19AC ; case 3
	b _022C1948 ; case 4
	b _022C19AC ; case 5
	b _022C1948 ; case 6
	b _022C19AC ; case 7
	b _022C19AC ; case 8
	b _022C19AC ; case 9
	b _022C19B4 ; case 10
_022C1948:
	mov r5, #0
	add r6, r8, #0xb8
	add sb, r8, #0x200
	mov sl, r5
	mov r4, #1
_022C195C:
	ldrh r0, [r7, #8]
	tst r0, r4, lsl r5
	beq _022C1994
	add r3, r7, r5, lsl #2
	ldr r1, [r3, #0x1c]
	mov r0, r8
	str r1, [sp]
	ldrsh r2, [sb, #0xf0]
	mov r1, r6
	str r2, [sp, #4]
	ldr r2, [r7, #0x18]
	ldr r3, [r3, #0x5c]
	bl ov00_022C16D4
	str sl, [r6, #0x14]
_022C1994:
	add r5, r5, #1
	cmp r5, #0x10
	add r6, r6, #0x24
	blt _022C195C
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022C19AC:
	mov r0, #0
	str r0, [r7]
_022C19B4:
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	arm_func_end ov00_022C18C0

	arm_func_start ov00_022C19BC
ov00_022C19BC: ; 0x022C19BC
	stmdb sp!, {r3, r4, r5, lr}
	mov ip, r0
	add lr, ip, #0xac
	mov r0, #0x24
	mla r5, r2, r0, lr
	cmp r1, #0xd
	mov r4, #1
	beq _022C19F0
	ldrb lr, [r5, #1]
	ldrb r0, [r5, #2]
	cmp lr, r0
	moveq r4, #0
	beq _022C1A04
_022C19F0:
	cmp r1, #8
	bne _022C1A04
	ldr r0, [r5, #4]
	cmp r0, #0x3e8
	movlo r4, #0
_022C1A04:
	cmp r4, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldrb lr, [r5, #1]
	mov r0, #1
	mov r0, r0, lsl r2
	strb lr, [r5, #2]
	ldrb lr, [r5, #1]
	mov r2, #0xc
	strb lr, [ip, #0x1d]
	strh r3, [ip, #0x1e]
	str r1, [ip, #0x14]
	str r2, [ip, #0x10]
	strh r0, [ip, #0x1a]
	ldr r2, [ip, #0xc]
	cmp r2, #0
	beq _022C1A54
	ldr r0, [ip, #8]
	add r1, ip, #0x10
	blx r2
	ldmia sp!, {r3, r4, r5, pc}
_022C1A54:
	ldr r1, [ip, #0x20]
	cmp r1, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	add r0, ip, #0x10
	blx r1
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022C19BC

	arm_func_start ov00_022C1A6C
ov00_022C1A6C: ; 0x022C1A6C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x10
	mov sl, r0
	mov fp, r1
	add r4, sl, #0xac
	mov r3, #0x24
	mov r1, #0
	ldr r5, [sp, #0x38]
	mla r4, fp, r3, r4
	str r1, [sp, #0xc]
	mov sb, r2
	str r1, [sp, #8]
	cmp r5, #2
	bne _022C1B20
	mov r1, #1
	mov r1, r1, lsl fp
	mov r1, r1, lsl #0x10
	mov r2, r1, lsr #0x10
	ldrb r4, [r4, #1]
	mov r3, #3
	mov r1, r2, asr #8
	strb r3, [sb]
	strb r2, [sb, #1]
	strb r1, [sb, #2]
	strb r4, [sb, #3]
	bl ov00_022C2CE0
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	strb r0, [sb, #4]
	mov r0, r0, asr #8
	strb r0, [sb, #5]
	add r1, sl, #0x200
	ldrh r2, [r1, #0xf2]
	mov r0, #0xa
	str r0, [sp, #0xc]
	mov r0, #1
	str r0, [sp, #8]
	strb r2, [sb, #6]
	mov r0, r2, asr #8
	strb r0, [sb, #7]
	ldrh r0, [r1, #0xf0]
	strb r0, [sb, #8]
	mov r0, r0, asr #8
	strb r0, [sb, #9]
	b _022C1EA0
_022C1B20:
	cmp r5, #8
	bne _022C1B84
	mov r0, #1
	str r0, [sp, #8]
	mov r0, r0, lsl fp
	mov r0, r0, lsl #0x10
	mov r1, r0, lsr #0x10
	ldrb r3, [r4, #1]
	ldr r5, [r4, #4]
	mov r2, #9
	strb r2, [sb]
	mov r0, r1, asr #8
	strb r1, [sb, #1]
	strb r0, [sb, #2]
	strb r3, [sb, #3]
	strb r5, [sb, #4]
	mov r0, r5, lsr #8
	strb r0, [sb, #5]
	mov r0, r5, lsr #0x10
	strb r0, [sb, #6]
	mov r0, r5, lsr #0x18
	strb r0, [sb, #7]
	mov r0, #8
	str r0, [sp, #0xc]
	b _022C1EA0
_022C1B84:
	cmp r5, #0xa
	bne _022C1BC8
	mov r0, #1
	str r0, [sp, #8]
	mov r0, r0, lsl fp
	mov r0, r0, lsl #0x10
	mov r1, r0, lsr #0x10
	ldrb r3, [r4, #1]
	mov r2, #0xb
	mov r0, r1, asr #8
	strb r2, [sb]
	strb r1, [sb, #1]
	strb r0, [sb, #2]
	mov r0, #4
	strb r3, [sb, #3]
	str r0, [sp, #0xc]
	b _022C1EA0
_022C1BC8:
	cmp r5, #4
	bne _022C1DC8
	ldr r6, [sl, #0x2f4]
	ldr r5, [r4, #4]
	cmp r6, #0
	beq _022C1BF4
_022C1BE0:
	ldr r0, [r6]
	cmp r0, r5
	ldrne r6, [r6, #0x28]
	cmpne r6, #0
	bne _022C1BE0
_022C1BF4:
	cmp r6, #0
	beq _022C1EA0
	cmp r5, #0x3e8
	ldr r7, [r4, #8]
	blo _022C1C74
	ldr r0, [sl, #0x300]
	cmp r5, r0
	bne _022C1C64
	add r0, sl, #0x200
	ldrsh r1, [r0, #0xf2]
	ldr r0, [r6, #4]
	mov r8, #0
	add r0, r0, r1
	sub r0, r0, #1
	bl _s32_div_f
	mov r2, r8
	b _022C1C48
_022C1C38:
	add r7, r7, #1
	cmp r7, r0
	movge r7, r2
	add r8, r8, #1
_022C1C48:
	cmp r8, #3
	bge _022C1C64
	ldr r1, [sl, #0x304]
	cmp r7, r1
	ldrne r1, [sl, #0x308]
	cmpne r7, r1
	beq _022C1C38
_022C1C64:
	str r5, [sl, #0x300]
	ldr r0, [sl, #0x304]
	str r0, [sl, #0x308]
	str r7, [sl, #0x304]
_022C1C74:
	ldr r2, [r6, #0x2c]
	mov r0, #0
	add r1, sl, #0x200
	str r0, [sp, #4]
	str r0, [sp]
	cmp r2, #0
	ldrsh r8, [r1, #0xf2]
	beq _022C1CB4
	mov r0, sl
	mov r1, r5
	mov r2, r7
	bl ov00_022C1820
	str r0, [sp, #4]
	mov r0, #1
	str r0, [sp]
	b _022C1D0C
_022C1CB4:
	ldrh r0, [r6, #0x32]
	cmp r0, #1
	bne _022C1D0C
	str r5, [sl, #0x24]
	ldr r3, [sp, #4]
	str r7, [sl, #0x28]
	strh r8, [sl, #0x30]
	mov r1, r3
	str r1, [sl, #0x2c]
	mov r0, sl
	mov r2, fp
	mov r1, #0xd
	bl ov00_022C19BC
	ldr r0, [sl, #0x2c]
	cmp r0, #0
	beq _022C1D0C
	ldrsh r8, [sl, #0x30]
	str r0, [sp, #4]
	mov r0, #1
	ldr r5, [sl, #0x24]
	ldr r7, [sl, #0x28]
	str r0, [sp]
_022C1D0C:
	ldr r0, [sp]
	cmp r0, #0
	beq _022C1EA0
	ldr r0, [sl, #0x2ec]
	ldrb r3, [r4, #1]
	cmp r0, #0
	ldreq r0, _022C1ECC ; =0x0000FFFE
	mov r2, #5
	movne r0, #1
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	mov r0, r0, lsl #0x10
	mov r1, r0, lsr #0x10
	strb r2, [sb]
	mov r0, r1, asr #8
	strb r1, [sb, #1]
	strb r0, [sb, #2]
	strb r3, [sb, #3]
	strb r5, [sb, #4]
	mov r0, r5, lsr #8
	strb r0, [sb, #5]
	mov r0, r5, lsr #0x10
	strb r0, [sb, #6]
	mov r0, r5, lsr #0x18
	strb r0, [sb, #7]
	strb r7, [sb, #8]
	mov r0, r7, lsr #8
	strb r0, [sb, #9]
	mov r0, r7, lsr #0x10
	strb r0, [sb, #0xa]
	mov r0, r7, lsr #0x18
	strb r0, [sb, #0xb]
	ldr r0, [sp, #4]
	mov r2, r8
	cmp r0, #0
	bne _022C1DAC
	add r0, sb, #0xc
	mov r1, #0
	bl MemsetFast
	b _022C1DB4
_022C1DAC:
	add r1, sb, #0xc
	bl MemcpyFast
_022C1DB4:
	add r0, r8, #0xc
	str r0, [sp, #0xc]
	mov r0, #1
	str r0, [sp, #8]
	b _022C1EA0
_022C1DC8:
	cmp r5, #6
	bne _022C1EA0
	ldmib r4, {r5, r6}
	add r3, sl, #0x200
	mov r1, r5
	mov r2, r6
	ldrsh r7, [r3, #0xf2]
	bl ov00_022C1820
	ldr r1, [sp, #0x3c]
	cmp r1, #0
	cmpeq r0, #0
	beq _022C1EA0
	ldr r1, [sl, #0x2ec]
	ldrb r4, [r4, #1]
	cmp r1, #0
	ldreq r1, _022C1ED0 ; =0x0000FFFF
	mov r3, #7
	movne r1, #1
	mov r1, r1, lsl #0x10
	mov r1, r1, lsr #0x10
	mov r1, r1, lsl #0x10
	mov r2, r1, lsr #0x10
	strb r3, [sb]
	mov r1, r2, asr #8
	strb r2, [sb, #1]
	strb r1, [sb, #2]
	strb r4, [sb, #3]
	strb r5, [sb, #4]
	mov r1, r5, lsr #8
	strb r1, [sb, #5]
	mov r1, r5, lsr #0x10
	strb r1, [sb, #6]
	mov r1, r5, lsr #0x18
	strb r1, [sb, #7]
	strb r6, [sb, #8]
	mov r1, r6, lsr #8
	strb r1, [sb, #9]
	mov r1, r6, lsr #0x10
	strb r1, [sb, #0xa]
	mov r1, r6, lsr #0x18
	strb r1, [sb, #0xb]
	cmp r0, #0
	mov r2, r7
	bne _022C1E88
	add r0, sb, #0xc
	mov r1, #0
	bl MemsetFast
	b _022C1E90
_022C1E88:
	add r1, sb, #0xc
	bl MemcpyFast
_022C1E90:
	add r0, r7, #0xc
	str r0, [sp, #0xc]
	mov r0, #1
	str r0, [sp, #8]
_022C1EA0:
	ldr r0, [sp, #8]
	cmp r0, #0
	beq _022C1EC0
	mov r0, #1
	mvn r0, r0, lsl fp
	ldr r1, [sl, #0x30c]
	and r0, r1, r0
	str r0, [sl, #0x30c]
_022C1EC0:
	ldr r0, [sp, #0xc]
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022C1ECC: .word 0x0000FFFE
_022C1ED0: .word 0x0000FFFF
	arm_func_end ov00_022C1A6C

	arm_func_start ov00_022C1ED4
ov00_022C1ED4: ; 0x022C1ED4
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	ldr r2, [r0]
	mov r5, r1
	cmp r2, #0
	mov r1, #0
	addne r4, r2, #4
	moveq r4, r1
	cmp r4, #0
	beq _022C20B4
	ldr r2, [r4]
	cmp r2, #0xa
	addls pc, pc, r2, lsl #2
	b _022C20B4
_022C1F08: ; jump table
	b _022C20B4 ; case 0
	b _022C20B4 ; case 1
	b _022C1F34 ; case 2
	b _022C20B4 ; case 3
	b _022C1F80 ; case 4
	b _022C20B4 ; case 5
	b _022C1F80 ; case 6
	b _022C20B4 ; case 7
	b _022C20B4 ; case 8
	b _022C20B4 ; case 9
	b _022C2078 ; case 10
_022C1F34:
	ldrh r3, [r4, #8]
	ldrb r4, [r4, #0xc]
	mov r2, #2
	mov r1, r3, asr #8
	strb r2, [r5]
	strb r3, [r5, #1]
	strb r1, [r5, #2]
	strb r4, [r5, #3]
	add r0, r0, #0x200
	ldrh r2, [r0, #0xf2]
	mov r1, #8
	strb r2, [r5, #4]
	mov r2, r2, asr #8
	strb r2, [r5, #5]
	ldrh r0, [r0, #0xf0]
	strb r0, [r5, #6]
	mov r0, r0, asr #8
	strb r0, [r5, #7]
	b _022C20B4
_022C1F80:
	add sb, r0, #0xb8
	mov r8, #0
	mov r7, #8
	mov fp, #1
	mvn r6, #0
_022C1F94:
	ldrh r0, [r4, #8]
	mov sl, fp, lsl r8
	tst r0, fp, lsl r8
	beq _022C2064
	mov r0, sb
	bl ov00_022C179C
	cmp r0, r6
	bne _022C1FFC
	ldrb r1, [r4, #0xc]
	mov r0, sl, lsl #0x10
	mov r0, r0, lsr #0x10
	strb r7, [r5]
	strb r0, [r5, #1]
	mov r0, r0, asr #8
	strb r0, [r5, #2]
	strb r1, [r5, #3]
	ldr r2, [r4, #0x14]
	mov r1, r7
	strb r2, [r5, #4]
	mov r0, r2, lsr #8
	strb r0, [r5, #5]
	mov r0, r2, lsr #0x10
	strb r0, [r5, #6]
	mov r0, r2, lsr #0x18
	strb r0, [r5, #7]
	b _022C205C
_022C1FFC:
	ldrh r3, [r4, #8]
	ldrb sl, [r4, #0xc]
	ldr r2, [r4]
	mov r1, r3, asr #8
	strb r2, [r5]
	strb r3, [r5, #1]
	strb r1, [r5, #2]
	strb sl, [r5, #3]
	ldr r3, [r4, #0x14]
	mov r1, r0, lsr #8
	strb r3, [r5, #4]
	mov r2, r3, lsr #8
	strb r2, [r5, #5]
	mov r2, r3, lsr #0x10
	strb r2, [r5, #6]
	mov r2, r3, lsr #0x18
	strb r2, [r5, #7]
	strb r0, [r5, #8]
	strb r1, [r5, #9]
	mov r1, r0, lsr #0x10
	strb r1, [r5, #0xa]
	mov r0, r0, lsr #0x18
	mov r1, #0xc
	strb r0, [r5, #0xb]
_022C205C:
	cmp r1, #0
	bne _022C20B4
_022C2064:
	add r8, r8, #1
	cmp r8, #0x10
	add sb, sb, #0x24
	blt _022C1F94
	b _022C20B4
_022C2078:
	ldrh r2, [r4, #8]
	ldrb r3, [r4, #0xc]
	mov r1, #0xa
	mov r0, r2, asr #8
	strb r1, [r5]
	strb r2, [r5, #1]
	strb r0, [r5, #2]
	strb r3, [r5, #3]
	ldrb r3, [r4, #0x1d]
	add r0, r4, #0x14
	add r1, r5, #5
	mov r2, #9
	strb r3, [r5, #4]
	bl MemcpyFast
	mov r1, #0xe
_022C20B4:
	mov r0, r1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022C1ED4

	arm_func_start ov00_022C20BC
ov00_022C20BC: ; 0x022C20BC
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #8
	mov sl, r0
	mov sb, r1
	mov r8, r2
	ldr r6, [sl, #0x30c]
	movs r0, #0
	bne _022C2188
	cmp r6, #0
	beq _022C2188
	ldr r1, [sl, #0x2fc]
	mov r2, #1
	mov r3, r6
	tst r6, r2, lsl r1
	clzeq r3, r3
	rsbeq r1, r3, #0x1f
	streq r1, [sl, #0x2fc]
	ldr r7, [sl, #0x2fc]
	mvn r2, r6
	sub r1, r6, #1
	add r4, sl, #0xac
	and r5, r2, r1
	mov fp, #1
_022C2118:
	add r7, r7, #1
	cmp r6, fp, lsl r7
	movlt r1, r5
	clzlt r1, r1
	rsblt r7, r1, #0x20
	ldr r2, [sl, #0x30c]
	mov r1, #1
	tst r2, r1, lsl r7
	beq _022C217C
	mov r1, #0x24
	mul r1, r7, r1
	ldrb r1, [r4, r1]
	cmp r1, #4
	bne _022C2174
	mov r0, #4
	str r0, [sp]
	mov r2, #0
	str r2, [sp, #4]
	mov r0, sl
	mov r1, r7
	mov r2, sb
	mov r3, r8
	bl ov00_022C1A6C
_022C2174:
	cmp r0, #0
	strne r7, [sl, #0x2fc]
_022C217C:
	ldr r1, [sl, #0x2fc]
	cmp r7, r1
	bne _022C2118
_022C2188:
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp r6, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r3, [sl, #0x30c]
	ldr r1, [sl, #0x2fc]
	mov r2, #1
	tst r3, r2, lsl r1
	clzeq r3, r3
	rsbeq r1, r3, #0x1f
	streq r1, [sl, #0x2fc]
	ldr r7, [sl, #0x2fc]
	mvn r2, r6
	sub r1, r6, #1
	add r4, sl, #0xac
	and r5, r2, r1
	mov fp, #1
_022C21D4:
	add r7, r7, #1
	mov r1, #1
	cmp r6, r1, lsl r7
	movlt r1, r5
	clzlt r1, r1
	rsblt r7, r1, #0x20
	ldr r1, [sl, #0x30c]
	tst r1, fp, lsl r7
	beq _022C2234
	mov r1, #0x24
	mul r1, r7, r1
	ldrb r1, [r4, r1]
	cmp r1, #6
	bne _022C222C
	mov r0, #6
	str r0, [sp]
	mov r0, sl
	mov r1, r7
	mov r2, sb
	mov r3, r8
	str fp, [sp, #4]
	bl ov00_022C1A6C
_022C222C:
	cmp r0, #0
	strne r7, [sl, #0x2fc]
_022C2234:
	ldr r1, [sl, #0x2fc]
	cmp r7, r1
	bne _022C21D4
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022C20BC

	arm_func_start ov00_022C2248
ov00_022C2248: ; 0x022C2248
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x14
	mov sl, r0
	mov r0, #0
	ldr r5, [sl, #0x2fc]
	sub r4, r0, #1
	mov sb, r1
	mov r8, r2
	str r3, [sp, #8]
	cmp r5, r4
	bne _022C2284
	movs r1, r3
	movne r1, #1
	moveq r1, r0
	str r1, [sl, #0x2fc]
_022C2284:
	cmp sb, #0
	beq _022C2294
	cmp r8, #0
	bgt _022C22A0
_022C2294:
	add sp, sp, #0x14
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C22A0:
	ldr r1, [sl, #0x30c]
	str r1, [sp, #0xc]
	cmp r1, #0
	beq _022C2384
	ldr r2, [sl, #0x2fc]
	mov r3, #1
	mov r4, r1
	tst r1, r3, lsl r2
	clzeq r4, r4
	rsbeq r1, r4, #0x1f
	streq r1, [sl, #0x2fc]
	ldr r1, [sp, #0xc]
	ldr r7, [sl, #0x2fc]
	mvn r2, r1
	sub r1, r1, #1
	and r1, r2, r1
	ldr fp, _022C243C ; =ov00_0231804C
	add r5, sl, #0xac
	str r1, [sp, #0x10]
_022C22EC:
	ldr r2, [sp, #0xc]
	add r7, r7, #1
	mov r1, #1
	cmp r2, r1, lsl r7
	ldrlt r1, [sp, #0x10]
	clzlt r1, r1
	rsblt r7, r1, #0x20
	ldr r2, [sp, #0xc]
	mov r1, #1
	tst r2, r1, lsl r7
	beq _022C2378
	mov r1, #0x24
	mul r4, r7, r1
	mov r6, #0
	b _022C235C
_022C2328:
	ldrb r2, [r5, r4]
	ldr r1, [fp, r6, lsl #2]
	cmp r2, r1
	bne _022C2358
	str r1, [sp]
	mov r0, #0
	str r0, [sp, #4]
	mov r0, sl
	mov r1, r7
	mov r2, sb
	mov r3, r8
	bl ov00_022C1A6C
_022C2358:
	add r6, r6, #1
_022C235C:
	cmp r0, #0
	bne _022C2370
	ldr r1, [fp, r6, lsl #2]
	cmp r1, #0
	bne _022C2328
_022C2370:
	cmp r0, #0
	strne r7, [sl, #0x2fc]
_022C2378:
	ldr r1, [sl, #0x2fc]
	cmp r7, r1
	bne _022C22EC
_022C2384:
	cmp r0, #0
	addne sp, sp, #0x14
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [sp, #8]
	mov r1, sb
	cmp r0, #0
	mov r0, sl
	beq _022C23C8
	mov r2, r8
	bl ov00_022C1ED4
	cmp r0, #0
	bne _022C23E8
	mov r0, sl
	mov r1, sb
	mov r2, r8
	bl ov00_022C20BC
	b _022C23E8
_022C23C8:
	mov r2, r8
	bl ov00_022C20BC
	cmp r0, #0
	bne _022C23E8
	mov r0, sl
	mov r1, sb
	mov r2, r8
	bl ov00_022C1ED4
_022C23E8:
	cmp r0, #0
	addne sp, sp, #0x14
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [sp, #8]
	mov r1, #1
	cmp r0, #0
	ldrne r0, _022C2440 ; =0x0000FFFE
	strb r1, [sb]
	moveq r0, #1
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	strb r0, [sb, #1]
	mov r0, r0, asr #8
	strb r0, [sb, #2]
	mov r0, #0
	strb r0, [sb, #3]
	mov r0, #4
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022C243C: .word ov00_0231804C
_022C2440: .word 0x0000FFFE
	arm_func_end ov00_022C2248

	arm_func_start ov00_022C2444
ov00_022C2444: ; 0x022C2444
	stmdb sp!, {r4, r5, r6, lr}
	mov r5, r0
	mov r3, #0x24
	mla r3, r2, r3, r5
	ldr r0, [r5]
	ldrb r6, [r3, #0xad]
	cmp r0, #0
	addne r4, r0, #4
	moveq r4, #0
	ldrb r3, [r4, #0xc]
	cmp r3, r6
	ldmneia sp!, {r4, r5, r6, pc}
	mov ip, #1
	mov lr, ip, lsl r2
	strb r6, [r4, #0xd]
	strh lr, [r4, #0xa]
	ldrh r3, [r4, #8]
	tst r3, ip, lsl r2
	beq _022C24D8
	mvn r2, lr
	and r2, r3, r2
	strh r2, [r4, #8]
	str r1, [r4, #4]
	mov r1, #0
	strh r1, [r4, #0xe]
	ldr r2, [r0, #0xa0]
	cmp r2, #0
	beq _022C24C4
	ldr r0, [r5, #8]
	mov r1, r4
	blx r2
	b _022C24D8
_022C24C4:
	ldr r1, [r4, #0x10]
	cmp r1, #0
	beq _022C24D8
	mov r0, r4
	blx r1
_022C24D8:
	ldrh r0, [r4, #8]
	cmp r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	ldr r3, [r5]
	mov r0, #1
	ldr r1, [r3]
	sub r2, r0, #1
	str r1, [r5]
_022C24F8:
	ldr r0, [r5, #4]
	subs r2, r2, #1
	str r0, [r3]
	str r3, [r5, #4]
	add r3, r3, #0xa4
	bpl _022C24F8
	mov r0, r5
	bl ov00_022C18C0
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022C2444

	arm_func_start ov00_022C251C
ov00_022C251C: ; 0x022C251C
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	mov r4, r1
	mov r1, #0x24
	mul r1, r4, r1
	mov r5, r0
	mov r6, #1
	movs ip, r2
	mvn r2, r6, lsl r4
	ldr r7, [r5, #0x30c]
	add r8, r5, #0xac
	and r2, r7, r2
	str r2, [r5, #0x30c]
	add r2, r8, r1
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	cmp r3, #4
	ldmloia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	ldrb r8, [ip]
	ldrb sl, [ip, #1]
	ldrb lr, [ip, #2]
	ldrb r7, [ip, #3]
	sub sb, r6, #2
	orr sl, sl, lr, lsl #8
	strb r7, [r2, #1]
	strb r8, [r2]
	ldr lr, [r5, #0x2ec]
	mov r7, sl, lsl #0x10
	cmp lr, sb
	beq _022C2914
	mov sb, r6, lsl lr
	tst sb, r7, lsr #16
	beq _022C2914
	cmp r8, #0x11
	bhs _022C2914
	mov r7, #0xc
	mul sb, r8, r7
	ldr r7, _022C2940 ; =ov00_02318064
	ldr r7, [r7, sb]
	cmp r3, r7
	blo _022C2914
	ldr r3, _022C2944 ; =ov00_02318060
	add r3, r3, sb
	ldr r3, [r3, #8]
	mov r7, r3, lsl #0x1f
	movs r7, r7, lsr #0x1f
	beq _022C2728
	cmp r8, #1
	beq _022C2914
	cmp r8, #2
	bne _022C2638
	ldrb r2, [ip, #4]
	ldrb r1, [ip, #5]
	mov r0, #0
	orr r1, r2, r1, lsl #8
	strh r1, [r5, #0x26]
	ldrb r2, [ip, #6]
	ldrb r1, [ip, #7]
	orr r1, r2, r1, lsl #8
	strh r1, [r5, #0x28]
	strh r0, [r5, #0x24]
	ldr r0, [r5, #0x2ec]
	cmp r0, #0
	beq _022C2628
	ldrsh r1, [r5, #0x28]
	add r0, r5, #0x200
	strh r1, [r0, #0xf2]
	ldrsh r1, [r5, #0x26]
	strh r1, [r0, #0xf0]
_022C2628:
	ldr r0, [r5, #0x30c]
	orr r0, r0, r6, lsl r4
	str r0, [r5, #0x30c]
	b _022C2914
_022C2638:
	cmp r8, #0xa
	bne _022C2674
	ldrb r0, [ip, #4]
	add r1, r5, #0x24
	strb r0, [r5, #0x2d]
	cmp r0, #9
	movhi r0, #0
	strhib r0, [r5, #0x2d]
	ldrb r2, [r5, #0x2d]
	add r0, ip, #5
	bl MemcpyFast
	ldr r0, [r5, #0x30c]
	orr r0, r0, r6, lsl r4
	str r0, [r5, #0x30c]
	b _022C2914
_022C2674:
	cmp r8, #4
	cmpne r8, #6
	bne _022C26D0
	ldrb r1, [ip, #4]
	ldrb r0, [ip, #5]
	ldrb r3, [ip, #6]
	ldrb r7, [ip, #7]
	orr r0, r1, r0, lsl #8
	orr r0, r0, r3, lsl #16
	orr r0, r0, r7, lsl #24
	str r0, [r2, #4]
	ldrb r1, [ip, #8]
	ldrb r0, [ip, #9]
	ldrb r3, [ip, #0xa]
	ldrb r7, [ip, #0xb]
	orr r0, r1, r0, lsl #8
	orr r0, r0, r3, lsl #16
	orr r0, r0, r7, lsl #24
	str r0, [r2, #8]
	ldr r0, [r5, #0x30c]
	orr r0, r0, r6, lsl r4
	str r0, [r5, #0x30c]
	b _022C2914
_022C26D0:
	cmp r8, #8
	bne _022C2914
	ldrb r1, [ip, #4]
	ldrb r0, [ip, #5]
	ldrb r3, [ip, #6]
	ldrb r7, [ip, #7]
	orr r0, r1, r0, lsl #8
	orr r0, r0, r3, lsl #16
	orr r0, r0, r7, lsl #24
	str r0, [r5, #0x24]
	ldrb r1, [ip, #4]
	ldrb r0, [ip, #5]
	ldrb r3, [ip, #6]
	ldrb r7, [ip, #7]
	orr r0, r1, r0, lsl #8
	orr r0, r0, r3, lsl #16
	orr r0, r0, r7, lsl #24
	str r0, [r2, #4]
	ldr r0, [r5, #0x30c]
	orr r0, r0, r6, lsl r4
	str r0, [r5, #0x30c]
	b _022C2914
_022C2728:
	mov r2, r3, lsl #0x1e
	movs r2, r2, lsr #0x1f
	beq _022C2904
	ldr r0, [r5]
	cmp r0, #0
	addne r2, r0, #4
	moveq r2, #0
	cmp r2, #0
	beq _022C2914
	cmp r8, #3
	bne _022C27C4
	ldr r0, [r2]
	cmp r0, #2
	bne _022C2914
	ldrb r1, [ip, #4]
	ldrb r0, [ip, #5]
	orr r0, r1, r0, lsl #8
	strh r0, [r2, #0x14]
	ldrb r1, [ip, #6]
	ldrb r0, [ip, #7]
	orr r0, r1, r0, lsl #8
	strh r0, [r2, #0x16]
	ldrb r1, [ip, #8]
	ldrb r0, [ip, #9]
	orr r0, r1, r0, lsl #8
	strh r0, [r2, #0x18]
	ldr r0, [r5, #0x2ec]
	cmp r0, #0
	beq _022C27B0
	ldrsh r1, [r2, #0x18]
	add r0, r5, #0x200
	strh r1, [r0, #0xf2]
	ldrsh r1, [r2, #0x16]
	strh r1, [r0, #0xf0]
_022C27B0:
	mov r0, r5
	mov r1, r8
	mov r2, r4
	bl ov00_022C2444
	b _022C2914
_022C27C4:
	cmp r8, #0xb
	bne _022C27EC
	ldr r0, [r2]
	cmp r0, #0xa
	bne _022C2914
	mov r0, r5
	mov r1, r8
	mov r2, r4
	bl ov00_022C2444
	b _022C2914
_022C27EC:
	cmp r8, #5
	cmpne r8, #7
	bne _022C28A8
	ldr r0, [r2]
	cmp r0, #4
	cmpne r0, #6
	bne _022C2914
	ldrb r3, [ip, #4]
	ldrb r0, [ip, #5]
	ldrb sb, [ip, #8]
	ldrb lr, [ip, #9]
	ldrb r7, [ip, #6]
	orr r3, r3, r0, lsl #8
	ldrb r0, [ip, #0xa]
	orr sb, sb, lr, lsl #8
	ldrb lr, [ip, #7]
	orr r7, r3, r7, lsl #16
	ldrb r3, [ip, #0xb]
	orr sb, sb, r0, lsl #16
	ldr r0, [r2, #0x14]
	orr r7, r7, lr, lsl #24
	cmp r7, r0
	orr r7, sb, r3, lsl #24
	bne _022C2914
	ldrh r0, [r2, #8]
	tst r0, r6, lsl r4
	beq _022C2914
	add r0, r5, #0xb8
	add sb, r0, r1
	ldr r0, [sb, #0xc]
	cmp r7, r0
	blt _022C2884
	mov r0, r5
	mov r2, r4
	mov r1, #0xf
	mov r3, #6
	bl ov00_022C19BC
	b _022C2914
_022C2884:
	add r0, r5, #0x200
	ldrsh r2, [r0, #0xf0]
	mov r0, sb
	mov r1, r7
	add r3, ip, #0xc
	bl ov00_022C1730
	cmp r0, #0
	strne r7, [sb, #0x14]
	b _022C2914
_022C28A8:
	cmp r8, #9
	bne _022C2914
	ldr r0, [r2]
	cmp r0, #4
	cmpne r0, #6
	bne _022C2914
	ldrb r3, [ip, #4]
	ldrb r1, [ip, #5]
	ldrb r7, [ip, #6]
	ldrb sb, [ip, #7]
	orr r1, r3, r1, lsl #8
	orr r1, r1, r7, lsl #16
	ldr r2, [r2, #0x14]
	orr r1, r1, sb, lsl #24
	cmp r2, r1
	bne _022C2914
	cmp r0, #4
	moveq r1, #5
	movne r1, #7
	mov r0, r5
	mov r2, r4
	bl ov00_022C2444
	b _022C2914
_022C2904:
	mov r2, r4
	mov r1, #0xf
	mov r3, #3
	bl ov00_022C19BC
_022C2914:
	ldr r0, [r5, #0x30c]
	tst r0, r6, lsl r4
	cmpne r8, #4
	cmpne r8, #6
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	mov r0, r5
	mov r1, r8
	mov r2, r4
	mov r3, #0
	bl ov00_022C19BC
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022C2940: .word ov00_02318064
_022C2944: .word ov00_02318060
	arm_func_end ov00_022C251C

	arm_func_start ov00_022C2948
ov00_022C2948: ; 0x022C2948
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r2
	str r1, [r5, #8]
	str r4, [r5, #0xc]
	mvn r0, #0
	str r0, [r5, #0x300]
	str r0, [r5, #0x304]
	str r0, [r5, #0x308]
	mov r1, #0
	str r1, [r5]
	str r1, [r5, #4]
	strb r1, [r5, #0x2f8]
	str r0, [r5, #0x2fc]
	add r0, r5, #0x10
	mov r2, #0x9c
	str r1, [r5, #0x30c]
	bl MemsetFast
	add r0, r5, #0xac
	mov r1, #0
	mov r2, #0x240
	bl MemsetFast
	mov r0, r5
	mov r1, r4
	bl ov00_022C29B0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022C2948

	arm_func_start ov00_022C29B0
ov00_022C29B0: ; 0x022C29B0
	mvn r2, #0
	str r2, [r0, #0x2ec]
	add r2, r0, #0x200
	mov r3, #0
	strh r3, [r2, #0xf0]
	strh r3, [r2, #0xf2]
	str r3, [r0, #0x2f4]
	str r1, [r0, #0xc]
	ldr r3, [r0]
	cmp r3, #0
	beq _022C29F8
	mov r1, #0
_022C29E0:
	ldr r2, [r3]
	str r2, [r0]
	str r1, [r3, #4]
	ldr r3, [r0]
	cmp r3, #0
	bne _022C29E0
_022C29F8:
	mov r2, #0
	str r2, [r0, #0x10]
	strh r2, [r0, #0x18]
	strh r2, [r0, #0x1a]
	mov r1, r2
_022C2A0C:
	add r2, r2, #1
	strb r1, [r0, #0xae]
	cmp r2, #0x10
	add r0, r0, #0x24
	blt _022C2A0C
	bx lr
	arm_func_end ov00_022C29B0

	arm_func_start ov00_022C2A24
ov00_022C2A24: ; 0x022C2A24
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r7, r1
	mov r8, r0
	mov r6, r2
	mov r5, r3
	bl EnableIrqFlag
	mov r4, r0
	cmp r7, #0
	beq _022C2A90
	ldr r0, [r8]
	mov r1, r8
	cmp r0, #0
	beq _022C2A68
_022C2A58:
	ldr r1, [r1]
	ldr r0, [r1]
	cmp r0, #0
	bne _022C2A58
_022C2A68:
	str r7, [r1]
	mov r0, #0
	str r0, [r7]
	strh r6, [r7, #0xc]
	str r5, [r7, #0xa0]
	ldr r0, [r8]
	cmp r0, r7
	bne _022C2A90
	mov r0, r8
	bl ov00_022C18C0
_022C2A90:
	mov r0, r4
	bl SetIrqFlag
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022C2A24

	arm_func_start ov00_022C2A9C
ov00_022C2A9C: ; 0x022C2A9C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov sl, r0
	mov sb, r1
	bl EnableIrqFlag
	ldr r6, [sl]
	str r0, [sp]
	cmp r6, #0
	addne r8, r6, #4
	moveq r8, #0
	cmp r8, #0
	beq _022C2BA8
	ldrh r0, [r8, #8]
	mov fp, #0x10
	mov r7, #0
	and sb, sb, r0
	mov r4, fp
	mov r5, #1
_022C2AE0:
	cmp sb, r5, lsl r7
	mov r2, r5, lsl r7
	blt _022C2B6C
	tst r2, sb
	mvneq r0, r2
	andeq sb, sb, r0
	beq _022C2B64
	ldr r0, [r6, #0xa0]
	cmp r0, #0
	beq _022C2B34
	str r4, [r8, #4]
	ldrh r3, [r8, #8]
	mvn r0, r2
	mov r1, r8
	and r0, r3, r0
	strh r0, [r8, #8]
	strh r2, [r8, #0xa]
	ldr r0, [sl, #8]
	ldr r2, [r6, #0xa0]
	blx r2
	b _022C2B64
_022C2B34:
	ldr r0, [r8, #0x10]
	cmp r0, #0
	beq _022C2B64
	str fp, [r8, #4]
	ldrh r3, [r8, #8]
	mvn r1, r2
	mov r0, r8
	and r1, r3, r1
	strh r1, [r8, #8]
	strh r2, [r8, #0xa]
	ldr r1, [r8, #0x10]
	blx r1
_022C2B64:
	add r7, r7, #1
	b _022C2AE0
_022C2B6C:
	ldrh r0, [r8, #8]
	cmp r0, #0
	bne _022C2BA8
	ldr r2, [sl]
	sub r1, r5, #1
	ldr r0, [r2]
	str r0, [sl]
_022C2B88:
	ldr r0, [sl, #4]
	subs r1, r1, #1
	str r0, [r2]
	str r2, [sl, #4]
	add r2, r2, #0xa4
	bpl _022C2B88
	mov r0, sl
	bl ov00_022C18C0
_022C2BA8:
	ldr r0, [sp]
	bl SetIrqFlag
	mov r0, sb
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022C2A9C

	arm_func_start ov00_022C2BB8
ov00_022C2BB8: ; 0x022C2BB8
	stmdb sp!, {r3, lr}
	add r0, r0, #0x200
	ldrsh r2, [r0, #0xf0]
	add r0, r1, r2
	mov r1, r2
	sub r0, r0, #1
	bl _s32_div_f
	add r0, r0, #0x1f
	bic r0, r0, #0x1f
	mov r0, r0, lsl #2
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022C2BB8

	arm_func_start ov00_022C2BE4
ov00_022C2BE4: ; 0x022C2BE4
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r8, r0
	mov r4, r1
	mov r7, r2
	mov r6, r3
	bl EnableIrqFlag
	ldr r1, [r8, #0x2f4]
	mov r5, r0
	cmp r1, #0
	add r0, r8, #0x2f4
	beq _022C2C20
_022C2C10:
	add r0, r1, #0x28
	ldr r1, [r1, #0x28]
	cmp r1, #0
	bne _022C2C10
_022C2C20:
	str r4, [r0]
	mov r1, #0
	str r1, [r4, #0x28]
	ldr r0, [sp, #0x1c]
	str r7, [r4]
	str r0, [r4, #4]
	cmp r6, #0
	mov r2, #0x20
	bne _022C2C50
	add r0, r4, #8
	bl MemsetFast
	b _022C2C5C
_022C2C50:
	mov r0, r6
	add r1, r4, #8
	bl MemcpyFast
_022C2C5C:
	ldr r0, [sp, #0x18]
	mov r1, #0
	str r0, [r4, #0x2c]
	cmp r0, #0
	strh r1, [r4, #0x30]
	moveq r1, #1
	mov r0, r5
	strh r1, [r4, #0x32]
	bl SetIrqFlag
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022C2BE4

	arm_func_start ov00_022C2C84
ov00_022C2C84: ; 0x022C2C84
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	mov r4, #0
	bl EnableIrqFlag
	ldr r3, [r6, #0x2f4]
	add r2, r6, #0x2f4
	cmp r3, #0
	beq _022C2CD4
_022C2CA8:
	ldr r1, [r3]
	cmp r1, r5
	bne _022C2CC4
	ldr r1, [r3, #0x28]
	mov r4, r3
	str r1, [r2]
	b _022C2CD4
_022C2CC4:
	add r2, r3, #0x28
	ldr r3, [r3, #0x28]
	cmp r3, #0
	bne _022C2CA8
_022C2CD4:
	bl SetIrqFlag
	mov r0, r4
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022C2C84

	arm_func_start ov00_022C2CE0
ov00_022C2CE0: ; 0x022C2CE0
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, #0
	bl EnableIrqFlag
	ldr r1, [r5, #0x2f4]
	cmp r1, #0
	beq _022C2D0C
_022C2CFC:
	ldr r1, [r1, #0x28]
	add r4, r4, #1
	cmp r1, #0
	bne _022C2CFC
_022C2D0C:
	bl SetIrqFlag
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022C2CE0

	arm_func_start ov00_022C2D18
ov00_022C2D18: ; 0x022C2D18
	ldr r0, _022C2D38 ; =ov00_0231EE88
	ldr r0, [r0, #0x440]
	cmp r0, #0
	bxeq lr
_022C2D28:
	ldr r0, [r0, #0x28]
	cmp r0, #0
	bne _022C2D28
	bx lr
	.align 2, 0
_022C2D38: .word ov00_0231EE88
	arm_func_end ov00_022C2D18

	arm_func_start ov00_022C2D3C
ov00_022C2D3C: ; 0x022C2D3C
	cmp r0, #0
	mvneq r0, #0
	bxeq lr
	mvn r1, r0
	sub r0, r0, #1
	and r0, r1, r0
	clz r0, r0
	rsb r0, r0, #0x20
	bx lr
	arm_func_end ov00_022C2D3C

	arm_func_start ov00_022C2D60
ov00_022C2D60: ; 0x022C2D60
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r6, r1
	mov r5, r2
	bl EnableIrqFlag
	ldr r3, _022C2E0C ; =ov00_0231EE88
	mov r4, r0
	ldr r0, [r3]
	cmp r0, #0
	bne _022C2E00
	mov r1, #0
	mov ip, #1
	ldr r0, _022C2E10 ; =ov00_0231EFD4
	mov r2, r1
	str ip, [r3]
	bl ov00_022C2948
	ldr r3, _022C2E0C ; =ov00_0231EE88
	ldr r0, _022C2E14 ; =ov00_0231EE8C
	mov r1, #0
	mov r2, #0x148
	str r5, [r3, #0x16c]
	bl MemsetFast
	mov r0, #2
	sub r2, r0, #1
	ldr r3, _022C2E14 ; =ov00_0231EE8C
	ldr r0, _022C2E0C ; =ov00_0231EE88
_022C2DC8:
	ldr r1, [r0, #0x150]
	subs r2, r2, #1
	str r1, [r3]
	str r3, [r0, #0x150]
	add r3, r3, #0xa4
	bpl _022C2DC8
	ldr r1, _022C2E0C ; =ov00_0231EE88
	mov r2, #0
	ldr r0, _022C2E18 ; =ov00_0231F288
	str r2, [r1, #0x438]
	sub r1, r7, #0xe
	strh r1, [r0, #0x3e]
	sub r1, r6, #0xe
	strh r1, [r0, #0x3c]
_022C2E00:
	mov r0, r4
	bl SetIrqFlag
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022C2E0C: .word ov00_0231EE88
_022C2E10: .word ov00_0231EFD4
_022C2E14: .word ov00_0231EE8C
_022C2E18: .word ov00_0231F288
	arm_func_end ov00_022C2D60

	arm_func_start ov00_022C2E1C
ov00_022C2E1C: ; 0x022C2E1C
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	bl EnableIrqFlag
	ldr r3, _022C2EA0 ; =ov00_0231EE88
	mov r4, r0
	ldr r0, [r3]
	cmp r0, #0
	bne _022C2E94
	mov r1, #0
	mov ip, #1
	ldr r0, _022C2EA4 ; =ov00_0231EFD4
	mov r2, r1
	str ip, [r3]
	bl ov00_022C2948
	ldr r3, _022C2EA0 ; =ov00_0231EE88
	ldr r0, _022C2EA8 ; =ov00_0231EE8C
	mov r1, #0
	mov r2, #0x148
	str r5, [r3, #0x16c]
	bl MemsetFast
	mov r0, #2
	sub r2, r0, #1
	ldr r3, _022C2EA8 ; =ov00_0231EE8C
	ldr r0, _022C2EA0 ; =ov00_0231EE88
_022C2E7C:
	ldr r1, [r0, #0x150]
	subs r2, r2, #1
	str r1, [r3]
	str r3, [r0, #0x150]
	add r3, r3, #0xa4
	bpl _022C2E7C
_022C2E94:
	mov r0, r4
	bl SetIrqFlag
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022C2EA0: .word ov00_0231EE88
_022C2EA4: .word ov00_0231EFD4
_022C2EA8: .word ov00_0231EE8C
	arm_func_end ov00_022C2E1C

	arm_func_start ov00_022C2EAC
ov00_022C2EAC: ; 0x022C2EAC
	stmdb sp!, {r4, lr}
	bl EnableIrqFlag
	ldr r2, _022C2EE8 ; =ov00_0231EE88
	mov r4, r0
	ldr r0, [r2]
	cmp r0, #0
	beq _022C2EDC
	mov r1, #0
	str r1, [r2]
	ldr r0, _022C2EEC ; =ov00_0231EFD4
	str r1, [r2, #0x16c]
	bl ov00_022C29B0
_022C2EDC:
	mov r0, r4
	bl SetIrqFlag
	ldmia sp!, {r4, pc}
	.align 2, 0
_022C2EE8: .word ov00_0231EE88
_022C2EEC: .word ov00_0231EFD4
	arm_func_end ov00_022C2EAC

	arm_func_start ov00_022C2EF0
ov00_022C2EF0: ; 0x022C2EF0
	ldr r3, _022C2F1C ; =ov00_0231EFD4
	mvn r1, #0
	ldr r2, [r3, #0x2ec]
	cmp r2, r1
	bxne lr
	add r1, r3, #0x200
	mov r2, #0
	strh r2, [r1, #0xf2]
	strh r2, [r1, #0xf0]
	str r0, [r3, #0x2ec]
	bx lr
	.align 2, 0
_022C2F1C: .word ov00_0231EFD4
	arm_func_end ov00_022C2EF0

	arm_func_start ov00_022C2F20
ov00_022C2F20: ; 0x022C2F20
	ldr ip, _022C2F3C ; =ov00_022C2248
	mov r3, r0
	mov r2, r1
	mov r1, r3
	ldr r0, _022C2F40 ; =ov00_0231EFD4
	mov r3, #1
	bx ip
	.align 2, 0
_022C2F3C: .word ov00_022C2248
_022C2F40: .word ov00_0231EFD4
	arm_func_end ov00_022C2F20

	arm_func_start ov00_022C2F44
ov00_022C2F44: ; 0x022C2F44
	ldr ip, _022C2F60 ; =ov00_022C2248
	mov r3, r0
	mov r2, r1
	mov r1, r3
	ldr r0, _022C2F64 ; =ov00_0231EFD4
	mov r3, #0
	bx ip
	.align 2, 0
_022C2F60: .word ov00_022C2248
_022C2F64: .word ov00_0231EFD4
	arm_func_end ov00_022C2F44

	arm_func_start ov00_022C2F68
ov00_022C2F68: ; 0x022C2F68
	stmdb sp!, {r3, lr}
	mov ip, r0
	mov r3, r1
	mov r1, r2
	ldr r0, _022C2F88 ; =ov00_0231EFD4
	mov r2, ip
	bl ov00_022C251C
	ldmia sp!, {r3, pc}
	.align 2, 0
_022C2F88: .word ov00_0231EFD4
	arm_func_end ov00_022C2F68

	arm_func_start ov00_022C2F8C
ov00_022C2F8C: ; 0x022C2F8C
	ldr ip, _022C2FA4 ; =ov00_022C251C
	mov r2, r0
	mov r3, r1
	ldr r0, _022C2FA8 ; =ov00_0231EFD4
	mov r1, #0
	bx ip
	.align 2, 0
_022C2FA4: .word ov00_022C251C
_022C2FA8: .word ov00_0231EFD4
	arm_func_end ov00_022C2F8C

	arm_func_start ov00_022C2FAC
ov00_022C2FAC: ; 0x022C2FAC
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #8
	mov r5, r0
	mov r4, r1
	mov lr, r2
	str r3, [sp]
	ldr ip, [sp, #0x18]
	ldr r0, _022C2FEC ; =ov00_0231EFD4
	mov r1, r5
	mov r2, r4
	mov r3, lr
	str ip, [sp, #4]
	bl ov00_022C2BE4
	mov r0, #1
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022C2FEC: .word ov00_0231EFD4
	arm_func_end ov00_022C2FAC

	arm_func_start ov00_022C2FF0
ov00_022C2FF0: ; 0x022C2FF0
	ldr ip, _022C3000 ; =ov00_022C2C84
	mov r1, r0
	ldr r0, _022C3004 ; =ov00_0231EFD4
	bx ip
	.align 2, 0
_022C3000: .word ov00_022C2C84
_022C3004: .word ov00_0231EFD4
	arm_func_end ov00_022C2FF0

	arm_func_start ov00_022C3008
ov00_022C3008: ; 0x022C3008
	stmdb sp!, {r4, lr}
	ldr r3, _022C3064 ; =ov00_0231EE88
	mov r2, r0
	ldr r4, [r3, #0x150]
	cmp r4, #0
	beq _022C3030
	ldr ip, [r4]
	mov r0, #0
	str ip, [r3, #0x150]
	str r0, [r4]
_022C3030:
	cmp r4, #0
	beq _022C3054
	ldr r0, _022C3068 ; =ov00_0231EFD4
	str r1, [r4, #0x14]
	mov ip, #2
	mov r1, r4
	mov r3, #0
	str ip, [r4, #4]
	bl ov00_022C2A24
_022C3054:
	cmp r4, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r4, pc}
	.align 2, 0
_022C3064: .word ov00_0231EE88
_022C3068: .word ov00_0231EFD4
	arm_func_end ov00_022C3008

	arm_func_start ov00_022C306C
ov00_022C306C: ; 0x022C306C
	stmdb sp!, {r3, r4, r5, lr}
	ldr lr, _022C3104 ; =ov00_0231EE88
	mov ip, r0
	ldr r4, [lr, #0x150]
	cmp r4, #0
	beq _022C3094
	ldr r5, [r4]
	mov r0, #0
	str r5, [lr, #0x150]
	str r0, [r4]
_022C3094:
	cmp r4, #0
	beq _022C30F4
	str r3, [r4, #0x14]
	str r1, [r4, #0x18]
	add r5, r4, #0x18
	mov r0, #0x28
	ldr lr, _022C3108 ; =ov00_0231F2E4
	str r0, [r5, #4]
	mov r3, #0
_022C30B8:
	add r1, r5, r3, lsl #2
	str lr, [r1, #0x48]
	ldr r0, [r2, r3, lsl #2]
	add r3, r3, #1
	str r0, [r1, #8]
	cmp r3, #0x10
	add lr, lr, #0x28
	blt _022C30B8
	ldr r0, _022C310C ; =ov00_0231EFD4
	mov lr, #6
	mov r1, r4
	mov r2, ip
	mov r3, #0
	str lr, [r4, #4]
	bl ov00_022C2A24
_022C30F4:
	cmp r4, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022C3104: .word ov00_0231EE88
_022C3108: .word ov00_0231F2E4
_022C310C: .word ov00_0231EFD4
	arm_func_end ov00_022C306C

	arm_func_start ov00_022C3110
ov00_022C3110: ; 0x022C3110
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	ldr r5, _022C31CC ; =ov00_0231EE88
	mov lr, r0
	ldr r4, [r5, #0x150]
	mov ip, r2
	cmp r4, #0
	beq _022C313C
	ldr r2, [r4]
	mov r0, #0
	str r2, [r5, #0x150]
	str r0, [r4]
_022C313C:
	cmp r4, #0
	beq _022C31BC
	ldr r0, [sp, #0x1c]
	add r8, r4, #0x20
	str r0, [r4, #0x14]
	str r1, [r4, #0x18]
	str r3, [r4, #0x1c]
	ldmia ip!, {r0, r1, r2, r3}
	stmia r8!, {r0, r1, r2, r3}
	ldmia ip!, {r0, r1, r2, r3}
	stmia r8!, {r0, r1, r2, r3}
	ldr r7, [sp, #0x18]
	add r6, r4, #0x60
	mov r5, #4
	ldmia ip!, {r0, r1, r2, r3}
	stmia r8!, {r0, r1, r2, r3}
	ldmia ip, {r0, r1, r2, r3}
	stmia r8, {r0, r1, r2, r3}
	ldmia r7!, {r0, r1, r2, r3}
	stmia r6!, {r0, r1, r2, r3}
	ldmia r7!, {r0, r1, r2, r3}
	stmia r6!, {r0, r1, r2, r3}
	ldmia r7!, {r0, r1, r2, r3}
	stmia r6!, {r0, r1, r2, r3}
	ldmia r7, {r0, r1, r2, r3}
	stmia r6, {r0, r1, r2, r3}
	str r5, [r4, #4]
	mov r2, lr
	ldr r0, _022C31D0 ; =ov00_0231EFD4
	mov r1, r4
	mov r3, #0
	bl ov00_022C2A24
_022C31BC:
	cmp r4, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022C31CC: .word ov00_0231EE88
_022C31D0: .word ov00_0231EFD4
	arm_func_end ov00_022C3110

	arm_func_start ov00_022C31D4
ov00_022C31D4: ; 0x022C31D4
	stmdb sp!, {r3, r4, r5, lr}
	ldr ip, _022C3244 ; =ov00_0231EE88
	mov r5, r0
	ldr r4, [ip, #0x150]
	cmp r4, #0
	beq _022C31FC
	ldr lr, [r4]
	mov r0, #0
	str lr, [ip, #0x150]
	str r0, [r4]
_022C31FC:
	cmp r4, #0
	beq _022C3234
	mov r0, r1
	str r3, [r4, #0x14]
	add r1, r4, #0x18
	strb r2, [r4, #0x21]
	bl MemcpyFast
	mov ip, #0xa
	ldr r0, _022C3248 ; =ov00_0231EFD4
	mov r1, r4
	mov r2, r5
	mov r3, #0
	str ip, [r4, #4]
	bl ov00_022C2A24
_022C3234:
	cmp r4, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022C3244: .word ov00_0231EE88
_022C3248: .word ov00_0231EFD4
	arm_func_end ov00_022C31D4

	arm_func_start ov00_022C324C
ov00_022C324C: ; 0x022C324C
	stmdb sp!, {r3, lr}
	mov r1, r0
	ldr r0, _022C326C ; =ov00_0231EFD4
	bl ov00_022C2A9C
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022C326C: .word ov00_0231EFD4
	arm_func_end ov00_022C324C

	arm_func_start ov00_022C3270
ov00_022C3270: ; 0x022C3270
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl EnableIrqFlag
	ldr r1, _022C3294 ; =ov00_0232502C
	ldr r1, [r1]
	add r1, r1, #0x1000
	str r4, [r1, #0x4e4]
	bl SetIrqFlag
	ldmia sp!, {r4, pc}
	.align 2, 0
_022C3294: .word ov00_0232502C
	arm_func_end ov00_022C3270

	arm_func_start ov00_022C3298
ov00_022C3298: ; 0x022C3298
	stmdb sp!, {r4, lr}
	ldr r1, _022C32E0 ; =ov00_0232502C
	mov r4, r0
	ldr r1, [r1]
	cmp r1, #0
	beq _022C32D8
	bl ov00_022C4664
	cmp r0, #0
	beq _022C32D8
	ldr r0, _022C32E0 ; =ov00_0232502C
	sub r1, r4, #1
	ldr r0, [r0]
	add r0, r0, r1, lsl #2
	add r0, r0, #0x1000
	ldr r0, [r0, #0x4e8]
	ldmia sp!, {r4, pc}
_022C32D8:
	mov r0, #0
	ldmia sp!, {r4, pc}
	.align 2, 0
_022C32E0: .word ov00_0232502C
	arm_func_end ov00_022C3298

	arm_func_start ov00_022C32E4
ov00_022C32E4: ; 0x022C32E4
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	bl EnableIrqFlag
	ldr r1, _022C3364 ; =ov00_0232502C
	mov r4, r0
	ldr r0, [r1]
	cmp r0, #0
	beq _022C3354
	mov r0, r5
	bl ov00_022C4664
	cmp r0, #0
	beq _022C3354
	ldr r0, _022C3364 ; =ov00_0232502C
	sub r1, r5, #1
	ldr r3, [r0]
	mov r2, #0x16
	add r0, r3, #0x1340
	mla r0, r1, r2, r0
	add r1, r3, #0x72
	add r1, r1, #0x1700
	bl MemcpyFast
	mov r0, r4
	bl SetIrqFlag
	ldr r0, _022C3364 ; =ov00_0232502C
	ldr r0, [r0]
	add r0, r0, #0x72
	add r0, r0, #0x1700
	ldmia sp!, {r3, r4, r5, pc}
_022C3354:
	mov r0, r4
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022C3364: .word ov00_0232502C
	arm_func_end ov00_022C32E4

	arm_func_start ov00_022C3368
ov00_022C3368: ; 0x022C3368
	stmdb sp!, {r4, lr}
	ldr r1, _022C33B8 ; =ov00_0232502C
	mov r4, r0
	ldr r1, [r1]
	cmp r1, #0
	beq _022C33B0
	bl ov00_022C4664
	cmp r0, #0
	beq _022C33B0
	ldr r0, _022C33B8 ; =ov00_0232502C
	sub r1, r4, #1
	ldr r0, [r0]
	add r0, r0, r1, lsl #2
	add r0, r0, #0x1000
	ldr r0, [r0, #0x4e8]
	cmp r0, #7
	moveq r0, #1
	ldmeqia sp!, {r4, pc}
_022C33B0:
	mov r0, #0
	ldmia sp!, {r4, pc}
	.align 2, 0
_022C33B8: .word ov00_0232502C
	arm_func_end ov00_022C3368

	arm_func_start ov00_022C33BC
ov00_022C33BC: ; 0x022C33BC
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r4, r1
	mov r7, r0
	bl EnableIrqFlag
	mov r6, r0
	cmp r4, #3
	addls pc, pc, r4, lsl #2
	b _022C341C
_022C33DC: ; jump table
	b _022C33EC ; case 0
	b _022C33F8 ; case 1
	b _022C3404 ; case 2
	b _022C3410 ; case 3
_022C33EC:
	mov r5, #0xa
	mov r4, #4
	b _022C342C
_022C33F8:
	mov r5, #0xa
	mov r4, #3
	b _022C342C
_022C3404:
	mov r5, #0xe
	mov r4, #2
	b _022C342C
_022C3410:
	mov r5, #7
	mov r4, #5
	b _022C342C
_022C341C:
	mov r0, r6
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022C342C:
	ldr r0, _022C3498 ; =ov00_0232502C
	ldr r0, [r0]
	cmp r0, #0
	beq _022C3488
	mov r0, r7
	bl ov00_022C4664
	cmp r0, #0
	beq _022C3488
	ldr r0, _022C3498 ; =ov00_0232502C
	sub r2, r7, #1
	ldr r1, [r0]
	add r0, r1, r2, lsl #2
	add r0, r0, #0x1000
	ldr r0, [r0, #0x4e8]
	cmp r5, r0
	bne _022C3488
	add r0, r1, r2, lsl #1
	add r1, r0, #0x1700
	mov r0, r6
	strh r4, [r1, #0x54]
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022C3488:
	mov r0, r6
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022C3498: .word ov00_0232502C
	arm_func_end ov00_022C33BC

	arm_func_start ov00_022C349C
ov00_022C349C: ; 0x022C349C
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	mov r4, r2
	bl ov00_022C4664
	cmp r0, #0
	beq _022C34D0
	ldr r0, _022C34E4 ; =ov00_0232502C
	sub r1, r6, #1
	ldr r0, [r0]
	add r0, r0, r1, lsl #2
	add r0, r0, #0x1000
	str r5, [r0, #0x4e8]
_022C34D0:
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_022C34E8
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022C34E4: .word ov00_0232502C
	arm_func_end ov00_022C349C

	arm_func_start ov00_022C34E8
ov00_022C34E8: ; 0x022C34E8
	stmdb sp!, {r3, lr}
	ldr r3, _022C350C ; =ov00_0232502C
	ldr r3, [r3]
	add r3, r3, #0x1000
	ldr r3, [r3, #0x4e4]
	cmp r3, #0
	ldmeqia sp!, {r3, pc}
	blx r3
	ldmia sp!, {r3, pc}
	.align 2, 0
_022C350C: .word ov00_0232502C
	arm_func_end ov00_022C34E8

	arm_func_start ov00_022C3510
ov00_022C3510: ; 0x022C3510
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r5, r0
	mov r4, r1
	cmp r5, #0x19
	bgt _022C3568
	bge _022C37AC
	cmp r5, #0x11
	bgt _022C355C
	bge _022C3960
	cmp r5, #3
	bgt _022C3960
	cmp r5, #0
	blt _022C3960
	beq _022C35A0
	cmp r5, #1
	beq _022C35C4
	cmp r5, #3
	beq _022C37A0
	b _022C3960
_022C355C:
	cmp r5, #0x15
	beq _022C358C
	b _022C3960
_022C3568:
	cmp r5, #0xff
	bgt _022C3580
	bge _022C384C
	cmp r5, #0x1c
	beq _022C37B4
	b _022C3960
_022C3580:
	cmp r5, #0x100
	beq _022C38BC
	b _022C3960
_022C358C:
	mov r2, r4
	mov r0, #0
	mov r1, #1
	bl ov00_022C349C
	b _022C3960
_022C35A0:
	ldrh r0, [r4, #0x10]
	cmp r0, #0
	beq _022C3960
	cmp r0, #0x10
	bhs _022C3960
	mov r2, r4
	mov r1, #2
	bl ov00_022C349C
	b _022C3960
_022C35C4:
	ldrh r0, [r4, #0x10]
	cmp r0, #0
	beq _022C3960
	cmp r0, #0x10
	bhs _022C3960
	ldr r2, _022C39A8 ; =ov00_0232502C
	sub r0, r0, #1
	ldr r3, [r2]
	mov r1, #0
	add r0, r3, r0, lsl #1
	add r0, r0, #0x1400
	strh r1, [r0, #0x8a]
	ldr r0, [r2]
	ldrh r2, [r4, #0x10]
	add r0, r0, #0xa8
	add r3, r0, #0x1400
	sub r0, r2, #1
	add r0, r3, r0, lsl #2
	mov r2, #4
	bl MemsetFast
	ldr r0, _022C39A8 ; =ov00_0232502C
	ldrh r1, [r4, #0x10]
	ldr r0, [r0]
	mov r2, #0x16
	add r0, r0, #0x1340
	sub r1, r1, #1
	mla r0, r1, r2, r0
	mov r1, #0
	bl MemsetFast
	ldrh r0, [r4, #0x10]
	bl ov00_022C7E70
	ldrh r1, [r4, #0x10]
	ldr r0, _022C39A8 ; =ov00_0232502C
	mov r3, #0
	ldr r2, [r0]
	sub r1, r1, #1
	add r1, r2, r1, lsl #1
	add r1, r1, #0x1700
	strh r3, [r1, #0x54]
	ldrh r7, [r4, #0x10]
	ldr r8, [r0]
	sub r2, r3, #1
	sub r6, r7, #1
	add r1, r8, r6
	add r1, r1, #0x1500
	ldrsb r3, [r1, #0x26]
	cmp r3, r2
	beq _022C36F0
	ldr r1, _022C39AC ; =0x000005D4
	and r2, r3, #0xff
	mul r1, r2, r1
	add r2, r8, r1
	add r8, r2, #0x1d00
	mov r3, #1
	ldrh sb, [r8, #0x4e]
	mvn r2, r3, lsl r7
	and sb, sb, r2
	strh sb, [r8, #0x4e]
	ldr r8, [r0]
	sub sb, r3, #2
	add r8, r8, r1
	add r8, r8, #0x1d00
	ldrh ip, [r8, #0x50]
	orr r3, ip, r3, lsl r7
	strh r3, [r8, #0x50]
	ldr r3, [r0]
	add r3, r3, r6
	add r3, r3, #0x1000
	strb sb, [r3, #0x526]
	ldr r0, [r0]
	add r0, r0, r1
	add r0, r0, #0x1d00
	ldrh r1, [r0, #0x4c]
	and r1, r1, r2
	strh r1, [r0, #0x4c]
_022C36F0:
	ldr r1, _022C39A8 ; =ov00_0232502C
	ldrh r2, [r4, #0x10]
	ldr r6, [r1]
	mov r3, #1
	add r0, r6, #0x1500
	ldrh r0, [r0, #0x36]
	tst r0, r3, lsl r2
	beq _022C373C
	add r0, r6, #0x1000
	ldrb r2, [r0, #0x535]
	sub r2, r2, #1
	strb r2, [r0, #0x535]
	ldr r0, [r1]
	ldrh r1, [r4, #0x10]
	add r0, r0, #0x1500
	ldrh r2, [r0, #0x36]
	mvn r1, r3, lsl r1
	and r1, r2, r1
	strh r1, [r0, #0x36]
_022C373C:
	ldrh r0, [r4, #0x10]
	ldr r1, _022C39A8 ; =ov00_0232502C
	ldr r2, [r1]
	sub r1, r0, #1
	add r1, r2, r1, lsl #2
	add r1, r1, #0x1000
	ldr r1, [r1, #0x4e8]
	cmp r1, #8
	bne _022C376C
	mov r1, #9
	mov r2, #0
	bl ov00_022C349C
_022C376C:
	ldrh r0, [r4, #0x10]
	mov r2, r4
	mov r1, #3
	bl ov00_022C349C
	ldrh r1, [r4, #0x10]
	ldr r0, _022C39A8 ; =ov00_0232502C
	mov r3, #0
	ldr r2, [r0]
	sub r0, r1, #1
	add r0, r2, r0, lsl #2
	add r0, r0, #0x1000
	str r3, [r0, #0x4e8]
	b _022C3960
_022C37A0:
	mov r0, r4
	bl ov00_022C3E94
	b _022C3960
_022C37AC:
	bl ov00_022C4458
	b _022C3960
_022C37B4:
	mov r8, #0
	ldr r6, _022C39A8 ; =ov00_0232502C
	ldr r4, _022C39AC ; =0x000005D4
	mov r7, r8
_022C37C4:
	mul sb, r8, r4
	ldr r1, [r6]
	add r2, r1, sb
	add r0, r2, #0x1000
	ldrb r0, [r0, #0xd52]
	cmp r0, #0
	addne r2, r2, #0x1d00
	ldrneh r3, [r2, #0x50]
	cmpne r3, #0
	beq _022C3814
	add r0, r1, #0x6c
	add r0, r0, #0x1800
	ldrh r2, [r2, #0x4e]
	add r0, r0, sb
	add r1, r1, #0x1340
	bl ov00_022C5590
	ldr r0, [r6]
	add r0, r0, sb
	add r0, r0, #0x1d00
	strh r7, [r0, #0x50]
_022C3814:
	add r0, r8, #1
	and r8, r0, #0xff
	cmp r8, #0x10
	blo _022C37C4
	bl ov00_022C78A0
	mov r6, r0
	bl ov00_022C78B4
	mov r4, r0
	bl ov00_022C78C8
	mov r2, r0
	mov r0, r6
	mov r1, r4
	bl ov00_022C56BC
	b _022C3960
_022C384C:
	ldrh r0, [r4, #2]
	cmp r0, #0xf
	addls pc, pc, r0, lsl #2
	b _022C38AC
_022C385C: ; jump table
	b _022C38AC ; case 0
	b _022C389C ; case 1
	b _022C38AC ; case 2
	b _022C38AC ; case 3
	b _022C389C ; case 4
	b _022C389C ; case 5
	b _022C389C ; case 6
	b _022C38AC ; case 7
	b _022C389C ; case 8
	b _022C389C ; case 9
	b _022C38AC ; case 10
	b _022C38AC ; case 11
	b _022C38AC ; case 12
	b _022C38AC ; case 13
	b _022C38AC ; case 14
	b _022C38AC ; case 15
_022C389C:
	mov r0, #0
	mov r1, #9
	bl ov00_022C4680
	b _022C3960
_022C38AC:
	mov r0, #0
	mov r1, #8
	bl ov00_022C4680
	b _022C3960
_022C38BC:
	ldrh r0, [r4]
	cmp r0, #0x1d
	addls pc, pc, r0, lsl #2
	b _022C3954
_022C38CC: ; jump table
	b _022C3944 ; case 0
	b _022C3954 ; case 1
	b _022C3954 ; case 2
	b _022C3954 ; case 3
	b _022C3954 ; case 4
	b _022C3954 ; case 5
	b _022C3954 ; case 6
	b _022C3944 ; case 7
	b _022C3944 ; case 8
	b _022C3954 ; case 9
	b _022C3954 ; case 10
	b _022C3954 ; case 11
	b _022C3954 ; case 12
	b _022C3944 ; case 13
	b _022C3944 ; case 14
	b _022C3944 ; case 15
	b _022C3954 ; case 16
	b _022C3944 ; case 17
	b _022C3944 ; case 18
	b _022C3954 ; case 19
	b _022C3954 ; case 20
	b _022C3944 ; case 21
	b _022C3954 ; case 22
	b _022C3954 ; case 23
	b _022C3954 ; case 24
	b _022C3944 ; case 25
	b _022C3954 ; case 26
	b _022C3954 ; case 27
	b _022C3954 ; case 28
	b _022C3944 ; case 29
_022C3944:
	mov r0, #0
	mov r1, #9
	bl ov00_022C4680
	b _022C3960
_022C3954:
	mov r0, #0
	mov r1, #8
	bl ov00_022C4680
_022C3960:
	cmp r5, #0x11
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	ldr r1, _022C39A8 ; =ov00_0232502C
	mov r0, #0
	ldr r1, [r1]
	mov r2, #0x7d00
	add r3, r1, #0x1000
	ldr r4, [r3, #0x4e4]
	bl ArrayFill32Fast
	ldr r1, _022C39A8 ; =ov00_0232502C
	mov r0, #0
	str r0, [r1]
	cmp r4, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	mov r2, r0
	mov r1, #0xc
	blx r4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022C39A8: .word ov00_0232502C
_022C39AC: .word 0x000005D4
	arm_func_end ov00_022C3510

	arm_func_start ov00_022C39B0
ov00_022C39B0: ; 0x022C39B0
	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
	sub sp, sp, #0x34
	movs r6, r1
	addeq sp, sp, #0x34
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	cmp r6, #0xf
	addhi sp, sp, #0x34
	ldmhiia sp!, {r3, r4, r5, r6, r7, r8, pc}
	add r1, sp, #0x20
	mov r2, r6
	add r0, r0, #0xa
	bl ov00_022C7F38
	ldr r1, _022C3E88 ; =ov00_0232502C
	ldrb r7, [sp, #0x20]
	ldr r2, [r1]
	sub r3, r6, #1
	add r4, r2, r3, lsl #2
	add r4, r4, #0x1000
	ldr r4, [r4, #0x4e8]
	mov r5, r0
	cmp r7, #0xb
	addls pc, pc, r7, lsl #2
	b _022C3E80
_022C3A0C: ; jump table
	b _022C3E80 ; case 0
	b _022C3E80 ; case 1
	b _022C3E80 ; case 2
	b _022C3E80 ; case 3
	b _022C3E80 ; case 4
	b _022C3E80 ; case 5
	b _022C3E80 ; case 6
	b _022C3A3C ; case 7
	b _022C3CD4 ; case 8
	b _022C3D7C ; case 9
	b _022C3DEC ; case 10
	b _022C3E80 ; case 11
_022C3A3C:
	cmp r4, #2
	bne _022C3AE4
	cmp r5, #0
	addeq sp, sp, #0x34
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	add r1, sp, #0
	mov r2, #0x1d
	bl MemcpyFast
	ldr r2, _022C3E88 ; =ov00_0232502C
	sub r0, r6, #1
	ldr r1, [r2]
	ldr r3, [sp]
	add r1, r1, r0, lsl #2
	add r1, r1, #0x1000
	str r3, [r1, #0x4a8]
	ldr r1, [r2]
	ldrh r3, [sp, #0x1a]
	add r1, r1, r0, lsl #1
	add r1, r1, #0x1400
	strh r3, [r1, #0x8a]
	ldr r1, [r2]
	mov r2, #0x16
	add r1, r1, #0x1340
	mla r1, r0, r2, r1
	add r0, sp, #4
	bl MemcpyFast
	ldr r0, _022C3E88 ; =ov00_0232502C
	sub r2, r6, #1
	ldr r3, [r0]
	mov r0, #0x16
	mul r7, r2, r0
	add r8, r3, #0x1340
	and r1, r6, #0xff
	ldrb r3, [r8, r7]
	mov r0, r1, lsl #0x1c
	add r2, sp, #4
	bic r1, r3, #0xf0
	orr r1, r1, r0, lsr #24
	strb r1, [r8, r7]
	mov r0, r6
	mov r1, #0xa
	bl ov00_022C349C
_022C3AE4:
	cmp r4, #0xa
	addne sp, sp, #0x34
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldrb lr, [r5, #0x1c]
	mov r0, #0
	cmp lr, #0x10
	bhs _022C3B40
	ldr r2, _022C3E88 ; =ov00_0232502C
	ldr r1, _022C3E8C ; =0x000005D4
	ldr r3, [r2]
	mla r4, lr, r1, r3
	add r1, r4, #0x1000
	ldrb r2, [r1, #0xd52]
	cmp r2, #0
	beq _022C3B40
	sub r2, r6, #1
	add r3, r3, r2, lsl #2
	ldr r2, [r1, #0xd40]
	add r1, r3, #0x1000
	ldr r3, [r1, #0x4a8]
	ldr r1, [r2, #0x14]
	cmp r3, r1
	beq _022C3B60
_022C3B40:
	ldr r0, _022C3E88 ; =ov00_0232502C
	sub r1, r6, #1
	ldr r0, [r0]
	mov r2, #4
	add r0, r0, r1, lsl #1
	add r0, r0, #0x1700
	strh r2, [r0, #0x54]
	b _022C3BDC
_022C3B60:
	mov r5, r0
	add r1, r4, #0x1d00
	mov r3, #1
	b _022C3B88
_022C3B70:
	ldrh r2, [r1, #0x4e]
	tst r2, r3, lsl r5
	addne r0, r0, #1
	add r2, r5, #1
	andne r0, r0, #0xff
	and r5, r2, #0xff
_022C3B88:
	cmp r5, #0x10
	blo _022C3B70
	ldr r2, _022C3E88 ; =ov00_0232502C
	ldr r1, _022C3E8C ; =0x000005D4
	ldr r2, [r2]
	mla r1, lr, r1, r2
	add r1, r1, #0x1000
	ldr r1, [r1, #0xd40]
	ldrb r1, [r1, #0x18]
	cmp r0, r1
	blo _022C3BDC
	sub r0, r6, #1
	add r1, r2, r0, lsl #1
	add r3, r1, #0x1700
	mov r2, #0
	mov r0, r6
	mov r1, #0xb
	strh r2, [r3, #0x54]
	bl ov00_022C349C
	add sp, sp, #0x34
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022C3BDC:
	ldr r3, _022C3E88 ; =ov00_0232502C
	sub ip, r6, #1
	ldr r1, [r3]
	add r0, r1, ip, lsl #1
	add r4, r0, #0x1700
	ldrh r0, [r4, #0x54]
	cmp r0, #3
	beq _022C3C0C
	cmp r0, #4
	beq _022C3CB8
	add sp, sp, #0x34
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022C3C0C:
	add r0, r1, #0x1500
	ldrh r0, [r0, #0x36]
	mov r5, #1
	tst r0, r5, lsl r6
	addne sp, sp, #0x34
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
	add r1, r1, #0x1000
	ldrb r4, [r1, #0x535]
	ldr r2, _022C3E8C ; =0x000005D4
	mov r0, r6
	add r4, r4, #1
	strb r4, [r1, #0x535]
	ldr r1, [r3]
	mul r4, lr, r2
	add r7, r1, #0x1500
	ldrh r8, [r7, #0x36]
	mov r2, #0
	mov r1, #5
	orr r8, r8, r5, lsl r6
	strh r8, [r7, #0x36]
	ldr r7, [r3]
	add r7, r7, ip
	add r7, r7, #0x1000
	strb lr, [r7, #0x526]
	ldr r7, [r3]
	add r7, r7, #0x4e
	add lr, r7, #0x1d00
	ldrh r7, [lr, r4]
	orr r7, r7, r5, lsl r6
	strh r7, [lr, r4]
	ldr r7, [r3]
	add r7, r7, #0xd50
	add lr, r7, #0x1000
	ldrh r7, [lr, r4]
	orr r5, r7, r5, lsl r6
	strh r5, [lr, r4]
	ldr r3, [r3]
	add r3, r3, ip, lsl #1
	add r3, r3, #0x1700
	strh r2, [r3, #0x54]
	bl ov00_022C349C
	add sp, sp, #0x34
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022C3CB8:
	mov r2, #0
	mov r0, r6
	mov r1, #4
	strh r2, [r4, #0x54]
	bl ov00_022C349C
	add sp, sp, #0x34
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022C3CD4:
	cmp r4, #5
	bne _022C3CF4
	mov r0, r6
	mov r1, #0xe
	mov r2, #0
	bl ov00_022C349C
	add sp, sp, #0x34
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022C3CF4:
	cmp r4, #0xe
	addne sp, sp, #0x34
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
	add r0, r2, r3, lsl #1
	add r0, r0, #0x1700
	ldrh r0, [r0, #0x54]
	cmp r0, #2
	addne sp, sp, #0x34
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
	add r0, r2, r3
	add r0, r0, #0x1000
	ldrb r7, [r0, #0x526]
	ldr r4, _022C3E8C ; =0x000005D4
	add r0, r2, #0x14c
	mul r5, r7, r4
	add r7, r0, #0x1c00
	ldrh r4, [r7, r5]
	mov r0, #1
	mov r2, #0
	orr r0, r4, r0, lsl r6
	strh r0, [r7, r5]
	ldr r4, [r1]
	mov r0, r6
	add r4, r4, r5
	add r4, r4, #0x1d00
	strh r2, [r4, #0x48]
	ldr r4, [r1]
	mov r1, #6
	add r3, r4, r3, lsl #1
	add r3, r3, #0x1700
	strh r2, [r3, #0x54]
	bl ov00_022C349C
	add sp, sp, #0x34
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022C3D7C:
	cmp r4, #6
	addne sp, sp, #0x34
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
	add r0, r2, r3
	add r0, r0, #0x1000
	ldrb r4, [r0, #0x526]
	cmp r4, #0xff
	addeq sp, sp, #0x34
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldr r0, _022C3E8C ; =0x000005D4
	ldrh r1, [sp, #0x22]
	mla r0, r4, r0, r2
	add r0, r0, #0x1d00
	ldrh r0, [r0, #0x4a]
	bl ov00_022C4654
	ldr r2, _022C3E88 ; =ov00_0232502C
	ldr r1, _022C3E8C ; =0x000005D4
	ldr r3, [r2]
	ldr r2, _022C3E90 ; =ov00_0231F564
	mla r1, r4, r1, r3
	add r1, r1, #0x1d00
	strh r0, [r1, #0x4a]
	ldr r1, [r2]
	mov r0, #1
	orr r0, r1, r0, lsl r4
	str r0, [r2]
	add sp, sp, #0x34
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022C3DEC:
	cmp r4, #6
	bne _022C3E48
	add r0, r2, r3
	add r0, r0, #0x1000
	ldrb r3, [r0, #0x526]
	cmp r3, #0xff
	addeq sp, sp, #0x34
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldr r1, _022C3E8C ; =0x000005D4
	add r0, r2, #0x14c
	mul r4, r3, r1
	add r5, r0, #0x1c00
	mov r0, #1
	ldrh r1, [r5, r4]
	mvn r0, r0, lsl r6
	and r3, r1, r0
	mov r0, r6
	mov r1, #7
	mov r2, #0
	strh r3, [r5, r4]
	bl ov00_022C349C
	add sp, sp, #0x34
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022C3E48:
	cmp r4, #7
	addne sp, sp, #0x34
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
	add r0, r2, r3, lsl #1
	add r3, r0, #0x1700
	ldrh r0, [r3, #0x54]
	cmp r0, #5
	addne sp, sp, #0x34
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
	mov r2, #0
	mov r0, r6
	mov r1, #8
	strh r2, [r3, #0x54]
	bl ov00_022C349C
_022C3E80:
	add sp, sp, #0x34
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022C3E88: .word ov00_0232502C
_022C3E8C: .word 0x000005D4
_022C3E90: .word ov00_0231F564
	arm_func_end ov00_022C39B0

	arm_func_start ov00_022C3E94
ov00_022C3E94: ; 0x022C3E94
	stmdb sp!, {r4, r5, r6, lr}
	mov ip, #0
	ldr r2, _022C3F30 ; =ov00_0232502C
	ldr r1, _022C3F34 ; =0x000005D4
	mov r4, r0
	mov r3, ip
_022C3EAC:
	ldr r0, [r2]
	mla r5, ip, r1, r0
	add r0, r5, #0x1000
	ldrb r0, [r0, #0xd52]
	cmp r0, #0
	addne r0, r5, #0x1d00
	strneh r3, [r0, #0x4a]
	add r0, ip, #1
	mov r0, r0, lsl #0x10
	mov ip, r0, lsr #0x10
	cmp ip, #0x10
	blo _022C3EAC
	ldr r0, _022C3F38 ; =ov00_0231F564
	mov r1, #0
	ldr r5, _022C3F3C ; =0x0000FFFF
	str r1, [r0]
	mov r6, #1
_022C3EF0:
	mov r0, r4
	mov r1, r6
	bl ov00_022BF55C
	cmp r0, #0
	ldrneh r1, [r0]
	cmpne r1, r5
	cmpne r1, #0
	beq _022C3F18
	mov r1, r6
	bl ov00_022C39B0
_022C3F18:
	add r0, r6, #1
	mov r0, r0, lsl #0x10
	mov r6, r0, lsr #0x10
	cmp r6, #0xf
	bls _022C3EF0
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022C3F30: .word ov00_0232502C
_022C3F34: .word 0x000005D4
_022C3F38: .word ov00_0231F564
_022C3F3C: .word 0x0000FFFF
	arm_func_end ov00_022C3E94

	arm_func_start ov00_022C3F40
ov00_022C3F40: ; 0x022C3F40
	stmdb sp!, {r4, lr}
	sub sp, sp, #8
	ldr r2, _022C3F7C ; =ov00_0232502C
	mov r4, r1
	ldr r1, [r2]
	strb r0, [sp]
	add r0, sp, #0
	bl ov00_022C7EB4
	ldr r0, _022C3F7C ; =ov00_0232502C
	mov r1, r4
	ldr r2, [r0]
	mov r0, #6
	bl ov00_022C537C
	add sp, sp, #8
	ldmia sp!, {r4, pc}
	.align 2, 0
_022C3F7C: .word ov00_0232502C
	arm_func_end ov00_022C3F40

	arm_func_start ov00_022C3F80
ov00_022C3F80: ; 0x022C3F80
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0x18
	mov r5, #0
	add r0, sp, #6
	mov r1, r5
	mov r2, #0x10
	mvn r4, #0
	bl MemsetFast
	ldr r1, _022C410C ; =ov00_0232502C
	mov r0, #1
	ldr r1, [r1]
	add ip, sp, #6
_022C3FB0:
	add r2, r1, r0, lsl #2
	add r2, r2, #0x1000
	ldr r2, [r2, #0x4e4]
	cmp r2, #5
	bne _022C3FDC
	add r2, r1, r0
	add r2, r2, #0x1500
	ldrsb r3, [r2, #0x25]
	ldrb r2, [ip, r3]
	add r2, r2, #1
	strb r2, [ip, r3]
_022C3FDC:
	add r0, r0, #1
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	cmp r0, #0xf
	bls _022C3FB0
	ldr r2, _022C4110 ; =ov00_02318814
	ldr ip, _022C4114 ; =0x000005D4
	ldrb r3, [r2]
	mov r0, #0
	add lr, sp, #6
_022C4004:
	add r2, r3, #1
	mov r3, r2, lsr #0x1f
	rsb r2, r3, r2, lsl #28
	add r2, r3, r2, ror #28
	and r3, r2, #0xff
	mla r2, r3, ip, r1
	add r2, r2, #0x1000
	ldrb r2, [r2, #0xd52]
	cmp r2, #0
	ldrneb r2, [lr, r3]
	cmpne r2, #0
	movne r0, r3, lsl #0x18
	movne r4, r0, asr #0x18
	bne _022C404C
	add r0, r0, #1
	and r0, r0, #0xff
	cmp r0, #0x10
	blo _022C4004
_022C404C:
	mvn r0, #0
	cmp r4, r0
	addeq sp, sp, #0x18
	moveq r0, #0x15
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r2, _022C4110 ; =ov00_02318814
	mov r0, #1
	strb r4, [r2]
	mov r3, r0
_022C4070:
	add r2, r1, r0, lsl #2
	add r2, r2, #0x1000
	ldr r2, [r2, #0x4e4]
	cmp r2, #5
	bne _022C40A0
	add r2, r1, r0
	add r2, r2, #0x1500
	ldrsb r2, [r2, #0x25]
	cmp r4, r2
	orreq r2, r5, r3, lsl r0
	moveq r2, r2, lsl #0x10
	moveq r5, r2, lsr #0x10
_022C40A0:
	add r0, r0, #1
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	cmp r0, #0xf
	bls _022C4070
	mov r2, #3
	add r0, sp, #0
	strb r2, [sp]
	strh r4, [sp, #2]
	bl ov00_022C7EB4
	movs r1, r0
	beq _022C40F0
	ldr r0, _022C410C ; =ov00_0232502C
	ldr r3, _022C4114 ; =0x000005D4
	ldr r0, [r0]
	mov r2, #0xe4
	add r0, r0, #0x388
	add r0, r0, #0x1400
	mla r0, r4, r3, r0
	bl MemcpyFast
_022C40F0:
	ldr r0, _022C410C ; =ov00_0232502C
	mov r1, r5
	ldr r2, [r0]
	mov r0, #0xea
	bl ov00_022C537C
	add sp, sp, #0x18
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022C410C: .word ov00_0232502C
_022C4110: .word ov00_02318814
_022C4114: .word 0x000005D4
	arm_func_end ov00_022C3F80

	arm_func_start ov00_022C4118
ov00_022C4118: ; 0x022C4118
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #0x4c
	ldr r5, [r0, #0x14]
	ldr r4, [r0, #0x10]
	ldr r1, [r5, #0x14]
	add r0, r5, #0x10
	bl sub_0207EDB4
	movs r6, r0
	add r0, sp, #4
	ldreq r6, [r5, #0x18]
	bl FileInit
	ldr r2, [r4]
	mvn r0, #0
	str r0, [sp]
	ldr r3, [r4, #4]
	add r0, sp, #4
	mov r1, r6
	add r3, r2, r3
	bl sub_0207F60C
	cmp r0, #0
	beq _022C4194
	ldr r1, [r4, #8]
	ldr r2, [r4, #4]
	add r0, sp, #4
	bl sub_0207F818
	ldr r1, [r4, #4]
	cmp r1, r0
	moveq r0, #2
	streq r0, [r4, #0xc]
	add r0, sp, #4
	bl sub_0207F70C
_022C4194:
	ldr r0, [r4, #0xc]
	cmp r0, #2
	addeq sp, sp, #0x4c
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	mov r0, #0
	str r0, [r4]
	mov r0, #2
	str r0, [r4, #0xc]
	add sp, sp, #0x4c
	ldmia sp!, {r3, r4, r5, r6, pc}
	arm_func_end ov00_022C4118

	arm_func_start ov00_022C41BC
ov00_022C41BC: ; 0x022C41BC
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x18
	ldr r5, _022C444C ; =ov00_0232502C
	ldr r0, [r5]
	add r0, r0, #0x1000
	ldrb r0, [r0, #0x524]
	cmp r0, #0
	addeq sp, sp, #0x18
	moveq r0, #0x15
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r4, _022C4450 ; =0x000005D4
	mov r1, #0
_022C41EC:
	ldr r0, [r5]
	add r3, r0, #0x1000
	ldrb r0, [r3, #0x525]
	add r0, r0, #1
	mov r2, r0, lsr #0x1f
	rsb r0, r2, r0, lsl #28
	add r0, r2, r0, ror #28
	strb r0, [r3, #0x525]
	ldr r2, [r5]
	add r0, r2, #0x1000
	ldrb r0, [r0, #0x525]
	mla r3, r0, r4, r2
	add r2, r3, #0x1000
	ldrb r2, [r2, #0xd52]
	cmp r2, #0
	addne r2, r3, #0x1d00
	ldrneh r2, [r2, #0x4c]
	cmpne r2, #0
	bne _022C4248
	add r1, r1, #1
	and r1, r1, #0xff
	cmp r1, #0x10
	blo _022C41EC
_022C4248:
	cmp r1, #0x10
	addeq sp, sp, #0x18
	moveq r0, #0x15
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	bl ov00_022C45D8
	ldr r0, _022C444C ; =ov00_0232502C
	ldr r2, _022C4450 ; =0x000005D4
	ldr r6, [r0]
	add r0, sp, #8
	add r1, r6, #0x1000
	ldrb r4, [r1, #0x525]
	add r1, r6, #0x12c
	add r3, r6, #0x388
	mul r5, r4, r2
	add r2, r6, r5
	add r2, r2, #0x1d00
	add r1, r1, #0x1c00
	add r3, r3, #0x1400
	ldrh r2, [r2, #0x48]
	add r1, r1, r5
	add r3, r3, r5
	bl ov00_022C5150
	cmp r0, #0
	addeq sp, sp, #0x18
	moveq r0, #0x15
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r0, _022C444C ; =ov00_0232502C
	mov r3, #4
	ldr r1, [r0]
	strb r3, [sp]
	add r2, r1, #0x1000
	ldrb r4, [r2, #0x525]
	add r3, r3, #0x5d0
	add r0, sp, #0
	strh r4, [sp, #2]
	ldrb r4, [r2, #0x525]
	mla r2, r4, r3, r1
	add r2, r2, #0x1d00
	ldrh r2, [r2, #0x48]
	strh r2, [sp, #4]
	bl ov00_022C7EB4
	ldr r1, _022C444C ; =ov00_0232502C
	ldr r4, _022C4450 ; =0x000005D4
	ldr r5, [r1]
	ldrb r1, [sp, #0x14]
	add r2, r5, #0x1000
	ldrb r2, [r2, #0x525]
	ldr r6, [sp, #0x10]
	ldr r3, [sp, #0xc]
	mla r4, r2, r4, r5
	add r2, r4, r1, lsl #2
	add r5, r4, #0x1000
	ldr r4, [r5, #0xd58]
	add r2, r2, #0x1000
	ldr r2, [r2, #0xd2c]
	ldr r1, [r4, r1, lsl #2]
	sub r2, r6, r2
	add r4, r2, r1
	ldr r5, [r5, #0xd54]
	mov r2, r0
	mov r0, r5
	mov r1, r4
	bl ov00_022C79FC
	cmp r0, #0
	bne _022C4418
	ldr r0, _022C444C ; =ov00_0232502C
	ldr r0, [r0]
	add r0, r0, #0xce0
	add r6, r0, #0x7000
	mov r0, r6
	bl ov00_022C7C5C
	cmp r0, #0
	bne _022C440C
	ldr r0, [r5]
	cmp r0, #0
	subne r0, r0, #1
	strne r0, [r5]
	bne _022C440C
	add r2, r5, #0x30
	mov r7, #0
	mov r3, r7
	mov ip, r2
_022C4390:
	add r0, r2, r3, lsl #4
	ldr r0, [r0, #0xc]
	cmp r0, #2
	bne _022C43BC
	cmp r7, #0
	beq _022C43B8
	ldr r1, [r7]
	ldr r0, [r2, r3, lsl #4]
	cmp r1, r0
	bls _022C43BC
_022C43B8:
	mov r7, ip
_022C43BC:
	add r3, r3, #1
	cmp r3, #4
	add ip, ip, #0x10
	blt _022C4390
	cmp r7, #0
	bne _022C43D8
	bl WaitForever2
_022C43D8:
	mov r0, #2
	str r0, [r5]
	mov r0, #1
	str r0, [r7, #0xc]
	bic r0, r4, #0x1f
	str r0, [r7]
	str r7, [r6, #0x10]
	ldr r1, _022C4454 ; =ov00_022C4118
	mov r0, r6
	mov r2, #0
	mov r3, #4
	str r5, [r6, #0x14]
	bl ov00_022C7C74
_022C440C:
	add sp, sp, #0x18
	mov r0, #0x15
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022C4418:
	ldr r0, _022C444C ; =ov00_0232502C
	ldr r4, [sp, #0xc]
	ldr r2, [r0]
	ldr r1, _022C4450 ; =0x000005D4
	add r0, r2, #0x1000
	ldrb r3, [r0, #0x525]
	add r0, r4, #6
	mla r1, r3, r1, r2
	add r1, r1, #0x1d00
	ldrh r1, [r1, #0x4c]
	bl ov00_022C537C
	add sp, sp, #0x18
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022C444C: .word ov00_0232502C
_022C4450: .word 0x000005D4
_022C4454: .word ov00_022C4118
	arm_func_end ov00_022C41BC

	arm_func_start ov00_022C4458
ov00_022C4458: ; 0x022C4458
	stmdb sp!, {r4, r5, lr}
	sub sp, sp, #0xc
	add r1, sp, #0
	mov r0, #0
	mov r2, #0xa
	bl ArrayFill16
	mov r3, #1
	ldr r0, _022C45D0 ; =ov00_0232502C
	mov r4, r3
	ldr ip, [r0]
	mov r5, r3
	mov r0, r3
	mov r1, r3
	mov r2, r3
_022C4490:
	add lr, ip, r3, lsl #2
	add lr, lr, #0x1000
	ldr lr, [lr, #0x4e4]
	cmp lr, #0xb
	addls pc, pc, lr, lsl #2
	b _022C4524
_022C44A8: ; jump table
	b _022C4524 ; case 0
	b _022C4524 ; case 1
	b _022C44D8 ; case 2
	b _022C4524 ; case 3
	b _022C44F8 ; case 4
	b _022C44E8 ; case 5
	b _022C4524 ; case 6
	b _022C4524 ; case 7
	b _022C4508 ; case 8
	b _022C4524 ; case 9
	b _022C4524 ; case 10
	b _022C4518 ; case 11
_022C44D8:
	ldrh lr, [sp]
	orr lr, lr, r2, lsl r3
	strh lr, [sp]
	b _022C4524
_022C44E8:
	ldrh lr, [sp, #2]
	orr lr, lr, r1, lsl r3
	strh lr, [sp, #2]
	b _022C4524
_022C44F8:
	ldrh lr, [sp, #4]
	orr lr, lr, r0, lsl r3
	strh lr, [sp, #4]
	b _022C4524
_022C4508:
	ldrh lr, [sp, #6]
	orr lr, lr, r5, lsl r3
	strh lr, [sp, #6]
	b _022C4524
_022C4518:
	ldrh lr, [sp, #8]
	orr lr, lr, r4, lsl r3
	strh lr, [sp, #8]
_022C4524:
	add r3, r3, #1
	mov r3, r3, lsl #0x10
	mov r3, r3, lsr #0x10
	cmp r3, #0xf
	bls _022C4490
	ldrh r1, [sp, #6]
	cmp r1, #0
	beq _022C4550
	mov r0, #5
	bl ov00_022C3F40
	b _022C45B0
_022C4550:
	ldrh r1, [sp]
	cmp r1, #0
	beq _022C4568
	mov r0, #1
	bl ov00_022C3F40
	b _022C45B0
_022C4568:
	ldrh r1, [sp, #8]
	cmp r1, #0
	beq _022C4580
	mov r0, #6
	bl ov00_022C3F40
	b _022C45B0
_022C4580:
	ldrh r1, [sp, #4]
	cmp r1, #0
	beq _022C4598
	mov r0, #2
	bl ov00_022C3F40
	b _022C45B0
_022C4598:
	ldrh r0, [sp, #2]
	cmp r0, #0
	beq _022C45AC
	bl ov00_022C3F80
	b _022C45B0
_022C45AC:
	bl ov00_022C41BC
_022C45B0:
	cmp r0, #0x15
	addne sp, sp, #0xc
	ldmneia sp!, {r4, r5, pc}
	ldr r1, _022C45D4 ; =0x0000FFFF
	mov r0, #0
	bl ov00_022C3F40
	add sp, sp, #0xc
	ldmia sp!, {r4, r5, pc}
	.align 2, 0
_022C45D0: .word ov00_0232502C
_022C45D4: .word 0x0000FFFF
	arm_func_end ov00_022C4458

	arm_func_start ov00_022C45D8
ov00_022C45D8: ; 0x022C45D8
	ldr r1, _022C4648 ; =ov00_0231F564
	mov r2, #1
	ldr r1, [r1]
	tst r1, r2, lsl r0
	bxeq lr
	ldr r2, _022C464C ; =ov00_0232502C
	ldr r1, _022C4650 ; =0x000005D4
	ldr r2, [r2]
	mla ip, r0, r1, r2
	add r0, ip, #0x1000
	ldrb r0, [r0, #0xd52]
	cmp r0, #0
	addne r0, ip, #0x1d00
	ldrneh r1, [r0, #0x4c]
	cmpne r1, #0
	bxeq lr
	ldrh r2, [r0, #0x48]
	ldrh r3, [r0, #0x4a]
	cmp r3, r2
	bhi _022C463C
	add r1, r3, #2
	cmp r2, r1
	addle r1, r2, #1
	strleh r1, [r0, #0x48]
	bxle lr
_022C463C:
	add r0, ip, #0x1d00
	strh r3, [r0, #0x48]
	bx lr
	.align 2, 0
_022C4648: .word ov00_0231F564
_022C464C: .word ov00_0232502C
_022C4650: .word 0x000005D4
	arm_func_end ov00_022C45D8

	arm_func_start ov00_022C4654
ov00_022C4654: ; 0x022C4654
	cmp r1, r0
	movls r1, r0
	mov r0, r1
	bx lr
	arm_func_end ov00_022C4654

	arm_func_start ov00_022C4664
ov00_022C4664: ; 0x022C4664
	cmp r0, #1
	blo _022C4678
	cmp r0, #0xf
	movls r0, #1
	bxls lr
_022C4678:
	mov r0, #0
	bx lr
	arm_func_end ov00_022C4664

	arm_func_start ov00_022C4680
ov00_022C4680: ; 0x022C4680
	stmdb sp!, {r3, lr}
	strh r1, [sp]
	add r2, sp, #0
	mov r1, #0xd
	bl ov00_022C34E8
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022C4680

	arm_func_start ov00_022C4698
ov00_022C4698: ; 0x022C4698
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x60
	mov r4, #0
	movs r7, r0
	mov r5, r4
	beq _022C46E4
	ldr ip, [r7, #0x2c]
	ldr r3, [r7, #0x24]
	add r1, sp, #0
	mov r2, #0x60
	sub r6, ip, r3
	bl sub_0207F818
	cmp r0, #0x60
	mov r0, r7
	mov r1, r6
	mov r2, #0
	addhs r4, sp, #0
	bl sub_0207F828
	b _022C46E8
_022C46E4:
	ldr r4, _022C4714 ; =0x027FFE00
_022C46E8:
	cmp r4, #0
	beq _022C4708
	ldr r1, [r4, #0x2c]
	ldr r0, [r4, #0x3c]
	add r1, r1, #0x268
	add r5, r1, r0
	cmp r5, #0x10000
	movlo r5, #0x10000
_022C4708:
	mov r0, r5
	add sp, sp, #0x60
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022C4714: .word 0x027FFE00
	arm_func_end ov00_022C4698

	arm_func_start ov00_022C4718
ov00_022C4718: ; 0x022C4718
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x6c
	str r2, [sp, #4]
	cmp r2, #0x164
	mov r2, #0
	mov sl, r0
	mov sb, r1
	str r2, [sp, #0x10]
	blo _022C4B70
	ldr r4, [sp, #4]
	mov r5, sb
	str r2, [sp, #0xc]
	mov r6, r2
	mov fp, r2
	cmp sl, #0
	add r5, r5, #0x160
	sub r4, r4, #0x160
	beq _022C4790
	ldr r7, [sl, #0x2c]
	ldr r3, [sl, #0x24]
	mov r2, #0x160
	sub r3, r7, r3
	str r3, [sp, #8]
	bl sub_0207F818
	cmp r0, #0x160
	ldr r7, [sb, #0x80]
	movlt r4, fp
	cmp r7, #0
	moveq r7, #0x1000000
	b _022C480C
_022C4790:
	ldr r0, _022C4B7C ; =0x027FFE00
	mov r1, #1
	ldr r7, [r0, #0x80]
	add r0, sp, #0x24
	cmp r7, #0
	moveq r7, #0x1000000
	str r1, [sp, #0xc]
	bl FileInit
	ldr r0, _022C4B80 ; =ov00_0231881C
	mov r1, #3
	bl sub_0207EDB4
	mov r1, r0
	mvn r0, #0
	str r0, [sp]
	add r0, sp, #0x24
	mov r2, #0
	add r3, r7, #0x88
	bl sub_0207F60C
	ldr r2, [sp, #0x50]
	ldr r1, [sp, #0x48]
	ldr r0, _022C4B7C ; =0x027FFE00
	sub r1, r2, r1
	str r1, [sp, #8]
	mov r1, sb
	mov r2, #0x160
	add sl, sp, #0x24
	bl MemcpyFast
	ldr r0, [sb, #0x60]
	orr r0, r0, #0x6000
	orr r0, r0, #0x400000
	str r0, [sb, #0x60]
_022C480C:
	cmp r4, #0x88
	movlo r4, #0
	blo _022C4844
	ldr r1, [sp, #8]
	mov r0, sl
	add r1, r1, r7
	mov r2, #0
	bl sub_0207F828
	mov r0, sl
	mov r1, r5
	mov r2, #0x88
	bl sub_0207F818
	add r5, r5, #0x88
	sub r4, r4, #0x88
_022C4844:
	cmp r4, #0x70
	blo _022C48BC
	mov r0, r5
	mov r6, r5
	bl ov00_022C7980
	mov r0, #3
	str r0, [sp]
	mov r0, r6
	mov r1, #0
	mov r2, #0x160
	mov r3, sb
	add r5, r5, #0x70
	sub r4, r4, #0x70
	bl ov00_022C7994
	ldr r8, [sl, #8]
	mov r7, #0
	b _022C488C
_022C4888:
	add r7, r7, #1
_022C488C:
	cmp r7, #3
	bge _022C48A0
	ldrsb r0, [r8, r7]
	cmp r0, #0
	bne _022C4888
_022C48A0:
	mov r0, r8
	mov r2, r7
	add r1, r6, #0x10
	bl MemcpyFast
	str r7, [r6, #0x14]
	str r8, [r6, #0x18]
	b _022C48C0
_022C48BC:
	mov r4, #0
_022C48C0:
	cmp r4, #0x10
	movlo r4, #0
	blo _022C4910
	mov r0, #0
	str r0, [r5]
	ldr r1, [sl, #0x24]
	ldr r0, [sp, #8]
	ldr r2, [sb, #0x20]
	add r0, r0, r1
	add r0, r2, r0
	str r0, [r5, #4]
	ldr r1, [sl, #0x24]
	ldr r0, [sp, #8]
	ldr r2, [sb, #0x30]
	add r0, r0, r1
	add r0, r2, r0
	mov fp, r5
	str r0, [r5, #8]
	add r5, r5, #0x10
	sub r4, r4, #0x10
_022C4910:
	ldr r1, [sb, #0x2c]
	ldr r0, [sb, #0x3c]
	add r0, r1, r0
	cmp r4, r0
	blo _022C49B8
	ldr r7, [sl, #0x24]
	ldr r1, [fp, #4]
	mov r0, sl
	sub r1, r1, r7
	mov r2, #0
	bl sub_0207F828
	ldr r2, [sb, #0x2c]
	mov r0, sl
	mov r1, r5
	bl sub_0207F818
	mov r0, #3
	str r0, [sp]
	ldr r1, [fp, #4]
	ldr r2, [sb, #0x2c]
	mov r0, r6
	mov r3, r5
	bl ov00_022C7994
	ldr r1, [fp, #8]
	ldr r4, [sb, #0x2c]
	mov r0, sl
	mov r2, #0
	sub r1, r1, r7
	bl sub_0207F828
	ldr r2, [sb, #0x3c]
	mov r0, sl
	add r1, r5, r4
	bl sub_0207F818
	mov r0, #3
	str r0, [sp]
	ldr r1, [fp, #8]
	ldr r2, [sb, #0x3c]
	add r3, r5, r4
	mov r0, r6
	bl ov00_022C7994
	mov r0, #1
	str r0, [sp, #0x10]
	b _022C4A8C
_022C49B8:
	cmp r4, #0xcc00
	blo _022C4A8C
	ldr r7, [sl, #0x24]
	ldr r4, [fp, #4]
	mov r0, sl
	sub r1, r4, r7
	mov r2, #0
	bl sub_0207F828
	mov r0, sl
	mov r1, r5
	mov r2, #0x4400
	bl sub_0207F818
	mov r0, #3
	str r0, [sp]
	mov r0, r6
	mov r1, r4
	mov r2, #0x4400
	mov r3, r5
	bl ov00_022C7994
	add r1, r4, #0x4400
	mov r0, sl
	sub r1, r1, r7
	mov r2, #0
	bl sub_0207F828
	mov r0, sl
	add r1, r5, #0x4400
	mov r2, #0x4400
	bl sub_0207F818
	mov r0, #2
	str r0, [sp]
	mov r0, r6
	add r1, r4, #0x4400
	mov r2, #0x4400
	add r3, r5, #0x4400
	bl ov00_022C7994
	add r1, r4, #0x8800
	mov r0, sl
	sub r1, r1, r7
	mov r2, #0
	bl sub_0207F828
	mov r0, sl
	add r1, r5, #0x8800
	mov r2, #0x4400
	bl sub_0207F818
	mov r0, #2
	str r0, [sp]
	add r1, r4, #0x8800
	add r3, r5, #0x8800
	mov r0, r6
	mov r2, #0x4400
	bl ov00_022C7994
	mov r0, #1
	str r0, [sp, #0x10]
_022C4A8C:
	ldr r1, [sp, #8]
	mov r0, sl
	mov r2, #0
	bl sub_0207F828
	ldr r0, [sp, #0xc]
	cmp r0, #0
	beq _022C4B58
	add r0, sp, #0x24
	bl sub_0207F70C
	ldr r0, [sp, #0x10]
	cmp r0, #0
	beq _022C4B58
	ldr r1, [sb, #0x20]
	ldr r0, _022C4B84 ; =ov00_02318818
	str r1, [sp, #0x14]
	ldr r2, [sb, #0x28]
	ldr r1, [sb, #0x20]
	ldr r4, [r0]
	sub r0, r2, r1
	str r0, [sp, #0x18]
	ldr r2, [r6, #0x48]
	ldr r1, [sb, #0x20]
	add r0, sp, #0x14
	sub r1, r2, r1
	str r1, [sp, #0x1c]
	ldr r1, [sp, #4]
	mov r2, #0x8000
	str r1, [sp, #0x20]
	mov r1, #0x4000
	mov r3, #1
	bl ov00_022C4B90
	ldr r0, [r4, #4]
	cmp r0, #0
	beq _022C4B40
	add r7, sp, #0x14
	mov r5, #0
_022C4B1C:
	ldmia r4, {r1, r2}
	mov r0, r7
	mov r3, r5
	add r2, r1, r2
	bl ov00_022C4B90
	add r4, r4, #8
	ldr r0, [r4, #4]
	cmp r0, #0
	bne _022C4B1C
_022C4B40:
	ldr r1, [sb, #0x28]
	ldr r2, _022C4B88 ; =_02000AAC
	ldr r3, [r6, #0x48]
	ldr r0, _022C4B8C ; =0xE12FFF1E
	sub r1, r2, r1
	str r0, [r3, r1]
_022C4B58:
	ldr r0, [sp, #0x10]
	cmp r0, #0
	beq _022C4B70
	ldr r1, [sp, #4]
	mov r0, sb
	bl DC_FlushRange
_022C4B70:
	ldr r0, [sp, #0x10]
	add sp, sp, #0x6c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022C4B7C: .word 0x027FFE00
_022C4B80: .word ov00_0231881C
_022C4B84: .word ov00_02318818
_022C4B88: .word _start_AutoloadDoneCallback
_022C4B8C: .word 0xE12FFF1E
	arm_func_end ov00_022C4718

	arm_func_start ov00_022C4B90
ov00_022C4B90: ; 0x022C4B90
	stmdb sp!, {r3, lr}
	mov lr, r1
	ldr ip, [r0]
	ldr r1, [r0, #0xc]
	cmp lr, #0x4000
	movlo lr, #0x4000
	cmp r2, #0x8000
	movhi r2, #0x8000
	cmp lr, ip
	add r1, ip, r1
	movlo lr, ip
	cmp r2, r1
	movhi r2, r1
	cmp lr, r2
	ldmhsia sp!, {r3, pc}
	cmp r3, #0
	beq _022C4BEC
	ldr r0, [r0, #8]
	sub r2, r2, lr
	add r0, r0, lr
	mov r1, #0
	bl MemsetFast
	ldmia sp!, {r3, pc}
_022C4BEC:
	ldr r3, [r0, #4]
	ldr r1, [r0, #8]
	add r0, r3, lr
	add r1, r1, lr
	sub r2, r2, lr
	bl MemcpyFast
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022C4B90

	arm_func_start ov00_022C4C08
ov00_022C4C08: ; 0x022C4C08
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r8, r0
	mov r7, r1
	mov r4, #0xff
	bl EnableIrqFlag
	mov r5, r0
	bl ov00_022C7928
	cmp r0, #0
	bne _022C4C3C
	mov r0, r5
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022C4C3C:
	ldr r0, _022C4E8C ; =ov00_0232502C
	ldr r0, [r0]
	add r1, r0, #0x1000
	ldrb r1, [r1, #0x524]
	add r1, r1, #1
	cmp r1, #0x10
	ble _022C4C68
	mov r0, r5
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022C4C68:
	ldr r1, _022C4E90 ; =0x000005D4
	mov r6, #0
_022C4C70:
	mla r2, r6, r1, r0
	add r2, r2, #0x1000
	ldr r3, [r2, #0xd40]
	cmp r3, r8
	bne _022C4C94
	mov r0, r5
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022C4C94:
	ldrb r2, [r2, #0xd52]
	cmp r2, #0
	moveq r4, r6
	beq _022C4CB4
	add r2, r6, #1
	and r6, r2, #0xff
	cmp r6, #0x10
	blo _022C4C70
_022C4CB4:
	cmp r6, #0x10
	bne _022C4CCC
	mov r0, r5
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022C4CCC:
	ldr r1, _022C4E90 ; =0x000005D4
	ldr r2, _022C4E8C ; =ov00_0232502C
	mul r6, r4, r1
	add r0, r0, r6
	add r0, r0, #0x1000
	str r8, [r0, #0xd40]
	ldr r0, [r2]
	mov r1, r7
	add r0, r0, #0x388
	add r0, r0, #0x1400
	add sb, r0, r6
	mov r0, sb
	bl ov00_022C4E98
	add r0, r8, #0x1c
	add r1, sb, #0xc4
	mov r2, #0x20
	bl MemcpyFast
	ldr r0, _022C4E8C ; =ov00_0232502C
	mov r1, sb
	ldr r0, [r0]
	add r0, r0, #0x12c
	add r0, r0, #0x1c00
	add r0, r0, r6
	bl ov00_022C5084
	cmp r0, #0
	bne _022C4D44
	mov r0, r5
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022C4D44:
	ldr r0, _022C4E8C ; =ov00_0232502C
	mov r1, r8
	ldr r2, [r0]
	add r0, r2, #0x6c
	add r0, r0, #0x1800
	add r0, r0, r6
	add r2, r2, #0x1300
	bl ov00_022C5400
	ldr r1, _022C4E8C ; =ov00_0232502C
	ldr r0, [r1]
	add r0, r0, r6
	add r0, r0, #0x1000
	strb r4, [r0, #0xd21]
	ldr r0, [r1]
	add r0, r0, #0x6c
	add r0, r0, #0x1800
	add r0, r0, r6
	bl ov00_022C5628
	ldr r2, _022C4E8C ; =ov00_0232502C
	ldr r3, _022C4E94 ; =ov00_0231F568
	ldr r1, [r2]
	ldrb r0, [r3]
	add r1, r1, r6
	add r1, r1, #0x1000
	strb r0, [r1, #0xd1f]
	ldr r1, [r2]
	mov r4, #1
	add r1, r1, r6
	add r1, r1, #0x1d00
	strh r4, [r1, #0x4e]
	ldr r1, [r2]
	add r8, r7, #0x1e8
	add r1, r1, r6
	add r1, r1, #0x1000
	str r7, [r1, #0xd44]
	ldr r1, [r2]
	add r4, r7, #0x258
	add r1, r1, r6
	add r1, r1, #0x1000
	str r8, [r1, #0xd54]
	ldr r1, [r2]
	add r7, r0, #1
	add r0, r1, r6
	add r0, r0, #0x1000
	str r4, [r0, #0xd58]
	ldr r0, [r2]
	strb r7, [r3]
	add r0, r0, r6
	add r0, r0, #0x1000
	ldr r0, [r0, #0xd54]
	ldr r0, [r0, #0x6c]
	cmp r0, #0
	beq _022C4E50
	bl ov00_022C7C2C
	cmp r0, #0
	bne _022C4E50
	ldr r0, _022C4E8C ; =ov00_0232502C
	ldr r0, [r0]
	add r0, r0, #0xce0
	add r0, r0, #0x7000
	bl ov00_022C7C48
	ldr r0, _022C4E8C ; =ov00_0232502C
	mov r1, #0x800
	ldr r0, [r0]
	add r0, r0, #0x4e0
	add r0, r0, #0x7000
	bl ov00_022C7BAC
_022C4E50:
	ldr r2, _022C4E8C ; =ov00_0232502C
	mov r3, #1
	ldr r1, [r2]
	mov r0, r5
	add r1, r1, r6
	add r1, r1, #0x1000
	strb r3, [r1, #0xd52]
	ldr r1, [r2]
	add r1, r1, #0x1000
	ldrb r2, [r1, #0x524]
	add r2, r2, #1
	strb r2, [r1, #0x524]
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022C4E8C: .word ov00_0232502C
_022C4E90: .word 0x000005D4
_022C4E94: .word ov00_0231F568
	arm_func_end ov00_022C4C08

	arm_func_start ov00_022C4E98
ov00_022C4E98: ; 0x022C4E98
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r2, #0x22c0000
	mov r4, r1
	mov r5, r0
	str r2, [sp]
	ldr r0, [r4, #0x24]
	ldr r7, _022C4F08 ; =ov00_0231812C
	str r0, [r5]
	ldr r0, [r4, #0x34]
	add r8, r5, #0xc
	str r0, [r5, #4]
	mov sb, #0
	add r6, sp, #0
_022C4ECC:
	mov r0, r4
	mov r1, r7
	mov r2, r8
	mov r3, r6
	bl ov00_022C4F0C
	add sb, sb, #1
	cmp sb, #3
	add r8, r8, #0x10
	add r7, r7, #4
	blt _022C4ECC
	add r0, r4, #0x160
	add r1, r5, #0x3c
	mov r2, #0x88
	bl MemcpyFast
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022C4F08: .word ov00_0231812C
	arm_func_end ov00_022C4E98

	arm_func_start ov00_022C4F0C
ov00_022C4F0C: ; 0x022C4F0C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr r1, [r1]
	mov r7, r0
	mov r6, r2
	mov r5, r3
	cmp r1, #0
	beq _022C4F3C
	cmp r1, #1
	beq _022C4F88
	cmp r1, #2
	beq _022C5058
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022C4F3C:
	ldr r0, [r7, #0x28]
	cmp r0, #0x2000000
	blo _022C4F80
	cmp r0, #0x22c0000
	bhs _022C4F80
	ldr r1, [r7, #0x2c]
	add r0, r0, r1
	cmp r0, #0x22c0000
	bhi _022C4F80
	str r1, [r6, #8]
	ldr r0, [r7, #0x28]
	str r0, [r6, #4]
	str r0, [r6]
	ldr r0, [r6, #0xc]
	bic r0, r0, #1
	str r0, [r6, #0xc]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022C4F80:
	bl WaitForever2
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022C4F88:
	ldr ip, [r7, #0x38]
	ldr r1, [r7, #0x3c]
	mov r2, #0
	mov r4, r2
	cmp ip, #0x2000000
	add r3, ip, r1
	blo _022C4FD4
	ldr r0, _022C5078 ; =0x023FE800
	cmp ip, r0
	bhs _022C4FD4
	cmp r3, #0x2300000
	bls _022C5000
	cmp r3, r0
	bhs _022C4FCC
	cmp r1, #0x40000
	movls r4, #1
	bls _022C5000
_022C4FCC:
	mov r2, #1
	b _022C5000
_022C4FD4:
	ldr r1, _022C507C ; =0x037F8000
	cmp ip, r1
	blo _022C4FFC
	add r0, r1, #0x17000
	cmp ip, r0
	bhs _022C4FFC
	cmp r3, r0
	movls r4, #1
	movhi r2, #1
	b _022C5000
_022C4FFC:
	mov r2, #1
_022C5000:
	cmp r2, #1
	bne _022C500C
	bl WaitForever2
_022C500C:
	ldr r0, [r7, #0x3c]
	cmp r4, #0
	str r0, [r6, #8]
	ldr r0, [r7, #0x38]
	str r0, [r6, #4]
	ldreq r0, [r6, #4]
	streq r0, [r6]
	beq _022C5044
	ldr r0, [r5]
	str r0, [r6]
	ldr r1, [r5]
	ldr r0, [r6, #8]
	add r0, r1, r0
	str r0, [r5]
_022C5044:
	ldr r0, [r6, #0xc]
	bic r0, r0, #1
	orr r0, r0, #1
	str r0, [r6, #0xc]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022C5058:
	ldr r0, _022C5080 ; =0x027FFE00
	mov r1, #0x160
	stmib r6, {r0, r1}
	str r0, [r6]
	ldr r0, [r6, #0xc]
	bic r0, r0, #1
	str r0, [r6, #0xc]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022C5078: .word 0x023FE800
_022C507C: .word 0x037F8000
_022C5080: .word 0x027FFE00
	arm_func_end ov00_022C4F0C

	arm_func_start ov00_022C5084
ov00_022C5084: ; 0x022C5084
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	mov sl, r0
	add r6, sl, #0xc
	cmp r1, #0
	mov r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	mov r2, r0
_022C50A0:
	str r0, [sl, r2, lsl #2]
	add r3, r1, r2, lsl #4
	add r2, r2, #1
	ldr r3, [r3, #0x14]
	and r2, r2, #0xff
	cmp r2, #3
	add r0, r0, r3
	blo _022C50A0
	mov sb, #0
	ldr r4, _022C514C ; =ov00_0232502C
	strh sb, [r6]
	add r5, r1, #0xc
_022C50D0:
	ldr r0, [r4]
	add r7, r5, sb, lsl #4
	add r0, r0, #0x1000
	ldr r1, [r0, #0x318]
	ldr r8, [r7, #8]
	add r0, r8, r1
	sub r0, r0, #1
	bl _u32_div_f
	mov r1, sb, lsl #1
	ldrh r3, [r6, r1]
	mov r2, r0, lsl #0x10
	ldr r1, [r7, #4]
	add r2, r3, r2, lsr #16
	mov r3, r2, lsl #0x10
	mov r0, sb
	mov r2, r8
	mov r7, r3, lsr #0x10
	bl ov00_022C52B0
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	cmp sb, #2
	addlo r0, r6, sb, lsl #1
	strloh r7, [r0, #2]
	add r0, sb, #1
	and sb, r0, #0xff
	strhsh r7, [sl, #0x12]
	cmp sb, #3
	blo _022C50D0
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022C514C: .word ov00_0232502C
	arm_func_end ov00_022C5084

	arm_func_start ov00_022C5150
ov00_022C5150: ; 0x022C5150
	stmdb sp!, {r3, r4, r5, lr}
	ldrh r4, [r1, #0x12]
	cmp r2, r4
	movhs r0, #0
	ldmhsia sp!, {r3, r4, r5, pc}
	mov ip, #2
_022C5168:
	add r4, r1, ip, lsl #1
	ldrh r4, [r4, #0xc]
	cmp r2, r4
	bhs _022C5188
	sub r4, ip, #1
	mov ip, r4, lsl #0x18
	movs ip, ip, asr #0x18
	bpl _022C5168
_022C5188:
	cmp ip, #0
	movlt r0, #0
	ldmltia sp!, {r3, r4, r5, pc}
	ldr r4, _022C5200 ; =ov00_0232502C
	add r5, r1, ip, lsl #1
	ldr lr, [r4]
	ldrh r5, [r5, #0xc]
	add lr, lr, #0x1000
	ldr lr, [lr, #0x318]
	sub r5, r2, r5
	mul r2, r5, lr
	add r3, r3, #0xc
	add r5, r3, ip, lsl #4
	ldr r3, [r5, #8]
	sub lr, r3, r2
	str lr, [r0, #4]
	ldr r3, [r4]
	add r3, r3, #0x1000
	ldr r3, [r3, #0x318]
	cmp lr, r3
	strhi r3, [r0, #4]
	ldr r1, [r1, ip, lsl #2]
	add r1, r2, r1
	str r1, [r0, #8]
	ldr r1, [r5]
	add r1, r2, r1
	str r1, [r0]
	strb ip, [r0, #0xc]
	mov r0, #1
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022C5200: .word ov00_0232502C
	arm_func_end ov00_022C5150

	arm_func_start ov00_022C5204
ov00_022C5204: ; 0x022C5204
	ldr r3, _022C52A8 ; =ov00_0231812C
	ldr r0, [r3, r0, lsl #2]
	cmp r0, #0
	beq _022C5248
	cmp r0, #1
	beq _022C5264
	cmp r0, #2
	bne _022C5298
	ldr r0, _022C52AC ; =0x027FFE00
	cmp r1, r0
	blo _022C52A0
	add r1, r1, r2
	add r0, r0, #0x160
	cmp r1, r0
	bhi _022C52A0
	mov r0, #1
	bx lr
_022C5248:
	cmp r1, #0x2000000
	blo _022C52A0
	add r0, r1, r2
	cmp r0, #0x22c0000
	bhi _022C52A0
	mov r0, #1
	bx lr
_022C5264:
	cmp r1, #0x22c0000
	blo _022C527C
	add r0, r1, r2
	cmp r0, #0x2300000
	movls r0, #1
	bxls lr
_022C527C:
	cmp r1, #0x2000000
	blo _022C52A0
	add r0, r1, r2
	cmp r0, #0x2300000
	bhi _022C52A0
	mov r0, #1
	bx lr
_022C5298:
	mov r0, #0
	bx lr
_022C52A0:
	mov r0, #0
	bx lr
	.align 2, 0
_022C52A8: .word ov00_0231812C
_022C52AC: .word 0x027FFE00
	arm_func_end ov00_022C5204

	arm_func_start ov00_022C52B0
ov00_022C52B0: ; 0x022C52B0
	stmdb sp!, {r3, lr}
	ldr r3, _022C5370 ; =ov00_0231812C
	ldr r3, [r3, r0, lsl #2]
	cmp r3, #0
	beq _022C52D4
	cmp r3, #1
	beq _022C52DC
	cmp r3, #2
	bne _022C5360
_022C52D4:
	bl ov00_022C5204
	ldmia sp!, {r3, pc}
_022C52DC:
	cmp r1, #0x2000000
	blo _022C5334
	ldr r0, _022C5374 ; =0x023FE800
	cmp r1, r0
	bhs _022C5334
	cmp r1, #0x2300000
	add r1, r1, r2
	bhs _022C5308
	cmp r1, #0x2300000
	movhi r0, #0
	ldmhiia sp!, {r3, pc}
_022C5308:
	cmp r1, #0x2300000
	movls r0, #1
	ldmlsia sp!, {r3, pc}
	ldr r0, _022C5374 ; =0x023FE800
	cmp r1, r0
	bhs _022C532C
	cmp r2, #0x40000
	movls r0, #1
	ldmlsia sp!, {r3, pc}
_022C532C:
	mov r0, #0
	ldmia sp!, {r3, pc}
_022C5334:
	ldr r3, _022C5378 ; =0x037F8000
	cmp r1, r3
	blo _022C5368
	add r0, r3, #0x17000
	cmp r1, r0
	bhs _022C5368
	add r1, r1, r2
	cmp r1, r0
	movls r0, #1
	movhi r0, #0
	ldmia sp!, {r3, pc}
_022C5360:
	mov r0, #0
	ldmia sp!, {r3, pc}
_022C5368:
	mov r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022C5370: .word ov00_0231812C
_022C5374: .word 0x023FE800
_022C5378: .word 0x037F8000
	arm_func_end ov00_022C52B0

	arm_func_start ov00_022C537C
ov00_022C537C: ; 0x022C537C
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r4, r2
	add r2, r6, #0x1f
	mov r5, r1
	mov r0, r4
	bic r1, r2, #0x1f
	bl DC_FlushRange
	bl sub_0207A300
	mov r0, r4
	mov r1, r6
	mov r2, r5
	bl ov00_022C77C0
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022C537C

	arm_func_start ov00_022C53B4
ov00_022C53B4: ; 0x022C53B4
	mov r3, r1, asr #1
	cmp r3, #0
	mov r2, #0
	ble _022C53D8
_022C53C4:
	ldrh r1, [r0], #2
	sub r3, r3, #1
	cmp r3, #0
	add r2, r2, r1
	bgt _022C53C4
_022C53D8:
	mov r0, r2, lsl #0x10
	mov r0, r0, lsr #0x10
	add r1, r0, r2, lsr #16
	ldr r0, _022C53FC ; =0x0000FFFF
	add r1, r1, r1, lsr #16
	eor r0, r1, r0
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	bx lr
	.align 2, 0
_022C53FC: .word 0x0000FFFF
	arm_func_end ov00_022C53B4

	arm_func_start ov00_022C5400
ov00_022C5400: ; 0x022C5400
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r6, r0
	mov r5, r1
	mov r4, r2
	mov r1, r6
	mov r0, #0
	mov r2, #0x4c0
	bl ArrayFill16
	mov r0, #0
	strb r0, [r6, #0x4b2]
	ldr r0, [r5, #0xc]
	mov r1, r6
	mov r2, #1
	bl ov00_022C54F0
	cmp r0, #0
	moveq r7, #1
	ldr r0, [r5, #0x10]
	mov r1, r6
	mov r2, #0
	movne r7, #0
	bl ov00_022C54F0
	cmp r0, #0
	moveq r0, #1
	movne r0, #0
	orrs r0, r7, r0
	beq _022C5480
	mov r3, #1
	mov r1, r6
	mov r0, #0
	mov r2, #0x220
	strb r3, [r6, #0x4b2]
	bl ArrayFill32Fast
_022C5480:
	ldr r0, [r5, #0x14]
	cmp r4, #0
	str r0, [r6, #0x4b8]
	beq _022C54A0
	mov r0, r4
	add r1, r6, #0x220
	mov r2, #0x16
	bl ArrayCopy16
_022C54A0:
	ldrb r0, [r5, #0x18]
	strb r0, [r6, #0x236]
	ldr r0, [r5, #4]
	bl ov00_022C5600
	mov r2, r0, lsl #0x11
	ldr r0, [r5, #4]
	add r1, r6, #0x238
	mov r2, r2, lsr #0x10
	bl ArrayCopy16
	ldr r0, [r5, #8]
	add r1, r6, #0x298
	mov r2, #0xc0
	bl ArrayCopy16
	mov r1, #1
	strb r1, [r6, #0x358]
	add r0, r6, #0x300
	strh r1, [r0, #0x5a]
	add r0, r6, #0x400
	strh r1, [r0, #0xb0]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022C5400

	arm_func_start ov00_022C54F0
ov00_022C54F0: ; 0x022C54F0
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #0x48
	cmp r2, #0
	movne r4, #0x200
	moveq r4, #0x20
	mov r6, r0
	mov r5, r1
	cmp r2, #0
	addne r5, r5, #0x20
	cmp r6, #0
	addeq sp, sp, #0x48
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	add r0, sp, #0
	bl FileInit
	add r0, sp, #0
	mov r1, r6
	bl sub_0207F6C4
	cmp r0, #0
	addeq sp, sp, #0x48
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	ldr r1, [sp, #0x28]
	ldr r0, [sp, #0x24]
	sub r0, r1, r0
	cmp r4, r0
	add r0, sp, #0
	beq _022C5570
	bl sub_0207F70C
	add sp, sp, #0x48
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022C5570:
	mov r1, r5
	mov r2, r4
	bl sub_0207F818
	add r0, sp, #0
	bl sub_0207F70C
	mov r0, #1
	add sp, sp, #0x48
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022C54F0

	arm_func_start ov00_022C5590
ov00_022C5590: ; 0x022C5590
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r6, r0
	mov r5, r2
	add r4, r6, #0x5e
	mov r0, r1
	add r1, r4, #0x300
	ldr r2, _022C55FC ; =0x0000014A
	mov r4, r3
	mov r7, #1
	bl ArrayCopy16
	mov r2, #0
	mov r1, #2
_022C55C0:
	tst r5, r1, lsl r2
	addne r0, r7, #1
	add r2, r2, #1
	andne r7, r0, #0xff
	cmp r2, #0xf
	blt _022C55C0
	strb r7, [r6, #0x358]
	orr r1, r5, #1
	add r0, r6, #0x300
	strh r1, [r0, #0x5a]
	strh r4, [r0, #0x5c]
	ldrb r0, [r6, #0x4b4]
	add r0, r0, #1
	strb r0, [r6, #0x4b4]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022C55FC: .word 0x0000014A
	arm_func_end ov00_022C5590

	arm_func_start ov00_022C5600
ov00_022C5600: ; 0x022C5600
	ldrh r1, [r0], #2
	mov r2, #0
	cmp r1, #0
	beq _022C5620
_022C5610:
	ldrh r1, [r0], #2
	add r2, r2, #1
	cmp r1, #0
	bne _022C5610
_022C5620:
	mov r0, r2
	bx lr
	arm_func_end ov00_022C5600

	arm_func_start ov00_022C5628
ov00_022C5628: ; 0x022C5628
	ldr r1, _022C5668 ; =ov00_0231F580
	ldr r2, [r1, #0x18]
	cmp r2, #0
	streq r0, [r1, #0x18]
	beq _022C565C
	ldr r1, [r2, #0x4bc]
	cmp r1, #0
	beq _022C5658
_022C5648:
	mov r2, r1
	ldr r1, [r1, #0x4bc]
	cmp r1, #0
	bne _022C5648
_022C5658:
	str r0, [r2, #0x4bc]
_022C565C:
	mov r1, #0
	str r1, [r0, #0x4bc]
	bx lr
	.align 2, 0
_022C5668: .word ov00_0231F580
	arm_func_end ov00_022C5628

	arm_func_start ov00_022C566C
ov00_022C566C: ; 0x022C566C
	ldr r0, _022C5690 ; =ov00_0231F580
	mov r2, #0
	str r2, [r0, #0x18]
	str r2, [r0, #0x1c]
	mov r1, #1
	strb r1, [r0, #0x24]
	ldr ip, _022C5694 ; =ov00_022C5698
	str r2, [r0, #0x14]
	bx ip
	.align 2, 0
_022C5690: .word ov00_0231F580
_022C5694: .word ov00_022C5698
	arm_func_end ov00_022C566C

	arm_func_start ov00_022C5698
ov00_022C5698: ; 0x022C5698
	ldr r0, _022C56B8 ; =ov00_0231F580
	mov r1, #0
	strb r1, [r0, #0x25]
	strb r1, [r0, #0x26]
	strb r1, [r0, #0x27]
	strb r1, [r0, #0x28]
	strb r1, [r0, #0x29]
	bx lr
	.align 2, 0
_022C56B8: .word ov00_0231F580
	arm_func_end ov00_022C5698

	arm_func_start ov00_022C56BC
ov00_022C56BC: ; 0x022C56BC
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr r4, _022C5744 ; =ov00_0231F580
	mov r7, r0
	mov r6, r1
	mov r5, r2
_022C56D0:
	ldrb r0, [r4, #0x24]
	cmp r0, #6
	addls pc, pc, r0, lsl #2
	b _022C56D0
_022C56E0: ; jump table
	b _022C56FC ; case 0
	b _022C56FC ; case 1
	b _022C570C ; case 2
	b _022C5714 ; case 3
	b _022C5728 ; case 4
	b _022C5730 ; case 5
	b _022C56D0 ; case 6
_022C56FC:
	bl ov00_022C5748
	cmp r0, #0
	bne _022C56D0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022C570C:
	bl ov00_022C57E8
	b _022C56D0
_022C5714:
	mov r0, r7
	mov r1, r6
	mov r2, r5
	bl ov00_022C583C
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022C5728:
	bl ov00_022C59A0
	b _022C56D0
_022C5730:
	mov r0, r7
	mov r1, r6
	mov r2, r5
	bl ov00_022C59D0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022C5744: .word ov00_0231F580
	arm_func_end ov00_022C56BC

	arm_func_start ov00_022C5748
ov00_022C5748: ; 0x022C5748
	stmdb sp!, {r4, lr}
	sub sp, sp, #8
	ldr r0, _022C57E0 ; =ov00_0231F580
	ldr r1, [r0, #0x18]
	cmp r1, #0
	bne _022C5798
	bl ov00_022C78A0
	mov r4, r0
	bl ov00_022C78B4
	str r0, [sp]
	mov ip, #8
	ldr r1, _022C57E4 ; =ov00_0231F5C0
	mov r3, r4
	mov r0, #0
	mov r2, #0x70
	str ip, [sp, #4]
	bl ov00_022C14A8
	add sp, sp, #8
	mov r0, #0
	ldmia sp!, {r4, pc}
_022C5798:
	ldr r0, [r0, #0x1c]
	cmp r0, #0
	ldrne r1, [r0, #0x4bc]
	cmpne r1, #0
	ldreq r0, _022C57E0 ; =ov00_0231F580
	ldreq r1, [r0, #0x18]
	ldr r0, _022C57E0 ; =ov00_0231F580
	str r1, [r0, #0x1c]
	bl ov00_022C5698
	ldr r1, _022C57E0 ; =ov00_0231F580
	mov r2, #2
	ldr r3, [r1, #0x1c]
	mov r0, #1
	ldrb r3, [r3, #0x4b4]
	strb r3, [r1, #0x26]
	strb r2, [r1, #0x24]
	add sp, sp, #8
	ldmia sp!, {r4, pc}
	.align 2, 0
_022C57E0: .word ov00_0231F580
_022C57E4: .word ov00_0231F5C0
	arm_func_end ov00_022C5748

	arm_func_start ov00_022C57E8
ov00_022C57E8: ; 0x022C57E8
	ldr r0, _022C5838 ; =ov00_0231F580
	ldrb r1, [r0, #0x24]
	cmp r1, #2
	bxne lr
	ldr r2, [r0, #0x1c]
	ldrb r1, [r2, #0x4b2]
	cmp r1, #0
	bne _022C5818
	mov r1, #9
	strb r1, [r0, #0x28]
	str r2, [r0, #0x20]
	b _022C5828
_022C5818:
	mov r1, #4
	strb r1, [r0, #0x28]
	add r1, r2, #0x220
	str r1, [r0, #0x20]
_022C5828:
	ldr r0, _022C5838 ; =ov00_0231F580
	mov r1, #3
	strb r1, [r0, #0x24]
	bx lr
	.align 2, 0
_022C5838: .word ov00_0231F580
	arm_func_end ov00_022C57E8

	arm_func_start ov00_022C583C
ov00_022C583C: ; 0x022C583C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #8
	ldr r3, _022C5990 ; =ov00_0231F580
	mov r6, r0
	ldr r4, [r3, #0x1c]
	ldr r0, [r3, #0x20]
	add ip, r4, #0x358
	add r7, r0, #0x62
	cmp r7, ip
	movls r0, #0x62
	mov r5, r1
	mov r4, r2
	strlsb r0, [r3, #0x4c]
	bls _022C5894
	sub r7, ip, r0
	and r1, r7, #0xff
	ldr r0, _022C5994 ; =ov00_0231F5CE
	rsb r2, r1, #0x62
	add r1, r0, r1
	mov r0, #0
	strb r7, [r3, #0x4c]
	bl ArrayFill16
_022C5894:
	ldr r0, _022C5990 ; =ov00_0231F580
	ldr r1, _022C5994 ; =ov00_0231F5CE
	ldrb r2, [r0, #0x4c]
	ldr r0, [r0, #0x20]
	bl ArrayCopy16
	ldr r2, _022C5990 ; =ov00_0231F580
	ldr r0, _022C5998 ; =ov00_0231F5C8
	ldrb r7, [r2, #0x27]
	mov r3, #0
	mov r1, #0x68
	strb r7, [r2, #0x4a]
	ldrb r7, [r2, #0x28]
	strb r7, [r2, #0x4b]
	ldr r7, [r2, #0x1c]
	ldrb lr, [r2, #0x44]
	ldrb ip, [r7, #0x4b2]
	bic lr, lr, #3
	and ip, ip, #3
	orr ip, lr, ip
	strb ip, [r2, #0x44]
	ldrb ip, [r7, #0x4b3]
	strb ip, [r2, #0x45]
	ldrb ip, [r2, #0x26]
	strb ip, [r2, #0x46]
	ldr ip, [r7, #0x4b8]
	str ip, [r2, #0x40]
	ldrb lr, [r2, #0x44]
	ldrb ip, [r7, #0x4b5]
	bic lr, lr, #0xfc
	mov ip, ip, lsl #0x1a
	orr ip, lr, ip, lsr #24
	strb ip, [r2, #0x44]
	ldrb lr, [r2, #0x29]
	add ip, lr, #1
	strb ip, [r2, #0x29]
	strb lr, [r2, #0x47]
	strh r3, [r2, #0x48]
	bl ov00_022C53B4
	ldr r1, _022C5990 ; =ov00_0231F580
	strh r0, [r1, #0x48]
	ldrb r0, [r1, #0x27]
	add r2, r0, #1
	strb r2, [r1, #0x27]
	ldrb r0, [r1, #0x28]
	and r2, r2, #0xff
	cmp r2, r0
	movhs r0, #4
	strhsb r0, [r1, #0x24]
	bhs _022C5964
	ldr r0, [r1, #0x20]
	add r0, r0, #0x62
	str r0, [r1, #0x20]
_022C5964:
	orr r0, r4, #3
	ldr r1, _022C599C ; =ov00_0231F5C0
	mov r3, r6
	str r5, [sp]
	and r4, r0, #0xff
	mov r0, #0
	mov r2, #0x70
	str r4, [sp, #4]
	bl ov00_022C14A8
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022C5990: .word ov00_0231F580
_022C5994: .word ov00_0231F5CE
_022C5998: .word ov00_0231F5C8
_022C599C: .word ov00_0231F5C0
	arm_func_end ov00_022C583C

	arm_func_start ov00_022C59A0
ov00_022C59A0: ; 0x022C59A0
	ldr r1, _022C59CC ; =ov00_0231F580
	mov r3, #1
	ldr r0, [r1, #0x1c]
	mov r2, #5
	add r0, r0, #0x400
	strh r3, [r0, #0xb0]
	ldr r0, [r1, #0x1c]
	ldrb r0, [r0, #0x4b4]
	strb r0, [r1, #0x26]
	strb r2, [r1, #0x24]
	bx lr
	.align 2, 0
_022C59CC: .word ov00_0231F580
	arm_func_end ov00_022C59A0

	arm_func_start ov00_022C59D0
ov00_022C59D0: ; 0x022C59D0
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x14
	ldr r3, _022C5C28 ; =ov00_0231F580
	str r0, [sp, #8]
	ldr r0, [r3, #0x1c]
	ldrb r3, [r3, #0x26]
	ldrb r0, [r0, #0x4b4]
	str r1, [sp, #0xc]
	str r2, [sp, #0x10]
	cmp r3, r0
	beq _022C5A00
	bl ov00_022C59A0
_022C5A00:
	ldr r2, _022C5C28 ; =ov00_0231F580
	ldrb r0, [r2, #0x44]
	bic r0, r0, #3
	orr r0, r0, #2
	strb r0, [r2, #0x44]
	ldr r0, [r2, #0x1c]
	ldrb r3, [r0, #0x4b3]
	add r1, r0, #0x300
	strb r3, [r2, #0x45]
	ldrb r3, [r2, #0x26]
	strb r3, [r2, #0x46]
	ldr r3, [r0, #0x4b8]
	str r3, [r2, #0x40]
	ldrb r4, [r2, #0x44]
	ldrb r3, [r0, #0x4b5]
	bic r4, r4, #0xfc
	mov r3, r3, lsl #0x1a
	orr r3, r4, r3, lsr #24
	strb r3, [r2, #0x44]
	ldrb r4, [r2, #0x29]
	add r3, r4, #1
	strb r3, [r2, #0x29]
	strb r4, [r2, #0x47]
	ldrb r3, [r0, #0x358]
	strb r3, [r2, #0x4a]
	ldrh r3, [r1, #0x5a]
	strh r3, [r2, #0x4c]
	ldrh r1, [r1, #0x5c]
	strh r1, [r2, #0x4e]
	ldr r1, [r2, #0x10]
	cmp r1, #0
	bne _022C5A94
	ldr r1, [r2, #0x14]
	cmp r1, #0
	beq _022C5A94
	ldr r0, [r0, #0x4b8]
	blx r1
_022C5A94:
	ldr r0, _022C5C28 ; =ov00_0231F580
	mov sb, #0
	ldr r1, _022C5C2C ; =ov00_0231F628
	ldr r2, [r0, #0x1c]
	b _022C5AB8
_022C5AA8:
	add r0, r2, sb
	ldrb r0, [r0, #0x4a8]
	strb r0, [r1, sb]
	add sb, sb, #1
_022C5AB8:
	cmp sb, #8
	blt _022C5AA8
	ldr r1, _022C5C30 ; =ov00_0231F5D0
	mov r0, #0
	mov r2, #0x58
	bl ArrayFill16
	ldr r5, _022C5C28 ; =ov00_0231F580
	mov sl, #0
	ldr r1, [r5, #0x1c]
	mov r6, #2
	add r0, r1, #0x400
	add r1, r1, #0x300
	ldrh r2, [r0, #0xb0]
	ldrh r0, [r1, #0x5a]
	mov sb, sl
	ldr r7, _022C5C30 ; =ov00_0231F5D0
	eor r0, r2, r0
	mov r4, r0, lsl #0x10
	mov r8, r6
	mov fp, #0x16
	b _022C5B5C
_022C5B0C:
	mov r0, r8, lsl sb
	tst r0, r4, lsr #16
	beq _022C5B58
	ldr r0, [r5, #0x1c]
	mla r1, sl, fp, r7
	add r0, r0, #0x5e
	add r2, r0, #0x300
	mov r0, #0x16
	mla r0, sb, r0, r2
	mov r2, #0x16
	bl ArrayCopy16
	ldr r0, [r5, #0x1c]
	add sl, sl, #1
	add r0, r0, #0x400
	ldrh r1, [r0, #0xb0]
	cmp sl, #4
	orr r1, r1, r6, lsl sb
	strh r1, [r0, #0xb0]
	beq _022C5B64
_022C5B58:
	add sb, sb, #1
_022C5B5C:
	cmp sb, #0xf
	blt _022C5B0C
_022C5B64:
	cmp sl, #4
	bhs _022C5B84
	mov r0, #0x16
	mul r1, sl, r0
	ldr r2, _022C5C30 ; =ov00_0231F5D0
	ldrb r0, [r2, r1]
	bic r0, r0, #0xf0
	strb r0, [r2, r1]
_022C5B84:
	ldr r2, _022C5C28 ; =ov00_0231F580
	mov r3, #0
	ldr r0, _022C5C34 ; =ov00_0231F5C8
	mov r1, #0x68
	strh r3, [r2, #0x48]
	bl ov00_022C53B4
	ldr r2, _022C5C28 ; =ov00_0231F580
	strh r0, [r2, #0x48]
	ldr r1, [r2, #0x1c]
	add r0, r1, #0x400
	add r1, r1, #0x300
	ldrh r3, [r0, #0xb0]
	ldrh r0, [r1, #0x5a]
	ldr r1, _022C5C38 ; =ov00_0231F5C0
	cmp r3, r0
	moveq r0, #1
	streqb r0, [r2, #0x24]
	ldr r0, [sp, #0x10]
	ldr r3, [sp, #8]
	orr r2, r0, #3
	ldr r0, [sp, #0xc]
	and r4, r2, #0xff
	str r0, [sp]
	mov r0, #0
	mov r2, #0x70
	str r4, [sp, #4]
	bl ov00_022C14A8
	ldr r0, _022C5C28 ; =ov00_0231F580
	ldr r1, [r0, #0x10]
	cmp r1, #1
	addne sp, sp, #0x14
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r0, #0x14]
	cmp r1, #0
	addeq sp, sp, #0x14
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r0, #0x1c]
	ldr r0, [r0, #0x4b8]
	blx r1
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022C5C28: .word ov00_0231F580
_022C5C2C: .word ov00_0231F628
_022C5C30: .word ov00_0231F5D0
_022C5C34: .word ov00_0231F5C8
_022C5C38: .word ov00_0231F5C0
	arm_func_end ov00_022C59D0

	arm_func_start ov00_022C5C3C
ov00_022C5C3C: ; 0x022C5C3C
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r0
	bl ov00_022BF640
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldrh lr, [r4, #4]
	mov r2, #1
	mov ip, #0
	mov r5, lr
	mov r3, r2
_022C5C68:
	sub r1, r5, #1
	tst r0, r3, lsl r1
	cmpne lr, r5
	strneh r5, [r4, #4]
	bne _022C5CA4
	add r1, ip, #1
	mov r1, r1, lsl #0x10
	cmp r5, #0x10
	mov ip, r1, lsr #0x10
	moveq r1, r2
	addne r1, r5, #1
	mov r1, r1, lsl #0x10
	cmp ip, #0x10
	mov r5, r1, lsr #0x10
	blo _022C5C68
_022C5CA4:
	mov r0, #1
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022C5C3C

	arm_func_start ov00_022C5CAC
ov00_022C5CAC: ; 0x022C5CAC
	ldr r1, _022C5D08 ; =ov00_02325020
	mov r0, #0
	ldr ip, [r1, #8]
	mov r3, r0
	add r1, ip, #0x500
	ldrh r1, [r1, #0x28]
	mov r2, r0
	cmp r1, #1
	ldreqb r1, [ip, #0x50c]
	cmpeq r1, #0
	moveq r3, #1
	cmp r3, #0
	beq _022C5CF0
	add r1, ip, #0x500
	ldrh r1, [r1, #0x26]
	cmp r1, #0
	moveq r2, #1
_022C5CF0:
	cmp r2, #0
	addne r1, ip, #0x500
	ldrneh r1, [r1, #0x2a]
	cmpne r1, #0
	movne r0, #1
	bx lr
	.align 2, 0
_022C5D08: .word ov00_02325020
	arm_func_end ov00_022C5CAC

	arm_func_start ov00_022C5D0C
ov00_022C5D0C: ; 0x022C5D0C
	stmdb sp!, {r3, lr}
	ldr r0, _022C5D54 ; =ov00_022C5DA0
	bl ov00_022BF2C4
	mov r1, r0
	mov r0, #0x80
	bl ov00_022C7948
	ldr r3, _022C5D58 ; =ov00_02318820
	ldr r0, _022C5D54 ; =ov00_022C5DA0
	ldrh r1, [r3, #4]
	str r1, [sp]
	ldrh r1, [r3, #6]
	ldrh r2, [r3, #2]
	ldrh r3, [r3]
	bl ov00_022C15B0
	mov r1, r0
	mov r0, #0x1d
	bl ov00_022C7948
	ldmia sp!, {r3, pc}
	.align 2, 0
_022C5D54: .word ov00_022C5DA0
_022C5D58: .word ov00_02318820
	arm_func_end ov00_022C5D0C

	arm_func_start ov00_022C5D5C
ov00_022C5D5C: ; 0x022C5D5C
	stmdb sp!, {r3, lr}
	ldr r2, _022C5D9C ; =ov00_02325020
	mov ip, #0
	ldr r3, [r2, #8]
	mov r1, r0
	strb ip, [r3, #0x50d]
	ldr r0, [r2, #0xc]
	add r0, r0, #0x1300
	strh ip, [r0, #0x16]
	ldr r0, [r2, #8]
	ldr r2, [r0, #0x51c]
	cmp r2, #0
	ldmeqia sp!, {r3, pc}
	mov r0, #0x11
	blx r2
	ldmia sp!, {r3, pc}
	.align 2, 0
_022C5D9C: .word ov00_02325020
	arm_func_end ov00_022C5D5C

	arm_func_start ov00_022C5DA0
ov00_022C5DA0: ; 0x022C5DA0
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #0x1c
	mov r4, r0
	ldrh r1, [r4]
	cmp r1, #0x19
	bgt _022C5E08
	bge _022C5EE4
	cmp r1, #0xf
	addls pc, pc, r1, lsl #2
	b _022C65C8
_022C5DC8: ; jump table
	b _022C5E24 ; case 0
	b _022C6398 ; case 1
	b _022C6488 ; case 2
	b _022C65C8 ; case 3
	b _022C65C8 ; case 4
	b _022C65C8 ; case 5
	b _022C65C8 ; case 6
	b _022C5EAC ; case 7
	b _022C5F80 ; case 8
	b _022C65C8 ; case 9
	b _022C65C8 ; case 10
	b _022C65C8 ; case 11
	b _022C65C8 ; case 12
	b _022C64D0 ; case 13
	b _022C61D4 ; case 14
	b _022C6274 ; case 15
_022C5E08:
	cmp r1, #0x1d
	bgt _022C5E18
	beq _022C5E5C
	b _022C65C8
_022C5E18:
	cmp r1, #0x80
	beq _022C6508
	b _022C65C8
_022C5E24:
	ldrh r0, [r4, #2]
	cmp r0, #0
	beq _022C5E50
	ldr r0, _022C65E8 ; =ov00_02325020
	mov r1, r4
	ldr r2, [r0, #8]
	mov r0, #0x100
	ldr r2, [r2, #0x51c]
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C5E50:
	bl ov00_022C5D0C
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C5E5C:
	ldrh r0, [r4, #2]
	cmp r0, #0
	beq _022C5E88
	ldr r0, _022C65E8 ; =ov00_02325020
	mov r1, r4
	ldr r2, [r0, #8]
	mov r0, #0x100
	ldr r2, [r2, #0x51c]
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C5E88:
	ldr r1, _022C65E8 ; =ov00_02325020
	ldr r0, _022C65EC ; =ov00_022C5DA0
	ldr r1, [r1, #8]
	bl ov00_022BFC14
	mov r1, r0
	mov r0, #7
	bl ov00_022C7948
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C5EAC:
	ldr r0, _022C65E8 ; =ov00_02325020
	mov r1, r4
	ldr r2, [r0, #8]
	mov r0, #0x15
	ldr r2, [r2, #0x51c]
	blx r2
	ldr r0, _022C65EC ; =ov00_022C5DA0
	mov r1, #1
	bl ov00_022C1560
	mov r1, r0
	mov r0, #0x19
	bl ov00_022C7948
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C5EE4:
	ldr r2, _022C65E8 ; =ov00_02325020
	ldr ip, [r2, #8]
	add r1, ip, #0x500
	ldrh r3, [r1, #0x26]
	cmp r3, #0
	bne _022C5F44
	ldrh r0, [r4, #2]
	cmp r0, #0
	beq _022C5F20
	ldr r2, [ip, #0x51c]
	mov r1, r4
	mov r0, #0x100
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C5F20:
	ldr r1, _022C65F0 ; =ov00_02318820
	ldr r0, _022C65EC ; =ov00_022C5DA0
	ldr r1, [r1, #0xc]
	bl ov00_022BFD40
	mov r1, r0
	mov r0, #8
	bl ov00_022C7948
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C5F44:
	ldrh r3, [r4, #2]
	cmp r3, #0
	beq _022C5F74
	mov r0, #0
	strh r0, [r1, #0x26]
	ldr r0, [r2, #8]
	mov r1, r4
	ldr r2, [r0, #0x51c]
	mov r0, #0x100
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C5F74:
	bl ov00_022C5D5C
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C5F80:
	ldrh r0, [r4, #2]
	cmp r0, #0
	beq _022C5FAC
	ldr r0, _022C65E8 ; =ov00_02325020
	mov r1, r4
	ldr r2, [r0, #8]
	mov r0, #0x100
	ldr r2, [r2, #0x51c]
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C5FAC:
	ldrh r0, [r4, #8]
	cmp r0, #7
	bgt _022C5FDC
	bge _022C6024
	cmp r0, #2
	bgt _022C61B4
	cmp r0, #0
	blt _022C61B4
	beq _022C5FFC
	cmp r0, #2
	beq _022C6180
	b _022C61B4
_022C5FDC:
	cmp r0, #9
	bgt _022C5FEC
	beq _022C6144
	b _022C61B4
_022C5FEC:
	cmp r0, #0x1a
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r3, r4, pc}
	b _022C61B4
_022C5FFC:
	ldr r1, _022C65E8 ; =ov00_02325020
	mov r2, #0
	ldr r0, [r1, #8]
	add sp, sp, #0x1c
	add r0, r0, #0x500
	strh r2, [r0, #0x2a]
	ldr r0, [r1, #8]
	add r0, r0, #0x500
	strh r2, [r0, #0x28]
	ldmia sp!, {r3, r4, pc}
_022C6024:
	ldr r2, _022C65E8 ; =ov00_02325020
	ldr r0, [r2, #8]
	add r0, r0, #0x500
	ldrh r1, [r0, #0x26]
	cmp r1, #1
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r3, r4, pc}
	ldrh lr, [r0, #0x2a]
	ldrh r3, [r4, #0x10]
	mov ip, #1
	mov r1, r4
	orr r3, lr, ip, lsl r3
	strh r3, [r0, #0x2a]
	ldr r2, [r2, #8]
	mov r0, #0
	ldr r2, [r2, #0x51c]
	blx r2
	ldr r1, _022C65E8 ; =ov00_02325020
	ldr r0, [r1, #8]
	add r0, r0, #0x500
	ldrh r0, [r0, #0x28]
	cmp r0, #0
	bne _022C6114
	ldr r0, [r1, #0xc]
	add r0, r0, #0x1000
	ldr r2, [r0, #0x31c]
	cmp r2, #0
	bne _022C6114
	mov r2, #1
	str r2, [r0, #0x31c]
	ldr r0, [r1, #8]
	ldr r1, _022C65E8 ; =ov00_02325020
	add r0, r0, #0x500
	ldrh r0, [r0, #0x2c]
	ldr ip, [r1, #8]
	mov r1, #1
	cmp r0, #0
	movne r2, #0
	mov r0, r2, lsl #0x10
	mov r3, r0, lsr #0x10
	add r0, ip, #0x500
	ldrh r4, [r0, #0x18]
	mov r2, #0
	str r4, [sp]
	str r3, [sp, #4]
	str r2, [sp, #8]
	str r2, [sp, #0xc]
	str r2, [sp, #0x10]
	str r1, [sp, #0x14]
	str r1, [sp, #0x18]
	ldrh r2, [r0, #0x1a]
	ldr r1, [ip, #0x504]
	ldr r0, _022C65EC ; =ov00_022C5DA0
	add r3, ip, #0x40
	bl ov00_022C038C
	mov r1, r0
	mov r0, #0xe
	bl ov00_022C7948
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C6114:
	bl ov00_022C5CAC
	cmp r0, #0
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r3, r4, pc}
	ldr r1, _022C65E8 ; =ov00_02325020
	mov r0, #0x19
	ldr r2, [r1, #8]
	mov r1, #0
	ldr r2, [r2, #0x51c]
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C6144:
	ldr r2, _022C65E8 ; =ov00_02325020
	ldrh r3, [r4, #0x10]
	ldr r1, [r2, #8]
	mov r0, #1
	add r1, r1, #0x500
	ldrh ip, [r1, #0x2a]
	mvn r3, r0, lsl r3
	and r3, ip, r3
	strh r3, [r1, #0x2a]
	ldr r2, [r2, #8]
	mov r1, r4
	ldr r2, [r2, #0x51c]
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C6180:
	ldr r0, _022C65E8 ; =ov00_02325020
	ldr r1, [r0, #8]
	add r0, r1, #0x500
	ldrh r0, [r0, #0x26]
	cmp r0, #1
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r3, r4, pc}
	ldr r2, [r1, #0x51c]
	mov r1, r4
	mov r0, #0x1c
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C61B4:
	ldr r0, _022C65E8 ; =ov00_02325020
	mov r1, r4
	ldr r2, [r0, #8]
	mov r0, #0x100
	ldr r2, [r2, #0x51c]
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C61D4:
	ldr r2, _022C65E8 ; =ov00_02325020
	mov r1, #0
	ldr r0, [r2, #0xc]
	add r0, r0, #0x1000
	str r1, [r0, #0x31c]
	ldrh r0, [r4, #4]
	cmp r0, #0xa
	beq _022C6200
	cmp r0, #0xb
	beq _022C623C
	b _022C6258
_022C6200:
	ldr r0, [r2, #8]
	mov r3, #1
	add r0, r0, #0x500
	strh r3, [r0, #0x28]
	ldr r2, [r2, #8]
	add r0, r2, #0x500
	ldrh r0, [r0, #0x26]
	cmp r0, #0
	addne sp, sp, #0x1c
	ldmneia sp!, {r3, r4, pc}
	ldr r2, [r2, #0x51c]
	mov r0, #0x19
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C623C:
	ldr r0, [r2, #8]
	ldr r1, [r4, #8]
	ldr r2, [r0, #0x51c]
	mov r0, #3
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C6258:
	ldr r0, [r2, #8]
	mov r1, r4
	ldr r2, [r0, #0x51c]
	mov r0, #0x100
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C6274:
	ldr r0, _022C65E8 ; =ov00_02325020
	ldr r3, [r0, #0xc]
	add r0, r3, #0x7000
	ldr r0, [r0, #0x4c8]
	cmp r0, #0
	beq _022C62D0
	mov r2, #0
	mov r1, r2
_022C6294:
	add r0, r3, r1, lsl #2
	add r0, r0, #0x1000
	ldr r0, [r0, #0x4e8]
	cmp r0, #0
	beq _022C62B4
	add r2, r2, #1
	cmp r2, #2
	bhs _022C62C0
_022C62B4:
	add r1, r1, #1
	cmp r1, #0xf
	blo _022C6294
_022C62C0:
	cmp r2, #1
	bne _022C62D0
	ldr r0, _022C65F4 ; =0x000032C8
	bl sub_0207B854
_022C62D0:
	ldr r0, _022C65E8 ; =ov00_02325020
	mov r2, #0
	ldr r1, [r0, #8]
	strb r2, [r1, #0x50c]
	ldrh r1, [r4, #2]
	cmp r1, #0
	bne _022C6334
	ldr r0, [r0, #8]
	mov r1, r4
	ldr r2, [r0, #0x51c]
	mov r0, #2
	blx r2
	ldr r0, _022C65E8 ; =ov00_02325020
	ldr r1, [r0, #8]
	add r0, r1, #0x500
	ldrh r0, [r0, #0x26]
	cmp r0, #0
	addne sp, sp, #0x1c
	ldmneia sp!, {r3, r4, pc}
	ldr r2, [r1, #0x51c]
	mov r0, #0x19
	mov r1, #0
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C6334:
	cmp r1, #0xa
	ldr r0, [r0, #8]
	mov r1, r4
	bne _022C6358
	ldr r2, [r0, #0x51c]
	mov r0, #0x2a
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C6358:
	ldr r2, [r0, #0x51c]
	mov r0, #0x13
	blx r2
	ldr r0, _022C65E8 ; =ov00_02325020
	ldr r1, [r0, #8]
	add r0, r1, #0x500
	ldrh r0, [r0, #0x26]
	cmp r0, #0
	addne sp, sp, #0x1c
	ldmneia sp!, {r3, r4, pc}
	ldr r2, [r1, #0x51c]
	mov r0, #0x19
	mov r1, #0
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C6398:
	ldr r1, _022C65E8 ; =ov00_02325020
	ldr r0, [r1, #0xc]
	add r0, r0, #0x1000
	ldr r0, [r0, #0x320]
	cmp r0, #0
	bne _022C6414
	ldrh r0, [r4, #2]
	mov r2, #0
	cmp r0, #0
	ldr r0, [r1, #8]
	add r0, r0, #0x500
	beq _022C63E8
	strh r2, [r0, #0x26]
	ldr r0, [r1, #8]
	mov r1, r4
	ldr r2, [r0, #0x51c]
	mov r0, #0x100
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C63E8:
	strh r2, [r0, #0x2a]
	ldr r1, [r1, #8]
	ldr r0, _022C65EC ; =ov00_022C5DA0
	add r1, r1, #0x500
	strh r2, [r1, #0x28]
	bl ov00_022BFBD4
	mov r1, r0
	mov r0, #2
	bl ov00_022C7948
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C6414:
	mov r1, #0
	mov r2, r1
	mov r0, #1
	bl ov00_022BF308
	mov r0, #0
	bl ov00_022BF2C4
	ldrh r0, [r4, #2]
	cmp r0, #0
	beq _022C6468
	ldr r2, _022C65E8 ; =ov00_02325020
	mov r3, #0
	ldr r0, [r2, #8]
	mov r1, r4
	add r0, r0, #0x500
	strh r3, [r0, #0x26]
	ldr r2, [r2, #8]
	mov r0, #0x100
	ldr r2, [r2, #0x51c]
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C6468:
	ldr r0, _022C65EC ; =ov00_022C5DA0
	mov r1, #0
	bl ov00_022C1560
	mov r1, r0
	mov r0, #0x19
	bl ov00_022C7948
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C6488:
	ldrh r1, [r4, #2]
	cmp r1, #0
	beq _022C64C4
	ldr r2, _022C65E8 ; =ov00_02325020
	mov r3, #0
	ldr r0, [r2, #8]
	mov r1, r4
	add r0, r0, #0x500
	strh r3, [r0, #0x26]
	ldr r2, [r2, #8]
	mov r0, #0x100
	ldr r2, [r2, #0x51c]
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C64C4:
	bl ov00_022C5D5C
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C64D0:
	ldrh r0, [r4, #2]
	cmp r0, #0
	addne sp, sp, #0x1c
	ldmneia sp!, {r3, r4, pc}
	ldr r0, _022C65E8 ; =ov00_02325020
	ldrh r1, [r4, #0xa]
	ldr r0, [r0, #8]
	add sp, sp, #0x1c
	add r0, r0, #0x500
	ldrh r2, [r0, #0x2a]
	mvn r1, r1
	and r1, r2, r1
	strh r1, [r0, #0x2a]
	ldmia sp!, {r3, r4, pc}
_022C6508:
	ldrh r0, [r4, #4]
	sub r0, r0, #0x10
	cmp r0, #7
	addls pc, pc, r0, lsl #2
	b _022C65E0
_022C651C: ; jump table
	b _022C653C ; case 0
	b _022C655C ; case 1
	b _022C657C ; case 2
	b _022C659C ; case 3
	b _022C65E0 ; case 4
	b _022C65E0 ; case 5
	b _022C65BC ; case 6
	b _022C65E0 ; case 7
_022C653C:
	ldr r0, _022C65E8 ; =ov00_02325020
	mov r1, r4
	ldr r2, [r0, #8]
	mov r0, #0x1d
	ldr r2, [r2, #0x51c]
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C655C:
	ldr r0, _022C65E8 ; =ov00_02325020
	mov r1, r4
	ldr r2, [r0, #8]
	mov r0, #0x1f
	ldr r2, [r2, #0x51c]
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C657C:
	ldr r0, _022C65E8 ; =ov00_02325020
	mov r1, r4
	ldr r2, [r0, #8]
	mov r0, #0x20
	ldr r2, [r2, #0x51c]
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C659C:
	ldr r0, _022C65E8 ; =ov00_02325020
	mov r1, r4
	ldr r2, [r0, #8]
	mov r0, #0x21
	ldr r2, [r2, #0x51c]
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C65BC:
	bl WaitForever2
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
_022C65C8:
	ldr r0, _022C65E8 ; =ov00_02325020
	mov r1, r4
	ldr r2, [r0, #8]
	mov r0, #0x100
	ldr r2, [r2, #0x51c]
	blx r2
_022C65E0:
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, pc}
	.align 2, 0
_022C65E8: .word ov00_02325020
_022C65EC: .word ov00_022C5DA0
_022C65F0: .word ov00_02318820
_022C65F4: .word 0x000032C8
	arm_func_end ov00_022C5DA0

	arm_func_start ov00_022C65F8
ov00_022C65F8: ; 0x022C65F8
	stmdb sp!, {r3, lr}
	mov r1, r0
	ldrh r0, [r1, #2]
	cmp r0, #0
	ldmneia sp!, {r3, pc}
	ldrh r0, [r1, #4]
	cmp r0, #0x15
	bgt _022C6634
	bge _022C664C
	cmp r0, #9
	ldmgtia sp!, {r3, pc}
	cmp r0, #7
	ldmltia sp!, {r3, pc}
	cmpne r0, #9
	ldmia sp!, {r3, pc}
_022C6634:
	cmp r0, #0x1a
	ldmgtia sp!, {r3, pc}
	cmp r0, #0x19
	ldmltia sp!, {r3, pc}
	cmpne r0, #0x1a
	ldmia sp!, {r3, pc}
_022C664C:
	ldr r2, _022C6664 ; =ov00_02325020
	mov r0, #9
	ldr r2, [r2, #8]
	ldr r2, [r2, #0x51c]
	blx r2
	ldmia sp!, {r3, pc}
	.align 2, 0
_022C6664: .word ov00_02325020
	arm_func_end ov00_022C65F8

	arm_func_start ov00_022C6668
ov00_022C6668: ; 0x022C6668
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x1c
	mov r6, r0
	ldrh r2, [r6]
	ldr r1, _022C6E80 ; =ov00_02325020
	cmp r2, #0x1d
	ldr r4, [r1, #8]
	bgt _022C66F4
	cmp r2, #0x1d
	bge _022C6760
	cmp r2, #0x15
	addls pc, pc, r2, lsl #2
	b _022C6E68
_022C669C: ; jump table
	b _022C6700 ; case 0
	b _022C6D80 ; case 1
	b _022C6DE0 ; case 2
	b _022C6E68 ; case 3
	b _022C6E68 ; case 4
	b _022C6E68 ; case 5
	b _022C6E68 ; case 6
	b _022C6E68 ; case 7
	b _022C6E68 ; case 8
	b _022C6E68 ; case 9
	b _022C67FC ; case 10
	b _022C6AC4 ; case 11
	b _022C6B14 ; case 12
	b _022C6E68 ; case 13
	b _022C6C8C ; case 14
	b _022C6D00 ; case 15
	b _022C6E68 ; case 16
	b _022C6E68 ; case 17
	b _022C6E68 ; case 18
	b _022C6E68 ; case 19
	b _022C6E68 ; case 20
	b _022C6E1C ; case 21
_022C66F4:
	cmp r2, #0x80
	beq _022C6E44
	b _022C6E68
_022C6700:
	ldrh r0, [r6, #2]
	ldr r2, [r4, #0x51c]
	mov r1, r6
	cmp r0, #0
	beq _022C6724
	mov r0, #0x100
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6724:
	mov r0, #0x15
	blx r2
	ldr r3, _022C6E84 ; =ov00_02318820
	ldr r0, _022C6E88 ; =ov00_022C6668
	ldrh r1, [r3, #4]
	str r1, [sp]
	ldrh r1, [r3, #6]
	ldrh r2, [r3, #2]
	ldrh r3, [r3]
	bl ov00_022C15B0
	mov r1, r0
	mov r0, #0x1d
	bl ov00_022C7948
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6760:
	ldrh r0, [r6, #2]
	cmp r0, #0
	beq _022C6784
	ldr r2, [r4, #0x51c]
	mov r1, r6
	mov r0, #0x100
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6784:
	add r0, r4, #0x440
	str r0, [r1, #0x20]
	ldrh r0, [r1, #0x24]
	mov r2, #1
	cmp r0, #0
	moveq r0, #1
	streqh r0, [r1, #0x24]
	ldr r0, _022C6E80 ; =ov00_02325020
	ldrh r1, [r0, #0x26]
	cmp r1, #0
	moveq r1, #0xc8
	streqh r1, [r0, #0x26]
	ldr r0, _022C6E80 ; =ov00_02325020
	mov r1, #0xff
	strb r1, [r0, #0x28]
	strb r1, [r0, #0x29]
	strb r1, [r0, #0x2a]
	strb r1, [r0, #0x2b]
	strb r1, [r0, #0x2c]
	strb r1, [r0, #0x2d]
	str r2, [r4, #0x5e4]
	ldr r0, _022C6E88 ; =ov00_022C6668
	ldr r1, _022C6E8C ; =ov00_02325040
	str r2, [r4, #0x5e8]
	bl ov00_022BFDEC
	mov r1, r0
	mov r0, #0xa
	bl ov00_022C7948
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C67FC:
	ldrh r0, [r6, #2]
	cmp r0, #0
	beq _022C6820
	ldr r2, [r4, #0x51c]
	mov r1, r6
	mov r0, #0x100
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6820:
	ldrh r0, [r6, #8]
	cmp r0, #3
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp r0, #4
	beq _022C6A4C
	cmp r0, #5
	bne _022C6AAC
	add ip, r4, #0x600
	mov r5, #0
	add r0, r4, #0x500
	mov fp, #0x180
	b _022C697C
_022C6854:
	mla r2, r5, fp, ip
	ldrb r3, [r6, #0xa]
	ldrb r1, [r2, #0xca]
	mov lr, #0
	mov sl, lr
	cmp r3, r1
	ldreqb r1, [r2, #0xcb]
	ldreqb r2, [r6, #0xb]
	mov r7, lr
	mov r8, lr
	cmpeq r2, r1
	moveq sl, #1
	mov sb, lr
	cmp sl, #0
	beq _022C68A8
	mov r2, #0x180
	mla r2, r5, r2, ip
	ldrb r1, [r6, #0xc]
	ldrb r2, [r2, #0xcc]
	cmp r1, r2
	moveq sb, #1
_022C68A8:
	cmp sb, #0
	beq _022C68C8
	mov r1, #0x180
	mla r1, r5, r1, ip
	ldrb r2, [r6, #0xd]
	ldrb r1, [r1, #0xcd]
	cmp r2, r1
	moveq r8, #1
_022C68C8:
	cmp r8, #0
	beq _022C68E8
	mov r1, #0x180
	mla r1, r5, r1, ip
	ldrb r2, [r6, #0xe]
	ldrb r1, [r1, #0xce]
	cmp r2, r1
	moveq r7, #1
_022C68E8:
	cmp r7, #0
	beq _022C6908
	mov r1, #0x180
	mla r1, r5, r1, ip
	ldrb r2, [r6, #0xf]
	ldrb r1, [r1, #0xcf]
	cmp r2, r1
	moveq lr, #1
_022C6908:
	cmp lr, #0
	beq _022C6978
	mov r0, #0x180
	mla r0, r5, r0, ip
	ldrh r1, [r6, #0x36]
	add sb, r6, #0x38
	add r8, r0, #0xf8
	strh r1, [r0, #0xf6]
	mov r7, #8
_022C692C:
	ldmia sb!, {r0, r1, r2, r3}
	stmia r8!, {r0, r1, r2, r3}
	subs r7, r7, #1
	bne _022C692C
	add r1, r4, #0x600
	mov r0, #0x180
	mla r0, r5, r0, r1
	mov r1, #0xc0
	bl DC_InvalidateRange
	ldr r1, _022C6E80 ; =ov00_02325020
	add r2, r4, #0x600
	mov r0, #0x180
	mla r2, r5, r0, r2
	ldrh r0, [r1]
	add r1, r4, #0x440
	mov r3, #0xc0
	bl MI_DmaCopy16
	str r5, [r4, #0x5ec]
	b _022C69EC
_022C6978:
	add r5, r5, #1
_022C697C:
	ldrh r1, [r0, #0xe0]
	cmp r5, r1
	blt _022C6854
	cmp r5, #0x10
	bge _022C69EC
	mov r0, #0x180
	mla r1, r5, r0, ip
	mov r0, r6
	add r7, r5, #1
	add r3, r4, #0x500
	add r1, r1, #0xc0
	mov r2, #0xb8
	strh r7, [r3, #0xe0]
	bl ArrayCopy16
	add r1, r4, #0x600
	mov r0, #0x180
	mla r0, r5, r0, r1
	mov r1, #0xc0
	bl DC_InvalidateRange
	ldr r1, _022C6E80 ; =ov00_02325020
	add r2, r4, #0x600
	mov r0, #0x180
	mla r2, r5, r0, r2
	ldrh r0, [r1]
	add r1, r4, #0x440
	mov r3, #0xc0
	bl MI_DmaCopy16
	str r5, [r4, #0x5ec]
_022C69EC:
	ldr r2, [r4, #0x51c]
	mov r1, r6
	mov r0, #4
	blx r2
	ldr r0, [r4, #0x5e4]
	cmp r0, #0
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r4, #0x5e8]
	cmp r0, #0
	beq _022C6A2C
	ldr r0, _022C6E8C ; =ov00_02325040
	bl ov00_022C5C3C
	cmp r0, #0
	bne _022C6A2C
	bl ov00_022C7508
_022C6A2C:
	ldr r0, _022C6E88 ; =ov00_022C6668
	ldr r1, _022C6E8C ; =ov00_02325040
	bl ov00_022BFDEC
	mov r1, r0
	mov r0, #0xa
	bl ov00_022C7948
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6A4C:
	ldr r2, [r4, #0x51c]
	mov r1, r6
	mov r0, #5
	blx r2
	ldr r0, [r4, #0x5e4]
	cmp r0, #0
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r4, #0x5e8]
	cmp r0, #0
	beq _022C6A8C
	ldr r0, _022C6E8C ; =ov00_02325040
	bl ov00_022C5C3C
	cmp r0, #0
	bne _022C6A8C
	bl ov00_022C7508
_022C6A8C:
	ldr r0, _022C6E88 ; =ov00_022C6668
	ldr r1, _022C6E8C ; =ov00_02325040
	bl ov00_022BFDEC
	mov r1, r0
	mov r0, #0xa
	bl ov00_022C7948
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6AAC:
	ldr r2, [r4, #0x51c]
	mov r1, r6
	mov r0, #0x100
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6AC4:
	ldrh r0, [r6, #2]
	cmp r0, #0
	beq _022C6AE8
	ldr r2, [r4, #0x51c]
	mov r1, r6
	mov r0, #0x100
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6AE8:
	ldr r1, [r4, #0x520]
	mov r2, #0
	ldr r0, _022C6E88 ; =ov00_022C6668
	mov r3, #1
	str r2, [sp]
	bl ov00_022C0068
	mov r1, r0
	mov r0, #0xc
	bl ov00_022C7948
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6B14:
	ldrh r0, [r6, #2]
	cmp r0, #0
	beq _022C6B44
	add r0, r4, #0x500
	mov r1, #0
	strh r1, [r0, #0xe0]
	ldr r2, [r4, #0x51c]
	mov r1, r6
	mov r0, #0xb
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6B44:
	ldrh r0, [r6, #8]
	cmp r0, #9
	bgt _022C6B70
	cmp r0, #6
	blt _022C6C74
	beq _022C6B80
	cmp r0, #7
	beq _022C6B9C
	cmp r0, #9
	beq _022C6C4C
	b _022C6C74
_022C6B70:
	cmp r0, #0x1a
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	b _022C6C74
_022C6B80:
	add r0, r4, #0x500
	mov r1, #0
	strh r1, [r0, #0x2a]
	mov r1, #1
	strh r1, [r0, #0x28]
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6B9C:
	ldrh r2, [r6, #0xa]
	add r0, r4, #0x500
	mov r1, r6
	strh r2, [r0, #0xe2]
	ldr r2, [r4, #0x51c]
	mov r0, #6
	blx r2
	ldr r1, _022C6E90 ; =ov00_022C65F8
	add r3, r4, #0x500
	mov r0, #1
	mov r2, #0
	strh r0, [r3, #0x2a]
	bl ov00_022BF308
	cmp r0, #0
	addne sp, sp, #0x1c
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r0, r4, #0x500
	ldrh r0, [r0, #0x2c]
	add r1, r4, #0x500
	ldrh r2, [r1, #0x18]
	cmp r0, #0
	movne r0, #0
	moveq r0, #1
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	str r2, [sp]
	str r0, [sp, #4]
	mov r0, #0
	str r0, [sp, #8]
	str r0, [sp, #0xc]
	str r0, [sp, #0x10]
	mov r0, #1
	str r0, [sp, #0x14]
	str r0, [sp, #0x18]
	ldrh r2, [r1, #0x1a]
	ldr r1, [r4, #0x504]
	ldr r0, _022C6E88 ; =ov00_022C6668
	add r3, r4, #0x40
	bl ov00_022C038C
	mov r1, r0
	mov r0, #0xe
	bl ov00_022C7948
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6C4C:
	ldr r2, [r4, #0x51c]
	mov r1, r6
	mov r0, #0xa
	blx r2
	add r0, r4, #0x500
	mov r1, #0
	strh r1, [r0, #0x2a]
	strh r1, [r0, #0x28]
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6C74:
	ldr r2, [r4, #0x51c]
	mov r1, r6
	mov r0, #0x100
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6C8C:
	ldrh r0, [r6, #4]
	cmp r0, #0xa
	beq _022C6CB4
	cmp r0, #0xc
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp r0, #0xd
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	b _022C6CE8
_022C6CB4:
	add r0, r4, #0x500
	mov r1, #1
	strh r1, [r0, #0x28]
	bl ov00_022C5CAC
	cmp r0, #0
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r2, [r4, #0x51c]
	mov r0, #0x19
	mov r1, #0
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6CE8:
	ldr r2, [r4, #0x51c]
	mov r1, r6
	mov r0, #0x100
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6D00:
	mov r0, #0
	strb r0, [r4, #0x50c]
	ldrh r0, [r6, #2]
	cmp r0, #0
	bne _022C6D28
	ldr r2, [r4, #0x51c]
	mov r1, r6
	mov r0, #8
	blx r2
	b _022C6D4C
_022C6D28:
	cmp r0, #9
	ldr r2, [r4, #0x51c]
	mov r1, r6
	bne _022C6D44
	mov r0, #0x29
	blx r2
	b _022C6D4C
_022C6D44:
	mov r0, #0x12
	blx r2
_022C6D4C:
	ldr r0, _022C6E80 ; =ov00_02325020
	ldr r0, [r0, #8]
	add r0, r0, #0x500
	ldrh r0, [r0, #0x26]
	cmp r0, #0
	addne sp, sp, #0x1c
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r2, [r4, #0x51c]
	mov r0, #0x19
	mov r1, #0
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6D80:
	ldrh r0, [r6, #2]
	cmp r0, #0
	add r0, r4, #0x500
	beq _022C6DB0
	mov r1, #0
	strh r1, [r0, #0x26]
	ldr r2, [r4, #0x51c]
	mov r1, r6
	mov r0, #0x100
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6DB0:
	mov r2, #0
	strh r2, [r0, #0x2a]
	ldr r1, [r1, #8]
	ldr r0, _022C6E88 ; =ov00_022C6668
	add r1, r1, #0x500
	strh r2, [r1, #0x28]
	bl ov00_022BFBD4
	mov r1, r0
	mov r0, #2
	bl ov00_022C7948
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6DE0:
	ldrh r1, [r6, #2]
	cmp r1, #0
	beq _022C6E10
	add r0, r4, #0x500
	mov r1, #0
	strh r1, [r0, #0x26]
	ldr r2, [r4, #0x51c]
	mov r1, r6
	mov r0, #0x100
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6E10:
	bl ov00_022C5D5C
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6E1C:
	bl ov00_022C5CAC
	cmp r0, #0
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r2, [r4, #0x51c]
	mov r0, #0x19
	mov r1, #0
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6E44:
	ldrh r0, [r6, #4]
	cmp r0, #0x16
	beq _022C6E5C
	add sp, sp, #0x1c
	cmp r0, #0x17
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6E5C:
	bl WaitForever2
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022C6E68:
	ldr r2, [r4, #0x51c]
	mov r1, r6
	mov r0, #0x100
	blx r2
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022C6E80: .word ov00_02325020
_022C6E84: .word ov00_02318820
_022C6E88: .word ov00_022C6668
_022C6E8C: .word ov00_02325040
_022C6E90: .word ov00_022C65F8
	arm_func_end ov00_022C6668

	arm_func_start ov00_022C6E94
ov00_022C6E94: ; 0x022C6E94
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	add r0, sp, #0
	bl sub_0207B9EC
	mov r1, #0
	add r2, sp, #0
	mov r3, r1
_022C6EB0:
	ldrb r0, [r2], #1
	add r1, r1, #1
	cmp r1, #6
	add r3, r3, r0
	blt _022C6EB0
	ldr r1, _022C6EF4 ; =0x027FFC3C
	ldr r0, _022C6EF8 ; =0xCCCCCCCD
	ldr r1, [r1]
	mov r2, #0x14
	add r1, r3, r1
	rsb r3, r1, r1, lsl #3
	umull r1, r0, r3, r0
	mov r0, r0, lsr #4
	umull r0, r1, r2, r0
	sub r0, r3, r0
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022C6EF4: .word 0x027FFC3C
_022C6EF8: .word 0xCCCCCCCD
	arm_func_end ov00_022C6E94

	arm_func_start ov00_022C6EFC
ov00_022C6EFC: ; 0x022C6EFC
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	ldr r4, _022C70D4 ; =ov00_02325020
	mov sb, r1
	ldr r1, [r4, #0xc]
	mov r8, r2
	cmp r1, #0
	addne r1, r1, #0x1300
	ldrneh r1, [r1, #0x16]
	mov r7, r3
	cmpne r1, #0
	movne r0, #2
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	add r0, r0, #0x1f
	bic r4, r0, #0x1f
	add r0, r4, #0x1f
	add r0, r0, #0x1e00
	cmp r7, #0x10000
	bic r5, r0, #0x1f
	bne _022C6F50
	bl ov00_022BF96C
	mov r7, r0
_022C6F50:
	bl EnableIrqFlag
	ldr r3, _022C70D8 ; =0x0000FFFF
	ldr r1, _022C70DC ; =ov00_02318820
	mov r2, #5
	strh r3, [r1, #6]
	strh r2, [r1]
	mov r2, #0x28
	strh r2, [r1, #2]
	mov r6, r0
	strh r2, [r1, #4]
	mov r2, #1
	ldr r0, [sp, #0x20]
	ldr r3, _022C70D4 ; =ov00_02325020
	str r2, [r1, #0xc]
	strh r0, [r3]
	str r4, [r3, #8]
	mov r1, r4
	mov r0, #0
	mov r2, #0x1e00
	str r5, [r3, #0xc]
	bl ArrayFill32
	mov r1, r5
	mov r0, #0
	mov r2, #0x1340
	bl ArrayFill16
	ldrb r0, [sb, #1]
	add r2, r4, #0x530
	mov r1, #0
	cmp r0, #0
	ble _022C6FE4
_022C6FC8:
	add r0, sb, r1, lsl #1
	ldrh r0, [r0, #2]
	add r1, r1, #1
	strh r0, [r2], #2
	ldrb r0, [sb, #1]
	cmp r1, r0
	blt _022C6FC8
_022C6FE4:
	add r0, r4, #0x138
	add r3, r0, #0x400
	ldr r0, _022C70DC ; =ov00_02318820
	mov ip, #0
	ldr r1, [r0, #8]
_022C6FF8:
	ldrh r2, [r1]
	cmp r2, #0
	beq _022C701C
	add r1, r1, #2
	add ip, ip, #1
	str r1, [r0, #8]
	cmp ip, #0x10
	strh r2, [r3], #2
	blt _022C6FF8
_022C701C:
	mov r0, sb
	add r1, r5, #0x1300
	mov r2, #0x16
	bl MemcpyFast
	ldrb r0, [sb, #1]
	cmp r0, #0xa
	bhs _022C7048
	add r0, r5, r0, lsl #1
	add r0, r0, #0x1300
	mov r1, #0
	strh r1, [r0, #2]
_022C7048:
	add r0, r4, #0x500
	mov r1, #0x100
	strh r1, [r0]
	mov r1, #8
	strh r1, [r0, #2]
	mov r2, #0
	strh r2, [r0, #0x18]
	strh r2, [r0, #0x1a]
	mov r1, #1
	strh r1, [r0, #0x2c]
	add r0, r5, #0x400
	str r0, [r4, #0x504]
	strh r2, [r4, #0xe]
	strh r2, [r4, #0x12]
	strh r1, [r4, #0x16]
	strh r2, [r4, #0x14]
	str r8, [r4, #8]
	strh r7, [r4, #0xc]
	bl ov00_022C6E94
	add r0, r0, #0xc8
	strh r0, [r4, #0x18]
	mov r0, #0xf
	strh r0, [r4, #0x10]
	mov r3, #0
	strb r3, [r4, #0x50c]
	strb r3, [r4, #0x50d]
	add r1, r5, #0x1300
	mov r2, #1
	mov r0, r6
	strh r2, [r1, #0x16]
	add r1, r5, #0x1000
	str r3, [r1, #0x31c]
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022C70D4: .word ov00_02325020
_022C70D8: .word 0x0000FFFF
_022C70DC: .word ov00_02318820
	arm_func_end ov00_022C6EFC

	arm_func_start ov00_022C70E0
ov00_022C70E0: ; 0x022C70E0
	ldr r3, _022C7148 ; =0x000001FE
	cmp r0, r3
	bhi _022C70F4
	cmp r0, #0xe4
	bhs _022C70FC
_022C70F4:
	mov r0, #0
	bx lr
_022C70FC:
	cmp r1, #0x10
	bhi _022C710C
	cmp r1, #8
	bhs _022C7114
_022C710C:
	mov r0, #0
	bx lr
_022C7114:
	add r0, r0, #0x26
	mov r0, r0, lsl #2
	add r1, r1, #0x20
	add r0, r0, #0x4a
	mov r1, r1, lsl #2
	add r3, r0, #0x100
	add r0, r1, #0x70
	mla r1, r2, r0, r3
	ldr r0, _022C714C ; =0x000015E0
	cmp r1, r0
	movlt r0, #1
	movge r0, #0
	bx lr
	.align 2, 0
_022C7148: .word 0x000001FE
_022C714C: .word 0x000015E0
	arm_func_end ov00_022C70E0

	arm_func_start ov00_022C7150
ov00_022C7150: ; 0x022C7150
	stmdb sp!, {r4, r5, r6, lr}
	mov r5, r0
	mov r4, r1
	bl EnableIrqFlag
	ldr r1, _022C71E4 ; =ov00_02325020
	mov r6, r0
	ldr r1, [r1, #8]
	ldrb r1, [r1, #0x50d]
	cmp r1, #0
	beq _022C7184
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022C7184:
	mov r0, r5
	mov r2, r4
	mov r1, #8
	bl ov00_022C70E0
	cmp r0, #0
	bne _022C71AC
	mov r0, r6
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022C71AC:
	ldr r2, _022C71E4 ; =ov00_02325020
	mov r0, r6
	ldr r1, [r2, #8]
	mov r3, #8
	strh r4, [r1, #0x10]
	ldr r1, [r2, #8]
	add r1, r1, #0x500
	strh r5, [r1]
	ldr r1, [r2, #8]
	add r1, r1, #0x500
	strh r3, [r1, #2]
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022C71E4: .word ov00_02325020
	arm_func_end ov00_022C7150

	arm_func_start ov00_022C71E8
ov00_022C71E8: ; 0x022C71E8
	stmdb sp!, {r4, lr}
	ldr r2, _022C72B8 ; =ov00_02325020
	mov r3, #0
	ldr r1, [r2, #8]
	mov r0, #0xa
	add r1, r1, #0x500
	strh r3, [r1, #0x28]
	ldr r1, [r2, #8]
	add r1, r1, #0x500
	strh r3, [r1, #0x2a]
	ldr r1, [r2, #8]
	add r1, r1, #0x500
	strh r3, [r1, #0x26]
	ldr r1, [r2, #8]
	add r1, r1, #0x500
	strh r3, [r1, #0x48]
	bl ov00_022C7764
	ldr r4, _022C72B8 ; =ov00_02325020
	ldr r0, [r4, #0xc]
	add r0, r0, #0x1000
	ldr r0, [r0, #0x320]
	cmp r0, #0
	bne _022C7290
_022C7244:
	ldrh r2, [r4]
	ldmib r4, {r0, r1}
	ldr r1, [r1, #0x508]
	bl ov00_022BFB14
	cmp r0, #4
	beq _022C7244
	cmp r0, #2
	movne r0, #8
	ldmneia sp!, {r4, pc}
	ldr r0, _022C72B8 ; =ov00_02325020
	ldr r0, [r0, #8]
	ldr r0, [r0, #0x508]
	bl ov00_022BF2C4
	ldr r0, _022C72B8 ; =ov00_02325020
	mov r2, #1
	ldr r1, [r0, #8]
	mov r0, #0
	strb r2, [r1, #0x50d]
	ldmia sp!, {r4, pc}
_022C7290:
	ldr r0, [r4, #8]
	ldr r0, [r0, #0x508]
	bl ov00_022BF2C4
	mov r0, r4
	ldr r0, [r0, #8]
	mov r1, #1
	strb r1, [r0, #0x50d]
	bl ov00_022C5D0C
	mov r0, #0
	ldmia sp!, {r4, pc}
	.align 2, 0
_022C72B8: .word ov00_02325020
	arm_func_end ov00_022C71E8

	arm_func_start ov00_022C72BC
ov00_022C72BC: ; 0x022C72BC
	stmdb sp!, {r4, r5, r6, lr}
	mov r5, r0
	bl EnableIrqFlag
	ldr r3, _022C748C ; =ov00_02325020
	mov r4, r0
	ldr r0, [r3, #8]
	ldr r2, _022C7490 ; =0x000069C0
	strh r5, [r0, #0x32]
	ldr r5, [r3, #0xc]
	mov r0, #0
	add r1, r5, #0x1f
	add r1, r1, #0x7d00
	bic r1, r1, #0x1f
	str r1, [r3, #4]
	add r1, r5, #0x1000
	ldr r6, [r1, #0x4e4]
	add r1, r5, #0x1340
	bl ArrayFill16
	mov r0, r6
	bl ov00_022C3270
	ldr r1, _022C748C ; =ov00_02325020
	ldr r0, [r1, #8]
	ldr r2, [r1, #0xc]
	add r0, r0, #0x500
	ldrh r3, [r0]
	add r0, r2, #0x1000
	sub r2, r3, #6
	str r2, [r0, #0x318]
	ldr r0, [r1, #8]
	add r0, r0, #0x500
	ldrh r0, [r0, #2]
	bl ov00_022C7E20
	ldr r0, _022C748C ; =ov00_02325020
	ldr r0, [r0, #0xc]
	add r0, r0, #0x138
	add r0, r0, #0x1400
	bl ov00_022C7E50
	mov r5, #0
	ldr r2, _022C748C ; =ov00_02325020
	mov r0, r5
	mvn r3, #0
_022C7360:
	ldr r1, [r2, #0xc]
	add r1, r1, r5, lsl #2
	add r1, r1, #0x1000
	str r0, [r1, #0x4e8]
	ldr r1, [r2, #0xc]
	add r1, r1, r5
	add r1, r1, #0x1000
	add r5, r5, #1
	strb r3, [r1, #0x526]
	cmp r5, #0xf
	blt _022C7360
	ldr r3, _022C748C ; =ov00_02325020
	ldr r2, _022C7494 ; =0x00005D40
	ldr r1, [r3, #0xc]
	add r1, r1, #0x1000
	strb r0, [r1, #0x524]
	ldr r1, [r3, #0xc]
	add r1, r1, #0x388
	add r1, r1, #0x1400
	bl ArrayFill16
	ldr r0, _022C748C ; =ov00_02325020
	mov r1, #0
	ldr r0, [r0, #0xc]
	mov r2, #0x1e
	add r0, r0, #0x354
	add r0, r0, #0x1400
	bl MemsetFast
	ldr r1, _022C748C ; =ov00_02325020
	mov r2, #1
	ldr r0, [r1, #8]
	ldr r3, _022C7498 ; =ov00_022C3510
	add r0, r0, #0x500
	strh r2, [r0, #0x24]
	ldr r0, [r1, #8]
	ldr r2, _022C749C ; =ov00_022C5DA0
	str r3, [r0, #0x51c]
	ldr r0, [r1, #8]
	str r2, [r0, #0x508]
	ldr r2, [r1, #8]
	add r0, r2, #0x500
	ldrh r0, [r0]
	strh r0, [r2, #0x34]
	ldr r0, [r1, #8]
	ldrh r2, [r0, #0x34]
	add r0, r0, #0x500
	add r2, r2, #0x23
	bic r2, r2, #0x1f
	strh r2, [r0, #0x18]
	ldr r2, [r1, #8]
	add r0, r2, #0x500
	ldrh r0, [r0, #2]
	strh r0, [r2, #0x36]
	ldr r0, [r1, #8]
	ldrh r1, [r0, #0x36]
	add r0, r0, #0x500
	add r1, r1, #0xe
	rsb r1, r1, r1, lsl #4
	add r1, r1, #0x29
	bic r1, r1, #0x1f
	mov r1, r1, lsl #1
	strh r1, [r0, #0x1a]
	bl ov00_022C566C
	bl ov00_022C71E8
	mov r5, r0
	mov r0, r4
	bl SetIrqFlag
	mov r0, #0xf
	mov r1, #1
	bl PXI_IsCallbackReady
	ldr r1, _022C748C ; =ov00_02325020
	ldr r1, [r1, #0xc]
	add r1, r1, #0x7000
	str r0, [r1, #0x4c8]
	mov r0, r5
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022C748C: .word ov00_02325020
_022C7490: .word 0x000069C0
_022C7494: .word 0x00005D40
_022C7498: .word ov00_022C3510
_022C749C: .word ov00_022C5DA0
	arm_func_end ov00_022C72BC

	arm_func_start ov00_022C74A0
ov00_022C74A0: ; 0x022C74A0
	ldr r1, _022C74BC ; =ov00_02325020
	ldr ip, _022C74C0 ; =ov00_022C72BC
	ldr r1, [r1, #0xc]
	mov r2, #1
	add r1, r1, #0x1000
	str r2, [r1, #0x320]
	bx ip
	.align 2, 0
_022C74BC: .word ov00_02325020
_022C74C0: .word ov00_022C72BC
	arm_func_end ov00_022C74A0

	arm_func_start ov00_022C74C4
ov00_022C74C4: ; 0x022C74C4
	stmdb sp!, {r4, lr}
	ldr r0, _022C74F8 ; =ov00_02325020
	ldr r0, [r0, #8]
	ldr r0, [r0, #0x508]
	bl ov00_022BFB9C
	mov r4, r0
	mov r1, r4
	mov r0, #1
	bl ov00_022C7948
	cmp r4, #2
	moveq r4, #0
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022C74F8: .word ov00_02325020
	arm_func_end ov00_022C74C4

	arm_func_start ov00_022C74FC
ov00_022C74FC: ; 0x022C74FC
	ldr ip, _022C7504 ; =ov00_022C74C4
	bx ip
	.align 2, 0
_022C7504: .word ov00_022C74C4
	arm_func_end ov00_022C74FC

	arm_func_start ov00_022C7508
ov00_022C7508: ; 0x022C7508
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, #1
	bl EnableIrqFlag
	ldr r1, _022C7594 ; =ov00_02325020
	mov r4, r0
	ldr r2, [r1, #8]
	ldrb r0, [r2, #0x50d]
	cmp r0, #0
	bne _022C7538
	mov r0, #0
	bl ov00_022C5D5C
	b _022C7584
_022C7538:
	add r0, r2, #0x500
	ldrh r0, [r0, #0x26]
	cmp r0, #0
	bne _022C7584
	mov r0, #0
	str r0, [r2, #0x5e4]
	ldr r0, [r1, #8]
	mov r1, r5
	add r0, r0, #0x500
	strh r1, [r0, #0x26]
	bl ov00_022C7C2C
	cmp r0, #0
	beq _022C757C
	ldr r0, _022C7598 ; =ov00_022C74FC
	bl ov00_022C7DD8
	mov r5, #0
	b _022C7584
_022C757C:
	bl ov00_022C74C4
	mov r5, r0
_022C7584:
	mov r0, r4
	bl SetIrqFlag
	mov r0, r5
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022C7594: .word ov00_02325020
_022C7598: .word ov00_022C74FC
	arm_func_end ov00_022C7508

	arm_func_start ov00_022C759C
ov00_022C759C: ; 0x022C759C
	stmdb sp!, {r4, lr}
	bl EnableIrqFlag
	ldr r1, _022C75D4 ; =ov00_02325020
	mov r4, r0
	ldr r0, [r1, #0xc]
	add r0, r0, #0x1000
	ldr r0, [r0, #0x320]
	cmp r0, #0
	bne _022C75C4
	bl WaitForever2
_022C75C4:
	bl ov00_022C7508
	mov r0, r4
	bl SetIrqFlag
	ldmia sp!, {r4, pc}
	.align 2, 0
_022C75D4: .word ov00_02325020
	arm_func_end ov00_022C759C

	arm_func_start ov00_022C75D8
ov00_022C75D8: ; 0x022C75D8
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r5, r0
	ldr r0, _022C7758 ; =ov00_022C5DA0
	mov r1, r5
	bl ov00_022C0134
	cmp r5, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r5, #0x10
	ldmhsia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r2, _022C775C ; =ov00_02325020
	sub r4, r5, #1
	ldr r0, [r2, #0xc]
	mov r1, #0
	add r0, r0, r4, lsl #1
	add r0, r0, #0x1400
	strh r1, [r0, #0x8a]
	ldr r0, [r2, #0xc]
	mov r2, #4
	add r0, r0, #0xa8
	add r0, r0, #0x1400
	add r0, r0, r4, lsl #2
	bl MemsetFast
	ldr r0, _022C775C ; =ov00_02325020
	mov r2, #0x16
	ldr r0, [r0, #0xc]
	mov r1, #0
	add r0, r0, #0x1340
	mla r0, r4, r2, r0
	bl MemsetFast
	mov r0, r5
	bl ov00_022C7E70
	ldr ip, _022C775C ; =ov00_02325020
	mov r2, #0
	ldr r0, [ip, #0xc]
	sub r1, r2, #1
	add r0, r0, r4, lsl #1
	add r0, r0, #0x1700
	strh r2, [r0, #0x54]
	ldr r3, [ip, #0xc]
	add r0, r3, r4
	add r0, r0, #0x1500
	ldrsb r2, [r0, #0x26]
	cmp r2, r1
	beq _022C76F8
	ldr r0, _022C7760 ; =0x000005D4
	and r1, r2, #0xff
	mul r0, r1, r0
	add r1, r3, r0
	add r3, r1, #0x1d00
	mov r2, #1
	ldrh r6, [r3, #0x4e]
	mvn r1, r2, lsl r5
	and r6, r6, r1
	strh r6, [r3, #0x4e]
	ldr r3, [ip, #0xc]
	sub r6, r2, #2
	add r3, r3, r0
	add r3, r3, #0x1d00
	ldrh r7, [r3, #0x50]
	mov lr, r4
	orr r2, r7, r2, lsl r5
	strh r2, [r3, #0x50]
	ldr r2, [ip, #0xc]
	add r2, r2, lr
	add r2, r2, #0x1000
	strb r6, [r2, #0x526]
	ldr r2, [ip, #0xc]
	add r0, r2, r0
	add r0, r0, #0x1d00
	ldrh r2, [r0, #0x4c]
	and r1, r2, r1
	strh r1, [r0, #0x4c]
_022C76F8:
	ldr r1, _022C775C ; =ov00_02325020
	mov ip, #1
	ldr r2, [r1, #0xc]
	add r0, r2, #0x1500
	ldrh r0, [r0, #0x36]
	tst r0, ip, lsl r5
	beq _022C773C
	add r0, r2, #0x1000
	ldrb r3, [r0, #0x535]
	mvn r2, ip, lsl r5
	sub r3, r3, #1
	strb r3, [r0, #0x535]
	ldr r0, [r1, #0xc]
	add r0, r0, #0x1500
	ldrh r1, [r0, #0x36]
	and r1, r1, r2
	strh r1, [r0, #0x36]
_022C773C:
	ldr r0, _022C775C ; =ov00_02325020
	mov r1, #0
	ldr r0, [r0, #0xc]
	add r0, r0, r4, lsl #2
	add r0, r0, #0x1000
	str r1, [r0, #0x4e8]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022C7758: .word ov00_022C5DA0
_022C775C: .word ov00_02325020
_022C7760: .word 0x000005D4
	arm_func_end ov00_022C75D8

	arm_func_start ov00_022C7764
ov00_022C7764: ; 0x022C7764
	ldr r1, _022C7770 ; =ov00_02325020
	strh r0, [r1, #0x26]
	bx lr
	.align 2, 0
_022C7770: .word ov00_02325020
	arm_func_end ov00_022C7764

	arm_func_start ov00_022C7774
ov00_022C7774: ; 0x022C7774
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #0xc
	ldrh r4, [sp, #0x18]
	mov r3, r2
	mov r2, r1
	str r4, [sp]
	mov r4, #1
	str r4, [sp, #4]
	mov r4, #3
	mov r1, #0
	str r4, [sp, #8]
	bl ov00_022C0498
	mov r4, r0
	mov r1, r4
	mov r0, #0xf
	bl ov00_022C7948
	mov r0, r4
	add sp, sp, #0xc
	ldmia sp!, {r3, r4, pc}
	arm_func_end ov00_022C7774

	arm_func_start ov00_022C77C0
ov00_022C77C0: ; 0x022C77C0
	stmdb sp!, {r3, r4, r5, lr}
	ldr ip, _022C7898 ; =ov00_02325020
	mov r3, r1, lsl #0x10
	ldr r5, [ip, #8]
	mov ip, r2, lsl #0x10
	add lr, r5, #0x500
	ldrh r4, [lr, #0x28]
	mov r1, r0
	mov r2, r3, lsr #0x10
	cmp r4, #0
	ldrneh r0, [lr, #0x26]
	mov r4, ip, lsr #0x10
	cmpne r0, #1
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, pc}
	ldrh r0, [lr, #0x24]
	cmp r0, #1
	beq _022C7814
	cmp r0, #2
	beq _022C785C
	b _022C7890
_022C7814:
	ldrh r0, [lr, #0x2c]
	cmp r0, #0
	moveq r0, #0x3e8
	movne r0, #0
	mov r3, r0, lsl #0x10
	str r4, [sp]
	ldr r0, [r5, #0x508]
	mov r3, r3, lsr #0x10
	bl ov00_022C7774
	cmp r0, #2
	bne _022C7850
	ldr r1, _022C7898 ; =ov00_02325020
	mov r2, #1
	ldr r1, [r1, #8]
	strb r2, [r1, #0x50c]
_022C7850:
	cmp r0, #2
	moveq r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022C785C:
	ldr r0, _022C789C ; =ov00_022C6668
	mov r3, #0
	str r4, [sp]
	bl ov00_022C7774
	cmp r0, #2
	bne _022C7884
	ldr r1, _022C7898 ; =ov00_02325020
	mov r2, #1
	ldr r1, [r1, #8]
	strb r2, [r1, #0x50c]
_022C7884:
	cmp r0, #2
	moveq r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022C7890:
	mov r0, #1
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022C7898: .word ov00_02325020
_022C789C: .word ov00_022C6668
	arm_func_end ov00_022C77C0

	arm_func_start ov00_022C78A0
ov00_022C78A0: ; 0x022C78A0
	ldr r0, _022C78B0 ; =ov00_02325020
	ldr r0, [r0, #8]
	ldr r0, [r0, #8]
	bx lr
	.align 2, 0
_022C78B0: .word ov00_02325020
	arm_func_end ov00_022C78A0

	arm_func_start ov00_022C78B4
ov00_022C78B4: ; 0x022C78B4
	ldr r0, _022C78C4 ; =ov00_02325020
	ldr r0, [r0, #8]
	ldrh r0, [r0, #0xc]
	bx lr
	.align 2, 0
_022C78C4: .word ov00_02325020
	arm_func_end ov00_022C78B4

	arm_func_start ov00_022C78C8
ov00_022C78C8: ; 0x022C78C8
	ldr r0, _022C7924 ; =ov00_02325020
	ldr r1, [r0, #8]
	ldrh r0, [r1, #0x12]
	cmp r0, #0
	ldrh r0, [r1, #0xe]
	movne r2, #2
	moveq r2, #0
	cmp r0, #0
	movne r3, #1
	ldrh r0, [r1, #0x14]
	moveq r3, #0
	cmp r0, #0
	movne ip, #4
	ldrh r0, [r1, #0x16]
	moveq ip, #0
	cmp r0, #0
	movne r1, #8
	orr r0, r3, r2
	moveq r1, #0
	orr r0, ip, r0
	orr r0, r1, r0
	and r0, r0, #0xff
	bx lr
	.align 2, 0
_022C7924: .word ov00_02325020
	arm_func_end ov00_022C78C8

	arm_func_start ov00_022C7928
ov00_022C7928: ; 0x022C7928
	ldr r0, _022C7944 ; =ov00_02325020
	ldr r0, [r0, #8]
	ldrb r0, [r0, #0x50d]
	cmp r0, #1
	moveq r0, #1
	movne r0, #0
	bx lr
	.align 2, 0
_022C7944: .word ov00_02325020
	arm_func_end ov00_022C7928

	arm_func_start ov00_022C7948
ov00_022C7948: ; 0x022C7948
	stmdb sp!, {r3, lr}
	cmp r1, #2
	cmpne r1, #0
	ldmeqia sp!, {r3, pc}
	ldr r2, _022C797C ; =ov00_02325020
	strh r0, [sp]
	ldr r0, [r2, #8]
	strh r1, [sp, #2]
	ldr r2, [r0, #0x51c]
	add r1, sp, #0
	mov r0, #0xff
	blx r2
	ldmia sp!, {r3, pc}
	.align 2, 0
_022C797C: .word ov00_02325020
	arm_func_end ov00_022C7948

	arm_func_start ov00_022C7980
ov00_022C7980: ; 0x022C7980
	ldr ip, _022C7990 ; =MemsetFast
	mov r1, #0
	mov r2, #0x70
	bx ip
	.align 2, 0
_022C7990: .word MemsetFast
	arm_func_end ov00_022C7980

	arm_func_start ov00_022C7994
ov00_022C7994: ; 0x022C7994
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r4, r0
	mov sb, r1
	mov r8, r2
	mov r7, r3
	bl EnableIrqFlag
	add r6, r4, #0x30
	mov r5, r0
	add r4, r4, #0x70
_022C79B8:
	cmp r6, r4
	blo _022C79C4
	bl WaitForever2
_022C79C4:
	ldr r0, [r6, #0xc]
	cmp r0, #0
	bne _022C79E8
	str sb, [r6]
	str r8, [r6, #4]
	ldr r0, [sp, #0x20]
	str r7, [r6, #8]
	str r0, [r6, #0xc]
	b _022C79F0
_022C79E8:
	add r6, r6, #0x10
	b _022C79B8
_022C79F0:
	mov r0, r5
	bl SetIrqFlag
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022C7994

	arm_func_start ov00_022C79FC
ov00_022C79FC: ; 0x022C79FC
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov sb, r0
	mov r8, r1
	mov r7, r2
	mov r6, r3
	mov r4, #0
	bl EnableIrqFlag
	add r2, sb, #0x30
	add r1, sb, #0x70
	mov r5, r0
	cmp r2, r1
	bhs _022C7A84
_022C7A2C:
	ldr r0, [r2, #0xc]
	cmp r0, #2
	blo _022C7A78
	ldr r0, [r2]
	subs r0, r8, r0
	bmi _022C7A78
	ldr r3, [r2, #4]
	add ip, r0, r6
	cmp ip, r3
	bhi _022C7A78
	ldr r3, [r2, #8]
	mov r1, r7
	mov r2, r6
	add r0, r3, r0
	bl MemcpyFast
	mov r0, #0
	str r0, [sb]
	mov r4, #1
	b _022C7A84
_022C7A78:
	add r2, r2, #0x10
	cmp r2, r1
	blo _022C7A2C
_022C7A84:
	mov r0, r5
	bl SetIrqFlag
	mov r0, r4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022C79FC

	arm_func_start ov00_022C7A94
ov00_022C7A94: ; 0x022C7A94
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
_022C7A9C:
	bl EnableIrqFlag
	ldr r1, [r7, #0xc0]
	mov r5, r0
	cmp r1, #0
	bne _022C7AD8
	mov r6, #0
	mov r4, r6
_022C7AB8:
	mov r0, r7
	mov r1, r6
	bl sub_02079A64
	mov r0, r4
	bl OS_SleepThread
	ldr r0, [r7, #0xc0]
	cmp r0, #0
	beq _022C7AB8
_022C7AD8:
	ldr r4, [r7, #0xc0]
	ldr r1, [r7, #0xc0]
	mov r0, r7
	ldr r1, [r1]
	str r1, [r7, #0xc0]
	ldr r1, [r4, #4]
	mov r1, r1, lsr #1
	bl sub_02079A64
	mov r0, r5
	bl SetIrqFlag
	ldr r1, [r4, #8]
	cmp r1, #0
	beq _022C7B14
	mov r0, r4
	blx r1
_022C7B14:
	bl EnableIrqFlag
	mov r5, r0
	mov r0, r7
	ldr r6, [r4, #0xc]
	bl sub_02079B0C
	ldr r1, [r7, #0xc0]
	cmp r1, #0
	moveq r1, #0
	beq _022C7B58
	ldr r1, [r7, #0xc0]
	ldr r1, [r1, #4]
	cmp r0, r1, lsr #1
	movhs r1, r0
	bhs _022C7B58
	ldr r1, [r7, #0xc0]
	ldr r1, [r1, #4]
	mov r1, r1, lsr #1
_022C7B58:
	cmp r1, r0
	beq _022C7B68
	mov r0, r7
	bl sub_02079A64
_022C7B68:
	mov r0, #0
	str r0, [r4]
	ldr r0, [r4, #4]
	cmp r6, #0
	bic r0, r0, #1
	str r0, [r4, #4]
	beq _022C7B8C
	mov r0, r4
	blx r6
_022C7B8C:
	add r0, r7, #0xc4
	cmp r4, r0
	beq _022C7BA4
	mov r0, r5
	bl SetIrqFlag
	b _022C7A9C
_022C7BA4:
	bl ThreadExit
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022C7A94

	arm_func_start ov00_022C7BAC
ov00_022C7BAC: ; 0x022C7BAC
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #8
	mov r5, r0
	mov r6, r1
	bl EnableIrqFlag
	ldr r1, _022C7C24 ; =ov00_02325060
	mov r4, r0
	ldr r0, [r1]
	cmp r0, #0
	bne _022C7C14
	add r0, r5, #0xc4
	str r5, [r1]
	bl ov00_022C7C48
	sub r0, r6, #0xe4
	mov lr, #0
	bic ip, r0, #3
	add r3, r5, #0xe4
	str lr, [r5, #0xc0]
	ldr r1, _022C7C28 ; =ov00_022C7A94
	mov r0, r5
	mov r2, r5
	add r3, r3, ip
	stmia sp, {ip, lr}
	bl StartThread
	mov r0, r5
	bl OS_WakeupThreadDirect
_022C7C14:
	mov r0, r4
	bl SetIrqFlag
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022C7C24: .word ov00_02325060
_022C7C28: .word ov00_022C7A94
	arm_func_end ov00_022C7BAC

	arm_func_start ov00_022C7C2C
ov00_022C7C2C: ; 0x022C7C2C
	ldr r0, _022C7C44 ; =ov00_02325060
	ldr r0, [r0]
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	bx lr
	.align 2, 0
_022C7C44: .word ov00_02325060
	arm_func_end ov00_022C7C2C

	arm_func_start ov00_022C7C48
ov00_022C7C48: ; 0x022C7C48
	ldr ip, _022C7C58 ; =MemsetFast
	mov r1, #0
	mov r2, #0x20
	bx ip
	.align 2, 0
_022C7C58: .word MemsetFast
	arm_func_end ov00_022C7C48

	arm_func_start ov00_022C7C5C
ov00_022C7C5C: ; 0x022C7C5C
	ldr r0, [r0, #4]
	mov r0, r0, lsl #0x1f
	movs r0, r0, lsr #0x1f
	movne r0, #1
	moveq r0, #0
	bx lr
	arm_func_end ov00_022C7C5C

	arm_func_start ov00_022C7C74
ov00_022C7C74: ; 0x022C7C74
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	ldr r4, _022C7DD4 ; =ov00_02325060
	mov sb, r0
	ldr r4, [r4]
	mov r8, r1
	mov r7, r2
	mov r6, r3
	bl ov00_022C7C2C
	cmp r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	ldr r0, [sb, #4]
	mov r0, r0, lsl #0x1f
	movs r0, r0, lsr #0x1f
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	cmp r6, #0x1f
	bls _022C7CF8
	mov r0, r4
	bl sub_02079B0C
	cmp r6, #0x20
	bne _022C7CD4
	cmp r0, #0
	subne r6, r0, #1
	moveq r6, #0
	b _022C7CF8
_022C7CD4:
	cmp r6, #0x21
	bne _022C7CEC
	cmp r0, #0x1f
	addlo r6, r0, #1
	movhs r6, #0x1f
	b _022C7CF8
_022C7CEC:
	cmp r6, #0x22
	moveq r6, r0
	movne r6, #0x1f
_022C7CF8:
	bl EnableIrqFlag
	ldr r1, [sb, #4]
	mov r5, r0
	bic r0, r1, #1
	orr r1, r0, #1
	and r0, r1, #1
	str r1, [sb, #4]
	orr r0, r0, r6, lsl #1
	stmib sb, {r0, r8}
	str r7, [sb, #0xc]
	ldr r0, [r4, #0xc0]
	cmp r0, #0
	add r0, r4, #0xc4
	bne _022C7D50
	cmp sb, r0
	ldreq r0, _022C7DD4 ; =ov00_02325060
	moveq r1, #0
	streq r1, [r0]
	mov r0, r4
	str sb, [r4, #0xc0]
	bl OS_WakeupThreadDirect
	b _022C7DC8
_022C7D50:
	cmp sb, r0
	ldr r1, [r4, #0xc0]
	bne _022C7D8C
	ldr r0, [r1]
	cmp r0, #0
	beq _022C7D78
_022C7D68:
	mov r1, r0
	ldr r0, [r0]
	cmp r0, #0
	bne _022C7D68
_022C7D78:
	ldr r0, _022C7DD4 ; =ov00_02325060
	str sb, [r1]
	mov r1, #0
	str r1, [r0]
	b _022C7DC8
_022C7D8C:
	ldr r0, [r1, #4]
	cmp r6, r0, lsr #1
	strlo sb, [r4, #0xc0]
	strlo r1, [sb]
	blo _022C7DC8
	b _022C7DA8
_022C7DA4:
	mov r1, r2
_022C7DA8:
	ldr r2, [r1]
	cmp r2, #0
	beq _022C7DC0
	ldr r0, [r2, #4]
	cmp r6, r0, lsr #1
	bhs _022C7DA4
_022C7DC0:
	str r2, [sb]
	str sb, [r1]
_022C7DC8:
	mov r0, r5
	bl SetIrqFlag
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022C7DD4: .word ov00_02325060
	arm_func_end ov00_022C7C74

	arm_func_start ov00_022C7DD8
ov00_022C7DD8: ; 0x022C7DD8
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	bl EnableIrqFlag
	mov r4, r0
	bl ov00_022C7C2C
	cmp r0, #0
	beq _022C7E10
	ldr r0, _022C7E1C ; =ov00_02325060
	mov r1, #0
	ldr r0, [r0]
	mov r2, r5
	mov r3, r1
	add r0, r0, #0xc4
	bl ov00_022C7C74
_022C7E10:
	mov r0, r4
	bl SetIrqFlag
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022C7E1C: .word ov00_02325060
	arm_func_end ov00_022C7DD8

	arm_func_start ov00_022C7E20
ov00_022C7E20: ; 0x022C7E20
	stmdb sp!, {r3, lr}
	ldr r2, _022C7E4C ; =ov00_02325064
	sub r1, r0, #2
	mov r0, #0x1e
	str r1, [r2, #8]
	bl _s32_div_f
	ldr r1, _022C7E4C ; =ov00_02325064
	mov r2, #0x1e
	str r0, [r1, #0xc]
	str r2, [r1, #0x10]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022C7E4C: .word ov00_02325064
	arm_func_end ov00_022C7E20

	arm_func_start ov00_022C7E50
ov00_022C7E50: ; 0x022C7E50
	ldr r3, _022C7E68 ; =ov00_02325064
	ldr ip, _022C7E6C ; =MemsetFast
	mov r1, #0
	mov r2, #0x21c
	str r0, [r3, #4]
	bx ip
	.align 2, 0
_022C7E68: .word ov00_02325064
_022C7E6C: .word MemsetFast
	arm_func_end ov00_022C7E50

	arm_func_start ov00_022C7E70
ov00_022C7E70: ; 0x022C7E70
	stmdb sp!, {r4, lr}
	ldr r1, _022C7EB0 ; =ov00_02325064
	ldr r1, [r1, #4]
	cmp r1, #0
	ldmeqia sp!, {r4, pc}
	sub r4, r0, #1
	add r0, r1, r4, lsl #5
	mov r1, #0
	mov r2, #0x1e
	bl MemsetFast
	ldr r0, _022C7EB0 ; =ov00_02325064
	mov r1, #0
	ldr r0, [r0, #4]
	add r0, r0, r4, lsl #2
	str r1, [r0, #0x1e0]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022C7EB0: .word ov00_02325064
	arm_func_end ov00_022C7E70

	arm_func_start ov00_022C7EB4
ov00_022C7EB4: ; 0x022C7EB4
	ldrb r2, [r0]
	mov r3, r1
	add r3, r3, #1
	strb r2, [r1]
	ldrb r1, [r0]
	cmp r1, #6
	addls pc, pc, r1, lsl #2
	b _022C7F28
_022C7ED4: ; jump table
	b _022C7F28 ; case 0
	b _022C7F30 ; case 1
	b _022C7F30 ; case 2
	b _022C7F30 ; case 3
	b _022C7EF0 ; case 4
	b _022C7F30 ; case 5
	b _022C7F30 ; case 6
_022C7EF0:
	ldrh r1, [r0, #2]
	strb r1, [r3]
	ldrh r1, [r0, #2]
	and r1, r1, #0xff00
	mov r1, r1, asr #8
	strb r1, [r3, #1]
	ldrh r1, [r0, #4]
	strb r1, [r3, #2]
	ldrh r0, [r0, #4]
	and r0, r0, #0xff00
	mov r0, r0, asr #8
	strb r0, [r3, #3]
	add r3, r3, #4
	b _022C7F30
_022C7F28:
	mov r0, #0
	bx lr
_022C7F30:
	mov r0, r3
	bx lr
	arm_func_end ov00_022C7EB4

	arm_func_start ov00_022C7F38
ov00_022C7F38: ; 0x022C7F38
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	ldrb r0, [r6]
	mov r5, r1
	mov r4, r2
	strb r0, [r5]
	cmp r0, #7
	beq _022C7F6C
	cmp r0, #8
	beq _022C7FD0
	cmp r0, #9
	beq _022C7FF8
	b _022C8040
_022C7F6C:
	mov r0, r4
	bl ov00_022C80E0
	cmp r0, #0
	beq _022C7F90
	ldr r0, _022C8050 ; =ov00_02325064
	sub r1, r4, #1
	ldr r0, [r0, #4]
	add r0, r0, r1, lsl #5
	ldmia sp!, {r4, r5, r6, pc}
_022C7F90:
	ldrb r2, [r6, #1]
	ldr r0, _022C8050 ; =ov00_02325064
	strb r2, [r5, #2]
	ldr r1, [r0, #0xc]
	cmp r2, r1
	movgt r0, #0
	ldmgtia sp!, {r4, r5, r6, pc}
	ldr r2, [r0, #8]
	add r0, r6, #2
	add r1, r5, #3
	bl MemcpyFast
	mov r0, r5
	mov r1, r4
	bl ov00_022C8054
	mov r4, r0
	b _022C8048
_022C7FD0:
	ldrb r0, [r6, #1]
	add r4, r6, #3
	strh r0, [r5, #2]
	ldrb r0, [r6, #2]
	ldrh r1, [r5, #2]
	mov r0, r0, lsl #8
	and r0, r0, #0xff00
	orr r0, r1, r0
	strh r0, [r5, #2]
	b _022C8048
_022C7FF8:
	ldrb r0, [r6, #1]
	add r4, r6, #3
	ldr r1, _022C8050 ; =ov00_02325064
	strh r0, [r5, #2]
	ldrb r2, [r6, #2]
	ldrh r3, [r5, #2]
	mov r0, r4
	mov r2, r2, lsl #8
	and r2, r2, #0xff00
	orr r2, r3, r2
	strh r2, [r5, #2]
	ldr r2, [r1, #8]
	add r1, r5, #4
	bl MemcpyFast
	ldr r0, _022C8050 ; =ov00_02325064
	ldr r0, [r0, #8]
	add r4, r4, r0
	b _022C8048
_022C8040:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022C8048:
	mov r0, r4
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022C8050: .word ov00_02325064
	arm_func_end ov00_022C7F38

	arm_func_start ov00_022C8054
ov00_022C8054: ; 0x022C8054
	stmdb sp!, {r4, r5, r6, lr}
	ldr r2, _022C80DC ; =ov00_02325064
	mov r6, r1
	ldr r3, [r2, #4]
	cmp r3, #0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	ldrb r5, [r0, #2]
	ldr r1, [r2, #0xc]
	cmp r5, r1
	movgt r0, #0
	ldmgtia sp!, {r4, r5, r6, pc}
	sub r4, r6, #1
	ldr r2, [r2, #8]
	add r1, r3, r4, lsl #5
	mla r1, r5, r2, r1
	add r0, r0, #3
	bl MemcpyFast
	ldr r0, _022C80DC ; =ov00_02325064
	mov r1, #1
	ldr r2, [r0, #4]
	mov r0, r6
	add r3, r2, #0x1e0
	ldr r2, [r3, r4, lsl #2]
	orr r1, r2, r1, lsl r5
	str r1, [r3, r4, lsl #2]
	bl ov00_022C80E0
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	ldr r0, _022C80DC ; =ov00_02325064
	ldr r0, [r0, #4]
	add r0, r0, r4, lsl #5
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022C80DC: .word ov00_02325064
	arm_func_end ov00_022C8054

	arm_func_start ov00_022C80E0
ov00_022C80E0: ; 0x022C80E0
	ldr r1, _022C8130 ; =ov00_02325064
	mov r2, #0
	ldr ip, [r1, #0xc]
	cmp ip, #0
	ble _022C8128
	ldr r1, [r1, #4]
	sub r0, r0, #1
	add r0, r1, r0, lsl #2
	ldr r3, [r0, #0x1e0]
	mov r1, #1
_022C8108:
	tst r3, r1, lsl r2
	moveq r0, #0
	bxeq lr
	add r0, r2, #1
	mov r0, r0, lsl #0x10
	cmp ip, r0, lsr #16
	mov r2, r0, lsr #0x10
	bgt _022C8108
_022C8128:
	mov r0, #1
	bx lr
	.align 2, 0
_022C8130: .word ov00_02325064
	arm_func_end ov00_022C80E0

	arm_func_start ov00_022C8134
ov00_022C8134: ; 0x022C8134
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr r1, _022C8228 ; =ov00_02325078
	ldr r2, _022C8228 ; =ov00_02325078
	ldr r1, [r1, #0x50]
	str r0, [r2, #0xc]
	cmp r1, #0
	mov r1, #0
	str r1, [r2, #0x50]
	str r1, [r2, #0x1c]
	str r1, [r2, #0x2c]
	str r1, [r2, #0x60]
	movne r3, #1
	str r1, [r2, #0x64]
	moveq r3, #0
	str r1, [r2, #0x20]
	cmp r3, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r0, _022C822C ; =ov00_023250F8
	mov r2, #0x60
	bl MemsetFast
	ldr r0, _022C8230 ; =_022B966C
	ldr r6, [r0, #8]
	cmp r6, #0
	beq _022C81E4
	mov r5, #0
	mov r4, r5
_022C819C:
	ldr r1, [r6, #0xa4]
	cmp r1, #0
	ldrne r0, [r1]
	cmpne r0, #0
	beq _022C81D8
	ldrb r0, [r1, #8]
	cmp r0, #0xa
	cmpne r0, #0xb
	strneb r5, [r1, #8]
	ldr r0, [r1, #4]
	cmp r0, #0
	beq _022C81D8
	str r4, [r1, #4]
	ldr r0, [r1]
	bl OS_WakeupThreadDirect
_022C81D8:
	ldr r6, [r6, #0x68]
	cmp r6, #0
	bne _022C819C
_022C81E4:
	mov r6, #0
	ldr r7, _022C8234 ; =ov00_023253A0
	ldr r4, _022C8228 ; =ov00_02325078
	mov r5, r6
_022C81F4:
	ldrh r0, [r7, #4]
	cmp r0, #0
	beq _022C8210
	ldr r0, [r7, #0x34]
	ldr r1, [r4, #0x40]
	blx r1
	strh r5, [r7, #4]
_022C8210:
	add r6, r6, #1
	cmp r6, #8
	add r7, r7, #0x38
	blt _022C81F4
	bl ov00_022D2C54
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022C8228: .word ov00_02325078
_022C822C: .word ov00_023250F8
_022C8230: .word _022B966C
_022C8234: .word ov00_023253A0
	arm_func_end ov00_022C8134

	arm_func_start ov00_022C8238
ov00_022C8238: ; 0x022C8238
	stmdb sp!, {r3, lr}
	ldr r0, _022C825C ; =ov00_02325078
	ldr r0, [r0, #0x24]
	cmp r0, #0
	bne _022C8254
	bl sub_020799AC
	ldmia sp!, {r3, pc}
_022C8254:
	bl sub_02079B14
	ldmia sp!, {r3, pc}
	.align 2, 0
_022C825C: .word ov00_02325078
	arm_func_end ov00_022C8238

	arm_func_start ov00_022C8260
ov00_022C8260: ; 0x022C8260
	bx lr
	arm_func_end ov00_022C8260

	arm_func_start ov00_022C8264
ov00_022C8264: ; 0x022C8264
	mov r0, #1
	bx lr
	arm_func_end ov00_022C8264

	arm_func_start ov00_022C826C
ov00_022C826C: ; 0x022C826C
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #8
	mov r4, r0
	ldr r0, _022C8464 ; =_02000BDC
	bl OSi_ReferSymbol
	ldr r3, [r4, #0x18]
	ldr r5, [r4, #0x14]
	cmp r3, #0
	cmpeq r5, #0
	mov r1, #0
	beq _022C82C4
	ldr r0, _022C8468 ; =ov00_02325078
	ldr r2, _022C846C ; =0x6C078965
	str r5, [r0, #0x68]
	str r3, [r0, #0x6c]
	ldr r3, _022C8470 ; =0x5D588B65
	str r2, [r0, #0x70]
	ldr r2, _022C8474 ; =0x00269EC3
	str r3, [r0, #0x74]
	str r2, [r0, #0x78]
	str r1, [r0, #0x7c]
	b _022C82F4
_022C82C4:
	bl sub_0207AE44
	ldr r2, _022C8468 ; =ov00_02325078
	ldr r3, _022C846C ; =0x6C078965
	str r0, [r2, #0x68]
	str r1, [r2, #0x6c]
	ldr r1, _022C8470 ; =0x5D588B65
	str r3, [r2, #0x70]
	ldr r0, _022C8474 ; =0x00269EC3
	str r1, [r2, #0x74]
	str r0, [r2, #0x78]
	mov r0, #0
	str r0, [r2, #0x7c]
_022C82F4:
	ldr r1, [r4, #4]
	cmp r1, #0
	ldrne r0, [r4, #8]
	cmpne r0, #0
	beq _022C8318
	ldr r0, _022C8468 ; =ov00_02325078
	str r1, [r0, #0x14]
	ldr r1, [r4, #8]
	b _022C8324
_022C8318:
	ldr r1, _022C8478 ; =ov00_022C8260
	ldr r0, _022C8468 ; =ov00_02325078
	str r1, [r0, #0x14]
_022C8324:
	str r1, [r0, #0x40]
	ldr r1, [r4]
	ldr r0, _022C8468 ; =ov00_02325078
	ldr r2, _022C8468 ; =ov00_02325078
	str r1, [r0, #0x10]
	ldr r1, [r4, #0x24]
	cmp r1, #0
	ldreq r1, _022C847C ; =0x000005B4
	strh r1, [r0, #2]
	ldr r1, [r4, #0x28]
	ldr r0, _022C8468 ; =ov00_02325078
	str r1, [r0, #0x34]
	ldr r1, [r4, #0x2c]
	str r1, [r0, #0x24]
	ldr r1, [r4, #0xc]
	cmp r1, #0
	ldreq r1, _022C8478 ; =ov00_022C8260
	str r1, [r0, #0x18]
	ldr r1, [r4, #0x10]
	cmp r1, #0
	ldrne r0, _022C8468 ; =ov00_02325078
	ldreq r1, _022C8480 ; =ov00_022C8264
	ldreq r0, _022C8468 ; =ov00_02325078
	str r1, [r0, #0x48]
	ldr r1, [r4, #0x1c]
	mov r0, #0
	str r1, [r2, #0x58]
	ldr r3, [r4, #0x20]
	ldr r1, _022C8484 ; =0x00000F88
	str r3, [r2, #0x5c]
	str r0, [r2, #0x30]
	str r0, [r2, #0x28]
	ldr ip, [r2, #0x70]
	ldr r4, [r2, #0x68]
	ldr r3, [r2, #0x6c]
	umull r5, lr, ip, r4
	mla lr, ip, r3, lr
	ldr r3, [r2, #0x74]
	ldr ip, [r2, #0x78]
	mla lr, r3, r4, lr
	ldr r3, [r2, #0x7c]
	adds ip, ip, r5
	adc r5, r3, lr
	umull r3, r4, r5, r1
	mla r4, r5, r0, r4
	mla r4, r0, r1, r4
	str ip, [r2, #0x68]
	ldr r0, _022C8488 ; =ov00_02325560
	str r5, [r2, #0x6c]
	add r1, r4, #0x400
	strh r1, [r2, #8]
	bl sub_0207B9EC
	ldr r0, _022C8468 ; =ov00_02325078
	mov r2, #0
	strb r2, [r0, #1]
	mov r1, #0x800
	str r1, [sp]
	ldr r0, _022C848C ; =ov00_02318844
	ldr r1, _022C8490 ; =ov00_022CAFDC
	ldr r4, [r0]
	ldr r0, _022C8494 ; =ov00_023252E0
	ldr r3, _022C8498 ; =ov00_023268C0
	str r4, [sp, #4]
	bl StartThread
	mov r1, #0x800
	ldr r0, _022C848C ; =ov00_02318844
	str r1, [sp]
	ldr r1, [r0]
	ldr r0, _022C849C ; =ov00_02325220
	str r1, [sp, #4]
	ldr r1, _022C84A0 ; =ov00_022CBC40
	ldr r3, _022C84A4 ; =ov00_023260C0
	mov r2, #0
	bl StartThread
	ldr r0, _022C8494 ; =ov00_023252E0
	bl OS_WakeupThreadDirect
	ldr r0, _022C849C ; =ov00_02325220
	bl OS_WakeupThreadDirect
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022C8464: .word _02000BDC
_022C8468: .word ov00_02325078
_022C846C: .word 0x6C078965
_022C8470: .word 0x5D588B65
_022C8474: .word 0x00269EC3
_022C8478: .word ov00_022C8260
_022C847C: .word 0x000005B4
_022C8480: .word ov00_022C8264
_022C8484: .word 0x00000F88
_022C8488: .word ov00_02325560
_022C848C: .word ov00_02318844
_022C8490: .word ov00_022CAFDC
_022C8494: .word ov00_023252E0
_022C8498: .word ov00_023268C0
_022C849C: .word ov00_02325220
_022C84A0: .word ov00_022CBC40
_022C84A4: .word ov00_023260C0
	arm_func_end ov00_022C826C

	arm_func_start ov00_022C84A8
ov00_022C84A8: ; 0x022C84A8
	stmdb sp!, {r3, r4, r5, lr}
	bl EnableIrqFlag
	mov r4, r0
	ldr r0, _022C84F0 ; =ov00_02325220
	bl sub_02079830
	movs r5, r0
	ldreq r1, _022C84F4 ; =ov00_02325078
	ldreq r0, [r1, #0x44]
	cmpeq r0, #0
	bne _022C84E0
	ldr r0, _022C84F0 ; =ov00_02325220
	mov r2, #1
	str r2, [r1, #0x44]
	bl OS_WakeupThreadDirect
_022C84E0:
	mov r0, r4
	bl SetIrqFlag
	mov r0, r5
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022C84F0: .word ov00_02325220
_022C84F4: .word ov00_02325078
	arm_func_end ov00_022C84A8

	arm_func_start ov00_022C84F8
ov00_022C84F8: ; 0x022C84F8
	ldr r1, _022C8504 ; =ov00_02325078
	str r0, [r1, #0x3c]
	bx lr
	.align 2, 0
_022C8504: .word ov00_02325078
	arm_func_end ov00_022C84F8

	arm_func_start ov00_022C8508
ov00_022C8508: ; 0x022C8508
	stmdb sp!, {r3, lr}
	bl ov00_022C84A8
	ldr r0, _022C8544 ; =ov00_02325220
	bl sub_02079800
	ldr r0, _022C8548 ; =ov00_023252E0
	bl sub_0207976C
	ldr r1, _022C854C ; =ov00_02325078
	mov r0, #0
	str r0, [r1, #0x54]
	bl ov00_022C8134
	ldr r0, _022C854C ; =ov00_02325078
	mov r1, #0
	str r1, [r0, #0x58]
	str r1, [r0, #0x5c]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022C8544: .word ov00_02325220
_022C8548: .word ov00_023252E0
_022C854C: .word ov00_02325078
	arm_func_end ov00_022C8508

	arm_func_start ov00_022C8550
ov00_022C8550: ; 0x022C8550
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r2, _022C857C ; =ov00_02318844
	ldr r0, _022C8580 ; =ov00_023252E0
	mov r1, r4
	str r4, [r2]
	bl sub_02079A64
	ldr r0, _022C8584 ; =ov00_02325220
	mov r1, r4
	bl sub_02079A64
	ldmia sp!, {r4, pc}
	.align 2, 0
_022C857C: .word ov00_02318844
_022C8580: .word ov00_023252E0
_022C8584: .word ov00_02325220
	arm_func_end ov00_022C8550

	arm_func_start ov00_022C8588
ov00_022C8588: ; 0x022C8588
	tst r0, #1
	beq _022C85C0
	cmp r1, #1
	bls _022C8610
_022C8598:
	ldrb ip, [r0]
	ldrb r3, [r0, #1]
	sub r1, r1, #2
	cmp r1, #1
	orr r3, r3, ip, lsl #8
	mov r3, r3, lsl #0x10
	add r2, r2, r3, lsr #16
	add r0, r0, #2
	bhi _022C8598
	b _022C8610
_022C85C0:
	mov r2, r2, lsl #0x10
	mov r3, r2, lsr #0x10
	mov r2, r3, lsl #8
	orr r2, r2, r3, asr #8
	mov r2, r2, lsl #0x10
	cmp r1, #1
	mov r2, r2, lsr #0x10
	bls _022C85F4
_022C85E0:
	ldrh r3, [r0], #2
	sub r1, r1, #2
	cmp r1, #1
	add r2, r2, r3
	bhi _022C85E0
_022C85F4:
	ldr r3, _022C8638 ; =0x00FF00FF
	mov ip, r3, lsl #8
	and r3, r3, r2, lsr #8
	and r2, ip, r2, lsl #8
	orr r3, r3, r2
	mov r2, r3, lsl #0x10
	orr r2, r2, r3, lsr #16
_022C8610:
	cmp r1, #0
	ldrneb r0, [r0]
	addne r2, r2, r0, lsl #8
	mov r0, r2, lsl #0x10
	mov r1, r2, lsr #0x10
	add r0, r1, r0, lsr #16
	add r0, r0, r0, lsr #16
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	bx lr
	.align 2, 0
_022C8638: .word 0x00FF00FF
	arm_func_end ov00_022C8588

	arm_func_start ov00_022C863C
ov00_022C863C: ; 0x022C863C
	ldr r1, _022C8654 ; =0x0000FFFF
	eor r0, r0, r1
	mov r0, r0, lsl #0x10
	movs r0, r0, lsr #0x10
	moveq r0, r1
	bx lr
	.align 2, 0
_022C8654: .word 0x0000FFFF
	arm_func_end ov00_022C863C

	arm_func_start ov00_022C8658
ov00_022C8658: ; 0x022C8658
	stmdb sp!, {r3, lr}
	mov r2, #0
	bl ov00_022C8588
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	bl ov00_022C863C
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022C8658

	arm_func_start ov00_022C8674
ov00_022C8674: ; 0x022C8674
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r2
	mov r2, r3
	mov r5, r1
	bl ov00_022C8588
	mov r2, r0
	add r0, r4, #0xc
	mov r1, #8
	bl ov00_022C8588
	add r1, r0, r5
	tst r1, #0x10000
	addne r0, r1, #1
	movne r0, r0, lsl #0x10
	movne r1, r0, lsr #0x10
	ldr r0, _022C86C0 ; =0x0000FFFF
	cmp r1, r0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022C86C0: .word 0x0000FFFF
	arm_func_end ov00_022C8674

	arm_func_start ov00_022C86C4
ov00_022C86C4: ; 0x022C86C4
	mov ip, #1
	sub r1, ip, #2
	cmp r0, r1
	subne r1, ip, #0x81000000
	cmpne r0, r1
	beq _022C86F8
	ldr r1, _022C8700 ; =ov00_02325078
	ldr r3, [r1, #0x1c]
	ldr r1, [r1, #0x50]
	and r2, r0, r3
	and r0, r1, r3
	cmp r2, r0
	movne ip, #0
_022C86F8:
	mov r0, ip
	bx lr
	.align 2, 0
_022C8700: .word ov00_02325078
	arm_func_end ov00_022C86C4

	arm_func_start ov00_022C8704
ov00_022C8704: ; 0x022C8704
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022C86C4
	cmp r0, #0
	ldreq r0, _022C8724 ; =ov00_02325078
	ldreq r4, [r0, #0x2c]
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022C8724: .word ov00_02325078
	arm_func_end ov00_022C8704

	arm_func_start ov00_022C8728
ov00_022C8728: ; 0x022C8728
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, #0
	bl ov00_022C86C4
	cmp r0, #0
	beq _022C8758
	ldr r0, _022C8760 ; =ov00_02325078
	ldr r0, [r0, #0x1c]
	mvn r1, r0
	and r0, r1, r5
	cmp r1, r0
	moveq r4, #1
_022C8758:
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022C8760: .word ov00_02325078
	arm_func_end ov00_022C8728

	arm_func_start ov00_022C8764
ov00_022C8764: ; 0x022C8764
	and r0, r0, #0xf0000000
	cmp r0, #0xe0000000
	moveq r0, #1
	movne r0, #0
	bx lr
	arm_func_end ov00_022C8764

	arm_func_start ov00_022C8778
ov00_022C8778: ; 0x022C8778
	stmdb sp!, {r4, r5, r6, lr}
	ldr r1, _022C87F0 ; =ov00_02325078
	mov r4, #1
	ldr r1, [r1, #0x50]
	mov r6, r0
	cmp r1, #0
	mov r0, r4
	cmpne r6, r1
	movne r0, #0
	mov r5, r4
	mov r2, r4
	cmp r0, #0
	bne _022C87B8
	ldr r0, _022C87F4 ; =0x7F000001
	cmp r6, r0
	movne r2, #0
_022C87B8:
	cmp r2, #0
	bne _022C87D0
	mov r0, r6
	bl ov00_022C8728
	cmp r0, #0
	moveq r5, #0
_022C87D0:
	cmp r5, #0
	bne _022C87E8
	mov r0, r6
	bl ov00_022C8764
	cmp r0, #0
	moveq r4, #0
_022C87E8:
	mov r0, r4
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022C87F0: .word ov00_02325078
_022C87F4: .word 0x7F000001
	arm_func_end ov00_022C8778

	arm_func_start ov00_022C87F8
ov00_022C87F8: ; 0x022C87F8
	mov ip, #0
_022C87FC:
	ldrh r3, [r0], #2
	ldrh r2, [r1], #2
	cmp r3, r2
	movne r0, #1
	bxne lr
	add ip, ip, #1
	cmp ip, #3
	blt _022C87FC
	mov r0, #0
	bx lr
	arm_func_end ov00_022C87F8

	arm_func_start ov00_022C8824
ov00_022C8824: ; 0x022C8824
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r6, r1
	mov r5, r2
	ldr r0, _022C8878 ; =ov00_02318850
	add r1, r7, #6
	mov r2, #6
	mov r4, r3
	bl MemcpyFast
	mov r0, r7
	mov r3, r5
	add r1, r7, #6
	sub r2, r6, #6
	str r4, [sp]
	bl ov00_022D7204
	cmp r0, #0
	movlt r1, #1
	ldr r0, _022C887C ; =ov00_02325078
	movge r1, #0
	strb r1, [r0]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022C8878: .word ov00_02318850
_022C887C: .word ov00_02325078
	arm_func_end ov00_022C8824

	arm_func_start ov00_022C8880
ov00_022C8880: ; 0x022C8880
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	ldr r4, _022C8A68 ; =ov00_02325078
	mov r7, r0
	ldr ip, [r4, #0x58]
	mov r6, r2
	cmp ip, #0
	ldrne r0, [r4, #0x5c]
	mov r5, r3
	cmpne r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r0, [sp, #0x1c]
	add r0, r5, r0
	cmp r0, #8
	ldmloia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r2, _022C8A6C ; =0x000005E4
	cmp r0, r2
	ldmhiia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r2, _022C8A70 ; =ov00_02318850
	ldrb r4, [r6]
	ldrb r3, [r2]
	cmp r4, r3
	ldreqb r4, [r6, #1]
	ldreqb r3, [r2, #1]
	cmpeq r4, r3
	ldreqb r3, [r6, #2]
	ldreqb r2, [r2, #2]
	cmpeq r3, r2
	ldreqb r2, [r6, #6]
	cmpeq r2, #8
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	ldrb r2, [r6, #7]
	cmp r2, #0
	cmpne r2, #6
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r2, _022C8A68 ; =ov00_02325078
	add r0, r0, #9
	bic r0, r0, #1
	ldr r8, [r2, #0x28]
	mov r0, r0, lsl #0x10
	ldr lr, [r2, #0x28]
	ldr r4, [r2, #0x30]
	mov r3, r0, lsr #0x10
	cmp lr, r4
	add r4, r8, r0, lsr #16
	bhs _022C8940
	ldr r0, [r2, #0x30]
	cmp r0, r4
	ldmlsia sp!, {r4, r5, r6, r7, r8, pc}
_022C8940:
	ldr r0, _022C8A68 ; =ov00_02325078
	ldr r2, [r0, #0x5c]
	cmp r4, r2
	bne _022C8964
	ldr r0, [r0, #0x30]
	mov r4, #0
	cmp r0, #0
	bne _022C8980
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022C8964:
	ldr r2, [r0, #0x5c]
	cmp r4, r2
	bls _022C8980
	ldr r0, [r0, #0x30]
	mov r4, r3
	cmp r0, r3
	ldmlsia sp!, {r4, r5, r6, r7, r8, pc}
_022C8980:
	ldr r0, _022C8A68 ; =ov00_02325078
	ldr lr, [r0, #0x28]
	ldr r2, [r0, #0x5c]
	add lr, lr, r3
	cmp lr, r2
	bls _022C89C0
	ldr lr, [r0, #0x5c]
	ldr r2, [r0, #0x28]
	sub r2, lr, r2
	cmp r2, #2
	ldrhs r0, [r0, #0x28]
	movhs r2, #0
	strhsh r2, [ip, r0]
	ldr r0, _022C8A68 ; =ov00_02325078
	mov r2, #0
	str r2, [r0, #0x28]
_022C89C0:
	ldr ip, _022C8A68 ; =ov00_02325078
	mov r0, r1
	ldr lr, [ip, #0x58]
	ldr r1, [ip, #0x28]
	mov r2, #6
	strh r3, [lr, r1]
	ldr r3, [ip, #0x58]
	ldr r1, [ip, #0x28]
	add r1, r3, r1
	add r1, r1, #2
	bl MemcpyFast
	ldr r1, _022C8A68 ; =ov00_02325078
	mov r0, r7
	ldr r3, [r1, #0x58]
	ldr r1, [r1, #0x28]
	mov r2, #6
	add r1, r3, r1
	add r1, r1, #8
	bl MemcpyFast
	ldr r1, _022C8A68 ; =ov00_02325078
	add r0, r6, #6
	ldr r3, [r1, #0x58]
	ldr r1, [r1, #0x28]
	sub r2, r5, #6
	add r1, r3, r1
	add r1, r1, #0xe
	bl MemcpyFast
	ldr r0, [sp, #0x18]
	cmp r0, #0
	ldrne r2, [sp, #0x1c]
	cmpne r2, #0
	beq _022C8A5C
	ldr r1, _022C8A68 ; =ov00_02325078
	ldr r3, [r1, #0x58]
	ldr r1, [r1, #0x28]
	add r1, r3, r1
	add r1, r1, #8
	add r1, r1, r5
	bl MemcpyFast
_022C8A5C:
	ldr r0, _022C8A68 ; =ov00_02325078
	str r4, [r0, #0x28]
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022C8A68: .word ov00_02325078
_022C8A6C: .word 0x000005E4
_022C8A70: .word ov00_02318850
	arm_func_end ov00_022C8880

	arm_func_start ov00_022C8A74
ov00_022C8A74: ; 0x022C8A74
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	mov ip, #0
	str ip, [sp]
	str ip, [sp, #4]
	bl ov00_022C8880
	ldr r0, _022C8AC8 ; =ov00_02325078
	ldr r1, [r0, #0x54]
	cmp r1, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, pc}
	ldr r0, [r0, #0x54]
	bl sub_02079830
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, pc}
	ldr r0, _022C8AC8 ; =ov00_02325078
	ldr r0, [r0, #0x54]
	bl OS_WakeupThreadDirect
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022C8AC8: .word ov00_02325078
	arm_func_end ov00_022C8A74

	arm_func_start ov00_022C8ACC
ov00_022C8ACC: ; 0x022C8ACC
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r7, r0
	bl EnableIrqFlag
	ldr sb, _022C8B84 ; =ov00_02325078
	mov r6, r0
	ldr r1, [sb, #0x30]
	ldr r0, [sb, #0x28]
	cmp r1, r0
	bne _022C8B20
	mov r5, #0
	ldr r8, _022C8B88 ; =_022B966C
	mov r4, r5
_022C8AFC:
	ldr r1, [r8, #4]
	mov r0, r5
	str r1, [sb, #0x54]
	bl OS_SleepThread
	str r4, [sb, #0x54]
	ldr r1, [sb, #0x30]
	ldr r0, [sb, #0x28]
	cmp r1, r0
	beq _022C8AFC
_022C8B20:
	mov r0, r6
	bl SetIrqFlag
	ldr r0, _022C8B84 ; =ov00_02325078
	mov r3, #0
	ldr r5, [r0, #0x58]
	mov r1, r3
_022C8B38:
	ldr r4, [r0, #0x5c]
	ldr r2, [r0, #0x30]
	sub r2, r4, r2
	cmp r2, #2
	strlo r3, [r0, #0x30]
	ldr r2, [r0, #0x30]
	ldrh r2, [r5, r2]
	cmp r2, #0
	streq r1, [r0, #0x30]
	cmp r2, #0
	beq _022C8B38
	sub r1, r2, #2
	ldr r0, _022C8B84 ; =ov00_02325078
	str r1, [r7]
	ldr r1, [r0, #0x58]
	ldr r0, [r0, #0x30]
	add r0, r1, r0
	add r0, r0, #2
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022C8B84: .word ov00_02325078
_022C8B88: .word _022B966C
	arm_func_end ov00_022C8ACC

	arm_func_start ov00_022C8B8C
ov00_022C8B8C: ; 0x022C8B8C
	stmdb sp!, {r3, lr}
	bl EnableIrqFlag
	ldr r1, _022C8BCC ; =ov00_02325078
	ldr ip, [r1, #0x30]
	ldr r3, [r1, #0x58]
	ldr r2, [r1, #0x30]
	ldrh r2, [r3, r2]
	add r2, ip, r2
	str r2, [r1, #0x30]
	ldr r3, [r1, #0x30]
	ldr r2, [r1, #0x5c]
	cmp r3, r2
	movhs r2, #0
	strhs r2, [r1, #0x30]
	bl SetIrqFlag
	ldmia sp!, {r3, pc}
	.align 2, 0
_022C8BCC: .word ov00_02325078
	arm_func_end ov00_022C8B8C

	arm_func_start ov00_022C8BD0
ov00_022C8BD0: ; 0x022C8BD0
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r5, r0
	bl EnableIrqFlag
	ldr r1, _022C8C88 ; =0x7F000001
	mov r4, r0
	cmp r5, r1
	ldrne r0, _022C8C8C ; =ov00_02325078
	mov r7, #0
	ldrne r0, [r0, #0x50]
	cmpne r5, r0
	ldreq r7, _022C8C90 ; =ov00_02325560
	beq _022C8C78
	mov r0, r5
	bl ov00_022C8728
	cmp r0, #0
	bne _022C8C20
	mov r0, r5
	bl ov00_022C8764
	cmp r0, #0
	beq _022C8C28
_022C8C20:
	ldr r7, _022C8C94 ; =ov00_02318848
	b _022C8C78
_022C8C28:
	ldr r1, _022C8C98 ; =ov00_023250F8
	mov r6, r7
_022C8C30:
	ldr r0, [r1]
	cmp r5, r0
	bne _022C8C68
	bl sub_0207AE44
	mov r2, #0xc
	mul r3, r6, r2
	ldr r2, _022C8C98 ; =ov00_023250F8
	mov r5, r0, lsr #0x10
	add r0, r2, r3
	ldr r2, _022C8C9C ; =ov00_02325102
	orr r5, r5, r1, lsl #16
	strh r5, [r2, r3]
	add r7, r0, #4
	b _022C8C78
_022C8C68:
	add r6, r6, #1
	cmp r6, #8
	add r1, r1, #0xc
	blo _022C8C30
_022C8C78:
	mov r0, r4
	bl SetIrqFlag
	mov r0, r7
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022C8C88: .word 0x7F000001
_022C8C8C: .word ov00_02325078
_022C8C90: .word ov00_02325560
_022C8C94: .word ov00_02318848
_022C8C98: .word ov00_023250F8
_022C8C9C: .word ov00_02325102
	arm_func_end ov00_022C8BD0

	arm_func_start ov00_022C8CA0
ov00_022C8CA0: ; 0x022C8CA0
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #0x2c
	mov r4, r0
	add r0, sp, #0
	mov r1, #0
	mov r2, #0x2a
	bl MemsetFast
	add r0, sp, #0
	mov r1, #0xff
	mov r2, #6
	bl MemsetFast
	ldr r0, _022C8D8C ; =ov00_02325560
	add r1, sp, #6
	mov r2, #6
	bl MemcpyFast
	mov r0, #1
	ldr r1, _022C8D90 ; =0x00000608
	strb r0, [sp, #0xf]
	strh r1, [sp, #0xc]
	strb r0, [sp, #0x15]
	mov r0, #8
	ldr r1, _022C8D94 ; =0x00000406
	strb r0, [sp, #0x10]
	strh r1, [sp, #0x12]
	ldr r0, _022C8D8C ; =ov00_02325560
	add r1, sp, #0x16
	mov r2, #6
	bl MemcpyFast
	ldr r0, _022C8D98 ; =ov00_02325078
	mov r1, r4, lsr #0x10
	ldr r3, [r0, #0x50]
	mov r0, r1, lsl #0x10
	mov r2, r0, lsr #0x10
	mov r0, r4, lsl #0x10
	mov r1, r0, lsr #0x10
	mov r0, r3, lsr #0x10
	mov r0, r0, lsl #0x10
	mov r4, r0, lsr #0x10
	mov r0, r3, lsl #0x10
	mov r3, r0, lsr #0x10
	mov r0, r4, lsl #8
	orr r0, r0, r4, asr #8
	strh r0, [sp, #0x1c]
	mov r0, r3, lsl #8
	orr r0, r0, r3, asr #8
	strh r0, [sp, #0x1e]
	mov r0, r2, lsl #8
	orr r0, r0, r2, asr #8
	strh r0, [sp, #0x26]
	mov r0, r1, lsl #8
	orr r0, r0, r1, asr #8
	mov r2, #0
	strh r0, [sp, #0x28]
	add r0, sp, #0
	mov r1, #0x2a
	mov r3, r2
	bl ov00_022C8824
	add sp, sp, #0x2c
	ldmia sp!, {r3, r4, pc}
	.align 2, 0
_022C8D8C: .word ov00_02325560
_022C8D90: .word 0x00000608
_022C8D94: .word 0x00000406
_022C8D98: .word ov00_02325078
	arm_func_end ov00_022C8CA0

	arm_func_start ov00_022C8D9C
ov00_022C8D9C: ; 0x022C8D9C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r7, #0
	ldr r4, _022C8E08 ; =ov00_02325078
	mov sb, r0
	mov r5, #0x64
	mov r6, r7
_022C8DB4:
	mov r0, sb
	bl ov00_022C8CA0
	mov r8, r6
_022C8DC0:
	ldr r0, [r4, #0x50]
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	mov r0, r5
	bl sub_02079B14
	mov r0, sb
	bl ov00_022C8BD0
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	add r8, r8, #1
	cmp r8, #0x14
	blo _022C8DC0
	add r7, r7, #1
	cmp r7, #8
	blo _022C8DB4
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022C8E08: .word ov00_02325078
	arm_func_end ov00_022C8D9C

	arm_func_start ov00_022C8E0C
ov00_022C8E0C: ; 0x022C8E0C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr r3, _022C8F38 ; =0x7F000001
	mov r6, r1
	mov r7, r0
	cmp r6, r3
	ldrne r0, _022C8F3C ; =ov00_02325078
	mov r5, r2
	ldrne r0, [r0, #0x50]
	cmpne r6, r0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r0, r6
	bl ov00_022C86C4
	cmp r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r0, r6
	bl ov00_022C8764
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	bl sub_0207AE44
	mov r0, r0, lsr #0x10
	orr r0, r0, r1, lsl #16
	mov r0, r0, lsl #0x10
	ldr r2, _022C8F40 ; =ov00_023250F8
	mov r4, r0, lsr #0x10
	mov r1, #0
_022C8E70:
	ldr r0, [r2]
	cmp r6, r0
	bne _022C8EA8
	mov r0, #0xc
	mul r5, r1, r0
	ldr r0, _022C8F40 ; =ov00_023250F8
	ldr r3, _022C8F44 ; =ov00_02325102
	add r1, r0, r5
	mov r0, r7
	add r1, r1, #4
	mov r2, #6
	strh r4, [r3, r5]
	bl MemcpyFast
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022C8EA8:
	add r1, r1, #1
	cmp r1, #8
	add r2, r2, #0xc
	blo _022C8E70
	cmp r5, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r2, #0
	ldr r3, _022C8F40 ; =ov00_023250F8
	mov r1, r2
	mov r5, r2
_022C8ED0:
	ldr r0, [r3]
	cmp r0, #0
	moveq r1, r5
	beq _022C8F08
	ldrh r0, [r3, #0xa]
	add r3, r3, #0xc
	sub r0, r4, r0
	mov r0, r0, lsl #0x10
	cmp r2, r0, asr #16
	movlt r1, r5
	add r5, r5, #1
	movlt r2, r0, lsr #0x10
	cmp r5, #8
	blo _022C8ED0
_022C8F08:
	mov r0, #0xc
	mul r5, r1, r0
	ldr r3, _022C8F40 ; =ov00_023250F8
	mov r0, r7
	add r1, r3, r5
	add r1, r1, #4
	mov r2, #6
	str r6, [r3, r5]
	bl MemcpyFast
	ldr r0, _022C8F44 ; =ov00_02325102
	strh r4, [r0, r5]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022C8F38: .word 0x7F000001
_022C8F3C: .word ov00_02325078
_022C8F40: .word ov00_023250F8
_022C8F44: .word ov00_02325102
	arm_func_end ov00_022C8E0C

	arm_func_start ov00_022C8F48
ov00_022C8F48: ; 0x022C8F48
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	ldrh r5, [sp, #0x1c]
	ldr r4, [sp, #0x18]
	mov r8, r0
	mov r0, r5, lsl #8
	orr ip, r0, r5, asr #8
	mov r0, r4
	mov r7, r1
	mov r6, r2
	mov r5, r3
	strh ip, [r8, #-2]
	bl ov00_022C8764
	cmp r0, #0
	bne _022C8FBC
	mov r0, r4
	bl ov00_022C8704
	movs r4, r0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	bl ov00_022C8BD0
	cmp r0, #0
	bne _022C8FA4
	mov r0, r4
	bl ov00_022C8D9C
_022C8FA4:
	cmp r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	sub r1, r8, #0xe
	mov r2, #6
	bl MemcpyFast
	b _022C8FEC
_022C8FBC:
	mov r0, #1
	strb r0, [r8, #-0xe]
	mov r1, #0
	mov r0, r4, lsr #0x10
	strb r1, [r8, #-0xd]
	mov r1, #0x5e
	strb r1, [r8, #-0xc]
	and r0, r0, #0x7f
	strb r0, [r8, #-0xb]
	mov r0, r4, lsr #8
	strb r0, [r8, #-0xa]
	strb r4, [r8, #-9]
_022C8FEC:
	ldr r0, _022C9014 ; =ov00_02325560
	sub r1, r8, #8
	mov r2, #6
	bl MemcpyFast
	mov r2, r6
	mov r3, r5
	sub r0, r8, #0xe
	add r1, r7, #0xe
	bl ov00_022C8824
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022C9014: .word ov00_02325560
	arm_func_end ov00_022C8F48

	arm_func_start ov00_022C9018
ov00_022C9018: ; 0x022C9018
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	sub sp, sp, #8
	mov r7, r1
	mov r5, r3
	add r1, r7, #0x14
	add r1, r1, r5
	mov r1, r1, lsl #0x10
	ldr r3, [sp, #0x24]
	mov r4, r1, lsr #0x10
	mov r1, r3, lsl #0x10
	mov r3, r4, lsl #8
	orr r3, r3, r4, asr #8
	mov r8, r0
	mov r1, r1, lsr #0x10
	mov r0, r1, lsl #8
	strh r3, [r8, #-0x12]
	orr r0, r0, r1, asr #8
	strh r0, [r8, #-0xe]
	mov r3, #0
	sub r0, r8, #0x14
	mov r1, #0x14
	mov r6, r2
	strh r3, [r8, #-0xa]
	ldr r4, [sp, #0x20]
	bl ov00_022C8658
	mov r2, r0, lsl #8
	ldr r1, _022C9130 ; =0x7F000001
	orr r0, r2, r0, asr #8
	strh r0, [r8, #-0xa]
	cmp r4, r1
	ldrne r0, _022C9134 ; =ov00_02325078
	ldrne r0, [r0, #0x50]
	cmpne r4, r0
	beq _022C90C0
	mov r2, r6
	mov r3, r5
	str r4, [sp]
	mov ip, #0x800
	sub r0, r8, #0x14
	add r1, r7, #0x14
	str ip, [sp, #4]
	bl ov00_022C8F48
_022C90C0:
	ldr r0, _022C9130 ; =0x7F000001
	cmp r4, r0
	ldrne r0, _022C9134 ; =ov00_02325078
	ldrne r0, [r0, #0x50]
	cmpne r4, r0
	beq _022C90EC
	mov r0, r4
	bl ov00_022C8764
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
_022C90EC:
	ldr r0, _022C9138 ; =ov00_02318850
	sub r1, r8, #0x1c
	mov r2, #8
	bl MemcpyFast
	bl EnableIrqFlag
	mov r4, r0
	ldr r0, _022C913C ; =ov00_02325560
	str r6, [sp]
	mov r1, r0
	str r5, [sp, #4]
	sub r2, r8, #0x1c
	add r3, r7, #0x1c
	bl ov00_022C8880
	mov r0, r4
	bl SetIrqFlag
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022C9130: .word 0x7F000001
_022C9134: .word ov00_02325078
_022C9138: .word ov00_02318850
_022C913C: .word ov00_02325560
	arm_func_end ov00_022C9018

	arm_func_start ov00_022C9140
ov00_022C9140: ; 0x022C9140
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #8
	mov sl, r0
	mov r0, #0x45
	strb r0, [sl, #-0x14]
	mov r4, #0
	ldr r7, _022C9330 ; =ov00_02325078
	strb r4, [sl, #-0x13]
	ldrh r0, [r7, #6]
	ldr r6, [sp, #0x30]
	ldrb r5, [sp, #0x34]
	add r0, r0, #1
	strh r0, [r7, #6]
	ldrh fp, [r7, #6]
	mov r0, r6, lsr #0x10
	mov r8, #0x80
	mov sb, fp, lsl #8
	orr sb, sb, fp, asr #8
	strh sb, [sl, #-0x10]
	strb r8, [sl, #-0xc]
	strb r5, [sl, #-0xb]
	ldr r8, [r7, #0x50]
	mov r5, r0, lsl #0x10
	mov r0, r8, lsr #0x10
	mov r0, r0, lsl #0x10
	mov r8, r0, lsr #0x10
	mov r0, r8, lsl #8
	orr r0, r0, r8, asr #8
	strh r0, [sl, #-8]
	ldr r0, [r7, #0x50]
	mov r8, r5, lsr #0x10
	mov r0, r0, lsl #0x10
	mov r7, r0, lsr #0x10
	mov r5, r7, lsl #8
	mov r0, r6, lsl #0x10
	orr sb, r5, r7, asr #8
	mov r7, r8, lsl #8
	mov r5, r0, lsr #0x10
	mov r0, r5, lsl #8
	strh sb, [sl, #-6]
	orr r7, r7, r8, asr #8
	ldr fp, _022C9334 ; =0x000005C8
	mov sb, r1
	strh r7, [sl, #-4]
	orr r0, r0, r5, asr #8
	mov r8, r2
	mov r7, r3
	strh r0, [sl, #-2]
	cmp sb, fp
	bls _022C92AC
	mov r5, sl
	bls _022C9250
_022C9210:
	mov r0, sl
	mov r1, #0
	mov r2, r5
	mov r3, fp
	str r6, [sp]
	orr ip, r4, #0x2000
	str ip, [sp, #4]
	bl ov00_022C9018
	add r1, r4, #0xb9
	add r0, r5, #0x1c8
	sub sb, sb, fp
	mov r1, r1, lsl #0x10
	cmp sb, fp
	add r5, r0, #0x400
	mov r4, r1, lsr #0x10
	bhi _022C9210
_022C9250:
	cmp sb, #0
	beq _022C92AC
	cmp r7, #0
	mov r1, #0
	beq _022C9284
	mov r2, r5
	mov r0, sl
	mov r3, sb
	str r6, [sp]
	orr r5, r4, #0x2000
	str r5, [sp, #4]
	bl ov00_022C9018
	b _022C929C
_022C9284:
	str r6, [sp]
	mov r0, sl
	mov r2, r5
	mov r3, sb
	str r4, [sp, #4]
	bl ov00_022C9018
_022C929C:
	add r0, r4, sb, lsr #3
	mov r0, r0, lsl #0x10
	mov r4, r0, lsr #0x10
	mov sb, #0
_022C92AC:
	ldr fp, _022C9334 ; =0x000005C8
	add r0, sb, r7
	cmp r0, fp
	bls _022C9300
_022C92BC:
	sub r5, fp, sb
	mov r1, sb
	mov r0, sl
	mov r2, r8
	mov r3, r5
	str r6, [sp]
	orr sb, r4, #0x2000
	str sb, [sp, #4]
	bl ov00_022C9018
	add r0, r4, #0xb9
	sub r7, r7, r5
	mov r0, r0, lsl #0x10
	mov sb, #0
	cmp r7, fp
	add r8, r8, r5
	mov r4, r0, lsr #0x10
	bhi _022C92BC
_022C9300:
	adds r0, sb, r7
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	str r6, [sp]
	mov r0, sl
	mov r1, sb
	mov r2, r8
	mov r3, r7
	str r4, [sp, #4]
	bl ov00_022C9018
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022C9330: .word ov00_02325078
_022C9334: .word 0x000005C8
	arm_func_end ov00_022C9140

	arm_func_start ov00_022C9338
ov00_022C9338: ; 0x022C9338
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #8
	mov r5, r2
	ldr r4, [r5, #0x4c]
	mov r6, r1
	mov r1, #8
	ldr r3, _022C93E0 ; =ov00_02325078
	ldr r2, _022C93E4 ; =_022B966C
	strh r1, [r4, #0x22]
	ldr r2, [r2, #4]
	ldrh lr, [r3, #4]
	mov r7, r0
	strh r2, [r4, #0x26]
	mov r2, #0
	strh r2, [r4, #0x24]
	strh lr, [r5, #0xa]
	add ip, lr, #1
	add r0, r4, #0x22
	strh ip, [r3, #4]
	strh lr, [r4, #0x28]
	bl ov00_022C8588
	mov r2, r0
	mov r0, r7
	mov r1, r6
	bl ov00_022C8588
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	bl ov00_022C863C
	mov r2, r7
	mov r3, r6
	mov r1, r0, lsl #8
	orr r0, r1, r0, asr #8
	strh r0, [r4, #0x24]
	ldr r1, [r5, #0x1c]
	add r0, r4, #0x22
	str r1, [sp]
	mov r1, #1
	str r1, [sp, #4]
	mov r1, #8
	bl ov00_022C9140
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022C93E0: .word ov00_02325078
_022C93E4: .word _022B966C
	arm_func_end ov00_022C9338

	arm_func_start ov00_022C93E8
ov00_022C93E8: ; 0x022C93E8
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #8
	ldr r7, _022C9520 ; =ov00_02325078
	mov r5, r2
	ldr r2, [r7, #0x50]
	mov r6, r1
	mov r1, r2, lsr #0x10
	mov r1, r1, lsl #0x10
	mov r2, r1, lsr #0x10
	ldr r3, [r5, #0x4c]
	mov r1, r2, lsl #8
	add r4, r3, #0x22
	orr r1, r1, r2, asr #8
	strh r1, [r4, #-0xc]
	ldr r1, [r7, #0x50]
	add r2, r6, #8
	mov r1, r1, lsl #0x10
	mov r7, r1, lsr #0x10
	mov r1, r7, lsl #8
	orr r1, r1, r7, asr #8
	strh r1, [r4, #-0xa]
	ldr r1, [r5, #0x1c]
	mov r2, r2, lsl #0x10
	mov r1, r1, lsr #0x10
	mov r1, r1, lsl #0x10
	mov r7, r1, lsr #0x10
	mov r1, r7, lsl #8
	orr r1, r1, r7, asr #8
	strh r1, [r4, #-8]
	ldr r1, [r5, #0x1c]
	mov r2, r2, lsr #0x10
	mov r1, r1, lsl #0x10
	mov r7, r1, lsr #0x10
	mov r1, r7, lsl #8
	orr r7, r1, r7, asr #8
	mov r1, r2, lsl #8
	strh r7, [r4, #-6]
	mov r7, #0x1100
	strh r7, [r4, #-4]
	orr r1, r1, r2, asr #8
	strh r1, [r4, #4]
	ldrh r1, [r4, #4]
	mov r7, r0
	sub r0, r4, #0xc
	strh r1, [r4, #-2]
	ldrh lr, [r5, #0x18]
	mov r2, #0
	mov r1, #0x14
	mov ip, lr, lsl #8
	orr ip, ip, lr, asr #8
	strh ip, [r4, #2]
	ldrh lr, [r5, #0xa]
	mov ip, lr, lsl #8
	orr ip, ip, lr, asr #8
	strh ip, [r3, #0x22]
	strh r2, [r4, #6]
	bl ov00_022C8588
	mov r2, r0
	mov r0, r7
	mov r1, r6
	bl ov00_022C8588
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	bl ov00_022C863C
	mov r2, r7
	mov r3, r6
	mov r1, r0, lsl #8
	orr r0, r1, r0, asr #8
	strh r0, [r4, #6]
	ldr r1, [r5, #0x1c]
	mov r0, r4
	str r1, [sp]
	mov r1, #0x11
	str r1, [sp, #4]
	mov r1, #8
	bl ov00_022C9140
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022C9520: .word ov00_02325078
	arm_func_end ov00_022C93E8

	arm_func_start ov00_022C9524
ov00_022C9524: ; 0x022C9524
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #8
	mov r7, r2
	ldrb r2, [r7, #8]
	mov sb, r0
	mov r8, r1
	cmp r2, #0
	mov r6, r3
	addeq sp, sp, #8
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	ldr r0, _022C9788 ; =_022B966C
	ldr r1, _022C978C ; =ov00_023252E0
	ldr r0, [r0, #4]
	cmp r0, r1
	ldreq r4, _022C9790 ; =ov00_0232558A
	ldrne r0, [r7, #0x4c]
	addne r4, r0, #0x22
	ldr r0, _022C9794 ; =ov00_02325078
	ands r2, r6, #2
	movne r5, #0x18
	moveq r5, #0x14
	add r1, r5, r8
	ldr sl, [r0, #0x50]
	mov r3, r1, lsl #0x10
	mov r1, sl, lsr #0x10
	mov r1, r1, lsl #0x10
	mov sl, r1, lsr #0x10
	mov r1, sl, lsl #8
	orr r1, r1, sl, asr #8
	strh r1, [r4, #-0xc]
	mov r1, r3, lsr #0x10
	ldr sl, [r0, #0x50]
	mov lr, r1, lsl #8
	mov r3, sl, lsl #0x10
	mov sl, r3, lsr #0x10
	mov r3, sl, lsl #8
	orr r3, r3, sl, asr #8
	strh r3, [r4, #-0xa]
	ldr r3, [r7, #0x1c]
	orr r1, lr, r1, asr #8
	mov r3, r3, lsr #0x10
	mov r3, r3, lsl #0x10
	mov sl, r3, lsr #0x10
	mov r3, sl, lsl #8
	orr r3, r3, sl, asr #8
	strh r3, [r4, #-8]
	ldr r3, [r7, #0x1c]
	mov ip, r5, lsr #2
	mov r3, r3, lsl #0x10
	mov sl, r3, lsr #0x10
	mov r3, sl, lsl #8
	orr r3, r3, sl, asr #8
	strh r3, [r4, #-6]
	mov r3, #0x600
	strh r3, [r4, #-4]
	strh r1, [r4, #-2]
	ldrh lr, [r7, #0xa]
	mov r3, ip, lsl #4
	cmp r2, #0
	mov r1, lr, lsl #8
	orr r1, r1, lr, asr #8
	strh r1, [r4]
	ldrh ip, [r7, #0x18]
	mov r1, ip, lsl #8
	orr r1, r1, ip, asr #8
	strh r1, [r4, #2]
	ldr r1, [r7, #0x28]
	mov r1, r1, lsr #0x10
	mov r1, r1, lsl #0x10
	mov ip, r1, lsr #0x10
	mov r1, ip, lsl #8
	orr r1, r1, ip, asr #8
	strh r1, [r4, #4]
	ldr r1, [r7, #0x28]
	mov r1, r1, lsl #0x10
	mov ip, r1, lsr #0x10
	mov r1, ip, lsl #8
	orr r1, r1, ip, asr #8
	strh r1, [r4, #6]
	ldr r1, [r7, #0x24]
	mov r1, r1, lsr #0x10
	mov r1, r1, lsl #0x10
	mov ip, r1, lsr #0x10
	mov r1, ip, lsl #8
	orr r1, r1, ip, asr #8
	strh r1, [r4, #8]
	ldr r1, [r7, #0x24]
	mov r1, r1, lsl #0x10
	mov ip, r1, lsr #0x10
	mov r1, ip, lsl #8
	orr r1, r1, ip, asr #8
	strh r1, [r4, #0xa]
	strb r3, [r4, #0xc]
	strb r6, [r4, #0xd]
	ldr r3, [r7, #0x3c]
	ldr r1, [r7, #0x44]
	sub r1, r3, r1
	mov r1, r1, lsl #0x10
	mov r3, r1, lsr #0x10
	mov r1, r3, lsl #8
	orr r1, r1, r3, asr #8
	strh r1, [r4, #0xe]
	mov r1, #0
	strh r1, [r4, #0x10]
	strh r1, [r4, #0x12]
	beq _022C9708
	ldrh r1, [r0, #2]
	add r1, r1, #0x2040000
	mov r1, r1, lsr #0x10
	mov r1, r1, lsl #0x10
	mov r2, r1, lsr #0x10
	mov r1, r2, lsl #8
	orr r1, r1, r2, asr #8
	strh r1, [r4, #0x14]
	ldrh r0, [r0, #2]
	add r0, r0, #0x2040000
	mov r0, r0, lsl #0x10
	mov r1, r0, lsr #0x10
	mov r0, r1, lsl #8
	orr r0, r0, r1, asr #8
	strh r0, [r4, #0x16]
_022C9708:
	sub r0, r4, #0xc
	add r1, r5, #0xc
	mov r2, #0
	bl ov00_022C8588
	mov r2, r0
	mov r0, sb
	mov r1, r8
	bl ov00_022C8588
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	bl ov00_022C863C
	mov r3, r0, lsl #8
	orr r0, r3, r0, asr #8
	strh r0, [r4, #0x10]
	mov r0, r4
	ldr r4, [r7, #0x1c]
	mov r3, #6
	str r4, [sp]
	str r3, [sp, #4]
	mov r1, r5
	mov r2, sb
	mov r3, r8
	bl ov00_022C9140
	ldr r0, [r7, #0x28]
	tst r6, #3
	add r0, r0, r8
	str r0, [r7, #0x28]
	ldrne r0, [r7, #0x28]
	addne r0, r0, #1
	strne r0, [r7, #0x28]
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022C9788: .word _022B966C
_022C978C: .word ov00_023252E0
_022C9790: .word ov00_0232558A
_022C9794: .word ov00_02325078
	arm_func_end ov00_022C9524

	arm_func_start ov00_022C9798
ov00_022C9798: ; 0x022C9798
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r3, #0x200
	add r0, r4, #8
	add r1, r4, #0x12
	mov r2, #0xa
	strh r3, [r4, #6]
	bl MemcpyFast
	ldr r0, _022C9838 ; =ov00_02325560
	add r1, r4, #8
	mov r2, #6
	bl MemcpyFast
	ldr r3, _022C983C ; =ov00_02325078
	add r0, r4, #0x12
	ldr r2, [r3, #0x50]
	sub r1, r4, #0xe
	mov r2, r2, lsr #0x10
	mov r2, r2, lsl #0x10
	mov ip, r2, lsr #0x10
	mov r2, ip, lsl #8
	orr r2, r2, ip, asr #8
	strh r2, [r4, #0xe]
	ldr r3, [r3, #0x50]
	mov r2, #6
	mov r3, r3, lsl #0x10
	mov ip, r3, lsr #0x10
	mov r3, ip, lsl #8
	orr r3, r3, ip, asr #8
	strh r3, [r4, #0x10]
	bl MemcpyFast
	ldr r0, _022C9838 ; =ov00_02325560
	sub r1, r4, #8
	mov r2, #6
	bl MemcpyFast
	sub r0, r4, #0xe
	mov r1, #0x2a
	mov r2, #0
	mov r3, r2
	bl ov00_022C8824
	ldmia sp!, {r4, pc}
	.align 2, 0
_022C9838: .word ov00_02325560
_022C983C: .word ov00_02325078
	arm_func_end ov00_022C9798

	arm_func_start ov00_022C9840
ov00_022C9840: ; 0x022C9840
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r6, r0
	cmp r1, #0x1c
	ldmloia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, _022C9978 ; =ov00_02325560
	add r0, r6, #8
	bl ov00_022C87F8
	cmp r0, #0
	ldrne r0, _022C997C ; =ov00_02325078
	ldrne r0, [r0, #0x50]
	cmpne r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldrh r0, [r6]
	cmp r0, #0x100
	ldreqh r0, [r6, #2]
	cmpeq r0, #8
	ldreqh r1, [r6, #4]
	ldreq r0, _022C9980 ; =0x00000406
	cmpeq r1, r0
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	ldrh r1, [r6, #6]
	mov r0, r1, lsl #8
	orr r0, r0, r1, asr #8
	mov r0, r0, lsl #0x10
	mov r4, r0, lsr #0x10
	cmp r4, #1
	cmpne r4, #2
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	ldrh r5, [r6, #0x10]
	ldrh r3, [r6, #0xe]
	ldrh lr, [r6, #0x1a]
	mov r0, r5, lsl #8
	mov r1, r3, lsl #8
	orr r3, r1, r3, asr #8
	orr r1, r0, r5, asr #8
	mov r0, r3, lsl #0x10
	mov r1, r1, lsl #0x10
	ldrh ip, [r6, #0x18]
	ldr r2, _022C997C ; =ov00_02325078
	mov r3, r0, lsr #0x10
	mov r1, r1, lsr #0x10
	ldr r0, [r2, #0x50]
	orr r1, r1, r3, lsl #16
	mov r3, ip, lsl #8
	cmp r1, r0
	moveq r5, #1
	mov r2, lr, lsl #8
	orr ip, r3, ip, asr #8
	orr r3, r2, lr, asr #8
	mov r2, ip, lsl #0x10
	mov r3, r3, lsl #0x10
	mov ip, r2, lsr #0x10
	mov r2, r3, lsr #0x10
	orr r2, r2, ip, lsl #16
	movne r5, #0
	cmp r0, r2
	moveq r7, #1
	movne r7, #0
	cmp r5, #0
	bne _022C993C
	mov r2, r7
	add r0, r6, #8
	bl ov00_022C8E0C
_022C993C:
	cmp r4, #1
	bne _022C9958
	cmp r7, #0
	beq _022C9958
	mov r0, r6
	bl ov00_022C9798
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022C9958:
	cmp r4, #2
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r7, #0
	cmpne r5, #0
	ldrne r0, _022C997C ; =ov00_02325078
	movne r1, #1
	strneb r1, [r0, #1]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022C9978: .word ov00_02325560
_022C997C: .word ov00_02325078
_022C9980: .word 0x00000406
	arm_func_end ov00_022C9840

	arm_func_start ov00_022C9984
ov00_022C9984: ; 0x022C9984
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #8
	mov r6, r0
	ldrh r4, [r6, #0xe]
	ldrh r3, [r6, #0xc]
	mov r5, r1
	mov r0, r4, lsl #8
	mov r1, r3, lsl #8
	orr r3, r1, r3, asr #8
	orr r1, r0, r4, asr #8
	mov r0, r3, lsl #0x10
	mov r1, r1, lsl #0x10
	mov r3, r0, lsr #0x10
	mov r0, r1, lsr #0x10
	orr r0, r0, r3, lsl #16
	mov r4, r2
	bl ov00_022C8704
	movs r7, r0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	bl ov00_022C8BD0
	cmp r0, #0
	bne _022C99F0
	mov r0, r7
	bl ov00_022C8CA0
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022C99F0:
	mov r2, #0
	strb r2, [r5]
	mov r0, r5
	mov r1, r4
	strh r2, [r5, #2]
	bl ov00_022C8658
	mov r1, r0, lsl #8
	orr r0, r1, r0, asr #8
	strh r0, [r5, #2]
	ldrh ip, [r6, #0xe]
	ldrh r3, [r6, #0xc]
	mov r2, #0
	mov r0, ip, lsl #8
	mov r1, r3, lsl #8
	orr r3, r1, r3, asr #8
	orr r1, r0, ip, asr #8
	mov r0, r3, lsl #0x10
	mov r1, r1, lsl #0x10
	mov r3, r0, lsr #0x10
	mov r0, r1, lsr #0x10
	orr r6, r0, r3, lsl #16
	mov r0, r5
	mov r1, r4
	mov r3, r2
	str r6, [sp]
	mov r4, #1
	str r4, [sp, #4]
	bl ov00_022C9140
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022C9984

	arm_func_start ov00_022C9A68
ov00_022C9A68: ; 0x022C9A68
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r8, r0
	mov r7, r1
	mov r6, r2
	bl EnableIrqFlag
	ldr r1, _022C9B64 ; =_022B966C
	mov r5, r0
	ldr r1, [r1, #8]
	cmp r1, #0
	beq _022C9B58
_022C9A90:
	ldr r4, [r1, #0xa4]
	cmp r4, #0
	ldrne r3, [r4]
	cmpne r3, #0
	beq _022C9B4C
	ldrb r0, [r4, #8]
	cmp r0, #0xb
	ldreqh r2, [r7, #4]
	moveq r0, r3, lsl #0x10
	cmpeq r2, r0, lsr #16
	ldreqh r2, [r4, #0xa]
	ldreqh r0, [r7, #6]
	cmpeq r2, r0
	ldreq r0, [r4, #0x44]
	cmpeq r0, #0
	bne _022C9B4C
	ldrh lr, [r8, #0xe]
	ldrh ip, [r8, #0xc]
	ldr r0, [r4, #0x1c]
	mov r2, lr, lsl #8
	mov r3, ip, lsl #8
	orr ip, r3, ip, asr #8
	orr r3, r2, lr, asr #8
	mov r2, ip, lsl #0x10
	mov r3, r3, lsl #0x10
	mov ip, r2, lsr #0x10
	mov r2, r3, lsr #0x10
	orr r2, r2, ip, lsl #16
	cmp r0, r2
	bne _022C9B4C
	ldr r1, [r4, #0x3c]
	sub r0, r6, #8
	cmp r0, r1
	strhi r1, [r4, #0x44]
	strls r0, [r4, #0x44]
	ldr r1, [r4, #0x40]
	ldr r2, [r4, #0x44]
	add r0, r7, #8
	bl MemcpyFast
	ldr r0, [r4, #4]
	cmp r0, #3
	bne _022C9B58
	mov r0, #0
	str r0, [r4, #4]
	ldr r0, [r4]
	bl OS_WakeupThreadDirect
	b _022C9B58
_022C9B4C:
	ldr r1, [r1, #0x68]
	cmp r1, #0
	bne _022C9A90
_022C9B58:
	mov r0, r5
	bl SetIrqFlag
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022C9B64: .word _022B966C
	arm_func_end ov00_022C9A68

	arm_func_start ov00_022C9B68
ov00_022C9B68: ; 0x022C9B68
	cmp r0, #0
	mvnne r2, #0
	cmpne r0, r2
	cmpne r1, #0
	cmpne r1, r2
	movne r0, #1
	moveq r0, #0
	bx lr
	arm_func_end ov00_022C9B68

	arm_func_start ov00_022C9B88
ov00_022C9B88: ; 0x022C9B88
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r5, r1
	mov r4, r2
	mov r6, r0
	mov r0, r5
	mov r1, r4
	bl ov00_022C8658
	ldr r1, _022C9C54 ; =0x0000FFFF
	cmp r0, r1
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	ldrh r0, [r6, #0x12]
	ldrh r8, [r6, #0x10]
	ldrh r7, [r6, #0xe]
	ldrh lr, [r6, #0xc]
	mov r2, r8, lsl #8
	orr r2, r2, r8, asr #8
	mov ip, lr, lsl #8
	mov r2, r2, lsl #0x10
	mov r3, r7, lsl #8
	orr lr, ip, lr, asr #8
	mov r1, r0, lsl #8
	orr ip, r3, r7, asr #8
	orr r3, r1, r0, asr #8
	mov r0, lr, lsl #0x10
	mov r1, ip, lsl #0x10
	mov ip, r0, lsr #0x10
	mov r0, r1, lsr #0x10
	mov r3, r3, lsl #0x10
	mov r2, r2, lsr #0x10
	mov r1, r3, lsr #0x10
	orr r0, r0, ip, lsl #16
	orr r1, r1, r2, lsl #16
	bl ov00_022C9B68
	cmp r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	ldrb r0, [r5]
	cmp r0, #0
	beq _022C9C2C
	cmp r0, #8
	beq _022C9C40
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022C9C2C:
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_022C9A68
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022C9C40:
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_022C9984
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022C9C54: .word 0x0000FFFF
	arm_func_end ov00_022C9B88

	arm_func_start ov00_022C9C58
ov00_022C9C58: ; 0x022C9C58
	stmdb sp!, {r4, r5, r6, lr}
	ldr r2, _022C9D28 ; =_022B966C
	ldr ip, [r2, #8]
	cmp ip, #0
	beq _022C9D20
_022C9C6C:
	ldr r3, [ip, #0xa4]
	cmp r3, #0
	ldrne r2, [r3]
	cmpne r2, #0
	beq _022C9D14
	ldrb r2, [r3, #8]
	cmp r2, #1
	bne _022C9D14
	ldrh r5, [r1, #2]
	ldrh r4, [r3, #0xa]
	mov r2, r5, lsl #8
	orr r2, r2, r5, asr #8
	mov r2, r2, lsl #0x10
	cmp r4, r2, lsr #16
	bne _022C9D14
	ldrh r5, [r3, #0x18]
	cmp r5, #0
	beq _022C9CCC
	ldrh r4, [r1]
	mov r2, r4, lsl #8
	orr r2, r2, r4, asr #8
	mov r2, r2, lsl #0x10
	cmp r5, r2, lsr #16
	bne _022C9D14
_022C9CCC:
	ldr r2, [r3, #0x1c]
	cmp r2, #0
	beq _022C9D0C
	ldrh r6, [r0, #0xe]
	ldrh r5, [r0, #0xc]
	mov r4, r6, lsl #8
	mov lr, r5, lsl #8
	orr lr, lr, r5, asr #8
	orr r4, r4, r6, asr #8
	mov lr, lr, lsl #0x10
	mov r4, r4, lsl #0x10
	mov lr, lr, lsr #0x10
	mov r4, r4, lsr #0x10
	orr r4, r4, lr, lsl #16
	cmp r2, r4
	bne _022C9D14
_022C9D0C:
	mov r0, r3
	ldmia sp!, {r4, r5, r6, pc}
_022C9D14:
	ldr ip, [ip, #0x68]
	cmp ip, #0
	bne _022C9C6C
_022C9D20:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022C9D28: .word _022B966C
	arm_func_end ov00_022C9C58

	arm_func_start ov00_022C9D2C
ov00_022C9D2C: ; 0x022C9D2C
	stmdb sp!, {r4, r5, r6, lr}
	ldrb r4, [r2, #8]
	mov r3, #0
	mov r5, r3
	cmp r4, #0xa
	cmpne r4, #0xb
	movne r5, #1
	mov ip, r3
	mov r6, r3
	cmp r5, #0
	beq _022C9D74
	ldrh lr, [r1, #2]
	ldrh r5, [r2, #0xa]
	mov r4, lr, lsl #8
	orr r4, r4, lr, asr #8
	mov lr, r4, lsl #0x10
	cmp r5, lr, lsr #16
	moveq r6, #1
_022C9D74:
	cmp r6, #0
	beq _022C9D98
	ldrh lr, [r1]
	ldrh r4, [r2, #0x18]
	mov r1, lr, lsl #8
	orr r1, r1, lr, asr #8
	mov r1, r1, lsl #0x10
	cmp r4, r1, lsr #16
	moveq ip, #1
_022C9D98:
	cmp ip, #0
	beq _022C9DD8
	ldrh lr, [r0, #0xc]
	ldrh r4, [r0, #0xe]
	ldr ip, [r2, #0x1c]
	mov r1, lr, lsl #8
	mov r0, r4, lsl #8
	orr r2, r1, lr, asr #8
	orr r1, r0, r4, asr #8
	mov r0, r2, lsl #0x10
	mov r1, r1, lsl #0x10
	mov r2, r0, lsr #0x10
	mov r0, r1, lsr #0x10
	orr r0, r0, r2, lsl #16
	cmp ip, r0
	moveq r3, #1
_022C9DD8:
	mov r0, r3
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022C9D2C

	arm_func_start ov00_022C9DE0
ov00_022C9DE0: ; 0x022C9DE0
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr r2, _022C9E40 ; =_022B966C
	mov r7, r0
	ldr r5, [r2, #8]
	mov r6, r1
	cmp r5, #0
	beq _022C9E38
_022C9DFC:
	ldr r4, [r5, #0xa4]
	cmp r4, #0
	ldrne r0, [r4]
	cmpne r0, #0
	beq _022C9E2C
	mov r0, r7
	mov r1, r6
	mov r2, r4
	bl ov00_022C9D2C
	cmp r0, #0
	movne r0, r4
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
_022C9E2C:
	ldr r5, [r5, #0x68]
	cmp r5, #0
	bne _022C9DFC
_022C9E38:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022C9E40: .word _022B966C
	arm_func_end ov00_022C9DE0

	arm_func_start ov00_022C9E44
ov00_022C9E44: ; 0x022C9E44
	mov r2, #0x218
	strh r2, [r1, #0x2e]
	ldrb r2, [r0, #0xc]
	add r3, r0, #0x14
	and r2, r2, #0xf0
	mov r0, r2, asr #1
	add r0, r2, r0, lsr #30
	mov r0, r0, asr #2
	subs r0, r0, #0x14
	sub ip, r0, #1
	bxeq lr
_022C9E70:
	ldrb r0, [r3], #1
	cmp r0, #0
	bxeq lr
	cmp r0, #1
	beq _022C9EB8
	cmp r0, #2
	bne _022C9EA8
	ldrb r2, [r3, #1]
	ldrb r0, [r3, #2]
	add r3, r3, #3
	sub ip, ip, #3
	orr r0, r0, r2, lsl #8
	strh r0, [r1, #0x2e]
	b _022C9EB8
_022C9EA8:
	ldrb r0, [r3]
	sub r0, r0, #1
	sub ip, ip, r0
	add r3, r3, r0
_022C9EB8:
	cmp ip, #0
	sub ip, ip, #1
	bne _022C9E70
	bx lr
	arm_func_end ov00_022C9E44

	arm_func_start ov00_022C9EC8
ov00_022C9EC8: ; 0x022C9EC8
	stmdb sp!, {r3, lr}
	bl ov00_022C8704
	cmp r0, #0
	moveq r0, #1
	ldmeqia sp!, {r3, pc}
	bl ov00_022C8BD0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022C9EC8

	arm_func_start ov00_022C9EE4
ov00_022C9EE4: ; 0x022C9EE4
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #4
	mov r6, r0
	ldr r0, [r6, #0x1c]
	mov r5, r1
	mov r4, r2
	bl ov00_022C9EC8
	cmp r0, #0
	bne _022C9F1C
	ldr r0, _022C9F50 ; =_022B966C
	ldr r1, _022C9F54 ; =ov00_023252E0
	ldr r0, [r0, #4]
	cmp r0, r1
	beq _022C9F3C
_022C9F1C:
	mov r0, #0
	mov r1, r0
	mov r2, r6
	mov r3, r5
	str r4, [sp]
	bl ov00_022C9524
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, pc}
_022C9F3C:
	ldr r0, [r6, #0x1c]
	bl ov00_022C8704
	bl ov00_022C8CA0
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, pc}
	.align 2, 0
_022C9F50: .word _022B966C
_022C9F54: .word ov00_023252E0
	arm_func_end ov00_022C9EE4

	arm_func_start ov00_022C9F58
ov00_022C9F58: ; 0x022C9F58
	ldr ip, _022C9F68 ; =ov00_022C9EE4
	mov r2, r1
	mov r1, #0x10
	bx ip
	.align 2, 0
_022C9F68: .word ov00_022C9EE4
	arm_func_end ov00_022C9F58

	arm_func_start ov00_022C9F6C
ov00_022C9F6C: ; 0x022C9F6C
	ldr ip, _022C9F7C ; =ov00_022C9EE4
	mov r2, r1
	mov r1, #0x11
	bx ip
	.align 2, 0
_022C9F7C: .word ov00_022C9EE4
	arm_func_end ov00_022C9F6C

	arm_func_start ov00_022C9F80
ov00_022C9F80: ; 0x022C9F80
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	ldr r4, _022CA0B0 ; =ov00_023251BC
	mov r8, r0
	mov r7, r1
	mov r6, r2
	mov r0, r4
	mov r1, #0
	mov r2, #0x64
	mov r5, r3
	bl MemsetFast
	ldrh r3, [r7, #2]
	ldr r0, _022CA0B4 ; =ov00_02325178
	ldr r2, _022CA0B8 ; =ov00_02325078
	mov r1, r3, lsl #8
	orr r1, r1, r3, asr #8
	strh r1, [r0, #0x4e]
	ldrh r3, [r7]
	mov r1, r3, lsl #8
	orr r1, r1, r3, asr #8
	strh r1, [r0, #0x5c]
	ldrh ip, [r8, #0xe]
	ldrh r3, [r8, #0xc]
	mov r0, ip, lsl #8
	mov r1, r3, lsl #8
	orr r3, r1, r3, asr #8
	orr r1, r0, ip, asr #8
	mov r0, r3, lsl #0x10
	mov r1, r1, lsl #0x10
	mov r3, r0, lsr #0x10
	mov r0, r1, lsr #0x10
	orr r0, r0, r3, lsl #16
	str r0, [r2, #0x160]
	ldrb r0, [r7, #0xd]
	tst r0, #0x10
	beq _022CA050
	ldrh r6, [r7, #0xa]
	ldrh r3, [r7, #8]
	mov r0, r4
	mov r1, r6, lsl #8
	mov r2, r3, lsl #8
	orr r3, r2, r3, asr #8
	orr r2, r1, r6, asr #8
	mov r1, r3, lsl #0x10
	mov r2, r2, lsl #0x10
	mov r3, r1, lsr #0x10
	mov r1, r2, lsr #0x10
	orr r3, r1, r3, lsl #16
	mov r2, r5
	mov r1, #4
	str r3, [r4, #0x28]
	bl ov00_022C9EE4
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022CA050:
	mov r0, #0
	str r0, [r4, #0x28]
	ldrh r3, [r7, #6]
	ldrh r2, [r7, #4]
	mov r0, r3, lsl #8
	mov r1, r2, lsl #8
	orr r2, r1, r2, asr #8
	orr r1, r0, r3, asr #8
	mov r0, r2, lsl #0x10
	mov r1, r1, lsl #0x10
	mov r2, r0, lsr #0x10
	mov r0, r1, lsr #0x10
	orr r0, r0, r2, lsl #16
	add r1, r6, r0
	str r1, [r4, #0x24]
	ldrb r0, [r7, #0xd]
	mov r2, r5
	tst r0, #3
	addne r0, r1, #1
	strne r0, [r4, #0x24]
	mov r0, r4
	mov r1, #0x14
	bl ov00_022C9EE4
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022CA0B0: .word ov00_023251BC
_022CA0B4: .word ov00_02325178
_022CA0B8: .word ov00_02325078
	arm_func_end ov00_022C9F80

	arm_func_start ov00_022CA0BC
ov00_022CA0BC: ; 0x022CA0BC
	stmdb sp!, {r4, r5, r6, lr}
	mov r4, r2
	mov r2, #3
	mov r6, r0
	mov r5, r1
	strb r2, [r4, #8]
	bl sub_0207AE44
	mov r0, r0, lsr #0x10
	orr r0, r0, r1, lsl #16
	str r0, [r4, #0x10]
	ldrh r2, [r6, #0x12]
	ldrh r3, [r6, #0x10]
	mov r0, r5
	mov r1, r2, lsl #8
	orr r2, r1, r2, asr #8
	mov r1, r3, lsl #8
	orr r1, r1, r3, asr #8
	mov r1, r1, lsl #0x10
	mov r2, r2, lsl #0x10
	mov r3, r1, lsr #0x10
	mov r1, r2, lsr #0x10
	orr r1, r1, r3, lsl #16
	str r1, [r4, #0x14]
	ldrh r3, [r5]
	mov r1, r4
	mov r2, r3, lsl #8
	orr r2, r2, r3, asr #8
	strh r2, [r4, #0x18]
	ldrh r3, [r6, #0xe]
	ldrh r6, [r6, #0xc]
	mov r2, r3, lsl #8
	orr r3, r2, r3, asr #8
	mov r2, r6, lsl #8
	orr r2, r2, r6, asr #8
	mov r2, r2, lsl #0x10
	mov r3, r3, lsl #0x10
	mov r6, r2, lsr #0x10
	mov r2, r3, lsr #0x10
	orr r2, r2, r6, lsl #16
	str r2, [r4, #0x1c]
	ldrh r6, [r5, #6]
	ldrh r5, [r5, #4]
	mov r2, r6, lsl #8
	mov r3, r5, lsl #8
	orr r5, r3, r5, asr #8
	orr r3, r2, r6, asr #8
	mov r2, r5, lsl #0x10
	mov r3, r3, lsl #0x10
	mov r5, r2, lsr #0x10
	mov r2, r3, lsr #0x10
	orr r2, r2, r5, lsl #16
	add r2, r2, #1
	str r2, [r4, #0x24]
	bl ov00_022C9E44
	mov r0, r4
	mov r1, #0x12
	mov r2, #0
	bl ov00_022C9EE4
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022CA0BC

	arm_func_start ov00_022CA1A8
ov00_022CA1A8: ; 0x022CA1A8
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	mov r4, r2
	bl ov00_022C9DE0
	movs r2, r0
	beq _022CA228
	ldrb r0, [r2, #8]
	cmp r0, #1
	bne _022CA1E0
	mov r0, r6
	mov r1, r5
	bl ov00_022CA0BC
	b _022CA220
_022CA1E0:
	add r0, r0, #0xfd
	and r0, r0, #0xff
	cmp r0, #1
	bhi _022CA20C
	ldr r1, [r2, #0x28]
	mov r0, r6
	sub r3, r1, #1
	mov r1, r5
	str r3, [r2, #0x28]
	bl ov00_022CA0BC
	b _022CA220
_022CA20C:
	mov r0, r6
	mov r1, r5
	mov r2, r4
	mov r3, #0
	bl ov00_022C9F80
_022CA220:
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
_022CA228:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022CA1A8

	arm_func_start ov00_022CA230
ov00_022CA230: ; 0x022CA230
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r4, r0
	ldrh r0, [r4, #0x12]
	ldrh r8, [r4, #0x10]
	ldrh r7, [r4, #0xe]
	ldrh r6, [r4, #0xc]
	mov ip, r8, lsl #8
	orr ip, ip, r8, asr #8
	mov r5, r6, lsl #8
	mov ip, ip, lsl #0x10
	mov lr, r7, lsl #8
	orr r6, r5, r6, asr #8
	mov r3, r0, lsl #8
	orr r5, lr, r7, asr #8
	orr lr, r3, r0, asr #8
	mov r0, r6, lsl #0x10
	mov r3, r5, lsl #0x10
	mov r5, r0, lsr #0x10
	mov r0, r3, lsr #0x10
	mov lr, lr, lsl #0x10
	orr r0, r0, r5, lsl #16
	mov ip, ip, lsr #0x10
	mov r3, lr, lsr #0x10
	mov r6, r1
	orr r1, r3, ip, lsl #16
	mov r5, r2
	bl ov00_022C9B68
	cmp r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	mov r0, r4
	mov r1, r6
	mov r2, r5
	bl ov00_022CA1A8
	cmp r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	mov r0, r4
	mov r1, r6
	bl ov00_022C9C58
	movs r2, r0
	beq _022CA2E0
	mov r0, r4
	mov r1, r6
	bl ov00_022CA0BC
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022CA2E0:
	bl sub_020799AC
	mov r0, r4
	mov r1, r6
	bl ov00_022C9C58
	movs r2, r0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	mov r0, r4
	mov r1, r6
	bl ov00_022CA0BC
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022CA230

	arm_func_start ov00_022CA308
ov00_022CA308: ; 0x022CA308
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r5, r1
	mov r6, r2
	bl ov00_022C9DE0
	movs r4, r0
	beq _022CA330
	ldrb r0, [r4, #8]
	cmp r0, #2
	beq _022CA348
_022CA330:
	mov r0, r7
	mov r1, r5
	mov r2, r6
	mov r3, #0
	bl ov00_022C9F80
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022CA348:
	bl sub_020799AC
	ldrh ip, [r5, #6]
	ldrh r3, [r5, #4]
	mov r0, r5
	mov r1, ip, lsl #8
	mov r2, r3, lsl #8
	orr r3, r2, r3, asr #8
	orr r2, r1, ip, asr #8
	mov r1, r3, lsl #0x10
	mov r2, r2, lsl #0x10
	mov r3, r1, lsr #0x10
	mov r1, r2, lsr #0x10
	orr r1, r1, r3, lsl #16
	add r1, r1, #1
	str r1, [r4, #0x24]
	ldrh lr, [r5, #0xa]
	ldrh ip, [r5, #8]
	mov r1, r4
	mov r2, lr, lsl #8
	mov r3, ip, lsl #8
	orr ip, r3, ip, asr #8
	orr r3, r2, lr, asr #8
	mov r2, ip, lsl #0x10
	mov r3, r3, lsl #0x10
	mov ip, r2, lsr #0x10
	mov r2, r3, lsr #0x10
	orr r2, r2, ip, lsl #16
	str r2, [r4, #0x30]
	ldrh r3, [r5, #0xe]
	mov r2, r3, lsl #8
	orr r2, r2, r3, asr #8
	strh r2, [r4, #0x2c]
	bl ov00_022C9E44
	mov r0, r4
	mov r1, #0
	bl ov00_022C9F58
	mov r0, #4
	strb r0, [r4, #8]
	ldr r0, [r4, #4]
	cmp r0, #1
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	mov r0, #0
	str r0, [r4, #4]
	ldr r0, [r4]
	bl OS_WakeupThreadDirect
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022CA308

	arm_func_start ov00_022CA400
ov00_022CA400: ; 0x022CA400
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r4, r0
	mov sb, r1
	mov r8, r2
	bl ov00_022C9DE0
	movs r5, r0
	bne _022CA434
	mov r0, r4
	mov r1, sb
	mov r2, r8
	mov r3, #0
	bl ov00_022C9F80
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022CA434:
	ldrh r6, [sb, #0xa]
	ldrh r3, [sb, #8]
	ldr r2, [r5, #0x30]
	mov r0, r6, lsl #8
	mov r1, r3, lsl #8
	orr r3, r1, r3, asr #8
	orr r1, r0, r6, asr #8
	mov r0, r3, lsl #0x10
	mov r1, r1, lsl #0x10
	mov r3, r0, lsr #0x10
	mov r0, r1, lsr #0x10
	orr r1, r0, r3, lsl #16
	sub r0, r1, r2
	ldrb r6, [sb, #0xd]
	cmp r0, #0
	strgt r1, [r5, #0x30]
	ldrh r7, [sb, #6]
	ldrh r3, [sb, #4]
	ldrb r2, [r5, #8]
	mov r0, r7, lsl #8
	mov r1, r3, lsl #8
	orr r3, r1, r3, asr #8
	orr r1, r0, r7, asr #8
	mov r0, r3, lsl #0x10
	mov r1, r1, lsl #0x10
	mov r3, r0, lsr #0x10
	mov r0, r1, lsr #0x10
	cmp r2, #4
	orr r1, r0, r3, lsl #16
	bne _022CA4C8
	ldr r0, [r5, #0x24]
	cmp r0, r1
	beq _022CA4C8
	mov r0, r5
	mov r1, #0
	bl ov00_022C9F58
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022CA4C8:
	ldrh r1, [sb, #0xe]
	mov r0, r1, lsl #8
	orr r0, r0, r1, asr #8
	strh r0, [r5, #0x2c]
	ldrb r0, [r5, #8]
	cmp r0, #9
	addls pc, pc, r0, lsl #2
	b _022CA6F4
_022CA4E8: ; jump table
	b _022CA510 ; case 0
	b _022CA6F4 ; case 1
	b _022CA510 ; case 2
	b _022CA528 ; case 3
	b _022CA554 ; case 4
	b _022CA6F4 ; case 5
	b _022CA6D0 ; case 6
	b _022CA65C ; case 7
	b _022CA65C ; case 8
	b _022CA6D0 ; case 9
_022CA510:
	mov r0, r4
	mov r1, sb
	mov r2, r8
	mov r3, #0
	bl ov00_022C9F80
	b _022CA710
_022CA528:
	mov r0, #4
	strb r0, [r5, #8]
	ldr r0, [r5, #4]
	cmp r0, #1
	bne _022CA54C
	mov r0, #0
	str r0, [r5, #4]
	ldr r0, [r5]
	bl OS_WakeupThreadDirect
_022CA54C:
	cmp r8, #0
	beq _022CA710
_022CA554:
	ldr r0, [r5, #0x34]
	add r0, r0, #1
	str r0, [r5, #0x34]
	ldr r1, [r5, #0x3c]
	ldr r0, [r5, #0x44]
	sub r0, r1, r0
	cmp r8, r0
	movhi r7, #0
	movhi r8, r0
	movls r7, #1
	cmp r8, #0
	beq _022CA5F0
	bl EnableIrqFlag
	ldrb r1, [sb, #0xc]
	ldr ip, [r5, #0x40]
	ldr r3, [r5, #0x44]
	and r2, r1, #0xf0
	mov r1, r2, asr #1
	add r1, r2, r1, lsr #30
	mov r4, r0
	mov r2, r8
	add r0, sb, r1, asr #2
	add r1, ip, r3
	bl MemcpyFast
	ldr r1, [r5, #0x44]
	mov r0, r4
	add r1, r1, r8
	str r1, [r5, #0x44]
	ldr r1, [r5, #0x24]
	add r1, r1, r8
	str r1, [r5, #0x24]
	bl SetIrqFlag
	ldr r0, [r5, #4]
	cmp r0, #2
	bne _022CA5F0
	mov r0, #0
	str r0, [r5, #4]
	ldr r0, [r5]
	bl OS_WakeupThreadDirect
_022CA5F0:
	cmp r7, #0
	beq _022CA644
	tst r6, #1
	beq _022CA644
	mov r0, #6
	strb r0, [r5, #8]
	ldr r1, [r5, #0x24]
	mov r0, r5
	add r2, r1, #1
	mov r1, #0
	str r2, [r5, #0x24]
	bl ov00_022C9F6C
	cmp r8, #0
	ldreq r0, [r5, #4]
	cmpeq r0, #2
	bne _022CA710
	mov r0, #0
	str r0, [r5, #4]
	ldr r0, [r5]
	bl OS_WakeupThreadDirect
	b _022CA710
_022CA644:
	cmp r8, #0
	beq _022CA710
	mov r0, r5
	mov r1, #0
	bl ov00_022C9F58
	b _022CA710
_022CA65C:
	tst r6, #1
	beq _022CA6A4
	ldr r1, [r5, #0x24]
	add r0, r8, #1
	add r2, r1, r0
	mov r0, r5
	mov r1, #0
	str r2, [r5, #0x24]
	bl ov00_022C9F58
	mov r1, #0
	strb r1, [r5, #8]
	ldr r0, [r5, #4]
	cmp r0, #2
	bne _022CA710
	str r1, [r5, #4]
	ldr r0, [r5]
	bl OS_WakeupThreadDirect
	b _022CA710
_022CA6A4:
	cmp r8, #0
	beq _022CA6C4
	ldr r1, [r5, #0x24]
	mov r0, r5
	add r2, r1, r8
	mov r1, #0
	str r2, [r5, #0x24]
	bl ov00_022C9F58
_022CA6C4:
	mov r0, #8
	strb r0, [r5, #8]
	b _022CA710
_022CA6D0:
	mov r1, #0
	strb r1, [r5, #8]
	ldr r0, [r5, #4]
	cmp r0, #2
	bne _022CA710
	str r1, [r5, #4]
	ldr r0, [r5]
	bl OS_WakeupThreadDirect
	b _022CA710
_022CA6F4:
	tst r6, #1
	ldrne r0, [r5, #0x24]
	mov r1, #0
	addne r0, r0, #1
	strne r0, [r5, #0x24]
	mov r0, r5
	bl ov00_022C9F58
_022CA710:
	bl sub_020799AC
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022CA400

	arm_func_start ov00_022CA718
ov00_022CA718: ; 0x022CA718
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r6, r1
	mov r5, r2
	bl ov00_022C9DE0
	movs r4, r0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldrb r1, [r4, #8]
	cmp r1, #4
	beq _022CA7AC
	cmp r1, #7
	beq _022CA754
	cmp r1, #8
	beq _022CA774
	b _022CA7CC
_022CA754:
	ldr r2, [r4, #0x24]
	mov r1, #0
	add r2, r2, #1
	str r2, [r4, #0x24]
	bl ov00_022C9F58
	mov r0, #9
	strb r0, [r4, #8]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022CA774:
	ldr r2, [r4, #0x24]
	mov r1, #0
	add r2, r2, #1
	str r2, [r4, #0x24]
	bl ov00_022C9F58
	mov r1, #0
	strb r1, [r4, #8]
	ldr r0, [r4, #4]
	cmp r0, #2
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	str r1, [r4, #4]
	ldr r0, [r4]
	bl OS_WakeupThreadDirect
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022CA7AC:
	ldr r2, [r4, #0x24]
	mov r1, #0
	add r2, r2, #1
	str r2, [r4, #0x24]
	bl ov00_022C9F6C
	mov r0, #6
	strb r0, [r4, #8]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022CA7CC:
	mov r0, r7
	mov r1, r6
	mov r2, r5
	mov r3, #0
	bl ov00_022C9F80
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022CA718

	arm_func_start ov00_022CA7E4
ov00_022CA7E4: ; 0x022CA7E4
	stmdb sp!, {r4, lr}
	bl ov00_022C9DE0
	movs r4, r0
	ldmeqia sp!, {r4, pc}
	bl sub_020799AC
	mov r1, #0
	strb r1, [r4, #8]
	ldr r0, [r4, #4]
	sub r0, r0, #1
	cmp r0, #1
	ldmhiia sp!, {r4, pc}
	str r1, [r4, #4]
	ldr r0, [r4]
	bl OS_WakeupThreadDirect
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022CA7E4

	arm_func_start ov00_022CA820
ov00_022CA820: ; 0x022CA820
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	mov r4, r2
	mov r0, r5
	mov r1, r4
	mov r2, r6
	mov r3, #6
	bl ov00_022C8674
	cmp r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	ldrb r0, [r5, #0xc]
	ldrb r2, [r5, #0xd]
	and r1, r0, #0xf0
	mov r0, r1, asr #1
	add r0, r1, r0, lsr #30
	and r1, r2, #0x17
	cmp r1, #0x10
	sub r4, r4, r0, asr #2
	bgt _022CA898
	cmp r1, #0x10
	bge _022CA8F0
	cmp r1, #2
	bgt _022CA918
	cmp r1, #1
	blt _022CA918
	beq _022CA904
	cmp r1, #2
	beq _022CA8B8
	b _022CA918
_022CA898:
	cmp r1, #0x12
	bgt _022CA918
	cmp r1, #0x11
	blt _022CA918
	beq _022CA8F0
	cmp r1, #0x12
	beq _022CA8D4
	b _022CA918
_022CA8B8:
	tst r2, #0x28
	ldmneia sp!, {r4, r5, r6, pc}
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_022CA230
	ldmia sp!, {r4, r5, r6, pc}
_022CA8D4:
	tst r2, #0x28
	ldmneia sp!, {r4, r5, r6, pc}
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_022CA308
	ldmia sp!, {r4, r5, r6, pc}
_022CA8F0:
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_022CA400
	ldmia sp!, {r4, r5, r6, pc}
_022CA904:
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_022CA718
	ldmia sp!, {r4, r5, r6, pc}
_022CA918:
	tst r2, #4
	mov r0, r6
	mov r1, r5
	beq _022CA930
	bl ov00_022CA7E4
	ldmia sp!, {r4, r5, r6, pc}
_022CA930:
	mov r2, r4
	mov r3, #0
	bl ov00_022C9F80
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022CA820

	arm_func_start ov00_022CA940
ov00_022CA940: ; 0x022CA940
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r7, r1
	ldrh r1, [r7, #6]
	mov r8, r0
	mov r6, r2
	cmp r1, #0
	beq _022CA978
	mov r0, r7
	mov r1, r6
	mov r2, r8
	mov r3, #0x11
	bl ov00_022C8674
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022CA978:
	bl EnableIrqFlag
	ldr r1, _022CAB48 ; =_022B966C
	mov r5, r0
	ldr r1, [r1, #8]
	cmp r1, #0
	beq _022CAB3C
	mvn ip, #0
_022CA994:
	ldr r4, [r1, #0xa4]
	cmp r4, #0
	ldrne r0, [r4]
	cmpne r0, #0
	beq _022CAB30
	ldrb r0, [r4, #8]
	cmp r0, #0xa
	bne _022CAB30
	ldrh r3, [r7, #2]
	ldrh r2, [r4, #0xa]
	mov r0, r3, lsl #8
	orr r0, r0, r3, asr #8
	mov r0, r0, lsl #0x10
	cmp r2, r0, lsr #16
	bne _022CAB30
	ldrh r3, [r4, #0x18]
	cmp r3, #0
	beq _022CA9F4
	ldrh r2, [r7]
	mov r0, r2, lsl #8
	orr r0, r0, r2, asr #8
	mov r0, r0, lsl #0x10
	cmp r3, r0, lsr #16
	bne _022CAB30
_022CA9F4:
	ldr r0, [r4, #0x1c]
	cmp r0, #0
	cmpne r0, ip
	beq _022CAA38
	ldrh sb, [r8, #0xe]
	ldrh lr, [r8, #0xc]
	mov r2, sb, lsl #8
	mov r3, lr, lsl #8
	orr lr, r3, lr, asr #8
	orr r3, r2, sb, asr #8
	mov r2, lr, lsl #0x10
	mov r3, r3, lsl #0x10
	mov lr, r2, lsr #0x10
	mov r2, r3, lsr #0x10
	orr r2, r2, lr, lsl #16
	cmp r0, r2
	bne _022CAB30
_022CAA38:
	ldrh r3, [r8, #0x12]
	ldrh r2, [r8, #0x10]
	mov r0, r3, lsl #8
	mov r1, r2, lsl #8
	orr r2, r1, r2, asr #8
	orr r1, r0, r3, asr #8
	mov r0, r2, lsl #0x10
	mov r1, r1, lsl #0x10
	mov r2, r0, lsr #0x10
	mov r0, r1, lsr #0x10
	orr r0, r0, r2, lsl #16
	str r0, [r4, #0x14]
	ldr r0, [r4, #0x1c]
	cmp r0, #0
	bne _022CAAB4
	ldrh r3, [r8, #0xe]
	ldrh r2, [r8, #0xc]
	mov r0, r3, lsl #8
	mov r1, r2, lsl #8
	orr r2, r1, r2, asr #8
	orr r1, r0, r3, asr #8
	mov r0, r2, lsl #0x10
	mov r1, r1, lsl #0x10
	mov r2, r0, lsr #0x10
	mov r0, r1, lsr #0x10
	orr r0, r0, r2, lsl #16
	str r0, [r4, #0x1c]
	ldrh r1, [r7]
	mov r0, r1, lsl #8
	orr r0, r0, r1, asr #8
	strh r0, [r4, #0x18]
_022CAAB4:
	ldr r0, [r4, #0x44]
	cmp r0, #0
	bne _022CAB3C
	ldr r1, [r4, #0x3c]
	sub r0, r6, #8
	cmp r0, r1
	strhi r1, [r4, #0x44]
	strls r0, [r4, #0x44]
	ldr r1, [r4, #0x40]
	ldr r2, [r4, #0x44]
	add r0, r7, #8
	bl MemcpyFast
	ldr r0, [r4, #4]
	cmp r0, #3
	bne _022CAB04
	mov r0, #0
	str r0, [r4, #4]
	ldr r0, [r4]
	bl OS_WakeupThreadDirect
	b _022CAB3C
_022CAB04:
	ldr r3, [r4, #0x38]
	cmp r3, #0
	beq _022CAB3C
	ldr r0, [r4, #0x40]
	ldr r1, [r4, #0x44]
	mov r2, r4
	blx r3
	cmp r0, #0
	movne r0, #0
	strne r0, [r4, #0x44]
	b _022CAB3C
_022CAB30:
	ldr r1, [r1, #0x68]
	cmp r1, #0
	bne _022CA994
_022CAB3C:
	mov r0, r5
	bl SetIrqFlag
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022CAB48: .word _022B966C
	arm_func_end ov00_022CA940

	arm_func_start ov00_022CAB4C
ov00_022CAB4C: ; 0x022CAB4C
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0xc
	mov r6, #0
	mov sl, r0
	str r6, [r1]
	ldrh r3, [sl, #6]
	str r1, [sp]
	ldr r2, _022CAE08 ; =0x00003FFF
	mov r1, r3, lsl #8
	orr r1, r1, r3, asr #8
	mov r1, r1, lsl #0x10
	mov r1, r1, lsr #0x10
	str r1, [sp, #8]
	tst r1, r2
	addeq sp, sp, #0xc
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldrh r3, [sl, #0xe]
	ldrh r2, [sl, #0xc]
	ldrb r4, [sl]
	mov r0, r3, lsl #8
	mov r1, r2, lsl #8
	orr r2, r1, r2, asr #8
	orr r1, r0, r3, asr #8
	mov r3, r4, lsl #0x1c
	mov r0, r2, lsl #0x10
	mov r1, r1, lsl #0x10
	mov r2, r0, lsr #0x10
	mov r1, r1, lsr #0x10
	ldrh r4, [sl, #4]
	ldr r7, _022CAE0C ; =ov00_023253A0
	mov r0, r6
	mov r5, r3, lsr #0x1a
	orr sb, r1, r2, lsl #16
_022CABD0:
	ldrh r2, [r7, #4]
	cmp r2, #0
	beq _022CABF0
	ldr r1, [r7]
	cmp r1, sb
	ldreqh r1, [r7, #6]
	cmpeq r1, r4
	beq _022CAC0C
_022CABF0:
	add r0, r0, #1
	cmp r2, #0
	cmpeq r6, #0
	moveq r6, r7
	cmp r0, #8
	add r7, r7, #0x38
	blo _022CABD0
_022CAC0C:
	ldrh r2, [sl, #2]
	cmp r0, #8
	ldr r1, _022CAE10 ; =0x00001FFF
	mov r0, r2, lsl #8
	orr r0, r0, r2, asr #8
	mov r0, r0, lsl #0x10
	rsb r0, r5, r0, lsr #16
	str r0, [sp, #4]
	ldr r0, [sp, #8]
	and fp, r0, r1
	ldr r0, [sp, #4]
	add r8, r0, fp, lsl #3
	bne _022CACC8
	cmp r6, #0
	beq _022CAC50
	cmp r8, #0x1000
	bls _022CAC5C
_022CAC50:
	add sp, sp, #0xc
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022CAC5C:
	ldr r1, _022CAE14 ; =ov00_02325078
	add r0, r5, #0xe
	ldr r1, [r1, #0x14]
	add r0, r0, #0x1000
	mov r7, r6
	blx r1
	cmp r0, #0
	str r0, [r6, #0x34]
	addeq sp, sp, #0xc
	mov r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	str sb, [r6]
	strh r4, [r6, #6]
	strh r0, [r6, #8]
	bl sub_0207AE44
	mov r0, r0, lsr #0x10
	orr r0, r0, r1, lsl #16
	str r0, [r6, #0x2c]
	ldr r1, [r6, #0x34]
	mov r0, sl
	add r1, r1, #0xe
	add r1, r1, r5
	str r1, [r6, #0x30]
	ldr r1, [r6, #0x34]
	mov r2, r5
	add r1, r1, #0xe
	bl MemcpyFast
_022CACC8:
	ldrh r0, [r7, #4]
	cmp r0, #8
	beq _022CACDC
	cmp r8, #0x1000
	bls _022CAD00
_022CACDC:
	ldr r1, _022CAE14 ; =ov00_02325078
	mov r0, #0
	strh r0, [r7, #4]
	ldr r0, [r7, #0x34]
	ldr r1, [r1, #0x40]
	blx r1
	add sp, sp, #0xc
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022CAD00:
	ldr r0, [sp, #4]
	ldr r2, [sp, #4]
	add r1, r0, #7
	ldr r0, [sp, #8]
	add r3, fp, r1, lsr #3
	tst r0, #0x2000
	streqh r8, [r7, #0xa]
	streqh r3, [r7, #8]
	ldrh r1, [r7, #4]
	add r0, sl, r5
	add r1, r7, r1, lsl #1
	strh fp, [r1, #0xc]
	ldrh r1, [r7, #4]
	add r1, r7, r1, lsl #1
	strh r3, [r1, #0x1c]
	ldrh r1, [r7, #4]
	add r1, r1, #1
	strh r1, [r7, #4]
	ldr r1, [r7, #0x30]
	add r1, r1, fp, lsl #3
	bl MemcpyFast
	ldrh r4, [r7, #8]
	cmp r4, #0
	addeq sp, sp, #0xc
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldrh r3, [r7, #4]
	mov r6, #0
	mov r5, r6
	cmp r3, #0
	bls _022CADB0
	mov r0, r6
_022CAD80:
	add r2, r7, r5, lsl #1
	ldrh r1, [r2, #0xc]
	cmp r1, r6
	bhi _022CADA4
	ldrh r1, [r2, #0x1c]
	cmp r6, r1
	movlo r6, r1
	movlo r5, r0
	blo _022CADA8
_022CADA4:
	add r5, r5, #1
_022CADA8:
	cmp r5, r3
	blo _022CAD80
_022CADB0:
	cmp r6, r4
	addlo sp, sp, #0xc
	movlo r0, #0
	ldmloia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r4, [r7, #0x34]
	ldrh r3, [r7, #0xa]
	ldrb r0, [r4, #0xe]
	mov r2, #0
	mov r1, #1
	mov r0, r0, lsl #0x1c
	add r0, r3, r0, lsr #26
	mov r0, r0, lsl #0x10
	mov r3, r0, lsr #0x10
	mov r0, r3, lsl #8
	orr r0, r0, r3, asr #8
	strh r0, [r4, #0x10]
	ldr r0, [sp]
	strh r2, [r7, #4]
	str r1, [r0]
	add r0, r4, #0xe
	add sp, sp, #0xc
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022CAE08: .word 0x00003FFF
_022CAE0C: .word ov00_023253A0
_022CAE10: .word 0x00001FFF
_022CAE14: .word ov00_02325078
	arm_func_end ov00_022CAB4C

	arm_func_start ov00_022CAE18
ov00_022CAE18: ; 0x022CAE18
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r4, r0
	ldrh r7, [r4, #0xe]
	ldrh r6, [r4, #0xc]
	ldrh lr, [r4, #0x12]
	ldrh r5, [r4, #0x10]
	mov r2, r6, lsl #8
	mov r3, lr, lsl #8
	mov ip, r5, lsl #8
	mov r0, r7, lsl #8
	orr r5, ip, r5, asr #8
	orr lr, r3, lr, asr #8
	orr r3, r2, r6, asr #8
	orr ip, r0, r7, asr #8
	mov r0, r5, lsl #0x10
	mov r2, lr, lsl #0x10
	mov r3, r3, lsl #0x10
	mov ip, ip, lsl #0x10
	mov lr, r0, lsr #0x10
	mov r0, r2, lsr #0x10
	mov r3, r3, lsr #0x10
	mov r2, ip, lsr #0x10
	orr r0, r0, lr, lsl #16
	orr r2, r2, r3, lsl #16
	mov r5, r1
	cmp r0, r2
	beq _022CAF3C
	bl ov00_022C8778
	cmp r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldrh r1, [r4, #2]
	mov r0, r1, lsl #8
	orr r0, r0, r1, asr #8
	mov r0, r0, lsl #0x10
	cmp r5, r0, lsr #16
	ldmloia sp!, {r3, r4, r5, r6, r7, pc}
	ldrb r1, [r4]
	mov r0, r4
	mov r1, r1, lsl #0x1c
	mov r1, r1, lsr #0x1a
	bl ov00_022C8658
	ldr r1, _022CAFD4 ; =0x0000FFFF
	cmp r0, r1
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	ldrh ip, [r4, #0x12]
	ldrh r3, [r4, #0x10]
	ldr r2, _022CAFD8 ; =ov00_02325078
	mov r0, ip, lsl #8
	mov r1, r3, lsl #8
	orr r3, r1, r3, asr #8
	orr r1, r0, ip, asr #8
	mov r0, r3, lsl #0x10
	mov r1, r1, lsl #0x10
	mov r3, r0, lsr #0x10
	mov r0, r1, lsr #0x10
	ldr r1, [r2, #0x50]
	orr r0, r0, r3, lsl #16
	cmp r1, r0
	bne _022CAF3C
	ldrh ip, [r4, #0xe]
	ldrh r3, [r4, #0xc]
	sub r0, r4, #8
	mov r1, ip, lsl #8
	mov r2, r3, lsl #8
	orr r3, r2, r3, asr #8
	orr r2, r1, ip, asr #8
	mov r1, r3, lsl #0x10
	mov r2, r2, lsl #0x10
	mov r3, r1, lsr #0x10
	mov r1, r2, lsr #0x10
	orr r1, r1, r3, lsl #16
	mov r2, #1
	bl ov00_022C8E0C
_022CAF3C:
	add r1, sp, #0
	mov r0, r4
	bl ov00_022CAB4C
	movs r4, r0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldrh r2, [r4, #2]
	ldrb r3, [r4]
	ldrb ip, [r4, #9]
	mov r1, r2, lsl #8
	orr r1, r1, r2, asr #8
	mov r1, r1, lsl #0x10
	mov r3, r3, lsl #0x1c
	mov r2, r1, lsr #0x10
	cmp ip, #0x11
	add r1, r4, r3, lsr #26
	sub r2, r2, r3, lsr #26
	bne _022CAF88
	bl ov00_022CA940
	b _022CAFB4
_022CAF88:
	ldr r3, _022CAFD8 ; =ov00_02325078
	ldr r3, [r3, #0x50]
	cmp r3, #0
	beq _022CAFB4
	cmp ip, #1
	bne _022CAFA8
	bl ov00_022C9B88
	b _022CAFB4
_022CAFA8:
	cmp ip, #6
	bne _022CAFB4
	bl ov00_022CA820
_022CAFB4:
	ldr r0, [sp]
	cmp r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, _022CAFD8 ; =ov00_02325078
	sub r0, r4, #0xe
	ldr r1, [r1, #0x40]
	blx r1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022CAFD4: .word 0x0000FFFF
_022CAFD8: .word ov00_02325078
	arm_func_end ov00_022CAE18

	arm_func_start ov00_022CAFDC
ov00_022CAFDC: ; 0x022CAFDC
	stmdb sp!, {r3, r4, r5, lr}
	ldr r5, _022CB048 ; =0x00000806
	add r4, sp, #0
_022CAFE8:
	mov r0, r4
	bl ov00_022C8ACC
	ldr r3, [sp]
	cmp r3, #0x22
	bls _022CB040
	ldrh r2, [r0, #0xc]
	mov r1, r2, lsl #8
	orr r1, r1, r2, asr #8
	mov r1, r1, lsl #0x10
	mov r1, r1, lsr #0x10
	cmp r1, #0x800
	beq _022CB024
	cmp r1, r5
	beq _022CB034
	b _022CB040
_022CB024:
	add r0, r0, #0xe
	sub r1, r3, #0xe
	bl ov00_022CAE18
	b _022CB040
_022CB034:
	add r0, r0, #0xe
	sub r1, r3, #0xe
	bl ov00_022C9840
_022CB040:
	bl ov00_022C8B8C
	b _022CAFE8
	.align 2, 0
_022CB048: .word 0x00000806
	arm_func_end ov00_022CAFDC

	arm_func_start ov00_022CB04C
ov00_022CB04C: ; 0x022CB04C
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	ldr r0, _022CB0E8 ; =_022B966C
	ldr r2, _022CB0EC ; =ov00_02325078
	ldr r0, [r0, #8]
	ldr r1, _022CB0F0 ; =0x00001388
	mov r4, #0x400
	mov r3, #1
	mov r5, #0
_022CB06C:
	ldrh ip, [r2, #8]
	mov r6, r5
	add ip, ip, #1
	strh ip, [r2, #8]
	ldrh ip, [r2, #8]
	cmp ip, #0x400
	blo _022CB090
	cmp ip, r1
	blo _022CB094
_022CB090:
	strh r4, [r2, #8]
_022CB094:
	mov r7, r0
	cmp r0, #0
	beq _022CB0D4
	ldrh r8, [r2, #8]
_022CB0A4:
	ldr lr, [r7, #0xa4]
	cmp lr, #0
	ldrne ip, [lr]
	cmpne ip, #0
	beq _022CB0C8
	ldrh ip, [lr, #0xa]
	cmp ip, r8
	moveq r6, r3
	beq _022CB0D4
_022CB0C8:
	ldr r7, [r7, #0x68]
	cmp r7, #0
	bne _022CB0A4
_022CB0D4:
	cmp r6, #0
	bne _022CB06C
	ldr r0, _022CB0EC ; =ov00_02325078
	ldrh r0, [r0, #8]
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022CB0E8: .word _022B966C
_022CB0EC: .word ov00_02325078
_022CB0F0: .word 0x00001388
	arm_func_end ov00_022CB04C

	arm_func_start ov00_022CB0F4
ov00_022CB0F4: ; 0x022CB0F4
	stmdb sp!, {r3, lr}
	ldr r1, _022CB134 ; =ov00_02325078
	ldr r3, [r1, #0x70]
	ldr r2, [r1, #0x68]
	ldr r0, [r1, #0x6c]
	umull lr, ip, r3, r2
	mla ip, r3, r0, ip
	ldr r0, [r1, #0x74]
	ldr r3, [r1, #0x78]
	mla ip, r0, r2, ip
	ldr r0, [r1, #0x7c]
	adds r2, r3, lr
	str r2, [r1, #0x68]
	adc r0, r0, ip
	str r0, [r1, #0x6c]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022CB134: .word ov00_02325078
	arm_func_end ov00_022CB0F4

	arm_func_start ov00_022CB138
ov00_022CB138: ; 0x022CB138
	ldr r1, _022CB148 ; =_022B966C
	ldr r1, [r1, #4]
	str r0, [r1, #0xa4]
	bx lr
	.align 2, 0
_022CB148: .word _022B966C
	arm_func_end ov00_022CB138

	arm_func_start ov00_022CB14C
ov00_022CB14C: ; 0x022CB14C
	ldr r0, _022CB160 ; =_022B966C
	mov r1, #0
	ldr r0, [r0, #4]
	str r1, [r0, #0xa4]
	bx lr
	.align 2, 0
_022CB160: .word _022B966C
	arm_func_end ov00_022CB14C

	arm_func_start ov00_022CB164
ov00_022CB164: ; 0x022CB164
	ldr r0, _022CB18C ; =_022B966C
	ldr r0, [r0, #4]
	ldr r1, [r0, #0xa4]
	cmp r1, #0
	bxeq lr
	mov r0, #0xa
	strb r0, [r1, #8]
	mov r0, #0
	str r0, [r1, #0x44]
	bx lr
	.align 2, 0
_022CB18C: .word _022B966C
	arm_func_end ov00_022CB164

	arm_func_start ov00_022CB190
ov00_022CB190: ; 0x022CB190
	stmdb sp!, {r4, lr}
	ldr r3, _022CB1E4 ; =_022B966C
	ldr r3, [r3, #4]
	ldr r4, [r3, #0xa4]
	cmp r4, #0
	ldmeqia sp!, {r4, pc}
	ldr r3, _022CB1E8 ; =0x7F000001
	cmp r2, r3
	ldreq r2, _022CB1EC ; =ov00_02325078
	ldreq r2, [r2, #0x50]
	cmp r0, #0
	strh r1, [r4, #0x1a]
	ldrh r1, [r4, #0x1a]
	strh r1, [r4, #0x18]
	str r2, [r4, #0x20]
	str r2, [r4, #0x1c]
	strneh r0, [r4, #0xa]
	ldmneia sp!, {r4, pc}
	bl ov00_022CB04C
	strh r0, [r4, #0xa]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022CB1E4: .word _022B966C
_022CB1E8: .word 0x7F000001
_022CB1EC: .word ov00_02325078
	arm_func_end ov00_022CB190

	arm_func_start ov00_022CB1F0
ov00_022CB1F0: ; 0x022CB1F0
	ldr r0, _022CB220 ; =_022B966C
	ldr r0, [r0, #4]
	ldr r1, [r0, #0xa4]
	cmp r1, #0
	bxeq lr
	str r0, [r1]
	mov r0, #0
	strb r0, [r1, #8]
	str r0, [r1, #0x44]
	str r0, [r1, #0x60]
	str r0, [r1, #0x38]
	bx lr
	.align 2, 0
_022CB220: .word _022B966C
	arm_func_end ov00_022CB1F0

	arm_func_start ov00_022CB224
ov00_022CB224: ; 0x022CB224
	ldr r0, _022CB240 ; =_022B966C
	ldr r0, [r0, #4]
	ldr r1, [r0, #0xa4]
	cmp r1, #0
	movne r0, #0
	strne r0, [r1]
	bx lr
	.align 2, 0
_022CB240: .word _022B966C
	arm_func_end ov00_022CB224

	arm_func_start ov00_022CB244
ov00_022CB244: ; 0x022CB244
	ldr r1, _022CB258 ; =_022B966C
	ldr r1, [r1, #4]
	ldr r1, [r1, #0xa4]
	str r1, [r0, #0xa4]
	bx lr
	.align 2, 0
_022CB258: .word _022B966C
	arm_func_end ov00_022CB244

	arm_func_start ov00_022CB25C
ov00_022CB25C: ; 0x022CB25C
	ldr r1, _022CB274 ; =_022B966C
	ldr r1, [r1, #4]
	ldr r1, [r1, #0xa4]
	cmp r1, #0
	strne r0, [r1, #0x38]
	bx lr
	.align 2, 0
_022CB274: .word _022B966C
	arm_func_end ov00_022CB25C

	arm_func_start ov00_022CB278
ov00_022CB278: ; 0x022CB278
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov sl, r0
	bl ov00_022CB0F4
	mov r6, #2
	ldr r4, _022CB328 ; =ov00_02325078
	mov r8, r0
	mov r7, #0
	mov r5, #1
	mov fp, r6
_022CB29C:
	str r8, [sl, #0x28]
	strb r6, [sl, #8]
	bl sub_0207AE44
	mov r0, r0, lsr #0x10
	orr r0, r0, r1, lsl #16
	str r0, [sl, #0x10]
	mov r0, sl
	mov r1, fp
	mov r2, #0x18
	bl ov00_022C9EE4
	bl EnableIrqFlag
	mov sb, r0
	ldrb r0, [sl, #8]
	cmp r0, #2
	bne _022CB2F0
	ldr r0, [r4, #0x50]
	cmp r0, #0
	beq _022CB2F0
	mov r0, #0
	str r5, [sl, #4]
	bl OS_SleepThread
_022CB2F0:
	mov r0, sb
	bl SetIrqFlag
	ldrb r0, [sl, #8]
	cmp r0, #4
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r4, #0x50]
	cmp r0, #0
	beq _022CB320
	add r7, r7, #1
	cmp r7, #3
	blo _022CB29C
_022CB320:
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022CB328: .word ov00_02325078
	arm_func_end ov00_022CB278

	arm_func_start ov00_022CB32C
ov00_022CB32C: ; 0x022CB32C
	stmdb sp!, {r3, lr}
	ldr r0, _022CB368 ; =_022B966C
	ldr r0, [r0, #4]
	ldr r0, [r0, #0xa4]
	cmp r0, #0
	beq _022CB360
	ldrb r1, [r0, #9]
	cmp r1, #0
	beq _022CB358
	bl ov00_022D261C
	ldmia sp!, {r3, pc}
_022CB358:
	bl ov00_022CB278
	ldmia sp!, {r3, pc}
_022CB360:
	mov r0, #1
	ldmia sp!, {r3, pc}
	.align 2, 0
_022CB368: .word _022B966C
	arm_func_end ov00_022CB32C

	arm_func_start ov00_022CB36C
ov00_022CB36C: ; 0x022CB36C
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl sub_020799AC
	ldrb r1, [r4, #8]
	add r0, r1, #0xfd
	and r0, r0, #0xff
	cmp r0, #1
	bhi _022CB3A4
	mov r0, r4
	mov r1, #0x19
	bl ov00_022C9F6C
	mov r0, #7
	strb r0, [r4, #8]
	ldmia sp!, {r4, pc}
_022CB3A4:
	cmp r1, #0
	ldmeqia sp!, {r4, pc}
	mov r0, r4
	mov r1, #0x1a
	bl ov00_022C9F58
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022CB36C

	arm_func_start ov00_022CB3BC
ov00_022CB3BC: ; 0x022CB3BC
	stmdb sp!, {r4, lr}
	ldr r0, _022CB3F4 ; =_022B966C
	ldr r0, [r0, #4]
	ldr r4, [r0, #0xa4]
	cmp r4, #0
	ldmeqia sp!, {r4, pc}
	ldrb r0, [r4, #9]
	cmp r0, #0
	beq _022CB3E8
	mov r0, r4
	bl ov00_022D2A8C
_022CB3E8:
	mov r0, r4
	bl ov00_022CB36C
	ldmia sp!, {r4, pc}
	.align 2, 0
_022CB3F4: .word _022B966C
	arm_func_end ov00_022CB3BC

	arm_func_start ov00_022CB3F8
ov00_022CB3F8: ; 0x022CB3F8
	stmdb sp!, {r4, r5, r6, lr}
	ldr r0, _022CB478 ; =_022B966C
	ldr r0, [r0, #4]
	ldr r4, [r0, #0xa4]
	cmp r4, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	ldrb r0, [r4, #9]
	cmp r0, #0
	beq _022CB424
	mov r0, r4
	bl ov00_022D2B0C
_022CB424:
	bl sub_0207AE44
	mov r6, r0, lsr #0x10
	orr r6, r6, r1, lsl #16
	ldr r5, _022CB47C ; =ov00_02325078
	b _022CB43C
_022CB438:
	bl ov00_022C8238
_022CB43C:
	ldr r0, [r5, #0x48]
	blx r0
	cmp r0, #0
	ldrneb r0, [r4, #8]
	cmpne r0, #0
	beq _022CB46C
	bl sub_0207AE44
	mov r0, r0, lsr #0x10
	orr r0, r0, r1, lsl #16
	sub r0, r0, r6
	cmp r0, #0x27
	blt _022CB438
_022CB46C:
	mov r0, #0
	strb r0, [r4, #8]
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022CB478: .word _022B966C
_022CB47C: .word ov00_02325078
	arm_func_end ov00_022CB3F8

	arm_func_start ov00_022CB480
ov00_022CB480: ; 0x022CB480
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r8, r1
	mov sb, r0
	bl EnableIrqFlag
	ldr r6, [r8, #0x44]
	mov r7, r0
	cmp r6, #0
	bne _022CB4C0
	mov r5, #3
	mov r4, #0
_022CB4A8:
	mov r0, r4
	str r5, [r8, #4]
	bl OS_SleepThread
	ldr r6, [r8, #0x44]
	cmp r6, #0
	beq _022CB4A8
_022CB4C0:
	mov r0, r7
	bl SetIrqFlag
	str r6, [sb]
	ldr r0, [r8, #0x40]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022CB480

	arm_func_start ov00_022CB4D4
ov00_022CB4D4: ; 0x022CB4D4
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r4, r1
	ldr r1, [r4, #0x44]
	mov r5, r0
	cmp r1, #0
	ldreqb r0, [r4, #8]
	cmpeq r0, #4
	bne _022CB534
	bl EnableIrqFlag
	mov r8, r0
	mov r7, #2
	mov r6, #0
	b _022CB514
_022CB508:
	mov r0, r6
	str r7, [r4, #4]
	bl OS_SleepThread
_022CB514:
	ldr r0, [r4, #0x44]
	cmp r0, #0
	ldreqb r0, [r4, #8]
	cmpeq r0, #4
	beq _022CB508
	mov r0, r8
	bl SetIrqFlag
	b _022CB538
_022CB534:
	bl sub_020799AC
_022CB538:
	ldr r0, [r4, #0x44]
	str r0, [r5]
	cmp r0, #0
	ldrne r0, [r4, #0x40]
	moveq r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022CB4D4

	arm_func_start ov00_022CB550
ov00_022CB550: ; 0x022CB550
	stmdb sp!, {r3, lr}
	ldr r1, _022CB5B0 ; =_022B966C
	ldr r1, [r1, #4]
	ldr r1, [r1, #0xa4]
	cmp r1, #0
	beq _022CB5A0
	ldrb r2, [r1, #8]
	add r2, r2, #0xf6
	and r2, r2, #0xff
	cmp r2, #1
	bhi _022CB584
	bl ov00_022CB480
	ldmia sp!, {r3, pc}
_022CB584:
	ldrb r2, [r1, #9]
	cmp r2, #0
	beq _022CB598
	bl ov00_022D2670
	ldmia sp!, {r3, pc}
_022CB598:
	bl ov00_022CB4D4
	ldmia sp!, {r3, pc}
_022CB5A0:
	mov r1, #0
	str r1, [r0]
	mov r0, r1
	ldmia sp!, {r3, pc}
	.align 2, 0
_022CB5B0: .word _022B966C
	arm_func_end ov00_022CB550

	arm_func_start ov00_022CB5B4
ov00_022CB5B4: ; 0x022CB5B4
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r4, r1
	mov r7, r0
	bl EnableIrqFlag
	ldr r2, [r4, #0x44]
	ldr r1, [r4, #0x3c]
	mov r5, r0
	cmp r2, r1
	mov r6, #0
	bne _022CB5E4
	cmp r7, #0
	movne r6, #1
_022CB5E4:
	cmp r7, r2
	movhs r0, #0
	strhs r0, [r4, #0x44]
	bhs _022CB608
	ldr r0, [r4, #0x40]
	sub r2, r2, r7
	add r1, r0, r7
	str r2, [r4, #0x44]
	bl memmove
_022CB608:
	mov r0, r5
	bl SetIrqFlag
	ldrb r0, [r4, #8]
	cmp r0, #0xa
	cmpne r0, #0xb
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r0, [r4, #0x44]
	cmp r0, #0
	beq _022CB634
	cmp r6, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
_022CB634:
	mov r0, r4
	mov r1, #0x1b
	bl ov00_022C9F58
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022CB5B4

	arm_func_start ov00_022CB644
ov00_022CB644: ; 0x022CB644
	stmdb sp!, {r3, lr}
	ldr r1, _022CB678 ; =_022B966C
	ldr r1, [r1, #4]
	ldr r1, [r1, #0xa4]
	cmp r1, #0
	ldmeqia sp!, {r3, pc}
	ldrb r2, [r1, #9]
	cmp r2, #0
	beq _022CB670
	bl ov00_022D2748
	ldmia sp!, {r3, pc}
_022CB670:
	bl ov00_022CB5B4
	ldmia sp!, {r3, pc}
	.align 2, 0
_022CB678: .word _022B966C
	arm_func_end ov00_022CB644

	arm_func_start ov00_022CB67C
ov00_022CB67C: ; 0x022CB67C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov r8, r2
	ldr r6, [r8, #0x34]
	movs fp, r3
	mov sl, r0
	movne r5, #1
	mov r0, r6, lsl #1
	mov sb, r1
	ldreqh r5, [r8, #0x2c]
	add r7, r0, #4
	b _022CB720
_022CB6A8:
	ldr r0, _022CB73C ; =ov00_02325078
	ldrh r4, [r8, #0x2e]
	ldrh r0, [r0, #2]
	ldr r1, [r8, #0x34]
	cmp r4, r5
	movhs r4, r5
	cmp r0, r4
	movlo r4, r0
	cmp fp, #0
	biceq r4, r4, #1
	cmp sb, r4
	sub r0, r1, r6
	movlo r4, sb
	adds r0, r7, r0
	moveq r4, #0
	mov r6, r1
	sub r7, r0, #1
	cmp r4, #0
	beq _022CB734
	mov r2, #0
	str r2, [sp]
	mov r0, sl
	mov r1, r4
	mov r2, r8
	mov r3, #0x18
	sub r5, r5, r4
	bl ov00_022C9524
	bl sub_020799AC
	add sl, sl, r4
	sub sb, sb, r4
_022CB720:
	cmp sb, #0
	beq _022CB734
	ldrb r0, [r8, #8]
	cmp r0, #4
	beq _022CB6A8
_022CB734:
	mov r0, r4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022CB73C: .word ov00_02325078
	arm_func_end ov00_022CB67C

	arm_func_start ov00_022CB740
ov00_022CB740: ; 0x022CB740
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r2
	mov r4, r3
	ldr r2, [sp, #0x10]
	ldr r3, [sp, #0x14]
	bl ov00_022CB67C
	cmp r0, #0
	cmpne r4, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r2, [sp, #0x10]
	mov r0, r5
	mov r1, r4
	mov r3, #0
	bl ov00_022CB67C
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022CB740

	arm_func_start ov00_022CB77C
ov00_022CB77C: ; 0x022CB77C
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x14
	mov r4, #0
	mov fp, r0
	ldr r8, [sp, #0x38]
	mov r0, r4
	str r4, [sp, #0x10]
	mov sl, r1
	mov sb, r2
	str r3, [sp, #8]
	mov r6, r4
	str r0, [r8, #0x34]
	bl sub_0207AE44
	mov r0, r0, lsr #0x10
	orr r0, r0, r1, lsl #16
	str r0, [sp, #0xc]
	b _022CB934
_022CB7C0:
	ldr r7, [r8, #0x28]
	ldr r3, [sp, #8]
	str r8, [sp]
	mov r0, fp
	mov r1, sl
	mov r2, sb
	str r6, [sp, #4]
	bl ov00_022CB740
	bl sub_0207AE44
	mov r5, r0, lsr #0x10
	ldr r4, _022CB980 ; =ov00_02325078
	orr r5, r5, r1, lsl #16
_022CB7F0:
	bl ov00_022C8238
	ldr r0, [r4, #0x48]
	blx r0
	cmp r0, #0
	beq _022CB848
	ldrb r0, [r8, #8]
	cmp r0, #4
	bne _022CB848
	ldr r1, [r8, #0x28]
	ldr r0, [r8, #0x30]
	cmp r1, r0
	beq _022CB848
	bl sub_0207AE44
	mov r0, r0, lsr #0x10
	orr r0, r0, r1, lsl #16
	sub r0, r0, r5
	cmp r0, #0xf
	bge _022CB848
	cmp r6, #0
	ldrneh r0, [r8, #0x2c]
	cmpne r0, #0
	beq _022CB7F0
_022CB848:
	ldr r1, [r8, #0x30]
	ldr r0, [r8, #0x28]
	sub r5, r1, r7
	sub r0, r0, r7
	cmp r5, r0
	movhi r5, #0
	ldr r0, [sp, #0x10]
	cmp r5, #0
	add r0, r0, r5
	str r0, [sp, #0x10]
	beq _022CB884
	bl sub_0207AE44
	mov r0, r0, lsr #0x10
	orr r0, r0, r1, lsl #16
	str r0, [sp, #0xc]
_022CB884:
	ldr r0, [r8, #0x30]
	str r0, [r8, #0x28]
	ldrb r0, [r8, #8]
	cmp r0, #4
	ldreqh r0, [r8, #0x2c]
	cmpeq r0, #0
	cmpeq r5, #0
	bne _022CB908
	cmp r6, #0
	bne _022CB90C
	bl sub_0207AE44
	mov r7, r0, lsr #0x10
	orr r7, r7, r1, lsl #16
	ldr r4, _022CB980 ; =ov00_02325078
	b _022CB8D0
_022CB8C0:
	bl ov00_022C8238
	ldrh r0, [r8, #0x2c]
	cmp r0, #0
	bne _022CB8F8
_022CB8D0:
	ldr r0, [r4, #0x48]
	blx r0
	cmp r0, #0
	beq _022CB8F8
	bl sub_0207AE44
	mov r0, r0, lsr #0x10
	orr r0, r0, r1, lsl #16
	sub r0, r0, r7
	cmp r0, #0xf
	blt _022CB8C0
_022CB8F8:
	ldrh r0, [r8, #0x2c]
	cmp r0, #0
	moveq r6, #1
	b _022CB90C
_022CB908:
	mov r6, #0
_022CB90C:
	cmp r5, sl
	addlo fp, fp, r5
	sublo sl, sl, r5
	blo _022CB934
	sub r1, r5, sl
	ldr r0, [sp, #8]
	add fp, sb, r1
	mov sb, #0
	sub sl, r0, r1
	str sb, [sp, #8]
_022CB934:
	ldr r0, _022CB980 ; =ov00_02325078
	ldr r0, [r0, #0x48]
	blx r0
	cmp r0, #0
	cmpne sl, #0
	beq _022CB974
	ldrb r0, [r8, #8]
	cmp r0, #4
	bne _022CB974
	bl sub_0207AE44
	mov r2, r0, lsr #0x10
	ldr r0, [sp, #0xc]
	orr r2, r2, r1, lsl #16
	sub r0, r2, r0
	cmp r0, #0x9f
	blt _022CB7C0
_022CB974:
	ldr r0, [sp, #0x10]
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022CB980: .word ov00_02325078
	arm_func_end ov00_022CB77C

	arm_func_start ov00_022CB984
ov00_022CB984: ; 0x022CB984
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr ip, _022CBA50 ; =_022B966C
	mov r7, r1
	ldr ip, [ip, #4]
	mov r6, r2
	ldr r4, [ip, #0xa4]
	mov r5, r3
	cmp r4, #0
	beq _022CBA48
	ldrb ip, [r4, #8]
	cmp ip, #0xa
	bne _022CB9E4
	cmp r7, #0
	beq _022CB9C4
	mov r2, r4
	bl ov00_022C93E8
_022CB9C4:
	cmp r5, #0
	beq _022CB9DC
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_022C93E8
_022CB9DC:
	add r0, r7, r5
	b _022CBA38
_022CB9E4:
	cmp ip, #0xb
	bne _022CBA1C
	cmp r7, #0
	beq _022CB9FC
	mov r2, r4
	bl ov00_022C9338
_022CB9FC:
	cmp r5, #0
	beq _022CBA14
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_022C9338
_022CBA14:
	add r0, r7, r5
	b _022CBA38
_022CBA1C:
	ldrb ip, [r4, #9]
	cmp ip, #0
	str r4, [sp]
	beq _022CBA34
	bl ov00_022D2958
	b _022CBA38
_022CBA34:
	bl ov00_022CB77C
_022CBA38:
	ldr r1, _022CBA54 ; =ov00_02325078
	ldrb r1, [r1]
	cmp r1, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
_022CBA48:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022CBA50: .word _022B966C
_022CBA54: .word ov00_02325078
	arm_func_end ov00_022CB984

	arm_func_start ov00_022CBA58
ov00_022CBA58: ; 0x022CBA58
	stmdb sp!, {r3, r4, r5, lr}
	ldr r3, _022CBAEC ; =_022B966C
	mov r2, r0
	ldr r4, [r3, #4]
	mov r3, r1
	ldr r5, [r4, #0xa4]
	cmp r5, #0
	beq _022CBAE4
	ldr r4, [r5, #0x60]
	cmp r4, #0
	beq _022CBAD4
	ldr r0, [r5, #0x5c]
	mov r1, r4
	bl ov00_022CB984
	ldr r1, [r5, #0x60]
	mov r4, r0
	cmp r4, r1
	bhs _022CBAC4
	ldr r0, [r5, #0x5c]
	sub r2, r1, r4
	add r1, r0, r4
	bl memmove
	ldr r1, [r5, #0x60]
	mov r0, #0
	sub r1, r1, r4
	str r1, [r5, #0x60]
	ldmia sp!, {r3, r4, r5, pc}
_022CBAC4:
	mov r0, #0
	str r0, [r5, #0x60]
	sub r0, r4, r1
	ldmia sp!, {r3, r4, r5, pc}
_022CBAD4:
	mov r2, #0
	mov r3, r2
	bl ov00_022CB984
	ldmia sp!, {r3, r4, r5, pc}
_022CBAE4:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022CBAEC: .word _022B966C
	arm_func_end ov00_022CBA58

	arm_func_start ov00_022CBAF0
ov00_022CBAF0: ; 0x022CBAF0
	stmdb sp!, {r3, lr}
	ldr r0, _022CBB5C ; =_022B966C
	ldr r0, [r0, #4]
	ldr r0, [r0, #0xa4]
	cmp r0, #0
	beq _022CBB54
	ldrb r1, [r0, #9]
	cmp r1, #0
	beq _022CBB1C
	bl ov00_022D28DC
	ldmia sp!, {r3, pc}
_022CBB1C:
	ldr r1, [r0, #0x44]
	cmp r1, #0
	bne _022CBB44
	ldrb r0, [r0, #8]
	cmp r0, #4
	beq _022CBB44
	add r0, r0, #0xf6
	and r0, r0, #0xff
	cmp r0, #1
	bhi _022CBB4C
_022CBB44:
	mov r0, r1
	ldmia sp!, {r3, pc}
_022CBB4C:
	mvn r0, #0
	ldmia sp!, {r3, pc}
_022CBB54:
	mov r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022CBB5C: .word _022B966C
	arm_func_end ov00_022CBAF0

	arm_func_start ov00_022CBB60
ov00_022CBB60: ; 0x022CBB60
	stmdb sp!, {r4, lr}
	ldr r0, _022CBB9C ; =_022B966C
	ldr r0, [r0, #4]
	ldr r4, [r0, #0xa4]
	cmp r4, #0
	ldrne r1, [r4, #0x60]
	cmpne r1, #0
	ldmeqia sp!, {r4, pc}
	mov r2, #0
	ldr r0, [r4, #0x5c]
	mov r3, r2
	bl ov00_022CB984
	mov r0, #0
	str r0, [r4, #0x60]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022CBB9C: .word _022B966C
	arm_func_end ov00_022CBB60

	arm_func_start ov00_022CBBA0
ov00_022CBBA0: ; 0x022CBBA0
	stmdb sp!, {r4, r5, r6, lr}
	ldr r0, _022CBC3C ; =ov00_02325078
	ldr r0, [r0, #0x18]
	blx r0
	ldr r0, _022CBC3C ; =ov00_02325078
	ldr r0, [r0, #0x50]
	cmp r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	bl ov00_022C8CA0
	mov r0, #0x64
	bl sub_02079B14
	ldr r0, _022CBC3C ; =ov00_02325078
	ldr r0, [r0, #0x50]
	bl ov00_022C8CA0
	bl sub_0207AE44
	mov r6, r0, lsr #0x10
	orr r6, r6, r1, lsl #16
	mov r5, #0x64
	ldr r4, _022CBC3C ; =ov00_02325078
	b _022CBC10
_022CBBF0:
	ldrb r0, [r4, #1]
	cmp r0, #0
	beq _022CBC08
	mov r0, #4
	bl ov00_022C8134
	ldmia sp!, {r4, r5, r6, pc}
_022CBC08:
	mov r0, r5
	bl sub_02079B14
_022CBC10:
	ldr r0, [r4, #0x48]
	blx r0
	cmp r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	bl sub_0207AE44
	mov r0, r0, lsr #0x10
	orr r0, r0, r1, lsl #16
	sub r0, r0, r6
	cmp r0, #0x17
	blt _022CBBF0
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022CBC3C: .word ov00_02325078
	arm_func_end ov00_022CBBA0

	arm_func_start ov00_022CBC40
ov00_022CBC40: ; 0x022CBC40
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	ldr r3, _022CBF90 ; =ov00_02325078
	mov r1, #0
	ldr r0, _022CBF94 ; =ov00_02325158
	mov r2, #0x64
	str r1, [r3, #0x44]
	bl MemsetFast
	ldr r1, _022CBF90 ; =ov00_02325078
	mov r3, #0x180
	ldr r0, _022CBF98 ; =ov00_02325724
	str r3, [r1, #0x11c]
	str r0, [r1, #0x120]
	ldr r2, _022CBF9C ; =ov00_023255A4
	str r3, [r1, #0x128]
	ldr r0, _022CBF94 ; =ov00_02325158
	str r2, [r1, #0x12c]
	bl ov00_022CB138
	mov sl, #1
	ldr r0, _022CBF90 ; =ov00_02325078
	mov fp, sl
	str sl, [sp]
	str sl, [r0, #0xc]
	mov r4, #0
_022CBC9C:
	mov r0, #0x3e8
	bl sub_02079B14
	ldr r0, _022CBF90 ; =ov00_02325078
	ldr r1, [r0, #0x44]
	cmp r1, #0
	bne _022CBF70
	bl sub_0207AE44
	ldr r2, _022CBF90 ; =ov00_02325078
	mov r5, r0, lsr #0x10
	ldr r0, [r2, #0x48]
	orr r5, r5, r1, lsl #16
	blx r0
	cmp r0, #0
	beq _022CBDC8
	ldr r0, [sp]
	subs r0, r0, #1
	str r0, [sp]
	bne _022CBDDC
	ldr r0, _022CBF90 ; =ov00_02325078
	ldr r1, [r0, #0x10]
	tst r1, #1
	beq _022CBD08
	cmp r4, #0
	bne _022CBDDC
	bl ov00_022CBBA0
	mov r4, #1
	b _022CBDDC
_022CBD08:
	cmp r4, #3
	addls pc, pc, r4, lsl #2
	b _022CBDDC
_022CBD14: ; jump table
	b _022CBD24 ; case 0
	b _022CBD68 ; case 1
	b _022CBD8C ; case 2
	b _022CBDDC ; case 3
_022CBD24:
	cmp fp, #0
	movne r1, #2
	strne r1, [r0, #0xc]
	movne fp, #0
	bl ov00_022CC68C
	cmp r0, #0
	beq _022CBD54
	add r0, sp, #0
	mov r1, #0
	bl ov00_022CC6E4
	cmp r0, #0
	bne _022CBD60
_022CBD54:
	bl ov00_022CBBA0
	mov r4, #3
	b _022CBDDC
_022CBD60:
	mov r4, #1
	b _022CBDDC
_022CBD68:
	add r0, sp, #0
	mov r1, #1
	bl ov00_022CC6E4
	cmp r0, #0
	bne _022CBDDC
	ldr r0, [sp]
	cmp r0, #0x3c
	movlo r4, #2
	b _022CBDDC
_022CBD8C:
	add r0, sp, #0
	mov r1, #2
	bl ov00_022CC6E4
	cmp r0, #0
	movne r4, #1
	bne _022CBDDC
	ldr r0, [sp]
	cmp r0, #0x3c
	bhs _022CBDDC
	mov r0, #3
	bl ov00_022C8134
	mov sl, #1
	str sl, [sp]
	mov r4, #0
	b _022CBDDC
_022CBDC8:
	mov r0, #1
	bl ov00_022C8134
	mov sl, #1
	str sl, [sp]
	mov r4, #0
_022CBDDC:
	mov r3, #0
	ldr r6, _022CBFA0 ; =ov00_023250F8
	ldr r1, _022CBFA4 ; =0x000003BD
	mov r2, r3
_022CBDEC:
	ldr r0, [r6]
	cmp r0, #0
	beq _022CBE0C
	ldrh r0, [r6, #0xa]
	sub r0, r5, r0
	mov r0, r0, lsl #0x10
	cmp r1, r0, asr #16
	strlt r2, [r6]
_022CBE0C:
	add r3, r3, #1
	cmp r3, #8
	add r6, r6, #0xc
	blt _022CBDEC
	ldr r0, _022CBF90 ; =ov00_02325078
	ldr r0, [r0, #0x2c]
	cmp r0, #0
	beq _022CBE3C
	subs sl, sl, #1
	bne _022CBE3C
	bl ov00_022C8CA0
	mov sl, #0x69
_022CBE3C:
	ldr r0, _022CBFA8 ; =_022B966C
	ldr sb, [r0, #8]
	cmp sb, #0
	beq _022CBF04
	mov r6, #0
	mov r7, r6
	mov r8, #1
_022CBE58:
	ldr r0, [sb, #0xa4]
	cmp r0, #0
	ldrne r1, [r0]
	cmpne r1, #0
	beq _022CBEF8
	ldrb r1, [r0, #8]
	cmp r1, #3
	bne _022CBEA0
	ldr r2, [r0, #0x10]
	sub r2, r5, r2
	cmp r2, #0x27
	ble _022CBEA0
	strb r8, [r0, #8]
	ldrh r1, [r0, #0x1a]
	strh r1, [r0, #0x18]
	ldr r1, [r0, #0x20]
	str r1, [r0, #0x1c]
	b _022CBEF8
_022CBEA0:
	cmp r1, #2
	bne _022CBED8
	ldr r2, [r0, #0x10]
	sub r2, r5, r2
	cmp r2, #0x27
	ble _022CBED8
	ldr r1, [r0, #4]
	cmp r1, #1
	bne _022CBEF8
	strb r7, [r0, #8]
	str r7, [r0, #4]
	ldr r0, [r0]
	bl OS_WakeupThreadDirect
	b _022CBEF8
_022CBED8:
	cmp r1, #4
	beq _022CBEF8
	ldr r1, [r0, #4]
	cmp r1, #2
	bne _022CBEF8
	str r6, [r0, #4]
	ldr r0, [r0]
	bl OS_WakeupThreadDirect
_022CBEF8:
	ldr sb, [sb, #0x68]
	cmp sb, #0
	bne _022CBE58
_022CBF04:
	mov sb, #0
	ldr r8, _022CBFAC ; =ov00_023253A0
	ldr r6, _022CBF90 ; =ov00_02325078
	mov r7, sb
_022CBF14:
	ldrh r0, [r8, #4]
	cmp r0, #0
	beq _022CBF40
	ldr r0, [r8, #0x2c]
	sub r0, r5, r0
	cmp r0, #0xef
	ble _022CBF40
	ldr r0, [r8, #0x34]
	ldr r1, [r6, #0x40]
	blx r1
	strh r7, [r8, #4]
_022CBF40:
	add sb, sb, #1
	cmp sb, #8
	add r8, r8, #0x38
	blt _022CBF14
	mov r0, r5
	bl ov00_022D2B74
	ldr r0, _022CBF90 ; =ov00_02325078
	ldr r0, [r0, #0x3c]
	cmp r0, #0
	beq _022CBC9C
	blx r0
	b _022CBC9C
_022CBF70:
	ldr r0, [r0, #0x10]
	tst r0, #1
	bne _022CBF88
	cmp r4, #3
	beq _022CBF88
	bl ov00_022CC7E0
_022CBF88:
	bl ov00_022CB14C
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022CBF90: .word ov00_02325078
_022CBF94: .word ov00_02325158
_022CBF98: .word ov00_02325724
_022CBF9C: .word ov00_023255A4
_022CBFA0: .word ov00_023250F8
_022CBFA4: .word 0x000003BD
_022CBFA8: .word _022B966C
_022CBFAC: .word ov00_023253A0
	arm_func_end ov00_022CBC40

	arm_func_start ov00_022CBFB0
ov00_022CBFB0: ; 0x022CBFB0
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r5, r1
	mov r4, r2
	mov r1, #0
	mov r2, #0xec
	mov r6, r0
	bl MemsetFast
	ldr r0, _022CC120 ; =0x00000101
	mov r1, #6
	strh r0, [r6]
	ldr r0, _022CC124 ; =ov00_02325078
	strb r1, [r6, #2]
	ldr r3, [r0, #0x70]
	ldr r2, [r0, #0x68]
	ldr r1, [r0, #0x6c]
	umull lr, ip, r3, r2
	mla ip, r3, r1, ip
	ldr r1, [r0, #0x74]
	ldr r7, [r0, #0x78]
	mla ip, r1, r2, ip
	ldr r3, [r0, #0x7c]
	adds r7, r7, lr
	adc r1, r3, ip
	str r7, [r0, #0x68]
	str r1, [r0, #0x6c]
	mov r0, r1, lsr #0x10
	mov r0, r0, lsl #0x10
	mov r3, r0, lsr #0x10
	cmp r4, #0
	mov r2, r3, lsl #8
	mov r0, r1, lsl #0x10
	strne r1, [r4]
	mov r1, r0, lsr #0x10
	orr r2, r2, r3, asr #8
	mov r0, r1, lsl #8
	strh r2, [r6, #4]
	orr r0, r0, r1, asr #8
	strh r0, [r6, #6]
	ldr r2, _022CC124 ; =ov00_02325078
	ldr r0, _022CC128 ; =ov00_02325560
	ldr r1, [r2, #0x50]
	mov r1, r1, lsr #0x10
	mov r1, r1, lsl #0x10
	mov r3, r1, lsr #0x10
	mov r1, r3, lsl #8
	orr r1, r1, r3, asr #8
	strh r1, [r6, #0xc]
	ldr r2, [r2, #0x50]
	add r1, r6, #0x1c
	mov r2, r2, lsl #0x10
	mov r3, r2, lsr #0x10
	mov r2, r3, lsl #8
	orr r3, r2, r3, asr #8
	mov r2, #6
	strh r3, [r6, #0xe]
	bl MemcpyFast
	ldr r0, _022CC12C ; =0x00008263
	ldr r1, _022CC130 ; =0x00006353
	strh r0, [r6, #0xec]
	strh r1, [r6, #0xee]
	ldr r0, _022CC134 ; =0x00000135
	mov r1, #7
	strh r0, [r6, #0xf0]
	strb r5, [r6, #0xf2]
	mov r0, #0x3d
	strb r0, [r6, #0xf3]
	strb r1, [r6, #0xf4]
	mov r3, #1
	ldr r0, _022CC128 ; =ov00_02325560
	add r1, r6, #0xf6
	mov r2, #6
	strb r3, [r6, #0xf5]
	bl MemcpyFast
	mov r1, #0xc
	strb r1, [r6, #0xfc]
	mov r2, #0xa
	ldr r0, _022CC138 ; =ov00_0231885C
	add r1, r6, #0xfe
	strb r2, [r6, #0xfd]
	bl MemcpyFast
	mov r1, #0x37
	strb r1, [r6, #0x108]
	mov r2, #3
	add r0, r6, #0xd
	strb r2, [r6, #0x109]
	mov r1, #1
	strb r1, [r6, #0x10a]
	strb r2, [r6, #0x10b]
	mov r1, #6
	strb r1, [r6, #0x10c]
	add r0, r0, #0x100
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022CC120: .word 0x00000101
_022CC124: .word ov00_02325078
_022CC128: .word ov00_02325560
_022CC12C: .word 0x00008263
_022CC130: .word 0x00006353
_022CC134: .word 0x00000135
_022CC138: .word ov00_0231885C
	arm_func_end ov00_022CBFB0

	arm_func_start ov00_022CC13C
ov00_022CC13C: ; 0x022CC13C
	stmdb sp!, {r3, r4, r5, lr}
	mov ip, r0
	mov r5, r2
	cmp r3, r1
	bhs _022CC168
	sub r4, r1, r3
	mov r0, r5
	mov r1, ip
	mov r2, r4
	bl MemsetFast
	add r5, r5, r4
_022CC168:
	mov r0, r5
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022CC13C

	arm_func_start ov00_022CC170
ov00_022CC170: ; 0x022CC170
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #4
	ldr r4, _022CC22C ; =ov00_023255CE
	add r2, sp, #0
	mov r0, r4
	mov r1, #1
	bl ov00_022CBFB0
	ldr r1, _022CC230 ; =ov00_02325078
	mov ip, r0
	ldr r0, [r1, #0x34]
	cmp r0, #0
	beq _022CC1F4
	mov r0, #0x32
	strb r0, [ip]
	mov r0, #4
	strb r0, [ip, #1]
	ldr r0, [r1, #0x34]
	mov r0, r0, lsr #0x10
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	mov r0, r0, asr #8
	strb r0, [ip, #2]
	ldr r0, [r1, #0x34]
	mov r0, r0, lsr #0x10
	strb r0, [ip, #3]
	ldr r0, [r1, #0x34]
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	mov r0, r0, asr #8
	strb r0, [ip, #4]
	ldr r0, [r1, #0x34]
	strb r0, [ip, #5]
	add ip, ip, #6
_022CC1F4:
	add r2, ip, #1
	mov lr, #0xff
	sub r3, r2, r4
	mov r0, #0
	mov r1, #0x12c
	strb lr, [ip]
	bl ov00_022CC13C
	mov r1, r0
	mov r0, r4
	sub r1, r1, r4
	bl ov00_022CBA58
	ldr r0, [sp]
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
	.align 2, 0
_022CC22C: .word ov00_023255CE
_022CC230: .word ov00_02325078
	arm_func_end ov00_022CC170

	arm_func_start ov00_022CC234
ov00_022CC234: ; 0x022CC234
	stmdb sp!, {r3, r4, r5, lr}
	ldr r4, _022CC334 ; =ov00_023255CE
	mov r5, r0
	add r2, sp, #0
	mov r0, r4
	mov r1, #3
	bl ov00_022CBFB0
	mov ip, r0
	cmp r5, #0
	bne _022CC300
	mov r0, #0x32
	strb r0, [ip]
	mov r0, #4
	ldr r2, _022CC338 ; =ov00_02325078
	strb r0, [ip, #1]
	ldr r1, [r2, #0x34]
	mov r3, #0x36
	mov r1, r1, lsr #0x10
	mov r1, r1, lsl #0x10
	mov r1, r1, lsr #0x10
	mov r1, r1, asr #8
	strb r1, [ip, #2]
	ldr r1, [r2, #0x34]
	mov r1, r1, lsr #0x10
	strb r1, [ip, #3]
	ldr r1, [r2, #0x34]
	mov r1, r1, lsl #0x10
	mov r1, r1, lsr #0x10
	mov r1, r1, asr #8
	strb r1, [ip, #4]
	ldr r1, [r2, #0x34]
	strb r1, [ip, #5]
	strb r3, [ip, #6]
	strb r0, [ip, #7]
	ldr r0, [r2, #0x20]
	mov r0, r0, lsr #0x10
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	mov r0, r0, asr #8
	strb r0, [ip, #8]
	ldr r0, [r2, #0x20]
	mov r0, r0, lsr #0x10
	strb r0, [ip, #9]
	ldr r0, [r2, #0x20]
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	mov r0, r0, asr #8
	strb r0, [ip, #0xa]
	ldr r0, [r2, #0x20]
	strb r0, [ip, #0xb]
	add ip, ip, #0xc
_022CC300:
	add r2, ip, #1
	mov lr, #0xff
	sub r3, r2, r4
	mov r0, #0
	mov r1, #0x12c
	strb lr, [ip]
	bl ov00_022CC13C
	mov r1, r0
	mov r0, r4
	sub r1, r1, r4
	bl ov00_022CBA58
	ldr r0, [sp]
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022CC334: .word ov00_023255CE
_022CC338: .word ov00_02325078
	arm_func_end ov00_022CC234

	arm_func_start ov00_022CC33C
ov00_022CC33C: ; 0x022CC33C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #8
	add r1, r1, #1
	str r0, [sp]
	rsb fp, r1, r1, lsl #4
	bl sub_0207AE44
	mov r4, r0, lsr #0x10
	orr r4, r4, r1, lsl #16
	mov r5, #0
	b _022CC644
_022CC364:
	bl ov00_022CBAF0
	cmp r0, #0
	bne _022CC378
	bl ov00_022C8238
	b _022CC644
_022CC378:
	add r0, sp, #4
	bl ov00_022CB550
	ldr r1, [sp, #4]
	mov r6, r0
	cmp r1, #0xf0
	bls _022CC63C
	ldrb r0, [r6]
	cmp r0, #2
	bne _022CC63C
	ldrh r3, [r6, #6]
	ldrh r2, [r6, #4]
	mov r0, r3, lsl #8
	mov r1, r2, lsl #8
	orr r2, r1, r2, asr #8
	orr r1, r0, r3, asr #8
	mov r0, r2, lsl #0x10
	mov r1, r1, lsl #0x10
	mov r2, r0, lsr #0x10
	mov r0, r1, lsr #0x10
	orr r1, r0, r2, lsl #16
	ldr r0, [sp]
	cmp r0, r1
	bne _022CC63C
	ldr r1, _022CC684 ; =ov00_02325560
	add r0, r6, #0x1c
	bl ov00_022C87F8
	cmp r0, #0
	bne _022CC63C
	ldrb r3, [r6, #0x10]
	ldrb r2, [r6, #0x11]
	ldrb r1, [r6, #0x12]
	ldrb r0, [r6, #0x13]
	orr r3, r2, r3, lsl #8
	ldrb r2, [r6, #0xec]
	orr r1, r0, r1, lsl #8
	mov r0, r3, lsl #0x10
	mov r1, r1, lsl #0x10
	mov r5, r0, lsr #0x10
	mov r0, r1, lsr #0x10
	cmp r2, #0x63
	orr r2, r0, r5, lsl #16
	ldreqb r0, [r6, #0xed]
	ldr r3, [sp, #4]
	mov r5, #3
	cmpeq r0, #0x82
	ldreqb r0, [r6, #0xee]
	add r1, r6, r3
	cmpeq r0, #0x53
	ldreqb r0, [r6, #0xef]
	addeq r3, r6, #0xf0
	cmpeq r0, #0x63
	bne _022CC63C
	mov r0, #0
	mov sb, #2
	mov sl, #1
	ldr ip, _022CC688 ; =ov00_02325078
	b _022CC628
_022CC45C:
	cmp r6, #0
	beq _022CC628
	cmp r6, #0x33
	bgt _022CC498
	bge _022CC590
	cmp r6, #6
	bgt _022CC61C
	cmp r6, #1
	blt _022CC61C
	beq _022CC4B4
	cmp r6, #3
	beq _022CC4E8
	cmp r6, #6
	beq _022CC51C
	b _022CC61C
_022CC498:
	cmp r6, #0x35
	bgt _022CC4A8
	beq _022CC5C4
	b _022CC61C
_022CC4A8:
	cmp r6, #0x36
	beq _022CC5EC
	b _022CC61C
_022CC4B4:
	ldrb lr, [r3, #1]
	ldrb r8, [r3, #2]
	ldrb r7, [r3, #3]
	ldrb r6, [r3, #4]
	orr r8, r8, lr, lsl #8
	mov r8, r8, lsl #0x10
	orr r6, r6, r7, lsl #8
	mov r6, r6, lsl #0x10
	mov r7, r8, lsr #0x10
	mov r6, r6, lsr #0x10
	orr r6, r6, r7, lsl #16
	str r6, [ip, #0x1c]
	b _022CC61C
_022CC4E8:
	ldrb lr, [r3, #1]
	ldrb r8, [r3, #2]
	ldrb r7, [r3, #3]
	ldrb r6, [r3, #4]
	orr r8, r8, lr, lsl #8
	mov r8, r8, lsl #0x10
	orr r6, r6, r7, lsl #8
	mov r6, r6, lsl #0x10
	mov r7, r8, lsr #0x10
	mov r6, r6, lsr #0x10
	orr r6, r6, r7, lsl #16
	str r6, [ip, #0x2c]
	b _022CC61C
_022CC51C:
	ldrb r6, [r3]
	cmp r6, #8
	strlo r0, [ip, #0x64]
	blo _022CC55C
	ldrb lr, [r3, #5]
	ldrb r8, [r3, #6]
	ldrb r7, [r3, #7]
	ldrb r6, [r3, #8]
	orr r8, r8, lr, lsl #8
	mov r8, r8, lsl #0x10
	orr r6, r6, r7, lsl #8
	mov r6, r6, lsl #0x10
	mov r7, r8, lsr #0x10
	mov r6, r6, lsr #0x10
	orr r6, r6, r7, lsl #16
	str r6, [ip, #0x64]
_022CC55C:
	ldrb lr, [r3, #1]
	ldrb r8, [r3, #2]
	ldrb r7, [r3, #3]
	ldrb r6, [r3, #4]
	orr r8, r8, lr, lsl #8
	mov r8, r8, lsl #0x10
	orr r6, r6, r7, lsl #8
	mov r6, r6, lsl #0x10
	mov r7, r8, lsr #0x10
	mov r6, r6, lsr #0x10
	orr r6, r6, r7, lsl #16
	str r6, [ip, #0x60]
	b _022CC61C
_022CC590:
	ldrb lr, [r3, #1]
	ldrb r8, [r3, #2]
	ldrb r7, [r3, #3]
	ldrb r6, [r3, #4]
	orr r8, r8, lr, lsl #8
	mov r8, r8, lsl #0x10
	orr r6, r6, r7, lsl #8
	mov r6, r6, lsl #0x10
	mov r7, r8, lsr #0x10
	mov r6, r6, lsr #0x10
	orr r6, r6, r7, lsl #16
	str r6, [ip, #0x4c]
	b _022CC61C
_022CC5C4:
	ldrb r6, [r3, #1]
	cmp r6, #2
	beq _022CC5E0
	cmp r6, #5
	moveq r5, sb
	streq r2, [ip, #0x50]
	b _022CC61C
_022CC5E0:
	mov r5, sl
	str r2, [ip, #0x34]
	b _022CC61C
_022CC5EC:
	ldrb r8, [r3, #1]
	ldrb r7, [r3, #2]
	ldrb r6, [r3, #3]
	ldrb lr, [r3, #4]
	orr r7, r7, r8, lsl #8
	mov r7, r7, lsl #0x10
	orr r6, lr, r6, lsl #8
	mov r6, r6, lsl #0x10
	mov r7, r7, lsr #0x10
	mov r6, r6, lsr #0x10
	orr r6, r6, r7, lsl #16
	str r6, [ip, #0x20]
_022CC61C:
	ldrb r6, [r3]
	add r6, r6, #1
	add r3, r3, r6
_022CC628:
	cmp r3, r1
	bhs _022CC63C
	ldrb r6, [r3], #1
	cmp r6, #0xff
	bne _022CC45C
_022CC63C:
	ldr r0, [sp, #4]
	bl ov00_022CB644
_022CC644:
	ldr r0, _022CC688 ; =ov00_02325078
	ldr r0, [r0, #0x48]
	blx r0
	cmp r0, #0
	beq _022CC678
	cmp r5, #0
	bne _022CC678
	bl sub_0207AE44
	mov r0, r0, lsr #0x10
	orr r0, r0, r1, lsl #16
	sub r0, r0, r4
	cmp r0, fp
	blt _022CC364
_022CC678:
	mov r0, r5
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022CC684: .word ov00_02325560
_022CC688: .word ov00_02325078
	arm_func_end ov00_022CC33C

	arm_func_start ov00_022CC68C
ov00_022CC68C: ; 0x022CC68C
	stmdb sp!, {r3, r4, r5, lr}
	bl ov00_022CB1F0
	bl ov00_022CB164
	mov r1, #0x43
	sub r2, r1, #0x44
	mov r0, #0x44
	bl ov00_022CB190
	mov r5, #0
_022CC6AC:
	bl ov00_022CC170
	mov r1, r5
	bl ov00_022CC33C
	mov r4, r0
	cmp r4, #1
	beq _022CC6D0
	add r5, r5, #1
	cmp r5, #4
	blt _022CC6AC
_022CC6D0:
	bl ov00_022CB224
	cmp r4, #1
	moveq r0, #1
	movne r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022CC68C

	arm_func_start ov00_022CC6E4
ov00_022CC6E4: ; 0x022CC6E4
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r4, r1
	mov r5, r0
	bl ov00_022CB1F0
	bl ov00_022CB164
	cmp r4, #1
	mov r0, #0x44
	bne _022CC718
	ldr r1, _022CC7DC ; =ov00_02325078
	ldr r2, [r1, #0x20]
	mov r1, #0x43
	bl ov00_022CB190
	b _022CC724
_022CC718:
	mov r1, #0x43
	sub r2, r1, #0x44
	bl ov00_022CB190
_022CC724:
	mov r7, #0
_022CC728:
	mov r0, r4
	bl ov00_022CC234
	mov r1, r7
	bl ov00_022CC33C
	movs r6, r0
	bne _022CC74C
	add r7, r7, #1
	cmp r7, #4
	blt _022CC728
_022CC74C:
	bl ov00_022CB224
	cmp r6, #2
	bne _022CC780
	ldr r1, _022CC7DC ; =ov00_02325078
	mov r0, #1
	ldr r2, [r1, #0x4c]
	mov r2, r2, lsr #1
	str r2, [r5]
	ldr r2, [r1, #0x4c]
	add r2, r2, r2, lsl #1
	mov r2, r2, lsr #3
	str r2, [r1, #0x38]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022CC780:
	ldr r0, _022CC7DC ; =ov00_02325078
	cmp r4, #1
	ldr r1, [r0, #0x38]
	mov r1, r1, lsr #1
	str r1, [r0, #0x38]
	str r1, [r5]
	beq _022CC7A8
	cmp r4, #2
	beq _022CC7C8
	b _022CC7D4
_022CC7A8:
	cmp r1, #0x3c
	bhs _022CC7D4
	mov r1, #1
	str r1, [r5]
	ldr r1, [r0, #0x4c]
	mov r1, r1, lsr #3
	str r1, [r0, #0x38]
	b _022CC7D4
_022CC7C8:
	cmp r1, #0x3c
	movlo r0, #1
	strlo r0, [r5]
_022CC7D4:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022CC7DC: .word ov00_02325078
	arm_func_end ov00_022CC6E4

	arm_func_start ov00_022CC7E0
ov00_022CC7E0: ; 0x022CC7E0
	stmdb sp!, {r4, lr}
	bl ov00_022CB1F0
	bl ov00_022CB164
	ldr r1, _022CC844 ; =ov00_02325078
	mov r0, #0x44
	ldr r2, [r1, #0x20]
	mov r1, #0x43
	bl ov00_022CB190
	ldr r4, _022CC848 ; =ov00_023255CE
	mov r1, #7
	mov r0, r4
	mov r2, #0
	bl ov00_022CBFB0
	mov r1, #0xff
	add r2, r0, #1
	strb r1, [r0]
	mov r0, #0
	mov r1, #0x12c
	sub r3, r2, r4
	bl ov00_022CC13C
	sub r1, r0, r4
	mov r0, r4
	bl ov00_022CBA58
	bl ov00_022CB224
	ldmia sp!, {r4, pc}
	.align 2, 0
_022CC844: .word ov00_02325078
_022CC848: .word ov00_023255CE
	arm_func_end ov00_022CC7E0

	arm_func_start ov00_022CC84C
ov00_022CC84C: ; 0x022CC84C
	ldrb r2, [r0], #1
	cmp r2, #0
	bxeq lr
_022CC858:
	and r1, r2, #0xc0
	cmp r1, #0xc0
	addeq r0, r0, #1
	bxeq lr
	add r0, r0, r2
	ldrb r2, [r0], #1
	cmp r2, #0
	bne _022CC858
	bx lr
	arm_func_end ov00_022CC84C

	arm_func_start ov00_022CC87C
ov00_022CC87C: ; 0x022CC87C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x40
	mov sb, r2
	mov r2, sb, lsl #8
	mov sl, r1
	orr r1, r2, sb, asr #8
	strh r1, [sp, #4]
	cmp sl, #0x20
	mov r6, #0
	movne r1, #1
	strneh r1, [sp, #6]
	ldreq r1, _022CCB1C ; =0x00001001
	strh r6, [sp, #0xa]
	streqh r1, [sp, #6]
	mov r1, #0x100
	strh r1, [sp, #8]
	add r1, sp, #0x10
	strh r6, [sp, #0xc]
	strh r6, [sp, #0xe]
	str r6, [sp]
	ldrb r7, [r0], #1
	mov fp, r3
	ldr r8, [sp, #0x68]
	add r2, r1, #1
	cmp r7, #0
	beq _022CC944
	mov r4, r6
	add r5, sp, #4
	mov r3, r6
_022CC8F0:
	cmp r7, #0x2e
	beq _022CC920
	sub r6, r2, r5
	cmp r6, #0x3c
	addge sp, sp, #0x40
	mvnge r0, #0
	ldmgeia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r6, r4, #1
	mov r4, r6
	str r6, [sp]
	strb r7, [r2], #1
	b _022CC938
_022CC920:
	strb r6, [r1]
	mov r1, r2
	mov r4, r3
	mov r6, r3
	str r3, [sp]
	add r2, r2, #1
_022CC938:
	ldrb r7, [r0], #1
	cmp r7, #0
	bne _022CC8F0
_022CC944:
	ldr r0, [sp]
	mov r3, #0
	strb r0, [r1]
	strb r3, [r2]
	mov r0, sl, lsr #8
	strb r0, [r2, #1]
	strb sl, [r2, #2]
	strb r3, [r2, #3]
	mov r3, #1
	add r0, sp, #4
	add r1, r2, #5
	sub r1, r1, r0
	strb r3, [r2, #4]
	bl ov00_022CBA58
	mov r4, #0
	bl sub_0207AE44
	mov r5, r0, lsr #0x10
	orr r5, r5, r1, lsl #16
	b _022CCADC
_022CC990:
	bl ov00_022CBAF0
	cmp r0, #0
	bne _022CC9A4
	bl ov00_022C8238
	b _022CCADC
_022CC9A4:
	add r0, sp, #0
	bl ov00_022CB550
	ldr r1, [sp]
	cmp r1, #0xc
	bls _022CCAD4
	ldrh r3, [r0]
	mov r2, r3, lsl #8
	orr r2, r2, r3, asr #8
	mov r2, r2, lsl #0x10
	cmp sb, r2, lsr #16
	bne _022CCAD4
	ldrb r2, [r0, #3]
	and r2, r2, #0xf
	cmp r2, #3
	mvneq r4, #0
	beq _022CCAD4
	cmp r2, #0
	bne _022CCAD4
	ldrb r3, [r0, #4]
	ldrb r2, [r0, #5]
	add r6, r0, r1
	add r0, r0, #0xc
	orr r1, r2, r3, lsl #8
	mov r1, r1, lsl #0x10
	movs r1, r1, lsr #0x10
	sub r7, r1, #1
	beq _022CCA24
_022CCA10:
	bl ov00_022CC84C
	cmp r7, #0
	add r0, r0, #4
	sub r7, r7, #1
	bne _022CCA10
_022CCA24:
	cmp r0, r6
	bhs _022CCAD4
_022CCA2C:
	bl ov00_022CC84C
	ldrb r7, [r0, #8]
	ldrb r1, [r0, #9]
	ldrb r3, [r0]
	ldrb r2, [r0, #1]
	orr r1, r1, r7, lsl #8
	mov r1, r1, lsl #0x10
	orr r2, r2, r3, lsl #8
	mov r2, r2, lsl #0x10
	cmp sl, r2, lsr #16
	mov r2, r1, lsr #0x10
	bne _022CCAC4
	cmp sl, #0xc
	beq _022CCAA4
	add r4, r0, #8
	add r0, r0, #6
	add r6, r4, r2
	add r1, r0, r2
	ldrb r3, [r0, r2]
	ldrb r0, [r1, #1]
	ldrb r2, [r4, r2]
	ldrb r1, [r6, #1]
	orr r0, r0, r3, lsl #8
	mov r0, r0, lsl #0x10
	orr r1, r1, r2, lsl #8
	mov r1, r1, lsl #0x10
	mov r2, r0, lsr #0x10
	mov r0, r1, lsr #0x10
	orr r4, r0, r2, lsl #16
	b _022CCAD4
_022CCAA4:
	cmp r2, r8
	movhi r4, #2
	bhi _022CCAD4
	mov r1, fp
	add r0, r0, #0xa
	bl MemcpyFast
	mov r4, #1
	b _022CCAD4
_022CCAC4:
	add r1, r2, #0xa
	add r0, r0, r1
	cmp r0, r6
	blo _022CCA2C
_022CCAD4:
	ldr r0, [sp]
	bl ov00_022CB644
_022CCADC:
	ldr r0, _022CCB20 ; =ov00_02325078
	ldr r0, [r0, #0x48]
	blx r0
	cmp r0, #0
	beq _022CCB10
	cmp r4, #0
	bne _022CCB10
	bl sub_0207AE44
	mov r0, r0, lsr #0x10
	orr r0, r0, r1, lsl #16
	sub r0, r0, r5
	cmp r0, #0xf
	blt _022CC990
_022CCB10:
	mov r0, r4
	add sp, sp, #0x40
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022CCB1C: .word 0x00001001
_022CCB20: .word ov00_02325078
	arm_func_end ov00_022CC87C

	arm_func_start ov00_022CCB24
ov00_022CCB24: ; 0x022CCB24
	str r0, [r1]
	mov ip, #0
	mov r2, #0xa
_022CCB30:
	ldrb r3, [r0]
	sub r3, r3, #0x30
	and r3, r3, #0xff
	cmp r3, #9
	mlals ip, r2, ip, r3
	addls r0, r0, #1
	strls r0, [r1]
	bls _022CCB30
	mov r0, ip
	bx lr
	arm_func_end ov00_022CCB24

	arm_func_start ov00_022CCB58
ov00_022CCB58: ; 0x022CCB58
	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
	sub sp, sp, #4
	mov r5, #0
	mov r8, r0
	mov r7, r1
	mov r6, r5
	add r4, sp, #0
_022CCB74:
	mov r0, r8
	mov r1, r4
	bl ov00_022CCB24
	ldr r2, [sp]
	cmp r8, r2
	addeq sp, sp, #4
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	mov r8, r2
	cmp r0, #0xff
	bhi _022CCBC8
	cmp r6, #3
	ldrneb r1, [r2]
	addne r8, r2, #1
	cmpne r1, #0x2e
	bne _022CCBC8
	cmp r6, #3
	bne _022CCBD4
	ldrb r1, [r8]
	cmp r1, #0
	beq _022CCBD4
_022CCBC8:
	add sp, sp, #4
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022CCBD4:
	add r6, r6, #1
	cmp r6, #4
	orr r5, r0, r5, lsl #8
	blt _022CCB74
	str r5, [r7]
	mov r0, #1
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022CCB58

	arm_func_start ov00_022CCBF4
ov00_022CCBF4: ; 0x022CCBF4
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #4
	movs r5, r1
	mov r6, r0
	mov r4, r2
	addeq sp, sp, #4
	mvneq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	bl ov00_022CB1F0
	bl ov00_022CB164
	mov r2, r5
	mov r0, #0
	mov r1, #0x35
	bl ov00_022CB190
	mov r0, r6
	mov r2, r4
	mov r3, #0
	str r3, [sp]
	mov r1, #1
	bl ov00_022CC87C
	mov r4, r0
	bl ov00_022CB224
	mov r0, r4
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, pc}
	arm_func_end ov00_022CCBF4

	arm_func_start ov00_022CCC58
ov00_022CCC58: ; 0x022CCC58
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0xc
	ldr r2, _022CCD88 ; =ov00_02325078
	mov r6, #0
	ldr r5, [r2, #0x70]
	ldr r3, [r2, #0x68]
	ldr r1, [r2, #0x6c]
	umull r8, r7, r5, r3
	ldr sb, [r2, #0x78]
	mla r7, r5, r1, r7
	ldr r4, [r2, #0x74]
	adds fp, sb, r8
	mla r7, r4, r3, r7
	ldr r8, [r2, #0x7c]
	umull r3, r1, r5, fp
	adc sl, r8, r7
	mla r1, r5, sl, r1
	str fp, [r2, #0x68]
	mov r7, r6, lsl #0x10
	adds r5, sb, r3
	mla r1, r4, fp, r1
	str sl, [r2, #0x6c]
	orr r7, r7, sl, lsr #16
	adc r4, r8, r1
	mov r3, r6, lsl #0x10
	str r5, [r2, #0x68]
	orr r3, r3, r4, lsr #16
	add r1, sp, #8
	mov sl, r0
	strh r7, [sp, #2]
	str r4, [r2, #0x6c]
	strh r3, [sp, #4]
	bl ov00_022CCB58
	cmp r0, #0
	ldrne r0, [sp, #8]
	addne sp, sp, #0xc
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r0, #1
	mov fp, r6
	ldr r7, _022CCD8C ; =ov00_023250D8
	strb r0, [sp]
	strb r0, [sp, #1]
	add r6, sp, #2
	mov r5, fp
	mvn r4, #0
_022CCD0C:
	mov r8, #0
	add sb, sp, #0
_022CCD14:
	ldrb r0, [sb]
	cmp r0, #0
	beq _022CCD4C
	mov r0, r8, lsl #1
	ldrh r2, [r6, r0]
	ldr r1, [r7, r8, lsl #2]
	mov r0, sl
	bl ov00_022CCBF4
	cmp r0, #0
	str r0, [sp, #8]
	cmpne r0, r4
	bne _022CCD68
	cmp r0, r4
	streqb r5, [sb]
_022CCD4C:
	add r8, r8, #1
	cmp r8, #2
	add sb, sb, #1
	blt _022CCD14
	add fp, fp, #1
	cmp fp, #3
	blt _022CCD0C
_022CCD68:
	ldr r1, [sp, #8]
	mvn r0, #0
	cmp r1, r0
	moveq r0, #0
	streq r0, [sp, #8]
	ldr r0, [sp, #8]
	add sp, sp, #0xc
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022CCD88: .word ov00_02325078
_022CCD8C: .word ov00_023250D8
	arm_func_end ov00_022CCC58

	arm_func_start ov00_022CCD90
ov00_022CCD90: ; 0x022CCD90
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r0, _022CCDC4 ; =_02000BF4
	bl OSi_ReferSymbol
	ldr r0, _022CCDC8 ; =ov00_02318868
	ldr r1, [r0]
	cmp r1, #0
	movne r0, #0
	ldmneia sp!, {r4, pc}
	str r4, [r0]
	bl ov00_022CCE0C
	bl ov00_022CCDCC
	ldmia sp!, {r4, pc}
	.align 2, 0
_022CCDC4: .word _02000BF4
_022CCDC8: .word ov00_02318868
	arm_func_end ov00_022CCD90

	arm_func_start ov00_022CCDCC
ov00_022CCDCC: ; 0x022CCDCC
	stmdb sp!, {r4, lr}
	ldr r0, _022CCE00 ; =ov00_02318868
	ldr r0, [r0]
	ldr r0, [r0, #0x20]
	bl ov00_022CD004
	movs r4, r0
	bmi _022CCDF8
	ldr r0, _022CCE04 ; =ov00_023188A0
	bl ov00_022CD338
	ldr r1, _022CCE08 ; =ov00_023268C0
	str r0, [r1, #0xc]
_022CCDF8:
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022CCE00: .word ov00_02318868
_022CCE04: .word ov00_023188A0
_022CCE08: .word ov00_023268C0
	arm_func_end ov00_022CCDCC

	arm_func_start ov00_022CCE0C
ov00_022CCE0C: ; 0x022CCE0C
	stmdb sp!, {r3, r4, r5, lr}
	ldr r0, _022CCF40 ; =ov00_02318868
	ldr r4, _022CCF44 ; =ov00_023268D0
	ldr r5, [r0]
	mov r0, r4
	mov r1, #0
	mov r2, #0x30
	bl MemsetFast
	ldr r1, [r5, #0x18]
	ldr r0, _022CCF48 ; =ov00_023268C0
	ldr r2, _022CCF4C ; =ov00_022CCFEC
	str r1, [r0, #0x14]
	ldr r3, [r5, #0x1c]
	mov r1, #0
	str r3, [r0, #0x18]
	str r2, [r0, #0x20]
	str r1, [r0, #0x24]
	str r1, [r0, #0x28]
	ldr r1, [r0]
	str r1, [r0, #0x3c]
	ldr r0, [r5, #0x24]
	cmp r0, #0
	moveq r0, #0x4000
	str r0, [r4, #0x20]
	ldr r0, [r5, #0x28]
	cmp r0, #0
	bne _022CCE8C
	ldr r1, _022CCF40 ; =ov00_02318868
	ldr r0, [r4, #0x20]
	ldr r1, [r1]
	ldr r1, [r1, #0x18]
	blx r1
_022CCE8C:
	str r0, [r4, #0x1c]
	ldr r1, [r5, #0x30]
	ldr lr, [r5, #0x34]
	cmp r1, #0
	moveq r1, #0x240
	sub ip, r1, #0x28
	cmp lr, #0
	moveq lr, #0x10c0
	ldr r2, _022CCF50 ; =ov00_02318888
	add r0, lr, lr, lsr #31
	ldr r1, _022CCF54 ; =ov00_023250C8
	mov r3, #0
	strh lr, [r2, #2]
	mov r0, r0, asr #1
	strh r0, [r2, #4]
	str ip, [r4, #0x24]
	str r3, [r1]
	ldr r0, [r5]
	mov r2, #1
	cmp r0, #0
	beq _022CCF00
	ldr r1, _022CCF58 ; =ov00_022CCFD4
	ldr r0, _022CCF48 ; =ov00_023268C0
	str r3, [r4]
	str r1, [r4, #0xc]
	str r2, [r0, #8]
	ldr r0, [r0, #4]
	str r0, [r4, #0x28]
	b _022CCF14
_022CCF00:
	ldr r0, _022CCF48 ; =ov00_023268C0
	ldr r1, _022CCF5C ; =ov00_022CCF68
	str r3, [r0, #8]
	str r2, [r4]
	str r1, [r4, #0xc]
_022CCF14:
	ldr r0, [r5, #0x2c]
	cmp r0, #0
	moveq r0, #0xb
	bl ov00_022C8550
	ldr r0, _022CCF60 ; =ov00_022C8A74
	bl ov00_022D71E4
	ldr r0, _022CCF64 ; =ov00_022CEBDC
	bl ov00_022C84F8
	mov r0, r4
	bl ov00_022C826C
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022CCF40: .word ov00_02318868
_022CCF44: .word ov00_023268D0
_022CCF48: .word ov00_023268C0
_022CCF4C: .word ov00_022CCFEC
_022CCF50: .word ov00_02318888
_022CCF54: .word ov00_023250C8
_022CCF58: .word ov00_022CCFD4
_022CCF5C: .word ov00_022CCF68
_022CCF60: .word ov00_022C8A74
_022CCF64: .word ov00_022CEBDC
	arm_func_end ov00_022CCE0C

	arm_func_start ov00_022CCF68
ov00_022CCF68: ; 0x022CCF68
	ldr r0, _022CCFBC ; =ov00_02318868
	ldr r1, _022CCFC0 ; =ov00_023250C8
	ldr ip, [r0]
	ldr r0, _022CCFC4 ; =ov00_02325094
	ldr r3, [ip, #4]
	ldr r2, _022CCFC8 ; =ov00_023250A4
	str r3, [r1]
	ldr r3, [ip, #8]
	ldr r1, _022CCFCC ; =ov00_023250D8
	str r3, [r0]
	ldr r3, [ip, #0xc]
	ldr r0, _022CCFD0 ; =ov00_023268C0
	str r3, [r2]
	ldr r2, [ip, #0x10]
	str r2, [r1]
	ldr r2, [ip, #0x14]
	str r2, [r1, #4]
	ldr r1, [r0, #8]
	orr r1, r1, #2
	str r1, [r0, #8]
	bx lr
	.align 2, 0
_022CCFBC: .word ov00_02318868
_022CCFC0: .word ov00_023250C8
_022CCFC4: .word ov00_02325094
_022CCFC8: .word ov00_023250A4
_022CCFCC: .word ov00_023250D8
_022CCFD0: .word ov00_023268C0
	arm_func_end ov00_022CCF68

	arm_func_start ov00_022CCFD4
ov00_022CCFD4: ; 0x022CCFD4
	ldr r0, _022CCFE8 ; =ov00_023268C0
	ldr r1, [r0, #8]
	orr r1, r1, #2
	str r1, [r0, #8]
	bx lr
	.align 2, 0
_022CCFE8: .word ov00_023268C0
	arm_func_end ov00_022CCFD4

	arm_func_start ov00_022CCFEC
ov00_022CCFEC: ; 0x022CCFEC
	stmdb sp!, {r3, lr}
	bl ov00_022D7140
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022CCFEC

	arm_func_start ov00_022CD004
ov00_022CD004: ; 0x022CD004
	stmdb sp!, {r4, r5, r6, lr}
	mov r4, r0
	mov r0, #0x2c
	mul r1, r4, r0
	ldr r0, _022CD08C ; =ov00_02318868
	mov r2, r4, lsl #2
	add r2, r2, #3
	ldr r0, [r0]
	add r1, r1, #3
	bic r5, r2, #3
	bic r2, r1, #3
	ldr r1, [r0, #0x18]
	add r0, r2, r5
	blx r1
	movs r6, r0
	mvneq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	ldr r0, _022CD090 ; =ov00_02326904
	mov r1, r6
	mov r2, r4
	bl sub_02079DB8
	cmp r4, #0
	add r5, r6, r5
	ble _022CD07C
_022CD064:
	mov r0, r5
	bl ov00_022CD148
	sub r4, r4, #1
	cmp r4, #0
	add r5, r5, #0x2c
	bgt _022CD064
_022CD07C:
	ldr r1, _022CD094 ; =ov00_02326900
	mov r0, #0
	str r6, [r1]
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022CD08C: .word ov00_02318868
_022CD090: .word ov00_02326904
_022CD094: .word ov00_02326900
	arm_func_end ov00_022CD004

	arm_func_start ov00_022CD098
ov00_022CD098: ; 0x022CD098
	stmdb sp!, {r3, lr}
	ldr r0, _022CD0D8 ; =ov00_02326900
	ldr r2, [r0, #0x20]
	ldr r1, [r0, #0x18]
	cmp r2, r1
	mvnlt r0, #0
	ldmltia sp!, {r3, pc}
	ldr r1, _022CD0DC ; =ov00_02318868
	ldr r0, [r0]
	ldr r1, [r1]
	ldr r1, [r1, #0x1c]
	blx r1
	ldr r1, _022CD0D8 ; =ov00_02326900
	mov r0, #0
	str r0, [r1]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022CD0D8: .word ov00_02326900
_022CD0DC: .word ov00_02318868
	arm_func_end ov00_022CD098

	arm_func_start ov00_022CD0E0
ov00_022CD0E0: ; 0x022CD0E0
	stmdb sp!, {r3, lr}
	mov r2, r0
	ldr r0, _022CD104 ; =ov00_02326904
	add r1, sp, #0
	bl sub_02079E74
	cmp r0, #0
	ldrne r0, [sp]
	moveq r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022CD104: .word ov00_02326904
	arm_func_end ov00_022CD0E0

	arm_func_start ov00_022CD108
ov00_022CD108: ; 0x022CD108
	stmdb sp!, {r4, r5, r6, lr}
	mov r4, r2
	mov r6, r0
	mov r0, r4
	mov r5, r1
	bl ov00_022CD0E0
	cmp r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	str r6, [r0]
	str r5, [r0, #4]
	mov r1, #0
	str r1, [r0, #8]
	ldrsb r1, [r5, #0x73]
	strb r1, [r0, #0xc]
	strb r4, [r0, #0xd]
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022CD108

	arm_func_start ov00_022CD148
ov00_022CD148: ; 0x022CD148
	stmdb sp!, {r3, lr}
	movs r1, r0
	ldmeqia sp!, {r3, pc}
	ldr r0, _022CD164 ; =ov00_02326904
	mov r2, #0
	bl sub_02079DE0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022CD164: .word ov00_02326904
	arm_func_end ov00_022CD148

	arm_func_start ov00_022CD168
ov00_022CD168: ; 0x022CD168
	ldr r1, [r0, #0x64]
	cmp r1, #0
	ldreq r1, [r0, #0x68]
	mov r0, r1
	bx lr
	arm_func_end ov00_022CD168

	arm_func_start ov00_022CD17C
ov00_022CD17C: ; 0x022CD17C
	stmdb sp!, {r3, r4, r5, lr}
	movs r5, r1
	beq _022CD194
	ldrsb r1, [r5, #0xd]
	tst r1, #1
	beq _022CD19C
_022CD194:
	mov r2, #1
	b _022CD1A0
_022CD19C:
	mov r2, #0
_022CD1A0:
	mov r1, r5
	bl sub_02079DE0
	movs r4, r0
	bne _022CD1B8
	mov r0, r5
	bl ov00_022CD148
_022CD1B8:
	cmp r4, #0
	movne r0, #0
	mvneq r0, #0x29
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022CD17C

	arm_func_start ov00_022CD1C8
ov00_022CD1C8: ; 0x022CD1C8
	stmdb sp!, {r4, lr}
	mov r4, r1
	bl ov00_022CD168
	mov r1, r4
	bl ov00_022CD17C
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022CD1C8

	arm_func_start ov00_022CD1E0
ov00_022CD1E0: ; 0x022CD1E0
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0x28
	mov r4, r1
	ldrsb r2, [r4, #0xd]
	mov r5, r0
	cmp r2, #1
	bne _022CD234
	add r0, sp, #8
	add r1, sp, #0
	mov r2, #1
	bl sub_02079DB8
	add r2, sp, #8
	mov r0, r5
	mov r1, r4
	str r2, [r4, #8]
	bl ov00_022CD17C
	add r0, sp, #8
	add r1, sp, #4
	mov r2, #1
	bl sub_02079E74
	b _022CD244
_022CD234:
	mov r2, #0
	str r2, [r4, #8]
	bl ov00_022CD17C
	str r0, [sp, #4]
_022CD244:
	ldr r0, [sp, #4]
	add sp, sp, #0x28
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022CD1E0

	arm_func_start ov00_022CD250
ov00_022CD250: ; 0x022CD250
	ldr ip, _022CD25C ; =ov00_022CD1E0
	ldr r0, [r0, #0x64]
	bx ip
	.align 2, 0
_022CD25C: .word ov00_022CD1E0
	arm_func_end ov00_022CD250

	arm_func_start ov00_022CD260
ov00_022CD260: ; 0x022CD260
	ldr ip, _022CD26C ; =ov00_022CD1E0
	ldr r0, [r0, #0x68]
	bx ip
	.align 2, 0
_022CD26C: .word ov00_022CD1E0
	arm_func_end ov00_022CD260

	arm_func_start ov00_022CD270
ov00_022CD270: ; 0x022CD270
	stmdb sp!, {r4, lr}
	mov r4, r1
	bl ov00_022CD168
	mov r1, r4
	bl ov00_022CD1E0
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022CD270

	arm_func_start ov00_022CD288
ov00_022CD288: ; 0x022CD288
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #4
	mov r4, #0
	mov sb, r0
	mov sl, r4
	add r6, sp, #0
	mov r5, #1
_022CD2A4:
	mov r0, sb
	mov r1, r6
	mov r2, r5
	bl sub_02079FB4
	ldr r0, [sp]
	cmp r0, #0
	addeq sp, sp, #4
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	ldr r1, [r0]
	blx r1
	mov r8, r0
	bl EnableIrqFlag
	mov r7, r0
	bl sub_02079C14
	mov r0, sb
	mov r1, r4
	mov r2, r4
	bl sub_02079E74
	ldr r0, [sp]
	ldr r0, [r0, #4]
	cmp r0, #0
	strne r8, [r0, #0x6c]
	ldr r0, [sp]
	ldr r0, [r0, #8]
	cmp r0, #0
	beq _022CD318
	mov r1, r8
	mov r2, sl
	bl sub_02079DE0
_022CD318:
	ldr r0, [sp]
	bl ov00_022CD148
	bl sub_02079C48
	mov r0, r7
	bl SetIrqFlag
	b _022CD2A4
	arm_func_end ov00_022CD288

	arm_func_start ov00_022CD330
ov00_022CD330: ; 0x022CD330
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	arm_func_end ov00_022CD330

	arm_func_start ov00_022CD338
ov00_022CD338: ; 0x022CD338
	stmdb sp!, {r4, lr}
	bl ov00_022CD3E8
	movs r4, r0
	mvneq r0, #0x30
	ldmeqia sp!, {r4, pc}
	ldr r0, _022CD370 ; =ov00_022CD374
	mov r1, r4
	mov r2, #1
	bl ov00_022CD108
	mov r1, r0
	mov r0, r4
	bl ov00_022CD270
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022CD370: .word ov00_022CD374
	arm_func_end ov00_022CD338

	arm_func_start ov00_022CD374
ov00_022CD374: ; 0x022CD374
	stmdb sp!, {r4, lr}
	ldr r4, [r0, #4]
	mov r0, r4
	bl ov00_022CB138
	ldrsb r0, [r4, #0x73]
	ldr r1, [r4, #0x68]
	cmp r0, #4
	addls pc, pc, r0, lsl #2
	b _022CD3D4
_022CD398: ; jump table
	b _022CD3AC ; case 0
	b _022CD3BC ; case 1
	b _022CD3D0 ; case 2
	b _022CD3D4 ; case 3
	b _022CD3AC ; case 4
_022CD3AC:
	add r0, r1, #0x20
	bl ov00_022CB244
	bl ov00_022CB1F0
	b _022CD3D4
_022CD3BC:
	bl ov00_022CB1F0
	bl ov00_022CB164
	ldr r0, _022CD3E4 ; =ov00_022CE010
	bl ov00_022CB25C
	b _022CD3D4
_022CD3D0:
	bl ov00_022CB164
_022CD3D4:
	mov r0, #1
	strh r0, [r4, #0x70]
	mov r0, #0
	ldmia sp!, {r4, pc}
	.align 2, 0
_022CD3E4: .word ov00_022CE010
	arm_func_end ov00_022CD374

	arm_func_start ov00_022CD3E8
ov00_022CD3E8: ; 0x022CD3E8
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	bl ov00_022CD450
	mov r4, r0
	bl EnableIrqFlag
	ldr r1, _022CD44C ; =ov00_02318868
	mov r6, r0
	ldr r1, [r1]
	mov r0, r4
	ldr r1, [r1, #0x18]
	blx r1
	movs r5, r0
	beq _022CD43C
	mov r2, r4
	mov r1, #0
	bl MemsetFast
	mov r0, r5
	mov r1, r7
	bl ov00_022CD4F8
	mov r0, r5
	bl ov00_022CF09C
_022CD43C:
	mov r0, r6
	bl SetIrqFlag
	mov r0, r5
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022CD44C: .word ov00_02318868
	arm_func_end ov00_022CD3E8

	arm_func_start ov00_022CD450
ov00_022CD450: ; 0x022CD450
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	ldrh r0, [r5, #2]
	mov r4, #0x80
	cmp r0, #0
	beq _022CD48C
	add r4, r4, #0x114
	bl ov00_022CF090
	add r4, r4, r0
	ldrh r0, [r5, #8]
	bl ov00_022CF090
	add r4, r4, r0
	add r0, r5, #0x10
	bl ov00_022CD4D0
	add r4, r4, r0
_022CD48C:
	ldrh r0, [r5, #6]
	cmp r0, #0
	beq _022CD4C8
	add r4, r4, #0x110
	bl ov00_022CF090
	add r4, r4, r0
	ldrh r0, [r5, #0xa]
	bl ov00_022CF090
	add r4, r4, r0
	ldrh r0, [r5, #0xc]
	bl ov00_022CF090
	add r4, r4, r0
	add r0, r5, #0x14
	bl ov00_022CD4D0
	add r4, r4, r0
_022CD4C8:
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022CD450

	arm_func_start ov00_022CD4D0
ov00_022CD4D0: ; 0x022CD4D0
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	ldrb r0, [r5, #3]
	mov r0, r0, lsl #2
	bl ov00_022CF090
	mov r4, r0
	ldrh r0, [r5]
	bl ov00_022CF090
	add r0, r4, r0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022CD4D0

	arm_func_start ov00_022CD4F8
ov00_022CD4F8: ; 0x022CD4F8
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r5, r1
	ldrsb r1, [r5]
	mov r6, r0
	add r4, r6, #0x80
	strb r1, [r6, #0x73]
	ldrsb r0, [r5, #1]
	strb r0, [r6, #0x72]
	ldrh r0, [r5, #2]
	cmp r0, #0
	beq _022CD578
	str r4, [r6, #0x64]
	ldrh r2, [r5, #4]
	mov r1, r4
	add r0, r4, #0x114
	strh r2, [r4, #0xfc]
	add r2, r5, #0x10
	mov r7, r4
	bl ov00_022CD61C
	ldrh r2, [r5, #2]
	add r1, r6, #0x3c
	bl ov00_022CD5F4
	ldrh r2, [r5, #8]
	add r1, r6, #0x50
	bl ov00_022CD5F4
	ldrh r3, [r5, #0xe]
	add r1, r7, #0x100
	mov r2, #0
	strh r3, [r1, #0xa]
	str r2, [r7, #0x110]
	mov r4, r0
	str r2, [r7, #0x10c]
_022CD578:
	ldrh r0, [r5, #6]
	cmp r0, #0
	beq _022CD5D8
	str r4, [r6, #0x68]
	mov r1, r4
	str r6, [r4, #0x10c]
	add r0, r4, #0x110
	add r2, r5, #0x14
	mov r7, r4
	bl ov00_022CD61C
	ldrh r2, [r5, #6]
	add r1, r6, #0x48
	bl ov00_022CD5F4
	ldrh r2, [r5, #0xa]
	add r1, r6, #0x58
	bl ov00_022CD5F4
	ldrh r2, [r5, #0xc]
	add r1, r4, #0xf8
	bl ov00_022CD5F4
	mov r1, #0
	str r1, [r7, #0x108]
	mov r4, r0
	str r1, [r7, #0x104]
	b _022CD5E8
_022CD5D8:
	ldr r0, _022CD5F0 ; =ov00_023268CC
	ldr r0, [r0]
	ldr r0, [r0, #0x68]
	str r0, [r6, #0x68]
_022CD5E8:
	mov r0, r4
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022CD5F0: .word ov00_023268CC
	arm_func_end ov00_022CD4F8

	arm_func_start ov00_022CD5F4
ov00_022CD5F4: ; 0x022CD5F4
	stmdb sp!, {r4, lr}
	mov r4, r0
	cmp r2, #0
	moveq r0, #0
	str r0, [r1, #4]
	mov r0, r2
	str r2, [r1]
	bl ov00_022CF090
	add r0, r4, r0
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022CD5F4

	arm_func_start ov00_022CD61C
ov00_022CD61C: ; 0x022CD61C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #8
	mov r5, r2
	mov r7, r0
	mov r0, r5
	mov r6, r1
	bl ov00_022CD4D0
	mov r4, r0
	ldrb r2, [r5, #3]
	mov r0, r6
	mov r1, r7
	bl sub_02079DB8
	add r0, r6, #0xe0
	bl OS_InitMutex
	ldrh r2, [r5]
	add r0, r6, #0x20
	ldr r1, _022CD68C ; =ov00_022CD288
	str r2, [sp]
	ldrb ip, [r5, #2]
	mov r2, r6
	add r3, r7, r4
	str ip, [sp, #4]
	bl StartThread
	add r0, r6, #0x20
	bl OS_WakeupThreadDirect
	add r0, r7, r4
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022CD68C: .word ov00_022CD288
	arm_func_end ov00_022CD61C

	arm_func_start ov00_022CD690
ov00_022CD690: ; 0x022CD690
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	bl ov00_022CF154
	cmp r0, #0
	mvnne r0, #0x1b
	ldmneia sp!, {r3, r4, r5, pc}
	cmp r5, #0
	mov r1, #0
	beq _022CD6C4
	ldrsh r0, [r5, #0x70]
	tst r0, #1
	movne r1, #1
_022CD6C4:
	cmp r1, #0
	mvneq r0, #0x26
	ldmeqia sp!, {r3, r4, r5, pc}
	ldrsh r0, [r5, #0x70]
	tst r0, #2
	mvnne r0, #6
	ldmneia sp!, {r3, r4, r5, pc}
	strh r4, [r5, #0x74]
	ldrsb r0, [r5, #0x73]
	cmp r0, #1
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	mov r0, r5
	bl ov00_022CD7E8
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022CD690

	arm_func_start ov00_022CD700
ov00_022CD700: ; 0x022CD700
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	mov r4, r2
	bl ov00_022CF154
	cmp r0, #0
	bne _022CD728
	ldrsh r0, [r6, #0x70]
	tst r0, #8
	beq _022CD730
_022CD728:
	mvn r0, #0x1b
	ldmia sp!, {r4, r5, r6, pc}
_022CD730:
	cmp r6, #0
	mov r1, #0
	beq _022CD748
	ldrsh r0, [r6, #0x70]
	tst r0, #1
	movne r1, #1
_022CD748:
	cmp r1, #0
	mvneq r0, #0x26
	ldmeqia sp!, {r4, r5, r6, pc}
	ldrsb r0, [r6, #0x73]
	mov r1, #1
	cmp r0, #0
	cmpne r0, #4
	movne r1, #0
	cmp r1, #0
	beq _022CD7D4
	ldrsh r0, [r6, #0x70]
	tst r0, #4
	beq _022CD790
	ldrsb r0, [r6, #0x72]
	cmp r0, #1
	mvneq r0, #0x1d
	movne r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022CD790:
	ldrsh r0, [r6, #0x70]
	tst r0, #2
	beq _022CD7B4
	ldrsh r0, [r6, #0x70]
	tst r0, #0x40
	ldrne r0, [r6, #0x6c]
	ldreq r0, _022CD7E4 ; =ov00_0231886C
	ldreq r0, [r0]
	ldmia sp!, {r4, r5, r6, pc}
_022CD7B4:
	strh r5, [r6, #0x76]
	mov r0, r6
	str r4, [r6, #0x78]
	bl ov00_022CD7E8
	ldrsb r1, [r6, #0x72]
	cmp r1, #1
	mvnne r0, #0x19
	ldmia sp!, {r4, r5, r6, pc}
_022CD7D4:
	strh r5, [r6, #0x76]
	str r4, [r6, #0x78]
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022CD7E4: .word ov00_0231886C
	arm_func_end ov00_022CD700

	arm_func_start ov00_022CD7E8
ov00_022CD7E8: ; 0x022CD7E8
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldrsb r2, [r4, #0x72]
	ldr r0, _022CD83C ; =ov00_022CD840
	mov r1, r4
	bl ov00_022CD108
	movs r1, r0
	mvneq r0, #0x20
	ldmeqia sp!, {r4, pc}
	ldrh r2, [r4, #0x74]
	mov r0, r4
	strh r2, [r1, #0x10]
	ldrh r2, [r4, #0x76]
	strh r2, [r1, #0x12]
	ldr r2, [r4, #0x78]
	str r2, [r1, #0x14]
	ldrsh r2, [r4, #0x70]
	orr r2, r2, #2
	strh r2, [r4, #0x70]
	bl ov00_022CD250
	ldmia sp!, {r4, pc}
	.align 2, 0
_022CD83C: .word ov00_022CD840
	arm_func_end ov00_022CD7E8

	arm_func_start ov00_022CD840
ov00_022CD840: ; 0x022CD840
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	ldr r4, [r7, #4]
	mov r6, #0
	ldr r5, [r4, #0x64]
	add r0, r5, #0xe0
	bl sub_0207A048
	ldrh r0, [r7, #0x10]
	ldrh r1, [r7, #0x12]
	ldr r2, [r7, #0x14]
	bl ov00_022CB190
	mov r0, r6
	str r0, [r5, #0xf8]
	ldrsb r0, [r7, #0xc]
	cmp r0, #0
	cmpne r0, #4
	bne _022CD88C
	bl ov00_022CB32C
	mov r6, r0
_022CD88C:
	add r0, r5, #0xe0
	bl sub_0207A0CC
	cmp r6, #0
	beq _022CD8B0
	ldrsh r1, [r4, #0x70]
	mvn r0, #0x4b
	orr r1, r1, #0x40
	strh r1, [r4, #0x70]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022CD8B0:
	ldrsh r1, [r4, #0x70]
	mov r0, #0
	orr r1, r1, #4
	strh r1, [r4, #0x70]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022CD840

	arm_func_start ov00_022CD8C4
ov00_022CD8C4: ; 0x022CD8C4
	stmdb sp!, {r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0xc
	mov sb, r0
	mov r8, r1
	mov r7, r2
	mov r6, r3
	bl ov00_022CF154
	cmp r0, #0
	addne sp, sp, #0xc
	mvnne r0, #0x1b
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, pc}
	ldr r0, [sp, #0x2c]
	tst r0, #4
	bne _022CD908
	ldrsb r0, [sb, #0x72]
	cmp r0, #0
	bne _022CD924
_022CD908:
	ldrsb r0, [sb, #0x73]
	cmp r0, #4
	addeq sp, sp, #0xc
	mvneq r0, #0x1b
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, pc}
	mov r5, #0
	b _022CD93C
_022CD924:
	bl GetProcessorMode
	cmp r0, #0x12
	addeq sp, sp, #0xc
	mvneq r0, #0x1b
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, pc}
	mov r5, #1
_022CD93C:
	cmp sb, #0
	mov r1, #0
	beq _022CD954
	ldrsh r0, [sb, #0x70]
	tst r0, #1
	movne r1, #1
_022CD954:
	cmp r1, #0
	addeq sp, sp, #0xc
	mvneq r0, #0x26
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, pc}
	ldrsb r0, [sb, #0x73]
	mov r1, #1
	cmp r0, #0
	cmpne r0, #4
	movne r1, #0
	cmp r1, #0
	beq _022CD9A4
	ldrsh r0, [sb, #0x70]
	tst r0, #4
	beq _022CD998
	ldrsh r0, [sb, #0x70]
	tst r0, #8
	beq _022CD9A4
_022CD998:
	add sp, sp, #0xc
	mvn r0, #0x37
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
_022CD9A4:
	ldr r4, [sb, #0x64]
	tst r5, #1
	add r0, r4, #0xe0
	bne _022CD9CC
	bl sub_0207A164
	cmp r0, #0
	bne _022CD9D0
	add sp, sp, #0xc
	mvn r0, #5
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
_022CD9CC:
	bl sub_0207A048
_022CD9D0:
	ldr r0, [sp, #0x28]
	ldr ip, [sp, #0x2c]
	str r0, [sp]
	mov r0, sb
	mov r1, r8
	mov r2, r7
	mov r3, r6
	stmib sp, {r5, ip}
	bl ov00_022CDA0C
	mov r5, r0
	add r0, r4, #0xe0
	bl sub_0207A0CC
	mov r0, r5
	add sp, sp, #0xc
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022CD8C4

	arm_func_start ov00_022CDA0C
ov00_022CDA0C: ; 0x022CDA0C
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	sub sp, sp, #8
	ldr r4, [sp, #0x28]
	mov r7, r0
	tst r4, #2
	ldr r4, [r7, #0x64]
	cmpne r4, #0
	movne r6, #1
	moveq r6, #0
	cmp r6, #0
	ldrnesb r5, [r4, #0xfe]
	movne r0, #1
	strneb r0, [r4, #0xfe]
	ldrsb r0, [r7, #0x73]
	cmp r0, #1
	bne _022CDA6C
	ldr r0, [sp, #0x20]
	ldr ip, [sp, #0x24]
	str r0, [sp]
	mov r0, r7
	str ip, [sp, #4]
	bl ov00_022CDECC
	mov r8, r0
	b _022CDA94
_022CDA6C:
	ldr r0, [sp, #0x20]
	ldr ip, [sp, #0x24]
	str r0, [sp]
	mov r0, r7
	str ip, [sp, #4]
	bl ov00_022CDAA8
	movs r8, r0
	bmi _022CDA94
	mov r0, r7
	bl ov00_022CDE34
_022CDA94:
	cmp r6, #0
	strneb r5, [r4, #0xfe]
	mov r0, r8
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022CDA0C

	arm_func_start ov00_022CDAA8
ov00_022CDAA8: ; 0x022CDAA8
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	ldrsb ip, [r7, #0x73]
	mov r6, r1
	mov r5, r2
	mov r4, r3
	cmp ip, #4
	bne _022CDAD8
	ldr r4, [sp, #0x18]
	str r4, [sp]
	bl ov00_022CDC98
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022CDAD8:
	ldr ip, [sp, #0x18]
	str ip, [sp]
	bl ov00_022CDB1C
	mvn r1, #5
	cmp r0, r1
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, [sp, #0x1c]
	tst r1, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr ip, [sp, #0x18]
	mov r0, r7
	mov r1, r6
	mov r2, r5
	mov r3, r4
	str ip, [sp]
	bl ov00_022CDC98
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022CDAA8

	arm_func_start ov00_022CDB1C
ov00_022CDB1C: ; 0x022CDB1C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x10
	mov sb, r0
	mov r8, r1
	mov r7, r2
	mov r6, r3
	bl EnableIrqFlag
	add r1, sp, #8
	mov r4, r0
	str r1, [sp]
	add r1, sp, #0xc
	mov r0, sb
	add r2, sp, #6
	add r3, sp, #4
	bl ov00_022CDC24
	cmp r0, #0
	beq _022CDBBC
	ldr r5, [sp, #0xc]
	cmp r5, #0
	mvneq r5, #5
	beq _022CDBD8
	ldrsb r1, [sb, #0x73]
	cmp r7, r5
	mov r2, #1
	movgt r7, r5
	cmp r1, #0
	cmpne r1, #4
	movne r2, #0
	cmp r2, #0
	mov r1, r8
	mov r2, r7
	movne r5, r7
	bl MemcpyFast
	ldr r1, [sb, #0x64]
	ldrsb r0, [r1, #0xfe]
	cmp r0, #0
	ldreq r0, [r1, #0xf8]
	addeq r0, r0, r5
	streq r0, [r1, #0xf8]
	b _022CDBD8
_022CDBBC:
	ldr r0, [sp, #0xc]
	cmp r0, #0
	ldrsh r0, [sb, #0x70]
	moveq r5, #0
	mvnne r5, #0x1b
	bic r0, r0, #6
	strh r0, [sb, #0x70]
_022CDBD8:
	cmp r5, #0
	blt _022CDC10
	cmp r6, #0
	ldrne r1, [sp, #0x30]
	cmpne r1, #0
	beq _022CDC00
	ldrh r0, [sp, #4]
	strh r0, [r6]
	ldr r0, [sp, #8]
	str r0, [r1]
_022CDC00:
	ldrh r0, [sb, #0x74]
	cmp r0, #0
	ldreqh r0, [sp, #6]
	streqh r0, [sb, #0x74]
_022CDC10:
	mov r0, r4
	bl SetIrqFlag
	mov r0, r5
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022CDB1C

	arm_func_start ov00_022CDC24
ov00_022CDC24: ; 0x022CDC24
	stmdb sp!, {r3, r4, r5, lr}
	ldr r0, [r0, #0x64]
	ldr r4, [r0, #0xc4]
	ldr r5, [r0, #0xf8]
	ldr r0, [r4, #0x44]
	subs lr, r0, r5
	bmi _022CDC7C
	ldrh ip, [r4, #0xa]
	ldr r0, [sp, #0x10]
	cmp lr, #0
	strh ip, [r2]
	ldrh r2, [r4, #0x18]
	strh r2, [r3]
	ldr r2, [r4, #0x1c]
	str r2, [r0]
	str lr, [r1]
	bne _022CDC8C
	ldrb r0, [r4, #8]
	cmp r0, #4
	beq _022CDC8C
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022CDC7C:
	mvn r0, #0
	str r0, [r1]
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022CDC8C:
	ldr r0, [r4, #0x40]
	add r0, r0, r5
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022CDC24

	arm_func_start ov00_022CDC98
ov00_022CDC98: ; 0x022CDC98
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r6, r1
	mov r5, r2
	ldr r0, _022CDCE0 ; =ov00_022CDCE4
	mov r1, r7
	mov r2, #1
	mov r4, r3
	bl ov00_022CD108
	mov r1, r0
	str r6, [r1, #0x10]
	str r5, [r1, #0x14]
	ldr r2, [sp, #0x18]
	str r4, [r1, #0x18]
	mov r0, r7
	str r2, [r1, #0x1c]
	bl ov00_022CD250
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022CDCE0: .word ov00_022CDCE4
	arm_func_end ov00_022CDC98

	arm_func_start ov00_022CDCE4
ov00_022CDCE4: ; 0x022CDCE4
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x14
	ldr r7, [r0, #4]
	ldr r1, [r0, #0x10]
	ldr r8, [r7, #0x64]
	str r1, [sp, #0xc]
	ldr r1, [r0, #0x18]
	ldr sl, [r0, #0x14]
	ldr r0, [r0, #0x1c]
	ldr sb, [r8, #0xf8]
	str r1, [sp, #8]
	str r0, [sp, #4]
	mov r4, #0
	mov r5, #1
	mov fp, #0xa
	add r6, sp, #0x10
_022CDD24:
	mov r0, r6
	bl ov00_022CB550
	cmp r0, #0
	beq _022CDD78
	ldr r1, [sp, #0x10]
	sub r1, r1, sb
	cmp r1, #0
	bgt _022CDD78
	ldrsb r0, [r7, #0x73]
	mov r1, r5
	cmp r0, #0
	cmpne r0, #4
	movne r1, r4
	cmp r1, #0
	ldrneb r0, [r7, #8]
	cmpne r0, #4
	movne r0, #0
	bne _022CDD78
	mov r0, fp
	bl sub_02079B14
	b _022CDD24
_022CDD78:
	ldrsh r1, [r7, #0x70]
	tst r1, #0x80
	addne sp, sp, #0x14
	mvnne r0, #0xe
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldrsb r1, [r7, #0x73]
	cmp r1, #4
	bne _022CDDD4
	cmp r0, #0
	addeq sp, sp, #0x14
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [sp, #0x10]
	cmp sl, r1
	movhi sl, r1
	ldr r1, [sp, #0xc]
	mov r2, sl
	bl MemcpyFast
	mov r0, sl
	bl ov00_022CB644
	add sp, sp, #0x14
	mov r0, sl
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022CDDD4:
	cmp r0, #0
	moveq r4, #0
	beq _022CDE00
	ldr r4, [sp, #4]
	ldr r1, [sp, #0xc]
	ldr r3, [sp, #8]
	mov r0, r7
	mov r2, sl
	str r4, [sp]
	bl ov00_022CDB1C
	mov r4, r0
_022CDE00:
	cmp r4, #0
	addle sp, sp, #0x14
	movle r0, r4
	ldmleia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldrh r0, [r8, #0xfc]
	ldr r1, [r8, #0xf8]
	cmp r1, r0
	blt _022CDE28
	mov r0, r7
	bl ov00_022CDE90
_022CDE28:
	mov r0, r4
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022CDCE4

	arm_func_start ov00_022CDE34
ov00_022CDE34: ; 0x022CDE34
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r1, [r4, #0x64]
	ldrh r0, [r1, #0xfc]
	ldr r1, [r1, #0xf8]
	cmp r1, r0
	movlt r0, #0
	ldmltia sp!, {r4, pc}
	ldr r0, _022CDE7C ; =ov00_022CDE80
	mov r1, r4
	mov r2, #0
	bl ov00_022CD108
	movs r1, r0
	mvneq r0, #0x20
	ldmeqia sp!, {r4, pc}
	mov r0, r4
	bl ov00_022CD250
	ldmia sp!, {r4, pc}
	.align 2, 0
_022CDE7C: .word ov00_022CDE80
	arm_func_end ov00_022CDE34

	arm_func_start ov00_022CDE80
ov00_022CDE80: ; 0x022CDE80
	ldr ip, _022CDE8C ; =ov00_022CDE90
	ldr r0, [r0, #4]
	bx ip
	.align 2, 0
_022CDE8C: .word ov00_022CDE90
	arm_func_end ov00_022CDE80

	arm_func_start ov00_022CDE90
ov00_022CDE90: ; 0x022CDE90
	stmdb sp!, {r4, r5, r6, lr}
	ldr r4, [r0, #0x64]
	bl EnableIrqFlag
	ldr r6, [r4, #0xf8]
	mov r5, r0
	cmp r6, #0
	beq _022CDEBC
	mov r1, #0
	mov r0, r6
	str r1, [r4, #0xf8]
	bl ov00_022CB644
_022CDEBC:
	mov r0, r5
	bl SetIrqFlag
	mov r0, r6
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022CDE90

	arm_func_start ov00_022CDECC
ov00_022CDECC: ; 0x022CDECC
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0xc
	mov sl, r0
	ldr r6, [sl, #0x64]
	str r1, [sp]
	ldr r0, [r6, #0x104]
	str r2, [sp, #4]
	mov fp, r3
	bl EnableIrqFlag
	ldr r7, [r6, #0x104]
	str r0, [sp, #8]
	cmp r7, #0
	bne _022CDF68
	ldr r0, [sp, #0x34]
	mov r4, #1
	and sb, r0, #1
	mov r5, #0
_022CDF10:
	cmp sb, #0
	mvneq r8, #5
	beq _022CDF68
	add r0, r6, #0x10c
	bl OS_SleepThread
	mov r0, sl
	bl ov00_022CF154
	cmp r0, #0
	bne _022CDF54
	mov r1, r5
	cmp sl, #0
	beq _022CDF4C
	ldrsh r0, [sl, #0x70]
	tst r0, #1
	movne r1, r4
_022CDF4C:
	cmp r1, #0
	bne _022CDF5C
_022CDF54:
	mvn r8, #0x37
	b _022CDF68
_022CDF5C:
	ldr r7, [r6, #0x104]
	cmp r7, #0
	beq _022CDF10
_022CDF68:
	cmp r7, #0
	beq _022CDFF8
	ldrh r1, [r7, #4]
	ldr r0, [sp, #4]
	cmp r0, r1
	strgt r1, [sp, #4]
	ldr r1, [sp]
	ldr r2, [sp, #4]
	add r0, r7, #0xc
	bl MemcpyFast
	cmp fp, #0
	ldrneh r0, [r7, #6]
	ldr r1, [sp, #0x30]
	strneh r0, [fp]
	cmp r1, #0
	ldrne r0, [r7, #8]
	strne r0, [r1]
	ldrsb r0, [r6, #0xfe]
	ldrh r8, [r7, #4]
	cmp r0, #0
	bne _022CDFF8
	ldr r0, [r7]
	ldr r1, _022CE00C ; =ov00_02318868
	str r0, [r6, #0x104]
	ldr r0, [r7]
	cmp r0, #0
	moveq r0, #0
	streq r0, [r6, #0x100]
	ldr r1, [r1]
	mov r0, r7
	ldr r1, [r1, #0x1c]
	blx r1
	add r0, r6, #0x100
	ldrh r1, [r0, #8]
	sub r1, r1, r8
	strh r1, [r0, #8]
_022CDFF8:
	ldr r0, [sp, #8]
	bl SetIrqFlag
	mov r0, r8
	add sp, sp, #0xc
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022CE00C: .word ov00_02318868
	arm_func_end ov00_022CDECC

	arm_func_start ov00_022CE010
ov00_022CE010: ; 0x022CE010
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r7, r2
	ldr r4, [r7, #0x64]
	mov sb, r0
	mov r8, r1
	bl EnableIrqFlag
	add r1, r4, #0x100
	ldrh r2, [r1, #8]
	ldrh r1, [r1, #0xa]
	mov r6, r0
	add r0, r2, r8
	cmp r1, r0
	blo _022CE0D4
	ldr r1, _022CE11C ; =ov00_02318868
	add r0, r8, #0xc
	ldr r1, [r1]
	ldr r1, [r1, #0x18]
	blx r1
	movs r5, r0
	beq _022CE0C0
	add r1, r4, #0x100
	ldrh r3, [r1, #8]
	mov r2, #0
	mov r0, sb
	add r3, r3, r8
	strh r3, [r1, #8]
	str r2, [r5]
	strh r8, [r5, #4]
	ldrh r3, [r7, #0x18]
	mov r2, r8
	add r1, r5, #0xc
	strh r3, [r5, #6]
	ldr r3, [r7, #0x1c]
	str r3, [r5, #8]
	bl MemcpyFast
	ldr r0, [r4, #0x100]
	cmp r0, #0
	ldrne r0, [r4, #0x100]
	strne r5, [r0]
	str r5, [r4, #0x100]
	ldr r0, [r4, #0x104]
	cmp r0, #0
	streq r5, [r4, #0x104]
	b _022CE0E4
_022CE0C0:
	ldr r0, _022CE120 ; =ov00_02326924
	ldr r1, [r0]
	add r1, r1, #1
	str r1, [r0]
	b _022CE0E4
_022CE0D4:
	ldr r0, _022CE120 ; =ov00_02326924
	ldr r1, [r0, #4]
	add r1, r1, #1
	str r1, [r0, #4]
_022CE0E4:
	ldrh r0, [r7, #0x74]
	cmp r0, #0
	ldreqh r0, [r7, #0xa]
	streqh r0, [r7, #0x74]
	ldrh r1, [r7, #0x1a]
	add r0, r4, #0x10c
	strh r1, [r7, #0x18]
	ldr r1, [r7, #0x20]
	str r1, [r7, #0x1c]
	bl sub_020798D8
	mov r0, r6
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022CE11C: .word ov00_02318868
_022CE120: .word ov00_02326924
	arm_func_end ov00_022CE010

	arm_func_start ov00_022CE124
ov00_022CE124: ; 0x022CE124
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	sub sp, sp, #8
	mov r8, r0
	mov r7, r1
	mov r6, r2
	mov r5, r3
	bl ov00_022CF154
	cmp r0, #0
	addne sp, sp, #8
	mvnne r0, #0x1b
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	cmp r8, #0
	mov r1, #0
	beq _022CE168
	ldrsh r0, [r8, #0x70]
	tst r0, #1
	movne r1, #1
_022CE168:
	cmp r1, #0
	addeq sp, sp, #8
	mvneq r0, #0x26
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	ldrsb r0, [r8, #0x73]
	mov r1, #1
	cmp r0, #0
	cmpne r0, #4
	movne r1, #0
	cmp r1, #0
	beq _022CE1B8
	ldrsh r0, [r8, #0x70]
	tst r0, #4
	beq _022CE1AC
	ldrsh r0, [r8, #0x70]
	tst r0, #8
	beq _022CE1B8
_022CE1AC:
	add sp, sp, #8
	mvn r0, #0x37
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022CE1B8:
	ldr r0, [sp, #0x24]
	ldr r4, [r8, #0x68]
	tst r0, #4
	bne _022CE1D4
	ldrsb r0, [r8, #0x72]
	cmp r0, #0
	bne _022CE1F4
_022CE1D4:
	add r0, r4, #0xe0
	bl sub_0207A164
	cmp r0, #0
	addeq sp, sp, #8
	mvneq r0, #5
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	mov ip, #0
	b _022CE200
_022CE1F4:
	add r0, r4, #0xe0
	bl sub_0207A048
	mov ip, #1
_022CE200:
	ldr r1, [sp, #0x20]
	mov r0, r8
	str r1, [sp]
	mov r1, r7
	mov r2, r6
	mov r3, r5
	str ip, [sp, #4]
	bl ov00_022CE238
	mov r5, r0
	add r0, r4, #0xe0
	bl sub_0207A0CC
	mov r0, r5
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022CE124

	arm_func_start ov00_022CE238
ov00_022CE238: ; 0x022CE238
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x18
	mov sl, r0
	ldr r4, [sl, #0x68]
	ldrsb r0, [sl, #0x73]
	ldr r4, [r4, #0x10c]
	mov sb, r1
	str r3, [sp, #0xc]
	cmp r0, #1
	mov r8, r2
	ldr r7, [sp, #0x40]
	ldr r6, [sp, #0x44]
	ldr r0, [r4, #0x48]
	mov r5, #0
	bne _022CE290
	sub r0, r0, #0x2a
	cmp r8, r0
	addgt sp, sp, #0x18
	subgt r0, r5, #0x23
	ldmgtia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	str r8, [sp, #0x10]
	b _022CE2A0
_022CE290:
	sub r0, r0, #0x36
	str r0, [sp, #0x10]
	cmp r8, r0
	strle r8, [sp, #0x10]
_022CE2A0:
	cmp r8, #0
	ble _022CE330
	and fp, r6, #1
_022CE2AC:
	ldr r2, [sp, #0x10]
	mov r0, sl
	mov r1, r8
	add r3, sp, #0x14
	str r6, [sp]
	bl ov00_022CE33C
	mov r4, r0
	cmp r4, #0
	ble _022CE30C
	ldr r0, [sp, #0xc]
	mov r1, sb
	stmia sp, {r0, r7}
	str r6, [sp, #8]
	ldr r3, [sp, #0x14]
	mov r0, sl
	mov r2, r4
	bl ov00_022CE3E4
	cmp r0, #0
	addle sp, sp, #0x18
	mvnle r0, #5
	ldmleia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add sb, sb, r4
	sub r8, r8, r4
	add r5, r5, r4
_022CE30C:
	cmp fp, #0
	bne _022CE328
	cmp r4, #0
	bgt _022CE330
	add sp, sp, #0x18
	mvn r0, #5
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022CE328:
	cmp r8, #0
	bgt _022CE2AC
_022CE330:
	mov r0, r5
	add sp, sp, #0x18
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022CE238

	arm_func_start ov00_022CE33C
ov00_022CE33C: ; 0x022CE33C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov sl, r0
	mov sb, r1
	mov r8, r2
	cmp r8, sb
	mov r7, r3
	ldr r4, [sl, #0x68]
	movgt r8, sb
	bl EnableIrqFlag
	ldr r1, [sp, #0x28]
	mov fp, r0
	and r6, r1, #1
_022CE36C:
	mov r0, sl
	bl ov00_022CE3C0
	mov r5, r0
	cmp r5, r8
	blt _022CE398
	add r0, r4, #0x100
	ldrh r0, [r0]
	cmp r5, sb
	movge r5, sb
	str r0, [r7]
	b _022CE3B0
_022CE398:
	cmp r6, #0
	moveq r5, #0
	beq _022CE3B0
	add r0, r4, #0x104
	bl OS_SleepThread
	b _022CE36C
_022CE3B0:
	mov r0, fp
	bl SetIrqFlag
	mov r0, r5
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022CE33C

	arm_func_start ov00_022CE3C0
ov00_022CE3C0: ; 0x022CE3C0
	ldr r2, [r0, #0x68]
	add r0, r2, #0x100
	ldrh r1, [r0]
	ldrh r0, [r0, #2]
	ldr r2, [r2, #0xf8]
	sub r0, r0, r1
	subs r0, r0, #1
	addmi r0, r0, r2
	bx lr
	arm_func_end ov00_022CE3C0

	arm_func_start ov00_022CE3E4
ov00_022CE3E4: ; 0x022CE3E4
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov sb, r0
	ldr r4, [sb, #0x68]
	mov r6, r1
	mov r8, r2
	ldr r1, [r4, #0x10c]
	ldr r2, [sp, #0x28]
	ldr r0, _022CE554 ; =ov00_022CE558
	mov r7, r3
	bl ov00_022CD108
	movs r5, r0
	mvneq r0, #0x20
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	ldr r0, [sp, #0x28]
	add r1, r7, r8
	tst r0, #1
	ldrnesb r0, [sb, #0x73]
	cmpne r0, #1
	movne r0, #3
	strneb r0, [r5, #0xd]
	moveq r0, #0
	streqb r0, [r5, #0xd]
	ldr r3, [r4, #0xfc]
	ldr r2, [r4, #0xf8]
	add r0, r3, r7
	cmp r1, r2
	str r0, [r5, #0x10]
	bge _022CE46C
	str r8, [r5, #0x14]
	mov r0, #0
	str r0, [r5, #0x18]
	mov r7, r1
	str r0, [r5, #0x1c]
	b _022CE498
_022CE46C:
	sub r0, r2, r7
	str r0, [r5, #0x14]
	str r3, [r5, #0x18]
	ldr r0, [r5, #0x14]
	sub r7, r8, r0
	str r7, [r5, #0x1c]
	ldr r0, [r5, #0x14]
	ldr r1, [r5, #0x18]
	mov r2, r7
	add r0, r6, r0
	bl MemcpyFast
_022CE498:
	ldr r1, [r5, #0x10]
	ldr r2, [r5, #0x14]
	mov r0, r6
	bl MemcpyFast
	add r0, r4, #0x100
	ldrh r6, [r0]
	strh r7, [r5, #0x20]
	ldrh r1, [r5, #0x20]
	strh r1, [r0]
	ldrsb r0, [sb, #0x73]
	cmp r0, #1
	bne _022CE528
	ldrh r0, [sb, #0x74]
	cmp r0, #0
	bne _022CE4E4
	bl ov00_022CB04C
	strh r0, [sb, #0x74]
	ldrh r0, [sb, #0x74]
	strh r0, [sb, #0xa]
_022CE4E4:
	ldrh r0, [sb, #0x74]
	strh r0, [r5, #0x24]
	ldr r1, [sb, #0x78]
	cmp r1, #0
	beq _022CE504
	ldr r0, [sp, #0x24]
	cmp r0, #0
	beq _022CE518
_022CE504:
	ldr r1, [sp, #0x24]
	ldrh r0, [sp, #0x20]
	str r1, [r5, #0x28]
	strh r0, [r5, #0x26]
	b _022CE530
_022CE518:
	str r1, [r5, #0x28]
	ldrh r0, [sb, #0x76]
	strh r0, [r5, #0x26]
	b _022CE530
_022CE528:
	mov r0, #0
	str r0, [r5, #0x28]
_022CE530:
	ldr r0, [r4, #0x10c]
	mov r1, r5
	bl ov00_022CD260
	cmp r0, #0
	addne r0, r4, #0x100
	movne r8, #0
	strneh r6, [r0]
	mov r0, r8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022CE554: .word ov00_022CE558
	arm_func_end ov00_022CE3E4

	arm_func_start ov00_022CE558
ov00_022CE558: ; 0x022CE558
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	mov sb, r0
	ldr r5, [sb, #4]
	mov r7, #0
	ldrsb r0, [r5, #0x73]
	mov r1, #1
	ldr r6, [r5, #0x68]
	cmp r0, #0
	cmpne r0, #4
	movne r1, r7
	cmp r1, #0
	beq _022CE594
	ldrsh r0, [r5, #0x70]
	tst r0, #4
	beq _022CE668
_022CE594:
	ldr r2, [sb, #0x28]
	cmp r2, #0
	beq _022CE5AC
	ldrh r0, [sb, #0x24]
	ldrh r1, [sb, #0x26]
	bl ov00_022CB190
_022CE5AC:
	ldrsb r1, [r5, #0x73]
	mov r0, #1
	ldr r4, [r5, #0x4c]
	cmp r1, #0
	cmpne r1, #4
	movne r0, #0
	cmp r0, #0
	movne r8, #0x36
	moveq r8, #0x2a
	cmp r1, #0
	cmpne r1, #4
	ldrne r0, [r5, #0x48]
	subne sl, r0, r8
	bne _022CE5F4
	ldr r0, [r5, #0x48]
	sub r0, r0, r8
	bl ov00_022CE688
	mov sl, r0
_022CE5F4:
	mov r1, sl
	mov r2, sb
	add r0, r4, r8
	bl ov00_022CE72C
	mov r1, r0
	cmp r1, #0
	ble _022CE66C
	add r0, r4, r8
	bl ov00_022CBA58
	cmp r0, #0
	bgt _022CE660
	ldrsb r0, [r5, #0x73]
	mov r1, #1
	cmp r0, #0
	cmpne r0, #4
	movne r1, #0
	cmp r1, #0
	beq _022CE658
	ldrsh r0, [r5, #0x70]
	bic r0, r0, #0xe
	strh r0, [r5, #0x70]
	ldrsh r0, [r5, #0x70]
	orr r0, r0, #0x80
	strh r0, [r5, #0x70]
	bl ov00_022CB3F8
_022CE658:
	mvn r7, #0x4b
	b _022CE66C
_022CE660:
	add r7, r7, r0
	b _022CE5F4
_022CE668:
	mvn r7, #0x4b
_022CE66C:
	ldrh r2, [sb, #0x20]
	add r1, r6, #0x100
	add r0, r6, #0x104
	strh r2, [r1, #2]
	bl sub_020798D8
	mov r0, r7
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	arm_func_end ov00_022CE558

	arm_func_start ov00_022CE688
ov00_022CE688: ; 0x022CE688
	stmdb sp!, {r3, r4, r5, lr}
	ldr r1, _022CE724 ; =_022B966C
	mov r4, r0
	ldr r0, [r1, #4]
	ldr r5, [r0, #0xa4]
	bl EnableIrqFlag
	cmp r5, #0
	beq _022CE6EC
	ldrh r3, [r5, #0x2e]
	cmp r3, #0
	ldrneh r2, [r5, #0x2c]
	cmpne r2, #0
	beq _022CE6DC
	ldr r1, _022CE728 ; =ov00_023268D0
	cmp r3, r2
	ldr r1, [r1, #0x24]
	movgt r3, r2
	cmp r3, r1
	movgt r3, r1
	mov r5, r3, lsl #1
	b _022CE6F8
_022CE6DC:
	ldr r1, _022CE728 ; =ov00_023268D0
	ldr r1, [r1, #0x24]
	mov r5, r1, lsl #1
	b _022CE6F8
_022CE6EC:
	ldr r1, _022CE728 ; =ov00_023268D0
	ldr r1, [r1, #0x24]
	mov r5, r1, lsl #1
_022CE6F8:
	bl SetIrqFlag
	cmp r5, #0
	ble _022CE71C
	mov r0, r4
	mov r1, r5
	bl _s32_div_f
	cmp r0, #0
	mulgt r0, r5, r0
	ldmgtia sp!, {r3, r4, r5, pc}
_022CE71C:
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022CE724: .word _022B966C
_022CE728: .word ov00_023268D0
	arm_func_end ov00_022CE688

	arm_func_start ov00_022CE72C
ov00_022CE72C: ; 0x022CE72C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r6, r2
	ldr r4, [r6, #0x14]
	ldr r5, [r6, #0x1c]
	cmp r4, r1
	mov r7, r0
	movgt r4, r1
	movgt r5, #0
	bgt _022CE75C
	sub r0, r1, r4
	cmp r5, r0
	movgt r5, r0
_022CE75C:
	cmp r4, #0
	ble _022CE78C
	ldr r0, [r6, #0x10]
	mov r1, r7
	mov r2, r4
	bl MemcpyFast
	ldr r0, [r6, #0x10]
	add r0, r0, r4
	str r0, [r6, #0x10]
	ldr r0, [r6, #0x14]
	sub r0, r0, r4
	str r0, [r6, #0x14]
_022CE78C:
	cmp r5, #0
	ble _022CE7BC
	ldr r0, [r6, #0x18]
	mov r2, r5
	add r1, r7, r4
	bl MemcpyFast
	ldr r0, [r6, #0x18]
	add r0, r0, r5
	str r0, [r6, #0x18]
	ldr r0, [r6, #0x1c]
	sub r0, r0, r5
	str r0, [r6, #0x1c]
_022CE7BC:
	add r0, r4, r5
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022CE72C

	arm_func_start ov00_022CE7C4
ov00_022CE7C4: ; 0x022CE7C4
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r0
	bl ov00_022CF154
	cmp r0, #0
	mvnne r0, #0x1b
	ldmneia sp!, {r3, r4, r5, pc}
	cmp r4, #0
	mov r1, #0
	beq _022CE7F4
	ldrsh r0, [r4, #0x70]
	tst r0, #1
	movne r1, #1
_022CE7F4:
	cmp r1, #0
	mvneq r0, #0x26
	ldmeqia sp!, {r3, r4, r5, pc}
	ldrsh r0, [r4, #0x70]
	tst r0, #4
	beq _022CE818
	ldrsh r0, [r4, #0x70]
	tst r0, #8
	beq _022CE820
_022CE818:
	mvn r0, #0x37
	ldmia sp!, {r3, r4, r5, pc}
_022CE820:
	ldrsh r0, [r4, #0x70]
	orr r0, r0, #8
	strh r0, [r4, #0x70]
	ldr r5, [r4, #0x68]
	cmp r5, #0
	ldrne r1, [r5, #0x10c]
	cmpne r1, #0
	beq _022CE864
	ldrsb r2, [r4, #0x72]
	ldr r0, _022CE86C ; =ov00_022CE870
	bl ov00_022CD108
	movs r1, r0
	mvneq r0, #0x20
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r0, [r5, #0x10c]
	bl ov00_022CD260
	ldmia sp!, {r3, r4, r5, pc}
_022CE864:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022CE86C: .word ov00_022CE870
	arm_func_end ov00_022CE7C4

	arm_func_start ov00_022CE870
ov00_022CE870: ; 0x022CE870
	stmdb sp!, {r3, lr}
	ldr r0, [r0, #4]
	mov r1, #1
	ldrsb r0, [r0, #0x73]
	cmp r0, #0
	cmpne r0, #4
	movne r1, #0
	cmp r1, #0
	beq _022CE898
	bl ov00_022CB3BC
_022CE898:
	mov r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022CE870

	arm_func_start ov00_022CE8A0
ov00_022CE8A0: ; 0x022CE8A0
	stmdb sp!, {r4, lr}
	movs r4, r0
	bmi _022CE8CC
	bl ov00_022CF154
	cmp r0, #0
	beq _022CE8CC
	mov r0, r4
	bl ov00_022CF188
	cmp r0, #0
	moveq r0, #1
	ldmeqia sp!, {r4, pc}
_022CE8CC:
	mov r0, #0
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022CE8A0

	arm_func_start close
close: ; 0x022CE8D4
	stmdb sp!, {r4, lr}
	mov r4, r0
	cmp r4, #0
	mvnle r0, #0x1b
	ldmleia sp!, {r4, pc}
	bl ov00_022CF188
	cmp r0, #0
	mvnne r0, #0x19
	ldmneia sp!, {r4, pc}
	mov r0, r4
	bl ov00_022CF154
	cmp r0, #0
	movne r0, #0
	ldmneia sp!, {r4, pc}
	cmp r4, #0
	mov r1, #0
	beq _022CE924
	ldrsh r0, [r4, #0x70]
	tst r0, #1
	movne r1, #1
_022CE924:
	cmp r1, #0
	mvneq r0, #0x26
	ldmeqia sp!, {r4, pc}
	ldrsh r0, [r4, #0x70]
	tst r0, #0x10
	mvnne r0, #0x19
	ldmneia sp!, {r4, pc}
	ldrsh r0, [r4, #0x70]
	mov r1, #1
	orr r0, r0, #0x18
	strh r0, [r4, #0x70]
	ldrsb r0, [r4, #0x73]
	cmp r0, #0
	cmpne r0, #4
	movne r1, #0
	cmp r1, #0
	beq _022CE974
	ldr r0, [r4, #0x68]
	mov r1, #0
	bl ov00_022CD17C
_022CE974:
	ldr r0, _022CE9A0 ; =ov00_022CE9A4
	mov r1, r4
	mov r2, #1
	bl ov00_022CD108
	mov r1, r0
	mov r2, #0
	mov r0, r4
	str r2, [r1, #8]
	bl ov00_022CD1C8
	mov r0, #0
	ldmia sp!, {r4, pc}
	.align 2, 0
_022CE9A0: .word ov00_022CE9A4
	arm_func_end close

	arm_func_start ov00_022CE9A4
ov00_022CE9A4: ; 0x022CE9A4
	stmdb sp!, {r3, r4, r5, lr}
	ldr r4, [r0, #4]
	mov r1, #1
	ldrsb r0, [r4, #0x73]
	cmp r0, #0
	cmpne r0, #4
	movne r1, #0
	cmp r1, #0
	beq _022CE9E0
	ldr r0, [r4, #0x68]
	add r0, r0, #0x20
	bl sub_02079800
	bl ov00_022CB3BC
	bl ov00_022CB3F8
	bl ov00_022CB224
_022CE9E0:
	bl ov00_022CB14C
	ldrsh r0, [r4, #0x70]
	mov r1, #0
	bic r0, r0, #6
	strh r0, [r4, #0x70]
	ldrsb r0, [r4, #0x73]
	cmp r0, #2
	ldreq r0, [r4, #0x68]
	ldrne r0, [r4, #0x64]
	bl ov00_022CD17C
	bl EnableIrqFlag
	mov r5, r0
	mov r0, r4
	bl ov00_022CF0DC
	mov r0, r4
	bl ov00_022CF0C4
	mov r0, r5
	bl SetIrqFlag
	ldrsh r1, [r4, #0x70]
	mov r0, #0
	orr r1, r1, #0x20
	strh r1, [r4, #0x70]
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022CE9A4

	arm_func_start ov00_022CEA3C
ov00_022CEA3C: ; 0x022CEA3C
	stmdb sp!, {r4, r5, r6, lr}
	movs r4, r0
	ldmeqia sp!, {r4, r5, r6, pc}
	mov r0, #0
	strh r0, [r4, #0x70]
	ldrsb r2, [r4, #0x73]
	mov r1, #1
	cmp r2, #0
	cmpne r2, #4
	movne r1, r0
	cmp r1, #0
	beq _022CEA80
	ldr r0, [r4, #0x68]
	bl ov00_022CEB3C
	ldr r0, [r4, #0x64]
	bl ov00_022CEB3C
	b _022CEB00
_022CEA80:
	cmp r2, #1
	bne _022CEAF0
	ldr r0, [r4, #0x64]
	ldr r0, [r0, #0x104]
	cmp r0, #0
	beq _022CEAB8
	ldr r5, _022CEB38 ; =ov00_02318868
_022CEA9C:
	ldr r1, [r5]
	ldr r6, [r0]
	ldr r1, [r1, #0x1c]
	blx r1
	mov r0, r6
	cmp r6, #0
	bne _022CEA9C
_022CEAB8:
	ldr r0, [r4, #0x64]
	mov r1, #0
	add r0, r0, #0x100
	strh r1, [r0, #8]
	ldr r0, [r4, #0x64]
	str r1, [r0, #0x100]
	ldr r0, [r4, #0x64]
	str r1, [r0, #0x104]
	ldr r0, [r4, #0x64]
	add r0, r0, #0x10c
	bl sub_020798D8
	ldr r0, [r4, #0x64]
	bl ov00_022CEB3C
	b _022CEB00
_022CEAF0:
	cmp r2, #2
	bne _022CEB00
	ldr r0, [r4, #0x68]
	bl ov00_022CEB3C
_022CEB00:
	bl EnableIrqFlag
	mov r5, r0
	mov r0, r4
	bl ov00_022CF0DC
	mov r0, r4
	bl ov00_022CF13C
	ldr r1, _022CEB38 ; =ov00_02318868
	mov r0, r4
	ldr r1, [r1]
	ldr r1, [r1, #0x1c]
	blx r1
	mov r0, r5
	bl SetIrqFlag
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022CEB38: .word ov00_02318868
	arm_func_end ov00_022CEA3C

	arm_func_start ov00_022CEB3C
ov00_022CEB3C: ; 0x022CEB3C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	movs sb, r0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	add r0, sb, #0x20
	bl sub_02079800
	bl EnableIrqFlag
	mov r8, r0
	bl sub_02079C14
	add r1, sp, #0
	mov r0, sb
	mov r2, #0
	bl sub_02079E74
	cmp r0, #0
	beq _022CEBC8
	mov r6, #0
	mvn r7, #0xa
	add r5, sp, #0
	mov r4, r6
_022CEB84:
	ldr r0, [sp]
	cmp r0, #0
	beq _022CEBB0
	ldr r0, [r0, #8]
	cmp r0, #0
	beq _022CEBA8
	mov r1, r7
	mov r2, r6
	bl sub_02079DE0
_022CEBA8:
	ldr r0, [sp]
	bl ov00_022CD148
_022CEBB0:
	mov r0, sb
	mov r1, r5
	mov r2, r4
	bl sub_02079E74
	cmp r0, #0
	bne _022CEB84
_022CEBC8:
	bl sub_02079C48
	bl sub_02079990
	mov r0, r8
	bl SetIrqFlag
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022CEB3C

	arm_func_start ov00_022CEBDC
ov00_022CEBDC: ; 0x022CEBDC
	stmdb sp!, {r3, r4, r5, lr}
	bl EnableIrqFlag
	ldr r4, _022CEC14 ; =ov00_02326930
	mov r5, r0
	ldr r0, [r4]
	cmp r0, #0
	beq _022CEC08
_022CEBF8:
	bl ov00_022CEA3C
	ldr r0, [r4]
	cmp r0, #0
	bne _022CEBF8
_022CEC08:
	mov r0, r5
	bl SetIrqFlag
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022CEC14: .word ov00_02326930
	arm_func_end ov00_022CEBDC

	arm_func_start ov00_022CEC18
ov00_022CEC18: ; 0x022CEC18
	stmdb sp!, {r3, r4, r5, lr}
	ldr r1, _022CECAC ; =ov00_023268C4
	ldr r0, [r1]
	cmp r0, #0
	ldreq r0, _022CECB0 ; =ov00_023250C8
	ldreq r0, [r0]
	streq r0, [r1]
	bl ov00_022CED64
	mvn r4, #0x19
	cmp r0, r4
	bne _022CEC5C
	mov r5, #0x64
_022CEC48:
	mov r0, r5
	bl sub_02079B14
	bl ov00_022CED64
	cmp r0, r4
	beq _022CEC48
_022CEC5C:
	bl ov00_022CD098
	movs r4, r0
	bmi _022CECA4
	bl ov00_022C8508
	mov r0, #0
	bl ov00_022C84F8
	ldr r0, _022CECB4 ; =ov00_02318868
	ldr r1, [r0]
	ldr r0, [r1, #0x28]
	cmp r0, #0
	bne _022CEC98
	ldr r0, _022CECB8 ; =ov00_023268D0
	ldr r1, [r1, #0x1c]
	ldr r0, [r0, #0x1c]
	blx r1
_022CEC98:
	ldr r0, _022CECB4 ; =ov00_02318868
	mov r1, #0
	str r1, [r0]
_022CECA4:
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022CECAC: .word ov00_023268C4
_022CECB0: .word ov00_023250C8
_022CECB4: .word ov00_02318868
_022CECB8: .word ov00_023268D0
	arm_func_end ov00_022CEC18

	arm_func_start ov00_022CECBC
ov00_022CECBC: ; 0x022CECBC
	stmdb sp!, {r4, r5, r6, lr}
	ldr r4, _022CED58 ; =ov00_023268CC
	ldr r5, _022CED5C ; =ov00_0232692C
_022CECC8:
	bl EnableIrqFlag
	ldr r6, [r5]
	cmp r6, #0
	beq _022CECFC
	ldr r2, [r4]
_022CECDC:
	cmp r6, r2
	beq _022CECF0
	ldrsh r1, [r6, #0x70]
	tst r1, #0x10
	beq _022CECFC
_022CECF0:
	ldr r6, [r6, #0x7c]
	cmp r6, #0
	bne _022CECDC
_022CECFC:
	bl SetIrqFlag
	cmp r6, #0
	beq _022CED14
	mov r0, r6
	bl close
	b _022CECC8
_022CED14:
	ldr r0, _022CED5C ; =ov00_0232692C
	ldr r1, [r0]
	cmp r1, #0
	beq _022CED3C
	ldr r0, _022CED58 ; =ov00_023268CC
	ldr r0, [r0]
	cmp r1, r0
	ldreq r0, [r1, #0x7c]
	cmpeq r0, #0
	bne _022CED50
_022CED3C:
	ldr r0, _022CED60 ; =ov00_02326930
	ldr r0, [r0]
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
_022CED50:
	mvn r0, #0x19
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022CED58: .word ov00_023268CC
_022CED5C: .word ov00_0232692C
_022CED60: .word ov00_02326930
	arm_func_end ov00_022CECBC

	arm_func_start ov00_022CED64
ov00_022CED64: ; 0x022CED64
	stmdb sp!, {r4, lr}
	ldr r0, _022CEDDC ; =ov00_023268CC
	ldr r0, [r0]
	cmp r0, #0
	beq _022CEDB8
	bl ov00_022CECBC
	movs r4, r0
	bne _022CEDB0
	ldr r0, _022CEDDC ; =ov00_023268CC
	ldr r0, [r0]
	bl close
	ldr r0, _022CEDDC ; =ov00_023268CC
	ldr r0, [r0]
	bl ov00_022CE8A0
	cmp r0, #0
	ldrne r0, _022CEDDC ; =ov00_023268CC
	movne r1, #0
	strne r1, [r0]
	mvn r4, #0x19
_022CEDB0:
	bl ov00_022CEBDC
	b _022CEDD4
_022CEDB8:
	bl ov00_022C84A8
	cmp r0, #0
	mvneq r4, #0x19
	beq _022CEDD4
	mov r0, #0
	bl ov00_022D71E4
	mov r4, #0
_022CEDD4:
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022CEDDC: .word ov00_023268CC
	arm_func_end ov00_022CED64

	arm_func_start ov00_022CEDE0
ov00_022CEDE0: ; 0x022CEDE0
	stmdb sp!, {r4, r5, lr}
	sub sp, sp, #0x64
	movs r5, r0
	addeq sp, sp, #0x64
	moveq r0, #0
	ldmeqia sp!, {r4, r5, pc}
	ldr r1, _022CEE84 ; =ov00_02318868
	mov r0, #0xfd0
	ldr r1, [r1]
	ldr r1, [r1, #0x18]
	blx r1
	movs r4, r0
	addeq sp, sp, #0x64
	moveq r0, #0
	ldmeqia sp!, {r4, r5, pc}
	add r0, sp, #0
	mov r1, #0
	mov r2, #0x64
	bl MemsetFast
	add r0, r4, #0x368
	add r2, r0, #0x800
	ldr r3, _022CEE88 ; =0x00000B68
	ldr r1, _022CEE8C ; =0x00000466
	add r0, sp, #0
	str r4, [sp, #0x40]
	str r3, [sp, #0x3c]
	str r2, [sp, #0x4c]
	str r1, [sp, #0x48]
	bl ov00_022CB138
	mov r0, r5
	bl ov00_022CCC58
	mov r5, r0
	bl ov00_022CB14C
	ldr r1, _022CEE84 ; =ov00_02318868
	mov r0, r4
	ldr r1, [r1]
	ldr r1, [r1, #0x1c]
	blx r1
	mov r0, r5
	add sp, sp, #0x64
	ldmia sp!, {r4, r5, pc}
	.align 2, 0
_022CEE84: .word ov00_02318868
_022CEE88: .word 0x00000B68
_022CEE8C: .word 0x00000466
	arm_func_end ov00_022CEDE0

	arm_func_start ov00_022CEE90
ov00_022CEE90: ; 0x022CEE90
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r4, r0
	bl EnableIrqFlag
	ldr r1, _022CEED8 ; =ov00_023250D8
	mov r5, r0
	ldmia r1, {r6, r7}
	mov r2, #0
	str r2, [r1]
	mov r0, r4
	str r2, [r1, #4]
	bl ov00_022CCC58
	ldr r1, _022CEED8 ; =ov00_023250D8
	mov r4, r0
	mov r0, r5
	stmia r1, {r6, r7}
	bl SetIrqFlag
	mov r0, r4
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022CEED8: .word ov00_023250D8
	arm_func_end ov00_022CEE90

	arm_func_start ov00_022CEEDC
ov00_022CEEDC: ; 0x022CEEDC
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	bl ov00_022CEF10
	cmp r0, #0
	mvneq r0, #0x26
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r1, _022CEF0C ; =ov00_023250D8
	mov r0, #0
	str r5, [r1]
	str r4, [r1, #4]
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022CEF0C: .word ov00_023250D8
	arm_func_end ov00_022CEEDC

	arm_func_start ov00_022CEF10
ov00_022CEF10: ; 0x022CEF10
	stmdb sp!, {r3, lr}
	ldr r0, _022CEF6C ; =ov00_023250C8
	ldr r2, [r0]
	cmp r2, #0
	bne _022CEF50
	ldr r0, _022CEF70 ; =ov00_023268C8
	ldr r0, [r0]
	and r0, r0, #3
	cmp r0, #1
	bne _022CEF60
	bl GetProcessorMode
	cmp r0, #0x12
	beq _022CEF60
	mov r0, #0xa
	bl sub_02079B14
	b _022CEF60
_022CEF50:
	ldr r0, _022CEF74 ; =ov00_023268C4
	ldr r1, [r0]
	cmp r1, #0
	streq r2, [r0]
_022CEF60:
	ldr r0, _022CEF6C ; =ov00_023250C8
	ldr r0, [r0]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022CEF6C: .word ov00_023250C8
_022CEF70: .word ov00_023268C8
_022CEF74: .word ov00_023268C4
	arm_func_end ov00_022CEF10

	arm_func_start ov00_022CEF78
ov00_022CEF78: ; 0x022CEF78
	stmdb sp!, {r4, r5, r6, lr}
	mov r4, #0
	mov r5, r0
	bl ov00_022CF154
	cmp r0, #0
	orrne r4, r4, #0x80
	bne _022CF040
	ldrsh r0, [r5, #0x70]
	tst r0, #0x40
	ldrsb r0, [r5, #0x73]
	orrne r4, r4, #0x20
	cmp r0, #1
	beq _022CEFB8
	ldrsh r0, [r5, #0x70]
	tst r0, #4
	beq _022CEFE8
_022CEFB8:
	bl EnableIrqFlag
	mov r6, r0
	mov r0, r5
	bl ov00_022CF048
	cmp r0, #0
	mov r0, r5
	orrgt r4, r4, #1
	bl ov00_022CE3C0
	cmp r0, #0
	mov r0, r6
	orrgt r4, r4, #8
	bl SetIrqFlag
_022CEFE8:
	ldrsb r0, [r5, #0x73]
	mov r1, #1
	cmp r0, #0
	cmpne r0, #4
	movne r1, #0
	cmp r1, #0
	beq _022CF040
	ldrsh r0, [r5, #0x70]
	tst r0, #4
	ldrneb r0, [r5, #8]
	cmpne r0, #4
	beq _022CF028
	tst r4, #1
	ldreqsh r0, [r5, #0x70]
	biceq r0, r0, #6
	streqh r0, [r5, #0x70]
_022CF028:
	ldrsh r0, [r5, #0x70]
	tst r0, #2
	bne _022CF040
	ldrsh r0, [r5, #0x70]
	tst r0, #4
	orreq r4, r4, #0x40
_022CF040:
	mov r0, r4
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022CEF78

	arm_func_start ov00_022CF048
ov00_022CF048: ; 0x022CF048
	ldr r2, [r0, #0x64]
	mov r3, #0
	cmp r2, #0
	beq _022CF088
	ldrsb r1, [r0, #0x73]
	cmp r1, #1
	bne _022CF074
	ldr r0, [r2, #0x104]
	cmp r0, #0
	ldrneh r3, [r0, #4]
	b _022CF088
_022CF074:
	cmp r1, #0
	cmpne r1, #4
	ldreq r1, [r0, #0x44]
	ldreq r0, [r2, #0xf8]
	subeq r3, r1, r0
_022CF088:
	mov r0, r3
	bx lr
	arm_func_end ov00_022CF048

	arm_func_start ov00_022CF090
ov00_022CF090: ; 0x022CF090
	add r0, r0, #3
	bic r0, r0, #3
	bx lr
	arm_func_end ov00_022CF090

	arm_func_start ov00_022CF09C
ov00_022CF09C: ; 0x022CF09C
	ldr ip, _022CF0AC ; =ov00_022CF0B4
	mov r1, r0
	ldr r0, _022CF0B0 ; =ov00_0232692C
	bx ip
	.align 2, 0
_022CF0AC: .word ov00_022CF0B4
_022CF0B0: .word ov00_0232692C
	arm_func_end ov00_022CF09C

	arm_func_start ov00_022CF0B4
ov00_022CF0B4: ; 0x022CF0B4
	ldr r2, [r0]
	str r2, [r1, #0x7c]
	str r1, [r0]
	bx lr
	arm_func_end ov00_022CF0B4

	arm_func_start ov00_022CF0C4
ov00_022CF0C4: ; 0x022CF0C4
	ldr ip, _022CF0D4 ; =ov00_022CF0B4
	mov r1, r0
	ldr r0, _022CF0D8 ; =ov00_02326930
	bx ip
	.align 2, 0
_022CF0D4: .word ov00_022CF0B4
_022CF0D8: .word ov00_02326930
	arm_func_end ov00_022CF0C4

	arm_func_start ov00_022CF0DC
ov00_022CF0DC: ; 0x022CF0DC
	ldr ip, _022CF0EC ; =ov00_022CF0F4
	mov r1, r0
	ldr r0, _022CF0F0 ; =ov00_0232692C
	bx ip
	.align 2, 0
_022CF0EC: .word ov00_022CF0F4
_022CF0F0: .word ov00_0232692C
	arm_func_end ov00_022CF0DC

	arm_func_start ov00_022CF0F4
ov00_022CF0F4: ; 0x022CF0F4
	stmdb sp!, {r4, lr}
	mov r4, r1
	bl ov00_022CF110
	cmp r0, #0
	ldrne r1, [r4, #0x7c]
	strne r1, [r0]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022CF0F4

	arm_func_start ov00_022CF110
ov00_022CF110: ; 0x022CF110
	ldr r2, [r0]
	cmp r2, #0
	beq _022CF134
_022CF11C:
	cmp r2, r1
	bxeq lr
	add r0, r2, #0x7c
	ldr r2, [r2, #0x7c]
	cmp r2, #0
	bne _022CF11C
_022CF134:
	mov r0, #0
	bx lr
	arm_func_end ov00_022CF110

	arm_func_start ov00_022CF13C
ov00_022CF13C: ; 0x022CF13C
	ldr ip, _022CF14C ; =ov00_022CF0F4
	mov r1, r0
	ldr r0, _022CF150 ; =ov00_02326930
	bx ip
	.align 2, 0
_022CF14C: .word ov00_022CF0F4
_022CF150: .word ov00_02326930
	arm_func_end ov00_022CF13C

	arm_func_start ov00_022CF154
ov00_022CF154: ; 0x022CF154
	stmdb sp!, {r3, lr}
	mov r1, r0
	cmp r1, #0
	ble _022CF174
	ldr r0, _022CF184 ; =ov00_0232692C
	bl ov00_022CF110
	cmp r0, #0
	bne _022CF17C
_022CF174:
	mov r0, #1
	ldmia sp!, {r3, pc}
_022CF17C:
	mov r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022CF184: .word ov00_0232692C
	arm_func_end ov00_022CF154

	arm_func_start ov00_022CF188
ov00_022CF188: ; 0x022CF188
	stmdb sp!, {r3, lr}
	mov r1, r0
	ldr r0, _022CF1A8 ; =ov00_02326930
	bl ov00_022CF110
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022CF1A8: .word ov00_02326930
	arm_func_end ov00_022CF188

	arm_func_start socket
socket: ; 0x022CF1AC
	stmdb sp!, {r3, lr}
	cmp r1, #1
	bne _022CF1C4
	ldr r0, _022CF1D0 ; =ov00_02318888
	bl ov00_022CD338
	ldmia sp!, {r3, pc}
_022CF1C4:
	ldr r0, _022CF1D4 ; =ov00_02318870
	bl ov00_022CD338
	ldmia sp!, {r3, pc}
	.align 2, 0
_022CF1D0: .word ov00_02318888
_022CF1D4: .word ov00_02318870
	arm_func_end socket

	arm_func_start bind
bind: ; 0x022CF1D8
	ldrh r1, [r1, #2]
	ldr ip, _022CF200 ; =ov00_022CD690
	mov r2, r1, asr #8
	mov r1, r1, lsl #8
	and r2, r2, #0xff
	and r1, r1, #0xff00
	orr r1, r2, r1
	mov r1, r1, lsl #0x10
	mov r1, r1, lsr #0x10
	bx ip
	.align 2, 0
_022CF200: .word ov00_022CD690
	arm_func_end bind

	arm_func_start connect
connect: ; 0x022CF204
	stmdb sp!, {r4, lr}
	ldrh r2, [r1, #2]
	ldr lr, [r1, #4]
	mov r4, r2, asr #8
	mov r1, r2, lsl #8
	mov r3, lr, lsr #0x18
	mov r2, lr, lsr #8
	mov ip, lr, lsl #8
	mov lr, lr, lsl #0x18
	and r4, r4, #0xff
	and r1, r1, #0xff00
	orr r1, r4, r1
	mov r1, r1, lsl #0x10
	and r3, r3, #0xff
	and r2, r2, #0xff00
	and ip, ip, #0xff0000
	orr r2, r3, r2
	and r3, lr, #0xff000000
	orr r2, ip, r2
	mov r1, r1, lsr #0x10
	orr r2, r3, r2
	bl ov00_022CD700
	ldmia sp!, {r4, pc}
	arm_func_end connect

	arm_func_start recv
recv: ; 0x022CF260
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	mov ip, #0
	str ip, [sp]
	str r3, [sp, #4]
	mov r3, ip
	bl ov00_022CD8C4
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	arm_func_end recv

	arm_func_start recvfrom
recvfrom: ; 0x022CF284
	stmdb sp!, {r3, lr}
	sub sp, sp, #0x10
	add ip, sp, #0xc
	str ip, [sp]
	str r3, [sp, #4]
	add r3, sp, #8
	bl ov00_022CD8C4
	cmp r0, #0
	addlt sp, sp, #0x10
	ldmltia sp!, {r3, pc}
	ldr r1, [sp, #0x18]
	cmp r1, #0
	addeq sp, sp, #0x10
	ldmeqia sp!, {r3, pc}
	ldrh r2, [sp, #8]
	mov r3, r2, asr #8
	mov r2, r2, lsl #8
	and r3, r3, #0xff
	and r2, r2, #0xff00
	orr r2, r3, r2
	strh r2, [r1, #2]
	ldr lr, [sp, #0xc]
	mov r3, lr, lsr #0x18
	mov r2, lr, lsr #8
	mov ip, lr, lsl #8
	mov lr, lr, lsl #0x18
	and r3, r3, #0xff
	and r2, r2, #0xff00
	and ip, ip, #0xff0000
	orr r2, r3, r2
	and r3, lr, #0xff000000
	orr r2, ip, r2
	orr r2, r3, r2
	str r2, [r1, #4]
	add sp, sp, #0x10
	ldmia sp!, {r3, pc}
	arm_func_end recvfrom

	arm_func_start send
send: ; 0x022CF314
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	mov ip, #0
	str ip, [sp]
	str r3, [sp, #4]
	mov r3, ip
	bl ov00_022CE124
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	arm_func_end send

	arm_func_start sendto
sendto: ; 0x022CF338
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #8
	ldr r5, [sp, #0x20]
	cmp r5, #0
	moveq r5, #0
	moveq r4, r5
	beq _022CF3A4
	ldrh r4, [r5, #2]
	ldr r6, [r5, #4]
	mov r7, r4, asr #8
	mov ip, r4, lsl #8
	mov r4, r6, lsr #0x18
	mov lr, r6, lsr #8
	mov r5, r6, lsl #8
	mov r6, r6, lsl #0x18
	and r7, r7, #0xff
	and ip, ip, #0xff00
	orr r7, r7, ip
	and r4, r4, #0xff
	and lr, lr, #0xff00
	and r5, r5, #0xff0000
	orr r4, r4, lr
	mov ip, r7, lsl #0x10
	orr r4, r5, r4
	and r6, r6, #0xff000000
	mov r5, ip, lsr #0x10
	orr r4, r6, r4
_022CF3A4:
	str r4, [sp]
	str r3, [sp, #4]
	mov r3, r5
	bl ov00_022CE124
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end sendto

	arm_func_start ov00_022CF3BC
ov00_022CF3BC: ; 0x022CF3BC
	ldr ip, _022CF3C4 ; =ov00_022CE7C4
	bx ip
	.align 2, 0
_022CF3C4: .word ov00_022CE7C4
	arm_func_end ov00_022CF3BC

	arm_func_start CloseVeneer
CloseVeneer: ; 0x022CF3C8
	ldr ip, _022CF3D0 ; =close
	bx ip
	.align 2, 0
_022CF3D0: .word close
	arm_func_end CloseVeneer

	arm_func_start ov00_022CF3D4
ov00_022CF3D4: ; 0x022CF3D4
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	bl ov00_022CEDE0
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r0, _022CF47C ; =ov00_023269BC
	ldr r2, _022CF480 ; =0x00000101
	mov r1, #0
	bl MemsetFast
	ldr r0, _022CF47C ; =ov00_023269BC
	ldr r2, _022CF480 ; =0x00000101
	mov r1, r5
	bl sub_02085244
	mov r3, r4, lsr #0x18
	mov r2, r4, lsr #8
	mov ip, r4, lsl #8
	mov lr, r4, lsl #0x18
	ldr r4, _022CF47C ; =ov00_023269BC
	ldr r1, _022CF484 ; =ov00_02326934
	mov r0, #0
	str r4, [r1, #0x20]
	str r0, [r1, #0x24]
	mov r4, #2
	strh r4, [r1, #0x28]
	mov r4, #4
	ldr r5, _022CF488 ; =ov00_0232694C
	strh r4, [r1, #0x2a]
	and r3, r3, #0xff
	and r2, r2, #0xff00
	ldr r4, _022CF48C ; =ov00_02326934
	str r5, [r1, #0x2c]
	str r4, [r1, #0x18]
	and ip, ip, #0xff0000
	orr r2, r3, r2
	and r3, lr, #0xff000000
	orr r2, ip, r2
	str r0, [r1, #0x1c]
	orr r2, r3, r2
	ldr r0, _022CF490 ; =ov00_02326954
	str r2, [r1]
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022CF47C: .word ov00_023269BC
_022CF480: .word 0x00000101
_022CF484: .word ov00_02326934
_022CF488: .word ov00_0232694C
_022CF48C: .word ov00_02326934
_022CF490: .word ov00_02326954
	arm_func_end ov00_022CF3D4

	arm_func_start ov00_022CF494
ov00_022CF494: ; 0x022CF494
	stmdb sp!, {r4, r5, r6, lr}
	movs r5, r0
	mov r4, r1
	mvneq r0, #0x26
	ldmeqia sp!, {r4, r5, r6, pc}
	bl ov00_022CEF10
	cmp r5, #0
	ldrneh r1, [r5, #0x74]
	mov r2, r0, lsr #0x18
	mov r6, #8
	moveq r1, #0
	cmp r0, #0
	moveq r1, #0
	mov r1, r1, lsl #0x10
	mov r3, r1, lsr #0x10
	mov r5, r3, asr #8
	mov lr, r3, lsl #8
	strb r6, [r4]
	mov r6, #2
	mov r1, r0, lsr #8
	mov r3, r0, lsl #8
	mov ip, r0, lsl #0x18
	and r0, r1, #0xff00
	and r2, r2, #0xff
	orr r0, r2, r0
	and r1, r3, #0xff0000
	and r5, r5, #0xff
	and lr, lr, #0xff00
	strb r6, [r4, #1]
	orr r3, r5, lr
	and r2, ip, #0xff000000
	orr r0, r1, r0
	strh r3, [r4, #2]
	orr r0, r2, r0
	str r0, [r4, #4]
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022CF494

	arm_func_start ov00_022CF528
ov00_022CF528: ; 0x022CF528
	stmdb sp!, {r3, lr}
	bl ov00_022CEF10
	mov r2, r0, lsr #0x18
	mov r1, r0, lsr #8
	mov r3, r0, lsl #8
	mov ip, r0, lsl #0x18
	and r2, r2, #0xff
	and r0, r1, #0xff00
	and r1, r3, #0xff0000
	orr r0, r2, r0
	and r2, ip, #0xff000000
	orr r0, r1, r0
	orr r0, r2, r0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022CF528

	arm_func_start ov00_022CF560
ov00_022CF560: ; 0x022CF560
	stmdb sp!, {r3, r4, r5, lr}
	ldr ip, [r1]
	ldr r0, [r0]
	mov r2, ip, lsr #0x18
	mov r4, r0, lsr #0x18
	mov lr, r0, lsr #8
	mov r1, ip, lsr #8
	mov r5, r0, lsl #8
	mov r3, ip, lsl #8
	mov r0, r0, lsl #0x18
	mov ip, ip, lsl #0x18
	and r4, r4, #0xff
	and lr, lr, #0xff00
	and r2, r2, #0xff
	and r1, r1, #0xff00
	and r5, r5, #0xff0000
	orr r4, r4, lr
	and r3, r3, #0xff0000
	orr r1, r2, r1
	and lr, r0, #0xff000000
	orr r0, r5, r4
	and r2, ip, #0xff000000
	orr r1, r3, r1
	orr r0, lr, r0
	orr r1, r2, r1
	bl ov00_022CEEDC
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022CF560

	arm_func_start fcntl
fcntl: ; 0x022CF5CC
	cmp r0, #0
	mvneq r0, #0
	bxeq lr
	cmp r1, #3
	beq _022CF5EC
	cmp r1, #4
	beq _022CF600
	b _022CF614
_022CF5EC:
	ldrsb r0, [r0, #0x72]
	cmp r0, #1
	moveq r0, #0
	movne r0, #4
	bx lr
_022CF600:
	tst r2, #4
	movne r1, #0
	strneb r1, [r0, #0x72]
	moveq r1, #1
	streqb r1, [r0, #0x72]
_022CF614:
	mov r0, #0
	bx lr
	arm_func_end fcntl

	arm_func_start ov00_022CF61C
ov00_022CF61C: ; 0x022CF61C
	stmdb sp!, {r4, lr}
	ldr r1, _022CF644 ; =ov00_02326934
	add r4, r0, #4
	ldr r2, [r1, #0xc]
	mov r1, r4
	mov r0, #0
	blx r2
	cmp r0, #0
	strne r4, [r0], #4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022CF644: .word ov00_02326934
	arm_func_end ov00_022CF61C

	arm_func_start ov00_022CF648
ov00_022CF648: ; 0x022CF648
	stmdb sp!, {r3, lr}
	cmp r0, #0
	ldmeqia sp!, {r3, pc}
	ldr r1, _022CF670 ; =ov00_02326934
	ldr r2, [r0, #-4]
	ldr r3, [r1, #4]
	sub r1, r0, #4
	mov r0, #0
	blx r3
	ldmia sp!, {r3, pc}
	.align 2, 0
_022CF670: .word ov00_02326934
	arm_func_end ov00_022CF648

	arm_func_start ov00_022CF674
ov00_022CF674: ; 0x022CF674
	stmdb sp!, {r4, r5, r6, lr}
	ldr r1, [r0, #0xc]
	ldr ip, _022CF7D8 ; =ov00_022CF61C
	cmp r1, #1
	moveq r2, #1
	ldr r1, _022CF7DC ; =ov00_02326934
	movne r2, #0
	str r2, [r1, #0x40]
	ldr r6, [r0, #0x10]
	ldr r3, _022CF7E0 ; =ov00_022CF648
	mov r4, r6, lsr #0x18
	mov r2, r6, lsr #8
	mov r5, r6, lsl #8
	and r4, r4, #0xff
	and r2, r2, #0xff00
	mov r6, r6, lsl #0x18
	orr r2, r4, r2
	and r5, r5, #0xff0000
	and r4, r6, #0xff000000
	orr r2, r5, r2
	orr r2, r4, r2
	str r2, [r1, #0x44]
	ldr lr, [r0, #0x14]
	mov r2, #0x40
	mov r5, lr, lsr #0x18
	mov r4, lr, lsr #8
	mov r6, lr, lsl #8
	and r5, r5, #0xff
	and r4, r4, #0xff00
	mov lr, lr, lsl #0x18
	orr r4, r5, r4
	and r6, r6, #0xff0000
	and r5, lr, #0xff000000
	orr r4, r6, r4
	orr r4, r5, r4
	str r4, [r1, #0x48]
	ldr lr, [r0, #0x18]
	mov r5, lr, lsr #0x18
	mov r4, lr, lsr #8
	mov r6, lr, lsl #8
	and r5, r5, #0xff
	and r4, r4, #0xff00
	mov lr, lr, lsl #0x18
	orr r4, r5, r4
	and r6, r6, #0xff0000
	and r5, lr, #0xff000000
	orr r4, r6, r4
	orr r4, r5, r4
	str r4, [r1, #0x4c]
	ldr lr, [r0, #0x1c]
	mov r5, lr, lsr #0x18
	mov r4, lr, lsr #8
	mov r6, lr, lsl #8
	and r5, r5, #0xff
	and r4, r4, #0xff00
	mov lr, lr, lsl #0x18
	orr r4, r5, r4
	and r6, r6, #0xff0000
	and r5, lr, #0xff000000
	orr r4, r6, r4
	orr r4, r5, r4
	str r4, [r1, #0x50]
	ldr r6, [r0, #0x20]
	mov r4, r6, lsr #0x18
	mov lr, r6, lsr #8
	mov r5, r6, lsl #8
	mov r6, r6, lsl #0x18
	and r4, r4, #0xff
	and lr, lr, #0xff00
	and r5, r5, #0xff0000
	orr r4, r4, lr
	and r6, r6, #0xff000000
	orr r4, r5, r4
	orr r4, r6, r4
	str r4, [r1, #0x54]
	str ip, [r1, #0x58]
	str r3, [r1, #0x5c]
	ldr r3, [r0, #4]
	str r3, [r1, #0xc]
	ldr r3, [r0, #8]
	str r3, [r1, #4]
	str r2, [r1, #0x60]
	ldr r2, [r0, #0x2c]
	str r2, [r1, #0x70]
	ldr r2, [r0, #0x30]
	ldr r0, _022CF7E4 ; =ov00_02326974
	str r2, [r1, #0x74]
	bl ov00_022CCD90
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022CF7D8: .word ov00_022CF61C
_022CF7DC: .word ov00_02326934
_022CF7E0: .word ov00_022CF648
_022CF7E4: .word ov00_02326974
	arm_func_end ov00_022CF674

	arm_func_start ov00_022CF7E8
ov00_022CF7E8: ; 0x022CF7E8
	ldr ip, _022CF7F0 ; =ov00_022CEC18
	bx ip
	.align 2, 0
_022CF7F0: .word ov00_022CEC18
	arm_func_end ov00_022CF7E8

	arm_func_start ov00_022CF7F4
ov00_022CF7F4: ; 0x022CF7F4
	stmdb sp!, {r0, r1, r2, r3}
	stmdb sp!, {r3, lr}
	ldr r2, _022CF820 ; =ov00_023269AC
	add r1, sp, #8
	mov r0, #2
	mov r3, #0x10
	bl ov00_022CF874
	ldr r0, _022CF820 ; =ov00_023269AC
	ldmia sp!, {r3, lr}
	add sp, sp, #0x10
	bx lr
	.align 2, 0
_022CF820: .word ov00_023269AC
	arm_func_end ov00_022CF7F4

	arm_func_start ov00_022CF824
ov00_022CF824: ; 0x022CF824
	stmdb sp!, {r4, lr}
	mov r4, r1
	bl ov00_022CEE90
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	mov r2, r0, lsr #0x18
	mov r1, r0, lsr #8
	mov r3, r0, lsl #8
	mov ip, r0, lsl #0x18
	and r2, r2, #0xff
	and r0, r1, #0xff00
	and r1, r3, #0xff0000
	orr r0, r2, r0
	and r2, ip, #0xff000000
	orr r0, r1, r0
	orr r0, r2, r0
	str r0, [r4]
	mov r0, #1
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022CF824

	arm_func_start ov00_022CF874
ov00_022CF874: ; 0x022CF874
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #0x14
	cmp r0, #2
	mov r4, r2
	addne sp, sp, #0x14
	movne r0, #0
	ldmneia sp!, {r3, r4, pc}
	cmp r3, #0x10
	addlo sp, sp, #0x14
	movlo r0, #0
	ldmloia sp!, {r3, r4, pc}
	mov r0, r1
	add r1, sp, #0x10
	mov r2, #4
	bl MemcpyFast
	ldr r0, [sp, #0x10]
	add r1, sp, #0xc
	bl ov00_022CF8F8
	ldrb r1, [sp, #0xe]
	ldr r2, _022CF8F4 ; =ov00_023188B8
	mov r0, r4
	str r1, [sp]
	ldrb r3, [sp, #0xd]
	mov r1, #0x10
	str r3, [sp, #4]
	ldrb r3, [sp, #0xc]
	str r3, [sp, #8]
	ldrb r3, [sp, #0xf]
	bl sub_0207911C
	mov r0, r4
	add sp, sp, #0x14
	ldmia sp!, {r3, r4, pc}
	.align 2, 0
_022CF8F4: .word ov00_023188B8
	arm_func_end ov00_022CF874

	arm_func_start ov00_022CF8F8
ov00_022CF8F8: ; 0x022CF8F8
	mov r2, r0, lsr #0x18
	strb r2, [r1]
	mov r2, r0, lsr #0x10
	strb r2, [r1, #1]
	mov r2, r0, lsr #8
	strb r2, [r1, #2]
	strb r0, [r1, #3]
	bx lr
	arm_func_end ov00_022CF8F8

	arm_func_start ov00_022CF918
ov00_022CF918: ; 0x022CF918
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov sb, r2
	mov r8, r3
	mvn r2, #0
	cmp r8, r2
	cmpeq sb, r2
	movne fp, #1
	str r0, [sp]
	mov sl, r1
	moveq fp, #0
_022CF940:
	mov r6, #0
	ldr r4, [sp]
	mov r5, r6
	cmp sl, #0
	bls _022CF980
_022CF954:
	ldrsh r1, [r4, #4]
	ldr r0, [r4]
	orr r7, r1, #0xe0
	bl ov00_022CEF78
	ands r0, r7, r0
	strh r0, [r4, #6]
	add r5, r5, #1
	addne r6, r6, #1
	add r4, r4, #8
	cmp r5, sl
	blo _022CF954
_022CF980:
	cmp r6, #0
	bgt _022CF9C0
	cmp fp, #0
	beq _022CF9A4
	mov r0, #0
	subs r0, r0, sb
	mov r0, #0
	sbcs r0, r0, r8
	bge _022CF9C0
_022CF9A4:
	mov r0, #1
	bl sub_02079B14
	ldr r0, _022CF9C8 ; =0x0000020B
	subs sb, sb, r0
	mov r0, #0
	sbc r8, r8, r0
	b _022CF940
_022CF9C0:
	mov r0, r6
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022CF9C8: .word 0x0000020B
	arm_func_end ov00_022CF918

	arm_func_start ov00_022CF9CC
ov00_022CF9CC: ; 0x022CF9CC
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	bl ov00_022CF154
	cmp r0, #0
	mvnne r0, #0x1b
	ldmneia sp!, {r3, r4, r5, pc}
	ldrsb r0, [r5, #0x73]
	mov r1, #1
	cmp r0, #0
	cmpne r0, #4
	movne r1, #0
	cmp r1, #0
	mvneq r0, #0x1b
	ldmeqia sp!, {r3, r4, r5, pc}
	cmp r5, #0
	mov r1, #0
	beq _022CFA20
	ldrsh r0, [r5, #0x70]
	tst r0, #1
	movne r1, #1
_022CFA20:
	cmp r1, #0
	mvneq r0, #0x26
	ldmeqia sp!, {r3, r4, r5, pc}
	ldrsh r0, [r5, #0x70]
	tst r0, #2
	mvnne r0, #0x1b
	ldmneia sp!, {r3, r4, r5, pc}
	mov r0, r5
	mov r1, r4
	bl ov00_022CFA4C
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022CF9CC

	arm_func_start ov00_022CFA4C
ov00_022CFA4C: ; 0x022CFA4C
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	ldr r0, _022CFA84 ; =ov00_022CFA88
	mov r1, r5
	mov r2, #1
	bl ov00_022CD108
	movs r1, r0
	mvneq r0, #0x20
	ldmeqia sp!, {r3, r4, r5, pc}
	mov r0, r5
	str r4, [r1, #0x10]
	bl ov00_022CD250
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022CFA84: .word ov00_022CFA88
	arm_func_end ov00_022CFA4C

	arm_func_start ov00_022CFA88
ov00_022CFA88: ; 0x022CFA88
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	ldr r4, [r7, #4]
	ldr r5, [r4, #0x64]
	add r0, r5, #0xe0
	ldr r6, [r5, #0xc4]
	bl sub_0207A048
	ldr r1, [r7, #0x10]
	cmp r1, #0
	beq _022CFAC8
	mov r0, #1
	str r1, [r6, #0xc]
	bl ov00_022D2B44
	mov r0, #4
	strb r0, [r4, #0x73]
	b _022CFADC
_022CFAC8:
	mov r0, #0
	strb r0, [r4, #0x73]
	bl ov00_022D2B44
	mov r0, #0
	str r0, [r6, #0xc]
_022CFADC:
	add r0, r5, #0xe0
	bl sub_0207A0CC
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022CFA88

	arm_func_start ov00_022CFAEC
ov00_022CFAEC: ; 0x022CFAEC
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r7, r0
	bl EnableIrqFlag
	mov r4, #0
	ldr r6, _022CFB7C ; =ov00_02326AC8
	mov r5, r0
	strb r4, [r7, #0x30]
	mov r8, #0x20
_022CFB0C:
	ldrb r0, [r6, #0x5a]
	cmp r0, #0
	beq _022CFB60
	ldr r0, [r6, #0x54]
	cmp r0, #0
	ldreqh r0, [r6, #0x58]
	cmpeq r0, #0
	bne _022CFB60
	mov r0, r6
	mov r2, r8
	add r1, r7, #0x74
	bl memcmp
	cmp r0, #0
	bne _022CFB60
	mov r1, r7
	add r0, r6, #0x20
	mov r2, #0x30
	bl MemcpyFast
	mov r0, #1
	strb r0, [r7, #0x30]
	b _022CFB70
_022CFB60:
	add r4, r4, #1
	cmp r4, #4
	add r6, r6, #0x5c
	blt _022CFB0C
_022CFB70:
	mov r0, r5
	bl SetIrqFlag
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022CFB7C: .word ov00_02326AC8
	arm_func_end ov00_022CFAEC

	arm_func_start ov00_022CFB80
ov00_022CFB80: ; 0x022CFB80
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r8, r0
	mov r7, r1
	mov r6, r2
	bl EnableIrqFlag
	mov r1, #0
	ldr r5, _022CFC1C ; =ov00_02326AC8
	mov r4, r0
	strb r1, [r8, #0x30]
_022CFBA4:
	ldrb r0, [r5, #0x5a]
	cmp r0, #0
	beq _022CFC00
	ldr r0, [r5, #0x54]
	cmp r0, r7
	ldreqh r0, [r5, #0x58]
	cmpeq r0, r6
	bne _022CFC00
	mov r0, r5
	add r1, r8, #0x74
	mov r2, #0x20
	bl MemcpyFast
	mov r1, r8
	add r0, r5, #0x20
	mov r2, #0x30
	bl MemcpyFast
	bl sub_0207AE44
	mov r0, r0, lsr #0x10
	orr r0, r0, r1, lsl #16
	str r0, [r5, #0x50]
	mov r0, #1
	strb r0, [r8, #0x30]
	b _022CFC10
_022CFC00:
	add r1, r1, #1
	cmp r1, #4
	add r5, r5, #0x5c
	blt _022CFBA4
_022CFC10:
	mov r0, r4
	bl SetIrqFlag
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022CFC1C: .word ov00_02326AC8
	arm_func_end ov00_022CFB80

	arm_func_start ov00_022CFC20
ov00_022CFC20: ; 0x022CFC20
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r8, r0
	mov r7, r1
	mov r6, r2
	bl EnableIrqFlag
	mov r4, r0
	bl sub_0207AE44
	ldr sb, _022CFD08 ; =ov00_02326AC8
	mov r5, r0, lsr #0x10
	mov r2, #0
	mov r0, r2
	mov r3, sb
	orr r5, r5, r1, lsl #16
	mvn ip, #0
_022CFC58:
	ldrb lr, [r3, #0x5a]
	cmp lr, #0
	cmpne r7, #0
	beq _022CFC8C
	ldr r1, [r3, #0x54]
	cmp r7, r1
	bne _022CFC8C
	cmp r6, #0
	beq _022CFC8C
	ldrh r1, [r3, #0x58]
	cmp r6, r1
	moveq sb, r3
	beq _022CFCC8
_022CFC8C:
	cmp r2, ip
	beq _022CFCB8
	cmp lr, #0
	moveq r2, ip
	moveq sb, r3
	beq _022CFCB8
	ldr r1, [r3, #0x50]
	sub r1, r5, r1
	cmp r1, r2
	movhi r2, r1
	movhi sb, r3
_022CFCB8:
	add r0, r0, #1
	cmp r0, #4
	add r3, r3, #0x5c
	blt _022CFC58
_022CFCC8:
	mov r1, sb
	add r0, r8, #0x74
	mov r2, #0x20
	bl MemcpyFast
	mov r0, r8
	add r1, sb, #0x20
	mov r2, #0x30
	bl MemcpyFast
	str r5, [sb, #0x50]
	mov r0, #1
	strb r0, [sb, #0x5a]
	str r7, [sb, #0x54]
	mov r0, r4
	strh r6, [sb, #0x58]
	bl SetIrqFlag
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022CFD08: .word ov00_02326AC8
	arm_func_end ov00_022CFC20

	arm_func_start ov00_022CFD0C
ov00_022CFD0C: ; 0x022CFD0C
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r8, r0
	bl EnableIrqFlag
	ldr r7, _022CFD70 ; =ov00_02326AC8
	mov r6, r0
	mov r5, #0
	mov r4, #0x20
_022CFD28:
	ldrb r0, [r7, #0x5a]
	cmp r0, #0
	beq _022CFD54
	mov r0, r7
	mov r2, r4
	add r1, r8, #0x74
	bl memcmp
	cmp r0, #0
	moveq r0, #0
	streqb r0, [r7, #0x5a]
	beq _022CFD64
_022CFD54:
	add r5, r5, #1
	cmp r5, #4
	add r7, r7, #0x5c
	blt _022CFD28
_022CFD64:
	mov r0, r6
	bl SetIrqFlag
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022CFD70: .word ov00_02326AC8
	arm_func_end ov00_022CFD0C

	arm_func_start ov00_022CFD74
ov00_022CFD74: ; 0x022CFD74
	stmdb sp!, {lr}
	sub sp, sp, #0x1c
	add r0, sp, #0xc
	bl sub_02082748
	add r0, sp, #0
	bl sub_020827F4
	add r0, sp, #0xc
	add r1, sp, #0
	bl sub_02082FDC
	ldr r1, _022CFDA8 ; =0x386D4380
	add r0, r0, r1
	add sp, sp, #0x1c
	ldmia sp!, {pc}
	.align 2, 0
_022CFDA8: .word 0x386D4380
	arm_func_end ov00_022CFD74

	arm_func_start ov00_022CFDAC
ov00_022CFDAC: ; 0x022CFDAC
	ldr r0, _022CFDB8 ; =ov00_023188CC
	ldr r0, [r0, #4]
	bx lr
	.align 2, 0
_022CFDB8: .word ov00_023188CC
	arm_func_end ov00_022CFDAC

	arm_func_start ov00_022CFDBC
ov00_022CFDBC: ; 0x022CFDBC
	ldr r1, _022CFDC8 ; =ov00_023188CC
	str r0, [r1, #4]
	bx lr
	.align 2, 0
_022CFDC8: .word ov00_023188CC
	arm_func_end ov00_022CFDBC

	arm_func_start ov00_022CFDCC
ov00_022CFDCC: ; 0x022CFDCC
	stmdb sp!, {r3, r4, r5, lr}
	ldr r0, _022CFE10 ; =ov00_023188CC
	ldr r0, [r0, #4]
	cmp r0, #0x20
	mvnhs r0, #0
	ldmhsia sp!, {r3, r4, r5, pc}
	ldr r0, _022CFE14 ; =_022B966C
	ldr r5, [r0, #4]
	mov r0, r5
	bl sub_02079B0C
	ldr r1, _022CFE10 ; =ov00_023188CC
	mov r4, r0
	ldr r1, [r1, #4]
	mov r0, r5
	bl sub_02079A64
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022CFE10: .word ov00_023188CC
_022CFE14: .word _022B966C
	arm_func_end ov00_022CFDCC

	arm_func_start ov00_022CFE18
ov00_022CFE18: ; 0x022CFE18
	stmdb sp!, {r3, lr}
	mov r1, r0
	cmp r1, #0x20
	ldmhsia sp!, {r3, pc}
	ldr r0, _022CFE38 ; =_022B966C
	ldr r0, [r0, #4]
	bl sub_02079A64
	ldmia sp!, {r3, pc}
	.align 2, 0
_022CFE38: .word _022B966C
	arm_func_end ov00_022CFE18

	arm_func_start ov00_022CFE3C
ov00_022CFE3C: ; 0x022CFE3C
	ldr r2, _022CFE60 ; =_022B966C
	ldr r2, [r2, #4]
	ldr r2, [r2, #0xa4]
	cmp r2, #0
	ldrne r2, [r2, #0xc]
	cmpne r2, #0
	strne r0, [r2, #0x814]
	strne r1, [r2, #0x818]
	bx lr
	.align 2, 0
_022CFE60: .word _022B966C
	arm_func_end ov00_022CFE3C

	arm_func_start ov00_022CFE64
ov00_022CFE64: ; 0x022CFE64
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	ldr r6, [r0, #0x818]
	mov r8, r1
	cmp r6, #0
	mov r4, #0
	ble _022CFEA8
	ldr r5, [r0, #0x814]
_022CFE80:
	ldr r7, [r5, r4, lsl #2]
	mov r1, r8
	ldr r0, [r7]
	bl strcmp
	cmp r0, #0
	moveq r0, r7
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	add r4, r4, #1
	cmp r4, r6
	blt _022CFE80
_022CFEA8:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022CFE64

	arm_func_start ov00_022CFEB0
ov00_022CFEB0: ; 0x022CFEB0
	ldr r1, [r0]
	ldrb r2, [r1]
	add r3, r1, #1
	tst r2, #0x80
	beq _022CFEF4
	ands r1, r2, #0x7f
	sub ip, r1, #1
	mov r2, #0
	beq _022CFEF4
_022CFED4:
	tst r2, #0xff000000
	mvnne r0, #0
	bxne lr
	ldrb r1, [r3], #1
	cmp ip, #0
	sub ip, ip, #1
	add r2, r1, r2, lsl #8
	bne _022CFED4
_022CFEF4:
	str r3, [r0]
	mov r0, r2
	bx lr
	arm_func_end ov00_022CFEB0

	arm_func_start ov00_022CFF00
ov00_022CFF00: ; 0x022CFF00
	ldrsb r3, [r0]
	mov ip, r0
	cmp r3, #0
	beq _022CFF48
_022CFF10:
	ldrsb r3, [r0, #1]!
	cmp r3, #0
	bne _022CFF10
	sub r3, r0, ip
	cmp r3, #0xff
	bxge lr
	mov r3, #0x2c
	strb r3, [r0]
	mov r3, #0x20
	strb r3, [r0, #1]
	add r0, r0, #2
	b _022CFF48
_022CFF40:
	ldrsb r3, [r1], #1
	strb r3, [r0], #1
_022CFF48:
	cmp r2, #0
	sub r2, r2, #1
	beq _022CFF60
	sub r3, r0, ip
	cmp r3, #0xff
	blt _022CFF40
_022CFF60:
	mov r1, #0
	strb r1, [r0]
	bx lr
	arm_func_end ov00_022CFF00

	arm_func_start ov00_022CFF6C
ov00_022CFF6C: ; 0x022CFF6C
	stmdb sp!, {r4, lr}
	ldrb ip, [r0, #1]
	ldrb r3, [r0], #2
	mov r2, #0xa
	cmp r1, #0x17
	mla r1, r3, r2, ip
	sub lr, r1, #0x210
	bne _022CFFA0
	cmp lr, #0x32
	addlo r4, lr, #0x7d0
	addhs r1, lr, #0x36c
	addhs r4, r1, #0x400
	b _022CFFB8
_022CFFA0:
	ldrb ip, [r0, #1]
	ldrb r3, [r0], #2
	mov r1, #0x64
	mla r2, r3, r2, ip
	sub r2, r2, #0x210
	mla r4, lr, r1, r2
_022CFFB8:
	ldrb ip, [r0, #1]
	ldrb r3, [r0]
	mov r1, #0xa
	ldrb r2, [r0, #3]
	ldrb r0, [r0, #2]
	mla ip, r3, r1, ip
	mla r1, r0, r1, r2
	sub r0, ip, #0x210
	mov r0, r0, lsl #8
	add r2, r0, r4, lsl #16
	sub r0, r1, #0x210
	add r0, r2, r0
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022CFF6C

	arm_func_start ov00_022CFFEC
ov00_022CFFEC: ; 0x022CFFEC
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #8
	mov fp, r1
	ldr r1, [fp]
	mov sb, r0
	add r0, r1, #1
	str r0, [sp, #4]
	add r0, sp, #4
	mov r7, r2
	mov r6, r3
	ldr r8, [sp, #0x30]
	ldrb r5, [r1]
	bl ov00_022CFEB0
	movs r4, r0
	bmi _022D0030
	cmp r4, #0x7d0
	ble _022D003C
_022D0030:
	add sp, sp, #8
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022D003C:
	and r1, r5, #0x1f
	cmp r1, #0x18
	addls pc, pc, r1, lsl #2
	b _022D0460
_022D004C: ; jump table
	b _022D0460 ; case 0
	b _022D0460 ; case 1
	b _022D00B0 ; case 2
	b _022D01A8 ; case 3
	b _022D0460 ; case 4
	b _022D0460 ; case 5
	b _022D0228 ; case 6
	b _022D0460 ; case 7
	b _022D0460 ; case 8
	b _022D0460 ; case 9
	b _022D0460 ; case 10
	b _022D0460 ; case 11
	b _022D02C0 ; case 12
	b _022D0460 ; case 13
	b _022D0460 ; case 14
	b _022D0460 ; case 15
	b _022D0390 ; case 16
	b _022D0410 ; case 17
	b _022D0460 ; case 18
	b _022D02C0 ; case 19
	b _022D02C0 ; case 20
	b _022D0460 ; case 21
	b _022D02C0 ; case 22
	b _022D0340 ; case 23
	b _022D0340 ; case 24
_022D00B0:
	ldrb r0, [sb, #0x5ad]
	cmp r0, #0
	beq _022D0198
	cmp r6, #0
	bne _022D0130
	ldr r0, [sp, #4]
	ldrb r1, [r0]
	cmp r1, #0
	bne _022D00EC
_022D00D4:
	add r0, r0, #1
	str r0, [sp, #4]
	ldrb r1, [r0]
	sub r4, r4, #1
	cmp r1, #0
	beq _022D00D4
_022D00EC:
	cmp r8, #0
	beq _022D0100
	cmp r8, #2
	beq _022D0120
	b _022D0198
_022D0100:
	cmp r4, #0x100
	bgt _022D0198
	add r1, sb, #0x94
	mov r2, r4
	add r1, r1, #0x400
	bl MemcpyFast
	str r4, [sb, #0x594]
	b _022D0198
_022D0120:
	str r4, [sb, #0x484]
	ldr r0, [sp, #4]
	str r0, [sb, #0x488]
	b _022D0198
_022D0130:
	cmp r6, #1
	bne _022D0198
	ldr r0, [sp, #4]
	ldrb r1, [r0]
	cmp r1, #0
	bne _022D0160
_022D0148:
	add r0, r0, #1
	str r0, [sp, #4]
	ldrb r1, [r0]
	sub r4, r4, #1
	cmp r1, #0
	beq _022D0148
_022D0160:
	cmp r8, #0
	beq _022D017C
	cmp r8, #2
	streq r4, [sb, #0x48c]
	ldreq r0, [sp, #4]
	streq r0, [sb, #0x490]
	b _022D0198
_022D017C:
	cmp r4, #8
	bgt _022D0198
	add r1, sb, #0x198
	mov r2, r4
	add r1, r1, #0x400
	bl MemcpyFast
	str r4, [sb, #0x5a0]
_022D0198:
	ldr r0, [sp, #4]
	add r0, r0, r4
	str r0, [sp, #4]
	b _022D04C4
_022D01A8:
	cmp r7, #1
	bne _022D01CC
	cmp r8, #2
	beq _022D01CC
	ldr r1, [sp, #4]
	sub r0, r4, #1
	add r1, r1, #1
	str r1, [sb, #0x5a4]
	str r0, [sb, #0x5a8]
_022D01CC:
	ldrb r0, [sb, #0x5ad]
	cmp r0, #0
	beq _022D0218
	ldr r0, [sp, #4]
	add r1, sp, #4
	add r0, r0, #1
	str r0, [sp, #4]
	mov r0, sb
	mov r2, r7
	mov r3, #0
	str r8, [sp]
	bl ov00_022CFFEC
	cmp r0, #0
	addne sp, sp, #8
	movne r0, #1
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r0, #0
	strb r0, [sb, #0x5ad]
	b _022D04C4
_022D0218:
	ldr r0, [sp, #4]
	add r0, r0, r4
	str r0, [sp, #4]
	b _022D04C4
_022D0228:
	ldr r6, [sp, #4]
	ldr sl, _022D04D8 ; =ov00_023188D4
	mov r5, #0
_022D0234:
	ldr r7, [sl, r5, lsl #2]
	mov r0, r7
	bl strlen
	mov r2, r0
	mov r0, r6
	mov r1, r7
	bl memcmp
	cmp r0, #0
	bne _022D02A4
	cmp r5, #5
	addls pc, pc, r5, lsl #2
	b _022D02B0
_022D0264: ; jump table
	b _022D02B0 ; case 0
	b _022D027C ; case 1
	b _022D027C ; case 2
	b _022D028C ; case 3
	b _022D028C ; case 4
	b _022D0298 ; case 5
_022D027C:
	cmp r8, #0
	streq r5, [sb, #0x45c]
	strb r5, [sb, #0x5ad]
	b _022D02B0
_022D028C:
	cmp r8, #2
	strne r5, [sb, #0x458]
	b _022D02B0
_022D0298:
	cmp r8, #2
	strneb r5, [sb, #0x5ae]
	b _022D02B0
_022D02A4:
	add r5, r5, #1
	cmp r5, #6
	blt _022D0234
_022D02B0:
	ldr r0, [sp, #4]
	add r0, r0, r4
	str r0, [sp, #4]
	b _022D04C4
_022D02C0:
	cmp r8, #2
	beq _022D0328
	ldrb r0, [sb, #0x5ac]
	cmp r0, #0
	beq _022D0318
	ldr r1, [sp, #4]
	mov r2, r4
	add r0, sb, #0x6b0
	bl ov00_022CFF00
	ldrb r0, [sb, #0x5ae]
	cmp r0, #5
	bne _022D0328
	cmp r4, #0x4f
	bgt _022D0328
	ldr r0, [sp, #4]
	mov r2, r4
	add r1, sb, #0x7b0
	bl MemcpyFast
	add r0, sb, r4
	mov r1, #0
	strb r1, [r0, #0x7b0]
	b _022D0328
_022D0318:
	ldr r1, [sp, #4]
	mov r2, r4
	add r0, sb, #0x5b0
	bl ov00_022CFF00
_022D0328:
	mov r0, #0
	strb r0, [sb, #0x5ae]
	ldr r0, [sp, #4]
	add r0, r0, r4
	str r0, [sp, #4]
	b _022D04C4
_022D0340:
	cmp r8, #2
	beq _022D0378
	ldr r0, [sp, #4]
	bl ov00_022CFF6C
	cmp r6, #0
	ldr r1, [sb, #0x80c]
	bne _022D036C
	cmp r1, r0
	movhs r0, #1
	strhsb r0, [sb, #0x5af]
	b _022D0378
_022D036C:
	cmp r1, r0
	movhi r0, #0
	strhib r0, [sb, #0x5af]
_022D0378:
	ldr r1, [sp, #4]
	mov r0, #1
	add r1, r1, r4
	str r1, [sp, #4]
	strb r0, [sb, #0x5ac]
	b _022D04C4
_022D0390:
	cmp r7, #0
	cmpeq r6, #0
	bne _022D03A8
	cmp r8, #2
	ldrne r0, [sp, #4]
	strne r0, [sb, #0x460]
_022D03A8:
	ldr r0, [sp, #4]
	mov r5, #0
	add sl, r0, r4
	cmp r0, sl
	bhs _022D03F8
	add r4, sp, #4
_022D03C0:
	mov r0, sb
	mov r1, r4
	mov r3, r5
	add r2, r7, #1
	str r8, [sp]
	bl ov00_022CFFEC
	cmp r0, #0
	add r5, r5, #1
	addne sp, sp, #8
	movne r0, #1
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [sp, #4]
	cmp r0, sl
	blo _022D03C0
_022D03F8:
	cmp r7, #1
	cmpeq r6, #0
	bne _022D04C4
	cmp r8, #2
	strne r0, [sb, #0x464]
	b _022D04C4
_022D0410:
	ldr r0, [sp, #4]
	add r6, r0, r4
	cmp r0, r6
	bhs _022D04C4
	add r5, sp, #4
	mov r4, #0
_022D0428:
	mov r0, sb
	mov r1, r5
	mov r3, r4
	add r2, r7, #1
	str r8, [sp]
	bl ov00_022CFFEC
	cmp r0, #0
	addne sp, sp, #8
	movne r0, #1
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [sp, #4]
	cmp r0, r6
	blo _022D0428
	b _022D04C4
_022D0460:
	cmp r5, #0xa0
	bne _022D04B8
	ldr r0, [sp, #4]
	add r6, r0, r4
	cmp r0, r6
	bhs _022D04C4
	add r5, sp, #4
	mov r4, #0
_022D0480:
	mov r0, sb
	mov r1, r5
	mov r3, r4
	add r2, r7, #1
	str r8, [sp]
	bl ov00_022CFFEC
	cmp r0, #0
	addne sp, sp, #8
	movne r0, #1
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [sp, #4]
	cmp r0, r6
	blo _022D0480
	b _022D04C4
_022D04B8:
	ldr r0, [sp, #4]
	add r0, r0, r4
	str r0, [sp, #4]
_022D04C4:
	ldr r1, [sp, #4]
	mov r0, #0
	str r1, [fp]
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022D04D8: .word ov00_023188D4
	arm_func_end ov00_022CFFEC

	arm_func_start ov00_022D04DC
ov00_022D04DC: ; 0x022D04DC
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #4
	mov r8, r0
	ldr r0, [r8, #0x5a4]
	mov r7, r1
	cmp r0, #0
	ldrne r0, [r8, #0x5a8]
	cmpne r0, #0
	ldrne r0, [r7, #0x10]
	cmpne r0, #0
	ldrne r0, [r7, #0xc]
	cmpne r0, #0
	ldrne r0, [r7, #8]
	cmpne r0, #0
	ldrne r0, [r7, #4]
	cmpne r0, #0
	addeq sp, sp, #4
	moveq r0, #2
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	mov r0, r0, lsl #1
	ldr r1, _022D067C ; =ov00_0232508C
	add r0, r0, r0, lsr #31
	mov r5, r0, asr #1
	ldr r1, [r1]
	mov r0, r5, lsl #3
	blx r1
	movs r4, r0
	addeq sp, sp, #4
	moveq r0, #2
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	add r6, r4, r5, lsl #1
	add sb, r6, r5, lsl #1
	ldr r1, [r8, #0x5a4]
	ldr r2, [r8, #0x5a8]
	mov r0, r6
	mov r3, r5
	add sl, sb, r5, lsl #1
	bl ov00_022D49AC
	ldr r1, [r7, #0x10]
	ldr r2, [r7, #0xc]
	mov r0, sb
	mov r3, r5
	bl ov00_022D49AC
	ldr r1, [r7, #8]
	ldr r2, [r7, #4]
	mov r0, sl
	mov r3, r5
	bl ov00_022D49AC
	bl ov00_022CFDCC
	mov r2, sb
	mov sb, r0
	mov r0, r4
	mov r1, r6
	mov r3, r5
	str sl, [sp]
	bl ov00_022D4398
	mov r0, sb
	bl ov00_022CFE18
	ldr r2, [r7, #4]
	mov r0, r6
	mov r1, r4
	mov r3, r5
	bl ov00_022D4A08
	ldrb r0, [r4, r5, lsl #1]
	mov r5, #0
	cmp r0, #0
	ldreqb r0, [r6, #1]
	cmpeq r0, #1
	movne r5, #2
	bne _022D0660
	ldr r3, [r7, #4]
	mov r2, #2
	cmp r3, #2
	ble _022D061C
_022D0604:
	ldrb r0, [r6, r2]
	cmp r0, #0xff
	bne _022D061C
	add r2, r2, #1
	cmp r2, r3
	blt _022D0604
_022D061C:
	add r1, r2, #1
	cmp r1, r3
	bge _022D065C
	ldrb r0, [r6, r2]
	cmp r0, #0
	ldreqb r0, [r6, r1]
	cmpeq r0, #0x30
	bne _022D065C
	ldr r2, [r8, #0x47c]
	add r0, r8, #0x68
	add r1, r6, r3
	add r0, r0, #0x400
	sub r1, r1, r2
	bl memcmp
	cmp r0, #0
	beq _022D0660
_022D065C:
	mov r5, #2
_022D0660:
	ldr r1, _022D0680 ; =ov00_023250B8
	mov r0, r4
	ldr r1, [r1]
	blx r1
	mov r0, r5
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022D067C: .word ov00_0232508C
_022D0680: .word ov00_023250B8
	arm_func_end ov00_022D04DC

	arm_func_start ov00_022D0684
ov00_022D0684: ; 0x022D0684
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	ldrb r0, [r5, #0x5af]
	ldr r1, [r5, #0x45c]
	cmp r0, #0
	movne r4, #0
	moveq r4, #0x8000
	mvn r0, #0
	cmp r1, r0
	orreq r0, r4, #4
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r0, [r5, #0x458]
	cmp r0, #3
	beq _022D06C8
	cmp r0, #4
	beq _022D0700
	b _022D0738
_022D06C8:
	add r0, r5, #0x3fc
	bl ov00_022D30BC
	ldr r1, [r5, #0x460]
	ldr r2, [r5, #0x464]
	add r0, r5, #0x3fc
	sub r2, r2, r1
	bl ov00_022D3104
	add r1, r5, #0x68
	add r0, r5, #0x3fc
	add r1, r1, #0x400
	bl ov00_022D31BC
	mov r0, #0x10
	str r0, [r5, #0x47c]
	b _022D0740
_022D0700:
	add r0, r5, #0x348
	bl ov00_022D397C
	ldr r1, [r5, #0x460]
	ldr r2, [r5, #0x464]
	add r0, r5, #0x348
	sub r2, r2, r1
	bl ov00_022D39D0
	add r1, r5, #0x68
	add r0, r5, #0x348
	add r1, r1, #0x400
	bl ov00_022D3A88
	mov r0, #0x14
	str r0, [r5, #0x47c]
	b _022D0740
_022D0738:
	orr r0, r4, #3
	ldmia sp!, {r3, r4, r5, pc}
_022D0740:
	mov r0, r5
	add r1, r5, #0x5b0
	bl ov00_022CFE64
	movs r1, r0
	orreq r0, r4, #1
	ldmeqia sp!, {r3, r4, r5, pc}
	mov r0, r5
	bl ov00_022D04DC
	orr r0, r4, r0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D0684

	arm_func_start ov00_022D0768
ov00_022D0768: ; 0x022D0768
	mov r2, r0
	b _022D0774
_022D0770:
	add r0, r0, #1
_022D0774:
	ldrsb r1, [r0]
	cmp r1, #0x2e
	cmpne r1, #0
	bne _022D0770
	sub r0, r0, r2
	bx lr
	arm_func_end ov00_022D0768

	arm_func_start ov00_022D078C
ov00_022D078C: ; 0x022D078C
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	b _022D07A8
_022D079C:
	cmp r1, #0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
_022D07A8:
	ldrsb r0, [r5], #1
	ldrsb r1, [r6], #1
	cmp r1, r0
	beq _022D079C
	cmp r0, #0x2a
	movne r0, #1
	ldmneia sp!, {r4, r5, r6, pc}
	sub r6, r6, #1
	mov r0, r6
	bl ov00_022D0768
	mov r4, r0
	mov r0, r5
	bl ov00_022D0768
	cmp r0, r4
	movgt r0, #1
	ldmgtia sp!, {r4, r5, r6, pc}
	sub r0, r4, r0
	add r6, r6, r0
	b _022D07A8
	arm_func_end ov00_022D078C

	arm_func_start ov00_022D07F4
ov00_022D07F4: ; 0x022D07F4
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022D07F4

	arm_func_start ov00_022D07F8
ov00_022D07F8: ; 0x022D07F8
	stmdb sp!, {r0, r1, r2, r3}
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x18
	ldr r1, [sp, #0x44]
	mov sl, r0
	ldrb r4, [r1, #2]
	ldrb r3, [r1]
	ldrb r2, [r1, #1]
	add r0, r1, #3
	mvn r1, #0
	str r0, [sp, #0x44]
	add r2, r2, r3, lsl #8
	add r0, sp, #8
	str r1, [sl, #0x45c]
	add r8, r4, r2, lsl #8
	bl sub_02082748
	mov r6, #0
	ldr r1, [sp, #8]
	ldr r0, [sp, #0xc]
	add r1, r1, #0x7d0
	mov r0, r0, lsl #8
	ldr r2, [sp, #0x10]
	add r0, r0, r1, lsl #16
	add r0, r2, r0
	str r0, [sl, #0x80c]
	strb r6, [sl, #0x6b0]
	str r6, [sl, #0x5a0]
	mov sb, r6
	str r6, [sl, #0x594]
	mov fp, #2
	mvn r5, #0
	mov r4, r6
_022D0878:
	ldr r1, [sp, #0x44]
	mov r0, sl
	ldrb r2, [r1, #2]
	ldrb ip, [r1]
	ldrb r3, [r1, #1]
	add r7, r1, #3
	add r1, sp, #0x44
	str r7, [sp, #0x44]
	str r5, [sl, #0x458]
	strb r4, [sl, #0x5ad]
	strb r4, [sl, #0x5ac]
	strb r4, [sl, #0x5af]
	strb r4, [sl, #0x6b0]
	strb r4, [sl, #0x5b0]
	strb r4, [sl, #0x7b0]
	add r3, r3, ip, lsl #8
	ldr r7, [sp, #0x44]
	add r3, r2, r3, lsl #8
	add r2, r3, #3
	str r7, [sl, #0x804]
	str r3, [sl, #0x808]
	sub r8, r8, r2
	mov r2, r4
	mov r3, r4
	str r6, [sp]
	bl ov00_022CFFEC
	cmp r0, #0
	bne _022D0900
	ldr r0, [sl, #0x594]
	cmp r0, #0x33
	blo _022D0900
	ldr r0, [sl, #0x5a0]
	cmp r0, #0
	bne _022D0918
_022D0900:
	mov r0, #9
	add sp, sp, #0x18
	strb r0, [sl, #0x455]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	add sp, sp, #0x10
	bx lr
_022D0918:
	mov r0, sl
	bl ov00_022D0684
	mov r7, r0
	cmp sb, #0
	bne _022D0948
	ldr r0, [sl, #0x800]
	cmp r0, #0
	beq _022D0948
	add r1, sl, #0x7b0
	bl ov00_022D078C
	cmp r0, #0
	orrne r7, r7, #0x4000
_022D0948:
	and r6, r7, #0xff
	cmp r6, #1
	bne _022D09B8
	cmp r8, #0
	beq _022D09B8
	ldr r1, [sp, #0x44]
	mov r2, #0
	add r1, r1, #3
	str r1, [sp, #4]
	mov r1, #0
	strb r1, [sl, #0x5ad]
	mov r0, sl
	add r1, sp, #4
	mov r3, r2
	str fp, [sp]
	bl ov00_022CFFEC
	cmp r0, #0
	movne r0, #9
	addne sp, sp, #0x18
	strneb r0, [sl, #0x455]
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	addne sp, sp, #0x10
	bxne lr
	mov r0, sl
	add r1, sl, #0x480
	bl ov00_022D04DC
	bic r1, r7, #0xff
	orr r7, r1, r0
_022D09B8:
	ldr r3, [sl, #0x810]
	cmp r3, #0
	beq _022D09D8
	mov r0, r7
	mov r1, sl
	mov r2, sb
	blx r3
	mov r7, r0
_022D09D8:
	cmp r6, #0
	add sb, sb, #1
	beq _022D09F8
	cmp r7, #0
	bne _022D09F8
	cmp r8, #0
	movne r6, #1
	bne _022D0878
_022D09F8:
	cmp r7, #0
	moveq r0, #3
	streqb r0, [sl, #0x455]
	movne r0, #9
	strneb r0, [sl, #0x455]
	add sp, sp, #0x18
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	add sp, sp, #0x10
	bx lr
	arm_func_end ov00_022D07F8

	arm_func_start ov00_022D0A1C
ov00_022D0A1C: ; 0x022D0A1C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r6, r0
	mov r5, r1
	add r0, r5, #2
	add r1, r6, #0x54
	mov r2, #0x20
	bl MemcpyFast
	ldrb r7, [r6, #0x30]
	ldrb r4, [r5, #0x22]
	add r5, r5, #0x23
	cmp r7, #0
	beq _022D0A74
	cmp r4, #0x20
	bne _022D0A74
	mov r1, r5
	add r0, r6, #0x74
	mov r2, #0x20
	bl memcmp
	cmp r0, #0
	moveq r0, #1
	streqb r0, [r6, #0x31]
	beq _022D0AB0
_022D0A74:
	cmp r7, #0
	beq _022D0A84
	mov r0, r6
	bl ov00_022CFD0C
_022D0A84:
	cmp r4, #0
	moveq r0, #0
	beq _022D0AA4
	mov r0, r5
	add r1, r6, #0x74
	mov r2, #0x20
	bl MemcpyFast
	mov r0, #1
_022D0AA4:
	strb r0, [r6, #0x30]
	mov r0, #0
	strb r0, [r6, #0x31]
_022D0AB0:
	add r0, r5, r4
	ldrb r2, [r5, r4]
	ldrb r1, [r0, #1]
	mov r0, #2
	add r1, r1, r2, lsl #8
	strh r1, [r6, #0x32]
	strb r0, [r6, #0x455]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022D0A1C

	arm_func_start ov00_022D0AD0
ov00_022D0AD0: ; 0x022D0AD0
	stmdb sp!, {r4, lr}
	cmp r1, #0
	mov r4, #0
	ble _022D0B14
_022D0AE0:
	ldrb lr, [r0]
	ldrb ip, [r0, #1]
	cmp r2, #3
	add lr, ip, lr, lsl #8
	ldreqb ip, [r0, #2]
	addeq lr, ip, lr, lsl #8
	cmp lr, r3
	moveq r0, #1
	ldmeqia sp!, {r4, pc}
	add r4, r4, #1
	cmp r4, r1
	add r0, r0, r2
	blt _022D0AE0
_022D0B14:
	mov r0, #0
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D0AD0

	arm_func_start ov00_022D0B1C
ov00_022D0B1C: ; 0x022D0B1C
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	ldr r4, _022D0B78 ; =ov00_023188CC
	mov r8, r0
	mov r7, r1
	mov r6, r2
	mov r5, #0
_022D0B34:
	mov r0, r5, lsl #1
	ldrh r3, [r4, r0]
	mov r0, r8
	mov r1, r7
	mov r2, r6
	bl ov00_022D0AD0
	cmp r0, #0
	beq _022D0B64
	ldr r0, _022D0B78 ; =ov00_023188CC
	mov r1, r5, lsl #1
	ldrh r0, [r0, r1]
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022D0B64:
	add r5, r5, #1
	cmp r5, #2
	blo _022D0B34
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022D0B78: .word ov00_023188CC
	arm_func_end ov00_022D0B1C

	arm_func_start ov00_022D0B7C
ov00_022D0B7C: ; 0x022D0B7C
	cmp r0, #3
	moveq r0, #1
	movne r0, #0
	bx lr
	arm_func_end ov00_022D0B7C

	arm_func_start ov00_022D0B8C
ov00_022D0B8C: ; 0x022D0B8C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r6, r1
	mov r7, r0
	ldrb r0, [r6]
	ldrb r1, [r6, #1]
	bl ov00_022D0B7C
	cmp r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldrb r2, [r6, #2]
	ldrb r1, [r6, #3]
	ldr r3, _022D0C50 ; =0x55555556
	add r0, r6, #8
	add r4, r1, r2, lsl #8
	smull r2, r1, r3, r4
	add r1, r1, r4, lsr #31
	mov r2, #3
	bl ov00_022D0B1C
	mov r0, r0, lsl #0x10
	movs r0, r0, lsr #0x10
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	strh r0, [r7, #0x32]
	ldrb r5, [r6, #4]
	ldrb r3, [r6, #5]
	ldrb r2, [r6, #6]
	ldrb r0, [r6, #7]
	mov r1, #0
	add r3, r3, r5, lsl #8
	add r5, r0, r2, lsl #8
	add r0, r4, #8
	strb r1, [r7, #0x30]
	cmp r5, #0x20
	add r4, r0, r3
	blt _022D0C24
	add r0, r6, r4
	add r1, r7, #0x34
	mov r2, #0x20
	bl MemcpyFast
	b _022D0C44
_022D0C24:
	add r0, r7, #0x34
	rsb r2, r5, #0x20
	bl MemsetFast
	add r1, r7, #0x54
	mov r2, r5
	add r0, r6, r4
	sub r1, r1, r5
	bl MemcpyFast
_022D0C44:
	mov r0, #1
	strb r0, [r7, #0x455]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022D0C50: .word 0x55555556
	arm_func_end ov00_022D0B8C

	arm_func_start ov00_022D0C54
ov00_022D0C54: ; 0x022D0C54
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r1
	mov r4, r0
	ldrb r0, [r6]
	ldrb r1, [r6, #1]
	bl ov00_022D0B7C
	cmp r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	add r0, r6, #2
	add r1, r4, #0x34
	mov r2, #0x20
	bl MemcpyFast
	ldrb r5, [r6, #0x22]
	add r6, r6, #0x23
	cmp r5, #0x20
	movne r0, #0
	strneb r0, [r4, #0x30]
	bne _022D0CB4
	mov r0, r6
	add r1, r4, #0x74
	mov r2, #0x20
	bl MemcpyFast
	mov r0, r4
	bl ov00_022CFAEC
_022D0CB4:
	add r0, r6, r5
	ldrb r1, [r0, #1]
	ldrb r3, [r6, r5]
	add r0, r0, #2
	mov r2, #2
	add r1, r1, r3, lsl #8
	add r1, r1, r1, lsr #31
	mov r1, r1, asr #1
	bl ov00_022D0B1C
	mov r0, r0, lsl #0x10
	movs r0, r0, lsr #0x10
	strh r0, [r4, #0x32]
	movne r0, #1
	strneb r0, [r4, #0x455]
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022D0C54

	arm_func_start ov00_022D0CF0
ov00_022D0CF0: ; 0x022D0CF0
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x18
	movs sl, r2
	str r0, [sp, #8]
	ldrne r0, [sl]
	mov fp, r1
	cmpne r0, #0
	addeq sp, sp, #0x18
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r0, r0, lsl #1
	add r0, r0, r0, lsr #31
	mov r0, r0, asr #1
	add r4, r0, #1
	mov r0, #0x14
	mul r0, r4, r0
	ldr r1, _022D0F28 ; =ov00_0232508C
	ldr r1, [r1]
	blx r1
	movs r5, r0
	addeq sp, sp, #0x18
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r6, r5, r4, lsl #1
	add r7, r6, r4, lsl #1
	add r1, r7, r4, lsl #1
	str r1, [sp, #0x10]
	add r1, r1, r4, lsl #1
	add r8, r1, r4, lsl #1
	str r1, [sp, #0xc]
	ldr r2, [sl]
	add sb, r8, r4, lsl #1
	mov r1, fp
	mov r3, r4
	add fp, sb, r4, lsl #1
	bl ov00_022D49AC
	ldr r1, [sl, #0x1c]
	ldr r2, [sl, #0x18]
	mov r0, r6
	mov r3, r4
	bl ov00_022D49AC
	ldr r1, [sl, #0xc]
	ldr r2, [sl, #8]
	mov r0, r8
	mov r3, r4
	bl ov00_022D49AC
	bl ov00_022CFDCC
	str r0, [sp, #0x14]
	ldr r0, [sp, #0x10]
	str r8, [sp]
	mov r1, r5
	mov r2, r6
	mov r3, r4
	bl ov00_022D47A0
	ldr r1, [sl, #0x24]
	ldr r2, [sl, #0x20]
	mov r0, r6
	mov r3, r4
	bl ov00_022D49AC
	ldr r1, [sl, #0x14]
	ldr r2, [sl, #0x10]
	mov r0, r8
	mov r3, r4
	bl ov00_022D49AC
	ldr r0, [sp, #0xc]
	mov r1, r5
	mov r2, r6
	mov r3, r4
	str r8, [sp]
	bl ov00_022D47A0
	ldr r0, [sp, #0x14]
	bl ov00_022CFE18
	ldr r1, [sp, #0x10]
	ldr r2, [sp, #0xc]
	mov r0, r5
	mov r3, r4
	bl ov00_022D3D98
	ldr r1, [sl, #0x2c]
	ldr r2, [sl, #0x28]
	mov r0, r6
	mov r3, r4
	bl ov00_022D49AC
	mov r0, r7
	mov r1, r5
	mov r2, r6
	mov r3, r4
	bl ov00_022D3F14
	ldr r1, [sl, #0x14]
	ldr r2, [sl, #0x10]
	mov r0, r6
	mov r3, r4
	bl ov00_022D49AC
	mov r0, r5
	mov r1, r7
	mov r2, r6
	mov r3, r4
	bl ov00_022D3F14
	ldr r2, [sp, #0xc]
	mov r0, r7
	mov r1, r5
	mov r3, r4
	bl ov00_022D3C58
	ldr r1, [sl, #4]
	ldr r2, [sl]
	mov r0, r6
	mov r3, r4
	bl ov00_022D49AC
	mov r0, r7
	mov r1, r4
	bl ov00_022D3C28
	cmp r0, #0
	bge _022D0EE4
	mov r0, r7
	mov r1, r4
	bl ov00_022D3D58
	mov r1, r7
	mov r2, r6
	mov r3, sb
	mov r0, #0
	stmia sp, {r4, fp}
	bl ov00_022D41B8
	mov r0, sb
	mov r1, r6
	mov r2, sb
	mov r3, r4
	bl ov00_022D3D98
	b _022D0EFC
_022D0EE4:
	mov r1, r7
	mov r2, r6
	mov r3, sb
	mov r0, #0
	stmia sp, {r4, fp}
	bl ov00_022D41B8
_022D0EFC:
	ldr r0, [sp, #8]
	mov r1, sb
	mov r3, r4
	mov r2, #0x30
	bl ov00_022D4A08
	ldr r1, _022D0F2C ; =ov00_023250B8
	mov r0, r5
	ldr r1, [r1]
	blx r1
	add sp, sp, #0x18
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022D0F28: .word ov00_0232508C
_022D0F2C: .word ov00_023250B8
	arm_func_end ov00_022D0CF0

	arm_func_start ov00_022D0F30
ov00_022D0F30: ; 0x022D0F30
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #0x14
	mov r4, r2
	mov r6, r0
	mov r5, r1
	add r0, r4, #0x348
	bl ov00_022D397C
	mov r0, r5
	bl strlen
	mov r2, r0
	mov r1, r5
	add r0, r4, #0x348
	bl ov00_022D39D0
	add r0, r4, #0x348
	mov r1, r4
	mov r2, #0x30
	bl ov00_022D39D0
	add r0, r4, #0x348
	add r1, r4, #0x34
	mov r2, #0x40
	bl ov00_022D39D0
	add r0, r4, #0x348
	add r1, sp, #0
	bl ov00_022D3A88
	add r0, r4, #0x3fc
	bl ov00_022D30BC
	add r0, r4, #0x3fc
	mov r1, r4
	mov r2, #0x30
	bl ov00_022D3104
	add r0, r4, #0x3fc
	add r1, sp, #0
	mov r2, #0x14
	bl ov00_022D3104
	add r0, r4, #0x3fc
	mov r1, r6
	bl ov00_022D31BC
	add sp, sp, #0x14
	ldmia sp!, {r3, r4, r5, r6, pc}
	arm_func_end ov00_022D0F30

	arm_func_start ov00_022D0FCC
ov00_022D0FCC: ; 0x022D0FCC
	stmdb sp!, {r4, lr}
	sub sp, sp, #0x30
	mov r4, r0
	ldr r1, _022D1020 ; =ov00_02318918
	add r0, sp, #0
	mov r2, r4
	bl ov00_022D0F30
	ldr r1, _022D1024 ; =ov00_0231891C
	add r0, sp, #0x10
	mov r2, r4
	bl ov00_022D0F30
	ldr r1, _022D1028 ; =ov00_02318920
	add r0, sp, #0x20
	mov r2, r4
	bl ov00_022D0F30
	add r0, sp, #0
	mov r1, r4
	mov r2, #0x30
	bl MemcpyFast
	add sp, sp, #0x30
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D1020: .word ov00_02318918
_022D1024: .word ov00_0231891C
_022D1028: .word ov00_02318920
	arm_func_end ov00_022D0FCC

	arm_func_start ov00_022D102C
ov00_022D102C: ; 0x022D102C
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x24
	mov sl, r0
	ldrh r0, [sl, #0x32]
	cmp r0, #4
	beq _022D1050
	cmp r0, #5
	beq _022D1064
	b _022D1078
_022D1050:
	mov r0, #0x10
	str r0, [sp, #4]
	str r0, [sp]
	mov r2, #0
	b _022D1078
_022D1064:
	mov r0, #0x14
	str r0, [sp, #4]
	mov r0, #0x10
	str r0, [sp]
	mov r2, #0
_022D1078:
	ldr r1, [sp, #4]
	ldr r0, [sp]
	mov r7, #0
	add r0, r1, r0
	add r0, r2, r0
	mov fp, r0, lsl #1
	cmp fp, #0
	ble _022D116C
	add r0, sl, #0x74
	mov sb, r7
	str r0, [sp, #8]
	add r5, sp, #0xc
	mov r4, #1
_022D10AC:
	add r0, sl, #0x348
	bl ov00_022D397C
	add r0, r7, #0x41
	add r6, r7, #1
	strb r0, [sp, #0xc]
	mov r8, #0
	cmp r6, #0
	ble _022D10E8
_022D10CC:
	add r0, sl, #0x348
	mov r1, r5
	mov r2, r4
	bl ov00_022D39D0
	add r8, r8, #1
	cmp r8, r6
	blt _022D10CC
_022D10E8:
	add r0, sl, #0x348
	mov r1, sl
	mov r2, #0x30
	bl ov00_022D39D0
	add r0, sl, #0x348
	add r1, sl, #0x54
	mov r2, #0x20
	bl ov00_022D39D0
	add r0, sl, #0x348
	add r1, sl, #0x34
	mov r2, #0x20
	bl ov00_022D39D0
	add r0, sl, #0x348
	add r1, sp, #0xd
	bl ov00_022D3A88
	add r0, sl, #0x3fc
	bl ov00_022D30BC
	add r0, sl, #0x3fc
	mov r1, sl
	mov r2, #0x30
	bl ov00_022D3104
	add r0, sl, #0x3fc
	add r1, sp, #0xd
	mov r2, #0x14
	bl ov00_022D3104
	ldr r1, [sp, #8]
	add r0, sl, #0x3fc
	add r1, r1, sb
	bl ov00_022D31BC
	add sb, sb, #0x10
	cmp sb, fp
	add r7, r7, #1
	blt _022D10AC
_022D116C:
	ldrb r0, [sl, #0x454]
	add r3, sl, #0x74
	cmp r0, #0
	beq _022D11A8
	ldr r0, [sp, #4]
	str r3, [sl, #0x1d4]
	add r2, r3, r0
	add r1, r2, r0
	add r0, r3, r0, lsl #1
	str r0, [sl, #0x1d8]
	ldr r0, [sp]
	str r2, [sl, #0xbc]
	add r0, r1, r0
	str r0, [sl, #0xc0]
	b _022D11D0
_022D11A8:
	ldr r0, [sp, #4]
	str r3, [sl, #0xbc]
	add r2, r3, r0
	add r1, r2, r0
	add r0, r3, r0, lsl #1
	str r0, [sl, #0xc0]
	ldr r0, [sp]
	str r2, [sl, #0x1d4]
	add r0, r1, r0
	str r0, [sl, #0x1d8]
_022D11D0:
	ldr r1, [sl, #0x1d8]
	add r0, sl, #0x1e0
	mov r2, #0x10
	bl ov00_022D3B20
	ldr r1, [sl, #0xc0]
	add r0, sl, #0xc8
	mov r2, #0x10
	bl ov00_022D3B20
	add sp, sp, #0x24
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022D102C

	arm_func_start ov00_022D11F8
ov00_022D11F8: ; 0x022D11F8
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r2, [r4, #0x81c]
	bl ov00_022D0CF0
	mov r0, r4
	bl ov00_022D0FCC
	mov r1, #0
	mov r0, r4
	mov r2, r1
	bl ov00_022CFC20
	mov r0, r4
	bl ov00_022D102C
	mov r0, #5
	strb r0, [r4, #0x455]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D11F8

	arm_func_start ov00_022D1234
ov00_022D1234: ; 0x022D1234
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0x30
	mov r5, r0
	ldrb r0, [r5, #0x454]
	mov r4, r1
	teq r0, r2
	mov r2, #4
	beq _022D1264
	ldr r1, _022D1308 ; =ov00_02318924
	add r0, r5, #0x3a4
	bl ov00_022D3104
	b _022D1270
_022D1264:
	ldr r1, _022D130C ; =ov00_0231892C
	add r0, r5, #0x3a4
	bl ov00_022D3104
_022D1270:
	mov r1, r5
	add r0, r5, #0x3a4
	mov r2, #0x30
	bl ov00_022D3104
	add r0, sp, #0
	mov r1, #0x36
	mov r2, #0x30
	bl MemsetFast
	add r1, sp, #0
	add r0, r5, #0x3a4
	mov r2, #0x30
	bl ov00_022D3104
	mov r1, r4
	add r0, r5, #0x3a4
	bl ov00_022D31BC
	add r0, r5, #0x3a4
	bl ov00_022D30BC
	add r0, r5, #0x3a4
	mov r1, r5
	mov r2, #0x30
	bl ov00_022D3104
	add r0, sp, #0
	mov r1, #0x5c
	mov r2, #0x30
	bl MemsetFast
	add r0, r5, #0x3a4
	add r1, sp, #0
	mov r2, #0x30
	bl ov00_022D3104
	add r0, r5, #0x3a4
	mov r1, r4
	mov r2, #0x10
	bl ov00_022D3104
	add r0, r5, #0x3a4
	mov r1, r4
	bl ov00_022D31BC
	add sp, sp, #0x30
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022D1308: .word ov00_02318924
_022D130C: .word ov00_0231892C
	arm_func_end ov00_022D1234

	arm_func_start ov00_022D1310
ov00_022D1310: ; 0x022D1310
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0x28
	mov r5, r0
	ldrb r0, [r5, #0x454]
	mov r4, r1
	teq r0, r2
	mov r2, #4
	beq _022D1340
	ldr r1, _022D13E4 ; =ov00_02318924
	add r0, r5, #0x2ec
	bl ov00_022D39D0
	b _022D134C
_022D1340:
	ldr r1, _022D13E8 ; =ov00_0231892C
	add r0, r5, #0x2ec
	bl ov00_022D39D0
_022D134C:
	mov r1, r5
	add r0, r5, #0x2ec
	mov r2, #0x30
	bl ov00_022D39D0
	add r0, sp, #0
	mov r1, #0x36
	mov r2, #0x28
	bl MemsetFast
	add r1, sp, #0
	add r0, r5, #0x2ec
	mov r2, #0x28
	bl ov00_022D39D0
	mov r1, r4
	add r0, r5, #0x2ec
	bl ov00_022D3A88
	add r0, r5, #0x2ec
	bl ov00_022D397C
	add r0, r5, #0x2ec
	mov r1, r5
	mov r2, #0x30
	bl ov00_022D39D0
	add r0, sp, #0
	mov r1, #0x5c
	mov r2, #0x28
	bl MemsetFast
	add r0, r5, #0x2ec
	add r1, sp, #0
	mov r2, #0x28
	bl ov00_022D39D0
	add r0, r5, #0x2ec
	mov r1, r4
	mov r2, #0x14
	bl ov00_022D39D0
	add r0, r5, #0x2ec
	mov r1, r4
	bl ov00_022D3A88
	add sp, sp, #0x28
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022D13E4: .word ov00_02318924
_022D13E8: .word ov00_0231892C
	arm_func_end ov00_022D1310

	arm_func_start ov00_022D13EC
ov00_022D13EC: ; 0x022D13EC
	stmdb sp!, {r4, r5, lr}
	sub sp, sp, #0x14
	mov r5, r0
	mov r4, r1
	add r0, r5, #0x3a4
	add r1, r5, #0x3fc
	mov r2, #0x58
	bl MemcpyFast
	add r1, sp, #0
	mov r0, r5
	mov r2, #1
	bl ov00_022D1234
	add r0, r5, #0x3fc
	add r1, r5, #0x3a4
	mov r2, #0x58
	bl MemcpyFast
	add r1, sp, #0
	mov r0, r4
	mov r2, #0x10
	bl memcmp
	cmp r0, #0
	movne r0, #9
	addne sp, sp, #0x14
	strneb r0, [r5, #0x455]
	ldmneia sp!, {r4, r5, pc}
	add r0, r5, #0x2ec
	add r1, r5, #0x348
	mov r2, #0x5c
	bl MemcpyFast
	add r1, sp, #0
	mov r0, r5
	mov r2, #1
	bl ov00_022D1310
	add r0, r5, #0x348
	add r1, r5, #0x2ec
	mov r2, #0x5c
	bl MemcpyFast
	add r1, sp, #0
	add r0, r4, #0x10
	mov r2, #0x14
	bl memcmp
	cmp r0, #0
	movne r0, #9
	strneb r0, [r5, #0x455]
	moveq r0, #6
	streqb r0, [r5, #0x455]
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, pc}
	arm_func_end ov00_022D13EC

	arm_func_start ov00_022D14AC
ov00_022D14AC: ; 0x022D14AC
	mov r2, #8
_022D14B0:
	ldrb r1, [r0, #-1]!
	add r1, r1, #1
	ands r1, r1, #0xff
	strb r1, [r0]
	bxne lr
	subs r2, r2, #1
	bne _022D14B0
	bx lr
	arm_func_end ov00_022D14AC

	arm_func_start ov00_022D14D0
ov00_022D14D0: ; 0x022D14D0
	stmdb sp!, {r4, lr}
	add r0, r0, #0x1e0
	mov r4, r2
	bl ov00_022D3B94
	mov r0, r4
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D14D0

	arm_func_start ov00_022D14E8
ov00_022D14E8: ; 0x022D14E8
	stmdb sp!, {r4, r5, r6, r7, lr}
	sub sp, sp, #0x44
	mov r6, r1
	ldrb r3, [r6, #3]
	ldrb r2, [r6, #4]
	mov r7, r0
	add r1, r6, #5
	add r2, r2, r3, lsl #8
	bl ov00_022D14D0
	ldrh r1, [r7, #0x32]
	mov r4, r0
	cmp r1, #4
	beq _022D1528
	cmp r1, #5
	beq _022D1608
	b _022D16E4
_022D1528:
	sub r4, r4, #0x10
	mov r0, r4, asr #8
	strb r0, [r6, #3]
	strb r4, [r6, #4]
	add r0, r7, #0x3fc
	bl ov00_022D30BC
	ldr r1, [r7, #0x1d4]
	add r0, r7, #0x3fc
	mov r2, #0x10
	bl ov00_022D3104
	add r0, sp, #0
	mov r1, #0x36
	mov r2, #0x30
	bl MemsetFast
	add r1, sp, #0
	add r0, r7, #0x3fc
	mov r2, #0x30
	bl ov00_022D3104
	add r0, r7, #0x3fc
	add r1, r7, #0x2e4
	mov r2, #8
	bl ov00_022D3104
	add r0, r7, #0x3fc
	mov r1, r6
	mov r2, #1
	bl ov00_022D3104
	add r0, r7, #0x3fc
	add r1, r6, #3
	add r2, r4, #2
	bl ov00_022D3104
	add r0, r7, #0x3fc
	add r1, sp, #0x30
	bl ov00_022D31BC
	add r0, r7, #0x3fc
	bl ov00_022D30BC
	ldr r1, [r7, #0x1d4]
	add r0, r7, #0x3fc
	mov r2, #0x10
	bl ov00_022D3104
	add r0, sp, #0
	mov r1, #0x5c
	mov r2, #0x30
	bl MemsetFast
	add r0, r7, #0x3fc
	add r1, sp, #0
	mov r2, #0x30
	bl ov00_022D3104
	add r0, r7, #0x3fc
	add r1, sp, #0x30
	mov r2, #0x10
	bl ov00_022D3104
	add r0, r7, #0x3fc
	add r1, sp, #0x30
	bl ov00_022D31BC
	mov r5, #0x10
	b _022D16E4
_022D1608:
	sub r4, r4, #0x14
	mov r0, r4, asr #8
	strb r0, [r6, #3]
	strb r4, [r6, #4]
	add r0, r7, #0x348
	bl ov00_022D397C
	ldr r1, [r7, #0x1d4]
	add r0, r7, #0x348
	mov r2, #0x14
	bl ov00_022D39D0
	add r0, sp, #0
	mov r1, #0x36
	mov r2, #0x28
	bl MemsetFast
	add r1, sp, #0
	add r0, r7, #0x348
	mov r2, #0x28
	bl ov00_022D39D0
	add r0, r7, #0x348
	add r1, r7, #0x2e4
	mov r2, #8
	bl ov00_022D39D0
	add r0, r7, #0x348
	mov r1, r6
	mov r2, #1
	bl ov00_022D39D0
	add r0, r7, #0x348
	add r1, r6, #3
	add r2, r4, #2
	bl ov00_022D39D0
	add r0, r7, #0x348
	add r1, sp, #0x30
	bl ov00_022D3A88
	add r0, r7, #0x348
	bl ov00_022D397C
	ldr r1, [r7, #0x1d4]
	add r0, r7, #0x348
	mov r2, #0x14
	bl ov00_022D39D0
	add r0, sp, #0
	mov r1, #0x5c
	mov r2, #0x28
	bl MemsetFast
	add r0, r7, #0x348
	add r1, sp, #0
	mov r2, #0x28
	bl ov00_022D39D0
	add r0, r7, #0x348
	add r1, sp, #0x30
	mov r2, #0x14
	bl ov00_022D39D0
	add r0, r7, #0x348
	add r1, sp, #0x30
	bl ov00_022D3A88
	mov r5, #0x14
_022D16E4:
	add r0, r6, #5
	add r1, sp, #0x30
	mov r2, r5
	add r0, r0, r4
	bl memcmp
	cmp r0, #0
	movne r0, #9
	strneb r0, [r7, #0x455]
	add r0, r7, #0x2ec
	bl ov00_022D14AC
	add r0, r4, #5
	add sp, sp, #0x44
	ldmia sp!, {r4, r5, r6, r7, pc}
	arm_func_end ov00_022D14E8

	arm_func_start ov00_022D1718
ov00_022D1718: ; 0x022D1718
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x30
	mov r4, r1
	mov r5, r0
	ldrh r0, [r5, #0x32]
	ldrb r2, [r4, #3]
	ldrb r1, [r4, #4]
	cmp r0, #4
	add r6, r4, #5
	add r7, r1, r2, lsl #8
	beq _022D1750
	cmp r0, #5
	beq _022D1820
	b _022D18EC
_022D1750:
	add r0, r5, #0x3fc
	bl ov00_022D30BC
	ldr r1, [r5, #0xbc]
	add r0, r5, #0x3fc
	mov r2, #0x10
	bl ov00_022D3104
	add r0, sp, #0
	mov r1, #0x36
	mov r2, #0x30
	bl MemsetFast
	add r1, sp, #0
	add r0, r5, #0x3fc
	mov r2, #0x30
	bl ov00_022D3104
	add r0, r5, #0x3fc
	add r1, r5, #0x1cc
	mov r2, #8
	bl ov00_022D3104
	add r0, r5, #0x3fc
	mov r1, r4
	mov r2, #1
	bl ov00_022D3104
	add r0, r5, #0x3fc
	add r1, r4, #3
	add r2, r7, #2
	bl ov00_022D3104
	add r0, r5, #0x3fc
	add r1, r6, r7
	bl ov00_022D31BC
	add r0, r5, #0x3fc
	bl ov00_022D30BC
	ldr r1, [r5, #0xbc]
	add r0, r5, #0x3fc
	mov r2, #0x10
	bl ov00_022D3104
	add r0, sp, #0
	mov r1, #0x5c
	mov r2, #0x30
	bl MemsetFast
	add r0, r5, #0x3fc
	add r1, sp, #0
	mov r2, #0x30
	bl ov00_022D3104
	add r0, r5, #0x3fc
	add r1, r6, r7
	mov r2, #0x10
	bl ov00_022D3104
	add r1, r6, r7
	add r0, r5, #0x3fc
	bl ov00_022D31BC
	add r7, r7, #0x10
	b _022D18EC
_022D1820:
	add r0, r5, #0x348
	bl ov00_022D397C
	ldr r1, [r5, #0xbc]
	add r0, r5, #0x348
	mov r2, #0x14
	bl ov00_022D39D0
	add r0, sp, #0
	mov r1, #0x36
	mov r2, #0x28
	bl MemsetFast
	add r1, sp, #0
	add r0, r5, #0x348
	mov r2, #0x28
	bl ov00_022D39D0
	add r0, r5, #0x348
	add r1, r5, #0x1cc
	mov r2, #8
	bl ov00_022D39D0
	add r0, r5, #0x348
	mov r1, r4
	mov r2, #1
	bl ov00_022D39D0
	add r0, r5, #0x348
	add r1, r4, #3
	add r2, r7, #2
	bl ov00_022D39D0
	add r0, r5, #0x348
	add r1, r6, r7
	bl ov00_022D3A88
	add r0, r5, #0x348
	bl ov00_022D397C
	ldr r1, [r5, #0xbc]
	add r0, r5, #0x348
	mov r2, #0x14
	bl ov00_022D39D0
	add r0, sp, #0
	mov r1, #0x5c
	mov r2, #0x28
	bl MemsetFast
	add r0, r5, #0x348
	add r1, sp, #0
	mov r2, #0x28
	bl ov00_022D39D0
	add r0, r5, #0x348
	add r1, r6, r7
	mov r2, #0x14
	bl ov00_022D39D0
	add r1, r6, r7
	add r0, r5, #0x348
	bl ov00_022D3A88
	add r7, r7, #0x14
_022D18EC:
	mov r0, r7, asr #8
	strb r0, [r4, #3]
	mov r2, r7
	add r0, r5, #0xc8
	add r1, r4, #5
	strb r7, [r4, #4]
	bl ov00_022D3B94
	add r0, r5, #0x1d4
	bl ov00_022D14AC
	add r0, r7, #5
	add sp, sp, #0x30
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022D1718

	arm_func_start ov00_022D191C
ov00_022D191C: ; 0x022D191C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r6, r1
	mov r5, r2
	add r4, sp, #0
_022D1930:
	mov r0, r4
	mov r1, r5
	bl ov00_022CB4D4
	ldr r1, [sp]
	cmp r1, #0
	mvneq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r1, r6
	strhi r6, [sp]
	ldr r2, [sp]
	mov r1, r7
	bl MemcpyFast
	ldr r0, [sp]
	mov r1, r5
	bl ov00_022CB5B4
	ldr r0, [sp]
	sub r6, r6, r0
	cmp r6, #0
	add r7, r7, r0
	bgt _022D1930
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022D191C

	arm_func_start ov00_022D1988
ov00_022D1988: ; 0x022D1988
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	mov r4, r2
	add r0, r6, #0x2ec
	bl ov00_022D39D0
	mov r1, r5
	mov r2, r4
	add r0, r6, #0x3a4
	bl ov00_022D3104
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022D1988

	arm_func_start ov00_022D19B4
ov00_022D19B4: ; 0x022D19B4
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov sb, r0
	ldrb r2, [sb, #0x455]
	mov r8, r1
	cmp r2, #9
	bne _022D19E0
	ldr r1, _022D1C30 ; =ov00_023250B8
	mov r0, r8
	ldr r1, [r1]
	blx r1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022D19E0:
	ldrb r3, [r8, #3]
	ldrb r1, [r8, #4]
	add r0, r2, #0xf9
	and r0, r0, #0xff
	add r1, r1, r3, lsl #8
	cmp r0, #1
	add r6, r1, #5
	ldrb r4, [r8]
	bhi _022D1A0C
	cmp r4, #0x15
	bne _022D1A1C
_022D1A0C:
	cmp r4, #0x15
	bne _022D1A4C
	cmp r6, #7
	bls _022D1A4C
_022D1A1C:
	mov r0, sb
	mov r1, r8
	bl ov00_022D14E8
	ldrb r2, [sb, #0x455]
	mov r6, r0
	cmp r2, #9
	bne _022D1A4C
	ldr r1, _022D1C30 ; =ov00_023250B8
	mov r0, r8
	ldr r1, [r1]
	blx r1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022D1A4C:
	sub r0, r4, #0x14
	cmp r0, #3
	add r5, r8, #5
	sub r6, r6, #5
	addls pc, pc, r0, lsl #2
	b _022D1C14
_022D1A64: ; jump table
	b _022D1A74 ; case 0
	b _022D1AA4 ; case 1
	b _022D1AB8 ; case 2
	b _022D1BF4 ; case 3
_022D1A74:
	ldr r0, [sb, #0x1d4]
	cmp r0, #0
	moveq r0, #9
	streqb r0, [sb, #0x455]
	beq _022D1C1C
	add r0, sb, #0x2e4
	mov r1, #0
	mov r2, #8
	bl MemsetFast
	mov r0, #7
	strb r0, [sb, #0x455]
	b _022D1C1C
_022D1AA4:
	ldrb r0, [r5]
	cmp r0, #2
	moveq r0, #9
	streqb r0, [sb, #0x455]
	b _022D1C1C
_022D1AB8:
	mov fp, #4
	mov sl, #1
	mov r4, #0
_022D1AC4:
	ldrb r7, [r5, #2]
	ldrb r0, [r5, #1]
	ldrb r3, [r5]
	ldrb r1, [r5, #3]
	mov r7, r7, lsl #8
	add r0, r7, r0, lsl #16
	cmp r3, #0xb
	add r7, r1, r0
	add r5, r5, #4
	bgt _022D1B14
	cmp r3, #0xb
	bge _022D1B88
	cmp r3, #2
	bgt _022D1BBC
	cmp r3, #1
	blt _022D1BBC
	beq _022D1B44
	cmp r3, #2
	beq _022D1B78
	b _022D1BBC
_022D1B14:
	sub r0, r3, #0xd
	cmp r0, #7
	addls pc, pc, r0, lsl #2
	b _022D1BBC
_022D1B24: ; jump table
	b _022D1B9C ; case 0
	b _022D1BA4 ; case 1
	b _022D1BBC ; case 2
	b _022D1B68 ; case 3
	b _022D1BBC ; case 4
	b _022D1BBC ; case 5
	b _022D1BBC ; case 6
	b _022D1BAC ; case 7
_022D1B44:
	ldrb r0, [sb, #0x454]
	cmp r0, #0
	beq _022D1BC4
	cmp r2, #0
	bne _022D1BC4
	mov r0, sb
	mov r1, r5
	bl ov00_022D0C54
	b _022D1BC4
_022D1B68:
	mov r0, sb
	mov r1, r5
	bl ov00_022D11F8
	b _022D1BC4
_022D1B78:
	mov r0, sb
	mov r1, r5
	bl ov00_022D0A1C
	b _022D1BC4
_022D1B88:
	mov r0, sb
	mov r1, r5
	bl ov00_022D07F8
	strb r4, [sb, #0x5ac]
	b _022D1BC4
_022D1B9C:
	strb sl, [sb, #0x5ac]
	b _022D1BC4
_022D1BA4:
	strb fp, [sb, #0x455]
	b _022D1BC4
_022D1BAC:
	mov r0, sb
	mov r1, r5
	bl ov00_022D13EC
	b _022D1BC4
_022D1BBC:
	mov r0, #9
	strb r0, [sb, #0x455]
_022D1BC4:
	mov r0, sb
	sub r1, r5, #4
	add r2, r7, #4
	bl ov00_022D1988
	add r0, r7, #4
	add r5, r5, r7
	subs r6, r6, r0
	beq _022D1C1C
	ldrb r2, [sb, #0x455]
	cmp r2, #9
	bne _022D1AC4
	b _022D1C1C
_022D1BF4:
	str r8, [sb, #0x824]
	mov r0, #5
	str r0, [sb, #0x82c]
	add r0, r6, #5
	str r0, [sb, #0x828]
	mov r0, #1
	strb r0, [sb, #0x456]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022D1C14:
	mov r0, #9
	strb r0, [sb, #0x455]
_022D1C1C:
	ldr r1, _022D1C30 ; =ov00_023250B8
	mov r0, r8
	ldr r1, [r1]
	blx r1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022D1C30: .word ov00_023250B8
	arm_func_end ov00_022D19B4

	arm_func_start ov00_022D1C34
ov00_022D1C34: ; 0x022D1C34
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #4
	mov r5, r0
	ldr r4, [r5, #0xc]
	add r6, sp, #0
_022D1C48:
	mov r0, r6
	mov r1, r5
	bl ov00_022CB4D4
	ldr r1, [sp]
	cmp r1, #0
	moveq r0, #9
	addeq sp, sp, #4
	streqb r0, [r4, #0x455]
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	cmp r1, #5
	blo _022D1C48
	ldrb r1, [r0]
	cmp r1, #0x80
	bne _022D1D30
	ldrb r1, [r4, #0x454]
	cmp r1, #0
	beq _022D1D24
	ldrb r1, [r4, #0x455]
	cmp r1, #0
	bne _022D1D24
	ldrb r2, [r0, #1]
	mov r1, r5
	mov r0, #2
	str r2, [sp]
	bl ov00_022CB5B4
	ldr r1, _022D1DC8 ; =ov00_0232508C
	ldr r0, [sp]
	ldr r1, [r1]
	blx r1
	movs r6, r0
	moveq r0, #9
	addeq sp, sp, #4
	streqb r0, [r4, #0x455]
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	ldr r1, [sp]
	mov r2, r5
	bl ov00_022D191C
	cmp r0, #0
	ldreqb r0, [r6]
	cmpeq r0, #1
	movne r0, #9
	strneb r0, [r4, #0x455]
	bne _022D1D00
	mov r0, r4
	add r1, r6, #1
	bl ov00_022D0B8C
_022D1D00:
	ldr r2, [sp]
	mov r0, r4
	mov r1, r6
	bl ov00_022D1988
	ldr r1, _022D1DCC ; =ov00_023250B8
	mov r0, r6
	ldr r1, [r1]
	blx r1
	b _022D1DBC
_022D1D24:
	mov r0, #9
	strb r0, [r4, #0x455]
	b _022D1DBC
_022D1D30:
	ldrb r2, [r0, #3]
	ldrb r0, [r0, #4]
	ldr r1, _022D1DD0 ; =0x00004805
	add r0, r0, r2, lsl #8
	add r0, r0, #5
	str r0, [sp]
	cmp r0, r1
	movhi r0, #9
	addhi sp, sp, #4
	strhib r0, [r4, #0x455]
	ldmhiia sp!, {r3, r4, r5, r6, pc}
	ldr r1, _022D1DC8 ; =ov00_0232508C
	ldr r1, [r1]
	blx r1
	movs r6, r0
	moveq r0, #9
	addeq sp, sp, #4
	streqb r0, [r4, #0x455]
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	ldr r1, [sp]
	mov r2, r5
	bl ov00_022D191C
	cmp r0, #0
	beq _022D1DB0
	ldr r1, _022D1DCC ; =ov00_023250B8
	mov r0, r6
	ldr r1, [r1]
	blx r1
	mov r0, #9
	add sp, sp, #4
	strb r0, [r4, #0x455]
	ldmia sp!, {r3, r4, r5, r6, pc}
_022D1DB0:
	mov r0, r4
	mov r1, r6
	bl ov00_022D19B4
_022D1DBC:
	ldrb r0, [r4, #0x455]
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, pc}
	.align 2, 0
_022D1DC8: .word ov00_0232508C
_022D1DCC: .word ov00_023250B8
_022D1DD0: .word 0x00004805
	arm_func_end ov00_022D1C34

	arm_func_start ov00_022D1DD4
ov00_022D1DD4: ; 0x022D1DD4
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x74
	ldr r2, _022D1EF4 ; =ov00_02326AC0
	mov sl, r0
	ldrb r0, [r2]
	mov sb, r1
	cmp r0, #0
	bne _022D1E38
	ldr r2, _022D1EF8 ; =ov00_023250E0
	add r0, sp, #0
	ldr r3, [r2]
	ldmib r2, {r1, r4}
	umull r6, r5, r4, r3
	mla r5, r4, r1, r5
	ldr r1, [r2, #0xc]
	ldr r4, [r2, #0x10]
	mla r5, r1, r3, r5
	ldr r1, [r2, #0x14]
	adds r4, r4, r6
	adc r3, r1, r5
	str r4, [r2]
	mov r1, #4
	str r3, [r2, #4]
	str r3, [sp]
	bl ov00_022D1F04
_022D1E38:
	cmp sb, #0
	mov r8, #0
	addle sp, sp, #0x74
	mov r1, #0x14
	ldmleia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r5, _022D1EFC ; =ov00_02326C38
	add r6, sp, #0x18
	mov fp, r1
	add r4, sp, #4
_022D1E5C:
	cmp r1, #0x14
	bne _022D1ED0
	mov r0, r6
	bl ov00_022D397C
	bl EnableIrqFlag
	mov r7, r0
	mov r0, r6
	mov r1, r5
	mov r2, fp
	bl ov00_022D39D0
	mov r0, r6
	mov r1, r4
	bl ov00_022D3AF0
	ldr lr, _022D1F00 ; =ov00_02326C4B
	mov r3, #1
	mov r2, #0x13
	add ip, sp, #0x17
_022D1EA0:
	ldrb r1, [lr]
	ldrb r0, [ip], #-1
	subs r2, r2, #1
	add r0, r1, r0
	add r0, r3, r0
	strb r0, [lr], #-1
	mov r3, r0, lsr #8
	bpl _022D1EA0
	str r0, [sp]
	mov r0, r7
	bl SetIrqFlag
	mov r1, #0
_022D1ED0:
	ldrb r0, [r4, r1]
	add r1, r1, #1
	cmp r0, #0
	strneb r0, [sl, r8]
	addne r8, r8, #1
	cmp r8, sb
	blt _022D1E5C
	add sp, sp, #0x74
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022D1EF4: .word ov00_02326AC0
_022D1EF8: .word ov00_023250E0
_022D1EFC: .word ov00_02326C38
_022D1F00: .word ov00_02326C4B
	arm_func_end ov00_022D1DD4

	arm_func_start ov00_022D1F04
ov00_022D1F04: ; 0x022D1F04
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #0x5c
	mov r6, r0
	add r0, sp, #0
	mov r5, r1
	bl ov00_022D397C
	bl EnableIrqFlag
	mov r4, r0
	ldr r1, _022D1F6C ; =ov00_02326C38
	add r0, sp, #0
	mov r2, #0x14
	bl ov00_022D39D0
	mov r1, r6
	mov r2, r5
	add r0, sp, #0
	bl ov00_022D39D0
	ldr r1, _022D1F6C ; =ov00_02326C38
	add r0, sp, #0
	bl ov00_022D3A88
	mov r0, r4
	bl SetIrqFlag
	ldr r0, _022D1F70 ; =ov00_02326AC0
	mov r1, #1
	strb r1, [r0]
	add sp, sp, #0x5c
	ldmia sp!, {r3, r4, r5, r6, pc}
	.align 2, 0
_022D1F6C: .word ov00_02326C38
_022D1F70: .word ov00_02326AC0
	arm_func_end ov00_022D1F04

	arm_func_start ov00_022D1F74
ov00_022D1F74: ; 0x022D1F74
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #4
	ldr r1, _022D20C4 ; =ov00_0232508C
	mov r6, r0
	ldr r1, [r1]
	mov r0, #0x83
	ldr r5, [r6, #0xc]
	blx r1
	movs r4, r0
	moveq r0, #9
	addeq sp, sp, #4
	streqb r0, [r5, #0x455]
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	mov r0, #0x14
	strb r0, [r4]
	mov r0, #3
	strb r0, [r4, #1]
	mov r1, #0
	strb r1, [r4, #2]
	strb r1, [r4, #3]
	mov r3, #1
	strb r3, [r4, #4]
	add r0, r5, #0x1cc
	mov r2, #8
	strb r3, [r4, #5]
	bl MemsetFast
	mov r0, #0x16
	strb r0, [r4, #6]
	mov r0, #3
	strb r0, [r4, #7]
	mov r1, #0
	strb r1, [r4, #8]
	strb r1, [r4, #9]
	mov r0, #0x28
	strb r0, [r4, #0xa]
	mov r0, #0x14
	strb r0, [r4, #0xb]
	strb r1, [r4, #0xc]
	strb r1, [r4, #0xd]
	mov r3, #0x24
	add r0, r5, #0x3a4
	add r1, r5, #0x3fc
	mov r2, #0x58
	strb r3, [r4, #0xe]
	bl MemcpyFast
	mov r0, r5
	add r1, r4, #0xf
	mov r2, #0
	bl ov00_022D1234
	add r0, r5, #0x3fc
	add r1, r5, #0x3a4
	mov r2, #0x58
	bl MemcpyFast
	add r0, r5, #0x2ec
	add r1, r5, #0x348
	mov r2, #0x5c
	bl MemcpyFast
	mov r0, r5
	add r1, r4, #0x1f
	mov r2, #0
	bl ov00_022D1310
	add r0, r5, #0x348
	add r1, r5, #0x2ec
	mov r2, #0x5c
	bl MemcpyFast
	mov r0, r5
	add r1, r4, #0xb
	mov r2, #0x28
	bl ov00_022D1988
	mov r0, r5
	add r1, r4, #6
	bl ov00_022D1718
	mov r2, #0
	add r1, r0, #6
	mov r0, r4
	mov r3, r2
	str r6, [sp]
	bl ov00_022CB77C
	ldr r1, _022D20C8 ; =ov00_023250B8
	mov r0, r4
	ldr r1, [r1]
	blx r1
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, pc}
	.align 2, 0
_022D20C4: .word ov00_0232508C
_022D20C8: .word ov00_023250B8
	arm_func_end ov00_022D1F74

	arm_func_start ov00_022D20CC
ov00_022D20CC: ; 0x022D20CC
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr r1, _022D2254 ; =ov00_0232508C
	mov r7, r0
	ldr r1, [r1]
	mov r0, #0x98
	ldr r4, [r7, #0xc]
	blx r1
	movs r5, r0
	moveq r0, #9
	streqb r0, [r4, #0x455]
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r0, #3
	strb r0, [r5, #9]
	mov r0, #0
	strb r0, [r5, #0xa]
	bl ov00_022CFD74
	mov r1, r0, lsr #0x18
	strb r1, [r4, #0x34]
	mov r1, r0, lsr #0x10
	strb r1, [r4, #0x35]
	mov r1, r0, lsr #8
	strb r1, [r4, #0x36]
	strb r0, [r4, #0x37]
	add r0, r4, #0x38
	mov r1, #0x1c
	bl ov00_022D1DD4
	add r0, r4, #0x34
	add r1, r5, #0xb
	mov r2, #0x20
	bl MemcpyFast
	ldrh r2, [r7, #0x18]
	ldr r1, [r7, #0x1c]
	mov r0, r4
	bl ov00_022CFB80
	ldrb r0, [r4, #0x30]
	cmp r0, #0
	moveq r0, #0
	streqb r0, [r5, #0x2b]
	addeq r0, r5, #0x2c
	beq _022D2184
	mov r2, #0x20
	add r0, r4, #0x74
	add r1, r5, #0x2c
	strb r2, [r5, #0x2b]
	bl MemcpyFast
	add r0, r5, #0x4c
_022D2184:
	mov r6, #0
	strb r6, [r0]
	mov r1, #4
	strb r1, [r0, #1]
	ldr r2, _022D2258 ; =ov00_023188CC
	add r0, r0, #2
_022D219C:
	mov r3, r6, lsl #1
	ldrh r1, [r2, r3]
	add r6, r6, #1
	cmp r6, #2
	mov r1, r1, asr #8
	strb r1, [r0]
	ldrh r1, [r2, r3]
	strb r1, [r0, #1]
	add r0, r0, #2
	blo _022D219C
	mov r3, #1
	mov r2, #0
	strb r3, [r0]
	add r1, r0, #2
	sub r1, r1, r5
	sub r6, r1, #5
	strb r2, [r0, #1]
	sub r1, r6, #4
	mov r0, #0x16
	strb r0, [r5]
	mov r0, #3
	strb r0, [r5, #1]
	strb r2, [r5, #2]
	mov r0, r6, asr #8
	strb r0, [r5, #3]
	strb r6, [r5, #4]
	strb r3, [r5, #5]
	mov r0, r1, asr #0x10
	strb r0, [r5, #6]
	mov r0, r1, asr #8
	strb r0, [r5, #7]
	strb r1, [r5, #8]
	mov r0, r5
	mov r3, r2
	add r1, r6, #5
	str r7, [sp]
	bl ov00_022CB77C
	mov r0, r4
	mov r2, r6
	add r1, r5, #5
	bl ov00_022D1988
	ldr r1, _022D225C ; =ov00_023250B8
	mov r0, r5
	ldr r1, [r1]
	blx r1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022D2254: .word ov00_0232508C
_022D2258: .word ov00_023188CC
_022D225C: .word ov00_023250B8
	arm_func_end ov00_022D20CC

	arm_func_start ov00_022D2260
ov00_022D2260: ; 0x022D2260
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #8
	mov sl, r0
	ldr r4, [sl, #0xc]
	ldrb r0, [r4, #0x5ac]
	cmp r0, #0
	beq _022D2294
	mov r2, #0
	ldr r0, _022D2514 ; =ov00_02318150
	mov r3, r2
	mov r1, #7
	str sl, [sp]
	bl ov00_022CB77C
_022D2294:
	mov r0, #3
	strb r0, [r4]
	mov r0, #0
	strb r0, [r4, #1]
	add r0, r4, #2
	mov r1, #0x2e
	bl ov00_022D1DD4
	ldr sb, [r4, #0x594]
	ldr r0, _022D2518 ; =ov00_0232508C
	mov r1, sb, lsl #1
	ldr r2, [r0]
	add r1, r1, r1, lsr #31
	mov r0, sb
	mov r7, r1, asr #1
	blx r2
	movs r8, r0
	moveq r0, #9
	addeq sp, sp, #8
	streqb r0, [r4, #0x455]
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r0, #0
	strb r0, [r8]
	mov r2, #2
	add r0, r8, #2
	sub r1, sb, #0x33
	strb r2, [r8, #1]
	bl ov00_022D1DD4
	add r1, r8, sb
	mov r0, r4
	sub r3, sb, #0x31
	mov r5, #0
	sub r1, r1, #0x30
	mov r2, #0x30
	strb r5, [r8, r3]
	bl MemcpyFast
	ldr r1, _022D2518 ; =ov00_0232508C
	mov r0, r7, lsl #3
	ldr r1, [r1]
	blx r1
	movs r5, r0
	bne _022D2358
	ldr r1, _022D251C ; =ov00_023250B8
	mov r0, r8
	ldr r1, [r1]
	blx r1
	mov r0, #9
	add sp, sp, #8
	strb r0, [r4, #0x455]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022D2358:
	add r0, r5, r7, lsl #1
	add fp, r0, r7, lsl #1
	mov r1, r8
	mov r2, sb
	mov r3, r7
	str r0, [sp, #4]
	add r6, fp, r7, lsl #1
	bl ov00_022D49AC
	add r0, r4, #0x198
	add r1, r0, #0x400
	ldr r2, [r4, #0x5a0]
	mov r0, fp
	mov r3, r7
	bl ov00_022D49AC
	add r1, r4, #0x94
	mov r0, r6
	add r1, r1, #0x400
	mov r2, sb
	mov r3, r7
	bl ov00_022D49AC
	bl ov00_022CFDCC
	str r6, [sp]
	mov r6, r0
	ldr r1, [sp, #4]
	mov r2, fp
	mov r3, r7
	mov r0, r5
	bl ov00_022D4398
	mov r0, r6
	bl ov00_022CFE18
	ldr r1, _022D2518 ; =ov00_0232508C
	add r0, sb, #0x49
	ldr r1, [r1]
	blx r1
	movs r6, r0
	bne _022D2418
	ldr r1, _022D251C ; =ov00_023250B8
	mov r0, r8
	ldr r1, [r1]
	blx r1
	ldr r1, _022D251C ; =ov00_023250B8
	mov r0, r5
	ldr r1, [r1]
	blx r1
	mov r0, #9
	add sp, sp, #8
	strb r0, [r4, #0x455]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022D2418:
	mov r0, #0x16
	strb r0, [r6]
	mov r1, #3
	add r0, sb, #4
	strb r1, [r6, #1]
	mov r1, #0
	strb r1, [r6, #2]
	mov r1, r0, asr #8
	strb r1, [r6, #3]
	strb r0, [r6, #4]
	mov r0, #0x10
	strb r0, [r6, #5]
	mov r0, sb, asr #0x10
	strb r0, [r6, #6]
	mov r0, sb, asr #8
	strb r0, [r6, #7]
	strb sb, [r6, #8]
	tst sb, #1
	add r0, r6, #9
	beq _022D2480
	add r0, sb, sb, lsr #31
	mov r0, r0, asr #1
	mov r0, r0, lsl #1
	ldrh r1, [r5, r0]
	add r0, r6, #0xa
	strb r1, [r6, #9]
_022D2480:
	add r1, sb, sb, lsr #31
	mov r1, r1, asr #1
	subs r3, r1, #1
	bmi _022D24B4
_022D2490:
	mov r2, r3, lsl #1
	ldrh r1, [r5, r2]
	subs r3, r3, #1
	mov r1, r1, asr #8
	strb r1, [r0]
	ldrh r1, [r5, r2]
	strb r1, [r0, #1]
	add r0, r0, #2
	bpl _022D2490
_022D24B4:
	mov r2, #0
	mov r0, r6
	mov r3, r2
	add r1, sb, #9
	str sl, [sp]
	bl ov00_022CB77C
	mov r0, r4
	add r1, r6, #5
	add r2, sb, #4
	bl ov00_022D1988
	ldr r1, _022D251C ; =ov00_023250B8
	mov r0, r6
	ldr r1, [r1]
	blx r1
	ldr r1, _022D251C ; =ov00_023250B8
	mov r0, r5
	ldr r1, [r1]
	blx r1
	ldr r1, _022D251C ; =ov00_023250B8
	mov r0, r8
	ldr r1, [r1]
	blx r1
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022D2514: .word ov00_02318150
_022D2518: .word ov00_0232508C
_022D251C: .word ov00_023250B8
	arm_func_end ov00_022D2260

	arm_func_start ov00_022D2520
ov00_022D2520: ; 0x022D2520
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022D1C34
	cmp r0, #7
	movne r0, #1
	ldmneia sp!, {r4, pc}
	mov r0, r4
	bl ov00_022D1C34
	cmp r0, #6
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D2520

	arm_func_start ov00_022D2550
ov00_022D2550: ; 0x022D2550
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	ldr r4, [r5, #0xc]
	bl ov00_022D20CC
_022D2560:
	mov r0, r5
	bl ov00_022D1C34
	cmp r0, #9
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, pc}
	cmp r0, #4
	beq _022D2588
	ldrb r0, [r4, #0x31]
	cmp r0, #0
	beq _022D2560
_022D2588:
	ldrb r0, [r4, #0x31]
	cmp r0, #0
	beq _022D25BC
	mov r0, r4
	bl ov00_022D102C
	mov r0, r5
	bl ov00_022D2520
	cmp r0, #0
	movne r0, #1
	ldmneia sp!, {r3, r4, r5, pc}
	mov r0, r5
	bl ov00_022D1F74
	b _022D260C
_022D25BC:
	mov r0, r5
	bl ov00_022D2260
	mov r0, r4
	bl ov00_022D0FCC
	ldrb r0, [r4, #0x30]
	cmp r0, #0
	beq _022D25E8
	ldrh r2, [r5, #0x18]
	ldr r1, [r5, #0x1c]
	mov r0, r4
	bl ov00_022CFC20
_022D25E8:
	mov r0, r4
	bl ov00_022D102C
	mov r0, r5
	bl ov00_022D1F74
	mov r0, r5
	bl ov00_022D2520
	cmp r0, #0
	movne r0, #1
	ldmneia sp!, {r3, r4, r5, pc}
_022D260C:
	mov r0, #8
	strb r0, [r4, #0x455]
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D2550

	arm_func_start ov00_022D261C
ov00_022D261C: ; 0x022D261C
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	ldrb r1, [r5, #8]
	ldr r4, [r5, #0xc]
	cmp r1, #4
	beq _022D2644
	bl ov00_022CB278
	cmp r0, #0
	movne r0, #1
	ldmneia sp!, {r3, r4, r5, pc}
_022D2644:
	mov r1, #0
	strb r1, [r4, #0x455]
	str r1, [r4, #0x1d4]
	add r0, r4, #0x2ec
	strb r1, [r4, #0x454]
	bl ov00_022D397C
	add r0, r4, #0x3a4
	bl ov00_022D30BC
	mov r0, r5
	bl ov00_022D2550
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D261C

	arm_func_start ov00_022D2670
ov00_022D2670: ; 0x022D2670
	stmdb sp!, {r4, r5, r6, lr}
	mov r5, r1
	ldr r4, [r5, #0xc]
	mov r6, r0
	ldr ip, [r4, #0x824]
	cmp ip, #0
	beq _022D26F4
	ldrb r0, [r4, #0x456]
	cmp r0, #0
	bne _022D26F4
	ldr r3, [r4, #0x82c]
	ldr r1, [r4, #0x828]
	mov r2, r5
	add r0, ip, r3
	sub r1, r1, r3
	bl ov00_022D191C
	cmp r0, #0
	beq _022D26D8
	ldr r1, _022D2744 ; =ov00_023250B8
	ldr r0, [r4, #0x824]
	ldr r1, [r1]
	blx r1
	mov r0, #0
	str r0, [r4, #0x824]
	str r0, [r6]
	ldmia sp!, {r4, r5, r6, pc}
_022D26D8:
	ldr r1, [r4, #0x824]
	mov r0, r4
	bl ov00_022D19B4
	ldrb r0, [r4, #0x456]
	cmp r0, #0
	moveq r0, #0
	streq r0, [r4, #0x824]
_022D26F4:
	ldr r0, [r4, #0x824]
	cmp r0, #0
	bne _022D2724
_022D2700:
	mov r0, r5
	bl ov00_022D1C34
	cmp r0, #9
	moveq r0, #0
	streq r0, [r6]
	ldmeqia sp!, {r4, r5, r6, pc}
	ldr r0, [r4, #0x824]
	cmp r0, #0
	beq _022D2700
_022D2724:
	ldr r1, [r4, #0x828]
	ldr r0, [r4, #0x82c]
	sub r0, r1, r0
	str r0, [r6]
	ldr r1, [r4, #0x824]
	ldr r0, [r4, #0x82c]
	add r0, r1, r0
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022D2744: .word ov00_023250B8
	arm_func_end ov00_022D2670

	arm_func_start ov00_022D2748
ov00_022D2748: ; 0x022D2748
	stmdb sp!, {r4, lr}
	ldr r4, [r1, #0xc]
	ldr r2, [r4, #0x828]
	ldr r1, [r4, #0x82c]
	sub r2, r2, r1
	cmp r0, r2
	blo _022D2788
	ldr r0, [r4, #0x824]
	cmp r0, #0
	beq _022D277C
	ldr r1, _022D2794 ; =ov00_023250B8
	ldr r1, [r1]
	blx r1
_022D277C:
	mov r0, #0
	str r0, [r4, #0x824]
	ldmia sp!, {r4, pc}
_022D2788:
	add r0, r1, r0
	str r0, [r4, #0x82c]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D2794: .word ov00_023250B8
	arm_func_end ov00_022D2748

	arm_func_start ov00_022D2798
ov00_022D2798: ; 0x022D2798
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #4
	mov r5, r0
	ldr r4, [r5, #0xc]
	ldr r0, [r4, #0x824]
	cmp r0, #0
	ldr r0, [r5, #0x44]
	bne _022D2838
	cmp r0, #5
	addlo sp, sp, #4
	ldmloia sp!, {r3, r4, r5, r6, pc}
	add r0, sp, #0
	mov r1, r5
	bl ov00_022CB4D4
	ldrb r2, [r0, #3]
	ldrb r0, [r0, #4]
	ldr r1, _022D28D4 ; =0x00004805
	add r0, r0, r2, lsl #8
	add r0, r0, #5
	str r0, [sp]
	cmp r0, r1
	movhi r0, #9
	addhi sp, sp, #4
	strhib r0, [r4, #0x455]
	ldmhiia sp!, {r3, r4, r5, r6, pc}
	ldr r1, _022D28D8 ; =ov00_0232508C
	ldr r1, [r1]
	blx r1
	cmp r0, #0
	str r0, [r4, #0x824]
	moveq r0, #9
	addeq sp, sp, #4
	streqb r0, [r4, #0x455]
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	ldr r1, [sp]
	mov r0, #0
	str r1, [r4, #0x828]
	str r0, [r4, #0x82c]
	strb r0, [r4, #0x456]
	b _022D2844
_022D2838:
	cmp r0, #0
	addeq sp, sp, #4
	ldmeqia sp!, {r3, r4, r5, r6, pc}
_022D2844:
	add r0, sp, #0
	mov r1, r5
	bl ov00_022CB4D4
	ldr r3, [r4, #0x828]
	ldr r2, [r4, #0x82c]
	ldr r1, [sp]
	sub r2, r3, r2
	cmp r1, r2
	strhs r2, [sp]
	movhs r6, #1
	ldr r3, [r4, #0x824]
	ldr r1, [r4, #0x82c]
	ldr r2, [sp]
	add r1, r3, r1
	movlo r6, #0
	bl MemcpyFast
	ldr r0, [sp]
	mov r1, r5
	bl ov00_022CB5B4
	cmp r6, #0
	beq _022D28BC
	ldr r1, [r4, #0x824]
	mov r0, r4
	bl ov00_022D19B4
	ldrb r0, [r4, #0x456]
	add sp, sp, #4
	cmp r0, #0
	moveq r0, #0
	streq r0, [r4, #0x824]
	ldmia sp!, {r3, r4, r5, r6, pc}
_022D28BC:
	ldr r1, [r4, #0x82c]
	ldr r0, [sp]
	add r0, r1, r0
	str r0, [r4, #0x82c]
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, pc}
	.align 2, 0
_022D28D4: .word 0x00004805
_022D28D8: .word ov00_0232508C
	arm_func_end ov00_022D2798

	arm_func_start ov00_022D28DC
ov00_022D28DC: ; 0x022D28DC
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	ldr r4, [r5, #0xc]
	ldr r0, [r4, #0x824]
	cmp r0, #0
	ldrneb r0, [r4, #0x456]
	cmpne r0, #0
	bne _022D2904
	mov r0, r5
	bl ov00_022D2798
_022D2904:
	ldr r1, [r4, #0x824]
	cmp r1, #0
	ldrneb r0, [r4, #0x456]
	cmpne r0, #0
	beq _022D2928
	ldr r1, [r4, #0x828]
	ldr r0, [r4, #0x82c]
	sub r0, r1, r0
	ldmia sp!, {r3, r4, r5, pc}
_022D2928:
	cmp r1, #0
	bne _022D2950
	ldrb r0, [r5, #8]
	cmp r0, #4
	bne _022D2948
	ldrb r0, [r4, #0x455]
	cmp r0, #9
	bne _022D2950
_022D2948:
	mvn r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022D2950:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D28DC

	arm_func_start ov00_022D2958
ov00_022D2958: ; 0x022D2958
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0xc
	ldr r4, [sp, #0x30]
	mov sb, r1
	mov r1, r4
	ldr r1, [r1, #0xc]
	mov sl, r0
	mov r0, #0
	str r4, [sp, #0x30]
	str r1, [sp, #8]
	mov r8, r2
	add r5, sb, r3
	str r0, [sp, #4]
_022D298C:
	ldr r0, _022D2A80 ; =0x00000B4F
	ldr r1, _022D2A84 ; =ov00_0232508C
	cmp r5, r0
	movgt r6, r0
	movle r6, r5
	ldr r1, [r1]
	add r0, r6, #0x19
	blx r1
	movs r4, r0
	beq _022D2A74
	cmp sb, r6
	movhs r7, r6
	movlo r7, sb
	mov r0, sl
	add r1, r4, #5
	mov r2, r7
	sub fp, r6, r7
	bl MemcpyFast
	add r1, r4, #5
	mov r0, r8
	add r1, r1, r7
	mov r2, fp
	add sl, sl, r7
	sub sb, sb, r7
	bl MemcpyFast
	mov r0, #0x17
	strb r0, [r4]
	mov r0, #3
	strb r0, [r4, #1]
	mov r0, #0
	strb r0, [r4, #2]
	mov r0, r6, asr #8
	strb r0, [r4, #3]
	ldr r0, [sp, #8]
	mov r1, r4
	add r8, r8, fp
	strb r6, [r4, #4]
	bl ov00_022D1718
	ldr r1, [sp, #0x30]
	mov r7, r0
	mov r2, #0
	str r1, [sp]
	mov r0, r4
	mov r1, r7
	mov r3, r2
	bl ov00_022CB77C
	cmp r0, r7
	ldr r1, _022D2A88 ; =ov00_023250B8
	mov r0, r4
	ldr r1, [r1]
	movlo r6, #0
	blx r1
	ldr r0, [sp, #4]
	subs r5, r5, r6
	add r0, r0, r6
	str r0, [sp, #4]
	cmpne r6, #0
	bne _022D298C
_022D2A74:
	ldr r0, [sp, #4]
	add sp, sp, #0xc
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022D2A80: .word 0x00000B4F
_022D2A84: .word ov00_0232508C
_022D2A88: .word ov00_023250B8
	arm_func_end ov00_022D2958

	arm_func_start ov00_022D2A8C
ov00_022D2A8C: ; 0x022D2A8C
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #0x20
	mov r5, r0
	ldr r4, [r5, #0xc]
	ldrb r0, [r4, #0x455]
	cmp r0, #8
	bne _022D2AFC
	mov ip, #0
	mov r6, #0x15
	mov lr, #3
	mov r3, #2
	mov r2, #1
	add r1, sp, #4
	mov r0, r4
	strb r6, [sp, #4]
	strb lr, [sp, #5]
	strb ip, [sp, #6]
	strb ip, [sp, #7]
	strb r3, [sp, #8]
	strb r2, [sp, #9]
	strb ip, [sp, #0xa]
	bl ov00_022D1718
	mov r2, #0
	mov r1, r0
	add r0, sp, #4
	mov r3, r2
	str r5, [sp]
	bl ov00_022CB77C
_022D2AFC:
	mov r0, #0
	strb r0, [r4, #0x455]
	add sp, sp, #0x20
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022D2A8C

	arm_func_start ov00_022D2B0C
ov00_022D2B0C: ; 0x022D2B0C
	stmdb sp!, {r4, lr}
	ldr r4, [r0, #0xc]
	mov r0, #0
	strb r0, [r4, #0x455]
	ldr r0, [r4, #0x824]
	cmp r0, #0
	beq _022D2B34
	ldr r1, _022D2B40 ; =ov00_023250B8
	ldr r1, [r1]
	blx r1
_022D2B34:
	mov r0, #0
	str r0, [r4, #0x824]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D2B40: .word ov00_023250B8
	arm_func_end ov00_022D2B0C

	arm_func_start ov00_022D2B44
ov00_022D2B44: ; 0x022D2B44
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r0, _022D2B6C ; =_02000C1C
	bl OSi_ReferSymbol
	ldr r0, _022D2B70 ; =_022B966C
	ldr r0, [r0, #4]
	ldr r0, [r0, #0xa4]
	cmp r0, #0
	strneb r4, [r0, #9]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D2B6C: .word _02000C1C
_022D2B70: .word _022B966C
	arm_func_end ov00_022D2B44

	arm_func_start ov00_022D2B74
ov00_022D2B74: ; 0x022D2B74
	stmdb sp!, {r4, r5, r6, lr}
	mov r5, r0
	bl EnableIrqFlag
	mov r4, #0
	ldr r6, _022D2C48 ; =ov00_02326AC8
	ldr r1, _022D2C4C ; =0x000003BD
	mov r2, r4
_022D2B90:
	ldrb r3, [r6, #0x5a]
	cmp r3, #0
	beq _022D2BAC
	ldr r3, [r6, #0x50]
	sub r3, r5, r3
	cmp r3, r1
	strgtb r2, [r6, #0x5a]
_022D2BAC:
	add r4, r4, #1
	cmp r4, #4
	add r6, r6, #0x5c
	blt _022D2B90
	bl SetIrqFlag
	ldr r0, _022D2C50 ; =_022B966C
	ldr r4, [r0, #8]
	cmp r4, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	mov r6, #0
_022D2BD4:
	ldr r1, [r4, #0xa4]
	cmp r1, #0
	ldrne r0, [r1]
	cmpne r0, #0
	ldrneb r0, [r1, #9]
	cmpne r0, #0
	beq _022D2C38
	ldrb r0, [r1, #8]
	cmp r0, #4
	bne _022D2C38
	ldr r0, [r1, #0xc]
	ldrb r0, [r0, #0x455]
	cmp r0, #8
	bhs _022D2C38
	ldr r0, [r1, #0x10]
	sub r0, r5, r0
	cmp r0, #0xef
	ble _022D2C38
	ldr r0, [r1, #4]
	cmp r0, #2
	bne _022D2C38
	strb r6, [r1, #8]
	str r6, [r1, #4]
	ldr r0, [r1]
	bl OS_WakeupThreadDirect
_022D2C38:
	ldr r4, [r4, #0x68]
	cmp r4, #0
	bne _022D2BD4
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022D2C48: .word ov00_02326AC8
_022D2C4C: .word 0x000003BD
_022D2C50: .word _022B966C
	arm_func_end ov00_022D2B74

	arm_func_start ov00_022D2C54
ov00_022D2C54: ; 0x022D2C54
	ldr ip, _022D2C68 ; =MemsetFast
	ldr r0, _022D2C6C ; =ov00_02326AC8
	mov r1, #0
	mov r2, #0x170
	bx ip
	.align 2, 0
_022D2C68: .word MemsetFast
_022D2C6C: .word ov00_02326AC8
	arm_func_end ov00_022D2C54

	arm_func_start ov00_022D2C70
ov00_022D2C70: ; 0x022D2C70
	ldr ip, _022D2C84 ; =MemcpyFast
	mov r3, r0
	mov r0, r1
	mov r1, r3
	bx ip
	.align 2, 0
_022D2C84: .word MemcpyFast
	arm_func_end ov00_022D2C70

	arm_func_start ov00_022D2C88
ov00_022D2C88: ; 0x022D2C88
	ldr ip, _022D2C9C ; =MemcpyFast
	mov r3, r0
	mov r0, r1
	mov r1, r3
	bx ip
	.align 2, 0
_022D2C9C: .word MemcpyFast
	arm_func_end ov00_022D2C88

	arm_func_start ov00_022D2CA0
ov00_022D2CA0: ; 0x022D2CA0
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x44
	str r0, [sp]
	ldr r3, [sp]
	add r0, sp, #4
	mov r2, #0x40
	ldmia r3, {r4, r5, r6, r7}
	bl ov00_022D2C88
	mov r3, #0
	ldr lr, _022D30B4 ; =ov00_02318934
	mov ip, r3
	add r2, sp, #4
_022D2CD0:
	ldr r1, _022D30B8 ; =ov00_023189B4
	ldrb r0, [lr]
	add sb, r1, r3, lsl #2
	eor r1, r6, r7
	and r8, r5, r1
	ldr r1, _022D30B8 ; =ov00_023189B4
	ldr r0, [r2, r0, lsl #2]
	ldr sl, [r1, r3, lsl #2]
	eor r1, r7, r8
	add r0, r1, r0
	add r0, sl, r0
	add r1, r4, r0
	mov r0, r1, lsr #0x19
	orr r0, r0, r1, lsl #7
	ldrb r1, [lr, #1]
	add r4, r5, r0
	eor r0, r5, r6
	and r0, r4, r0
	ldr sl, [r2, r1, lsl #2]
	eor r0, r6, r0
	add r0, r0, sl
	ldr r8, [sb, #4]
	ldrb sl, [lr, #2]
	add r0, r8, r0
	add r7, r7, r0
	mov r0, r7, lsr #0x14
	orr r0, r0, r7, lsl #12
	add r7, r4, r0
	eor r0, r4, r5
	and r0, r7, r0
	ldr r1, [sb, #8]
	ldrb fp, [lr, #3]
	ldr sl, [r2, sl, lsl #2]
	eor r0, r5, r0
	add r0, r0, sl
	add r0, r1, r0
	add r6, r6, r0
	mov r1, r6, lsr #0xf
	orr r1, r1, r6, lsl #17
	add ip, ip, #1
	eor r8, r7, r4
	add r6, r7, r1
	and r1, r6, r8
	ldr r0, [r2, fp, lsl #2]
	eor r1, r4, r1
	ldr sb, [sb, #0xc]
	add r0, r1, r0
	add r0, sb, r0
	add r1, r5, r0
	mov r0, r1, lsr #0xa
	orr r0, r0, r1, lsl #22
	add lr, lr, #4
	add r5, r6, r0
	add r3, r3, #4
	cmp ip, #4
	blt _022D2CD0
	ldr r0, _022D30B4 ; =ov00_02318934
	ldr lr, _022D30B8 ; =ov00_023189B4
	mov fp, #0
	add sl, r0, r3
	add sb, sp, #4
_022D2DC4:
	ldrb r0, [sl]
	add ip, lr, r3, lsl #2
	eor r1, r5, r6
	and r1, r7, r1
	ldr r8, [lr, r3, lsl #2]
	eor r1, r6, r1
	ldr r0, [sb, r0, lsl #2]
	ldr r2, [ip, #4]
	add r0, r1, r0
	add r0, r8, r0
	add r1, r4, r0
	mov r0, r1, lsr #0x1b
	orr r1, r0, r1, lsl #5
	ldrb r0, [sl, #1]
	add r4, r5, r1
	eor r1, r4, r5
	and r1, r6, r1
	eor r1, r5, r1
	ldr r0, [sb, r0, lsl #2]
	ldr r8, [ip, #8]
	add r0, r1, r0
	add r0, r2, r0
	add r2, r7, r0
	ldr r0, [ip, #0xc]
	mov r1, r2, lsr #0x17
	orr r1, r1, r2, lsl #9
	add r7, r4, r1
	eor r1, r7, r4
	and r1, r5, r1
	eor r2, r4, r1
	ldrb r1, [sl, #2]
	ldrb ip, [sl, #3]
	add sl, sl, #4
	ldr r1, [sb, r1, lsl #2]
	ldr ip, [sb, ip, lsl #2]
	add r1, r2, r1
	add r1, r8, r1
	add r2, r6, r1
	mov r1, r2, lsr #0x12
	orr r1, r1, r2, lsl #14
	add r6, r7, r1
	eor r1, r6, r7
	and r1, r4, r1
	eor r1, r7, r1
	add r1, r1, ip
	add r0, r0, r1
	add r1, r5, r0
	mov r0, r1, lsr #0xc
	orr r0, r0, r1, lsl #20
	add r5, r6, r0
	add r3, r3, #4
	add fp, fp, #1
	cmp fp, #4
	blt _022D2DC4
	ldr r0, _022D30B4 ; =ov00_02318934
	ldr r1, _022D30B8 ; =ov00_023189B4
	add r2, r0, r3
	mov r8, #0
	add r0, sp, #4
_022D2EB0:
	ldrb sb, [r2]
	add fp, r1, r3, lsl #2
	eor ip, r5, r6
	ldr sl, [r0, sb, lsl #2]
	eor ip, r7, ip
	ldr sb, [r1, r3, lsl #2]
	add sl, ip, sl
	add sb, sb, sl
	add sb, r4, sb
	mov r4, sb, lsr #0x1c
	ldrb sl, [r2, #1]
	orr r4, r4, sb, lsl #4
	add r4, r5, r4
	eor sb, r4, r5
	eor sb, r6, sb
	ldr ip, [r0, sl, lsl #2]
	ldr sl, [fp, #4]
	add sb, sb, ip
	add sb, sl, sb
	add sb, r7, sb
	mov r7, sb, lsr #0x15
	orr r7, r7, sb, lsl #11
	ldrb sb, [r2, #2]
	add r7, r4, r7
	ldr sl, [fp, #8]
	ldr ip, [r0, sb, lsl #2]
	ldr sb, [fp, #0xc]
	eor fp, r7, r4
	eor fp, r5, fp
	add fp, fp, ip
	add sl, sl, fp
	add sl, r6, sl
	mov r6, sl, lsr #0x10
	orr r6, r6, sl, lsl #16
	add r6, r7, r6
	eor sl, r6, r7
	eor fp, r4, sl
	ldrb sl, [r2, #3]
	add r2, r2, #4
	add r3, r3, #4
	ldr sl, [r0, sl, lsl #2]
	add r8, r8, #1
	add sl, fp, sl
	add sb, sb, sl
	add sb, r5, sb
	cmp r8, #4
	mov r5, sb, lsr #9
	orr r5, r5, sb, lsl #23
	add r5, r6, r5
	blt _022D2EB0
	ldr r0, _022D30B4 ; =ov00_02318934
	mov sb, #0
	add r8, r0, r3
	add r2, sp, #4
_022D2F88:
	ldr r1, _022D30B8 ; =ov00_023189B4
	ldrb r0, [r8]
	add fp, r1, r3, lsl #2
	mvn r1, r7
	orr sl, r5, r1
	ldr r1, _022D30B8 ; =ov00_023189B4
	ldr r0, [r2, r0, lsl #2]
	ldr ip, [r1, r3, lsl #2]
	eor r1, r6, sl
	add r0, r1, r0
	add r0, ip, r0
	add r1, r4, r0
	mov r0, r1, lsr #0x1a
	orr r0, r0, r1, lsl #6
	ldrb r1, [r8, #1]
	add r4, r5, r0
	mvn r0, r6
	orr r0, r4, r0
	ldr ip, [r2, r1, lsl #2]
	eor r0, r5, r0
	add r0, r0, ip
	ldr sl, [fp, #4]
	ldrb ip, [r8, #2]
	add r0, sl, r0
	add r7, r7, r0
	mov r0, r7, lsr #0x16
	orr r0, r0, r7, lsl #10
	add r7, r4, r0
	mvn r0, r5
	orr r0, r7, r0
	ldr r1, [fp, #8]
	ldrb lr, [r8, #3]
	ldr ip, [r2, ip, lsl #2]
	eor r0, r4, r0
	add r0, r0, ip
	add r0, r1, r0
	add r6, r6, r0
	mov r1, r6, lsr #0x11
	orr r1, r1, r6, lsl #15
	add sb, sb, #1
	mvn sl, r4
	add r6, r7, r1
	orr r1, r6, sl
	ldr r0, [r2, lr, lsl #2]
	eor r1, r7, r1
	ldr fp, [fp, #0xc]
	add r0, r1, r0
	add r0, fp, r0
	add r1, r5, r0
	mov r0, r1, lsr #0xb
	orr r0, r0, r1, lsl #21
	add r8, r8, #4
	add r5, r6, r0
	add r3, r3, #4
	cmp sb, #4
	blt _022D2F88
	ldr r0, [sp]
	ldr r0, [r0]
	add r1, r0, r4
	ldr r0, [sp]
	str r1, [r0]
	ldr r0, [r0, #4]
	add r1, r0, r5
	ldr r0, [sp]
	str r1, [r0, #4]
	ldr r0, [r0, #8]
	add r1, r0, r6
	ldr r0, [sp]
	str r1, [r0, #8]
	ldr r0, [r0, #0xc]
	add r1, r0, r7
	ldr r0, [sp]
	str r1, [r0, #0xc]
	add sp, sp, #0x44
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022D30B4: .word ov00_02318934
_022D30B8: .word ov00_023189B4
	arm_func_end ov00_022D2CA0

	arm_func_start ov00_022D30BC
ov00_022D30BC: ; 0x022D30BC
	stmdb sp!, {r4, lr}
	mov r1, #0
	mov r2, #0x58
	mov r4, r0
	bl MemsetFast
	ldr r1, _022D30F4 ; =0x67452301
	ldr r0, _022D30F8 ; =0xEFCDAB89
	str r1, [r4]
	ldr r1, _022D30FC ; =0x98BADCFE
	str r0, [r4, #4]
	ldr r0, _022D3100 ; =0x10325476
	str r1, [r4, #8]
	str r0, [r4, #0xc]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D30F4: .word 0x67452301
_022D30F8: .word 0xEFCDAB89
_022D30FC: .word 0x98BADCFE
_022D3100: .word 0x10325476
	arm_func_end ov00_022D30BC

	arm_func_start ov00_022D3104
ov00_022D3104: ; 0x022D3104
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r8, r0
	ldr r3, [r8, #0x10]
	mov r6, r2
	add r0, r3, r6, lsl #3
	str r0, [r8, #0x10]
	cmp r0, r6, lsl #3
	ldrlo r0, [r8, #0x14]
	mov r2, r3, lsr #3
	addlo r0, r0, #1
	strlo r0, [r8, #0x14]
	ldr r0, [r8, #0x14]
	and r4, r2, #0x3f
	rsb r5, r4, #0x40
	add r0, r0, r6, lsr #29
	mov r7, r1
	str r0, [r8, #0x14]
	cmp r6, r5
	blo _022D31A0
	add r1, r8, #0x18
	mov r0, r7
	mov r2, r5
	add r1, r1, r4
	bl MemcpyFast
	mov r0, r8
	add r1, r8, #0x18
	mov r4, #0
	bl ov00_022D2CA0
	add r0, r5, #0x3f
	cmp r0, r6
	bhs _022D31A4
_022D3180:
	mov r0, r8
	add r1, r7, r5
	bl ov00_022D2CA0
	add r5, r5, #0x40
	add r0, r5, #0x3f
	cmp r0, r6
	blo _022D3180
	b _022D31A4
_022D31A0:
	mov r5, #0
_022D31A4:
	add r1, r8, #0x18
	add r0, r7, r5
	add r1, r1, r4
	sub r2, r6, r5
	bl MemcpyFast
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022D3104

	arm_func_start ov00_022D31BC
ov00_022D31BC: ; 0x022D31BC
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	mov r0, r4
	add r1, r5, #0x10
	mov r2, #8
	bl ov00_022D2C70
	ldr r0, [r5, #0x10]
	ldr r1, _022D3220 ; =ov00_02318974
	mov r0, r0, lsr #3
	and r0, r0, #0x3f
	cmp r0, #0x38
	rsblt r2, r0, #0x38
	rsbge r2, r0, #0x78
	mov r0, r5
	bl ov00_022D3104
	mov r0, r5
	mov r1, r4
	mov r2, #8
	bl ov00_022D3104
	mov r0, r4
	mov r1, r5
	mov r2, #0x10
	bl ov00_022D2C70
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022D3220: .word ov00_02318974
	arm_func_end ov00_022D31BC

	arm_func_start ov00_022D3224
ov00_022D3224: ; 0x022D3224
	add r2, r0, #0xd
	add ip, r0, #2
	and r3, r2, #0xf
	eor r2, r0, #8
	and ip, ip, #0xf
	ldr r3, [r1, r3, lsl #2]
	ldr r2, [r1, r2, lsl #2]
	ldr ip, [r1, ip, lsl #2]
	eor r2, r3, r2
	ldr r3, [r1, r0, lsl #2]
	eor r2, ip, r2
	eor r3, r3, r2
	mov r2, r3, lsr #0x1f
	orr r2, r2, r3, lsl #1
	str r2, [r1, r0, lsl #2]
	mov r0, r2
	bx lr
	arm_func_end ov00_022D3224

	arm_func_start ov00_022D3268
ov00_022D3268: ; 0x022D3268
	stmdb sp!, {r3, lr}
	movs r2, r2, lsr #2
	mov lr, #0
	ldmeqia sp!, {r3, pc}
_022D3278:
	ldr ip, [r1], #4
	add lr, lr, #1
	mov r3, ip, lsr #0x18
	strb r3, [r0]
	mov r3, ip, lsr #0x10
	strb r3, [r0, #1]
	mov r3, ip, lsr #8
	strb r3, [r0, #2]
	strb ip, [r0, #3]
	cmp lr, r2
	add r0, r0, #4
	blo _022D3278
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022D3268

	arm_func_start ov00_022D32AC
ov00_022D32AC: ; 0x022D32AC
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, #0
	cmp r2, #0
	ldmlsia sp!, {r3, r4, r5, pc}
_022D32BC:
	add r4, r1, r5
	ldrb r3, [r4, #1]
	ldrb ip, [r1, r5]
	ldrb lr, [r4, #2]
	mov r3, r3, lsl #0x10
	orr r3, r3, ip, lsl #24
	ldrb ip, [r4, #3]
	orr r3, r3, lr, lsl #8
	add r5, r5, #4
	orr r3, ip, r3
	cmp r5, r2
	str r3, [r0], #4
	blo _022D32BC
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D32AC

	arm_func_start ov00_022D32F4
ov00_022D32F4: ; 0x022D32F4
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x50
	str r0, [sp]
	ldr r3, [sp]
	add r0, sp, #0x10
	ldmia r3, {r4, r5, r7, r8, sb}
	mov r2, #0x40
	bl ov00_022D32AC
	mov r0, #0
	ldr r3, _022D396C ; =0x5A827999
	mov r2, r0
	add r1, sp, #0x10
_022D3324:
	eor r6, r7, r8
	mov sl, r4, lsr #0x1b
	and r6, r5, r6
	orr fp, sl, r4, lsl #5
	eor r6, r8, r6
	mov sl, r5, lsr #2
	orr sl, sl, r5, lsl #30
	add r5, r1, r0, lsl #2
	add r6, fp, r6
	ldr ip, [r1, r0, lsl #2]
	ldr fp, [r5, #4]
	add r6, ip, r6
	add r6, r6, r3
	add sb, sb, r6
	mov r6, sb, lsr #0x1b
	orr r6, r6, sb, lsl #5
	eor ip, sl, r7
	and ip, r4, ip
	eor ip, r7, ip
	add r6, r6, ip
	add r6, fp, r6
	add r6, r6, r3
	add r8, r8, r6
	mov r6, r4, lsr #2
	orr r4, r6, r4, lsl #30
	ldr fp, [r5, #8]
	mov r6, r8, lsr #0x1b
	orr r6, r6, r8, lsl #5
	eor ip, r4, sl
	and ip, sb, ip
	eor ip, sl, ip
	add r6, r6, ip
	add r6, fp, r6
	add r6, r6, r3
	add r6, r7, r6
	mov r7, sb, lsr #2
	orr sb, r7, sb, lsl #30
	ldr r7, [r5, #0xc]
	ldr fp, [r5, #0x10]
	mov r5, r6, lsr #0x1b
	orr r5, r5, r6, lsl #5
	eor ip, sb, r4
	and ip, r8, ip
	eor ip, r4, ip
	add r5, r5, ip
	add r5, r7, r5
	add r5, r5, r3
	add r5, sl, r5
	mov r7, r8, lsr #2
	orr r8, r7, r8, lsl #30
	mov r7, r5, lsr #0x1b
	orr r7, r7, r5, lsl #5
	eor sl, r8, sb
	and sl, r6, sl
	eor sl, sb, sl
	add r7, r7, sl
	add r7, fp, r7
	add r7, r7, r3
	add r4, r4, r7
	mov r7, r6, lsr #2
	orr r7, r7, r6, lsl #30
	add r0, r0, #5
	add r2, r2, #1
	cmp r2, #3
	blt _022D3324
	eor r0, r7, r8
	mov r2, r4, lsr #0x1b
	and r0, r5, r0
	orr r3, r2, r4, lsl #5
	eor r0, r8, r0
	add r3, r3, r0
	ldr r6, [sp, #0x4c]
	ldr r0, _022D396C ; =0x5A827999
	add r3, r6, r3
	add r3, r3, r0
	mov r2, r5, lsr #2
	orr r6, r2, r5, lsl #30
	mov r0, #0
	add sb, sb, r3
	bl ov00_022D3224
	eor r1, r6, r7
	mov r3, sb, lsr #0x1b
	and r1, r4, r1
	mov r2, r4, lsr #2
	orr r3, r3, sb, lsl #5
	eor r1, r7, r1
	add r1, r3, r1
	add r3, r1, r0
	ldr r0, _022D396C ; =0x5A827999
	add r1, sp, #0x10
	add r3, r3, r0
	orr r5, r2, r4, lsl #30
	mov r0, #1
	add r8, r8, r3
	bl ov00_022D3224
	eor r1, r5, r6
	mov r2, r8, lsr #0x1b
	and r1, sb, r1
	orr r2, r2, r8, lsl #5
	eor r1, r6, r1
	add r1, r2, r1
	add r2, r1, r0
	ldr r0, _022D396C ; =0x5A827999
	mov r1, sb, lsr #2
	add r0, r2, r0
	orr sb, r1, sb, lsl #30
	add r7, r7, r0
	add r1, sp, #0x10
	mov r0, #2
	bl ov00_022D3224
	mov r1, r7, lsr #0x1b
	orr r2, r1, r7, lsl #5
	eor r1, sb, r5
	and r1, r8, r1
	eor r1, r5, r1
	add r1, r2, r1
	add r2, r1, r0
	ldr r0, _022D396C ; =0x5A827999
	mov r1, r8, lsr #2
	add r0, r2, r0
	orr r8, r1, r8, lsl #30
	add r6, r6, r0
	mov r0, #3
	add r1, sp, #0x10
	bl ov00_022D3224
	mov r1, r6, lsr #0x1b
	orr r2, r1, r6, lsl #5
	eor r1, r8, sb
	and r1, r7, r1
	eor r1, sb, r1
	add r1, r2, r1
	add r2, r1, r0
	ldr r0, _022D396C ; =0x5A827999
	mov r1, r7, lsr #2
	add r0, r2, r0
	add r5, r5, r0
	mov r0, #0
	ldr r4, _022D3970 ; =0x6ED9EBA1
	orr r7, r1, r7, lsl #30
	mov sl, #4
	str r0, [sp, #4]
	add fp, sp, #0x10
_022D355C:
	mov r0, sl
	mov r1, fp
	bl ov00_022D3224
	mov r2, r5, lsr #0x1b
	eor r1, r6, r7
	orr r2, r2, r5, lsl #5
	eor r1, r8, r1
	add r1, r2, r1
	add r0, r1, r0
	add r1, r0, r4
	mov r0, r6, lsr #2
	add sb, sb, r1
	orr r6, r0, r6, lsl #30
	add r0, sl, #1
	mov r1, fp
	bl ov00_022D3224
	mov r1, sb, lsr #0x1b
	orr r2, r1, sb, lsl #5
	eor r1, r5, r6
	eor r1, r7, r1
	add r1, r2, r1
	add r0, r1, r0
	add r0, r0, r4
	add r8, r8, r0
	mov r0, r5, lsr #2
	orr r5, r0, r5, lsl #30
	add r0, sl, #2
	and sl, r0, #0xf
	mov r0, sl
	mov r1, fp
	bl ov00_022D3224
	mov r1, r8, lsr #0x1b
	orr r2, r1, r8, lsl #5
	eor r1, sb, r5
	eor r1, r6, r1
	add r1, r2, r1
	add r0, r1, r0
	add r0, r0, r4
	add r7, r7, r0
	mov r0, sb, lsr #2
	orr sb, r0, sb, lsl #30
	add r0, sl, #1
	mov r1, fp
	bl ov00_022D3224
	mov r1, r7, lsr #0x1b
	orr r2, r1, r7, lsl #5
	eor r1, r8, sb
	eor r1, r5, r1
	add r1, r2, r1
	add r0, r1, r0
	add r0, r0, r4
	add r6, r6, r0
	mov r0, r8, lsr #2
	orr r8, r0, r8, lsl #30
	add r0, sl, #2
	mov r1, fp
	bl ov00_022D3224
	mov r1, r6, lsr #0x1b
	orr r2, r1, r6, lsl #5
	eor r1, r7, r8
	eor r1, sb, r1
	add r1, r2, r1
	add r0, r1, r0
	add r0, r0, r4
	add r5, r5, r0
	mov r1, r7, lsr #2
	ldr r0, [sp, #4]
	add r0, r0, #1
	str r0, [sp, #4]
	cmp r0, #4
	orr r7, r1, r7, lsl #30
	add sl, sl, #3
	blt _022D355C
	mov r0, #0
	ldr r4, _022D3974 ; =0x8F1BBCDC
	str r0, [sp, #8]
	add fp, sp, #0x10
_022D3690:
	mov r0, sl
	mov r1, fp
	bl ov00_022D3224
	orr r2, r7, r8
	mov r1, r5, lsr #0x1b
	orr r1, r1, r5, lsl #5
	and r3, r6, r2
	and r2, r7, r8
	orr r2, r3, r2
	add r1, r1, r2
	add r1, r1, r0
	mov r0, r6, lsr #2
	add r1, r1, r4
	add sb, sb, r1
	orr r6, r0, r6, lsl #30
	add r0, sl, #1
	mov r1, fp
	bl ov00_022D3224
	mov r1, sb, lsr #0x1b
	orr r1, r1, sb, lsl #5
	orr r2, r6, r7
	and r3, r5, r2
	and r2, r6, r7
	orr r2, r3, r2
	add r1, r1, r2
	add r0, r1, r0
	add r0, r0, r4
	add r8, r8, r0
	mov r0, r5, lsr #2
	orr r5, r0, r5, lsl #30
	add r0, sl, #2
	mov r1, fp
	bl ov00_022D3224
	mov r1, r8, lsr #0x1b
	orr r1, r1, r8, lsl #5
	orr r2, r5, r6
	and r3, sb, r2
	and r2, r5, r6
	orr r2, r3, r2
	add r1, r1, r2
	add r0, r1, r0
	add r0, r0, r4
	add r7, r7, r0
	mov r0, sb, lsr #2
	orr sb, r0, sb, lsl #30
	add r0, sl, #3
	and sl, r0, #0xf
	mov r0, sl
	mov r1, fp
	bl ov00_022D3224
	mov r1, r7, lsr #0x1b
	orr r1, r1, r7, lsl #5
	orr r2, sb, r5
	and r3, r8, r2
	and r2, sb, r5
	orr r2, r3, r2
	add r1, r1, r2
	add r0, r1, r0
	add r0, r0, r4
	add r6, r6, r0
	mov r0, r8, lsr #2
	orr r8, r0, r8, lsl #30
	add r0, sl, #1
	mov r1, fp
	bl ov00_022D3224
	mov r1, r6, lsr #0x1b
	orr r1, r1, r6, lsl #5
	orr r2, r8, sb
	and r3, r7, r2
	and r2, r8, sb
	orr r2, r3, r2
	add r1, r1, r2
	add r0, r1, r0
	add r0, r0, r4
	add r5, r5, r0
	mov r1, r7, lsr #2
	ldr r0, [sp, #8]
	add r0, r0, #1
	str r0, [sp, #8]
	cmp r0, #4
	orr r7, r1, r7, lsl #30
	add sl, sl, #2
	blt _022D3690
	mov r0, #0
	ldr r4, _022D3978 ; =0xCA62C1D6
	str r0, [sp, #0xc]
	add fp, sp, #0x10
_022D37EC:
	mov r0, sl
	mov r1, fp
	bl ov00_022D3224
	mov r2, r5, lsr #0x1b
	eor r1, r6, r7
	orr r2, r2, r5, lsl #5
	eor r1, r8, r1
	add r1, r2, r1
	add r0, r1, r0
	add r1, r0, r4
	mov r0, r6, lsr #2
	add sb, sb, r1
	orr r6, r0, r6, lsl #30
	add r0, sl, #1
	mov r1, fp
	bl ov00_022D3224
	mov r1, sb, lsr #0x1b
	orr r2, r1, sb, lsl #5
	eor r1, r5, r6
	eor r1, r7, r1
	add r1, r2, r1
	add r0, r1, r0
	add r0, r0, r4
	add r8, r8, r0
	mov r0, r5, lsr #2
	orr r5, r0, r5, lsl #30
	add r0, sl, #2
	mov r1, fp
	bl ov00_022D3224
	mov r1, r8, lsr #0x1b
	orr r2, r1, r8, lsl #5
	eor r1, sb, r5
	eor r1, r6, r1
	add r1, r2, r1
	add r0, r1, r0
	add r0, r0, r4
	add r7, r7, r0
	mov r0, sb, lsr #2
	orr sb, r0, sb, lsl #30
	add r0, sl, #3
	mov r1, fp
	bl ov00_022D3224
	mov r1, r7, lsr #0x1b
	orr r2, r1, r7, lsl #5
	eor r1, r8, sb
	eor r1, r5, r1
	add r1, r2, r1
	add r0, r1, r0
	add r0, r0, r4
	add r6, r6, r0
	mov r0, r8, lsr #2
	orr r8, r0, r8, lsl #30
	add r0, sl, #4
	and sl, r0, #0xf
	mov r0, sl
	mov r1, fp
	bl ov00_022D3224
	mov r1, r6, lsr #0x1b
	orr r2, r1, r6, lsl #5
	eor r1, r7, r8
	eor r1, sb, r1
	add r1, r2, r1
	add r0, r1, r0
	add r0, r0, r4
	add r5, r5, r0
	mov r1, r7, lsr #2
	ldr r0, [sp, #0xc]
	add r0, r0, #1
	str r0, [sp, #0xc]
	cmp r0, #4
	orr r7, r1, r7, lsl #30
	add sl, sl, #1
	blt _022D37EC
	ldr r0, [sp]
	ldr r0, [r0]
	add r1, r0, r5
	ldr r0, [sp]
	str r1, [r0]
	ldr r0, [r0, #4]
	add r1, r0, r6
	ldr r0, [sp]
	str r1, [r0, #4]
	ldr r0, [r0, #8]
	add r1, r0, r7
	ldr r0, [sp]
	str r1, [r0, #8]
	ldr r0, [r0, #0xc]
	add r1, r0, r8
	ldr r0, [sp]
	str r1, [r0, #0xc]
	ldr r0, [r0, #0x10]
	add r1, r0, sb
	ldr r0, [sp]
	str r1, [r0, #0x10]
	add sp, sp, #0x50
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022D396C: .word 0x5A827999
_022D3970: .word 0x6ED9EBA1
_022D3974: .word 0x8F1BBCDC
_022D3978: .word 0xCA62C1D6
	arm_func_end ov00_022D32F4

	arm_func_start ov00_022D397C
ov00_022D397C: ; 0x022D397C
	stmdb sp!, {r4, lr}
	mov r1, #0
	mov r2, #0x5c
	mov r4, r0
	bl MemsetFast
	ldr r0, _022D39BC ; =0x67452301
	ldr r1, _022D39C0 ; =0xEFCDAB89
	str r0, [r4]
	ldr r0, _022D39C4 ; =0x98BADCFE
	str r1, [r4, #4]
	ldr r1, _022D39C8 ; =0x10325476
	str r0, [r4, #8]
	ldr r0, _022D39CC ; =0xC3D2E1F0
	str r1, [r4, #0xc]
	str r0, [r4, #0x10]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D39BC: .word 0x67452301
_022D39C0: .word 0xEFCDAB89
_022D39C4: .word 0x98BADCFE
_022D39C8: .word 0x10325476
_022D39CC: .word 0xC3D2E1F0
	arm_func_end ov00_022D397C

	arm_func_start ov00_022D39D0
ov00_022D39D0: ; 0x022D39D0
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r8, r0
	ldr r3, [r8, #0x18]
	mov r6, r2
	add r0, r3, r6, lsl #3
	str r0, [r8, #0x18]
	cmp r0, r6, lsl #3
	ldrlo r0, [r8, #0x14]
	mov r2, r3, lsr #3
	addlo r0, r0, #1
	strlo r0, [r8, #0x14]
	ldr r0, [r8, #0x14]
	and r4, r2, #0x3f
	rsb r5, r4, #0x40
	add r0, r0, r6, lsr #29
	mov r7, r1
	str r0, [r8, #0x14]
	cmp r6, r5
	blo _022D3A6C
	add r1, r8, #0x1c
	mov r0, r7
	mov r2, r5
	add r1, r1, r4
	bl MemcpyFast
	mov r0, r8
	add r1, r8, #0x1c
	mov r4, #0
	bl ov00_022D32F4
	add r0, r5, #0x3f
	cmp r0, r6
	bhs _022D3A70
_022D3A4C:
	mov r0, r8
	add r1, r7, r5
	bl ov00_022D32F4
	add r5, r5, #0x40
	add r0, r5, #0x3f
	cmp r0, r6
	blo _022D3A4C
	b _022D3A70
_022D3A6C:
	mov r5, #0
_022D3A70:
	add r1, r8, #0x1c
	add r0, r7, r5
	add r1, r1, r4
	sub r2, r6, r5
	bl MemcpyFast
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022D39D0

	arm_func_start ov00_022D3A88
ov00_022D3A88: ; 0x022D3A88
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	mov r0, r4
	add r1, r5, #0x14
	mov r2, #8
	bl ov00_022D3268
	ldr r0, [r5, #0x18]
	ldr r1, _022D3AEC ; =ov00_02318AB4
	mov r0, r0, lsr #3
	and r0, r0, #0x3f
	cmp r0, #0x38
	rsblt r2, r0, #0x38
	rsbge r2, r0, #0x78
	mov r0, r5
	bl ov00_022D39D0
	mov r0, r5
	mov r1, r4
	mov r2, #8
	bl ov00_022D39D0
	mov r0, r4
	mov r1, r5
	mov r2, #0x14
	bl ov00_022D3268
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022D3AEC: .word ov00_02318AB4
	arm_func_end ov00_022D3A88

	arm_func_start ov00_022D3AF0
ov00_022D3AF0: ; 0x022D3AF0
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r1
	ldr r1, _022D3B1C ; =ov00_02318AB5
	mov r5, r0
	mov r2, #0x2c
	bl ov00_022D39D0
	mov r0, r4
	mov r1, r5
	mov r2, #0x14
	bl ov00_022D3268
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022D3B1C: .word ov00_02318AB5
	arm_func_end ov00_022D3AF0

	arm_func_start ov00_022D3B20
ov00_022D3B20: ; 0x022D3B20
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r3, #0
	strb r3, [r0]
	strb r3, [r0, #1]
	add r4, r0, #2
_022D3B34:
	strb r3, [r4, r3]
	add r3, r3, #1
	cmp r3, #0x100
	blt _022D3B34
	mov r6, #0
	mov r5, r6
	mov r7, r6
	mov r0, r6
_022D3B54:
	ldrb lr, [r4, r7]
	ldrb ip, [r1, r6]
	add r3, r6, #1
	and r6, r3, #0xff
	add r3, lr, ip
	add r3, r5, r3
	and r5, r3, #0xff
	ldrb r3, [r4, r5]
	cmp r6, r2
	movge r6, r0
	strb r3, [r4, r7]
	add r7, r7, #1
	strb lr, [r4, r5]
	cmp r7, #0x100
	blt _022D3B54
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022D3B20

	arm_func_start ov00_022D3B94
ov00_022D3B94: ; 0x022D3B94
	stmdb sp!, {r4, r5, r6, lr}
	cmp r2, #0
	add r4, r0, #2
	ldrb ip, [r0]
	ldrb lr, [r0, #1]
	mov r3, #0
	ble _022D3BF4
_022D3BB0:
	add r5, ip, #1
	and ip, r5, #0xff
	ldrb r6, [r4, ip]
	add r5, lr, r6
	and lr, r5, #0xff
	ldrb r5, [r4, lr]
	strb r5, [r4, ip]
	add r5, r6, r5
	strb r6, [r4, lr]
	and r5, r5, #0xff
	ldrb r6, [r1, r3]
	ldrb r5, [r4, r5]
	eor r5, r6, r5
	strb r5, [r1, r3]
	add r3, r3, #1
	cmp r3, r2
	blt _022D3BB0
_022D3BF4:
	strb ip, [r0]
	strb lr, [r0, #1]
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022D3B94

	arm_func_start ov00_022D3C00
ov00_022D3C00: ; 0x022D3C00
	b _022D3C08
_022D3C04:
	sub r1, r1, #1
	arm_func_end ov00_022D3C00
_022D3C08:
	cmp r1, #0
	beq _022D3C20
	add r2, r0, r1, lsl #1
	ldrh r2, [r2, #-2]
	cmp r2, #0
	beq _022D3C04
_022D3C20:
	mov r0, r1
	bx lr

	arm_func_start ov00_022D3C28
ov00_022D3C28: ; 0x022D3C28
	stmdb sp!, {r3, lr}
	sub r2, r1, #1
	mov r2, r2, lsl #1
	ldrh r2, [r0, r2]
	tst r2, #0x8000
	mvnne r0, #0
	ldmneia sp!, {r3, pc}
	bl ov00_022D3C00
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022D3C28

	arm_func_start ov00_022D3C58
ov00_022D3C58: ; 0x022D3C58
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r7, r1
	mov r5, r3
	mov r8, r0
	mov r6, r2
	mov r0, r7
	mov r1, r5
	bl ov00_022D3C00
	mov r4, r0
	mov r0, r6
	mov r1, r5
	bl ov00_022D3C00
	cmp r4, r0
	movlt r4, r0
	cmp r4, r5
	addne r4, r4, #1
	mov ip, #0
	mov r3, ip
	cmp r4, #0
	ble _022D3CD0
_022D3CA8:
	mov r2, r3, lsl #1
	ldrh r1, [r7, r2]
	ldrh r0, [r6, r2]
	add r3, r3, #1
	cmp r3, r4
	add r0, r1, r0
	add r0, ip, r0
	strh r0, [r8, r2]
	mov ip, r0, lsr #0x10
	blt _022D3CA8
_022D3CD0:
	cmp r8, r7
	cmpne r8, r6
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	sub r1, r5, r3
	add r0, r8, r3, lsl #1
	mov r2, r1, lsl #1
	mov r1, #0
	bl MemsetFast
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022D3C58

	arm_func_start ov00_022D3CF4
ov00_022D3CF4: ; 0x022D3CF4
	stmdb sp!, {r4, lr}
	cmp r3, #0
	mov r4, #0
	ble _022D3D28
_022D3D04:
	mov lr, r4, lsl #1
	ldrh ip, [r1, lr]
	add r2, r2, ip
	strh r2, [r0, lr]
	movs r2, r2, lsr #0x10
	beq _022D3D28
	add r4, r4, #1
	cmp r4, r3
	blt _022D3D04
_022D3D28:
	cmp r0, r1
	ldmeqia sp!, {r4, pc}
	add r4, r4, #1
	cmp r4, r3
	ldmgeia sp!, {r4, pc}
_022D3D3C:
	mov ip, r4, lsl #1
	ldrh r2, [r1, ip]
	add r4, r4, #1
	cmp r4, r3
	strh r2, [r0, ip]
	blt _022D3D3C
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D3CF4

	arm_func_start ov00_022D3D58
ov00_022D3D58: ; 0x022D3D58
	stmdb sp!, {r3, lr}
	mov r3, r1
	cmp r3, #0
	mov ip, #0
	ble _022D3D88
_022D3D6C:
	mov r2, ip, lsl #1
	ldrh r1, [r0, r2]
	add ip, ip, #1
	cmp ip, r3
	mvn r1, r1
	strh r1, [r0, r2]
	blt _022D3D6C
_022D3D88:
	mov r1, r0
	mov r2, #1
	bl ov00_022D3CF4
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022D3D58

	arm_func_start ov00_022D3D98
ov00_022D3D98: ; 0x022D3D98
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r7, r1
	mov r5, r3
	mov r8, r0
	mov r6, r2
	mov r0, r7
	mov r1, r5
	bl ov00_022D3C00
	mov r4, r0
	mov r0, r6
	mov r1, r5
	bl ov00_022D3C00
	cmp r4, r0
	movlt r4, r0
	mov ip, #0
	cmp r4, r5
	addne r4, r4, #1
	mov r3, ip
	b _022D3E04
_022D3DE4:
	mov r2, r3, lsl #1
	ldrh r1, [r7, r2]
	ldrh r0, [r6, r2]
	add r3, r3, #1
	sub r0, r1, r0
	add r0, ip, r0
	strh r0, [r8, r2]
	mov ip, r0, asr #0x10
_022D3E04:
	cmp r3, r4
	blt _022D3DE4
	cmp r3, r5
	bge _022D3E1C
	cmp ip, #0
	bne _022D3DE4
_022D3E1C:
	cmp r8, r7
	cmpne r8, r6
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	sub r1, r5, r3
	add r0, r8, r3, lsl #1
	mov r2, r1, lsl #1
	mov r1, #0
	bl MemsetFast
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022D3D98

	arm_func_start ov00_022D3E40
ov00_022D3E40: ; 0x022D3E40
	stmdb sp!, {r4, lr}
	cmp r3, #0
	mov r4, #0
	ble _022D3E78
_022D3E50:
	mov lr, r4, lsl #1
	ldrh ip, [r1, lr]
	sub ip, ip, r2
	mov r2, ip, lsr #0x10
	strh ip, [r0, lr]
	ands r2, r2, #1
	beq _022D3E78
	add r4, r4, #1
	cmp r4, r3
	blt _022D3E50
_022D3E78:
	cmp r0, r1
	ldmeqia sp!, {r4, pc}
	add r4, r4, #1
	cmp r4, r3
	ldmgeia sp!, {r4, pc}
_022D3E8C:
	mov ip, r4, lsl #1
	ldrh r2, [r1, ip]
	add r4, r4, #1
	cmp r4, r3
	strh r2, [r0, ip]
	blt _022D3E8C
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D3E40

	arm_func_start ov00_022D3EA8
ov00_022D3EA8: ; 0x022D3EA8
	subs ip, r2, #1
	bmi _022D3ED8
_022D3EB0:
	mov r2, ip, lsl #1
	ldrh r3, [r1, r2]
	ldrh r2, [r0, r2]
	cmp r2, r3
	movhi r0, #1
	bxhi lr
	mvnlo r0, #0
	bxlo lr
	subs ip, ip, #1
	bpl _022D3EB0
_022D3ED8:
	mov r0, #0
	bx lr
	arm_func_end ov00_022D3EA8

	arm_func_start ov00_022D3EE0
ov00_022D3EE0: ; 0x022D3EE0
	stmdb sp!, {r3, lr}
	b _022D3F00
_022D3EE8:
	mov lr, r2, lsl #1
	ldrh ip, [r0, lr]
	add r2, r2, #1
	add r1, r1, ip
	strh r1, [r0, lr]
	mov r1, r1, lsr #0x10
_022D3F00:
	cmp r1, #0
	ldmeqia sp!, {r3, pc}
	cmp r2, r3
	blt _022D3EE8
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022D3EE0

	arm_func_start ov00_022D3F14
ov00_022D3F14: ; 0x022D3F14
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #8
	mov r8, r3
	mov sl, r1
	mov sb, r2
	mov r2, r8, lsl #1
	mov r1, #0
	str r0, [sp]
	bl MemsetFast
	mov r0, sl
	mov r1, r8
	bl ov00_022D3C00
	mov fp, r0
	mov r0, sb
	mov r1, r8
	bl ov00_022D3C00
	str r0, [sp, #4]
	cmp r0, #0
	mov r5, #0
	addle sp, sp, #8
	ldmleia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022D3F68:
	mov r6, #0
	sub r7, r8, r5
	mov r4, r5, lsl #1
	b _022D3F9C
_022D3F78:
	mov r0, r6, lsl #1
	ldrh r3, [sl, r0]
	ldrh r1, [sb, r4]
	ldr r0, [sp]
	add r2, r5, r6
	mul r1, r3, r1
	mov r3, r8
	bl ov00_022D3EE0
	add r6, r6, #1
_022D3F9C:
	cmp r6, fp
	cmplt r6, r7
	blt _022D3F78
	ldr r0, [sp, #4]
	add r5, r5, #1
	cmp r5, r0
	blt _022D3F68
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022D3F14

	arm_func_start ov00_022D3FC0
ov00_022D3FC0: ; 0x022D3FC0
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r6, r1
	mov r4, r3
	mov r7, r0
	mov r0, r6
	mov r1, r4
	mov r5, r2
	bl ov00_022D3C00
	mov r3, #0
	mov ip, r3
	cmp r0, #0
	ble _022D4010
_022D3FF0:
	mov r2, ip, lsl #1
	ldrh r1, [r6, r2]
	add ip, ip, #1
	cmp ip, r0
	mla r1, r5, r1, r3
	strh r1, [r7, r2]
	mov r3, r1, lsr #0x10
	blt _022D3FF0
_022D4010:
	cmp ip, r4
	movlt r0, ip, lsl #1
	addlt ip, ip, #1
	sub r1, r4, ip
	strlth r3, [r7, r0]
	mov r2, r1, lsl #1
	add r0, r7, ip, lsl #1
	mov r1, #0
	bl MemsetFast
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022D3FC0

	arm_func_start ov00_022D4038
ov00_022D4038: ; 0x022D4038
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov sb, r1
	mov r8, r2
	mov sl, r0
	mov r0, sb
	mov r1, r8
	bl ov00_022D3C00
	mov fp, r0
	cmp r8, fp, lsl #1
	mov r0, fp, lsl #1
	ble _022D4078
	sub r1, r8, r0
	add r0, sl, r0, lsl #1
	mov r2, r1, lsl #1
	mov r1, #0
	bl MemsetFast
_022D4078:
	cmp fp, #0
	mov r4, #0
	ble _022D40CC
	mov r5, r4
	sub r2, r8, #1
_022D408C:
	cmp r5, r8
	bge _022D40CC
	mov r0, r4, lsl #1
	ldrh r3, [sb, r0]
	mov r0, r5, lsl #1
	cmp r5, r2
	mul r1, r3, r3
	strh r1, [sl, r0]
	beq _022D40CC
	add r4, r4, #1
	mov r1, r1, lsr #0x10
	add r0, sl, r0
	strh r1, [r0, #2]
	cmp r4, fp
	add r5, r5, #2
	blt _022D408C
_022D40CC:
	mov r6, #0
	cmp fp, #0
	ldmleia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022D40D8:
	mov r0, r6, lsl #1
	add r4, r6, #1
	str r0, [sp]
	b _022D4148
_022D40E8:
	mov r0, r4, lsl #1
	ldrh r1, [sb, r0]
	ldr r0, [sp]
	ldrh r0, [sb, r0]
	mul r7, r1, r0
	ldr r0, _022D4168 ; =0x7FFF8000
	cmp r7, r0
	mov r0, sl
	bhi _022D4120
	mov r2, r5
	mov r3, r8
	mov r1, r7, lsl #1
	bl ov00_022D3EE0
	b _022D4144
_022D4120:
	mov r1, r7
	mov r2, r5
	mov r3, r8
	bl ov00_022D3EE0
	mov r1, r7
	mov r2, r5
	mov r0, sl
	mov r3, r8
	bl ov00_022D3EE0
_022D4144:
	add r4, r4, #1
_022D4148:
	cmp r4, fp
	addlt r5, r6, r4
	cmplt r5, r8
	blt _022D40E8
	add r6, r6, #1
	cmp r6, fp
	blt _022D40D8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022D4168: .word 0x7FFF8000
	arm_func_end ov00_022D4038

	arm_func_start ov00_022D416C
ov00_022D416C: ; 0x022D416C
	ldrh r1, [r0]
	mov r0, #0
	bx lr
	arm_func_end ov00_022D416C

	arm_func_start ov00_022D4178
ov00_022D4178: ; 0x022D4178
	ldrh r1, [r0]
	ldrh r0, [r0, #-2]
	mov r0, r0, lsl #0x10
	bx lr
	arm_func_end ov00_022D4178

	arm_func_start ov00_022D4188
ov00_022D4188: ; 0x022D4188
	ldrh r1, [r0]
	ldrh r2, [r0, #-2]
	ldrh r3, [r0, #-4]
	orr r0, r3, r2, lsl #16
	bx lr
	arm_func_end ov00_022D4188

	arm_func_start ov00_022D419C
ov00_022D419C: ; 0x022D419C
	ldrh r2, [r0]
	ldrh r3, [r0, #-2]
	orr r1, r3, r2, lsl #16
	ldrh r2, [r0, #-4]
	ldrh r3, [r0, #-6]
	orr r0, r3, r2, lsl #16
	bx lr
	arm_func_end ov00_022D419C

	arm_func_start ov00_022D41B8
ov00_022D41B8: ; 0x022D41B8
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x20
	ldr sb, [sp, #0x48]
	ldr r8, [sp, #0x4c]
	str r1, [sp, #4]
	add r6, r8, sb, lsl #1
	str r0, [sp]
	mov sl, r2
	mov r0, r6
	mov r2, sb, lsl #2
	mov r1, #0
	str r3, [sp, #8]
	add r7, r6, sb, lsl #1
	bl MemsetFast
	ldr r0, [sp, #4]
	mov r1, sb
	bl ov00_022D3C00
	mov fp, r0
	mov r0, sl
	mov r1, sb
	bl ov00_022D3C00
	mov r5, r0
	cmp fp, #0
	cmpgt r5, #0
	ble _022D4350
	sub r0, sb, fp
	add r0, r5, r0
	sub r4, r0, #1
	cmp r4, sb
	blt _022D4244
	ldr r0, [sp, #4]
	mov r1, r7
	mov r2, sb, lsl #1
	bl MemcpyFast
	b _022D4350
_022D4244:
	ldr r0, [sp, #4]
	add r1, r6, r4, lsl #1
	mov r2, fp, lsl #1
	bl MemcpyFast
	cmp r5, #2
	ble _022D4278
	add r0, sl, r5, lsl #1
	sub r0, r0, #2
	mov fp, r5, lsl #1
	bl ov00_022D4188
	str r0, [sp, #0x18]
	str r1, [sp, #0x10]
	b _022D42AC
_022D4278:
	add r0, sl, r5, lsl #1
	cmp r5, #1
	sub r0, r0, #2
	ble _022D429C
	mov fp, r5, lsl #1
	bl ov00_022D4178
	str r0, [sp, #0x18]
	str r1, [sp, #0x10]
	b _022D42AC
_022D429C:
	mov fp, r5, lsl #1
	bl ov00_022D416C
	str r0, [sp, #0x18]
	str r1, [sp, #0x10]
_022D42AC:
	cmp r4, sb
	bge _022D4350
	mov r0, sb, lsl #1
	sub r0, r0, #1
	mov r0, r0, lsl #1
	str r0, [sp, #0x14]
_022D42C4:
	ldr r2, [sp, #0x14]
	mov r1, r6
	add r0, r6, #2
	bl memmove
	add r0, r7, fp
	bl ov00_022D419C
	ldr r2, [sp, #0x18]
	ldr r3, [sp, #0x10]
	bl _ll_udiv
	mov r5, r0
	ldr r0, _022D4394 ; =0x0000FFFF
	cmp r5, r0
	movhi r5, r0
_022D42F8:
	mov r2, r5, lsl #0x10
	mov r0, r8
	mov r1, sl
	mov r2, r2, lsr #0x10
	mov r3, sb
	bl ov00_022D3FC0
	mov r0, r7
	mov r1, r8
	mov r2, sb
	bl ov00_022D3EA8
	cmp r0, #0
	sublt r5, r5, #1
	blt _022D42F8
	mov r0, r7
	mov r1, r7
	mov r2, r8
	mov r3, sb
	bl ov00_022D3D98
	strh r5, [r6]
	add r4, r4, #1
	cmp r4, sb
	blt _022D42C4
_022D4350:
	ldr r0, [sp]
	cmp r0, #0
	beq _022D436C
	ldr r1, [sp]
	mov r0, r6
	mov r2, sb, lsl #1
	bl MemcpyFast
_022D436C:
	ldr r0, [sp, #8]
	cmp r0, #0
	addeq sp, sp, #0x20
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [sp, #8]
	mov r0, r7
	mov r2, sb, lsl #1
	bl MemcpyFast
	add sp, sp, #0x20
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022D4394: .word 0x0000FFFF
	arm_func_end ov00_022D41B8

	arm_func_start ov00_022D4398
ov00_022D4398: ; 0x022D4398
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0xc
	ldr r4, _022D4524 ; =ov00_0232508C
	mov r8, r3
	ldr r3, [r4]
	mov sl, r0
	mov r0, r8, lsl #3
	ldr r7, [sp, #0x30]
	str r1, [sp, #8]
	mov sb, r2
	blx r3
	movs r4, r0
	addeq sp, sp, #0xc
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	sub r1, r8, #1
	add r0, sl, #2
	mov r2, r1, lsl #1
	mov r1, #0
	add r5, r4, r8, lsl #1
	bl MemsetFast
	mov r2, #1
	mov r0, sb
	mov r1, r8
	strh r2, [sl]
	bl ov00_022D3C00
	sub r0, r8, r0
	mov r6, r0, lsl #4
	cmp r6, r8, lsl #4
	bhs _022D444C
	mov r2, #0x8000
_022D4410:
	sub r0, r8, r6, asr #4
	add r0, sb, r0, lsl #1
	ldrh r0, [r0, #-2]
	and r1, r6, #0xf
	tst r0, r2, lsr r1
	beq _022D4440
	ldr r0, [sp, #8]
	mov r1, sl
	mov r2, r8, lsl #1
	bl MemcpyFast
	add r6, r6, #1
	b _022D444C
_022D4440:
	add r6, r6, #1
	cmp r6, r8, lsl #4
	blo _022D4410
_022D444C:
	cmp r6, r8, lsl #4
	bhs _022D450C
	mov fp, r8, lsl #1
_022D4458:
	mov r0, r4
	mov r1, sl
	mov r2, r8
	bl ov00_022D4038
	mov r0, r4
	mov r1, sl
	mov r2, fp
	bl MemcpyFast
	cmp r7, #0
	beq _022D449C
	str r8, [sp]
	mov r0, #0
	mov r1, sl
	mov r2, r7
	mov r3, sl
	str r5, [sp, #4]
	bl ov00_022D41B8
_022D449C:
	sub r0, r8, r6, asr #4
	add r0, sb, r0, lsl #1
	ldrh r1, [r0, #-2]
	and r2, r6, #0xf
	mov r0, #0x8000
	tst r1, r0, lsr r2
	beq _022D4500
	ldr r2, [sp, #8]
	mov r0, r4
	mov r1, sl
	mov r3, r8
	bl ov00_022D3F14
	mov r0, r4
	mov r1, sl
	mov r2, fp
	bl MemcpyFast
	cmp r7, #0
	beq _022D4500
	str r8, [sp]
	mov r0, #0
	mov r1, sl
	mov r2, r7
	mov r3, sl
	str r5, [sp, #4]
	bl ov00_022D41B8
_022D4500:
	add r6, r6, #1
	cmp r6, r8, lsl #4
	blo _022D4458
_022D450C:
	ldr r1, _022D4528 ; =ov00_023250B8
	mov r0, r4
	ldr r1, [r1]
	blx r1
	add sp, sp, #0xc
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022D4524: .word ov00_0232508C
_022D4528: .word ov00_023250B8
	arm_func_end ov00_022D4398

	arm_func_start ov00_022D452C
ov00_022D452C: ; 0x022D452C
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x14
	ldr sb, [sp, #0x38]
	mov sl, r3
	add fp, sb, sl, lsl #1
	add r4, fp, sl, lsl #1
	add r5, r4, sl, lsl #1
	add r6, r5, sl, lsl #1
	add r7, r6, sl, lsl #1
	str r0, [sp, #8]
	mov r0, r1
	add r1, r7, sl, lsl #1
	str r1, [sp, #0x10]
	mov r8, sl, lsl #1
	str r2, [sp, #0xc]
	mov r1, sb
	mov r2, r8
	bl MemcpyFast
	ldr r0, [sp, #0xc]
	mov r1, r4
	mov r2, r8
	bl MemcpyFast
	mov r0, #1
	strh r0, [r4, r8]
	mov r0, sb
	mov r1, sl
	bl ov00_022D3C28
	cmp r0, #0
	ble _022D463C
_022D45A0:
	ldr r3, [sp, #0x10]
	str sl, [sp]
	str r3, [sp, #4]
	mov r0, fp
	mov r1, r4
	mov r2, sb
	mov r3, r7
	bl ov00_022D41B8
	mov r0, sb
	mov r1, r4
	mov r2, r8
	bl MemcpyFast
	mov r0, r7
	mov r1, sb
	mov r2, r8
	bl MemcpyFast
	mov r0, r7
	mov r1, fp
	mov r2, r5
	mov r3, sl
	bl ov00_022D3F14
	mov r0, r7
	mov r1, r6
	mov r2, r7
	mov r3, sl
	bl ov00_022D3D98
	mov r0, r5
	mov r1, r6
	mov r2, r8
	bl MemcpyFast
	mov r0, r7
	mov r1, r5
	mov r2, r8
	bl MemcpyFast
	mov r0, sb
	mov r1, sl
	bl ov00_022D3C28
	cmp r0, #0
	bgt _022D45A0
_022D463C:
	ldr r2, [sp, #0xc]
	mov r0, r6
	mov r1, r6
	mov r3, sl
	bl ov00_022D3C58
	ldr r2, [sp, #0xc]
	ldr r3, [sp, #8]
	ldr r4, [sp, #0x10]
	str sl, [sp]
	mov r1, r6
	mov r0, #0
	str r4, [sp, #4]
	bl ov00_022D41B8
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022D452C

	arm_func_start ov00_022D4678
ov00_022D4678: ; 0x022D4678
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r6, r3
	mov r4, r6, lsl #1
	mov r8, r2
	mov r2, r4
	mov r7, r0
	mov sb, r1
	ldr r5, [sp, #0x20]
	bl MemcpyFast
	cmp r8, #1
	bne _022D46B8
	mov r0, r7
	mov r1, sb
	mov r2, r6
	bl ov00_022D4038
	b _022D46D4
_022D46B8:
	cmp r8, #0
	beq _022D46D4
	mov r0, r7
	mov r1, sb
	mov r2, r8
	mov r3, r6
	bl ov00_022D3F14
_022D46D4:
	ldr r0, [sp, #0x2c]
	ldr r2, [sp, #0x28]
	mov r1, r7
	mov r3, r5
	bl ov00_022D3F14
	sub r1, r6, r5
	ldr r0, [sp, #0x2c]
	mov r8, r1, lsl #1
	mov r2, r8
	add r0, r0, r5, lsl #1
	mov r1, #0
	bl MemsetFast
	ldr r0, [sp, #0x30]
	ldr r1, [sp, #0x2c]
	ldr r2, [sp, #0x24]
	mov r3, r6
	bl ov00_022D3F14
	mov r0, r7
	mov r1, r7
	ldr r2, [sp, #0x30]
	mov r3, r6
	bl ov00_022D3C58
	mov r2, r8
	mov r0, r7
	add r1, r7, r5, lsl #1
	bl memmove
	add r0, r7, r6, lsl #1
	sub r0, r0, r5, lsl #1
	mov r2, r5, lsl #1
	mov r1, #0
	bl MemsetFast
	mov r0, r7
	ldr r1, [sp, #0x24]
	mov r2, r6
	bl ov00_022D3EA8
	cmp r0, #0
	beq _022D4774
	cmp r0, #1
	beq _022D4788
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022D4774:
	mov r0, r7
	mov r2, r4
	mov r1, #0
	bl MemsetFast
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022D4788:
	ldr r2, [sp, #0x24]
	mov r0, r7
	mov r1, r7
	mov r3, r6
	bl ov00_022D3D98
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022D4678

	arm_func_start ov00_022D47A0
ov00_022D47A0: ; 0x022D47A0
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x2c
	mov sl, r3
	mov r3, #0x16
	mul r4, sl, r3
	ldr r3, _022D49A4 ; =ov00_0232508C
	mov fp, r0
	ldr r3, [r3]
	mov r0, r4
	ldr sb, [sp, #0x50]
	str r1, [sp, #0x14]
	str r2, [sp, #0x18]
	blx r3
	str r0, [sp, #0x28]
	cmp r0, #0
	addeq sp, sp, #0x2c
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r2, r4
	mov r1, #0
	bl MemsetFast
	ldr r0, [sp, #0x28]
	mov r1, sl
	add r6, r0, sl, lsl #1
	add r0, r6, sl, lsl #1
	add r7, r0, sl, lsl #1
	add r8, r7, sl, lsl #1
	str r0, [sp, #0x24]
	add r0, r8, sl, lsl #1
	str r0, [sp, #0x20]
	add r5, r0, sl, lsl #1
	mov r0, sb
	bl ov00_022D3C00
	mov r4, r0
	ldr r0, [sp, #0x28]
	mov r2, #1
	mov r1, r4, lsl #1
	strh r2, [r0, r1]
	ldr r0, [sp, #0x24]
	ldr r1, [sp, #0x28]
	str r0, [sp]
	mov r0, r6
	mov r2, sb
	mov r3, sl
	bl ov00_022D452C
	ldr r1, [sp, #0x28]
	mov r0, r7
	mov r2, r6
	mov r3, sl
	bl ov00_022D3F14
	mov r0, r6
	mov r1, r7
	mov r2, #1
	mov r3, sl
	bl ov00_022D3E40
	str sl, [sp]
	mov r0, r6
	mov r1, r6
	mov r2, sb
	mov r3, #0
	str r5, [sp, #4]
	bl ov00_022D41B8
	ldr r1, [sp, #0x14]
	ldr r0, [sp, #0x24]
	ldr r2, [sp, #0x28]
	mov r3, sl
	bl ov00_022D3F14
	ldr r1, [sp, #0x24]
	str sl, [sp]
	mov r0, #0
	mov r2, sb
	mov r3, r1
	str r5, [sp, #4]
	bl ov00_022D41B8
	str sl, [sp]
	ldr r1, [sp, #0x28]
	mov r0, #0
	mov r2, sb
	mov r3, fp
	str r5, [sp, #4]
	bl ov00_022D41B8
	movs r0, r4, lsl #4
	mov r5, #0
	str r0, [sp, #0x1c]
	beq _022D4968
_022D48F0:
	stmia sp, {r4, sb}
	str r6, [sp, #8]
	str r7, [sp, #0xc]
	ldr r1, [sp, #0x20]
	mov r0, fp
	mov r2, #1
	mov r3, sl
	str r8, [sp, #0x10]
	bl ov00_022D4678
	ldr r1, [sp, #0x18]
	sub r2, r4, r5, asr #4
	add r1, r1, r2, lsl #1
	ldrh r2, [r1, #-2]
	and r0, r5, #0xf
	mov r1, #0x8000
	tst r2, r1, lsr r0
	beq _022D4958
	stmia sp, {r4, sb}
	str r6, [sp, #8]
	str r7, [sp, #0xc]
	ldr r1, [sp, #0x20]
	ldr r2, [sp, #0x24]
	mov r0, fp
	mov r3, sl
	str r8, [sp, #0x10]
	bl ov00_022D4678
_022D4958:
	ldr r0, [sp, #0x1c]
	add r5, r5, #1
	cmp r5, r0
	blo _022D48F0
_022D4968:
	stmia sp, {r4, sb}
	str r6, [sp, #8]
	str r7, [sp, #0xc]
	ldr r1, [sp, #0x20]
	mov r0, fp
	mov r3, sl
	mov r2, #0
	str r8, [sp, #0x10]
	bl ov00_022D4678
	ldr r1, _022D49A8 ; =ov00_023250B8
	ldr r0, [sp, #0x28]
	ldr r1, [r1]
	blx r1
	add sp, sp, #0x2c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022D49A4: .word ov00_0232508C
_022D49A8: .word ov00_023250B8
	arm_func_end ov00_022D47A0

	arm_func_start ov00_022D49AC
ov00_022D49AC: ; 0x022D49AC
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r1
	mov r5, r2
	mov r2, r3, lsl #1
	mov r1, #0
	mov r4, r0
	bl MemsetFast
	sub r0, r5, #1
	cmp r5, #1
	add r6, r6, r0
	ble _022D49F8
_022D49D8:
	ldrb r1, [r6]
	ldrb r0, [r6, #-1]
	sub r5, r5, #2
	cmp r5, #1
	add r0, r1, r0, lsl #8
	strh r0, [r4], #2
	sub r6, r6, #2
	bgt _022D49D8
_022D49F8:
	cmp r5, #0
	ldrgtb r0, [r6]
	strgth r0, [r4]
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022D49AC

	arm_func_start ov00_022D4A08
ov00_022D4A08: ; 0x022D4A08
	sub r3, r2, #1
	cmp r2, #1
	add r0, r0, r3
	ble _022D4A3C
_022D4A18:
	ldrh r3, [r1]
	sub ip, r0, #1
	sub r2, r2, #2
	strb r3, [r0], #-2
	ldrh r3, [r1], #2
	cmp r2, #1
	mov r3, r3, asr #8
	strb r3, [ip]
	bgt _022D4A18
_022D4A3C:
	cmp r2, #0
	ldrgth r1, [r1]
	strgtb r1, [r0]
	bx lr
	arm_func_end ov00_022D4A08

	arm_func_start ov00_022D4A4C
ov00_022D4A4C: ; 0x022D4A4C
	ldr ip, _022D4A54 ; =MD5_Init
	bx ip
	.align 2, 0
_022D4A54: .word MD5_Init
	arm_func_end ov00_022D4A4C

	arm_func_start ov00_022D4A58
ov00_022D4A58: ; 0x022D4A58
	ldr ip, _022D4A60 ; =MD5_Update
	bx ip
	.align 2, 0
_022D4A60: .word MD5_Update
	arm_func_end ov00_022D4A58

	arm_func_start ov00_022D4A64
ov00_022D4A64: ; 0x022D4A64
	ldr ip, _022D4A6C ; =MD5_Digest
	bx ip
	.align 2, 0
_022D4A6C: .word MD5_Digest
	arm_func_end ov00_022D4A64

	arm_func_start ov00_022D4A70
ov00_022D4A70: ; 0x022D4A70
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	bl EnableIrqFlag
	ldr r2, _022D4B84 ; =ov00_02326C4C
	mov r4, r0
	ldr r1, [r2]
	cmp r1, #0
	beq _022D4AA0
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
_022D4AA0:
	cmp r6, #0
	bne _022D4AB4
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
_022D4AB4:
	tst r6, #0x1f
	beq _022D4AC8
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
_022D4AC8:
	cmp r5, #0x2300
	bhs _022D4ADC
	bl SetIrqFlag
	mov r0, #6
	ldmia sp!, {r4, r5, r6, pc}
_022D4ADC:
	str r6, [r2]
	add r0, r6, #0x2000
	mov r1, #1
	str r1, [r0, #0x260]
	ldr r1, [r2]
	mov r0, #0
	add r1, r1, #0x2200
	strh r0, [r1, #0x80]
	ldr r1, [r2]
	add r1, r1, #0x2200
	strh r0, [r1, #0x68]
	ldr r1, [r2]
	add r1, r1, #0x2000
	strb r0, [r1, #0x26a]
	ldr r1, [r2]
	add r1, r1, #0x2000
	strb r0, [r1, #0x26b]
	ldr r1, [r2]
	add r1, r1, #0x2200
	strh r0, [r1, #0x82]
	ldr r1, [r2]
	add r1, r1, #0x2200
	strh r0, [r1, #0xf8]
	bl ov00_022D59D4
	bl ov00_022D705C
	bl sub_0207ADCC
	cmp r0, #0
	bne _022D4B50
	bl sub_0207AD54
_022D4B50:
	bl sub_0207B030
	cmp r0, #0
	bne _022D4B60
	bl sub_0207AFF0
_022D4B60:
	ldr r0, _022D4B84 ; =ov00_02326C4C
	ldr r0, [r0]
	add r0, r0, #0x2cc
	add r0, r0, #0x2000
	bl sub_0207B040
	mov r0, r4
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022D4B84: .word ov00_02326C4C
	arm_func_end ov00_022D4A70

	arm_func_start ov00_022D4B88
ov00_022D4B88: ; 0x022D4B88
	stmdb sp!, {r3, lr}
	bl EnableIrqFlag
	ldr r2, _022D4BDC ; =ov00_02326C4C
	ldr r1, [r2]
	cmp r1, #0
	bne _022D4BAC
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r3, pc}
_022D4BAC:
	add r1, r1, #0x2000
	ldr r1, [r1, #0x260]
	cmp r1, #1
	beq _022D4BC8
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r3, pc}
_022D4BC8:
	mov r1, #0
	str r1, [r2]
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D4BDC: .word ov00_02326C4C
	arm_func_end ov00_022D4B88

	arm_func_start ov00_022D4BE0
ov00_022D4BE0: ; 0x022D4BE0
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	bl EnableIrqFlag
	ldr r1, _022D4DD8 ; =ov00_02326C4C
	mov r4, r0
	ldr r1, [r1]
	cmp r1, #0
	bne _022D4C10
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
_022D4C10:
	add r1, r1, #0x2000
	ldr r1, [r1, #0x260]
	cmp r1, #1
	beq _022D4C34
	cmp r1, #2
	beq _022D4C44
	cmp r1, #3
	beq _022D4C50
	b _022D4C5C
_022D4C34:
	mov r0, r6
	mov r1, r5
	bl ov00_022D571C
	b _022D4C68
_022D4C44:
	bl SetIrqFlag
	mov r0, #2
	ldmia sp!, {r4, r5, r6, pc}
_022D4C50:
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022D4C5C:
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
_022D4C68:
	ldr r0, _022D4DD8 ; =ov00_02326C4C
	ldr r0, [r0]
	add r1, r0, #0x2000
	ldr r1, [r1, #0x26c]
	mov r1, r1, lsl #0x10
	mov r1, r1, lsr #0x10
	bl ov00_022BE964
	cmp r0, #6
	addls pc, pc, r0, lsl #2
	b _022D4CD4
_022D4C90: ; jump table
	b _022D4CEC ; case 0
	b _022D4CD4 ; case 1
	b _022D4CD4 ; case 2
	b _022D4CAC ; case 3
	b _022D4CC4 ; case 4
	b _022D4CD4 ; case 5
	b _022D4CD4 ; case 6
_022D4CAC:
	mov r0, #0xb
	bl ov00_022D5B1C
	mov r0, r4
	bl SetIrqFlag
	mov r0, #7
	ldmia sp!, {r4, r5, r6, pc}
_022D4CC4:
	mov r0, r4
	bl SetIrqFlag
	mov r0, #5
	ldmia sp!, {r4, r5, r6, pc}
_022D4CD4:
	mov r0, #0xb
	bl ov00_022D5B1C
	mov r0, r4
	bl SetIrqFlag
	mov r0, #7
	ldmia sp!, {r4, r5, r6, pc}
_022D4CEC:
	bl ov00_022BF640
	cmp r0, #0
	bne _022D4D2C
	bl ov00_022BEB74
	cmp r0, #0
	beq _022D4D1C
	mov r0, #0xb
	bl ov00_022D5B1C
	mov r0, r4
	bl SetIrqFlag
	mov r0, #7
	ldmia sp!, {r4, r5, r6, pc}
_022D4D1C:
	mov r0, r4
	bl SetIrqFlag
	mov r0, #5
	ldmia sp!, {r4, r5, r6, pc}
_022D4D2C:
	ldr r0, _022D4DDC ; =ov00_022D5CC8
	bl ov00_022BF2C4
	cmp r0, #0
	beq _022D4D54
	mov r0, #0xb
	bl ov00_022D5B1C
	mov r0, r4
	bl SetIrqFlag
	mov r0, #7
	ldmia sp!, {r4, r5, r6, pc}
_022D4D54:
	ldr r0, _022D4DE0 ; =ov00_022D5D40
	bl ov00_022BF9E0
	cmp r0, #2
	beq _022D4D78
	cmp r0, #3
	beq _022D4DB0
	cmp r0, #8
	beq _022D4D98
	b _022D4DB0
_022D4D78:
	mov r0, #2
	bl ov00_022D5B1C
	ldr r0, _022D4DD8 ; =ov00_02326C4C
	mov r1, #1
	ldr r0, [r0]
	add r0, r0, #0x2200
	strh r1, [r0, #0x80]
	b _022D4DC8
_022D4D98:
	mov r0, #0xc
	bl ov00_022D5B1C
	mov r0, r4
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
_022D4DB0:
	mov r0, #0xb
	bl ov00_022D5B1C
	mov r0, r4
	bl SetIrqFlag
	mov r0, #7
	ldmia sp!, {r4, r5, r6, pc}
_022D4DC8:
	mov r0, r4
	bl SetIrqFlag
	mov r0, #3
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022D4DD8: .word ov00_02326C4C
_022D4DDC: .word ov00_022D5CC8
_022D4DE0: .word ov00_022D5D40
	arm_func_end ov00_022D4BE0

	arm_func_start ov00_022D4DE4
ov00_022D4DE4: ; 0x022D4DE4
	stmdb sp!, {r4, lr}
	bl EnableIrqFlag
	ldr r1, _022D4ECC ; =ov00_02326C4C
	mov r4, r0
	ldr r1, [r1]
	cmp r1, #0
	bne _022D4E0C
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r4, pc}
_022D4E0C:
	add r1, r1, #0x2000
	ldr r1, [r1, #0x260]
	cmp r1, #1
	beq _022D4E38
	cmp r1, #3
	beq _022D4E50
	cmp r1, #4
	bne _022D4E44
	bl SetIrqFlag
	mov r0, #2
	ldmia sp!, {r4, pc}
_022D4E38:
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r4, pc}
_022D4E44:
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r4, pc}
_022D4E50:
	ldr r0, _022D4ED0 ; =ov00_022D5D40
	bl ov00_022BFAD4
	cmp r0, #2
	beq _022D4E74
	cmp r0, #3
	beq _022D4EA4
	cmp r0, #8
	beq _022D4E94
	b _022D4EA4
_022D4E74:
	mov r0, #4
	bl ov00_022D5B1C
	ldr r0, _022D4ECC ; =ov00_02326C4C
	mov r1, #2
	ldr r0, [r0]
	add r0, r0, #0x2200
	strh r1, [r0, #0x80]
	b _022D4EBC
_022D4E94:
	mov r0, r4
	bl SetIrqFlag
	mov r0, #4
	ldmia sp!, {r4, pc}
_022D4EA4:
	mov r0, #0xb
	bl ov00_022D5B1C
	mov r0, r4
	bl SetIrqFlag
	mov r0, #7
	ldmia sp!, {r4, pc}
_022D4EBC:
	mov r0, r4
	bl SetIrqFlag
	mov r0, #3
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D4ECC: .word ov00_02326C4C
_022D4ED0: .word ov00_022D5D40
	arm_func_end ov00_022D4DE4

	arm_func_start ov00_022D4ED4
ov00_022D4ED4: ; 0x022D4ED4
	stmdb sp!, {r3, lr}
	cmp r0, #0
	cmpne r1, #0
	bne _022D4EEC
	bl ov00_022D506C
	ldmia sp!, {r3, pc}
_022D4EEC:
	bl ov00_022D4EF4
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022D4ED4

	arm_func_start ov00_022D4EF4
ov00_022D4EF4: ; 0x022D4EF4
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r6, r1
	mov r5, r2
	bl EnableIrqFlag
	ldr r1, _022D5064 ; =ov00_02326C4C
	mov r4, r0
	ldr r1, [r1]
	cmp r1, #0
	bne _022D4F28
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D4F28:
	add r1, r1, #0x2000
	ldr r1, [r1, #0x260]
	cmp r1, #3
	beq _022D4F98
	cmp r1, #5
	beq _022D4F4C
	cmp r1, #6
	beq _022D4F6C
	b _022D4F8C
_022D4F4C:
	mov r0, r7
	mov r1, r6
	mov r2, r5
	bl ov00_022D583C
	mov r0, r4
	bl SetIrqFlag
	mov r0, #2
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D4F6C:
	mov r0, r7
	mov r1, r6
	mov r2, r5
	bl ov00_022D583C
	mov r0, r4
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D4F8C:
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D4F98:
	mov r0, r7
	mov r1, r6
	mov r2, r5
	bl ov00_022D583C
	ldr r0, _022D5064 ; =ov00_02326C4C
	ldr r0, [r0]
	add r1, r0, #0x2200
	add r0, r0, #0x2000
	ldrh r1, [r1, #0x8c]
	ldr r0, [r0, #0x288]
	bl DC_InvalidateRange
	ldr r2, _022D5064 ; =ov00_02326C4C
	ldr r0, _022D5068 ; =ov00_022D5FFC
	ldr r1, [r2]
	add r1, r1, #0x2000
	ldr r3, [r1, #0x284]
	add r3, r3, #1
	str r3, [r1, #0x284]
	ldr r1, [r2]
	add r1, r1, #0x288
	add r1, r1, #0x2000
	bl ov00_022BFED8
	cmp r0, #2
	beq _022D500C
	cmp r0, #3
	beq _022D503C
	cmp r0, #8
	beq _022D502C
	b _022D503C
_022D500C:
	mov r0, #5
	bl ov00_022D5B1C
	ldr r0, _022D5064 ; =ov00_02326C4C
	mov r1, #3
	ldr r0, [r0]
	add r0, r0, #0x2200
	strh r1, [r0, #0x80]
	b _022D5054
_022D502C:
	mov r0, r4
	bl SetIrqFlag
	mov r0, #4
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D503C:
	mov r0, #0xb
	bl ov00_022D5B1C
	mov r0, r4
	bl SetIrqFlag
	mov r0, #7
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D5054:
	mov r0, r4
	bl SetIrqFlag
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022D5064: .word ov00_02326C4C
_022D5068: .word ov00_022D5FFC
	arm_func_end ov00_022D4EF4

	arm_func_start ov00_022D506C
ov00_022D506C: ; 0x022D506C
	stmdb sp!, {r4, lr}
	bl EnableIrqFlag
	ldr r1, _022D510C ; =ov00_02326C4C
	mov r4, r0
	ldr r1, [r1]
	cmp r1, #0
	bne _022D5094
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r4, pc}
_022D5094:
	add r1, r1, #0x2000
	ldr r1, [r1, #0x260]
	cmp r1, #3
	beq _022D50E4
	cmp r1, #6
	beq _022D50B8
	cmp r1, #7
	beq _022D50D8
	b _022D50F0
_022D50B8:
	mov r0, #7
	bl ov00_022D5B1C
	ldr r0, _022D510C ; =ov00_02326C4C
	mov r1, #4
	ldr r0, [r0]
	add r0, r0, #0x2200
	strh r1, [r0, #0x80]
	b _022D50FC
_022D50D8:
	bl SetIrqFlag
	mov r0, #2
	ldmia sp!, {r4, pc}
_022D50E4:
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r4, pc}
_022D50F0:
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r4, pc}
_022D50FC:
	mov r0, r4
	bl SetIrqFlag
	mov r0, #3
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D510C: .word ov00_02326C4C
	arm_func_end ov00_022D506C

	arm_func_start ov00_022D5110
ov00_022D5110: ; 0x022D5110
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r6, r1
	mov r5, r2
	bl EnableIrqFlag
	ldr r2, _022D5308 ; =ov00_02326C4C
	mov r4, r0
	ldr ip, [r2]
	cmp ip, #0
	bne _022D5144
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D5144:
	add r1, ip, #0x2000
	ldr r3, [r1, #0x260]
	cmp r3, #3
	beq _022D5168
	cmp r3, #8
	beq _022D5258
	cmp r3, #9
	beq _022D5264
	b _022D5270
_022D5168:
	cmp r7, #0
	bne _022D517C
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D517C:
	ldrh r3, [r7, #0x3c]
	cmp r3, #0
	beq _022D5194
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D5194:
	cmp r6, #0
	beq _022D520C
	ldrb r3, [r6]
	cmp r3, #4
	ldrlob r0, [r6, #1]
	cmplo r0, #4
	blo _022D51C0
	mov r0, r4
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D51C0:
	strb r3, [r1, #0x250]
	ldr r0, [r2]
	ldrb r1, [r6, #1]
	add r0, r0, #0x2000
	strb r1, [r0, #0x251]
	ldr r1, [r2]
	mov r2, #0x50
	add r0, r1, #0x2000
	ldrb r0, [r0, #0x250]
	cmp r0, #0
	bne _022D51FC
	add r0, r1, #0x2200
	mov r1, #0
	bl MemsetFast
	b _022D521C
_022D51FC:
	add r0, r6, #2
	add r1, r1, #0x2200
	bl MemcpyFast
	b _022D521C
_022D520C:
	add r0, ip, #0x2200
	mov r1, #0
	mov r2, #0x52
	bl MemsetFast
_022D521C:
	ldr r1, _022D5308 ; =ov00_02326C4C
	mov r0, r7
	ldr r1, [r1]
	mov r2, #0xc0
	add r1, r1, #0x2140
	bl MemcpyFast
	ldr r1, _022D5308 ; =ov00_02326C4C
	mov r0, r5
	ldr r1, [r1]
	add r1, r1, #0x2100
	ldrh r2, [r1, #0x6e]
	orr r2, r2, #3
	strh r2, [r1, #0x70]
	bl ov00_022D5670
	b _022D527C
_022D5258:
	bl SetIrqFlag
	mov r0, #2
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D5264:
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D5270:
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D527C:
	ldr r1, _022D530C ; =0x0000FFFF
	ldr r0, _022D5310 ; =ov00_022D5D40
	mov r3, r1
	mov r2, #0x50
	str r1, [sp]
	bl ov00_022C15B0
	cmp r0, #2
	beq _022D52B0
	cmp r0, #3
	beq _022D52E0
	cmp r0, #8
	beq _022D52D0
	b _022D52E0
_022D52B0:
	mov r0, #8
	bl ov00_022D5B1C
	ldr r0, _022D5308 ; =ov00_02326C4C
	mov r1, #5
	ldr r0, [r0]
	add r0, r0, #0x2200
	strh r1, [r0, #0x80]
	b _022D52F8
_022D52D0:
	mov r0, r4
	bl SetIrqFlag
	mov r0, #4
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D52E0:
	mov r0, #0xb
	bl ov00_022D5B1C
	mov r0, r4
	bl SetIrqFlag
	mov r0, #7
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D52F8:
	mov r0, r4
	bl SetIrqFlag
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022D5308: .word ov00_02326C4C
_022D530C: .word 0x0000FFFF
_022D5310: .word ov00_022D5D40
	arm_func_end ov00_022D5110

	arm_func_start ov00_022D5314
ov00_022D5314: ; 0x022D5314
	stmdb sp!, {r4, lr}
	bl EnableIrqFlag
	ldr r1, _022D5428 ; =ov00_02326C4C
	mov r4, r0
	ldr r1, [r1]
	cmp r1, #0
	bne _022D533C
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r4, pc}
_022D533C:
	add r1, r1, #0x2000
	ldr r2, [r1, #0x260]
	cmp r2, #3
	beq _022D5368
	cmp r2, #9
	beq _022D5380
	cmp r2, #0xa
	bne _022D5374
	bl SetIrqFlag
	mov r0, #2
	ldmia sp!, {r4, pc}
_022D5368:
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r4, pc}
_022D5374:
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r4, pc}
_022D5380:
	ldrb r0, [r1, #0x26b]
	cmp r0, #1
	bne _022D53AC
	mov r0, #0xa
	bl ov00_022D5B1C
	ldr r0, _022D5428 ; =ov00_02326C4C
	mov r1, #6
	ldr r0, [r0]
	add r0, r0, #0x2200
	strh r1, [r0, #0x80]
	b _022D5418
_022D53AC:
	ldr r0, _022D542C ; =ov00_022D6794
	bl ov00_022C07A4
	cmp r0, #2
	beq _022D53D0
	cmp r0, #3
	beq _022D5400
	cmp r0, #8
	beq _022D53F0
	b _022D5400
_022D53D0:
	mov r0, #0xa
	bl ov00_022D5B1C
	ldr r0, _022D5428 ; =ov00_02326C4C
	mov r1, #6
	ldr r0, [r0]
	add r0, r0, #0x2200
	strh r1, [r0, #0x80]
	b _022D5418
_022D53F0:
	mov r0, r4
	bl SetIrqFlag
	mov r0, #4
	ldmia sp!, {r4, pc}
_022D5400:
	mov r0, #0xb
	bl ov00_022D5B1C
	mov r0, r4
	bl SetIrqFlag
	mov r0, #7
	ldmia sp!, {r4, pc}
_022D5418:
	mov r0, r4
	bl SetIrqFlag
	mov r0, #3
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D5428: .word ov00_02326C4C
_022D542C: .word ov00_022D6794
	arm_func_end ov00_022D5314

	arm_func_start ov00_022D5430
ov00_022D5430: ; 0x022D5430
	stmdb sp!, {r3, r4, r5, lr}
	bl EnableIrqFlag
	ldr r1, _022D5634 ; =ov00_02326C4C
	mov r4, r0
	ldr r1, [r1]
	cmp r1, #0
	bne _022D5458
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r3, r4, r5, pc}
_022D5458:
	add r1, r1, #0x2000
	ldr r2, [r1, #0x260]
	cmp r2, #0xd
	addls pc, pc, r2, lsl #2
	b _022D54E8
_022D546C: ; jump table
	b _022D54E8 ; case 0
	b _022D54B0 ; case 1
	b _022D54E8 ; case 2
	b _022D54F8 ; case 3
	b _022D54E8 ; case 4
	b _022D54E8 ; case 5
	b _022D54BC ; case 6
	b _022D54E8 ; case 7
	b _022D54E8 ; case 8
	b _022D54F8 ; case 9
	b _022D54E8 ; case 10
	b _022D54E8 ; case 11
	b _022D54F8 ; case 12
	b _022D54A4 ; case 13
_022D54A4:
	bl SetIrqFlag
	mov r0, #2
	ldmia sp!, {r3, r4, r5, pc}
_022D54B0:
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022D54BC:
	mov r0, #0xd
	bl ov00_022D5B1C
	ldr r1, _022D5634 ; =ov00_02326C4C
	mov r2, #9
	ldr r1, [r1]
	mov r0, r4
	add r1, r1, #0x2200
	strh r2, [r1, #0x80]
	bl SetIrqFlag
	mov r0, #3
	ldmia sp!, {r3, r4, r5, pc}
_022D54E8:
	mov r0, r4
	bl SetIrqFlag
	mov r0, #1
	ldmia sp!, {r3, r4, r5, pc}
_022D54F8:
	ldrb r0, [r1, #0x26b]
	cmp r0, #1
	bne _022D5524
	mov r0, #0xd
	bl ov00_022D5B1C
	ldr r0, _022D5634 ; =ov00_02326C4C
	mov r1, #9
	ldr r0, [r0]
	add r0, r0, #0x2200
	strh r1, [r0, #0x80]
	b _022D5624
_022D5524:
	bl ov00_022BF240
	mov r5, r0
	mov r1, #2
	bl DC_InvalidateRange
	ldrh r0, [r5]
	cmp r0, #0
	beq _022D5554
	cmp r0, #1
	beq _022D558C
	cmp r0, #2
	beq _022D5598
	b _022D55A4
_022D5554:
	bl ov00_022BEB74
	cmp r0, #0
	bne _022D55C0
	mov r0, #1
	bl ov00_022D5B1C
	ldr r1, _022D5634 ; =ov00_02326C4C
	mov r2, #0
	ldr r1, [r1]
	mov r0, r4
	add r1, r1, #0x2200
	strh r2, [r1, #0x80]
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022D558C:
	ldr r0, _022D5638 ; =ov00_022D5D40
	bl ov00_022BFA54
	b _022D55C0
_022D5598:
	ldr r0, _022D5638 ; =ov00_022D5D40
	bl ov00_022BFAD4
	b _022D55C0
_022D55A4:
	ldr r1, _022D5634 ; =ov00_02326C4C
	ldr r0, _022D563C ; =ov00_022D68B0
	ldr r1, [r1]
	mov r2, #1
	add r1, r1, #0x2000
	strb r2, [r1, #0x26b]
	bl ov00_022BFB9C
_022D55C0:
	cmp r0, #2
	beq _022D55DC
	cmp r0, #3
	beq _022D560C
	cmp r0, #8
	beq _022D55FC
	b _022D560C
_022D55DC:
	mov r0, #0xd
	bl ov00_022D5B1C
	ldr r0, _022D5634 ; =ov00_02326C4C
	mov r1, #9
	ldr r0, [r0]
	add r0, r0, #0x2200
	strh r1, [r0, #0x80]
	b _022D5624
_022D55FC:
	mov r0, r4
	bl SetIrqFlag
	mov r0, #4
	ldmia sp!, {r3, r4, r5, pc}
_022D560C:
	mov r0, #0xb
	bl ov00_022D5B1C
	mov r0, r4
	bl SetIrqFlag
	mov r0, #7
	ldmia sp!, {r3, r4, r5, pc}
_022D5624:
	mov r0, r4
	bl SetIrqFlag
	mov r0, #3
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022D5634: .word ov00_02326C4C
_022D5638: .word ov00_022D5D40
_022D563C: .word ov00_022D68B0
	arm_func_end ov00_022D5430

	arm_func_start ov00_022D5640
ov00_022D5640: ; 0x022D5640
	stmdb sp!, {r4, lr}
	bl EnableIrqFlag
	ldr r1, _022D566C ; =ov00_02326C4C
	mov r4, #0
	ldr r1, [r1]
	cmp r1, #0
	addne r1, r1, #0x2000
	ldrne r4, [r1, #0x260]
	bl SetIrqFlag
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D566C: .word ov00_02326C4C
	arm_func_end ov00_022D5640

	arm_func_start ov00_022D5670
ov00_022D5670: ; 0x022D5670
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	bl EnableIrqFlag
	ldr r1, _022D5704 ; =ov00_02326C4C
	mov r2, #0
	ldr r3, [r1]
	add r1, r3, #0x2000
	cmp r3, #0
	ldr r4, [r1, #0x264]
	bne _022D56A4
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022D56A4:
	tst r5, #0x8000
	beq _022D56C4
	ldr r1, _022D5708 ; =0x00003FFE
	orr r2, r2, #0xfe
	tst r5, r1
	orreq r5, r5, #0x82
	orr r2, r2, #0x3f00
	orreq r5, r5, #0xa000
_022D56C4:
	tst r5, #0x20000
	orrne r2, r2, #0x10000
	tst r5, #0x80000
	orrne r2, r2, #0x40000
	tst r5, #0x200000
	orrne r2, r2, #0x100000
	tst r5, #0x800000
	orrne r2, r2, #0x400000
	mvn r1, r2
	and r1, r4, r1
	orr r2, r5, r1
	add r1, r3, #0x2000
	str r2, [r1, #0x264]
	bl SetIrqFlag
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022D5704: .word ov00_02326C4C
_022D5708: .word 0x00003FFE
	arm_func_end ov00_022D5670

	arm_func_start ov00_022D570C
ov00_022D570C: ; 0x022D570C
	ldr r0, _022D5718 ; =ov00_02326C4C
	ldr r0, [r0]
	bx lr
	.align 2, 0
_022D5718: .word ov00_02326C4C
	arm_func_end ov00_022D570C

	arm_func_start ov00_022D571C
ov00_022D571C: ; 0x022D571C
	stmdb sp!, {r3, r4, r5, lr}
	movs r5, r0
	mov r4, r1
	bne _022D576C
	ldr r1, _022D5838 ; =ov00_02326C4C
	mov r3, #3
	ldr r0, [r1]
	mov r2, #0
	add r0, r0, #0x2000
	str r3, [r0, #0x26c]
	ldr r0, [r1]
	add r0, r0, #0x2000
	str r2, [r0, #0x270]
	ldr r0, [r1]
	add r0, r0, #0x2000
	str r2, [r0, #0x274]
	ldr r0, [r1]
	add r0, r0, #0x2000
	str r2, [r0, #0x278]
	b _022D5824
_022D576C:
	ldr r1, _022D5838 ; =ov00_02326C4C
	ldr r2, [r5]
	ldr r0, [r1]
	and r2, r2, #3
	add r0, r0, #0x2000
	str r2, [r0, #0x26c]
	ldr r3, [r5, #4]
	ldr r0, [r5, #8]
	and r2, r3, #3
	rsb r2, r2, #4
	and r2, r2, #3
	add r2, r2, #0xc
	cmp r2, r0
	ldr r0, [r1]
	bls _022D57C4
	mov r2, #0
	add r0, r0, #0x2000
	str r2, [r0, #0x270]
	ldr r0, [r1]
	add r0, r0, #0x2000
	str r2, [r0, #0x274]
	b _022D5810
_022D57C4:
	add r2, r3, #3
	bic r2, r2, #3
	add r0, r0, #0x2000
	str r2, [r0, #0x270]
	ldr r2, [r5, #4]
	ldr r0, [r1]
	and r2, r2, #3
	rsb r2, r2, #4
	ldr r3, [r5, #8]
	and r2, r2, #3
	sub r2, r3, r2
	add r0, r0, #0x2000
	str r2, [r0, #0x274]
	ldr r0, [r1]
	mov r1, #0
	add r2, r0, #0x2000
	ldr r0, [r2, #0x270]
	ldr r2, [r2, #0x274]
	bl MemsetFast
_022D5810:
	ldr r0, _022D5838 ; =ov00_02326C4C
	ldr r1, [r5, #0xc]
	ldr r0, [r0]
	add r0, r0, #0x2000
	str r1, [r0, #0x278]
_022D5824:
	ldr r0, _022D5838 ; =ov00_02326C4C
	ldr r0, [r0]
	add r0, r0, #0x2000
	str r4, [r0, #0x27c]
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022D5838: .word ov00_02326C4C
	arm_func_end ov00_022D571C

	arm_func_start ov00_022D583C
ov00_022D583C: ; 0x022D583C
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r0, r2
	mov r4, r1
	bl ov00_022D5670
	ldr r2, _022D59C8 ; =ov00_02326C4C
	mov r3, #0x400
	ldr r1, [r2]
	mov r0, #0
	add ip, r1, #0x1500
	add r1, r1, #0x2000
	str ip, [r1, #0x288]
	ldr r1, [r2]
	add r1, r1, #0x2200
	strh r3, [r1, #0x8c]
	bl ov00_022D59F4
	ldr r1, _022D59C8 ; =ov00_02326C4C
	mov r2, #1
	mov r2, r2, lsl r0
	ldr r0, [r1]
	mov r2, r2, asr #1
	add r0, r0, #0x2200
	strh r2, [r0, #0x8e]
	ldr r0, [r1]
	add r0, r0, #0x2200
	ldrh r0, [r0, #0x68]
	cmp r0, #0
	bne _022D58B0
	bl ov00_022BF780
_022D58B0:
	ldr r2, _022D59C8 ; =ov00_02326C4C
	ldr r1, [r2]
	add r1, r1, #0x2200
	strh r0, [r1, #0x90]
	ldr r1, [r2]
	add r0, r1, #0x2000
	ldr r0, [r0, #0x264]
	and r0, r0, #0x300000
	cmp r0, #0x300000
	movne r2, #1
	moveq r2, #0
	add r0, r1, #0x2200
	strh r2, [r0, #0x98]
	cmp r5, #0
	mov r2, #6
	bne _022D590C
	ldr r1, _022D59C8 ; =ov00_02326C4C
	ldr r0, _022D59CC ; =ov00_02318158
	ldr r1, [r1]
	add r1, r1, #0x92
	add r1, r1, #0x2200
	bl MemcpyFast
	b _022D5924
_022D590C:
	ldr r1, _022D59C8 ; =ov00_02326C4C
	mov r0, r5
	ldr r1, [r1]
	add r1, r1, #0x92
	add r1, r1, #0x2200
	bl MemcpyFast
_022D5924:
	cmp r4, #0
	ldrne r0, _022D59D0 ; =ov00_02318160
	mov r2, #0x20
	cmpne r4, r0
	bne _022D5968
	ldr r1, _022D59C8 ; =ov00_02326C4C
	ldr r0, _022D59D0 ; =ov00_02318160
	ldr r1, [r1]
	add r1, r1, #0x29c
	add r1, r1, #0x2000
	bl MemcpyFast
	ldr r0, _022D59C8 ; =ov00_02326C4C
	mov r1, #0
	ldr r0, [r0]
	add r0, r0, #0x2200
	strh r1, [r0, #0x9a]
	b _022D59B0
_022D5968:
	ldr r1, _022D59C8 ; =ov00_02326C4C
	mov r0, r4
	ldr r1, [r1]
	add r1, r1, #0x29c
	add r1, r1, #0x2000
	bl MemcpyFast
	mov r1, #0
_022D5984:
	ldrb r0, [r4]
	cmp r0, #0
	beq _022D59A0
	add r1, r1, #1
	cmp r1, #0x20
	add r4, r4, #1
	blt _022D5984
_022D59A0:
	ldr r0, _022D59C8 ; =ov00_02326C4C
	ldr r0, [r0]
	add r0, r0, #0x2200
	strh r1, [r0, #0x9a]
_022D59B0:
	ldr r0, _022D59C8 ; =ov00_02326C4C
	mov r1, #0
	ldr r0, [r0]
	add r0, r0, #0x2000
	str r1, [r0, #0x284]
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022D59C8: .word ov00_02326C4C
_022D59CC: .word ov00_02318158
_022D59D0: .word ov00_02318160
	arm_func_end ov00_022D583C

	arm_func_start ov00_022D59D4
ov00_022D59D4: ; 0x022D59D4
	ldr r0, _022D59EC ; =ov00_02326C4C
	ldr r1, _022D59F0 ; =0x00AAA082
	ldr r0, [r0]
	add r0, r0, #0x2000
	str r1, [r0, #0x264]
	bx lr
	.align 2, 0
_022D59EC: .word ov00_02326C4C
_022D59F0: .word 0x00AAA082
	arm_func_end ov00_022D59D4

	arm_func_start ov00_022D59F4
ov00_022D59F4: ; 0x022D59F4
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr r2, _022D5A7C ; =ov00_02326C4C
	ldr lr, _022D5A80 ; =0x4EC4EC4F
	ldr r2, [r2]
	mov r1, r0
	add r2, r2, #0x2000
	ldr r7, [r2, #0x264]
	mov r6, #0
	mov r5, #1
	mov ip, #0xd
_022D5A1C:
	mov r2, r1, lsr #0x1f
	smull r3, r4, lr, r1
	add r4, r2, r4, asr #2
	smull r2, r3, ip, r4
	sub r4, r1, r2
	add r2, r4, #1
	tst r7, r5, lsl r2
	bne _022D5A4C
	add r6, r6, #1
	cmp r6, #0xd
	add r1, r1, #1
	blt _022D5A1C
_022D5A4C:
	add r3, r0, r6
	ldr r2, _022D5A80 ; =0x4EC4EC4F
	mov r0, r3, lsr #0x1f
	smull r1, ip, r2, r3
	add ip, r0, ip, asr #2
	mov r2, #0xd
	smull r0, r1, r2, ip
	sub ip, r3, r0
	add r0, ip, #1
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022D5A7C: .word ov00_02326C4C
_022D5A80: .word 0x4EC4EC4F
	arm_func_end ov00_022D59F4

	arm_func_start ov00_022D5A84
ov00_022D5A84: ; 0x022D5A84
	stmdb sp!, {r3, r4, r5, lr}
	ldr ip, _022D5AC4 ; =ov00_02326C4C
	mov r5, r0
	ldr r0, [ip]
	mov r4, r1
	add r1, r0, #0x2200
	ldrsh r0, [r1, #0x80]
	mov ip, #0
	mov lr, r2
	strh ip, [r1, #0x80]
	str r3, [sp]
	mov r1, r5
	mov r2, r4
	mov r3, lr
	bl ov00_022D5AC8
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022D5AC4: .word ov00_02326C4C
	arm_func_end ov00_022D5A84

	arm_func_start ov00_022D5AC8
ov00_022D5AC8: ; 0x022D5AC8
	stmdb sp!, {r3, lr}
	sub sp, sp, #0x10
	ldr ip, _022D5B18 ; =ov00_02326C4C
	ldr ip, [ip]
	add ip, ip, #0x2000
	ldr lr, [ip, #0x27c]
	cmp lr, #0
	addeq sp, sp, #0x10
	ldmeqia sp!, {r3, pc}
	ldr lr, [sp, #0x18]
	strh r0, [sp]
	str r2, [sp, #4]
	str r3, [sp, #8]
	str lr, [sp, #0xc]
	strh r1, [sp, #2]
	ldr r1, [ip, #0x27c]
	add r0, sp, #0
	blx r1
	add sp, sp, #0x10
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D5B18: .word ov00_02326C4C
	arm_func_end ov00_022D5AC8

	arm_func_start ov00_022D5B1C
ov00_022D5B1C: ; 0x022D5B1C
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	bl EnableIrqFlag
	ldr r1, _022D5BA8 ; =ov00_02326C4C
	mov r4, r0
	ldr r1, [r1]
	add r0, r1, #0x2000
	ldr r0, [r0, #0x260]
	cmp r0, #9
	bne _022D5B58
	cmp r5, #9
	beq _022D5B58
	add r0, r1, #0x2cc
	add r0, r0, #0x2000
	bl sub_0207B1E8
_022D5B58:
	ldr r0, _022D5BA8 ; =ov00_02326C4C
	ldr r0, [r0]
	add r0, r0, #0x2000
	ldr r1, [r0, #0x260]
	cmp r1, #0xb
	strne r5, [r0, #0x260]
	cmp r5, #9
	bne _022D5B9C
	mov r2, #0
	ldr r0, _022D5BA8 ; =ov00_02326C4C
	str r2, [sp]
	ldr r0, [r0]
	ldr r1, _022D5BAC ; =0x022F5341
	add r0, r0, #0x2cc
	ldr r3, _022D5BB0 ; =ov00_022D5C28
	add r0, r0, #0x2000
	bl sub_0207B17C
_022D5B9C:
	mov r0, r4
	bl SetIrqFlag
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022D5BA8: .word ov00_02326C4C
_022D5BAC: .word 0x022F5341
_022D5BB0: .word ov00_022D5C28
	arm_func_end ov00_022D5B1C

	arm_func_start ov00_022D5BB4
ov00_022D5BB4: ; 0x022D5BB4
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #4
	bl EnableIrqFlag
	ldr r1, _022D5C1C ; =ov00_02326C4C
	mov r4, r0
	ldr r0, [r1]
	add r0, r0, #0x2cc
	add r0, r0, #0x2000
	bl sub_0207B1E8
	ldr r0, _022D5C1C ; =ov00_02326C4C
	ldr r1, [r0]
	add r0, r1, #0x2000
	ldr r0, [r0, #0x260]
	cmp r0, #9
	bne _022D5C0C
	add r0, r1, #0x2cc
	mov r2, #0
	ldr r1, _022D5C20 ; =0x022F5341
	ldr r3, _022D5C24 ; =ov00_022D5C28
	add r0, r0, #0x2000
	str r2, [sp]
	bl sub_0207B17C
_022D5C0C:
	mov r0, r4
	bl SetIrqFlag
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
	.align 2, 0
_022D5C1C: .word ov00_02326C4C
_022D5C20: .word 0x022F5341
_022D5C24: .word ov00_022D5C28
	arm_func_end ov00_022D5BB4

	arm_func_start ov00_022D5C28
ov00_022D5C28: ; 0x022D5C28
	stmdb sp!, {r3, lr}
	bl ov00_022D70D0
	bl ov00_022D5BB4
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022D5C28

	arm_func_start ov00_022D5C38
ov00_022D5C38: ; 0x022D5C38
	mov r1, r0
	mov r0, #0
	mov r3, #1
_022D5C44:
	clz r2, r1
	rsbs r2, r2, #0x1f
	blo _022D5C54
	b _022D5C58
_022D5C54:
	bx lr
_022D5C58:
	bic r1, r1, r3, lsl r2
	add r0, r0, #1
	b _022D5C44
	arm_func_end ov00_022D5C38

	arm_func_start ov00_022D5C64
ov00_022D5C64: ; 0x022D5C64
	clz r0, r0
	bx lr
	arm_func_end ov00_022D5C64

	arm_func_start ov00_022D5C6C
ov00_022D5C6C: ; 0x022D5C6C
	stmdb sp!, {r3, lr}
	ldr r0, _022D5CC0 ; =ov00_02326C4C
	ldr r0, [r0]
	add r1, r0, #0x2000
	ldrb r0, [r1, #0x26b]
	cmp r0, #0
	ldmneia sp!, {r3, pc}
	mov r2, #1
	ldr r0, _022D5CC4 ; =ov00_022D68B0
	strb r2, [r1, #0x26b]
	bl ov00_022BFB9C
	cmp r0, #2
	ldmeqia sp!, {r3, pc}
	mov r0, #0xb
	bl ov00_022D5B1C
	mov r1, #0
	mov r2, r1
	mov r0, #7
	mov r3, #0x610
	bl ov00_022D5A84
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D5CC0: .word ov00_02326C4C
_022D5CC4: .word ov00_022D68B0
	arm_func_end ov00_022D5C6C

	arm_func_start ov00_022D5CC8
ov00_022D5CC8: ; 0x022D5CC8
	stmdb sp!, {r3, lr}
	ldrh r1, [r0, #2]
	cmp r1, #8
	ldreqh r1, [r0, #4]
	cmpeq r1, #0x16
	ldreqh r0, [r0, #6]
	cmpeq r0, #0x25
	ldmneia sp!, {r3, pc}
	ldr r0, _022D5D3C ; =ov00_02326C4C
	ldr r0, [r0]
	add r0, r0, #0x2000
	ldr r0, [r0, #0x260]
	sub r0, r0, #8
	cmp r0, #4
	addls pc, pc, r0, lsl #2
	ldmia sp!, {r3, pc}
_022D5D08: ; jump table
	b _022D5D1C ; case 0
	b _022D5D28 ; case 1
	b _022D5D30 ; case 2
	ldmia sp!, {r3, pc} ; case 3
	b _022D5D28 ; case 4
_022D5D1C:
	mov r0, #0xc
	bl ov00_022D5B1C
	ldmia sp!, {r3, pc}
_022D5D28:
	bl ov00_022D5C6C
	ldmia sp!, {r3, pc}
_022D5D30:
	mov r0, #0xc
	bl ov00_022D5B1C
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D5D3C: .word ov00_02326C4C
	arm_func_end ov00_022D5CC8

	arm_func_start ov00_022D5D40
ov00_022D5D40: ; 0x022D5D40
	stmdb sp!, {r3, lr}
	ldrh r1, [r0, #2]
	mov r2, #0x14
	cmp r1, #4
	addls pc, pc, r1, lsl #2
	b _022D5FA0
_022D5D58: ; jump table
	b _022D5D6C ; case 0
	b _022D5F68 ; case 1
	b _022D5FA0 ; case 2
	b _022D5FA0 ; case 3
	b _022D5FA0 ; case 4
_022D5D6C:
	ldrh r0, [r0]
	cmp r0, #0x19
	bgt _022D5DA4
	bge _022D5E68
	cmp r0, #6
	addls pc, pc, r0, lsl #2
	b _022D5EE0
_022D5D88: ; jump table
	b _022D5EE0 ; case 0
	b _022D5EE0 ; case 1
	b _022D5EE0 ; case 2
	b _022D5DC0 ; case 3
	b _022D5DD0 ; case 4
	b _022D5E24 ; case 5
	b _022D5E44 ; case 6
_022D5DA4:
	cmp r0, #0x1d
	bgt _022D5DB4
	beq _022D5E54
	b _022D5EE0
_022D5DB4:
	cmp r0, #0x27
	beq _022D5E90
	b _022D5EE0
_022D5DC0:
	ldr r0, _022D5FD8 ; =ov00_022D5D40
	bl ov00_022BFA94
	mov r2, r0
	b _022D5EE0
_022D5DD0:
	bl ov00_022BEB74
	cmp r0, #0
	beq _022D5DE4
	cmp r0, #4
	b _022D5E04
_022D5DE4:
	mov r0, #1
	bl ov00_022D5B1C
	mov r0, #0
	ldr r3, _022D5FDC ; =0x00000663
	mov r1, r0
	mov r2, r0
	bl ov00_022D5A84
	ldmia sp!, {r3, pc}
_022D5E04:
	mov r0, #0xb
	bl ov00_022D5B1C
	mov r1, #0
	ldr r3, _022D5FE0 ; =0x0000066C
	mov r2, r1
	mov r0, #7
	bl ov00_022D5A84
	ldmia sp!, {r3, pc}
_022D5E24:
	mov r0, #3
	bl ov00_022D5B1C
	mov r0, #0
	ldr r3, _022D5FE4 ; =0x00000673
	mov r1, r0
	mov r2, r0
	bl ov00_022D5A84
	ldmia sp!, {r3, pc}
_022D5E44:
	ldr r0, _022D5FD8 ; =ov00_022D5D40
	bl ov00_022BFA54
	mov r2, r0
	b _022D5EE0
_022D5E54:
	ldr r0, _022D5FD8 ; =ov00_022D5D40
	mov r1, #0
	bl ov00_022C1560
	mov r2, r0
	b _022D5EE0
_022D5E68:
	ldr r1, _022D5FE8 ; =ov00_02326C4C
	ldr r0, _022D5FD8 ; =ov00_022D5D40
	ldr r3, [r1]
	add r2, r3, #0x2000
	ldrb r1, [r2, #0x250]
	ldrb r2, [r2, #0x251]
	add r3, r3, #0x2200
	bl ov00_022C142C
	mov r2, r0
	b _022D5EE0
_022D5E90:
	ldr r0, _022D5FE8 ; =ov00_02326C4C
	ldr r2, [r0]
	add r0, r2, #0x2000
	ldr r1, [r0, #0x264]
	and r0, r1, #0xc0000
	cmp r0, #0xc0000
	moveq r0, #1
	movne r0, #0
	mov r0, r0, lsl #0x10
	mov ip, r0, lsr #0x10
	and r1, r1, #0x30000
	cmp r1, #0x30000
	movne r3, #1
	add r1, r2, #0x2140
	ldr r0, _022D5FEC ; =ov00_022D6358
	moveq r3, #0
	mov r2, #0
	str ip, [sp]
	bl ov00_022C0068
	mov r2, r0
_022D5EE0:
	cmp r2, #2
	ldmeqia sp!, {r3, pc}
	cmp r2, #3
	beq _022D5F30
	cmp r2, #8
	bne _022D5F30
	mov r0, #0xc
	bl ov00_022D5B1C
	ldr r0, _022D5FE8 ; =ov00_02326C4C
	mov r2, #0
	ldr r1, [r0]
	add r0, r1, #0x2200
	ldrsh r0, [r0, #0x80]
	cmp r0, #5
	addeq r1, r1, #0x2140
	mov r0, #1
	movne r1, #0
	rsb r3, r0, #0x6b0
	bl ov00_022D5A84
	ldmia sp!, {r3, pc}
_022D5F30:
	mov r0, #0xb
	bl ov00_022D5B1C
	ldr r0, _022D5FE8 ; =ov00_02326C4C
	ldr r3, _022D5FF0 ; =0x000006B8
	ldr r1, [r0]
	mov r2, #0
	add r0, r1, #0x2200
	ldrsh r0, [r0, #0x80]
	cmp r0, #5
	addeq r1, r1, #0x2140
	movne r1, #0
	mov r0, #7
	bl ov00_022D5A84
	ldmia sp!, {r3, pc}
_022D5F68:
	mov r0, #0xc
	bl ov00_022D5B1C
	ldr r0, _022D5FE8 ; =ov00_02326C4C
	ldr r3, _022D5FF4 ; =0x000006DE
	ldr r1, [r0]
	mov r2, #0
	add r0, r1, #0x2200
	ldrsh r0, [r0, #0x80]
	cmp r0, #5
	addeq r1, r1, #0x2140
	movne r1, #0
	mov r0, #1
	bl ov00_022D5A84
	ldmia sp!, {r3, pc}
_022D5FA0:
	mov r0, #0xb
	bl ov00_022D5B1C
	ldr r0, _022D5FE8 ; =ov00_02326C4C
	ldr r3, _022D5FF8 ; =0x000006E8
	ldr r1, [r0]
	mov r2, #0
	add r0, r1, #0x2200
	ldrsh r0, [r0, #0x80]
	cmp r0, #5
	addeq r1, r1, #0x2140
	movne r1, #0
	mov r0, #7
	bl ov00_022D5A84
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D5FD8: .word ov00_022D5D40
_022D5FDC: .word 0x00000663
_022D5FE0: .word 0x0000066C
_022D5FE4: .word 0x00000673
_022D5FE8: .word ov00_02326C4C
_022D5FEC: .word ov00_022D6358
_022D5FF0: .word 0x000006B8
_022D5FF4: .word 0x000006DE
_022D5FF8: .word 0x000006E8
	arm_func_end ov00_022D5D40

	arm_func_start ov00_022D5FFC
ov00_022D5FFC: ; 0x022D5FFC
	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
	sub sp, sp, #4
	mov r5, r0
	ldrh r0, [r5, #2]
	mov r4, #0x14
	cmp r0, #4
	addls pc, pc, r0, lsl #2
	b _022D6294
_022D601C: ; jump table
	b _022D6030 ; case 0
	b _022D6288 ; case 1
	b _022D6294 ; case 2
	b _022D6294 ; case 3
	b _022D6294 ; case 4
_022D6030:
	ldr r0, _022D62B8 ; =ov00_02326C4C
	ldr r0, [r0]
	add r0, r0, #0x2000
	ldr r0, [r0, #0x260]
	cmp r0, #5
	bne _022D6064
	mov r0, #6
	bl ov00_022D5B1C
	mov r0, #0
	ldr r3, _022D62BC ; =0x00000704
	mov r1, r0
	mov r2, r0
	bl ov00_022D5A84
_022D6064:
	ldr r1, _022D62B8 ; =ov00_02326C4C
	ldr r2, [r1]
	add r0, r2, #0x2000
	ldr r0, [r0, #0x260]
	cmp r0, #6
	beq _022D6090
	cmp r0, #7
	beq _022D6208
	cmp r0, #0xd
	beq _022D6218
	b _022D6224
_022D6090:
	add r0, r2, #0x2200
	mov r2, #7
	strh r2, [r0, #0x80]
	ldrh r0, [r5, #8]
	cmp r0, #5
	bne _022D611C
	ldr r0, [r1]
	add r1, r0, #0x2200
	add r0, r0, #0x2000
	ldrh r1, [r1, #0x8c]
	ldr r0, [r0, #0x288]
	bl DC_InvalidateRange
	ldrh r0, [r5, #0xe]
	mov r4, #0
	cmp r0, #0
	ble _022D611C
	ldr r8, _022D62C0 ; =0x0000071A
	mov r7, #7
	mov r6, r4
_022D60DC:
	add r0, r5, r4, lsl #1
	add r2, r5, r4, lsl #2
	ldrh r1, [r0, #0x50]
	ldr r0, [r2, #0x10]
	bl ov00_022D6D5C
	str r8, [sp]
	add r0, r5, r4, lsl #2
	ldr r2, [r0, #0x10]
	mov r0, r7
	mov r1, r6
	mov r3, r5
	bl ov00_022D5AC8
	ldrh r0, [r5, #0xe]
	add r4, r4, #1
	cmp r4, r0
	blt _022D60DC
_022D611C:
	ldr r0, _022D62B8 ; =ov00_02326C4C
	ldr r0, [r0]
	add r0, r0, #0x2000
	ldr r1, [r0, #0x264]
	and r0, r1, #0xc00000
	cmp r0, #0xc00000
	bne _022D6188
	ldr r0, _022D62C4 ; =0x00003FFE
	and r0, r1, r0
	bl ov00_022D5C38
	movs r1, r0
	beq _022D6188
	ldr r0, _022D62B8 ; =ov00_02326C4C
	ldr r0, [r0]
	add r0, r0, #0x2000
	ldr r6, [r0, #0x284]
	mov r0, r6
	bl _u32_div_f
	cmp r1, #0
	bne _022D6188
	ldr r4, _022D62C8 ; =0x00000728
	mov r1, #0
	mov r2, r6
	mov r3, r1
	mov r0, #8
	str r4, [sp]
	bl ov00_022D5AC8
_022D6188:
	ldrh r0, [r5, #0xa]
	bl ov00_022D5C64
	rsb r0, r0, #0x20
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	bl ov00_022D59F4
	ldr r1, _022D62B8 ; =ov00_02326C4C
	mov r2, #1
	mov r2, r2, lsl r0
	ldr r0, [r1]
	mov r2, r2, asr #1
	add r0, r0, #0x2200
	strh r2, [r0, #0x8e]
	ldr r0, [r1]
	add r1, r0, #0x2200
	add r0, r0, #0x2000
	ldrh r1, [r1, #0x8c]
	ldr r0, [r0, #0x288]
	bl DC_InvalidateRange
	ldr r2, _022D62B8 ; =ov00_02326C4C
	ldr r0, _022D62CC ; =ov00_022D5FFC
	ldr r1, [r2]
	add r1, r1, #0x2000
	ldr r3, [r1, #0x284]
	add r3, r3, #1
	str r3, [r1, #0x284]
	ldr r1, [r2]
	add r1, r1, #0x288
	add r1, r1, #0x2000
	bl ov00_022BFED8
	mov r4, r0
	b _022D6224
_022D6208:
	ldr r0, _022D62D0 ; =ov00_022D62E0
	bl ov00_022C0028
	mov r4, r0
	b _022D6224
_022D6218:
	bl ov00_022D5C6C
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022D6224:
	cmp r4, #2
	addeq sp, sp, #4
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	cmp r4, #3
	beq _022D6264
	cmp r4, #8
	bne _022D6264
	mov r0, #0xc
	bl ov00_022D5B1C
	mov r1, #0
	ldr r3, _022D62D4 ; =0x00000753
	mov r2, r1
	mov r0, #1
	bl ov00_022D5A84
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022D6264:
	mov r0, #0xb
	bl ov00_022D5B1C
	mov r1, #0
	ldr r3, _022D62D8 ; =0x0000075C
	mov r2, r1
	mov r0, #7
	bl ov00_022D5A84
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022D6288:
	bl ov00_022D5C6C
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022D6294:
	mov r0, #0xb
	bl ov00_022D5B1C
	mov r1, #0
	ldr r3, _022D62DC ; =0x0000076D
	mov r2, r1
	mov r0, #7
	bl ov00_022D5A84
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022D62B8: .word ov00_02326C4C
_022D62BC: .word 0x00000704
_022D62C0: .word 0x0000071A
_022D62C4: .word 0x00003FFE
_022D62C8: .word 0x00000728
_022D62CC: .word ov00_022D5FFC
_022D62D0: .word ov00_022D62E0
_022D62D4: .word 0x00000753
_022D62D8: .word 0x0000075C
_022D62DC: .word 0x0000076D
	arm_func_end ov00_022D5FFC

	arm_func_start ov00_022D62E0
ov00_022D62E0: ; 0x022D62E0
	stmdb sp!, {r3, lr}
	ldrh r0, [r0, #2]
	cmp r0, #4
	addls pc, pc, r0, lsl #2
	b _022D6330
_022D62F4: ; jump table
	b _022D6308 ; case 0
	b _022D6328 ; case 1
	b _022D6330 ; case 2
	b _022D6330 ; case 3
	b _022D6330 ; case 4
_022D6308:
	mov r0, #3
	bl ov00_022D5B1C
	mov r0, #0
	ldr r3, _022D6350 ; =0x00000783
	mov r1, r0
	mov r2, r0
	bl ov00_022D5A84
	ldmia sp!, {r3, pc}
_022D6328:
	bl ov00_022D5C6C
	ldmia sp!, {r3, pc}
_022D6330:
	mov r0, #0xb
	bl ov00_022D5B1C
	mov r1, #0
	ldr r3, _022D6354 ; =0x00000793
	mov r2, r1
	mov r0, #7
	bl ov00_022D5A84
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D6350: .word 0x00000783
_022D6354: .word 0x00000793
	arm_func_end ov00_022D62E0

	arm_func_start ov00_022D6358
ov00_022D6358: ; 0x022D6358
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldrh r0, [r4, #2]
	cmp r0, #0xc
	addls pc, pc, r0, lsl #2
	b _022D6578
_022D6370: ; jump table
	b _022D63A4 ; case 0
	b _022D6554 ; case 1
	b _022D6578 ; case 2
	b _022D6578 ; case 3
	b _022D6578 ; case 4
	b _022D6578 ; case 5
	b _022D6568 ; case 6
	b _022D6578 ; case 7
	b _022D6578 ; case 8
	b _022D6578 ; case 9
	b _022D6578 ; case 10
	b _022D6568 ; case 11
	b _022D6568 ; case 12
_022D63A4:
	ldrh r0, [r4, #8]
	cmp r0, #9
	bgt _022D63E4
	cmp r0, #0
	addge pc, pc, r0, lsl #2
	b _022D652C
_022D63BC: ; jump table
	b _022D652C ; case 0
	b _022D652C ; case 1
	b _022D652C ; case 2
	b _022D652C ; case 3
	b _022D652C ; case 4
	b _022D652C ; case 5
	ldmia sp!, {r4, pc} ; case 6
	b _022D6460 ; case 7
	b _022D63F0 ; case 8
	b _022D63F0 ; case 9
_022D63E4:
	cmp r0, #0x1a
	ldmeqia sp!, {r4, pc}
	b _022D652C
_022D63F0:
	ldr r1, _022D65A0 ; =ov00_02326C4C
	ldr r2, [r1]
	add r0, r2, #0x2000
	ldr r0, [r0, #0x260]
	sub r0, r0, #8
	cmp r0, #4
	addls pc, pc, r0, lsl #2
	ldmia sp!, {r4, pc}
_022D6410: ; jump table
	b _022D6430 ; case 0
	b _022D643C ; case 1
	b _022D6424 ; case 2
	ldmia sp!, {r4, pc} ; case 3
	b _022D6458 ; case 4
_022D6424:
	add r0, r2, #0x2200
	mov r1, #0
	strh r1, [r0, #0x82]
_022D6430:
	mov r0, #0xc
	bl ov00_022D5B1C
	ldmia sp!, {r4, pc}
_022D643C:
	add r0, r2, #0x2200
	mov r2, #0
	strh r2, [r0, #0x82]
	ldr r0, [r1]
	mov r1, #6
	add r0, r0, #0x2200
	strh r1, [r0, #0x80]
_022D6458:
	bl ov00_022D5C6C
	ldmia sp!, {r4, pc}
_022D6460:
	ldr r1, _022D65A0 ; =ov00_02326C4C
	ldr r3, [r1]
	add r0, r3, #0x2000
	ldr r0, [r0, #0x260]
	cmp r0, #0xc
	bne _022D6488
	mov r0, #8
	bl ov00_022D5B1C
	bl ov00_022D5C6C
	ldmia sp!, {r4, pc}
_022D6488:
	ldrh r2, [r4, #0xa]
	cmp r2, #1
	blo _022D6524
	ldr r0, _022D65A4 ; =0x000007D7
	cmp r2, r0
	bhi _022D6524
	add r0, r3, #0x2200
	strh r2, [r0, #0x82]
	ldr r1, [r1]
	ldr r0, _022D65A8 ; =ov00_022D6684
	add r1, r1, #0x1500
	mov r2, #0x620
	bl ov00_022C0638
	cmp r0, #2
	ldmeqia sp!, {r4, pc}
	cmp r0, #3
	beq _022D64FC
	cmp r0, #8
	bne _022D64FC
	mov r0, #0xc
	bl ov00_022D5B1C
	ldr r0, _022D65A0 ; =ov00_02326C4C
	ldr r3, _022D65AC ; =0x000007ED
	ldr r1, [r0]
	mov r0, #1
	add r1, r1, #0x2140
	mov r2, #0
	bl ov00_022D5A84
	ldmia sp!, {r4, pc}
_022D64FC:
	mov r0, #0xb
	bl ov00_022D5B1C
	ldr r0, _022D65A0 ; =ov00_02326C4C
	ldr r3, _022D65B0 ; =0x000007F6
	ldr r1, [r0]
	mov r0, #7
	add r1, r1, #0x2140
	mov r2, #0
	bl ov00_022D5A84
	ldmia sp!, {r4, pc}
_022D6524:
	bl ov00_022D5C6C
	ldmia sp!, {r4, pc}
_022D652C:
	mov r0, #0xb
	bl ov00_022D5B1C
	ldr r0, _022D65A0 ; =ov00_02326C4C
	ldrh r2, [r4, #8]
	ldr r0, [r0]
	ldr r3, _022D65B4 ; =0x00000804
	add r1, r0, #0x2140
	mov r0, #7
	bl ov00_022D5A84
	ldmia sp!, {r4, pc}
_022D6554:
	ldr r0, _022D65A0 ; =ov00_02326C4C
	ldrh r1, [r4, #0xe]
	ldr r0, [r0]
	add r0, r0, #0x2200
	strh r1, [r0, #0xf8]
_022D6568:
	mov r0, #8
	bl ov00_022D5B1C
	bl ov00_022D5C6C
	ldmia sp!, {r4, pc}
_022D6578:
	mov r0, #0xb
	bl ov00_022D5B1C
	ldr r0, _022D65A0 ; =ov00_02326C4C
	ldr r3, _022D65B8 ; =0x0000081B
	ldr r1, [r0]
	mov r0, #7
	add r1, r1, #0x2140
	mov r2, #0
	bl ov00_022D5A84
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D65A0: .word ov00_02326C4C
_022D65A4: .word 0x000007D7
_022D65A8: .word ov00_022D6684
_022D65AC: .word 0x000007ED
_022D65B0: .word 0x000007F6
_022D65B4: .word 0x00000804
_022D65B8: .word 0x0000081B
	arm_func_end ov00_022D6358

	arm_func_start ov00_022D65BC
ov00_022D65BC: ; 0x022D65BC
	stmdb sp!, {r3, lr}
	ldrh r0, [r0, #2]
	cmp r0, #4
	addls pc, pc, r0, lsl #2
	b _022D6650
_022D65D0: ; jump table
	b _022D65E4 ; case 0
	b _022D6640 ; case 1
	b _022D6650 ; case 2
	b _022D6640 ; case 3
	b _022D6650 ; case 4
_022D65E4:
	ldr r0, _022D6678 ; =ov00_02326C4C
	ldr r1, [r0]
	add r0, r1, #0x2000
	ldr r0, [r0, #0x260]
	cmp r0, #0xc
	bne _022D660C
	mov r0, #0xa
	bl ov00_022D5B1C
	bl ov00_022D5C6C
	ldmia sp!, {r3, pc}
_022D660C:
	add r1, r1, #0x2200
	mov r2, #0
	mov r0, #3
	strh r2, [r1, #0x82]
	bl ov00_022D5B1C
	ldr r1, _022D6678 ; =ov00_02326C4C
	mov r0, #0
	ldr r1, [r1]
	ldr r3, _022D667C ; =0x0000083D
	mov r2, r0
	add r1, r1, #0x2140
	bl ov00_022D5A84
	ldmia sp!, {r3, pc}
_022D6640:
	mov r0, #0xa
	bl ov00_022D5B1C
	bl ov00_022D5C6C
	ldmia sp!, {r3, pc}
_022D6650:
	mov r0, #0xb
	bl ov00_022D5B1C
	ldr r0, _022D6678 ; =ov00_02326C4C
	ldr r3, _022D6680 ; =0x0000084F
	ldr r1, [r0]
	mov r0, #7
	add r1, r1, #0x2140
	mov r2, #0
	bl ov00_022D5A84
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D6678: .word ov00_02326C4C
_022D667C: .word 0x0000083D
_022D6680: .word 0x0000084F
	arm_func_end ov00_022D65BC

	arm_func_start ov00_022D6684
ov00_022D6684: ; 0x022D6684
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldrh r0, [r4, #2]
	cmp r0, #0
	beq _022D66A0
	cmp r0, #4
	b _022D675C
_022D66A0:
	ldrh r0, [r4, #4]
	cmp r0, #0xe
	beq _022D66B8
	cmp r0, #0xf
	beq _022D6708
	b _022D6734
_022D66B8:
	ldr r0, _022D6784 ; =ov00_02326C4C
	ldr r0, [r0]
	add r0, r0, #0x2000
	ldr r0, [r0, #0x260]
	cmp r0, #0xc
	bne _022D66E0
	mov r0, #8
	bl ov00_022D5B1C
	bl ov00_022D5C6C
	ldmia sp!, {r4, pc}
_022D66E0:
	mov r0, #9
	bl ov00_022D5B1C
	ldr r1, _022D6784 ; =ov00_02326C4C
	mov r0, #0
	ldr r1, [r1]
	ldr r3, _022D6788 ; =0x00000872
	mov r2, r0
	add r1, r1, #0x2140
	bl ov00_022D5A84
	ldmia sp!, {r4, pc}
_022D6708:
	ldr r0, [r4, #8]
	ldrh r0, [r0, #0xe]
	mov r0, r0, asr #8
	and r0, r0, #0xff
	bl ov00_022D758C
	ldr r0, [r4, #8]
	mov r1, #0x620
	bl DC_InvalidateRange
	ldr r0, [r4, #8]
	bl ov00_022D709C
	ldmia sp!, {r4, pc}
_022D6734:
	mov r0, #0xb
	bl ov00_022D5B1C
	ldr r0, _022D6784 ; =ov00_02326C4C
	ldrh r2, [r4, #4]
	ldr r0, [r0]
	ldr r3, _022D678C ; =0x00000881
	add r1, r0, #0x2140
	mov r0, #7
	bl ov00_022D5A84
	ldmia sp!, {r4, pc}
_022D675C:
	mov r0, #0xb
	bl ov00_022D5B1C
	ldr r0, _022D6784 ; =ov00_02326C4C
	ldr r3, _022D6790 ; =0x0000088C
	ldr r1, [r0]
	mov r0, #7
	add r1, r1, #0x2140
	mov r2, #0
	bl ov00_022D5A84
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D6784: .word ov00_02326C4C
_022D6788: .word 0x00000872
_022D678C: .word 0x00000881
_022D6790: .word 0x0000088C
	arm_func_end ov00_022D6684

	arm_func_start ov00_022D6794
ov00_022D6794: ; 0x022D6794
	stmdb sp!, {r3, lr}
	ldrh r0, [r0, #2]
	cmp r0, #4
	addls pc, pc, r0, lsl #2
	b _022D6878
_022D67A8: ; jump table
	b _022D67BC ; case 0
	b _022D6868 ; case 1
	b _022D6878 ; case 2
	b _022D6868 ; case 3
	b _022D6878 ; case 4
_022D67BC:
	ldr r0, _022D68A0 ; =ov00_02326C4C
	ldr r0, [r0]
	add r0, r0, #0x2000
	ldr r0, [r0, #0x260]
	cmp r0, #0xc
	bne _022D67E4
	mov r0, #0xa
	bl ov00_022D5B1C
	bl ov00_022D5C6C
	ldmia sp!, {r3, pc}
_022D67E4:
	ldr r0, _022D68A4 ; =ov00_022D65BC
	mov r1, #0
	bl ov00_022C0134
	cmp r0, #2
	ldmeqia sp!, {r3, pc}
	cmp r0, #3
	beq _022D6830
	cmp r0, #8
	bne _022D6840
	mov r0, #0xc
	bl ov00_022D5B1C
	ldr r0, _022D68A0 ; =ov00_02326C4C
	ldr r3, _022D68A8 ; =0x000008B4
	ldr r1, [r0]
	mov r0, #1
	add r1, r1, #0x2140
	mov r2, #0
	bl ov00_022D5A84
	ldmia sp!, {r3, pc}
_022D6830:
	mov r0, #0xa
	bl ov00_022D5B1C
	bl ov00_022D5C6C
	ldmia sp!, {r3, pc}
_022D6840:
	mov r0, #0xb
	bl ov00_022D5B1C
	ldr r1, _022D68A0 ; =ov00_02326C4C
	mov r0, #7
	ldr r1, [r1]
	mov r2, #0
	add r1, r1, #0x2140
	mov r3, #0x8c0
	bl ov00_022D5A84
	ldmia sp!, {r3, pc}
_022D6868:
	mov r0, #0xa
	bl ov00_022D5B1C
	bl ov00_022D5C6C
	ldmia sp!, {r3, pc}
_022D6878:
	mov r0, #0xb
	bl ov00_022D5B1C
	ldr r0, _022D68A0 ; =ov00_02326C4C
	ldr r3, _022D68AC ; =0x000008D3
	ldr r1, [r0]
	mov r0, #7
	add r1, r1, #0x2140
	mov r2, #0
	bl ov00_022D5A84
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D68A0: .word ov00_02326C4C
_022D68A4: .word ov00_022D65BC
_022D68A8: .word 0x000008B4
_022D68AC: .word 0x000008D3
	arm_func_end ov00_022D6794

	arm_func_start ov00_022D68B0
ov00_022D68B0: ; 0x022D68B0
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #4
	ldrh r0, [r0, #2]
	cmp r0, #0
	bne _022D6B88
	ldr r2, _022D6BAC ; =ov00_02326C4C
	mov r0, #0
	ldr r1, [r2]
	add r1, r1, #0x2000
	strb r0, [r1, #0x26b]
	ldr r1, [r2]
	add r1, r1, #0x2200
	strh r0, [r1, #0x82]
	ldr r3, [r2]
	add r1, r3, #0x2000
	ldr r1, [r1, #0x260]
	cmp r1, #0xd
	addls pc, pc, r1, lsl #2
	b _022D6B58
_022D68FC: ; jump table
	b _022D6B58 ; case 0
	b _022D6B58 ; case 1
	b _022D6B58 ; case 2
	b _022D6B58 ; case 3
	b _022D6B58 ; case 4
	b _022D6934 ; case 5
	b _022D6934 ; case 6
	b _022D6958 ; case 7
	b _022D697C ; case 8
	b _022D6A94 ; case 9
	b _022D6AC0 ; case 10
	b _022D6B58 ; case 11
	b _022D6A94 ; case 12
	b _022D6AEC ; case 13
_022D6934:
	mov r0, #3
	bl ov00_022D5B1C
	mov r1, #0
	ldr r3, _022D6BB0 ; =0x000008F5
	mov r2, r1
	mov r0, #1
	bl ov00_022D5A84
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
_022D6958:
	mov r0, #3
	bl ov00_022D5B1C
	mov r0, #0
	ldr r3, _022D6BB4 ; =0x000008FB
	mov r1, r0
	mov r2, r0
	bl ov00_022D5A84
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
_022D697C:
	add r1, r3, #0x2200
	ldrh r4, [r1, #0xf8]
	strh r0, [r1, #0xf8]
	cmp r4, #0x12
	bne _022D6A68
	ldr r1, [r2]
	add r1, r1, #0x2100
	ldrh r3, [r1, #0x70]
	and ip, r3, #0x24
	cmp ip, #0x24
	beq _022D6A68
	orr r3, r3, #0x24
	strh r3, [r1, #0x70]
	ldr lr, [r2]
	add r1, lr, #0x2000
	ldr r2, [r1, #0x264]
	and r1, r2, #0xc0000
	cmp r1, #0xc0000
	moveq r0, #1
	and r1, r2, #0x30000
	cmp r1, #0x30000
	mov r0, r0, lsl #0x10
	mov ip, r0, lsr #0x10
	movne r3, #1
	ldr r0, _022D6BB8 ; =ov00_022D6358
	moveq r3, #0
	add r1, lr, #0x2140
	mov r2, #0
	str ip, [sp]
	bl ov00_022C0068
	cmp r0, #2
	addeq sp, sp, #4
	ldmeqia sp!, {r3, r4, pc}
	cmp r0, #3
	beq _022D6A3C
	cmp r0, #8
	bne _022D6A3C
	mov r0, #0xc
	bl ov00_022D5B1C
	ldr r0, _022D6BAC ; =ov00_02326C4C
	ldr r3, _022D6BBC ; =0x0000091C
	ldr r0, [r0]
	mov r2, r4
	add r1, r0, #0x2140
	mov r0, #1
	bl ov00_022D5A84
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
_022D6A3C:
	mov r0, #0xb
	bl ov00_022D5B1C
	ldr r0, _022D6BAC ; =ov00_02326C4C
	ldr r3, _022D6BC0 ; =0x00000925
	ldr r0, [r0]
	mov r2, r4
	add r1, r0, #0x2140
	mov r0, #7
	bl ov00_022D5A84
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
_022D6A68:
	mov r0, #3
	bl ov00_022D5B1C
	ldr r0, _022D6BAC ; =ov00_02326C4C
	ldr r3, _022D6BC4 ; =0x0000092D
	ldr r0, [r0]
	mov r2, r4
	add r1, r0, #0x2140
	mov r0, #1
	bl ov00_022D5A84
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
_022D6A94:
	mov r0, #3
	bl ov00_022D5B1C
	ldr r0, _022D6BAC ; =ov00_02326C4C
	ldr r3, _022D6BC8 ; =0x00000935
	ldr r1, [r0]
	mov r0, #0
	add r1, r1, #0x2140
	mov r2, #1
	bl ov00_022D5A84
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
_022D6AC0:
	mov r0, #3
	bl ov00_022D5B1C
	ldr r1, _022D6BAC ; =ov00_02326C4C
	mov r0, #0
	ldr r1, [r1]
	ldr r3, _022D6BCC ; =0x0000093C
	mov r2, r0
	add r1, r1, #0x2140
	bl ov00_022D5A84
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
_022D6AEC:
	ldr r0, _022D6BD0 ; =ov00_022D5D40
	bl ov00_022BFAD4
	cmp r0, #2
	addeq sp, sp, #4
	ldmeqia sp!, {r3, r4, pc}
	cmp r0, #3
	beq _022D6B34
	cmp r0, #8
	bne _022D6B34
	mov r0, #0xc
	bl ov00_022D5B1C
	mov r1, #0
	ldr r3, _022D6BD4 ; =0x0000094A
	mov r2, r1
	mov r0, #1
	bl ov00_022D5A84
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
_022D6B34:
	mov r0, #0xb
	bl ov00_022D5B1C
	mov r1, #0
	ldr r3, _022D6BD8 ; =0x00000953
	mov r2, r1
	mov r0, #7
	bl ov00_022D5A84
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
_022D6B58:
	mov r0, #0xb
	bl ov00_022D5B1C
	ldr r1, _022D6BAC ; =ov00_02326C4C
	mov r0, #7
	ldr r1, [r1]
	rsb r3, r0, #0x960
	add r1, r1, #0x2000
	ldr r2, [r1, #0x260]
	mov r1, #0
	bl ov00_022D5A84
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
_022D6B88:
	mov r0, #0xb
	bl ov00_022D5B1C
	mov r1, #0
	mov r2, r1
	mov r0, #7
	mov r3, #0x960
	bl ov00_022D5A84
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
	.align 2, 0
_022D6BAC: .word ov00_02326C4C
_022D6BB0: .word 0x000008F5
_022D6BB4: .word 0x000008FB
_022D6BB8: .word ov00_022D6358
_022D6BBC: .word 0x0000091C
_022D6BC0: .word 0x00000925
_022D6BC4: .word 0x0000092D
_022D6BC8: .word 0x00000935
_022D6BCC: .word 0x0000093C
_022D6BD0: .word ov00_022D5D40
_022D6BD4: .word 0x0000094A
_022D6BD8: .word 0x00000953
	arm_func_end ov00_022D68B0

	arm_func_start ov00_022D6BDC
ov00_022D6BDC: ; 0x022D6BDC
	stmdb sp!, {r4, lr}
	bl EnableIrqFlag
	mov r4, r0
	bl ov00_022D570C
	cmp r0, #0
	bne _022D6C00
	mov r0, r4
	bl SetIrqFlag
	ldmia sp!, {r4, pc}
_022D6C00:
	add r1, r0, #0x2000
	ldr r0, [r1, #0x270]
	cmp r0, #0
	beq _022D6C24
	ldr r2, [r1, #0x274]
	cmp r2, #0
	ble _022D6C24
	mov r1, #0
	bl MemsetFast
_022D6C24:
	mov r0, r4
	bl SetIrqFlag
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D6BDC

	arm_func_start ov00_022D6C30
ov00_022D6C30: ; 0x022D6C30
	stmdb sp!, {r3, r4, r5, lr}
	bl EnableIrqFlag
	mov r4, r0
	bl ov00_022D570C
	cmp r0, #0
	mov r5, #0
	bne _022D6C5C
	mov r0, r4
	bl SetIrqFlag
	mov r0, r5
	ldmia sp!, {r3, r4, r5, pc}
_022D6C5C:
	add r0, r0, #0x2000
	ldr r1, [r0, #0x270]
	cmp r1, #0
	beq _022D6C78
	ldr r0, [r0, #0x274]
	cmp r0, #0xc
	ldrhi r5, [r1]
_022D6C78:
	mov r0, r4
	bl SetIrqFlag
	mov r0, r5
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D6C30

	arm_func_start ov00_022D6C88
ov00_022D6C88: ; 0x022D6C88
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	bl EnableIrqFlag
	mov r4, r0
	bl ov00_022D570C
	cmp r0, #0
	bne _022D6CB4
	mov r0, r4
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022D6CB4:
	add r1, r0, #0x2000
	cmp r5, #0
	ldrb r1, [r1, #0x26a]
	beq _022D6CDC
	cmp r1, #0
	movne r5, #1
	moveq r5, #0
	add r0, r0, #0x2000
	mov r1, #1
	b _022D6CF0
_022D6CDC:
	cmp r1, #0
	movne r5, #1
	moveq r5, #0
	add r0, r0, #0x2000
	mov r1, #0
_022D6CF0:
	strb r1, [r0, #0x26a]
	mov r0, r4
	bl SetIrqFlag
	mov r0, r5
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D6C88

	arm_func_start ov00_022D6D04
ov00_022D6D04: ; 0x022D6D04
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r0
	bl EnableIrqFlag
	mov r5, r0
	bl ov00_022D570C
	cmp r0, #0
	bne _022D6D30
	mov r0, r5
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022D6D30:
	mov r0, r4
	bl ov00_022D6F50
	movs r4, r0
	mov r0, r5
	bne _022D6D50
	bl SetIrqFlag
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022D6D50:
	bl SetIrqFlag
	add r0, r4, #0x10
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D6D04

	arm_func_start ov00_022D6D5C
ov00_022D6D5C: ; 0x022D6D5C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r5, r0
	mov r4, r1
	bl ov00_022D570C
	movs r6, r0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	add r0, r6, #0x2000
	ldrb r0, [r0, #0x26a]
	cmp r0, #0
	ldreqh r0, [r5, #0x3c]
	cmpeq r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	add r0, r5, #4
	bl ov00_022D6EE4
	movs r7, r0
	bne _022D6DA4
	bl ov00_022D6DE8
	mov r7, r0
_022D6DA4:
	cmp r7, #0
	addeq r0, r6, #0x2000
	ldreq r0, [r0, #0x278]
	cmpeq r0, #1
	bne _022D6DC0
	bl ov00_022D6EB4
	mov r7, r0
_022D6DC0:
	cmp r7, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r0, r5
	add r1, r7, #0x10
	mov r2, #0xc0
	strh r4, [r7, #2]
	bl ArrayCopy32Fast
	mov r0, r7
	bl ov00_022D6FA0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022D6D5C

	arm_func_start ov00_022D6DE8
ov00_022D6DE8: ; 0x022D6DE8
	stmdb sp!, {r4, lr}
	bl ov00_022D570C
	add r2, r0, #0x2000
	ldr r1, [r2, #0x270]
	mov r0, #0
	cmp r1, #0
	ldmeqia sp!, {r4, pc}
	ldr r3, [r2, #0x274]
	cmp r3, #0xc
	ldmlsia sp!, {r4, pc}
	ldr r2, _022D6EB0 ; =0x4EC4EC4F
	sub r3, r3, #0xc
	umull r2, ip, r3, r2
	movs ip, ip, lsr #6
	ldmeqia sp!, {r4, pc}
	ldr r2, [r1]
	cmp ip, r2
	ldmlsia sp!, {r4, pc}
	mov lr, r0
	cmp ip, #0
	bls _022D6E64
	add r4, r1, #0xc
	mov r2, #0xd0
_022D6E44:
	mul r0, lr, r2
	ldrb r3, [r4, r0]
	add r0, r4, r0
	cmp r3, #0
	beq _022D6E64
	add lr, lr, #1
	cmp lr, ip
	blo _022D6E44
_022D6E64:
	cmp lr, ip
	ldmhsia sp!, {r4, pc}
	mov r2, #1
	strb r2, [r0]
	ldr r3, [r1]
	mov r2, #0
	str r3, [r0, #4]
	str r2, [r0, #0xc]
	ldr r2, [r1, #8]
	str r2, [r0, #8]
	str r0, [r1, #8]
	ldr r2, [r0, #8]
	cmp r2, #0
	strne r0, [r2, #0xc]
	streq r0, [r1, #4]
	ldr r2, [r1]
	add r2, r2, #1
	str r2, [r1]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D6EB0: .word 0x4EC4EC4F
	arm_func_end ov00_022D6DE8

	arm_func_start ov00_022D6EB4
ov00_022D6EB4: ; 0x022D6EB4
	stmdb sp!, {r3, lr}
	bl ov00_022D570C
	add r0, r0, #0x2000
	ldr r1, [r0, #0x270]
	cmp r1, #0
	beq _022D6EDC
	ldr r0, [r0, #0x274]
	cmp r0, #0xc
	ldrhi r0, [r1, #4]
	ldmhiia sp!, {r3, pc}
_022D6EDC:
	mov r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022D6EB4

	arm_func_start ov00_022D6EE4
ov00_022D6EE4: ; 0x022D6EE4
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	bl ov00_022D570C
	add r0, r0, #0x2000
	mov r4, #0
	cmp r5, #0
	ldr r1, [r0, #0x270]
	moveq r0, r4
	ldmeqia sp!, {r3, r4, r5, pc}
	cmp r1, #0
	beq _022D6F48
	ldr r0, [r0, #0x274]
	cmp r0, #0xc
	bls _022D6F48
	ldr r4, [r1, #4]
	cmp r4, #0
	beq _022D6F48
_022D6F28:
	mov r1, r5
	add r0, r4, #0x14
	bl ov00_022D7468
	cmp r0, #0
	bne _022D6F48
	ldr r4, [r4, #0xc]
	cmp r4, #0
	bne _022D6F28
_022D6F48:
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D6EE4

	arm_func_start ov00_022D6F50
ov00_022D6F50: ; 0x022D6F50
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022D570C
	add r1, r0, #0x2000
	ldr r2, [r1, #0x270]
	mov r0, #0
	cmp r2, #0
	ldmeqia sp!, {r4, pc}
	ldr r1, [r1, #0x274]
	cmp r1, #0xc
	ldmlsia sp!, {r4, pc}
	ldr r0, [r2, #4]
	cmp r0, #0
	ldmeqia sp!, {r4, pc}
_022D6F88:
	ldr r1, [r0, #4]
	cmp r1, r4
	ldrne r0, [r0, #0xc]
	cmpne r0, #0
	bne _022D6F88
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D6F50

	arm_func_start ov00_022D6FA0
ov00_022D6FA0: ; 0x022D6FA0
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022D570C
	add r1, r0, #0x2000
	ldr r0, [r1, #0x270]
	cmp r4, #0
	cmpne r0, #0
	ldmeqia sp!, {r4, pc}
	ldr r1, [r1, #0x274]
	cmp r1, #0xc
	ldmlsia sp!, {r4, pc}
	ldr r3, [r0, #4]
	cmp r3, #0
	beq _022D7018
_022D6FD8:
	cmp r3, r4
	bne _022D700C
	ldr r2, [r3, #8]
	ldr r1, [r3, #0xc]
	cmp r2, #0
	strne r1, [r2, #0xc]
	streq r1, [r0, #4]
	ldr r2, [r3, #0xc]
	ldr r1, [r3, #8]
	cmp r2, #0
	strne r1, [r2, #8]
	streq r1, [r0, #8]
	b _022D7018
_022D700C:
	ldr r3, [r3, #0xc]
	cmp r3, #0
	bne _022D6FD8
_022D7018:
	mov r1, #0
	str r1, [r4, #0xc]
	ldr r1, [r0, #8]
	str r1, [r4, #8]
	str r4, [r0, #8]
	ldr r1, [r4, #8]
	cmp r1, #0
	strne r4, [r1, #0xc]
	streq r4, [r0, #4]
	cmp r3, #0
	ldmneia sp!, {r4, pc}
	ldr r1, [r0]
	str r1, [r4, #4]
	ldr r1, [r0]
	add r1, r1, #1
	str r1, [r0]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D6FA0

	arm_func_start ov00_022D705C
ov00_022D705C: ; 0x022D705C
	stmdb sp!, {r3, lr}
	ldr r1, _022D7094 ; =ov00_02326C50
	ldrb r0, [r1]
	cmp r0, #0
	ldmneia sp!, {r3, pc}
	mov r0, #1
	strb r0, [r1]
	mov r2, #0
	str r2, [r1, #0x24]
	str r2, [r1, #8]
	ldr r0, _022D7098 ; =ov00_02326C5C
	str r2, [r1, #4]
	bl OS_InitMutex
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D7094: .word ov00_02326C50
_022D7098: .word ov00_02326C5C
	arm_func_end ov00_022D705C

	arm_func_start ov00_022D709C
ov00_022D709C: ; 0x022D709C
	stmdb sp!, {r3, lr}
	ldr r1, _022D70CC ; =ov00_02326C50
	mov r2, r0
	ldr ip, [r1, #0x28]
	cmp ip, #0
	ldmeqia sp!, {r3, pc}
	ldrh r3, [r2, #6]
	add r0, r2, #0x1e
	add r1, r2, #0x18
	add r2, r2, #0x2c
	blx ip
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D70CC: .word ov00_02326C50
	arm_func_end ov00_022D709C

	arm_func_start ov00_022D70D0
ov00_022D70D0: ; 0x022D70D0
	stmdb sp!, {r4, lr}
	bl ov00_022D570C
	movs r4, r0
	ldmeqia sp!, {r4, pc}
	add r0, r4, #0x2000
	ldr r1, [r0, #0x260]
	cmp r1, #9
	ldmneia sp!, {r4, pc}
	ldrb r0, [r0, #0x26b]
	cmp r0, #1
	ldmeqia sp!, {r4, pc}
	ldr r0, _022D7138 ; =ov00_02326C5C
	bl ov00_022D73E0
	cmp r0, #0
	ldmeqia sp!, {r4, pc}
	add r1, r4, #0x144
	ldr r0, _022D713C ; =ov00_022D73CC
	add r1, r1, #0x2000
	add r2, r4, #0xf00
	mov r3, #0
	bl ov00_022C06D8
	cmp r0, #2
	ldmeqia sp!, {r4, pc}
	ldr r0, _022D7138 ; =ov00_02326C5C
	bl ov00_022D7430
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D7138: .word ov00_02326C5C
_022D713C: .word ov00_022D73CC
	arm_func_end ov00_022D70D0

	arm_func_start ov00_022D7140
ov00_022D7140: ; 0x022D7140
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, #0
	bl ov00_022D570C
	mov r4, r0
	bl EnableIrqFlag
	cmp r4, #0
	beq _022D7178
	add r1, r4, #0x2000
	ldr r2, [r1, #0x260]
	cmp r2, #9
	ldreqb r1, [r1, #0x26b]
	cmpeq r1, #0
	addeq r1, r4, #0x144
	addeq r5, r1, #0x2000
_022D7178:
	bl SetIrqFlag
	mov r0, r5
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D7140

	arm_func_start ov00_022D7184
ov00_022D7184: ; 0x022D7184
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, #0
	mov r5, r0
	mov r4, r7
	bl ov00_022D570C
	mov r6, r0
	bl EnableIrqFlag
	cmp r6, #0
	beq _022D71D0
	add r1, r6, #0x2000
	ldr r2, [r1, #0x260]
	cmp r2, #9
	ldreqb r1, [r1, #0x26b]
	cmpeq r1, #0
	bne _022D71D0
	add r1, r6, #0x2100
	ldrh r4, [r1, #0x4a]
	add r1, r6, #0x14c
	add r7, r1, #0x2000
_022D71D0:
	bl SetIrqFlag
	cmp r5, #0
	strneh r4, [r5]
	mov r0, r7
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022D7184

	arm_func_start ov00_022D71E4
ov00_022D71E4: ; 0x022D71E4
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl EnableIrqFlag
	ldr r1, _022D7200 ; =ov00_02326C50
	str r4, [r1, #0x28]
	bl SetIrqFlag
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D7200: .word ov00_02326C50
	arm_func_end ov00_022D71E4

	arm_func_start ov00_022D7204
ov00_022D7204: ; 0x022D7204
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r4, r0
	mov sb, r1
	mov r8, r2
	mov r6, r3
	bl EnableIrqFlag
	mov r5, r0
	bl ov00_022D570C
	cmp r0, #0
	bne _022D723C
	mov r0, r5
	bl SetIrqFlag
	mvn r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022D723C:
	ldr r0, _022D737C ; =ov00_02326C5C
	bl sub_0207A048
	bl ov00_022D570C
	movs r7, r0
	bne _022D7268
	ldr r0, _022D737C ; =ov00_02326C5C
	bl sub_0207A0CC
	mov r0, r5
	bl SetIrqFlag
	mvn r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022D7268:
	add r0, r7, #0x2000
	ldr r1, [r0, #0x260]
	cmp r1, #9
	bne _022D7284
	ldrb r0, [r0, #0x26b]
	cmp r0, #1
	bne _022D729C
_022D7284:
	ldr r0, _022D737C ; =ov00_02326C5C
	bl sub_0207A0CC
	mov r0, r5
	bl SetIrqFlag
	mvn r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022D729C:
	mov r0, sb
	mov r2, r8
	add r1, r7, #0xf00
	bl MemcpyFast
	ldr r2, [sp, #0x20]
	cmp r2, #0
	ble _022D72C8
	add r1, r7, #0xf00
	mov r0, r6
	add r1, r1, r8
	bl MemcpyFast
_022D72C8:
	ldr r1, [sp, #0x20]
	ldr r0, _022D7380 ; =ov00_022D738C
	add r6, r8, r1
	mov r3, r6, lsl #0x10
	mov r1, r4
	add r2, r7, #0xf00
	mov r3, r3, lsr #0x10
	bl ov00_022C06D8
	cmp r0, #8
	addls pc, pc, r0, lsl #2
	b _022D7318
_022D72F4: ; jump table
	b _022D7318 ; case 0
	b _022D7318 ; case 1
	b _022D7330 ; case 2
	b _022D7318 ; case 3
	b _022D7318 ; case 4
	b _022D7318 ; case 5
	b _022D7318 ; case 6
	b _022D7318 ; case 7
	b _022D7318 ; case 8
_022D7318:
	ldr r0, _022D737C ; =ov00_02326C5C
	bl sub_0207A0CC
	mov r0, r5
	bl SetIrqFlag
	mvn r0, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022D7330:
	ldr r0, _022D7384 ; =ov00_02326C54
	bl OS_SleepThread
	ldr r0, _022D7388 ; =ov00_02326C50
	ldr r0, [r0, #0x24]
	cmp r0, #0
	beq _022D7364
	cmp r0, #1
	ldr r0, _022D737C ; =ov00_02326C5C
	bl sub_0207A0CC
	mov r0, r5
	bl SetIrqFlag
	mvn r0, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022D7364:
	ldr r0, _022D737C ; =ov00_02326C5C
	bl sub_0207A0CC
	mov r0, r5
	bl SetIrqFlag
	mov r0, r6
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022D737C: .word ov00_02326C5C
_022D7380: .word ov00_022D738C
_022D7384: .word ov00_02326C54
_022D7388: .word ov00_02326C50
	arm_func_end ov00_022D7204

	arm_func_start ov00_022D738C
ov00_022D738C: ; 0x022D738C
	stmdb sp!, {r3, lr}
	ldrh r1, [r0]
	cmp r1, #0x12
	ldmneia sp!, {r3, pc}
	ldrh r2, [r0, #2]
	ldr r1, _022D73C4 ; =ov00_02326C50
	str r2, [r1, #0x24]
	ldrh r0, [r0, #2]
	cmp r0, #0
	bne _022D73B8
	bl ov00_022D5BB4
_022D73B8:
	ldr r0, _022D73C8 ; =ov00_02326C54
	bl sub_020798D8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D73C4: .word ov00_02326C50
_022D73C8: .word ov00_02326C54
	arm_func_end ov00_022D738C

	arm_func_start ov00_022D73CC
ov00_022D73CC: ; 0x022D73CC
	ldr ip, _022D73D8 ; =ov00_022D7430
	ldr r0, _022D73DC ; =ov00_02326C5C
	bx ip
	.align 2, 0
_022D73D8: .word ov00_022D7430
_022D73DC: .word ov00_02326C5C
	arm_func_end ov00_022D73CC

	arm_func_start ov00_022D73E0
ov00_022D73E0: ; 0x022D73E0
	ldr r2, [r0, #8]
	cmp r2, #0
	bne _022D7408
	ldr r1, _022D742C ; =HardwareInterrupt
	str r1, [r0, #8]
	ldr r1, [r0, #0xc]
	add r1, r1, #1
	str r1, [r0, #0xc]
	mov r0, #1
	bx lr
_022D7408:
	ldr r1, _022D742C ; =HardwareInterrupt
	cmp r2, r1
	movne r0, #0
	bxne lr
	ldr r1, [r0, #0xc]
	add r1, r1, #1
	str r1, [r0, #0xc]
	mov r0, #1
	bx lr
	.align 2, 0
_022D742C: .word HardwareInterrupt
	arm_func_end ov00_022D73E0

	arm_func_start ov00_022D7430
ov00_022D7430: ; 0x022D7430
	stmdb sp!, {r3, lr}
	ldr r2, [r0, #8]
	ldr r1, _022D7464 ; =HardwareInterrupt
	cmp r2, r1
	ldmneia sp!, {r3, pc}
	ldr r1, [r0, #0xc]
	subs r1, r1, #1
	str r1, [r0, #0xc]
	ldmneia sp!, {r3, pc}
	mov r1, #0
	str r1, [r0, #8]
	bl sub_020798D8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D7464: .word HardwareInterrupt
	arm_func_end ov00_022D7430

	arm_func_start ov00_022D7468
ov00_022D7468: ; 0x022D7468
	mov ip, #0
_022D746C:
	ldrb r3, [r0, ip]
	ldrb r2, [r1, ip]
	cmp r3, r2
	movne r0, #0
	bxne lr
	add ip, ip, #1
	cmp ip, #6
	blt _022D746C
	mov r0, #1
	bx lr
	arm_func_end ov00_022D7468

	arm_func_start ov00_022D7494
ov00_022D7494: ; 0x022D7494
	stmdb sp!, {r3, r4, r5, lr}
	bl EnableIrqFlag
	mov r4, r0
	bl ov00_022D570C
	cmp r0, #0
	mov r5, #0
	beq _022D74C8
	add r0, r0, #0x2000
	ldr r0, [r0, #0x260]
	cmp r0, #9
	bne _022D74C8
	bl ov00_022D7558
	mov r5, r0
_022D74C8:
	mov r0, r4
	bl SetIrqFlag
	mov r0, r5
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D7494

	arm_func_start ov00_022D74D8
ov00_022D74D8: ; 0x022D74D8
	stmdb sp!, {r3, lr}
	ldr r1, _022D7550 ; =ov00_02326C7C
	mov r0, #0
	ldrb r1, [r1]
	cmp r1, #0x10
	bls _022D751C
	ldr r3, _022D7554 ; =ov00_02326C80
	mov r2, r0
_022D74F8:
	ldrb r1, [r3], #1
	add r2, r2, #1
	cmp r2, #0x10
	add r0, r0, r1
	blt _022D74F8
	mov r1, r0, asr #3
	add r0, r0, r1, lsr #28
	mov r0, r0, asr #4
	b _022D7548
_022D751C:
	cmp r1, #0
	beq _022D7548
	mov ip, r0
	ble _022D7544
	ldr r3, _022D7554 ; =ov00_02326C80
_022D7530:
	ldrb r2, [r3], #1
	add ip, ip, #1
	cmp ip, r1
	add r0, r0, r2
	blt _022D7530
_022D7544:
	bl _s32_div_f
_022D7548:
	and r0, r0, #0xff
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D7550: .word ov00_02326C7C
_022D7554: .word ov00_02326C80
	arm_func_end ov00_022D74D8

	arm_func_start ov00_022D7558
ov00_022D7558: ; 0x022D7558
	stmdb sp!, {r3, lr}
	bl ov00_022D74D8
	mov r1, #0
	cmp r0, #0x1c
	movhs r1, #3
	bhs _022D7584
	cmp r0, #0x16
	movhs r1, #2
	bhs _022D7584
	cmp r0, #0x10
	movhs r1, #1
_022D7584:
	mov r0, r1
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022D7558

	arm_func_start ov00_022D758C
ov00_022D758C: ; 0x022D758C
	stmdb sp!, {r3, lr}
	ldr r2, _022D75E4 ; =ov00_02326C7C
	tst r0, #2
	ldrb ip, [r2]
	mov r0, r0, asr #2
	addeq r0, r0, #0x19
	mov r1, ip, lsr #0x1f
	and lr, r0, #0xff
	rsb r0, r1, ip, lsl #28
	ldr r3, _022D75E8 ; =ov00_02326C80
	add r0, r1, r0, ror #28
	strb lr, [r3, r0]
	add r0, ip, #1
	cmp ip, #0x10
	strlob r0, [r2]
	ldmloia sp!, {r3, pc}
	mov r1, r0, lsr #0x1f
	rsb r0, r1, r0, lsl #28
	add r0, r1, r0, ror #28
	add r0, r0, #0x10
	strb r0, [r2]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D75E4: .word ov00_02326C7C
_022D75E8: .word ov00_02326C80
	arm_func_end ov00_022D758C

	arm_func_start ov00_022D75EC
ov00_022D75EC: ; 0x022D75EC
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r2, [r4]
	mov r0, #1
	mov r1, #0x24
	blx r2
	mov r1, r0
	ldr r3, _022D778C ; =ov00_02326C90
	mov r0, #0
	mov r2, #0x24
	str r1, [r3, #0xc]
	bl ArrayFill32
	ldr r0, _022D778C ; =ov00_02326C90
	ldr r1, [r4]
	ldr r3, [r0, #0xc]
	mov r2, #1
	str r1, [r3]
	ldr r0, [r4, #4]
	ldr r1, _022D7790 ; =0x00000D18
	str r0, [r3, #4]
	strb r2, [r3, #9]
	strb r2, [r3, #0x16]
	mov r0, #0x10
	strb r2, [r3, #8]
	bl ov00_022D7ADC
	ldr r2, _022D778C ; =ov00_02326C90
	mov r1, #0x2300
	str r0, [r2, #0x10]
	mov r0, #2
	bl ov00_022D7ADC
	ldr r2, _022D778C ; =ov00_02326C90
	mov r1, #0x58
	str r0, [r2]
	mov r0, #4
	bl ov00_022D7ADC
	ldr r2, _022D778C ; =ov00_02326C90
	mov r1, #0xc
	str r0, [r2, #4]
	mov r0, #8
	bl ov00_022D7ADC
	ldr r1, _022D778C ; =ov00_02326C90
	ldr r2, _022D7790 ; =0x00000D18
	str r0, [r1, #8]
	ldr r1, [r1, #0x10]
	mov r0, #0
	bl ArrayFill32
	mov r0, #0
	ldr r1, _022D778C ; =ov00_02326C90
	mov r2, #0x2300
	ldr r1, [r1]
	bl ArrayFill32
	mov r0, #0
	ldr r1, _022D778C ; =ov00_02326C90
	mov r2, #0x58
	ldr r1, [r1, #4]
	bl ArrayFill32
	mov r0, #0
	ldr r1, _022D778C ; =ov00_02326C90
	mov r2, #0xc
	ldr r1, [r1, #8]
	bl ArrayFill32
	ldr r1, _022D778C ; =ov00_02326C90
	ldrb r2, [r4, #8]
	ldr r0, [r1, #0x10]
	strb r2, [r0, #0xd0a]
	ldrb r3, [r0, #0xd0b]
	ldrb r2, [r4, #9]
	bic r3, r3, #3
	and r2, r2, #3
	orr r2, r3, r2
	strb r2, [r0, #0xd0b]
	ldr r3, [r1, #8]
	ldr r2, [r4]
	mov r1, #0
	str r2, [r3]
	ldr r2, [r4, #4]
	str r2, [r3, #4]
	str r1, [r3, #8]
	ldrb r2, [r0, #0xd0c]
	ldrb r1, [r4, #0xa]
	bic r2, r2, #0xf
	and r1, r1, #0xf
	orr r2, r2, r1
	strb r2, [r0, #0xd0c]
	ldrb r1, [r4, #0xb]
	and r2, r2, #0xff
	bic r2, r2, #0x30
	mov r1, r1, lsl #0x1e
	orr r1, r2, r1, lsr #26
	strb r1, [r0, #0xd0c]
	bl ov00_022ED43C
	ldr r0, _022D778C ; =ov00_02326C90
	mov r1, #0x2300
	ldr r0, [r0]
	bl ov00_022D4A70
	cmp r0, #1
	beq _022D7778
	cmp r0, #4
	ble _022D7784
_022D7778:
	bl ov00_022D7B80
	mov r0, #0
	ldmia sp!, {r4, pc}
_022D7784:
	mov r0, #1
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D778C: .word ov00_02326C90
_022D7790: .word 0x00000D18
	arm_func_end ov00_022D75EC

	arm_func_start InitWfc
InitWfc: ; 0x022D7794
	stmdb sp!, {r3, r4, r5, lr}
	bl ov00_022D7D5C
	mov r5, r0
	cmp r5, #1
	bne _022D77B4
	bl ov00_022D9A80
	mov r5, r0
	b _022D7828
_022D77B4:
	cmp r5, #7
	bhs _022D77DC
	bl EnableIrqFlag
	mov r4, r0
	bl ov00_022D92B0
	mov r5, r0
	bl ov00_022D7CFC
	mov r0, r4
	bl SetIrqFlag
	b _022D7828
_022D77DC:
	cmp r5, #9
	bhs _022D77F0
	bl ov00_022D8548
	mov r5, r0
	b _022D7828
_022D77F0:
	cmp r5, #0xa
	bhs _022D7804
	bl ov00_022D91D4
	mov r5, r0
	b _022D7828
_022D7804:
	cmp r5, #0x10
	bhs _022D7818
	bl ov00_022D9B08
	mov r5, r0
	b _022D7828
_022D7818:
	cmp r5, #0x11
	bne _022D7828
	bl ov00_022D8BE0
	mov r5, r0
_022D7828:
	mov r0, r5
	bl ov00_022D7CFC
	cmp r5, #0x10
	bne _022D784C
	bl ov00_022D7EA0
	mov r4, r0
	bl ov00_022D7E68
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
_022D784C:
	cmp r5, #0x12
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	bl ov00_022D7E68
	mvn r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end InitWfc

	arm_func_start ov00_022D7864
ov00_022D7864: ; 0x022D7864
	stmdb sp!, {r3, lr}
	bl ov00_022D7D5C
	cmp r0, #1
	movls r0, #0
	ldmlsia sp!, {r3, pc}
	cmp r0, #7
	movlo r0, #1
	ldmloia sp!, {r3, pc}
	cmp r0, #9
	moveq r0, #4
	ldmeqia sp!, {r3, pc}
	cmp r0, #0xa
	movlo r0, #2
	ldmloia sp!, {r3, pc}
	cmp r0, #0xb
	moveq r0, #4
	ldmeqia sp!, {r3, pc}
	cmp r0, #0x10
	movlo r0, #3
	ldmloia sp!, {r3, pc}
	moveq r0, #5
	ldmeqia sp!, {r3, pc}
	cmp r0, #0x11
	moveq r0, #4
	ldmeqia sp!, {r3, pc}
	bl ov00_022D8C04
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022D7864

	arm_func_start ov00_022D78D0
ov00_022D78D0: ; 0x022D78D0
	stmdb sp!, {r4, lr}
	mov r4, #0xff
	bl ov00_022D7D5C
	cmp r0, #0xa
	blo _022D78F4
	cmp r0, #0x10
	ldrls r0, _022D78FC ; =ov00_02326C90
	ldrls r0, [r0, #0xc]
	ldrlsb r4, [r0, #0x17]
_022D78F4:
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D78FC: .word ov00_02326C90
	arm_func_end ov00_022D78D0

	arm_func_start ov00_022D7900
ov00_022D7900: ; 0x022D7900
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, #0
	bl ov00_022D7D5C
	cmp r0, #0xa
	blo _022D794C
	cmp r0, #0x10
	bhi _022D794C
	ldr r0, _022D7954 ; =ov00_02326C90
	ldr r2, [r0, #0xc]
	ldrb r0, [r2, #0x17]
	cmp r0, #4
	cmpne r0, #8
	bne _022D794C
	mov r1, r5
	add r0, r2, #0x18
	mov r2, #0xa
	bl MemcpyFast
	mov r4, #1
_022D794C:
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022D7954: .word ov00_02326C90
	arm_func_end ov00_022D7900

	arm_func_start ov00_022D7958
ov00_022D7958: ; 0x022D7958
	stmdb sp!, {r3, lr}
	bl ov00_022D7D5C
	strb r0, [sp]
	ands r0, r0, #0xff
	cmpne r0, #0x12
	bne _022D797C
	bl ov00_022D7B80
	mov r0, #1
	ldmia sp!, {r3, pc}
_022D797C:
	add r0, sp, #0
	bl ov00_022D8A80
	ldrb r0, [sp]
	bl ov00_022D7CFC
	mov r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022D7958

	arm_func_start ov00_022D7994
ov00_022D7994: ; 0x022D7994
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r8, r0
	mov r5, r3
	mov r0, #1
	mov r7, r1
	mov r6, r2
	bl ov00_022D7CA4
	mov r4, r0
	cmp r5, #0
	mov r2, #0xa
	beq _022D79D0
	mov r0, r5
	add r1, r4, #0x18
	bl MemcpyFast
	b _022D79DC
_022D79D0:
	add r0, r4, #0x18
	mov r1, #0
	bl MemsetFast
_022D79DC:
	ldr r3, [sp, #0x18]
	mov r0, r8
	mov r1, r7
	mov r2, r6
	strb r3, [r4, #0x22]
	bl ov00_022D79F8
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022D7994

	arm_func_start ov00_022D79F8
ov00_022D79F8: ; 0x022D79F8
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r0, #0x10
	mov r6, r1
	mov r5, r2
	bl ov00_022D7CA4
	mov r4, r0
	ldrb r3, [r4, #0xd0c]
	mov r1, #0
	mov r2, #0xf0
	bic r3, r3, #0xf
	orr r3, r3, #1
	strb r3, [r4, #0xd0c]
	bl MemsetFast
	mov r2, #0
_022D7A34:
	ldrb r1, [r7, r2]
	cmp r1, #0
	beq _022D7A54
	add r0, r4, r2
	add r2, r2, #1
	strb r1, [r0, #0x40]
	cmp r2, #0x20
	blt _022D7A34
_022D7A54:
	cmp r6, #0
	cmpne r5, #0
	bne _022D7A70
	ldrb r0, [r4, #0xe6]
	bic r0, r0, #3
	strb r0, [r4, #0xe6]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D7A70:
	cmp r5, #1
	moveq r2, #5
	beq _022D7A88
	cmp r5, #2
	moveq r2, #0xd
	movne r2, #0x10
_022D7A88:
	mov r0, r6
	add r1, r4, #0x80
	bl MemcpyFast
	ldrb r1, [r4, #0xe6]
	and r0, r5, #0xff
	and r0, r0, #3
	bic r1, r1, #3
	orr r0, r1, r0
	strb r0, [r4, #0xe6]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022D79F8

	arm_func_start ov00_022D7AB0
ov00_022D7AB0: ; 0x022D7AB0
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r0, #0x10
	mov r4, r1
	bl ov00_022D7CA4
	mov r1, r0
	mov r0, r4
	add r1, r1, r5, lsl #8
	mov r2, #0xf0
	bl ArrayCopy32
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D7AB0

	arm_func_start ov00_022D7ADC
ov00_022D7ADC: ; 0x022D7ADC
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r0, #1
	mov r4, r1
	bl ov00_022D7CA4
	ldrb r1, [r0, #8]
	tst r1, r5
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	orr r1, r1, r5
	strb r1, [r0, #8]
	ldr r2, [r0]
	mov r0, r5
	mov r1, r4
	blx r2
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D7ADC

	arm_func_start ov00_022D7B1C
ov00_022D7B1C: ; 0x022D7B1C
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r0, #1
	mov r5, r1
	mov r4, r2
	bl ov00_022D7CA4
	cmp r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	ldrb r2, [r0, #8]
	tst r2, r6
	ldmeqia sp!, {r4, r5, r6, pc}
	mvn r1, r6
	and r1, r2, r1
	strb r1, [r0, #8]
	ldr r3, [r0, #4]
	mov r0, r6
	mov r1, r5
	mov r2, r4
	blx r3
	cmp r6, #1
	ldreq r0, _022D7B7C ; =ov00_02326C90
	moveq r1, #0
	streq r1, [r0, #0xc]
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022D7B7C: .word ov00_02326C90
	arm_func_end ov00_022D7B1C

	arm_func_start ov00_022D7B80
ov00_022D7B80: ; 0x022D7B80
	stmdb sp!, {r4, lr}
	mov r0, #1
	bl ov00_022D7CA4
	movs r4, r0
	ldmeqia sp!, {r4, pc}
	ldrb r0, [r4, #8]
	tst r0, #0x10
	beq _022D7BC8
	mov r0, #0x10
	bl ov00_022D7CA4
	ldrb r3, [r4, #8]
	mov r1, r0
	ldr r2, _022D7C9C ; =0x00000D18
	bic r0, r3, #0x10
	strb r0, [r4, #8]
	ldr r3, [r4, #4]
	mov r0, #0x10
	blx r3
_022D7BC8:
	ldrb r0, [r4, #8]
	tst r0, #8
	beq _022D7BFC
	mov r0, #8
	bl ov00_022D7CA4
	ldrb r2, [r4, #8]
	mov r1, r0
	mov r0, #8
	bic r2, r2, #8
	strb r2, [r4, #8]
	ldr r3, [r4, #4]
	mov r2, #0xc
	blx r3
_022D7BFC:
	ldrb r0, [r4, #8]
	tst r0, #4
	beq _022D7C30
	mov r0, #4
	bl ov00_022D7CA4
	ldrb r2, [r4, #8]
	mov r1, r0
	mov r0, #4
	bic r2, r2, #4
	strb r2, [r4, #8]
	ldr r3, [r4, #4]
	mov r2, #0x58
	blx r3
_022D7C30:
	ldrb r0, [r4, #8]
	tst r0, #2
	beq _022D7C64
	mov r0, #2
	bl ov00_022D7CA4
	ldrb r2, [r4, #8]
	mov r1, r0
	mov r0, #2
	bic r2, r2, #2
	strb r2, [r4, #8]
	ldr r3, [r4, #4]
	mov r2, #0x2300
	blx r3
_022D7C64:
	ldrb r0, [r4, #8]
	tst r0, #1
	ldmeqia sp!, {r4, pc}
	bic r0, r0, #1
	strb r0, [r4, #8]
	ldr r3, [r4, #4]
	mov r1, r4
	mov r0, #1
	mov r2, #0x24
	blx r3
	ldr r0, _022D7CA0 ; =ov00_02326C90
	mov r1, #0
	str r1, [r0, #0xc]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D7C9C: .word 0x00000D18
_022D7CA0: .word ov00_02326C90
	arm_func_end ov00_022D7B80

	arm_func_start ov00_022D7CA4
ov00_022D7CA4: ; 0x022D7CA4
	tst r0, #1
	ldrne r0, _022D7CF8 ; =ov00_02326C90
	ldrne r0, [r0, #0xc]
	bxne lr
	tst r0, #2
	ldrne r0, _022D7CF8 ; =ov00_02326C90
	ldrne r0, [r0]
	bxne lr
	tst r0, #4
	ldrne r0, _022D7CF8 ; =ov00_02326C90
	ldrne r0, [r0, #4]
	bxne lr
	tst r0, #8
	ldrne r0, _022D7CF8 ; =ov00_02326C90
	ldrne r0, [r0, #8]
	bxne lr
	tst r0, #0x10
	ldrne r0, _022D7CF8 ; =ov00_02326C90
	ldrne r0, [r0, #0x10]
	moveq r0, #0
	bx lr
	.align 2, 0
_022D7CF8: .word ov00_02326C90
	arm_func_end ov00_022D7CA4

	arm_func_start ov00_022D7CFC
ov00_022D7CFC: ; 0x022D7CFC
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r0, #1
	bl ov00_022D7CA4
	mov r5, r0
	mov r0, #0x10
	bl ov00_022D7CA4
	mov r4, r0
	strb r6, [r5, #9]
	cmp r6, #0x10
	ldmhsia sp!, {r4, r5, r6, pc}
	ldrb r0, [r5, #0x16]
	cmp r6, r0
	strhib r6, [r5, #0x16]
	cmphi r6, #7
	ldmlsia sp!, {r4, r5, r6, pc}
	ldrb r0, [r4, #0xd0d]
	bl ov00_022D7E58
	strb r0, [r5, #0x15]
	ldrb r0, [r4, #0xd13]
	add r0, r4, r0, lsl #2
	ldrb r0, [r0, #0x444]
	strb r0, [r5, #0x14]
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022D7CFC

	arm_func_start ov00_022D7D5C
ov00_022D7D5C: ; 0x022D7D5C
	ldr r0, _022D7D74 ; =ov00_02326C90
	ldr r0, [r0, #0xc]
	cmp r0, #0
	ldrneb r0, [r0, #9]
	moveq r0, #0
	bx lr
	.align 2, 0
_022D7D74: .word ov00_02326C90
	arm_func_end ov00_022D7D5C

	arm_func_start ov00_022D7D78
ov00_022D7D78: ; 0x022D7D78
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r0, #1
	bl ov00_022D7CA4
	mov r4, r0
	str r5, [r4, #0xc]
	bl ov00_022D7D5C
	strb r0, [r4, #0xa]
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D7D78

	arm_func_start ov00_022D7D9C
ov00_022D7D9C: ; 0x022D7D9C
	ldr r0, _022D7DAC ; =ov00_02326C90
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0xc]
	bx lr
	.align 2, 0
_022D7DAC: .word ov00_02326C90
	arm_func_end ov00_022D7D9C

	arm_func_start ov00_022D7DB0
ov00_022D7DB0: ; 0x022D7DB0
	stmdb sp!, {r4, lr}
	ldr r1, _022D7E54 ; =ov00_02326C90
	ldr r1, [r1, #0xc]
	ldrb r2, [r1, #0x22]
	cmp r2, #0
	bne _022D7DD0
	bl ov00_022D7E58
	mov r2, r0
_022D7DD0:
	ldr r1, _022D7E54 ; =ov00_02326C90
	mov r0, #0
	ldr r1, [r1, #0xc]
	strb r2, [r1, #0x17]
	bl ov00_022D7184
	movs r4, r0
	beq _022D7E08
	mov r1, #0x20
	bl DC_InvalidateRange
	ldr r1, _022D7E54 ; =ov00_02326C90
	mov r0, r4
	ldr r1, [r1, #0xc]
	add r1, r1, #0x18
	bl ov00_022DA024
_022D7E08:
	ldr r0, _022D7E54 ; =ov00_02326C90
	mov r1, #0
	ldr r3, [r0, #0xc]
	mov r2, r3
_022D7E18:
	ldrsb r0, [r2, #0x18]
	cmp r0, #0x20
	blt _022D7E2C
	cmp r0, #0x7e
	ble _022D7E40
_022D7E2C:
	add r0, r3, #0x18
	mov r1, #0
	mov r2, #0xa
	bl MemsetFast
	ldmia sp!, {r4, pc}
_022D7E40:
	add r1, r1, #1
	cmp r1, #0xa
	add r2, r2, #1
	blt _022D7E18
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D7E54: .word ov00_02326C90
	arm_func_end ov00_022D7DB0

	arm_func_start ov00_022D7E58
ov00_022D7E58: ; 0x022D7E58
	cmp r0, #2
	subhi r0, r0, #3
	andhi r0, r0, #0xff
	bx lr
	arm_func_end ov00_022D7E58

	arm_func_start ov00_022D7E68
ov00_022D7E68: ; 0x022D7E68
	stmdb sp!, {r3, lr}
	ldr r1, _022D7E98 ; =ov00_02326C90
	mov r0, #8
	ldr r1, [r1, #8]
	mov r2, #0xc
	bl ov00_022D7B1C
	ldr r0, _022D7E98 ; =ov00_02326C90
	ldr r2, _022D7E9C ; =0x00000D18
	ldr r1, [r0, #0x10]
	mov r0, #0x10
	bl ov00_022D7B1C
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D7E98: .word ov00_02326C90
_022D7E9C: .word 0x00000D18
	arm_func_end ov00_022D7E68

	arm_func_start ov00_022D7EA0
ov00_022D7EA0: ; 0x022D7EA0
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	ldr r0, _022D7F3C ; =ov00_02326C90
	mov r1, #0xc0
	ldr r8, [r0, #0x10]
	ldrb r7, [r8, #0xd13]
	ldrb r2, [r8, #0xd0d]
	add r0, r8, #0x74
	smulbb r4, r7, r1
	add r5, r0, #0x400
	cmp r2, #6
	movhs r0, #1
	ldmhsia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	ldrb sb, [r8, #0xd12]
	mov r6, #0
	cmp sb, #0
	bls _022D7F34
	mov sl, r1
_022D7EE4:
	cmp r6, r7
	beq _022D7F24
	add r0, r8, r6, lsl #2
	ldrb r0, [r0, #0x445]
	cmp r0, #6
	bhs _022D7F24
	mul r1, r6, sl
	add r0, r8, r1
	add r0, r0, #0x400
	ldrh r2, [r0, #0x7a]
	add r0, r5, r4
	add r1, r5, r1
	bl strncmp
	cmp r0, #0
	moveq r0, #2
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022D7F24:
	add r0, r6, #1
	and r6, r0, #0xff
	cmp r6, sb
	blo _022D7EE4
_022D7F34:
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022D7F3C: .word ov00_02326C90
	arm_func_end ov00_022D7EA0

	arm_func_start ov00_022D7F40
ov00_022D7F40: ; 0x022D7F40
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r0, #0x10
	mvn r4, #0
	bl ov00_022D7CA4
	mov r6, r0
	mov r0, #1
	bl ov00_022D7CA4
	mov r1, #1
	strb r1, [r0, #0xb]
	bl ov00_022D7D5C
	cmp r0, #3
	beq _022D7F88
	cmp r0, #4
	beq _022D7FF0
	cmp r0, #5
	beq _022D803C
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D7F88:
	ldrh r1, [r7, #0xa]
	ldrb r5, [r6, #0xd11]
	cmp r1, #0
	ldrneb r0, [r7, #0xc]
	cmpne r0, #0
	bne _022D7FAC
	ldrh r0, [r7, #0x36]
	bl ov00_022D9374
	b _022D8084
_022D7FAC:
	cmp r1, #1
	cmpeq r0, #0x20
	bne _022D7FD8
	ldrh r0, [r7, #0x36]
	bl ov00_022D9374
	ldrb r1, [r6, #0xd10]
	mov r0, r7
	add r2, r6, #0x300
	bl ov00_022D8140
	mov r4, r0
	b _022D8084
_022D7FD8:
	ldrb r1, [r6, #0xd10]
	mov r0, r7
	add r2, r6, #0x300
	bl ov00_022D8140
	mov r4, r0
	b _022D8084
_022D7FF0:
	ldrb r2, [r6, #0xd0f]
	mov r1, #0xc0
	mov r0, r7
	mla r1, r2, r1, r6
	add r1, r1, #0x400
	ldrh r2, [r1, #0xa6]
	mov r1, r6
	sub r2, r2, #1
	and r5, r2, #0xff
	bl ov00_022D81BC
	movs r4, r0
	bmi _022D8084
	ldrb r1, [r6, #0xd0f]
	add r0, r6, #0x47
	add r2, r0, #0x400
	ldrb r0, [r2, r1, lsl #2]
	orr r0, r0, #0x80
	strb r0, [r2, r1, lsl #2]
	b _022D8084
_022D803C:
	ldrb r1, [r6, #0xd0f]
	add r2, r6, #0x300
	mov r0, #0x24
	mla r2, r1, r0, r2
	mov r0, r7
	mov r1, #1
	ldrb r5, [r6, #0xd11]
	bl ov00_022D8140
	movs r4, r0
	bmi _022D8084
	ldrb r1, [r6, #0xd0f]
	mov r0, #0x24
	add r2, r6, #0x300
	smulbb r1, r1, r0
	ldrb r0, [r2, r1]
	bic r0, r0, #0xf
	orr r0, r0, #1
	strb r0, [r2, r1]
_022D8084:
	cmp r4, #0
	ldmltia sp!, {r3, r4, r5, r6, r7, pc}
	mov r0, r4
	mov r1, r7
	mov r2, r5
	mov r3, r6
	bl ov00_022D824C
	mov r1, r6
	bl ov00_022D83CC
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022D7F40

	arm_func_start ov00_022D80AC
ov00_022D80AC: ; 0x022D80AC
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r0, #0x10
	bl ov00_022D7CA4
	mov r4, r0
	ldrb r0, [r4, #0xd0c]
	mov r0, r0, lsl #0x1c
	movs r0, r0, lsr #0x1c
	cmpne r0, #4
	bne _022D80FC
	ldrh r0, [r5, #0x2c]
	mov r0, r0, asr #4
	and r0, r0, #1
	cmp r0, #1
	bne _022D80FC
	add r0, r5, #0xc
	bl ov00_022DA070
	cmp r0, #1
	moveq r0, #6
	ldmeqia sp!, {r3, r4, r5, pc}
_022D80FC:
	ldrb r0, [r4, #0xd0c]
	mov r0, r0, lsl #0x1c
	movs r0, r0, lsr #0x1c
	cmpne r0, #5
	bne _022D8138
	ldrh r0, [r5, #0x2c]
	mov r0, r0, asr #4
	and r0, r0, #1
	cmp r0, #1
	bne _022D8138
	add r0, r5, #0xc
	bl ov00_022D9FC4
	cmp r0, #1
	moveq r0, #7
	ldmeqia sp!, {r3, r4, r5, pc}
_022D8138:
	mvn r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D80AC

	arm_func_start ov00_022D8140
ov00_022D8140: ; 0x022D8140
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r6, r0
	ldrh r3, [r6, #0xa]
	mov r5, r1
	mov r4, r2
	cmp r3, #0x20
	bne _022D8168
	bl ov00_022D80AC
	cmp r0, #0
	ldmgtia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022D8168:
	cmp r5, #0
	mov r8, #0
	ble _022D81B4
	ldrh sb, [r6, #0xa]
	and r7, sb, #0xff
_022D817C:
	ldrb r0, [r4, #3]
	cmp r7, r0
	bne _022D81A4
	mov r2, sb
	add r0, r6, #0xc
	add r1, r4, #4
	bl strncmp
	cmp r0, #0
	ldreqb r0, [r4, #1]
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022D81A4:
	add r8, r8, #1
	cmp r8, r5
	add r4, r4, #0x24
	blt _022D817C
_022D81B4:
	mvn r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022D8140

	arm_func_start ov00_022D81BC
ov00_022D81BC: ; 0x022D81BC
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	mov sl, r0
	ldrh r2, [sl, #0xa]
	mov sb, r1
	cmp r2, #0x20
	bne _022D81E0
	bl ov00_022D80AC
	cmp r0, #0
	ldmgtia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022D81E0:
	ldrb r8, [sb, #0xd12]
	mov r4, #0
	cmp r8, #0
	ble _022D8244
	ldrh r7, [sl, #0xa]
	add r0, sb, #0x7c
	mov r5, sb
	add r6, r0, #0x400
_022D8200:
	add r0, r5, #0x400
	ldrh r0, [r0, #0x7a]
	cmp r7, r0
	bne _022D8230
	mov r1, r6
	mov r2, r7
	add r0, sl, #0xc
	bl strncmp
	cmp r0, #0
	addeq r0, sb, r4, lsl #2
	ldreqb r0, [r0, #0x445]
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022D8230:
	add r4, r4, #1
	cmp r4, r8
	add r5, r5, #0xc0
	add r6, r6, #0xc0
	blt _022D8200
_022D8244:
	mvn r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	arm_func_end ov00_022D81BC

	arm_func_start ov00_022D824C
ov00_022D824C: ; 0x022D824C
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r6, r3
	ldrb r5, [r6, #0xd12]
	mvn r4, #0
	mov r3, #0
	cmp r5, #0
	ble _022D82D0
	ldrb lr, [r1, #4]
	add ip, r6, #0x74
	add ip, ip, #0x400
_022D8274:
	ldrb r7, [ip]
	cmp lr, r7
	ldreqb r8, [r1, #5]
	ldreqb r7, [ip, #1]
	cmpeq r8, r7
	ldreqb r8, [r1, #6]
	ldreqb r7, [ip, #2]
	cmpeq r8, r7
	ldreqb r8, [r1, #7]
	ldreqb r7, [ip, #3]
	cmpeq r8, r7
	ldreqb r8, [r1, #8]
	ldreqb r7, [ip, #4]
	cmpeq r8, r7
	ldreqb r8, [r1, #9]
	ldreqb r7, [ip, #5]
	cmpeq r8, r7
	moveq r4, r3
	beq _022D82D0
	add r3, r3, #1
	cmp r3, r5
	add ip, ip, #0xc0
	blt _022D8274
_022D82D0:
	mvn r3, #0
	cmp r4, r3
	bne _022D8300
	mov r3, r6
	and r0, r0, #0xff
	bl ov00_022D8314
	ldrb r0, [r6, #0xd12]
	mov r4, #0xa
	cmp r0, #0xa
	addlo r0, r0, #1
	strlob r0, [r6, #0xd12]
	b _022D830C
_022D8300:
	mov r0, r4
	mov r3, r6
	bl ov00_022D8360
_022D830C:
	mov r0, r4
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022D824C

	arm_func_start ov00_022D8314
ov00_022D8314: ; 0x022D8314
	stmdb sp!, {r3, lr}
	add ip, r3, #0x6c
	strb r0, [ip, #0x401]
	ldrh r0, [r1, #2]
	and r2, r2, #0x7f
	tst r0, #2
	mov r0, r0, asr #2
	addeq r0, r0, #0x19
	and r0, r0, #0xff
	strb r0, [ip, #0x402]
	ldrb lr, [ip, #0x403]
	mov r0, r1
	bic r1, lr, #0x7f
	orr lr, r1, r2
	add r1, r3, #0xbf0
	mov r2, #0xc0
	strb lr, [ip, #0x403]
	bl ArrayCopy32
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022D8314

	arm_func_start ov00_022D8360
ov00_022D8360: ; 0x022D8360
	stmdb sp!, {r3, r4, r5, lr}
	ldrh r4, [r1, #2]
	add ip, r3, #0x44
	mov lr, #0xc0
	add r5, ip, #0x400
	mul ip, r0, lr
	tst r4, #2
	add r0, r5, r0, lsl #2
	mov r4, r4, asr #2
	addeq r4, r4, #0x19
	and r4, r4, #0xff
	ldrb lr, [r0, #2]
	and r4, r4, #0xff
	add r3, r3, #0x470
	cmp r4, lr
	bls _022D83B8
	strb r4, [r0, #2]
	ldrb lr, [r0, #3]
	and r2, r2, #0x7f
	bic lr, lr, #0x7f
	orr r2, lr, r2
	strb r2, [r0, #3]
_022D83B8:
	mov r0, r1
	add r1, r3, ip
	mov r2, #0xc0
	bl ArrayCopy32
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D8360

	arm_func_start ov00_022D83CC
ov00_022D83CC: ; 0x022D83CC
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0xc4
	mov r4, r0
	add r0, r1, #0x44
	add r7, r0, #0x400
	add r8, r1, #0x470
	subs r6, r4, #1
	bmi _022D8494
	mov r0, #0xc0
	mla sl, r6, r0, r8
	add sb, r7, r6, lsl #2
	add fp, sp, #0
_022D83FC:
	add r0, r7, r4, lsl #2
	ldrb r1, [r0, #2]
	add r0, r7, r6, lsl #2
	ldrb r0, [r0, #2]
	cmp r1, r0
	blo _022D8494
	mov r0, sb
	mov r1, fp
	mov r2, #4
	bl ArrayCopy32
	add r5, r7, r4, lsl #2
	mov r0, r5
	mov r1, sb
	mov r2, #4
	bl ArrayCopy32
	mov r1, r5
	mov r0, fp
	mov r2, #4
	bl ArrayCopy32
	mov r0, sl
	add r1, sp, #4
	mov r2, #0xc0
	bl ArrayCopy32
	mov r0, #0xc0
	mul r5, r4, r0
	add r0, r8, r5
	mov r1, sl
	mov r2, #0xc0
	bl ArrayCopy32
	add r1, r8, r5
	add r0, sp, #4
	mov r2, #0xc0
	bl ArrayCopy32
	mov r4, r6
	sub sb, sb, #4
	sub sl, sl, #0xc0
	subs r6, r6, #1
	bpl _022D83FC
_022D8494:
	add r1, r7, #0x28
	mov r0, #0
	mov r2, #4
	bl ArrayFill32
	add r1, r8, #0x780
	mov r0, #0
	mov r2, #0xc0
	bl ArrayFill32
	add sp, sp, #0xc4
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022D83CC

	arm_func_start ov00_022D84BC
ov00_022D84BC: ; 0x022D84BC
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #0x10
	bl ov00_022D7CA4
	ldrsh r1, [r4]
	cmp r1, #5
	bne _022D8534
	ldrsh r1, [r4, #2]
	cmp r1, #0
	ldmeqia sp!, {r4, pc}
	ldr r1, [r4, #8]
	cmp r1, #0xd
	beq _022D8504
	cmp r1, #0xf
	beq _022D8510
	cmp r1, #0x11
	beq _022D851C
	b _022D8528
_022D8504:
	mov r1, #1
	strb r1, [r0, #0xd14]
	ldmia sp!, {r4, pc}
_022D8510:
	mov r1, #2
	strb r1, [r0, #0xd14]
	ldmia sp!, {r4, pc}
_022D851C:
	mov r1, #3
	strb r1, [r0, #0xd14]
	ldmia sp!, {r4, pc}
_022D8528:
	mov r1, #4
	strb r1, [r0, #0xd14]
	ldmia sp!, {r4, pc}
_022D8534:
	cmp r1, #7
	ldmneia sp!, {r4, pc}
	ldr r0, [r4, #4]
	bl ov00_022D7F40
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D84BC

	arm_func_start ov00_022D8548
ov00_022D8548: ; 0x022D8548
	stmdb sp!, {r4, lr}
	bl ov00_022D7D5C
	mov r4, r0
	mov r0, #0x10
	bl ov00_022D7CA4
	cmp r4, #7
	beq _022D8570
	cmp r4, #8
	beq _022D857C
	b _022D8584
_022D8570:
	bl ov00_022D858C
	mov r4, r0
	b _022D8584
_022D857C:
	bl ov00_022D8684
	mov r4, r0
_022D8584:
	mov r0, r4
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D8548

	arm_func_start ov00_022D858C
ov00_022D858C: ; 0x022D858C
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	ldrb r2, [r5, #0xd13]
	add r3, r5, #0x470
	mov r1, #0xc0
	mla r4, r2, r1, r3
	bl ov00_022D87C0
	add r1, r5, #0xb8
	strb r0, [r5, #0xd0d]
	add r0, r1, #0xc00
	mov r1, #0
	mov r2, #0x52
	bl MemsetFast
	add r2, r5, #0xb8
	ldrb r1, [r5, #0xd0d]
	mov r0, r5
	add r2, r2, #0xc00
	bl ov00_022D8994
	cmp r0, #0
	ldrb r0, [r5, #0xd0b]
	bic r0, r0, #0xc
	beq _022D8640
	orr r0, r0, #4
	strb r0, [r5, #0xd0b]
	ldrh r0, [r4, #0x2c]
	mov r0, r0, asr #4
	tst r0, #1
	bne _022D8614
	ldrb r1, [r5, #0xd13]
	mov r2, #3
	mov r0, #9
	add r1, r5, r1, lsl #2
	strb r2, [r1, #0x444]
	ldmia sp!, {r3, r4, r5, pc}
_022D8614:
	ldrb r0, [r5, #0xd0d]
	cmp r0, #6
	ldreqb r0, [r4, #0x15]
	cmpeq r0, #0
	bne _022D8670
	ldrb r1, [r5, #0xd13]
	mov r2, #3
	mov r0, #9
	add r1, r5, r1, lsl #2
	strb r2, [r1, #0x444]
	ldmia sp!, {r3, r4, r5, pc}
_022D8640:
	strb r0, [r5, #0xd0b]
	ldrh r0, [r4, #0x2c]
	mov r0, r0, asr #4
	and r0, r0, #1
	cmp r0, #1
	bne _022D8670
	ldrb r1, [r5, #0xd13]
	mov r2, #3
	mov r0, #9
	add r1, r5, r1, lsl #2
	strb r2, [r1, #0x444]
	ldmia sp!, {r3, r4, r5, pc}
_022D8670:
	mov r0, #0
	strb r0, [r5, #0xd15]
	strb r0, [r5, #0xd14]
	mov r0, #8
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D858C

	arm_func_start ov00_022D8684
ov00_022D8684: ; 0x022D8684
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	bl ov00_022D5640
	ldrb r2, [r7, #0xd13]
	mov r1, #0xc0
	cmp r0, #3
	add r5, r7, #0x470
	smulbb r4, r2, r1
	bne _022D8794
	mov r0, r7
	bl ov00_022D895C
	ldrb r1, [r7, #0xd15]
	mov r6, r0
	add r0, r1, #1
	and r1, r0, #0xff
	strb r0, [r7, #0xd15]
	cmp r1, #3
	bls _022D86EC
	mov r0, #0
	strb r0, [r7, #0xd15]
	ldrb r1, [r7, #0xd13]
	mov r2, #1
	mov r0, #9
	add r1, r7, r1, lsl #2
	strb r2, [r1, #0x444]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D86EC:
	cmp r1, #1
	beq _022D8770
	ldrb r0, [r7, #0xd14]
	cmp r0, #1
	bne _022D8710
	ldrb r0, [r7, #0xd0b]
	bic r0, r0, #0xc
	strb r0, [r7, #0xd0b]
	b _022D8770
_022D8710:
	cmp r0, #2
	bne _022D8738
	mov r0, #0
	strb r0, [r7, #0xd15]
	ldrb r1, [r7, #0xd13]
	mov r2, #3
	mov r0, #9
	add r1, r7, r1, lsl #2
	strb r2, [r1, #0x444]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D8738:
	cmp r0, #3
	bne _022D8760
	mov r0, #0
	strb r0, [r7, #0xd15]
	ldrb r1, [r7, #0xd13]
	mov r2, #4
	mov r0, #9
	add r1, r7, r1, lsl #2
	strb r2, [r1, #0x444]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D8760:
	cmp r1, #3
	ldreqb r0, [r7, #0xd0b]
	biceq r0, r0, #0xc
	streqb r0, [r7, #0xd0b]
_022D8770:
	mov r0, r7
	bl ov00_022D8978
	mov r2, r0
	add r1, r7, #0xb8
	add r0, r5, r4
	add r1, r1, #0xc00
	orr r2, r6, r2
	bl ov00_022D5110
	b _022D87B8
_022D8794:
	cmp r0, #9
	bne _022D87B8
	mov r0, #0
	strb r0, [r7, #0xd15]
	bl sub_0207AE44
	str r0, [r7, #0xcb0]
	str r1, [r7, #0xcb4]
	mov r0, #0xa
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022D87B8:
	mov r0, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022D8684

	arm_func_start ov00_022D87C0
ov00_022D87C0: ; 0x022D87C0
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov sl, r0
	ldrb r2, [sl, #0xd13]
	ldrb r1, [sl, #0xd0c]
	add r3, sl, #0x470
	mov r0, #0xc0
	mla r4, r2, r0, r3
	mov r0, r1, lsl #0x18
	movs r0, r0, lsr #0x1e
	mov r0, #0
	str r0, [sp]
	bne _022D88DC
	ldrh r0, [r4, #0xa]
	ldr r6, [sp]
	cmp r0, #0x20
	bne _022D8820
	mov r0, r4
	bl ov00_022D80AC
	cmp r0, #0
	str r0, [sp]
	movle r0, #0
	addgt r6, r6, #1
	strle r0, [sp]
	b _022D8844
_022D8820:
	cmp r0, #8
	bne _022D8844
	mov r0, r4
	bl ov00_022D8E60
	cmp r0, #0
	str r0, [sp]
	moveq r0, #0
	addne r6, r6, #1
	streq r0, [sp]
_022D8844:
	ldrb r0, [sl, #0xd10]
	mov r5, #0
	cmp r0, #0
	ble _022D8950
	mov r7, sl
	add r8, sl, #0x304
	add sb, sl, #0x300
	add fp, sl, #0x10c
_022D8864:
	ldrh r2, [r4, #0xa]
	ldrb r0, [r7, #0x303]
	cmp r2, r0
	bne _022D88BC
	mov r1, r8
	add r0, r4, #0xc
	bl strncmp
	cmp r0, #0
	bne _022D88BC
	cmp r6, #0
	ldreqb r0, [r7, #0x301]
	streq r0, [sp]
	beq _022D88B8
	ldrb r0, [sb]
	bic r0, r0, #0xf0
	orr r0, r0, #0x10
	strb r0, [sb]
	ldrb r0, [fp, #0xc00]
	bic r0, r0, #0xc0
	orr r0, r0, #0x40
	strb r0, [fp, #0xc00]
_022D88B8:
	add r6, r6, #1
_022D88BC:
	ldrb r0, [sl, #0xd10]
	add r5, r5, #1
	add r7, r7, #0x24
	cmp r5, r0
	add r8, r8, #0x24
	add sb, sb, #0x24
	blt _022D8864
	b _022D8950
_022D88DC:
	ldrb r0, [sl, #0xd10]
	ldr r5, [sp]
	mov r4, r5
	cmp r0, #0
	ble _022D8940
	mov r3, sl
	add r2, sl, #0x300
_022D88F8:
	ldrb r0, [r2]
	mov r1, r0, lsl #0x18
	mov r1, r1, lsr #0x1c
	cmp r1, #1
	bne _022D8928
	cmp r4, #0
	bne _022D8924
	bic r0, r0, #0xf0
	strb r0, [r2]
	ldrb r0, [r3, #0x301]
	str r0, [sp]
_022D8924:
	add r4, r4, #1
_022D8928:
	ldrb r0, [sl, #0xd10]
	add r5, r5, #1
	add r2, r2, #0x24
	cmp r5, r0
	add r3, r3, #0x24
	blt _022D88F8
_022D8940:
	cmp r4, #1
	ldreqb r0, [sl, #0xd0c]
	biceq r0, r0, #0xc0
	streqb r0, [sl, #0xd0c]
_022D8950:
	ldr r0, [sp]
	and r0, r0, #0xff
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022D87C0

	arm_func_start ov00_022D895C
ov00_022D895C: ; 0x022D895C
	ldrb r0, [r0, #0xd0b]
	mov r0, r0, lsl #0x1e
	mov r0, r0, lsr #0x1e
	cmp r0, #1
	moveq r0, #0x30000
	movne r0, #0x20000
	bx lr
	arm_func_end ov00_022D895C

	arm_func_start ov00_022D8978
ov00_022D8978: ; 0x022D8978
	ldrb r0, [r0, #0xd0b]
	mov r0, r0, lsl #0x1c
	mov r0, r0, lsr #0x1e
	cmp r0, #1
	moveq r0, #0xc0000
	movne r0, #0x80000
	bx lr
	arm_func_end ov00_022D8978

	arm_func_start ov00_022D8994
ov00_022D8994: ; 0x022D8994
	stmdb sp!, {r4, lr}
	mov r4, r2
	cmp r1, #9
	addls pc, pc, r1, lsl #2
	b _022D8A6C
_022D89A8: ; jump table
	b _022D89D8 ; case 0
	b _022D89D4 ; case 1
	b _022D89D0 ; case 2
	b _022D8A04 ; case 3
	b _022D8A00 ; case 4
	b _022D89FC ; case 5
	b _022D8A20 ; case 6
	b _022D8A48 ; case 7
	b _022D8A6C ; case 8
	b _022D8A6C ; case 9
_022D89D0:
	add r0, r0, #0x100
_022D89D4:
	add r0, r0, #0x100
_022D89D8:
	ldrb r2, [r0, #0xe6]
	add r0, r0, #0x80
	add r1, r4, #2
	mov r2, r2, lsl #0x1e
	mov r3, r2, lsr #0x1e
	mov r2, #0x10
	strb r3, [r4]
	bl MemcpyFast
	b _022D8A6C
_022D89FC:
	add r0, r0, #0x100
_022D8A00:
	add r0, r0, #0x100
_022D8A04:
	mov r3, #1
	add r0, r0, #0xd1
	add r1, r4, #2
	mov r2, #5
	strb r3, [r4]
	bl MemcpyFast
	b _022D8A6C
_022D8A20:
	mov r1, #2
	strb r1, [r4]
	ldrb r1, [r0, #0xd13]
	add r0, r0, #0x7c
	add r2, r0, #0x400
	mov r0, #0xc0
	mla r0, r1, r0, r2
	add r1, r4, #2
	bl ov00_022DA094
	b _022D8A6C
_022D8A48:
	mov r1, #2
	strb r1, [r4]
	ldrb r1, [r0, #0xd13]
	add r0, r0, #0x7c
	add r2, r0, #0x400
	mov r0, #0xc0
	mla r0, r1, r0, r2
	add r1, r4, #2
	bl ov00_022D9FFC
_022D8A6C:
	ldrb r0, [r4]
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D8994

	arm_func_start ov00_022D8A80
ov00_022D8A80: ; 0x022D8A80
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldrb r0, [r4]
	cmp r0, #0xa
	bhi _022D8ACC
	bl ov00_022D8B08
	cmp r0, #1
	bne _022D8AB0
	mov r0, #0
	strb r0, [r4]
	mov r0, #1
	ldmia sp!, {r4, pc}
_022D8AB0:
	mvn r1, #0
	cmp r0, r1
	bne _022D8B00
	mov r0, #0x12
	strb r0, [r4]
	mov r0, #1
	ldmia sp!, {r4, pc}
_022D8ACC:
	cmp r0, #0xe
	bne _022D8AE8
	bl ov00_022DE654
	bl ov00_022DE55C
	mov r0, #0xc
	strb r0, [r4]
	b _022D8B00
_022D8AE8:
	cmp r0, #0x12
	bhs _022D8B00
	bl ov00_022D8B98
	cmp r0, #1
	moveq r0, #0xa
	streqb r0, [r4]
_022D8B00:
	mov r0, #0
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D8A80

	arm_func_start ov00_022D8B08
ov00_022D8B08: ; 0x022D8B08
	stmdb sp!, {r3, lr}
	bl ov00_022D5640
	cmp r0, #0xc
	addls pc, pc, r0, lsl #2
	b _022D8B90
_022D8B1C: ; jump table
	b _022D8B50 ; case 0
	b _022D8B58 ; case 1
	b _022D8B90 ; case 2
	b _022D8B60 ; case 3
	b _022D8B90 ; case 4
	b _022D8B90 ; case 5
	b _022D8B68 ; case 6
	b _022D8B90 ; case 7
	b _022D8B90 ; case 8
	b _022D8B70 ; case 9
	b _022D8B90 ; case 10
	b _022D8B80 ; case 11
	b _022D8B78 ; case 12
_022D8B50:
	mov r0, #1
	ldmia sp!, {r3, pc}
_022D8B58:
	bl ov00_022D4B88
	b _022D8B90
_022D8B60:
	bl ov00_022D4DE4
	b _022D8B90
_022D8B68:
	bl ov00_022D506C
	b _022D8B90
_022D8B70:
	bl ov00_022D5314
	b _022D8B90
_022D8B78:
	bl ov00_022D5430
	b _022D8B90
_022D8B80:
	mov r0, #0
	bl ov00_022D7D78
	mvn r0, #0
	ldmia sp!, {r3, pc}
_022D8B90:
	mov r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022D8B08

	arm_func_start ov00_022D8B98
ov00_022D8B98: ; 0x022D8B98
	stmdb sp!, {r3, lr}
	ldr r0, _022D8BDC ; =ov00_02318868
	ldr r0, [r0]
	cmp r0, #0
	moveq r0, #1
	ldmeqia sp!, {r3, pc}
	bl ov00_022CED64
	cmp r0, #0
	movne r0, #0
	ldmneia sp!, {r3, pc}
	bl ov00_022CF7E8
	cmp r0, #0
	mvnne r1, #0x26
	cmpne r0, r1
	moveq r0, #1
	movne r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D8BDC: .word ov00_02318868
	arm_func_end ov00_022D8B98

	arm_func_start ov00_022D8BE0
ov00_022D8BE0: ; 0x022D8BE0
	stmdb sp!, {r3, lr}
	mov r0, #1
	bl ov00_022D7CA4
	add r0, r0, #0xa
	bl ov00_022D8A80
	cmp r0, #1
	moveq r0, #0x12
	movne r0, #0x11
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022D8BE0

	arm_func_start ov00_022D8C04
ov00_022D8C04: ; 0x022D8C04
	stmdb sp!, {r4, lr}
	mov r0, #1
	bl ov00_022D7CA4
	mov r4, r0
	bl ov00_022D7D9C
	cmp r0, #4
	bge _022D8C28
	bl ov00_022D8C54
	ldmia sp!, {r4, pc}
_022D8C28:
	cmp r0, #5
	bge _022D8C38
	bl ov00_022D8C98
	ldmia sp!, {r4, pc}
_022D8C38:
	cmp r0, #5
	mov r0, r4
	bne _022D8C4C
	bl ov00_022D8CA0
	ldmia sp!, {r4, pc}
_022D8C4C:
	bl ov00_022D8CBC
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D8C04

	arm_func_start ov00_022D8C54
ov00_022D8C54: ; 0x022D8C54
	cmp r0, #3
	addls pc, pc, r0, lsl #2
	b _022D8C90
_022D8C60: ; jump table
	b _022D8C78 ; case 0
	b _022D8C70 ; case 1
	b _022D8C80 ; case 2
	b _022D8C88 ; case 3
_022D8C70:
	mvn r0, #8
	bx lr
_022D8C78:
	mvn r0, #9
	bx lr
_022D8C80:
	mvn r0, #7
	bx lr
_022D8C88:
	mvn r0, #6
	bx lr
_022D8C90:
	mov r0, #0
	bx lr
	arm_func_end ov00_022D8C54

	arm_func_start ov00_022D8C98
ov00_022D8C98: ; 0x022D8C98
	mvn r0, #5
	bx lr
	arm_func_end ov00_022D8C98

	arm_func_start ov00_022D8CA0
ov00_022D8CA0: ; 0x022D8CA0
	ldrb r0, [r0, #0xb]
	cmp r0, #0
	ldreq r0, _022D8CB4 ; =0xFFFF3C4D
	ldrne r0, _022D8CB8 ; =0xFFFF3865
	bx lr
	.align 2, 0
_022D8CB4: .word 0xFFFF3C4D
_022D8CB8: .word 0xFFFF3865
	arm_func_end ov00_022D8CA0

	arm_func_start ov00_022D8CBC
ov00_022D8CBC: ; 0x022D8CBC
	ldrb r1, [r0, #0x22]
	ldrb r2, [r0, #0x16]
	cmp r1, #0
	ldreqb r1, [r0, #0x15]
	cmp r2, #0xa
	bhs _022D8D08
	ldrb r0, [r0, #0x14]
	cmp r0, #3
	ldreq r0, _022D8DA4 ; =0xFFFF3864
	subeq r0, r0, r1
	bxeq lr
	cmp r0, #4
	ldrne r0, _022D8DA8 ; =0xFFFF379C
	subne r0, r0, r1
	bxne lr
	mov r0, #0xc800
	rsb r0, r0, #0
	sub r0, r0, r1
	bx lr
_022D8D08:
	cmp r2, #0xd
	ldrlo r0, _022D8DAC ; =0xFFFF34E0
	sublo r0, r0, r1
	bxlo lr
	ldr r0, [r0, #0x10]
	cmp r0, #0
	ldreq r0, _022D8DB0 ; =0xFFFF3CB0
	subeq r0, r0, r1
	bxeq lr
	mvn r3, #0
	cmp r0, r3
	ldreq r0, _022D8DB4 ; =0xFFFF347C
	subeq r0, r0, r1
	bxeq lr
	sub r2, r3, #1
	cmp r0, r2
	ldreq r0, _022D8DB8 ; =0xFFFF3418
	subeq r0, r0, r1
	bxeq lr
	sub r2, r3, #2
	cmp r0, r2
	ldreq r0, _022D8DBC ; =0xFFFF33B4
	subeq r0, r0, r1
	bxeq lr
	sub r2, r3, #3
	cmp r0, r2
	ldreq r0, _022D8DC0 ; =0xFFFF30F8
	subeq r0, r0, r1
	bxeq lr
	sub r2, r3, #4
	cmp r0, r2
	ldreq r0, _022D8DC4 ; =0xFFFF3094
	subeq r0, r0, r1
	bxeq lr
	sub r2, r3, #5
	cmp r0, r2
	ldreq r0, _022D8DC8 ; =0xFFFF3030
	subeq r0, r0, r1
	bx lr
	.align 2, 0
_022D8DA4: .word 0xFFFF3864
_022D8DA8: .word 0xFFFF379C
_022D8DAC: .word 0xFFFF34E0
_022D8DB0: .word 0xFFFF3CB0
_022D8DB4: .word 0xFFFF347C
_022D8DB8: .word 0xFFFF3418
_022D8DBC: .word 0xFFFF33B4
_022D8DC0: .word 0xFFFF30F8
_022D8DC4: .word 0xFFFF3094
_022D8DC8: .word 0xFFFF3030
	arm_func_end ov00_022D8CBC

	arm_func_start ov00_022D8DCC
ov00_022D8DCC: ; 0x022D8DCC
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r0, #0x10
	bl ov00_022D7CA4
	mov r4, r0
	cmp r5, #0
	beq _022D8DFC
	cmp r5, #1
	beq _022D8E1C
	cmp r5, #2
	beq _022D8E34
	b _022D8E58
_022D8DFC:
	add r1, r4, #0x300
	mov r0, #0
	mov r2, #0x144
	bl ArrayFill32
	mov r0, r4
	bl ov00_022D8EAC
	strb r0, [r4, #0xd10]
	b _022D8E58
_022D8E1C:
	bl ov00_022D9100
	strb r0, [r4, #0xd10]
	mov r0, r4
	bl ov00_022D9190
	strb r0, [r4, #0xd0f]
	b _022D8E58
_022D8E34:
	add r1, r4, #0x300
	mov r0, #0
	mov r2, #0x144
	bl ArrayFill32
	mov r1, #0
	mov r0, r4
	strb r1, [r4, #0xd0f]
	bl ov00_022D8F0C
	strb r0, [r4, #0xd10]
_022D8E58:
	ldrb r0, [r4, #0xd10]
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D8DCC

	arm_func_start ov00_022D8E60
ov00_022D8E60: ; 0x022D8E60
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #0x10
	bl ov00_022D7CA4
	ldrb r0, [r0, #0xd0c]
	mov r0, r0, lsl #0x1c
	movs r0, r0, lsr #0x1c
	cmpne r0, #6
	bne _022D8EA0
	ldr r1, _022D8EA8 ; =ov00_02318188
	add r0, r4, #0xc
	mov r2, #8
	bl strncmp
	cmp r0, #0
	moveq r0, #8
	ldmeqia sp!, {r4, pc}
_022D8EA0:
	mov r0, #0
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D8EA8: .word ov00_02318188
	arm_func_end ov00_022D8E60

	arm_func_start ov00_022D8EAC
ov00_022D8EAC: ; 0x022D8EAC
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	add r4, r5, #0x300
	bl ov00_022D8FF8
	ldrb r1, [r5, #0xd0c]
	mov r5, r0
	mov r0, #0x24
	mla r4, r5, r0, r4
	mov r1, r1, lsl #0x1c
	movs r0, r1, lsr #0x1c
	cmpne r0, #6
	bne _022D8F00
	ldr r0, _022D8F08 ; =ov00_02318188
	add r1, r4, #4
	mov r2, #8
	bl MemcpyFast
	mov r1, #8
	strb r1, [r4, #3]
	add r0, r5, #1
	strb r1, [r4, #1]
	and r5, r0, #0xff
_022D8F00:
	mov r0, r5
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022D8F08: .word ov00_02318188
	arm_func_end ov00_022D8EAC

	arm_func_start ov00_022D8F0C
ov00_022D8F0C: ; 0x022D8F0C
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	add r5, r6, #0x300
	bl ov00_022D8FF8
	ldrb r1, [r6, #0xd0c]
	mov r4, r0
	mov r0, #0x24
	mla r5, r4, r0, r5
	mov r1, r1, lsl #0x1c
	movs r0, r1, lsr #0x1c
	cmpne r0, #4
	bne _022D8F68
	ldr r0, _022D8FEC ; =ov00_02318AF4
	add r1, r5, #4
	mov r2, #8
	bl MemcpyFast
	mov r1, #8
	add r0, r4, #1
	strb r1, [r5, #3]
	mov r1, #6
	strb r1, [r5, #1]
	and r4, r0, #0xff
	add r5, r5, #0x24
_022D8F68:
	ldrb r0, [r6, #0xd0c]
	mov r0, r0, lsl #0x1c
	movs r0, r0, lsr #0x1c
	cmpne r0, #7
	bne _022D8FA8
	ldr r0, _022D8FF0 ; =ov00_02318180
	add r1, r5, #4
	mov r2, #8
	bl MemcpyFast
	mov r1, #8
	add r0, r4, #1
	strb r1, [r5, #3]
	mov r1, #9
	strb r1, [r5, #1]
	and r4, r0, #0xff
	add r5, r5, #0x24
_022D8FA8:
	ldrb r0, [r6, #0xd0c]
	mov r0, r0, lsl #0x1c
	movs r0, r0, lsr #0x1c
	cmpne r0, #8
	bne _022D8FE4
	ldr r0, _022D8FF4 ; =ov00_02318190
	add r1, r5, #4
	mov r2, #0xb
	bl MemcpyFast
	mov r1, #0xb
	add r0, r4, #1
	strb r1, [r5, #3]
	mov r1, #0xa
	strb r1, [r5, #1]
	and r4, r0, #0xff
_022D8FE4:
	mov r0, r4
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022D8FEC: .word ov00_02318AF4
_022D8FF0: .word ov00_02318180
_022D8FF4: .word ov00_02318190
	arm_func_end ov00_022D8F0C

	arm_func_start ov00_022D8FF8
ov00_022D8FF8: ; 0x022D8FF8
	stmdb sp!, {r4, r5, r6, lr}
	mov r2, #0
	mov r3, r0
	mov r1, r2
	add ip, r0, #0x300
_022D900C:
	ldrb r4, [r0, #0xd0c]
	mov r4, r4, lsl #0x1c
	movs r5, r4, lsr #0x1c
	addne r4, r1, #1
	cmpne r5, r4
	bne _022D90E8
	ldrb r4, [r3, #0xe7]
	cmp r4, #0xff
	beq _022D90E8
	mov r6, #0
_022D9034:
	add r4, r3, r6
	ldrb lr, [r4, #0x40]
	cmp lr, #0
	beq _022D905C
	add r4, r6, #1
	add r5, ip, r6
	and r6, r4, #0xff
	strb lr, [r5, #4]
	cmp r6, #0x20
	blo _022D9034
_022D905C:
	cmp r6, #0
	moveq r4, #0
	beq _022D9074
	strb r6, [ip, #3]
	strb r1, [ip, #1]
	mov r4, #1
_022D9074:
	cmp r4, #0
	ldrb r4, [r3, #0xe7]
	addne r2, r2, #1
	andne r2, r2, #0xff
	addne ip, ip, #0x24
	cmp r4, #1
	bne _022D90E8
	mov r6, #0
_022D9094:
	add r4, r3, r6
	ldrb r5, [r4, #0x60]
	cmp r5, #0
	beq _022D90BC
	add lr, r6, #1
	add r4, ip, r6
	and r6, lr, #0xff
	strb r5, [r4, #4]
	cmp r6, #0x20
	blo _022D9094
_022D90BC:
	cmp r6, #0
	moveq r4, #0
	beq _022D90D8
	strb r6, [ip, #3]
	add lr, r1, #3
	strb lr, [ip, #1]
	mov r4, #1
_022D90D8:
	cmp r4, #0
	addne r2, r2, #1
	andne r2, r2, #0xff
	addne ip, ip, #0x24
_022D90E8:
	add r1, r1, #1
	cmp r1, #3
	add r3, r3, #0x100
	blt _022D900C
	mov r0, r2
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022D8FF8

	arm_func_start ov00_022D9100
ov00_022D9100: ; 0x022D9100
	stmdb sp!, {r3, r4, r5, lr}
	ldrb r3, [r0, #0xd12]
	mov r2, #0
	mov r1, r2
	cmp r3, #0
	ble _022D9188
	add r3, r0, #0x47
	mov ip, r0
	add r3, r3, #0x400
_022D9124:
	add r4, r0, r1, lsl #2
	ldrb r4, [r4, #0x444]
	cmp r4, #0
	bne _022D9164
	add lr, ip, #0x400
	ldrh r4, [lr, #0xa6]
	ldrb lr, [r3]
	sub r5, r4, #1
	mov r4, lr, lsl #0x19
	cmp r5, r4, lsr #25
	beq _022D9164
	bic lr, lr, #0x80
	add r2, r2, #1
	strb lr, [r3]
	and r2, r2, #0xff
	b _022D9170
_022D9164:
	ldrb lr, [r3]
	orr lr, lr, #0x80
	strb lr, [r3]
_022D9170:
	ldrb lr, [r0, #0xd12]
	add r1, r1, #1
	add r3, r3, #4
	cmp r1, lr
	add ip, ip, #0xc0
	blt _022D9124
_022D9188:
	mov r0, r2
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D9100

	arm_func_start ov00_022D9190
ov00_022D9190: ; 0x022D9190
	ldrb ip, [r0, #0xd12]
	mov r3, #0
	mov r2, r3
	cmp ip, #0
	bls _022D91CC
_022D91A4:
	add r1, r0, r2, lsl #2
	ldrb r1, [r1, #0x447]
	mov r1, r1, lsl #0x18
	movs r1, r1, lsr #0x1f
	moveq r3, r2
	beq _022D91CC
	add r1, r2, #1
	and r2, r1, #0xff
	cmp r2, ip
	blo _022D91A4
_022D91CC:
	mov r0, r3
	bx lr
	arm_func_end ov00_022D9190

	arm_func_start ov00_022D91D4
ov00_022D91D4: ; 0x022D91D4
	stmdb sp!, {r3, r4, r5, lr}
	mov r0, #0x10
	bl ov00_022D7CA4
	mov r4, r0
	mov r5, #9
	bl ov00_022D5640
	cmp r0, #0xc
	addls pc, pc, r0, lsl #2
	b _022D92A8
_022D91F8: ; jump table
	b _022D92A8 ; case 0
	b _022D92A8 ; case 1
	b _022D92A8 ; case 2
	b _022D922C ; case 3
	b _022D92A8 ; case 4
	b _022D92A8 ; case 5
	b _022D9278 ; case 6
	b _022D92A8 ; case 7
	b _022D92A8 ; case 8
	b _022D9280 ; case 9
	b _022D92A8 ; case 10
	b _022D929C ; case 11
	b _022D9288 ; case 12
_022D922C:
	ldrb r0, [r4, #0xd0c]
	ldrb r5, [r4, #0xd0e]
	mov r0, r0, lsl #0x18
	mov r0, r0, lsr #0x1e
	cmp r0, #1
	bne _022D925C
	ldrb r0, [r4, #0xd13]
	mov r1, #0
	mov r5, #7
	add r0, r4, r0, lsl #2
	strb r1, [r0, #0x444]
	b _022D92A8
_022D925C:
	cmp r5, #3
	blo _022D92A8
	cmp r5, #5
	bhi _022D92A8
	mov r0, r5
	bl ov00_022D9410
	b _022D92A8
_022D9278:
	bl ov00_022D506C
	b _022D92A8
_022D9280:
	bl ov00_022D5314
	b _022D92A8
_022D9288:
	bl ov00_022D5430
	mov r0, #4
	bl ov00_022D7D78
	mov r5, #0x11
	b _022D92A8
_022D929C:
	mov r0, #0
	bl ov00_022D7D78
	mov r5, #0x11
_022D92A8:
	mov r0, r5
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D91D4

	arm_func_start ov00_022D92B0
ov00_022D92B0: ; 0x022D92B0
	stmdb sp!, {r3, r4, r5, lr}
	mov r0, #0x10
	bl ov00_022D7CA4
	mov r4, r0
	bl ov00_022D7D5C
	mov r5, r0
	bl ov00_022D5640
	cmp r5, #2
	cmpeq r0, #3
	bne _022D92E8
	mov r0, r4
	bl ov00_022D94F0
	mov r5, r0
	b _022D936C
_022D92E8:
	cmp r5, #6
	bne _022D9304
	mov r0, r4
	mov r1, r5
	bl ov00_022D9938
	mov r5, r0
	b _022D936C
_022D9304:
	cmp r0, #3
	cmpne r0, #6
	bne _022D936C
	mov r0, r4
	mov r1, r5
	bl ov00_022D9938
	mov r5, r0
	cmp r5, #7
	beq _022D936C
	cmp r5, #3
	bne _022D9340
	mov r0, r4
	bl ov00_022D9540
	mov r5, r0
	b _022D936C
_022D9340:
	cmp r5, #4
	bne _022D9358
	mov r0, r4
	bl ov00_022D962C
	mov r5, r0
	b _022D936C
_022D9358:
	cmp r5, #5
	bne _022D936C
	mov r0, r4
	bl ov00_022D9754
	mov r5, r0
_022D936C:
	mov r0, r5
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D92B0

	arm_func_start ov00_022D9374
ov00_022D9374: ; 0x022D9374
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #0x10
	bl ov00_022D7CA4
	add r0, r0, #0xd00
	cmp r4, #0xd
	movhi r4, #0xd
	ldrh r3, [r0, #0x16]
	sub r1, r4, #1
	mov r2, #1
	orr r1, r3, r2, lsl r1
	strh r1, [r0, #0x16]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D9374

	arm_func_start ov00_022D93A8
ov00_022D93A8: ; 0x022D93A8
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #0x10
	bl ov00_022D7CA4
	add r0, r0, #0xd00
	ldrh ip, [r0, #0x16]
	cmp ip, #0
	mvneq r0, #0
	ldmeqia sp!, {r4, pc}
	mov r2, #0
	mov r3, r2
	mov r1, #1
_022D93D8:
	tst ip, r1, lsl r2
	beq _022D93F8
	cmp r3, r4
	moveq r0, r2, lsl #0x18
	moveq r0, r0, asr #0x18
	ldmeqia sp!, {r4, pc}
	add r0, r3, #1
	and r3, r0, #0xff
_022D93F8:
	add r0, r2, #1
	and r2, r0, #0xff
	cmp r2, #0xd
	blo _022D93D8
	mvn r0, #0
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D93A8

	arm_func_start ov00_022D9410
ov00_022D9410: ; 0x022D9410
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r0, #0x10
	bl ov00_022D7CA4
	mov r4, r0
	cmp r5, #3
	beq _022D9440
	cmp r5, #4
	beq _022D9468
	cmp r5, #5
	beq _022D94B4
	ldmia sp!, {r3, r4, r5, pc}
_022D9440:
	bl sub_0207AE44
	str r0, [r4, #0xcb0]
	str r1, [r4, #0xcb4]
	add r0, r4, #0xd00
	ldrsb r2, [r0, #0x11]
	ldr r0, _022D94E8 ; =ov00_02318158
	ldr r1, _022D94EC ; =ov00_02318160
	mov r3, #0x200000
	bl ov00_022D9A5C
	ldmia sp!, {r3, r4, r5, pc}
_022D9468:
	bl sub_0207AE44
	str r0, [r4, #0xcb0]
	str r1, [r4, #0xcb4]
	ldrb r2, [r4, #0xd0f]
	mov r0, #0xc0
	add r1, r4, #0x74
	smulbb ip, r2, r0
	add r0, r4, ip
	add r0, r0, #0x400
	ldrh r2, [r0, #0xa6]
	add r0, r4, #0x7c
	add r3, r1, #0x400
	add r1, r0, #0x400
	add r0, r3, ip
	add r1, r1, ip
	sub r2, r2, #1
	mov r3, #0x300000
	bl ov00_022D9A5C
	ldmia sp!, {r3, r4, r5, pc}
_022D94B4:
	bl sub_0207AE44
	str r0, [r4, #0xcb0]
	str r1, [r4, #0xcb4]
	ldrb r3, [r4, #0xd0f]
	add r1, r4, #0x304
	mov r0, #0x24
	add r2, r4, #0xd00
	mla r1, r3, r0, r1
	ldrsb r2, [r2, #0x11]
	ldr r0, _022D94E8 ; =ov00_02318158
	mov r3, #0x300000
	bl ov00_022D9A5C
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022D94E8: .word ov00_02318158
_022D94EC: .word ov00_02318160
	arm_func_end ov00_022D9410

	arm_func_start ov00_022D94F0
ov00_022D94F0: ; 0x022D94F0
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl sub_0207AE44
	str r0, [r4, #0xcb0]
	str r1, [r4, #0xcb4]
	mov r0, #0
	strb r0, [r4, #0xd11]
	bl sub_0207AE44
	str r0, [r4, #0xcb0]
	str r1, [r4, #0xcb4]
	add r0, r4, #0xd00
	ldrsb r2, [r0, #0x11]
	ldr r0, _022D9538 ; =ov00_02318158
	ldr r1, _022D953C ; =ov00_02318160
	mov r3, #0x200000
	bl ov00_022D9A5C
	mov r0, #3
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D9538: .word ov00_02318158
_022D953C: .word ov00_02318160
	arm_func_end ov00_022D94F0

	arm_func_start ov00_022D9540
ov00_022D9540: ; 0x022D9540
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl sub_0207AE44
	ldr r3, [r4, #0xcb0]
	ldr r2, [r4, #0xcb4]
	subs r3, r0, r3
	sbc r0, r1, r2
	mov r1, r0, lsl #6
	ldr r2, _022D95D8 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	cmp r1, #0
	cmpeq r0, #0x12c
	blo _022D95D0
	add r0, r4, #0xd00
	ldrsb r1, [r0, #0x11]
	add r1, r1, #2
	strb r1, [r4, #0xd11]
	ldrsb r0, [r0, #0x11]
	cmp r0, #0xd
	blt _022D95AC
	mov r0, r4
	mov r1, #3
	bl ov00_022D9874
	ldmia sp!, {r4, pc}
_022D95AC:
	bl sub_0207AE44
	str r0, [r4, #0xcb0]
	str r1, [r4, #0xcb4]
	add r0, r4, #0xd00
	ldrsb r2, [r0, #0x11]
	ldr r0, _022D95DC ; =ov00_02318158
	ldr r1, _022D95E0 ; =ov00_02318160
	mov r3, #0x200000
	bl ov00_022D9A5C
_022D95D0:
	mov r0, #3
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D95D8: .word 0x000082EA
_022D95DC: .word ov00_02318158
_022D95E0: .word ov00_02318160
	arm_func_end ov00_022D9540

	arm_func_start ov00_022D95E4
ov00_022D95E4: ; 0x022D95E4
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #0
	strb r0, [r4, #0xd15]
	ldrb r2, [r4, #0xd0b]
	mov r1, r2, lsl #0x18
	mov r1, r1, lsr #0x1c
	add r1, r1, #1
	and r1, r1, #0xff
	bic r2, r2, #0xf0
	mov r1, r1, lsl #0x1c
	orr r1, r2, r1, lsr #24
	strb r1, [r4, #0xd0b]
	bl ov00_022D8DCC
	mov r0, #1
	strb r0, [r4, #0xd11]
	mov r0, #3
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D95E4

	arm_func_start ov00_022D962C
ov00_022D962C: ; 0x022D962C
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl sub_0207AE44
	ldr r3, [r4, #0xcb0]
	ldr r2, [r4, #0xcb4]
	subs r3, r0, r3
	sbc r0, r1, r2
	mov r1, r0, lsl #6
	ldr r2, _022D9750 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	cmp r1, #0
	cmpeq r0, #0x96
	bhs _022D9688
	ldrb r0, [r4, #0xd0f]
	add r0, r4, r0, lsl #2
	ldrb r0, [r0, #0x447]
	mov r0, r0, lsl #0x18
	mov r0, r0, lsr #0x1f
	cmp r0, #1
	bne _022D9748
_022D9688:
	ldrb r1, [r4, #0xd0f]
	add r0, r4, #0x47
	add r2, r0, #0x400
	ldrb r0, [r2, r1, lsl #2]
	orr r0, r0, #0x80
	strb r0, [r2, r1, lsl #2]
	ldrb r2, [r4, #0xd12]
	ldrb r1, [r4, #0xd0f]
	cmp r1, r2
	bhs _022D96E0
_022D96B0:
	add r0, r4, r1, lsl #2
	ldrb r0, [r0, #0x447]
	mov r0, r0, lsl #0x18
	movs r0, r0, lsr #0x1f
	beq _022D96E0
	ldrb r0, [r4, #0xd0f]
	add r0, r0, #1
	strb r0, [r4, #0xd0f]
	ldrb r2, [r4, #0xd12]
	and r1, r0, #0xff
	cmp r1, r2
	blo _022D96B0
_022D96E0:
	cmp r2, r1
	bhi _022D9700
	mov r2, #0
	mov r0, r4
	mov r1, #4
	strb r2, [r4, #0xd0f]
	bl ov00_022D9874
	ldmia sp!, {r4, pc}
_022D9700:
	bl sub_0207AE44
	str r0, [r4, #0xcb0]
	str r1, [r4, #0xcb4]
	ldrb r2, [r4, #0xd0f]
	mov r0, #0xc0
	add r1, r4, #0x74
	smulbb ip, r2, r0
	add r0, r4, ip
	add r0, r0, #0x400
	ldrh r2, [r0, #0xa6]
	add r0, r4, #0x7c
	add r3, r1, #0x400
	add r1, r0, #0x400
	add r0, r3, ip
	add r1, r1, ip
	sub r2, r2, #1
	mov r3, #0x300000
	bl ov00_022D9A5C
_022D9748:
	mov r0, #4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D9750: .word 0x000082EA
	arm_func_end ov00_022D962C

	arm_func_start ov00_022D9754
ov00_022D9754: ; 0x022D9754
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl sub_0207AE44
	ldr r3, [r4, #0xcb0]
	ldr r2, [r4, #0xcb4]
	subs r3, r0, r3
	sbc r0, r1, r2
	mov r1, r0, lsl #6
	ldr r2, _022D986C ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	cmp r1, #0
	cmpeq r0, #0x96
	bhs _022D97B4
	ldrb r1, [r4, #0xd0f]
	mov r0, #0x24
	mla r0, r1, r0, r4
	ldrb r0, [r0, #0x300]
	mov r0, r0, lsl #0x1c
	mov r0, r0, lsr #0x1c
	cmp r0, #1
	bne _022D9864
_022D97B4:
	ldrb r1, [r4, #0xd0f]
	mov r0, #0x24
	add r2, r4, #0x300
	smulbb r1, r1, r0
	ldrb r0, [r2, r1]
	bic r0, r0, #0xf
	strb r0, [r2, r1]
	ldrb r0, [r4, #0xd0f]
	add r0, r0, #1
	strb r0, [r4, #0xd0f]
	ldrb r1, [r4, #0xd10]
	and r0, r0, #0xff
	cmp r1, r0
	bhi _022D980C
	ldrb r1, [r4, #0xd15]
	mov r0, #0
	add r1, r1, #1
	strb r1, [r4, #0xd15]
	strb r0, [r4, #0xd0f]
	ldrb r0, [r4, #0xd15]
	bl ov00_022D93A8
	strb r0, [r4, #0xd11]
_022D980C:
	add r0, r4, #0xd00
	ldrsb r0, [r0, #0x11]
	cmp r0, #0
	bge _022D9834
	mov r2, #0
	mov r0, r4
	mov r1, #5
	strb r2, [r4, #0xd15]
	bl ov00_022D9874
	ldmia sp!, {r4, pc}
_022D9834:
	bl sub_0207AE44
	str r0, [r4, #0xcb0]
	str r1, [r4, #0xcb4]
	ldrb r3, [r4, #0xd0f]
	add r1, r4, #0x304
	mov r0, #0x24
	add r2, r4, #0xd00
	mla r1, r3, r0, r1
	ldrsb r2, [r2, #0x11]
	ldr r0, _022D9870 ; =ov00_02318158
	mov r3, #0x300000
	bl ov00_022D9A5C
_022D9864:
	mov r0, #5
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D986C: .word 0x000082EA
_022D9870: .word ov00_02318158
	arm_func_end ov00_022D9754

	arm_func_start ov00_022D9874
ov00_022D9874: ; 0x022D9874
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r1
	mov r5, r0
	cmp r4, #3
	beq _022D989C
	cmp r4, #4
	beq _022D98FC
	cmp r4, #5
	beq _022D9908
	b _022D9928
_022D989C:
	ldrb r1, [r5, #0xd12]
	cmp r1, #0
	addeq r1, r5, #0xd00
	ldreqh r1, [r1, #0x16]
	cmpeq r1, #0
	beq _022D98D8
	mov r0, #1
	bl ov00_022D8DCC
	cmp r0, #0
	movne r4, #4
	bne _022D9928
	mov r0, r5
	bl ov00_022D99FC
	mov r4, r0
	b _022D9928
_022D98D8:
	ldrb r1, [r5, #0xd0b]
	mov r1, r1, lsl #0x18
	mov r1, r1, lsr #0x1c
	cmp r1, #1
	movhs r4, #6
	bhs _022D9928
	bl ov00_022D95E4
	mov r4, r0
	b _022D9928
_022D98FC:
	bl ov00_022D99FC
	mov r4, r0
	b _022D9928
_022D9908:
	ldrb r1, [r5, #0xd0b]
	mov r1, r1, lsl #0x18
	mov r1, r1, lsr #0x1c
	cmp r1, #1
	movhs r4, #6
	bhs _022D9928
	bl ov00_022D95E4
	mov r4, r0
_022D9928:
	mov r0, r4
	bl ov00_022D9410
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D9874

	arm_func_start ov00_022D9938
ov00_022D9938: ; 0x022D9938
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r1
	mov r5, r0
	cmp r4, #0x11
	moveq r0, r4
	ldmeqia sp!, {r3, r4, r5, pc}
	ldrb r2, [r5, #0xd12]
	mov r1, #0
	cmp r2, #0
	bls _022D9980
_022D9960:
	add r0, r5, r1, lsl #2
	ldrb r0, [r0, #0x444]
	cmp r0, #0
	beq _022D9980
	add r0, r1, #1
	and r1, r0, #0xff
	cmp r1, r2
	blo _022D9960
_022D9980:
	cmp r4, #6
	bne _022D99B4
	cmp r2, r1
	bne _022D99E0
	cmp r1, #0
	bne _022D99A4
	mov r0, #5
	bl ov00_022D7D78
	b _022D99AC
_022D99A4:
	mov r0, #6
	bl ov00_022D7D78
_022D99AC:
	mov r0, #0x11
	ldmia sp!, {r3, r4, r5, pc}
_022D99B4:
	cmp r2, #0
	moveq r0, r4
	ldmeqia sp!, {r3, r4, r5, pc}
	cmp r2, r1
	moveq r0, r4
	ldmeqia sp!, {r3, r4, r5, pc}
	add r0, r5, r1, lsl #2
	ldrb r0, [r0, #0x446]
	cmp r0, #0x14
	movlo r0, r4
	ldmloia sp!, {r3, r4, r5, pc}
_022D99E0:
	strb r1, [r5, #0xd13]
	bl ov00_022D506C
	cmp r0, #1
	strneb r4, [r5, #0xd0e]
	movne r4, #7
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D9938

	arm_func_start ov00_022D99FC
ov00_022D99FC: ; 0x022D99FC
	stmdb sp!, {r4, lr}
	mov r4, r0
	add r0, r4, #0xd00
	ldrh r0, [r0, #0x16]
	cmp r0, #0
	beq _022D9A38
	mov r0, #2
	bl ov00_022D8DCC
	cmp r0, #0
	beq _022D9A38
	mov r0, #0
	bl ov00_022D93A8
	strb r0, [r4, #0xd11]
	mov r0, #5
	ldmia sp!, {r4, pc}
_022D9A38:
	ldrb r0, [r4, #0xd0b]
	mov r0, r0, lsl #0x18
	mov r0, r0, lsr #0x1c
	cmp r0, #1
	movhs r0, #6
	ldmhsia sp!, {r4, pc}
	mov r0, r4
	bl ov00_022D95E4
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D99FC

	arm_func_start ov00_022D9A5C
ov00_022D9A5C: ; 0x022D9A5C
	stmdb sp!, {r3, lr}
	ldr ip, _022D9A7C ; =ov00_0231819C
	cmp r2, #0xc
	movgt r2, #0xc
	ldr r2, [ip, r2, lsl #2]
	orr r2, r3, r2
	bl ov00_022D4ED4
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D9A7C: .word ov00_0231819C
	arm_func_end ov00_022D9A5C

	arm_func_start ov00_022D9A80
ov00_022D9A80: ; 0x022D9A80
	stmdb sp!, {r4, lr}
	sub sp, sp, #0x10
	bl ov00_022D5640
	mov r4, r0
	mov r0, #0x10
	bl ov00_022D7CA4
	cmp r4, #1
	bne _022D9AEC
	ldrb r1, [r0, #0xd0a]
	mov r0, #0
	str r1, [sp]
	str r0, [sp, #4]
	str r0, [sp, #8]
	str r0, [sp, #0xc]
	bl ov00_022D8DCC
	ldr r1, _022D9B04 ; =ov00_022D84BC
	add r0, sp, #0
	bl ov00_022D4BE0
	cmp r0, #1
	beq _022D9AD8
	cmp r0, #4
	blt _022D9AF8
_022D9AD8:
	mov r0, #1
	bl ov00_022D7D78
	add sp, sp, #0x10
	mov r0, #0x11
	ldmia sp!, {r4, pc}
_022D9AEC:
	add sp, sp, #0x10
	mov r0, #1
	ldmia sp!, {r4, pc}
_022D9AF8:
	mov r0, #2
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D9B04: .word ov00_022D84BC
	arm_func_end ov00_022D9A80

	arm_func_start ov00_022D9B08
ov00_022D9B08: ; 0x022D9B08
	stmdb sp!, {r3, r4, r5, lr}
	bl ov00_022D7D5C
	mov r4, r0
	mov r0, #0x10
	bl ov00_022D7CA4
	mov r5, r0
	bl ov00_022D5640
	cmp r0, #9
	bne _022D9BAC
	sub r0, r4, #0xa
	cmp r0, #5
	addls pc, pc, r0, lsl #2
	b _022D9BFC
_022D9B3C: ; jump table
	b _022D9B54 ; case 0
	b _022D9BA0 ; case 1
	b _022D9B64 ; case 2
	b _022D9B74 ; case 3
	b _022D9B80 ; case 4
	b _022D9B90 ; case 5
_022D9B54:
	mov r0, r5
	bl ov00_022D9C04
	mov r4, r0
	b _022D9BFC
_022D9B64:
	mov r0, r5
	bl ov00_022D9C68
	mov r4, r0
	b _022D9BFC
_022D9B74:
	bl ov00_022D9CF8
	mov r4, r0
	b _022D9BFC
_022D9B80:
	mov r0, r5
	bl ov00_022D9D24
	mov r4, r0
	b _022D9BFC
_022D9B90:
	mov r0, r5
	bl ov00_022D9D90
	mov r4, r0
	b _022D9BFC
_022D9BA0:
	bl ov00_022D9DA4
	mov r4, r0
	b _022D9BFC
_022D9BAC:
	cmp r4, #0xb
	beq _022D9BD4
	cmp r4, #0xe
	beq _022D9BE0
	cmp r4, #0xf
	bne _022D9BE8
	mov r0, r5
	bl ov00_022D9D90
	mov r4, r0
	b _022D9BFC
_022D9BD4:
	bl ov00_022D9DA4
	mov r4, r0
	b _022D9BFC
_022D9BE0:
	bl ov00_022DE654
	bl ov00_022DE55C
_022D9BE8:
	ldrb r0, [r5, #0xd13]
	mov r1, #2
	mov r4, #0xb
	add r0, r5, r0, lsl #2
	strb r1, [r0, #0x444]
_022D9BFC:
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022D9B08

	arm_func_start ov00_022D9C04
ov00_022D9C04: ; 0x022D9C04
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r0, #1
	bl ov00_022D7CA4
	mov r5, r0
	mov r0, #4
	bl ov00_022D7CA4
	mov r4, r0
	mov r0, r5
	mov r1, r6
	mov r2, r4
	bl ov00_022D9DD4
	ldr r1, _022D9C64 ; =ov00_023268C0
	mov r2, #4
	mov r0, r4
	str r2, [r1]
	bl ov00_022CF674
	cmp r0, #0
	moveq r0, #0xc
	ldmeqia sp!, {r4, r5, r6, pc}
	mov r0, #2
	bl ov00_022D7D78
	mov r0, #0x11
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022D9C64: .word ov00_023268C0
	arm_func_end ov00_022D9C04

	arm_func_start ov00_022D9C68
ov00_022D9C68: ; 0x022D9C68
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022CF528
	cmp r0, #0
	beq _022D9CA0
	mov r0, r4
	bl ov00_022D9F3C
	ldrb r0, [r4, #0xd0c]
	mov r0, r0, lsl #0x1a
	mov r0, r0, lsr #0x1e
	cmp r0, #1
	moveq r0, #0xf
	movne r0, #0xd
	ldmia sp!, {r4, pc}
_022D9CA0:
	bl sub_0207AE44
	ldr r3, [r4, #0xcb0]
	ldr r2, [r4, #0xcb4]
	subs r3, r0, r3
	sbc r0, r1, r2
	mov r1, r0, lsl #6
	ldr r2, _022D9CF4 ; =0x01FF6210
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	cmp r1, #0
	cmpeq r0, #0xa
	movlo r0, #0xc
	ldmloia sp!, {r4, pc}
	ldrb r1, [r4, #0xd13]
	mov r2, #1
	mov r0, #0xb
	add r1, r4, r1, lsl #2
	strb r2, [r1, #0x444]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022D9CF4: .word 0x01FF6210
	arm_func_end ov00_022D9C68

	arm_func_start ov00_022D9CF8
ov00_022D9CF8: ; 0x022D9CF8
	stmdb sp!, {r3, lr}
	mov r0, #8
	bl ov00_022D7CA4
	bl ov00_022DE47C
	cmp r0, #0
	moveq r0, #0xe
	ldmeqia sp!, {r3, pc}
	mov r0, #3
	bl ov00_022D7D78
	mov r0, #0x11
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022D9CF8

	arm_func_start ov00_022D9D24
ov00_022D9D24: ; 0x022D9D24
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r0, #1
	bl ov00_022D7CA4
	mov r4, r0
	bl ov00_022DE6BC
	movs r5, r0
	beq _022D9D88
	ldrb r0, [r6, #0xd0d]
	bl ov00_022D7E58
	ldrb r1, [r4, #0x15]
	cmp r1, r0
	bne _022D9D60
	bl ov00_022DE6FC
	str r0, [r4, #0x10]
_022D9D60:
	bl ov00_022DE55C
	cmp r5, #0xb
	moveq r0, #0xf
	ldmeqia sp!, {r4, r5, r6, pc}
	ldrb r1, [r6, #0xd13]
	mov r2, #1
	mov r0, #0xb
	add r1, r6, r1, lsl #2
	strb r2, [r1, #0x444]
	ldmia sp!, {r4, r5, r6, pc}
_022D9D88:
	mov r0, #0xe
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022D9D24

	arm_func_start ov00_022D9D90
ov00_022D9D90: ; 0x022D9D90
	stmdb sp!, {r3, lr}
	ldrb r0, [r0, #0xd0d]
	bl ov00_022D7DB0
	mov r0, #0x10
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022D9D90

	arm_func_start ov00_022D9DA4
ov00_022D9DA4: ; 0x022D9DA4
	stmdb sp!, {r3, lr}
	bl ov00_022CED64
	cmp r0, #0
	movne r0, #0xb
	ldmneia sp!, {r3, pc}
	bl ov00_022CF7E8
	cmp r0, #0
	mvnne r1, #0x26
	cmpne r0, r1
	moveq r0, #9
	movne r0, #0xb
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022D9DA4

	arm_func_start ov00_022D9DD4
ov00_022D9DD4: ; 0x022D9DD4
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r4, r2
	mov r5, r1
	ldr r0, _022D9E90 ; =ov00_023181D0
	mov r1, r4
	mov r2, #0x58
	bl MemcpyFast
	ldr r0, [r6]
	str r0, [r4, #4]
	ldr r0, [r6, #4]
	str r0, [r4, #8]
	ldrb r0, [r5, #0xd0d]
	cmp r0, #6
	ldmhsia sp!, {r4, r5, r6, pc}
	bl ov00_022D7E58
	add r5, r5, r0, lsl #8
	ldrb r0, [r5, #0xc0]
	cmp r0, #0
	beq _022D9E6C
	mov r0, #0
	str r0, [r4, #0xc]
	add r0, r5, #0xc0
	bl ov00_022D9E94
	str r0, [r4, #0x10]
	ldrb r0, [r5, #0xd0]
	bl ov00_022D9EE8
	str r0, [r4, #0x14]
	add r0, r5, #0xc4
	bl ov00_022D9E94
	str r0, [r4, #0x18]
	add r0, r5, #0xc8
	bl ov00_022D9E94
	str r0, [r4, #0x1c]
	add r0, r5, #0xcc
	bl ov00_022D9E94
	str r0, [r4, #0x20]
	ldmia sp!, {r4, r5, r6, pc}
_022D9E6C:
	mov r0, #1
	str r0, [r4, #0xc]
	mov r0, #0
	str r0, [r4, #0x10]
	str r0, [r4, #0x14]
	str r0, [r4, #0x18]
	str r0, [r4, #0x1c]
	str r0, [r4, #0x20]
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022D9E90: .word ov00_023181D0
	arm_func_end ov00_022D9DD4

	arm_func_start ov00_022D9E94
ov00_022D9E94: ; 0x022D9E94
	ldrb r1, [r0]
	ldrb r2, [r0, #1]
	mov r3, #0
	orr r3, r3, r1, lsl #24
	ldrb r1, [r0, #2]
	orr r2, r3, r2, lsl #16
	ldrb r0, [r0, #3]
	orr r1, r2, r1, lsl #8
	orr r3, r1, r0
	mov r1, r3, lsr #0x18
	mov r0, r3, lsr #8
	mov r2, r3, lsl #8
	mov r3, r3, lsl #0x18
	and r1, r1, #0xff
	and r0, r0, #0xff00
	and r2, r2, #0xff0000
	orr r0, r1, r0
	and r1, r3, #0xff000000
	orr r0, r2, r0
	orr r0, r1, r0
	bx lr
	arm_func_end ov00_022D9E94

	arm_func_start ov00_022D9EE8
ov00_022D9EE8: ; 0x022D9EE8
	rsb r1, r0, #0x20
	cmp r1, #0
	mvn r3, #0
	mov r0, #0
	ble _022D9F0C
_022D9EFC:
	add r0, r0, #1
	cmp r0, r1
	mov r3, r3, lsl #1
	blt _022D9EFC
_022D9F0C:
	mov r1, r3, lsr #0x18
	mov r0, r3, lsr #8
	mov r2, r3, lsl #8
	mov r3, r3, lsl #0x18
	and r1, r1, #0xff
	and r0, r0, #0xff00
	and r2, r2, #0xff0000
	orr r0, r1, r0
	and r1, r3, #0xff000000
	orr r0, r2, r0
	orr r0, r1, r0
	bx lr
	arm_func_end ov00_022D9EE8

	arm_func_start ov00_022D9F3C
ov00_022D9F3C: ; 0x022D9F3C
	stmdb sp!, {r4, lr}
	sub sp, sp, #8
	mov r4, r0
	ldrb r0, [r4, #0xd0d]
	cmp r0, #6
	addhs sp, sp, #8
	ldmhsia sp!, {r4, pc}
	bl ov00_022D7E58
	add r4, r4, r0, lsl #8
	ldrb r0, [r4, #0xc0]
	ldrb r2, [r4, #0xc8]
	ldrb r1, [r4, #0xc9]
	cmp r0, #0
	ldrb r3, [r4, #0xca]
	add r1, r2, r1
	ldrb r2, [r4, #0xcb]
	add r1, r3, r1
	addne sp, sp, #8
	add r0, r2, r1
	ldmneia sp!, {r4, pc}
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r4, pc}
	add r0, r4, #0xc8
	bl ov00_022D9E94
	str r0, [sp, #4]
	add r0, r4, #0xcc
	bl ov00_022D9E94
	str r0, [sp]
	add r0, sp, #4
	add r1, sp, #0
	bl ov00_022CF560
	add sp, sp, #8
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D9F3C

	arm_func_start ov00_022D9FC4
ov00_022D9FC4: ; 0x022D9FC4
	stmdb sp!, {r3, lr}
	sub sp, sp, #0x18
	add r1, sp, #0
	bl ov00_022DA0A4
	ldr r1, _022D9FF8 ; =ov00_02318B74
	add r0, sp, #0
	mov r2, #8
	bl memcmp
	cmp r0, #0
	moveq r0, #1
	movne r0, #0
	add sp, sp, #0x18
	ldmia sp!, {r3, pc}
	.align 2, 0
_022D9FF8: .word ov00_02318B74
	arm_func_end ov00_022D9FC4

	arm_func_start ov00_022D9FFC
ov00_022D9FFC: ; 0x022D9FFC
	stmdb sp!, {r4, lr}
	sub sp, sp, #0x18
	mov r4, r1
	add r1, sp, #0
	bl ov00_022DA0A4
	add r0, sp, #0
	mov r1, r4
	bl ov00_022DA1A8
	add sp, sp, #0x18
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022D9FFC

	arm_func_start ov00_022DA024
ov00_022DA024: ; 0x022DA024
	stmdb sp!, {r4, lr}
	sub sp, sp, #0x18
	mov r4, r1
	add r1, sp, #0
	bl ov00_022DA0A4
	ldr r1, _022DA06C ; =ov00_02318B74
	add r0, sp, #0
	mov r2, #8
	bl memcmp
	cmp r0, #0
	addne sp, sp, #0x18
	ldmneia sp!, {r4, pc}
	add r0, sp, #8
	mov r1, r4
	mov r2, #0xa
	bl MemcpyFast
	add sp, sp, #0x18
	ldmia sp!, {r4, pc}
	.align 2, 0
_022DA06C: .word ov00_02318B74
	arm_func_end ov00_022DA024

	arm_func_start ov00_022DA070
ov00_022DA070: ; 0x022DA070
	stmdb sp!, {r3, lr}
	ldr r1, _022DA090 ; =ov00_02318B80
	mov r2, #8
	bl memcmp
	cmp r0, #0
	moveq r0, #1
	movne r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022DA090: .word ov00_02318B80
	arm_func_end ov00_022DA070

	arm_func_start ov00_022DA094
ov00_022DA094: ; 0x022DA094
	ldr ip, _022DA0A0 ; =ov00_022DA1F4
	add r0, r0, #0xc
	bx ip
	.align 2, 0
_022DA0A0: .word ov00_022DA1F4
	arm_func_end ov00_022DA094

	arm_func_start ov00_022DA0A4
ov00_022DA0A4: ; 0x022DA0A4
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x18
	ldr lr, _022DA1A0 ; =ov00_0231822B
	add ip, sp, #0
	mov r4, r1
	mov r3, #0xc
_022DA0BC:
	ldrb r2, [lr]
	ldrb r1, [lr, #1]
	add lr, lr, #2
	strb r2, [ip]
	strb r1, [ip, #1]
	add ip, ip, #2
	subs r3, r3, #1
	bne _022DA0BC
	mov r1, r4
	mov r2, #0x20
	mov r3, #0x18
	bl ov00_022DA410
	ldr r0, _022DA1A4 ; =ov00_02318B0C
	mov r3, #0
_022DA0F4:
	ldr r1, [r0, #8]
	ldrb r2, [r4, r3]
	ldrsb r1, [r1, r3]
	eor r1, r2, r1
	strb r1, [r4, r3]
	add r3, r3, #1
	cmp r3, #0x18
	blt _022DA0F4
	mov r7, #0
	add ip, sp, #0
	mov r1, #0xff
_022DA120:
	and lr, r7, #0xff
	ldrb r0, [ip, lr]
	mov r5, lr
	ldrb r6, [r4, r7]
	cmp r0, #0xff
	beq _022DA164
_022DA138:
	add r3, ip, r5
	ldrb r5, [ip, r5]
	ldrb r0, [ip, lr]
	ldrb r2, [r4, r5]
	mov lr, r5
	strb r6, [r4, r0]
	strb r1, [r3]
	ldrb r0, [ip, r5]
	mov r6, r2
	cmp r0, #0xff
	bne _022DA138
_022DA164:
	add r7, r7, #1
	cmp r7, #0x18
	blt _022DA120
	ldr r0, _022DA1A4 ; =ov00_02318B0C
	mov r3, #0
_022DA178:
	ldr r1, [r0]
	ldrb r2, [r4, r3]
	ldrsb r1, [r1, r3]
	eor r1, r2, r1
	strb r1, [r4, r3]
	add r3, r3, #1
	cmp r3, #0x18
	blt _022DA178
	add sp, sp, #0x18
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022DA1A0: .word ov00_0231822B
_022DA1A4: .word ov00_02318B0C
	arm_func_end ov00_022DA0A4

	arm_func_start ov00_022DA1A8
ov00_022DA1A8: ; 0x022DA1A8
	stmdb sp!, {r4, r5, lr}
	sub sp, sp, #0x6c
	mov r5, r0
	add r0, sp, #0x14
	mov r4, r1
	bl MD5_Init
	add r0, sp, #0x14
	mov r1, r5
	mov r2, #0x18
	bl MD5_Update
	add r0, sp, #0
	add r1, sp, #0x14
	bl MD5_Digest
	add r0, sp, #3
	mov r1, r4
	mov r2, #0xd
	bl MemcpyFast
	add sp, sp, #0x6c
	ldmia sp!, {r4, r5, pc}
	arm_func_end ov00_022DA1A8

	arm_func_start ov00_022DA1F4
ov00_022DA1F4: ; 0x022DA1F4
	stmdb sp!, {r4, lr}
	sub sp, sp, #0x10
	ldr lr, _022DA390 ; =0x92492493
	mov r4, r1
	mov r1, #0
	mov ip, #7
_022DA20C:
	smull r2, r3, lr, r1
	add r3, r1, r3
	mov r2, r1, lsr #0x1f
	add r3, r2, r3, asr #2
	smull r2, r3, ip, r3
	sub r3, r1, r2
	add r2, r0, r3
	ldrb r3, [r0, r1]
	ldrb r2, [r2, #0xd]
	eor r2, r3, r2
	strb r2, [r4, r1]
	add r1, r1, #1
	cmp r1, #0xd
	blt _022DA20C
	mov ip, #0
_022DA248:
	add r3, r4, ip
	add r1, r0, ip
	ldrb r2, [r3, #3]
	ldrb r1, [r1, #0xd]
	add ip, ip, #1
	cmp ip, #7
	eor r1, r2, r1
	strb r1, [r3, #3]
	blt _022DA248
	ldr r0, _022DA394 ; =ov00_02318B0C
	mov r3, #0
_022DA274:
	ldr r1, [r0, #4]
	ldrb r2, [r4, r3]
	ldrsb r1, [r1, r3]
	eor r1, r2, r1
	strb r1, [r4, r3]
	add r3, r3, #1
	cmp r3, #0xd
	blt _022DA274
	add r1, sp, #0
	mov r0, r4
	mov r2, #0xd
	bl MemcpyFast
	ldr r3, _022DA398 ; =ov00_02318244
	add r2, sp, #0
	mov ip, #0
_022DA2B0:
	ldrb r1, [r2], #1
	ldrb r0, [r3], #1
	add ip, ip, #1
	cmp ip, #0xd
	strb r1, [r4, r0]
	blt _022DA2B0
	ldr r0, _022DA394 ; =ov00_02318B0C
	mov r3, #0
_022DA2D0:
	ldr r1, [r0, #0xc]
	ldrb r2, [r4, r3]
	ldrsb r1, [r1, r3]
	eor r1, r2, r1
	strb r1, [r4, r3]
	add r3, r3, #1
	cmp r3, #0xd
	blt _022DA2D0
	ldr r2, _022DA39C ; =ov00_02318254
	mov ip, #0
_022DA2F8:
	ldrb r3, [r4, ip]
	mov r0, r3, asr #4
	and r1, r0, #0xf
	and r0, r3, #0xf
	ldrb r1, [r2, r1]
	ldrb r0, [r2, r0]
	orr r0, r0, r1, lsl #4
	strb r0, [r4, ip]
	add ip, ip, #1
	cmp ip, #0xd
	blt _022DA2F8
	mov r1, #0
_022DA328:
	add r0, r4, r1
	ldrb r3, [r4, r1]
	ldrb r2, [r0, #6]
	eor r2, r3, r2
	strb r2, [r4, r1]
	ldrb r3, [r0, #3]
	ldrb r2, [r0, #9]
	eor r2, r3, r2
	strb r2, [r0, #3]
	ldrb r3, [r0, #6]
	and r2, r2, #0xff
	eor r2, r3, r2
	strb r2, [r0, #6]
	ldrb r3, [r0, #9]
	ldrb r2, [r4, r1]
	eor r2, r3, r2
	strb r2, [r0, #9]
	ldrb r0, [r4, r1]
	ldrb r2, [r4, #0xc]
	add r1, r1, #1
	cmp r1, #3
	eor r0, r2, r0
	strb r0, [r4, #0xc]
	blt _022DA328
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
	.align 2, 0
_022DA390: .word 0x92492493
_022DA394: .word ov00_02318B0C
_022DA398: .word ov00_02318244
_022DA39C: .word ov00_02318254
	arm_func_end ov00_022DA1F4

	arm_func_start ov00_022DA3A0
ov00_022DA3A0: ; 0x022DA3A0
	cmp r0, #0x41
	blo _022DA3B4
	cmp r0, #0x5a
	subls r0, r0, #0x41
	bxls lr
_022DA3B4:
	cmp r0, #0x61
	blo _022DA3CC
	cmp r0, #0x7a
	subls r0, r0, #0x61
	addls r0, r0, #0x1a
	bxls lr
_022DA3CC:
	cmp r0, #0x30
	blo _022DA3E4
	cmp r0, #0x39
	subls r0, r0, #0x30
	addls r0, r0, #0x34
	bxls lr
_022DA3E4:
	cmp r0, #0x2b
	moveq r0, #0x3e
	bxeq lr
	cmp r0, #0x2f
	moveq r0, #0x3f
	bxeq lr
	cmp r0, #0x3d
	movne r0, #1
	moveq r0, #0
	rsb r0, r0, #0
	bx lr
	arm_func_end ov00_022DA3A0

	arm_func_start ov00_022DA410
ov00_022DA410: ; 0x022DA410
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x18
	add r4, r2, r2, lsl #1
	str r0, [sp]
	mov r0, r4, lsr #2
	str r1, [sp, #4]
	cmp r3, r4, lsr #2
	str r0, [sp, #8]
	blo _022DA444
	and fp, r2, #3
	sub r0, r2, fp
	str r0, [sp, #0xc]
	b _022DA450
_022DA444:
	add sp, sp, #0x18
	mvn r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022DA450:
	cmp r0, #0
	mov r7, #0
	ble _022DA4D8
	mov sb, r7
	add r5, sp, #0x14
	mov r4, #6
_022DA468:
	ldr r0, [sp]
	mov r6, #0
	mov r8, r6
	add sl, r0, r7
_022DA478:
	ldrb r0, [sl], #1
	bl ov00_022DA3A0
	rsb r1, r8, #3
	mul r2, r1, r4
	orr r6, r6, r0, lsl r2
	add r8, r8, #1
	cmp r8, #4
	blt _022DA478
	ldr r0, [sp, #4]
	add r1, sb, sb, lsl #1
	mov r2, #0
	str r6, [sp, #0x14]
	add r1, r0, r1
_022DA4AC:
	rsb r0, r2, #2
	ldrb r0, [r5, r0]
	add r2, r2, #1
	cmp r2, #3
	strb r0, [r1], #1
	blt _022DA4AC
	ldr r0, [sp, #0xc]
	add r7, r7, #4
	cmp r7, r0
	add sb, sb, #1
	blt _022DA468
_022DA4D8:
	cmp fp, #0
	beq _022DA56C
	mov r5, #0
	mov r6, r5
	str r5, [sp, #0x10]
	ble _022DA52C
	ldr r1, [sp]
	ldr r0, [sp, #0xc]
	mov r8, r5
	add r4, r1, r0
	mov r7, #6
_022DA504:
	ldrb r0, [r4], #1
	bl ov00_022DA3A0
	rsb r1, r6, #3
	mul r2, r1, r7
	orr r5, r5, r0, lsl r2
	add r6, r6, #1
	cmp r6, fp
	orr r8, r8, r5
	blt _022DA504
	str r8, [sp, #0x10]
_022DA52C:
	cmp fp, #0
	mov r3, #0
	ble _022DA56C
	ldr r0, [sp, #0xc]
	add r1, r0, r0, lsl #1
	mov r0, r1, asr #1
	add r1, r1, r0, lsr #30
	ldr r0, [sp, #4]
	add r2, r0, r1, asr #2
	add r1, sp, #0x10
_022DA554:
	rsb r0, r3, #2
	ldrb r0, [r1, r0]
	add r3, r3, #1
	cmp r3, fp
	strb r0, [r2], #1
	blt _022DA554
_022DA56C:
	ldr r0, [sp, #8]
	add sp, sp, #0x18
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022DA410

	arm_func_start ov00_022DA578
ov00_022DA578: ; 0x022DA578
	tst r0, #2
	mov r0, r0, asr #2
	addeq r0, r0, #0x19
	and r0, r0, #0xff
	bx lr
	arm_func_end ov00_022DA578

	arm_func_start ov00_022DA58C
ov00_022DA58C: ; 0x022DA58C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #8
	ldr r1, _022DA86C ; =ov00_02326CA4
	mov r6, r0
	ldr r0, [r1]
	mov r1, #0x400
	add r0, r0, #0xf00
	bl DC_InvalidateRange
	ldrh r0, [r6, #2]
	cmp r0, #0
	ldreqh r0, [r6, #8]
	cmpeq r0, #5
	bne _022DA830
	ldrh r0, [r6, #0xe]
	mov r5, #0
	cmp r0, #0
	bls _022DA830
_022DA5D0:
	add r0, r6, r5, lsl #2
	ldr r0, [r0, #0x10]
	ldrh r1, [r0, #0x40]
	cmp r1, #1
	ldreq r2, [r0, #0x44]
	ldreq r1, _022DA870 ; =0x00000857
	cmpeq r2, r1
	bne _022DA820
	ldr r1, _022DA86C ; =ov00_02326CA4
	mov r4, #0
	ldr ip, [r1]
	mov r3, r4
	add r2, ip, #0x1000
	ldr r1, [r2, #0xa88]
	cmp r1, #0
	bls _022DA63C
	ldrh r7, [r0, #0x48]
_022DA614:
	add r1, ip, r3, lsl #1
	add r1, r1, #0x1a00
	ldrh r1, [r1, #0x68]
	cmp r1, r7
	moveq r4, #1
	beq _022DA63C
	ldr r1, [r2, #0xa88]
	add r3, r3, #1
	cmp r3, r1
	blo _022DA614
_022DA63C:
	cmp r4, #1
	beq _022DA820
	ldr r1, _022DA86C ; =ov00_02326CA4
	mov r2, #0x70
	ldr r1, [r1]
	add r0, r0, #0x50
	add r3, r1, #0x1000
	add r1, r1, #0x348
	ldr r3, [r3, #0xa8c]
	add r1, r1, #0x1000
	mla r1, r3, r2, r1
	bl MemcpyFast
	ldr r0, _022DA874 ; =ov00_02318264
	add r1, sp, #0
	mov r2, #4
	bl MemcpyFast
	add r0, r6, r5, lsl #2
	ldr r0, [r0, #0x10]
	add r1, sp, #4
	add r0, r0, #6
	mov r2, #4
	bl MemcpyFast
	ldr r0, _022DA86C ; =ov00_02326CA4
	add r1, sp, #0
	ldr r0, [r0]
	mov r2, #8
	add r0, r0, #0x96
	add r0, r0, #0x1c00
	bl CRYPTO_RC4Init
	ldr r0, _022DA86C ; =ov00_02326CA4
	mov r2, #0x70
	ldr r3, [r0]
	add r0, r3, #0x348
	add r4, r0, #0x1000
	add r0, r3, #0x1000
	ldr r1, [r0, #0xa8c]
	add r0, r3, #0x96
	mul r3, r1, r2
	add r1, r4, r3
	add r0, r0, #0x1c00
	add r3, r4, r3
	bl Crypto_RC4Encrypt
	ldr r0, _022DA86C ; =ov00_02326CA4
	mov r1, #0x70
	ldr ip, [r0]
	mov r3, #0x6e
	add r0, ip, #0x348
	add r4, r0, #0x1000
	add r0, ip, #0x1000
	ldr r2, [r0, #0xa8c]
	add r0, ip, #0x96
	mul r7, r2, r1
	add r1, ip, #0x294
	add r0, r0, #0x1a00
	add r1, r1, #0x1800
	add r2, r4, r7
	bl sub_02085074
	ldr r0, _022DA86C ; =ov00_02326CA4
	add r1, r4, r7
	ldr r0, [r0]
	mov r2, #0x6e
	add r0, r0, #0x96
	add r0, r0, #0x1a00
	bl sub_02085158
	ldr r1, _022DA86C ; =ov00_02326CA4
	mov r2, #0x70
	ldr r4, [r1]
	add r1, r4, #0x1000
	ldr r1, [r1, #0xa8c]
	mul r3, r1, r2
	add r1, r4, r3
	add r1, r1, #0x1300
	ldrh r1, [r1, #0xb6]
	cmp r0, r1
	cmpne r1, #0
	beq _022DA784
	add r0, r4, #0x348
	add r0, r0, #0x1000
	add r0, r0, r3
	mov r1, #0
	bl MemsetFast
	b _022DA820
_022DA784:
	add r0, r6, r5, lsl #2
	ldr r0, [r0, #0x10]
	ldrh r0, [r0, #2]
	and r0, r0, #0xff
	bl ov00_022DA578
	add r1, r4, #0x1000
	ldr r1, [r1, #0xa8c]
	ldr r3, _022DA86C ; =ov00_02326CA4
	add r1, r4, r1, lsl #1
	add r1, r1, #0x1a00
	strh r0, [r1, #0x48]
	ldr r2, [r3]
	add r1, r6, r5, lsl #2
	add r0, r2, #0x1000
	ldr r1, [r1, #0x10]
	ldr r0, [r0, #0xa8c]
	ldrh r1, [r1, #0x48]
	add r0, r2, r0, lsl #1
	add r0, r0, #0x1a00
	strh r1, [r0, #0x68]
	ldr r0, [r3]
	add r2, r0, #0x1000
	ldr r0, [r2, #0xa8c]
	add r0, r0, #1
	mov r1, r0, lsr #0x1f
	rsb r0, r1, r0, lsl #28
	add r0, r1, r0, ror #28
	str r0, [r2, #0xa8c]
	ldr r0, [r3]
	add r0, r0, #0x1000
	ldr r1, [r0, #0xa88]
	add r1, r1, #1
	str r1, [r0, #0xa88]
	ldr r0, [r3]
	add r0, r0, #0x1000
	ldr r1, [r0, #0xa88]
	cmp r1, #0x10
	movgt r1, #0x10
	strgt r1, [r0, #0xa88]
_022DA820:
	ldrh r0, [r6, #0xe]
	add r5, r5, #1
	cmp r5, r0
	blo _022DA5D0
_022DA830:
	ldr r1, _022DA86C ; =ov00_02326CA4
	mov r2, #2
	ldr r0, [r1]
	add r0, r0, #0x1000
	str r2, [r0, #0xa90]
	ldr r0, [r1]
	add r0, r0, #0x1000
	ldr r1, [r0, #0x344]
	cmp r1, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r0, r6
	blx r1
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022DA86C: .word ov00_02326CA4
_022DA870: .word 0x00000857
_022DA874: .word ov00_02318264
	arm_func_end ov00_022DA58C

	arm_func_start ov00_022DA878
ov00_022DA878: ; 0x022DA878
	ldr r0, _022DA880 ; =0x00001DA0
	bx lr
	.align 2, 0
_022DA880: .word 0x00001DA0
	arm_func_end ov00_022DA878

	arm_func_start ov00_022DA884
ov00_022DA884: ; 0x022DA884
	stmdb sp!, {r4, r5, r6, lr}
	movs r6, r1
	mov r5, r2
	mov r4, r3
	mvneq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	ldr r1, _022DA914 ; =ov00_02326CA4
	str r0, [r1]
	bl ov00_022DA878
	ldr r1, _022DA914 ; =ov00_02326CA4
	mov r2, r0
	ldr r0, [r1]
	mov r1, #0
	bl MemsetFast
	ldr r2, _022DA914 ; =ov00_02326CA4
	mov r3, #0
	ldr r0, [r2]
	ldr r1, _022DA918 ; =0x0000A001
	add r0, r0, #0x1000
	str r3, [r0, #0xa90]
	ldr r0, [r2]
	add r0, r0, #0x1a00
	strh r3, [r0, #0x94]
	ldr r0, [r2]
	add r0, r0, #0x96
	add r0, r0, #0x1a00
	bl sub_02085030
	ldr r0, _022DA914 ; =ov00_02326CA4
	mov r1, r6
	ldr r0, [r0]
	mov r2, r5
	mov r3, r4
	bl ov00_022BFB24
	cmp r0, #2
	moveq r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022DA914: .word ov00_02326CA4
_022DA918: .word 0x0000A001
	arm_func_end ov00_022DA884

	arm_func_start ov00_022DA91C
ov00_022DA91C: ; 0x022DA91C
	stmdb sp!, {r3, lr}
	cmp r0, #0
	mvneq r0, #0
	ldmeqia sp!, {r3, pc}
	ldr r2, _022DA958 ; =ov00_02326CA4
	mov ip, #3
	ldr r1, [r2]
	mov r3, #0
	add r1, r1, #0x1000
	str ip, [r1, #0xa90]
	str r3, [r2]
	bl ov00_022BFBD4
	cmp r0, #2
	moveq r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022DA958: .word ov00_02326CA4
	arm_func_end ov00_022DA91C

	arm_func_start ov00_022DA95C
ov00_022DA95C: ; 0x022DA95C
	stmdb sp!, {r4, lr}
	movs r4, r0
	mvneq r0, #0
	ldmeqia sp!, {r4, pc}
	ldr r1, _022DAA1C ; =ov00_02326CA4
	mov r2, #0x400
	ldr r0, [r1]
	add r3, r0, #0xf00
	add r0, r0, #0x1000
	str r3, [r0, #0x300]
	ldr r0, [r1]
	add r0, r0, #0x1300
	strh r2, [r0, #4]
	bl ov00_022BF640
	ldr r1, _022DAA1C ; =ov00_02326CA4
	ldr r1, [r1]
	add r1, r1, #0x1300
	strh r0, [r1, #6]
	bl ov00_022BF780
	ldr r3, _022DAA1C ; =ov00_02326CA4
	mov ip, #1
	ldr r2, [r3]
	mov r1, #0xff
	add r2, r2, #0x1300
	strh r0, [r2, #8]
	ldr r0, [r3]
	mov r2, #6
	add r0, r0, #0x1300
	strh ip, [r0, #0x10]
	ldr r0, [r3]
	add r0, r0, #0xa
	add r0, r0, #0x1300
	bl MemsetFast
	ldr r2, _022DAA1C ; =ov00_02326CA4
	mov r3, #1
	ldr r1, [r2]
	ldr r0, _022DAA20 ; =ov00_022DA58C
	add r1, r1, #0x1000
	str r4, [r1, #0x344]
	ldr r1, [r2]
	add r1, r1, #0x1000
	str r3, [r1, #0xa90]
	ldr r1, [r2]
	add r1, r1, #0x1300
	bl ov00_022BFED8
	cmp r0, #2
	moveq r0, #0
	ldmia sp!, {r4, pc}
	.align 2, 0
_022DAA1C: .word ov00_02326CA4
_022DAA20: .word ov00_022DA58C
	arm_func_end ov00_022DA95C

	arm_func_start ov00_022DAA24
ov00_022DAA24: ; 0x022DAA24
	stmdb sp!, {r3, lr}
	cmp r0, #0
	mvneq r0, #0
	ldmeqia sp!, {r3, pc}
	ldr r1, _022DAA58 ; =ov00_02326CA4
	mov r2, #2
	ldr r1, [r1]
	add r1, r1, #0x1000
	str r2, [r1, #0xa90]
	bl ov00_022C0028
	cmp r0, #2
	moveq r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022DAA58: .word ov00_02326CA4
	arm_func_end ov00_022DAA24

	arm_func_start ov00_022DAA5C
ov00_022DAA5C: ; 0x022DAA5C
	stmdb sp!, {r3, r4, r5, lr}
	ldr r2, _022DAAF4 ; =ov00_02326CA4
	mov r5, r0
	ldr r0, [r2]
	mov r4, r1
	add r0, r0, #0x1000
	ldr r1, [r0, #0xa90]
	cmp r1, #2
	mvnne r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	cmp r5, #0
	blt _022DAA98
	ldr r0, [r0, #0xa88]
	cmp r5, r0
	blt _022DAAA0
_022DAA98:
	mvn r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022DAAA0:
	mov r0, r4
	mov r1, #0
	mov r2, #0x78
	bl MemsetFast
	mov r0, #1
	ldr r3, _022DAAF4 ; =ov00_02326CA4
	str r0, [r4]
	ldr r0, [r3]
	mov r2, #0x70
	add r0, r0, r5, lsl #1
	add r0, r0, #0x1a00
	ldrh r0, [r0, #0x48]
	add r1, r4, #6
	strh r0, [r4, #4]
	ldr r0, [r3]
	add r0, r0, #0x348
	add r0, r0, #0x1000
	mla r0, r5, r2, r0
	bl MemcpyFast
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022DAAF4: .word ov00_02326CA4
	arm_func_end ov00_022DAA5C

	arm_func_start ov00_022DAAF8
ov00_022DAAF8: ; 0x022DAAF8
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr r1, _022DAB98 ; =ov00_02326CA4
	mov r5, r0
	ldr r1, [r1]
	add r1, r1, #0x1000
	ldr r1, [r1, #0xa90]
	cmp r1, #2
	mvnne r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	mov r1, #0
	mov r2, #0x780
	bl MemsetFast
	mov r0, #0
	mov r1, r5
	mov r4, r0
_022DAB34:
	add r0, r0, #1
	cmp r0, #0x10
	str r4, [r1], #0x78
	blt _022DAB34
	ldr r7, _022DAB98 ; =ov00_02326CA4
	ldr r0, [r7]
	add r0, r0, #0x1000
	ldr r0, [r0, #0xa88]
	cmp r0, #0
	ble _022DAB90
	mvn r6, #0
_022DAB60:
	mov r0, r4
	mov r1, r5
	bl ov00_022DAA5C
	cmp r0, r6
	beq _022DAB90
	ldr r0, [r7]
	add r4, r4, #1
	add r0, r0, #0x1000
	ldr r0, [r0, #0xa88]
	add r5, r5, #0x78
	cmp r4, r0
	blt _022DAB60
_022DAB90:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022DAB98: .word ov00_02326CA4
	arm_func_end ov00_022DAAF8

	arm_func_start ov00_022DAB9C
ov00_022DAB9C: ; 0x022DAB9C
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	bl ov00_022DA878
	mov r1, r0
	mov r0, #1
	bl ov00_022E03F0
	ldr r2, _022DAC04 ; =ov00_02326CA8
	ldr r1, _022DAC08 ; =0x00000794
	str r0, [r2, #4]
	mov r0, #1
	bl ov00_022E03F0
	ldr r2, _022DAC04 ; =ov00_02326CA8
	mov r1, #0
	str r0, [r2]
	ldr r2, _022DAC08 ; =0x00000794
	bl MemsetFast
	ldr r1, _022DAC04 ; =ov00_02326CA8
	mov r2, #0
	ldr r3, [r1]
	mov r0, #1
	str r5, [r3]
	ldr r3, [r1]
	str r4, [r3, #0x790]
	str r2, [r1, #8]
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022DAC04: .word ov00_02326CA8
_022DAC08: .word 0x00000794
	arm_func_end ov00_022DAB9C

	arm_func_start ov00_022DAC0C
ov00_022DAC0C: ; 0x022DAC0C
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	ldr r1, _022DAF24 ; =ov00_02326CA8
	ldr r0, [r1, #4]
	cmp r0, #0
	ldrne r3, [r1]
	cmpne r3, #0
	moveq r0, #3
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r2, [r1, #8]
	mov r6, #1
	cmp r2, #0xb
	addls pc, pc, r2, lsl #2
	b _022DAF1C
_022DAC40: ; jump table
	b _022DAC70 ; case 0
	b _022DAF1C ; case 1
	b _022DAC9C ; case 2
	b _022DAF1C ; case 3
	b _022DACF4 ; case 4
	b _022DAD58 ; case 5
	b _022DAF1C ; case 6
	b _022DAD80 ; case 7
	b _022DAF1C ; case 8
	b _022DAE54 ; case 9
	b _022DAEF0 ; case 10
	b _022DAF18 ; case 11
_022DAC70:
	str r6, [r1, #8]
	ldr r3, [r3, #0x790]
	ldr r1, _022DAF28 ; =ov00_022DAFF0
	mov r2, #0
	bl ov00_022DA884
	cmp r0, #0
	beq _022DAF1C
	ldr r0, _022DAF24 ; =ov00_02326CA8
	mov r1, #0xb
	str r1, [r0, #8]
	b _022DAF1C
_022DAC9C:
	ldr r0, _022DAF2C ; =ov00_022DB004
	mov r2, #3
	str r2, [r1, #8]
	bl ov00_022DA95C
	cmp r0, #0
	bne _022DACE4
	ldr r0, _022DAF24 ; =ov00_02326CA8
	ldr r1, [r0]
	ldr r0, [r1, #8]
	ldr r1, [r1, #4]
	cmp r0, #0
	cmpeq r1, #0
	bne _022DAF1C
	bl sub_0207AE44
	ldr r2, _022DAF24 ; =ov00_02326CA8
	ldr r2, [r2]
	stmib r2, {r0, r1}
	b _022DAF1C
_022DACE4:
	ldr r0, _022DAF24 ; =ov00_02326CA8
	mov r1, #0xa
	str r1, [r0, #8]
	b _022DAF1C
_022DACF4:
	bl sub_0207AE44
	ldr r3, _022DAF24 ; =ov00_02326CA8
	ldr r2, _022DAF30 ; =0x000082EA
	ldr r4, [r3]
	mov r3, #0
	ldr r5, [r4, #4]
	ldr r4, [r4, #8]
	subs r5, r0, r5
	sbc r0, r1, r4
	mov r1, r0, lsl #6
	orr r1, r1, r5, lsr #26
	mov r0, r5, lsl #6
	bl _ll_udiv
	ldr r2, _022DAF34 ; =0x00000BB8
	cmp r1, #0
	cmpeq r0, r2
	bhs _022DAD48
	ldr r0, _022DAF24 ; =ov00_02326CA8
	mov r1, #2
	str r1, [r0, #8]
	b _022DAF1C
_022DAD48:
	ldr r0, _022DAF24 ; =ov00_02326CA8
	mov r1, #5
	str r1, [r0, #8]
	b _022DAF1C
_022DAD58:
	ldr r0, _022DAF38 ; =ov00_022DB018
	mov r2, #6
	str r2, [r1, #8]
	bl ov00_022DAA24
	cmp r0, #0
	beq _022DAF1C
	ldr r0, _022DAF24 ; =ov00_02326CA8
	mov r1, #0xa
	str r1, [r0, #8]
	b _022DAF1C
_022DAD80:
	add r0, r3, #0xc
	bl ov00_022DAAF8
	cmp r0, #0
	mov r4, #0
	ldrne r0, _022DAF24 ; =ov00_02326CA8
	movne r1, #0xa
	strne r1, [r0, #8]
	ldr r8, _022DAF24 ; =ov00_02326CA8
	sub r1, r4, #1
	ldr r0, [r8]
	mov r5, r4
	mov r7, r4
	str r1, [r0, #0x78c]
_022DADB4:
	ldr r2, [r8]
	add r1, r2, r7
	ldr r0, [r1, #0xc]
	cmp r0, #0
	beq _022DAE18
	ldrb r0, [r1, #0x78]
	tst r0, #2
	beq _022DAE18
	ldrb r0, [r1, #0x77]
	cmp r0, #3
	bhi _022DAE18
	add r0, r2, #0x32
	add r0, r0, r7
	bl ov00_022DAFBC
	cmp r0, #0
	beq _022DAE18
	ldr r1, [r8]
	add r0, r1, r7
	ldrh r0, [r0, #0x10]
	cmp r0, r5
	blo _022DAE18
	str r4, [r1, #0x78c]
	ldr r0, [r8]
	add r0, r0, r7
	ldrh r5, [r0, #0x10]
_022DAE18:
	add r4, r4, #1
	cmp r4, #0x10
	add r7, r7, #0x78
	blt _022DADB4
	ldr r1, _022DAF24 ; =ov00_02326CA8
	mov r2, #8
	ldr r0, _022DAF3C ; =ov00_022DB02C
	str r2, [r1, #8]
	bl ov00_022DA91C
	cmp r0, #0
	beq _022DAF1C
	ldr r0, _022DAF24 ; =ov00_02326CA8
	mov r1, #0xb
	str r1, [r0, #8]
	b _022DAF1C
_022DAE54:
	ldr r2, [r3, #0x78c]
	cmp r2, #0
	movlt r0, #0xb
	strlt r0, [r1, #8]
	blt _022DAF1C
	add r1, r3, #0x12
	mov r0, #0x78
	mla r0, r2, r0, r1
	ldr r1, [r3]
	mov r2, #0x20
	bl MemcpyFast
	ldr r1, _022DAF24 ; =ov00_02326CA8
	mov r0, #0x78
	ldr r4, [r1]
	mov r2, #0x20
	ldr r1, [r4]
	ldr r3, [r4, #0x78c]
	add r4, r4, #0x56
	mla r0, r3, r0, r4
	add r1, r1, #0x20
	bl MemcpyFast
	ldr r1, _022DAF24 ; =ov00_02326CA8
	mov r0, #0x78
	ldr r4, [r1]
	mov r2, #0xa
	ldr r5, [r4, #0x78c]
	ldr r3, [r4]
	mla r4, r5, r0, r4
	ldrb r4, [r4, #0x77]
	str r4, [r3, #0x40]
	ldr r4, [r1]
	ldr r1, [r4]
	ldr r3, [r4, #0x78c]
	add r4, r4, #0x32
	mla r0, r3, r0, r4
	add r1, r1, #0x44
	bl MemcpyFast
	mov r6, #2
	b _022DAF1C
_022DAEF0:
	ldr r0, _022DAF40 ; =ov00_022DB040
	mov r2, #8
	str r2, [r1, #8]
	bl ov00_022DA91C
	cmp r0, #0
	beq _022DAF1C
	ldr r0, _022DAF24 ; =ov00_02326CA8
	mov r1, #0xb
	str r1, [r0, #8]
	b _022DAF1C
_022DAF18:
	mov r6, #3
_022DAF1C:
	mov r0, r6
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022DAF24: .word ov00_02326CA8
_022DAF28: .word ov00_022DAFF0
_022DAF2C: .word ov00_022DB004
_022DAF30: .word 0x000082EA
_022DAF34: .word 0x00000BB8
_022DAF38: .word ov00_022DB018
_022DAF3C: .word ov00_022DB02C
_022DAF40: .word ov00_022DB040
	arm_func_end ov00_022DAC0C

	arm_func_start ov00_022DAF44
ov00_022DAF44: ; 0x022DAF44
	ldr r0, _022DAF5C ; =ov00_02326CA8
	ldr r1, [r0, #8]
	cmp r1, #4
	moveq r1, #5
	streq r1, [r0, #8]
	bx lr
	.align 2, 0
_022DAF5C: .word ov00_02326CA8
	arm_func_end ov00_022DAF44

	arm_func_start ov00_022DAF60
ov00_022DAF60: ; 0x022DAF60
	stmdb sp!, {r3, lr}
	ldr r0, _022DAFB8 ; =ov00_02326CA8
	ldr r1, [r0, #4]
	cmp r1, #0
	beq _022DAF8C
	mov r0, #1
	mov r2, #0
	bl ov00_022E0434
	ldr r0, _022DAFB8 ; =ov00_02326CA8
	mov r1, #0
	str r1, [r0, #4]
_022DAF8C:
	ldr r0, _022DAFB8 ; =ov00_02326CA8
	ldr r1, [r0]
	cmp r1, #0
	ldmeqia sp!, {r3, pc}
	mov r0, #1
	mov r2, #0
	bl ov00_022E0434
	ldr r0, _022DAFB8 ; =ov00_02326CA8
	mov r1, #0
	str r1, [r0]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022DAFB8: .word ov00_02326CA8
	arm_func_end ov00_022DAF60

	arm_func_start ov00_022DAFBC
ov00_022DAFBC: ; 0x022DAFBC
	mov r2, #0
_022DAFC0:
	ldrb r1, [r0, r2]
	cmp r1, #0x20
	blo _022DAFD4
	cmp r1, #0x7e
	bls _022DAFDC
_022DAFD4:
	mov r0, #0
	bx lr
_022DAFDC:
	add r2, r2, #1
	cmp r2, #0xa
	blt _022DAFC0
	mov r0, #1
	bx lr
	arm_func_end ov00_022DAFBC

	arm_func_start ov00_022DAFF0
ov00_022DAFF0: ; 0x022DAFF0
	ldr r0, _022DB000 ; =ov00_02326CA8
	mov r1, #2
	str r1, [r0, #8]
	bx lr
	.align 2, 0
_022DB000: .word ov00_02326CA8
	arm_func_end ov00_022DAFF0

	arm_func_start ov00_022DB004
ov00_022DB004: ; 0x022DB004
	ldr r0, _022DB014 ; =ov00_02326CA8
	mov r1, #4
	str r1, [r0, #8]
	bx lr
	.align 2, 0
_022DB014: .word ov00_02326CA8
	arm_func_end ov00_022DB004

	arm_func_start ov00_022DB018
ov00_022DB018: ; 0x022DB018
	ldr r0, _022DB028 ; =ov00_02326CA8
	mov r1, #7
	str r1, [r0, #8]
	bx lr
	.align 2, 0
_022DB028: .word ov00_02326CA8
	arm_func_end ov00_022DB018

	arm_func_start ov00_022DB02C
ov00_022DB02C: ; 0x022DB02C
	ldr r0, _022DB03C ; =ov00_02326CA8
	mov r1, #9
	str r1, [r0, #8]
	bx lr
	.align 2, 0
_022DB03C: .word ov00_02326CA8
	arm_func_end ov00_022DB02C

	arm_func_start ov00_022DB040
ov00_022DB040: ; 0x022DB040
	ldr r0, _022DB050 ; =ov00_02326CA8
	mov r1, #0xb
	str r1, [r0, #8]
	bx lr
	.align 2, 0
_022DB050: .word ov00_02326CA8
	arm_func_end ov00_022DB040

	arm_func_start ov00_022DB054
ov00_022DB054: ; 0x022DB054
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	ldr r0, _022DB0CC ; =_02000C34
	mov r5, #0
	bl OSi_ReferSymbol
	mov r0, r6
	bl ov00_022EE018
	mov r4, r0
	bl ov00_022EEAB4
	cmp r0, #0
	beq _022DB08C
	mov r0, r6
	bl ov00_022EE82C
	mov r5, #1
_022DB08C:
	cmp r4, #0
	bge _022DB0A4
	cmp r5, #0
	movne r4, #2
	moveq r4, #3
	b _022DB0B0
_022DB0A4:
	cmp r5, #0
	movne r4, #1
	moveq r4, #0
_022DB0B0:
	ldr r0, _022DB0D0 ; =ov00_022E04F0
	ldr r1, _022DB0D4 ; =ov00_022E0520
	ldr r2, _022DB0D8 ; =ov00_022E0504
	ldr r3, _022DB0DC ; =ov00_022E0538
	bl ov00_022F5AC8
	mov r0, r4
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022DB0CC: .word _02000C34
_022DB0D0: .word ov00_022E04F0
_022DB0D4: .word ov00_022E0520
_022DB0D8: .word ov00_022E0504
_022DB0DC: .word ov00_022E0538
	arm_func_end ov00_022DB054

	arm_func_start ov00_022DB0E0
ov00_022DB0E0: ; 0x022DB0E0
	mvn ip, r3
	tst r1, ip
	movne r0, #0
	bxne lr
	mvn r3, r3, lsl r2
	ldr ip, [r0]
	and r3, ip, r3
	orr r1, r3, r1, lsl r2
	str r1, [r0]
	mov r0, #1
	bx lr
	arm_func_end ov00_022DB0E0

	arm_func_start ov00_022DB10C
ov00_022DB10C: ; 0x022DB10C
	ldr r2, [r0]
	ldr r1, _022DB128 ; =0x000007FF
	ldr r0, [r0, #4]
	and r1, r2, r1
	orr r1, r1, #0
	orr r0, r0, #0
	bx lr
	.align 2, 0
_022DB128: .word 0x000007FF
	arm_func_end ov00_022DB10C

	arm_func_start ov00_022DB12C
ov00_022DB12C: ; 0x022DB12C
	ldr r0, [r0, #8]
	bx lr
	arm_func_end ov00_022DB12C

	arm_func_start ov00_022DB134
ov00_022DB134: ; 0x022DB134
	ldr r1, [r0, #8]
	ldr r0, [r0, #4]
	orr r1, r1, #0
	orr r0, r0, #0
	bx lr
	arm_func_end ov00_022DB134

	arm_func_start ov00_022DB148
ov00_022DB148: ; 0x022DB148
	ldr r0, [r0, #4]
	bx lr
	arm_func_end ov00_022DB148

	arm_func_start ov00_022DB150
ov00_022DB150: ; 0x022DB150
	stmdb sp!, {r3, r4, r5, lr}
	ldr r3, _022DB174 ; =0x000007FF
	mov r4, r1
	mov r1, r2
	mov r2, #0
	mov r5, r0
	bl ov00_022DB0E0
	str r4, [r5, #4]
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022DB174: .word 0x000007FF
	arm_func_end ov00_022DB150

	arm_func_start ov00_022DB178
ov00_022DB178: ; 0x022DB178
	str r1, [r0, #8]
	bx lr
	arm_func_end ov00_022DB178

	arm_func_start ov00_022DB180
ov00_022DB180: ; 0x022DB180
	stmib r0, {r1, r2}
	bx lr
	arm_func_end ov00_022DB180

	arm_func_start ov00_022DB188
ov00_022DB188: ; 0x022DB188
	str r1, [r0, #4]
	bx lr
	arm_func_end ov00_022DB188

	arm_func_start ov00_022DB190
ov00_022DB190: ; 0x022DB190
	ldr r1, [r0]
	ldr r0, _022DB1A0 ; =0x001FFFFF
	and r0, r0, r1, lsr #11
	bx lr
	.align 2, 0
_022DB1A0: .word 0x001FFFFF
	arm_func_end ov00_022DB190

	arm_func_start ov00_022DB1A4
ov00_022DB1A4: ; 0x022DB1A4
	stmdb sp!, {r3, lr}
	bl ov00_022DB190
	and r0, r0, #3
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022DB1A4

	arm_func_start ov00_022DB1B4
ov00_022DB1B4: ; 0x022DB1B4
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022DB1E4
	cmp r0, #0
	beq _022DB1DC
	mov r0, r4
	bl ov00_022DB21C
	cmp r0, #0
	movne r0, #1
	ldmneia sp!, {r4, pc}
_022DB1DC:
	mov r0, #0
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022DB1B4

	arm_func_start ov00_022DB1E4
ov00_022DB1E4: ; 0x022DB1E4
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022DB1A4
	cmp r0, #3
	bne _022DB214
	mov r0, r4
	bl ov00_022DB190
	and r0, r0, #4
	cmp r0, #4
	moveq r0, #1
	movne r0, #0
	ldmia sp!, {r4, pc}
_022DB214:
	mov r0, #0
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022DB1E4

	arm_func_start ov00_022DB21C
ov00_022DB21C: ; 0x022DB21C
	stmdb sp!, {r3, lr}
	bl ov00_022DB190
	and r0, r0, #8
	cmp r0, #8
	moveq r0, #1
	movne r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022DB21C

	arm_func_start ov00_022DB238
ov00_022DB238: ; 0x022DB238
	stmdb sp!, {r3, lr}
	bl ov00_022DB190
	and r0, r0, #0x20
	cmp r0, #0x20
	moveq r0, #1
	movne r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022DB238

	arm_func_start ov00_022DB254
ov00_022DB254: ; 0x022DB254
	ldr ip, _022DB25C ; =ov00_022DB1A4
	bx ip
	.align 2, 0
_022DB25C: .word ov00_022DB1A4
	arm_func_end ov00_022DB254

	arm_func_start ov00_022DB260
ov00_022DB260: ; 0x022DB260
	ldr ip, _022DB270 ; =ov00_022DB0E0
	ldr r3, _022DB274 ; =0x001FFFFF
	mov r2, #0xb
	bx ip
	.align 2, 0
_022DB270: .word ov00_022DB0E0
_022DB274: .word 0x001FFFFF
	arm_func_end ov00_022DB260

	arm_func_start ov00_022DB278
ov00_022DB278: ; 0x022DB278
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	bl ov00_022DB190
	bic r1, r0, #3
	mov r0, r5
	orr r1, r1, r4
	bl ov00_022DB260
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022DB278

	arm_func_start ov00_022DB29C
ov00_022DB29C: ; 0x022DB29C
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022DB1A4
	cmp r0, #3
	ldmneia sp!, {r4, pc}
	mov r0, r4
	bl ov00_022DB190
	orr r1, r0, #4
	mov r0, r4
	bl ov00_022DB260
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022DB29C

	arm_func_start ov00_022DB2C8
ov00_022DB2C8: ; 0x022DB2C8
	stmdb sp!, {r4, lr}
	mov r4, r0
	cmp r1, #0
	beq _022DB2E4
	bl ov00_022DB190
	orr r1, r0, #8
	b _022DB2EC
_022DB2E4:
	bl ov00_022DB190
	bic r1, r0, #8
_022DB2EC:
	mov r0, r4
	bl ov00_022DB260
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022DB2C8

	arm_func_start ov00_022DB2F8
ov00_022DB2F8: ; 0x022DB2F8
	stmdb sp!, {r4, lr}
	mov r4, r0
	cmp r1, #0
	beq _022DB314
	bl ov00_022DB190
	orr r1, r0, #0x10
	b _022DB31C
_022DB314:
	bl ov00_022DB190
	bic r1, r0, #0x10
_022DB31C:
	mov r0, r4
	bl ov00_022DB260
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022DB2F8

	arm_func_start ov00_022DB328
ov00_022DB328: ; 0x022DB328
	stmdb sp!, {r4, lr}
	mov r4, r0
	cmp r1, #0
	beq _022DB344
	bl ov00_022DB190
	orr r1, r0, #0x20
	b _022DB34C
_022DB344:
	bl ov00_022DB190
	bic r1, r0, #0x20
_022DB34C:
	mov r0, r4
	bl ov00_022DB260
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022DB328

	arm_func_start ov00_022DB358
ov00_022DB358: ; 0x022DB358
	stmdb sp!, {r4, lr}
	sub sp, sp, #0x170
	mov r4, r0
	str r4, [sp]
	str r1, [sp, #4]
	cmp r2, #0
	beq _022DB37C
	cmp r2, #1
	b _022DB3A0
_022DB37C:
	add r0, sp, #0x70
	mov r1, #7
	bl sub_02084FB8
	add r0, sp, #0x70
	add r1, sp, #0
	mov r2, #8
	bl sub_02085130
	and r0, r0, #0x7f
	b _022DB3D0
_022DB3A0:
	add r0, sp, #0x18
	bl MD5_Init
	add r0, sp, #0x18
	add r1, sp, #0
	mov r2, #8
	bl MD5_Update
	add r0, sp, #8
	add r1, sp, #0x18
	bl MD5_Digest
	ldrb r0, [sp, #8]
	mov r0, r0, asr #1
	and r0, r0, #0x7f
_022DB3D0:
	orr r1, r0, #0
	orr r0, r4, #0
	add sp, sp, #0x170
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022DB358

	arm_func_start ov00_022DB3E0
ov00_022DB3E0: ; 0x022DB3E0
	ldr ip, _022DB3FC ; =ov00_022DB400
	mov r3, r0
	mov r0, r1
	mov r1, r2
	ldr r2, [r3, #0x24]
	mov r3, #0
	bx ip
	.align 2, 0
_022DB3FC: .word ov00_022DB400
	arm_func_end ov00_022DB3E0

	arm_func_start ov00_022DB400
ov00_022DB400: ; 0x022DB400
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r0, #0
	sub ip, r0, #1
	and ip, r5, ip
	mov r4, r1
	cmp ip, #0
	ldmleia sp!, {r3, r4, r5, pc}
	mov r1, r2
	mov r0, ip
	mov r2, r3
	bl ov00_022DB358
	cmp r4, r1
	cmpeq r5, r0
	moveq r0, #1
	movne r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022DB400

	arm_func_start ov00_022DB444
ov00_022DB444: ; 0x022DB444
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r6, r1
	mov r5, r2
	mov r4, #0
_022DB458:
	mov r0, r7
	mov r1, r6
	mov r2, r5
	mov r3, r4
	bl ov00_022DB400
	cmp r0, #0
	beq _022DB484
	mov r0, #0
	sub r0, r0, #1
	and r0, r7, r0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022DB484:
	add r4, r4, #1
	cmp r4, #2
	blt _022DB458
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022DB444

	arm_func_start ov00_022DB498
ov00_022DB498: ; 0x022DB498
	stmdb sp!, {r3, lr}
	str r2, [sp]
	mov r3, r1
	ldr r2, _022DB4B4 ; =ov00_02318B8C
	mov r1, #0xd
	bl sub_0207911C
	ldmia sp!, {r3, pc}
	.align 2, 0
_022DB4B4: .word ov00_02318B8C
	arm_func_end ov00_022DB498

	arm_func_start ov00_022DB4B8
ov00_022DB4B8: ; 0x022DB4B8
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr lr, _022DB520 ; =0x66666667
	add r4, r2, #4
	smull ip, r2, lr, r4
	mov ip, r4, lsr #0x1f
	add r2, ip, r2, asr #1
	cmp r2, #0
	ldr r7, _022DB524 ; =ov00_02318B94
	mov r6, #0
	ble _022DB514
	add r4, r3, r2
	sub r4, r4, #1
	mov ip, #0x1f
_022DB4EC:
	and r5, r0, ip
	ldrsb r5, [r7, r5]
	mov r0, r0, lsr #5
	mov lr, r1, lsr #5
	strb r5, [r4, -r6]
	add r6, r6, #1
	orr r0, r0, r1, lsl #27
	mov r1, lr
	cmp r6, r2
	blt _022DB4EC
_022DB514:
	mov r0, #0
	strb r0, [r3, r2]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022DB520: .word 0x66666667
_022DB524: .word ov00_02318B94
	arm_func_end ov00_022DB4B8

	arm_func_start ov00_022DB528
ov00_022DB528: ; 0x022DB528
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #0x40
	mov r6, r0
	mov r4, r1
	mov r5, r2
	bl ov00_022DB10C
	add r3, sp, #0x29
	mov r2, #0x2b
	bl ov00_022DB4B8
	mov r0, r6
	bl ov00_022DB12C
	mov r1, #0
	mov r2, #0x20
	add r3, sp, #0x14
	bl ov00_022DB4B8
	mov r1, r4, lsr #0x18
	and r1, r1, #0xff
	str r1, [sp]
	mov r1, r4, lsr #0x10
	and r1, r1, #0xff
	str r1, [sp, #4]
	mov r1, r4, lsr #8
	and r1, r1, #0xff
	str r1, [sp, #8]
	and r1, r4, #0xff
	str r1, [sp, #0xc]
	add r2, sp, #0x14
	str r2, [sp, #0x10]
	ldr r2, _022DB5B4 ; =ov00_02318BB8
	mov r0, r5
	mov r1, #0x15
	add r3, sp, #0x29
	bl sub_0207911C
	add sp, sp, #0x40
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022DB5B4: .word ov00_02318BB8
	arm_func_end ov00_022DB528

	arm_func_start ov00_022DB5B8
ov00_022DB5B8: ; 0x022DB5B8
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0x400
	mov r4, r1
	mov r1, #0
	mov r2, #0x40
	mov r5, r0
	bl MemsetFast
	mov r0, #0x40
	str r0, [r5]
	mov r0, #0
	str r0, [r5, #0x1c]
	add r0, r5, #4
	str r4, [r5, #0x24]
	bl ov00_022DB634
	add r0, r5, #0x10
	mov r1, #0
	bl ov00_022DB278
	ldr r1, _022DB630 ; =0xEDB88320
	add r0, sp, #0
	bl sub_020850B4
	add r0, sp, #0
	mov r1, r5
	mov r2, #0x3c
	bl sub_02085180
	str r0, [r5, #0x3c]
	ldr r0, [r5, #0x20]
	orr r0, r0, #1
	str r0, [r5, #0x20]
	add sp, sp, #0x400
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022DB630: .word 0xEDB88320
	arm_func_end ov00_022DB5B8

	arm_func_start ov00_022DB634
ov00_022DB634: ; 0x022DB634
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #0x34
	mov r6, r0
	add r0, sp, #0
	bl sub_0207BB50
	mov r3, #1
	add r2, sp, #0
_022DB650:
	add r0, r2, r3, lsl #2
	ldr r1, [r2, r3, lsl #2]
	ldr r0, [r0, #-4]
	eor r0, r1, r0
	str r0, [r2, r3, lsl #2]
	add r3, r3, #1
	cmp r3, #8
	blo _022DB650
	add r0, sp, #0x20
	ldr r5, [sp, #0x1c]
	mov r4, #0
	bl ov00_022EEA60
	ldr r0, [sp, #0x30]
	cmp r0, #0
	beq _022DB6A0
	ldr r1, [sp, #0x20]
	ldr r2, [sp, #0x24]
	mov r0, r6
	bl ov00_022DB150
	b _022DB6B0
_022DB6A0:
	ldr r1, [sp, #0x28]
	ldr r2, [sp, #0x2c]
	mov r0, r6
	bl ov00_022DB150
_022DB6B0:
	ldr r0, _022DB6EC ; =0x6C078965
	ldr r1, _022DB6F0 ; =0x5D588B65
	umull r3, r2, r5, r0
	mla r2, r5, r1, r2
	ldr r1, _022DB6F4 ; =0x00269EC3
	mla r2, r4, r0, r2
	adds r0, r3, r1
	mov r0, r6
	adc r1, r2, #0
	bl ov00_022DB178
	mov r0, r6
	mov r1, #1
	bl ov00_022DB278
	add sp, sp, #0x34
	ldmia sp!, {r3, r4, r5, r6, pc}
	.align 2, 0
_022DB6EC: .word 0x6C078965
_022DB6F0: .word 0x5D588B65
_022DB6F4: .word 0x00269EC3
	arm_func_end ov00_022DB634

	arm_func_start ov00_022DB6F8
ov00_022DB6F8: ; 0x022DB6F8
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #0x14
	mov r4, r0
	add r0, sp, #0
	bl ov00_022EEA60
	ldr r0, [sp, #0x10]
	cmp r0, #0
	mov r0, r4
	beq _022DB740
	bl ov00_022DB10C
	ldr r2, [sp, #4]
	ldr r3, [sp]
	cmp r2, r1
	cmpeq r3, r0
	moveq r0, #1
	add sp, sp, #0x14
	movne r0, #0
	ldmia sp!, {r3, r4, pc}
_022DB740:
	bl ov00_022DB10C
	ldr r2, [sp, #0xc]
	ldr r3, [sp, #8]
	cmp r2, r1
	cmpeq r3, r0
	moveq r0, #1
	movne r0, #0
	add sp, sp, #0x14
	ldmia sp!, {r3, r4, pc}
	arm_func_end ov00_022DB6F8

	arm_func_start ov00_022DB764
ov00_022DB764: ; 0x022DB764
	stmdb sp!, {r3, lr}
	bl ov00_022DB1A4
	cmp r0, #1
	moveq r0, #1
	movne r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022DB764

	arm_func_start ov00_022DB77C
ov00_022DB77C: ; 0x022DB77C
	ldr ip, _022DB788 ; =ov00_022DB764
	add r0, r0, #0x10
	bx ip
	.align 2, 0
_022DB788: .word ov00_022DB764
	arm_func_end ov00_022DB77C

	arm_func_start ov00_022DB78C
ov00_022DB78C: ; 0x022DB78C
	stmdb sp!, {r3, lr}
	bl ov00_022DB1A4
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022DB78C

	arm_func_start ov00_022DB7A4
ov00_022DB7A4: ; 0x022DB7A4
	ldr ip, _022DB7AC ; =ov00_022DB78C
	bx ip
	.align 2, 0
_022DB7AC: .word ov00_022DB78C
	arm_func_end ov00_022DB7A4

	arm_func_start ov00_022DB7B0
ov00_022DB7B0: ; 0x022DB7B0
	ldr ip, _022DB7B8 ; =ov00_022DB5B8
	bx ip
	.align 2, 0
_022DB7B8: .word ov00_022DB5B8
	arm_func_end ov00_022DB7B0

	arm_func_start ov00_022DB7BC
ov00_022DB7BC: ; 0x022DB7BC
	stmdb sp!, {r4, lr}
	sub sp, sp, #0x400
	ldr r1, _022DB7FC ; =0xEDB88320
	mov r4, r0
	add r0, sp, #0
	bl sub_020850B4
	add r0, sp, #0
	mov r1, r4
	mov r2, #0x3c
	bl sub_02085180
	ldr r1, [r4, #0x3c]
	cmp r0, r1
	moveq r0, #1
	movne r0, #0
	add sp, sp, #0x400
	ldmia sp!, {r4, pc}
	.align 2, 0
_022DB7FC: .word 0xEDB88320
	arm_func_end ov00_022DB7BC

	arm_func_start ov00_022DB800
ov00_022DB800: ; 0x022DB800
	stmdb sp!, {r4, lr}
	mov r4, r0
	add r0, r4, #0x10
	bl ov00_022DB764
	cmp r0, #0
	beq _022DB828
	ldr r0, [r4, #0x1c]
	cmp r0, #0
	movgt r0, #1
	ldmgtia sp!, {r4, pc}
_022DB828:
	mov r0, #0
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022DB800

	arm_func_start ov00_022DB830
ov00_022DB830: ; 0x022DB830
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #0x14
	mov r4, r0
	add r0, r4, #0x10
	bl ov00_022DB1A4
	cmp r0, #0
	addeq sp, sp, #0x14
	moveq r0, #1
	ldmeqia sp!, {r3, r4, pc}
	add r0, sp, #0
	bl ov00_022EEA60
	ldr r0, [sp, #0x10]
	cmp r0, #0
	addeq sp, sp, #0x14
	moveq r0, #0
	ldmeqia sp!, {r3, r4, pc}
	add r0, r4, #0x10
	bl ov00_022DB10C
	ldr r2, [sp, #4]
	ldr r3, [sp]
	cmp r2, r1
	cmpeq r3, r0
	moveq r0, #1
	movne r0, #0
	add sp, sp, #0x14
	ldmia sp!, {r3, r4, pc}
	arm_func_end ov00_022DB830

	arm_func_start ov00_022DB898
ov00_022DB898: ; 0x022DB898
	stmdb sp!, {r4, lr}
	sub sp, sp, #0x400
	mov r4, r0
	add r3, r4, #0x10
	mov ip, r2
	ldmia r1, {r0, r1, r2}
	stmia r3, {r0, r1, r2}
	ldr r1, _022DB8EC ; =0xEDB88320
	add r0, sp, #0
	str ip, [r4, #0x1c]
	bl sub_020850B4
	add r0, sp, #0
	mov r1, r4
	mov r2, #0x3c
	bl sub_02085180
	str r0, [r4, #0x3c]
	ldr r0, [r4, #0x20]
	orr r0, r0, #1
	str r0, [r4, #0x20]
	add sp, sp, #0x400
	ldmia sp!, {r4, pc}
	.align 2, 0
_022DB8EC: .word 0xEDB88320
	arm_func_end ov00_022DB898

	arm_func_start ov00_022DB8F0
ov00_022DB8F0: ; 0x022DB8F0
	ldr ip, _022DB8F8 ; =ov00_022DB8FC
	bx ip
	.align 2, 0
_022DB8F8: .word ov00_022DB8FC
	arm_func_end ov00_022DB8F0

	arm_func_start ov00_022DB8FC
ov00_022DB8FC: ; 0x022DB8FC
	ldr r0, [r0, #0x20]
	and r0, r0, #1
	cmp r0, #1
	moveq r0, #1
	movne r0, #0
	bx lr
	arm_func_end ov00_022DB8FC

	arm_func_start ov00_022DB914
ov00_022DB914: ; 0x022DB914
	ldr ip, _022DB91C ; =ov00_022DB920
	bx ip
	.align 2, 0
_022DB91C: .word ov00_022DB920
	arm_func_end ov00_022DB914

	arm_func_start ov00_022DB920
ov00_022DB920: ; 0x022DB920
	stmdb sp!, {r4, lr}
	sub sp, sp, #0x400
	mov r4, r0
	ldr r1, [r4, #0x20]
	add r0, sp, #0
	bic r2, r1, #1
	ldr r1, _022DB960 ; =0xEDB88320
	str r2, [r4, #0x20]
	bl sub_020850B4
	add r0, sp, #0
	mov r1, r4
	mov r2, #0x3c
	bl sub_02085180
	str r0, [r4, #0x3c]
	add sp, sp, #0x400
	ldmia sp!, {r4, pc}
	.align 2, 0
_022DB960: .word 0xEDB88320
	arm_func_end ov00_022DB920

	arm_func_start ov00_022DB964
ov00_022DB964: ; 0x022DB964
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022DB1A4
	cmp r0, #2
	movne r0, #0
	movne r1, r0
	ldmneia sp!, {r4, pc}
	mov r0, r4
	bl ov00_022DB134
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022DB964

	arm_func_start ov00_022DB98C
ov00_022DB98C: ; 0x022DB98C
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r1
	mov r5, r0
	mov r0, r4
	bl ov00_022DB1A4
	cmp r0, #1
	beq _022DB9DC
	cmp r0, #2
	beq _022DB9BC
	cmp r0, #3
	beq _022DB9D0
	b _022DB9E4
_022DB9BC:
	mov r0, r4
	bl ov00_022DB134
	ldr r2, [r5, #0x24]
	bl ov00_022DB444
	ldmia sp!, {r3, r4, r5, pc}
_022DB9D0:
	mov r0, r4
	bl ov00_022DB148
	ldmia sp!, {r3, r4, r5, pc}
_022DB9DC:
	mvn r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022DB9E4:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022DB98C

	arm_func_start ov00_022DB9EC
ov00_022DB9EC: ; 0x022DB9EC
	stmdb sp!, {r3, lr}
	mov r3, r0
	ldr r0, [r3, #0x1c]
	mov r2, #0
	mov r1, r2
	cmp r0, #0
	beq _022DBA14
	ldr r1, [r3, #0x24]
	bl ov00_022DB358
	mov r2, r0
_022DBA14:
	mov r0, r2
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022DB9EC

	arm_func_start ov00_022DBA1C
ov00_022DBA1C: ; 0x022DBA1C
	stmdb sp!, {r4, r5, r6, lr}
	mov r5, r1
	mov r4, r2
	mov r6, r0
	mov r1, #0
	mov r2, #0xc
	bl MemsetFast
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_022DB180
	mov r0, r6
	mov r1, #2
	bl ov00_022DB278
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022DBA1C

	arm_func_start ov00_022DBA58
ov00_022DBA58: ; 0x022DBA58
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r1
	mov r5, r0
	mov r0, r4
	mov r1, #0
	mov r2, #0xc
	bl MemsetFast
	mov r0, r5
	bl ov00_022DB77C
	cmp r0, #0
	addeq r0, r5, #4
	ldmeqia r0, {r0, r1, r2}
	stmeqia r4, {r0, r1, r2}
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r1, [r5, #0x1c]
	mov r0, r4
	bl ov00_022DB188
	mov r0, r4
	mov r1, #3
	bl ov00_022DB278
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022DBA58

	arm_func_start ov00_022DBAAC
ov00_022DBAAC: ; 0x022DBAAC
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r1
	mov r5, r0
	mov r1, #0
	mov r2, #0xc
	bl MemsetFast
	mov r0, r5
	mov r1, r4
	bl ov00_022DB188
	mov r0, r5
	mov r1, #3
	bl ov00_022DB278
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022DBAAC

	arm_func_start ov00_022DBAE0
ov00_022DBAE0: ; 0x022DBAE0
	ldr ip, _022DBAF4 ; =ov00_022DB528
	mov r3, r0
	mov r0, r1
	ldr r1, [r3, #0x24]
	bx ip
	.align 2, 0
_022DBAF4: .word ov00_022DB528
	arm_func_end ov00_022DBAE0

	arm_func_start ov00_022DBAF8
ov00_022DBAF8: ; 0x022DBAF8
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r4, r1
	mov r7, r0
	bl ov00_022DB1A4
	mov r5, r0
	mov r0, r4
	bl ov00_022DB1A4
	cmp r5, r0
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r5, #3
	bne _022DBB4C
	mov r0, r7
	bl ov00_022DB148
	mov r5, r0
	mov r0, r4
	bl ov00_022DB148
	cmp r5, r0
	moveq r0, #1
	movne r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022DBB4C:
	cmp r5, #1
	bne _022DBBA0
	mov r0, r7
	bl ov00_022DB10C
	mov r5, r0
	mov r6, r1
	mov r0, r4
	bl ov00_022DB10C
	cmp r6, r1
	cmpeq r5, r0
	bne _022DBB98
	mov r0, r7
	bl ov00_022DB12C
	mov r5, r0
	mov r0, r4
	bl ov00_022DB12C
	cmp r5, r0
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
_022DBB98:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022DBBA0:
	cmp r5, #2
	bne _022DBBD4
	mov r0, r7
	bl ov00_022DB134
	mov r5, r0
	mov r6, r1
	mov r0, r4
	bl ov00_022DB134
	cmp r6, r1
	cmpeq r5, r0
	moveq r0, #1
	movne r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022DBBD4:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022DBAF8

	arm_func_start ov00_022DBBDC
ov00_022DBBDC: ; 0x022DBBDC
	stmdb sp!, {r4, r5, lr}
	sub sp, sp, #0x24
	mov r4, r1
	mov r5, r0
	mov r0, r4
	bl ov00_022DB1A4
	cmp r0, #3
	mov r0, r4
	bne _022DBC0C
	bl ov00_022DB1B4
	add sp, sp, #0x24
	ldmia sp!, {r4, r5, pc}
_022DBC0C:
	bl ov00_022DB1A4
	cmp r0, #2
	mov r0, r4
	bne _022DBC3C
	bl ov00_022DB134
	mov r3, r0
	mov r2, r1
	add r0, sp, #0x15
	mov r1, r3
	bl ov00_022DB498
	add sp, sp, #0x24
	ldmia sp!, {r4, r5, pc}
_022DBC3C:
	bl ov00_022DB1A4
	cmp r0, #1
	addne sp, sp, #0x24
	ldmneia sp!, {r4, r5, pc}
	ldr r1, [r5, #0x24]
	add r2, sp, #0
	mov r0, r4
	bl ov00_022DB528
	add sp, sp, #0x24
	ldmia sp!, {r4, r5, pc}
	arm_func_end ov00_022DBBDC

	arm_func_start ov00_022DBC64
ov00_022DBC64: ; 0x022DBC64
	stmdb sp!, {r4, lr}
	mov r4, r0
	add r1, r4, #4
	bl ov00_022DBBDC
	mov r0, r4
	add r1, r4, #0x10
	bl ov00_022DBBDC
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022DBC64

	arm_func_start ov00_022DBC84
ov00_022DBC84: ; 0x022DBC84
	ldr r1, _022DBC90 ; =ov00_02318BC8
	str r0, [r1]
	bx lr
	.align 2, 0
_022DBC90: .word ov00_02318BC8
	arm_func_end ov00_022DBC84

	arm_func_start ov00_022DBC94
ov00_022DBC94: ; 0x022DBC94
	ldr r0, _022DBCA0 ; =ov00_02318BC8
	ldr r0, [r0]
	bx lr
	.align 2, 0
_022DBCA0: .word ov00_02318BC8
	arm_func_end ov00_022DBC94

	arm_func_start ov00_022DBCA4
ov00_022DBCA4: ; 0x022DBCA4
	stmdb sp!, {r3, r4, r5, lr}
	ldr r2, _022DBDB8 ; =ov00_02326CB4
	mov r5, r0
	ldr r0, [r2, #8]
	mov r4, r1
	cmp r0, #0
	ldr r2, [r5, #0x40]
	movne r0, #2
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r0, _022DBDBC ; =ov00_02318C0C
	ldr r1, _022DBDC0 ; =0x000013F4
	blx r2
	ldr r1, _022DBDB8 ; =ov00_02326CB4
	cmp r0, #0
	str r0, [r1, #8]
	moveq r0, #2
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r2, _022DBDC0 ; =0x000013F4
	mov r1, #0
	bl MemsetFast
	ldr r3, _022DBDB8 ; =ov00_02326CB4
	mov r1, #0
	ldr r0, [r3, #8]
	mov r2, #0x1c4
	add r0, r0, #0x1000
	str r4, [r0, #0x314]
	str r1, [r3]
	ldr r0, [r3, #8]
	add r0, r0, #8
	add r0, r0, #0x1000
	bl MemsetFast
	ldr r1, _022DBDB8 ; =ov00_02326CB4
	ldr r2, _022DBDC4 ; =0x00004E84
	ldr r0, [r1, #8]
	mov r4, #4
	add r0, r0, #0x1000
	str r2, [r0, #8]
	ldr lr, [r1, #8]
	add r0, lr, #0x1cc
	add ip, r0, #0x1000
_022DBD44:
	ldmia r5!, {r0, r1, r2, r3}
	stmia ip!, {r0, r1, r2, r3}
	subs r4, r4, #1
	bne _022DBD44
	ldmia r5, {r0, r1}
	stmia ip, {r0, r1}
	add r0, lr, #0x1100
	mov r2, #0
	strh r2, [r0, #0xfe]
	ldr r1, _022DBDB8 ; =ov00_02326CB4
	mov r0, #1
	ldr r1, [r1, #8]
	add r1, r1, #0x1000
	strb r2, [r1, #0x20b]
	bl ov00_022DC06C
	ldr r2, _022DBDB8 ; =ov00_02326CB4
	ldr r1, [r2, #8]
	add r1, r1, #0x1000
	str r0, [r1, #4]
	ldr r0, [r2, #8]
	add r0, r0, #0x1000
	ldr r0, [r0, #4]
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	mov r0, #0
	str r0, [r2, #4]
	bl ov00_022DBDC8
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022DBDB8: .word ov00_02326CB4
_022DBDBC: .word ov00_02318C0C
_022DBDC0: .word 0x000013F4
_022DBDC4: .word 0x00004E84
	arm_func_end ov00_022DBCA4

	arm_func_start ov00_022DBDC8
ov00_022DBDC8: ; 0x022DBDC8
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	ldr r0, _022DBE70 ; =ov00_02326CB4
	ldr r0, [r0, #8]
	add r0, r0, #0x3d8
	add r0, r0, #0x1000
	bl OS_InitMutex
	ldr r1, _022DBE70 ; =ov00_02326CB4
	mov r2, #0
	ldr r0, [r1, #8]
	add r0, r0, #0x1000
	str r2, [r0, #0x3f0]
	ldr r1, [r1, #8]
	add r0, r1, #0x1000
	ldr r0, [r0, #0x384]
	cmp r0, #0
	beq _022DBE24
	add r0, r1, #0x318
	add r0, r0, #0x1000
	bl sub_02079830
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, pc}
_022DBE24:
	ldr r0, _022DBE70 ; =ov00_02326CB4
	mov r3, #0x1000
	ldr lr, [r0, #8]
	ldr r1, _022DBE74 ; =ov00_022DC17C
	add r0, lr, #0x318
	ldr r2, _022DBE78 ; =ov00_02326CBC
	str r3, [sp]
	mov ip, #0x10
	add r0, r0, #0x1000
	add r3, lr, #0x1000
	str ip, [sp, #4]
	bl StartThread
	ldr r0, _022DBE70 ; =ov00_02326CB4
	ldr r0, [r0, #8]
	add r0, r0, #0x318
	add r0, r0, #0x1000
	bl OS_WakeupThreadDirect
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022DBE70: .word ov00_02326CB4
_022DBE74: .word ov00_022DC17C
_022DBE78: .word ov00_02326CBC
	arm_func_end ov00_022DBDC8

	arm_func_start ov00_022DBE7C
ov00_022DBE7C: ; 0x022DBE7C
	stmdb sp!, {r3, lr}
	ldr r0, _022DBF04 ; =ov00_02326CB4
	ldr r0, [r0, #8]
	cmp r0, #0
	ldmeqia sp!, {r3, pc}
	add r0, r0, #0x3d8
	add r0, r0, #0x1000
	bl sub_0207A048
	ldr r1, _022DBF04 ; =ov00_02326CB4
	mov r2, #1
	ldr r0, [r1, #8]
	add r0, r0, #0x1000
	str r2, [r0, #0x3f0]
	ldr r0, [r1, #8]
	add r0, r0, #0x3d8
	add r0, r0, #0x1000
	bl sub_0207A0CC
	ldr r0, _022DBF04 ; =ov00_02326CB4
	ldr r0, [r0, #8]
	add r0, r0, #0x1000
	ldr r0, [r0, #0x314]
	cmp r0, #0
	beq _022DBEDC
	bl ov00_022DD34C
_022DBEDC:
	ldr r0, _022DBF04 ; =ov00_02326CB4
	ldr r1, [r0, #8]
	add r0, r1, #0x1000
	ldr r0, [r0, #0x384]
	cmp r0, #0
	ldmeqia sp!, {r3, pc}
	add r0, r1, #0x318
	add r0, r0, #0x1000
	bl sub_02079800
	ldmia sp!, {r3, pc}
	.align 2, 0
_022DBF04: .word ov00_02326CB4
	arm_func_end ov00_022DBE7C

	arm_func_start ov00_022DBF08
ov00_022DBF08: ; 0x022DBF08
	stmdb sp!, {r4, lr}
	ldr r0, _022DBF58 ; =ov00_02326CB4
	ldr r0, [r0, #8]
	cmp r0, #0
	ldmeqia sp!, {r4, pc}
	add r1, r0, #0x1000
	ldr r0, [r1, #0x314]
	ldr r4, [r1, #0x210]
	cmp r0, #0
	beq _022DBF34
	bl ov00_022DD890
_022DBF34:
	ldr r1, _022DBF58 ; =ov00_02326CB4
	ldr r0, _022DBF5C ; =ov00_02318C1C
	ldr r1, [r1, #8]
	mov r2, #0
	blx r4
	ldr r0, _022DBF58 ; =ov00_02326CB4
	mov r1, #0
	str r1, [r0, #8]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022DBF58: .word ov00_02326CB4
_022DBF5C: .word ov00_02318C1C
	arm_func_end ov00_022DBF08

	arm_func_start ov00_022DBF60
ov00_022DBF60: ; 0x022DBF60
	stmdb sp!, {r3, lr}
	ldr r0, _022DBF8C ; =ov00_02326CB4
	ldr r1, [r0, #8]
	add r0, r1, #0x1000
	ldr r0, [r0, #0x384]
	cmp r0, #0
	ldmeqia sp!, {r3, pc}
	add r0, r1, #0x318
	add r0, r0, #0x1000
	bl sub_02079800
	ldmia sp!, {r3, pc}
	.align 2, 0
_022DBF8C: .word ov00_02326CB4
	arm_func_end ov00_022DBF60

	arm_func_start ov00_022DBF90
ov00_022DBF90: ; 0x022DBF90
	stmdb sp!, {r4, lr}
	ldr r0, _022DBFD8 ; =ov00_02326CB4
	ldr r0, [r0, #8]
	cmp r0, #0
	moveq r0, #0x16
	ldmeqia sp!, {r4, pc}
	add r0, r0, #0x3d8
	add r0, r0, #0x1000
	bl sub_0207A048
	ldr r0, _022DBFD8 ; =ov00_02326CB4
	ldr r1, [r0, #8]
	add r0, r1, #0x3d8
	add r1, r1, #0x1000
	add r0, r0, #0x1000
	ldr r4, [r1, #4]
	bl sub_0207A0CC
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022DBFD8: .word ov00_02326CB4
	arm_func_end ov00_022DBF90

	arm_func_start ov00_022DBFDC
ov00_022DBFDC: ; 0x022DBFDC
	stmdb sp!, {r4, lr}
	ldr r1, _022DC058 ; =ov00_02326CB4
	mov r4, r0
	ldr r1, [r1, #8]
	cmp r1, #0
	bne _022DC000
	mov r1, #0
	mov r2, #0x1c4
	bl MemsetFast
_022DC000:
	ldr r0, _022DC058 ; =ov00_02326CB4
	mov r1, r4
	ldr r0, [r0, #8]
	mov r2, #0x1c4
	add r0, r0, #8
	add r0, r0, #0x1000
	bl MemcpyFast
	ldr r1, [r4]
	ldr r0, _022DC05C ; =0x00004E20
	cmp r1, r0
	blt _022DC038
	ldr r0, _022DC060 ; =0x00007530
	cmp r1, r0
	blt _022DC040
_022DC038:
	ldr r0, _022DC064 ; =0x00005206
	str r0, [r4]
_022DC040:
	ldr r1, [r4]
	ldr r0, _022DC068 ; =0x00004E84
	cmp r1, r0
	rsbge r0, r1, #0
	strge r0, [r4]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022DC058: .word ov00_02326CB4
_022DC05C: .word 0x00004E20
_022DC060: .word 0x00007530
_022DC064: .word 0x00005206
_022DC068: .word 0x00004E84
	arm_func_end ov00_022DBFDC

	arm_func_start ov00_022DC06C
ov00_022DC06C: ; 0x022DC06C
	stmdb sp!, {r4, lr}
	ldr r1, _022DC164 ; =ov00_02318BC8
	mov r4, r0
	ldr r0, [r1]
	ldr r1, _022DC168 ; =ov00_02318C2C
	bl strcmp
	cmp r0, #0
	ldrne r0, _022DC164 ; =ov00_02318BC8
	movne r1, #1
	strne r1, [r0, #0x14]
	ldr r0, _022DC16C ; =ov00_02326CB4
	ldr r2, _022DC164 ; =ov00_02318BC8
	ldr r0, [r0, #8]
	ldr r1, _022DC170 ; =ov00_02318BC8
	add r0, r0, #0x1000
	ldr r3, [r0, #0x20c]
	str r3, [r2, #0xc]
	ldr r3, [r0, #0x210]
	str r3, [r2, #0x10]
	ldr r0, [r0, #0x314]
	bl ov00_022DD0DC
	cmp r0, #0
	movne r0, #4
	ldmneia sp!, {r4, pc}
	cmp r4, #1
	bne _022DC0DC
	ldr r0, _022DC174 ; =ov00_02326CC0
	bl ov00_022ED468
_022DC0DC:
	ldr r0, _022DC16C ; =ov00_02326CB4
	ldr r1, [r0, #8]
	add r0, r1, #0x1000
	add r2, r1, #0x1cc
	ldr r0, [r0, #0x314]
	add r1, r1, #0x1200
	add r2, r2, #0x1000
	bl ov00_022DC8D0
	ldr r2, _022DC16C ; =ov00_02326CB4
	ldr r1, [r2, #8]
	add r1, r1, #0x1000
	str r0, [r1, #4]
	ldr r0, [r2, #8]
	add r0, r0, #0x1000
	ldr r1, [r0, #4]
	cmp r1, #0
	movne r0, #4
	ldmneia sp!, {r4, pc}
	ldr r0, [r0, #0x314]
	bl ov00_022DD1F8
	cmp r0, #0
	movne r0, #4
	ldmneia sp!, {r4, pc}
	ldr r0, _022DC178 ; =_022B966C
	ldr r0, [r0, #4]
	bl sub_02079B0C
	ldr r1, _022DC16C ; =ov00_02326CB4
	ldr r2, [r1, #8]
	sub r1, r0, #1
	add r0, r2, #0x1000
	ldr r0, [r0, #0x314]
	bl ov00_022DD290
	mov r0, #0
	ldmia sp!, {r4, pc}
	.align 2, 0
_022DC164: .word ov00_02318BC8
_022DC168: .word ov00_02318C2C
_022DC16C: .word ov00_02326CB4
_022DC170: .word ov00_02318BC8
_022DC174: .word ov00_02326CC0
_022DC178: .word _022B966C
	arm_func_end ov00_022DC06C

	arm_func_start ov00_022DC17C
ov00_022DC17C: ; 0x022DC17C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov r8, #0
_022DC184:
	ldr r0, _022DC420 ; =ov00_02326CB4
	ldr r0, [r0, #8]
	add r0, r0, #0x1000
	ldr r1, [r0, #0x314]
	add r0, r1, #0x1000
	ldr r0, [r0, #0xba4]
	cmp r0, #0
	beq _022DC1B0
	add r0, r1, #0x338
	add r0, r0, #0x1800
	bl sub_02079800
_022DC1B0:
	ldr r2, _022DC420 ; =ov00_02326CB4
	ldr r0, [r2, #8]
	add r0, r0, #0x1000
	ldr r1, [r0, #0x314]
	add r1, r1, #0x1000
	ldr r1, [r1, #0x20]
	cmp r1, #8
	beq _022DC24C
	ldr r1, _022DC424 ; =0x00004E84
	str r1, [r0, #8]
	ldr r0, [r2, #8]
	add r0, r0, #0x1000
	ldr r0, [r0, #0x314]
	add r0, r0, #0x1000
	ldr r0, [r0, #0x20]
	cmp r0, #7
	bne _022DC200
	mov r0, #0x14
	bl ov00_022DCA74
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022DC200:
	cmp r8, #2
	ble _022DC23C
	cmp r0, #2
	bne _022DC21C
	mov r0, #9
	bl ov00_022DCA74
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022DC21C:
	cmp r0, #3
	bne _022DC230
	mov r0, #0xb
	bl ov00_022DCA74
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022DC230:
	mov r0, #0xd
	bl ov00_022DCA74
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022DC23C:
	mov r0, #1
	add r8, r8, #1
	str r0, [sp]
	b _022DC2BC
_022DC24C:
	bl ov00_022DC430
	cmp r0, #0x10
	beq _022DC274
	cmp r0, #0x11
	beq _022DC298
	cmp r0, #0x15
	bne _022DC2A0
	mov r0, #0x15
	bl ov00_022DCA74
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022DC274:
	cmp r8, #2
	ble _022DC288
	mov r0, #0x10
	bl ov00_022DCA74
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022DC288:
	mov r0, #0
	add r8, r8, #1
	str r0, [sp]
	b _022DC2BC
_022DC298:
	bl ov00_022DCA74
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022DC2A0:
	cmp r8, #2
	blt _022DC2B0
	bl ov00_022DCA74
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022DC2B0:
	mov r0, #1
	add r8, r8, #1
	str r0, [sp]
_022DC2BC:
	bl sub_0207AE44
	mov sb, r0
	mov sl, r1
	bl sub_0207AE44
	subs r2, r0, sb
	sbc r0, r1, sl
	mov r1, r0, lsl #6
	orr r1, r1, r2, lsr #26
	mov r0, r2, lsl #6
	ldr r2, _022DC428 ; =0x000082EA
	mov r3, #0
	bl _ll_udiv
	cmp r1, #0
	ldr r7, _022DC42C ; =0x00001388
	cmpeq r0, r7
	bhs _022DC39C
	mov fp, #0
	ldr r6, _022DC428 ; =0x000082EA
	ldr r5, _022DC420 ; =ov00_02326CB4
	mov r4, fp
_022DC30C:
	ldr r0, [r5, #8]
	add r0, r0, #0x3d8
	add r0, r0, #0x1000
	bl sub_0207A048
	ldr r2, [r5, #8]
	add r0, r2, #0x1000
	ldr r1, [r0, #0x3f0]
	cmp r1, #1
	bne _022DC358
	ldr r2, _022DC424 ; =0x00004E84
	ldr r1, _022DC420 ; =ov00_02326CB4
	str r2, [r0, #8]
	ldr r0, [r1, #8]
	add r0, r0, #0x3d8
	add r0, r0, #0x1000
	bl sub_0207A0CC
	mov r0, #0x14
	bl ov00_022DCA74
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022DC358:
	add r0, r2, #0x3d8
	add r0, r0, #0x1000
	bl sub_0207A0CC
	mov r0, r7
	bl sub_02079B14
	bl sub_0207AE44
	subs r2, r0, sb
	sbc r0, r1, sl
	mov r1, r0, lsl #6
	orr r1, r1, r2, lsr #26
	mov r0, r2, lsl #6
	mov r2, r6
	mov r3, fp
	bl _ll_udiv
	cmp r1, r4
	cmpeq r0, r7
	blo _022DC30C
_022DC39C:
	ldr r0, _022DC420 ; =ov00_02326CB4
	ldr r0, [r0, #8]
	add r0, r0, #0x1000
	ldr r0, [r0, #0x314]
	bl ov00_022DD890
	ldr r0, _022DC420 ; =ov00_02326CB4
	ldr r0, [r0, #8]
	add r0, r0, #0x3d8
	add r0, r0, #0x1000
	bl sub_0207A048
	ldr r0, [sp]
	bl ov00_022DC06C
	ldr r2, _022DC420 ; =ov00_02326CB4
	ldr r1, [r2, #8]
	add r1, r1, #0x1000
	str r0, [r1, #4]
	ldr r3, [r2, #8]
	add r0, r3, #0x1000
	ldr r1, [r0, #4]
	cmp r1, #0
	beq _022DC40C
	ldr r1, _022DC424 ; =0x00004E84
	str r1, [r0, #8]
	ldr r0, [r2, #8]
	add r0, r0, #0x3d8
	add r0, r0, #0x1000
	bl sub_0207A0CC
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022DC40C:
	add r0, r3, #0x3d8
	add r0, r0, #0x1000
	bl sub_0207A0CC
	b _022DC184
_022DC41C:
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022DC420: .word ov00_02326CB4
_022DC424: .word 0x00004E84
_022DC428: .word 0x000082EA
_022DC42C: .word 0x00001388
	arm_func_end ov00_022DC17C

	arm_func_start ov00_022DC430
ov00_022DC430: ; 0x022DC430
	stmdb sp!, {r3, r4, r5, lr}
	ldr r0, _022DC5E8 ; =ov00_02326CB4
	mov r1, #0
	ldr r0, [r0, #8]
	add r2, r0, #0x1000
	ldr r0, [r2, #0x314]
	ldr r4, [r2, #0x20c]
	ldr r5, [r2, #0x210]
	bl ov00_022DE068
	cmp r0, #1
	beq _022DC478
	ldr r0, _022DC5E8 ; =ov00_02326CB4
	ldr r2, _022DC5EC ; =0x00004E84
	ldr r1, [r0, #8]
	mov r0, #0xe
	add r1, r1, #0x1000
	str r2, [r1, #8]
	ldmia sp!, {r3, r4, r5, pc}
_022DC478:
	bl ov00_022DC608
	cmp r0, #0
	movne r0, #0xe
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r0, _022DC5E8 ; =ov00_02326CB4
	ldr r1, _022DC5EC ; =0x00004E84
	ldr r0, [r0, #8]
	add r0, r0, #0x1000
	ldr r2, [r0, #8]
	cmp r2, r1
	bge _022DC538
	sub r0, r1, #0x62
	cmp r2, r0
	bne _022DC530
	ldr r0, _022DC5F0 ; =ov00_02318C4C
	ldr r1, _022DC5F4 ; =0x0000071F
	blx r4
	movs r4, r0
	bne _022DC4E0
	ldr r0, _022DC5E8 ; =ov00_02326CB4
	ldr r2, _022DC5EC ; =0x00004E84
	ldr r1, [r0, #8]
	mov r0, #2
	add r1, r1, #0x1000
	str r2, [r1, #8]
	ldmia sp!, {r3, r4, r5, pc}
_022DC4E0:
	add r1, r4, #0x1f
	ldr r0, _022DC5F8 ; =ov00_02326CC0
	bic r1, r1, #0x1f
	bl ov00_022EE870
	cmp r0, #1
	mov r2, #0
	beq _022DC524
	ldr r0, _022DC5FC ; =ov00_02318C5C
	mov r1, r4
	blx r5
	ldr r0, _022DC5E8 ; =ov00_02326CB4
	ldr r2, _022DC5EC ; =0x00004E84
	ldr r1, [r0, #8]
	mov r0, #0xf
	add r1, r1, #0x1000
	str r2, [r1, #8]
	ldmia sp!, {r3, r4, r5, pc}
_022DC524:
	ldr r0, _022DC5FC ; =ov00_02318C5C
	mov r1, r4
	blx r5
_022DC530:
	mov r0, #0x15
	ldmia sp!, {r3, r4, r5, pc}
_022DC538:
	add r0, r1, #4
	cmp r2, r0
	beq _022DC554
	add r0, r1, #8
	cmp r2, r0
	beq _022DC578
	b _022DC5E0
_022DC554:
	ldr r0, _022DC5F8 ; =ov00_02326CC0
	bl ov00_022EE8C0
	ldr r0, _022DC5E8 ; =ov00_02326CB4
	ldr r2, _022DC600 ; =0x00004E88
	ldr r1, [r0, #8]
	mov r0, #0x10
	add r1, r1, #0x1000
	str r2, [r1, #8]
	ldmia sp!, {r3, r4, r5, pc}
_022DC578:
	ldr r0, _022DC5F0 ; =ov00_02318C4C
	mov r1, #0x700
	blx r4
	movs r4, r0
	bne _022DC5A8
	ldr r0, _022DC5E8 ; =ov00_02326CB4
	ldr r2, _022DC604 ; =0x00004E8C
	ldr r1, [r0, #8]
	mov r0, #0x11
	add r1, r1, #0x1000
	str r2, [r1, #8]
	ldmia sp!, {r3, r4, r5, pc}
_022DC5A8:
	add r0, r4, #0x1f
	bic r0, r0, #0x1f
	bl ov00_022EE82C
	ldr r0, _022DC5FC ; =ov00_02318C5C
	mov r1, r4
	mov r2, #0
	blx r5
	ldr r0, _022DC5E8 ; =ov00_02326CB4
	ldr r2, _022DC604 ; =0x00004E8C
	ldr r1, [r0, #8]
	mov r0, #0x11
	add r1, r1, #0x1000
	str r2, [r1, #8]
	ldmia sp!, {r3, r4, r5, pc}
_022DC5E0:
	mov r0, #0x12
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022DC5E8: .word ov00_02326CB4
_022DC5EC: .word 0x00004E84
_022DC5F0: .word ov00_02318C4C
_022DC5F4: .word 0x0000071F
_022DC5F8: .word ov00_02326CC0
_022DC5FC: .word ov00_02318C5C
_022DC600: .word 0x00004E88
_022DC604: .word 0x00004E8C
	arm_func_end ov00_022DC430

	arm_func_start ov00_022DC608
ov00_022DC608: ; 0x022DC608
	stmdb sp!, {r3, r4, r5, lr}
	ldr r0, _022DC8A0 ; =ov00_02326CB4
	mov r1, #0
	ldr r0, [r0, #8]
	str r1, [sp]
	add r0, r0, #0x1000
	ldr r0, [r0, #0x314]
	ldr r1, _022DC8A4 ; =ov00_02318C68
	bl ov00_022DE308
	str r0, [sp]
	cmp r0, #0
	beq _022DC63C
	bl ov00_022DF6F4
_022DC63C:
	ldr r0, _022DC8A0 ; =ov00_02326CB4
	mov r2, #0
	ldr r1, [r0, #8]
	ldr r0, _022DC8A8 ; =_022BCA70
	str r2, [sp]
	str r2, [r0]
	add r0, r1, #0x1000
	ldr r0, [r0, #0x314]
	ldr r1, _022DC8AC ; =ov00_02318C70
	bl ov00_022DE308
	bl sub_0208B360
	ldr r1, _022DC8A8 ; =_022BCA70
	ldr r1, [r1]
	cmp r1, #0x22
	bne _022DC694
	ldr r0, _022DC8A0 ; =ov00_02326CB4
	ldr r2, _022DC8B0 ; =0x00004E85
	ldr r1, [r0, #8]
	mov r0, #0xc
	add r1, r1, #0x1000
	str r2, [r1, #8]
	ldmia sp!, {r3, r4, r5, pc}
_022DC694:
	cmp r0, #0xc8
	beq _022DC6BC
	ldr r1, _022DC8A0 ; =ov00_02326CB4
	add r0, r0, #0x1d8
	ldr r1, [r1, #8]
	add r2, r0, #0x5800
	add r0, r1, #0x1000
	str r2, [r0, #8]
	mov r0, #0x12
	ldmia sp!, {r3, r4, r5, pc}
_022DC6BC:
	ldr r0, _022DC8A0 ; =ov00_02326CB4
	ldr r1, _022DC8B4 ; =ov00_02318C7C
	ldr r2, [r0, #8]
	mov r3, #4
	add r0, r2, #0x1000
	add r2, r2, #0xc
	ldr r0, [r0, #0x314]
	add r2, r2, #0x1000
	bl ov00_022DE360
	cmp r0, #0
	bgt _022DC704
	ldr r0, _022DC8A0 ; =ov00_02326CB4
	ldr r2, _022DC8B0 ; =0x00004E85
	ldr r1, [r0, #8]
	mov r0, #0xe
	add r1, r1, #0x1000
	str r2, [r1, #8]
	ldmia sp!, {r3, r4, r5, pc}
_022DC704:
	ldr r0, _022DC8A0 ; =ov00_02326CB4
	add r1, sp, #0
	ldr r0, [r0, #8]
	mov r2, #0xa
	add r0, r0, #0xc
	add r0, r0, #0x1000
	bl sub_0208B298
	ldr r1, _022DC8A0 ; =ov00_02326CB4
	mov r4, r0
	ldr r5, [r1, #8]
	add r0, r5, #0xc
	add r0, r0, #0x1000
	bl strlen
	add r1, r5, #0xc
	add r1, r1, #0x1000
	ldr r2, [sp]
	add r0, r1, r0
	cmp r2, r0
	beq _022DC764
	ldr r1, _022DC8B0 ; =0x00004E85
	add r0, r5, #0x1000
	str r1, [r0, #8]
	mov r0, #0xc
	ldmia sp!, {r3, r4, r5, pc}
_022DC764:
	add r0, r4, #0xe20
	add r1, r0, #0x4000
	add r0, r5, #0x1000
	str r1, [r0, #8]
	cmp r4, #0x64
	bge _022DC898
	ldr r5, _022DC8A0 ; =ov00_02326CB4
	mov r0, #0
	ldr r2, [r5, #8]
	ldr r1, _022DC8B8 ; =ov00_02318C88
	add r2, r2, #0x1000
	strb r0, [r2, #0x52]
	ldr r2, [r5, #8]
	ldr r3, _022DC8BC ; =0x0000012D
	add r2, r2, #0x1000
	strb r0, [r2, #0x1f]
	ldr r2, [r5, #8]
	add r2, r2, #0x1000
	strb r0, [r2, #0x17f]
	ldr r2, [r5, #8]
	add r2, r2, #0x1000
	strb r0, [r2, #0x10]
	ldr r2, [r5, #8]
	add r2, r2, #0x1000
	strb r0, [r2, #0x188]
	ldr r2, [r5, #8]
	add r0, r2, #0x1000
	add r2, r2, #0x52
	ldr r0, [r0, #0x314]
	add r2, r2, #0x1000
	bl ov00_022DE360
	mov r0, r5
	ldr r2, [r0, #8]
	ldr r1, _022DC8C0 ; =ov00_02318C90
	add r0, r2, #0x1000
	add r2, r2, #0x1f
	ldr r0, [r0, #0x314]
	mov r3, #0x33
	add r2, r2, #0x1000
	bl ov00_022DE360
	mov r0, r5
	ldr r2, [r0, #8]
	ldr r1, _022DC8C4 ; =ov00_02318C98
	add r0, r2, #0x1000
	add r2, r2, #0x7f
	ldr r0, [r0, #0x314]
	mov r3, #9
	add r2, r2, #0x1100
	bl ov00_022DE360
	mov r0, r5
	ldr r2, [r0, #8]
	ldr r1, _022DC8C8 ; =ov00_02318CA4
	add r0, r2, #0x1000
	add r2, r2, #0x10
	ldr r0, [r0, #0x314]
	mov r3, #0xf
	add r2, r2, #0x1000
	bl ov00_022DE360
	mov r0, r5
	ldr r2, [r0, #8]
	ldr r1, _022DC8CC ; =ov00_02318CB0
	add r0, r2, #0x1000
	add r2, r2, #0x188
	ldr r0, [r0, #0x314]
	mov r3, #0x41
	add r2, r2, #0x1000
	bl ov00_022DE3B4
	mov r1, r5
	ldr r0, [r1, #8]
	mov r2, #0
	add r0, r0, #0x1000
	cmp r4, #0x28
	strb r2, [r0, #0x1b3]
	movne r0, #1
	strne r0, [r1]
	moveq r0, #2
	streq r0, [r1]
_022DC898:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022DC8A0: .word ov00_02326CB4
_022DC8A4: .word ov00_02318C68
_022DC8A8: .word _022BCA70
_022DC8AC: .word ov00_02318C70
_022DC8B0: .word 0x00004E85
_022DC8B4: .word ov00_02318C7C
_022DC8B8: .word ov00_02318C88
_022DC8BC: .word 0x0000012D
_022DC8C0: .word ov00_02318C90
_022DC8C4: .word ov00_02318C98
_022DC8C8: .word ov00_02318CA4
_022DC8CC: .word ov00_02318CB0
	arm_func_end ov00_022DC608

	arm_func_start ov00_022DC8D0
ov00_022DC8D0: ; 0x022DC8D0
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #0x94
	ldr r3, _022DCA4C ; =ov00_02326CB4
	mov r4, r0
	ldr r0, [r3, #0x10]
	ldr r3, [r3, #0xc]
	cmp r0, #0
	mov r6, r1
	mov r5, r2
	cmpeq r3, #0
	bne _022DC92C
	ldr r0, _022DCA50 ; =ov00_02318CBC
	bl strlen
	mov r3, r0
	ldr r1, _022DCA54 ; =ov00_02318CC8
	ldr r2, _022DCA50 ; =ov00_02318CBC
	mov r0, r4
	bl ov00_022DDAE0
	cmp r0, #0
	beq _022DC984
	add sp, sp, #0x94
	mov r0, #8
	ldmia sp!, {r3, r4, r5, r6, pc}
_022DC92C:
	ldr r0, _022DCA58 ; =ov00_02318CD0
	bl strlen
	mov r3, r0
	ldr r1, _022DCA54 ; =ov00_02318CC8
	ldr r2, _022DCA58 ; =ov00_02318CD0
	mov r0, r4
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x94
	movne r0, #8
	ldmneia sp!, {r3, r4, r5, r6, pc}
	mov r0, r6
	bl strlen
	mov r3, r0
	ldr r1, _022DCA5C ; =ov00_02318CD8
	mov r0, r4
	mov r2, r6
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x94
	movne r0, #8
	ldmneia sp!, {r3, r4, r5, r6, pc}
_022DC984:
	ldr r1, _022DCA60 ; =ov00_02326CC0
	add r0, sp, #0
	bl ov00_022DCAE0
	cmp r0, #0
	addeq sp, sp, #0x94
	moveq r0, #5
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	ldr r0, _022DCA64 ; =ov00_02326CDC
	add r1, sp, #0
	ldr r2, [r0]
	mov r0, r4
	bl ov00_022DCD90
	cmp r0, #0
	addeq sp, sp, #0x94
	moveq r0, #8
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	ldr r0, _022DCA4C ; =ov00_02326CB4
	ldr r0, [r0, #4]
	cmp r0, #1
	bne _022DCA00
	ldr r0, _022DCA68 ; =ov00_02318CE0
	bl strlen
	mov r3, r0
	ldr r1, _022DCA6C ; =ov00_02318CE4
	ldr r2, _022DCA68 ; =ov00_02318CE0
	mov r0, r4
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x94
	movne r0, #8
	ldmneia sp!, {r3, r4, r5, r6, pc}
_022DCA00:
	mov r0, r5
	bl wcslen
	cmp r0, #0
	beq _022DCA40
	mov r0, r5
	bl wcslen
	mov r3, r0
	ldr r1, _022DCA70 ; =ov00_02318CEC
	mov r0, r4
	mov r2, r5
	mov r3, r3, lsl #1
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x94
	movne r0, #8
	ldmneia sp!, {r3, r4, r5, r6, pc}
_022DCA40:
	mov r0, #0
	add sp, sp, #0x94
	ldmia sp!, {r3, r4, r5, r6, pc}
	.align 2, 0
_022DCA4C: .word ov00_02326CB4
_022DCA50: .word ov00_02318CBC
_022DCA54: .word ov00_02318CC8
_022DCA58: .word ov00_02318CD0
_022DCA5C: .word ov00_02318CD8
_022DCA60: .word ov00_02326CC0
_022DCA64: .word ov00_02326CDC
_022DCA68: .word ov00_02318CE0
_022DCA6C: .word ov00_02318CE4
_022DCA70: .word ov00_02318CEC
	arm_func_end ov00_022DC8D0

	arm_func_start ov00_022DCA74
ov00_022DCA74: ; 0x022DCA74
	stmdb sp!, {r4, lr}
	ldr r1, _022DCAB4 ; =ov00_02326CB4
	mov r4, r0
	ldr r0, [r1, #8]
	add r0, r0, #0x3d8
	add r0, r0, #0x1000
	bl sub_0207A048
	ldr r1, _022DCAB4 ; =ov00_02326CB4
	ldr r0, [r1, #8]
	add r0, r0, #0x1000
	str r4, [r0, #4]
	ldr r0, [r1, #8]
	add r0, r0, #0x3d8
	add r0, r0, #0x1000
	bl sub_0207A0CC
	ldmia sp!, {r4, pc}
	.align 2, 0
_022DCAB4: .word ov00_02326CB4
	arm_func_end ov00_022DCA74

	arm_func_start ov00_022DCAB8
ov00_022DCAB8: ; 0x022DCAB8
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #0x14
	mov r4, r0
	add r0, sp, #0
	bl ov00_022ED468
	add r1, sp, #0
	mov r0, r4
	bl ov00_022DCAE0
	add sp, sp, #0x14
	ldmia sp!, {r3, r4, pc}
	arm_func_end ov00_022DCAB8

	arm_func_start ov00_022DCAE0
ov00_022DCAE0: ; 0x022DCAE0
	stmdb sp!, {r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x8c
	mov r6, r1
	mov r1, #0
	mov r2, #0x94
	mov r4, r0
	bl MemsetFast
	ldmia r6, {r3, r5}
	cmp r5, #0
	cmpeq r3, #0
	mov r1, #0xe
	beq _022DCB24
	ldr r2, _022DCD70 ; =ov00_02318CF8
	mov r0, r4
	str r5, [sp]
	bl sub_0207911C
	b _022DCB3C
_022DCB24:
	ldr r3, [r6, #8]
	ldr r5, [r6, #0xc]
	ldr r2, _022DCD70 ; =ov00_02318CF8
	mov r0, r4
	str r5, [sp]
	bl sub_0207911C
_022DCB3C:
	ldrh r3, [r6, #0x10]
	ldr r2, _022DCD74 ; =ov00_02318D00
	add r0, r4, #0xe
	mov r1, #7
	bl sub_0207911C
	ldr r0, _022DCD78 ; =0x027FFE0C
	ldrb r0, [r0]
	cmp r0, #0
	bne _022DCB64
	bl WaitForever2
_022DCB64:
	ldr r0, _022DCD78 ; =0x027FFE0C
	add r1, r4, #0x15
	mov r2, #4
	bl MemcpyFast
	ldr r0, _022DCD7C ; =0x027FFE10
	ldrb r0, [r0]
	cmp r0, #0
	bne _022DCB88
	bl WaitForever2
_022DCB88:
	ldr r0, _022DCD7C ; =0x027FFE10
	add r1, r4, #0x1a
	mov r2, #2
	bl MemcpyFast
	mov r1, #0x30
	add r0, sp, #0x16
	strb r1, [r4, #0x1d]
	bl sub_0207B9EC
	ldr r5, _022DCD80 ; =ov00_02318D08
	add r7, sp, #0x16
	add r8, r4, #0x1f
	mov r6, #0
_022DCBB8:
	ldrb r2, [r7], #1
	mov r0, r8
	mov r1, r5
	bl sub_020790DC
	add r6, r6, #1
	cmp r6, #6
	add r8, r8, #2
	blt _022DCBB8
	add r0, sp, #0x38
	bl GetDsFirmwareUserSettings
	ldrb r0, [sp, #0x38]
	ldr r2, _022DCD80 ; =ov00_02318D08
	mov r1, #3
	cmp r0, #8
	movhs r0, #1
	strhsb r0, [sp, #0x38]
	ldrb r3, [sp, #0x38]
	add r0, r4, #0x2c
	bl sub_0207911C
	add r0, sp, #0x3c
	add r1, r4, #0x7e
	mov r2, #0x14
	bl MemcpyFast
	ldrb r1, [sp, #0x3b]
	ldr r2, _022DCD84 ; =ov00_02318D10
	add r0, r4, #0x2f
	str r1, [sp]
	ldrb r3, [sp, #0x3a]
	mov r1, #5
	bl sub_0207911C
	add r0, sp, #0x28
	add r1, sp, #0x1c
	bl sub_020828A8
	cmp r0, #0
	addne sp, sp, #0x8c
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, pc}
	ldr r0, [sp, #0x2c]
	ldr r2, _022DCD88 ; =ov00_02318D1C
	str r0, [sp]
	ldr r1, [sp, #0x30]
	add r0, r4, #0x34
	str r1, [sp, #4]
	ldr r3, [sp, #0x1c]
	mov r1, #0xd
	str r3, [sp, #8]
	ldr r3, [sp, #0x20]
	str r3, [sp, #0xc]
	ldr r3, [sp, #0x24]
	str r3, [sp, #0x10]
	ldr r3, [sp, #0x28]
	bl sub_0207911C
	bl EnableIrqFlag
	mov r6, r0
	bl ov00_022D7140
	mov r7, r0
	mov r1, #6
	bl DC_InvalidateRange
	cmp r7, #0
	bne _022DCCBC
	mov r0, r6
	bl SetIrqFlag
	add sp, sp, #0x8c
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
_022DCCBC:
	ldr r5, _022DCD80 ; =ov00_02318D08
	add r8, r4, #0x41
	mov sb, #0
_022DCCC8:
	ldrb r2, [r7, sb]
	mov r0, r8
	mov r1, r5
	bl sub_020790DC
	add sb, sb, #1
	cmp sb, #6
	add r8, r8, #2
	blt _022DCCC8
	bl ov00_022D78D0
	mov r3, r0
	cmp r3, #0xff
	beq _022DCD00
	cmp r3, #0x63
	bls _022DCD04
_022DCD00:
	mov r3, #0x63
_022DCD04:
	ldr r2, _022DCD8C ; =ov00_02318D38
	add r0, r4, #0x6f
	mov r1, #0xe
	bl sub_0207911C
	add r0, sp, #0x14
	bl ov00_022D7184
	mov r5, r0
	mov r1, #0x20
	bl DC_InvalidateRange
	cmp r5, #0
	bne _022DCD44
	mov r0, r6
	bl SetIrqFlag
	add sp, sp, #0x8c
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
_022DCD44:
	mov r0, r5
	add r1, r4, #0x4e
	mov r2, #0x20
	bl MemcpyFast
	add r0, r4, #0x72
	bl ov00_022D7900
	mov r0, r6
	bl SetIrqFlag
	mov r0, #1
	add sp, sp, #0x8c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022DCD70: .word ov00_02318CF8
_022DCD74: .word ov00_02318D00
_022DCD78: .word 0x027FFE0C
_022DCD7C: .word 0x027FFE10
_022DCD80: .word ov00_02318D08
_022DCD84: .word ov00_02318D10
_022DCD88: .word ov00_02318D1C
_022DCD8C: .word ov00_02318D38
	arm_func_end ov00_022DCAE0

	arm_func_start ov00_022DCD90
ov00_022DCD90: ; 0x022DCD90
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #0x28
	mov r4, r2
	mov r6, r0
	mov r5, r1
	mov ip, #1
	ldr r2, _022DD094 ; =ov00_02318D48
	add r0, sp, #4
	mov r1, #0x21
	mov r3, #3
	str ip, [sp]
	bl sub_0207911C
	add r0, sp, #4
	bl strlen
	mov r3, r0
	ldr r1, _022DD098 ; =ov00_02318D54
	mov r0, r6
	add r2, sp, #4
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x28
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	mov r0, r5
	bl strlen
	mov r3, r0
	ldr r1, _022DD09C ; =ov00_02318D5C
	mov r0, r6
	mov r2, r5
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x28
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	add r0, r5, #0xe
	bl strlen
	mov r3, r0
	ldr r1, _022DD0A0 ; =ov00_02318D64
	mov r0, r6
	add r2, r5, #0xe
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x28
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	add r0, r5, #0x41
	bl strlen
	mov r3, r0
	ldr r1, _022DD0A4 ; =ov00_02318D6C
	mov r0, r6
	add r2, r5, #0x41
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x28
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	add r0, r5, #0x6f
	bl strlen
	mov r3, r0
	ldr r1, _022DD0A8 ; =ov00_02318D74
	mov r0, r6
	add r2, r5, #0x6f
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x28
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	add r0, r5, #0x15
	bl strlen
	mov r3, r0
	ldr r1, _022DD0AC ; =ov00_02318D7C
	mov r0, r6
	add r2, r5, #0x15
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x28
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	add r0, r5, #0x1a
	bl strlen
	mov r3, r0
	ldr r1, _022DD0B0 ; =ov00_02318D84
	mov r0, r6
	add r2, r5, #0x1a
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x28
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	add r0, r5, #0x1d
	bl strlen
	mov r3, r0
	ldr r1, _022DD0B4 ; =ov00_02318D8C
	mov r0, r6
	add r2, r5, #0x1d
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x28
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	add r0, r5, #0x1f
	bl strlen
	mov r3, r0
	ldr r1, _022DD0B8 ; =ov00_02318D94
	mov r0, r6
	add r2, r5, #0x1f
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x28
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	add r0, r5, #0x2c
	bl strlen
	mov r3, r0
	ldr r1, _022DD0BC ; =ov00_02318D9C
	mov r0, r6
	add r2, r5, #0x2c
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x28
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	add r0, r5, #0x2f
	bl strlen
	mov r3, r0
	ldr r1, _022DD0C0 ; =ov00_02318DA4
	mov r0, r6
	add r2, r5, #0x2f
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x28
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	add r0, r5, #0x34
	bl strlen
	mov r3, r0
	ldr r1, _022DD0C4 ; =ov00_02318DAC
	mov r0, r6
	add r2, r5, #0x34
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x28
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	add r0, r5, #0x7e
	bl wcslen
	mov r3, r0
	ldr r1, _022DD0C8 ; =ov00_02318DB4
	mov r0, r6
	add r2, r5, #0x7e
	mov r3, r3, lsl #1
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x28
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	cmp r4, #1
	bne _022DD034
	add r0, r5, #0x4e
	bl strlen
	mov r3, r0
	ldr r1, _022DD0CC ; =ov00_02318DBC
	mov r0, r6
	add r2, r5, #0x4e
	bl ov00_022DDAE0
	cmp r0, #0
	addne sp, sp, #0x28
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
_022DD034:
	ldr r2, _022DD0D0 ; =ov00_02318DC4
	mov ip, #1
	add r0, sp, #4
	mov r1, #0x21
	mov r3, #3
	str ip, [sp]
	bl sub_0207911C
	ldr r1, _022DD0D4 ; =ov00_02318DDC
	add r2, sp, #4
	mov r0, r6
	bl ov00_022DDA04
	cmp r0, #0
	addne sp, sp, #0x28
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	ldr r1, _022DD0D8 ; =ov00_02318DE8
	mov r0, r6
	add r2, r5, #0x15
	bl ov00_022DDA04
	cmp r0, #0
	moveq r0, #1
	movne r0, #0
	add sp, sp, #0x28
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022DD094: .word ov00_02318D48
_022DD098: .word ov00_02318D54
_022DD09C: .word ov00_02318D5C
_022DD0A0: .word ov00_02318D64
_022DD0A4: .word ov00_02318D6C
_022DD0A8: .word ov00_02318D74
_022DD0AC: .word ov00_02318D7C
_022DD0B0: .word ov00_02318D84
_022DD0B4: .word ov00_02318D8C
_022DD0B8: .word ov00_02318D94
_022DD0BC: .word ov00_02318D9C
_022DD0C0: .word ov00_02318DA4
_022DD0C4: .word ov00_02318DAC
_022DD0C8: .word ov00_02318DB4
_022DD0CC: .word ov00_02318DBC
_022DD0D0: .word ov00_02318DC4
_022DD0D4: .word ov00_02318DDC
_022DD0D8: .word ov00_02318DE8
	arm_func_end ov00_022DCD90

	arm_func_start ov00_022DD0DC
ov00_022DD0DC: ; 0x022DD0DC
	stmdb sp!, {r4, r5, r6, lr}
	mov r5, r1
	ldr r2, _022DD1E4 ; =0x00001C14
	mov r6, r0
	ldr r4, [r5, #0xc]
	mov r1, #0
	bl MemsetFast
	add r1, r6, #4
	add r0, r6, #0x1000
	mvn r2, #0
	str r2, [r0, #0xa30]
	mov lr, r5
	str r2, [r0, #0xa34]
	add ip, r1, #0x1000
	ldmia lr!, {r0, r1, r2, r3}
	stmia ip!, {r0, r1, r2, r3}
	ldmia lr, {r0, r1, r2}
	stmia ip, {r0, r1, r2}
	ldr r0, _022DD1E8 ; =ov00_02318E28
	ldr r1, _022DD1EC ; =0x00000B68
	blx r4
	add r1, r6, #0x1000
	str r0, [r1, #0x9cc]
	cmp r0, #0
	moveq r0, #1
	streq r0, [r1, #0x20]
	ldmeqia sp!, {r4, r5, r6, pc}
	ldr r0, _022DD1F0 ; =ov00_02318E40
	ldr r1, _022DD1F4 ; =0x000005EA
	blx r4
	add r2, r6, #0x1000
	str r0, [r2, #0x9d0]
	cmp r0, #0
	moveq r0, #1
	streq r0, [r2, #0x20]
	ldmeqia sp!, {r4, r5, r6, pc}
	add r1, r6, #0x208
	ldr r2, [r2, #0xc]
	mov r0, r6
	add r1, r1, #0x1800
	bl ov00_022DDC80
	cmp r0, #0
	bne _022DD198
	add r1, r6, #0x1000
	mov r0, #1
	str r0, [r1, #0x20]
	ldmia sp!, {r4, r5, r6, pc}
_022DD198:
	ldr r1, [r5]
	mov r0, r6
	bl ov00_022DDDC0
	cmp r0, #0
	bne _022DD1BC
	add r1, r6, #0x1000
	mov r0, #1
	str r0, [r1, #0x20]
	ldmia sp!, {r4, r5, r6, pc}
_022DD1BC:
	mov r0, r6
	bl ov00_022DD944
	add r1, r6, #0x1000
	str r0, [r1, #0x20]
	cmp r0, #0
	moveq r0, #0xff
	streqb r0, [r1]
	add r0, r6, #0x1000
	ldr r0, [r0, #0x20]
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022DD1E4: .word 0x00001C14
_022DD1E8: .word ov00_02318E28
_022DD1EC: .word 0x00000B68
_022DD1F0: .word ov00_02318E40
_022DD1F4: .word 0x000005EA
	arm_func_end ov00_022DD0DC

	arm_func_start ov00_022DD1F8
ov00_022DD1F8: ; 0x022DD1F8
	stmdb sp!, {r4, lr}
	sub sp, sp, #8
	ldr r1, _022DD27C ; =ov00_02318E58
	ldr r2, _022DD280 ; =ov00_02318E64
	mov r4, r0
	bl ov00_022DDA04
	cmp r0, #0
	addne sp, sp, #8
	movne r0, #1
	ldmneia sp!, {r4, pc}
	add r0, r4, #0x1000
	ldr r0, [r0, #0x9f8]
	ldr r1, _022DD284 ; =ov00_02318E6C
	bl strstr
	add r0, r0, #4
	bl strlen
	movs r3, r0
	beq _022DD270
	ldr r2, _022DD288 ; =ov00_02318E74
	add r0, sp, #0
	mov r1, #7
	bl sub_0207911C
	ldr r1, _022DD28C ; =ov00_02318E78
	add r2, sp, #0
	mov r0, r4
	bl ov00_022DDA04
	cmp r0, #0
	addne sp, sp, #8
	movne r0, #1
	ldmneia sp!, {r4, pc}
_022DD270:
	mov r0, #0
	add sp, sp, #8
	ldmia sp!, {r4, pc}
	.align 2, 0
_022DD27C: .word ov00_02318E58
_022DD280: .word ov00_02318E64
_022DD284: .word ov00_02318E6C
_022DD288: .word ov00_02318E74
_022DD28C: .word ov00_02318E78
	arm_func_end ov00_022DD1F8

	arm_func_start ov00_022DD290
ov00_022DD290: ; 0x022DD290
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #8
	mov r5, r0
	add r0, r5, #0x3f8
	add r2, r5, #0x1000
	mov r3, #0
	add r0, r0, #0x1800
	mov r4, r1
	str r3, [r2, #0xc10]
	bl OS_InitMutex
	add r0, r5, #0x218
	add r0, r0, #0x1800
	bl OS_InitMutex
	add r0, r5, #0x1000
	ldr r0, [r0, #0x18]
	cmp r0, #1
	ldreq r0, _022DD344 ; =ov00_02326CD4
	moveq r1, #1
	ldrne r0, _022DD344 ; =ov00_02326CD4
	movne r1, #0
	str r1, [r0]
	add r0, r5, #0x1000
	ldr r0, [r0, #0xba4]
	cmp r0, #0
	beq _022DD30C
	add r0, r5, #0x338
	add r0, r0, #0x1800
	bl sub_02079830
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, pc}
_022DD30C:
	add r0, r5, #0x338
	mov r1, #0x1000
	str r1, [sp]
	ldr r1, _022DD348 ; =ov00_022DD574
	mov r2, r5
	add r0, r0, #0x1800
	add r3, r5, #0x1000
	str r4, [sp, #4]
	bl StartThread
	add r0, r5, #0x338
	add r0, r0, #0x1800
	bl OS_WakeupThreadDirect
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022DD344: .word ov00_02326CD4
_022DD348: .word ov00_022DD574
	arm_func_end ov00_022DD290

	arm_func_start ov00_022DD34C
ov00_022DD34C: ; 0x022DD34C
	stmdb sp!, {r4, lr}
	mov r4, r0
	add r0, r4, #0x1000
	ldrb r0, [r0]
	cmp r0, #0xff
	ldmneia sp!, {r4, pc}
	add r0, r4, #0x3f8
	add r0, r0, #0x1800
	bl sub_0207A048
	add r0, r4, #0x3f8
	add r1, r4, #0x1000
	mov r2, #1
	add r0, r0, #0x1800
	str r2, [r1, #0xc10]
	bl sub_0207A0CC
	add r0, r4, #0x1000
	ldr r0, [r0, #0xba4]
	cmp r0, #0
	ldmeqia sp!, {r4, pc}
	add r0, r4, #0x338
	add r0, r0, #0x1800
	bl sub_02079800
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022DD34C

	arm_func_start ov00_022DD3A8
ov00_022DD3A8: ; 0x022DD3A8
	stmdb sp!, {r4, lr}
	mov r4, r0
	add r0, r4, #0x1000
	ldr r0, [r0, #0x130]
	cmp r0, #1
	bne _022DD3DC
	add r0, r4, #0x1d4
	add r0, r0, #0x1800
	bl sub_0207BB50
	add r0, r4, #0x1d4
	add r0, r0, #0x1800
	mov r1, #0x20
	bl ov00_022D1F04
_022DD3DC:
	add r0, r4, #0x3f8
	add r0, r0, #0x1800
	bl sub_0207A048
	add r0, r4, #0x1000
	ldr r0, [r0, #0xc10]
	cmp r0, #1
	add r0, r4, #0x3f8
	add r0, r0, #0x1800
	bne _022DD40C
	bl sub_0207A0CC
	mov r0, #0
	ldmia sp!, {r4, pc}
_022DD40C:
	bl sub_0207A0CC
	mov r0, #0xa
	bl sub_02079B14
	mov r0, #1
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022DD3A8

	arm_func_start ov00_022DD420
ov00_022DD420: ; 0x022DD420
	stmdb sp!, {r4, lr}
	mov r4, r0
	add r0, r4, #0x138
	add r0, r0, #0x1000
	mov r1, #0
	mov r2, #0x64
	bl MemsetFast
	ldr r0, _022DD470 ; =0x00000B68
	add r1, r4, #0x1000
	str r0, [r1, #0x174]
	ldr r3, [r1, #0x9cc]
	add r0, r4, #0x138
	ldr r2, _022DD474 ; =0x000005EA
	str r3, [r1, #0x178]
	str r2, [r1, #0x180]
	ldr r2, [r1, #0x9d0]
	add r0, r0, #0x1000
	str r2, [r1, #0x184]
	bl ov00_022CB138
	ldmia sp!, {r4, pc}
	.align 2, 0
_022DD470: .word 0x00000B68
_022DD474: .word 0x000005EA
	arm_func_end ov00_022DD420

	arm_func_start ov00_022DD478
ov00_022DD478: ; 0x022DD478
	ldr ip, _022DD488 ; =ov00_022CCC58
	add r0, r0, #0x1000
	ldr r0, [r0, #0x124]
	bx ip
	.align 2, 0
_022DD488: .word ov00_022CCC58
	arm_func_end ov00_022DD478

	arm_func_start ov00_022DD48C
ov00_022DD48C: ; 0x022DD48C
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r5, r0
	add r0, r5, #0x1000
	ldr r6, [r0, #0xa08]
	add r2, r5, #0x208
	ldr r1, _022DD568 ; =ov00_02318E6C
	mov r0, r6
	add r4, r2, #0x1800
	bl strstr
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r1, _022DD568 ; =ov00_02318E6C
	mov r0, r6
	bl strstr
	add r1, r5, #0x218
	add r6, r0, #4
	add r0, r1, #0x1800
	bl sub_0207A048
	ldr r0, [r4, #4]
	add r1, r5, #0x218
	sub r2, r0, r6
	add r0, r5, #0x1000
	str r2, [r0, #0xa34]
	add r0, r1, #0x1800
	bl sub_0207A0CC
	ldr r0, [r4]
	ldr r1, _022DD56C ; =ov00_02318E88
	bl strstr
	movs r8, r0
	moveq r0, #1
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r0, _022DD56C ; =ov00_02318E88
	bl strlen
	mov r7, r0
	ldr r1, _022DD570 ; =ov00_02318E9C
	add r0, r8, r7
	bl strstr
	mov r6, r0
	add r0, r5, #0x218
	ldrsb r4, [r6]
	mov r1, #0
	add r0, r0, #0x1800
	strb r1, [r6]
	bl sub_0207A048
	add r0, r8, r7
	bl sub_0208B360
	add r1, r5, #0x1000
	add r2, r5, #0x218
	str r0, [r1, #0xa30]
	add r0, r2, #0x1800
	bl sub_0207A0CC
	strb r4, [r6]
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022DD568: .word ov00_02318E6C
_022DD56C: .word ov00_02318E88
_022DD570: .word ov00_02318E9C
	arm_func_end ov00_022DD48C

	arm_func_start ov00_022DD574
ov00_022DD574: ; 0x022DD574
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x14
	mov sl, r0
	add r0, sl, #0x1000
	ldr r8, [r0, #0x1c]
	add r0, sl, #0x138
	add r1, sl, #0x19c
	add r2, sl, #0x208
	add r4, r0, #0x1000
	cmp r8, #0
	mov r0, sl
	add r5, r1, #0x1000
	add r7, r2, #0x1800
	mov fp, #0
	ldrle r8, _022DD87C ; =0x0000EA60
	bl ov00_022DD420
	mov r0, sl
	bl ov00_022DD478
	movs r6, r0
	add r0, sl, #0x1000
	moveq r1, #2
	streq r1, [r0, #0x20]
	addeq sp, sp, #0x14
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	str r6, [r0, #0x12c]
	bl ov00_022CB1F0
	add r0, sl, #0x1000
	ldr r0, [r0, #0x130]
	cmp r0, #1
	bne _022DD628
	mov r0, r5
	mov r1, #0
	mov r2, #0x830
	bl MemsetFast
	ldr r1, _022DD880 ; =ov00_022DDC74
	add r0, sl, #0x1000
	str r1, [r5, #0x810]
	ldr r1, [r0, #0x124]
	ldr r0, _022DD884 ; =ov00_02318DF8
	str r1, [r5, #0x800]
	mov r1, #0xc
	str r5, [r4, #0xc]
	bl ov00_022CFE3C
	mov r0, #1
	bl ov00_022D2B44
_022DD628:
	add r0, sl, #0x1100
	ldrh r1, [r0, #0x34]
	mov r2, r6
	mov r0, #0
	bl ov00_022CB190
	bl ov00_022CB32C
	cmp r0, #0
	add r0, sl, #0x1000
	beq _022DD664
	mov r1, #3
	str r1, [r0, #0x20]
	bl ov00_022CB224
	bl ov00_022CB14C
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022DD664:
	ldr r4, [r0, #0x9f8]
	mov r0, r4
	bl strlen
	mov r1, r0
	mov r0, r4
	bl ov00_022CBA58
	str r0, [sp, #0x10]
	cmp r0, #0
	bgt _022DD698
	add r0, sl, #0x1000
	mov r1, #5
	str r1, [r0, #0x20]
	b _022DD864
_022DD698:
	bl ov00_022CBB60
	mov r0, sl
	bl ov00_022DD3A8
	cmp r0, #0
	bne _022DD6BC
	add r0, sl, #0x1000
	mov r1, #7
	str r1, [r0, #0x20]
	b _022DD864
_022DD6BC:
	ldr r0, [r7]
	str r0, [r7, #4]
	ldr r1, [r7]
	ldr r0, [r7, #0xc]
	add r0, r1, r0
	str r0, [r7, #8]
	bl sub_0207AE44
	str r0, [sp, #8]
	add r0, sl, #0x234
	str r1, [sp, #4]
	add r5, sl, #0x218
	add r6, r0, #0x1800
	add r4, sl, #0x1000
_022DD6F0:
	ldr r0, _022DD888 ; =ov00_023250C8
	ldr r0, [r0]
	cmp r0, #0
	bne _022DD710
	add r0, sl, #0x1000
	mov r1, #5
	str r1, [r0, #0x20]
	b _022DD864
_022DD710:
	bl ov00_022CBAF0
	str r0, [sp, #0x10]
	cmp r0, #0
	blt _022DD840
	ble _022DD7C4
	bl sub_0207AE44
	str r0, [sp, #8]
	add r0, sp, #0x10
	str r1, [sp, #4]
	bl ov00_022CB550
	cmp r0, #0
	beq _022DD840
	ldmib r7, {r1, r2}
	sub r2, r2, #1
	ldr sb, [sp, #0x10]
	sub r2, r2, r1
	cmp sb, r2
	movge sb, r2
	mov r2, sb
	bl MemcpyFast
	ldr r0, [r7, #4]
	cmp fp, #1
	add r1, r0, sb
	str r1, [r7, #4]
	mov r0, #0
	strb r0, [r1]
	bne _022DD79C
	add r0, r5, #0x1800
	bl sub_0207A048
	ldr r1, [r6]
	add r0, r5, #0x1800
	add r1, r1, sb
	str r1, [r6]
	bl sub_0207A0CC
	b _022DD7A8
_022DD79C:
	mov r0, sl
	bl ov00_022DD48C
	mov fp, r0
_022DD7A8:
	ldr r0, [sp, #0x10]
	cmp r0, sb
	bls _022DD7BC
	bl ov00_022CB644
	b _022DD840
_022DD7BC:
	mov r0, sb
	bl ov00_022CB644
_022DD7C4:
	ldr r1, [r4, #0xa30]
	cmp r1, #0
	ldrge r0, [r4, #0xa34]
	cmpge r0, r1
	bge _022DD840
	bl sub_0207AE44
	ldr r2, [sp, #8]
	mov r3, #0
	subs r2, r0, r2
	ldr r0, [sp, #4]
	sbc r0, r1, r0
	mov r1, r0, lsl #6
	orr r1, r1, r2, lsr #26
	mov r0, r2, lsl #6
	ldr r2, _022DD88C ; =0x000082EA
	bl _ll_udiv
	cmp r1, r8, asr #31
	cmpeq r0, r8
	bls _022DD820
	add r0, sl, #0x1000
	mov r1, #6
	str r1, [r0, #0x20]
	b _022DD864
_022DD820:
	mov r0, sl
	bl ov00_022DD3A8
	cmp r0, #0
	bne _022DD6F0
	add r0, sl, #0x1000
	mov r1, #7
	str r1, [r0, #0x20]
	b _022DD864
_022DD840:
	bl ov00_022CB3BC
	bl ov00_022CB3F8
	bl ov00_022CB224
	bl ov00_022CB14C
	add r0, sl, #0x1000
	mov r1, #8
	str r1, [r0, #0x20]
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022DD864:
	bl ov00_022CB3BC
	bl ov00_022CB3F8
	bl ov00_022CB224
	bl ov00_022CB14C
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022DD87C: .word 0x0000EA60
_022DD880: .word ov00_022DDC74
_022DD884: .word ov00_02318DF8
_022DD888: .word ov00_023250C8
_022DD88C: .word 0x000082EA
	arm_func_end ov00_022DD574

	arm_func_start ov00_022DD890
ov00_022DD890: ; 0x022DD890
	stmdb sp!, {r3, r4, r5, lr}
	movs r5, r0
	add r1, r5, #0x1000
	ldr r4, [r1, #0x14]
	ldmeqia sp!, {r3, r4, r5, pc}
	add r1, r5, #0x238
	add r1, r1, #0x1800
	mov r2, #0x20
	bl ov00_022DE3F4
	add r1, r5, #0x208
	mov r0, r5
	add r1, r1, #0x1800
	bl ov00_022DDCD8
	add r1, r5, #0x1f8
	mov r0, r5
	add r1, r1, #0x1800
	bl ov00_022DDCD8
	add r0, r5, #0x1000
	ldr r1, [r0, #0x9cc]
	cmp r1, #0
	beq _022DD8FC
	ldr r0, _022DD938 ; =ov00_02318EA0
	mov r2, #0
	blx r4
	add r0, r5, #0x1000
	mov r1, #0
	str r1, [r0, #0x9cc]
_022DD8FC:
	add r0, r5, #0x1000
	ldr r1, [r0, #0x9d0]
	cmp r1, #0
	beq _022DD924
	ldr r0, _022DD93C ; =ov00_02318EB8
	mov r2, #0
	blx r4
	add r0, r5, #0x1000
	mov r1, #0
	str r1, [r0, #0x9d0]
_022DD924:
	ldr r2, _022DD940 ; =0x00001C14
	mov r0, r5
	mov r1, #0
	bl MemsetFast
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022DD938: .word ov00_02318EA0
_022DD93C: .word ov00_02318EB8
_022DD940: .word 0x00001C14
	arm_func_end ov00_022DD890

	arm_func_start ov00_022DD944
ov00_022DD944: ; 0x022DD944
	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
	sub sp, sp, #4
	mov r7, r0
	add r0, r7, #0x1000
	ldr r1, [r0, #8]
	add r0, r7, #0x1f8
	cmp r1, #0
	ldreq r6, _022DD9FC ; =ov00_02318ED0
	add r5, r0, #0x1800
	add r0, r7, #0x1000
	ldrne r6, _022DDA00 ; =ov00_02318F24
	ldr r0, [r0, #0x124]
	bl strlen
	mov r4, r0
	mov r0, r6
	bl strlen
	add r1, r7, #0x1000
	mov r8, r0
	ldr r0, [r1, #0x128]
	bl strlen
	sub r1, r8, #4
	add r0, r1, r0
	add r2, r4, r0
	add r0, r7, #0x1f8
	add r1, r0, #0x1800
	add r2, r2, #0x400
	mov r0, r7
	bl ov00_022DDC80
	cmp r0, #1
	addne sp, sp, #4
	movne r0, #1
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
	add r3, r7, #0x1000
	ldr r0, [r3, #0x124]
	mov r2, r6
	str r0, [sp]
	ldr r0, [r5, #4]
	ldr r1, [r5, #0xc]
	ldr r3, [r3, #0x128]
	bl sub_0207911C
	ldr r1, [r5, #4]
	add r0, r1, r0
	str r0, [r5, #4]
	mov r0, #0
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022DD9FC: .word ov00_02318ED0
_022DDA00: .word ov00_02318F24
	arm_func_end ov00_022DD944

	arm_func_start ov00_022DDA04
ov00_022DDA04: ; 0x022DDA04
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r8, r0
	mov r6, r2
	add r2, r8, #0x1f8
	mov r0, r6
	mov r7, r1
	add r5, r2, #0x1800
	bl strlen
	mov r4, r0
	ldr r0, _022DDAD8 ; =ov00_02318F44
	bl strlen
	mov sb, r0
	mov r0, r7
	bl strlen
	sub r1, sb, #4
	add r0, r1, r0
	add r4, r4, r0
	ldmib r5, {r1, r2}
	add r0, r4, #1
	sub r1, r2, r1
	cmp r0, r1
	ble _022DDA7C
	sub r2, r4, r1
	mov r0, r8
	mov r1, r5
	add r2, r2, #1
	bl ov00_022DDD18
	cmp r0, #0
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022DDA7C:
	ldr r0, [r5]
	ldr r1, _022DDADC ; =ov00_02318E6C
	bl strstr
	add sb, r0, #2
	ldrsb r8, [r0, #2]
	mov r0, sb
	bl strlen
	add r2, r0, #1
	add r0, sb, r4
	mov r1, sb
	bl memmove
	ldr r2, _022DDAD8 ; =ov00_02318F44
	str r6, [sp]
	mov r3, r7
	mov r0, sb
	add r1, r4, #1
	bl sub_0207911C
	strb r8, [sb, r0]
	ldr r1, [r5, #4]
	mov r0, #0
	add r1, r1, r4
	str r1, [r5, #4]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022DDAD8: .word ov00_02318F44
_022DDADC: .word ov00_02318E6C
	arm_func_end ov00_022DDA04

	arm_func_start ov00_022DDAE0
ov00_022DDAE0: ; 0x022DDAE0
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov sl, r0
	add r0, sl, #0x1000
	ldr r4, [r0, #0x9f4]
	add r0, sl, #0x1f8
	cmp r4, #0
	ldreq r7, _022DDBE4 ; =ov00_02318F50
	mov r8, r2
	add r4, sl, #0x1000
	add r6, r0, #0x1800
	ldr r0, [r4, #0x9f4]
	mov fp, r3
	add r5, r0, #1
	mov r2, #0
	mov sb, r1
	ldrne r7, _022DDBE8 ; =ov00_02318F54
	mov r0, r8
	mov r1, fp
	mov r3, r2
	str r5, [r4, #0x9f4]
	bl ov00_022DFF4C
	mov r5, r0
	mov r0, r7
	bl strlen
	mov r4, r0
	mov r0, sb
	bl strlen
	sub r1, r4, #2
	add r2, r1, r0
	ldmib r6, {r0, r1}
	add r2, r5, r2
	sub r1, r1, r0
	cmp r2, r1
	ble _022DDB90
	sub r2, r2, r1
	mov r0, sl
	mov r1, r6
	add r2, r2, #1
	bl ov00_022DDD18
	cmp r0, #0
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldmib r6, {r0, r1}
	sub r1, r1, r0
_022DDB90:
	mov r2, r7
	mov r3, sb
	bl sub_0207911C
	ldr r2, [r6, #4]
	mov r1, fp
	add r2, r2, r0
	str r2, [r6, #4]
	ldr r0, [r6, #8]
	sub r3, r0, r2
	mov r0, r8
	sub r3, r3, #1
	bl ov00_022DFF4C
	cmp r0, #0
	movlt r0, #1
	ldmltia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r6, #4]
	mov r0, #0
	add r1, r1, r5
	str r1, [r6, #4]
	strb r0, [r1]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022DDBE4: .word ov00_02318F50
_022DDBE8: .word ov00_02318F54
	arm_func_end ov00_022DDAE0

	arm_func_start ov00_022DDBEC
ov00_022DDBEC: ; 0x022DDBEC
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r6, r1
	add r1, r7, #0x1f8
	mov r0, r6
	add r5, r1, #0x1800
	bl strlen
	mov r4, r0
	ldmib r5, {r0, r1}
	sub r1, r1, r0
	cmp r4, r1
	ble _022DDC44
	sub r2, r4, r1
	mov r0, r7
	mov r1, r5
	add r2, r2, #1
	bl ov00_022DDD18
	cmp r0, #0
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldmib r5, {r0, r1}
	sub r1, r1, r0
_022DDC44:
	ldr r2, _022DDC70 ; =ov00_02318F5C
	mov r3, r6
	bl sub_0207911C
	cmp r0, r4
	movne r0, #1
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, [r5, #4]
	add r0, r1, r0
	str r0, [r5, #4]
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022DDC70: .word ov00_02318F5C
	arm_func_end ov00_022DDBEC

	arm_func_start ov00_022DDC74
ov00_022DDC74: ; 0x022DDC74
	tst r0, #0x8000
	bicne r0, r0, #0x8000
	bx lr
	arm_func_end ov00_022DDC74

	arm_func_start ov00_022DDC80
ov00_022DDC80: ; 0x022DDC80
	stmdb sp!, {r3, r4, r5, lr}
	movs r4, r2
	add r0, r0, #0x1000
	ldr r2, [r0, #0x10]
	mov r5, r1
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r0, _022DDCD4 ; =ov00_02318F60
	mov r1, r4
	blx r2
	str r0, [r5]
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	str r0, [r5, #4]
	str r4, [r5, #0xc]
	ldr r0, [r5]
	add r0, r0, r4
	str r0, [r5, #8]
	mov r0, #1
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022DDCD4: .word ov00_02318F60
	arm_func_end ov00_022DDC80

	arm_func_start ov00_022DDCD8
ov00_022DDCD8: ; 0x022DDCD8
	stmdb sp!, {r4, lr}
	mov r4, r1
	ldr r1, [r4]
	add r0, r0, #0x1000
	cmp r1, #0
	ldr r3, [r0, #0x14]
	beq _022DDD00
	ldr r0, _022DDD14 ; =ov00_02318F74
	mov r2, #0
	blx r3
_022DDD00:
	mov r0, r4
	mov r1, #0
	mov r2, #0x10
	bl MemsetFast
	ldmia sp!, {r4, pc}
	.align 2, 0
_022DDD14: .word ov00_02318F74
	arm_func_end ov00_022DDCD8

	arm_func_start ov00_022DDD18
ov00_022DDD18: ; 0x022DDD18
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	add r0, r0, #0x1000
	ldr r7, [r0, #0x14]
	mov r5, r2
	mov r6, r1
	cmp r5, #0
	ldr r2, [r0, #0x10]
	movle r0, #0
	ldmleia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, [r6, #0xc]
	ldr r0, _022DDDB8 ; =ov00_02318F88
	add r1, r1, r5
	blx r2
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r0, [r6]
	ldr r2, [r6, #0xc]
	mov r1, r4
	bl MemcpyFast
	ldr r1, [r6]
	ldr r0, _022DDDBC ; =ov00_02318F74
	mov r2, #0
	blx r7
	cmp r4, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldmia r6, {r0, r1}
	sub r0, r4, r0
	add r0, r1, r0
	str r0, [r6, #4]
	ldr r1, [r6, #0xc]
	mov r0, #1
	add r1, r1, r5
	str r1, [r6, #0xc]
	str r4, [r6]
	ldr r1, [r6, #0xc]
	add r1, r4, r1
	str r1, [r6, #8]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022DDDB8: .word ov00_02318F88
_022DDDBC: .word ov00_02318F74
	arm_func_end ov00_022DDD18

	arm_func_start ov00_022DDDC0
ov00_022DDDC0: ; 0x022DDDC0
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r1
	mov r5, r0
	mov r0, r6
	mov r4, #0
	bl strlen
	cmp r0, #0x100
	movhs r0, r4
	ldmhsia sp!, {r4, r5, r6, pc}
	add r0, r5, #0x24
	mov r1, r6
	add r0, r0, #0x1000
	mov r2, #0x100
	bl strncpy
	mov r0, r6
	bl strlen
	add r1, r5, #0x24
	mov r6, r0
	add r0, r1, #0x1000
	bl strlen
	cmp r6, r0
	movne r0, r4
	ldmneia sp!, {r4, r5, r6, pc}
	add r0, r5, #0x24
	ldr r1, _022DDF04 ; =ov00_02318F98
	add r0, r0, #0x1000
	bl strstr
	cmp r0, #0
	beq _022DDE5C
	add r0, r5, #0x2b
	add r1, r0, #0x1000
	add r0, r5, #0x1000
	str r1, [r0, #0x124]
	mov r1, r4
	str r1, [r0, #0x130]
	add r0, r5, #0x1100
	mov r1, #0x50
	strh r1, [r0, #0x34]
	b _022DDE98
_022DDE5C:
	add r0, r5, #0x24
	ldr r1, _022DDF08 ; =ov00_02318FA0
	add r0, r0, #0x1000
	bl strstr
	cmp r0, #0
	moveq r0, r4
	ldmeqia sp!, {r4, r5, r6, pc}
	add r2, r0, #8
	add r0, r5, #0x1000
	mov r1, #1
	str r2, [r0, #0x124]
	str r1, [r0, #0x130]
	rsb r1, r1, #0x1bc
	add r0, r5, #0x1100
	strh r1, [r0, #0x34]
_022DDE98:
	add r0, r5, #0x1000
	ldr r0, [r0, #0x124]
	ldr r1, _022DDF0C ; =ov00_02318FAC
	bl strstr
	cmp r0, #0
	movne r1, #0
	strneb r1, [r0]
	addne r4, r0, #1
	add r0, r5, #0x1000
	ldr r0, [r0, #0x124]
	ldr r1, _022DDF10 ; =ov00_02318FB0
	bl strstr
	cmp r0, #0
	mov r1, #0
	addeq r0, r5, #0x1000
	strneb r1, [r0]
	addne r1, r0, #1
	addne r0, r5, #0x1000
	str r1, [r0, #0x128]
	cmp r4, #0
	beq _022DDEFC
	mov r0, r4
	bl sub_0208B360
	add r1, r5, #0x1100
	strh r0, [r1, #0x34]
_022DDEFC:
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022DDF04: .word ov00_02318F98
_022DDF08: .word ov00_02318FA0
_022DDF0C: .word ov00_02318FAC
_022DDF10: .word ov00_02318FB0
	arm_func_end ov00_022DDDC0

	arm_func_start ov00_022DDF14
ov00_022DDF14: ; 0x022DDF14
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r8, r1
	add r0, r0, #0x1000
	ldmib r8, {r1, r4}
	cmp r4, r1
	ldr r4, [r0, #0x10]
	ldr r5, [r0, #0x14]
	mov r7, r2
	mov r6, r3
	movgt r0, #0
	ldmgtia sp!, {r4, r5, r6, r7, r8, pc}
	mov r0, r7
	bl strlen
	mov r1, r0
	ldr r0, _022DE058 ; =ov00_02318FB4
	add r1, r1, #1
	blx r4
	ldr r2, [r8]
	ldr r1, [r8, #8]
	str r0, [r2, r1, lsl #3]
	ldr r1, [r8, #8]
	ldr r2, [r8]
	ldr r0, [r2, r1, lsl #3]
	cmp r0, #0
	beq _022DDFF0
	mov r0, r6
	bl strlen
	mov r1, r0
	ldr r0, _022DE05C ; =ov00_02318FD4
	add r1, r1, #1
	blx r4
	ldr r2, [r8]
	ldr r1, [r8, #8]
	add r1, r2, r1, lsl #3
	str r0, [r1, #4]
	ldr r1, [r8, #8]
	ldr r2, [r8]
	add r0, r2, r1, lsl #3
	ldr r0, [r0, #4]
	cmp r0, #0
	beq _022DDFF0
	ldr r0, [r2, r1, lsl #3]
	mov r1, r7
	bl strcpy
	ldr r2, [r8]
	ldr r0, [r8, #8]
	mov r1, r6
	add r0, r2, r0, lsl #3
	ldr r0, [r0, #4]
	bl strcpy
	ldr r1, [r8, #8]
	mov r0, #1
	add r1, r1, #1
	str r1, [r8, #8]
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022DDFF0:
	ldr r1, [r2, r1, lsl #3]
	cmp r1, #0
	beq _022DE018
	ldr r0, _022DE060 ; =ov00_02318FF4
	mov r2, #0
	blx r5
	ldr r1, [r8]
	ldr r0, [r8, #8]
	mov r2, #0
	str r2, [r1, r0, lsl #3]
_022DE018:
	ldr r1, [r8]
	ldr r0, [r8, #8]
	add r0, r1, r0, lsl #3
	ldr r1, [r0, #4]
	cmp r1, #0
	beq _022DE050
	ldr r0, _022DE064 ; =ov00_02319010
	mov r2, #0
	blx r5
	ldr r1, [r8]
	ldr r0, [r8, #8]
	mov r2, #0
	add r0, r1, r0, lsl #3
	str r2, [r0, #4]
_022DE050:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022DE058: .word ov00_02318FB4
_022DE05C: .word ov00_02318FD4
_022DE060: .word ov00_02318FF4
_022DE064: .word ov00_02319010
	arm_func_end ov00_022DDF14

	arm_func_start ov00_022DE068
ov00_022DE068: ; 0x022DE068
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x10
	mov r4, r0
	add r0, r4, #0x238
	mov r6, r1
	add r0, r0, #0x1800
	mov r3, #0x20
	mov r1, #0
	mov r2, #0x100
	str r0, [sp, #4]
	str r3, [sp, #8]
	str r1, [sp, #0xc]
	bl MemsetFast
	add r0, r4, #0x1000
	ldr r5, [r0, #0xa08]
	ldr r1, _022DE2E8 ; =ov00_02318E6C
	mov r0, r5
	bl strstr
	str r0, [sp]
	cmp r0, #0
	addeq sp, sp, #0x10
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r0, r0, #4
	bl strlen
	ldr r1, [sp]
	add r1, r1, #4
	add fp, r1, r0
	ldr r1, _022DE2EC ; =ov00_0231902C
	mov r0, r5
	bl strstr
	movs r7, r0
	addeq sp, sp, #0x10
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldrsb sb, [r7, #4]
	ldr r2, _022DE2F0 ; =ov00_02319030
	mov r5, #0
	add r1, sp, #4
	mov r0, r4
	add r3, r7, #1
	strb r5, [r7, #4]
	bl ov00_022DDF14
	cmp r0, #1
	addne sp, sp, #0x10
	strb sb, [r7, #4]
	movne r0, r5
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp r6, #1
	beq _022DE148
	ldr r1, _022DE2F4 ; =ov00_0231903C
	add r0, r7, #1
	mov r2, #3
	bl strncmp
	cmp r0, #0
	beq _022DE154
_022DE148:
	add sp, sp, #0x10
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022DE154:
	ldr r1, _022DE2F8 ; =ov00_02318E9C
	add r0, r7, #5
	bl strstr
	cmp r0, #0
	addeq sp, sp, #0x10
	moveq r0, r5
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add sb, r0, #2
	b _022DE208
_022DE178:
	ldr r1, _022DE2FC ; =ov00_02319040
	mov r0, sb
	bl strstr
	movs r6, r0
	beq _022DE21C
	ldrsb r7, [r6]
	mov r1, #0
	add sl, r6, #2
	strb r1, [r6]
	ldr r1, _022DE2F8 ; =ov00_02318E9C
	mov r0, sl
	bl strstr
	movs r5, r0
	streqb r7, [r6]
	beq _022DE21C
	ldrsb r8, [r5]
	mov r1, #0
	mov r2, sb
	strb r1, [r5]
	mov r0, r4
	add r1, sp, #4
	mov r3, sl
	bl ov00_022DDF14
	cmp r0, #1
	beq _022DE1F0
	strb r7, [r6]
	add sp, sp, #0x10
	strb r8, [r5]
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022DE1F0:
	mov r0, sl
	bl strlen
	strb r7, [r6]
	add r0, sl, r0
	strb r8, [r5]
	add sb, r0, #2
_022DE208:
	ldrsb r0, [sb]
	cmp r0, #0xd
	ldrnesb r0, [sb, #1]
	cmpne r0, #0xa
	bne _022DE178
_022DE21C:
	ldr r0, [sp]
	add r7, r0, #4
	cmp r7, fp
	bhs _022DE2DC
_022DE22C:
	ldr r1, _022DE300 ; =ov00_02319044
	mov r0, r7
	bl strstr
	movs r5, r0
	beq _022DE2DC
	ldrsb sb, [r5]
	mov r1, #0
	add r6, r5, #1
	strb r1, [r5]
	ldr r1, _022DE304 ; =ov00_02319048
	mov r0, r6
	bl strstr
	movs sl, r0
	bne _022DE274
	ldr r1, _022DE2F8 ; =ov00_02318E9C
	mov r0, r6
	bl strstr
	mov sl, r0
_022DE274:
	cmp sl, #0
	ldrnesb r8, [sl]
	movne r0, #0
	mov r2, r7
	strneb r0, [sl]
	mov r0, r4
	add r1, sp, #4
	mov r3, r6
	bl ov00_022DDF14
	cmp r0, #1
	beq _022DE2B8
	strb sb, [r5]
	cmp sl, #0
	add sp, sp, #0x10
	strneb r8, [sl]
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022DE2B8:
	mov r0, r6
	bl strlen
	add r0, r6, r0
	strb sb, [r5]
	cmp sl, #0
	add r7, r0, #1
	strneb r8, [sl]
	cmp r7, fp
	blo _022DE22C
_022DE2DC:
	mov r0, #1
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022DE2E8: .word ov00_02318E6C
_022DE2EC: .word ov00_0231902C
_022DE2F0: .word ov00_02319030
_022DE2F4: .word ov00_0231903C
_022DE2F8: .word ov00_02318E9C
_022DE2FC: .word ov00_02319040
_022DE300: .word ov00_02319044
_022DE304: .word ov00_02319048
	arm_func_end ov00_022DE068

	arm_func_start ov00_022DE308
ov00_022DE308: ; 0x022DE308
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	mov r4, #0
_022DE318:
	add r0, r6, r4, lsl #3
	add r0, r0, #0x1000
	ldr r1, [r0, #0xa38]
	cmp r1, #0
	beq _022DE358
	mov r0, r5
	bl strcmp
	cmp r0, #0
	bne _022DE34C
	add r0, r6, r4, lsl #3
	add r0, r0, #0x1000
	ldr r0, [r0, #0xa3c]
	ldmia sp!, {r4, r5, r6, pc}
_022DE34C:
	add r4, r4, #1
	cmp r4, #0x20
	blt _022DE318
_022DE358:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022DE308

	arm_func_start ov00_022DE360
ov00_022DE360: ; 0x022DE360
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r2
	mov r5, r3
	bl ov00_022DE308
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	bl strlen
	mov r1, r0
	mov r0, r4
	mov r2, r6
	mov r3, r5
	bl ov00_022E00D4
	mvn r1, #0
	cmp r0, r1
	ldmeqia sp!, {r4, r5, r6, pc}
	cmp r0, r5
	ldmhsia sp!, {r4, r5, r6, pc}
	mov r1, #0
	strb r1, [r6, r0]
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022DE360

	arm_func_start ov00_022DE3B4
ov00_022DE3B4: ; 0x022DE3B4
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r2
	mov r5, r3
	bl ov00_022DE308
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	bl strlen
	cmp r0, r5
	movge r0, #0
	ldmgeia sp!, {r4, r5, r6, pc}
	mov r0, r6
	mov r1, r4
	bl strcpy
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022DE3B4

	arm_func_start ov00_022DE3F4
ov00_022DE3F4: ; 0x022DE3F4
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	add r0, r0, #0x1000
	ldr r6, [r0, #0x14]
	mov sb, r2
	mov sl, r1
	mov r8, #0
	cmp sb, #0
	ldmleia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr fp, _022DE474 ; =ov00_0231904C
	ldr r7, _022DE478 ; =ov00_02319068
	mov r5, r8
	mov r4, r8
_022DE424:
	ldr r1, [sl, r8, lsl #3]
	cmp r1, #0
	beq _022DE440
	mov r0, fp
	mov r2, #0
	blx r6
	str r5, [sl, r8, lsl #3]
_022DE440:
	add r0, sl, r8, lsl #3
	ldr r1, [r0, #4]
	cmp r1, #0
	beq _022DE464
	mov r0, r7
	mov r2, #0
	blx r6
	add r0, sl, r8, lsl #3
	str r4, [r0, #4]
_022DE464:
	add r8, r8, #1
	cmp r8, sb
	blt _022DE424
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022DE474: .word ov00_0231904C
_022DE478: .word ov00_02319068
	arm_func_end ov00_022DE3F4

	arm_func_start ov00_022DE47C
ov00_022DE47C: ; 0x022DE47C
	stmdb sp!, {r3, r4, r5, lr}
	ldr r1, _022DE544 ; =ov00_02326CD8
	mov r5, r0
	ldr r0, [r1]
	ldr r4, [r5]
	cmp r0, #0
	movne r0, #4
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r0, _022DE548 ; =ov00_023190AC
	ldr r1, _022DE54C ; =0x000011F4
	blx r4
	ldr r1, _022DE544 ; =ov00_02326CD8
	cmp r0, #0
	str r0, [r1]
	moveq r0, #4
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r2, _022DE54C ; =0x000011F4
	mov r1, #0
	bl MemsetFast
	ldr ip, _022DE544 ; =ov00_02326CD8
	ldr r1, _022DE550 ; =0xFFFE7961
	ldr r0, [ip]
	add r0, r0, #0x1000
	str r1, [r0, #4]
	ldr r3, [ip]
	ldmia r5, {r0, r1, r2}
	add r3, r3, #0x108
	add r3, r3, #0x1000
	stmia r3, {r0, r1, r2}
	ldr r0, [ip, #0x14]
	cmp r0, #0
	movne r0, #4
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r0, _022DE554 ; =ov00_023190C0
	ldr r1, _022DE558 ; =0x00001C14
	blx r4
	ldr r1, _022DE544 ; =ov00_02326CD8
	cmp r0, #0
	str r0, [r1, #0x14]
	moveq r0, #4
	ldmeqia sp!, {r3, r4, r5, pc}
	mov r0, #0
	str r0, [r1, #4]
	ldr r0, [r1]
	add r0, r0, #0x1dc
	add r0, r0, #0x1000
	bl OS_InitMutex
	bl ov00_022DE714
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022DE544: .word ov00_02326CD8
_022DE548: .word ov00_023190AC
_022DE54C: .word 0x000011F4
_022DE550: .word 0xFFFE7961
_022DE554: .word ov00_023190C0
_022DE558: .word 0x00001C14
	arm_func_end ov00_022DE47C

	arm_func_start ov00_022DE55C
ov00_022DE55C: ; 0x022DE55C
	stmdb sp!, {r4, lr}
	ldr r0, _022DE640 ; =ov00_02326CD8
	ldr r1, [r0]
	ldr r0, [r0, #0x14]
	add r1, r1, #0x1000
	cmp r0, #0
	ldr r4, [r1, #0x10c]
	beq _022DE5A0
	bl ov00_022DD890
	ldr r1, _022DE640 ; =ov00_02326CD8
	ldr r0, _022DE644 ; =ov00_023190D0
	ldr r1, [r1, #0x14]
	mov r2, #0
	blx r4
	ldr r0, _022DE640 ; =ov00_02326CD8
	mov r1, #0
	str r1, [r0, #0x14]
_022DE5A0:
	bl ov00_022DBF08
	ldr r0, _022DE640 ; =ov00_02326CD8
	ldr r0, [r0]
	cmp r0, #0
	ldmeqia sp!, {r4, pc}
	add r0, r0, #0x1000
	ldr r1, [r0, #0x114]
	cmp r1, #0
	beq _022DE5E4
	ldr r0, _022DE648 ; =ov00_023190E0
	mov r2, #0
	blx r4
	ldr r0, _022DE640 ; =ov00_02326CD8
	mov r1, #0
	ldr r0, [r0]
	add r0, r0, #0x1000
	str r1, [r0, #0x114]
_022DE5E4:
	ldr r0, _022DE640 ; =ov00_02326CD8
	ldr r0, [r0]
	add r0, r0, #0x1000
	ldr r1, [r0, #0x118]
	cmp r1, #0
	beq _022DE61C
	ldr r0, _022DE64C ; =ov00_023190FC
	mov r2, #0
	blx r4
	ldr r0, _022DE640 ; =ov00_02326CD8
	mov r1, #0
	ldr r0, [r0]
	add r0, r0, #0x1000
	str r1, [r0, #0x118]
_022DE61C:
	ldr r1, _022DE640 ; =ov00_02326CD8
	ldr r0, _022DE650 ; =ov00_0231911C
	ldr r1, [r1]
	mov r2, #0
	blx r4
	ldr r0, _022DE640 ; =ov00_02326CD8
	mov r1, #0
	str r1, [r0]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022DE640: .word ov00_02326CD8
_022DE644: .word ov00_023190D0
_022DE648: .word ov00_023190E0
_022DE64C: .word ov00_023190FC
_022DE650: .word ov00_0231911C
	arm_func_end ov00_022DE55C

	arm_func_start ov00_022DE654
ov00_022DE654: ; 0x022DE654
	stmdb sp!, {r3, lr}
	ldr r0, _022DE6B8 ; =ov00_02326CD8
	ldr r1, [r0]
	cmp r1, #0
	ldmeqia sp!, {r3, pc}
	ldr r0, [r0, #0x14]
	cmp r0, #0
	beq _022DE678
	bl ov00_022DD34C
_022DE678:
	bl ov00_022DBE7C
	ldr r0, _022DE6B8 ; =ov00_02326CD8
	ldr r1, [r0]
	add r0, r1, #0x1000
	ldr r0, [r0, #0x188]
	cmp r0, #0
	beq _022DE6A0
	add r0, r1, #0x11c
	add r0, r0, #0x1000
	bl sub_02079800
_022DE6A0:
	ldr r0, _022DE6B8 ; =ov00_02326CD8
	mvn r1, #6
	ldr r0, [r0]
	add r0, r0, #0x1000
	str r1, [r0, #4]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022DE6B8: .word ov00_02326CD8
	arm_func_end ov00_022DE654

	arm_func_start ov00_022DE6BC
ov00_022DE6BC: ; 0x022DE6BC
	stmdb sp!, {r4, lr}
	ldr r0, _022DE6F8 ; =ov00_02326CD8
	ldr r0, [r0]
	add r0, r0, #0x1dc
	add r0, r0, #0x1000
	bl sub_0207A048
	ldr r0, _022DE6F8 ; =ov00_02326CD8
	ldr r1, [r0]
	add r0, r1, #0x1dc
	add r1, r1, #0x1000
	add r0, r0, #0x1000
	ldr r4, [r1]
	bl sub_0207A0CC
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022DE6F8: .word ov00_02326CD8
	arm_func_end ov00_022DE6BC

	arm_func_start ov00_022DE6FC
ov00_022DE6FC: ; 0x022DE6FC
	ldr r0, _022DE710 ; =ov00_02326CD8
	ldr r0, [r0]
	add r0, r0, #0x1000
	ldr r0, [r0, #4]
	bx lr
	.align 2, 0
_022DE710: .word ov00_02326CD8
	arm_func_end ov00_022DE6FC

	arm_func_start ov00_022DE714
ov00_022DE714: ; 0x022DE714
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	ldr r0, _022DE794 ; =ov00_02326CD8
	ldr r1, [r0]
	add r0, r1, #0x1000
	ldr r0, [r0, #0x188]
	cmp r0, #0
	beq _022DE74C
	add r0, r1, #0x11c
	add r0, r0, #0x1000
	bl sub_02079830
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, pc}
_022DE74C:
	ldr r0, _022DE794 ; =ov00_02326CD8
	mov r3, #0x1000
	ldr r2, [r0]
	ldr r1, _022DE798 ; =ov00_022DE79C
	add r0, r2, #0x11c
	str r3, [sp]
	mov ip, #0x10
	add r0, r0, #0x1000
	add r3, r2, #0x1000
	str ip, [sp, #4]
	bl StartThread
	ldr r0, _022DE794 ; =ov00_02326CD8
	ldr r0, [r0]
	add r0, r0, #0x11c
	add r0, r0, #0x1000
	bl OS_WakeupThreadDirect
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022DE794: .word ov00_02326CD8
_022DE798: .word ov00_022DE79C
	arm_func_end ov00_022DE714

	arm_func_start ov00_022DE79C
ov00_022DE79C: ; 0x022DE79C
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x29c
	ldr r5, _022DF628 ; =ov00_02326CD8
	mov sb, #0
	ldr r0, [r5]
	mov fp, sb
	add r0, r0, #0x1000
	ldr r7, [r0, #0x108]
	ldr r8, [r0, #0x10c]
	mvn r0, #2
	str r0, [sp, #0x20]
	sub r0, r0, #1
	str r0, [sp, #0x24]
	ldr r0, [sp, #0x20]
	mov sl, sb
	sub r0, r0, #2
	str r0, [sp, #0x28]
	ldr r0, _022DF62C ; =0x00009C40
	mov r4, sb
	mov r0, r0, lsr #1
	str r0, [sp, #0x18]
	ldr r0, [sp, #0x20]
	add r0, r0, #1
	str r0, [sp, #0x1c]
_022DE7FC:
	ldr r0, _022DF630 ; =ov00_02319084
	ldr r1, _022DF634 ; =ov00_02326CF0
	ldr r0, [r0]
	str r0, [r5, #0x18]
	mov r0, #1
	str r0, [r5, #0x1c]
	mov r0, #0x1000
	str r0, [r5, #0x20]
	str r7, [r5, #0x24]
	ldr r0, [sp, #0x18]
	str r8, [r5, #0x28]
	str r0, [r5, #0x30]
	ldr r0, [r5]
	add r2, r0, #0x1000
	ldr r0, [sp, #0x1c]
	str r0, [r2, #4]
	ldr r0, [r5, #0x14]
	bl ov00_022DD0DC
	cmp r0, #0
	beq _022DE864
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #1
	bl ov00_022DF6B0
	b _022DF5D4
_022DE864:
	ldr r0, [r5, #0x14]
	bl ov00_022DD1F8
	cmp r0, #0
	beq _022DE88C
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #1
	bl ov00_022DF6B0
	b _022DF5D4
_022DE88C:
	ldr r0, _022DF638 ; =_022B966C
	ldr r0, [r0, #4]
	bl sub_02079B0C
	sub r1, r0, #1
	ldr r0, [r5, #0x14]
	bl ov00_022DD290
	ldr r1, [r5, #0x14]
	add r0, r1, #0x1000
	ldr r0, [r0, #0xba4]
	cmp r0, #0
	beq _022DE8C4
	add r0, r1, #0x338
	add r0, r0, #0x1800
	bl sub_02079800
_022DE8C4:
	ldr r0, [r5, #0x14]
	add r1, r0, #0x1000
	ldr r1, [r1, #0x20]
	cmp r1, #2
	beq _022DE8E4
	cmp r1, #8
	beq _022DE910
	b _022DE8F8
_022DE8E4:
	ldr r0, _022DF628 ; =ov00_02326CD8
	mvn r1, #0
	ldr r0, [r0]
	add r0, r0, #0x1000
	str r1, [r0, #4]
_022DE8F8:
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #3
	bl ov00_022DF6B0
	b _022DF5D4
_022DE910:
	mov r1, #0
	bl ov00_022DE068
	cmp r0, #1
	beq _022DE938
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #2
	bl ov00_022DF6B0
	b _022DF5D4
_022DE938:
	ldr r0, [r5, #0x14]
	ldr r1, _022DF63C ; =ov00_02319198
	bl ov00_022DE308
	bl sub_0208B360
	mov r6, r0
	ldr r0, _022DF640 ; =_022BCA70
	ldr r0, [r0]
	cmp r0, #0x22
	bne _022DE968
	mov r0, #2
	bl ov00_022DF6B0
	b _022DF5D4
_022DE968:
	cmp r6, #0xc8
	beq _022DE980
	ldr r0, _022DF644 ; =0x0000012E
	cmp r6, r0
	beq _022DE994
	b _022DEC7C
_022DE980:
	ldr r0, [r5, #0x14]
	add r0, r0, #0x1000
	ldr r0, [r0, #0x12c]
	str r0, [r5, #8]
	b _022DEC94
_022DE994:
	mov r0, #1
	str r0, [r5, #4]
	ldr r0, [r5]
	add r0, r0, #0x1000
	ldr r1, [r0, #0x118]
	cmp r1, #0
	beq _022DEBE4
	ldr r1, _022DF628 ; =ov00_02326CD8
	mvn r2, #5
	str r2, [r0, #4]
	ldr r0, [r1, #0x14]
	bl ov00_022DD890
	ldr r0, _022DF648 ; =ov00_02318BC8
	ldr r2, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0]
	mov r1, #0
	str r0, [r2, #0x18]
	str r1, [r2, #0x1c]
	mov r1, #0x200
	str r1, [r2, #0x20]
	str r7, [r2, #0x24]
	ldr r3, _022DF64C ; =0x00004E20
	str r8, [r2, #0x28]
	ldr r1, _022DF650 ; =ov00_023191A4
	str r3, [r2, #0x30]
	bl strcmp
	cmp r0, #0
	ldrne r0, _022DF628 ; =ov00_02326CD8
	movne r1, #1
	strne r1, [r0, #0x2c]
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r1, _022DF634 ; =ov00_02326CF0
	ldr r0, [r0, #0x14]
	bl ov00_022DD0DC
	cmp r0, #0
	beq _022DEA3C
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #1
	bl ov00_022DF6B0
	b _022DF5D4
_022DEA3C:
	add r0, sp, #0x44
	bl ov00_022DCAB8
	cmp r0, #0
	beq _022DEA68
	ldr r0, _022DF628 ; =ov00_02326CD8
	add r1, sp, #0x44
	ldr r0, [r0, #0x14]
	mov r2, #1
	bl ov00_022DCD90
	cmp r0, #0
	bne _022DEA80
_022DEA68:
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #8
	bl ov00_022DF6B0
	b _022DF5D4
_022DEA80:
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r1, _022DF654 ; =ov00_023191C4
	ldr r0, [r0, #0x14]
	ldr r2, _022DF658 ; =ov00_023191CC
	mov r3, #7
	bl ov00_022DDAE0
	cmp r0, #0
	bne _022DEAD8
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0]
	add r0, r0, #0x1000
	ldr r4, [r0, #0x118]
	mov r0, r4
	bl strlen
	ldr r1, _022DF628 ; =ov00_02326CD8
	mov r3, r0
	ldr r0, [r1, #0x14]
	ldr r1, _022DF65C ; =ov00_023191D4
	mov r2, r4
	bl ov00_022DDAE0
	cmp r0, #0
	beq _022DEAF0
_022DEAD8:
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #8
	bl ov00_022DF6B0
	b _022DF5D4
_022DEAF0:
	ldr r1, _022DF628 ; =ov00_02326CD8
	ldr r0, _022DF660 ; =ov00_023190FC
	ldr r1, [r1]
	mov r2, #0
	add r1, r1, #0x1000
	ldr r1, [r1, #0x118]
	blx r8
	ldr r1, _022DF628 ; =ov00_02326CD8
	mov r2, #0
	ldr r0, [r1]
	add r0, r0, #0x1000
	str r2, [r0, #0x118]
	ldr r0, [r1, #0x14]
	bl ov00_022DD1F8
	cmp r0, #0
	beq _022DEB48
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #1
	bl ov00_022DF6B0
	b _022DF5D4
_022DEB48:
	ldr r0, _022DF638 ; =_022B966C
	ldr r0, [r0, #4]
	bl sub_02079B0C
	ldr r2, _022DF628 ; =ov00_02326CD8
	sub r1, r0, #1
	ldr r0, [r2, #0x14]
	bl ov00_022DD290
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r1, [r0, #0x14]
	add r0, r1, #0x1000
	ldr r0, [r0, #0xba4]
	cmp r0, #0
	beq _022DEB88
	add r0, r1, #0x338
	add r0, r0, #0x1800
	bl sub_02079800
_022DEB88:
	ldr r2, _022DF628 ; =ov00_02326CD8
	ldr r0, [r2, #0x14]
	add r1, r0, #0x1000
	ldr r1, [r1, #0x20]
	cmp r1, #2
	beq _022DEBAC
	cmp r1, #8
	beq _022DEBD4
	b _022DEBBC
_022DEBAC:
	ldr r0, [r2]
	mvn r1, #0
	add r0, r0, #0x1000
	str r1, [r0, #4]
_022DEBBC:
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #3
	bl ov00_022DF6B0
	b _022DF5D4
_022DEBD4:
	bl ov00_022DD890
	mov r0, #7
	bl ov00_022DF6B0
	b _022DF5D4
_022DEBE4:
	ldr r0, [r5, #0x14]
	add r1, r0, #0x1000
	ldr r1, [r1, #0xa08]
	str r1, [sp, #0x14]
	cmp r1, #0
	bne _022DEC0C
	bl ov00_022DD890
	mov r0, #2
	bl ov00_022DF6B0
	b _022DF5D4
_022DEC0C:
	mov r0, r1
	bl strlen
	add r1, r0, #1
	ldr r0, _022DF664 ; =ov00_02319130
	blx r7
	ldr r1, [r5]
	add r1, r1, #0x1000
	str r0, [r1, #0x114]
	ldr r0, [r5]
	add r0, r0, #0x1000
	ldr r0, [r0, #0x114]
	str r0, [sp, #4]
	cmp r0, #0
	bne _022DEC5C
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #4
	bl ov00_022DF6B0
	b _022DF5D4
_022DEC5C:
	ldr r0, [sp, #0x14]
	bl strlen
	mov r2, r0
	ldr r1, [sp, #0x14]
	ldr r0, [sp, #4]
	add r2, r2, #1
	bl strncpy
	b _022DEC94
_022DEC7C:
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #0xa
	bl ov00_022DF6B0
	b _022DF5D4
_022DEC94:
	ldr r0, [r5, #0x14]
	bl ov00_022DD890
	add r0, sp, #0x30
	bl ov00_022ED468
	ldr r2, [sp, #0x30]
	ldr r1, [sp, #0x34]
	mov r0, #0
	cmp r1, r0
	cmpeq r2, r4
	bne _022DEDCC
	ldr r1, [r5]
	ldr r0, _022DF668 ; =ov00_02326D0C
	add r2, r1, #0x1000
	ldr r1, [sp, #0x20]
	str r1, [r2, #4]
	mov r2, #0
	mov r1, r0
	strh r2, [r1]
	strb r2, [r1, #0x34]
	ldr r1, [r5]
	add r2, r1, #0x1000
	ldr r3, [r2, #0x108]
	mov r1, r0
	str r3, [r1, #0x40]
	ldr r2, [r2, #0x10c]
	str r2, [r1, #0x44]
	ldr r1, [r5, #0x14]
	bl ov00_022DBCA4
	cmp r0, #0
	beq _022DED18
	mov r0, #5
	bl ov00_022DF6B0
	b _022DF5D4
_022DED18:
	bl ov00_022DBF60
	bl ov00_022DBF90
	cmp r0, #0x15
	beq _022DEDC8
	bl ov00_022DBF90
	cmp r0, #9
	bne _022DED4C
	ldr r0, _022DF628 ; =ov00_02326CD8
	mvn r1, #0
	ldr r0, [r0]
	add r0, r0, #0x1000
	str r1, [r0, #4]
	b _022DEDB8
_022DED4C:
	add r0, sp, #0xd8
	bl ov00_022DBFDC
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0xc]
	cmp r0, #1
	bne _022DEDA4
	ldr r1, [sp, #0xd8]
	ldr r0, _022DF66C ; =0xFFFFA4FA
	cmp r1, r0
	beq _022DED80
	bl ov00_022DBF90
	cmp r0, #0xb
	bne _022DEDA4
_022DED80:
	ldr r0, _022DF628 ; =ov00_02326CD8
	mov r1, #0
	ldr r0, [r0]
	add r0, r0, #0x1000
	str r1, [r0, #4]
	bl ov00_022DBF08
	mov r0, #0xb
	bl ov00_022DF6B0
	b _022DF5D4
_022DEDA4:
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r1, [sp, #0xd8]
	ldr r0, [r0]
	add r0, r0, #0x1000
	str r1, [r0, #4]
_022DEDB8:
	bl ov00_022DBF08
	mov r0, #6
	bl ov00_022DF6B0
	b _022DF5D4
_022DEDC8:
	bl ov00_022DBF08
_022DEDCC:
	cmp r6, #0xc8
	bne _022DEDF4
	ldr r0, _022DF628 ; =ov00_02326CD8
	mov r2, #0
	ldr r1, [r0]
	mov r0, #0xb
	add r1, r1, #0x1000
	str r2, [r1, #4]
	bl ov00_022DF6B0
	b _022DF5D4
_022DEDF4:
	ldr r0, [r5]
	ldr r1, _022DF650 ; =ov00_023191A4
	add r2, r0, #0x1000
	ldr r0, [sp, #0x24]
	str r0, [r2, #4]
	ldr r0, _022DF648 ; =ov00_02318BC8
	mov r2, #0
	ldr r0, [r0]
	str r0, [r5, #0x18]
	str r2, [r5, #0x1c]
	mov r2, #0x1000
	str r2, [r5, #0x20]
	str r7, [r5, #0x24]
	ldr r2, _022DF62C ; =0x00009C40
	str r8, [r5, #0x28]
	str r2, [r5, #0x30]
	bl strcmp
	cmp r0, #0
	movne r0, #1
	strne r0, [r5, #0x2c]
	ldr r0, [r5, #0x14]
	ldr r1, _022DF634 ; =ov00_02326CF0
	bl ov00_022DD0DC
	cmp r0, #0
	beq _022DEE70
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #1
	bl ov00_022DF6B0
	b _022DF5D4
_022DEE70:
	add r0, sp, #0x44
	bl ov00_022DCAB8
	cmp r0, #0
	beq _022DEE98
	ldr r0, [r5, #0x14]
	add r1, sp, #0x44
	mov r2, #1
	bl ov00_022DCD90
	cmp r0, #0
	bne _022DEEB0
_022DEE98:
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #8
	bl ov00_022DF6B0
	b _022DF5D4
_022DEEB0:
	ldr r0, [r5, #0x14]
	ldr r1, _022DF654 ; =ov00_023191C4
	ldr r2, _022DF670 ; =ov00_023191E4
	mov r3, #5
	bl ov00_022DDAE0
	cmp r0, #0
	bne _022DEEFC
	ldr r0, [r5]
	add r0, r0, #0x1000
	ldr r6, [r0, #0x114]
	mov r0, r6
	bl strlen
	mov r3, r0
	ldr r0, [r5, #0x14]
	ldr r1, _022DF674 ; =ov00_023191EC
	mov r2, r6
	bl ov00_022DDAE0
	cmp r0, #0
	beq _022DEF14
_022DEEFC:
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #8
	bl ov00_022DF6B0
	b _022DF5D4
_022DEF14:
	ldr r1, [r5]
	ldr r0, _022DF678 ; =ov00_023190E0
	add r1, r1, #0x1000
	ldr r1, [r1, #0x114]
	mov r2, #0
	blx r8
	ldr r0, [r5]
	add r1, r0, #0x1000
	mov r0, #0
	str r0, [r1, #0x114]
	ldr r0, [r5, #0x14]
	bl ov00_022DD1F8
	cmp r0, #0
	beq _022DEF64
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #1
	bl ov00_022DF6B0
	b _022DF5D4
_022DEF64:
	ldr r0, _022DF638 ; =_022B966C
	ldr r0, [r0, #4]
	bl sub_02079B0C
	sub r1, r0, #1
	ldr r0, [r5, #0x14]
	bl ov00_022DD290
	ldr r1, [r5, #0x14]
	add r0, r1, #0x1000
	ldr r0, [r0, #0xba4]
	cmp r0, #0
	beq _022DEF9C
	add r0, r1, #0x338
	add r0, r0, #0x1800
	bl sub_02079800
_022DEF9C:
	ldr r0, [r5, #0x14]
	add r1, r0, #0x1000
	ldr r1, [r1, #0x20]
	cmp r1, #2
	beq _022DF000
	cmp r1, #3
	beq _022DEFC4
	cmp r1, #8
	beq _022DF02C
	b _022DF014
_022DEFC4:
	bl ov00_022DD890
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r1, [r0, #0xc]
	cmp r1, #1
	bne _022DEFF4
	ldr r0, [r0]
	mov r2, #0
	add r1, r0, #0x1000
	mov r0, #0xb
	str r2, [r1, #4]
	bl ov00_022DF6B0
	b _022DF5D4
_022DEFF4:
	mov r0, #3
	bl ov00_022DF6B0
	b _022DF5D4
_022DF000:
	ldr r0, _022DF628 ; =ov00_02326CD8
	mvn r1, #0
	ldr r0, [r0]
	add r0, r0, #0x1000
	str r1, [r0, #4]
_022DF014:
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #3
	bl ov00_022DF6B0
	b _022DF5D4
_022DF02C:
	mov r1, #0
	bl ov00_022DE068
	cmp r0, #1
	beq _022DF054
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #2
	bl ov00_022DF6B0
	b _022DF5D4
_022DF054:
	ldr r0, [r5, #0x14]
	ldr r1, _022DF63C ; =ov00_02319198
	bl ov00_022DE308
	bl sub_0208B360
	mov r6, r0
	ldr r0, _022DF640 ; =_022BCA70
	ldr r0, [r0]
	cmp r0, #0x22
	bne _022DF090
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #2
	bl ov00_022DF6B0
	b _022DF5D4
_022DF090:
	cmp r6, #0xc8
	beq _022DF0E4
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	ldr r1, _022DF628 ; =ov00_02326CD8
	ldr r0, [r1, #0xc]
	cmp r0, #1
	ldreq r0, _022DF644 ; =0x0000012E
	cmpeq r6, r0
	bne _022DF0D8
	ldr r0, [r1]
	mov r2, #0
	add r1, r0, #0x1000
	mov r0, #0xb
	str r2, [r1, #4]
	bl ov00_022DF6B0
	b _022DF5D4
_022DF0D8:
	mov r0, #2
	bl ov00_022DF6B0
	b _022DF5D4
_022DF0E4:
	ldr r0, [r5, #0x14]
	ldr r1, _022DF67C ; =ov00_023191F4
	add r2, sp, #0x2c
	mov r3, #4
	bl ov00_022DE360
	cmp r0, #0
	bgt _022DF118
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #9
	bl ov00_022DF6B0
	b _022DF5D4
_022DF118:
	add r0, sp, #0x2c
	bl sub_0208B360
	ldr r1, _022DF640 ; =_022BCA70
	ldr r1, [r1]
	cmp r1, #0x22
	bne _022DF148
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #9
	bl ov00_022DF6B0
	b _022DF5D4
_022DF148:
	ldr r1, [r5, #0xc]
	cmp r1, #1
	cmpeq r0, #0x72
	bne _022DF178
	ldr r0, _022DF628 ; =ov00_02326CD8
	mov r2, #0
	ldr r1, [r0]
	mov r0, #0xb
	add r1, r1, #0x1000
	str r2, [r1, #4]
	bl ov00_022DF6B0
	b _022DF5D4
_022DF178:
	cmp r0, #0x64
	blt _022DF198
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #6
	bl ov00_022DF6B0
	b _022DF5D4
_022DF198:
	mov r2, #0
	ldr r0, [r5, #0x14]
	ldr r1, _022DF680 ; =ov00_02319200
	mov r3, r2
	bl ov00_022DE360
	str r0, [sp, #0x10]
	cmp r0, #0
	bgt _022DF1D0
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #9
	bl ov00_022DF6B0
	b _022DF5D4
_022DF1D0:
	mov r2, #0
	ldr r0, [r5, #0x14]
	ldr r1, _022DF684 ; =ov00_02319204
	mov r3, r2
	bl ov00_022DE360
	str r0, [sp, #0xc]
	cmp r0, #0
	bgt _022DF208
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #9
	bl ov00_022DF6B0
	b _022DF5D4
_022DF208:
	mov r2, #0
	ldr r0, [r5, #0x14]
	ldr r1, _022DF688 ; =ov00_0231920C
	mov r3, r2
	bl ov00_022DE360
	ldr r1, [sp, #0x10]
	mov r6, r0
	ldr r0, _022DF68C ; =ov00_0231914C
	add r1, r1, #1
	blx r7
	movs sb, r0
	bne _022DF250
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #4
	bl ov00_022DF6B0
	b _022DF5D4
_022DF250:
	ldr r1, [sp, #0xc]
	ldr r0, _022DF690 ; =ov00_02319158
	add r1, r1, #1
	blx r7
	movs fp, r0
	bne _022DF280
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #4
	bl ov00_022DF6B0
	b _022DF5D4
_022DF280:
	cmp r6, #0
	ble _022DF2B4
	ldr r0, _022DF694 ; =ov00_02319168
	add r1, r6, #1
	blx r7
	movs sl, r0
	bne _022DF2B4
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #4
	bl ov00_022DF6B0
	b _022DF5D4
_022DF2B4:
	ldr r0, [sp, #0x10]
	ldr r1, _022DF680 ; =ov00_02319200
	add r3, r0, #1
	ldr r0, [r5, #0x14]
	mov r2, sb
	bl ov00_022DE360
	cmp r0, #0
	bge _022DF2EC
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #9
	bl ov00_022DF6B0
	b _022DF5D4
_022DF2EC:
	ldr r1, [sp, #0xc]
	mov r2, fp
	add r3, r1, #1
	mov r1, #0
	strb r1, [sb, r0]
	ldr r0, [r5, #0x14]
	ldr r1, _022DF684 ; =ov00_02319204
	bl ov00_022DE360
	cmp r0, #0
	bge _022DF32C
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #9
	bl ov00_022DF6B0
	b _022DF5D4
_022DF32C:
	mov r1, #0
	strb r1, [fp, r0]
	mov r0, r1
	cmp r6, #0
	str r0, [sp, #8]
	ble _022DF3C8
	ldr r0, [r5, #0x14]
	ldr r1, _022DF688 ; =ov00_0231920C
	add r3, r6, #1
	mov r2, sl
	bl ov00_022DE360
	cmp r0, #0
	bge _022DF378
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #9
	bl ov00_022DF6B0
	b _022DF5D4
_022DF378:
	mov r1, #0
	strb r1, [sl, r0]
	mov r0, sl
	bl sub_0208B360
	ldr r1, _022DF640 ; =_022BCA70
	ldr r1, [r1]
	cmp r1, #0x22
	bne _022DF3B0
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #9
	bl ov00_022DF6B0
	b _022DF5D4
_022DF3B0:
	mov r1, #0x3e8
	mul r1, r0, r1
	ldr r0, _022DF698 ; =0x0002BF20
	str r1, [sp, #8]
	cmp r1, r0
	strgt r0, [sp, #8]
_022DF3C8:
	ldr r0, [r5, #0x14]
	bl ov00_022DD890
	ldr r0, [r5]
	ldr r1, _022DF634 ; =ov00_02326CF0
	add r2, r0, #0x1000
	ldr r0, [sp, #0x28]
	str r0, [r2, #4]
	str sb, [r5, #0x18]
	mov r0, #0
	str r0, [r5, #0x1c]
	mov r0, #0x1000
	str r0, [r5, #0x20]
	str r7, [r5, #0x24]
	ldr r0, _022DF69C ; =0x0001D4C0
	str r8, [r5, #0x28]
	str r0, [r5, #0x30]
	ldr r0, [r5, #0x14]
	bl ov00_022DD0DC
	cmp r0, #0
	beq _022DF430
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #1
	bl ov00_022DF6B0
	b _022DF5D4
_022DF430:
	ldr r0, [r5, #0x14]
	mov r1, fp
	bl ov00_022DDBEC
	cmp r0, #0
	beq _022DF45C
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #8
	bl ov00_022DF6B0
	b _022DF5D4
_022DF45C:
	ldr r0, [r5, #0x14]
	bl ov00_022DD1F8
	cmp r0, #0
	beq _022DF484
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #1
	bl ov00_022DF6B0
	b _022DF5D4
_022DF484:
	ldr r0, _022DF638 ; =_022B966C
	ldr r0, [r0, #4]
	bl sub_02079B0C
	sub r1, r0, #1
	ldr r0, [r5, #0x14]
	bl ov00_022DD290
	ldr r1, [r5, #0x14]
	add r0, r1, #0x1000
	ldr r0, [r0, #0xba4]
	cmp r0, #0
	beq _022DF4BC
	add r0, r1, #0x338
	add r0, r0, #0x1800
	bl sub_02079800
_022DF4BC:
	ldr r0, [r5, #0x14]
	add r1, r0, #0x1000
	ldr r1, [r1, #0x20]
	cmp r1, #2
	beq _022DF4DC
	cmp r1, #8
	beq _022DF508
	b _022DF4F0
_022DF4DC:
	ldr r0, _022DF628 ; =ov00_02326CD8
	mvn r1, #0
	ldr r0, [r0]
	add r0, r0, #0x1000
	str r1, [r0, #4]
_022DF4F0:
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #3
	bl ov00_022DF6B0
	b _022DF5D4
_022DF508:
	mov r1, #1
	bl ov00_022DE068
	cmp r0, #1
	beq _022DF530
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #2
	bl ov00_022DF6B0
	b _022DF5D4
_022DF530:
	ldr r0, [r5, #0x14]
	add r1, r0, #0x1000
	ldr r6, [r1, #0xa08]
	cmp r6, #0
	bne _022DF554
	bl ov00_022DD890
	mov r0, #2
	bl ov00_022DF6B0
	b _022DF5D4
_022DF554:
	mov r0, r6
	bl strlen
	add r1, r0, #1
	ldr r0, _022DF6A0 ; =ov00_02319178
	blx r7
	ldr r1, [r5]
	add r1, r1, #0x1000
	str r0, [r1, #0x118]
	ldr r0, [r5]
	add r0, r0, #0x1000
	ldr r0, [r0, #0x118]
	str r0, [sp]
	cmp r0, #0
	bne _022DF5A4
	ldr r0, _022DF628 ; =ov00_02326CD8
	ldr r0, [r0, #0x14]
	bl ov00_022DD890
	mov r0, #4
	bl ov00_022DF6B0
	b _022DF5D4
_022DF5A4:
	mov r0, r6
	bl strlen
	mov r2, r0
	ldr r0, [sp]
	mov r1, r6
	add r2, r2, #1
	bl strncpy
	ldr r0, [r5, #0x14]
	bl ov00_022DD890
	ldr r0, [sp, #8]
	bl sub_02079B14
	b _022DE7FC
_022DF5D4:
	cmp sb, #0
	beq _022DF5EC
	ldr r0, _022DF6A4 ; =ov00_02319214
	mov r1, sb
	mov r2, #0
	blx r8
_022DF5EC:
	cmp fp, #0
	beq _022DF604
	ldr r0, _022DF6A8 ; =ov00_02319220
	mov r1, fp
	mov r2, #0
	blx r8
_022DF604:
	cmp sl, #0
	addeq sp, sp, #0x29c
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, _022DF6AC ; =ov00_0231922C
	mov r1, sl
	mov r2, #0
	blx r8
	add sp, sp, #0x29c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022DF628: .word ov00_02326CD8
_022DF62C: .word 0x00009C40
_022DF630: .word ov00_02319084
_022DF634: .word ov00_02326CF0
_022DF638: .word _022B966C
_022DF63C: .word ov00_02319198
_022DF640: .word _022BCA70
_022DF644: .word 0x0000012E
_022DF648: .word ov00_02318BC8
_022DF64C: .word 0x00004E20
_022DF650: .word ov00_023191A4
_022DF654: .word ov00_023191C4
_022DF658: .word ov00_023191CC
_022DF65C: .word ov00_023191D4
_022DF660: .word ov00_023190FC
_022DF664: .word ov00_02319130
_022DF668: .word ov00_02326D0C
_022DF66C: .word 0xFFFFA4FA
_022DF670: .word ov00_023191E4
_022DF674: .word ov00_023191EC
_022DF678: .word ov00_023190E0
_022DF67C: .word ov00_023191F4
_022DF680: .word ov00_02319200
_022DF684: .word ov00_02319204
_022DF688: .word ov00_0231920C
_022DF68C: .word ov00_0231914C
_022DF690: .word ov00_02319158
_022DF694: .word ov00_02319168
_022DF698: .word 0x0002BF20
_022DF69C: .word 0x0001D4C0
_022DF6A0: .word ov00_02319178
_022DF6A4: .word ov00_02319214
_022DF6A8: .word ov00_02319220
_022DF6AC: .word ov00_0231922C
	arm_func_end ov00_022DE79C

	arm_func_start ov00_022DF6B0
ov00_022DF6B0: ; 0x022DF6B0
	stmdb sp!, {r4, lr}
	ldr r1, _022DF6F0 ; =ov00_02326CD8
	mov r4, r0
	ldr r0, [r1]
	add r0, r0, #0x1dc
	add r0, r0, #0x1000
	bl sub_0207A048
	ldr r1, _022DF6F0 ; =ov00_02326CD8
	ldr r0, [r1]
	add r0, r0, #0x1000
	str r4, [r0]
	ldr r0, [r1]
	add r0, r0, #0x1dc
	add r0, r0, #0x1000
	bl sub_0207A0CC
	ldmia sp!, {r4, pc}
	.align 2, 0
_022DF6F0: .word ov00_02326CD8
	arm_func_end ov00_022DF6B0

	arm_func_start ov00_022DF6F4
ov00_022DF6F4: ; 0x022DF6F4
	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
	sub sp, sp, #0x3c
	mov r6, r0
	bl strlen
	mov r4, r0
	ldr r0, _022DF900 ; =ov00_02319298
	bl strlen
	cmp r4, r0
	ldreqsb r0, [r6, #7]
	cmpeq r0, #0x20
	ldreqsb r0, [r6, #0xb]
	cmpeq r0, #0x20
	ldreqsb r0, [r6, #0x10]
	cmpeq r0, #0x20
	ldreqsb r0, [r6, #0x13]
	cmpeq r0, #0x3a
	ldreqsb r0, [r6, #0x16]
	cmpeq r0, #0x3a
	ldreqsb r0, [r6, #0x19]
	cmpeq r0, #0x20
	bne _022DF8F4
	add r0, sp, #0x2c
	add r1, sp, #0x20
	bl sub_020828A8
	cmp r0, #0
	bne _022DF8F4
	add r0, sp, #0x2c
	add r1, sp, #0x20
	bl sub_02082FDC
	mov r4, r0
	mov r5, r1
	mvn r0, #0
	cmp r5, r0
	cmpeq r4, r0
	beq _022DF8F4
	add r0, sp, #0
	mov r1, r6
	bl strcpy
	mov r2, #0
	ldr r1, _022DF904 ; =_022BCA70
	add r0, sp, #0xc
	strb r2, [sp, #7]
	strb r2, [sp, #0xb]
	strb r2, [sp, #0x10]
	strb r2, [sp, #0x13]
	strb r2, [sp, #0x16]
	strb r2, [sp, #0x19]
	str r2, [r1]
	bl sub_0208B360
	ldr r1, _022DF904 ; =_022BCA70
	str r0, [sp, #0x2c]
	ldr r1, [r1]
	cmp r1, #0x22
	beq _022DF8F4
	sub r1, r0, #0x7d0
	mov r0, #0xd
	ldr r7, _022DF908 ; =ov00_02319268
	str r1, [sp, #0x2c]
	str r0, [sp, #0x30]
	mov r8, #0
	add r6, sp, #8
_022DF7E8:
	ldr r0, [r7, r8, lsl #2]
	mov r1, r6
	bl strcmp
	cmp r0, #0
	addeq r0, r8, #1
	streq r0, [sp, #0x30]
	beq _022DF810
	add r8, r8, #1
	cmp r8, #0xc
	blt _022DF7E8
_022DF810:
	ldr r0, [sp, #0x30]
	cmp r0, #0xc
	bhi _022DF8F4
	ldr r1, _022DF904 ; =_022BCA70
	mov r2, #0
	add r0, sp, #5
	str r2, [r1]
	bl sub_0208B360
	ldr r1, _022DF904 ; =_022BCA70
	str r0, [sp, #0x34]
	ldr r0, [r1]
	cmp r0, #0x22
	beq _022DF8F4
	mov r2, #0
	add r0, sp, #0x11
	str r2, [r1]
	bl sub_0208B360
	ldr r1, _022DF904 ; =_022BCA70
	str r0, [sp, #0x20]
	ldr r0, [r1]
	cmp r0, #0x22
	beq _022DF8F4
	mov r2, #0
	add r0, sp, #0x14
	str r2, [r1]
	bl sub_0208B360
	ldr r1, _022DF904 ; =_022BCA70
	str r0, [sp, #0x24]
	ldr r0, [r1]
	cmp r0, #0x22
	beq _022DF8F4
	mov r2, #0
	add r0, sp, #0x17
	str r2, [r1]
	bl sub_0208B360
	ldr r1, _022DF904 ; =_022BCA70
	str r0, [sp, #0x28]
	ldr r0, [r1]
	cmp r0, #0x22
	beq _022DF8F4
	add r0, sp, #0x2c
	add r1, sp, #0x20
	bl sub_02082FDC
	mvn r2, #0
	cmp r1, r2
	cmpeq r0, r2
	beq _022DF8F4
	ldr r2, _022DF90C ; =ov00_02326D54
	subs r0, r4, r0
	str r0, [r2, #0xc]
	sbc r0, r5, r1
	str r0, [r2, #0x10]
	stmib r2, {r4, r5}
	mov r0, #1
	str r0, [r2]
	add sp, sp, #0x3c
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022DF8F4:
	mov r0, #0
	add sp, sp, #0x3c
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022DF900: .word ov00_02319298
_022DF904: .word _022BCA70
_022DF908: .word ov00_02319268
_022DF90C: .word ov00_02326D54
	arm_func_end ov00_022DF6F4

	arm_func_start ov00_022DF910
ov00_022DF910: ; 0x022DF910
	stmdb sp!, {r3, r4, r5, lr}
	ldr r2, _022DF998 ; =ov00_02326D68
	mov r5, r0
	ldr r0, [r2]
	mov r4, r1
	cmp r0, #0
	beq _022DF940
	ldr r1, _022DF99C ; =0xFFFFA1DC
	mov r0, #9
	bl ov00_022E0394
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022DF940:
	ldr r0, _022DF9A0 ; =ov00_023192B8
	ldr r1, _022DF9A4 ; =0x00001C20
	blx r5
	ldr r1, _022DF998 ; =ov00_02326D68
	cmp r0, #0
	str r0, [r1]
	bne _022DF970
	ldr r1, _022DF99C ; =0xFFFFA1DC
	mov r0, #9
	bl ov00_022E0394
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022DF970:
	ldr r2, _022DF9A4 ; =0x00001C20
	mov r1, #0
	bl MemsetFast
	ldr r1, _022DF998 ; =ov00_02326D68
	mov r0, #1
	ldr r2, [r1]
	str r5, [r2]
	ldr r1, [r1]
	str r4, [r1, #4]
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022DF998: .word ov00_02326D68
_022DF99C: .word 0xFFFFA1DC
_022DF9A0: .word ov00_023192B8
_022DF9A4: .word 0x00001C20
	arm_func_end ov00_022DF910

	arm_func_start ov00_022DF9A8
ov00_022DF9A8: ; 0x022DF9A8
	stmdb sp!, {r3, lr}
	ldr r0, _022DF9EC ; =ov00_02326D68
	ldr r0, [r0]
	cmp r0, #0
	ldmeqia sp!, {r3, pc}
	add r0, r0, #8
	bl ov00_022DD890
	ldr r1, _022DF9EC ; =ov00_02326D68
	ldr r0, _022DF9F0 ; =ov00_023192C8
	ldr r1, [r1]
	mov r2, #0
	ldr r3, [r1, #4]
	blx r3
	ldr r0, _022DF9EC ; =ov00_02326D68
	mov r1, #0
	str r1, [r0]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022DF9EC: .word ov00_02326D68
_022DF9F0: .word ov00_023192C8
	arm_func_end ov00_022DF9A8

	arm_func_start ov00_022DF9F4
ov00_022DF9F4: ; 0x022DF9F4
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0xb0
	ldr r2, _022DFC38 ; =ov00_02326D68
	mov r5, r0
	ldr r2, [r2]
	mov r0, r1
	add r2, r2, #0x1000
	str r1, [r2, #0xc1c]
	mov r1, #0
	mov r2, #0x174
	bl MemsetFast
	ldr r0, _022DFC38 ; =ov00_02326D68
	ldr r1, [r0]
	add r0, r1, #0x1000
	ldr r0, [r0, #0xbac]
	cmp r0, #0
	beq _022DFA4C
	add r0, r1, #0x1b40
	bl sub_02079830
	cmp r0, #0
	bne _022DFA4C
	bl WaitForever2
_022DFA4C:
	ldr r0, _022DFC3C ; =ov00_02318BC8
	ldr r1, _022DFC38 ; =ov00_02326D68
	ldr r0, [r0]
	mov r3, #0
	ldr r4, [r1]
	mov r2, #0x1000
	str r0, [sp]
	str r3, [sp, #4]
	str r2, [sp, #8]
	ldr r2, [r4]
	ldr r1, _022DFC40 ; =ov00_023192D8
	str r2, [sp, #0xc]
	ldr r2, [r4, #4]
	str r2, [sp, #0x10]
	bl strcmp
	cmp r0, #0
	movne r0, #1
	strne r0, [sp, #0x14]
	moveq r0, #0
	ldr r2, _022DFC44 ; =0x00004E20
	streq r0, [sp, #0x14]
	add r1, sp, #0
	add r0, r4, #8
	str r2, [sp, #0x18]
	bl ov00_022DD0DC
	cmp r0, #0
	beq _022DFAD0
	ldr r1, _022DFC48 ; =0xFFFFA1DC
	mov r0, #9
	bl ov00_022E0394
	add sp, sp, #0xb0
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022DFAD0:
	add r0, sp, #0x1c
	bl ov00_022DCAB8
	cmp r0, #0
	beq _022DFB00
	ldr r0, _022DFC38 ; =ov00_02326D68
	add r1, sp, #0x1c
	ldr r0, [r0]
	mov r2, #0
	add r0, r0, #8
	bl ov00_022DCD90
	cmp r0, #0
	bne _022DFB28
_022DFB00:
	ldr r0, _022DFC38 ; =ov00_02326D68
	ldr r0, [r0]
	add r0, r0, #8
	bl ov00_022DD890
	ldr r1, _022DFC48 ; =0xFFFFA1DC
	mov r0, #9
	bl ov00_022E0394
	add sp, sp, #0xb0
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022DFB28:
	ldr r0, _022DFC38 ; =ov00_02326D68
	ldr r1, _022DFC4C ; =ov00_023192F8
	ldr r0, [r0]
	ldr r2, _022DFC50 ; =ov00_02319300
	add r0, r0, #8
	mov r3, #6
	bl ov00_022DDAE0
	cmp r0, #0
	bne _022DFB70
	ldr r0, _022DFC38 ; =ov00_02326D68
	ldr r1, _022DFC54 ; =ov00_02319308
	ldr r0, [r0]
	mov r2, r5
	add r0, r0, #8
	mov r3, #4
	bl ov00_022DDAE0
	cmp r0, #0
	beq _022DFB98
_022DFB70:
	ldr r0, _022DFC38 ; =ov00_02326D68
	ldr r0, [r0]
	add r0, r0, #8
	bl ov00_022DD890
	ldr r1, _022DFC48 ; =0xFFFFA1DC
	mov r0, #9
	bl ov00_022E0394
	add sp, sp, #0xb0
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022DFB98:
	ldr r0, _022DFC38 ; =ov00_02326D68
	ldr r0, [r0]
	add r0, r0, #8
	bl ov00_022DD1F8
	cmp r0, #0
	beq _022DFBD8
	ldr r0, _022DFC38 ; =ov00_02326D68
	ldr r0, [r0]
	add r0, r0, #8
	bl ov00_022DD890
	ldr r1, _022DFC48 ; =0xFFFFA1DC
	mov r0, #9
	bl ov00_022E0394
	add sp, sp, #0xb0
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022DFBD8:
	ldr r0, _022DFC58 ; =_022B966C
	ldr r0, [r0, #4]
	bl sub_02079B0C
	ldr r1, _022DFC38 ; =ov00_02326D68
	ldr r2, [r1]
	sub r1, r0, #1
	add r0, r2, #8
	bl ov00_022DD290
	ldr r0, _022DFC38 ; =ov00_02326D68
	ldr r1, [r0]
	add r0, r1, #0x1000
	ldr r0, [r0, #0xbac]
	cmp r0, #0
	addne sp, sp, #0xb0
	movne r0, #1
	ldmneia sp!, {r3, r4, r5, pc}
	add r0, r1, #8
	bl ov00_022DD890
	ldr r1, _022DFC48 ; =0xFFFFA1DC
	mov r0, #9
	bl ov00_022E0394
	mov r0, #0
	add sp, sp, #0xb0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022DFC38: .word ov00_02326D68
_022DFC3C: .word ov00_02318BC8
_022DFC40: .word ov00_023192D8
_022DFC44: .word 0x00004E20
_022DFC48: .word 0xFFFFA1DC
_022DFC4C: .word ov00_023192F8
_022DFC50: .word ov00_02319300
_022DFC54: .word ov00_02319308
_022DFC58: .word _022B966C
	arm_func_end ov00_022DF9F4

	arm_func_start ov00_022DFC5C
ov00_022DFC5C: ; 0x022DFC5C
	stmdb sp!, {r3, lr}
	ldr r0, _022DFD28 ; =ov00_02326D68
	ldr r1, [r0]
	cmp r1, #0
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	add r0, r1, #0x1000
	ldr r0, [r0, #0xbac]
	cmp r0, #0
	moveq r0, #1
	ldmeqia sp!, {r3, pc}
	add r0, r1, #0x1b40
	bl sub_02079830
	cmp r0, #1
	bne _022DFD20
	ldr r0, _022DFD28 ; =ov00_02326D68
	ldr r1, [r0]
	add r0, r1, #0x1000
	ldr r0, [r0, #0x28]
	cmp r0, #7
	beq _022DFCF4
	cmp r0, #8
	bne _022DFD04
	bl ov00_022DFD30
	cmp r0, #0
	bne _022DFCDC
	ldr r0, _022DFD28 ; =ov00_02326D68
	ldr r0, [r0]
	add r0, r0, #8
	bl ov00_022DD890
	mov r0, #4
	ldmia sp!, {r3, pc}
_022DFCDC:
	ldr r0, _022DFD28 ; =ov00_02326D68
	ldr r0, [r0]
	add r0, r0, #8
	bl ov00_022DD890
	mov r0, #3
	ldmia sp!, {r3, pc}
_022DFCF4:
	add r0, r1, #8
	bl ov00_022DD890
	mov r0, #5
	ldmia sp!, {r3, pc}
_022DFD04:
	add r0, r1, #8
	bl ov00_022DD890
	ldr r1, _022DFD2C ; =0xFFFFA1DB
	mov r0, #0x11
	bl ov00_022E0394
	mov r0, #4
	ldmia sp!, {r3, pc}
_022DFD20:
	mov r0, #2
	ldmia sp!, {r3, pc}
	.align 2, 0
_022DFD28: .word ov00_02326D68
_022DFD2C: .word 0xFFFFA1DB
	arm_func_end ov00_022DFC5C

	arm_func_start ov00_022DFD30
ov00_022DFD30: ; 0x022DFD30
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #4
	ldr r0, _022DFF20 ; =ov00_02326D68
	mov r1, #0
	ldr r4, [r0]
	add r0, r4, #8
	bl ov00_022DE068
	cmp r0, #0
	bne _022DFD6C
	ldr r1, _022DFF24 ; =0xFFFF9DF3
	mov r0, #0x10
	bl ov00_022E0394
	add sp, sp, #4
	mov r0, #0
	ldmia sp!, {r3, r4, pc}
_022DFD6C:
	ldr r1, _022DFF28 ; =ov00_0231930C
	add r0, r4, #8
	bl ov00_022DE308
	cmp r0, #0
	beq _022DFD84
	bl ov00_022DF6F4
_022DFD84:
	ldr r1, _022DFF2C ; =ov00_02319314
	add r0, r4, #8
	bl ov00_022DE308
	cmp r0, #0
	bne _022DFDB0
	ldr r1, _022DFF24 ; =0xFFFF9DF3
	mov r0, #0x10
	bl ov00_022E0394
	add sp, sp, #4
	mov r0, #0
	ldmia sp!, {r3, r4, pc}
_022DFDB0:
	bl sub_0208B360
	ldr r1, _022DFF30 ; =_022BCA70
	mov r2, r0
	ldr r0, [r1]
	cmp r0, #0x22
	bne _022DFDE0
	ldr r1, _022DFF24 ; =0xFFFF9DF3
	mov r0, #0x10
	bl ov00_022E0394
	add sp, sp, #4
	mov r0, #0
	ldmia sp!, {r3, r4, pc}
_022DFDE0:
	cmp r2, #0xc8
	beq _022DFE04
	ldr r1, _022DFF34 ; =0xFFFF9E58
	mov r0, #0x10
	sub r1, r1, r2
	bl ov00_022E0394
	add sp, sp, #4
	mov r0, #0
	ldmia sp!, {r3, r4, pc}
_022DFE04:
	ldr r1, _022DFF38 ; =ov00_02319320
	add r2, sp, #0
	add r0, r4, #8
	mov r3, #4
	bl ov00_022DE360
	cmp r0, #0
	bgt _022DFE38
	ldr r1, _022DFF24 ; =0xFFFF9DF3
	mov r0, #0x10
	bl ov00_022E0394
	add sp, sp, #4
	mov r0, #0
	ldmia sp!, {r3, r4, pc}
_022DFE38:
	add r0, sp, #0
	bl sub_0208B360
	ldr r1, _022DFF30 ; =_022BCA70
	mov r2, r0
	ldr r0, [r1]
	cmp r0, #0x22
	bne _022DFE6C
	ldr r1, _022DFF24 ; =0xFFFF9DF3
	mov r0, #0x10
	bl ov00_022E0394
	add sp, sp, #4
	mov r0, #0
	ldmia sp!, {r3, r4, pc}
_022DFE6C:
	cmp r2, #0x64
	blt _022DFE90
	ldr r1, _022DFF3C ; =0xFFFFA240
	mov r0, #0x10
	sub r1, r1, r2
	bl ov00_022E0394
	add sp, sp, #4
	mov r0, #0
	ldmia sp!, {r3, r4, pc}
_022DFE90:
	ldr r0, _022DFF20 ; =ov00_02326D68
	ldr r1, _022DFF40 ; =ov00_0231932C
	ldr r2, [r0]
	add r0, r4, #8
	add r2, r2, #0x1000
	ldr r2, [r2, #0xc1c]
	mov r3, #0x40
	add r2, r2, #4
	bl ov00_022DE360
	ldr r0, _022DFF20 ; =ov00_02326D68
	ldr r1, _022DFF44 ; =ov00_02319334
	ldr r2, [r0]
	add r0, r4, #8
	add r2, r2, #0x1000
	ldr r2, [r2, #0xc1c]
	mov r3, #0x12c
	add r2, r2, #0x45
	bl ov00_022DE360
	ldr r1, _022DFF48 ; =ov00_02319344
	add r2, sp, #0
	add r0, r4, #8
	mov r3, #1
	bl ov00_022DE360
	ldrsb r0, [sp]
	cmp r0, #0x59
	ldreq r0, _022DFF20 ; =ov00_02326D68
	moveq r1, #1
	ldrne r0, _022DFF20 ; =ov00_02326D68
	movne r1, #0
	ldr r0, [r0]
	add r0, r0, #0x1000
	ldr r0, [r0, #0xc1c]
	str r1, [r0]
	mov r0, #1
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
	.align 2, 0
_022DFF20: .word ov00_02326D68
_022DFF24: .word 0xFFFF9DF3
_022DFF28: .word ov00_0231930C
_022DFF2C: .word ov00_02319314
_022DFF30: .word _022BCA70
_022DFF34: .word 0xFFFF9E58
_022DFF38: .word ov00_02319320
_022DFF3C: .word 0xFFFFA240
_022DFF40: .word ov00_0231932C
_022DFF44: .word ov00_02319334
_022DFF48: .word ov00_02319344
	arm_func_end ov00_022DFD30

	arm_func_start ov00_022DFF4C
ov00_022DFF4C: ; 0x022DFF4C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #8
	ldr r4, _022E00CC ; =0xAAAAAAAB
	str r2, [sp]
	umull r4, r5, r1, r4
	mov r6, #3
	mov r5, r5, lsr #1
	umull r4, r5, r6, r5
	mov sl, r0
	subs r5, r1, r4
	movne r5, #4
	ldr r2, _022E00CC ; =0xAAAAAAAB
	ldr r0, [sp]
	moveq r5, #0
	cmp r0, #0
	umull r0, r4, r1, r2
	mov r4, r4, lsr #1
	addeq sp, sp, #8
	add r0, r5, r4, lsl #2
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp r3, r0
	addlo sp, sp, #8
	mvnlo r0, #0
	ldmloia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r7, sl, r1
	ldr r8, [sp]
	cmp sl, r7
	beq _022E00BC
	sub fp, r2, #0x80000000
	ldr r5, _022E00D0 ; =ov00_02319350
	mov r4, fp
_022DFFC8:
	sub sb, r7, sl
	mov r0, sb, lsl #3
	smull r1, r2, r4, r0
	add r2, r2, r0, lsr #31
	mov r1, #6
	smull r2, r3, r1, r2
	subs r2, r0, r2
	smull r1, r2, fp, r0
	movne r3, #1
	moveq r3, #0
	add r2, r2, r0, lsr #31
	cmp sb, #3
	add r6, r2, r3
	movge sb, #3
	add r0, sp, #4
	mov r1, #0
	mov r2, #3
	bl MemsetFast
	mov r0, sl
	add r1, sp, #4
	mov r2, sb
	bl MemcpyFast
	ldrb r0, [sp, #4]
	ldr r1, [r5]
	cmp r6, #2
	mov r0, r0, asr #2
	ldrsb r0, [r1, r0]
	strb r0, [r8]
	movlt r0, #0x2a
	blt _022E005C
	ldrb r2, [sp, #4]
	ldrb r1, [sp, #5]
	ldr r0, [r5]
	mov r2, r2, lsl #4
	and r2, r2, #0x3f
	orr r1, r2, r1, asr #4
	ldrsb r0, [r0, r1]
_022E005C:
	strb r0, [r8, #1]
	cmp r6, #3
	movlt r0, #0x2a
	blt _022E0088
	ldrb r2, [sp, #5]
	ldrb r1, [sp, #6]
	ldr r0, [r5]
	mov r2, r2, lsl #2
	and r2, r2, #0x3f
	orr r1, r2, r1, asr #6
	ldrsb r0, [r0, r1]
_022E0088:
	strb r0, [r8, #2]
	cmp r6, #4
	movlt r0, #0x2a
	blt _022E00A8
	ldrb r0, [sp, #6]
	ldr r1, [r5]
	and r0, r0, #0x3f
	ldrsb r0, [r1, r0]
_022E00A8:
	add sl, sl, sb
	strb r0, [r8, #3]
	cmp sl, r7
	add r8, r8, #4
	bne _022DFFC8
_022E00BC:
	ldr r0, [sp]
	sub r0, r8, r0
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022E00CC: .word 0xAAAAAAAB
_022E00D0: .word ov00_02319350
	arm_func_end ov00_022DFF4C

	arm_func_start ov00_022E00D4
ov00_022E00D4: ; 0x022E00D4
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	tst r1, #3
	mvnne r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	mov r5, #0
	mov ip, r5
	cmp r1, #0
	bls _022E010C
_022E00F4:
	ldrsb r4, [r0, ip]
	add ip, ip, #1
	cmp r4, #0x2a
	addne r5, r5, #6
	cmp ip, r1
	blo _022E00F4
_022E010C:
	mov ip, r5, asr #2
	add ip, r5, ip, lsr #29
	mov ip, ip, asr #3
	cmp r2, #0
	moveq r0, ip
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r3, ip
	mvnlo r0, #0
	ldmloia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r1, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r1, r2
_022E0140:
	mov r7, #0
	add r6, sp, #0
	mov r3, r7
	mov r4, #0x3f
	mov lr, #0x3e
_022E0154:
	ldrsb r5, [r0, r7]
	cmp r5, #0x41
	blt _022E0170
	cmp r5, #0x5a
	suble r5, r5, #0x41
	strleb r5, [r6]
	ble _022E01B8
_022E0170:
	cmp r5, #0x61
	blt _022E0188
	cmp r5, #0x7a
	suble r5, r5, #0x47
	strleb r5, [r6]
	ble _022E01B8
_022E0188:
	cmp r5, #0x30
	blt _022E01A0
	cmp r5, #0x39
	addle r5, r5, #4
	strleb r5, [r6]
	ble _022E01B8
_022E01A0:
	cmp r5, #0x2e
	streqb lr, [r6]
	beq _022E01B8
	cmp r5, #0x2d
	streqb r4, [r6]
	strneb r3, [r6]
_022E01B8:
	add r7, r7, #1
	cmp r7, #4
	add r6, r6, #1
	blt _022E0154
	ldrsb r4, [sp, #1]
	ldrsb lr, [sp]
	add r3, r1, #1
	mov r4, r4, asr #4
	orr r4, r4, lr, lsl #2
	sub r3, r3, r2
	strb r4, [r1]
	cmp r3, ip
	add r0, r0, #4
	bge _022E0234
	ldrsb lr, [sp, #2]
	ldrsb r4, [sp, #1]
	add r3, r1, #2
	mov lr, lr, asr #2
	orr r4, lr, r4, lsl #4
	sub r3, r3, r2
	strb r4, [r1, #1]
	cmp r3, ip
	bge _022E0234
	ldrsb lr, [sp, #2]
	ldrsb r3, [sp, #3]
	orr r3, r3, lr, lsl #6
	strb r3, [r1, #2]
	add r1, r1, #3
	sub r3, r1, r2
	cmp r3, ip
	blt _022E0140
_022E0234:
	mov r0, r3
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022E00D4

	arm_func_start ov00_022E023C
ov00_022E023C: ; 0x022E023C
	cmp r0, #0
	ldrne r1, _022E0258 ; =ov00_02326D6C
	ldrne r1, [r1, #4]
	strne r1, [r0]
	ldr r0, _022E0258 ; =ov00_02326D6C
	ldr r0, [r0]
	bx lr
	.align 2, 0
_022E0258: .word ov00_02326D6C
	arm_func_end ov00_022E023C

	arm_func_start ov00_022E025C
ov00_022E025C: ; 0x022E025C
	cmp r0, #0
	ldrne r2, _022E0354 ; =ov00_02326D6C
	ldrne r2, [r2, #4]
	strne r2, [r0]
	cmp r1, #0
	beq _022E0348
	ldr r0, _022E0354 ; =ov00_02326D6C
	ldr r0, [r0]
	cmp r0, #0x15
	addls pc, pc, r0, lsl #2
	b _022E0340
_022E0288: ; jump table
	b _022E0340 ; case 0
	b _022E0310 ; case 1
	b _022E02E0 ; case 2
	b _022E02E0 ; case 3
	b _022E02E0 ; case 4
	b _022E02E0 ; case 5
	b _022E02EC ; case 6
	b _022E02F8 ; case 7
	b _022E02E0 ; case 8
	b _022E0310 ; case 9
	b _022E0304 ; case 10
	b _022E0304 ; case 11
	b _022E0304 ; case 12
	b _022E0304 ; case 13
	b _022E031C ; case 14
	b _022E0328 ; case 15
	b _022E0334 ; case 16
	b _022E0328 ; case 17
	b _022E0334 ; case 18
	b _022E0328 ; case 19
	b _022E0334 ; case 20
	b _022E0334 ; case 21
_022E02E0:
	mov r0, #6
	str r0, [r1]
	b _022E0348
_022E02EC:
	mov r0, #3
	str r0, [r1]
	b _022E0348
_022E02F8:
	mov r0, #4
	str r0, [r1]
	b _022E0348
_022E0304:
	mov r0, #1
	str r0, [r1]
	b _022E0348
_022E0310:
	mov r0, #7
	str r0, [r1]
	b _022E0348
_022E031C:
	mov r0, #5
	str r0, [r1]
	b _022E0348
_022E0328:
	mov r0, #6
	str r0, [r1]
	b _022E0348
_022E0334:
	mov r0, #2
	str r0, [r1]
	b _022E0348
_022E0340:
	mov r0, #0
	str r0, [r1]
_022E0348:
	ldr r0, _022E0354 ; =ov00_02326D6C
	ldr r0, [r0]
	bx lr
	.align 2, 0
_022E0354: .word ov00_02326D6C
	arm_func_end ov00_022E025C

	arm_func_start ov00_022E0358
ov00_022E0358: ; 0x022E0358
	ldr r0, _022E0374 ; =ov00_02326D6C
	ldr r1, [r0]
	cmp r1, #9
	movne r1, #0
	strne r1, [r0]
	strne r1, [r0, #4]
	bx lr
	.align 2, 0
_022E0374: .word ov00_02326D6C
	arm_func_end ov00_022E0358

	arm_func_start ov00_022E0378
ov00_022E0378: ; 0x022E0378
	ldr r0, _022E0390 ; =ov00_02326D6C
	ldr r0, [r0]
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	bx lr
	.align 2, 0
_022E0390: .word ov00_02326D6C
	arm_func_end ov00_022E0378

	arm_func_start ov00_022E0394
ov00_022E0394: ; 0x022E0394
	ldr r2, _022E03A8 ; =ov00_02326D6C
	ldr r3, [r2]
	cmp r3, #9
	stmneia r2, {r0, r1}
	bx lr
	.align 2, 0
_022E03A8: .word ov00_02326D6C
	arm_func_end ov00_022E0394

	arm_func_start ov00_022E03AC
ov00_022E03AC: ; 0x022E03AC
	sub r0, r0, #0x20
	bx lr
	arm_func_end ov00_022E03AC

	arm_func_start ov00_022E03B4
ov00_022E03B4: ; 0x022E03B4
	ldr r2, _022E03C8 ; =0x4457434D
	str r2, [r0]
	str r1, [r0, #4]
	add r0, r0, #0x20
	bx lr
	.align 2, 0
_022E03C8: .word 0x4457434D
	arm_func_end ov00_022E03B4

	arm_func_start ov00_022E03CC
ov00_022E03CC: ; 0x022E03CC
	stmdb sp!, {r3, lr}
	bl ov00_022E03AC
	ldr r0, [r0, #4]
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022E03CC

	arm_func_start ov00_022E03DC
ov00_022E03DC: ; 0x022E03DC
	ldr r2, _022E03EC ; =ov00_02326D74
	str r0, [r2, #4]
	str r1, [r2]
	bx lr
	.align 2, 0
_022E03EC: .word ov00_02326D74
	arm_func_end ov00_022E03DC

	arm_func_start ov00_022E03F0
ov00_022E03F0: ; 0x022E03F0
	ldr ip, _022E03FC ; =ov00_022E0400
	mov r2, #0x20
	bx ip
	.align 2, 0
_022E03FC: .word ov00_022E0400
	arm_func_end ov00_022E03F0

	arm_func_start ov00_022E0400
ov00_022E0400: ; 0x022E0400
	stmdb sp!, {r4, lr}
	ldr r3, _022E0430 ; =ov00_02326D74
	mov r4, r1
	ldr r3, [r3, #4]
	add r1, r4, #0x20
	blx r3
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	mov r1, r4
	bl ov00_022E03B4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022E0430: .word ov00_02326D74
	arm_func_end ov00_022E0400

	arm_func_start ov00_022E0434
ov00_022E0434: ; 0x022E0434
	stmdb sp!, {r4, lr}
	mov r4, r0
	cmp r1, #0
	ldmeqia sp!, {r4, pc}
	mov r0, r1
	bl ov00_022E03AC
	mov r1, r0
	ldr r0, _022E046C ; =ov00_02326D74
	ldr r2, [r1, #4]
	ldr r3, [r0]
	mov r0, r4
	add r2, r2, #0x20
	blx r3
	ldmia sp!, {r4, pc}
	.align 2, 0
_022E046C: .word ov00_02326D74
	arm_func_end ov00_022E0434

	arm_func_start ov00_022E0470
ov00_022E0470: ; 0x022E0470
	stmdb sp!, {r3, lr}
	mov ip, #0x20
	str ip, [sp]
	bl ov00_022E0484
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022E0470

	arm_func_start ov00_022E0484
ov00_022E0484: ; 0x022E0484
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r5, r3
	mov r7, r1
	ldr r2, [sp, #0x18]
	mov r1, r5
	mov r8, r0
	bl ov00_022E0400
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	cmp r7, #0
	beq _022E04E8
	mov r0, r7
	bl ov00_022E03CC
	mov r6, r0
	cmp r6, r5
	movls r5, r6
	mov r0, r7
	mov r1, r4
	mov r2, r5
	bl MemcpyFast
	mov r0, r8
	mov r1, r7
	mov r2, r6
	bl ov00_022E0434
_022E04E8:
	mov r0, r4
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022E0484

	arm_func_start ov00_022E04F0
ov00_022E04F0: ; 0x022E04F0
	ldr ip, _022E0500 ; =ov00_022E03F0
	mov r1, r0
	mov r0, #5
	bx ip
	.align 2, 0
_022E0500: .word ov00_022E03F0
	arm_func_end ov00_022E04F0

	arm_func_start ov00_022E0504
ov00_022E0504: ; 0x022E0504
	ldr ip, _022E051C ; =ov00_022E0470
	mov r2, r1
	mov r1, r0
	mov r3, r2
	mov r0, #5
	bx ip
	.align 2, 0
_022E051C: .word ov00_022E0470
	arm_func_end ov00_022E0504

	arm_func_start ov00_022E0520
ov00_022E0520: ; 0x022E0520
	ldr ip, _022E0534 ; =ov00_022E0434
	mov r1, r0
	mov r0, #5
	mov r2, #0
	bx ip
	.align 2, 0
_022E0534: .word ov00_022E0434
	arm_func_end ov00_022E0520

	arm_func_start ov00_022E0538
ov00_022E0538: ; 0x022E0538
	ldr ip, _022E0548 ; =ov00_022E0400
	mov r2, r0
	mov r0, #5
	bx ip
	.align 2, 0
_022E0548: .word ov00_022E0400
	arm_func_end ov00_022E0538

	arm_func_start ov00_022E054C
ov00_022E054C: ; 0x022E054C
	stmdb sp!, {r4, r5, r6, lr}
	ldr r2, _022E05AC ; =ov00_02326D7C
	mov r4, r0
	ldr r2, [r2, #4]
	mov r6, r1
	mov r5, r3
	cmp r2, #0
	ldmneia sp!, {r4, r5, r6, pc}
	mov r1, #0
	mov r2, #0x64
	bl MemsetFast
	strh r6, [r4, #8]
	mov r0, #1
	strh r0, [r4, #0xa]
	strh r0, [r4, #4]
	mov r0, #0
	strh r0, [r4, #6]
	strb r0, [r4, #0xc]
	ldr r1, _022E05AC ; =ov00_02326D7C
	str r0, [r4, #0x10]
	mov r0, r5
	str r4, [r1, #4]
	bl ov00_022CFDBC
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022E05AC: .word ov00_02326D7C
	arm_func_end ov00_022E054C

	arm_func_start ov00_022E05B0
ov00_022E05B0: ; 0x022E05B0
	ldr ip, _022E05C4 ; =ov00_022E054C
	mov r1, #3
	mov r2, #1
	mov r3, #0x14
	bx ip
	.align 2, 0
_022E05C4: .word ov00_022E054C
	arm_func_end ov00_022E05B0

	arm_func_start ov00_022E05C8
ov00_022E05C8: ; 0x022E05C8
	stmdb sp!, {r3, lr}
	cmp r0, #0
	beq _022E05E8
	cmp r0, #1
	beq _022E05F4
	cmp r0, #2
	beq _022E0600
	ldmia sp!, {r3, pc}
_022E05E8:
	ldr r0, _022E060C ; =ov00_0231A0E0
	bl ov00_022DBC84
	ldmia sp!, {r3, pc}
_022E05F4:
	ldr r0, _022E0610 ; =ov00_0231A108
	bl ov00_022DBC84
	ldmia sp!, {r3, pc}
_022E0600:
	ldr r0, _022E0614 ; =ov00_0231A12C
	bl ov00_022DBC84
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E060C: .word ov00_0231A0E0
_022E0610: .word ov00_0231A108
_022E0614: .word ov00_0231A12C
	arm_func_end ov00_022E05C8

	arm_func_start ov00_022E0618
ov00_022E0618: ; 0x022E0618
	stmdb sp!, {lr}
	sub sp, sp, #0xc
	ldr r0, _022E06BC ; =ov00_02326D7C
	ldr r0, [r0, #4]
	cmp r0, #0
	beq _022E06A8
	ldrh r0, [r0, #4]
	cmp r0, #1
	addne sp, sp, #0xc
	ldmneia sp!, {pc}
	add r0, sp, #0
	mov r1, #0
	mov r2, #0xc
	bl MemsetFast
	ldr r0, _022E06BC ; =ov00_02326D7C
	ldr r3, _022E06C0 ; =ov00_022E03F0
	ldr lr, [r0, #4]
	ldr r2, _022E06C4 ; =ov00_022E0434
	ldrh ip, [lr, #8]
	add r0, sp, #0
	mov r1, #2
	strb ip, [sp, #8]
	ldrh ip, [lr, #0xa]
	strb ip, [sp, #9]
	str r3, [sp]
	str r2, [sp, #4]
	strh r1, [lr, #4]
	bl ov00_022D75EC
	cmp r0, #0
	addne sp, sp, #0xc
	ldmneia sp!, {pc}
	ldr r1, _022E06C8 ; =0xFFFF3BE9
	mov r0, #9
	bl ov00_022E0394
	add sp, sp, #0xc
	ldmia sp!, {pc}
_022E06A8:
	ldr r1, _022E06C8 ; =0xFFFF3BE9
	mov r0, #9
	bl ov00_022E0394
	add sp, sp, #0xc
	ldmia sp!, {pc}
	.align 2, 0
_022E06BC: .word ov00_02326D7C
_022E06C0: .word ov00_022E03F0
_022E06C4: .word ov00_022E0434
_022E06C8: .word 0xFFFF3BE9
	arm_func_end ov00_022E0618

	arm_func_start ov00_022E06CC
ov00_022E06CC: ; 0x022E06CC
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r6, r1
	mov r5, r2
	mov r4, r3
	bl ov00_022E0618
	ldr r0, _022E0724 ; =ov00_02326D7C
	ldr r1, [r0, #4]
	cmp r1, #0
	movne r0, #1
	strneb r0, [r1, #0xc]
	bl ov00_022E089C
	cmp r0, #2
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	ldr ip, [sp, #0x18]
	mov r0, r7
	mov r1, r6
	mov r2, r5
	mov r3, r4
	str ip, [sp]
	bl ov00_022D7994
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022E0724: .word ov00_02326D7C
	arm_func_end ov00_022E06CC

	arm_func_start ov00_022E0728
ov00_022E0728: ; 0x022E0728
	stmdb sp!, {r3, lr}
	ldr r0, _022E077C ; =ov00_02326D7C
	ldr r1, [r0, #4]
	cmp r1, #0
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	ldr r0, [r1]
	cmp r0, #0
	beq _022E0774
	mov r0, #3
	strh r0, [r1, #4]
	bl ov00_022E089C
	ldr r0, _022E077C ; =ov00_02326D7C
	ldr r0, [r0, #4]
	ldrb r0, [r0, #0xc]
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, pc}
_022E0774:
	mov r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E077C: .word ov00_02326D7C
	arm_func_end ov00_022E0728

	arm_func_start ov00_022E0780
ov00_022E0780: ; 0x022E0780
	stmdb sp!, {r3, lr}
	ldr r0, _022E0898 ; =ov00_02326D7C
	ldr r1, [r0, #4]
	cmp r1, #0
	ldmeqia sp!, {r3, pc}
	ldr r0, [r1, #0x10]
	cmp r0, #5
	addls pc, pc, r0, lsl #2
	b _022E0838
_022E07A4: ; jump table
	b _022E0838 ; case 0
	b _022E07BC ; case 1
	b _022E07D8 ; case 2
	b _022E0814 ; case 3
	b _022E0834 ; case 4
	b _022E0834 ; case 5
_022E07BC:
	mov r0, #0
	str r0, [r1]
	bl ov00_022DAC0C
	ldr r1, _022E0898 ; =ov00_02326D7C
	ldr r1, [r1, #4]
	str r0, [r1, #0x10]
	ldmia sp!, {r3, pc}
_022E07D8:
	bl ov00_022DAF60
	ldr r0, _022E0898 ; =ov00_02326D7C
	mov r1, #8
	ldr r3, [r0, #4]
	str r1, [sp]
	ldr r2, [r3, #0x54]
	add r0, r3, #0x14
	add r1, r3, #0x34
	add r3, r3, #0x58
	bl ov00_022E06CC
	ldr r0, _022E0898 ; =ov00_02326D7C
	mov r1, #0
	ldr r0, [r0, #4]
	str r1, [r0, #0x10]
	ldmia sp!, {r3, pc}
_022E0814:
	bl ov00_022DAF60
	ldr r0, _022E0898 ; =ov00_02326D7C
	mvn r3, #0
	ldr r2, [r0, #4]
	mov r1, #1
	str r3, [r2]
	ldr r0, [r0, #4]
	strb r1, [r0, #0xc]
_022E0834:
	ldmia sp!, {r3, pc}
_022E0838:
	ldrh r0, [r1, #4]
	cmp r0, #2
	bne _022E0858
	bl InitWfc
	ldr r1, _022E0898 ; =ov00_02326D7C
	ldr r1, [r1, #4]
	str r0, [r1]
	ldmia sp!, {r3, pc}
_022E0858:
	cmp r0, #4
	ldmneia sp!, {r3, pc}
	ldrh r0, [r1, #6]
	cmp r0, #0
	ldmeqia sp!, {r3, pc}
	bl ov00_022D5640
	cmp r0, #9
	ldmeqia sp!, {r3, pc}
	ldr r0, _022E0898 ; =ov00_02326D7C
	mov r3, #0
	ldr r2, [r0, #4]
	mov r1, #6
	strh r3, [r2, #6]
	ldr r0, [r0, #4]
	strh r1, [r0, #4]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E0898: .word ov00_02326D7C
	arm_func_end ov00_022E0780

	arm_func_start ov00_022E089C
ov00_022E089C: ; 0x022E089C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr r0, _022E0A68 ; =ov00_02326D7C
	ldr r1, [r0, #4]
	cmp r1, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r0, [r1, #0x10]
	cmp r0, #5
	addls pc, pc, r0, lsl #2
	b _022E0930
_022E08C4: ; jump table
	b _022E0930 ; case 0
	b _022E08DC ; case 1
	b _022E08E4 ; case 2
	b _022E08EC ; case 3
	b _022E0920 ; case 4
	b _022E0928 ; case 5
_022E08DC:
	mov r0, #2
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E08E4:
	mov r0, #2
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E08EC:
	bl ov00_022E0780
	ldr r1, _022E0A68 ; =ov00_02326D7C
	mov r0, #5
	ldr r1, [r1]
	bl ov00_022E0394
	ldr r1, _022E0A68 ; =ov00_02326D7C
	mov r0, #7
	ldr r3, [r1, #4]
	mov r2, #4
	strh r0, [r3, #4]
	ldr r1, [r1, #4]
	str r2, [r1, #0x10]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E0920:
	mov r0, #7
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E0928:
	mov r0, #5
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E0930:
	ldrh r0, [r1, #4]
	cmp r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	bl ov00_022D7864
	mov r4, r0
	cmp r4, #5
	bne _022E0974
	ldr r1, _022E0A68 ; =ov00_02326D7C
	mov r0, #4
	ldr r2, [r1, #4]
	mov r3, #1
	strh r0, [r2, #4]
	ldr r2, [r1, #4]
	strh r3, [r2, #6]
	ldr r1, [r1, #4]
	strb r3, [r1, #0xc]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E0974:
	cmp r4, #0
	bge _022E0A60
	mvn r0, #9
	cmp r4, r0
	blt _022E09B8
	ldr r0, _022E0A68 ; =ov00_02326D7C
	ldr r1, _022E0A6C ; =0xFFFF3BE9
	ldr r2, [r0, #4]
	mov r3, #1
	mov r0, #9
	strb r3, [r2, #0xc]
	bl ov00_022E0394
	ldr r1, _022E0A68 ; =ov00_02326D7C
	mov r0, #8
	ldr r1, [r1, #4]
	strh r0, [r1, #4]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E09B8:
	ldr r0, _022E0A68 ; =ov00_02326D7C
	ldr r5, [r0, #4]
	ldrb r1, [r5, #0xc]
	cmp r1, #0
	bne _022E0A34
	ldrh r7, [r5, #8]
	bl ov00_022CFDAC
	ldr r1, _022E0A68 ; =ov00_02326D7C
	mov r6, r0
	str r4, [r1]
	bl ov00_022E0A70
	mov r2, r6, lsl #0x10
	mov r3, r2, lsr #0x10
	mov r0, r5
	mov r1, r7
	mov r2, #1
	bl ov00_022E054C
	ldr r0, _022E0A68 ; =ov00_02326D7C
	mov r1, #1
	ldr r0, [r0, #4]
	add r0, r0, #0x14
	bl ov00_022DAB9C
	ldr r1, _022E0A68 ; =ov00_02326D7C
	mov r3, #1
	ldr r2, [r1, #4]
	mov r0, #2
	str r3, [r2, #0x10]
	ldr r1, [r1, #4]
	mov r2, #0
	str r2, [r1]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E0A34:
	ldr r0, [r0]
	cmp r0, r4
	movlt r4, r0
	mov r1, r4
	mov r0, #5
	bl ov00_022E0394
	ldr r1, _022E0A68 ; =ov00_02326D7C
	mov r0, #7
	ldr r1, [r1, #4]
	strh r0, [r1, #4]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E0A60:
	mov r0, #2
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022E0A68: .word ov00_02326D7C
_022E0A6C: .word 0xFFFF3BE9
	arm_func_end ov00_022E089C

	arm_func_start ov00_022E0A70
ov00_022E0A70: ; 0x022E0A70
	stmdb sp!, {r4, lr}
	ldr r0, _022E0AF8 ; =ov00_02326D7C
	ldr r1, [r0, #4]
	cmp r1, #0
	ldmeqia sp!, {r4, pc}
	ldrh r0, [r1, #4]
	cmp r0, #1
	bne _022E0AC4
	ldr r0, [r1, #0x10]
	cmp r0, #1
	bne _022E0AB4
	bl ov00_022DAF44
_022E0AA0:
	bl ov00_022DAC0C
	sub r0, r0, #2
	cmp r0, #2
	bhi _022E0AA0
	bl ov00_022DAF60
_022E0AB4:
	ldr r0, _022E0AF8 ; =ov00_02326D7C
	mov r1, #0
	str r1, [r0, #4]
	ldmia sp!, {r4, pc}
_022E0AC4:
	bl ov00_022D7958
	cmp r0, #0
	bne _022E0AE8
	mov r4, #0xa
_022E0AD4:
	mov r0, r4
	bl sub_02079B14
	bl ov00_022D7958
	cmp r0, #0
	beq _022E0AD4
_022E0AE8:
	ldr r0, _022E0AF8 ; =ov00_02326D7C
	mov r1, #0
	str r1, [r0, #4]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022E0AF8: .word ov00_02326D7C
	arm_func_end ov00_022E0A70

	arm_func_start ov00_022E0AFC
ov00_022E0AFC: ; 0x022E0AFC
	stmdb sp!, {r3, lr}
	ldr r0, _022E0BBC ; =ov00_02326D7C
	ldr r1, [r0, #4]
	cmp r1, #0
	moveq r0, #1
	ldmeqia sp!, {r3, pc}
	ldrh r0, [r1, #4]
	cmp r0, #8
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	cmp r0, #1
	bne _022E0B90
	ldr r0, [r1, #0x10]
	cmp r0, #1
	bne _022E0B54
	bl ov00_022DAF44
	ldr r0, _022E0BBC ; =ov00_02326D7C
	mov r2, #5
	ldr r1, [r0, #4]
	mov r0, #0
	str r2, [r1, #0x10]
	ldmia sp!, {r3, pc}
_022E0B54:
	cmp r0, #5
	bne _022E0B7C
	bl ov00_022DAC0C
	cmp r0, #1
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	sub r0, r0, #2
	cmp r0, #2
	bhi _022E0B7C
	bl ov00_022DAF60
_022E0B7C:
	ldr r0, _022E0BBC ; =ov00_02326D7C
	mov r1, #0
	str r1, [r0, #4]
	mov r0, #1
	ldmia sp!, {r3, pc}
_022E0B90:
	mov r0, #5
	strh r0, [r1, #4]
	bl ov00_022D7958
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	ldr r0, _022E0BBC ; =ov00_02326D7C
	mov r1, #0
	str r1, [r0, #4]
	mov r0, #1
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E0BBC: .word ov00_02326D7C
	arm_func_end ov00_022E0AFC

	arm_func_start ov00_022E0BC0
ov00_022E0BC0: ; 0x022E0BC0
	ldr r0, _022E0BE8 ; =ov00_02326D7C
	ldr r0, [r0, #4]
	cmp r0, #0
	beq _022E0BE0
	ldrh r0, [r0, #4]
	cmp r0, #6
	moveq r0, #1
	bxeq lr
_022E0BE0:
	mov r0, #0
	bx lr
	.align 2, 0
_022E0BE8: .word ov00_02326D7C
	arm_func_end ov00_022E0BC0

	arm_func_start ov00_022E0BEC
ov00_022E0BEC: ; 0x022E0BEC
	ldr ip, _022E0BF4 ; =ov00_022D7494
	bx ip
	.align 2, 0
_022E0BF4: .word ov00_022D7494
	arm_func_end ov00_022E0BEC

	arm_func_start ov00_022E0BF8
ov00_022E0BF8: ; 0x022E0BF8
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #0xc
	mov r1, #0
	mov r2, #0x3c
	mov r4, r0
	bl MemsetFast
	mov r0, #0xff
	str r0, [r4, #4]
	bl ov00_022E089C
	cmp r0, #4
	addne sp, sp, #0xc
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, r6, pc}
	bl ov00_022D78D0
	str r0, [r4]
	cmp r0, #0xff
	beq _022E0C44
	cmp r0, #0x63
	ble _022E0C58
_022E0C44:
	mov r0, #0x63
	str r0, [r4]
	add sp, sp, #0xc
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, pc}
_022E0C58:
	bl EnableIrqFlag
	mov r6, r0
	bl ov00_022D7140
	mov r5, r0
	mov r1, #6
	bl DC_InvalidateRange
	cmp r5, #0
	bne _022E0C8C
	mov r0, r6
	bl SetIrqFlag
	add sp, sp, #0xc
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, pc}
_022E0C8C:
	mov r0, r5
	add r1, r4, #0x33
	mov r2, #6
	bl MemcpyFast
	ldr r0, [r4]
	cmp r0, #0
	blt _022E0CF0
	cmp r0, #3
	bge _022E0CF0
	add r0, sp, #0
	bl ov00_022D7184
	mov r5, r0
	mov r1, #0x20
	bl DC_InvalidateRange
	cmp r5, #0
	bne _022E0CE0
	mov r0, r6
	bl SetIrqFlag
	add sp, sp, #0xc
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, pc}
_022E0CE0:
	ldrh r2, [sp]
	mov r0, r5
	add r1, r4, #0x12
	bl MemcpyFast
_022E0CF0:
	mov r0, r6
	bl SetIrqFlag
	add r0, sp, #2
	bl ov00_022D7900
	cmp r0, #0
	beq _022E0D44
	ldrb r1, [sp, #2]
	mov r0, #0
	cmp r1, #0x30
	blo _022E0D20
	cmp r1, #0x39
	movls r0, #1
_022E0D20:
	cmp r0, #0
	subne r3, r1, #0x30
	moveq r3, #0xff
	add r0, sp, #3
	add r1, r4, #8
	mov r2, #9
	str r3, [r4, #4]
	bl MemcpyFast
	b _022E0D4C
_022E0D44:
	mov r0, #0xff
	str r0, [r4, #4]
_022E0D4C:
	mov r0, #1
	add sp, sp, #0xc
	ldmia sp!, {r3, r4, r5, r6, pc}
	arm_func_end ov00_022E0BF8

	arm_func_start ov00_022E0D58
ov00_022E0D58: ; 0x022E0D58
	stmdb sp!, {r3, lr}
	bl ov00_022E0780
	bl ov00_022E0BC0
	cmp r0, #0
	beq _022E0DA0
	bl ov00_022D78D0
	mov r2, r0
	cmp r2, #0xff
	beq _022E0D84
	cmp r2, #0x63
	bls _022E0D88
_022E0D84:
	mov r2, #0x63
_022E0D88:
	ldr r1, _022E0DA8 ; =0xFFFF2D10
	mov r0, #8
	sub r1, r1, r2
	bl ov00_022E0394
	mov r0, #1
	ldmia sp!, {r3, pc}
_022E0DA0:
	mov r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E0DA8: .word 0xFFFF2D10
	arm_func_end ov00_022E0D58

	arm_func_start ov00_022E0DAC
ov00_022E0DAC: ; 0x022E0DAC
	ldr r0, _022E0DB8 ; =ov00_02326CB4
	ldr r0, [r0]
	bx lr
	.align 2, 0
_022E0DB8: .word ov00_02326CB4
	arm_func_end ov00_022E0DAC

	arm_func_start ov00_022E0DBC
ov00_022E0DBC: ; 0x022E0DBC
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	ldr r0, _022E0E24 ; =ov00_022E03F0
	ldr r1, _022E0E28 ; =ov00_022E0434
	bl ov00_022DF910
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	mov r0, r5
	bl strlen
	cmp r0, #0
	bne _022E0E00
	ldr r0, _022E0E2C ; =ov00_0231A14C
	mov r1, r4
	bl ov00_022DF9F4
	b _022E0E0C
_022E0E00:
	mov r0, r5
	mov r1, r4
	bl ov00_022DF9F4
_022E0E0C:
	cmp r0, #0
	movne r0, #1
	ldmneia sp!, {r3, r4, r5, pc}
	bl ov00_022DF9A8
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022E0E24: .word ov00_022E03F0
_022E0E28: .word ov00_022E0434
_022E0E2C: .word ov00_0231A14C
	arm_func_end ov00_022E0DBC

	arm_func_start ov00_022E0E30
ov00_022E0E30: ; 0x022E0E30
	stmdb sp!, {r4, lr}
	bl ov00_022DFC5C
	mov r4, r0
	sub r0, r4, #3
	cmp r0, #2
	bhi _022E0E4C
	bl ov00_022DF9A8
_022E0E4C:
	mov r0, r4
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022E0E30

	arm_func_start ov00_022E0E54
ov00_022E0E54: ; 0x022E0E54
	ldr ip, _022E0E68 ; =ov00_022E0400
	mov r2, r1
	mov r1, r0
	mov r0, #6
	bx ip
	.align 2, 0
_022E0E68: .word ov00_022E0400
	arm_func_end ov00_022E0E54

	arm_func_start ov00_022E0E6C
ov00_022E0E6C: ; 0x022E0E6C
	ldr ip, _022E0E80 ; =ov00_022E0434
	mov r1, r0
	mov r0, #6
	mov r2, #0
	bx ip
	.align 2, 0
_022E0E80: .word ov00_022E0434
	arm_func_end ov00_022E0E6C

	arm_func_start ov00_022E0E84
ov00_022E0E84: ; 0x022E0E84
	stmdb sp!, {r4, r5, r6, lr}
	movs r5, r1
	mov r6, r0
	mov r4, r2
	bne _022E0EAC
	ldr r3, _022E0F64 ; =ov00_02326D84
	ldr r3, [r3]
	ldr r3, [r3]
	blx r3
	ldmia sp!, {r4, r5, r6, pc}
_022E0EAC:
	cmp r5, #8
	addls pc, pc, r5, lsl #2
	b _022E0F40
_022E0EB8: ; jump table
	b _022E0F40 ; case 0
	b _022E0EDC ; case 1
	b _022E0EEC ; case 2
	b _022E0EF4 ; case 3
	b _022E0F04 ; case 4
	b _022E0F14 ; case 5
	b _022E0F44 ; case 6
	b _022E0F28 ; case 7
	b _022E0F30 ; case 8
_022E0EDC:
	ldr r1, _022E0F68 ; =0xFFFF86E7
	mov r0, #9
	bl ov00_022E0394
	b _022E0F44
_022E0EEC:
	bl WaitForever2
	b _022E0F44
_022E0EF4:
	ldr r1, _022E0F6C ; =0xFFFF86D4
	mov r0, #0xf
	bl ov00_022E0394
	b _022E0F44
_022E0F04:
	ldr r1, _022E0F70 ; =0xFFFF86CA
	mov r0, #0xe
	bl ov00_022E0394
	b _022E0F44
_022E0F14:
	ldr r1, _022E0F74 ; =0xFFFF86E8
	mov r0, #0xe
	sub r1, r1, r4
	bl ov00_022E0394
	b _022E0F44
_022E0F28:
	bl WaitForever2
	b _022E0F44
_022E0F30:
	ldr r1, _022E0F78 ; =0xFFFF86DF
	mov r0, #9
	bl ov00_022E0394
	b _022E0F44
_022E0F40:
	bl WaitForever2
_022E0F44:
	ldr r1, _022E0F64 ; =ov00_02326D84
	mov r0, r6
	ldr r2, [r1]
	mov r1, r5
	ldr r3, [r2]
	mov r2, r4
	blx r3
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022E0F64: .word ov00_02326D84
_022E0F68: .word 0xFFFF86E7
_022E0F6C: .word 0xFFFF86D4
_022E0F70: .word 0xFFFF86CA
_022E0F74: .word 0xFFFF86E8
_022E0F78: .word 0xFFFF86DF
	arm_func_end ov00_022E0E84

	arm_func_start ov00_022E0F7C
ov00_022E0F7C: ; 0x022E0F7C
	stmdb sp!, {r4, lr}
	ldr r0, _022E0FBC ; =ov00_02326D84
	ldr r0, [r0]
	add r0, r0, #0x9c0
	bl sub_02079800
	ldr r0, _022E0FBC ; =ov00_02326D84
	ldr r0, [r0]
	ldr r4, [r0, #4]
	bl ov00_022E0E6C
	ldr r0, _022E0FBC ; =ov00_02326D84
	mov r1, #0
	str r1, [r0]
	cmp r4, #0
	ldmeqia sp!, {r4, pc}
	blx r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022E0FBC: .word ov00_02326D84
	arm_func_end ov00_022E0F7C

	arm_func_start ov00_022E0FC0
ov00_022E0FC0: ; 0x022E0FC0
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x2a0
	mov r7, #0
	mov r6, #6
	mvn r5, #0
	mov r4, #0x64
_022E0FD8:
	bl ov00_022E0E30
	cmp r0, #3
	bne _022E10F4
	ldr r0, _022E1160 ; =ov00_02326D84
	ldr r5, [r0]
	add r0, r5, #0x50
	bl strlen
	mov r4, r0
	ldr r0, _022E1164 ; =ov00_0231A154
	bl strlen
	add r0, r4, r0
	cmp r0, #0xff
	bls _022E1024
	mov r1, #8
	sub r2, r1, #9
	mov r0, #0
	bl ov00_022E0E84
	add sp, sp, #0x2a0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E1024:
	ldr r2, _022E1168 ; =ov00_0231A168
	add r0, sp, #0x1a0
	add r3, r5, #0x50
	mov r1, #0x100
	bl sub_0207911C
	ldr r0, _022E1160 ; =ov00_02326D84
	ldr r4, [r0]
	add r0, r4, #0x91
	bl strlen
	mov r1, r0
	add r2, sp, #0x10
	add r0, r4, #0x91
	mov r3, #0x190
	bl ov00_022DFF4C
	cmp r0, #0
	bge _022E107C
	mov r1, #8
	sub r2, r1, #9
	mov r0, #0
	bl ov00_022E0E84
	add sp, sp, #0x2a0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E107C:
	ldr r0, _022E1160 ; =ov00_02326D84
	ldr r4, _022E116C ; =ov00_022E0E84
	ldr r2, [r0]
	ldr r0, _022E1170 ; =ov00_022E0E54
	add r1, r2, #8
	str r1, [sp]
	add r1, r2, #0x28
	str r1, [sp, #4]
	ldr r1, _022E1174 ; =ov00_022E0E6C
	add r2, sp, #0x1a0
	add r3, sp, #0x10
	str r4, [sp, #8]
	bl ov00_022EFC88
	cmp r0, #0
	mov r0, #0
	bne _022E10D0
	mov r1, #8
	sub r2, r1, #9
	bl ov00_022E0E84
	add sp, sp, #0x2a0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E10D0:
	ldr r1, _022E1160 ; =ov00_02326D84
	mov r4, #1
	ldr r3, [r1]
	mov r1, r0
	sub r2, r0, #1
	str r4, [r3, #0x48]
	bl ov00_022E0E84
	add sp, sp, #0x2a0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E10F4:
	cmp r0, #4
	bne _022E1134
	add r0, sp, #0xc
	bl ov00_022E023C
	ldr r1, [sp, #0xc]
	mov r0, #0xe
	bl ov00_022E0394
	ldr r0, _022E1160 ; =ov00_02326D84
	mov r1, #3
	ldr r0, [r0]
	sub r2, r1, #4
	ldr r3, [r0]
	mov r0, #0
	blx r3
	add sp, sp, #0x2a0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E1134:
	cmp r0, #5
	bne _022E114C
	mov r0, r7
	mov r1, r6
	mov r2, r5
	bl ov00_022E0E84
_022E114C:
	mov r0, r4
	bl sub_02079B14
	b _022E0FD8
_022E1158:
	add sp, sp, #0x2a0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022E1160: .word ov00_02326D84
_022E1164: .word ov00_0231A154
_022E1168: .word ov00_0231A168
_022E116C: .word ov00_022E0E84
_022E1170: .word ov00_022E0E54
_022E1174: .word ov00_022E0E6C
	arm_func_end ov00_022E0FC0

	arm_func_start ov00_022E1178
ov00_022E1178: ; 0x022E1178
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #8
	mov r6, r0
	mov r5, r1
	mov r4, r2
	bl ov00_022E0378
	cmp r0, #0
	addne sp, sp, #8
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	mov r0, #0xa80
	mov r1, #0x20
	bl ov00_022E0E54
	ldr r2, _022E1284 ; =ov00_02326D84
	mov r1, #0
	str r0, [r2]
	str r1, [r0, #0x48]
	ldr r0, [r2]
	mov r2, #0xa80
	bl MemsetFast
	ldr r0, _022E1284 ; =ov00_02326D84
	mov r1, r5
	ldr r3, [r0]
	mov r2, #0x1f
	str r6, [r3]
	ldr r0, [r0]
	add r0, r0, #8
	bl strncpy
	ldr r0, _022E1284 ; =ov00_02326D84
	mov r1, r4
	ldr r0, [r0]
	mov r2, #0x1f
	add r0, r0, #0x28
	bl strncpy
	ldr r1, _022E1284 ; =ov00_02326D84
	ldr r0, _022E1288 ; =ov00_0231A17C
	ldr r1, [r1]
	add r1, r1, #0x4c
	bl ov00_022E0DBC
	cmp r0, #0
	bne _022E123C
	ldr r0, _022E1284 ; =ov00_02326D84
	ldr r0, [r0]
	bl ov00_022E0E6C
	ldr r1, _022E1284 ; =ov00_02326D84
	mov r0, #0
	str r0, [r1]
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, pc}
_022E123C:
	ldr r0, _022E1284 ; =ov00_02326D84
	mov r2, #0x800
	ldr r3, [r0]
	ldr r1, _022E128C ; =ov00_022E0FC0
	str r2, [sp]
	mov ip, #0x10
	add r0, r3, #0x9c0
	add r3, r3, #0x9c0
	mov r2, #0
	str ip, [sp, #4]
	bl StartThread
	ldr r0, _022E1284 ; =ov00_02326D84
	ldr r0, [r0]
	add r0, r0, #0x9c0
	bl OS_WakeupThreadDirect
	mov r0, #1
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022E1284: .word ov00_02326D84
_022E1288: .word ov00_0231A17C
_022E128C: .word ov00_022E0FC0
	arm_func_end ov00_022E1178

	arm_func_start ov00_022E1290
ov00_022E1290: ; 0x022E1290
	stmdb sp!, {r3, lr}
	ldr r1, _022E12D4 ; =ov00_02326D84
	ldr r2, [r1]
	cmp r2, #0
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	str r0, [r2, #4]
	ldr r0, [r1]
	ldr r0, [r0, #0x48]
	cmp r0, #0
	bne _022E12C4
	bl ov00_022E0F7C
	b _022E12CC
_022E12C4:
	ldr r0, _022E12D8 ; =ov00_022E0F7C
	bl ov00_022EFE74
_022E12CC:
	mov r0, #1
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E12D4: .word ov00_02326D84
_022E12D8: .word ov00_022E0F7C
	arm_func_end ov00_022E1290

	arm_func_start ov00_022E12DC
ov00_022E12DC: ; 0x022E12DC
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	mov r4, r2
	bl ov00_022E0378
	cmp r0, #0
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_022EF8E4
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022E12DC

	arm_func_start ov00_022E1310
ov00_022E1310: ; 0x022E1310
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022E0378
	cmp r0, #0
	movne r0, #0
	ldmneia sp!, {r4, pc}
	mov r0, r4
	bl ov00_022F07EC
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022E1310

	arm_func_start ov00_022E1334
ov00_022E1334: ; 0x022E1334
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	mov r4, r2
	bl ov00_022E0378
	cmp r0, #0
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	mov r0, #0xb0
	mul r2, r4, r0
	mov r0, r6
	mov r1, #0
	bl MemsetFast
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_022F0868
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022E1334

	arm_func_start ov00_022E137C
ov00_022E137C: ; 0x022E137C
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	mov r4, r2
	bl ov00_022E0378
	cmp r0, #0
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	mov r0, r6
	mov r1, r5
	mov r2, r4
	mov r3, #0
	bl ov00_022F0B2C
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022E137C

	arm_func_start ov00_022E13B4
ov00_022E13B4: ; 0x022E13B4
	stmdb sp!, {r3, lr}
	bl ov00_022E0378
	cmp r0, #0
	movne r0, #0
	ldmneia sp!, {r3, pc}
	bl ov00_022EFE9C
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022E13B4

	arm_func_start ov00_022E13D0
ov00_022E13D0: ; 0x022E13D0
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #0xc
	stmia sp, {r0, r3}
	mov r4, r2
	str r1, [sp, #8]
	ldr r2, _022E1404 ; =ov00_0231A184
	mov r0, r4
	mov r1, #0x1000
	bl sub_0207911C
	mov r0, r4
	bl strlen
	add sp, sp, #0xc
	ldmia sp!, {r3, r4, pc}
	.align 2, 0
_022E1404: .word ov00_0231A184
	arm_func_end ov00_022E13D0

	arm_func_start ov00_022E1408
ov00_022E1408: ; 0x022E1408
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r5, r2
	mov r7, r0
	mov r6, r1
	mov r4, r3
	mov r0, r5
	mov r1, #0
	bl strchr
	mov r2, r0
	mov r0, r7
	mov r1, r6
	mov r3, r4
	bl ov00_022E13D0
	mov r0, r5
	bl strlen
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022E1408

	arm_func_start ov00_022E1448
ov00_022E1448: ; 0x022E1448
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	movs r4, r1
	mov r7, r0
	mov r6, r3
	mvneq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r0, r2
	mov r1, r6
	bl strchr
	movs r5, r0
	mvneq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
_022E1478:
	mov r0, r7
	bl strlen
	mov r2, r0
	mov r1, r7
	add r0, r5, #1
	bl strncmp
	cmp r0, #0
	bne _022E14B0
	mov r0, r7
	bl strlen
	add r0, r0, r5
	ldrsb r0, [r0, #1]
	cmp r6, r0
	beq _022E14E4
_022E14B0:
	mov r1, r6
	add r0, r5, #1
	bl strchr
	cmp r0, #0
	mvneq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r1, r6
	add r0, r0, #1
	bl strchr
	movs r5, r0
	bne _022E1478
	mvn r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E14E4:
	mov r1, r6
	add r0, r5, #1
	bl strchr
	movs r5, r0
	mvneq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r1, r6
	add r0, r5, #1
	bl strchr
	cmp r0, #0
	addne r1, r5, #1
	subne r6, r0, r1
	bne _022E1524
	add r0, r5, #1
	bl strlen
	mov r6, r0
_022E1524:
	mov r0, r4
	mov r2, r6
	add r1, r5, #1
	bl strncpy
	mov r1, #0
	mov r0, r6
	strb r1, [r4, r6]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022E1448

	arm_func_start ov00_022E1544
ov00_022E1544: ; 0x022E1544
	stmdb sp!, {r4, lr}
	sub sp, sp, #8
	ldr r1, _022E1650 ; =ov00_02326D88
	mov r4, r0
	ldr r0, [r1, #4]
	ldr r2, [r1]
	cmp r0, #0
	cmpeq r2, #0
	mov r0, #0
	bne _022E1608
	ldr r2, [r1, #0xc]
	ldr r3, [r1, #8]
	cmp r2, r0
	cmpeq r3, r0
	bne _022E1608
	ldr r2, [r1, #0x14]
	ldr r1, [r1, #0x10]
	cmp r2, r0
	cmpeq r1, r0
	bne _022E1608
	add r0, sp, #0
	bl sub_0207B9EC
	bl sub_0207AE44
	mov r2, r1, lsl #0x18
	ldr ip, [sp]
	ldr r3, [sp, #4]
	mov lr, ip, lsr #0x18
	orr lr, lr, r3, lsl #8
	mvn r1, #0xff000000
	and r1, lr, r1
	orr lr, r1, r0, lsl #24
	mov ip, #0
	orr r2, r2, r0, lsr #8
	and r1, ip, r3, lsr #24
	orr r2, r1, r2
	ldr r0, _022E1654 ; =ov00_02326D88
	add r1, sp, #0
	str lr, [sp]
	str r2, [sp, #4]
	ldmia r1, {r2, r3}
	stmia r0, {r2, r3}
	ldr r1, _022E1658 ; =0x6C078965
	ldr r0, _022E1650 ; =ov00_02326D88
	ldr r2, _022E165C ; =0x5D588B65
	str r1, [r0, #8]
	ldr r1, _022E1660 ; =0x00269EC3
	str r2, [r0, #0xc]
	str r1, [r0, #0x10]
	str ip, [r0, #0x14]
_022E1608:
	ldr r1, _022E1650 ; =ov00_02326D88
	ldr r2, [r1]
	ldmib r1, {r0, r3}
	umull lr, ip, r3, r2
	mla ip, r3, r0, ip
	ldr r0, [r1, #0xc]
	ldr r3, [r1, #0x10]
	mla ip, r0, r2, ip
	ldr r0, [r1, #0x14]
	adds r2, r3, lr
	adc r0, r0, ip
	str r2, [r1]
	str r0, [r1, #4]
	cmp r4, #0
	umullne r2, r1, r0, r4
	movne r0, r1
	add sp, sp, #8
	ldmia sp!, {r4, pc}
	.align 2, 0
_022E1650: .word ov00_02326D88
_022E1654: .word ov00_02326D88
_022E1658: .word 0x6C078965
_022E165C: .word 0x5D588B65
_022E1660: .word 0x00269EC3
	arm_func_end ov00_022E1544

	arm_func_start ov00_022E1664
ov00_022E1664: ; 0x022E1664
	ldrh r1, [r0]
	mov r2, #0
	cmp r1, #0
	beq _022E1688
_022E1674:
	add r2, r2, #1
	mov r1, r2, lsl #1
	ldrh r1, [r0, r1]
	cmp r1, #0
	bne _022E1674
_022E1688:
	mov r0, r2
	bx lr
	arm_func_end ov00_022E1664

	arm_func_start ov00_022E1690
ov00_022E1690: ; 0x022E1690
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #0x10
	ldr ip, _022E18F4 ; =ov00_02326DA0
	mov r6, r1
	mov r5, r2
	mov r4, r3
	str r0, [ip]
	bl ov00_022E0358
	ldr r0, _022E18F4 ; =ov00_02326DA0
	mov r2, #0
	ldr r1, [r0]
	ldr r3, _022E18F8 ; =ov00_022E6248
	str r2, [r1]
	ldr r1, [r0]
	ldr r2, _022E18FC ; =ov00_022E26E8
	str r3, [r1, #4]
	ldr r1, [r0]
	ldr ip, [sp, #0x24]
	str r2, [r1, #8]
	cmp ip, #0
	ldr r2, [r0]
	ldr r3, _022E1900 ; =ov00_022E26F4
	ldr r1, _022E1904 ; =ov00_022E2A5C
	str r3, [r2, #0xc]
	ldr r0, [r0]
	ldr r3, [sp, #0x28]
	str r1, [r0, #0x10]
	ldr r0, _022E18F4 ; =ov00_02326DA0
	moveq ip, #0x2000
	ldr r0, [r0]
	cmp r3, #0
	str ip, [r0, #0x14]
	moveq r3, #0x2000
	ldr r1, _022E18F4 ; =ov00_02326DA0
	mov r0, #0
	ldr r2, [r1]
	ldr ip, _022E1908 ; =ov00_02328A18
	str r3, [r2, #0x18]
	ldr r2, [r1]
	ldr r3, _022E190C ; =ov00_02328B18
	str r0, [r2, #0x1c]
	ldr r2, [r1]
	str r6, [r2, #0x20]
	ldr r2, [r1]
	str r0, [r2, #0x24]
	ldr r2, [r1]
	str r0, [r2, #0x28]
	ldr r2, [r1]
	strb r0, [r2, #0x2c]
	ldr r2, [r1]
	strb r0, [r2, #0x2d]
	ldr r2, [r1]
	str r0, [r2, #0x64]
	ldr r2, [r1]
	str ip, [r2, #0x68]
	ldr r2, [r1]
	str r3, [r2, #0x6c]
	ldr r2, [r1]
	str r0, [r2, #0x70]
	ldr r2, [r1]
	str r0, [r2, #0x74]
	ldr r2, [r1]
	str r0, [r2, #0x78]
	ldr r2, [r1]
	str r0, [r2, #0x7c]
	ldr r2, [r1]
	str r0, [r2, #0x80]
	ldr r2, [r1]
	str r0, [r2, #0x84]
	ldr r2, [r1]
	str r0, [r2, #0x88]
	ldr r2, [r1]
	str r0, [r2, #0x8c]
	ldr r2, [r1]
	str r0, [r2, #0x90]
	ldr r1, [r1]
	str r0, [r1, #0x94]
	bl ov00_022E2154
	ldr r0, _022E18F4 ; =ov00_02326DA0
	ldr r1, [r6, #0x24]
	ldr r2, [r0]
	ldr r0, _022E1910 ; =ov00_022E24B0
	str r1, [sp]
	add r1, r2, #0x2e
	str r1, [sp, #4]
	mov r1, r6
	mov r3, r5
	str r0, [sp, #8]
	mov r5, #0
	add r0, r2, #0x98
	add r2, r2, #0x1c
	str r5, [sp, #0xc]
	bl ov00_022E2AA4
	ldr r0, _022E18F4 ; =ov00_02326DA0
	ldr r2, [sp, #0x30]
	ldr r5, [r0]
	ldr r3, [sp, #0x2c]
	add r0, r5, #0x318
	add r1, r5, #0x1c
	str r2, [sp]
	add r2, r5, #0x2e
	bl ov00_022E3740
	ldr r0, _022E18F4 ; =ov00_02326DA0
	ldr r1, _022E1908 ; =ov00_02328A18
	ldr r2, [r0]
	ldr r0, _022E190C ; =ov00_02328B18
	str r1, [sp]
	str r0, [sp, #4]
	ldr r1, [sp, #0x2c]
	ldr r0, [sp, #0x30]
	str r1, [sp, #8]
	str r0, [sp, #0xc]
	add r0, r2, #0x378
	add r1, r2, #0x1c
	add r3, r2, #4
	bl ov00_022E50A8
	ldr r0, _022E18F4 ; =ov00_02326DA0
	ldr r0, [r0]
	add r0, r0, #0x3fc
	add r0, r0, #0x400
	bl ov00_022EC69C
	mov r0, r4
	bl strlen
	cmp r0, #0x100
	movhs r5, #0xff
	bhs _022E1894
	mov r0, r4
	bl strlen
	mov r5, r0
_022E1894:
	ldr r1, _022E1908 ; =ov00_02328A18
	mov r0, r4
	mov r2, r5
	bl MemcpyFast
	ldr r0, [sp, #0x20]
	ldr r1, _022E1908 ; =ov00_02328A18
	mov r2, #0
	strb r2, [r1, r5]
	bl strlen
	cmp r0, #0x100
	movhs r4, #0xff
	bhs _022E18D0
	ldr r0, [sp, #0x20]
	bl strlen
	mov r4, r0
_022E18D0:
	ldr r0, [sp, #0x20]
	ldr r1, _022E190C ; =ov00_02328B18
	mov r2, r4
	bl MemcpyFast
	ldr r0, _022E190C ; =ov00_02328B18
	mov r1, #0
	strb r1, [r0, r4]
	add sp, sp, #0x10
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022E18F4: .word ov00_02326DA0
_022E18F8: .word ov00_022E6248
_022E18FC: .word ov00_022E26E8
_022E1900: .word ov00_022E26F4
_022E1904: .word ov00_022E2A5C
_022E1908: .word ov00_02328A18
_022E190C: .word ov00_02328B18
_022E1910: .word ov00_022E24B0
	arm_func_end ov00_022E1690

	arm_func_start ov00_022E1914
ov00_022E1914: ; 0x022E1914
	stmdb sp!, {r3, lr}
	ldr r0, _022E1A80 ; =ov00_02326DA0
	ldr r0, [r0]
	cmp r0, #0
	ldmeqia sp!, {r3, pc}
	ldr r0, [r0, #0x388]
	cmp r0, #0
	beq _022E1948
	bl ov00_02312C50
	ldr r0, _022E1A80 ; =ov00_02326DA0
	mov r1, #0
	ldr r0, [r0]
	str r1, [r0, #0x388]
_022E1948:
	ldr r0, _022E1A80 ; =ov00_02326DA0
	mov r2, #0
	ldr r1, [r0]
	strb r2, [r1, #0x390]
	ldr r0, [r0]
	ldr r0, [r0, #0x45c]
	cmp r0, #0
	beq _022E197C
	bl ov00_02315AD8
	ldr r0, _022E1A80 ; =ov00_02326DA0
	mov r1, #0
	ldr r0, [r0]
	str r1, [r0, #0x45c]
_022E197C:
	bl ov00_022E5080
	bl ov00_022E4E70
	bl ov00_0230C29C
	bl ov00_022E4E84
	ldr r0, _022E1A80 ; =ov00_02326DA0
	ldr ip, [r0]
	ldr r0, [ip, #0x1c]
	cmp r0, #0
	beq _022E1A38
	mov r1, #0
	mov r2, r1
	mov r3, r1
	add r0, ip, #0x1c
	bl ov00_022FEFA8
	ldr r0, _022E1A80 ; =ov00_02326DA0
	mov r2, #0
	ldr r0, [r0]
	mov r3, r2
	add r0, r0, #0x1c
	mov r1, #3
	bl ov00_022FEFA8
	ldr r0, _022E1A80 ; =ov00_02326DA0
	mov r2, #0
	ldr r0, [r0]
	mov r3, r2
	add r0, r0, #0x1c
	mov r1, #1
	bl ov00_022FEFA8
	ldr r0, _022E1A80 ; =ov00_02326DA0
	mov r2, #0
	ldr r0, [r0]
	mov r1, #2
	add r0, r0, #0x1c
	mov r3, r2
	bl ov00_022FEFA8
	ldr r0, _022E1A80 ; =ov00_02326DA0
	ldr r0, [r0]
	add r0, r0, #0x1c
	bl ov00_022FEF74
	ldr r0, _022E1A80 ; =ov00_02326DA0
	ldr r0, [r0]
	add r0, r0, #0x1c
	bl ov00_022FEF58
	mov r1, #0
	ldr r0, _022E1A80 ; =ov00_02326DA0
	ldr r0, [r0]
	str r1, [r0, #0x1c]
_022E1A38:
	bl ov00_022E2CC4
	bl ov00_022E3F90
	bl ov00_022E6DD8
	bl ov00_022EC97C
	ldr r0, _022E1A80 ; =ov00_02326DA0
	ldr r0, [r0]
	ldr r0, [r0]
	cmp r0, #0
	beq _022E1A70
	bl ov00_0230E098
	ldr r0, _022E1A80 ; =ov00_02326DA0
	mov r1, #0
	ldr r0, [r0]
	str r1, [r0]
_022E1A70:
	ldr r0, _022E1A80 ; =ov00_02326DA0
	mov r1, #0
	str r1, [r0]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E1A80: .word ov00_02326DA0
	arm_func_end ov00_022E1914

	arm_func_start ov00_022E1A84
ov00_022E1A84: ; 0x022E1A84
	stmdb sp!, {r3, lr}
	bl ov00_022E0D58
	cmp r0, #0
	beq _022E1A98
	bl ov00_022E226C
_022E1A98:
	ldr r0, _022E1CE4 ; =ov00_02326DA0
	ldr r0, [r0]
	cmp r0, #0
	ldrne r0, [r0, #0x24]
	cmpne r0, #0
	ldmeqia sp!, {r3, pc}
	bl ov00_022E0378
	cmp r0, #0
	ldmneia sp!, {r3, pc}
	ldr r0, _022E1CE4 ; =ov00_02326DA0
	ldr r0, [r0]
	ldr r0, [r0, #0x24]
	cmp r0, #6
	addls pc, pc, r0, lsl #2
	b _022E1C9C
_022E1AD4: ; jump table
	b _022E1C9C ; case 0
	b _022E1AF0 ; case 1
	b _022E1C30 ; case 2
	b _022E1C38 ; case 3
	b _022E1C38 ; case 4
	b _022E1C48 ; case 5
	b _022E1C58 ; case 6
_022E1AF0:
	bl ov00_022F5DA8
	cmp r0, #1
	beq _022E1B10
	cmp r0, #2
	beq _022E1C10
	cmp r0, #3
	beq _022E1C20
	b _022E1C9C
_022E1B10:
	ldr r0, _022E1CE4 ; =ov00_02326DA0
	mov r2, #0x10
	ldr r0, [r0]
	mov r3, #0xb
	ldr r1, [r0, #0xa0]
	add r0, r0, #0x1c
	bl ov00_022FEF28
	bl ov00_022E22F0
	cmp r0, #0
	ldmneia sp!, {r3, pc}
	ldr r0, _022E1CE4 ; =ov00_02326DA0
	mov r1, #0
	ldr r0, [r0]
	ldr r2, _022E1CE8 ; =ov00_022E2558
	mov r3, r1
	add r0, r0, #0x1c
	bl ov00_022FEFA8
	bl ov00_022E22F0
	cmp r0, #0
	ldmneia sp!, {r3, pc}
	ldr r0, _022E1CE4 ; =ov00_02326DA0
	ldr r2, _022E1CEC ; =ov00_022E2590
	ldr r0, [r0]
	mov r1, #3
	add r0, r0, #0x1c
	mov r3, #0
	bl ov00_022FEFA8
	bl ov00_022E22F0
	cmp r0, #0
	ldmneia sp!, {r3, pc}
	ldr r0, _022E1CE4 ; =ov00_02326DA0
	ldr r2, _022E1CF0 ; =ov00_022E3CBC
	ldr r0, [r0]
	mov r1, #7
	add r0, r0, #0x1c
	mov r3, #0
	bl ov00_022FEFA8
	bl ov00_022E22F0
	cmp r0, #0
	ldmneia sp!, {r3, pc}
	ldr r0, _022E1CE4 ; =ov00_02326DA0
	ldr r2, _022E1CF4 ; =ov00_022E3C70
	ldr r0, [r0]
	mov r1, #1
	add r0, r0, #0x1c
	mov r3, #0
	bl ov00_022FEFA8
	bl ov00_022E22F0
	cmp r0, #0
	ldmneia sp!, {r3, pc}
	ldr r0, _022E1CE4 ; =ov00_02326DA0
	ldr r2, _022E1CF8 ; =ov00_022E3CEC
	ldr r0, [r0]
	mov r1, #2
	add r0, r0, #0x1c
	mov r3, #0
	bl ov00_022FEFA8
	bl ov00_022E22F0
	cmp r0, #0
	ldmneia sp!, {r3, pc}
	mov r0, #2
	bl ov00_022E2270
	bl ov00_022E2B28
	b _022E1C9C
_022E1C10:
	ldr r1, _022E1CFC ; =0xFFFFB172
	mov r0, #3
	bl ov00_022E2C74
	ldmia sp!, {r3, pc}
_022E1C20:
	ldr r1, _022E1D00 ; =0xFFFFB17B
	mov r0, #4
	bl ov00_022E2C74
	ldmia sp!, {r3, pc}
_022E1C30:
	bl ov00_022E2B60
	b _022E1C9C
_022E1C38:
	bl ov00_022E385C
	mov r0, #0
	bl ov00_022E5470
	b _022E1C9C
_022E1C48:
	mov r0, #1
	bl ov00_022E5470
	bl ov00_022E385C
	b _022E1C9C
_022E1C58:
	bl ov00_022EC758
	bl ov00_022E385C
	ldr r0, _022E1CE4 ; =ov00_02326DA0
	ldr r1, [r0]
	ldrb r0, [r1, #0x38d]
	cmp r0, #2
	ldrneb r0, [r1, #0x38d]
	cmpne r0, #3
	bne _022E1C88
	mov r0, #1
	bl ov00_022E5470
	b _022E1C9C
_022E1C88:
	ldr r0, [r1]
	cmp r0, #0
	beq _022E1C9C
	mov r0, #0
	bl ov00_022E5470
_022E1C9C:
	ldr r0, _022E1CE4 ; =ov00_02326DA0
	ldr r1, [r0]
	ldrb r0, [r1, #0x390]
	cmp r0, #1
	ldmneia sp!, {r3, pc}
	ldr r0, [r1, #0x388]
	cmp r0, #0
	beq _022E1CD0
	bl ov00_02312C50
	ldr r0, _022E1CE4 ; =ov00_02326DA0
	mov r1, #0
	ldr r0, [r0]
	str r1, [r0, #0x388]
_022E1CD0:
	ldr r0, _022E1CE4 ; =ov00_02326DA0
	mov r1, #0
	ldr r0, [r0]
	strb r1, [r0, #0x390]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E1CE4: .word ov00_02326DA0
_022E1CE8: .word ov00_022E2558
_022E1CEC: .word ov00_022E2590
_022E1CF0: .word ov00_022E3CBC
_022E1CF4: .word ov00_022E3C70
_022E1CF8: .word ov00_022E3CEC
_022E1CFC: .word 0xFFFFB172
_022E1D00: .word 0xFFFFB17B
	arm_func_end ov00_022E1A84

	arm_func_start ov00_022E1D04
ov00_022E1D04: ; 0x022E1D04
	stmdb sp!, {r4, r5, r6, lr}
	movs r4, r0
	mov r6, r2
	mov r5, r3
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	bl ov00_022E0378
	cmp r0, #0
	bne _022E1D3C
	ldr r0, _022E1E04 ; =ov00_02326DA0
	ldr r2, [r0]
	ldr r1, [r2, #0x24]
	cmp r1, #0
	beq _022E1D44
_022E1D3C:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022E1D44:
	str r6, [r2, #0x70]
	ldr r1, [r0]
	cmp r4, #0
	str r5, [r1, #0x74]
	ldrneh r1, [r4]
	cmpne r1, #0
	moveq r5, #0
	beq _022E1DB0
	ldr r1, [r0]
	mov r0, #0
	add r1, r1, #0x2e
	mov r2, #0x34
	bl ArrayFill16
	mov r0, r4
	bl ov00_022E1664
	cmp r0, #0x19
	movhi r5, #0x19
	bhi _022E1D98
	mov r0, r4
	bl ov00_022E1664
	mov r5, r0
_022E1D98:
	ldr r1, _022E1E04 ; =ov00_02326DA0
	mov r0, r4
	ldr r1, [r1]
	mov r2, r5, lsl #1
	add r1, r1, #0x2e
	bl ArrayCopy16
_022E1DB0:
	ldr r0, _022E1E04 ; =ov00_02326DA0
	mov r1, #0
	ldr r0, [r0]
	add r0, r0, r5, lsl #1
	strh r1, [r0, #0x2e]
	bl ov00_022E089C
	cmp r0, #4
	beq _022E1DE4
	ldr r1, _022E1E08 ; =0xFFFF1596
	mov r0, #2
	bl ov00_022E2C74
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
_022E1DE4:
	mov r0, #1
	bl ov00_022E2270
	ldr r0, _022E1E04 ; =ov00_02326DA0
	ldr r0, [r0]
	ldr r0, [r0, #0x68]
	bl ResolveAvailableNintendoWifi
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022E1E04: .word ov00_02326DA0
_022E1E08: .word 0xFFFF1596
	arm_func_end ov00_022E1D04

	arm_func_start ov00_022E1E0C
ov00_022E1E0C: ; 0x022E1E0C
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #0x10
	mov r6, r1
	mov r5, r2
	mov r4, r3
	bl ov00_022E0378
	cmp r0, #0
	bne _022E1E48
	ldr r0, _022E1EAC ; =ov00_02326DA0
	ldr r2, [r0]
	ldr r1, [r2, #0x24]
	cmp r1, #3
	blt _022E1E48
	cmp r1, #4
	bne _022E1E54
_022E1E48:
	add sp, sp, #0x10
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022E1E54:
	str r6, [r2, #0x78]
	ldr r1, [r0]
	mov r0, #4
	str r5, [r1, #0x7c]
	bl ov00_022E2270
	ldr r0, _022E1EAC ; =ov00_02326DA0
	ldr r1, [sp, #0x20]
	ldr r3, [r0]
	ldr r0, [sp, #0x24]
	str r4, [sp]
	str r1, [sp, #4]
	ldr r4, [sp, #0x28]
	str r0, [sp, #8]
	ldr r2, _022E1EB0 ; =ov00_022E2510
	add r0, r3, #0xe0
	add r1, r3, #0x1e0
	mov r3, #0
	str r4, [sp, #0xc]
	bl ov00_022E3B3C
	mov r0, #1
	add sp, sp, #0x10
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022E1EAC: .word ov00_02326DA0
_022E1EB0: .word ov00_022E2510
	arm_func_end ov00_022E1E0C

	arm_func_start ov00_022E1EB4
ov00_022E1EB4: ; 0x022E1EB4
	stmdb sp!, {r4, lr}
	ldr r1, _022E1F18 ; =ov00_02326DA0
	mov r4, r0
	ldr r0, [r1]
	cmp r0, #0
	beq _022E1EF0
	bl ov00_022E0378
	cmp r0, #0
	bne _022E1EF0
	ldr r0, _022E1F18 ; =ov00_02326DA0
	ldr r0, [r0]
	ldr r0, [r0, #0x24]
	cmp r0, #5
	cmpne r0, #6
	beq _022E1EF8
_022E1EF0:
	mvn r0, #0
	ldmia sp!, {r4, pc}
_022E1EF8:
	mov r0, r4
	bl ov00_022E20A4
	cmp r0, #0
	mvneq r0, #1
	ldmeqia sp!, {r4, pc}
	bl ov00_0230E384
	mov r0, #0
	ldmia sp!, {r4, pc}
	.align 2, 0
_022E1F18: .word ov00_02326DA0
	arm_func_end ov00_022E1EB4

	arm_func_start ov00_022E1F1C
ov00_022E1F1C: ; 0x022E1F1C
	ldr r0, _022E1F34 ; =ov00_02326DA0
	ldr r0, [r0]
	cmp r0, #0
	ldrneb r0, [r0, #0x2c]
	moveq r0, #0
	bx lr
	.align 2, 0
_022E1F34: .word ov00_02326DA0
	arm_func_end ov00_022E1F1C

	arm_func_start ov00_022E1F38
ov00_022E1F38: ; 0x022E1F38
	stmdb sp!, {r3, lr}
	ldr r2, _022E1F84 ; =ov00_02326DA0
	ldr r1, [r2]
	cmp r1, #0
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	add r1, r1, #0x248
	add r1, r1, #0x400
	str r1, [r0]
	ldr r2, [r2]
	ldrb r1, [r2, #0x38d]
	cmp r1, #2
	ldrneb r1, [r2, #0x38d]
	cmpne r1, #3
	bne _022E1F7C
	bl ov00_022E6C64
	ldmia sp!, {r3, pc}
_022E1F7C:
	bl ov00_022E6C30
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E1F84: .word ov00_02326DA0
	arm_func_end ov00_022E1F38

	arm_func_start ov00_022E1F88
ov00_022E1F88: ; 0x022E1F88
	stmdb sp!, {r3, lr}
	ldr r1, _022E1FBC ; =ov00_02326DA0
	ldr r1, [r1]
	cmp r1, #0
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	ldr r2, [r1, #0x668]
	mov r1, #1
	tst r2, r1, lsl r0
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	bl ov00_022E220C
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E1FBC: .word ov00_02326DA0
	arm_func_end ov00_022E1F88

	arm_func_start ov00_022E1FC0
ov00_022E1FC0: ; 0x022E1FC0
	ldr r0, _022E1FD8 ; =ov00_02326DA0
	ldr r0, [r0]
	cmp r0, #0
	ldrne r0, [r0, #0x24]
	moveq r0, #0
	bx lr
	.align 2, 0
_022E1FD8: .word ov00_02326DA0
	arm_func_end ov00_022E1FC0

	arm_func_start ov00_022E1FDC
ov00_022E1FDC: ; 0x022E1FDC
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #4
	ldr r0, _022E2094 ; =ov00_02326DA0
	ldr r0, [r0]
	ldr r0, [r0]
	cmp r0, #0
	addne sp, sp, #4
	movne r0, #0
	ldmneia sp!, {r3, r4, pc}
	mov r0, #0x4000
	bl ov00_022E1544
	add r0, r0, #0xc000
	mov r1, r0, lsl #0x10
	ldr r3, _022E2094 ; =ov00_02326DA0
	mov r0, #0
	mov r2, r0
	mov r1, r1, lsr #0x10
	ldr r4, [r3]
	bl ov00_02310BF4
	ldr r1, _022E2098 ; =ov00_022E2A68
	ldr r2, _022E2094 ; =ov00_02326DA0
	str r1, [sp]
	mov r1, r0
	ldr r0, [r2]
	ldr r2, [r4, #0x14]
	ldr r3, [r4, #0x18]
	bl ov00_0230E074
	mov r4, r0
	bl ov00_022E240C
	cmp r0, #0
	addne sp, sp, #4
	movne r0, r4
	ldmneia sp!, {r3, r4, pc}
	ldr r0, _022E2094 ; =ov00_02326DA0
	ldr r1, _022E209C ; =ov00_022E6000
	ldr r0, [r0]
	ldr r0, [r0]
	bl ov00_0230E0E0
	ldr r0, _022E2094 ; =ov00_02326DA0
	ldr r1, _022E20A0 ; =ov00_022E5F0C
	ldr r0, [r0]
	ldr r0, [r0]
	bl ov00_0230E450
	mov r0, r4
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
	.align 2, 0
_022E2094: .word ov00_02326DA0
_022E2098: .word ov00_022E2A68
_022E209C: .word ov00_022E6000
_022E20A0: .word ov00_022E5F0C
	arm_func_end ov00_022E1FDC

	arm_func_start ov00_022E20A4
ov00_022E20A4: ; 0x022E20A4
	stmdb sp!, {r4, r5, r6, lr}
	ldr r1, _022E2100 ; =ov00_02326DA0
	mov r6, r0
	ldr r0, [r1]
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	ldr r4, _022E2104 ; =ov00_02326DA8
	mov r5, #0
_022E20C8:
	ldr r0, [r4, r5, lsl #2]
	cmp r0, #0
	beq _022E20EC
	bl ov00_0230E460
	ldrb r0, [r0, #1]
	cmp r6, r0
	ldreq r0, _022E2104 ; =ov00_02326DA8
	ldreq r0, [r0, r5, lsl #2]
	ldmeqia sp!, {r4, r5, r6, pc}
_022E20EC:
	add r5, r5, #1
	cmp r5, #0x20
	blt _022E20C8
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022E2100: .word ov00_02326DA0
_022E2104: .word ov00_02326DA8
	arm_func_end ov00_022E20A4

	arm_func_start ov00_022E2108
ov00_022E2108: ; 0x022E2108
	stmdb sp!, {r3, lr}
	bl ov00_0230E460
	ldrb r0, [r0, #1]
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022E2108

	arm_func_start ov00_022E2118
ov00_022E2118: ; 0x022E2118
	stmdb sp!, {r3, lr}
	bl ov00_0230E460
	ldrb r0, [r0]
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022E2118

	arm_func_start ov00_022E2128
ov00_022E2128: ; 0x022E2128
	ldr r2, _022E2150 ; =ov00_02326DA8
	mov r0, #0
_022E2130:
	ldr r1, [r2, r0, lsl #2]
	cmp r1, #0
	bxeq lr
	add r0, r0, #1
	cmp r0, #0x20
	blt _022E2130
	mvn r0, #0
	bx lr
	.align 2, 0
_022E2150: .word ov00_02326DA8
	arm_func_end ov00_022E2128

	arm_func_start ov00_022E2154
ov00_022E2154: ; 0x022E2154
	stmdb sp!, {r3, lr}
	ldr r1, _022E217C ; =ov00_02326DA8
	mov r0, #0
	mov r2, #0x80
	bl ArrayFill32
	ldr r1, _022E2180 ; =ov00_02326E28
	mov r0, #0
	mov r2, #0x100
	bl ArrayFill32
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E217C: .word ov00_02326DA8
_022E2180: .word ov00_02326E28
	arm_func_end ov00_022E2154

	arm_func_start ov00_022E2184
ov00_022E2184: ; 0x022E2184
	ldr r1, _022E2190 ; =ov00_02326DA8
	add r0, r1, r0, lsl #2
	bx lr
	.align 2, 0
_022E2190: .word ov00_02326DA8
	arm_func_end ov00_022E2184

	arm_func_start ov00_022E2194
ov00_022E2194: ; 0x022E2194
	stmdb sp!, {r3, lr}
	cmp r1, #0
	mov r3, #0
	ble _022E21CC
	ldr r2, _022E21F8 ; =ov00_02326DA0
	ldr ip, [r2]
_022E21AC:
	add r2, ip, r3, lsl #2
	ldr r2, [r2, #0x46c]
	cmp r0, r2
	beq _022E21CC
	add r2, r3, #1
	and r3, r2, #0xff
	cmp r3, r1
	blt _022E21AC
_022E21CC:
	cmp r3, r1
	movge r0, #0
	ldmgeia sp!, {r3, pc}
	ldr r0, _022E21F8 ; =ov00_02326DA0
	ldr r0, [r0]
	add r0, r0, r3
	ldrb r0, [r0, #0x648]
	bl ov00_022E20A4
	bl ov00_022E2118
	bl ov00_022E2184
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E21F8: .word ov00_02326DA0
	arm_func_end ov00_022E2194

	arm_func_start ov00_022E21FC
ov00_022E21FC: ; 0x022E21FC
	ldr r1, _022E2208 ; =ov00_02326E28
	add r0, r1, r0, lsl #3
	bx lr
	.align 2, 0
_022E2208: .word ov00_02326E28
	arm_func_end ov00_022E21FC

	arm_func_start ov00_022E220C
ov00_022E220C: ; 0x022E220C
	stmdb sp!, {r4, r5, r6, lr}
	ldr r4, _022E2250 ; =ov00_02326DA8
	mov r6, r0
	mov r5, #0
_022E221C:
	ldr r0, [r4, r5, lsl #2]
	cmp r0, #0
	beq _022E223C
	bl ov00_0230E460
	ldrb r0, [r0, #1]
	cmp r6, r0
	moveq r0, #1
	ldmeqia sp!, {r4, r5, r6, pc}
_022E223C:
	add r5, r5, #1
	cmp r5, #0x20
	blt _022E221C
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022E2250: .word ov00_02326DA8
	arm_func_end ov00_022E220C

	arm_func_start ov00_022E2254
ov00_022E2254: ; 0x022E2254
	ldr r0, _022E2268 ; =ov00_02326DA0
	mov r1, #0
	ldr r0, [r0]
	strb r1, [r0, #0x2c]
	bx lr
	.align 2, 0
_022E2268: .word ov00_02326DA0
	arm_func_end ov00_022E2254

	arm_func_start ov00_022E226C
ov00_022E226C: ; 0x022E226C
	bx lr
	arm_func_end ov00_022E226C

	arm_func_start ov00_022E2270
ov00_022E2270: ; 0x022E2270
	ldr r1, _022E228C ; =ov00_02326DA0
	ldr r3, [r1]
	ldr r2, [r3, #0x24]
	str r2, [r3, #0x28]
	ldr r1, [r1]
	str r0, [r1, #0x24]
	bx lr
	.align 2, 0
_022E228C: .word ov00_02326DA0
	arm_func_end ov00_022E2270

	arm_func_start ov00_022E2290
ov00_022E2290: ; 0x022E2290
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #4
	mov r4, r0
	add r0, sp, #0
	bl ov00_022E6C30
	mov r1, r0
	cmp r1, #0
	mov r0, #0
	ble _022E22D4
	ldr r3, [sp]
_022E22B8:
	ldrb r2, [r3]
	cmp r4, r2
	beq _022E22D4
	add r0, r0, #1
	cmp r0, r1
	add r3, r3, #1
	blt _022E22B8
_022E22D4:
	cmp r0, r1
	addeq sp, sp, #4
	moveq r0, #0
	ldmeqia sp!, {r3, r4, pc}
	bl ov00_022E6A24
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
	arm_func_end ov00_022E2290

	arm_func_start ov00_022E22F0
ov00_022E22F0: ; 0x022E22F0
	stmdb sp!, {r4, r5, r6, lr}
	movs r6, r0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	cmp r6, #4
	addls pc, pc, r6, lsl #2
	b _022E234C
_022E230C: ; jump table
	b _022E234C ; case 0
	b _022E2320 ; case 1
	b _022E232C ; case 2
	b _022E2338 ; case 3
	b _022E2344 ; case 4
_022E2320:
	mov r5, #9
	sub r4, r5, #0xa
	b _022E234C
_022E232C:
	mov r5, #9
	sub r4, r5, #0xb
	b _022E234C
_022E2338:
	mov r5, #6
	sub r4, r5, #0x10
	b _022E234C
_022E2344:
	mov r5, #6
	sub r4, r5, #0x1a
_022E234C:
	ldr r0, _022E23F8 ; =ov00_02326DA0
	ldr r1, [r0]
	ldr r0, [r1, #0x24]
	cmp r0, #5
	addls pc, pc, r0, lsl #2
	b _022E23DC
_022E2364: ; jump table
	b _022E23DC ; case 0
	b _022E237C ; case 1
	b _022E2394 ; case 2
	b _022E23DC ; case 3
	b _022E23D0 ; case 4
	b _022E23B8 ; case 5
_022E237C:
	ldr r1, _022E23FC ; =0xFFFF11B8
	mov r0, r5
	add r4, r4, r1
	mov r1, r4
	bl ov00_022E2C74
	b _022E23E4
_022E2394:
	ldr r1, [r1, #0x9c]
	ldr r0, _022E23FC ; =0xFFFF11B8
	cmp r1, #1
	add r4, r4, r0
	bge _022E23E4
	mov r0, r5
	mov r1, r4
	bl ov00_022E2C74
	b _022E23E4
_022E23B8:
	ldr r1, _022E2400 ; =0xFFFEC398
	mov r0, r5
	add r4, r4, r1
	mov r1, r4
	bl ov00_022E6570
	b _022E23E4
_022E23D0:
	ldr r0, _022E2404 ; =0xFFFEEAA8
	add r4, r4, r0
	b _022E23E4
_022E23DC:
	ldr r0, _022E2408 ; =0xFFFE9C88
	add r4, r4, r0
_022E23E4:
	mov r0, r5
	mov r1, r4
	bl ov00_022E3BE8
	mov r0, r6
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022E23F8: .word ov00_02326DA0
_022E23FC: .word 0xFFFF11B8
_022E2400: .word 0xFFFEC398
_022E2404: .word 0xFFFEEAA8
_022E2408: .word 0xFFFE9C88
	arm_func_end ov00_022E22F0

	arm_func_start ov00_022E240C
ov00_022E240C: ; 0x022E240C
	stmdb sp!, {r4, lr}
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	cmp r4, #7
	addls pc, pc, r4, lsl #2
	b _022E2490
_022E2428: ; jump table
	b _022E2490 ; case 0
	b _022E2448 ; case 1
	b _022E2454 ; case 2
	b _022E2464 ; case 3
	b _022E2470 ; case 4
	b _022E2454 ; case 5
	b _022E247C ; case 6
	b _022E2488 ; case 7
_022E2448:
	mov r0, #9
	sub r2, r0, #0xa
	b _022E2490
_022E2454:
	mov r0, #0
	mov r2, r0
	mov r4, r0
	b _022E2490
_022E2464:
	mov r0, #6
	sub r2, r0, #0x10
	b _022E2490
_022E2470:
	mov r0, #6
	sub r2, r0, #0x24
	b _022E2490
_022E247C:
	mov r0, #6
	sub r2, r0, #0x4c
	b _022E2490
_022E2488:
	mov r0, #6
	sub r2, r0, #0x56
_022E2490:
	cmp r0, #0
	beq _022E24A4
	ldr r1, _022E24AC ; =0xFFFEFA48
	add r1, r2, r1
	bl ov00_022E2C74
_022E24A4:
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022E24AC: .word 0xFFFEFA48
	arm_func_end ov00_022E240C

	arm_func_start ov00_022E24B0
ov00_022E24B0: ; 0x022E24B0
	stmdb sp!, {r3, r4, r5, lr}
	movs r5, r0
	mov r4, r1
	bne _022E24DC
	ldr r1, _022E250C ; =ov00_02326DA0
	mov r0, #3
	ldr r1, [r1]
	str r4, [r1, #0x64]
	bl ov00_022E2270
	bl ov00_022E3E1C
	b _022E24E4
_022E24DC:
	mov r0, #0
	bl ov00_022E2270
_022E24E4:
	ldr r0, _022E250C ; =ov00_02326DA0
	ldr r0, [r0]
	ldr r3, [r0, #0x70]
	cmp r3, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r2, [r0, #0x74]
	mov r0, r5
	mov r1, r4
	blx r3
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022E250C: .word ov00_02326DA0
	arm_func_end ov00_022E24B0

	arm_func_start ov00_022E2510
ov00_022E2510: ; 0x022E2510
	stmdb sp!, {r3, r4, r5, lr}
	ldr r2, _022E2554 ; =ov00_02326DA0
	mov r5, r0
	ldr r0, [r2]
	mov r4, r1
	ldr r0, [r0, #0x28]
	cmp r0, #4
	beq _022E2534
	bl ov00_022E2270
_022E2534:
	ldr r1, _022E2554 ; =ov00_02326DA0
	mov r0, r5
	ldr r3, [r1]
	mov r1, r4
	ldr r2, [r3, #0x7c]
	ldr r3, [r3, #0x78]
	blx r3
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022E2554: .word ov00_02326DA0
	arm_func_end ov00_022E2510

	arm_func_start ov00_022E2558
ov00_022E2558: ; 0x022E2558
	stmdb sp!, {r3, lr}
	ldr r1, [r1, #4]
	ldr r0, _022E2588 ; =0x00000603
	cmp r1, r0
	ldrne r0, _022E258C ; =0x00000901
	cmpne r1, r0
	addne r0, r0, #0x200
	cmpne r1, r0
	ldmeqia sp!, {r3, pc}
	mov r0, #3
	bl ov00_022E22F0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E2588: .word 0x00000603
_022E258C: .word 0x00000901
	arm_func_end ov00_022E2558

	arm_func_start ov00_022E2590
ov00_022E2590: ; 0x022E2590
	stmdb sp!, {r4, r5, r6, r7, lr}
	sub sp, sp, #0xc
	add r3, sp, #0
	mov r2, #0
	mov r6, r0
	mov r5, r1
	strb r2, [r3]
	strb r2, [r3, #1]
	strb r2, [r3, #2]
	strb r2, [r3, #3]
	strb r2, [r3, #4]
	strb r2, [r3, #5]
	strb r2, [r3, #6]
	strb r2, [r3, #7]
	strb r2, [r3, #8]
	strb r2, [r3, #9]
	strb r2, [r3, #0xa]
	strb r2, [r3, #0xb]
	ldr r0, _022E26DC ; =ov00_0231A194
	ldr r4, [r5, #8]
	bl strlen
	mov r2, r0
	ldr r1, _022E26DC ; =ov00_0231A194
	mov r0, r4
	bl memcmp
	cmp r0, #0
	addne sp, sp, #0xc
	ldmneia sp!, {r4, r5, r6, r7, pc}
	ldr r0, _022E26DC ; =ov00_0231A194
	bl strlen
	add r4, r4, r0
	mov r0, r4
	mov r1, #0x76
	bl strchr
	sub r7, r0, r4
	add r0, sp, #0
	mov r1, r4
	mov r2, r7
	bl strncpy
	cmp r7, #0xa
	addhi sp, sp, #0xc
	ldmhiia sp!, {r4, r5, r6, r7, pc}
	add r0, sp, #0
	mov r1, #0
	mov r2, #0xa
	bl sub_0208B200
	cmp r0, #3
	addne sp, sp, #0xc
	ldmneia sp!, {r4, r5, r6, r7, pc}
	ldr r0, _022E26E0 ; =ov00_0231A19C
	add r1, r7, #1
	add r4, r4, r1
	bl strlen
	mov r2, r0
	ldr r1, _022E26E0 ; =ov00_0231A19C
	mov r0, r4
	bl memcmp
	cmp r0, #0
	addne sp, sp, #0xc
	ldmneia sp!, {r4, r5, r6, r7, pc}
	ldr r0, _022E26E4 ; =ov00_02326DA0
	ldr r1, [r0]
	ldr r0, [r1, #0x24]
	cmp r0, #5
	beq _022E26B8
	cmp r0, #6
	addne sp, sp, #0xc
	ldmneia sp!, {r4, r5, r6, r7, pc}
	ldrb r0, [r1, #0x38d]
	cmp r0, #2
	ldrneb r0, [r1, #0x38d]
	cmpne r0, #3
	addne sp, sp, #0xc
	ldmneia sp!, {r4, r5, r6, r7, pc}
_022E26B8:
	ldr r0, _022E26E0 ; =ov00_0231A19C
	bl strlen
	mov r2, r0
	ldr r1, [r5]
	mov r0, r6
	add r2, r4, r2
	bl ov00_022E64CC
	add sp, sp, #0xc
	ldmia sp!, {r4, r5, r6, r7, pc}
	.align 2, 0
_022E26DC: .word ov00_0231A194
_022E26E0: .word ov00_0231A19C
_022E26E4: .word ov00_02326DA0
	arm_func_end ov00_022E2590

	arm_func_start ov00_022E26E8
ov00_022E26E8: ; 0x022E26E8
	ldr ip, _022E26F0 ; =ov00_022EC6DC
	bx ip
	.align 2, 0
_022E26F0: .word ov00_022EC6DC
	arm_func_end ov00_022E26E8

	arm_func_start ov00_022E26F4
ov00_022E26F4: ; 0x022E26F4
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #8
	mov r5, #0
	mov fp, r0
	mov sb, r1
	mov sl, r5
	bl ov00_022E6E50
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp sb, #4
	addls pc, pc, sb, lsl #2
	b _022E2758
_022E2728: ; jump table
	b _022E273C ; case 0
	b _022E273C ; case 1
	b _022E2744 ; case 2
	b _022E2744 ; case 3
	b _022E2750 ; case 4
_022E273C:
	mov r8, r5
	b _022E2758
_022E2744:
	mov r8, #6
	ldr r6, _022E2A44 ; =0xFFFFE250
	b _022E2758
_022E2750:
	ldr r6, _022E2A48 ; =0xFFFFE24F
	mov r8, #9
_022E2758:
	cmp r8, #0
	bne _022E2814
	mov r0, fp
	bl ov00_0230E460
	movs r5, r0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, _022E2A4C ; =ov00_02326DA0
	ldrb r4, [r5, #1]
	ldr r0, [r0]
	mov r7, #1
	ldr r0, [r0, #0x668]
	tst r0, r7, lsl r4
	mov r0, r4
	moveq r7, #0
	bl ov00_022EC8F0
	ldr r0, _022E2A4C ; =ov00_02326DA0
	ldr r1, [r0]
	ldrb r0, [r1, #0x38d]
	cmp r0, #2
	cmpeq sb, #0
	beq _022E27C0
	ldrb r0, [r1, #0x38d]
	cmp r0, #3
	cmpeq r4, #0
	bne _022E27C4
_022E27C0:
	mov sl, #1
_022E27C4:
	mov r0, r4
	bl ov00_022E2290
	ldr r1, _022E2A4C ; =ov00_02326DA0
	ldrb r5, [r5]
	ldr r3, _022E2A50 ; =ov00_02326DA8
	mov fp, #0
	str fp, [r3, r5, lsl #2]
	ldr r2, [r1]
	mov r5, r0
	ldrb r1, [r2, #0x385]
	cmp r1, #0
	subne r0, r1, #1
	strneb r0, [r2, #0x385]
	ldr r0, _022E2A4C ; =ov00_02326DA0
	ldr r1, [r0]
	ldrb r0, [r1, #0x38c]
	cmp r0, #0
	ldrneb r0, [r1, #0x38c]
	subne r0, r0, #1
	strneb r0, [r1, #0x38c]
_022E2814:
	ldr r0, _022E2A4C ; =ov00_02326DA0
	ldr r1, [r0]
	ldrb r0, [r1, #0x2d]
	cmp r0, #0
	ldreq r0, [r1, #0x24]
	cmpeq r0, #6
	cmpeq r7, #0
	bne _022E285C
	ldrb r0, [r1, #0x38d]
	cmp r0, #2
	cmpeq r8, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	bl ov00_022E6D08
	mov r0, r5
	bl ov00_022E699C
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022E285C:
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022E6820
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp r8, #0
	beq _022E2898
	ldr r1, _022E2A54 ; =0xFFFEC780
	mov r0, r8
	add r1, r6, r1
	bl ov00_022E0394
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022E2898:
	ldr r0, _022E2A4C ; =ov00_02326DA0
	ldr r1, [r0]
	ldrb r0, [r1, #0x2d]
	cmp r0, #0
	bne _022E2908
	ldrb r0, [r1, #0x38d]
	cmp r0, #2
	ldrneb r0, [r1, #0x38d]
	cmpne r0, #3
	bne _022E2908
	ldr r2, _022E2A4C ; =ov00_02326DA0
	ldr r1, [r2]
	ldrb r0, [r1, #0x385]
	add r6, r0, #2
	add r3, r1, r6, lsl #2
	ldr r3, [r3, #0x46c]
	cmp r3, #0
	beq _022E2908
	add r3, r1, r6
	ldrb r3, [r3, #0x648]
	add r0, r0, #1
	add r0, r1, r0
	strb r3, [r0, #0x648]
	ldr r0, [r2]
	ldrb r1, [r0, #0x385]
	add r0, r1, #1
	add r1, r1, #3
	bl ov00_022E6A24
_022E2908:
	ldr r0, _022E2A4C ; =ov00_02326DA0
	ldr r1, [r0]
	ldrb r0, [r1, #0x38d]
	cmp r0, #2
	bne _022E2950
	ldrb r0, [r1, #0x2d]
	cmp r0, #0
	bne _022E2930
	bl ov00_022E6D08
	b _022E296C
_022E2930:
	ldrb r0, [r1, #0x385]
	cmp r0, #0
	bne _022E296C
	ldr r1, _022E2A58 ; =ov00_0231A190
	mov r0, #1
	mov r2, #0
	bl ov00_022E3E54
	b _022E296C
_022E2950:
	ldrb r0, [r1, #0x385]
	cmp r0, #0
	bne _022E296C
	ldr r1, _022E2A58 ; =ov00_0231A190
	mov r0, #1
	mov r2, #0
	bl ov00_022E3E54
_022E296C:
	ldr r0, _022E2A4C ; =ov00_02326DA0
	ldr r1, [r0]
	ldrb r0, [r1, #0x38d]
	cmp r0, #0
	ldrneb r0, [r1, #0x38d]
	cmpne r0, #1
	bne _022E29A4
	ldr r0, _022E2A4C ; =ov00_02326DA0
	ldr r2, [r0]
	ldrb r1, [r2, #0x38c]
	strb r1, [r2, #0x38e]
	ldr r0, [r0]
	ldr r0, [r0, #0x388]
	bl ov00_02312BF4
_022E29A4:
	ldr r0, _022E2A4C ; =ov00_02326DA0
	ldr r6, [r0]
	ldr r0, [r6, #0x90]
	cmp r0, #0
	cmpne r7, #0
	beq _022E29FC
	cmp sb, #0
	moveq r7, #1
	mov r0, r5
	movne r7, #0
	bl ov00_022E3DB8
	str r0, [sp]
	ldr r1, [r6, #0x94]
	ldr r0, _022E2A4C ; =ov00_02326DA0
	str r1, [sp, #4]
	ldr r1, [r0]
	mov r0, r8
	ldr r5, [r1, #0x90]
	mov r1, r7
	mov r2, sl
	mov r3, r4
	blx r5
_022E29FC:
	ldr r0, _022E2A4C ; =ov00_02326DA0
	ldr r1, [r0]
	ldrb r0, [r1, #0x2d]
	cmp r0, #0
	ldreqb r0, [r1, #0x38d]
	cmpeq r0, #2
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldrb r0, [r1, #0x385]
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	bl ov00_022E5080
	bl ov00_022E662C
	mov r0, #3
	bl ov00_022E2270
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022E2A44: .word 0xFFFFE250
_022E2A48: .word 0xFFFFE24F
_022E2A4C: .word ov00_02326DA0
_022E2A50: .word ov00_02326DA8
_022E2A54: .word 0xFFFEC780
_022E2A58: .word ov00_0231A190
	arm_func_end ov00_022E26F4

	arm_func_start ov00_022E2A5C
ov00_022E2A5C: ; 0x022E2A5C
	ldr ip, _022E2A64 ; =ov00_022EC718
	bx ip
	.align 2, 0
_022E2A64: .word ov00_022EC718
	arm_func_end ov00_022E2A5C

	arm_func_start ov00_022E2A68
ov00_022E2A68: ; 0x022E2A68
	stmdb sp!, {r3, lr}
	bl ov00_0230E448
	bl ov00_022F5194
	ldr r2, _022E2A9C ; =ov00_02326DA0
	ldr r1, _022E2AA0 ; =0xFFFE8515
	str r0, [r2, #4]
	mov r0, #9
	bl ov00_022E0394
	ldr r0, _022E2A9C ; =ov00_02326DA0
	mov r1, #0
	ldr r0, [r0]
	str r1, [r0]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E2A9C: .word ov00_02326DA0
_022E2AA0: .word 0xFFFE8515
	arm_func_end ov00_022E2A68

	arm_func_start ov00_022E2AA4
ov00_022E2AA4: ; 0x022E2AA4
	stmdb sp!, {r4, r5, r6, lr}
	ldr ip, _022E2B24 ; =ov00_02326F28
	mov r6, r1
	mov r5, r2
	mov r1, #0
	mov r2, #0x280
	mov r4, r3
	str r0, [ip, #4]
	bl MemsetFast
	ldr r0, _022E2B24 ; =ov00_02326F28
	mov r2, #0
	ldr r1, [r0, #4]
	ldr ip, [sp, #0x10]
	str r5, [r1]
	ldr r1, [r0, #4]
	ldr r5, [sp, #0x14]
	str r2, [r1, #4]
	ldr r1, [r0, #4]
	ldr r3, [sp, #0x18]
	str r4, [r1, #8]
	ldr r1, [r0, #4]
	ldr r2, [sp, #0x1c]
	str ip, [r1, #0xc]
	ldr r1, [r0, #4]
	str r5, [r1, #0x10]
	ldr r1, [r0, #4]
	str r3, [r1, #0x14]
	ldr r1, [r0, #4]
	str r2, [r1, #0x18]
	ldr r0, [r0, #4]
	str r6, [r0, #0x1c]
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022E2B24: .word ov00_02326F28
	arm_func_end ov00_022E2AA4

	arm_func_start ov00_022E2B28
ov00_022E2B28: ; 0x022E2B28
	stmdb sp!, {r3, lr}
	ldr r0, _022E2B58 ; =ov00_022E2EF4
	mov r1, #0
	bl ov00_022E2FA8
	ldr r0, _022E2B5C ; =ov00_02326F28
	mov r3, #1
	ldr r2, [r0, #4]
	mov r1, #0
	str r3, [r2, #4]
	ldr r0, [r0, #4]
	str r1, [r0, #0x30]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E2B58: .word ov00_022E2EF4
_022E2B5C: .word ov00_02326F28
	arm_func_end ov00_022E2B28

	arm_func_start ov00_022E2B60
ov00_022E2B60: ; 0x022E2B60
	stmdb sp!, {r3, lr}
	ldr r0, _022E2C48 ; =ov00_02326F28
	ldr r0, [r0, #4]
	cmp r0, #0
	ldmeqia sp!, {r3, pc}
	bl ov00_022E0378
	cmp r0, #0
	ldmneia sp!, {r3, pc}
	ldr r0, _022E2C48 ; =ov00_02326F28
	ldr r1, [r0, #4]
	ldr r0, [r1, #4]
	cmp r0, #5
	addls pc, pc, r0, lsl #2
	ldmia sp!, {r3, pc}
_022E2B98: ; jump table
	ldmia sp!, {r3, pc} ; case 0
	b _022E2BB0 ; case 1
	b _022E2BB8 ; case 2
	b _022E2BB8 ; case 3
	b _022E2BB8 ; case 4
	ldmia sp!, {r3, pc} ; case 5
_022E2BB0:
	bl ov00_022E3174
	ldmia sp!, {r3, pc}
_022E2BB8:
	ldr r0, [r1]
	cmp r0, #0
	ldrne r1, [r0]
	cmpne r1, #0
	beq _022E2BD0
	bl ov00_022FEF74
_022E2BD0:
	ldr r0, _022E2C48 ; =ov00_02326F28
	ldr r0, [r0, #4]
	ldr r0, [r0, #0x30]
	cmp r0, #0
	ldmeqia sp!, {r3, pc}
	bl sub_0207AE44
	ldr r3, _022E2C48 ; =ov00_02326F28
	ldr r2, _022E2C4C ; =0x000082EA
	ldr ip, [r3, #4]
	mov r3, #0
	ldr lr, [ip, #0x34]
	ldr ip, [ip, #0x38]
	subs lr, r0, lr
	sbc r0, r1, ip
	mov r1, r0, lsl #6
	orr r1, r1, lr, lsr #26
	mov r0, lr, lsl #6
	bl _ll_udiv
	ldr r2, _022E2C50 ; =0x0000EA60
	cmp r1, #0
	cmpeq r0, r2
	ldmlsia sp!, {r3, pc}
	ldr r1, _022E2C54 ; =0xFFFF1172
	mov r0, #6
	bl ov00_022E2C74
	ldr r0, _022E2C48 ; =ov00_02326F28
	mov r1, #0
	ldr r0, [r0, #4]
	str r1, [r0, #0x30]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E2C48: .word ov00_02326F28
_022E2C4C: .word 0x000082EA
_022E2C50: .word 0x0000EA60
_022E2C54: .word 0xFFFF1172
	arm_func_end ov00_022E2B60

	arm_func_start ov00_022E2C58
ov00_022E2C58: ; 0x022E2C58
	ldr r0, _022E2C70 ; =ov00_02326F28
	ldr r0, [r0, #4]
	cmp r0, #0
	ldrne r0, [r0, #0x1c]
	moveq r0, #0
	bx lr
	.align 2, 0
_022E2C70: .word ov00_02326F28
	arm_func_end ov00_022E2C58

	arm_func_start ov00_022E2C74
ov00_022E2C74: ; 0x022E2C74
	stmdb sp!, {r4, lr}
	ldr r2, _022E2CC0 ; =ov00_02326F28
	mov r4, r0
	ldr r2, [r2, #4]
	cmp r2, #0
	cmpne r4, #0
	ldmeqia sp!, {r4, pc}
	bl ov00_022E0394
	ldr r0, _022E2CC0 ; =ov00_02326F28
	ldr r0, [r0, #4]
	ldr r3, [r0, #0x14]
	cmp r3, #0
	beq _022E2CB8
	ldr r2, [r0, #0x18]
	mov r0, r4
	mov r1, #0
	blx r3
_022E2CB8:
	bl ov00_022E2D20
	ldmia sp!, {r4, pc}
	.align 2, 0
_022E2CC0: .word ov00_02326F28
	arm_func_end ov00_022E2C74

	arm_func_start ov00_022E2CC4
ov00_022E2CC4: ; 0x022E2CC4
	stmdb sp!, {r3, lr}
	ldr r0, _022E2D1C ; =ov00_02326F28
	ldr r0, [r0, #4]
	ldr r0, [r0, #0x24]
	cmp r0, #0
	beq _022E2D0C
	bl ov00_022DBE7C
	bl ov00_022DBF08
	ldr r1, _022E2D1C ; =ov00_02326F28
	mov r0, #0
	ldr r1, [r1, #4]
	mov r2, r0
	ldr r1, [r1, #0x24]
	bl ov00_022E0434
	ldr r0, _022E2D1C ; =ov00_02326F28
	mov r1, #0
	ldr r0, [r0, #4]
	str r1, [r0, #0x24]
_022E2D0C:
	ldr r0, _022E2D1C ; =ov00_02326F28
	mov r1, #0
	str r1, [r0, #4]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E2D1C: .word ov00_02326F28
	arm_func_end ov00_022E2CC4

	arm_func_start ov00_022E2D20
ov00_022E2D20: ; 0x022E2D20
	ldr r0, _022E2D44 ; =ov00_02326F28
	ldr r2, [r0, #4]
	cmp r2, #0
	bxeq lr
	mov r1, #0
	str r1, [r2, #4]
	ldr r0, [r0, #4]
	str r1, [r0, #0x30]
	bx lr
	.align 2, 0
_022E2D44: .word ov00_02326F28
	arm_func_end ov00_022E2D20

	arm_func_start ov00_022E2D48
ov00_022E2D48: ; 0x022E2D48
	stmdb sp!, {r4, lr}
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	cmp r4, #4
	addls pc, pc, r4, lsl #2
	b _022E2DA4
_022E2D64: ; jump table
	b _022E2DA4 ; case 0
	b _022E2D78 ; case 1
	b _022E2D84 ; case 2
	b _022E2D90 ; case 3
	b _022E2D9C ; case 4
_022E2D78:
	mov r0, #9
	sub r2, r0, #0xa
	b _022E2DA4
_022E2D84:
	mov r0, #9
	sub r2, r0, #0xb
	b _022E2DA4
_022E2D90:
	mov r0, #6
	sub r2, r0, #0x10
	b _022E2DA4
_022E2D9C:
	mov r0, #6
	sub r2, r0, #0x1a
_022E2DA4:
	ldr r1, _022E2DB8 ; =0xFFFF11B8
	add r1, r2, r1
	bl ov00_022E2C74
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022E2DB8: .word 0xFFFF11B8
	arm_func_end ov00_022E2D48

	arm_func_start ov00_022E2DBC
ov00_022E2DBC: ; 0x022E2DBC
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #8
	ldr r2, _022E2EE4 ; =ov00_02326F28
	mov lr, #0
	ldr r3, [r2, #4]
	mov r4, r1
	str lr, [r3, #0x30]
	mov r7, r0
	ldr r0, [r4]
	cmp r0, #0
	bne _022E2ED8
	ldr ip, [r2, #4]
	mov r6, r4
	add r5, ip, #0x260
	ldmia r6!, {r0, r1, r2, r3}
	stmia r5!, {r0, r1, r2, r3}
	ldmia r6, {r0, r1, r2, r3}
	stmia r5, {r0, r1, r2, r3}
	ldr r0, [ip, #4]
	cmp r0, #2
	bne _022E2EA0
	ldr r1, [ip, #0x1c]
	ldr r0, [r4, #4]
	ldr r1, [r1, #0x1c]
	cmp r1, r0
	bne _022E2E8C
	ldr r1, _022E2EE8 ; =ov00_0231A1A0
	mov r3, #5
	mov r2, lr
	mov r0, #1
	str r3, [ip, #4]
	bl ov00_022E3E54
	bl ov00_022E2D48
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r0, _022E2EE4 ; =ov00_02326F28
	ldr r1, [r4, #4]
	ldr r3, [r0, #4]
	mov r0, #0
	ldr r2, [r3, #0x18]
	ldr r3, [r3, #0x14]
	blx r3
	bl ov00_022E1FDC
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r0, [r4, #4]
	bl ov00_022E5224
	add sp, sp, #8
	cmp r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E2E8C:
	ldr r1, _022E2EEC ; =0xFFFF15A0
	mov r0, #6
	bl ov00_022E2C74
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E2EA0:
	cmp r0, #3
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, _022E2EF0 ; =ov00_022E337C
	mov r0, r7
	stmia sp, {r1, lr}
	ldr r1, [r4, #4]
	mov r2, lr
	mov r3, lr
	bl ov00_022FF1F8
	bl ov00_022E2D48
	add sp, sp, #8
	cmp r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E2ED8:
	bl ov00_022E2D48
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022E2EE4: .word ov00_02326F28
_022E2EE8: .word ov00_0231A1A0
_022E2EEC: .word 0xFFFF15A0
_022E2EF0: .word ov00_022E337C
	arm_func_end ov00_022E2DBC

	arm_func_start ov00_022E2EF4
ov00_022E2EF4: ; 0x022E2EF4
	ldr ip, _022E2F04 ; =ov00_022E2F0C
	ldr r2, _022E2F08 ; =ov00_022E2DBC
	mov r3, #2
	bx ip
	.align 2, 0
_022E2F04: .word ov00_022E2F0C
_022E2F08: .word ov00_022E2DBC
	arm_func_end ov00_022E2EF4

	arm_func_start ov00_022E2F0C
ov00_022E2F0C: ; 0x022E2F0C
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #0xc
	ldr r4, _022E2FA4 ; =ov00_02326F28
	mov r6, r1
	ldr r4, [r4, #4]
	mov r1, r0
	add r0, r4, #0x48
	mov r5, r2
	mov r4, r3
	bl strcpy
	ldr r0, _022E2FA4 ; =ov00_02326F28
	mov r1, r6
	ldr r0, [r0, #4]
	add r0, r0, #0x148
	bl strcpy
	ldr r0, _022E2FA4 ; =ov00_02326F28
	ldr r6, [r0, #4]
	bl sub_0207AE44
	str r0, [r6, #0x34]
	str r1, [r6, #0x38]
	mov r3, #1
	ldr r0, _022E2FA4 ; =ov00_02326F28
	str r3, [r6, #0x30]
	ldr r2, [r0, #4]
	mov r1, #0
	stmia sp, {r1, r5}
	str r1, [sp, #8]
	ldr r0, [r2]
	add r1, r2, #0x48
	add r2, r2, #0x148
	bl ov00_022FEFF8
	bl ov00_022E2D48
	cmp r0, #0
	ldreq r0, _022E2FA4 ; =ov00_02326F28
	ldreq r0, [r0, #4]
	streq r4, [r0, #4]
	add sp, sp, #0xc
	ldmia sp!, {r3, r4, r5, r6, pc}
	.align 2, 0
_022E2FA4: .word ov00_02326F28
	arm_func_end ov00_022E2F0C

	arm_func_start ov00_022E2FA8
ov00_022E2FA8: ; 0x022E2FA8
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0x48
	mov r5, r0
	mov r4, r1
	add r0, sp, #0
	mov r1, #0
	mov r2, #0x48
	bl MemsetFast
	ldr r0, _022E3158 ; =ov00_02326F28
	str r5, [r0, #8]
	str r4, [r0]
	ldr r0, [r0, #4]
	ldr r0, [r0, #0x1c]
	bl ov00_022DB77C
	cmp r0, #0
	beq _022E3008
	ldr r0, _022E3158 ; =ov00_02326F28
	ldr r1, [r0, #4]
	ldr r0, [r1, #0x1c]
	add r2, r1, #0x248
	ldr r1, [r0, #0x24]
	add r0, r0, #0x10
	bl ov00_022DB528
	b _022E30BC
_022E3008:
	ldr r0, _022E3158 ; =ov00_02326F28
	ldr r0, [r0, #4]
	add r0, r0, #0x3c
	bl ov00_022DB764
	cmp r0, #0
	bne _022E3070
	ldr r0, _022E3158 ; =ov00_02326F28
	ldr r0, [r0, #4]
	ldr r0, [r0, #0x1c]
	add r0, r0, #4
	bl ov00_022DB6F8
	cmp r0, #0
	beq _022E305C
	ldr r0, _022E3158 ; =ov00_02326F28
	ldr r1, [r0, #4]
	ldr r0, [r1, #0x1c]
	add r3, r1, #0x3c
	add r0, r0, #4
	ldmia r0, {r0, r1, r2}
	stmia r3, {r0, r1, r2}
	b _022E30A4
_022E305C:
	ldr r0, _022E3158 ; =ov00_02326F28
	ldr r0, [r0, #4]
	add r0, r0, #0x3c
	bl ov00_022DB634
	b _022E30A4
_022E3070:
	bl sub_0207AE44
	ldr r2, _022E315C ; =0x6C078965
	ldr r3, _022E3160 ; =0x5D588B65
	umull ip, r4, r0, r2
	mla r4, r0, r3, r4
	ldr r3, _022E3158 ; =ov00_02326F28
	ldr r0, _022E3164 ; =0x00269EC3
	mla r4, r1, r2, r4
	adds r0, ip, r0
	ldr r3, [r3, #4]
	adc r1, r4, #0
	add r0, r3, #0x3c
	bl ov00_022DB178
_022E30A4:
	ldr r0, _022E3158 ; =ov00_02326F28
	ldr r2, [r0, #4]
	ldr r1, [r2, #0xc]
	add r0, r2, #0x3c
	add r2, r2, #0x248
	bl ov00_022DB528
_022E30BC:
	ldr r0, _022E3158 ; =ov00_02326F28
	ldr r0, [r0, #4]
	ldr r0, [r0, #0x10]
	bl ov00_022E1664
	ldr r1, _022E3158 ; =ov00_02326F28
	mov r2, r0, lsl #1
	ldr r1, [r1, #4]
	add r2, r2, #2
	ldr r0, [r1, #0x10]
	add r1, sp, #0
	bl MemcpyFast
	ldr r1, _022E3158 ; =ov00_02326F28
	add r0, sp, #0x34
	ldr r1, [r1, #4]
	add r1, r1, #0x51
	add r1, r1, #0x200
	bl strcpy
	ldr r4, _022E3168 ; =ov00_022E03F0
	ldr r3, _022E316C ; =ov00_022E0434
	ldr r1, _022E3170 ; =0x00001C14
	mov r0, #0
	mov r2, #4
	str r4, [sp, #0x40]
	str r3, [sp, #0x44]
	bl ov00_022E0400
	ldr r1, _022E3158 ; =ov00_02326F28
	mov r4, r0
	ldr r0, [r1, #4]
	str r4, [r0, #0x24]
	bl sub_0207AE44
	ldr r2, _022E3158 ; =ov00_02326F28
	ldr r2, [r2, #4]
	str r0, [r2, #0x28]
	str r1, [r2, #0x2c]
	mov r1, r4
	add r0, sp, #0
	bl ov00_022DBCA4
	add sp, sp, #0x48
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022E3158: .word ov00_02326F28
_022E315C: .word 0x6C078965
_022E3160: .word 0x5D588B65
_022E3164: .word 0x00269EC3
_022E3168: .word ov00_022E03F0
_022E316C: .word ov00_022E0434
_022E3170: .word 0x00001C14
	arm_func_end ov00_022E2FA8

	arm_func_start ov00_022E3174
ov00_022E3174: ; 0x022E3174
	stmdb sp!, {r3, lr}
	sub sp, sp, #0x3d0
	bl ov00_022DBF90
	cmp r0, #0x15
	bne _022E3244
	add r0, sp, #0x20c
	bl ov00_022DBFDC
	ldr r0, _022E3364 ; =ov00_02326F28
	add r1, sp, #0x200
	ldr r0, [r0, #4]
	add r1, r1, #0x56
	add r0, r0, #0x48
	bl strcpy
	ldr r0, _022E3364 ; =ov00_02326F28
	add r1, sp, #0x300
	ldr r0, [r0, #4]
	add r1, r1, #0x83
	add r0, r0, #0x148
	bl strcpy
	bl ov00_022DBF08
	ldr r1, _022E3364 ; =ov00_02326F28
	mov r0, #0
	ldr r1, [r1, #4]
	mov r2, r0
	ldr r1, [r1, #0x24]
	bl ov00_022E0434
	ldr r0, _022E3364 ; =ov00_02326F28
	mov r2, #0
	ldr r1, [r0, #4]
	str r2, [r1, #0x24]
	ldr r0, [r0, #4]
	ldr r0, [r0, #0x1c]
	bl ov00_022DB77C
	cmp r0, #0
	beq _022E3220
	ldr r0, _022E3364 ; =ov00_02326F28
	ldr r2, [r0]
	ldmib r0, {r1, r3}
	add r0, r1, #0x48
	add r1, r1, #0x148
	blx r3
	add sp, sp, #0x3d0
	ldmia sp!, {r3, pc}
_022E3220:
	ldr r0, _022E3364 ; =ov00_02326F28
	ldr r2, _022E3368 ; =ov00_022E2DBC
	ldr r1, [r0, #4]
	mov r3, #3
	add r0, r1, #0x48
	add r1, r1, #0x148
	bl ov00_022E2F0C
	add sp, sp, #0x3d0
	ldmia sp!, {r3, pc}
_022E3244:
	bl ov00_022DBF90
	cmp r0, #0
	addeq sp, sp, #0x3d0
	ldmeqia sp!, {r3, pc}
	bl sub_0207AE44
	ldr r3, _022E3364 ; =ov00_02326F28
	ldr r2, _022E336C ; =0x000082EA
	ldr ip, [r3, #4]
	mov r3, #0
	ldr lr, [ip, #0x28]
	ldr ip, [ip, #0x2c]
	subs lr, r0, lr
	sbc r0, r1, ip
	mov r1, r0, lsl #6
	orr r1, r1, lr, lsr #26
	mov r0, lr, lsl #6
	bl _ll_udiv
	ldr r2, _022E3370 ; =0x00002710
	cmp r1, #0
	cmpeq r0, r2
	bls _022E32E0
	add r0, sp, #0x48
	bl ov00_022DBFDC
	bl ov00_022DBF08
	ldr r1, _022E3364 ; =ov00_02326F28
	mov r0, #0
	ldr r1, [r1, #4]
	mov r2, r0
	ldr r1, [r1, #0x24]
	bl ov00_022E0434
	ldr r0, _022E3364 ; =ov00_02326F28
	mov r2, #0
	ldr r1, [r0, #4]
	mov r0, #2
	str r2, [r1, #0x24]
	ldr r1, [sp, #0x48]
	bl ov00_022E2C74
	add sp, sp, #0x3d0
	ldmia sp!, {r3, pc}
_022E32E0:
	bl ov00_022DBF08
	add r0, sp, #0
	mov r1, #0
	mov r2, #0x48
	bl MemsetFast
	ldr r0, _022E3364 ; =ov00_02326F28
	ldr r0, [r0, #4]
	ldr r0, [r0, #0x10]
	bl ov00_022E1664
	ldr r1, _022E3364 ; =ov00_02326F28
	mov r2, r0, lsl #1
	ldr r1, [r1, #4]
	add r2, r2, #2
	ldr r0, [r1, #0x10]
	add r1, sp, #0
	bl MemcpyFast
	ldr r1, _022E3364 ; =ov00_02326F28
	add r0, sp, #0x34
	ldr r1, [r1, #4]
	add r1, r1, #0x51
	add r1, r1, #0x200
	bl strcpy
	ldr r2, _022E3374 ; =ov00_022E03F0
	ldr r0, _022E3364 ; =ov00_02326F28
	str r2, [sp, #0x40]
	ldr r2, _022E3378 ; =ov00_022E0434
	ldr r1, [r0, #4]
	str r2, [sp, #0x44]
	ldr r1, [r1, #0x24]
	add r0, sp, #0
	bl ov00_022DBCA4
	add sp, sp, #0x3d0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E3364: .word ov00_02326F28
_022E3368: .word ov00_022E2DBC
_022E336C: .word 0x000082EA
_022E3370: .word 0x00002710
_022E3374: .word ov00_022E03F0
_022E3378: .word ov00_022E0434
	arm_func_end ov00_022E3174

	arm_func_start ov00_022E337C
ov00_022E337C: ; 0x022E337C
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0x48
	mov r4, r1
	ldr r1, [r4]
	mov r5, r0
	cmp r1, #0
	addne sp, sp, #0x48
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r1, _022E3510 ; =ov00_02326F28
	ldr r2, [r1, #4]
	ldr r1, [r2, #4]
	cmp r1, #3
	bne _022E3454
	ldrsb r1, [r4, #0x8e]
	cmp r1, #0
	bne _022E342C
	ldr r0, [r2, #0x1c]
	ldr r1, [r2, #0xc]
	add r2, sp, #0x32
	add r0, r0, #4
	bl ov00_022DB528
	ldr r1, _022E3514 ; =0x00000705
	add r2, sp, #0x32
	mov r0, r5
	bl ov00_022FF2D4
	bl ov00_022E2D48
	cmp r0, #0
	addne sp, sp, #0x48
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r0, _022E3510 ; =ov00_02326F28
	mov r3, #4
	ldr r1, [r0, #4]
	ldr r0, _022E3518 ; =ov00_022E337C
	mov r2, #0
	str r3, [r1, #4]
	stmia sp, {r0, r2}
	ldr r1, [r4, #4]
	mov r0, r5
	mov r3, r2
	bl ov00_022FF1F8
	bl ov00_022E2D48
	add sp, sp, #0x48
	cmp r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022E342C:
	bl ov00_022FF0FC
	ldr r0, _022E351C ; =ov00_022E2EF4
	mov r1, #0
	bl ov00_022E2FA8
	ldr r0, _022E3510 ; =ov00_02326F28
	mov r1, #1
	ldr r0, [r0, #4]
	add sp, sp, #0x48
	str r1, [r0, #4]
	ldmia sp!, {r3, r4, r5, pc}
_022E3454:
	cmp r1, #4
	addne sp, sp, #0x48
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r0, [r2, #0x1c]
	ldr r1, [r2, #0xc]
	add r2, sp, #0x1d
	add r0, r0, #4
	bl ov00_022DB528
	add r1, sp, #0x1d
	add r0, r4, #0x8e
	bl strcmp
	cmp r0, #0
	bne _022E34E4
	ldr r0, _022E3510 ; =ov00_02326F28
	add r2, sp, #8
	ldr r0, [r0, #4]
	ldr r1, [r0, #0xc]
	add r0, r0, #0x3c
	bl ov00_022DB528
	ldr r0, _022E3510 ; =ov00_02326F28
	ldr r2, [r4, #4]
	ldr r1, [r0, #4]
	ldr r0, [r1, #0x1c]
	add r1, r1, #0x3c
	bl ov00_022DB898
	ldr r1, _022E3510 ; =ov00_02326F28
	mov r3, #2
	ldr r2, [r1, #4]
	mov r0, r5
	str r3, [r2, #4]
	ldr r1, [r1, #4]
	mov r2, #0
	add r1, r1, #0x260
	bl ov00_022E2DBC
	add sp, sp, #0x48
	ldmia sp!, {r3, r4, r5, pc}
_022E34E4:
	ldr r0, _022E3518 ; =ov00_022E337C
	mov r2, #0
	stmia sp, {r0, r2}
	ldr r1, [r4, #4]
	mov r0, r5
	mov r3, r2
	bl ov00_022FF1F8
	bl ov00_022E2D48
	cmp r0, #0
	add sp, sp, #0x48
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022E3510: .word ov00_02326F28
_022E3514: .word 0x00000705
_022E3518: .word ov00_022E337C
_022E351C: .word ov00_022E2EF4
	arm_func_end ov00_022E337C

	arm_func_start ov00_022E3520
ov00_022E3520: ; 0x022E3520
	ldr r0, _022E3548 ; =ov00_02326F28
	ldr r0, [r0, #4]
	cmp r0, #0
	beq _022E3540
	ldr r0, [r0, #4]
	cmp r0, #5
	moveq r0, #1
	bxeq lr
_022E3540:
	mov r0, #0
	bx lr
	.align 2, 0
_022E3548: .word ov00_02326F28
	arm_func_end ov00_022E3520

	arm_func_start ov00_022E354C
ov00_022E354C: ; 0x022E354C
	ldr ip, _022E3560 ; =ov00_022E3564
	mov r3, r1
	mov r1, #0
	mov r2, r1
	bx ip
	.align 2, 0
_022E3560: .word ov00_022E3564
	arm_func_end ov00_022E354C

	arm_func_start ov00_022E3564
ov00_022E3564: ; 0x022E3564
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #0x218
	mov r6, r1
	add r1, sp, #4
	mov r4, r2
	mov r5, r3
	bl ov00_022E4604
	cmp r0, #0
	beq _022E3654
	ldr r0, [sp, #8]
	cmp r0, #6
	bne _022E3618
	cmp r6, #0
	beq _022E35D4
	ldr r0, _022E3678 ; =ov00_0231A1A4
	add r1, sp, #0
	add r2, sp, #0xc
	mov r3, #0x2f
	bl ov00_022E1448
	cmp r0, #0
	movle r0, #0
	strleb r0, [r6]
	ble _022E35D4
	add r0, sp, #0
	mov r1, #0
	mov r2, #0xa
	bl sub_0208B200
	strb r0, [r6]
_022E35D4:
	cmp r4, #0
	beq _022E3630
	ldr r0, _022E367C ; =ov00_0231A1A8
	add r1, sp, #0
	add r2, sp, #0xc
	mov r3, #0x2f
	bl ov00_022E1448
	cmp r0, #0
	movle r0, #0
	strleb r0, [r4]
	ble _022E3630
	add r0, sp, #0
	mov r1, #0
	mov r2, #0xa
	bl sub_0208B200
	strb r0, [r4]
	b _022E3630
_022E3618:
	cmp r6, #0
	movne r0, #0
	strneb r0, [r6]
	cmp r4, #0
	movne r0, #0
	strneb r0, [r4]
_022E3630:
	cmp r5, #0
	beq _022E3644
	add r1, sp, #0x10c
	mov r0, r5
	bl strcpy
_022E3644:
	ldr r0, [sp, #8]
	add sp, sp, #0x218
	and r0, r0, #0xff
	ldmia sp!, {r4, r5, r6, pc}
_022E3654:
	cmp r6, #0
	movne r0, #0
	strneb r0, [r6]
	cmp r4, #0
	movne r0, #0
	strneb r0, [r4]
	mov r0, #0
	add sp, sp, #0x218
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022E3678: .word ov00_0231A1A4
_022E367C: .word ov00_0231A1A8
	arm_func_end ov00_022E3564

	arm_func_start ov00_022E3680
ov00_022E3680: ; 0x022E3680
	stmdb sp!, {r3, r4, r5, lr}
	ldr r1, _022E3710 ; =ov00_02326F34
	mov r4, r0
	ldr r0, [r1, #0xc]
	cmp r0, #0
	beq _022E36FC
	bl ov00_022E3520
	cmp r0, #0
	beq _022E36FC
	bl ov00_022E2C58
	cmp r0, #0
	beq _022E36FC
	bl ov00_022E2C58
	mov r1, r4
	bl ov00_022DB98C
	movs r5, r0
	mvnne r0, #0
	cmpne r5, r0
	beq _022E36FC
	ldr r0, _022E3710 ; =ov00_02326F34
	mov r1, r5
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #4]
	bl ov00_022FF808
	cmp r0, #0
	beq _022E36FC
	ldr r0, _022E3710 ; =ov00_02326F34
	mov r1, r5
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #4]
	bl ov00_022FF880
_022E36FC:
	mov r0, r4
	mov r1, #0
	mov r2, #0xc
	bl MemsetFast
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022E3710: .word ov00_02326F34
	arm_func_end ov00_022E3680

	arm_func_start ov00_022E3714
ov00_022E3714: ; 0x022E3714
	ldr r2, _022E373C ; =ov00_02326F34
	ldr r3, [r2, #0xc]
	cmp r3, #0
	moveq r0, #0
	bxeq lr
	str r0, [r3, #0x44]
	ldr r2, [r2, #0xc]
	mov r0, #1
	str r1, [r2, #0x48]
	bx lr
	.align 2, 0
_022E373C: .word ov00_02326F34
	arm_func_end ov00_022E3714

	arm_func_start ov00_022E3740
ov00_022E3740: ; 0x022E3740
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	ldr r6, _022E3858 ; =ov00_02326F34
	ldr r5, [sp, #0x18]
	str r0, [r6, #0xc]
	mov r4, #0
	str r4, [r0]
	ldr r0, [r6, #0xc]
	cmp r5, #0
	str r1, [r0, #4]
	ldr r0, [r6, #0xc]
	str r4, [r0, #8]
	ldr r0, [r6, #0xc]
	str r4, [r0, #0xc]
	str r4, [r0, #0x10]
	str r5, [r0, #0x14]
	ldr r0, [r6, #0xc]
	str r3, [r0, #0x18]
	ldr r0, [r6, #0xc]
	strb r4, [r0, #0x1c]
	ldr r0, [r6, #0xc]
	strb r4, [r0, #0x1d]
	ldr r0, [r6, #0xc]
	strb r4, [r0, #0x1e]
	ldr r0, [r6, #0xc]
	strb r4, [r0, #0x1f]
	ldr r0, [r6, #0xc]
	str r4, [r0, #0x20]
	ldr r0, [r6, #0xc]
	str r4, [r0, #0x24]
	ldr r0, [r6, #0xc]
	str r2, [r0, #0x28]
	ldr r0, [r6, #0xc]
	str r4, [r0, #0x2c]
	ldr r0, [r6, #0xc]
	str r4, [r0, #0x30]
	ldr r0, [r6, #0xc]
	str r4, [r0, #0x34]
	ldr r0, [r6, #0xc]
	str r4, [r0, #0x38]
	ldr r0, [r6, #0xc]
	str r4, [r0, #0x3c]
	ldr r0, [r6, #0xc]
	str r4, [r0, #0x40]
	ldr r0, [r6, #0xc]
	str r4, [r0, #0x44]
	ldr r0, [r6, #0xc]
	str r4, [r0, #0x48]
	ldr r0, [r6, #0xc]
	str r4, [r0, #0x4c]
	ldr r0, [r6, #0xc]
	str r4, [r0, #0x50]
	ldr r0, [r6, #0xc]
	str r4, [r0, #0x54]
	ldr r0, [r6, #0xc]
	str r4, [r0, #0x58]
	ldr r0, [r6, #0xc]
	str r4, [r0, #0x5c]
	ldmleia sp!, {r4, r5, r6, r7, r8, pc}
	mov r8, r4
	mov r7, r4
_022E3830:
	ldr r0, [r6, #0xc]
	mov r1, r7
	ldr r0, [r0, #0x18]
	add r0, r0, r8
	bl ov00_022DB328
	add r4, r4, #1
	cmp r4, r5
	add r8, r8, #0xc
	blt _022E3830
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022E3858: .word ov00_02326F34
	arm_func_end ov00_022E3740

	arm_func_start ov00_022E385C
ov00_022E385C: ; 0x022E385C
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	sub sp, sp, #8
	ldr r0, _022E3B30 ; =ov00_02326F34
	ldr r0, [r0, #0xc]
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	bl ov00_022E0378
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r0, _022E3B30 ; =ov00_02326F34
	ldr r1, [r0, #0xc]
	ldr r0, [r1, #0x18]
	cmp r0, #0
	bne _022E38C0
	ldr r0, [r1, #4]
	cmp r0, #0
	ldrne r0, [r0]
	cmpne r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	bl ov00_022E3FA4
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022E38C0:
	bl ov00_022E4E5C
	cmp r0, #0
	bne _022E38D8
	bl ov00_0230C30C
	cmp r0, #0
	beq _022E3910
_022E38D8:
	ldr r0, _022E3B30 ; =ov00_02326F34
	mov r1, #1
	str r1, [r0, #4]
	mov r1, #0
	str r1, [r0]
	bl ov00_0230C32C
	ldr r0, _022E3B30 ; =ov00_02326F34
	mov r2, #0
	str r2, [r0, #4]
	ldr r1, [r0]
	cmp r1, #1
	bne _022E3910
	str r2, [r0]
	bl ov00_0230C29C
_022E3910:
	ldr r0, _022E3B30 ; =ov00_02326F34
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #4]
	cmp r0, #0
	ldrne r0, [r0]
	cmpne r0, #0
	beq _022E39B4
	bl ov00_022E3FA4
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r0, _022E3B30 ; =ov00_02326F34
	ldr r3, [r0, #0xc]
	ldr r0, [r3]
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r0, [r3, #0x18]
	cmp r0, #0
	ldrneb r2, [r3, #0x1e]
	cmpne r2, #3
	beq _022E39B4
	ldr r1, [r3, #8]
	cmp r1, #7
	bls _022E39B4
	cmp r2, #1
	bhi _022E3984
	ldr r1, [r3, #0x14]
	bl ov00_022E4060
_022E3984:
	ldr r0, _022E3B30 ; =ov00_02326F34
	ldr r3, [r0, #0xc]
	ldrb r2, [r3, #0x1c]
	ldr r1, [r3, #0x14]
	cmp r2, r1
	blt _022E39B4
	mov r1, #3
	strb r1, [r3, #0x1e]
	ldr r1, [r0, #0xc]
	ldrb r0, [r1, #0x1f]
	add r0, r0, #1
	strb r0, [r1, #0x1f]
_022E39B4:
	ldr r6, _022E3B30 ; =ov00_02326F34
	ldr r1, [r6, #0xc]
	ldrb r0, [r1, #0x1f]
	cmp r0, #2
	addlo sp, sp, #8
	ldmloia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r0, [r1, #4]
	cmp r0, #0
	ldrne r0, [r0]
	cmpne r0, #0
	beq _022E3B18
	ldr r0, [r1, #0x14]
	mov r4, #0
	mov r5, r4
	mov r7, r4
	cmp r0, #0
	ble _022E3A28
	mov r8, r4
_022E39FC:
	ldr r0, [r1, #0x18]
	add r0, r0, r8
	bl ov00_022DB254
	cmp r0, #3
	ldr r1, [r6, #0xc]
	add r7, r7, #1
	ldr r0, [r1, #0x14]
	addeq r5, r5, #1
	add r8, r8, #0xc
	cmp r7, r0
	blt _022E39FC
_022E3A28:
	cmp r5, #0
	bne _022E3A44
	mov r0, #0
	strb r0, [r1, #0x1f]
	bl ov00_022E4330
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022E3A44:
	mov r1, r5, lsl #2
	mov r0, #4
	bl ov00_022E03F0
	ldr r8, _022E3B30 ; =ov00_02326F34
	ldr r1, [r8, #0xc]
	str r0, [r1, #0x5c]
	ldr r1, [r8, #0xc]
	ldr r0, [r1, #0x5c]
	cmp r0, #0
	bne _022E3A80
	ldr r1, _022E3B34 ; =0xFFFEEE8F
	mov r0, #9
	bl ov00_022E3BE8
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022E3A80:
	ldr r0, [r1, #0x14]
	mov r7, #0
	cmp r0, #0
	ble _022E3AE4
	mov r6, r7
_022E3A94:
	ldr r0, [r1, #0x18]
	add r0, r0, r6
	bl ov00_022DB254
	cmp r0, #3
	bne _022E3ACC
	bl ov00_022E2C58
	ldr r1, [r8, #0xc]
	ldr r1, [r1, #0x18]
	add r1, r1, r6
	bl ov00_022DB98C
	ldr r1, [r8, #0xc]
	ldr r1, [r1, #0x5c]
	str r0, [r1, r4, lsl #2]
	add r4, r4, #1
_022E3ACC:
	ldr r1, [r8, #0xc]
	add r7, r7, #1
	ldr r0, [r1, #0x14]
	add r6, r6, #0xc
	cmp r7, r0
	blt _022E3A94
_022E3AE4:
	ldr r0, _022E3B30 ; =ov00_02326F34
	ldr r1, _022E3B38 ; =ov00_022E4E98
	ldr r2, [r0, #0xc]
	mov r3, #0
	stmia sp, {r1, r3}
	ldr r0, [r2, #4]
	ldr r1, [r2, #0x5c]
	mov r2, r5
	bl ov00_022FFBA8
	bl ov00_022E46C0
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
_022E3B18:
	ldr r0, _022E3B30 ; =ov00_02326F34
	mov r1, #0
	ldr r0, [r0, #0xc]
	strb r1, [r0, #0x1f]
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022E3B30: .word ov00_02326F34
_022E3B34: .word 0xFFFEEE8F
_022E3B38: .word ov00_022E4E98
	arm_func_end ov00_022E385C

	arm_func_start ov00_022E3B3C
ov00_022E3B3C: ; 0x022E3B3C
	stmdb sp!, {r3, r4, r5, lr}
	ldr r0, _022E3BE4 ; =ov00_02326F34
	ldr r5, [sp, #0x10]
	ldr r1, [r0, #0xc]
	ldr r4, [sp, #0x14]
	str r2, [r1, #0x2c]
	ldr r1, [r0, #0xc]
	ldr lr, [sp, #0x18]
	str r3, [r1, #0x30]
	ldr r1, [r0, #0xc]
	ldr ip, [sp, #0x1c]
	str r5, [r1, #0x34]
	ldr r1, [r0, #0xc]
	mov r3, #0
	str r4, [r1, #0x38]
	ldr r1, [r0, #0xc]
	mov r2, #1
	str lr, [r1, #0x3c]
	ldr r1, [r0, #0xc]
	str ip, [r1, #0x40]
	ldr r1, [r0, #0xc]
	strb r3, [r1, #0x1d]
	ldr r1, [r0, #0xc]
	strb r3, [r1, #0x1e]
	ldr r1, [r0, #0xc]
	strb r3, [r1, #0x1f]
	ldr r1, [r0, #0xc]
	strb r3, [r1, #0x1c]
	ldr r1, [r0, #0xc]
	str r2, [r1]
	ldr r1, [r0, #0xc]
	ldr r0, [r1, #0x18]
	cmp r0, #0
	ldreqb r0, [r1, #0x1f]
	addeq r0, r0, #1
	streqb r0, [r1, #0x1f]
	ldr r0, _022E3BE4 ; =ov00_02326F34
	ldr r1, [r0, #0xc]
	ldrb r0, [r1, #0x1f]
	add r0, r0, #1
	strb r0, [r1, #0x1f]
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022E3BE4: .word ov00_02326F34
	arm_func_end ov00_022E3B3C

	arm_func_start ov00_022E3BE8
ov00_022E3BE8: ; 0x022E3BE8
	stmdb sp!, {r4, lr}
	ldr r2, _022E3C6C ; =ov00_02326F34
	mov r4, r0
	ldr r2, [r2, #0xc]
	cmp r2, #0
	cmpne r4, #0
	ldmeqia sp!, {r4, pc}
	bl ov00_022E0394
	ldr r0, _022E3C6C ; =ov00_02326F34
	ldr r1, [r0, #0xc]
	ldr r0, [r1]
	cmp r0, #0
	cmpne r0, #2
	beq _022E3C64
	ldr r1, [r1, #0x5c]
	cmp r1, #0
	beq _022E3C48
	mov r0, #4
	mov r2, #0
	bl ov00_022E0434
	ldr r0, _022E3C6C ; =ov00_02326F34
	mov r1, #0
	ldr r0, [r0, #0xc]
	str r1, [r0, #0x5c]
_022E3C48:
	ldr r1, _022E3C6C ; =ov00_02326F34
	mov r0, r4
	ldr r3, [r1, #0xc]
	ldrb r1, [r3, #0x1d]
	ldr r2, [r3, #0x30]
	ldr r3, [r3, #0x2c]
	blx r3
_022E3C64:
	bl ov00_022E4030
	ldmia sp!, {r4, pc}
	.align 2, 0
_022E3C6C: .word ov00_02326F34
	arm_func_end ov00_022E3BE8

	arm_func_start ov00_022E3C70
ov00_022E3C70: ; 0x022E3C70
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	ldr r2, _022E3CB4 ; =ov00_02326F34
	ldr r2, [r2, #0xc]
	ldr r2, [r2, #0x18]
	cmp r2, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, pc}
	ldr r3, _022E3CB8 ; =ov00_022E49D8
	mov r2, #0
	str r3, [sp]
	str r2, [sp, #4]
	ldr r1, [r1]
	mov r3, r2
	bl ov00_022FF1F8
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E3CB4: .word ov00_02326F34
_022E3CB8: .word ov00_022E49D8
	arm_func_end ov00_022E3C70

	arm_func_start ov00_022E3CBC
ov00_022E3CBC: ; 0x022E3CBC
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	ldr r3, _022E3CE8 ; =ov00_022E4C08
	mov r2, #0
	str r3, [sp]
	str r2, [sp, #4]
	ldr r1, [r1]
	mov r3, r2
	bl ov00_022FF1F8
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E3CE8: .word ov00_022E4C08
	arm_func_end ov00_022E3CBC

	arm_func_start ov00_022E3CEC
ov00_022E3CEC: ; 0x022E3CEC
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #0x214
	ldr r2, _022E3D6C ; =ov00_02326F34
	mov r6, r0
	ldr r0, [r2, #0xc]
	mov r5, r1
	ldr r0, [r0, #0x34]
	cmp r0, #0
	addeq sp, sp, #0x214
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	ldr r0, [r5]
	bl ov00_022E3DB8
	mov r4, r0
	mvn r0, #0
	cmp r4, r0
	addeq sp, sp, #0x214
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	ldr r1, [r5, #8]
	add r2, sp, #0
	mov r0, r6
	bl ov00_022FF5D8
	ldr r0, _022E3D6C ; =ov00_02326F34
	ldr r1, [sp, #4]
	ldr r0, [r0, #0xc]
	add r2, sp, #0x108
	ldr r3, [r0, #0x38]
	ldr ip, [r0, #0x34]
	mov r0, r4
	and r1, r1, #0xff
	blx ip
	add sp, sp, #0x214
	ldmia sp!, {r3, r4, r5, r6, pc}
	.align 2, 0
_022E3D6C: .word ov00_02326F34
	arm_func_end ov00_022E3CEC

	arm_func_start ov00_022E3D70
ov00_022E3D70: ; 0x022E3D70
	stmdb sp!, {r3, r4, r5, lr}
	ldr r1, _022E3DB4 ; =ov00_02326F34
	mov r5, r0
	ldr r0, [r1, #0xc]
	ldr r4, [r0, #0x18]
	cmp r4, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	bl ov00_022E2C58
	mov r1, #0xc
	mla r1, r5, r1, r4
	bl ov00_022DB98C
	cmp r0, #0
	mvnne r1, #0
	cmpne r0, r1
	moveq r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022E3DB4: .word ov00_02326F34
	arm_func_end ov00_022E3D70

	arm_func_start ov00_022E3DB8
ov00_022E3DB8: ; 0x022E3DB8
	stmdb sp!, {r4, r5, r6, lr}
	ldr r4, _022E3E18 ; =ov00_02326F34
	mov r6, r0
	ldr r0, [r4, #0xc]
	cmp r0, #0
	cmpne r6, #0
	mvneq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	ldr r0, [r0, #0x14]
	mov r5, #0
	cmp r0, #0
	ble _022E3E10
_022E3DE8:
	mov r0, r5
	bl ov00_022E3D70
	cmp r6, r0
	moveq r0, r5
	ldmeqia sp!, {r4, r5, r6, pc}
	ldr r0, [r4, #0xc]
	add r5, r5, #1
	ldr r0, [r0, #0x14]
	cmp r5, r0
	blt _022E3DE8
_022E3E10:
	mvn r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022E3E18: .word ov00_02326F34
	arm_func_end ov00_022E3DB8

	arm_func_start ov00_022E3E1C
ov00_022E3E1C: ; 0x022E3E1C
	stmdb sp!, {r3, lr}
	ldr r0, _022E3E50 ; =ov00_02326F34
	ldr r1, [r0, #0xc]
	cmp r1, #0
	ldmeqia sp!, {r3, pc}
	mov r0, #0
	str r0, [r1, #8]
	bl sub_0207AE44
	ldr r2, _022E3E50 ; =ov00_02326F34
	ldr r2, [r2, #0xc]
	str r0, [r2, #0xc]
	str r1, [r2, #0x10]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E3E50: .word ov00_02326F34
	arm_func_end ov00_022E3E1C

	arm_func_start ov00_022E3E54
ov00_022E3E54: ; 0x022E3E54
	stmdb sp!, {r4, r5, r6, lr}
	ldr r3, _022E3F04 ; =ov00_02326F34
	mov r6, r0
	ldr r0, [r3, #0xc]
	mov r5, r1
	mov r4, r2
	cmp r0, #0
	beq _022E3E80
	bl ov00_022E3520
	cmp r0, #0
	bne _022E3E88
_022E3E80:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022E3E88:
	mvn r0, #0
	cmp r6, r0
	bne _022E3EA8
	ldr r0, _022E3F04 ; =ov00_02326F34
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #4]
	ldr r0, [r0]
	ldr r6, [r0, #0x23c]
_022E3EA8:
	cmp r5, #0
	bne _022E3EC4
	ldr r0, _022E3F04 ; =ov00_02326F34
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #4]
	ldr r0, [r0]
	add r5, r0, #0x3b8
_022E3EC4:
	cmp r4, #0
	bne _022E3EE4
	ldr r0, _022E3F04 ; =ov00_02326F34
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #4]
	ldr r0, [r0]
	add r0, r0, #0xb8
	add r4, r0, #0x400
_022E3EE4:
	ldr r0, _022E3F04 ; =ov00_02326F34
	mov r1, r6
	ldr r0, [r0, #0xc]
	mov r2, r5
	ldr r0, [r0, #4]
	mov r3, r4
	bl ov00_022FF8DC
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022E3F04: .word ov00_02326F34
	arm_func_end ov00_022E3E54

	arm_func_start ov00_022E3F08
ov00_022E3F08: ; 0x022E3F08
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #0x214
	ldr r1, _022E3F8C ; =ov00_02326F34
	mov r4, r0
	ldr r3, [r1, #0xc]
	ldr r2, [r3, #0x44]
	cmp r2, #0
	ldrne r1, [r3]
	cmpne r1, #1
	beq _022E3F38
	ldr r1, [r3, #0x48]
	blx r2
_022E3F38:
	ldr r0, _022E3F8C ; =ov00_02326F34
	ldr r1, [r0, #0xc]
	ldr r0, [r1, #0x34]
	cmp r0, #0
	addeq sp, sp, #0x214
	ldmeqia sp!, {r3, r4, pc}
	ldr r1, [r1, #0x18]
	mov r0, #0xc
	mla r0, r4, r0, r1
	add r1, sp, #0x108
	bl ov00_022E354C
	ldr r2, _022E3F8C ; =ov00_02326F34
	mov r1, r0
	ldr r0, [r2, #0xc]
	add r2, sp, #0x108
	ldr r3, [r0, #0x38]
	ldr ip, [r0, #0x34]
	mov r0, r4
	blx ip
	add sp, sp, #0x214
	ldmia sp!, {r3, r4, pc}
	.align 2, 0
_022E3F8C: .word ov00_02326F34
	arm_func_end ov00_022E3F08

	arm_func_start ov00_022E3F90
ov00_022E3F90: ; 0x022E3F90
	ldr r0, _022E3FA0 ; =ov00_02326F34
	mov r1, #0
	str r1, [r0, #0xc]
	bx lr
	.align 2, 0
_022E3FA0: .word ov00_02326F34
	arm_func_end ov00_022E3F90

	arm_func_start ov00_022E3FA4
ov00_022E3FA4: ; 0x022E3FA4
	stmdb sp!, {r3, r4, r5, lr}
	ldr r0, _022E4028 ; =ov00_02326F34
	mov r4, #0
	ldr r5, [r0, #0xc]
	bl sub_0207AE44
	ldr r3, [r5, #0xc]
	ldr r2, [r5, #0x10]
	subs r3, r0, r3
	sbc r0, r1, r2
	mov r1, r0, lsl #6
	ldr r2, _022E402C ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, r4
	bl _ll_udiv
	cmp r1, #0
	cmpeq r0, #0x12c
	blo _022E4020
	ldr r1, [r5, #8]
	ldr r0, _022E4028 ; =ov00_02326F34
	add r1, r1, #1
	str r1, [r5, #8]
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #4]
	bl ov00_022FEF74
	mov r4, r0
	bl sub_0207AE44
	ldr r2, _022E4028 ; =ov00_02326F34
	ldr r2, [r2, #0xc]
	str r0, [r2, #0xc]
	str r1, [r2, #0x10]
_022E4020:
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022E4028: .word ov00_02326F34
_022E402C: .word 0x000082EA
	arm_func_end ov00_022E3FA4

	arm_func_start ov00_022E4030
ov00_022E4030: ; 0x022E4030
	ldr r0, _022E405C ; =ov00_02326F34
	ldr r1, [r0, #0xc]
	cmp r1, #0
	bxeq lr
	mov r2, #0
	str r2, [r1]
	ldr r1, [r0, #0xc]
	strb r2, [r1, #0x1e]
	ldr r0, [r0, #0xc]
	strb r2, [r0, #0x1f]
	bx lr
	.align 2, 0
_022E405C: .word ov00_02326F34
	arm_func_end ov00_022E4030

	arm_func_start ov00_022E4060
ov00_022E4060: ; 0x022E4060
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x24c
	ldr r2, _022E4328 ; =ov00_02326F34
	mov sl, r0
	ldr r2, [r2, #0xc]
	mov sb, r1
	ldrb r0, [r2, #0x1e]
	cmp r0, #0
	bne _022E41C4
	ldr r0, [r2, #4]
	add r1, sp, #0x1c
	bl ov00_022FF5A8
	bl ov00_022E46C0
	ldr r0, [sp, #0x1c]
	mov r1, #0
	str r1, [sp, #0x18]
	cmp r0, #0
	ble _022E41B4
_022E40A8:
	ldr r0, _022E4328 ; =ov00_02326F34
	ldr r1, [sp, #0x18]
	ldr r0, [r0, #0xc]
	add r2, sp, #0x38
	ldr r0, [r0, #4]
	bl ov00_022FF5D8
	bl ov00_022E46C0
	cmp sb, #0
	mov r4, #0
	ble _022E4164
_022E40D0:
	mov r0, r4
	bl ov00_022E3D70
	ldr r1, [sp, #0x38]
	cmp r1, r0
	bne _022E4158
	mov r0, #0xc
	mul r5, r4, r0
	add r0, sl, r5
	bl ov00_022DB1E4
	cmp r0, #0
	bne _022E4164
	ldr r1, [sp, #0x38]
	add r0, sl, r5
	bl ov00_022DBAAC
	add r0, sl, r5
	bl ov00_022DB29C
	ldr r0, _022E4328 ; =ov00_02326F34
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r5
	bl ov00_022DB1B4
	cmp r0, #0
	beq _022E4144
	ldr r0, _022E4328 ; =ov00_02326F34
	mov r1, #1
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r5
	bl ov00_022DB2F8
_022E4144:
	ldr r0, _022E4328 ; =ov00_02326F34
	mov r1, #1
	ldr r0, [r0, #0xc]
	strb r1, [r0, #0x1d]
	b _022E4164
_022E4158:
	add r4, r4, #1
	cmp r4, sb
	blt _022E40D0
_022E4164:
	cmp r4, sb
	bne _022E419C
	ldr r0, _022E4328 ; =ov00_02326F34
	ldr r1, [sp, #0x38]
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #4]
	bl ov00_022FF880
	bl ov00_022E46C0
	ldr r1, [sp, #0x1c]
	ldr r0, [sp, #0x18]
	sub r1, r1, #1
	sub r0, r0, #1
	str r1, [sp, #0x1c]
	str r0, [sp, #0x18]
_022E419C:
	ldr r1, [sp, #0x18]
	ldr r0, [sp, #0x1c]
	add r1, r1, #1
	str r1, [sp, #0x18]
	cmp r1, r0
	blt _022E40A8
_022E41B4:
	ldr r0, _022E4328 ; =ov00_02326F34
	mov r1, #1
	ldr r0, [r0, #0xc]
	strb r1, [r0, #0x1e]
_022E41C4:
	ldr r7, _022E4328 ; =ov00_02326F34
	ldr r0, [r7, #0xc]
	ldrb r1, [r0, #0x1c]
	cmp r1, sb
	addge sp, sp, #0x24c
	ldmgeia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov fp, #0xc
	mvn r5, #0
	mov r4, fp
	mov r6, fp
_022E41EC:
	mla r0, r1, r6, sl
	bl ov00_022DB238
	cmp r0, #0
	bne _022E4300
	ldr r0, [r7, #0xc]
	ldrb r0, [r0, #0x1c]
	bl ov00_022E3D70
	movs r8, r0
	beq _022E4270
	ldr r1, [r7, #0xc]
	mov r0, sl
	ldrb r1, [r1, #0x1c]
	mov r2, r8
	bl ov00_022E43C0
	cmp r0, #0
	bne _022E4300
	ldr r0, [r7, #0xc]
	mov r1, r8
	ldr r0, [r0, #4]
	add r2, sp, #0x18
	bl ov00_022FF768
	bl ov00_022E46C0
	ldr r0, [sp, #0x18]
	cmp r0, r5
	bne _022E4300
	mov r0, r8
	bl ov00_022E45D0
	ldr r0, [r7, #0xc]
	mov r1, #1
	ldrb r2, [r0, #0x1c]
	mla r0, r2, r4, sl
	bl ov00_022DB328
	b _022E4300
_022E4270:
	bl ov00_022E2C58
	ldr r1, [r7, #0xc]
	ldrb r2, [r1, #0x1c]
	mla r1, r2, fp, sl
	bl ov00_022DB98C
	cmp r0, r5
	bne _022E4300
	bl ov00_022E2C58
	ldr r2, _022E4328 ; =ov00_02326F34
	mov r1, #0xc
	ldr r3, [r2, #0xc]
	add r2, sp, #0x20
	ldrb r3, [r3, #0x1c]
	mla r1, r3, r1, sl
	bl ov00_022DBAE0
	ldr r0, _022E4328 ; =ov00_02326F34
	mov r1, #0
	ldr r4, [r0, #0xc]
	add r2, sp, #0x20
	stmia sp, {r1, r2}
	str r1, [sp, #8]
	ldr r0, _022E432C ; =ov00_022E4734
	str r1, [sp, #0xc]
	str r0, [sp, #0x10]
	ldrb r0, [r4, #0x1c]
	mov r2, r1
	mov r3, r1
	str r0, [sp, #0x14]
	ldr r0, [r4, #4]
	bl ov00_022FF130
	ldr r0, _022E4328 ; =ov00_02326F34
	mov r1, #2
	ldr r0, [r0, #0xc]
	add sp, sp, #0x24c
	strb r1, [r0, #0x1e]
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022E4300:
	ldr r1, [r7, #0xc]
	ldrb r0, [r1, #0x1c]
	add r0, r0, #1
	strb r0, [r1, #0x1c]
	ldr r0, [r7, #0xc]
	ldrb r1, [r0, #0x1c]
	cmp r1, sb
	blt _022E41EC
	add sp, sp, #0x24c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022E4328: .word ov00_02326F34
_022E432C: .word ov00_022E4734
	arm_func_end ov00_022E4060

	arm_func_start ov00_022E4330
ov00_022E4330: ; 0x022E4330
	stmdb sp!, {r3, lr}
	ldr r1, _022E4364 ; =ov00_02326F34
	mov r0, #0
	ldr r3, [r1, #0xc]
	ldrb r1, [r3, #0x1d]
	ldr r2, [r3, #0x30]
	ldr r3, [r3, #0x2c]
	blx r3
	ldr r0, _022E4364 ; =ov00_02326F34
	mov r1, #2
	ldr r0, [r0, #0xc]
	str r1, [r0]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E4364: .word ov00_02326F34
	arm_func_end ov00_022E4330

	arm_func_start ov00_022E4368
ov00_022E4368: ; 0x022E4368
	stmdb sp!, {r3, r4, r5, lr}
	ldr r3, _022E43BC ; =ov00_02326F34
	mov r5, r1
	ldr r1, [r3, #0xc]
	mov r4, r2
	cmp r1, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	mov r2, #0xc
	mla r0, r5, r2, r0
	mov r1, #0
	bl MemsetFast
	ldr r0, _022E43BC ; =ov00_02326F34
	ldr r0, [r0, #0xc]
	ldr r3, [r0, #0x3c]
	cmp r3, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r2, [r0, #0x40]
	mov r0, r5
	mov r1, r4
	blx r3
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022E43BC: .word ov00_02326F34
	arm_func_end ov00_022E4368

	arm_func_start ov00_022E43C0
ov00_022E43C0: ; 0x022E43C0
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r7, r1
	mov r1, #0xc
	mul r4, r7, r1
	mov r8, r0
	add r0, r8, r4
	mov r6, r2
	bl ov00_022DB254
	cmp r0, #1
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	cmp r7, #0
	mov r5, #0
	ble _022E4478
_022E43F8:
	mov r0, r5
	bl ov00_022E3D70
	cmp r0, #0
	beq _022E446C
	cmp r0, r6
	bne _022E446C
	add r0, r8, r4
	bl ov00_022DB1E4
	cmp r0, #0
	beq _022E4448
	mov r0, #0xc
	mla r0, r5, r0, r8
	bl ov00_022DB1E4
	cmp r0, #0
	bne _022E4448
	mov r0, r8
	mov r1, r5
	mov r2, r7
	bl ov00_022E4368
	b _022E4458
_022E4448:
	mov r0, r8
	mov r1, r7
	mov r2, r5
	bl ov00_022E4368
_022E4458:
	ldr r1, _022E4480 ; =ov00_02326F34
	mov r0, #1
	ldr r1, [r1, #0xc]
	strb r0, [r1, #0x1d]
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022E446C:
	add r5, r5, #1
	cmp r5, r7
	blt _022E43F8
_022E4478:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022E4480: .word ov00_02326F34
	arm_func_end ov00_022E43C0

	arm_func_start ov00_022E4484
ov00_022E4484: ; 0x022E4484
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x10
	mov fp, r1
	str r0, [sp]
	mvn r0, #0
	str r2, [sp, #4]
	cmp fp, #0
	str r0, [sp, #0xc]
	mov r6, #0
	ble _022E45C0
	ldr r0, [sp]
	mov sb, r6
	str r0, [sp, #8]
	mov r8, r0
_022E44BC:
	mov r0, r6
	bl ov00_022E3D70
	movs r5, r0
	beq _022E45A0
	ldr r0, [sp, #4]
	add r7, r6, #1
	cmp r5, r0
	streq r6, [sp, #0xc]
	cmp r7, fp
	bge _022E45A0
	ldr r0, [sp]
	mov r1, #0xc
	mla sl, r7, r1, r0
	ldr r4, _022E45CC ; =ov00_02326F34
_022E44F4:
	mov r0, r7
	bl ov00_022E3D70
	cmp r5, r0
	bne _022E4590
	ldr r0, [sp, #8]
	bl ov00_022DB254
	cmp r0, #2
	bne _022E4530
	mov r0, sl
	bl ov00_022DB254
	cmp r0, #3
	bne _022E4530
	mov r0, r8
	mov r1, r5
	bl ov00_022DBAAC
_022E4530:
	mov r0, sl
	bl ov00_022DB1E4
	cmp r0, #0
	beq _022E4574
	mov r0, r8
	bl ov00_022DB29C
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, sb
	bl ov00_022DB1B4
	cmp r0, #0
	beq _022E4574
	ldr r0, [r4, #0xc]
	mov r1, #1
	ldr r0, [r0, #0x18]
	add r0, r0, sb
	bl ov00_022DB2F8
_022E4574:
	ldr r0, [sp]
	mov r1, r7
	mov r2, r6
	bl ov00_022E4368
	ldr r1, [r4, #0xc]
	mov r0, #1
	strb r0, [r1, #0x1d]
_022E4590:
	add sl, sl, #0xc
	add r7, r7, #1
	cmp r7, fp
	blt _022E44F4
_022E45A0:
	ldr r0, [sp, #8]
	add r6, r6, #1
	add r0, r0, #0xc
	cmp r6, fp
	str r0, [sp, #8]
	add r8, r8, #0xc
	add sb, sb, #0xc
	blt _022E44BC
_022E45C0:
	ldr r0, [sp, #0xc]
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022E45CC: .word ov00_02326F34
	arm_func_end ov00_022E4484

	arm_func_start ov00_022E45D0
ov00_022E45D0: ; 0x022E45D0
	stmdb sp!, {r4, lr}
	ldr r2, _022E45FC ; =ov00_02326F34
	mov r1, r0
	ldr r0, [r2, #0xc]
	ldr r2, _022E4600 ; =ov00_0231A1AC
	ldr r0, [r0, #4]
	bl ov00_022FF324
	mov r4, r0
	bl ov00_022E46C0
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022E45FC: .word ov00_02326F34
_022E4600: .word ov00_0231A1AC
	arm_func_end ov00_022E45D0

	arm_func_start ov00_022E4604
ov00_022E4604: ; 0x022E4604
	stmdb sp!, {r3, r4, r5, lr}
	ldr r2, _022E46BC ; =ov00_02326F34
	mov r3, #0
	ldr r2, [r2, #0xc]
	mov r5, r0
	mov r4, r1
	str r3, [sp]
	cmp r2, #0
	beq _022E4634
	bl ov00_022E3520
	cmp r0, #0
	bne _022E463C
_022E4634:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022E463C:
	bl ov00_022E2C58
	mov r1, r5
	bl ov00_022DB98C
	mov r5, r0
	cmp r5, #0
	ble _022E4678
	ldr r0, _022E46BC ; =ov00_02326F34
	add r2, sp, #0
	ldr r0, [r0, #0xc]
	mov r1, r5
	ldr r0, [r0, #4]
	bl ov00_022FF768
	cmp r0, #0
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
_022E4678:
	cmp r5, #0
	ble _022E4690
	ldr r1, [sp]
	mvn r0, #0
	cmp r1, r0
	bne _022E4698
_022E4690:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022E4698:
	ldr r0, _022E46BC ; =ov00_02326F34
	mov r2, r4
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #4]
	bl ov00_022FF5D8
	cmp r0, #0
	movne r0, #0
	moveq r0, #1
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022E46BC: .word ov00_02326F34
	arm_func_end ov00_022E4604

	arm_func_start ov00_022E46C0
ov00_022E46C0: ; 0x022E46C0
	stmdb sp!, {r4, lr}
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	cmp r4, #4
	addls pc, pc, r4, lsl #2
	b _022E471C
_022E46DC: ; jump table
	b _022E471C ; case 0
	b _022E46F0 ; case 1
	b _022E46FC ; case 2
	b _022E4708 ; case 3
	b _022E4714 ; case 4
_022E46F0:
	mov r0, #9
	sub r2, r0, #0xa
	b _022E471C
_022E46FC:
	mov r0, #9
	sub r2, r0, #0xb
	b _022E471C
_022E4708:
	mov r0, #6
	sub r2, r0, #0x10
	b _022E471C
_022E4714:
	mov r0, #6
	sub r2, r0, #0x1a
_022E471C:
	ldr r1, _022E4730 ; =0xFFFEEAA8
	add r1, r2, r1
	bl ov00_022E3BE8
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022E4730: .word 0xFFFEEAA8
	arm_func_end ov00_022E46C0

	arm_func_start ov00_022E4734
ov00_022E4734: ; 0x022E4734
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov sb, r1
	ldr r1, [sb]
	mov sl, r0
	mov r8, r2
	cmp r1, #0
	bne _022E496C
	ldr r0, [sb, #4]
	cmp r0, #0
	beq _022E496C
	mov r0, #0xc
	ldr r1, _022E49D4 ; =ov00_02326F34
	mul r6, r8, r0
	ldr r0, [r1, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r6
	bl ov00_022DB254
	cmp r0, #0
	beq _022E496C
	ldr r7, _022E49D4 ; =ov00_02326F34
	ldr r0, [r7, #0xc]
	ldr r0, [r0]
	cmp r0, #1
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [sb, #4]
	mov r4, #0
	cmp r0, #0
	ble _022E4808
	mov r5, r4
_022E47A8:
	ldr r0, [r7, #0xc]
	ldr r1, [sb, #0xc]
	ldr r0, [r0, #0x18]
	ldr r2, [r1, r5]
	mov r1, r8
	bl ov00_022E43C0
	cmp r0, #0
	beq _022E47F4
	ldr r0, _022E49D4 ; =ov00_02326F34
	mov r2, #1
	ldr r4, [r0, #0xc]
	add r1, r2, #0x600
	ldrb r3, [r4, #0x1c]
	add r3, r3, #1
	strb r3, [r4, #0x1c]
	ldr r0, [r0, #0xc]
	strb r2, [r0, #0x1e]
	str r1, [sb, #8]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022E47F4:
	ldr r0, [sb, #4]
	add r4, r4, #1
	cmp r4, r0
	add r5, r5, #0xac
	blt _022E47A8
_022E4808:
	cmp r0, #0
	mov r7, #0
	ble _022E493C
	ldr fp, _022E49D4 ; =ov00_02326F34
	mov r5, r7
	mvn r4, #0
_022E4820:
	ldr r1, [sb, #0xc]
	mov r0, sl
	ldr r1, [r1, r5]
	add r2, sp, #0
	bl ov00_022FF768
	bl ov00_022E46C0
	ldr r0, [sp]
	cmp r0, r4
	bne _022E4868
	ldr r0, [sb, #0xc]
	ldr r0, [r0, r5]
	bl ov00_022E45D0
	ldr r0, [fp, #0xc]
	mov r1, #1
	ldr r0, [r0, #0x18]
	add r0, r0, r6
	bl ov00_022DB328
	b _022E4928
_022E4868:
	mov r0, #0xc
	ldr r1, _022E49D4 ; =ov00_02326F34
	mul r4, r8, r0
	ldr r1, [r1, #0xc]
	ldr r0, [sb, #0xc]
	ldr r2, [r1, #0x18]
	ldr r1, [r0]
	add r0, r2, r4
	bl ov00_022DBAAC
	ldr r0, _022E49D4 ; =ov00_02326F34
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r4
	bl ov00_022DB29C
	ldr r0, _022E49D4 ; =ov00_02326F34
	mov r1, #1
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r4
	bl ov00_022DB2C8
	ldr r0, _022E49D4 ; =ov00_02326F34
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r4
	bl ov00_022DB1B4
	cmp r0, #0
	beq _022E48EC
	ldr r0, _022E49D4 ; =ov00_02326F34
	mov r1, #1
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r6
	bl ov00_022DB2F8
_022E48EC:
	mov r0, r8
	bl ov00_022E3F08
	ldr r0, _022E49D4 ; =ov00_02326F34
	mov r3, #1
	ldr r4, [r0, #0xc]
	add r1, r3, #0x600
	ldrb r2, [r4, #0x1c]
	add r2, r2, #1
	strb r2, [r4, #0x1c]
	ldr r2, [r0, #0xc]
	strb r3, [r2, #0x1e]
	str r1, [sb, #8]
	ldr r0, [r0, #0xc]
	strb r3, [r0, #0x1d]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022E4928:
	ldr r0, [sb, #4]
	add r7, r7, #1
	cmp r7, r0
	add r5, r5, #0xac
	blt _022E4820
_022E493C:
	ldr r0, [sb, #8]
	cmp r0, #0x600
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, _022E49D4 ; =ov00_02326F34
	mov r1, #1
	ldr r3, [r0, #0xc]
	ldrb r2, [r3, #0x1c]
	add r2, r2, #1
	strb r2, [r3, #0x1c]
	ldr r0, [r0, #0xc]
	strb r1, [r0, #0x1e]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022E496C:
	ldr r0, [sb]
	cmp r0, #0
	beq _022E4984
	bl ov00_022E46C0
	cmp r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022E4984:
	ldr r0, _022E49D4 ; =ov00_02326F34
	ldr r1, [r0, #0xc]
	ldr r0, [r1]
	cmp r0, #1
	beq _022E49B0
	ldr r1, [r1, #0x18]
	mov r0, #0xc
	mla r0, r8, r0, r1
	bl ov00_022DB254
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022E49B0:
	ldr r0, _022E49D4 ; =ov00_02326F34
	mov r1, #1
	ldr r3, [r0, #0xc]
	ldrb r2, [r3, #0x1c]
	add r2, r2, #1
	strb r2, [r3, #0x1c]
	ldr r0, [r0, #0xc]
	strb r1, [r0, #0x1e]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022E49D4: .word ov00_02326F34
	arm_func_end ov00_022E4734

	arm_func_start ov00_022E49D8
ov00_022E49D8: ; 0x022E49D8
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x28
	mov sb, r1
	ldr r1, [sb]
	mov sl, r0
	cmp r1, #0
	mov r6, #0
	addne sp, sp, #0x28
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r4, _022E4C00 ; =ov00_02326F34
	mov r5, r6
	ldr r1, [r4, #0xc]
	ldr r0, [r1, #0x14]
	cmp r0, #0
	ble _022E4BD4
	mov r7, r6
	add fp, sp, #0x11
_022E4A1C:
	ldr r0, [r1, #0x18]
	add r0, r0, r7
	bl ov00_022DB254
	cmp r0, #1
	bne _022E4AC4
	bl ov00_022E2C58
	ldr r1, [r4, #0xc]
	mov r2, fp
	ldr r1, [r1, #0x18]
	add r1, r1, r7
	bl ov00_022DBAE0
	mov r0, fp
	add r1, sb, #0x8e
	bl strcmp
	cmp r0, #0
	bne _022E4BBC
	ldr r1, [sb, #4]
	mov r0, sl
	bl ov00_022FF498
	ldr r0, [r4, #0xc]
	ldr r1, [sb, #4]
	ldr r0, [r0, #0x18]
	add r0, r0, r7
	bl ov00_022DBAAC
	ldr r0, [r4, #0xc]
	mov r1, #1
	ldr r0, [r0, #0x18]
	add r0, r0, r7
	bl ov00_022DB2C8
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r7
	bl ov00_022DB1B4
	cmp r0, #0
	beq _022E4ABC
	ldr r0, [r4, #0xc]
	mov r1, #1
	ldr r0, [r0, #0x18]
	add r0, r0, r7
	bl ov00_022DB2F8
_022E4ABC:
	mov r6, #1
	b _022E4BBC
_022E4AC4:
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r7
	bl ov00_022DB254
	cmp r0, #3
	beq _022E4AF4
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r7
	bl ov00_022DB254
	cmp r0, #2
	bne _022E4BBC
_022E4AF4:
	bl ov00_022E2C58
	ldr r1, [r0, #0x24]
	add r0, sp, #0xc
	mov r2, r1, lsr #0x10
	and r2, r2, #0xff
	str r2, [sp]
	mov r2, r1, lsr #8
	and r2, r2, #0xff
	str r2, [sp, #4]
	and r2, r1, #0xff
	str r2, [sp, #8]
	mov r1, r1, lsr #0x18
	and r3, r1, #0xff
	ldr r2, _022E4C04 ; =ov00_0231A1B0
	mov r1, #5
	bl sub_0207911C
	ldr r8, [sb, #4]
	bl ov00_022E2C58
	ldr r1, [r4, #0xc]
	ldr r1, [r1, #0x18]
	add r1, r1, r7
	bl ov00_022DB98C
	cmp r8, r0
	bne _022E4BBC
	add r0, sp, #0xc
	add r1, sb, #0x97
	mov r2, #4
	bl memcmp
	cmp r0, #0
	bne _022E4BBC
	mov r1, r8
	mov r0, sl
	bl ov00_022FF498
	ldr r0, [r4, #0xc]
	mov r1, #1
	ldr r0, [r0, #0x18]
	add r0, r0, r7
	bl ov00_022DB2C8
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r7
	bl ov00_022DB1B4
	cmp r0, #0
	beq _022E4BB8
	ldr r0, [r4, #0xc]
	mov r1, #1
	ldr r0, [r0, #0x18]
	add r0, r0, r7
	bl ov00_022DB2F8
_022E4BB8:
	mov r6, #1
_022E4BBC:
	add r7, r7, #0xc
	add r5, r5, #1
	ldr r1, [r4, #0xc]
	ldr r0, [r1, #0x14]
	cmp r5, r0
	blt _022E4A1C
_022E4BD4:
	cmp r6, #0
	beq _022E4BEC
	ldr r0, [sb, #4]
	bl ov00_022E45D0
	add sp, sp, #0x28
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022E4BEC:
	ldr r1, [sb, #4]
	mov r0, sl
	bl ov00_022FF4E8
	add sp, sp, #0x28
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022E4C00: .word ov00_02326F34
_022E4C04: .word ov00_0231A1B0
	arm_func_end ov00_022E49D8

	arm_func_start ov00_022E4C08
ov00_022E4C08: ; 0x022E4C08
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x18
	mov sl, r1
	ldr r0, [sl]
	mov r7, #0
	cmp r0, #0
	mov r8, r7
	addne sp, sp, #0x18
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r4, _022E4E58 ; =ov00_02326F34
	mov r6, r7
	ldr r0, [r4, #0xc]
	ldr r1, [r0, #0x14]
	cmp r1, #0
	ble _022E4DC0
	mov sb, r7
	mov fp, #1
	add r5, sp, #0
_022E4C50:
	ldr r0, [r0, #0x18]
	add r0, r0, sb
	bl ov00_022DB254
	cmp r0, #1
	bne _022E4CE8
	bl ov00_022E2C58
	ldr r1, [r4, #0xc]
	mov r2, r5
	ldr r1, [r1, #0x18]
	add r1, r1, sb
	bl ov00_022DBAE0
	mov r0, r5
	add r1, sl, #0x8e
	bl strcmp
	cmp r0, #0
	bne _022E4DA8
	ldr r0, [r4, #0xc]
	ldr r1, [sl, #4]
	ldr r0, [r0, #0x18]
	add r0, r0, sb
	bl ov00_022DBAAC
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, sb
	bl ov00_022DB29C
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, sb
	bl ov00_022DB1B4
	cmp r0, #0
	beq _022E4CE0
	ldr r0, [r4, #0xc]
	mov r1, fp
	ldr r0, [r0, #0x18]
	add r0, r0, sb
	bl ov00_022DB2F8
_022E4CE0:
	mov r7, #1
	b _022E4DA8
_022E4CE8:
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, sb
	bl ov00_022DB254
	cmp r0, #3
	beq _022E4D18
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, sb
	bl ov00_022DB254
	cmp r0, #2
	bne _022E4DA8
_022E4D18:
	bl ov00_022E2C58
	ldr r1, [r4, #0xc]
	ldr r1, [r1, #0x18]
	add r1, r1, sb
	bl ov00_022DB98C
	ldr r1, [sl, #4]
	cmp r1, r0
	bne _022E4DA8
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, sb
	bl ov00_022DB1E4
	cmp r0, #1
	moveq r8, #1
	beq _022E4DA8
	ldr r0, [r4, #0xc]
	ldr r1, [sl, #4]
	ldr r0, [r0, #0x18]
	add r0, r0, sb
	bl ov00_022DBAAC
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, sb
	bl ov00_022DB29C
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, sb
	bl ov00_022DB1B4
	cmp r0, #0
	beq _022E4DA4
	ldr r0, [r4, #0xc]
	mov r1, #1
	ldr r0, [r0, #0x18]
	add r0, r0, sb
	bl ov00_022DB2F8
_022E4DA4:
	mov r7, #1
_022E4DA8:
	ldr r0, [r4, #0xc]
	add r6, r6, #1
	add sb, sb, #0xc
	ldr r1, [r0, #0x14]
	cmp r6, r1
	blt _022E4C50
_022E4DC0:
	cmp r7, #0
	addeq sp, sp, #0x18
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r0, #0x18]
	ldr r2, [sl, #4]
	bl ov00_022E4484
	mov r4, r0
	cmp r8, #0
	bne _022E4E40
	mov r0, #0xc
	ldr r1, _022E4E58 ; =ov00_02326F34
	mul r5, r4, r0
	ldr r0, [r1, #0xc]
	mov r1, #1
	ldr r0, [r0, #0x18]
	add r0, r0, r5
	bl ov00_022DB2C8
	ldr r0, _022E4E58 ; =ov00_02326F34
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r5
	bl ov00_022DB1B4
	cmp r0, #0
	beq _022E4E38
	ldr r0, _022E4E58 ; =ov00_02326F34
	mov r1, #1
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r5
	bl ov00_022DB2F8
_022E4E38:
	mov r0, r4
	bl ov00_022E3F08
_022E4E40:
	ldr r0, _022E4E58 ; =ov00_02326F34
	mov r1, #1
	ldr r0, [r0, #0xc]
	strb r1, [r0, #0x1d]
	add sp, sp, #0x18
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022E4E58: .word ov00_02326F34
	arm_func_end ov00_022E4C08

	arm_func_start ov00_022E4E5C
ov00_022E4E5C: ; 0x022E4E5C
	ldr r0, _022E4E6C ; =ov00_02326F34
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x20]
	bx lr
	.align 2, 0
_022E4E6C: .word ov00_02326F34
	arm_func_end ov00_022E4E5C

	arm_func_start ov00_022E4E70
ov00_022E4E70: ; 0x022E4E70
	ldr r0, _022E4E80 ; =ov00_02326F34
	mov r1, #1
	str r1, [r0, #0x10]
	bx lr
	.align 2, 0
_022E4E80: .word ov00_02326F34
	arm_func_end ov00_022E4E70

	arm_func_start ov00_022E4E84
ov00_022E4E84: ; 0x022E4E84
	ldr r0, _022E4E94 ; =ov00_02326F34
	mov r1, #0
	str r1, [r0, #0x10]
	bx lr
	.align 2, 0
_022E4E94: .word ov00_02326F34
	arm_func_end ov00_022E4E84

	arm_func_start ov00_022E4E98
ov00_022E4E98: ; 0x022E4E98
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	ldr r0, _022E507C ; =ov00_02326F34
	mov r8, r1
	ldr r0, [r0, #0xc]
	ldr r1, [r0, #0x5c]
	cmp r1, #0
	beq _022E4ED0
	mov r0, #4
	mov r2, #0
	bl ov00_022E0434
	ldr r0, _022E507C ; =ov00_02326F34
	mov r1, #0
	ldr r0, [r0, #0xc]
	str r1, [r0, #0x5c]
_022E4ED0:
	ldr r0, [r8]
	cmp r0, #0
	beq _022E4EE4
	bl ov00_022E4330
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022E4EE4:
	ldr r0, _022E507C ; =ov00_02326F34
	mov r4, #0
	ldr r1, [r0, #0xc]
	ldr r0, [r1, #0x14]
	cmp r0, #0
	ble _022E5074
	mov r6, r4
_022E4F00:
	ldr r0, [r1, #0x18]
	add r0, r0, r6
	bl ov00_022DB254
	cmp r0, #3
	bne _022E5058
	ldr r0, [r8, #4]
	mov r5, #0
	cmp r0, #0
	ble _022E4FD8
	ldr sb, _022E507C ; =ov00_02326F34
	mov r7, r5
_022E4F2C:
	bl ov00_022E2C58
	ldr r1, [sb, #0xc]
	ldr r1, [r1, #0x18]
	add r1, r1, r6
	bl ov00_022DB98C
	ldr r1, [r8, #8]
	ldr r1, [r1, r7]
	cmp r1, r0
	bne _022E4FC4
	ldr r0, _022E507C ; =ov00_02326F34
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r6
	bl ov00_022DB21C
	cmp r0, #0
	bne _022E4FD8
	ldr r0, _022E507C ; =ov00_02326F34
	mov r1, #1
	ldr r2, [r0, #0xc]
	strb r1, [r2, #0x1d]
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r6
	bl ov00_022DB2C8
	ldr r0, _022E507C ; =ov00_02326F34
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r6
	bl ov00_022DB1B4
	cmp r0, #0
	beq _022E4FD8
	ldr r0, _022E507C ; =ov00_02326F34
	mov r1, #1
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r6
	bl ov00_022DB2F8
	b _022E4FD8
_022E4FC4:
	ldr r0, [r8, #4]
	add r5, r5, #1
	cmp r5, r0
	add r7, r7, #0x1c
	blt _022E4F2C
_022E4FD8:
	ldr r0, [r8, #4]
	cmp r5, r0
	bne _022E5024
	ldr r0, _022E507C ; =ov00_02326F34
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r6
	bl ov00_022DB21C
	cmp r0, #1
	bne _022E5024
	ldr r0, _022E507C ; =ov00_02326F34
	mov r3, #1
	ldr r2, [r0, #0xc]
	mov r1, #0
	strb r3, [r2, #0x1d]
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r6
	bl ov00_022DB2C8
_022E5024:
	ldr r0, _022E507C ; =ov00_02326F34
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r6
	bl ov00_022DB1B4
	cmp r0, #0
	beq _022E5058
	ldr r0, _022E507C ; =ov00_02326F34
	mov r1, #1
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x18]
	add r0, r0, r6
	bl ov00_022DB2F8
_022E5058:
	ldr r0, _022E507C ; =ov00_02326F34
	add r4, r4, #1
	ldr r1, [r0, #0xc]
	add r6, r6, #0xc
	ldr r0, [r1, #0x14]
	cmp r4, r0
	blt _022E4F00
_022E5074:
	bl ov00_022E4330
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022E507C: .word ov00_02326F34
	arm_func_end ov00_022E4E98

	arm_func_start ov00_022E5080
ov00_022E5080: ; 0x022E5080
	stmdb sp!, {r3, lr}
	ldr r0, _022E50A4 ; =ov00_02326F48
	ldr r1, [r0, #0x10]
	cmp r1, #0
	movne r1, #1
	strne r1, [r0, #0xc]
	ldmneia sp!, {r3, pc}
	bl ov00_023115E0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E50A4: .word ov00_02326F48
	arm_func_end ov00_022E5080

	arm_func_start ov00_022E50A8
ov00_022E50A8: ; 0x022E50A8
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r1
	mov r5, r2
	mov r4, r3
	bl ov00_022EC1B0
	bl ov00_022EC1C0
	str r6, [r0]
	bl ov00_022EC1C0
	str r5, [r0, #4]
	bl ov00_022EC1C0
	str r4, [r0, #8]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x10]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1c]
	bl ov00_022EC1C0
	mov r1, #0
	strh r1, [r0, #0x1a]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0xe4]
	mov r0, r1
	bl ov00_022EC1D0
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0xf]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x19]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1af]
	bl ov00_022EC1C0
	mov r1, #0
	add r0, r0, #0x100
	strh r1, [r0, #0xb6]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1dc]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x200]
	bl ov00_022EC1C0
	ldr r1, [sp, #0x10]
	str r1, [r0, #0x2f4]
	bl ov00_022EC1C0
	ldr r1, [sp, #0x14]
	str r1, [r0, #0x2f8]
	bl ov00_022EC1C0
	ldr r1, [sp, #0x18]
	str r1, [r0, #0x2fc]
	bl ov00_022EC1C0
	ldr r1, [sp, #0x1c]
	str r1, [r0, #0x300]
	bl ov00_022EC1C0
	add r0, r0, #0x304
	mov r1, #0
	mov r2, #0x40
	bl MemsetFast
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x344]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x464]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x468]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x474]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x478]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x47c]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x480]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x174]
	str r1, [r0, #0x178]
	bl ov00_022EAF5C
	ldr r1, _022E5220 ; =ov00_02326F48
	mov r0, #0
	strb r0, [r1, #0x1c]
	strb r0, [r1, #0x1d]
	strh r0, [r1, #0x1e]
	bl ov00_022E6E68
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022E5220: .word ov00_02326F48
	arm_func_end ov00_022E50A8

	arm_func_start ov00_022E5224
ov00_022E5224: ; 0x022E5224
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x28
	mov r4, r0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	cmp r0, #0
	addne sp, sp, #0x28
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	bl ov00_022EC1C0
	str r4, [r0, #0x200]
	ldr r4, _022E539C ; =ov00_022EB970
	ldr fp, _022E53A0 ; =ov00_022EBAB8
	mov sl, #0
	mov r5, #1
_022E5260:
	bl ov00_022EC1C0
	mov sb, r0
	bl ov00_022EC1C0
	ldr r0, [r0, #4]
	ldr r0, [r0]
	bl ov00_0230E448
	mov r8, r0
	bl ov00_022EC1C0
	ldr r0, [r0, #4]
	ldr r0, [r0]
	bl ov00_0230E428
	mov r7, r0
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	ldr r3, [r0, #0x2f8]
	mov r1, r8
	stmia sp, {r3, r5}
	str r5, [sp, #8]
	str r4, [sp, #0xc]
	ldr r3, _022E53A4 ; =ov00_022EBABC
	str fp, [sp, #0x10]
	str r3, [sp, #0x14]
	ldr r3, _022E53A8 ; =ov00_022EBAC0
	mov r2, r7
	str r3, [sp, #0x18]
	ldr r3, _022E53AC ; =ov00_022EBB64
	add r0, sb, #0x10
	str r3, [sp, #0x1c]
	ldr r3, _022E53B0 ; =ov00_022EBB6C
	str r3, [sp, #0x20]
	mov r3, #0
	str r3, [sp, #0x24]
	ldr r3, [r6, #0x2f4]
	bl ov00_023127EC
	movs r6, r0
	beq _022E533C
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	bl ov00_02312C50
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x10]
	cmp r6, #3
	bne _022E531C
	cmp sl, #4
	bne _022E5330
_022E531C:
	mov r0, r6
	bl ov00_022EB728
	add sp, sp, #0x28
	mov r0, r6
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022E5330:
	add sl, sl, #1
	cmp sl, #5
	blt _022E5260
_022E533C:
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1c]
	bl ov00_022EC1C0
	mov r1, #0
	strh r1, [r0, #0x1a]
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	ldr r1, _022E53B4 ; =ov00_022EBB78
	bl ov00_023129E0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	ldr r1, _022E53B8 ; =ov00_022EBB98
	bl ov00_023129B0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	ldr r1, _022E53BC ; =ov00_022EBC4C
	bl ov00_023129C8
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	bl ov00_02312BF4
	mov r0, r6
	add sp, sp, #0x28
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022E539C: .word ov00_022EB970
_022E53A0: .word ov00_022EBAB8
_022E53A4: .word ov00_022EBABC
_022E53A8: .word ov00_022EBAC0
_022E53AC: .word ov00_022EBB64
_022E53B0: .word ov00_022EBB6C
_022E53B4: .word ov00_022EBB78
_022E53B8: .word ov00_022EBB98
_022E53BC: .word ov00_022EBC4C
	arm_func_end ov00_022E5224

	arm_func_start ov00_022E53C0
ov00_022E53C0: ; 0x022E53C0
	stmdb sp!, {r4, lr}
	movs r4, r0
	ldmeqia sp!, {r4, pc}
	bl ov00_023129F8
	ldr r0, [r4, #0xb4]
	cmp r0, #0
	ldmneia sp!, {r4, pc}
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	cmpne r0, #1
	beq _022E53FC
	cmp r0, #2
	beq _022E5450
	ldmia sp!, {r4, pc}
_022E53FC:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xb
	addls pc, pc, r0, lsl #2
	ldmia sp!, {r4, pc}
_022E5410: ; jump table
	ldmia sp!, {r4, pc} ; case 0
	b _022E5440 ; case 1
	b _022E5440 ; case 2
	b _022E5440 ; case 3
	b _022E5440 ; case 4
	ldmia sp!, {r4, pc} ; case 5
	b _022E5440 ; case 6
	ldmia sp!, {r4, pc} ; case 7
	ldmia sp!, {r4, pc} ; case 8
	ldmia sp!, {r4, pc} ; case 9
	ldmia sp!, {r4, pc} ; case 10
	b _022E5440 ; case 11
_022E5440:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	bl ov00_02312BF4
	ldmia sp!, {r4, pc}
_022E5450:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xb
	ldmneia sp!, {r4, pc}
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	bl ov00_02312BF4
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022E53C0

	arm_func_start ov00_022E5470
ov00_022E5470: ; 0x022E5470
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #8
	mov r4, r0
	bl ov00_022EC1C0
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	bl ov00_022E0378
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r4, #0
	bne _022E54EC
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	cmp r0, #0
	beq _022E54C0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	bl ov00_023129F8
_022E54C0:
	bl ov00_022EC1C0
	ldr r0, [r0, #4]
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	bl ov00_022EC1C0
	ldr r0, [r0, #4]
	ldr r0, [r0]
	bl ov00_0230E0B0
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E54EC:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xd
	addls pc, pc, r0, lsl #2
	b _022E5C18
_022E5514: ; jump table
	b _022E5C18 ; case 0
	b _022E5B20 ; case 1
	b _022E56C8 ; case 2
	b _022E56C8 ; case 3
	b _022E554C ; case 4
	b _022E56C8 ; case 5
	b _022E5C18 ; case 6
	b _022E5788 ; case 7
	b _022E5C18 ; case 8
	b _022E5C18 ; case 9
	b _022E5C18 ; case 10
	b _022E590C ; case 11
	b _022E5C18 ; case 12
	b _022E5A00 ; case 13
_022E554C:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1c8]
	cmp r0, #0
	beq _022E5638
	bl sub_0207AE44
	mov r6, r0
	mov r7, r1
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	mov r4, r0
	ldr r1, [r5, #0x1cc]
	ldr r0, [r5, #0x1d0]
	subs r2, r6, r1
	sbc r0, r7, r0
	mov r1, r0, lsl #6
	orr r1, r1, r2, lsr #26
	mov r0, r2, lsl #6
	ldr r2, _022E5EE0 ; =0x000082EA
	mov r3, #0
	bl _ll_udiv
	cmp r1, #0
	ldr r1, [r4, #0x1c8]
	cmpeq r0, r1
	bls _022E5638
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1c8]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	bne _022E5624
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x1aa]
	add r1, r1, #1
	strb r1, [r0, #0x1aa]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1aa]
	cmp r0, #5
	bls _022E5600
	ldr r1, _022E5EE4 ; =0xFFFEC5D2
	mov r0, #6
	bl ov00_022E6570
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E5600:
	bl ov00_022EC1C0
	ldr r0, [r0, #0xf4]
	mov r1, #0
	bl ov00_022E9134
	bl ov00_022E9108
	cmp r0, #0
	beq _022E5638
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E5624:
	mov r0, #0
	bl ov00_022E95B8
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
_022E5638:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1bc]
	cmp r0, #0
	beq _022E5C18
	bl ov00_022EC1C0
	ldrb r1, [r0, #0xd]
	ldr r0, _022E5EE8 ; =0x00000BB8
	mul r0, r1, r0
	add r0, r0, #0x3b8
	add r5, r0, #0x800
	bl sub_0207AE44
	mov r4, r0
	mov r6, r1
	bl ov00_022EC1C0
	ldr r1, [r0, #0x1c0]
	ldr r0, [r0, #0x1c4]
	subs r2, r4, r1
	sbc r0, r6, r0
	mov r1, r0, lsl #6
	orr r1, r1, r2, lsr #26
	mov r0, r2, lsl #6
	ldr r2, _022E5EE0 ; =0x000082EA
	mov r3, #0
	bl _ll_udiv
	cmp r1, #0
	cmpeq r0, r5
	blo _022E5C18
	bl ov00_022EC1C0
	ldr r0, [r0, #0xf4]
	mov r1, #0
	bl ov00_022E9134
	bl ov00_022E9108
	cmp r0, #0
	beq _022E5C18
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E56C8:
	bl ov00_022EC1C0
	ldr r0, [r0, #0xe8]
	cmp r0, #0
	ble _022E5C18
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #3
	bne _022E5704
	bl ov00_022EC1C0
	ldrb r1, [r0, #0xd]
	ldr r0, _022E5EE8 ; =0x00000BB8
	mul r0, r1, r0
	add r0, r0, #0x3b8
	add r5, r0, #0x800
	b _022E5718
_022E5704:
	bl ov00_022EC1C0
	ldr r0, [r0, #0xe8]
	cmp r0, #1
	moveq r5, #0x3e8
	ldrne r5, _022E5EE8 ; =0x00000BB8
_022E5718:
	bl sub_0207AE44
	mov r4, r0
	mov r6, r1
	bl ov00_022EC1C0
	ldr r1, [r0, #0xec]
	ldr r0, [r0, #0xf0]
	subs r3, r4, r1
	sbc r0, r6, r0
	mov r1, r0, lsl #6
	ldr r2, _022E5EE0 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	cmp r1, #0
	cmpeq r0, r5
	bls _022E5C18
	bl ov00_022EC1C0
	ldr r0, [r0, #0x204]
	bl ov00_022E72A0
	bl ov00_022EB694
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0xe8]
	b _022E5C18
_022E5788:
	bl ov00_022EC1C0
	ldr r1, [r0, #0x190]
	ldr r0, [r0, #0x18c]
	cmp r1, #0
	cmpeq r0, #0
	beq _022E5814
	bl sub_0207AE44
	mov r4, r0
	mov r5, r1
	bl ov00_022EC1C0
	ldr r1, [r0, #0x18c]
	ldr r0, [r0, #0x190]
	subs r3, r4, r1
	sbc r0, r5, r0
	mov r1, r0, lsl #6
	ldr r2, _022E5EE0 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	ldr r2, _022E5EEC ; =0x000061A8
	cmp r1, #0
	cmpeq r0, r2
	bls _022E5C18
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x18c]
	str r1, [r0, #0x190]
	bl ov00_022EC1C0
	ldr r0, [r0, #0xf4]
	bl ov00_022E9900
	cmp r0, #0
	bne _022E5C18
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E5814:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x3cc]
	cmp r0, #6
	bne _022E5C18
	bl sub_0207AE44
	mov r4, r0
	mov r5, r1
	bl ov00_022EC1C0
	ldr r1, [r0, #0x45c]
	ldr r0, [r0, #0x460]
	subs r3, r4, r1
	sbc r0, r5, r0
	mov r1, r0, lsl #6
	ldr r2, _022E5EE0 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	ldr r2, _022E5EF0 ; =0x00001770
	cmp r1, #0
	cmpeq r0, r2
	bls _022E5C18
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x3cd]
	add r1, r1, #1
	strb r1, [r0, #0x3cd]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x3cd]
	cmp r0, #5
	bls _022E58AC
	bl ov00_022E6550
	bl ov00_022EC1C0
	ldr r0, [r0, #0xf4]
	bl ov00_022E9900
	cmp r0, #0
	bne _022E5C18
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E58AC:
	bl ov00_022EC1C0
	mov r7, r0
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	add r1, r4, #0x3d4
	str r1, [sp]
	add r3, r5, #0x300
	ldr r1, [r0, #0x458]
	mov r0, #6
	str r1, [sp, #4]
	ldr r1, [r7, #0x454]
	ldr r2, [r6, #0x3d0]
	ldrh r3, [r3, #0xce]
	bl ov00_022E78AC
	bl ov00_022E9108
	cmp r0, #0
	beq _022E5C18
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E590C:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x3cc]
	cmp r0, #2
	bne _022E5C18
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	bne _022E5974
	bl sub_0207AE44
	mov r4, r0
	mov r5, r1
	bl ov00_022EC1C0
	ldr r1, [r0, #0x45c]
	ldr r0, [r0, #0x460]
	subs r3, r4, r1
	sbc r0, r5, r0
	mov r1, r0, lsl #6
	ldr r2, _022E5EE0 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	ldr r2, _022E5EF0 ; =0x00001770
	cmp r1, #0
	cmpeq r0, r2
	bhi _022E59CC
_022E5974:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	beq _022E5C18
	bl sub_0207AE44
	mov r4, r0
	mov r5, r1
	bl ov00_022EC1C0
	ldr r1, [r0, #0x45c]
	ldr r0, [r0, #0x460]
	subs r3, r4, r1
	sbc r0, r5, r0
	mov r1, r0, lsl #6
	ldr r2, _022E5EE0 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	ldr r2, _022E5EF4 ; =0x00004A38
	cmp r1, #0
	cmpeq r0, r2
	bls _022E5C18
_022E59CC:
	bl ov00_022E6550
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	add r0, r0, #1
	add r0, r4, r0, lsl #2
	ldr r0, [r0, #0xf4]
	bl ov00_022E96E4
	cmp r0, #0
	bne _022E5C18
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E5A00:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x3cc]
	cmp r0, #8
	bne _022E5C18
	bl sub_0207AE44
	mov r4, r0
	mov r5, r1
	bl ov00_022EC1C0
	ldr r1, [r0, #0x45c]
	ldr r0, [r0, #0x460]
	subs r3, r4, r1
	sbc r0, r5, r0
	mov r1, r0, lsl #6
	ldr r2, _022E5EE0 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	ldr r2, _022E5EF8 ; =0x00007530
	cmp r1, #0
	cmpeq r0, r2
	bls _022E5C18
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x3cd]
	add r1, r1, #1
	strb r1, [r0, #0x3cd]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x3cd]
	cmp r0, #0
	beq _022E5AC0
	bl ov00_022E6550
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	bne _022E5AB8
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	add r0, r4, r0, lsl #2
	ldr r0, [r0, #0xf4]
	bl ov00_022E96E4
	cmp r0, #0
	bne _022E5C18
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E5AB8:
	bl ov00_022EA488
	b _022E5C18
_022E5AC0:
	bl ov00_022EC1C0
	mov r7, r0
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	add r1, r4, #0x3d4
	str r1, [sp]
	add r3, r5, #0x300
	ldr r1, [r0, #0x458]
	mov r0, #8
	str r1, [sp, #4]
	ldr r1, [r7, #0x454]
	ldr r2, [r6, #0x3d0]
	ldrh r3, [r3, #0xce]
	bl ov00_022E78AC
	bl ov00_022E9108
	cmp r0, #0
	beq _022E5C18
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E5B20:
	bl ov00_022E1FC0
	cmp r0, #5
	bne _022E5C18
	bl sub_0207AE44
	mov r4, r0
	mov r5, r1
	bl ov00_022EC1C0
	ldr r1, [r0, #0x1f8]
	ldr r0, [r0, #0x1fc]
	subs r3, r4, r1
	sbc r0, r5, r0
	mov r1, r0, lsl #6
	ldr r2, _022E5EE0 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	ldr r2, _022E5EF8 ; =0x00007530
	cmp r1, #0
	cmpeq r0, r2
	bls _022E5C18
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1ad]
	cmp r0, #5
	blo _022E5BA0
	bl ov00_022EC1C0
	ldr r0, [r0, #0xf4]
	bl ov00_022E9900
	cmp r0, #0
	bne _022E5C18
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022E5BA0:
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [sp]
	str r1, [sp, #4]
	ldrh r3, [r0, #0xa4]
	ldr r1, [r5, #0xf4]
	ldr r2, [r4, #0x24]
	mov r0, #0x40
	bl ov00_022E78AC
	bl ov00_022E9108
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x1ad]
	add r1, r1, #1
	strb r1, [r0, #0x1ad]
	bl ov00_022EC1C0
	mov r4, r0
	bl sub_0207AE44
	ldr r2, _022E5EFC ; =0xFF403B3A
	mvn r3, #0
	adds r0, r0, r2
	str r0, [r4, #0x1f8]
	adc r0, r1, r3
	str r0, [r4, #0x1fc]
_022E5C18:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xb
	beq _022E5C38
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #6
	bne _022E5CB0
_022E5C38:
	bl ov00_022EC1C0
	ldr r1, [r0, #0x188]
	ldr r0, [r0, #0x184]
	cmp r1, #0
	cmpeq r0, #0
	beq _022E5CB0
	bl sub_0207AE44
	mov r4, r0
	mov r5, r1
	bl ov00_022EC1C0
	ldr r1, [r0, #0x184]
	ldr r0, [r0, #0x188]
	subs r3, r4, r1
	sbc r0, r5, r0
	mov r1, r0, lsl #6
	ldr r2, _022E5EE0 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	ldr r2, _022E5F00 ; =0x00002710
	cmp r1, #0
	cmpeq r0, r2
	bls _022E5CB0
	bl ov00_022EC1C0
	mov r1, #0
	add r3, r0, #0x194
	mov r2, r1
	mov r0, #1
	bl ov00_022EBD5C
_022E5CB0:
	bl ov00_022EC1C0
	ldr r0, [r0, #0xe4]
	cmp r0, #0
	beq _022E5D70
	ldr r0, _022E5F04 ; =ov00_02326F48
	mov r1, #0
	str r1, [r0, #0x18]
	str r1, [r0, #0x14]
	bl ov00_022EC1C0
	ldr r0, [r0, #0xe4]
	bl ov00_02315D00
	ldr r0, _022E5F04 ; =ov00_02326F48
	ldr r0, [r0, #0x14]
	cmp r0, #0
	beq _022E5D04
	bl ov00_022EC1C0
	ldr r0, [r0, #0xe4]
	bl ov00_02315AD8
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0xe4]
_022E5D04:
	bl ov00_022EC1C0
	ldr r0, [r0, #0xe4]
	cmp r0, #0
	beq _022E5D70
	bl ov00_022EC1C0
	ldr r0, [r0, #0xe4]
	bl ov00_02315D4C
	cmp r0, #0
	beq _022E5D70
	bl ov00_022EC1C0
	ldr r1, [r0, #0x178]
	ldr r0, [r0, #0x174]
	cmp r1, #0
	cmpeq r0, #0
	beq _022E5D70
	bl sub_0207AE44
	mov r4, r0
	mov r5, r1
	bl ov00_022EC1C0
	ldr r1, [r0, #0x178]
	ldr r0, [r0, #0x174]
	cmp r5, r1
	cmpeq r4, r0
	bls _022E5D70
	ldr r1, _022E5F08 ; =0xFFFEB3EE
	mov r0, #6
	bl ov00_022E6570
_022E5D70:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	bl ov00_022E53C0
	ldr r0, _022E5F04 ; =ov00_02326F48
	mov r1, #0
	str r1, [r0, #0xc]
	mov r1, #1
	str r1, [r0, #0x10]
	bl ov00_023122B8
	ldr r0, _022E5F04 ; =ov00_02326F48
	mov r2, #0
	str r2, [r0, #0x10]
	ldr r1, [r0, #0xc]
	cmp r1, #1
	bne _022E5DB4
	str r2, [r0, #0xc]
	bl ov00_023115E0
_022E5DB4:
	bl ov00_022EC1C0
	ldr r0, [r0, #4]
	cmp r0, #0
	beq _022E5DD4
	bl ov00_022EC1C0
	ldr r0, [r0, #4]
	ldr r0, [r0]
	bl ov00_0230E0B0
_022E5DD4:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0x12
	bne _022E5E3C
	bl sub_0207AE44
	mov r4, r0
	mov r5, r1
	bl ov00_022EC1C0
	ldr r1, [r0, #0x1f0]
	ldr r0, [r0, #0x1f4]
	subs r3, r4, r1
	sbc r0, r5, r0
	mov r1, r0, lsl #6
	ldr r2, _022E5EE0 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	ldr r2, _022E5EE8 ; =0x00000BB8
	cmp r1, #0
	cmpeq r0, r2
	bls _022E5E3C
	bl ov00_022EA4BC
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
_022E5E3C:
	bl ov00_022EA848
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	bl ov00_022EAD5C
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	bl ov00_022EB1F4
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1ae]
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xa
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	strb r0, [r4, #0x16]
	bl ov00_022E6D08
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1ae]
	bl ov00_022EC1C0
	ldr r0, [r0, #0x47c]
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x480]
	ldr r1, [r4, #0x47c]
	blx r1
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022E5EE0: .word 0x000082EA
_022E5EE4: .word 0xFFFEC5D2
_022E5EE8: .word 0x00000BB8
_022E5EEC: .word 0x000061A8
_022E5EF0: .word 0x00001770
_022E5EF4: .word 0x00004A38
_022E5EF8: .word 0x00007530
_022E5EFC: .word 0xFF403B3A
_022E5F00: .word 0x00002710
_022E5F04: .word ov00_02326F48
_022E5F08: .word 0xFFFEB3EE
	arm_func_end ov00_022E5470

	arm_func_start ov00_022E5F0C
ov00_022E5F0C: ; 0x022E5F0C
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #8
	ldr r0, [sp, #0x18]
	mov r4, r3
	cmp r0, #0
	cmpne r4, #0
	mov r5, r1
	mov r6, r2
	addeq sp, sp, #8
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	add r1, sp, #0
	mov r0, #0
	mov r2, #8
	bl ArrayFill32
	mov r1, r6, asr #8
	mov r0, r6, lsl #8
	mov r2, #2
	and r1, r1, #0xff
	and r0, r0, #0xff00
	orr r0, r1, r0
	strb r2, [sp, #1]
	strh r0, [sp, #2]
	str r5, [sp, #4]
	ldrb r5, [r4]
	cmp r5, #0xfe
	ldreqb r0, [r4, #1]
	cmpeq r0, #0xfd
	beq _022E5F88
	cmp r5, #0x5c
	bne _022E5FB4
_022E5F88:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	cmp r0, #0
	beq _022E5FF0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	ldr r2, [sp, #0x18]
	add r3, sp, #0
	mov r1, r4
	bl ov00_02313D58
	b _022E5FF0
_022E5FB4:
	ldr r1, _022E5FFC ; =ov00_0231BF24
	mov r0, r4
	mov r2, #6
	bl memcmp
	cmp r0, #0
	bne _022E5FE0
	ldr r1, [sp, #0x18]
	add r2, sp, #0
	mov r0, r4
	bl ov00_0231268C
	b _022E5FF0
_022E5FE0:
	add sp, sp, #8
	cmp r5, #0xfe
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022E5FF0:
	mov r0, #1
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022E5FFC: .word ov00_0231BF24
	arm_func_end ov00_022E5F0C

	arm_func_start ov00_022E6000
ov00_022E6000: ; 0x022E6000
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r8, r1
	mov r7, r2
	mov r6, r3
	bl ov00_022EC1C0
	cmp r0, #0
	beq _022E603C
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #7
	bne _022E603C
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a9]
	cmp r0, #0
	beq _022E6050
_022E603C:
	ldr r1, _022E6230 ; =ov00_0231A1D0
	mov r0, r8
	mvn r2, #0
	bl ov00_0230E0F8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022E6050:
	bl ov00_022E2128
	mov r5, r0
	mvn r2, #0
	cmp r5, r2
	bne _022E6080
	ldr r1, _022E6234 ; =ov00_0231A1DC
	mov r0, r8
	bl ov00_0230E0F8
	ldr r1, _022E6238 ; =0xFFFEABC4
	mov r0, #6
	bl ov00_022E6570
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022E6080:
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	add r0, r4, r0, lsl #2
	ldr r0, [r0, #0x210]
	cmp r7, r0
	bne _022E60C4
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	add r0, r4, r0, lsl #1
	add r0, r0, #0x200
	ldrh r0, [r0, #0x90]
	cmp r6, r0
	beq _022E6150
_022E60C4:
	ldr r0, [sp, #0x24]
	ldrb r1, [r0]
	cmp r1, #0
	beq _022E613C
	mov r1, #0
	mov r2, #0xa
	bl sub_0208B200
	mov r4, r0
	bl ov00_022EC1C0
	mov sb, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	add r0, sb, r0, lsl #2
	ldr r0, [r0, #0xf4]
	cmp r4, r0
	bne _022E613C
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	add r0, r4, r0, lsl #2
	str r7, [r0, #0x210]
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	add r0, r4, r0, lsl #1
	add r0, r0, #0x200
	strh r6, [r0, #0x90]
	b _022E6150
_022E613C:
	ldr r1, _022E623C ; =ov00_0231A1E8
	mov r0, r8
	mvn r2, #0
	bl ov00_0230E0F8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022E6150:
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x18c]
	str r1, [r0, #0x190]
	bl ov00_022EC1C0
	ldr r1, [r0, #8]
	mov r0, r8
	bl ov00_0230E0EC
	cmp r0, #0
	bne _022E6188
	ldr r1, _022E6240 ; =0xFFFEC5E6
	mov r0, #6
	bl ov00_022E6570
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022E6188:
	bl ov00_022E6550
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #0
	bne _022E61BC
	ldr r1, [sp, #0x20]
	ldr r0, _022E6244 ; =0x0000FFFF
	mov r4, r1, asr #1
	cmp r0, r1, asr #1
	movle r4, r0
	bl ov00_022EC1C0
	add r0, r0, #0x100
	strh r4, [r0, #0xb0]
_022E61BC:
	mov r0, r5
	bl ov00_022E2184
	mov r4, r0
	mov r0, r5
	bl ov00_022E21FC
	str r8, [r4]
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r1, [r0, #0xd]
	add r1, r1, #1
	strb r1, [r0, #0xd]
	strb r5, [r4]
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	ldrb r1, [r0, #0xd]
	mov r0, r8
	mov r2, #0
	sub r1, r1, #1
	add r1, r5, r1
	ldrb r3, [r1, #0x2d0]
	mov r1, r4
	strb r3, [r4, #1]
	strh r2, [r4, #2]
	str r2, [r4, #4]
	bl ov00_0230E458
	mov r0, #2
	bl ov00_022E9AA4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022E6230: .word ov00_0231A1D0
_022E6234: .word ov00_0231A1DC
_022E6238: .word 0xFFFEABC4
_022E623C: .word ov00_0231A1E8
_022E6240: .word 0xFFFEC5E6
_022E6244: .word 0x0000FFFF
	arm_func_end ov00_022E6000

	arm_func_start ov00_022E6248
ov00_022E6248: ; 0x022E6248
	stmdb sp!, {r4, r5, r6, r7, lr}
	sub sp, sp, #0x1c
	mov r6, r0
	mov r4, r1
	bl ov00_022EC1C0
	cmp r0, #0
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r4, r5, r6, r7, pc}
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #7
	beq _022E628C
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xc
	addne sp, sp, #0x1c
	ldmneia sp!, {r4, r5, r6, r7, pc}
_022E628C:
	cmp r4, #0
	beq _022E6408
	cmp r4, #5
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r4, r5, r6, r7, pc}
	cmp r4, #6
	bne _022E63DC
	bl ov00_022EC1C0
	ldrb r1, [r0, #0xc]
	add r1, r1, #1
	strb r1, [r0, #0xc]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xc]
	cmp r0, #5
	bls _022E62F8
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0xc]
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x14]
	add r0, r4, r0, lsl #2
	ldr r0, [r0, #0xf4]
	bl ov00_022E96E4
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, pc}
_022E62F8:
	bl ov00_022EC1C0
	ldr r3, [r0, #0x200]
	ldr r2, _022E64C0 ; =ov00_0231A1C0
	add r0, sp, #0x10
	mov r1, #0xc
	bl sub_0207911C
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	mov r7, r0
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	ldrb r2, [r6, #0x14]
	ldrb r1, [r0, #0x14]
	add r0, r7, r2, lsl #2
	add r1, r5, r1, lsl #1
	add r1, r1, #0x200
	ldrh r1, [r1, #0x90]
	ldr r0, [r0, #0x210]
	mov r2, #0
	bl ov00_02310BF4
	mov r5, r0
	bl ov00_022EC1C0
	mvn r1, #0
	str r1, [sp]
	ldr r3, _022E64C4 ; =0x00001388
	mov r1, #0
	str r3, [sp, #4]
	ldr r0, [r0, #8]
	mov r2, r5
	str r0, [sp, #8]
	str r1, [sp, #0xc]
	ldr r0, [r4, #4]
	add r3, sp, #0x10
	ldr r0, [r0]
	bl ov00_0230E104
	cmp r0, #1
	bne _022E63A8
	bl ov00_022EB8CC
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, pc}
_022E63A8:
	cmp r0, #0
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r4, r5, r6, r7, pc}
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x14]
	add r0, r4, r0, lsl #2
	ldr r0, [r0, #0xf4]
	bl ov00_022E96E4
	add sp, sp, #0x1c
	cmp r0, #0
	ldmia sp!, {r4, r5, r6, r7, pc}
_022E63DC:
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	add r0, r0, #1
	add r0, r4, r0, lsl #2
	ldr r0, [r0, #0xf4]
	bl ov00_022E96E4
	add sp, sp, #0x1c
	cmp r0, #0
	ldmia sp!, {r4, r5, r6, r7, pc}
_022E6408:
	bl ov00_022E2128
	mov r5, r0
	mvn r1, #0
	cmp r5, r1
	bne _022E6430
	ldr r1, _022E64C8 ; =0xFFFEABC4
	mov r0, #6
	bl ov00_022E6570
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, pc}
_022E6430:
	bl ov00_022E2184
	mov r4, r0
	mov r0, r5
	bl ov00_022E21FC
	str r6, [r4]
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r2, [r0, #0xd]
	mov r1, #0
	add r2, r2, #1
	strb r2, [r0, #0xd]
	strb r5, [r4]
	strh r1, [r4, #2]
	str r1, [r4, #4]
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	ldrb r2, [r0, #0xd]
	mov r0, r6
	mov r1, r4
	add r2, r5, r2
	ldrb r2, [r2, #0x2d0]
	strb r2, [r4, #1]
	bl ov00_0230E458
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xc
	bne _022E64B0
	mov r0, #0
	bl ov00_022E9AA4
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, pc}
_022E64B0:
	mov r0, #1
	bl ov00_022E9AA4
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, pc}
	.align 2, 0
_022E64C0: .word ov00_0231A1C0
_022E64C4: .word 0x00001388
_022E64C8: .word 0xFFFEABC4
	arm_func_end ov00_022E6248

	arm_func_start ov00_022E64CC
ov00_022E64CC: ; 0x022E64CC
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x218
	mov sb, #0
	mov fp, r1
	mov sl, r2
	add r8, sp, #8
	mov r7, sb
	mov r6, #0xa
	add r5, sp, #0x18
	mvn r4, #0
_022E64F4:
	mov r0, r8
	mov r2, sb
	add r1, sl, #1
	bl ov00_022E7C4C
	cmp r0, r4
	beq _022E652C
	mov r0, r8
	mov r1, r7
	mov r2, r6
	bl sub_0208B200
	str r0, [r5, sb, lsl #2]
	add sb, sb, #1
	cmp sb, #0x80
	blt _022E64F4
_022E652C:
	add r0, sp, #0x18
	stmia sp, {r0, sb}
	mov r2, #0
	ldrb r0, [sl]
	mov r1, fp
	mov r3, r2
	bl ov00_022E7CE8
	add sp, sp, #0x218
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022E64CC

	arm_func_start ov00_022E6550
ov00_022E6550: ; 0x022E6550
	stmdb sp!, {r3, lr}
	bl ov00_022EC1C0
	mov r1, #0xff
	strb r1, [r0, #0x3cc]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x3cd]
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022E6550

	arm_func_start ov00_022E6570
ov00_022E6570: ; 0x022E6570
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	sub sp, sp, #8
	mov r4, r0
	mov r5, r1
	bl ov00_022EC1C0
	cmp r0, #0
	cmpne r4, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	bl ov00_022EA5EC
	mov r0, r4
	mov r1, r5
	bl ov00_022E0394
	ldr r1, _022E6628 ; =ov00_0231A1BC
	mov r0, #1
	mov r2, #0
	bl ov00_022E3E54
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	moveq r7, #1
	movne r7, #0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x20c]
	cmp r0, #0
	moveq r8, #1
	movne r8, #0
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x20c]
	bl ov00_022E3DB8
	mov r5, r0
	bl ov00_022EC1C0
	str r5, [sp]
	ldr r1, [r0, #0x468]
	mov r0, r4
	str r1, [sp, #4]
	ldr r4, [r6, #0x464]
	mov r2, r8
	mov r3, r7
	mov r1, #0
	blx r4
	bl ov00_022E7204
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022E6628: .word ov00_0231A1BC
	arm_func_end ov00_022E6570

	arm_func_start ov00_022E662C
ov00_022E662C: ; 0x022E662C
	stmdb sp!, {r3, lr}
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	ldmeqia sp!, {r3, pc}
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x14]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x16]
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	bl ov00_02312BF4
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022E662C

	arm_func_start ov00_022E6668
ov00_022E6668: ; 0x022E6668
	stmdb sp!, {r4, r5, r6, lr}
	mov r5, r0
	mov r4, r2
	cmp r1, #2
	beq _022E6690
	cmp r1, #3
	beq _022E673C
	cmp r1, #4
	beq _022E6804
	ldmia sp!, {r4, r5, r6, pc}
_022E6690:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #1
	bne _022E672C
	ldrb r0, [r4]
	cmp r0, #1
	bne _022E66B8
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x20c]
_022E66B8:
	ldrb r6, [r4, #1]
	bl ov00_022EC1C0
	ldrb r1, [r4, #2]
	add r0, r0, r6
	strb r1, [r0, #0x2d0]
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldr r1, [r0, #0x200]
	add r0, r4, r6, lsl #2
	str r1, [r0, #0xf4]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	beq _022E6704
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	bne _022E6718
_022E6704:
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	strb r0, [r4, #0x16]
_022E6718:
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1ad]
	mov r0, #9
	bl ov00_022EC1D0
_022E672C:
	mov r0, r5
	mov r1, #3
	bl ov00_022EA758
	ldmia sp!, {r4, r5, r6, pc}
_022E673C:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0x10
	bne _022E67F4
	bl ov00_022EC1C0
	ldr r2, [r0, #0x1d4]
	mov r1, #1
	orr r1, r2, r1, lsl r5
	str r1, [r0, #0x1d4]
	ldrb r1, [r4]
	ldrb r0, [r4, #1]
	orr r4, r1, r0, lsl #8
	bl ov00_022EC1C0
	add r0, r0, #0x100
	ldrh r0, [r0, #0xb0]
	cmp r4, r0
	ble _022E678C
	bl ov00_022EC1C0
	add r0, r0, #0x100
	strh r4, [r0, #0xb0]
_022E678C:
	mov r0, #0
	bl ov00_022EB0F8
	mov r4, r0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1d4]
	cmp r4, r0
	ldmneia sp!, {r4, r5, r6, pc}
	mov r5, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	blt _022E67E8
	mov r4, #4
_022E67C0:
	bl ov00_022EC1C0
	add r0, r0, r5
	ldrb r0, [r0, #0x2d0]
	mov r1, r4
	bl ov00_022EA758
	add r5, r5, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r5, r0
	ble _022E67C0
_022E67E8:
	mov r0, #0x11
	bl ov00_022EC1D0
	ldmia sp!, {r4, r5, r6, pc}
_022E67F4:
	mov r0, r5
	mov r1, #4
	bl ov00_022EA758
	ldmia sp!, {r4, r5, r6, pc}
_022E6804:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #9
	ldmneia sp!, {r4, r5, r6, pc}
	mov r0, #4
	bl ov00_022E9AA4
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022E6668

	arm_func_start ov00_022E6820
ov00_022E6820: ; 0x022E6820
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	bl ov00_022E1FC0
	cmp r0, #5
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, pc}
	cmp r5, #0
	beq _022E6870
	ldr r1, _022E6994 ; =0xFFFEC780
	mov r0, r5
	add r1, r4, r1
	bl ov00_022E6570
	mov r0, #1
	ldmia sp!, {r3, r4, r5, pc}
_022E6870:
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x2d0]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a9]
	cmp r0, #1
	beq _022E68AC
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a8]
	cmp r0, #1
	beq _022E68AC
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a8]
	cmp r0, #2
	bne _022E68B4
_022E68AC:
	mov r0, #1
	ldmia sp!, {r3, r4, r5, pc}
_022E68B4:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x19c]
	cmp r0, #0
	beq _022E68DC
	bl ov00_022EC1C0
	ldr r0, [r0, #0x19c]
	bl ov00_02311FB0
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x19c]
_022E68DC:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #0
	beq _022E691C
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a8]
	cmp r0, #0
	bne _022E698C
	bl ov00_022EC1C0
	mov r1, #3
	strb r1, [r0, #0x1a8]
	bl ov00_022EC1C0
	ldr r0, [r0, #4]
	ldr r0, [r0]
	bl ov00_0230E3A4
	b _022E698C
_022E691C:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	bne _022E693C
	ldr r1, _022E6998 ; =0xFFFEC5D2
	mov r0, #6
	bl ov00_022E6570
	b _022E698C
_022E693C:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x208]
	cmp r0, #0
	beq _022E6954
	bl ov00_022EA4BC
	b _022E698C
_022E6954:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #1
	bne _022E6984
	mov r0, #0x12
	bl ov00_022EC1D0
	bl ov00_022EC1C0
	mov r4, r0
	bl sub_0207AE44
	str r0, [r4, #0x1f0]
	str r1, [r4, #0x1f4]
	b _022E698C
_022E6984:
	mov r0, #1
	bl ov00_022EA388
_022E698C:
	mov r0, #1
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022E6994: .word 0xFFFEC780
_022E6998: .word 0xFFFEC5D2
	arm_func_end ov00_022E6820

	arm_func_start ov00_022E699C
ov00_022E699C: ; 0x022E699C
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a8]
	cmp r0, #2
	ldmeqia sp!, {r4, pc}
	mov r0, r4
	bl ov00_022E96E4
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022E699C

	arm_func_start ov00_022E69C0
ov00_022E69C0: ; 0x022E69C0
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	bl ov00_022EC1C0
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	cmp r5, #0
	mov r4, #0
	ble _022E6A1C
_022E69E8:
	bl ov00_022EC1C0
	add r0, r0, r4, lsl #2
	ldr r0, [r0, #0xf4]
	cmp r6, r0
	bne _022E6A10
	mov r0, r4
	mov r1, r5
	bl ov00_022E6A24
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
_022E6A10:
	add r4, r4, #1
	cmp r4, r5
	blt _022E69E8
_022E6A1C:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022E69C0

	arm_func_start ov00_022E6A24
ov00_022E6A24: ; 0x022E6A24
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov sb, r0
	mov r8, r1
	bl ov00_022EC1C0
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	bl ov00_022EC1C0
	add r0, r0, sb, lsl #2
	ldr fp, [r0, #0xf4]
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	add r0, r0, sb
	ldrb r0, [r0, #0x2d0]
	mov r1, #1
	ldr r2, [r4, #0x2f0]
	mvn r0, r1, lsl r0
	and r0, r2, r0
	str r0, [r4, #0x2f0]
	bl ov00_022E6BDC
	sub r0, r8, #1
	cmp sb, r0
	bge _022E6B64
	sub r0, r8, sb
	sub r5, r0, #1
	cmp r5, #0
	mov r4, #0
	ble _022E6B64
_022E6A98:
	add r7, sb, r4
	add r6, r7, #1
	bl ov00_022EC1C0
	mov sl, r0
	bl ov00_022EC1C0
	add r0, r0, r6, lsl #2
	ldr r1, [r0, #0x24]
	add r0, sl, r7, lsl #2
	str r1, [r0, #0x24]
	bl ov00_022EC1C0
	mov sl, r0
	bl ov00_022EC1C0
	add r0, r0, r6, lsl #1
	ldrh r1, [r0, #0xa4]
	add r0, sl, r7, lsl #1
	strh r1, [r0, #0xa4]
	bl ov00_022EC1C0
	mov sl, r0
	bl ov00_022EC1C0
	add r1, sl, r7, lsl #2
	add r0, r0, r6, lsl #2
	ldr r0, [r0, #0xf4]
	str r0, [r1, #0xf4]
	bl ov00_022EC1C0
	mov sl, r0
	bl ov00_022EC1C0
	add r1, sl, r7, lsl #2
	add r0, r0, r6, lsl #2
	ldr r0, [r0, #0x210]
	str r0, [r1, #0x210]
	bl ov00_022EC1C0
	mov sl, r0
	bl ov00_022EC1C0
	add r1, sl, r7, lsl #1
	add r0, r0, r6, lsl #1
	add r0, r0, #0x200
	ldrh r2, [r0, #0x90]
	add r0, r1, #0x200
	strh r2, [r0, #0x90]
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	add r0, sb, r0
	add r0, r4, r0
	ldrb r1, [r0, #0x2d1]
	add r0, sb, r6
	add r0, r4, r0
	strb r1, [r0, #0x2d0]
	add r4, r4, #1
	cmp r4, r5
	blt _022E6A98
_022E6B64:
	cmp r8, #0
	ble _022E6BD4
	sub r4, r8, #1
	bl ov00_022EC1C0
	add r0, r0, r4, lsl #2
	mov r1, #0
	str r1, [r0, #0x24]
	bl ov00_022EC1C0
	add r0, r0, r4, lsl #1
	mov r1, #0
	strh r1, [r0, #0xa4]
	bl ov00_022EC1C0
	add r0, r0, r4, lsl #2
	mov r1, #0
	str r1, [r0, #0xf4]
	bl ov00_022EC1C0
	add r0, r0, r4, lsl #2
	mov r1, #0
	str r1, [r0, #0x210]
	bl ov00_022EC1C0
	add r0, r0, r4, lsl #1
	add r0, r0, #0x200
	mov r1, #0
	strh r1, [r0, #0x90]
	bl ov00_022EC1C0
	add r0, r0, r4
	mov r1, #0
	strb r1, [r0, #0x2d0]
_022E6BD4:
	mov r0, fp
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022E6A24

	arm_func_start ov00_022E6BDC
ov00_022E6BDC: ; 0x022E6BDC
	stmdb sp!, {r4, r5, r6, lr}
	mvn r5, #0
	mov r6, #0
	mov r4, #1
_022E6BEC:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x2f0]
	tst r0, r4, lsl r6
	add r6, r6, #1
	addne r5, r5, #1
	cmp r6, #0x20
	blt _022E6BEC
	mvn r0, #0
	cmp r5, r0
	bne _022E6C24
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0xe]
	ldmia sp!, {r4, r5, r6, pc}
_022E6C24:
	bl ov00_022EC1C0
	strb r5, [r0, #0xe]
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022E6BDC

	arm_func_start ov00_022E6C30
ov00_022E6C30: ; 0x022E6C30
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022EC1C0
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	bl ov00_022EC1C0
	add r0, r0, #0x2d0
	str r0, [r4]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	add r0, r0, #1
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022E6C30

	arm_func_start ov00_022E6C64
ov00_022E6C64: ; 0x022E6C64
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r7, r0
	bl ov00_022EC1C0
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r0, _022E6D04 ; =ov00_02326F68
	mov r1, #0
	mov r2, #0x20
	bl MemsetFast
	mov r5, #0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xe]
	cmp r0, #0
	blt _022E6CEC
	ldr r6, _022E6D04 ; =ov00_02326F68
	mov r4, #1
_022E6CA8:
	bl ov00_022EC1C0
	mov r8, r0
	bl ov00_022EC1C0
	add r0, r0, r5
	ldrb r0, [r0, #0x2d0]
	ldr r1, [r8, #0x2f0]
	tst r1, r4, lsl r0
	beq _022E6CEC
	bl ov00_022EC1C0
	add r0, r0, r5
	ldrb r0, [r0, #0x2d0]
	add r5, r5, #1
	strb r0, [r6], #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xe]
	cmp r5, r0
	ble _022E6CA8
_022E6CEC:
	ldr r0, _022E6D04 ; =ov00_02326F68
	str r0, [r7]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xe]
	add r0, r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022E6D04: .word ov00_02326F68
	arm_func_end ov00_022E6C64

	arm_func_start ov00_022E6D08
ov00_022E6D08: ; 0x022E6D08
	stmdb sp!, {lr}
	sub sp, sp, #0x2c
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	addne sp, sp, #0x2c
	movne r0, #0
	ldmneia sp!, {pc}
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x16]
	ldr r2, _022E6DC8 ; =ov00_0231A1C0
	add r0, sp, #0x20
	add r3, r1, #1
	mov r1, #0xc
	bl sub_0207911C
	ldr r0, _022E6DCC ; =ov00_0231A200
	add r1, sp, #0x20
	add r2, sp, #0
	mov r3, #0x2f
	bl ov00_022E13D0
	bl ov00_022EC1C0
	ldrb r2, [r0, #0xd]
	add r0, sp, #0x20
	mov r1, #0xc
	add r3, r2, #1
	ldr r2, _022E6DC8 ; =ov00_0231A1C0
	bl sub_0207911C
	ldr r0, _022E6DD0 ; =ov00_0231A204
	add r1, sp, #0x20
	add r2, sp, #0
	mov r3, #0x2f
	bl ov00_022E1408
	ldr r2, _022E6DC8 ; =ov00_0231A1C0
	add r0, sp, #0x20
	mov r1, #0xc
	mov r3, #3
	bl sub_0207911C
	ldr r0, _022E6DD4 ; =ov00_0231A1CC
	add r1, sp, #0x20
	add r2, sp, #0
	mov r3, #0x2f
	bl ov00_022E1408
	mov r0, #6
	add r1, sp, #0
	mov r2, #0
	bl ov00_022E3E54
	add sp, sp, #0x2c
	ldmia sp!, {pc}
	.align 2, 0
_022E6DC8: .word ov00_0231A1C0
_022E6DCC: .word ov00_0231A200
_022E6DD0: .word ov00_0231A204
_022E6DD4: .word ov00_0231A1CC
	arm_func_end ov00_022E6D08

	arm_func_start ov00_022E6DD8
ov00_022E6DD8: ; 0x022E6DD8
	stmdb sp!, {r3, lr}
	mov r0, #0
	bl ov00_022EC1B0
	ldr r0, _022E6E4C ; =ov00_02326F48
	ldr r1, [r0, #8]
	cmp r1, #0
	beq _022E6E0C
	mov r0, #4
	mov r2, #0
	bl ov00_022E0434
	ldr r0, _022E6E4C ; =ov00_02326F48
	mov r1, #0
	str r1, [r0, #8]
_022E6E0C:
	bl ov00_022EAF5C
	ldr r0, _022E6E4C ; =ov00_02326F48
	ldr r1, [r0]
	cmp r1, #0
	beq _022E6E38
	mov r0, #4
	mov r2, #0
	bl ov00_022E0434
	ldr r0, _022E6E4C ; =ov00_02326F48
	mov r1, #0
	str r1, [r0]
_022E6E38:
	ldr r0, _022E6E4C ; =ov00_02326F48
	mov r1, #0
	strb r1, [r0, #0x1c]
	strb r1, [r0, #0x1d]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E6E4C: .word ov00_02326F48
	arm_func_end ov00_022E6DD8

	arm_func_start ov00_022E6E50
ov00_022E6E50: ; 0x022E6E50
	stmdb sp!, {r3, lr}
	bl ov00_022EC1C0
	cmp r0, #0
	moveq r0, #1
	movne r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022E6E50

	arm_func_start ov00_022E6E68
ov00_022E6E68: ; 0x022E6E68
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r0
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0xc]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x17c]
	bl ov00_022EC1C0
	mov r5, r0
	mov r0, #0x10000
	bl ov00_022E1544
	add r1, r5, #0x100
	strh r0, [r1, #0x7e]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x180]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x184]
	str r1, [r0, #0x188]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x18c]
	str r1, [r0, #0x190]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a4]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a9]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1aa]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1ab]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1ac]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a7]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a8]
	bl ov00_022EC1C0
	mov r1, #0
	add r0, r0, #0x100
	strh r1, [r0, #0xb2]
	bl ov00_022EC1C0
	mov r1, #0
	add r0, r0, #0x100
	strh r1, [r0, #0xb4]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1b8]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1e0]
	str r1, [r0, #0x1e4]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1f0]
	str r1, [r0, #0x1f4]
	bl ov00_022EC1C0
	add r1, r0, #0x3cc
	mov r0, #0
	mov r2, #0x98
	bl ArrayFill32
	cmp r4, #2
	bne _022E6FD4
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	strb r0, [r4, #0x14]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	bne _022E6FB8
	mov r0, #1
	bl ov00_022EC1D0
	ldmia sp!, {r3, r4, r5, pc}
_022E6FB8:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	ldmneia sp!, {r3, r4, r5, pc}
	mov r0, #0xa
	bl ov00_022EC1D0
	ldmia sp!, {r3, r4, r5, pc}
_022E6FD4:
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0xd]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0xe]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x14]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x17]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x20]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0xe8]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a5]
	bl ov00_022EC1C0
	mov r1, #0
	add r0, r0, #0x100
	strh r1, [r0, #0xb0]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1bc]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1c0]
	str r1, [r0, #0x1c4]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1c8]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1cc]
	str r1, [r0, #0x1d0]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1d4]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x204]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x208]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x2f0]
	bl ov00_022E2254
	bl ov00_022EC1C0
	add r1, r0, #0x24
	mov r0, #0
	mov r2, #0x80
	bl ArrayFill32
	bl ov00_022EC1C0
	add r1, r0, #0xa4
	mov r0, #0
	mov r2, #0x40
	bl ArrayFill16
	bl ov00_022EC1C0
	add r1, r0, #0xf4
	mov r0, #0
	mov r2, #0x80
	bl ArrayFill32
	bl ov00_022EC1C0
	add r1, r0, #0x194
	mov r0, #0
	mov r2, #0xc
	bl ArrayFill32
	bl ov00_022EC1C0
	add r1, r0, #0x210
	mov r0, #0
	mov r2, #0x80
	bl ArrayFill32
	bl ov00_022EC1C0
	add r1, r0, #0x290
	mov r0, #0
	mov r2, #0x40
	bl ArrayFill16
	bl ov00_022EC1C0
	add r0, r0, #0x2d0
	mov r1, #0
	mov r2, #0x20
	bl MemsetFast
	bl ov00_022EC1C0
	add r1, r0, #0x348
	mov r0, #0
	mov r2, #0x84
	bl ArrayFill32
	cmp r4, #1
	bne _022E7184
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	bne _022E7168
	mov r0, #3
	bl ov00_022EC1D0
	ldmia sp!, {r3, r4, r5, pc}
_022E7168:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	ldmneia sp!, {r3, r4, r5, pc}
	mov r0, #4
	bl ov00_022EC1D0
	ldmia sp!, {r3, r4, r5, pc}
_022E7184:
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x15]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x16]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x18]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x20c]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a6]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1ae]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1ad]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1f8]
	str r1, [r0, #0x1fc]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x46c]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x470]
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022E6E68

	arm_func_start ov00_022E7204
ov00_022E7204: ; 0x022E7204
	stmdb sp!, {r3, lr}
	bl ov00_022EC1C0
	cmp r0, #0
	ldmeqia sp!, {r3, pc}
	bl ov00_022EC1C0
	ldr r0, [r0, #0xe4]
	cmp r0, #0
	beq _022E7254
	ldr r0, _022E729C ; =ov00_02326F48
	ldr r1, [r0, #0x18]
	cmp r1, #0
	movne r1, #1
	strne r1, [r0, #0x14]
	bne _022E7254
	bl ov00_022EC1C0
	ldr r0, [r0, #0xe4]
	bl ov00_02315AD8
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0xe4]
_022E7254:
	bl ov00_022E5080
	mov r0, #0
	bl ov00_022EC1D0
	ldr r0, _022E729C ; =ov00_02326F48
	ldr r1, [r0, #8]
	cmp r1, #0
	beq _022E7288
	mov r0, #4
	mov r2, #0
	bl ov00_022E0434
	ldr r0, _022E729C ; =ov00_02326F48
	mov r1, #0
	str r1, [r0, #8]
_022E7288:
	bl ov00_022EAF5C
	bl ov00_022EC1C0
	mov r1, #1
	strb r1, [r0, #0x18]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022E729C: .word ov00_02326F48
	arm_func_end ov00_022E7204

	arm_func_start ov00_022E72A0
ov00_022E72A0: ; 0x022E72A0
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x1b0
	mov r7, #8
	mov r6, #0xa
	mov r5, #0x32
	mov r4, #0x33
	mov r3, #0x34
	mov r2, #0x35
	mov r1, #0x36
	strb r7, [sp, #0xc]
	strb r6, [sp, #0xd]
	strb r5, [sp, #0xe]
	strb r4, [sp, #0xf]
	strb r3, [sp, #0x10]
	strb r2, [sp, #0x11]
	strb r1, [sp, #0x12]
	mov r4, r0
	mov r8, #7
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	beq _022E7308
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	bne _022E7334
_022E7308:
	ldr r2, _022E7484 ; =ov00_02326F88
	add r3, sp, #0x13
	mov r1, #0
_022E7314:
	ldrb r0, [r2]
	add r1, r1, #1
	add r2, r2, #0xc
	cmp r0, #0
	strneb r0, [r3], #1
	addne r8, r8, #1
	cmp r1, #0x9a
	blt _022E7314
_022E7334:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #5
	addls pc, pc, r0, lsl #2
	b _022E73EC
_022E7348: ; jump table
	b _022E73EC ; case 0
	b _022E73EC ; case 1
	b _022E73CC ; case 2
	b _022E7360 ; case 3
	b _022E73CC ; case 4
	b _022E73CC ; case 5
_022E7360:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x208]
	cmp r0, #0
	bne _022E73C4
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldr r1, [r5, #0x200]
	ldrb r2, [r4, #0x16]
	ldrb r3, [r0, #0x15]
	add r0, sp, #0xad
	bl ov00_022E749C
	mov r1, r0
	ldr r0, _022E7488 ; =ov00_02326F48
	ldr r3, [r0, #8]
	cmp r3, #0
	beq _022E73EC
	add r0, sp, #0xad
	add r0, r0, r1
	ldr r2, _022E748C ; =ov00_0231A234
	rsb r1, r1, #0x100
	bl sub_0207911C
	b _022E73EC
_022E73C4:
	bl ov00_022EC1C0
	ldr r4, [r0, #0x208]
_022E73CC:
	ldr r2, _022E7490 ; =ov00_0231A240
	ldr r3, _022E7494 ; =ov00_0231A208
	add r0, sp, #0xad
	mov r1, #0x100
	str r4, [sp]
	bl sub_0207911C
	bl ov00_022EC1C0
	str r4, [r0, #0x204]
_022E73EC:
	bl ov00_022EC1C0
	ldr r0, [r0, #0xe4]
	bl ov00_02315D34
	mov sl, #0
	add r7, sp, #0xad
	mov r6, #6
	mov r5, #1
	mov r4, sl
	add fp, sp, #0xc
_022E7410:
	bl ov00_022EC1C0
	str r8, [sp]
	str r7, [sp, #4]
	str r6, [sp, #8]
	ldr r0, [r0, #0xe4]
	mov r1, r5
	mov r2, r4
	mov r3, fp
	bl ov00_02315C2C
	movs sb, r0
	beq _022E7450
	cmp sb, #2
	bne _022E7450
	add sl, sl, #1
	cmp sl, #5
	blt _022E7410
_022E7450:
	cmp sb, #0
	bne _022E7478
	bl ov00_022EC1C0
	mov r4, r0
	bl sub_0207AE44
	ldr r2, _022E7498 ; =0x00EFB5F7
	adds r0, r0, r2
	str r0, [r4, #0x174]
	adc r0, r1, #0
	str r0, [r4, #0x178]
_022E7478:
	mov r0, sb
	add sp, sp, #0x1b0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022E7484: .word ov00_02326F88
_022E7488: .word ov00_02326F48
_022E748C: .word ov00_0231A234
_022E7490: .word ov00_0231A240
_022E7494: .word ov00_0231A208
_022E7498: .word 0x00EFB5F7
	arm_func_end ov00_022E72A0

	arm_func_start ov00_022E749C
ov00_022E749C: ; 0x022E749C
	stmdb sp!, {lr}
	sub sp, sp, #0x24
	mov lr, #3
	ldr ip, _022E74F0 ; =ov00_0231A208
	str lr, [sp]
	str ip, [sp, #4]
	str r1, [sp, #8]
	str r2, [sp, #0xc]
	str r2, [sp, #0x10]
	ldr r2, _022E74F4 ; =ov00_0231A210
	ldr r1, _022E74F8 ; =ov00_0231A21C
	str r2, [sp, #0x14]
	str r3, [sp, #0x18]
	str r1, [sp, #0x1c]
	ldr r2, _022E74FC ; =ov00_0231A248
	ldr r3, _022E7500 ; =ov00_0231A228
	mov r1, #0x100
	str ip, [sp, #0x20]
	bl sub_0207911C
	add sp, sp, #0x24
	ldmia sp!, {pc}
	.align 2, 0
_022E74F0: .word ov00_0231A208
_022E74F4: .word ov00_0231A210
_022E74F8: .word ov00_0231A21C
_022E74FC: .word ov00_0231A248
_022E7500: .word ov00_0231A228
	arm_func_end ov00_022E749C

	arm_func_start ov00_022E7504
ov00_022E7504: ; 0x022E7504
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x10
	mov r4, r0
	mov r8, r1
	mov r7, r2
	bl ov00_022EC1C0
	cmp r4, #0
	ldrb r4, [r0, #0x14]
	mov r6, #0
	bne _022E7748
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	add r0, r0, #0x100
	ldrh r2, [r0, #0x7e]
	ldr r1, [r5, #0x200]
	mov r0, r7
	mov r1, r1, lsl #0x10
	mov r2, r2, lsl #0x10
	orr r8, r2, r1, lsr #16
	bl ov00_02315340
	cmp r0, #0
	beq _022E75C0
	mov r0, r7
	bl ov00_0231530C
	mov r5, r0
	bl ov00_022EC1C0
	ldr r0, [r0, #0xe4]
	bl ov00_02315D90
	cmp r5, r0
	movne r5, #1
	bne _022E7648
	bl ov00_022EC1C0
	mov r5, r0
	mov r0, r7
	bl ov00_02315358
	add r1, r5, r4, lsl #2
	str r0, [r1, #0x210]
	bl ov00_022EC1C0
	mov r5, r0
	mov r0, r7
	bl ov00_02315360
	add r1, r5, r4, lsl #1
	add r1, r1, #0x200
	strh r0, [r1, #0x90]
	mov r5, r6
	b _022E7648
_022E75C0:
	bl ov00_022CF528
	mov r0, r0, lsl #0x10
	mov r2, r0, lsr #0x10
	mov r0, r2, lsl #0x10
	ldr r1, _022E77EC ; =0x0000A8C0
	mov r0, r0, lsr #0x10
	cmp r0, r1
	beq _022E7608
	and r1, r2, #0xff
	cmp r1, #0xac
	bne _022E7600
	and r0, r2, #0xff00
	cmp r0, #0x1000
	blo _022E7600
	cmp r0, #0x1f00
	bls _022E7608
_022E7600:
	cmp r1, #0xa
	bne _022E7610
_022E7608:
	mov r5, #1
	b _022E7648
_022E7610:
	bl ov00_022EC1C0
	mov r5, r0
	mov r0, r7
	bl ov00_0231530C
	add r1, r5, r4, lsl #2
	str r0, [r1, #0x210]
	bl ov00_022EC1C0
	mov r5, r0
	mov r0, r7
	bl ov00_02315314
	add r1, r5, r4, lsl #1
	add r1, r1, #0x200
	strh r0, [r1, #0x90]
	mov r5, #0
_022E7648:
	cmp r5, #0
	beq _022E7674
	bl ov00_022EC1C0
	mov r4, r0
	mov r0, #0x10000
	bl ov00_022E1544
	add r1, r4, #0x100
	strh r0, [r1, #0x7e]
	bl ov00_022EC1C0
	str r8, [r0, #0x19c]
	b _022E7700
_022E7674:
	bl ov00_022CF528
	str r0, [sp, #8]
	bl ov00_022EC1C0
	ldr r0, [r0, #4]
	ldr r0, [r0]
	bl ov00_0230E428
	str r0, [sp, #0xc]
	bl ov00_022EC1C0
	mov sb, r0
	mov r0, r7
	bl ov00_0231530C
	mov r8, r0
	mov r0, r7
	bl ov00_02315314
	add r1, sb, r4, lsl #2
	add r4, sp, #8
	mov r3, r0
	mov r0, #2
	str r4, [sp]
	str r0, [sp, #4]
	ldr r1, [r1, #0xf4]
	mov r2, r8
	mov r0, #6
	bl ov00_022E78AC
	mov r4, r0
	bl ov00_022EC1C0
	mov r1, #0
	cmp r4, #0
	strb r1, [r0, #0x3cd]
	addne sp, sp, #0x10
	movne r0, #2
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x19c]
_022E7700:
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x194]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x195]
	bl ov00_022EC1C0
	mov r4, r0
	mov r0, r7
	bl ov00_02315314
	add r1, r4, #0x100
	strh r0, [r1, #0x96]
	bl ov00_022EC1C0
	mov r4, r0
	mov r0, r7
	bl ov00_0231530C
	str r0, [r4, #0x198]
	b _022E7788
_022E7748:
	bl ov00_022EC1C0
	mov r1, #1
	strb r1, [r0, #0x194]
	bl ov00_022EC1C0
	mov r1, r6
	strb r1, [r0, #0x195]
	bl ov00_022EC1C0
	add r0, r0, #0x100
	mov r1, r6
	strh r1, [r0, #0x96]
	bl ov00_022EC1C0
	mov r1, r6
	str r1, [r0, #0x198]
	bl ov00_022EC1C0
	str r8, [r0, #0x19c]
	mov r5, #1
_022E7788:
	cmp r5, #0
	beq _022E77A4
	bl ov00_022EC1C0
	add r0, r0, #0x194
	bl ov00_022E77F0
	mov r6, r0
	b _022E77E0
_022E77A4:
	bl ov00_022EC1C0
	ldr r0, [r0, #4]
	ldr r0, [r0]
	bl ov00_0230E448
	mov r4, r0
	bl ov00_022EC1C0
	add r3, r0, #0x194
	mov r0, #0
	mov r1, r4
	mov r2, r0
	bl ov00_022EBD5C
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x18c]
	str r1, [r0, #0x190]
_022E77E0:
	mov r0, r6
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022E77EC: .word 0x0000A8C0
	arm_func_end ov00_022E7504

	arm_func_start ov00_022E77F0
ov00_022E77F0: ; 0x022E77F0
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #8
	mov r7, r0
	ldrb r0, [r7]
	cmp r0, #0
	bne _022E7848
	bl ov00_022EC1C0
	mov r4, r0
	mov r1, #0
	ldr r0, [r7, #4]
	mov r2, r1
	bl ov00_02310BF4
	mov r1, r0
	ldrh r2, [r7, #2]
	ldr r0, [r4, #0xe4]
	ldr r3, [r7, #8]
	bl ov00_02315CB8
	bl ov00_022EB694
	cmp r0, #0
	addne sp, sp, #8
	movne r0, #2
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
_022E7848:
	ldr r5, _022E78A4 ; =ov00_022EBD5C
	ldr r4, _022E78A8 ; =ov00_022EBD58
	mov r6, #0
_022E7854:
	bl ov00_022EC1C0
	ldr r0, [r0, #4]
	ldr r0, [r0]
	bl ov00_0230E448
	stmia sp, {r5, r7}
	ldrb r2, [r7]
	ldr r1, [r7, #8]
	mov r3, r4
	bl ov00_02311EE0
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r0, #3
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	add r6, r6, #1
	cmp r6, #5
	blt _022E7854
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022E78A4: .word ov00_022EBD5C
_022E78A8: .word ov00_022EBD58
	arm_func_end ov00_022E77F0

	arm_func_start ov00_022E78AC
ov00_022E78AC: ; 0x022E78AC
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x220
	str r3, [sp, #0xc]
	mov sl, r0
	str r1, [sp, #4]
	str r2, [sp, #8]
	ldr sb, [sp, #0x248]
	ldr r8, [sp, #0x24c]
	mov r6, #0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	beq _022E7908
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	beq _022E7900
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a6]
	cmp r0, #0
	beq _022E7928
_022E7900:
	cmp sl, #6
	bne _022E7928
_022E7908:
	ldr r2, [sp, #0xc]
	ldr r1, [sp, #8]
	mov r0, sl
	mov r3, sb
	str r8, [sp]
	bl ov00_022E7A70
	mov r4, r0
	b _022E79D0
_022E7928:
	cmp sb, #0
	cmpne r8, #0
	beq _022E79A8
	ldr r3, [sb]
	ldr r2, _022E7A68 ; =ov00_0231A1C0
	add r0, sp, #0x20
	mov r1, #0x200
	bl sub_0207911C
	mov r6, r0
	cmp r8, #1
	mov r7, #1
	ble _022E79A8
	add r5, sp, #0x10
	add fp, sp, #0x20
_022E7960:
	ldr r3, [sb, r7, lsl #2]
	ldr r2, _022E7A6C ; =ov00_0231A2A0
	mov r0, r5
	mov r1, #0x10
	bl sub_0207911C
	mov r4, r0
	add r0, r6, r4
	add r0, r0, #1
	cmp r0, #0x200
	bhi _022E79A8
	mov r0, r5
	add r1, fp, r6
	mov r2, r4
	bl MemcpyFast
	add r7, r7, #1
	add r6, r6, r4
	cmp r7, r8
	blt _022E7960
_022E79A8:
	add r0, sp, #0x20
	mov r1, #0
	strb r1, [r0, r6]
	bl ov00_022EC1C0
	ldr r0, [r0]
	ldr r2, [sp, #4]
	add r3, sp, #0x20
	mov r1, sl
	bl ov00_022E7B88
	mov r4, r0
_022E79D0:
	cmp sl, #2
	cmpne sl, #6
	beq _022E79EC
	add r0, sl, #0xf8
	and r0, r0, #0xff
	cmp r0, #1
	bhi _022E7A5C
_022E79EC:
	bl ov00_022EC1C0
	strb sl, [r0, #0x3cc]
	bl ov00_022EC1C0
	add r1, r0, #0x300
	ldr r0, [sp, #0xc]
	strh r0, [r1, #0xce]
	bl ov00_022EC1C0
	ldr r1, [sp, #8]
	str r1, [r0, #0x3d0]
	bl ov00_022EC1C0
	ldr r1, [sp, #4]
	str r1, [r0, #0x454]
	bl ov00_022EC1C0
	str r8, [r0, #0x458]
	bl ov00_022EC1C0
	mov r5, r0
	bl sub_0207AE44
	str r0, [r5, #0x45c]
	cmp sb, #0
	str r1, [r5, #0x460]
	cmpne r8, #0
	beq _022E7A5C
	bl ov00_022EC1C0
	mov r1, r0
	mov r0, sb
	add r1, r1, #0x3d4
	mov r2, r8, lsl #2
	bl ArrayCopy32
_022E7A5C:
	mov r0, r4
	add sp, sp, #0x220
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022E7A68: .word ov00_0231A1C0
_022E7A6C: .word ov00_0231A2A0
	arm_func_end ov00_022E78AC

	arm_func_start ov00_022E7A70
ov00_022E7A70: ; 0x022E7A70
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x98
	ldr r5, [sp, #0xb8]
	mov r4, r0
	cmp r5, #0x20
	movhi r5, #0x20
	cmp r3, #0
	cmpne r5, #0
	mov r8, r1
	mov r7, r2
	moveq r5, #0
	beq _022E7AB0
	add r1, sp, #0x18
	mov r0, r3
	mov r2, r5, lsl #2
	bl ArrayCopy32
_022E7AB0:
	ldr r2, _022E7B84 ; =ov00_0231A2A4
	mov r0, r5, lsl #2
	ldrb r1, [r2, #4]
	ldrb r6, [r2]
	add sb, sp, #4
	ldrb r5, [r2, #1]
	ldrb r3, [r2, #2]
	ldrb r2, [r2, #3]
	strb r1, [sb, #4]
	mov r1, #3
	strb r6, [sb]
	strb r5, [sb, #1]
	strb r3, [sb, #2]
	strb r2, [sb, #3]
	str r1, [sp, #8]
	strb r4, [sp, #0xc]
	strb r0, [sp, #0xd]
	bl ov00_022EC1C0
	ldrh r0, [r0, #0x1a]
	strh r0, [sp, #0xe]
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1c]
	str r0, [sp, #0x10]
	bl ov00_022EC1C0
	ldr r0, [r0, #0x200]
	mov r6, #0
	str r0, [sp, #0x14]
	mov r4, r6
_022E7B20:
	bl ov00_022EC1C0
	mov r5, r0
	mov r0, r8
	mov r1, r4
	mov r2, r4
	bl ov00_02310BF4
	mov r1, r0
	ldrb r0, [sp, #0xd]
	mov r2, r7
	mov r3, sb
	add r0, r0, #0x14
	str r0, [sp]
	ldr r0, [r5, #0xe4]
	bl ov00_02315C60
	cmp r0, #0
	addeq sp, sp, #0x98
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	cmp r0, #2
	addne sp, sp, #0x98
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	add r6, r6, #1
	cmp r6, #5
	blt _022E7B20
	add sp, sp, #0x98
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022E7B84: .word ov00_0231A2A4
	arm_func_end ov00_022E7A70

	arm_func_start ov00_022E7B88
ov00_022E7B88: ; 0x022E7B88
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x208
	mov sb, r0
	mov r8, r2
	mov r7, r3
	mov r0, #3
	mov r5, r1
	str r0, [sp]
	ldr r4, _022E7C3C ; =ov00_0231A2BC
	ldr r2, _022E7C40 ; =ov00_0231A2AC
	ldr r3, _022E7C44 ; =ov00_0231A2B4
	add r0, sp, #8
	mov r1, #0x200
	str r4, [sp, #4]
	bl sub_0207911C
	mov r4, r0
	add r2, sp, #8
	add r1, sp, #9
	strb r5, [r2, r4]
	mov r0, #0
	strb r0, [r1, r4]
	cmp r7, #0
	add r6, r1, r4
	beq _022E7C24
	mov r0, r7
	bl strlen
	mov r5, r0
	add r0, r4, #2
	add r0, r0, r5
	cmp r0, #0x200
	ldrhi r0, _022E7C48 ; =0x000001FF
	addhi r1, r4, #1
	subhi r5, r0, r1
	mov r0, r7
	mov r1, r6
	mov r2, r5
	bl MemcpyFast
	mov r0, #0
	strb r0, [r6, r5]
_022E7C24:
	add r2, sp, #8
	mov r0, sb
	mov r1, r8
	bl ov00_022FFB10
	add sp, sp, #0x208
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022E7C3C: .word ov00_0231A2BC
_022E7C40: .word ov00_0231A2AC
_022E7C44: .word ov00_0231A2B4
_022E7C48: .word 0x000001FF
	arm_func_end ov00_022E7B88

	arm_func_start ov00_022E7C4C
ov00_022E7C4C: ; 0x022E7C4C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov sb, r1
	mov r4, r0
	mov r8, r2
	mov r0, sb
	mov r1, #0
	bl strchr
	mov r6, r0
	cmp r8, #0
	mov r7, #0
	ble _022E7CA4
	mov r5, #0x2f
_022E7C7C:
	mov r0, sb
	mov r1, r5
	bl strchr
	cmp r0, #0
	mvneq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	add r7, r7, #1
	cmp r7, r8
	add sb, r0, #1
	blt _022E7C7C
_022E7CA4:
	mov r0, sb
	mov r1, #0x2f
	bl strchr
	cmp r0, #0
	moveq r0, r6
	cmp sb, r0
	mvneq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	sub r5, r0, sb
	mov r0, sb
	mov r1, r4
	mov r2, r5
	bl MemcpyFast
	mov r1, #0
	mov r0, r5
	strb r1, [r4, r5]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022E7C4C

	arm_func_start ov00_022E7CE8
ov00_022E7CE8: ; 0x022E7CE8
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #0x118
	mov sb, r0
	mov r8, r1
	mov r7, r2
	mov sl, r3
	ldr r6, [sp, #0x138]
	ldr r5, [sp, #0x13c]
	mov r4, #0
	bl ov00_022EC1C0
	cmp r0, #0
	beq _022E7D28
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0
	bne _022E7D34
_022E7D28:
	add sp, sp, #0x118
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E7D34:
	bl ov00_022E1FC0
	cmp r0, #5
	bne _022E7D64
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #1
	bne _022E7D64
	bl ov00_022EC1C0
	ldr r0, [r0, #0xf4]
	cmp r8, r0
	bne _022E7D64
	bl ov00_022EB15C
_022E7D64:
	cmp sb, #0x40
	bgt _022E7E00
	bge _022E8B44
	cmp sb, #0x20
	addls pc, pc, sb, lsl #2
	b _022E8BB8
_022E7D7C: ; jump table
	b _022E8BB8 ; case 0
	b _022E7E08 ; case 1
	b _022E7FD8 ; case 2
	b _022E81AC ; case 3
	b _022E820C ; case 4
	b _022E832C ; case 5
	b _022E83A8 ; case 6
	b _022E84B8 ; case 7
	b _022E85D0 ; case 8
	b _022E8750 ; case 9
	b _022E87A4 ; case 10
	b _022E7E08 ; case 11
	b _022E884C ; case 12
	b _022E88C0 ; case 13
	b _022E88C0 ; case 14
	b _022E88C0 ; case 15
	b _022E88E4 ; case 16
	b _022E8934 ; case 17
	b _022E89D4 ; case 18
	b _022E8A30 ; case 19
	b _022E8BB8 ; case 20
	b _022E8BB8 ; case 21
	b _022E8BB8 ; case 22
	b _022E8BB8 ; case 23
	b _022E8BB8 ; case 24
	b _022E8BB8 ; case 25
	b _022E8BB8 ; case 26
	b _022E8BB8 ; case 27
	b _022E8BB8 ; case 28
	b _022E8BB8 ; case 29
	b _022E8BB8 ; case 30
	b _022E8BB8 ; case 31
	b _022E8A48 ; case 32
_022E7E00:
	cmp sb, #0x41
	b _022E8BB8
_022E7E08:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	beq _022E7E28
	ldr r0, [r6, #8]
	ldr r7, [r6, #4]
	mov r0, r0, lsl #0x10
	mov sl, r0, lsr #0x10
_022E7E28:
	cmp sb, #0xb
	moveq r0, #1
	movne r0, #0
	str r0, [sp]
	ldr r3, [r6]
	mov r0, r8
	mov r1, r7
	mov r2, sl
	bl ov00_022E8BCC
	mov r5, r0
	cmp r5, #2
	bne _022E7F4C
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1dc]
	mov r0, r8
	mov r1, r7
	mov r2, sl
	bl ov00_022E8EF8
	bl ov00_022E9108
	cmp r0, #0
	addne sp, sp, #0x118
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	bne _022E7ED0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x46c]
	cmp r0, #0
	beq _022E7ED0
	bl ov00_022EC1C0
	mov r6, r0
	mov r0, r8
	bl ov00_022E3DB8
	mov r4, r0
	bl ov00_022EC1C0
	ldr r1, [r0, #0x470]
	ldr r2, [r6, #0x46c]
	mov r0, r4
	blx r2
_022E7ED0:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x14]
	mov r4, #1
	str r0, [sp, #0x14]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x14]
	cmp r0, #1
	blt _022E7F18
	add r6, sp, #0x14
_022E7EF4:
	bl ov00_022EC1C0
	add r0, r0, r4, lsl #2
	ldr r0, [r0, #0xf4]
	str r0, [r6, r4, lsl #2]
	add r4, r4, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x14]
	cmp r4, r0
	ble _022E7EF4
_022E7F18:
	bl ov00_022EC1C0
	ldr r1, [r0, #0x1c]
	add r0, sp, #0x14
	str r1, [r0, r4, lsl #2]
	bl ov00_022EC1C0
	ldrh r2, [r0, #0x1a]
	add r3, r4, #1
	add r1, sp, #0x14
	mov r0, #0xb
	str r2, [r1, r3, lsl #2]
	add r4, r4, #2
	bl ov00_022EC1D0
	b _022E7F98
_022E7F4C:
	cmp r5, #3
	bne _022E7F98
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x16]
	cmp r0, #0
	beq _022E7F98
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	ldrb r1, [r6, #0x14]
	ldrb r0, [r0, #0x16]
	cmp r1, r0
	bne _022E7F98
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	moveq r0, #0x10
	streq r0, [sp, #0x14]
	moveq r4, #1
_022E7F98:
	cmp r5, #0xff
	beq _022E8BB8
	add r1, sp, #0x14
	str r1, [sp]
	mov r0, r5
	mov r1, r8
	mov r2, r7
	mov r3, sl
	str r4, [sp, #4]
	bl ov00_022E78AC
	bl ov00_022E9108
	cmp r0, #0
	beq _022E8BB8
	add sp, sp, #0x118
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E7FD8:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #4
	bne _022E8BB8
	bl ov00_022EC1C0
	ldr r0, [r0, #0x204]
	cmp r8, r0
	bne _022E8BB8
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x208]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a7]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1c8]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1bc]
	bl ov00_022EC1C0
	ldr r1, [r6]
	add r1, r6, r1, lsl #2
	ldr r1, [r1, #4]
	str r1, [r0, #0x24]
	bl ov00_022EC1C0
	ldr r1, [r6]
	add r1, r6, r1, lsl #2
	ldr r1, [r1, #8]
	strh r1, [r0, #0xa4]
	bl ov00_022EC1C0
	ldr r1, [r6]
	add r1, r6, r1, lsl #2
	ldr r1, [r1, #4]
	str r1, [r0, #0x1b8]
	bl ov00_022EC1C0
	ldr r1, [r6]
	add r0, r0, #0x100
	add r1, r6, r1, lsl #2
	ldr r1, [r1, #8]
	strh r1, [r0, #0xb4]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	bne _022E8100
	ldr r1, [r6]
	add r0, r6, #4
	bl ov00_022EA16C
	cmp r0, #0
	beq _022E80C0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #0
	beq _022E8100
	mov r0, r8
	mov r1, r6
	bl ov00_022E90B8
	b _022E8100
_022E80C0:
	mov r0, r8
	bl ov00_022E9690
	bl ov00_022E9108
	cmp r0, #0
	addne sp, sp, #0x118
	mov r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	mov r1, r0
	mov r2, r8
	bl ov00_022E92F0
	bl ov00_022E9108
	cmp r0, #0
	beq _022E8BB8
	add sp, sp, #0x118
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E8100:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	bne _022E8184
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #0
	beq _022E8144
	mov r0, r8
	mov r1, r6
	bl ov00_022E90B8
	bl ov00_022E99C0
	bl ov00_022E9108
	cmp r0, #0
	addne sp, sp, #0x118
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E8144:
	mov r0, #6
	bl ov00_022EC1D0
	bl ov00_022EC1C0
	ldr r0, [r0, #0xe4]
	mov r1, #0
	bl ov00_02315D80
	mov r2, r0
	mov r0, #0
	mov r1, r0
	bl ov00_022E7504
	bl ov00_022EB810
	cmp r0, #0
	beq _022E8BB8
	add sp, sp, #0x118
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E8184:
	mov r0, #5
	bl ov00_022EC1D0
	mov r0, r8
	bl ov00_022E72A0
	bl ov00_022EB694
	cmp r0, #0
	beq _022E8BB8
	add sp, sp, #0x118
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E81AC:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #4
	bne _022E8BB8
	bl ov00_022EC1C0
	ldr r0, [r0, #0x204]
	cmp r8, r0
	bne _022E8BB8
	cmp r5, #0
	ble _022E81F8
	ldr r0, [r6]
	cmp r0, #0x10
	bne _022E81F8
	mov r0, #0xd
	mov r1, #0
	bl ov00_022E6570
	add sp, sp, #0x118
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E81F8:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x204]
	bl ov00_022E95B8
	add sp, sp, #0x118
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E820C:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #4
	bne _022E8BB8
	bl ov00_022EC1C0
	ldr r0, [r0, #0x204]
	cmp r8, r0
	bne _022E8BB8
	bl ov00_022EC1C0
	mov r4, r0
	bl sub_0207AE44
	str r0, [r4, #0x1cc]
	str r1, [r4, #0x1d0]
	bl ov00_022EC1C0
	ldr r0, [r0, #0x208]
	cmp r0, #0
	beq _022E8260
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a7]
	cmp r0, #0x10
	blo _022E8270
_022E8260:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	bne _022E82B4
_022E8270:
	bl ov00_022EC1C0
	mov r1, #1
	str r1, [r0, #0x1bc]
	bl ov00_022EC1C0
	mov r4, r0
	bl sub_0207AE44
	str r0, [r4, #0x1c0]
	str r1, [r4, #0x1c4]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	beq _022E8BB8
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x1a7]
	add r1, r1, #1
	strb r1, [r0, #0x1a7]
	b _022E8BB8
_022E82B4:
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x208]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a7]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	bne _022E8308
	mov r0, #3
	bl ov00_022EC1D0
	bl ov00_022EC1C0
	mov r1, #1
	str r1, [r0, #0xe8]
	bl ov00_022EC1C0
	mov r4, r0
	bl sub_0207AE44
	str r0, [r4, #0xec]
	str r1, [r4, #0xf0]
	b _022E8BB8
_022E8308:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	bne _022E8BB8
	mov r1, #0
	mov r2, r1
	mov r0, #1
	bl ov00_022E92F0
	b _022E8BB8
_022E832C:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x17]
	cmp r0, #0
	beq _022E8BB8
	bl ov00_022EC1C0
	ldr r0, [r0, #0x20]
	cmp r8, r0
	bne _022E8BB8
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	bne _022E838C
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	bne _022E838C
	bl ov00_022EC1C0
	ldr r0, [r0, #0xf8]
	cmp r8, r0
	bne _022E838C
	bl ov00_022EC1C0
	ldr r0, [r0, #4]
	ldr r0, [r0]
	bl ov00_0230E3A4
_022E838C:
	mov r0, r8
	bl ov00_022E96E4
	cmp r0, #0
	bne _022E8BB8
	add sp, sp, #0x118
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E83A8:
	ldr r0, [r6, #4]
	ldr r5, [r6]
	mov r0, r0, lsl #0x10
	mov r4, r0, lsr #0x10
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #1
	bne _022E83D4
	mov r0, #6
	bl ov00_022EC1D0
	b _022E8404
_022E83D4:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #6
	beq _022E83F4
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xb
	bne _022E8BB8
_022E83F4:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x20]
	cmp r8, r0
	bne _022E8BB8
_022E8404:
	bl ov00_022EC1C0
	mov r1, #0xff
	strb r1, [r0, #0x3cc]
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	add r0, r0, #1
	add r0, r6, r0, lsl #2
	ldr r0, [r0, #0xf4]
	cmp r8, r0
	beq _022E8450
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	add r0, r0, #1
	add r0, r6, r0, lsl #2
	str r8, [r0, #0xf4]
_022E8450:
	mov r1, r4, asr #8
	mov r0, r4, lsl #8
	and r1, r1, #0xff
	and r0, r0, #0xff00
	orr r0, r1, r0
	str r5, [sp, #0xc]
	strh r0, [sp, #0xa]
	bl ov00_022EC1C0
	mov r1, #1
	strb r1, [r0, #0x194]
	bl ov00_022EC1C0
	ldr r0, [r0, #4]
	ldr r0, [r0]
	bl ov00_0230E448
	mov r4, r0
	bl ov00_022EC1C0
	add r3, r0, #0x194
	mov r1, r4
	mov r0, #0
	add r2, sp, #8
	bl ov00_022EBD5C
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x18c]
	str r1, [r0, #0x190]
	b _022E8BB8
_022E84B8:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #1
	bne _022E8BB8
	bl ov00_022EC1C0
	ldr r0, [r0, #0xf4]
	cmp r8, r0
	bne _022E8BB8
	ldr r0, [r6]
	str r0, [sp, #0x10]
	ldr r0, [r6, #4]
	and r4, r0, #0xff
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	bne _022E854C
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a6]
	cmp r0, #0
	bne _022E854C
	ldr r0, [sp, #0x10]
	bl ov00_022EB024
	str r0, [sp, #0x14]
	add r0, sp, #0x14
	str r0, [sp]
	mov r5, #1
	mov r1, r8
	mov r2, r7
	mov r3, sl
	mov r0, #0x20
	str r5, [sp, #4]
	bl ov00_022E78AC
	bl ov00_022E9108
	cmp r0, #0
	addne sp, sp, #0x118
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E854C:
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x14]
	ldr r1, [sp, #0x10]
	add r0, r0, #1
	add r0, r5, r0, lsl #2
	str r1, [r0, #0xf4]
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x14]
	add r0, r0, #1
	add r0, r5, r0
	strb r4, [r0, #0x2d0]
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	bl ov00_02312BF4
	bl ov00_022EC1C0
	ldr r0, [r0, #0x46c]
	cmp r0, #0
	beq _022E8BB8
	bl ov00_022EC1C0
	mov r5, r0
	ldr r0, [sp, #0x10]
	bl ov00_022E3DB8
	mov r4, r0
	bl ov00_022EC1C0
	ldr r1, [r0, #0x470]
	ldr r2, [r5, #0x46c]
	mov r0, r4
	blx r2
	b _022E8BB8
_022E85D0:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #1
	bne _022E8BB8
	bl ov00_022EC1C0
	ldr r0, [r0, #0xf4]
	cmp r8, r0
	bne _022E8BB8
	ldr r0, [r6]
	str r0, [sp, #0x10]
	cmp r0, #0
	bne _022E8638
	ldr r5, [r6, #4]
	ldr r4, [r6, #8]
	bl ov00_022EC1C0
	add r0, r5, r0
	strb r4, [r0, #0x2d0]
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldr r2, [r0, #0x200]
	add r1, r4, r5, lsl #2
	mov r0, #3
	str r2, [r1, #0xf4]
	bl ov00_022E9AA4
	b _022E8BB8
_022E8638:
	ldr r0, [r6, #8]
	ldr r5, [r6, #4]
	and r4, r0, #0xff
	bl ov00_022EC1C0
	add r0, r0, r5, lsl #2
	ldr r1, [sp, #0x10]
	ldr r0, [r0, #0xf4]
	cmp r1, r0
	bne _022E86B8
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	sub r0, r0, #1
	cmp r5, r0
	bne _022E86B8
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	add r1, sp, #0x10
	str r1, [sp]
	mov r1, #1
	str r1, [sp, #4]
	ldrh r3, [r0, #0xa4]
	ldr r2, [r4, #0x24]
	mov r1, r8
	mov r0, #9
	bl ov00_022E78AC
	bl ov00_022E9108
	cmp r0, #0
	beq _022E8BB8
	add sp, sp, #0x118
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E86B8:
	bl ov00_022EC1C0
	ldr r1, [sp, #0x10]
	add r0, r0, r5, lsl #2
	str r1, [r0, #0xf4]
	bl ov00_022EC1C0
	add r0, r5, r0
	strb r4, [r0, #0x2d0]
	bl ov00_022EC1C0
	ldr r1, [r6, #0xc]
	add r0, r0, r5, lsl #2
	str r1, [r0, #0x24]
	bl ov00_022EC1C0
	ldr r1, [r6, #0x10]
	add r0, r0, r5, lsl #1
	strh r1, [r0, #0xa4]
	bl ov00_022EC1C0
	ldr r1, [r6, #0xc]
	str r1, [r0, #0x1b8]
	bl ov00_022EC1C0
	add r1, r0, #0x100
	ldr r2, [r6, #0x10]
	mov r0, #5
	strh r2, [r1, #0xb4]
	bl ov00_022EC1D0
	ldr r0, [sp, #0x10]
	bl ov00_022E72A0
	bl ov00_022EB694
	cmp r0, #0
	addne sp, sp, #0x118
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1c8]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1bc]
	b _022E8BB8
_022E8750:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xd
	bne _022E8BB8
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a4]
	ldr r1, [r6]
	add r0, r0, #1
	add r0, r4, r0, lsl #2
	ldr r0, [r0, #0xf4]
	cmp r1, r0
	bne _022E8BB8
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x1a4]
	add r1, r1, #1
	strb r1, [r0, #0x1a4]
	mov r0, #0
	bl ov00_022E9AA4
	b _022E8BB8
_022E87A4:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #1
	beq _022E87C4
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0x12
	bne _022E8BB8
_022E87C4:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	beq _022E87E8
	ldr r1, [r6]
	add r0, r6, #4
	bl ov00_022EA16C
	cmp r0, #0
	beq _022E8804
_022E87E8:
	bl ov00_022EC1C0
	ldr r1, [r6, #4]
	str r1, [r0, #0x208]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a7]
	b _022E8810
_022E8804:
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x208]
_022E8810:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #0
	beq _022E8834
	bl ov00_022EC1C0
	ldr r0, [r0, #4]
	ldr r0, [r0]
	bl ov00_0230E3A4
	b _022E8BB8
_022E8834:
	bl ov00_022EA4BC
	cmp r0, #0
	beq _022E8BB8
	add sp, sp, #0x118
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E884C:
	bl ov00_022EC1C0
	ldr r0, [r0, #0xf4]
	cmp r8, r0
	bne _022E8BB8
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	beq _022E887C
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	bne _022E8898
_022E887C:
	mov r0, r8
	bl ov00_022E9900
	cmp r0, #0
	bne _022E8BB8
	add sp, sp, #0x118
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E8898:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	bne _022E8BB8
	bl ov00_022EC1C0
	str r8, [r0, #0x20c]
	bl ov00_022EA5EC
	mov r0, #0
	bl ov00_022EA388
	b _022E8BB8
_022E88C0:
	ldr r2, [r6]
	mov r0, r8
	mov r1, sb
	bl ov00_022EAB38
	cmp r0, #0
	bne _022E8BB8
	add sp, sp, #0x118
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E88E4:
	bl ov00_022EC1C0
	ldr r0, [r0, #0xf4]
	cmp r8, r0
	addne sp, sp, #0x118
	movne r0, #1
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	cmp r5, #0
	mov r7, #0
	ble _022E8BB8
	mov r4, r7
_022E890C:
	ldr r0, [r6, r7, lsl #2]
	mov r1, r4
	bl ov00_022EB094
	cmp r0, #0xff
	beq _022E8924
	bl ov00_022E1EB4
_022E8924:
	add r7, r7, #1
	cmp r7, r5
	blt _022E890C
	b _022E8BB8
_022E8934:
	ldr r0, _022E8BC4 ; =ov00_02326F48
	ldr r4, [r0]
	cmp r4, #0
	ldrneb r0, [r4]
	cmpne r0, #0
	beq _022E8990
	bl sub_0207AE44
	ldr r3, [r4, #0x10]
	ldr r2, [r4, #0x14]
	subs r3, r0, r3
	sbc r0, r1, r2
	mov r1, r0, lsl #6
	ldr r2, _022E8BC8 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	ldr r2, [r4, #4]
	cmp r1, #0
	cmpeq r0, r2
	movhs r0, #1
	strhs r0, [sp, #0x14]
	bhs _022E8998
_022E8990:
	mov r0, #0
	str r0, [sp, #0x14]
_022E8998:
	add r0, sp, #0x14
	str r0, [sp]
	mov r4, #1
	mov r1, r8
	mov r2, r7
	mov r3, sl
	mov r0, #0x12
	str r4, [sp, #4]
	bl ov00_022E78AC
	bl ov00_022E9108
	cmp r0, #0
	beq _022E8BB8
	add sp, sp, #0x118
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E89D4:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0x13
	bne _022E8BB8
	mov r0, r8
	mov r1, #0
	bl ov00_022EB094
	cmp r0, #0xff
	beq _022E8BB8
	ldr r1, _022E8BC4 ; =ov00_02326F48
	mov r4, #1
	ldr r3, [r1]
	ldr r2, [r3, #8]
	orr r2, r2, r4, lsl r0
	str r2, [r3, #8]
	ldr r2, [r6]
	cmp r2, #0
	beq _022E8BB8
	ldr r2, [r1]
	ldr r1, [r2, #0xc]
	orr r0, r1, r4, lsl r0
	str r0, [r2, #0xc]
	b _022E8BB8
_022E8A30:
	mov r0, #0xc
	mov r1, #0
	bl ov00_022E6570
	add sp, sp, #0x118
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E8A48:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	bne _022E8BB8
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a6]
	cmp r0, #0
	bne _022E8BB8
	mov r4, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	blt _022E8BB8
_022E8A7C:
	bl ov00_022EC1C0
	add r0, r0, r4, lsl #2
	ldr r0, [r0, #0xf4]
	cmp r8, r0
	bne _022E8B2C
	ldr r0, [r6]
	cmp r0, #0
	bne _022E8B04
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xb
	beq _022E8ABC
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xc
	bne _022E8AD4
_022E8ABC:
	bl ov00_022EA2B4
	bl ov00_022E9108
	cmp r0, #0
	addne sp, sp, #0x118
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E8AD4:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x19c]
	cmp r0, #0
	beq _022E8AFC
	bl ov00_022EC1C0
	ldr r0, [r0, #0x19c]
	bl ov00_02311FB0
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x19c]
_022E8AFC:
	bl ov00_022EA488
	b _022E8BB8
_022E8B04:
	bl ov00_022EC1C0
	mov r4, r0
	mov r0, r8
	mov r1, #0
	bl ov00_022EB094
	ldr r2, [r4, #0x1dc]
	mov r1, #1
	orr r0, r2, r1, lsl r0
	str r0, [r4, #0x1dc]
	b _022E8BB8
_022E8B2C:
	add r4, r4, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r4, r0
	ble _022E8A7C
	b _022E8BB8
_022E8B44:
	mov r4, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	blt _022E8BB8
_022E8B58:
	bl ov00_022EC1C0
	add r0, r0, r4, lsl #2
	ldr r0, [r0, #0xf4]
	cmp r8, r0
	bne _022E8BA4
	mov r4, #0
	str r4, [sp]
	mov r1, r8
	mov r2, r7
	mov r3, sl
	mov r0, #0x41
	str r4, [sp, #4]
	bl ov00_022E78AC
	bl ov00_022E9108
	cmp r0, #0
	beq _022E8BB8
	add sp, sp, #0x118
	mov r0, r4
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022E8BA4:
	add r4, r4, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r4, r0
	ble _022E8B58
_022E8BB8:
	mov r0, #1
	add sp, sp, #0x118
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022E8BC4: .word ov00_02326F48
_022E8BC8: .word 0x000082EA
	arm_func_end ov00_022E7CE8

	arm_func_start ov00_022E8BCC
ov00_022E8BCC: ; 0x022E8BCC
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r8, r0
	mov r7, r1
	mov r6, r2
	mov r5, r3
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	beq _022E8C4C
	cmp r0, #1
	beq _022E8C04
	cmp r0, #2
	beq _022E8E28
	b _022E8EEC
_022E8C04:
	bl ov00_022EC1C0
	ldr r0, [r0]
	mov r1, r8
	bl ov00_022FF808
	cmp r0, #0
	beq _022E8C30
	mov r0, r8
	bl ov00_022E3DB8
	mvn r1, #0
	cmp r0, r1
	bne _022E8C38
_022E8C30:
	mov r4, #0xff
	b _022E8EEC
_022E8C38:
	mov r0, r8
	bl ov00_022EB024
	cmp r0, #0
	moveq r4, #3
	beq _022E8EEC
_022E8C4C:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r5, r0
	bne _022E8CB4
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a9]
	cmp r0, #0
	bne _022E8CB4
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r1, [r4, #0x14]
	ldrb r0, [r0, #0x16]
	cmp r1, r0
	beq _022E8CB4
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x17]
	cmp r0, #0
	beq _022E8D18
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldr r1, [r4, #0x20]
	ldr r0, [r0, #0x200]
	cmp r1, r0
	bne _022E8D18
_022E8CB4:
	mov r4, #3
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	bne _022E8EEC
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	ldr r0, [r0, #0xb4]
	cmp r0, #0
	bne _022E8EEC
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x17]
	cmp r0, #0
	beq _022E8EEC
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	ldr r1, [r5, #0x20]
	ldr r0, [r0, #0x200]
	cmp r1, r0
	bne _022E8EEC
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	bl ov00_02312BF4
	b _022E8EEC
_022E8D18:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #3
	beq _022E8D38
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #4
	bne _022E8D64
_022E8D38:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1c]
	cmp r0, #0
	bne _022E8D58
	bl ov00_022EC1C0
	ldrh r0, [r0, #0x1a]
	cmp r0, #0
	beq _022E8D64
_022E8D58:
	cmp r7, #0
	cmpeq r6, #0
	bne _022E8D6C
_022E8D64:
	mov r4, #4
	b _022E8EEC
_022E8D6C:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x204]
	cmp r0, #0
	beq _022E8E20
	bl ov00_022EC1C0
	ldr r0, [r0, #0x204]
	cmp r8, r0
	bne _022E8DC8
	ldr r0, [sp, #0x18]
	cmp r0, #0
	bne _022E8DB8
	bl ov00_022EC1C0
	ldr r0, [r0, #0x200]
	cmp r0, r8
	bge _022E8DC0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x208]
	cmp r8, r0
	beq _022E8DC0
_022E8DB8:
	mov r4, #2
	b _022E8EEC
_022E8DC0:
	mov r4, #0xff
	b _022E8EEC
_022E8DC8:
	ldr r0, [sp, #0x18]
	cmp r0, #0
	bne _022E8DF4
	bl ov00_022EC1C0
	ldr r0, [r0, #0x200]
	cmp r0, r8
	bge _022E8E18
	bl ov00_022EC1C0
	ldr r0, [r0, #0x208]
	cmp r0, #0
	bne _022E8E18
_022E8DF4:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x204]
	bl ov00_022E9690
	bl ov00_022E9108
	cmp r0, #0
	movne r0, #0xff
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	mov r4, #2
	b _022E8EEC
_022E8E18:
	mov r4, #3
	b _022E8EEC
_022E8E20:
	mov r4, #2
	b _022E8EEC
_022E8E28:
	bl ov00_022EC1C0
	ldr r0, [r0]
	mov r1, r8
	bl ov00_022FF808
	cmp r0, #0
	beq _022E8E54
	mov r0, r8
	bl ov00_022E3DB8
	mvn r1, #0
	cmp r0, r1
	bne _022E8E5C
_022E8E54:
	mov r4, #0xff
	b _022E8EEC
_022E8E5C:
	cmp r5, #3
	bne _022E8E80
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r1, [r4, #0x14]
	ldrb r0, [r0, #0x16]
	cmp r1, r0
	bne _022E8E88
_022E8E80:
	mov r4, #3
	b _022E8EEC
_022E8E88:
	ldr r0, _022E8EF4 ; =ov00_02326F48
	ldrb r1, [r0, #0x1c]
	cmp r1, #1
	ldreqb r0, [r0, #0x1d]
	cmpeq r0, #1
	moveq r4, #0x13
	beq _022E8EEC
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xa
	bne _022E8EE0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1c]
	cmp r0, #0
	bne _022E8ED4
	bl ov00_022EC1C0
	ldrh r0, [r0, #0x1a]
	cmp r0, #0
	beq _022E8EE0
_022E8ED4:
	cmp r7, #0
	cmpeq r6, #0
	bne _022E8EE8
_022E8EE0:
	mov r4, #4
	b _022E8EEC
_022E8EE8:
	mov r4, #2
_022E8EEC:
	mov r0, r4
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022E8EF4: .word ov00_02326F48
	arm_func_end ov00_022E8BCC

	arm_func_start ov00_022E8EF8
ov00_022E8EF8: ; 0x022E8EF8
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x10
	mov r6, r0
	mov r5, r1
	mov r4, r2
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x17]
	cmp r0, #0
	beq _022E8F34
	bl ov00_022EC1C0
	ldr r0, [r0, #0x20]
	cmp r6, r0
	addeq sp, sp, #0x10
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022E8F34:
	bl ov00_022EC1C0
	mov r1, #1
	strb r1, [r0, #0x17]
	bl ov00_022EC1C0
	str r6, [r0, #0x20]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1bc]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1c8]
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	bl ov00_02312BF4
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x204]
	bl ov00_022EC1C0
	mov r7, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x14]
	add r0, r0, #1
	add r0, r7, r0, lsl #2
	str r6, [r0, #0xf4]
	bl ov00_022EC1C0
	mov r7, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x14]
	add r0, r0, #1
	add r0, r7, r0, lsl #2
	str r5, [r0, #0x24]
	bl ov00_022EC1C0
	mov r7, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x14]
	add r0, r0, #1
	add r0, r7, r0, lsl #1
	strh r4, [r0, #0xa4]
	bl ov00_022EC1C0
	str r5, [r0, #0x1b8]
	bl ov00_022EC1C0
	add r0, r0, #0x100
	strh r4, [r0, #0xb4]
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EAFB4
	ldrb r1, [r4, #0x14]
	add r1, r1, #1
	add r1, r5, r1
	strb r0, [r1, #0x2d0]
	str r6, [sp, #8]
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x14]
	mov r7, #1
	add r0, r0, #1
	add r0, r4, r0
	ldrb r0, [r0, #0x2d0]
	str r0, [sp, #0xc]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x14]
	cmp r0, #1
	blt _022E90A4
	add r6, sp, #8
	mov r5, #2
	mov r4, #7
_022E9048:
	bl ov00_022EC1C0
	mov sb, r0
	bl ov00_022EC1C0
	mov r8, r0
	bl ov00_022EC1C0
	str r6, [sp]
	str r5, [sp, #4]
	add r0, r0, r7, lsl #1
	add r1, sb, r7, lsl #2
	add r2, r8, r7, lsl #2
	ldrh r3, [r0, #0xa4]
	ldr r1, [r1, #0xf4]
	ldr r2, [r2, #0x24]
	mov r0, r4
	bl ov00_022E78AC
	cmp r0, #0
	addne sp, sp, #0x10
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	add r7, r7, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x14]
	cmp r7, r0
	ble _022E9048
_022E90A4:
	mov r0, #1
	bl ov00_022EB184
	mov r0, #0
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022E8EF8

	arm_func_start ov00_022E90B8
ov00_022E90B8: ; 0x022E90B8
	stmdb sp!, {r4, r5, r6, lr}
	mov r5, r1
	ldr r1, [r5]
	mov r6, r0
	add r4, r1, #2
	cmp r4, #2
	bls _022E90F0
	bl ov00_022EC1C0
	mov r1, r0
	sub r2, r4, #2
	add r0, r5, #4
	add r1, r1, #0x350
	mov r2, r2, lsl #2
	bl ArrayCopy32
_022E90F0:
	bl ov00_022EC1C0
	sub r1, r4, #1
	str r1, [r0, #0x348]
	bl ov00_022EC1C0
	str r6, [r0, #0x34c]
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022E90B8

	arm_func_start ov00_022E9108
ov00_022E9108: ; 0x022E9108
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	mov r0, r4
	bne _022E912C
	bl ov00_022EB694
	ldmia sp!, {r4, pc}
_022E912C:
	bl ov00_022EB620
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022E9108

	arm_func_start ov00_022E9134
ov00_022E9134: ; 0x022E9134
	stmdb sp!, {r4, r5, r6, r7, lr}
	sub sp, sp, #0x14
	mov r5, r0
	cmp r1, #0
	bne _022E9168
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1c]
	cmp r0, #0
	bne _022E91A8
	bl ov00_022EC1C0
	ldrh r0, [r0, #0x1a]
	cmp r0, #0
	bne _022E91A8
_022E9168:
	bl ov00_022EC1C0
	mov r1, #1
	str r1, [r0, #0x1bc]
	bl ov00_022EC1C0
	mov r4, r0
	bl sub_0207AE44
	str r0, [r4, #0x1c0]
	str r1, [r4, #0x1c4]
	bl ov00_022EC1C0
	str r5, [r0, #0xf4]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x204]
	add sp, sp, #0x14
	mov r0, r1
	ldmia sp!, {r4, r5, r6, r7, pc}
_022E91A8:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	bne _022E922C
	bl ov00_022EC1C0
	ldr r0, [r0, #0xe4]
	mov r1, #0
	bl ov00_02315D80
	mov r6, r0
	bl ov00_022EC1C0
	mov r4, r0
	ldr r1, _022E92E8 ; =ov00_0231A208
	mov r0, r6
	mov r2, #0
	bl ov00_02315264
	str r0, [r4, #0xf4]
	bl ov00_022EC1C0
	mov r4, r0
	mov r0, r6
	bl ov00_0231530C
	str r0, [r4, #0x24]
	bl ov00_022EC1C0
	mov r4, r0
	mov r0, r6
	bl ov00_02315314
	strh r0, [r4, #0xa4]
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	ldr r0, [r0, #0xf4]
	mov r4, #1
	str r0, [r6, #0x204]
	b _022E9268
_022E922C:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	bne _022E9244
	bl ov00_022EC1C0
	str r5, [r0, #0xf4]
_022E9244:
	bl ov00_022EC1C0
	str r5, [r0, #0x204]
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1c]
	str r0, [sp, #0xc]
	bl ov00_022EC1C0
	ldrh r0, [r0, #0x1a]
	mov r4, #3
	str r0, [sp, #0x10]
_022E9268:
	bl ov00_022EC1C0
	ldr r1, _022E92EC ; =0x00001770
	str r1, [r0, #0x1c8]
	bl ov00_022EC1C0
	mov r6, r0
	bl sub_0207AE44
	str r0, [r6, #0x1cc]
	str r1, [r6, #0x1d0]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1bc]
	bl ov00_022EC1C0
	ldr r0, [r0, #0x208]
	cmp r0, #0
	movne r7, #0xb
	moveq r7, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	str r0, [sp, #8]
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	add r2, sp, #8
	stmia sp, {r2, r4}
	mov r3, r0
	ldrh r3, [r3, #0xa4]
	ldr r2, [r6, #0x24]
	mov r1, r5
	mov r0, r7
	bl ov00_022E78AC
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, pc}
	.align 2, 0
_022E92E8: .word ov00_0231A208
_022E92EC: .word 0x00001770
	arm_func_end ov00_022E9134

	arm_func_start ov00_022E92F0
ov00_022E92F0: ; 0x022E92F0
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x22c
	movs r4, r1
	mov r8, r0
	mov fp, r2
	beq _022E9314
	bl ov00_022EC1C0
	ldrb r6, [r0, #0x1a5]
	b _022E9344
_022E9314:
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x344]
	ldrb r1, [r5, #0x1a5]
	sub r0, r0, #1
	cmp r1, r0
	movge r6, #0
	bge _022E9344
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a5]
	add r6, r0, #1
_022E9344:
	cmp r4, #0
	mov r5, #0
	moveq r7, #1
	movne r7, r5
_022E9354:
	cmp r7, #0
	cmpeq r5, #0
	beq _022E9398
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x1a5]
	add r1, r1, #1
	strb r1, [r0, #0x1a5]
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r1, [r4, #0x1a5]
	ldr r0, [r0, #0x344]
	cmp r1, r0
	blt _022E9398
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a5]
_022E9398:
	cmp r5, #0
	beq _022E93E8
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a5]
	cmp r6, r0
	bne _022E93E8
	bl ov00_022EC1C0
	ldr r1, _022E95A8 ; =0x00000BB8
	str r1, [r0, #0x1c8]
	bl ov00_022EC1C0
	mov r4, r0
	bl sub_0207AE44
	str r0, [r4, #0x1cc]
	str r1, [r4, #0x1d0]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1bc]
	add sp, sp, #0x22c
	mov r0, r1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022E93E8:
	mov r5, #1
	bl ov00_022E2C58
	mov sl, r0
	bl ov00_022EC1C0
	mov sb, r0
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	mov r1, r0
	ldrb r2, [r1, #0x1a5]
	ldr r3, [sb, #0x2fc]
	mov r1, #0xc
	add r2, r4, r2
	ldrb r2, [r2, #0x304]
	mov r0, sl
	mla r1, r2, r1, r3
	bl ov00_022DB98C
	movs r4, r0
	mvnne r0, #0
	cmpne r4, r0
	beq _022E9354
	bl ov00_022EC1C0
	mov sl, r0
	bl ov00_022EC1C0
	mov sb, r0
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x1a5]
	ldr r2, [sl, #0x2fc]
	mov r0, #0xc
	add r1, sb, r1
	ldrb r1, [r1, #0x304]
	mla r0, r1, r0, r2
	bl ov00_022DB7A4
	cmp r0, #0
	beq _022E9354
	mov sb, r5
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	blt _022E94B0
_022E9488:
	bl ov00_022EC1C0
	add r0, r0, sb, lsl #2
	ldr r0, [r0, #0xf4]
	cmp r4, r0
	beq _022E94B0
	add sb, sb, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp sb, r0
	ble _022E9488
_022E94B0:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp sb, r0
	ble _022E9354
	bl ov00_022EC1C0
	ldr r0, [r0]
	add r2, sp, #4
	mov r1, r4
	bl ov00_022FF768
	mov sb, r0
	bl ov00_022EC1C0
	ldr r0, [r0]
	ldr r1, [sp, #4]
	add r2, sp, #0x18
	bl ov00_022FF5D8
	orrs r0, sb, r0
	ldreq r0, [sp, #0x1c]
	cmpeq r0, #4
	bne _022E9354
	ldr r0, _022E95AC ; =ov00_0231A1CC
	add r1, sp, #0xc
	add r2, sp, #0x20
	mov r3, #0x2f
	bl ov00_022E1448
	mov sl, r0
	ldr r0, _022E95B0 ; =ov00_0231A1C4
	add r1, sp, #8
	add r2, sp, #0x20
	mov r3, #0x2f
	bl ov00_022E1448
	mov sb, r0
	ldr r0, _022E95B4 ; =ov00_0231A1C8
	add r1, sp, #0
	add r2, sp, #0x20
	mov r3, #0x2f
	bl ov00_022E1448
	cmp sl, #0
	cmpgt sb, #0
	cmpgt r0, #0
	ble _022E9354
	add r0, sp, #0xc
	mov r1, #0
	mov r2, #0xa
	bl sub_0208B200
	cmp r0, #3
	bne _022E9354
	add r0, sp, #8
	mov r1, #0
	mov r2, #0xa
	bl sub_0208B200
	mov sb, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x16]
	cmp sb, r0
	bne _022E9354
	cmp r4, fp
	moveq r8, #1
	mov r0, r4
	mov r1, r8
	bl ov00_022E9134
	add sp, sp, #0x22c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022E95A8: .word 0x00000BB8
_022E95AC: .word ov00_0231A1CC
_022E95B0: .word ov00_0231A1C4
_022E95B4: .word ov00_0231A1C8
	arm_func_end ov00_022E92F0

	arm_func_start ov00_022E95B8
ov00_022E95B8: ; 0x022E95B8
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x208]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x204]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a7]
	bl ov00_022EC1C0
	mov r4, r0
	bl sub_0207AE44
	str r0, [r4, #0x1cc]
	str r1, [r4, #0x1d0]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	bne _022E962C
	mov r0, #3
	bl ov00_022EC1D0
	mov r0, #0
	bl ov00_022E72A0
	bl ov00_022EB694
	cmp r0, #0
	beq _022E9684
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022E962C:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	bne _022E9660
	mov r0, #0
	mov r1, r0
	mov r2, r5
	bl ov00_022E92F0
	bl ov00_022E9108
	cmp r0, #0
	beq _022E9684
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022E9660:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	bne _022E9684
	ldr r1, _022E968C ; =0xFFFEC5E6
	mov r0, #6
	bl ov00_022E6570
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022E9684:
	mov r0, #1
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022E968C: .word 0xFFFEC5E6
	arm_func_end ov00_022E95B8

	arm_func_start ov00_022E9690
ov00_022E9690: ; 0x022E9690
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #8
	mov r5, r0
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [sp]
	str r1, [sp, #4]
	ldrh r3, [r0, #0xa4]
	ldr r2, [r4, #0x24]
	mov r1, r5
	mov r0, #5
	bl ov00_022E78AC
	mov r4, r0
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x204]
	mov r0, r4
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022E9690

	arm_func_start ov00_022E96E4
ov00_022E96E4: ; 0x022E96E4
	stmdb sp!, {r4, r5, r6, lr}
	mov r5, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x17]
	cmp r0, #0
	beq _022E971C
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldr r1, [r4, #0x20]
	ldr r0, [r0, #0x200]
	cmp r1, r0
	moveq r4, #0
	beq _022E9720
_022E971C:
	mov r4, #1
_022E9720:
	cmp r4, #0
	beq _022E974C
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x17]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x20]
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	bl ov00_02312BF4
_022E974C:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #0x1f
	bhs _022E977C
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	mov r1, #0
	add r0, r0, #1
	add r0, r6, r0, lsl #2
	str r1, [r0, #0xf4]
_022E977C:
	bl ov00_022EC1C0
	mov r1, #0xff
	strb r1, [r0, #0x3cc]
	bl ov00_022EC1C0
	ldr r0, [r0, #0x19c]
	cmp r0, #0
	beq _022E97B0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x19c]
	bl ov00_02311FB0
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x19c]
_022E97B0:
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	strb r0, [r6, #0x14]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x204]
	cmp r4, #0
	bne _022E97F0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	beq _022E98F8
	bl ov00_022EA488
	b _022E98F8
_022E97F0:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	bne _022E982C
	mov r0, #3
	bl ov00_022EC1D0
	bl ov00_022EC1C0
	mov r1, #2
	str r1, [r0, #0xe8]
	bl ov00_022EC1C0
	mov r4, r0
	bl sub_0207AE44
	str r0, [r4, #0xec]
	str r1, [r4, #0xf0]
	b _022E98F8
_022E982C:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	bne _022E9858
	mov r0, #4
	bl ov00_022EC1D0
	mov r1, #0
	mov r2, r1
	mov r0, #1
	bl ov00_022E92F0
	b _022E98F8
_022E9858:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	bne _022E98F8
	mov r0, #0xe
	bl ov00_022EC1D0
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1d8]
	bl ov00_022EC1C0
	add r1, r0, #0x100
	mov r2, #0
	mov r0, r5
	strh r2, [r1, #0xb2]
	bl ov00_022EA57C
	mov r5, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	blt _022E98E0
	mov r4, #0xd
_022E98AC:
	bl ov00_022EC1C0
	add r0, r0, r5, lsl #2
	ldr r0, [r0, #0xf4]
	mov r1, r4
	bl ov00_022EAAB8
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	add r5, r5, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r5, r0
	ble _022E98AC
_022E98E0:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #0
	bne _022E98F8
	mov r0, #2
	bl ov00_022EA388
_022E98F8:
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022E96E4

	arm_func_start ov00_022E9900
ov00_022E9900: ; 0x022E9900
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	bne _022E9940
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #0
	beq _022E992C
	bl ov00_022EA5EC
_022E992C:
	ldr r1, _022E99BC ; =0xFFFEC5D2
	mov r0, #6
	bl ov00_022E6570
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022E9940:
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	strb r0, [r5, #0x14]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x208]
	bl ov00_022EC1C0
	ldr r0, [r0, #0x19c]
	cmp r0, #0
	beq _022E9988
	bl ov00_022EC1C0
	ldr r0, [r0, #0x19c]
	bl ov00_02311FB0
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x19c]
_022E9988:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #0
	beq _022E99A0
	bl ov00_022EA488
	b _022E99B4
_022E99A0:
	mov r0, #4
	bl ov00_022EC1D0
	mov r0, #0
	bl ov00_022E95B8
	mov r4, r0
_022E99B4:
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022E99BC: .word 0xFFFEC5D2
	arm_func_end ov00_022E9900

	arm_func_start ov00_022E99C0
ov00_022E99C0: ; 0x022E99C0
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #8
	mov r4, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	blt _022E9A58
	mov r5, #0xa
_022E99E0:
	bl ov00_022EC1C0
	mov sb, r0
	bl ov00_022EC1C0
	mov r8, r0
	bl ov00_022EC1C0
	mov r7, r0
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	add r1, r6, #0x348
	str r1, [sp]
	ldr ip, [r0, #0x348]
	add r3, r7, r4, lsl #1
	add ip, ip, #1
	str ip, [sp, #4]
	add r1, sb, r4, lsl #2
	add r2, r8, r4, lsl #2
	ldrh r3, [r3, #0xa4]
	ldr r1, [r1, #0xf4]
	ldr r2, [r2, #0x24]
	mov r0, r5
	bl ov00_022E78AC
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	add r4, r4, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r4, r0
	ble _022E99E0
_022E9A58:
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x17]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x20]
	bl ov00_022EC1C0
	mov r1, #1
	strb r1, [r0, #0x1a8]
	bl ov00_022EC1C0
	ldr r0, [r0, #4]
	ldr r0, [r0]
	bl ov00_0230E3A4
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a8]
	mov r0, r1
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022E99C0

	arm_func_start ov00_022E9AA4
ov00_022E9AA4: ; 0x022E9AA4
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #0x1c
	cmp r0, #4
	mov r4, #3
	mov r5, #0
	addls pc, pc, r0, lsl #2
	b _022EA12C
_022E9AC0: ; jump table
	b _022E9AD4 ; case 0
	b _022E9E74 ; case 1
	b _022E9EB8 ; case 2
	b _022E9F7C ; case 3
	b _022E9F9C ; case 4
_022E9AD4:
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	ldrb r1, [r6, #0x1a4]
	sub r0, r0, #1
	cmp r1, r0
	bge _022E9B94
	mov r0, #0xd
	bl ov00_022EC1D0
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a4]
	add r0, r0, #1
	add r0, r4, r0, lsl #2
	ldr r0, [r0, #0xf4]
	str r0, [sp, #8]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a4]
	add r0, r0, #1
	str r0, [sp, #0xc]
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a4]
	add r0, r0, #1
	add r0, r4, r0
	ldrb r0, [r0, #0x2d0]
	str r0, [sp, #0x10]
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a4]
	add r0, r0, #1
	add r0, r4, r0, lsl #2
	ldr r0, [r0, #0x24]
	str r0, [sp, #0x14]
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a4]
	mov r4, #5
	add r0, r0, #1
	add r0, r6, r0, lsl #1
	ldrh r0, [r0, #0xa4]
	str r0, [sp, #0x18]
	b _022E9DE0
_022E9B94:
	bl ov00_022EC1C0
	mov r1, r5
	strb r1, [r0, #0x17]
	bl ov00_022EC1C0
	mov r1, r5
	str r1, [r0, #0x20]
	bl ov00_022EC1C0
	ldr r0, [r0, #0x10]
	bl ov00_02312BF4
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	bne _022E9BD4
	mov r0, r4
	bl ov00_022EC1D0
	b _022E9BF8
_022E9BD4:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	bne _022E9BF0
	mov r0, #4
	bl ov00_022EC1D0
	b _022E9BF8
_022E9BF0:
	mov r0, #0xa
	bl ov00_022EC1D0
_022E9BF8:
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a4]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	beq _022E9C30
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	ldrb r1, [r6, #0xd]
	ldrb r0, [r0, #0x16]
	cmp r1, r0
	bne _022E9CE0
_022E9C30:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	bne _022E9C68
	bl ov00_022EC1C0
	mov r7, r0
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	add r0, r6, r0, lsl #2
	ldr r0, [r0, #0xf4]
	str r0, [r7, #0x20c]
	b _022E9C88
_022E9C68:
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x20c]
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x200]
	str r0, [r6, #0xf4]
_022E9C88:
	mov r0, #0x10
	bl ov00_022EC1D0
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x1d4]
	mov r7, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	blt _022E9DD0
	mov r6, #2
_022E9CB4:
	bl ov00_022EC1C0
	add r0, r0, r7
	ldrb r0, [r0, #0x2d0]
	mov r1, r6
	bl ov00_022EA758
	add r7, r7, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r7, r0
	ble _022E9CB4
	b _022E9DD0
_022E9CE0:
	mov r0, #0
	str r0, [sp, #8]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	str r0, [sp, #0xc]
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	add r0, r6, r0
	ldrb r0, [r0, #0x2d0]
	str r0, [sp, #0x10]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	bne _022E9D44
	bl ov00_022EC1C0
	mov r1, #2
	str r1, [r0, #0xe8]
	bl ov00_022EC1C0
	mov r6, r0
	bl sub_0207AE44
	str r0, [r6, #0xec]
	str r1, [r6, #0xf0]
	b _022E9DD0
_022E9D44:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	bne _022E9DD0
	mov r1, #0
	mov r2, r1
	mov r0, #1
	bl ov00_022E92F0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a6]
	cmp r0, #0
	bne _022E9DD0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #2
	blo _022E9DD0
	bl ov00_022EC1C0
	mov r8, r0
	mov r0, #0
	bl ov00_022EB0F8
	mov r6, r0
	bl ov00_022EC1C0
	mov r7, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	mov r1, #1
	ldr r2, [r8, #0x1dc]
	add r0, r7, r0
	ldrb r0, [r0, #0x2d0]
	mvn r0, r1, lsl r0
	and r0, r6, r0
	cmp r2, r0
	beq _022E9DD0
	bl ov00_022EA488
	b _022EA12C
_022E9DD0:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	movne r5, #1
_022E9DE0:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0x10
	beq _022EA12C
	bl ov00_022EC1C0
	mov sl, r0
	bl ov00_022EC1C0
	mov sb, r0
	bl ov00_022EC1C0
	mov r8, r0
	bl ov00_022EC1C0
	mov r7, r0
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	add r1, sp, #8
	stmia sp, {r1, r4}
	mov ip, r0
	ldrb r3, [sb, #0xd]
	ldrb r2, [r7, #0xd]
	ldrb r1, [ip, #0xd]
	add r4, sl, r3, lsl #2
	add r2, r8, r2, lsl #2
	add r3, r6, r1, lsl #1
	ldrh r3, [r3, #0xa4]
	ldr r1, [r4, #0xf4]
	ldr r2, [r2, #0x24]
	mov r0, #8
	bl ov00_022E78AC
	bl ov00_022E9108
	cmp r0, #0
	addne sp, sp, #0x1c
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x3cd]
	b _022EA12C
_022E9E74:
	mov r0, #1
	bl ov00_022EC1D0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	bne _022E9EB0
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	add r0, r4, r0, lsl #2
	ldr r0, [r0, #0xf4]
	str r0, [r5, #0x20c]
_022E9EB0:
	mov r5, #1
	b _022EA12C
_022E9EB8:
	mov r0, #1
	bl ov00_022EC1D0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	beq _022E9EE0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	bne _022E9F00
_022E9EE0:
	bl ov00_022EC1C0
	mov r1, #1
	strb r1, [r0, #0x17]
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x200]
	str r0, [r4, #0x20]
_022E9F00:
	bl ov00_022EB15C
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	bls _022EA12C
	bl ov00_022EC1C0
	mov r7, r0
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	mov r8, r0
	bl ov00_022EC1C0
	add r3, r8, #0xf4
	ldrb r2, [r0, #0xd]
	mov r1, #1
	mov r0, #9
	sub r2, r2, #1
	add r2, r3, r2, lsl #2
	str r2, [sp]
	str r1, [sp, #4]
	ldr r1, [r7, #0xf4]
	ldr r2, [r6, #0x24]
	ldrh r3, [r4, #0xa4]
	bl ov00_022E78AC
	bl ov00_022E9108
	cmp r0, #0
	beq _022EA12C
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
_022E9F7C:
	mov r0, #1
	bl ov00_022EC1D0
	bl ov00_022EB15C
	bl ov00_022EC1C0
	mov r1, r5
	str r1, [r0, #0x20c]
	mov r5, #1
	b _022EA12C
_022E9F9C:
	mov r4, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	ble _022EA000
_022E9FB0:
	bl ov00_022EC1C0
	add r0, r0, r4
	ldrb r0, [r0, #0x2d0]
	cmp r0, #0
	beq _022E9FD8
	bl ov00_022EC1C0
	add r0, r0, r4
	ldrb r0, [r0, #0x2d0]
	cmp r0, #0x20
	blo _022E9FEC
_022E9FD8:
	ldr r1, _022EA160 ; =0xFFFEA2A0
	mov r0, #0x15
	bl ov00_022E6570
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
_022E9FEC:
	add r4, r4, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r4, r0
	blt _022E9FB0
_022EA000:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	beq _022EA020
	ldr r1, _022EA164 ; =ov00_0231A1BC
	mov r0, #2
	mov r2, #0
	bl ov00_022E3E54
_022EA020:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x20c]
	cmp r0, #0
	moveq r7, #1
	movne r7, #0
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x20c]
	bl ov00_022E3DB8
	mov r4, r0
	bl ov00_022EC1C0
	str r4, [sp]
	ldr r1, [r0, #0x468]
	mov r0, #0
	str r1, [sp, #4]
	ldr r4, [r6, #0x464]
	mov r2, r7
	mov r1, r0
	mov r3, r0
	blx r4
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	beq _022EA094
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	bne _022EA09C
_022EA094:
	bl ov00_022E7204
	b _022EA120
_022EA09C:
	bl ov00_022EC1C0
	ldr r0, [r0, #0xe4]
	cmp r0, #0
	beq _022EA0C4
	bl ov00_022EC1C0
	ldr r0, [r0, #0xe4]
	bl ov00_02315AD8
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0xe4]
_022EA0C4:
	bl ov00_022E5080
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	bne _022EA10C
	bl ov00_022E6D08
	bl ov00_022EB620
	cmp r0, #0
	addne sp, sp, #0x1c
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	ldr r0, _022EA168 ; =ov00_02326F48
	ldrb r1, [r0, #0x1c]
	cmp r1, #1
	moveq r1, #1
	streqb r1, [r0, #0x1d]
	mov r0, #0xa
	bl ov00_022EC1D0
	b _022EA114
_022EA10C:
	mov r0, #1
	bl ov00_022EC1D0
_022EA114:
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x20c]
_022EA120:
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a9]
_022EA12C:
	cmp r5, #0
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	bl ov00_022EC1C0
	ldr r0, [r0, #0xe4]
	bl ov00_02315D34
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022EA160: .word 0xFFFEA2A0
_022EA164: .word ov00_0231A1BC
_022EA168: .word ov00_02326F48
	arm_func_end ov00_022E9AA4

	arm_func_start ov00_022EA16C
ov00_022EA16C: ; 0x022EA16C
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a6]
	cmp r0, #0
	beq _022EA19C
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #4
	moveq r0, #1
	ldmeqia sp!, {r4, r5, r6, pc}
_022EA19C:
	cmp r5, #0
	mov r4, #0
	bls _022EA1EC
_022EA1A8:
	ldr r0, [r6, r4, lsl #2]
	bl ov00_022EB024
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1a6]
	cmp r0, #0
	beq _022EA1E0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #1
	moveq r0, #1
	ldmeqia sp!, {r4, r5, r6, pc}
_022EA1E0:
	add r4, r4, #1
	cmp r4, r5
	blo _022EA1A8
_022EA1EC:
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022EA16C

	arm_func_start ov00_022EA1F4
ov00_022EA1F4: ; 0x022EA1F4
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #8
	ldr r1, _022EA2B0 ; =ov00_0231A1BC
	mov r0, #1
	mov r2, #0
	bl ov00_022E3E54
	bl ov00_022EB620
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	bl ov00_022E7204
	bl ov00_022EC1C0
	ldr r0, [r0, #0x20c]
	cmp r0, #0
	movne r6, #1
	bne _022EA248
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	moveq r6, #1
	movne r6, #0
_022EA248:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x20c]
	cmp r0, #0
	moveq r7, #1
	movne r7, #0
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x20c]
	bl ov00_022E3DB8
	mov r4, r0
	bl ov00_022EC1C0
	str r4, [sp]
	ldr r1, [r0, #0x468]
	mov r2, r7
	str r1, [sp, #4]
	ldr ip, [r5, #0x464]
	mov r3, r6
	mov r0, #0
	mov r1, #1
	blx ip
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a9]
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022EA2B0: .word ov00_0231A1BC
	arm_func_end ov00_022EA1F4

	arm_func_start ov00_022EA2B4
ov00_022EA2B4: ; 0x022EA2B4
	stmdb sp!, {r4, r5, r6, r7, lr}
	sub sp, sp, #0xc
	mov r4, #0
	str r4, [sp, #8]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x17]
	cmp r0, #0
	beq _022EA37C
	bl ov00_022EC1C0
	ldr r0, [r0, #0x20]
	cmp r0, #0
	beq _022EA37C
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	ldr r1, [r5, #0x20]
	ldr r0, [r0, #0x200]
	cmp r1, r0
	beq _022EA37C
	bl ov00_022EC1C0
	mov r7, r0
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	add r2, sp, #8
	mov r1, #1
	str r2, [sp]
	str r1, [sp, #4]
	ldrb r3, [r0, #0xd]
	ldrb r2, [r6, #0xd]
	ldr r1, [r7, #0x20]
	add r3, r3, #1
	add r2, r2, #1
	add r3, r4, r3, lsl #1
	add r2, r5, r2, lsl #2
	ldrh r3, [r3, #0xa4]
	ldr r2, [r2, #0x24]
	mov r0, #0xc
	bl ov00_022E78AC
	mov r4, r0
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x17]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x20]
_022EA37C:
	mov r0, r4
	add sp, sp, #0xc
	ldmia sp!, {r4, r5, r6, r7, pc}
	arm_func_end ov00_022EA2B4

	arm_func_start ov00_022EA388
ov00_022EA388: ; 0x022EA388
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #8
	movs r4, r0
	bne _022EA3A4
	bl ov00_022EA1F4
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, pc}
_022EA3A4:
	bl ov00_022E6E68
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	beq _022EA3C8
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	bne _022EA424
_022EA3C8:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x20c]
	cmp r0, #0
	moveq r6, #1
	movne r6, #0
	bl ov00_022EC1C0
	mov r5, r0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x20c]
	bl ov00_022E3DB8
	mov r4, r0
	bl ov00_022EC1C0
	str r4, [sp]
	ldr r1, [r0, #0x468]
	mov r0, #0
	str r1, [sp, #4]
	ldr ip, [r5, #0x464]
	mov r2, r6
	mov r1, #1
	mov r3, r0
	blx ip
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, pc}
_022EA424:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	bne _022EA458
	cmp r4, #1
	addne sp, sp, #8
	ldmneia sp!, {r4, r5, r6, pc}
	mov r0, #0
	bl ov00_022E72A0
	bl ov00_022EB694
	add sp, sp, #8
	cmp r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022EA458:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	cmpeq r4, #1
	addne sp, sp, #8
	ldmneia sp!, {r4, r5, r6, pc}
	mov r0, #0
	mov r1, r0
	mov r2, r0
	bl ov00_022E92F0
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022EA388

	arm_func_start ov00_022EA488
ov00_022EA488: ; 0x022EA488
	stmdb sp!, {r3, lr}
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	ldmeqia sp!, {r3, pc}
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	ldmeqia sp!, {r3, pc}
	bl ov00_022EA5EC
	mov r0, #1
	bl ov00_022EA388
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022EA488

	arm_func_start ov00_022EA4BC
ov00_022EA4BC: ; 0x022EA4BC
	stmdb sp!, {r4, lr}
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x17]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x20]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a8]
	bl ov00_022EC1C0
	ldr r0, [r0, #0x208]
	cmp r0, #0
	beq _022EA56C
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	bne _022EA52C
	mov r0, #3
	bl ov00_022EC1D0
	mov r0, #0
	bl ov00_022E72A0
	mov r4, r0
	bl ov00_022EB694
	cmp r0, #0
	beq _022EA574
	mov r0, r4
	ldmia sp!, {r4, pc}
_022EA52C:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	bne _022EA574
	mov r0, #4
	bl ov00_022EC1D0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x208]
	mov r1, #0
	bl ov00_022E9134
	mov r4, r0
	bl ov00_022E9108
	cmp r0, #0
	beq _022EA574
	mov r0, r4
	ldmia sp!, {r4, pc}
_022EA56C:
	mov r0, #1
	bl ov00_022EA388
_022EA574:
	mov r0, #0
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022EA4BC

	arm_func_start ov00_022EA57C
ov00_022EA57C: ; 0x022EA57C
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	bl ov00_022EC1C0
	str r5, [r0, #0x20c]
	bl ov00_022EC1C0
	ldrb r1, [r0, #0xd]
	mov r0, r5
	add r1, r1, #1
	bl ov00_022E2194
	movs r4, r0
	beq _022EA5D0
	bl ov00_022EC1C0
	mov r1, #2
	strb r1, [r0, #0x1a8]
	ldr r0, [r4]
	bl ov00_0230E384
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a8]
	mov r0, #1
	ldmia sp!, {r3, r4, r5, pc}
_022EA5D0:
	bl ov00_022EC1C0
	ldrb r1, [r0, #0xd]
	mov r0, r5
	add r1, r1, #1
	bl ov00_022E69C0
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022EA57C

	arm_func_start ov00_022EA5EC
ov00_022EA5EC: ; 0x022EA5EC
	stmdb sp!, {r3, lr}
	bl ov00_022EC1C0
	mov r1, #2
	strb r1, [r0, #0x1a8]
	bl ov00_022EC1C0
	ldr r0, [r0, #4]
	ldr r0, [r0]
	bl ov00_0230E3A4
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a8]
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022EA5EC

	arm_func_start ov00_022EA61C
ov00_022EA61C: ; 0x022EA61C
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #0x108
	mov r7, #0
	mov sl, r0
	arm_func_end ov00_022EA61C

	arm_func_start ov00_022EA62C
ov00_022EA62C: ; 0x022EA62C
	mov r8, r7
	mov sb, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	blt _022EA6A4
	add r4, sp, #0x88
	add r5, sp, #8
	mov r6, sb
_022EA650:
	bl ov00_022EC1C0
	add r0, r0, sb
	ldrb r0, [r0, #0x2d0]
	tst sl, r6, lsl r0
	beq _022EA67C
	bl ov00_022EC1C0
	add r0, r0, sb, lsl #2
	ldr r0, [r0, #0xf4]
	str r0, [r5, r8, lsl #2]
	add r8, r8, #1
	b _022EA690
_022EA67C:
	bl ov00_022EC1C0
	add r0, r0, sb, lsl #2
	ldr r0, [r0, #0xf4]
	str r0, [r4, r7, lsl #2]
	add r7, r7, #1
_022EA690:
	add sb, sb, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp sb, r0
	ble _022EA650
_022EA6A4:
	cmp r8, #0
	mov sl, #0
	ble _022EA6FC
	add sb, sp, #0x88
	mov r6, #0x10
	add r5, sp, #8
	mov r4, sl
_022EA6C0:
	ldr r1, [r5, sl, lsl #2]
	str sb, [sp]
	mov r0, r6
	mov r2, r4
	mov r3, r4
	str r7, [sp, #4]
	bl ov00_022E78AC
	bl ov00_022E9108
	cmp r0, #0
	addne sp, sp, #0x108
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	add sl, sl, #1
	cmp sl, r8
	blt _022EA6C0
_022EA6FC:
	bl ov00_022EC1C0
	mov r1, #2
	strb r1, [r0, #0x1a8]
	cmp r7, #0
	mov r6, #0
	ble _022EA740
	add r5, sp, #0x88
	mov r4, r6
_022EA71C:
	ldr r0, [r5, r6, lsl #2]
	mov r1, r4
	bl ov00_022EB094
	cmp r0, #0xff
	beq _022EA734
	bl ov00_022E1EB4
_022EA734:
	add r6, r6, #1
	cmp r6, r7
	blt _022EA71C
_022EA740:
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1a8]
	mov r0, #1
	add sp, sp, #0x108
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	arm_func_end ov00_022EA62C

	arm_func_start ov00_022EA758
ov00_022EA758: ; 0x022EA758
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #4
	mov r4, r1
	mov r5, r0
	cmp r4, #2
	beq _022EA77C
	cmp r4, #3
	beq _022EA7F4
	b _022EA818
_022EA77C:
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	add r0, r6, r0
	ldrb r0, [r0, #0x2d0]
	mov r6, #1
	cmp r5, r0
	moveq r0, #1
	streqb r0, [sp]
	movne r0, #0
	strneb r0, [sp]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	blo _022EA818
_022EA7BC:
	bl ov00_022EC1C0
	add r0, r0, r6
	ldrb r0, [r0, #0x2d0]
	cmp r5, r0
	streqb r6, [sp, #1]
	streqb r5, [sp, #2]
	beq _022EA818
	add r0, r6, #1
	and r6, r0, #0xff
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r6, r0
	bls _022EA7BC
	b _022EA818
_022EA7F4:
	bl ov00_022EC1C0
	add r0, r0, #0x100
	ldrh r0, [r0, #0xb0]
	strb r0, [sp]
	bl ov00_022EC1C0
	add r0, r0, #0x100
	ldrh r0, [r0, #0xb0]
	mov r0, r0, asr #8
	strb r0, [sp, #1]
_022EA818:
	add r2, sp, #0
	mov r0, r4
	mov r1, r5
	mov r3, #4
	bl ov00_022EC4F0
	bl ov00_022EC1C0
	mov r4, r0
	bl sub_0207AE44
	str r0, [r4, #0x1e0]
	str r1, [r4, #0x1e4]
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, pc}
	arm_func_end ov00_022EA758

	arm_func_start ov00_022EA848
ov00_022EA848: ; 0x022EA848
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #9
	beq _022EA87C
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0x10
	beq _022EA87C
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0x11
	bne _022EA8C0
_022EA87C:
	bl sub_0207AE44
	mov r4, r0
	mov r5, r1
	bl ov00_022EC1C0
	ldr r1, [r0, #0x1e0]
	ldr r0, [r0, #0x1e4]
	subs r3, r4, r1
	sbc r0, r5, r0
	mov r1, r0, lsl #6
	ldr r2, _022EAAB0 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	mov r4, r0
	mov r5, r1
	b _022EA8C8
_022EA8C0:
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022EA8C8:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #9
	beq _022EA8EC
	cmp r0, #0x10
	beq _022EA958
	cmp r0, #0x11
	beq _022EAA88
	b _022EAAA8
_022EA8EC:
	ldr r0, _022EAAB4 ; =0x00001770
	cmp r5, #0
	cmpeq r4, r0
	bls _022EAAA8
	bl ov00_022E1FC0
	cmp r0, #5
	bne _022EA934
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1ad]
	cmp r0, #5
	blo _022EA934
	bl ov00_022EC1C0
	ldr r0, [r0, #0xf4]
	bl ov00_022E9900
	cmp r0, #0
	bne _022EAAA8
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022EA934:
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x1ad]
	add r1, r1, #1
	strb r1, [r0, #0x1ad]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x2d0]
	mov r1, #3
	bl ov00_022EA758
	b _022EAAA8
_022EA958:
	ldr r0, _022EAAB4 ; =0x00001770
	cmp r5, #0
	cmpeq r4, r0
	bls _022EAAA8
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x1ab]
	add r1, r1, #1
	strb r1, [r0, #0x1ab]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1ab]
	cmp r0, #5
	bls _022EAA20
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	beq _022EA9A8
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #1
	bne _022EA9B8
_022EA9A8:
	bl ov00_022EA5EC
	mov r0, #1
	bl ov00_022EA388
	b _022EAAA8
_022EA9B8:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1d4]
	bl ov00_022EA61C
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #0
	beq _022EAA04
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1ab]
	bl ov00_022EC1C0
	mov r4, r0
	bl sub_0207AE44
	str r0, [r4, #0x1e0]
	str r1, [r4, #0x1e4]
	b _022EAAA8
_022EAA04:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x20c]
	bl ov00_022E96E4
	cmp r0, #0
	bne _022EAAA8
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022EAA20:
	mov r4, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	blt _022EAAA8
	mov r5, #2
	mov r6, r4
_022EAA3C:
	bl ov00_022EC1C0
	mov r7, r0
	bl ov00_022EC1C0
	add r0, r0, r4
	ldrb r0, [r0, #0x2d0]
	ldr r1, [r7, #0x1d4]
	tst r1, r6, lsl r0
	bne _022EAA70
	bl ov00_022EC1C0
	add r0, r0, r4
	ldrb r0, [r0, #0x2d0]
	mov r1, r5
	bl ov00_022EA758
_022EAA70:
	add r4, r4, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r4, r0
	ble _022EAA3C
	b _022EAAA8
_022EAA88:
	bl ov00_022EC1C0
	add r0, r0, #0x100
	ldrh r0, [r0, #0xb0]
	cmp r5, r0, asr #31
	cmpeq r4, r0
	bls _022EAAA8
	mov r0, #4
	bl ov00_022E9AA4
_022EAAA8:
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022EAAB0: .word 0x000082EA
_022EAAB4: .word 0x00001770
	arm_func_end ov00_022EA848

	arm_func_start ov00_022EAAB8
ov00_022EAAB8: ; 0x022EAAB8
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #0xc
	mov r5, r1
	cmp r5, #0xd
	mov r6, r0
	movne r4, #0
	bne _022EAAE4
	bl ov00_022EC1C0
	ldr r0, [r0, #0x20c]
	mov r4, #1
	str r0, [sp, #8]
_022EAAE4:
	add r0, sp, #8
	str r0, [sp]
	mov r2, #0
	mov r0, r5
	mov r1, r6
	mov r3, r2
	str r4, [sp, #4]
	bl ov00_022E78AC
	bl ov00_022E9108
	cmp r0, #0
	addne sp, sp, #0xc
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, r6, pc}
	bl ov00_022EC1C0
	mov r4, r0
	bl sub_0207AE44
	str r0, [r4, #0x1e8]
	str r1, [r4, #0x1ec]
	mov r0, #1
	add sp, sp, #0xc
	ldmia sp!, {r3, r4, r5, r6, pc}
	arm_func_end ov00_022EAAB8

	arm_func_start ov00_022EAB38
ov00_022EAB38: ; 0x022EAB38
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	mov r4, r2
	bl ov00_022E1FC0
	cmp r0, #6
	movne r0, #1
	ldmneia sp!, {r4, r5, r6, pc}
	cmp r5, #0xd
	beq _022EAB74
	cmp r5, #0xe
	beq _022EABB0
	cmp r5, #0xf
	beq _022EAD38
	b _022EAD50
_022EAB74:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #8
	beq _022EAB94
	mov r0, #8
	bl ov00_022EC1D0
	mov r0, r4
	bl ov00_022EA57C
_022EAB94:
	mov r0, r6
	mov r1, #0xe
	bl ov00_022EAAB8
	cmp r0, #0
	bne _022EAD50
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022EABB0:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xe
	bne _022EAD1C
	bl sub_0207AE44
	mov r4, r0
	mov r5, r1
	bl ov00_022EC1C0
	ldr r1, [r0, #0x1e8]
	ldr r0, [r0, #0x1ec]
	subs r3, r4, r1
	sbc r0, r5, r0
	mov r1, r0, lsl #6
	ldr r2, _022EAD58 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	mov r2, r0, lsr #1
	mov r0, r1, lsr #1
	cmp r0, #0
	orr r2, r2, r1, lsl #31
	cmpeq r2, #0x12c
	bls _022EAC7C
	bl ov00_022EC1C0
	ldr r1, [r0, #0x1e8]
	ldr r0, [r0, #0x1ec]
	subs r3, r4, r1
	sbc r0, r5, r0
	mov r1, r0, lsl #6
	ldr r2, _022EAD58 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	mov r3, r0, lsr #1
	mov r0, #0x12c
	orr r3, r3, r1, lsl #31
	rsb r0, r0, #0
	mvn r2, #0
	adds r5, r3, r0
	adc r4, r2, r1, lsr #1
	bl ov00_022EC1C0
	add r0, r0, #0x100
	ldrh r0, [r0, #0xb2]
	cmp r4, r0, asr #31
	cmpeq r5, r0
	bls _022EAC7C
	bl ov00_022EC1C0
	add r0, r0, #0x100
	strh r5, [r0, #0xb2]
_022EAC7C:
	mov r0, r6
	mov r1, #0
	bl ov00_022EB094
	mov r4, r0
	cmp r4, #0xff
	beq _022EACA8
	bl ov00_022EC1C0
	ldr r2, [r0, #0x1d8]
	mov r1, #1
	orr r1, r2, r1, lsl r4
	str r1, [r0, #0x1d8]
_022EACA8:
	mov r0, #1
	bl ov00_022EB0F8
	mov r4, r0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1d8]
	cmp r4, r0
	bne _022EAD50
	mov r5, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	blt _022EAD10
	mov r4, #0xf
_022EACDC:
	bl ov00_022EC1C0
	add r0, r0, r5, lsl #2
	ldr r0, [r0, #0xf4]
	mov r1, r4
	bl ov00_022EAAB8
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	add r5, r5, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r5, r0
	ble _022EACDC
_022EAD10:
	mov r0, #0xf
	bl ov00_022EC1D0
	b _022EAD50
_022EAD1C:
	mov r0, r6
	mov r1, #0xf
	bl ov00_022EAAB8
	cmp r0, #0
	bne _022EAD50
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022EAD38:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #8
	bne _022EAD50
	mov r0, #2
	bl ov00_022EA388
_022EAD50:
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022EAD58: .word 0x000082EA
	arm_func_end ov00_022EAB38

	arm_func_start ov00_022EAD5C
ov00_022EAD5C: ; 0x022EAD5C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #8
	beq _022EAD90
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xe
	beq _022EAD90
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xf
	bne _022EADD4
_022EAD90:
	bl sub_0207AE44
	mov r4, r0
	mov r5, r1
	bl ov00_022EC1C0
	ldr r1, [r0, #0x1e8]
	ldr r0, [r0, #0x1ec]
	subs r3, r4, r1
	sbc r0, r5, r0
	mov r1, r0, lsl #6
	ldr r2, _022EAF54 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	mov r4, r0
	mov r5, r1
	b _022EADDC
_022EADD4:
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022EADDC:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #8
	beq _022EAE00
	cmp r0, #0xe
	beq _022EAE30
	cmp r0, #0xf
	beq _022EAF2C
	b _022EAF4C
_022EAE00:
	ldr r0, _022EAF58 ; =0x00001770
	cmp r5, #0
	cmpeq r4, r0
	bls _022EAF4C
	bl ov00_022EC1C0
	ldr r0, [r0, #0xf4]
	mov r1, #0xe
	bl ov00_022EAAB8
	cmp r0, #0
	bne _022EAF4C
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022EAE30:
	ldr r0, _022EAF58 ; =0x00001770
	cmp r5, #0
	cmpeq r4, r0
	bls _022EAF4C
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x1ac]
	add r1, r1, #1
	strb r1, [r0, #0x1ac]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x1ac]
	cmp r0, #5
	bls _022EAEB8
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1d8]
	bl ov00_022EA61C
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #0
	beq _022EAEAC
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1ac]
	bl ov00_022EC1C0
	mov r4, r0
	bl sub_0207AE44
	str r0, [r4, #0x1e8]
	str r1, [r4, #0x1ec]
	b _022EAF4C
_022EAEAC:
	mov r0, #2
	bl ov00_022EA388
	b _022EAF4C
_022EAEB8:
	mov r4, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	blt _022EAF4C
	mov r5, #0xd
	mov r6, r4
_022EAED4:
	bl ov00_022EC1C0
	mov r7, r0
	bl ov00_022EC1C0
	add r0, r0, r4
	ldrb r0, [r0, #0x2d0]
	ldr r1, [r7, #0x1d8]
	tst r1, r6, lsl r0
	bne _022EAF14
	bl ov00_022EC1C0
	add r0, r0, r4, lsl #2
	ldr r0, [r0, #0xf4]
	mov r1, r5
	bl ov00_022EAAB8
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
_022EAF14:
	add r4, r4, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r4, r0
	ble _022EAED4
	b _022EAF4C
_022EAF2C:
	bl ov00_022EC1C0
	add r0, r0, #0x100
	ldrh r0, [r0, #0xb2]
	cmp r5, r0, asr #31
	cmpeq r4, r0
	bls _022EAF4C
	mov r0, #2
	bl ov00_022EA388
_022EAF4C:
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022EAF54: .word 0x000082EA
_022EAF58: .word 0x00001770
	arm_func_end ov00_022EAD5C

	arm_func_start ov00_022EAF5C
ov00_022EAF5C: ; 0x022EAF5C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r6, #0
	ldr r7, _022EAFAC ; =ov00_02326F88
	mov r5, #4
	mov r4, r6
_022EAF70:
	ldr r1, [r7, #4]
	cmp r1, #0
	beq _022EAF88
	mov r0, r5
	mov r2, r4
	bl ov00_022E0434
_022EAF88:
	add r6, r6, #1
	cmp r6, #0x9a
	add r7, r7, #0xc
	blt _022EAF70
	ldr r1, _022EAFAC ; =ov00_02326F88
	ldr r2, _022EAFB0 ; =0x00000738
	mov r0, #0
	bl ArrayFill32
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022EAFAC: .word ov00_02326F88
_022EAFB0: .word 0x00000738
	arm_func_end ov00_022EAF5C

	arm_func_start ov00_022EAFB4
ov00_022EAFB4: ; 0x022EAFB4
	stmdb sp!, {r4, r5, r6, lr}
	mov r5, #0
	mov r4, r5
_022EAFC0:
	mov r6, r4
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x14]
	cmp r0, #0
	blt _022EAFFC
_022EAFD4:
	bl ov00_022EC1C0
	add r0, r0, r6
	ldrb r0, [r0, #0x2d0]
	cmp r5, r0
	beq _022EAFFC
	add r6, r6, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x14]
	cmp r6, r0
	ble _022EAFD4
_022EAFFC:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x14]
	cmp r6, r0
	bgt _022EB01C
	add r0, r5, #1
	and r5, r0, #0xff
	cmp r5, #0x20
	blo _022EAFC0
_022EB01C:
	mov r0, r5
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022EAFB4

	arm_func_start ov00_022EB024
ov00_022EB024: ; 0x022EB024
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x2fc]
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	mov r4, #0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x344]
	cmp r0, #0
	ble _022EB08C
_022EB054:
	bl ov00_022EC1C0
	add r0, r0, r4
	ldrb r0, [r0, #0x304]
	bl ov00_022E3D70
	cmp r0, #0
	ble _022EB078
	cmp r0, r5
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, pc}
_022EB078:
	add r4, r4, #1
	bl ov00_022EC1C0
	ldr r0, [r0, #0x344]
	cmp r4, r0
	blt _022EB054
_022EB08C:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022EB024

	arm_func_start ov00_022EB094
ov00_022EB094: ; 0x022EB094
	stmdb sp!, {r3, r4, r5, lr}
	cmp r1, #0
	moveq r4, #1
	mov r5, r0
	movne r4, #0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r4, r0
	bgt _022EB0F0
_022EB0B8:
	bl ov00_022EC1C0
	add r0, r0, r4, lsl #2
	ldr r0, [r0, #0xf4]
	cmp r5, r0
	bne _022EB0DC
	bl ov00_022EC1C0
	add r0, r0, r4
	ldrb r0, [r0, #0x2d0]
	ldmia sp!, {r3, r4, r5, pc}
_022EB0DC:
	add r4, r4, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r4, r0
	ble _022EB0B8
_022EB0F0:
	mov r0, #0xff
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022EB094

	arm_func_start ov00_022EB0F8
ov00_022EB0F8: ; 0x022EB0F8
	stmdb sp!, {r4, r5, r6, lr}
	cmp r0, #0
	mov r5, #0
	beq _022EB118
	bl ov00_022EC1C0
	ldr r0, [r0, #0x2f0]
	bic r0, r0, #1
	ldmia sp!, {r4, r5, r6, pc}
_022EB118:
	mov r6, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	blt _022EB154
	mov r4, r6
_022EB130:
	bl ov00_022EC1C0
	add r0, r0, r6
	ldrb r0, [r0, #0x2d0]
	add r6, r6, #1
	orr r5, r5, r4, lsl r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r6, r0
	ble _022EB130
_022EB154:
	mov r0, r5
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022EB0F8

	arm_func_start ov00_022EB15C
ov00_022EB15C: ; 0x022EB15C
	stmdb sp!, {r4, lr}
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x1ad]
	bl ov00_022EC1C0
	mov r4, r0
	bl sub_0207AE44
	str r0, [r4, #0x1f8]
	str r1, [r4, #0x1fc]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022EB15C

	arm_func_start ov00_022EB184
ov00_022EB184: ; 0x022EB184
	stmdb sp!, {r4, lr}
	ldr r1, _022EB1F0 ; =ov00_02326F48
	mov r4, r0
	ldr r3, [r1]
	cmp r3, #0
	ldrneb r0, [r3]
	cmpne r0, #0
	ldmeqia sp!, {r4, pc}
	mov r2, #0
	str r2, [r3, #8]
	ldr r0, [r1]
	str r2, [r0, #0xc]
	ldr r0, [r1]
	strb r2, [r0, #2]
	bl sub_0207AE44
	ldr r2, _022EB1F0 ; =ov00_02326F48
	cmp r4, #0
	ldr r2, [r2]
	str r0, [r2, #0x18]
	str r1, [r2, #0x1c]
	ldmneia sp!, {r4, pc}
	bl sub_0207AE44
	ldr r2, _022EB1F0 ; =ov00_02326F48
	ldr r2, [r2]
	str r0, [r2, #0x10]
	str r1, [r2, #0x14]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022EB1F0: .word ov00_02326F48
	arm_func_end ov00_022EB184

	arm_func_start ov00_022EB1F4
ov00_022EB1F4: ; 0x022EB1F4
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #8
	ldr r0, _022EB614 ; =ov00_02326F48
	ldr r0, [r0]
	cmp r0, #0
	ldrneb r0, [r0]
	cmpne r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	addeq sp, sp, #8
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	addeq sp, sp, #8
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0x13
	bne _022EB450
	mov r0, #0
	bl ov00_022EB0F8
	ldr r1, _022EB614 ; =ov00_02326F48
	ldr r5, [r1]
	ldr r1, [r5, #8]
	cmp r1, r0
	bne _022EB328
	ldr r1, [r5, #0xc]
	cmp r1, r0
	bne _022EB2B4
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	strb r0, [r4, #0x16]
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r1, [r0, #0xd]
	mov r0, #0
	sub r1, r1, #1
	strb r1, [r4, #0x1a4]
	bl ov00_022E9AA4
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022EB2B4:
	bl sub_0207AE44
	str r0, [r5, #0x18]
	str r1, [r5, #0x1c]
	mov r0, #0
	str r0, [r5, #8]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #0
	bne _022EB308
	mov r0, #3
	bl ov00_022EC1D0
	bl ov00_022EC1C0
	mov r1, #2
	str r1, [r0, #0xe8]
	bl ov00_022EC1C0
	mov r4, r0
	bl sub_0207AE44
	str r0, [r4, #0xec]
	add sp, sp, #8
	str r1, [r4, #0xf0]
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022EB308:
	mov r0, #4
	bl ov00_022EC1D0
	mov r1, #0
	mov r2, r1
	mov r0, #1
	bl ov00_022E92F0
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022EB328:
	ldrb r4, [r5, #2]
	bl sub_0207AE44
	ldr r3, [r5, #0x18]
	ldr r2, [r5, #0x1c]
	subs r3, r0, r3
	sbc r0, r1, r2
	mov r1, r0, lsl #6
	ldr r2, _022EB618 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	ldr r2, _022EB61C ; =0x00001770
	mul r2, r4, r2
	cmp r1, r2, asr #31
	cmpeq r0, r2
	addlo sp, sp, #8
	ldmloia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	cmp r4, #5
	bls _022EB394
	mov r0, #1
	bl ov00_022EB184
	bl ov00_022EA5EC
	mov r0, #1
	bl ov00_022EA388
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022EB394:
	mov r7, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	blt _022EB434
	ldr r8, _022EB614 ; =ov00_02326F48
	mov r5, #0
	mov r4, #0x11
	mov r6, r7
_022EB3B8:
	bl ov00_022EC1C0
	add r0, r0, r7
	ldr r1, [r8]
	ldrb r0, [r0, #0x2d0]
	ldr r1, [r1, #8]
	tst r1, r6, lsl r0
	bne _022EB420
	bl ov00_022EC1C0
	mov sl, r0
	bl ov00_022EC1C0
	mov sb, r0
	bl ov00_022EC1C0
	str r5, [sp]
	str r5, [sp, #4]
	add r0, r0, r7, lsl #1
	add r1, sl, r7, lsl #2
	add r2, sb, r7, lsl #2
	ldrh r3, [r0, #0xa4]
	ldr r1, [r1, #0xf4]
	ldr r2, [r2, #0x24]
	mov r0, r4
	bl ov00_022E78AC
	bl ov00_022E9108
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022EB420:
	add r7, r7, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r7, r0
	ble _022EB3B8
_022EB434:
	ldr r0, _022EB614 ; =ov00_02326F48
	add sp, sp, #8
	ldr r1, [r0]
	ldrb r0, [r1, #2]
	add r0, r0, #1
	strb r0, [r1, #2]
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022EB450:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #4
	beq _022EB474
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #3
	addne sp, sp, #8
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022EB474:
	ldr r0, _022EB614 ; =ov00_02326F48
	ldr r4, [r0]
	bl ov00_022EC1C0
	ldrb r1, [r4, #1]
	ldrb r2, [r0, #0xd]
	sub r0, r1, #1
	cmp r2, r0
	addlt sp, sp, #8
	ldmltia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	ldrb r0, [r4, #2]
	cmp r0, #0
	bne _022EB4E8
	ldr r0, _022EB614 ; =ov00_02326F48
	ldr r4, [r0]
	bl sub_0207AE44
	ldr r3, [r4, #0x10]
	ldr r2, [r4, #0x14]
	subs r3, r0, r3
	sbc r0, r1, r2
	mov r1, r0, lsl #6
	ldr r2, _022EB618 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	ldr r2, [r4, #4]
	cmp r1, #0
	cmpeq r0, r2
	bhs _022EB540
_022EB4E8:
	ldrb r0, [r4, #2]
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	ldr r0, _022EB614 ; =ov00_02326F48
	ldr r4, [r0]
	bl sub_0207AE44
	ldr r3, [r4, #0x18]
	ldr r2, [r4, #0x1c]
	subs r3, r0, r3
	sbc r0, r1, r2
	mov r1, r0, lsl #6
	ldr r2, _022EB618 ; =0x000082EA
	orr r1, r1, r3, lsr #26
	mov r0, r3, lsl #6
	mov r3, #0
	bl _ll_udiv
	ldr r2, [r4, #4]
	cmp r1, #0
	cmpeq r0, r2, lsr #2
	addlo sp, sp, #8
	ldmloia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022EB540:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x204]
	cmp r0, #0
	beq _022EB56C
	bl ov00_022EC1C0
	ldr r0, [r0, #0x204]
	bl ov00_022E9690
	bl ov00_022E9108
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022EB56C:
	mov r0, #0x13
	bl ov00_022EC1D0
	mov r4, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r0, #1
	blt _022EB5F0
	mov r6, #0
	mov r5, #0x11
_022EB590:
	bl ov00_022EC1C0
	mov r8, r0
	bl ov00_022EC1C0
	mov r7, r0
	bl ov00_022EC1C0
	str r6, [sp]
	str r6, [sp, #4]
	add r0, r0, r4, lsl #1
	add r1, r8, r4, lsl #2
	add r2, r7, r4, lsl #2
	ldrh r3, [r0, #0xa4]
	ldr r1, [r1, #0xf4]
	ldr r2, [r2, #0x24]
	mov r0, r5
	bl ov00_022E78AC
	bl ov00_022E9108
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	add r4, r4, #1
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	cmp r4, r0
	ble _022EB590
_022EB5F0:
	ldr r0, _022EB614 ; =ov00_02326F48
	ldr r4, [r0]
	bl sub_0207AE44
	str r0, [r4, #0x18]
	str r1, [r4, #0x1c]
	mov r0, #1
	strb r0, [r4, #2]
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022EB614: .word ov00_02326F48
_022EB618: .word 0x000082EA
_022EB61C: .word 0x00001770
	arm_func_end ov00_022EB1F4

	arm_func_start ov00_022EB620
ov00_022EB620: ; 0x022EB620
	stmdb sp!, {r4, lr}
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	cmp r4, #4
	addls pc, pc, r4, lsl #2
	b _022EB67C
_022EB63C: ; jump table
	b _022EB67C ; case 0
	b _022EB650 ; case 1
	b _022EB65C ; case 2
	b _022EB668 ; case 3
	b _022EB674 ; case 4
_022EB650:
	mov r0, #9
	sub r2, r0, #0xa
	b _022EB67C
_022EB65C:
	mov r0, #9
	sub r2, r0, #0xb
	b _022EB67C
_022EB668:
	mov r0, #6
	sub r2, r0, #0x10
	b _022EB67C
_022EB674:
	mov r0, #6
	sub r2, r0, #0x1a
_022EB67C:
	ldr r1, _022EB690 ; =0xFFFEC398
	add r1, r2, r1
	bl ov00_022E6570
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022EB690: .word 0xFFFEC398
	arm_func_end ov00_022EB620

	arm_func_start ov00_022EB694
ov00_022EB694: ; 0x022EB694
	stmdb sp!, {r4, lr}
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	cmp r4, #6
	addls pc, pc, r4, lsl #2
	b _022EB710
_022EB6B0: ; jump table
	b _022EB710 ; case 0
	b _022EB6CC ; case 1
	b _022EB6D8 ; case 2
	b _022EB6E4 ; case 3
	b _022EB6F0 ; case 4
	b _022EB6FC ; case 5
	b _022EB708 ; case 6
_022EB6CC:
	mov r0, #6
	sub r2, r0, #0x38
	b _022EB710
_022EB6D8:
	mov r0, #6
	sub r2, r0, #0x24
	b _022EB710
_022EB6E4:
	mov r0, #6
	sub r2, r0, #0x1a
	b _022EB710
_022EB6F0:
	mov r0, #6
	sub r2, r0, #0x2e
	b _022EB710
_022EB6FC:
	mov r0, #9
	sub r2, r0, #0xa
	b _022EB710
_022EB708:
	mov r0, #9
	sub r2, r0, #0xb
_022EB710:
	ldr r1, _022EB724 ; =0xFFFEB3F8
	add r1, r2, r1
	bl ov00_022E6570
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022EB724: .word 0xFFFEB3F8
	arm_func_end ov00_022EB694

	arm_func_start ov00_022EB728
ov00_022EB728: ; 0x022EB728
	stmdb sp!, {r4, r5, r6, lr}
	movs r6, r0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	cmp r6, #5
	addls pc, pc, r6, lsl #2
	b _022EB794
_022EB744: ; jump table
	b _022EB794 ; case 0
	b _022EB75C ; case 1
	b _022EB768 ; case 2
	b _022EB774 ; case 3
	b _022EB780 ; case 4
	b _022EB78C ; case 5
_022EB75C:
	mov r5, #6
	sub r4, r5, #0x38
	b _022EB794
_022EB768:
	mov r5, #6
	sub r4, r5, #0x42
	b _022EB794
_022EB774:
	mov r5, #6
	sub r4, r5, #0x24
	b _022EB794
_022EB780:
	mov r5, #6
	sub r4, r5, #0x56
	b _022EB794
_022EB78C:
	mov r5, #6
	sub r4, r5, #0x1a
_022EB794:
	bl ov00_022E1FC0
	cmp r0, #2
	beq _022EB7B4
	cmp r0, #4
	beq _022EB7C4
	cmp r0, #5
	beq _022EB7D8
	b _022EB7EC
_022EB7B4:
	mov r0, r5
	sub r1, r4, #0xfa00
	bl ov00_022E2C74
	b _022EB7FC
_022EB7C4:
	ldr r1, _022EB804 ; =0xFFFEDEF0
	mov r0, r5
	add r1, r4, r1
	bl ov00_022E3BE8
	b _022EB7FC
_022EB7D8:
	ldr r1, _022EB808 ; =0xFFFEB7E0
	mov r0, r5
	add r1, r4, r1
	bl ov00_022E6570
	b _022EB7FC
_022EB7EC:
	ldr r1, _022EB80C ; =0xFFFE90D0
	mov r0, r5
	add r1, r4, r1
	bl ov00_022E0394
_022EB7FC:
	mov r0, r6
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022EB804: .word 0xFFFEDEF0
_022EB808: .word 0xFFFEB7E0
_022EB80C: .word 0xFFFE90D0
	arm_func_end ov00_022EB728

	arm_func_start ov00_022EB810
ov00_022EB810: ; 0x022EB810
	stmdb sp!, {r4, lr}
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	cmp r4, #1
	beq _022EB840
	cmp r4, #2
	beq _022EB84C
	cmp r4, #3
	moveq r0, #6
	subeq r2, r0, #0x24
	b _022EB854
_022EB840:
	mov r0, #9
	sub r2, r0, #0xa
	b _022EB854
_022EB84C:
	mov r0, #6
	sub r2, r0, #0x38
_022EB854:
	ldr r1, _022EB868 ; =0xFFFEB010
	add r1, r2, r1
	bl ov00_022E6570
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022EB868: .word 0xFFFEB010
	arm_func_end ov00_022EB810

	arm_func_start ov00_022EB86C
ov00_022EB86C: ; 0x022EB86C
	stmdb sp!, {r4, lr}
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	cmp r4, #1
	beq _022EB898
	cmp r4, #2
	beq _022EB8A0
	cmp r4, #3
	beq _022EB8A8
	b _022EB8B0
_022EB898:
	mov r0, #1
	ldmia sp!, {r4, pc}
_022EB8A0:
	mov r0, #2
	ldmia sp!, {r4, pc}
_022EB8A8:
	mov r0, #3
	ldmia sp!, {r4, pc}
_022EB8B0:
	movs r0, #6
	beq _022EB8C0
	ldr r1, _022EB8C8 ; =0xFFFEB007
	bl ov00_022E6570
_022EB8C0:
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022EB8C8: .word 0xFFFEB007
	arm_func_end ov00_022EB86C

	arm_func_start ov00_022EB8CC
ov00_022EB8CC: ; 0x022EB8CC
	stmdb sp!, {r4, lr}
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	cmp r4, #7
	addls pc, pc, r4, lsl #2
	b _022EB950
_022EB8E8: ; jump table
	b _022EB950 ; case 0
	b _022EB908 ; case 1
	b _022EB914 ; case 2
	b _022EB924 ; case 3
	b _022EB930 ; case 4
	b _022EB914 ; case 5
	b _022EB93C ; case 6
	b _022EB948 ; case 7
_022EB908:
	mov r0, #9
	sub r2, r0, #0xa
	b _022EB950
_022EB914:
	mov r0, #0
	mov r2, r0
	mov r4, r0
	b _022EB950
_022EB924:
	mov r0, #6
	sub r2, r0, #0x10
	b _022EB950
_022EB930:
	mov r0, #6
	sub r2, r0, #0x24
	b _022EB950
_022EB93C:
	mov r0, #6
	sub r2, r0, #0x4c
	b _022EB950
_022EB948:
	mov r0, #6
	sub r2, r0, #0x56
_022EB950:
	cmp r0, #0
	beq _022EB964
	ldr r1, _022EB96C ; =0xFFFEAC28
	add r1, r2, r1
	bl ov00_022E6570
_022EB964:
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022EB96C: .word 0xFFFEAC28
	arm_func_end ov00_022EB8CC

	arm_func_start ov00_022EB970
ov00_022EB970: ; 0x022EB970
	stmdb sp!, {r4, lr}
	mov r4, r1
	cmp r0, #0x32
	bgt _022EB9A4
	bge _022EB9EC
	cmp r0, #0xa
	bgt _022EBA48
	cmp r0, #8
	blt _022EBA48
	beq _022EB9C4
	cmp r0, #0xa
	beq _022EB9D8
	b _022EBA48
_022EB9A4:
	sub r1, r0, #0x33
	cmp r1, #3
	addls pc, pc, r1, lsl #2
	b _022EBA48
_022EB9B4: ; jump table
	b _022EBA00 ; case 0
	b _022EBA14 ; case 1
	b _022EBA28 ; case 2
	b _022EBA38 ; case 3
_022EB9C4:
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x14]
	mov r0, r4
	bl ov00_02312D10
	ldmia sp!, {r4, pc}
_022EB9D8:
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x16]
	mov r0, r4
	bl ov00_02312D10
	ldmia sp!, {r4, pc}
_022EB9EC:
	bl ov00_022EC1C0
	ldr r1, [r0, #0x200]
	mov r0, r4
	bl ov00_02312D10
	ldmia sp!, {r4, pc}
_022EBA00:
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x15]
	mov r0, r4
	bl ov00_02312D10
	ldmia sp!, {r4, pc}
_022EBA14:
	bl ov00_022EC1C0
	ldr r1, [r0, #0x20]
	mov r0, r4
	bl ov00_02312D10
	ldmia sp!, {r4, pc}
_022EBA28:
	mov r0, r4
	mov r1, #3
	bl ov00_02312D10
	ldmia sp!, {r4, pc}
_022EBA38:
	mov r0, r4
	mov r1, #1
	bl ov00_02312D10
	ldmia sp!, {r4, pc}
_022EBA48:
	subs r1, r0, #0x64
	ldmmiia sp!, {r4, pc}
	cmp r1, #0x9a
	ldmgeia sp!, {r4, pc}
	mov r0, #0xc
	mul r2, r1, r0
	ldr r0, _022EBAAC ; =ov00_02326F88
	ldrb r0, [r0, r2]
	cmp r0, #0
	ldmeqia sp!, {r4, pc}
	ldr r0, _022EBAB0 ; =ov00_02326F89
	ldrb r0, [r0, r2]
	cmp r0, #0
	beq _022EBA94
	ldr r1, _022EBAB4 ; =ov00_02326F90
	mov r0, r4
	ldr r1, [r1, r2]
	bl ov00_02312D44
	ldmia sp!, {r4, pc}
_022EBA94:
	ldr r1, _022EBAB4 ; =ov00_02326F90
	mov r0, r4
	ldr r1, [r1, r2]
	ldr r1, [r1]
	bl ov00_02312D10
	ldmia sp!, {r4, pc}
	.align 2, 0
_022EBAAC: .word ov00_02326F88
_022EBAB0: .word ov00_02326F89
_022EBAB4: .word ov00_02326F90
	arm_func_end ov00_022EB970

	arm_func_start ov00_022EBAB8
ov00_022EBAB8: ; 0x022EBAB8
	bx lr
	arm_func_end ov00_022EBAB8

	arm_func_start ov00_022EBABC
ov00_022EBABC: ; 0x022EBABC
	bx lr
	arm_func_end ov00_022EBABC

	arm_func_start ov00_022EBAC0
ov00_022EBAC0: ; 0x022EBAC0
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r1
	cmp r0, #0
	beq _022EBADC
	cmp r0, #1
	cmpne r0, #2
	ldmia sp!, {r4, r5, r6, pc}
_022EBADC:
	mov r0, r6
	mov r1, #8
	bl ov00_02312CD4
	mov r0, r6
	mov r1, #0xa
	bl ov00_02312CD4
	mov r0, r6
	mov r1, #0x32
	bl ov00_02312CD4
	mov r0, r6
	mov r1, #0x33
	bl ov00_02312CD4
	mov r0, r6
	mov r1, #0x34
	bl ov00_02312CD4
	mov r0, r6
	mov r1, #0x35
	bl ov00_02312CD4
	mov r0, r6
	mov r1, #0x36
	bl ov00_02312CD4
	ldr r5, _022EBB60 ; =ov00_02326F88
	mov r4, #0
_022EBB38:
	ldrb r1, [r5]
	cmp r1, #0
	beq _022EBB4C
	mov r0, r6
	bl ov00_02312CD4
_022EBB4C:
	add r4, r4, #1
	cmp r4, #0x9a
	add r5, r5, #0xc
	blt _022EBB38
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022EBB60: .word ov00_02326F88
	arm_func_end ov00_022EBAC0

	arm_func_start ov00_022EBB64
ov00_022EBB64: ; 0x022EBB64
	mov r0, #0
	bx lr
	arm_func_end ov00_022EBB64

	arm_func_start ov00_022EBB6C
ov00_022EBB6C: ; 0x022EBB6C
	ldr ip, _022EBB74 ; =ov00_022EB728
	bx ip
	.align 2, 0
_022EBB74: .word ov00_022EB728
	arm_func_end ov00_022EBB6C

	arm_func_start ov00_022EBB78
ov00_022EBB78: ; 0x022EBB78
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	bl ov00_022EC1C0
	str r5, [r0, #0x1c]
	bl ov00_022EC1C0
	strh r4, [r0, #0x1a]
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022EBB78

	arm_func_start ov00_022EBB98
ov00_022EBB98: ; 0x022EBB98
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #1
	bne _022EBBBC
	mov r0, #6
	bl ov00_022EC1D0
	b _022EBBDC
_022EBBBC:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #6
	beq _022EBBDC
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xb
	ldmneia sp!, {r4, pc}
_022EBBDC:
	bl ov00_022EC1C0
	ldr r0, [r0, #0x180]
	cmp r4, r0
	bne _022EBC00
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x17c]
	add r1, r1, #1
	strb r1, [r0, #0x17c]
	b _022EBC14
_022EBC00:
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x17c]
	bl ov00_022EC1C0
	str r4, [r0, #0x180]
_022EBC14:
	bl ov00_022EC1C0
	mov r2, #0
	str r2, [r0, #0x184]
	str r2, [r0, #0x188]
	mov r1, r4
	mov r0, #1
	bl ov00_022E7504
	bl ov00_022EB810
	cmp r0, #0
	ldmneia sp!, {r4, pc}
	bl ov00_022EC1C0
	mov r1, #0xff
	strb r1, [r0, #0x3cc]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022EBB98

	arm_func_start ov00_022EBC4C
ov00_022EBC4C: ; 0x022EBC4C
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x9c
	mov sl, r0
	mov sb, r1
	mov r8, #0
	bl ov00_022E1FC0
	cmp r0, #5
	beq _022EBCA0
	bl ov00_022E1FC0
	cmp r0, #6
	addne sp, sp, #0x9c
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	beq _022EBCA0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	addne sp, sp, #0x9c
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022EBCA0:
	cmp sb, #0x14
	addlo sp, sp, #0x9c
	ldmloia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r5, _022EBD54 ; =ov00_0231A2A4
	add r4, sp, #0x1c
	add r7, sp, #8
	mov r6, #0x14
	mov fp, #4
_022EBCC0:
	mov r0, sl
	mov r1, r7
	mov r2, r6
	bl MemcpyFast
	mov r0, r7
	mov r1, r5
	mov r2, fp
	bl strncmp
	cmp r0, #0
	ldreq r0, [sp, #0xc]
	cmpeq r0, #3
	addne sp, sp, #0x9c
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldrb r2, [sp, #0x11]
	mov r1, r4
	add r0, sl, #0x14
	bl MemcpyFast
	str r4, [sp]
	ldrb r0, [sp, #0x11]
	mov r0, r0, asr #2
	str r0, [sp, #4]
	ldrb r0, [sp, #0x10]
	ldrh r3, [sp, #0x12]
	ldr r1, [sp, #0x18]
	ldr r2, [sp, #0x14]
	bl ov00_022E7CE8
	cmp r0, #0
	addeq sp, sp, #0x9c
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldrb r0, [sp, #0x11]
	add r0, r0, #0x14
	add r8, r8, r0
	add r0, r8, #0x14
	cmp r0, sb
	bls _022EBCC0
	add sp, sp, #0x9c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022EBD54: .word ov00_0231A2A4
	arm_func_end ov00_022EBC4C

	arm_func_start ov00_022EBD58
ov00_022EBD58: ; 0x022EBD58
	bx lr
	arm_func_end ov00_022EBD58

	arm_func_start ov00_022EBD5C
ov00_022EBD5C: ; 0x022EBD5C
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #0x1c
	mov r5, r0
	mov r6, r2
	mov r4, r3
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #6
	beq _022EBD94
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xb
	addne sp, sp, #0x1c
	ldmneia sp!, {r3, r4, r5, r6, pc}
_022EBD94:
	cmp r4, #0
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	cmp r5, #0
	bne _022EBF90
	mov r0, #0
	str r0, [r4, #8]
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x14]
	add r1, r1, #1
	strb r1, [r0, #0x14]
	bl ov00_022EC1C0
	ldrb r1, [r4]
	ldrb r5, [r0, #0x14]
	cmp r1, #0
	beq _022EBF28
	bl ov00_022EC1C0
	ldr r1, [r6, #4]
	add r0, r0, r5, lsl #2
	str r1, [r0, #0x210]
	ldrh r4, [r6, #2]
	bl ov00_022EC1C0
	mov r2, r4, asr #8
	mov r1, r4, lsl #8
	add r0, r0, r5, lsl #1
	and r2, r2, #0xff
	and r1, r1, #0xff00
	orr r1, r2, r1
	add r0, r0, #0x200
	strh r1, [r0, #0x90]
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x17c]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x180]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x184]
	str r1, [r0, #0x188]
	bl ov00_022EC1C0
	ldr r0, [r0, #0x1a0]
	cmp r0, #0xb
	bne _022EBE50
	mov r0, #0xc
	bl ov00_022EC1D0
	b _022EBE58
_022EBE50:
	mov r0, #7
	bl ov00_022EC1D0
_022EBE58:
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0xc]
	bl ov00_022EC1C0
	ldr r3, [r0, #0x200]
	ldr r2, _022EC138 ; =ov00_0231A1C0
	add r0, sp, #0x10
	mov r1, #0xc
	bl sub_0207911C
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	mov r6, r0
	bl ov00_022EC1C0
	add r1, r6, r5, lsl #2
	mov r2, r0
	ldr r0, [r1, #0x210]
	add r1, r2, r5, lsl #1
	add r1, r1, #0x200
	ldrh r1, [r1, #0x90]
	mov r2, #0
	bl ov00_02310BF4
	mov r6, r0
	bl ov00_022EC1C0
	mvn r1, #0
	str r1, [sp]
	ldr r3, _022EC13C ; =0x00001388
	mov r1, #0
	str r3, [sp, #4]
	ldr r0, [r0, #8]
	mov r2, r6
	str r0, [sp, #8]
	str r1, [sp, #0xc]
	ldr r0, [r4, #4]
	add r3, sp, #0x10
	ldr r0, [r0]
	bl ov00_0230E104
	cmp r0, #1
	bne _022EBF00
	bl ov00_022EB8CC
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, r5, r6, pc}
_022EBF00:
	cmp r0, #0
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	bl ov00_022EC1C0
	add r0, r0, r5, lsl #2
	ldr r0, [r0, #0xf4]
	bl ov00_022E96E4
	add sp, sp, #0x1c
	cmp r0, #0
	ldmia sp!, {r3, r4, r5, r6, pc}
_022EBF28:
	cmp r6, #0
	beq _022EBF6C
	sub r5, r5, #1
	bl ov00_022EC1C0
	ldr r1, [r6, #4]
	add r0, r0, r5, lsl #2
	str r1, [r0, #0x210]
	ldrh r4, [r6, #2]
	bl ov00_022EC1C0
	mov r2, r4, asr #8
	mov r1, r4, lsl #8
	add r0, r0, r5, lsl #1
	and r2, r2, #0xff
	and r1, r1, #0xff00
	orr r1, r2, r1
	add r0, r0, #0x200
	strh r1, [r0, #0x90]
_022EBF6C:
	bl ov00_022EC1C0
	mov r4, r0
	bl sub_0207AE44
	str r0, [r4, #0x18c]
	mov r0, #7
	str r1, [r4, #0x190]
	bl ov00_022EC1D0
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, r5, r6, pc}
_022EBF90:
	ldr r0, [r4, #8]
	cmp r0, #0
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	mov r0, r5
	bl ov00_022EB86C
	mov r6, r0
	cmp r6, #2
	cmpne r6, #1
	cmpne r6, #3
	addne sp, sp, #0x1c
	ldmneia sp!, {r3, r4, r5, r6, pc}
	ldrb r0, [r4]
	cmp r0, #0
	bne _022EC050
	cmp r6, #1
	cmpne r6, #3
	beq _022EBFEC
	cmp r6, #2
	bne _022EC02C
	ldrb r0, [r4, #1]
	cmp r0, #1
	blo _022EC02C
_022EBFEC:
	mov r0, #0
	str r0, [r4, #8]
	bl ov00_022EC140
	cmp r0, #0
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	add r0, r4, r0, lsl #2
	ldr r0, [r0, #0xf4]
	bl ov00_022E9900
	add sp, sp, #0x1c
	cmp r0, #0
	ldmia sp!, {r3, r4, r5, r6, pc}
_022EC02C:
	ldrb r1, [r4, #1]
	mov r0, r4
	add r1, r1, #1
	strb r1, [r4, #1]
	bl ov00_022E77F0
	bl ov00_022EB810
	add sp, sp, #0x1c
	cmp r0, #0
	ldmia sp!, {r3, r4, r5, r6, pc}
_022EC050:
	bl ov00_022EC1C0
	mov r5, r0
	bl sub_0207AE44
	str r0, [r5, #0x184]
	cmp r6, #1
	str r1, [r5, #0x188]
	cmpne r6, #3
	beq _022EC090
	cmp r6, #2
	addne sp, sp, #0x1c
	ldmneia sp!, {r3, r4, r5, r6, pc}
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x17c]
	cmp r0, #1
	addlo sp, sp, #0x1c
	ldmloia sp!, {r3, r4, r5, r6, pc}
_022EC090:
	mov r0, #0
	str r0, [r4, #8]
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	beq _022EC0B8
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #2
	bne _022EC0D0
_022EC0B8:
	mov r0, #1
	bl ov00_022EC140
	cmp r0, #0
	bne _022EC0E4
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, r5, r6, pc}
_022EC0D0:
	mov r0, #0
	bl ov00_022EC140
	cmp r0, #0
	addeq sp, sp, #0x1c
	ldmeqia sp!, {r3, r4, r5, r6, pc}
_022EC0E4:
	bl ov00_022EC1C0
	mov r1, #0
	strb r1, [r0, #0x17c]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x180]
	bl ov00_022EC1C0
	mov r1, #0
	str r1, [r0, #0x184]
	str r1, [r0, #0x188]
	bl ov00_022EC1C0
	mov r4, r0
	bl ov00_022EC1C0
	ldrb r0, [r0, #0xd]
	add r0, r0, #1
	add r0, r4, r0, lsl #2
	ldr r0, [r0, #0xf4]
	bl ov00_022E96E4
	cmp r0, #0
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, r5, r6, pc}
	.align 2, 0
_022EC138: .word ov00_0231A1C0
_022EC13C: .word 0x00001388
	arm_func_end ov00_022EBD5C

	arm_func_start ov00_022EC140
ov00_022EC140: ; 0x022EC140
	stmdb sp!, {r3, lr}
	cmp r0, #0
	movne r0, #1
	ldmneia sp!, {r3, pc}
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	beq _022EC170
	bl ov00_022EC1C0
	ldrb r1, [r0, #0x17d]
	add r1, r1, #1
	strb r1, [r0, #0x17d]
_022EC170:
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x15]
	cmp r0, #3
	beq _022EC190
	bl ov00_022EC1C0
	ldrb r0, [r0, #0x17d]
	cmp r0, #5
	blo _022EC1A4
_022EC190:
	ldr r1, _022EC1AC ; =0xFFFEAE6C
	mov r0, #6
	bl ov00_022E6570
	mov r0, #0
	ldmia sp!, {r3, pc}
_022EC1A4:
	mov r0, #1
	ldmia sp!, {r3, pc}
	.align 2, 0
_022EC1AC: .word 0xFFFEAE6C
	arm_func_end ov00_022EC140

	arm_func_start ov00_022EC1B0
ov00_022EC1B0: ; 0x022EC1B0
	ldr r1, _022EC1BC ; =ov00_02326F48
	str r0, [r1, #4]
	bx lr
	.align 2, 0
_022EC1BC: .word ov00_02326F48
	arm_func_end ov00_022EC1B0

	arm_func_start ov00_022EC1C0
ov00_022EC1C0: ; 0x022EC1C0
	ldr r0, _022EC1CC ; =ov00_02326F48
	ldr r0, [r0, #4]
	bx lr
	.align 2, 0
_022EC1CC: .word ov00_02326F48
	arm_func_end ov00_022EC1C0

	arm_func_start ov00_022EC1D0
ov00_022EC1D0: ; 0x022EC1D0
	ldr r1, _022EC1E0 ; =ov00_02326F48
	ldr r1, [r1, #4]
	str r0, [r1, #0x1a0]
	bx lr
	.align 2, 0
_022EC1E0: .word ov00_02326F48
	arm_func_end ov00_022EC1D0

	arm_func_start ov00_022EC1E4
ov00_022EC1E4: ; 0x022EC1E4
	ldr r0, _022EC1F8 ; =ov00_023276C0
	mov r1, #0
	str r1, [r0]
	str r1, [r0, #4]
	bx lr
	.align 2, 0
_022EC1F8: .word ov00_023276C0
	arm_func_end ov00_022EC1E4

	arm_func_start ov00_022EC1FC
ov00_022EC1FC: ; 0x022EC1FC
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	ldr r4, _022EC260 ; =ov00_023276C0
	ldr r8, [r4]
	cmp r8, #0
	beq _022EC24C
	mov r7, #4
	mov r6, r7
	mov r5, #0
_022EC21C:
	ldr r1, [r8, #0xc]
	mov r0, r7
	str r1, [r4]
	ldmib r8, {r1, r2}
	bl ov00_022E0434
	mov r0, r6
	mov r1, r8
	mov r2, r5
	bl ov00_022E0434
	ldr r8, [r4]
	cmp r8, #0
	bne _022EC21C
_022EC24C:
	ldr r0, _022EC260 ; =ov00_023276C0
	mov r1, #0
	str r1, [r0]
	str r1, [r0, #4]
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022EC260: .word ov00_023276C0
	arm_func_end ov00_022EC1FC

	arm_func_start ov00_022EC264
ov00_022EC264: ; 0x022EC264
	ldr r0, _022EC27C ; =ov00_023276C0
	ldr r0, [r0, #4]
	cmp r0, #0x6000
	movlt r0, #1
	movge r0, #0
	bx lr
	.align 2, 0
_022EC27C: .word ov00_023276C0
	arm_func_end ov00_022EC264

	arm_func_start ov00_022EC280
ov00_022EC280: ; 0x022EC280
	ldr ip, _022EC28C ; =ov00_022EC294
	ldr r0, _022EC290 ; =ov00_0230E280
	bx ip
	.align 2, 0
_022EC28C: .word ov00_022EC294
_022EC290: .word ov00_0230E280
	arm_func_end ov00_022EC280

	arm_func_start ov00_022EC294
ov00_022EC294: ; 0x022EC294
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	ldr r4, _022EC370 ; =ov00_023276C0
	mov sl, r0
	ldr r8, [r4]
	cmp r8, #0
	beq _022EC31C
	mov r5, #0
	mov r6, #1
	mov fp, #4
	mov r7, r5
_022EC2BC:
	mov sb, r7
_022EC2C0:
	mov r3, r6
	ldmia r8, {r0, r1, r2}
	blx sl
	cmp r0, #0
	bne _022EC300
	ldr r2, [r4, #4]
	ldr r1, [r8, #8]
	mov r0, fp
	sub r1, r2, r1
	str r1, [r4, #4]
	ldmib r8, {r1, r2}
	bl ov00_022E0434
	str r5, [r8, #4]
	str r5, [r8, #8]
	str r5, [r8]
	b _022EC30C
_022EC300:
	add sb, sb, #1
	cmp sb, #3
	blt _022EC2C0
_022EC30C:
	cmp sb, #3
	ldrne r8, [r8, #0xc]
	cmpne r8, #0
	bne _022EC2BC
_022EC31C:
	ldr r4, _022EC370 ; =ov00_023276C0
	ldr r1, [r4]
	cmp r1, #0
	beq _022EC360
	mov r6, #4
	mov r5, #0
_022EC334:
	ldr r0, [r1, #4]
	cmp r0, #0
	bne _022EC360
	ldr r3, [r1, #0xc]
	mov r0, r6
	mov r2, r5
	str r3, [r4]
	bl ov00_022E0434
	ldr r1, [r4]
	cmp r1, #0
	bne _022EC334
_022EC360:
	cmp r1, #0
	moveq r0, #1
	movne r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022EC370: .word ov00_023276C0
	arm_func_end ov00_022EC294

	arm_func_start ov00_022EC374
ov00_022EC374: ; 0x022EC374
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr r3, _022EC458 ; =ov00_023276C0
	mov r5, r2
	ldr r2, [r3, #4]
	ldr r4, _022EC45C ; =ov00_023276C0
	mov r7, r0
	add r0, r2, r5
	cmp r0, #0x8000
	mov r6, r1
	movgt r0, #0
	ldmgtia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r0, [r3]
	cmp r0, #0
	beq _022EC3BC
_022EC3AC:
	add r4, r0, #0xc
	ldr r0, [r0, #0xc]
	cmp r0, #0
	bne _022EC3AC
_022EC3BC:
	mov r0, #4
	mov r1, #0x10
	bl ov00_022E03F0
	str r0, [r4]
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r1, r5
	mov r0, #4
	bl ov00_022E03F0
	ldr r1, [r4]
	str r0, [r1, #4]
	ldr r1, [r4]
	ldr r0, [r1, #4]
	cmp r0, #0
	bne _022EC414
	mov r0, #4
	mov r2, #0x10
	bl ov00_022E0434
	mov r0, #0
	str r0, [r4]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022EC414:
	str r7, [r1]
	ldr r0, [r4]
	mov r2, #0
	str r5, [r0, #8]
	ldr r1, [r4]
	mov r0, r6
	str r2, [r1, #0xc]
	ldr r1, [r4]
	mov r2, r5
	ldr r1, [r1, #4]
	bl MemcpyFast
	ldr r1, _022EC458 ; =ov00_023276C0
	mov r0, #1
	ldr r2, [r1, #4]
	add r2, r2, r5
	str r2, [r1, #4]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022EC458: .word ov00_023276C0
_022EC45C: .word ov00_023276C0
	arm_func_end ov00_022EC374

	arm_func_start ov00_022EC460
ov00_022EC460: ; 0x022EC460
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r0
	mov r5, r1
	bl ov00_022E0378
	cmp r0, #0
	bne _022EC4A0
	cmp r5, #1
	bne _022EC490
	mov r0, r4
	bl ov00_022E1F88
	cmp r0, #0
	beq _022EC4A0
_022EC490:
	mov r0, r4
	bl ov00_022E220C
	cmp r0, #0
	bne _022EC4A8
_022EC4A0:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022EC4A8:
	mov r0, r4
	bl ov00_022EC9B0
	cmp r0, #1
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	mov r0, r4
	bl ov00_022ECDCC
	mov r4, r0
	mov r0, r5
	bl ov00_022EC67C
	cmp r4, r0
	movlt r0, #0
	ldmltia sp!, {r3, r4, r5, pc}
	bl ov00_022EC264
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022EC460

	arm_func_start ov00_022EC4F0
ov00_022EC4F0: ; 0x022EC4F0
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #8
	mov r7, r1
	mov r8, r0
	mov r0, r7
	mov r6, r2
	mov r5, r3
	bl ov00_022EC998
	mov r4, r0
	mov r0, r7
	mov r1, r8
	bl ov00_022EC460
	cmp r0, #0
	addeq sp, sp, #8
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	mov r0, #1
	strb r0, [r4, #0x1c]
	str r6, [r4]
	mov r0, #0
	str r0, [r4, #0xc]
	add r0, sp, #0
	mov r1, r8
	mov r2, r5
	str r5, [r4, #0x14]
	bl ov00_022EC610
	add r1, sp, #0
	mov r0, r7
	mov r2, #8
	mov r3, #1
	bl ov00_022EC9E8
	ldr r0, _022EC60C ; =ov00_023276C8
	ldr r0, [r0]
	add r0, r0, #0x600
	ldrh sb, [r0, #0x10]
	mov r0, r7
	cmp r5, sb
	movle sb, r5
	bl ov00_022ECDCC
	cmp sb, r0
	addgt sp, sp, #8
	movgt r0, #1
	ldmgtia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	mov r0, r7
	mov r1, r6
	mov r2, sb
	mov r3, #1
	bl ov00_022EC9E8
	ldr r0, [r4, #0xc]
	add r1, r0, sb
	str r1, [r4, #0xc]
	ldr r0, [r4, #0x14]
	cmp r1, r0
	bne _022EC600
	mov r2, #0
	strb r2, [r4, #0x1c]
	str r2, [r4]
	str r2, [r4, #0xc]
	ldr r1, _022EC60C ; =ov00_023276C8
	str r2, [r4, #0x14]
	ldr r1, [r1]
	ldr r2, [r1, #0x600]
	cmp r2, #0
	beq _022EC600
	cmp r8, #1
	bne _022EC600
	mov r1, r7
	blx r2
_022EC600:
	mov r0, #1
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022EC60C: .word ov00_023276C8
	arm_func_end ov00_022EC4F0

	arm_func_start ov00_022EC610
ov00_022EC610: ; 0x022EC610
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	mov r4, r2
	ldr r1, _022EC63C ; =ov00_0231A2C0
	add r0, r6, #6
	mov r2, #2
	bl strncpy
	strh r5, [r6, #4]
	str r4, [r6]
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022EC63C: .word ov00_0231A2C0
	arm_func_end ov00_022EC610

	arm_func_start ov00_022EC640
ov00_022EC640: ; 0x022EC640
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	add r1, sp, #0
	mov r2, #8
	bl MemcpyFast
	ldr r1, _022EC678 ; =ov00_0231A2C0
	add r0, sp, #6
	mov r2, #2
	bl memcmp
	cmp r0, #0
	ldreqh r0, [sp, #4]
	movne r0, #0
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022EC678: .word ov00_0231A2C0
	arm_func_end ov00_022EC640

	arm_func_start ov00_022EC67C
ov00_022EC67C: ; 0x022EC67C
	cmp r0, #2
	cmpne r0, #3
	cmpne r0, #4
	bne _022EC694
	mov r0, #0xc
	bx lr
_022EC694:
	mov r0, #8
	bx lr
	arm_func_end ov00_022EC67C

	arm_func_start ov00_022EC69C
ov00_022EC69C: ; 0x022EC69C
	stmdb sp!, {r3, lr}
	ldr r3, _022EC6D0 ; =ov00_023276C8
	ldr r2, _022EC6D4 ; =0x00000614
	mov r1, #0
	str r0, [r3]
	bl MemsetFast
	ldr r0, _022EC6D0 ; =ov00_023276C8
	ldr r1, _022EC6D8 ; =0x000005B9
	ldr r0, [r0]
	add r0, r0, #0x600
	strh r1, [r0, #0x10]
	bl ov00_022EC1E4
	ldmia sp!, {r3, pc}
	.align 2, 0
_022EC6D0: .word ov00_023276C8
_022EC6D4: .word 0x00000614
_022EC6D8: .word 0x000005B9
	arm_func_end ov00_022EC69C

	arm_func_start ov00_022EC6DC
ov00_022EC6DC: ; 0x022EC6DC
	stmdb sp!, {r3, lr}
	ldr ip, _022EC714 ; =ov00_023276C8
	ldr ip, [ip]
	cmp ip, #0
	ldmeqia sp!, {r3, pc}
	cmp r1, #0
	cmpne r2, #0
	ldmeqia sp!, {r3, pc}
	cmp r3, #0
	beq _022EC70C
	bl ov00_022ECA70
	ldmia sp!, {r3, pc}
_022EC70C:
	bl ov00_022ECB64
	ldmia sp!, {r3, pc}
	.align 2, 0
_022EC714: .word ov00_023276C8
	arm_func_end ov00_022EC6DC

	arm_func_start ov00_022EC718
ov00_022EC718: ; 0x022EC718
	stmdb sp!, {r4, lr}
	ldr r2, _022EC754 ; =ov00_023276C8
	mov r4, r1
	ldr r1, [r2]
	ldr r1, [r1, #0x60c]
	cmp r1, #0
	ldmeqia sp!, {r4, pc}
	bl ov00_022E2108
	ldr r2, _022EC754 ; =ov00_023276C8
	mov r1, r0
	ldr r2, [r2]
	mov r0, r4
	ldr r2, [r2, #0x60c]
	blx r2
	ldmia sp!, {r4, pc}
	.align 2, 0
_022EC754: .word ov00_023276C8
	arm_func_end ov00_022EC718

	arm_func_start ov00_022EC758
ov00_022EC758: ; 0x022EC758
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	ldr r0, _022EC8E8 ; =ov00_023276C8
	ldr r0, [r0]
	cmp r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r0, sp, #0
	bl ov00_022E1F38
	mov r7, r0
	mov r8, #0
	cmp r7, #0
	ldmleia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r4, _022EC8E8 ; =ov00_023276C8
	mov fp, r8
_022EC78C:
	ldr r0, [sp]
	ldrb sb, [r0, r8]
	bl ov00_022EC280
	mov r0, sb
	bl ov00_022E1F88
	cmp r0, #0
	beq _022EC824
	mov r0, sb
	bl ov00_022EC998
	ldr r1, [r4]
	mov r6, r0
	ldr r0, [r1, #0x608]
	cmp r0, #0
	ldrne r0, [r6, #0x2c]
	cmpne r0, #0
	beq _022EC824
	bl sub_0207AE44
	mov sl, r1
	ldr r2, [r6, #0x24]
	mov r5, r0
	subs r2, r5, r2
	ldr r1, [r6, #0x28]
	mov r0, r2, lsl #6
	sbc r1, sl, r1
	mov r1, r1, lsl #6
	orr r1, r1, r2, lsr #26
	ldr r2, _022EC8EC ; =0x000082EA
	mov r3, #0
	bl _ll_udiv
	ldr r1, [r6, #0x2c]
	cmp r0, r1
	bls _022EC824
	ldr r1, [r4]
	mov r0, sb
	ldr r1, [r1, #0x608]
	blx r1
	str r5, [r6, #0x24]
	str sl, [r6, #0x28]
_022EC824:
	bl ov00_022E1F1C
	cmp sb, r0
	beq _022EC8D8
	mov r0, sb
	bl ov00_022EC9B0
	cmp r0, #1
	bne _022EC8D8
	mov r0, sb
	bl ov00_022EC998
	mov r5, r0
	ldr r0, [r4]
	ldr r2, [r5, #0x14]
	add r0, r0, #0x600
	ldr r1, [r5, #0xc]
	ldrh r6, [r0, #0x10]
	sub r0, r2, r1
	cmp r0, r6
	movle r6, r0
	mov r0, sb
	bl ov00_022ECDCC
	cmp r0, r6
	blt _022EC8D8
	ldr r3, [r5]
	ldr r1, [r5, #0xc]
	mov r0, sb
	add r1, r3, r1
	mov r2, r6
	mov r3, #1
	bl ov00_022EC9E8
	ldr r0, [r5, #0xc]
	add r1, r0, r6
	str r1, [r5, #0xc]
	ldr r0, [r5, #0x14]
	cmp r1, r0
	bne _022EC8D8
	strb fp, [r5, #0x1c]
	str fp, [r5]
	str fp, [r5, #0xc]
	str fp, [r5, #0x14]
	ldr r1, [r4]
	ldr r2, [r1, #0x600]
	cmp r2, #0
	beq _022EC8D8
	mov r1, sb
	blx r2
_022EC8D8:
	add r8, r8, #1
	cmp r8, r7
	blt _022EC78C
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022EC8E8: .word ov00_023276C8
_022EC8EC: .word 0x000082EA
	arm_func_end ov00_022EC758

	arm_func_start ov00_022EC8F0
ov00_022EC8F0: ; 0x022EC8F0
	ldr r2, _022EC978 ; =ov00_023276C8
	ldr r3, [r2]
	cmp r3, #0
	bxeq lr
	mov r1, #0x30
	mul r1, r0, r1
	add r3, r3, r1
	mov r0, #0
	str r0, [r3, #0xc]
	ldr r3, [r2]
	add r3, r3, r1
	str r0, [r3, #0x10]
	ldr r3, [r2]
	add r3, r3, r1
	str r0, [r3, #0x14]
	ldr r3, [r2]
	add r3, r3, r1
	str r0, [r3, #0x18]
	ldr r3, [r2]
	add r3, r3, r1
	strb r0, [r3, #0x1c]
	ldr r3, [r2]
	add r3, r3, r1
	str r0, [r3, #4]
	ldr r3, [r2]
	add r3, r3, r1
	str r0, [r3, #8]
	ldr r3, [r2]
	add r3, r3, r1
	strb r0, [r3, #0x1d]
	ldr r2, [r2]
	add r1, r2, r1
	strh r0, [r1, #0x22]
	bx lr
	.align 2, 0
_022EC978: .word ov00_023276C8
	arm_func_end ov00_022EC8F0

	arm_func_start ov00_022EC97C
ov00_022EC97C: ; 0x022EC97C
	ldr r0, _022EC990 ; =ov00_023276C8
	mov r1, #0
	ldr ip, _022EC994 ; =ov00_022EC1FC
	str r1, [r0]
	bx ip
	.align 2, 0
_022EC990: .word ov00_023276C8
_022EC994: .word ov00_022EC1FC
	arm_func_end ov00_022EC97C

	arm_func_start ov00_022EC998
ov00_022EC998: ; 0x022EC998
	ldr r2, _022EC9AC ; =ov00_023276C8
	mov r1, #0x30
	ldr r2, [r2]
	mla r0, r1, r0, r2
	bx lr
	.align 2, 0
_022EC9AC: .word ov00_023276C8
	arm_func_end ov00_022EC998

	arm_func_start ov00_022EC9B0
ov00_022EC9B0: ; 0x022EC9B0
	ldr r2, _022EC9C8 ; =ov00_023276C8
	mov r1, #0x30
	ldr r2, [r2]
	mla r1, r0, r1, r2
	ldrb r0, [r1, #0x1c]
	bx lr
	.align 2, 0
_022EC9C8: .word ov00_023276C8
	arm_func_end ov00_022EC9B0

	arm_func_start ov00_022EC9CC
ov00_022EC9CC: ; 0x022EC9CC
	ldr r2, _022EC9E4 ; =ov00_023276C8
	mov r1, #0x30
	ldr r2, [r2]
	mla r1, r0, r1, r2
	ldrb r0, [r1, #0x1d]
	bx lr
	.align 2, 0
_022EC9E4: .word ov00_023276C8
	arm_func_end ov00_022EC9CC

	arm_func_start ov00_022EC9E8
ov00_022EC9E8: ; 0x022EC9E8
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r5, r3
	mov r7, r1
	mov r6, r2
	bl ov00_022E20A4
	mov r4, r0
	cmp r5, #0
	beq _022ECA58
	bl ov00_022EC280
	cmp r0, #0
	beq _022ECA30
	mov r0, r4
	mov r1, r7
	mov r2, r6
	mov r3, r5
	bl ov00_0230E280
	cmp r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
_022ECA30:
	mov r0, r4
	mov r1, r7
	mov r2, r6
	bl ov00_022EC374
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, _022ECA6C ; =0xFFFE82A2
	mov r0, #6
	bl ov00_022E0394
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022ECA58:
	mov r1, r7
	mov r2, r6
	mov r3, r5
	bl ov00_0230E280
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022ECA6C: .word 0xFFFE82A2
	arm_func_end ov00_022EC9E8

	arm_func_start ov00_022ECA70
ov00_022ECA70: ; 0x022ECA70
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r1
	mov r5, r2
	bl ov00_022E2108
	mov r4, r0
	bl ov00_022EC9CC
	cmp r0, #4
	addls pc, pc, r0, lsl #2
	b _022ECB4C
_022ECA94: ; jump table
	b _022ECAA8 ; case 0
	b _022ECAD4 ; case 1
	b _022ECAE8 ; case 2
	b _022ECAFC ; case 3
	b _022ECB10 ; case 4
_022ECAA8:
	mov r0, r6
	bl ov00_022EC640
	cmp r0, #2
	ldmloia sp!, {r4, r5, r6, pc}
	cmp r0, #4
	ldmhiia sp!, {r4, r5, r6, pc}
	mov r0, r4
	mov r1, r6
	mov r2, r5
	bl ov00_022ECBE4
	ldmia sp!, {r4, r5, r6, pc}
_022ECAD4:
	mov r0, r4
	mov r1, r6
	mov r2, r5
	bl ov00_022ECBE4
	ldmia sp!, {r4, r5, r6, pc}
_022ECAE8:
	mov r0, r4
	mov r1, r6
	mov r2, r5
	bl ov00_022ECCAC
	ldmia sp!, {r4, r5, r6, pc}
_022ECAFC:
	mov r0, r4
	mov r1, r6
	mov r2, r5
	bl ov00_022ECD90
	ldmia sp!, {r4, r5, r6, pc}
_022ECB10:
	mov r0, #0x30
	mul ip, r4, r0
	ldr r0, _022ECB5C ; =ov00_023276C8
	mov r3, #1
	ldr r1, [r0]
	mov r2, #0
	add r1, r1, ip
	strb r3, [r1, #0x1d]
	ldr r1, [r0]
	add r1, r1, ip
	str r2, [r1, #0x10]
	ldr r0, [r0]
	add r0, r0, ip
	str r2, [r0, #0x18]
	ldmia sp!, {r4, r5, r6, pc}
_022ECB4C:
	ldr r1, _022ECB60 ; =0xFFFE82B6
	mov r0, #6
	bl ov00_022E0394
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022ECB5C: .word ov00_023276C8
_022ECB60: .word 0xFFFE82B6
	arm_func_end ov00_022ECA70

	arm_func_start ov00_022ECB64
ov00_022ECB64: ; 0x022ECB64
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r1
	mov r5, r2
	bl ov00_022E2108
	ldr r2, _022ECBE0 ; =ov00_023276C8
	mov r1, #0x30
	ldr r2, [r2]
	mla r4, r0, r1, r2
	ldr r1, [r4, #4]
	cmp r1, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	ldr r1, [r4, #8]
	cmp r1, r5
	ldmltia sp!, {r4, r5, r6, pc}
	ldr r3, [r2, #0x604]
	cmp r3, #0
	beq _022ECBB4
	mov r1, r6
	mov r2, r5
	blx r3
_022ECBB4:
	ldr r0, _022ECBE0 ; =ov00_023276C8
	ldr r0, [r0]
	ldr r0, [r0, #0x608]
	cmp r0, #0
	ldrne r0, [r4, #0x2c]
	cmpne r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	bl sub_0207AE44
	str r0, [r4, #0x24]
	str r1, [r4, #0x28]
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022ECBE0: .word ov00_023276C8
	arm_func_end ov00_022ECB64

	arm_func_start ov00_022ECBE4
ov00_022ECBE4: ; 0x022ECBE4
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #8
	ldr r4, _022ECCA8 ; =ov00_023276C8
	mov r3, #0x30
	ldr r4, [r4]
	mov r7, r1
	mla r4, r0, r3, r4
	mov r6, r2
	bl ov00_022EC9CC
	strb r0, [r4, #0x1e]
	mov r0, r7
	bl ov00_022EC640
	mov r5, r0
	cmp r5, #4
	addls pc, pc, r5, lsl #2
	b _022ECC9C
_022ECC24: ; jump table
	b _022ECC9C ; case 0
	b _022ECC38 ; case 1
	b _022ECC94 ; case 2
	b _022ECC94 ; case 3
	b _022ECC94 ; case 4
_022ECC38:
	cmp r6, #8
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	add r1, sp, #0
	mov r0, r7
	mov r2, #8
	bl MemcpyFast
	ldr r1, [sp]
	mov r0, #0
	str r1, [r4, #0x18]
	str r0, [r4, #0x10]
	ldr r0, [r4, #4]
	cmp r0, #0
	beq _022ECC88
	ldr r1, [r4, #8]
	ldr r0, [r4, #0x18]
	cmp r1, r0
	movge r0, #2
	strgeb r0, [r4, #0x1d]
	bge _022ECC9C
_022ECC88:
	mov r0, #4
	strb r0, [r4, #0x1d]
	b _022ECC9C
_022ECC94:
	mov r0, #3
	strb r0, [r4, #0x1d]
_022ECC9C:
	strh r5, [r4, #0x22]
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022ECCA8: .word ov00_023276C8
	arm_func_end ov00_022ECBE4

	arm_func_start ov00_022ECCAC
ov00_022ECCAC: ; 0x022ECCAC
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr r3, _022ECD88 ; =ov00_023276C8
	mov r7, r0
	ldr r4, [r3]
	mov r3, #0x30
	mla r4, r7, r3, r4
	mov r6, r1
	mov r5, r2
	bl ov00_022EC9CC
	cmp r0, #2
	bne _022ECD10
	ldr r3, [r4, #0x10]
	ldr r0, [r4, #8]
	add r1, r3, r5
	cmp r1, r0
	ble _022ECCFC
	ldr r1, _022ECD8C ; =0xFFFE82AC
	mov r0, #6
	bl ov00_022E0394
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022ECCFC:
	ldr r1, [r4, #4]
	mov r0, r6
	mov r2, r5
	add r1, r1, r3
	bl MemcpyFast
_022ECD10:
	ldr r0, [r4, #0x10]
	add r0, r0, r5
	str r0, [r4, #0x10]
	ldr r2, [r4, #0x18]
	cmp r0, r2
	bne _022ECD5C
	mov r0, #1
	strb r0, [r4, #0x1d]
	mov r1, #0
	str r1, [r4, #0x10]
	ldr r0, _022ECD88 ; =ov00_023276C8
	str r1, [r4, #0x18]
	ldr r0, [r0]
	ldr r3, [r0, #0x604]
	cmp r3, #0
	beq _022ECD5C
	ldr r1, [r4, #4]
	mov r0, r7
	blx r3
_022ECD5C:
	ldr r0, _022ECD88 ; =ov00_023276C8
	ldr r0, [r0]
	ldr r0, [r0, #0x608]
	cmp r0, #0
	ldrne r0, [r4, #0x2c]
	cmpne r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	bl sub_0207AE44
	str r0, [r4, #0x24]
	str r1, [r4, #0x28]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022ECD88: .word ov00_023276C8
_022ECD8C: .word 0xFFFE82AC
	arm_func_end ov00_022ECCAC

	arm_func_start ov00_022ECD90
ov00_022ECD90: ; 0x022ECD90
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	bl ov00_022EC998
	ldrb r1, [r0, #0x1e]
	strb r1, [r0, #0x1d]
	ldrh r1, [r0, #0x22]
	cmp r1, #2
	cmpne r1, #3
	cmpne r1, #4
	ldmneia sp!, {r3, r4, r5, pc}
	mov r0, r5
	mov r2, r4
	bl ov00_022E6668
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022ECD90

	arm_func_start ov00_022ECDCC
ov00_022ECDCC: ; 0x022ECDCC
	stmdb sp!, {r3, lr}
	bl ov00_022E20A4
	bl ov00_0230E438
	ldr r1, _022ECDEC ; =0xFFFFFDF9
	add r0, r0, r1
	cmp r0, #0
	movle r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022ECDEC: .word 0xFFFFFDF9
	arm_func_end ov00_022ECDCC

	arm_func_start ov00_022ECDF0
ov00_022ECDF0: ; 0x022ECDF0
	stmdb sp!, {r3, lr}
	bl ov00_022FBF48
	ldr r1, _022ECE10 ; =ov00_023276CC
	mov r0, #1
	ldr r2, [r1, #4]
	add r2, r2, #1
	str r2, [r1, #4]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022ECE10: .word ov00_023276CC
	arm_func_end ov00_022ECDF0

	arm_func_start ov00_022ECE14
ov00_022ECE14: ; 0x022ECE14
	stmdb sp!, {r3, lr}
	ldr r0, _022ECE50 ; =ov00_023276CC
	ldr r0, [r0, #4]
	cmp r0, #0
	movle r0, #1
	ldmleia sp!, {r3, pc}
	bl ov00_022FBF9C
	ldr r0, _022ECE50 ; =ov00_023276CC
	ldr r1, [r0, #4]
	subs r1, r1, #1
	str r1, [r0, #4]
	bne _022ECE48
	bl ov00_022ED3CC
_022ECE48:
	mov r0, #1
	ldmia sp!, {r3, pc}
	.align 2, 0
_022ECE50: .word ov00_023276CC
	arm_func_end ov00_022ECE14

	arm_func_start ov00_022ECE54
ov00_022ECE54: ; 0x022ECE54
	stmdb sp!, {r3, lr}
	bl ov00_022E0378
	cmp r0, #0
	movne r0, #0
	ldmneia sp!, {r3, pc}
	bl ov00_022FC1C4
	mov r0, #1
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022ECE54

	arm_func_start ov00_022ECE74
ov00_022ECE74: ; 0x022ECE74
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr r4, [sp, #0x18]
	mov r7, r1
	ldr r5, [r4, #4]
	ldr r6, [r4, #0xc]
	cmp r5, #0
	beq _022ECECC
	cmp r7, #0
	bne _022ECEB0
	mov r1, r3
	mov r0, r2
	ldr r3, [r4]
	mov r2, r7
	blx r5
	b _022ECECC
_022ECEB0:
	mov r0, r7
	bl ov00_022ED164
	mov r0, #0
	ldr r3, [r4]
	mov r1, r0
	mov r2, r7
	blx r5
_022ECECC:
	cmp r7, #0
	bne _022ECEDC
	cmp r6, #1
	bne _022ECEF8
_022ECEDC:
	ldr r1, [r4, #0x10]
	cmp r1, #0
	moveq r6, #1
	beq _022ECEF8
	mov r0, #4
	mov r2, #0
	bl ov00_022E0434
_022ECEF8:
	mov r0, r4
	bl ov00_022ED31C
	cmp r6, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022ECE74

	arm_func_start ov00_022ECF10
ov00_022ECF10: ; 0x022ECF10
	stmdb sp!, {r4, lr}
	sub sp, sp, #8
	ldr r4, [sp, #0x18]
	ldr lr, [r4, #8]
	cmp lr, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r4, pc}
	ldr ip, [sp, #0x14]
	mov r0, r1
	str ip, [sp]
	mov r1, r2
	mov r2, r3
	ldr ip, [r4]
	ldr r3, [sp, #0x10]
	str ip, [sp, #4]
	blx lr
	add sp, sp, #8
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022ECF10

	arm_func_start ov00_022ECF58
ov00_022ECF58: ; 0x022ECF58
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #0x28
	ldr sb, [sp, #0x4c]
	ldr r8, [sp, #0x50]
	mov r5, r0
	mov r4, r1
	mov r7, r2
	mov sl, r3
	mov r6, #0
	bl ov00_022E0378
	cmp r0, #0
	addne sp, sp, #0x28
	mvnne r0, #7
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	ldr r1, [sp, #0x48]
	add r0, sp, #0x18
	str r8, [sp, #0x18]
	str sb, [sp, #0x1c]
	str r1, [sp, #0x20]
	str r7, [sp, #0x24]
	bl ov00_022ED2C0
	movs r7, r0
	bne _022ECFDC
	mvn r0, #4
	bl ov00_022ED164
	mov r0, r6
	mov r1, r0
	mov r3, r8
	sub r2, r0, #5
	blx sb
	add sp, sp, #0x28
	mvn r0, #4
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022ECFDC:
	cmp r4, #0
	ble _022ED02C
	mov r1, r4
	mov r0, #4
	bl ov00_022E03F0
	movs r6, r0
	bne _022ED028
	mvn r0, #4
	bl ov00_022ED164
	mov r0, #0
	mov r1, r0
	mov r3, r8
	sub r2, r0, #5
	blx sb
	mov r0, r7
	bl ov00_022ED31C
	add sp, sp, #0x28
	mvn r0, #4
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022ED028:
	str r6, [r7, #0x10]
_022ED02C:
	cmp sl, #0
	mov r1, #0
	beq _022ED06C
	ldr r0, [sl]
	ldr r2, _022ED0F4 ; =ov00_022ECF10
	stmia sp, {r0, r1}
	str r1, [sp, #8]
	str r2, [sp, #0xc]
	ldr r0, _022ED0F8 ; =ov00_022ECE74
	mov r2, r6
	str r0, [sp, #0x10]
	mov r0, r5
	mov r3, r4
	str r7, [sp, #0x14]
	bl ov00_022FBFF8
	b _022ED09C
_022ED06C:
	str r1, [sp]
	str r1, [sp, #4]
	ldr r2, _022ED0F4 ; =ov00_022ECF10
	str r1, [sp, #8]
	str r2, [sp, #0xc]
	ldr r0, _022ED0F8 ; =ov00_022ECE74
	mov r2, r6
	str r0, [sp, #0x10]
	mov r0, r5
	mov r3, r4
	str r7, [sp, #0x14]
	bl ov00_022FBFF8
_022ED09C:
	mov r4, r0
	cmp r4, #0
	bge _022ED0E4
	mov r0, r4
	bl ov00_022ED164
	mov r0, #0
	mov r1, r0
	mov r2, r4
	mov r3, r8
	blx sb
	ldr r1, [r7, #0x10]
	cmp r1, #0
	beq _022ED0DC
	mov r0, #4
	mov r2, #0
	bl ov00_022E0434
_022ED0DC:
	mov r0, r7
	bl ov00_022ED31C
_022ED0E4:
	mov r0, r4
	str r4, [r7, #0x14]
	add sp, sp, #0x28
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022ED0F4: .word ov00_022ECF10
_022ED0F8: .word ov00_022ECE74
	arm_func_end ov00_022ECF58

	arm_func_start ov00_022ED0FC
ov00_022ED0FC: ; 0x022ED0FC
	stmdb sp!, {lr}
	sub sp, sp, #0xc
	ldr lr, [sp, #0x10]
	ldr ip, [sp, #0x14]
	stmia sp, {r3, lr}
	mov r3, #0
	str ip, [sp, #8]
	bl ov00_022ECF58
	add sp, sp, #0xc
	ldmia sp!, {pc}
	arm_func_end ov00_022ED0FC

	arm_func_start ov00_022ED124
ov00_022ED124: ; 0x022ED124
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022FC1D8
	mov r0, r4
	bl ov00_022ED3A0
	movs r4, r0
	ldmeqia sp!, {r4, pc}
	ldr r1, [r4, #0x10]
	cmp r1, #0
	beq _022ED158
	mov r0, #4
	mov r2, #0
	bl ov00_022E0434
_022ED158:
	mov r0, r4
	bl ov00_022ED31C
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022ED124

	arm_func_start ov00_022ED164
ov00_022ED164: ; 0x022ED164
	stmdb sp!, {r4, lr}
	movs r4, r0
	mov r0, #7
	ldr r1, _022ED2A4 ; =0xFFFE8130
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	add r2, r4, #7
	cmp r2, #0x1a
	addls pc, pc, r2, lsl #2
	b _022ED298
_022ED18C: ; jump table
	b _022ED1F8 ; case 0
	b _022ED200 ; case 1
	b _022ED20C ; case 2
	b _022ED214 ; case 3
	b _022ED214 ; case 4
	b _022ED214 ; case 5
	b _022ED21C ; case 6
	b _022ED298 ; case 7
	b _022ED228 ; case 8
	b _022ED234 ; case 9
	b _022ED23C ; case 10
	b _022ED248 ; case 11
	b _022ED250 ; case 12
	b _022ED258 ; case 13
	b _022ED260 ; case 14
	b _022ED268 ; case 15
	b _022ED268 ; case 16
	b _022ED268 ; case 17
	b _022ED258 ; case 18
	b _022ED258 ; case 19
	b _022ED274 ; case 20
	b _022ED274 ; case 21
	b _022ED27C ; case 22
	b _022ED288 ; case 23
	b _022ED290 ; case 24
	b _022ED298 ; case 25
	b _022ED228 ; case 26
_022ED1F8:
	sub r1, r1, #0x320
	b _022ED298
_022ED200:
	ldr r2, _022ED2A8 ; =0xFFFFFCD6
	add r1, r1, r2
	b _022ED298
_022ED20C:
	sub r1, r1, #0x348
	b _022ED298
_022ED214:
	sub r1, r1, #0x334
	b _022ED298
_022ED21C:
	ldr r2, _022ED2AC ; =0xFFFFFCC2
	add r1, r1, r2
	b _022ED298
_022ED228:
	sub r1, r1, #1
	mov r0, #9
	b _022ED298
_022ED234:
	sub r1, r1, #0x348
	b _022ED298
_022ED23C:
	ldr r2, _022ED2B0 ; =0xFFFFFCAE
	add r1, r1, r2
	b _022ED298
_022ED248:
	sub r1, r1, #0x1e
	b _022ED298
_022ED250:
	sub r1, r1, #0x32
	b _022ED298
_022ED258:
	sub r1, r1, #0x14
	b _022ED298
_022ED260:
	sub r1, r1, #0x35c
	b _022ED298
_022ED268:
	ldr r2, _022ED2B4 ; =0xFFFFFC9A
	add r1, r1, r2
	b _022ED298
_022ED274:
	sub r1, r1, #0x370
	b _022ED298
_022ED27C:
	ldr r2, _022ED2B8 ; =0xFFFFFC86
	add r1, r1, r2
	b _022ED298
_022ED288:
	sub r1, r1, #0x384
	b _022ED298
_022ED290:
	ldr r2, _022ED2BC ; =0xFFFFFC72
	add r1, r1, r2
_022ED298:
	bl ov00_022E0394
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022ED2A4: .word 0xFFFE8130
_022ED2A8: .word 0xFFFFFCD6
_022ED2AC: .word 0xFFFFFCC2
_022ED2B0: .word 0xFFFFFCAE
_022ED2B4: .word 0xFFFFFC9A
_022ED2B8: .word 0xFFFFFC86
_022ED2BC: .word 0xFFFFFC72
	arm_func_end ov00_022ED164

	arm_func_start ov00_022ED2C0
ov00_022ED2C0: ; 0x022ED2C0
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #4
	mov r1, #0x1c
	bl ov00_022E03F0
	movs ip, r0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	ldmia r4, {r0, r1, r2, r3}
	stmia ip, {r0, r1, r2, r3}
	mov r0, #0
	str r0, [ip, #0x18]
	ldr r1, _022ED318 ; =ov00_023276CC
	str r0, [ip, #0x10]
	ldr r0, [r1]
	cmp r0, #0
	moveq r0, ip
	streq ip, [r1]
	strne r0, [ip, #0x18]
	movne r0, ip
	strne ip, [r1]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022ED318: .word ov00_023276CC
	arm_func_end ov00_022ED2C0

	arm_func_start ov00_022ED31C
ov00_022ED31C: ; 0x022ED31C
	stmdb sp!, {r4, lr}
	ldr r1, _022ED39C ; =ov00_023276CC
	ldr r1, [r1]
	cmp r1, #0
	ldmeqia sp!, {r4, pc}
	cmp r1, r0
	bne _022ED354
	mov r0, #4
	mov r2, #0
	ldr r4, [r1, #0x18]
	bl ov00_022E0434
	ldr r0, _022ED39C ; =ov00_023276CC
	str r4, [r0]
	ldmia sp!, {r4, pc}
_022ED354:
	ldr r2, [r1, #0x18]
	cmp r2, #0
	ldmeqia sp!, {r4, pc}
_022ED360:
	cmp r2, r0
	movne r1, r2
	bne _022ED38C
	ldr ip, [r1, #0x18]
	mov r0, #4
	ldr r3, [ip, #0x18]
	mov r2, #0
	str r3, [r1, #0x18]
	mov r1, ip
	bl ov00_022E0434
	ldmia sp!, {r4, pc}
_022ED38C:
	ldr r2, [r2, #0x18]
	cmp r2, #0
	bne _022ED360
	ldmia sp!, {r4, pc}
	.align 2, 0
_022ED39C: .word ov00_023276CC
	arm_func_end ov00_022ED31C

	arm_func_start ov00_022ED3A0
ov00_022ED3A0: ; 0x022ED3A0
	ldr r1, _022ED3C8 ; =ov00_023276CC
	ldr r2, [r1]
	b _022ED3B0
_022ED3AC:
	ldr r2, [r2, #0x18]
_022ED3B0:
	cmp r2, #0
	ldrne r1, [r2, #0x14]
	cmpne r1, r0
	bne _022ED3AC
	mov r0, r2
	bx lr
	.align 2, 0
_022ED3C8: .word ov00_023276CC
	arm_func_end ov00_022ED3A0

	arm_func_start ov00_022ED3CC
ov00_022ED3CC: ; 0x022ED3CC
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	ldr r0, _022ED438 ; =ov00_023276CC
	ldr r8, [r0]
	cmp r8, #0
	beq _022ED428
	mov r7, #4
	mov r6, #0
	mov r5, r7
	mov r4, r6
_022ED3F0:
	mov sb, r8
	ldr r1, [sb, #0x10]
	ldr r8, [r8, #0x18]
	cmp r1, #0
	beq _022ED410
	mov r0, r7
	mov r2, r6
	bl ov00_022E0434
_022ED410:
	mov r0, r5
	mov r1, sb
	mov r2, r4
	bl ov00_022E0434
	cmp r8, #0
	bne _022ED3F0
_022ED428:
	ldr r0, _022ED438 ; =ov00_023276CC
	mov r1, #0
	str r1, [r0]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022ED438: .word ov00_023276CC
	arm_func_end ov00_022ED3CC

	arm_func_start ov00_022ED43C
ov00_022ED43C: ; 0x022ED43C
	stmdb sp!, {r3, lr}
	ldr r1, _022ED464 ; =ov00_023276D4
	mov r2, r0
	ldr r0, [r1, #8]
	mov r1, #0x300
	bl ov00_022EDD58
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022ED464: .word ov00_023276D4
	arm_func_end ov00_022ED43C

	arm_func_start ov00_022ED468
ov00_022ED468: ; 0x022ED468
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r0, _022ED528 ; =ov00_023276E0
	mov r1, r4
	mov r2, #6
	bl MemcpyFast
	ldr r1, _022ED52C ; =0x000007FF
	ldr r3, [r4]
	sub r0, r1, #0x800
	ldr r2, [r4, #4]
	and r0, r3, r0
	str r0, [r4]
	and r1, r2, r1
	str r1, [r4, #4]
	ldr r0, _022ED530 ; =ov00_023276E5
	add r1, r4, #8
	mov r2, #6
	bl MemcpyFast
	ldr r1, [r4, #8]
	ldr r0, [r4, #0xc]
	mov r1, r1, lsr #3
	orr r1, r1, r0, lsl #29
	str r1, [r4, #8]
	mov r3, r0, lsr #3
	str r3, [r4, #0xc]
	ldr r1, _022ED52C ; =0x000007FF
	ldr r2, [r4, #8]
	sub r0, r1, #0x800
	and r0, r2, r0
	str r0, [r4, #8]
	and r1, r1, r3
	str r1, [r4, #0xc]
	ldr r0, _022ED534 ; =ov00_023276EA
	add r1, r4, #0x10
	mov r2, #2
	bl MemcpyFast
	ldrh r1, [r4, #0x10]
	ldr r3, _022ED538 ; =0x000003FF
	ldr r0, _022ED53C ; =ov00_023276EC
	mov r1, r1, asr #6
	strh r1, [r4, #0x10]
	ldrh ip, [r4, #0x10]
	add r1, r4, #0x12
	mov r2, #2
	and r3, ip, r3
	strh r3, [r4, #0x10]
	bl MemcpyFast
	ldmia sp!, {r4, pc}
	.align 2, 0
_022ED528: .word ov00_023276E0
_022ED52C: .word 0x000007FF
_022ED530: .word ov00_023276E5
_022ED534: .word ov00_023276EA
_022ED538: .word 0x000003FF
_022ED53C: .word ov00_023276EC
	arm_func_end ov00_022ED468

	arm_func_start ov00_022ED540
ov00_022ED540: ; 0x022ED540
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	ldr r2, _022ED610 ; =ov00_023276D4
	mov sl, r1
	ldr sb, [r2, #8]
	bl ov00_022EDF4C
	ldr r1, _022ED614 ; =0x0000A001
	add r0, sl, #0x200
	bl sub_02085030
	mov r5, #0x100
	ldr r6, _022ED618 ; =ov00_023276E0
	mov r8, #0
	mov r4, r5
	mov fp, #0xe
	mov r7, r5
_022ED578:
	mov r0, sb
	mov r1, r7
	mov r2, sl
	bl ov00_022EDD58
	cmp r0, #0
	bne _022ED59C
	bl WaitForever2
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022ED59C:
	mov r0, r6
	mov r2, fp
	add r1, sl, #0xf0
	bl MemcpyFast
	mov r1, sl
	mov r2, #0xfe
	add r0, sl, #0x200
	bl sub_02085158
	strh r0, [sl, #0xfe]
_022ED5C0:
	mov r0, sb
	mov r1, r5
	mov r2, sl
	bl ov00_022EDDE8
	mov r0, sl
	mov r1, sb
	mov r2, r4
	add r3, sl, #0x100
	bl ov00_022EDE64
	cmp r0, #0
	beq _022ED5C0
	add r8, r8, #1
	cmp r8, #2
	add sb, sb, #0x100
	blt _022ED578
	bl ov00_022EDEB0
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022ED610: .word ov00_023276D4
_022ED614: .word 0x0000A001
_022ED618: .word ov00_023276E0
	arm_func_end ov00_022ED540

	arm_func_start ov00_022ED61C
ov00_022ED61C: ; 0x022ED61C
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #0x20
	mov r1, r0
	mov r2, r4
	bl ov00_022EDD58
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	ldrh r2, [r4]
	ldr r1, _022ED65C ; =ov00_023276D4
	mov r0, #1
	mov r2, r2, lsl #3
	sub r2, r2, #0x400
	str r2, [r1, #8]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022ED65C: .word ov00_023276D4
	arm_func_end ov00_022ED61C

	arm_func_start ov00_022ED660
ov00_022ED660: ; 0x022ED660
	stmdb sp!, {r3, lr}
	ldr r1, _022ED688 ; =ov00_023276D4
	mov r2, r0
	ldr r0, [r1, #8]
	mov r1, #0x400
	bl ov00_022EDD58
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022ED688: .word ov00_023276D4
	arm_func_end ov00_022ED660

	arm_func_start ov00_022ED68C
ov00_022ED68C: ; 0x022ED68C
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	ldr r3, _022ED710 ; =ov00_023276D4
	mov sl, #0x100
	ldr r5, [r3, #8]
	mov r8, r0
	mov r7, r1
	mov r6, r2
	mov r4, #0
	mov sb, sl
_022ED6B0:
	ldr r0, [r7, r4, lsl #2]
	cmp r0, #0
	beq _022ED6E8
_022ED6BC:
	mov r0, r5
	mov r1, sl
	mov r2, r8
	bl ov00_022EDDE8
	mov r0, r8
	mov r1, r5
	mov r2, sb
	mov r3, r6
	bl ov00_022EDE64
	cmp r0, #0
	beq _022ED6BC
_022ED6E8:
	add r4, r4, #1
	cmp r4, #4
	add r8, r8, #0x100
	add r5, r5, #0x100
	blt _022ED6B0
	bl ov00_022EDEB0
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022ED710: .word ov00_023276D4
	arm_func_end ov00_022ED68C

	arm_func_start ov00_022ED714
ov00_022ED714: ; 0x022ED714
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	ldr r1, _022ED7A4 ; =ov00_023276D4
	mov r8, r0
	mov sl, #0x100
	ldr r6, [r1, #8]
	mov r7, r8
	mov r5, #0
	mov sb, sl
	mov r4, #0xfe
_022ED738:
	mov r1, r7
	mov r2, r4
	add r0, r8, #0x500
	bl sub_02085158
	add r1, r8, r5, lsl #8
	strh r0, [r1, #0xfe]
_022ED750:
	mov r0, r6
	mov r1, sl
	mov r2, r7
	bl ov00_022EDDE8
	mov r0, r7
	mov r1, r6
	mov r2, sb
	add r3, r8, #0x400
	bl ov00_022EDE64
	cmp r0, #0
	beq _022ED750
	add r5, r5, #1
	cmp r5, #4
	add r7, r7, #0x100
	add r6, r6, #0x100
	blt _022ED738
	bl ov00_022EDEB0
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022ED7A4: .word ov00_023276D4
	arm_func_end ov00_022ED714

	arm_func_start ov00_022ED7A8
ov00_022ED7A8: ; 0x022ED7A8
	ldr ip, _022ED7B8 ; =MemcpyFast
	ldr r1, _022ED7BC ; =ov00_023276E0
	mov r2, #0xe
	bx ip
	.align 2, 0
_022ED7B8: .word MemcpyFast
_022ED7BC: .word ov00_023276E0
	arm_func_end ov00_022ED7A8

	arm_func_start ov00_022ED7C0
ov00_022ED7C0: ; 0x022ED7C0
	stmdb sp!, {r4, lr}
	mov ip, #0
	mov r3, ip
	mov r2, ip
_022ED7D0:
	ldrb r4, [r0, ip]
	mov lr, r2
_022ED7D8:
	mov r1, r4, asr lr
	tst r1, #1
	add lr, lr, #1
	addne r3, r3, #1
	cmp lr, #8
	blt _022ED7D8
	add ip, ip, #1
	cmp ip, #4
	blt _022ED7D0
	and r0, r3, #0xff
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022ED7C0

	arm_func_start ov00_022ED804
ov00_022ED804: ; 0x022ED804
	mvn r2, #0
	mov r3, #0
	eor r2, r2, r2, lsr r0
	mov ip, r3
_022ED814:
	rsb r0, ip, #0x18
	mov r0, r2, lsr r0
	strb r0, [r1, r3]
	add r3, r3, #1
	cmp r3, #4
	add ip, ip, #8
	blt _022ED814
	bx lr
	arm_func_end ov00_022ED804

	arm_func_start ov00_022ED834
ov00_022ED834: ; 0x022ED834
	mov r2, #0
_022ED838:
	ldrb r1, [r0, r2]
	cmp r1, #0
	movne r0, #1
	bxne lr
	add r2, r2, #1
	cmp r2, #0x20
	blt _022ED838
	mov r0, #0
	bx lr
	arm_func_end ov00_022ED834

	arm_func_start ov00_022ED85C
ov00_022ED85C: ; 0x022ED85C
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #8
	mov r5, r0
	mov r4, r1
	bl ov00_022ED8C0
	cmp r0, #0
	addeq sp, sp, #8
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	add r1, sp, #4
	mov r0, r5
	mov r2, #4
	bl MemcpyFast
	add r1, sp, #0
	mov r0, r4
	mov r2, #4
	bl MemcpyFast
	ldr r0, [sp]
	ldr r1, [sp, #4]
	mvn r0, r0
	tst r1, r0
	movne r0, #1
	moveq r0, #0
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022ED85C

	arm_func_start ov00_022ED8C0
ov00_022ED8C0: ; 0x022ED8C0
	ldrb r0, [r0]
	cmp r0, #0x7f
	moveq r0, #0
	bxeq lr
	cmp r0, #1
	movlo r0, #0
	bxlo lr
	cmp r0, #0xdf
	movls r0, #1
	movhi r0, #0
	bx lr
	arm_func_end ov00_022ED8C0

	arm_func_start ov00_022ED8EC
ov00_022ED8EC: ; 0x022ED8EC
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x3c
	ldr sl, _022EDD40 ; =ov00_02327700
	mov r8, r1, lsr #0x10
	mov r4, sl, lsl #8
	mov sb, r4
	and r4, r4, #0xff00
	mov r1, r1, lsl #0x10
	orr r4, r4, #0x20000
	mov r5, r3, lsr #0x10
	mov r7, r0
	ldr ip, _022EDD44 ; =0x01020000
	mov r1, r1, lsr #0x10
	str r4, [sp, #0x30]
	orr r4, r1, #0x10000
	mov r3, r3, lsl #0x10
	add r1, ip, #0x30000
	orr r1, r1, r3, lsr #16
	str r1, [sp, #0x10]
	mov r1, r3, lsr #0x10
	orr r1, r1, #0x1040000
	ldr r0, _022EDD48 ; =0x02002200
	str r1, [sp, #0x24]
	orr r1, r0, sl, lsr #24
	str r1, [sp, #0x28]
	ldr r1, [sp, #0x30]
	mov sb, sb, lsr #0x10
	orr r1, r1, #0x1000000
	str r1, [sp, #0x30]
	add r1, r0, #0x300
	and r8, r8, #0xff
	add r0, r0, #0x100
	orr r0, r8, r0
	orr r1, r8, r1
	str r0, [sp]
	orr r0, r2, #0x20000
	str r0, [sp, #0x1c]
	orr r0, r5, #0x30000
	str r0, [sp, #0x20]
	orr r0, r5, #0x40000
	str r0, [sp, #0xc]
	ldr r0, _022EDD4C ; =0x03002100
	mov r6, #0
	sub r0, r0, #0x100
	str r0, [sp, #0x14]
	mov r0, r2, lsr #0x10
	orr r0, r0, #0x20000
	str r0, [sp, #4]
	mov r0, r2, lsl #0x10
	mov r0, r0, lsr #0x10
	orr sb, sb, #0x10000
	orr r0, r0, #0x30000
	str sb, [sp, #0x2c]
	str r1, [sp, #0x18]
	str r0, [sp, #8]
	mov r5, r6
	mov r8, #0xfa0
_022ED9D0:
	cmp r6, #0
	bne _022EDC10
	ldr r0, _022EDD50 ; =ov00_023276D4
	cmp r7, #7
	str r5, [r0, #4]
	addls pc, pc, r7, lsl #2
	b _022ED9D0
_022ED9EC: ; jump table
	b _022ED9D0 ; case 0
	b _022EDA0C ; case 1
	b _022EDAB8 ; case 2
	b _022EDAD8 ; case 3
	b _022EDB74 ; case 4
	b _022EDB74 ; case 5
	b _022EDBCC ; case 6
	b _022EDBF0 ; case 7
_022EDA0C:
	ldr r1, [sp]
	mov r0, #4
	mov r2, r5
	bl PXI_SendWordByFifo
	cmp r0, #0
	movlt r6, #0
	blt _022ED9D0
	mov r0, #4
	mov r1, r4
	mov r2, #0
	bl PXI_SendWordByFifo
	cmp r0, #0
	movlt r6, #0
	blt _022ED9D0
	ldr r1, [sp, #4]
	mov r0, #4
	mov r2, #0
	bl PXI_SendWordByFifo
	cmp r0, #0
	movlt r6, #0
	blt _022ED9D0
	ldr r1, [sp, #8]
	mov r0, #4
	mov r2, #0
	bl PXI_SendWordByFifo
	cmp r0, #0
	movlt r6, #0
	blt _022ED9D0
	ldr r1, [sp, #0xc]
	mov r0, #4
	mov r2, #0
	bl PXI_SendWordByFifo
	cmp r0, #0
	movlt r6, #0
	blt _022ED9D0
	ldr r1, [sp, #0x10]
	mov r0, #4
	mov r2, #0
	bl PXI_SendWordByFifo
	cmp r0, #0
	movlt r6, #0
	movge r6, #1
	b _022ED9D0
_022EDAB8:
	ldr r1, [sp, #0x14]
	mov r0, #4
	mov r2, r5
	bl PXI_SendWordByFifo
	cmp r0, #0
	movlt r6, #0
	movge r6, #1
	b _022ED9D0
_022EDAD8:
	ldr r1, [sp, #0x18]
	mov r0, #4
	mov r2, r5
	bl PXI_SendWordByFifo
	cmp r0, #0
	movlt r6, #0
	blt _022EDB64
	mov r0, #4
	mov r1, r4
	mov r2, #0
	bl PXI_SendWordByFifo
	cmp r0, #0
	movlt r6, #0
	blt _022EDB64
	ldr r1, [sp, #0x1c]
	mov r0, #4
	mov r2, #0
	bl PXI_SendWordByFifo
	cmp r0, #0
	movlt r6, #0
	blt _022EDB64
	ldr r1, [sp, #0x20]
	mov r0, #4
	mov r2, #0
	bl PXI_SendWordByFifo
	cmp r0, #0
	movlt r6, #0
	blt _022EDB64
	ldr r1, [sp, #0x24]
	mov r0, #4
	mov r2, #0
	bl PXI_SendWordByFifo
	cmp r0, #0
	movlt r6, #0
	movge r6, #1
_022EDB64:
	bl sub_0207AE44
	str r0, [sp, #0x34]
	mov fp, r1
	b _022ED9D0
_022EDB74:
	ldr r1, [sp, #0x28]
	mov r0, #4
	mov r2, r5
	bl PXI_SendWordByFifo
	cmp r0, #0
	movlt r6, #0
	blt _022ED9D0
	ldr r1, [sp, #0x2c]
	mov r0, #4
	mov r2, #0
	bl PXI_SendWordByFifo
	cmp r0, #0
	movlt r6, #0
	blt _022ED9D0
	ldr r1, [sp, #0x30]
	mov r0, #4
	mov r2, #0
	bl PXI_SendWordByFifo
	cmp r0, #0
	movlt r6, #0
	movge r6, #1
	b _022ED9D0
_022EDBCC:
	ldr r1, _022EDD4C ; =0x03002100
	mov r0, #4
	add r1, r1, #0xc00
	mov r2, r5
	bl PXI_SendWordByFifo
	cmp r0, #0
	movlt r6, #0
	movge r6, #1
	b _022ED9D0
_022EDBF0:
	ldr r1, _022EDD4C ; =0x03002100
	mov r0, #4
	mov r2, r5
	bl PXI_SendWordByFifo
	cmp r0, #0
	movlt r6, #0
	movge r6, #1
	b _022ED9D0
_022EDC10:
	ldr r0, _022EDD50 ; =ov00_023276D4
	ldr r0, [r0, #4]
	cmp r0, #1
	bne _022ED9D0
	ldr r0, _022EDD50 ; =ov00_023276D4
	mov r6, #0
	ldrh r0, [r0]
	cmp r0, #0
	bne _022EDD34
	cmp r7, #7
	addls pc, pc, r7, lsl #2
	b _022ED9D0
_022EDC40: ; jump table
	b _022ED9D0 ; case 0
	b _022EDC60 ; case 1
	b _022EDC6C ; case 2
	b _022EDC74 ; case 3
	b _022EDC7C ; case 4
	b _022EDC7C ; case 5
	b _022EDD1C ; case 6
	b _022EDD28 ; case 7
_022EDC60:
	add sp, sp, #0x3c
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022EDC6C:
	mov r7, #4
	b _022ED9D0
_022EDC74:
	mov r7, #5
	b _022ED9D0
_022EDC7C:
	mov r0, sl
	mov r1, #1
	bl DC_InvalidateRange
	cmp r7, #4
	ldrb r0, [sl]
	bne _022EDCAC
	tst r0, #2
	movne r7, #3
	bne _022ED9D0
	add sp, sp, #0x3c
	mov r0, r6
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022EDCAC:
	tst r0, #1
	addeq sp, sp, #0x3c
	moveq r0, #1
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	tst r0, #0x20
	bne _022EDD08
	bl sub_0207AE44
	ldr r2, [sp, #0x34]
	mov ip, r6
	subs sb, r0, r2
	mov r0, #0x40
	sbc lr, r1, fp
	umull r0, r1, sb, r0
	mla r1, sb, ip, r1
	mov sb, #0x40
	mla r1, lr, sb, r1
	ldr r2, _022EDD54 ; =0x000082EA
	mov r3, r6
	bl _ll_udiv
	mov r2, r6
	cmp r1, r2
	cmpeq r0, r8
	bls _022EDD10
_022EDD08:
	mov r7, #6
	b _022ED9D0
_022EDD10:
	mov r0, #0x4000
	blx SVC_WaitByLoop
	b _022ED9D0
_022EDD1C:
	add sp, sp, #0x3c
	mov r0, r6
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022EDD28:
	add sp, sp, #0x3c
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022EDD34:
	mov r0, r6
	add sp, sp, #0x3c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022EDD40: .word ov00_02327700
_022EDD44: .word 0x01020000
_022EDD48: .word 0x02002200
_022EDD4C: .word 0x03002100
_022EDD50: .word ov00_023276D4
_022EDD54: .word 0x000082EA
	arm_func_end ov00_022ED8EC

	arm_func_start ov00_022EDD58
ov00_022EDD58: ; 0x022EDD58
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r4, r2
	mov r6, r0
	mov r0, r4
	mov r5, r1
	bl DC_InvalidateRange
	mov r8, #4
	mov r7, #1
_022EDD78:
	mov r0, r8
	mov r1, r7
	bl PXI_IsCallbackReady
	cmp r0, #0
	beq _022EDD78
	ldr r1, _022EDDE4 ; =ov00_022EDF1C
	mov r0, #4
	bl PXI_SetFifoRecvCallback
	mov r0, r5, lsl #0x10
	mov r8, r0, lsr #0x10
	mov r7, #0x40000
	mov sb, #1
_022EDDA8:
	mov r0, sb
	mov r1, r6
	mov r2, r8
	mov r3, r4
	bl ov00_022ED8EC
	cmp r0, #1
	beq _022EDDD0
	mov r0, r7
	blx SVC_WaitByLoop
	b _022EDDA8
_022EDDD0:
	mov r0, r4
	mov r1, r5
	bl DC_InvalidateRange
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022EDDE4: .word ov00_022EDF1C
	arm_func_end ov00_022EDD58

	arm_func_start ov00_022EDDE8
ov00_022EDDE8: ; 0x022EDDE8
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r8, r0
	mov r7, r1
	mov r6, r2
	mov r5, #4
	mov r4, #1
_022EDE00:
	mov r0, r5
	mov r1, r4
	bl PXI_IsCallbackReady
	cmp r0, #0
	beq _022EDE00
	ldr r1, _022EDE60 ; =ov00_022EDF1C
	mov r0, #4
	bl PXI_SetFifoRecvCallback
	mov r0, r6
	mov r1, r7
	bl sub_0207A2C0
	mov r4, #0x40000
	mov r5, #2
_022EDE34:
	mov r0, r5
	mov r1, r8
	mov r2, r7
	mov r3, r6
	bl ov00_022ED8EC
	cmp r0, #1
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	mov r0, r4
	blx SVC_WaitByLoop
	b _022EDE34
_022EDE5C:
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022EDE60: .word ov00_022EDF1C
	arm_func_end ov00_022EDDE8

	arm_func_start ov00_022EDE64
ov00_022EDE64: ; 0x022EDE64
	stmdb sp!, {r4, r5, r6, lr}
	mov r5, r2
	mov r4, r3
	mov r6, r0
	mov r0, r1
	mov r1, r5
	mov r2, r4
	bl ov00_022EDD58
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	mov r0, r6
	mov r1, r4
	mov r2, r5
	bl memcmp
	cmp r0, #0
	moveq r0, #1
	movne r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022EDE64

	arm_func_start ov00_022EDEB0
ov00_022EDEB0: ; 0x022EDEB0
	stmdb sp!, {r4, r5, r6, lr}
	mov r5, #4
	mov r4, #1
_022EDEBC:
	mov r0, r5
	mov r1, r4
	bl PXI_IsCallbackReady
	cmp r0, #0
	beq _022EDEBC
	ldr r1, _022EDF18 ; =ov00_022EDF1C
	mov r0, #4
	bl PXI_SetFifoRecvCallback
	mov r4, #0x40000
	mov r6, #7
	mov r5, #0
_022EDEE8:
	mov r0, r6
	mov r1, r5
	mov r2, r5
	mov r3, r5
	bl ov00_022ED8EC
	cmp r0, #1
	beq _022EDF10
	mov r0, r4
	blx SVC_WaitByLoop
	b _022EDEE8
_022EDF10:
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022EDF18: .word ov00_022EDF1C
	arm_func_end ov00_022EDEB0

	arm_func_start ov00_022EDF1C
ov00_022EDF1C: ; 0x022EDF1C
	ldr r0, _022EDF48 ; =ov00_023276D4
	and r1, r1, #0xff
	strh r1, [r0]
	mov r1, #1
	str r1, [r0, #4]
	cmp r2, #0
	movne r1, #0xff
	strneh r1, [r0]
	ldr r0, _022EDF48 ; =ov00_023276D4
	ldrh r0, [r0]
	bx lr
	.align 2, 0
_022EDF48: .word ov00_023276D4
	arm_func_end ov00_022EDF1C

	arm_func_start ov00_022EDF4C
ov00_022EDF4C: ; 0x022EDF4C
	stmdb sp!, {r4, lr}
	sub sp, sp, #8
	mov r4, r0
	ldr r3, [r4, #8]
	ldr r2, [r4, #0xc]
	ldr r1, _022EE000 ; =ov00_023276E0
	str r2, [sp, #4]
	str r3, [sp]
	mov r2, #5
	bl MemcpyFast
	ldr r2, [sp]
	ldr r1, [sp, #4]
	mov ip, r2, lsr #5
	ldr lr, [r4, #4]
	mov r3, r1, lsr #5
	orr ip, ip, r1, lsl #27
	mov r0, #7
	and r1, r0, lr, lsr #8
	and r0, r2, #0x1f
	orr lr, r1, r0, lsl #3
	ldr r2, _022EE000 ; =ov00_023276E0
	ldr r1, _022EE004 ; =ov00_023276E6
	strb lr, [r2, #5]
	add r0, sp, #0
	str ip, [sp]
	str r3, [sp, #4]
	mov r2, #4
	bl MemcpyFast
	ldrh r0, [r4, #0x10]
	ldr r1, [sp, #4]
	ldr r3, _022EE000 ; =ov00_023276E0
	and r1, r1, #0x3f
	mov r0, r0, lsl #0x1e
	orr r0, r1, r0, lsr #24
	strb r0, [r3, #0xa]
	ldrh r2, [r4, #0x10]
	add r0, r4, #0x12
	ldr r1, _022EE008 ; =ov00_023276EC
	mov r4, r2, asr #2
	mov r2, #2
	strb r4, [r3, #0xb]
	bl MemcpyFast
	ldr r0, _022EE000 ; =ov00_023276E0
	add sp, sp, #8
	ldmia sp!, {r4, pc}
	.align 2, 0
_022EE000: .word ov00_023276E0
_022EE004: .word ov00_023276E6
_022EE008: .word ov00_023276EC
	arm_func_end ov00_022EDF4C

	arm_func_start ov00_022EE00C
ov00_022EE00C: ; 0x022EE00C
	ldr r0, _022EE014 ; =ov00_023276E0
	bx lr
	.align 2, 0
_022EE014: .word ov00_023276E0
	arm_func_end ov00_022EE00C

	arm_func_start ov00_022EE018
ov00_022EE018: ; 0x022EE018
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #0x10
	mov r8, r0
	mov r1, #0
	mov r2, #0x700
	bl MemsetFast
	mov r0, r8
	bl ov00_022ED61C
	cmp r0, #0
	addeq sp, sp, #0x10
	ldreq r0, _022EE30C ; =0xFFFFD8EF
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	ldr r1, _022EE310 ; =0x0000A001
	add r0, r8, #0x500
	bl sub_02085030
	mov r0, r8
	bl ov00_022ED660
	cmp r0, #0
	addeq sp, sp, #0x10
	ldreq r0, _022EE30C ; =0xFFFFD8EF
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	add r0, sp, #0
	mov r1, #0
	mov r2, #0x10
	bl MemsetFast
	mov r6, r8
	mov r7, r8
	mov r5, #0
	mov sl, #1
	add sb, sp, #0
	mov r4, #0xfe
_022EE094:
	mov r1, r6
	mov r2, r4
	add r0, r8, #0x500
	bl sub_02085158
	add r1, r8, r5, lsl #8
	ldrh r1, [r1, #0xfe]
	cmp r0, r1
	bne _022EE0C4
	mov r0, r7
	bl ov00_022EE320
	cmp r0, #0
	strne sl, [sb, r5, lsl #2]
_022EE0C4:
	add r5, r5, #1
	cmp r5, #3
	add r6, r6, #0x100
	add r7, r7, #0x100
	blt _022EE094
	add r0, r8, #0x500
	add r1, r8, #0x300
	mov r2, #0xfe
	bl sub_02085158
	add r1, r8, #0x300
	ldrh r1, [r1, #0xfe]
	cmp r0, r1
	moveq r0, #1
	ldr r1, [sp]
	streq r0, [sp, #0xc]
	cmp r1, #0
	ldrne r0, [sp, #4]
	cmpne r0, #0
	ldrne r0, [sp, #8]
	cmpne r0, #0
	ldrne r0, [sp, #0xc]
	cmpne r0, #0
	beq _022EE134
	add r0, r8, #0xf0
	bl ov00_022ED7A8
	add sp, sp, #0x10
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022EE134:
	cmp r1, #0
	ldreq r0, [sp, #4]
	cmpeq r0, #0
	ldreq r0, [sp, #8]
	cmpeq r0, #0
	ldreq r0, [sp, #0xc]
	cmpeq r0, #0
	bne _022EE178
	mov r0, r8
	bl ov00_022EE420
	mov r0, r8
	bl ov00_022ED714
	cmp r0, #0
	movne r0, #0
	add sp, sp, #0x10
	ldreq r0, _022EE314 ; =0xFFFFD8F0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022EE178:
	cmp r1, #0
	ldrne r0, [sp, #4]
	cmpne r0, #0
	bne _022EE1C0
	ldr r0, [sp, #8]
	cmp r0, #0
	ldrne r0, [sp, #0xc]
	cmpne r0, #0
	bne _022EE1C0
	mov r0, r8
	bl ov00_022EE420
	mov r0, r8
	bl ov00_022ED714
	cmp r0, #0
	movne r0, #0
	add sp, sp, #0x10
	ldreq r0, _022EE314 ; =0xFFFFD8F0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022EE1C0:
	cmp r1, #0
	ldreq r0, [sp, #4]
	cmpeq r0, #0
	bne _022EE1F4
	mov r0, r8
	bl ov00_022EE420
	mov r0, r8
	bl ov00_022ED714
	cmp r0, #0
	ldrne r0, _022EE318 ; =0xFFFFD8ED
	add sp, sp, #0x10
	ldreq r0, _022EE314 ; =0xFFFFD8F0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022EE1F4:
	cmp r1, #0
	bne _022EE224
	mov r0, r8
	mov r1, #0
	bl ov00_022EE4A0
	add r0, r8, #0x1f0
	add r1, r8, #0xf0
	mov r2, #0xe
	bl MemcpyFast
	ldrb r0, [r8, #0x1ef]
	strb r0, [r8, #0xef]
	b _022EE254
_022EE224:
	ldr r0, [sp, #4]
	cmp r0, #0
	bne _022EE254
	mov r0, r8
	mov r1, #1
	bl ov00_022EE4A0
	add r0, r8, #0xf0
	add r1, r8, #0x1f0
	mov r2, #0xe
	bl MemcpyFast
	ldrb r0, [r8, #0xef]
	strb r0, [r8, #0x1ef]
_022EE254:
	add r0, r8, #0xf0
	bl ov00_022ED7A8
	ldr r0, [sp, #8]
	cmp r0, #0
	bne _022EE274
	mov r0, r8
	mov r1, #2
	bl ov00_022EE4A0
_022EE274:
	ldr r0, [sp, #0xc]
	cmp r0, #0
	bne _022EE290
	add r1, r8, #0x300
	mov r0, #0
	mov r2, #0x100
	bl ArrayFill16
_022EE290:
	mov r4, #0
	mov r5, r4
	mov r2, #1
	add r3, sp, #0
_022EE2A0:
	ldr r0, [r3, r5, lsl #2]
	cmp r0, #0
	bne _022EE2D4
	ldrb r0, [r8, #0xef]
	tst r0, r2, lsl r5
	beq _022EE2D4
	mov r1, r0
	mvn r0, r2, lsl r5
	and r0, r1, r0
	strb r0, [r8, #0xef]
	and r0, r0, #0xff
	mov r4, r2
	strb r0, [r8, #0x1ef]
_022EE2D4:
	add r5, r5, #1
	cmp r5, #3
	blt _022EE2A0
	mov r0, r8
	bl ov00_022ED714
	cmp r0, #0
	addeq sp, sp, #0x10
	ldreq r0, _022EE314 ; =0xFFFFD8F0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	cmp r4, #0
	ldrne r0, _022EE31C ; =0xFFFFD8EE
	moveq r0, #0
	add sp, sp, #0x10
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022EE30C: .word 0xFFFFD8EF
_022EE310: .word 0x0000A001
_022EE314: .word 0xFFFFD8F0
_022EE318: .word 0xFFFFD8ED
_022EE31C: .word 0xFFFFD8EE
	arm_func_end ov00_022EE018

	arm_func_start ov00_022EE320
ov00_022EE320: ; 0x022EE320
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #4
	mov r4, r0
	ldrb r0, [r4, #0xe7]
	cmp r0, #0xff
	addeq sp, sp, #4
	moveq r0, #1
	ldmeqia sp!, {r3, r4, pc}
	cmp r0, #2
	addhi sp, sp, #4
	movhi r0, #0
	ldmhiia sp!, {r3, r4, pc}
	add r0, r4, #0x40
	bl ov00_022ED834
	cmp r0, #0
	addeq sp, sp, #4
	moveq r0, #0
	ldmeqia sp!, {r3, r4, pc}
	ldr r1, _022EE41C ; =ov00_02318268
	add r0, r4, #0xc0
	mov r2, #4
	bl memcmp
	cmp r0, #0
	beq _022EE3D0
	add r0, r4, #0xc4
	bl ov00_022ED8C0
	cmp r0, #0
	addeq sp, sp, #4
	moveq r0, #0
	ldmeqia sp!, {r3, r4, pc}
	ldrb r0, [r4, #0xd0]
	cmp r0, #0x20
	addhi sp, sp, #4
	movhi r0, #0
	ldmhiia sp!, {r3, r4, pc}
	add r1, sp, #0
	bl ov00_022ED804
	add r1, sp, #0
	add r0, r4, #0xc0
	bl ov00_022ED85C
	cmp r0, #0
	addeq sp, sp, #4
	moveq r0, #0
	ldmeqia sp!, {r3, r4, pc}
_022EE3D0:
	ldr r1, _022EE41C ; =ov00_02318268
	add r0, r4, #0xc8
	mov r2, #4
	bl memcmp
	cmp r0, #0
	beq _022EE410
	add r0, r4, #0xc8
	bl ov00_022ED8C0
	cmp r0, #0
	bne _022EE410
	add r0, r4, #0xcc
	bl ov00_022ED8C0
	cmp r0, #0
	addeq sp, sp, #4
	moveq r0, #0
	ldmeqia sp!, {r3, r4, pc}
_022EE410:
	mov r0, #1
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
	.align 2, 0
_022EE41C: .word ov00_02318268
	arm_func_end ov00_022EE320

	arm_func_start ov00_022EE420
ov00_022EE420: ; 0x022EE420
	stmdb sp!, {r4, r5, r6, r7, lr}
	sub sp, sp, #0x14
	mov r7, r0
	mov r1, r7
	mov r0, #0
	mov r2, #0x400
	bl ArrayFill16
	mov r2, #0
	mov r1, #0xff
_022EE444:
	add r0, r7, r2, lsl #8
	add r2, r2, #1
	strb r1, [r0, #0xe7]
	cmp r2, #3
	blt _022EE444
	add r0, sp, #0
	bl ov00_022EE650
	add r0, sp, #0
	bl ov00_022EDF4C
	mov r5, r0
	mov r6, #0
	mov r4, #0xe
_022EE474:
	mov r0, r5
	mov r2, r4
	add r1, r7, #0xf0
	bl MemcpyFast
	add r6, r6, #1
	cmp r6, #2
	add r7, r7, #0x100
	blt _022EE474
	mov r0, #0
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, pc}
	arm_func_end ov00_022EE420

	arm_func_start ov00_022EE4A0
ov00_022EE4A0: ; 0x022EE4A0
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	add r1, r5, r4, lsl #8
	mov r0, #0
	mov r2, #0x100
	bl ArrayFill16
	add r0, r5, r4, lsl #8
	mov r1, #0xff
	strb r1, [r0, #0xe7]
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022EE4A0

	arm_func_start ov00_022EE4CC
ov00_022EE4CC: ; 0x022EE4CC
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x10
	ldr r4, _022EE644 ; =0x0000FFFF
	mov lr, #0
	and ip, lr, #0
	add r5, r4, #0xff0000
	and r2, r2, #1
	mov r6, ip, lsl #2
	and r3, r3, #3
	and r5, r1, r5
	orr r1, r3, r2, lsl #2
	orr r6, r6, r2, lsr #30
	mov r7, ip, lsl #3
	and r2, r0, r4
	orr r0, r1, r5, lsl #3
	orr r1, r0, r2, lsl #27
	mov r3, ip, lsl #0x1b
	orr r3, r3, r2, lsr #5
	orr r7, r7, r5, lsr #29
	orr r0, ip, r6
	orr r0, r7, r0
	orr r0, r3, r0
	add r2, sp, #8
	str r1, [sp, #8]
	str r0, [sp, #0xc]
_022EE530:
	ldrb r0, [r2]
	add lr, lr, #1
	cmp lr, #6
	eor r0, r0, #0xd6
	strb r0, [r2], #1
	blt _022EE530
	ldr r2, _022EE648 ; =ov00_02318274
	add r4, sp, #8
	mov r5, #0
_022EE554:
	ldrb r3, [r4]
	add r5, r5, #1
	cmp r5, #5
	mov r0, r3, asr #4
	and r1, r0, #0xf
	and r0, r3, #0xf
	ldrb r1, [r2, r1]
	ldrb r0, [r2, r0]
	orr r0, r0, r1, lsl #4
	strb r0, [r4], #1
	blt _022EE554
	add r0, sp, #8
	add r1, sp, #0
	mov r2, #8
	bl MemcpyFast
	ldr r4, _022EE64C ; =ov00_0231826C
	add r3, sp, #0
	mov r5, #0
	add r0, sp, #8
_022EE5A0:
	ldrb r2, [r3], #1
	ldrb r1, [r4], #1
	add r5, r5, #1
	cmp r5, #5
	strb r2, [r0, r1]
	blt _022EE5A0
	ldrb r2, [sp, #0xd]
	mov r1, #0
	ldr r3, [sp, #8]
	and r2, r2, #7
	strb r1, [sp, #0xf]
	strb r1, [sp, #0xe]
	strb r2, [sp, #0xd]
	ldr r2, [sp, #0xc]
	mov r4, r3, lsl #1
	mov r2, r2, lsl #1
	orr r2, r2, r3, lsr #31
	str r2, [sp, #0xc]
	ldrb r2, [sp, #0xd]
	str r4, [sp, #8]
	ldrb r3, [sp, #8]
	mov r2, r2, asr #3
	and r2, r2, #1
	orr r2, r3, r2
	strb r2, [sp, #8]
_022EE604:
	ldrb r2, [r0]
	add r1, r1, #1
	cmp r1, #6
	eor r2, r2, #0x67
	strb r2, [r0], #1
	blt _022EE604
	ldrb r0, [sp, #0xd]
	mov r1, #0
	strb r1, [sp, #0xf]
	and r0, r0, #7
	strb r1, [sp, #0xe]
	strb r0, [sp, #0xd]
	ldr r0, [sp, #8]
	ldr r1, [sp, #0xc]
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022EE644: .word 0x0000FFFF
_022EE648: .word ov00_02318274
_022EE64C: .word ov00_0231826C
	arm_func_end ov00_022EE4CC

	arm_func_start ov00_022EE650
ov00_022EE650: ; 0x022EE650
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x24
	mov sl, r0
	bl ov00_022ED468
	bl sub_0208266C
	add r0, sp, #0x14
	bl sub_02082748
	cmp r0, #0
	addne sp, sp, #0x24
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r0, sp, #8
	bl sub_020827F4
	cmp r0, #0
	addne sp, sp, #0x24
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r0, sp, #0x14
	add r1, sp, #8
	bl sub_02082FDC
	mov r4, r0
	mov r0, #0
	subs r2, r4, r0
	sbcs r2, r1, r0
	addlt sp, sp, #0x24
	ldmltia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	bl sub_0207ADCC
	cmp r0, #0
	beq _022EE6CC
	ldr r0, _022EE81C ; =sub_0207AE44
	adds r4, r4, r0
_022EE6CC:
	add r0, sp, #0
	bl sub_0207B9EC
	ldrb r0, [sp, #1]
	ldr r5, _022EE820 ; =0x5D588B65
	ldr r6, _022EE824 ; =0x00269EC3
	ldrb r1, [sp]
	mla sb, r4, r5, r6
	mov r0, r0, lsl #8
	orr r1, r0, r1, lsl #16
	ldrb r2, [sp, #2]
	ldr r0, _022EE828 ; =0x000009BF
	ldrb r7, [sp, #4]
	orr r1, r2, r1
	cmp r1, r0
	mov r2, sb, lsr #0x10
	mov r0, #0x3e8
	mul r3, r2, r0
	mov r2, r3, lsr #0x10
	movne r1, #1
	ldrb r0, [sp, #5]
	ldrb r4, [sp, #3]
	mov r3, r7, lsl #8
	moveq r1, #0
	orr r4, r3, r4, lsl #16
	strh r2, [sl, #0x10]
	mov r3, #0
	str r3, [sl]
	str r3, [sl, #4]
	ldrh r2, [sl, #0x12]
	and r7, r1, #0xff
	orr r8, r0, r4
	str r3, [sl, #8]
	cmp r2, #0
	str r3, [sl, #0xc]
	bne _022EE7BC
	ldr r0, [sl, #8]
	cmp r3, r3
	cmpeq r0, r3
	bne _022EE810
	mov fp, r3
	mov r4, r3
_022EE770:
	mul r0, sb, r5
	adds sb, r0, r6
	bne _022EE788
_022EE77C:
	mul r0, sb, r5
	adds sb, r0, r6
	beq _022EE77C
_022EE788:
	strh sb, [sl, #0x12]
	ldrh r0, [sl, #0x12]
	mov r1, r8
	mov r2, r7
	mov r3, #0
	bl ov00_022EE4CC
	str r0, [sl, #8]
	str r1, [sl, #0xc]
	ldr r0, [sl, #8]
	cmp r1, fp
	cmpeq r0, r4
	beq _022EE770
	b _022EE810
_022EE7BC:
	ldr r0, [sl, #8]
	cmp r3, r3
	cmpeq r0, r3
	bne _022EE810
	mov r6, r3
	mov r5, r3
	mov r4, r3
_022EE7D8:
	ldrh r0, [sl, #0x12]
	mov r1, r8
	mov r2, r7
	add r0, r0, #1
	strh r0, [sl, #0x12]
	ldrh r0, [sl, #0x12]
	mov r3, r6
	bl ov00_022EE4CC
	str r0, [sl, #8]
	str r1, [sl, #0xc]
	ldr r0, [sl, #8]
	cmp r1, r5
	cmpeq r0, r4
	beq _022EE7D8
_022EE810:
	mov r0, #1
	add sp, sp, #0x24
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022EE81C: .word sub_0207AE44
_022EE820: .word 0x5D588B65
_022EE824: .word 0x00269EC3
_022EE828: .word 0x000009BF
	arm_func_end ov00_022EE650

	arm_func_start ov00_022EE82C
ov00_022EE82C: ; 0x022EE82C
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #0x14
	mov r4, r0
	add r0, sp, #0
	bl ov00_022EE650
	cmp r0, #0
	addeq sp, sp, #0x14
	moveq r0, #0
	ldmeqia sp!, {r3, r4, pc}
	add r0, sp, #0
	mov r1, r4
	bl ov00_022ED540
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	add sp, sp, #0x14
	ldmia sp!, {r3, r4, pc}
	arm_func_end ov00_022EE82C

	arm_func_start ov00_022EE870
ov00_022EE870: ; 0x022EE870
	stmdb sp!, {r4, r5, lr}
	sub sp, sp, #0x14
	mov r5, r0
	add r0, sp, #0
	mov r4, r1
	bl ov00_022ED468
	add ip, r5, #8
	ldmia ip, {r2, r3}
	stmia r5, {r2, r3}
	add r1, sp, #8
	ldmia r1, {r2, r3}
	mov r0, r5
	mov r1, r4
	stmia ip, {r2, r3}
	bl ov00_022ED540
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, pc}
	arm_func_end ov00_022EE870

	arm_func_start ov00_022EE8C0
ov00_022EE8C0: ; 0x022EE8C0
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x24
	add r2, sp, #0
	mov r1, #0
	mov sl, r0
	strb r1, [r2]
	strb r1, [r2, #1]
	strb r1, [r2, #2]
	strb r1, [r2, #3]
	strb r1, [r2, #4]
	strb r1, [r2, #5]
	bl ov00_022ED468
	bl sub_0208266C
	add r0, sp, #0x14
	bl sub_02082748
	cmp r0, #0
	addne sp, sp, #0x24
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r0, sp, #8
	bl sub_020827F4
	cmp r0, #0
	addne sp, sp, #0x24
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r0, sp, #0x14
	add r1, sp, #8
	bl sub_02082FDC
	mov r4, r0
	mov r0, #0
	subs r2, r4, r0
	sbcs r2, r1, r0
	addlt sp, sp, #0x24
	ldmltia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	bl sub_0207ADCC
	cmp r0, #0
	beq _022EE95C
	ldr r0, _022EEA50 ; =sub_0207AE44
	adds r4, r4, r0
_022EE95C:
	add r0, sp, #0
	bl sub_0207B9EC
	ldrb r0, [sp, #1]
	ldr r5, _022EEA54 ; =0x5D588B65
	ldr r6, _022EEA58 ; =0x00269EC3
	ldrb r1, [sp]
	mov r0, r0, lsl #8
	mla sb, r4, r5, r6
	orr r1, r0, r1, lsl #16
	ldrb r2, [sp, #2]
	ldr r0, _022EEA5C ; =0x000009BF
	ldrb r7, [sp, #4]
	orr r1, r2, r1
	cmp r1, r0
	movne r1, #1
	mov r2, sb, lsr #0x10
	mov r0, #0x3e8
	mul r4, r2, r0
	mov r2, r4, lsr #0x10
	ldrb r0, [sp, #5]
	ldrb r8, [sp, #3]
	mov r4, r7, lsl #8
	moveq r1, #0
	mov r3, #0
	strh r2, [sl, #0x10]
	str r3, [sl, #8]
	str r3, [sl, #0xc]
	orr r4, r4, r8, lsl #16
	ldr r2, [sl, #8]
	cmp r3, #0
	cmpeq r2, #0
	and r7, r1, #0xff
	orr r8, r0, r4
	bne _022EEA44
	mov fp, r3
	mov r4, r3
_022EE9EC:
	mla sb, r5, sb, r6
	b _022EE9F8
_022EE9F4:
	mla sb, r5, sb, r6
_022EE9F8:
	cmp sb, #0
	beq _022EE9F4
	ldrh r2, [sl, #0x12]
	mov r0, sb, lsl #0x10
	mov r1, r0, lsr #0x10
	cmp r2, r0, lsr #16
	beq _022EE9F4
	strh r1, [sl, #0x12]
	ldrh r0, [sl, #0x12]
	mov r1, r8
	mov r2, r7
	mov r3, #0
	bl ov00_022EE4CC
	str r0, [sl, #8]
	str r1, [sl, #0xc]
	ldr r0, [sl, #8]
	cmp r1, fp
	cmpeq r0, r4
	beq _022EE9EC
_022EEA44:
	mov r0, #1
	add sp, sp, #0x24
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022EEA50: .word sub_0207AE44
_022EEA54: .word 0x5D588B65
_022EEA58: .word 0x00269EC3
_022EEA5C: .word 0x000009BF
	arm_func_end ov00_022EE8C0

	arm_func_start ov00_022EEA60
ov00_022EEA60: ; 0x022EEA60
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #0x14
	mov r4, r0
	add r0, sp, #0
	bl ov00_022ED468
	add r0, sp, #0
	ldmia r0, {r2, r3}
	stmia r4, {r2, r3}
	add r1, sp, #8
	add r0, r4, #8
	ldmia r1, {r2, r3}
	stmia r0, {r2, r3}
	ldr r0, [sp, #4]
	ldr r1, [sp]
	cmp r0, #0
	mov r0, #0
	cmpeq r1, #0
	movne r0, #1
	str r0, [r4, #0x10]
	add sp, sp, #0x14
	ldmia sp!, {r3, r4, pc}
	arm_func_end ov00_022EEA60

	arm_func_start ov00_022EEAB4
ov00_022EEAB4: ; 0x022EEAB4
	stmdb sp!, {lr}
	sub sp, sp, #0x14
	add r0, sp, #0
	bl ov00_022ED468
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #8]
	cmp r0, #0
	cmpeq r1, #0
	mov r0, #0
	bne _022EEAF8
	ldr r1, [sp, #4]
	ldr r2, [sp]
	cmp r1, r0
	cmpeq r2, r0
	addeq sp, sp, #0x14
	moveq r0, #1
	ldmeqia sp!, {pc}
_022EEAF8:
	mov r0, #0
	add sp, sp, #0x14
	ldmia sp!, {pc}
	arm_func_end ov00_022EEAB4

	arm_func_start ov00_022EEB04
ov00_022EEB04: ; 0x022EEB04
	ldr r1, _022EEB38 ; =0xAAAAAAAB
	mov r3, #3
	umull r1, r2, r0, r1
	mov r2, r2, lsr #1
	umull r1, r2, r3, r2
	subs r2, r0, r1
	ldr r1, _022EEB38 ; =0xAAAAAAAB
	movne r3, #1
	umull r1, r2, r0, r1
	moveq r3, #0
	add r0, r3, r2, lsr #1
	mov r0, r0, lsl #2
	bx lr
	.align 2, 0
_022EEB38: .word 0xAAAAAAAB
	arm_func_end ov00_022EEB04

	arm_func_start ov00_022EEB3C
ov00_022EEB3C: ; 0x022EEB3C
	ldr r1, _022EEB4C ; =ov00_02327720
	orr r0, r0, r0, lsl #16
	str r0, [r1]
	bx lr
	.align 2, 0
_022EEB4C: .word ov00_02327720
	arm_func_end ov00_022EEB3C

	arm_func_start ov00_022EEB50
ov00_022EEB50: ; 0x022EEB50
	stmdb sp!, {r3, lr}
	ldr r1, _022EEB88 ; =ov00_0231A2C4
	ldr r0, _022EEB8C ; =ov00_02327720
	ldr r3, [r1, #0x4c]
	ldr r2, [r1, #0x48]
	ldr r0, [r0]
	ldr r1, [r1, #0x50]
	mla r0, r2, r0, r3
	bl _u32_div_f
	ldr r0, _022EEB8C ; =ov00_02327720
	mov r2, r1, asr #0x10
	str r1, [r0]
	and r0, r2, #0xff
	ldmia sp!, {r3, pc}
	.align 2, 0
_022EEB88: .word ov00_0231A2C4
_022EEB8C: .word ov00_02327720
	arm_func_end ov00_022EEB50

	arm_func_start ov00_022EEB90
ov00_022EEB90: ; 0x022EEB90
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	ldr r4, _022EEC80 ; =ov00_0231A2C4
	mov ip, #0
	str ip, [r4, #0x10]
	ldr r4, [sp, #0x18]
	mov r8, r0
	mov r7, r1
	mov r6, r2
	mov r5, r3
	bl strlen
	cmp r0, #0x20
	movhs r0, #0
	ldmhsia sp!, {r4, r5, r6, r7, r8, pc}
	mov r0, r7
	bl strlen
	cmp r0, #0x14
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	sub r0, r6, #5
	tst r0, #7
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	tst r5, #1
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	mov r2, #0
	mov r1, r2
_022EEBFC:
	mov r0, r4, lsr r1
	and r0, r0, #1
	cmp r0, #1
	add r1, r1, #1
	addeq r2, r2, #1
	cmp r1, #0x20
	blt _022EEBFC
	cmp r2, #1
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r0, _022EEC84 ; =ov00_0231A2D8
	mov r1, r8
	mov r2, #0x20
	bl strncpy
	ldr r3, _022EEC88 ; =ov00_0231A2F8
	mov r2, #0xa
_022EEC3C:
	ldrb r1, [r7]
	ldrb r0, [r7, #1]
	add r7, r7, #2
	subs r2, r2, #1
	strb r1, [r3]
	strb r0, [r3, #1]
	add r3, r3, #2
	bne _022EEC3C
	ldr r1, _022EEC80 ; =ov00_0231A2C4
	ldr r0, [sp, #0x1c]
	str r6, [r1, #0x48]
	str r5, [r1, #0x4c]
	str r4, [r1, #0x50]
	str r0, [r1, #0x54]
	mov r0, #1
	str r0, [r1, #0x10]
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022EEC80: .word ov00_0231A2C4
_022EEC84: .word ov00_0231A2D8
_022EEC88: .word ov00_0231A2F8
	arm_func_end ov00_022EEB90

	arm_func_start ov00_022EEC8C
ov00_022EEC8C: ; 0x022EEC8C
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	sub sp, sp, #0x50
	ldr r4, _022EEE30 ; =ov00_02318284
	add r3, sp, #0
	mov r6, r0
	mov r5, r1
	mov r2, #8
_022EECA8:
	ldrb r1, [r4]
	ldrb r0, [r4, #1]
	add r4, r4, #2
	strb r1, [r3]
	strb r0, [r3, #1]
	add r3, r3, #2
	subs r2, r2, #1
	bne _022EECA8
	ldrb r0, [r4]
	cmp r5, #0x28
	addle sp, sp, #0x50
	strb r0, [r3]
	movle r0, #0
	ldmleia sp!, {r4, r5, r6, r7, r8, pc}
	sub r4, r5, #0x28
	mov r0, r4
	bl ov00_022EEB04
	add r1, r0, #0x29
	mov r0, #7
	bl ov00_022E03F0
	movs r7, r0
	addeq sp, sp, #0x50
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r8, _022EEE34 ; =ov00_0231A2F8
	mov r3, r7
	mov r2, #0xa
_022EED14:
	ldrb r1, [r8]
	ldrb r0, [r8, #1]
	add r8, r8, #2
	subs r2, r2, #1
	strb r1, [r3]
	strb r0, [r3, #1]
	add r3, r3, #2
	bne _022EED14
	mov r0, r6
	mov r2, r4
	add r1, r7, #0x14
	mov r3, #2
	bl ov00_022F598C
	mov r0, r4
	bl ov00_022EEB04
	add r1, r7, #0x14
	ldr r3, _022EEE34 ; =ov00_0231A2F8
	add r8, r1, r0
	mov r2, #0xa
_022EED60:
	ldrb r1, [r3]
	ldrb r0, [r3, #1]
	add r3, r3, #2
	subs r2, r2, #1
	strb r1, [r8]
	strb r0, [r8, #1]
	add r8, r8, #2
	bne _022EED60
	mov r0, r4
	bl ov00_022EEB04
	mov r2, r0
	add r0, sp, #0x11
	mov r1, r7
	add r2, r2, #0x28
	bl sub_02084F78
	mov r1, r7
	mov r0, #7
	mov r2, #0
	bl ov00_022E0434
	mov r2, #0
	add r3, sp, #0x11
	mov r7, r2
	add r1, sp, #0x25
	add r8, sp, #0
_022EEDC0:
	ldrb ip, [r3], #1
	add r2, r2, #1
	add r0, r1, r7
	mov lr, ip, asr #4
	and ip, ip, #0xf
	ldrsb lr, [r8, lr]
	ldrsb ip, [r8, ip]
	cmp r2, #0x14
	strb lr, [r1, r7]
	strb ip, [r0, #1]
	add r7, r7, #2
	blt _022EEDC0
	sub r0, r5, #0x28
	mov r3, #0
	add r0, r6, r0
	mov r2, #0x28
	strb r3, [sp, #0x4d]
	bl strncmp
	cmp r0, #0
	addne sp, sp, #0x50
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r1, _022EEE38 ; =ov00_0231A2C4
	mov r0, #1
	str r6, [r1, #0x6c]
	str r4, [r1, #0x70]
	add sp, sp, #0x50
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022EEE30: .word ov00_02318284
_022EEE34: .word ov00_0231A2F8
_022EEE38: .word ov00_0231A2C4
	arm_func_end ov00_022EEC8C

	arm_func_start ov00_022EEE3C
ov00_022EEE3C: ; 0x022EEE3C
	bx lr
	arm_func_end ov00_022EEE3C

	arm_func_start ov00_022EEE40
ov00_022EEE40: ; 0x022EEE40
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0x48
	ldr r3, _022EF0B0 ; =ov00_0231A2C4
	mvn r4, #0
	str r4, [r3, #0xc]
	ldr ip, [r3, #4]
	mov r5, r0
	cmp ip, #1
	mov r4, r1
	addeq sp, sp, #0x48
	ldmeqia sp!, {r3, r4, r5, pc}
	cmp r2, #0
	bne _022EF0A0
	cmp ip, #5
	beq _022EEE8C
	cmp ip, #7
	beq _022EEFB8
	add sp, sp, #0x48
	ldmia sp!, {r3, r4, r5, pc}
_022EEE8C:
	cmp r4, #0x20
	bne _022EEFA0
	ldr r0, [r3, #0x5c]
	ldr r3, _022EF0B4 ; =ov00_02318295
	add lr, sp, #0
	add r4, r0, #0x14
	mov r2, #8
_022EEEA8:
	ldrb r1, [r3]
	ldrb r0, [r3, #1]
	add r3, r3, #2
	strb r1, [lr]
	strb r0, [lr, #1]
	add lr, lr, #2
	subs r2, r2, #1
	bne _022EEEA8
	ldrb r0, [r3]
	ldr r3, _022EF0B8 ; =ov00_0231A2F8
	add ip, sp, #0x11
	strb r0, [lr]
	mov r2, #0xa
_022EEEDC:
	ldrb r1, [r3]
	ldrb r0, [r3, #1]
	add r3, r3, #2
	strb r1, [ip]
	strb r0, [ip, #1]
	add ip, ip, #2
	subs r2, r2, #1
	bne _022EEEDC
	add r0, sp, #0x25
	mov r1, r5
	mov r2, #0x20
	bl memcpy
	add r1, sp, #0x11
	mov r0, r4
	mov r2, #0x34
	bl sub_02084F78
	mov r0, #0
	ldr r2, _022EF0B0 ; =ov00_0231A2C4
	mov r1, r0
	add lr, sp, #0
_022EEF2C:
	ldrb ip, [r4, r0]
	ldr r3, [r2, #0x5c]
	mov ip, ip, asr #4
	ldrsb ip, [lr, ip]
	strb ip, [r3, r1]
	ldrb ip, [r4, r0]
	ldr r3, [r2, #0x5c]
	add r0, r0, #1
	and ip, ip, #0xf
	ldrsb ip, [lr, ip]
	add r3, r3, r1
	cmp r0, #0x14
	strb ip, [r3, #1]
	add r1, r1, #2
	blt _022EEF2C
	ldr r0, _022EF0BC ; =ov00_0231A368
	bl strlen
	ldr r1, _022EF0B0 ; =ov00_0231A2C4
	mov r4, #0x26
	ldr r3, [r1, #0x5c]
	mov r2, #0x29
	strb r4, [r3, -r0]
	ldr r1, [r1, #0x5c]
	ldr r0, _022EF0C0 ; =ov00_0231A33C
	bl strncpy
	ldr r0, _022EF0B0 ; =ov00_0231A2C4
	mov r1, #6
	str r1, [r0, #4]
	b _022EEFA8
_022EEFA0:
	mov r0, #1
	str r0, [r3, #4]
_022EEFA8:
	mov r0, r5
	bl ov00_022E0520
	add sp, sp, #0x48
	ldmia sp!, {r3, r4, r5, pc}
_022EEFB8:
	ldr r0, _022EF0C4 ; =ov00_0231A370
	bl strlen
	mov r2, r0
	ldr r1, _022EF0C4 ; =ov00_0231A370
	mov r0, r5
	bl strncmp
	cmp r0, #0
	bne _022EEFF4
	mov r0, r5
	bl ov00_022E0520
	ldr r0, _022EF0B0 ; =ov00_0231A2C4
	mov r1, #1
	str r1, [r0, #4]
	add sp, sp, #0x48
	ldmia sp!, {r3, r4, r5, pc}
_022EEFF4:
	ldr r0, _022EF0B0 ; =ov00_0231A2C4
	ldr r0, [r0, #0x64]
	cmp r0, #0
	beq _022EF014
	bl ov00_022E0520
	ldr r0, _022EF0B0 ; =ov00_0231A2C4
	mov r1, #0
	str r1, [r0, #0x64]
_022EF014:
	mov r0, r5
	mov r1, r4
	bl ov00_022EEC8C
	cmp r0, #0
	bne _022EF044
	mov r0, r5
	bl ov00_022E0520
	ldr r0, _022EF0B0 ; =ov00_0231A2C4
	mov r1, #1
	str r1, [r0, #4]
	add sp, sp, #0x48
	ldmia sp!, {r3, r4, r5, pc}
_022EF044:
	ldr r0, _022EF0B0 ; =ov00_0231A2C4
	ldr r2, [r0, #0x74]
	cmp r2, #0
	beq _022EF084
	mov r0, r5
	mov r1, r4
	blx r2
	cmp r0, #0
	bne _022EF084
	mov r0, r5
	bl ov00_022E0520
	ldr r0, _022EF0B0 ; =ov00_0231A2C4
	mov r1, #1
	str r1, [r0, #4]
	add sp, sp, #0x48
	ldmia sp!, {r3, r4, r5, pc}
_022EF084:
	ldr r0, _022EF0B0 ; =ov00_0231A2C4
	mov r1, #8
	str r5, [r0, #0x64]
	str r4, [r0, #0x68]
	str r1, [r0, #4]
	add sp, sp, #0x48
	ldmia sp!, {r3, r4, r5, pc}
_022EF0A0:
	mov r0, #1
	str r0, [r3, #4]
	add sp, sp, #0x48
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022EF0B0: .word ov00_0231A2C4
_022EF0B4: .word ov00_02318295
_022EF0B8: .word ov00_0231A2F8
_022EF0BC: .word ov00_0231A368
_022EF0C0: .word ov00_0231A33C
_022EF0C4: .word ov00_0231A370
	arm_func_end ov00_022EEE40

	arm_func_start ov00_022EF0C8
ov00_022EF0C8: ; 0x022EF0C8
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	ldr r4, [sp, #0x20]
	mov sb, r2
	add r7, r4, sb
	mov r4, r0
	mov sl, r1
	add r1, r7, #4
	mov r0, #7
	mov r8, r3
	mov r6, #0
	bl ov00_022E03F0
	movs r5, r0
	moveq r0, #2
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	cmp sb, #0
	mov r2, r6
	ble _022EF124
_022EF10C:
	ldrb r1, [sl, r2]
	add r0, r5, r2
	add r2, r2, #1
	strb r1, [r0, #4]
	cmp r2, sb
	blt _022EF10C
_022EF124:
	ldr r3, [sp, #0x20]
	mov sl, #0
	cmp r3, #0
	ble _022EF150
	add r2, r5, sb
_022EF138:
	ldrb r1, [r8, sl]
	add r0, r2, sl
	add sl, sl, #1
	strb r1, [r0, #4]
	cmp sl, r3
	blt _022EF138
_022EF150:
	cmp r7, #0
	mov r1, #0
	ble _022EF174
_022EF15C:
	add r0, r5, r1
	ldrb r0, [r0, #4]
	add r1, r1, #1
	cmp r1, r7
	add r6, r6, r0
	blt _022EF15C
_022EF174:
	mov r0, r6
	bl ov00_022EEB3C
	cmp r7, #0
	mov r8, #0
	ble _022EF1A8
_022EF188:
	bl ov00_022EEB50
	add r2, r5, r8
	ldrb r1, [r2, #4]
	add r8, r8, #1
	cmp r8, r7
	eor r0, r1, r0
	strb r0, [r2, #4]
	blt _022EF188
_022EF1A8:
	ldr r1, _022EF20C ; =ov00_0231A2C4
	mov r0, r5
	ldr r2, [r1, #0x54]
	mov r1, r4
	eor r6, r6, r2
	mov r2, r6, lsr #0x18
	strb r2, [r5]
	mov r2, r6, lsr #0x10
	strb r2, [r5, #1]
	mov r2, r6, lsr #8
	strb r2, [r5, #2]
	add r2, r7, #4
	mov r3, #2
	strb r6, [r5, #3]
	bl ov00_022F598C
	mov r1, r5
	mov r0, #7
	mov r2, #0
	bl ov00_022E0434
	add r0, r7, #4
	bl ov00_022EEB04
	mov r1, #0
	strb r1, [r4, r0]
	mov r0, r1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022EF20C: .word ov00_0231A2C4
	arm_func_end ov00_022EF0C8

	arm_func_start ov00_022EF210
ov00_022EF210: ; 0x022EF210
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x28
	mov r5, #0
	add r4, sp, #8
	ldr r2, _022EF370 ; =ov00_0231A2C4
	sub r3, r5, #1
	strb r5, [r4]
	strb r5, [r4, #1]
	strb r5, [r4, #2]
	strb r5, [r4, #3]
	strb r5, [r4, #4]
	strb r5, [r4, #5]
	strb r5, [r4, #6]
	strb r5, [r4, #7]
	strb r5, [r4, #8]
	str r3, [r2, #0xc]
	str r5, [r2, #0x58]
	str r5, [r2, #0x5c]
	str r5, [r2, #0x60]
	str r5, [r2, #0x64]
	mov r4, r1
	str r5, [r2, #0x68]
	cmp r0, #0
	beq _022EF288
	cmp r0, #1
	beq _022EF294
	cmp r0, #2
	ldreq r0, _022EF374 ; =ov00_0231A3C4
	streq r0, [r2]
	b _022EF29C
_022EF288:
	ldr r0, _022EF378 ; =ov00_0231A378
	str r0, [r2]
	b _022EF29C
_022EF294:
	ldr r0, _022EF37C ; =ov00_0231A3A0
	str r0, [r2]
_022EF29C:
	add r0, sp, #0x11
	mov r1, r4
	mov r2, #0x14
	bl strncpy
	mov r3, #0
	add r0, sp, #8
	add r1, r4, #0x14
	mov r2, #8
	strb r3, [sp, #0x25]
	bl strncpy
	mov r1, #0
	mov r2, #0x10
	bl sub_0208B200
	mov r7, r0
	add r0, sp, #8
	add r1, r4, #0x1c
	mov r2, #8
	bl strncpy
	mov r1, #0
	mov r2, #0x10
	bl sub_0208B200
	mov r6, r0
	add r0, sp, #8
	add r1, r4, #0x24
	mov r2, #8
	bl strncpy
	mov r1, #0
	mov r2, #0x10
	bl sub_0208B200
	mov r5, r0
	add r0, sp, #8
	add r1, r4, #0x2c
	mov r2, #8
	bl strncpy
	mov r1, #0
	mov r2, #0x10
	bl sub_0208B200
	str r5, [sp]
	str r0, [sp, #4]
	mov r2, r7
	mov r3, r6
	add r0, r4, #0x34
	add r1, sp, #0x11
	bl ov00_022EEB90
	mov r0, #0
	bl ov00_022ECDF0
	ldr r0, _022EF370 ; =ov00_0231A2C4
	mov r2, #3
	mov r1, #1
	str r2, [r0, #4]
	str r1, [r0, #8]
	add sp, sp, #0x28
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022EF370: .word ov00_0231A2C4
_022EF374: .word ov00_0231A3C4
_022EF378: .word ov00_0231A378
_022EF37C: .word ov00_0231A3A0
	arm_func_end ov00_022EF210

	arm_func_start ov00_022EF380
ov00_022EF380: ; 0x022EF380
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	ldr r0, _022EF49C ; =ov00_0231A2C4
	ldr r1, [r0, #4]
	cmp r1, #8
	addls pc, pc, r1, lsl #2
	b _022EF48C
_022EF39C: ; jump table
	b _022EF48C ; case 0
	b _022EF3C0 ; case 1
	b _022EF48C ; case 2
	b _022EF48C ; case 3
	b _022EF3DC ; case 4
	b _022EF41C ; case 5
	b _022EF438 ; case 6
	b _022EF478 ; case 7
	b _022EF48C ; case 8
_022EF3C0:
	bl ov00_022E0378
	cmp r0, #0
	bne _022EF48C
	ldr r1, _022EF4A0 ; =0xFFFEA048
	mov r0, #6
	bl ov00_022E0394
	b _022EF48C
_022EF3DC:
	ldr r2, _022EF4A4 ; =ov00_022EEE40
	mov r1, #0
	str r2, [sp]
	str r1, [sp, #4]
	ldr r0, [r0, #0x58]
	ldr r3, _022EF4A8 ; =ov00_022EEE3C
	mov r2, r1
	bl ov00_022ED0FC
	ldr r1, _022EF49C ; =ov00_0231A2C4
	cmp r0, #0
	str r0, [r1, #0xc]
	movge r0, #5
	strge r0, [r1, #4]
	movlt r0, #1
	strlt r0, [r1, #4]
	b _022EF48C
_022EF41C:
	bl ov00_022ECE54
	cmp r0, #0
	bne _022EF48C
	ldr r0, _022EF49C ; =ov00_0231A2C4
	mov r1, #1
	str r1, [r0, #4]
	b _022EF48C
_022EF438:
	ldr r2, _022EF4A4 ; =ov00_022EEE40
	mov r1, #0
	str r2, [sp]
	str r1, [sp, #4]
	ldr r0, [r0, #0x58]
	ldr r3, _022EF4A8 ; =ov00_022EEE3C
	mov r2, r1
	bl ov00_022ED0FC
	ldr r1, _022EF49C ; =ov00_0231A2C4
	cmp r0, #0
	str r0, [r1, #0xc]
	movge r0, #7
	strge r0, [r1, #4]
	movlt r0, #1
	strlt r0, [r1, #4]
	b _022EF48C
_022EF478:
	bl ov00_022ECE54
	cmp r0, #0
	ldreq r0, _022EF49C ; =ov00_0231A2C4
	moveq r1, #1
	streq r1, [r0, #4]
_022EF48C:
	ldr r0, _022EF49C ; =ov00_0231A2C4
	ldr r0, [r0, #4]
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022EF49C: .word ov00_0231A2C4
_022EF4A0: .word 0xFFFEA048
_022EF4A4: .word ov00_022EEE40
_022EF4A8: .word ov00_022EEE3C
	arm_func_end ov00_022EF380

	arm_func_start ov00_022EF4AC
ov00_022EF4AC: ; 0x022EF4AC
	stmdb sp!, {r3, lr}
	ldr r0, _022EF4D4 ; =ov00_0231A2C4
	ldr r0, [r0, #0xc]
	cmp r0, #0
	blt _022EF4C4
	bl ov00_022ED124
_022EF4C4:
	ldr r0, _022EF4D4 ; =ov00_0231A2C4
	mov r1, #0
	str r1, [r0, #4]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022EF4D4: .word ov00_0231A2C4
	arm_func_end ov00_022EF4AC

	arm_func_start ov00_022EF4D8
ov00_022EF4D8: ; 0x022EF4D8
	stmdb sp!, {r3, lr}
	ldr r0, _022EF544 ; =ov00_0231A2C4
	ldr r1, [r0, #0x58]
	cmp r1, #0
	beq _022EF504
	mov r0, #7
	mov r2, #0
	bl ov00_022E0434
	ldr r0, _022EF544 ; =ov00_0231A2C4
	mov r1, #0
	str r1, [r0, #0x58]
_022EF504:
	ldr r0, _022EF544 ; =ov00_0231A2C4
	ldr r0, [r0, #0x64]
	cmp r0, #0
	beq _022EF528
	bl ov00_022E0520
	ldr r0, _022EF544 ; =ov00_0231A2C4
	mov r1, #0
	str r1, [r0, #0x68]
	str r1, [r0, #0x64]
_022EF528:
	bl ov00_022ECE14
	ldr r0, _022EF544 ; =ov00_0231A2C4
	mov r1, #2
	str r1, [r0, #4]
	mov r1, #0
	str r1, [r0, #8]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022EF544: .word ov00_0231A2C4
	arm_func_end ov00_022EF4D8

	arm_func_start ov00_022EF548
ov00_022EF548: ; 0x022EF548
	ldr r1, _022EF55C ; =ov00_0231A2C4
	ldr r2, [r1, #0x70]
	str r2, [r0]
	ldr r0, [r1, #0x6c]
	bx lr
	.align 2, 0
_022EF55C: .word ov00_0231A2C4
	arm_func_end ov00_022EF548

	arm_func_start ov00_022EF560
ov00_022EF560: ; 0x022EF560
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x34
	ldr r4, _022EF784 ; =ov00_0231A2C4
	mov sl, r0
	ldr r0, [r4, #0x10]
	mov sb, r1
	cmp r0, #1
	str r2, [sp, #0x10]
	mov r8, r3
	addne sp, sp, #0x34
	movne r0, #3
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r4, #0x58]
	cmp r1, #0
	beq _022EF5B4
	mov r0, #7
	mov r2, #0
	bl ov00_022E0434
	mov r0, r4
	mov r1, #0
	str r1, [r0, #0x58]
_022EF5B4:
	add r0, r8, #0xc
	bl ov00_022EEB04
	mov r7, r0
	ldr r0, _022EF788 ; =ov00_0231A3EC
	bl strlen
	mov r6, r0
	ldr r0, _022EF78C ; =ov00_0231A368
	bl strlen
	mov r5, r0
	ldr r2, _022EF790 ; =ov00_0231A3F4
	add r0, sp, #0x24
	mov r1, #0x10
	mov r3, sb
	bl snprintf
	mov fp, r0
	ldr r0, _022EF794 ; =ov00_0231A3F8
	bl strlen
	str r0, [sp, #0x14]
	mov r0, sl
	bl strlen
	str r0, [sp, #0x18]
	ldr r0, _022EF784 ; =ov00_0231A2C4
	ldr r0, [r0]
	bl strlen
	mov r4, r0
	ldr r0, _022EF798 ; =ov00_0231A2D8
	bl strlen
	add r1, r4, r0
	ldr r0, [sp, #0x18]
	add r1, r0, r1
	ldr r0, [sp, #0x14]
	add r0, r0, r1
	add r0, fp, r0
	add r0, r5, r0
	add r0, r0, #0x29
	add r0, r6, r0
	add r1, r7, r0
	mov r0, #7
	bl ov00_022E03F0
	ldr r1, _022EF784 ; =ov00_0231A2C4
	cmp r0, #0
	str r0, [r1, #0x58]
	addeq sp, sp, #0x34
	moveq r0, #2
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	str sl, [sp]
	ldr r3, _022EF79C ; =ov00_0231A41C
	str sb, [sp, #4]
	str r3, [sp, #8]
	ldr r2, _022EF7A0 ; =ov00_0231A448
	ldr r3, _022EF798 ; =ov00_0231A2D8
	str r2, [sp, #0xc]
	ldr r2, [r1]
	ldr r1, _022EF7A4 ; =ov00_0231A400
	bl sprintf
	ldr r0, _022EF784 ; =ov00_0231A2C4
	ldr r4, [r0, #0x58]
	mov r0, r4
	bl strlen
	add r2, r4, r0
	ldr r1, _022EF784 ; =ov00_0231A2C4
	ldr r0, _022EF788 ; =ov00_0231A3EC
	str r2, [r1, #0x60]
	bl strlen
	ldr r4, _022EF784 ; =ov00_0231A2C4
	ldr r3, [sp, #0x10]
	ldr r5, [r4, #0x60]
	add r1, sp, #0x1c
	sub r0, r5, r0
	sub r0, r0, #0x28
	str r0, [r4, #0x5c]
	str sb, [sp, #0x1c]
	str r8, [sp, #0x20]
	str r8, [sp]
	ldr r0, [r4, #0x60]
	mov r2, #8
	bl ov00_022EF0C8
	cmp r0, #2
	bne _022EF71C
	mov r1, r4
	ldr r1, [r1, #0x58]
	mov r0, #7
	mov r2, #0
	bl ov00_022E0434
	mov r0, r4
	mov r1, #0
	str r1, [r0, #0x58]
	add sp, sp, #0x34
	mov r0, #2
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022EF71C:
	ldr r0, [sp, #0x5c]
	cmp r0, #0
	beq _022EF74C
	mov r0, r4
	ldr r1, _022EF7A8 ; =ov00_0231A33C
	ldr r0, [r0, #0x5c]
	mov r2, #0x28
	bl memcpy
	mov r0, r4
	mov r1, #6
	str r1, [r0, #4]
	b _022EF76C
_022EF74C:
	ldr r0, _022EF78C ; =ov00_0231A368
	bl strlen
	mov r1, r4
	ldr r3, [r1, #0x5c]
	mov r4, #0
	mov r2, #4
	strb r4, [r3, -r0]
	str r2, [r1, #4]
_022EF76C:
	ldr r2, [sp, #0x58]
	ldr r1, _022EF784 ; =ov00_0231A2C4
	mov r0, #0
	str r2, [r1, #0x74]
	add sp, sp, #0x34
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022EF784: .word ov00_0231A2C4
_022EF788: .word ov00_0231A3EC
_022EF78C: .word ov00_0231A368
_022EF790: .word ov00_0231A3F4
_022EF794: .word ov00_0231A3F8
_022EF798: .word ov00_0231A2D8
_022EF79C: .word ov00_0231A41C
_022EF7A0: .word ov00_0231A448
_022EF7A4: .word ov00_0231A400
_022EF7A8: .word ov00_0231A33C
	arm_func_end ov00_022EF560

	arm_func_start ov00_022EF7AC
ov00_022EF7AC: ; 0x022EF7AC
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	ldr lr, [sp, #0x10]
	mov ip, #0
	str lr, [sp]
	str ip, [sp, #4]
	bl ov00_022EF560
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022EF7AC

	arm_func_start ov00_022EF7D0
ov00_022EF7D0: ; 0x022EF7D0
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, #0
	ldr r6, _022EF80C ; =ov00_0232774C
	ldr r4, _022EF810 ; =ov00_02327744
	mov r5, r7
_022EF7E4:
	ldr r0, [r6, r7, lsl #2]
	cmp r0, #0
	beq _022EF7FC
	ldr r1, [r4]
	blx r1
	str r5, [r6, r7, lsl #2]
_022EF7FC:
	add r7, r7, #1
	cmp r7, #3
	blt _022EF7E4
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022EF80C: .word ov00_0232774C
_022EF810: .word ov00_02327744
	arm_func_end ov00_022EF7D0

	arm_func_start ov00_022EF814
ov00_022EF814: ; 0x022EF814
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r1
	ldrsb r1, [r6]
	mov r4, r0
	cmp r1, #0
	beq _022EF8D0
	mov r0, r6
	bl ov00_022F114C
	cmp r0, #0xa
	ble _022EF850
	ldr r0, _022EF8D8 ; =ov00_02327740
	mov r1, #7
	str r1, [r0]
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022EF850:
	mov r0, r6
	bl ov00_022F114C
	mov r5, r0
	cmp r5, #0xa
	ble _022EF878
	ldr r0, _022EF8D8 ; =ov00_02327740
	mov r1, #7
	str r1, [r0]
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022EF878:
	bl ov00_022EFA00
	ldr r1, _022EF8DC ; =ov00_02327730
	add r0, r0, #1
	ldr r2, [r1]
	mov r1, #4
	blx r2
	ldr r1, _022EF8E0 ; =ov00_0232774C
	cmp r0, #0
	str r0, [r1, r4, lsl #2]
	bne _022EF8B4
	ldr r0, _022EF8D8 ; =ov00_02327740
	mov r1, #1
	str r1, [r0]
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022EF8B4:
	mov r1, r6
	mov r2, r5
	bl ov00_022EFA1C
	ldr r1, _022EF8E0 ; =ov00_0232774C
	mov r2, #0
	ldr r1, [r1, r4, lsl #2]
	strb r2, [r1, r0]
_022EF8D0:
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022EF8D8: .word ov00_02327740
_022EF8DC: .word ov00_02327730
_022EF8E0: .word ov00_0232774C
	arm_func_end ov00_022EF814

	arm_func_start ov00_022EF8E4
ov00_022EF8E4: ; 0x022EF8E4
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r5, r1
	mov r4, r2
	bl ov00_022F1010
	bl ov00_022EF7D0
	mov r1, r6
	mov r0, #0
	bl ov00_022EF814
	cmp r0, #0
	beq _022EF944
	mov r1, r5
	mov r0, #1
	bl ov00_022EF814
	cmp r0, #0
	beq _022EF944
	mov r1, r4
	mov r0, #2
	bl ov00_022EF814
	cmp r0, #0
	beq _022EF944
	bl ov00_022F1024
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
_022EF944:
	bl ov00_022EF7D0
	bl ov00_022F1024
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022EF8E4

	arm_func_start ov00_022EF954
ov00_022EF954: ; 0x022EF954
	stmdb sp!, {r4, lr}
	mov r4, #0
	mov lr, r4
	cmp r2, #0
	ble _022EF994
	mov r3, r4
_022EF96C:
	ldrsb ip, [r1]
	cmp ip, #0
	streqb r3, [r0], #1
	beq _022EF988
	add r4, r4, #1
	add r1, r1, #1
	strb ip, [r0], #1
_022EF988:
	add lr, lr, #1
	cmp lr, r2
	blt _022EF96C
_022EF994:
	mov r0, r4
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022EF954

	arm_func_start ov00_022EF99C
ov00_022EF99C: ; 0x022EF99C
	cmp r0, #0x41
	blo _022EF9B0
	cmp r0, #0x5a
	subls r0, r0, #0x41
	bxls lr
_022EF9B0:
	cmp r0, #0x61
	blo _022EF9C4
	cmp r0, #0x7a
	subls r0, r0, #0x47
	bxls lr
_022EF9C4:
	cmp r0, #0x30
	blo _022EF9D8
	cmp r0, #0x39
	addls r0, r0, #4
	bxls lr
_022EF9D8:
	cmp r0, #0x2e
	moveq r0, #0x3e
	bxeq lr
	cmp r0, #0x2d
	moveq r0, #0x3f
	mvnne r0, #0
	bx lr
	arm_func_end ov00_022EF99C

	arm_func_start ov00_022EF9F4
ov00_022EF9F4: ; 0x022EF9F4
	mov r0, r0, asr #2
	add r0, r0, r0, lsl #1
	bx lr
	arm_func_end ov00_022EF9F4

	arm_func_start ov00_022EFA00
ov00_022EFA00: ; 0x022EFA00
	ldr r1, _022EFA18 ; =0x55555556
	add r2, r0, #2
	smull r0, r3, r1, r2
	add r3, r3, r2, lsr #31
	mov r0, r3, lsl #2
	bx lr
	.align 2, 0
_022EFA18: .word 0x55555556
	arm_func_end ov00_022EFA00

	arm_func_start ov00_022EFA1C
ov00_022EFA1C: ; 0x022EFA1C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov r7, r2
	mov r8, r1
	mov sb, r0
	cmp r7, #3
	movgt r2, #3
	add r0, sp, #0
	mov r1, r8
	mov r6, #0
	bl ov00_022EF954
	cmp r0, #0
	ble _022EFB00
	mov r5, #0
	ldr sl, _022EFB10 ; =ov00_023182A8
	mov r4, r5
	mov fp, #0x2a
_022EFA5C:
	cmp r7, #3
	strltb r5, [sp, #2]
	cmp r7, #2
	strltb r4, [sp, #1]
	ldrb r1, [sp, #2]
	ldrb r2, [sp]
	ldrb r3, [sp, #1]
	mov lr, r1, asr #6
	mov ip, r2, asr #2
	orr lr, lr, r3, lsl #2
	mov r3, r3, asr #4
	and ip, ip, #0xff
	orr r2, r3, r2, lsl #4
	ldrsb ip, [sl, ip]
	and r2, r2, #0x3f
	ldrsb r2, [sl, r2]
	strb ip, [sb]
	and ip, lr, #0x3f
	cmp r0, #1
	strb r2, [sb, #1]
	ldrgtsb r2, [sl, ip]
	and r1, r1, #0x3f
	add r8, r8, r0
	movle r2, fp
	cmp r0, #2
	ldrgtsb r1, [sl, r1]
	strb r2, [sb, #2]
	add r6, r6, #4
	movle r1, #0x2a
	strb r1, [sb, #3]
	add sb, sb, #4
	subs r7, r7, r0
	beq _022EFB00
	cmp r7, #3
	movgt r2, #3
	movle r2, r7
	add r0, sp, #0
	mov r1, r8
	bl ov00_022EF954
	cmp r0, #0
	bgt _022EFA5C
_022EFB00:
	mov r1, #0
	mov r0, r6
	strb r1, [sb]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022EFB10: .word ov00_023182A8
	arm_func_end ov00_022EFA1C

	arm_func_start ov00_022EFB14
ov00_022EFB14: ; 0x022EFB14
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #8
	mov sb, r0
	mov r7, r2
	add r0, sp, #3
	mov r2, #4
	mov r6, #0
	mov r8, r1
	bl ov00_022EF954
	mov r5, r0
	mov r4, r6
	b _022EFC20
_022EFB44:
	ldrb r0, [sp, #3]
	mov r1, #0
	strb r1, [sp]
	strb r1, [sp, #1]
	strb r1, [sp, #2]
	bl ov00_022EF99C
	movs r4, r0
	bmi _022EFBCC
	ldrb r0, [sp, #4]
	mov r1, r4, lsl #2
	strb r1, [sp]
	bl ov00_022EF99C
	movs r4, r0
	bmi _022EFBCC
	ldrsb r2, [sp]
	ldrb r0, [sp, #5]
	mov r1, r4, lsl #4
	orr r2, r2, r4, asr #4
	strb r2, [sp]
	strb r1, [sp, #1]
	bl ov00_022EF99C
	movs r4, r0
	bmi _022EFBCC
	ldrsb r2, [sp, #1]
	ldrb r0, [sp, #6]
	mov r1, r4, lsl #6
	orr r2, r2, r4, asr #2
	strb r1, [sp, #2]
	strb r2, [sp, #1]
	bl ov00_022EF99C
	movs r4, r0
	ldrplsb r0, [sp, #2]
	orrpl r0, r0, r4
	strplb r0, [sp, #2]
_022EFBCC:
	sub r1, r5, #1
	cmp r1, #0
	mov r2, #0
	ble _022EFBF4
	add r3, sp, #0
_022EFBE0:
	ldrsb r0, [r3], #1
	add r2, r2, #1
	cmp r2, r1
	strb r0, [sb], #1
	blt _022EFBE0
_022EFBF4:
	sub r0, r5, #1
	sub r7, r7, #4
	cmp r7, #0
	add r8, r8, r5
	add r6, r6, r0
	ble _022EFC30
	add r0, sp, #3
	mov r1, r8
	mov r2, #4
	bl ov00_022EF954
	mov r5, r0
_022EFC20:
	cmp r5, #0
	ble _022EFC30
	cmp r4, #0
	bge _022EFB44
_022EFC30:
	mov r0, r6
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022EFB14

	arm_func_start ov00_022EFC3C
ov00_022EFC3C: ; 0x022EFC3C
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	bl ov00_022F114C
	ldr r1, _022EFC84 ; =ov00_02327724
	mov r4, r0
	ldr r2, [r1, #0xc]
	add r0, r4, #1
	mov r1, #4
	blx r2
	movs r5, r0
	beq _022EFC7C
	mov r1, r6
	mov r2, r4
	bl ov00_022F1178
	mov r0, #0
	strb r0, [r5, r4]
_022EFC7C:
	mov r0, r5
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022EFC84: .word ov00_02327724
	arm_func_end ov00_022EFC3C

	arm_func_start ov00_022EFC88
ov00_022EFC88: ; 0x022EFC88
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr ip, _022EFE18 ; =ov00_02327724
	mov r5, r0
	mov r4, r1
	str r5, [ip, #0xc]
	mov r1, #0
	ldr r0, [sp, #0x20]
	str r4, [ip, #0x20]
	str r0, [ip, #0x18]
	str r1, [ip, #0x1c]
	str r1, [ip, #0x28]
	str r1, [ip, #0x2c]
	str r1, [ip, #0x30]
	str r1, [ip, #4]
	sub r0, r1, #1
	str r0, [ip, #0x24]
	str r1, [ip, #8]
	ldr r0, _022EFE1C ; =ov00_02327764
	mov r7, r2
	mov r6, r3
	str r1, [ip, #0x10]
	bl ov00_022F10EC
	ldr r0, _022EFE20 ; =ov00_023277AC
	bl ov00_022F0064
	mov r0, r7
	bl ov00_022EFC3C
	ldr r1, _022EFE18 ; =ov00_02327724
	cmp r0, #0
	str r0, [r1, #0x10]
	beq _022EFDD4
	mov r0, r6
	bl ov00_022EFC3C
	ldr r1, _022EFE18 ; =ov00_02327724
	cmp r0, #0
	str r0, [r1, #8]
	beq _022EFDD4
	ldr r1, [sp, #0x18]
	ldr r0, _022EFE24 ; =ov00_02327758
	mov r2, #4
	bl ov00_022EFA1C
	ldr r1, _022EFE24 ; =ov00_02327758
	mov r2, #0
	strb r2, [r1, r0]
	ldr r1, [sp, #0x1c]
	ldr r0, _022EFE28 ; =ov00_02327790
	mov r2, #0x10
	bl ov00_022EFA1C
	ldr r1, _022EFE28 ; =ov00_02327790
	mov r2, #0
	strb r2, [r1, r0]
	bl ov00_022F1038
	cmp r0, #0
	beq _022EFDA0
	bl ov00_022F0FF4
	cmp r0, #0
	beq _022EFDA0
	mov r0, r5
	mov r1, r4
	mov r2, #0xa
	bl ov00_022F12D8
	cmp r0, #0
	beq _022EFD9C
	ldr r0, _022EFE2C ; =ov00_02327778
	bl ov00_022EFED8
	ldr r1, _022EFE18 ; =ov00_02327724
	str r0, [r1, #4]
	mov r0, #1
	str r0, [r1, #0x14]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022EFD9C:
	bl ov00_022F100C
_022EFDA0:
	ldr r1, _022EFE18 ; =ov00_02327724
	ldr r0, [r1, #8]
	ldr r1, [r1, #0x20]
	blx r1
	ldr r1, _022EFE18 ; =ov00_02327724
	ldr r0, [r1, #0x10]
	ldr r1, [r1, #0x20]
	blx r1
	ldr r0, _022EFE18 ; =ov00_02327724
	mov r1, #8
	str r1, [r0, #0x1c]
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022EFDD4:
	ldr r1, _022EFE18 ; =ov00_02327724
	ldr r0, [r1, #8]
	cmp r0, #0
	beq _022EFDEC
	ldr r1, [r1, #0x20]
	blx r1
_022EFDEC:
	ldr r1, _022EFE18 ; =ov00_02327724
	ldr r0, [r1, #0x10]
	cmp r0, #0
	beq _022EFE04
	ldr r1, [r1, #0x20]
	blx r1
_022EFE04:
	ldr r0, _022EFE18 ; =ov00_02327724
	mov r1, #1
	str r1, [r0, #0x1c]
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022EFE18: .word ov00_02327724
_022EFE1C: .word ov00_02327764
_022EFE20: .word ov00_023277AC
_022EFE24: .word ov00_02327758
_022EFE28: .word ov00_02327790
_022EFE2C: .word ov00_02327778
	arm_func_end ov00_022EFC88

	arm_func_start ov00_022EFE30
ov00_022EFE30: ; 0x022EFE30
	stmdb sp!, {r3, lr}
	bl ov00_022EF7D0
	bl ov00_022F100C
	bl ov00_022F1060
	ldr r1, _022EFE70 ; =ov00_02327724
	ldr r0, [r1, #8]
	ldr r1, [r1, #0x20]
	blx r1
	ldr r1, _022EFE70 ; =ov00_02327724
	ldr r0, [r1, #0x10]
	ldr r1, [r1, #0x20]
	blx r1
	ldr r0, _022EFE70 ; =ov00_02327724
	ldr r0, [r0]
	blx r0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022EFE70: .word ov00_02327724
	arm_func_end ov00_022EFE30

	arm_func_start ov00_022EFE74
ov00_022EFE74: ; 0x022EFE74
	ldr r1, _022EFE90 ; =ov00_02327724
	mov r2, #0
	str r2, [r1, #0x14]
	str r0, [r1]
	ldr ip, _022EFE94 ; =ov00_022F13A0
	ldr r0, _022EFE98 ; =ov00_022EFE30
	bx ip
	.align 2, 0
_022EFE90: .word ov00_02327724
_022EFE94: .word ov00_022F13A0
_022EFE98: .word ov00_022EFE30
	arm_func_end ov00_022EFE74

	arm_func_start ov00_022EFE9C
ov00_022EFE9C: ; 0x022EFE9C
	stmdb sp!, {r4, lr}
	bl ov00_022F1064
	cmp r0, #0
	bne _022EFEC8
	bl ov00_022F1010
	ldr r0, _022EFED4 ; =ov00_02327748
	ldr r4, [r0]
	bl ov00_022F1024
	mov r0, r4
	bl ov00_022F2578
	ldmia sp!, {r4, pc}
_022EFEC8:
	bl ov00_022F10AC
	mov r0, #0
	ldmia sp!, {r4, pc}
	.align 2, 0
_022EFED4: .word ov00_02327748
	arm_func_end ov00_022EFE9C

	arm_func_start ov00_022EFED8
ov00_022EFED8: ; 0x022EFED8
	stmdb sp!, {r4, lr}
	sub sp, sp, #0x10
	ldr ip, _022EFFC8 ; =ov00_023182EC
	add r3, sp, #0
	mov r4, r0
	mov r2, #6
_022EFEF0:
	ldrb r1, [ip]
	ldrb r0, [ip, #1]
	add ip, ip, #2
	strb r1, [r3]
	strb r0, [r3, #1]
	add r3, r3, #2
	subs r2, r2, #1
	bne _022EFEF0
	ldrb r1, [ip]
	ldr r0, _022EFFCC ; =ov00_023277D0
	strb r1, [r3]
	bl ov00_022E0BF8
	cmp r0, #0
	beq _022EFFBC
	ldr r0, _022EFFD0 ; =ov00_023277D0
	ldr r1, [r0]
	cmp r1, #0
	blt _022EFF48
	cmp r1, #0xa
	addlt r0, r1, #0x30
	strltb r0, [sp, #1]
	blt _022EFF60
_022EFF48:
	cmp r1, #0xa
	blt _022EFF60
	cmp r1, #0x64
	bge _022EFF60
	add r0, sp, #0
	bl ov00_022F119C
_022EFF60:
	ldr r0, _022EFFD0 ; =ov00_023277D0
	ldr r0, [r0]
	cmp r0, #4
	cmpne r0, #8
	bne _022EFFA0
	ldr r0, _022EFFD0 ; =ov00_023277D0
	ldr r0, [r0, #4]
	cmp r0, #0
	blt _022EFF90
	cmp r0, #0xa
	addlt r0, r0, #0x30
	strltb r0, [sp, #3]
_022EFF90:
	ldr r1, _022EFFD4 ; =ov00_023277D8
	add r0, sp, #4
	mov r2, #9
	bl ov00_022F1178
_022EFFA0:
	add r1, sp, #0
	mov r0, r4
	mov r2, #0xd
	bl ov00_022EFA1C
	add sp, sp, #0x10
	mov r0, #1
	ldmia sp!, {r4, pc}
_022EFFBC:
	mov r0, #0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
	.align 2, 0
_022EFFC8: .word ov00_023182EC
_022EFFCC: .word ov00_023277D0
_022EFFD0: .word ov00_023277D0
_022EFFD4: .word ov00_023277D8
	arm_func_end ov00_022EFED8

	arm_func_start ov00_022EFFD8
ov00_022EFFD8: ; 0x022EFFD8
	stmdb sp!, {r4, r5, lr}
	sub sp, sp, #0x24
	mov r5, r0
	mov r4, r1
	add r0, sp, #0x10
	mov r1, #0x14
	bl ov00_022F1164
	add r0, sp, #0x10
	bl ov00_022ED468
	ldr r1, [sp, #0x10]
	ldr r2, [sp, #0x14]
	mov r0, #0
	cmp r2, r0
	cmpeq r1, r0
	addeq sp, sp, #0x24
	ldmeqia sp!, {r4, r5, pc}
	add r0, sp, #0
	mov r3, #0xd
	bl ov00_022F11A8
	cmp r0, #0
	addlt sp, sp, #0x24
	movlt r0, #0
	ldmltia sp!, {r4, r5, pc}
	add r1, sp, #0
	mov r0, r4
	mov r2, #0xd
	bl ov00_022EFA1C
	ldr r1, _022F0060 ; =0x027FFE0C
	mov r0, r5
	mov r2, #4
	bl ov00_022EFA1C
	mov r0, #1
	add sp, sp, #0x24
	ldmia sp!, {r4, r5, pc}
	.align 2, 0
_022F0060: .word 0x027FFE0C
	arm_func_end ov00_022EFFD8

	arm_func_start ov00_022F0064
ov00_022F0064: ; 0x022F0064
	stmdb sp!, {r3, lr}
	ldr r2, _022F0084 ; =ov00_0231A534
	mov ip, #1
	mov r1, #0x21
	mov r3, #3
	str ip, [sp]
	bl sub_0207911C
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F0084: .word ov00_0231A534
	arm_func_end ov00_022F0064

	arm_func_start ov00_022F0088
ov00_022F0088: ; 0x022F0088
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x18
	mov sb, r2
	mov sl, r1
	ldr r1, [sb, #8]
	cmp r0, #0
	str r1, [sp, #8]
	ldr r1, [sb, #0xc]
	ldr r5, [sb, #4]
	str r1, [sp, #4]
	mvn r1, #0
	str r1, [sp]
	beq _022F00D0
	cmp r0, #6
	beq _022F02AC
	cmp r0, #8
	beq _022F02A4
	b _022F02B4
_022F00D0:
	ldr r1, _022F03A0 ; =ov00_0231A550
	add r2, sp, #0x14
	mov r0, sl
	bl ov00_022F2864
	cmp r0, #3
	movne r4, #3
	bne _022F02B8
	ldr r0, [sp, #0x14]
	mov r1, #3
	bl ov00_022F1190
	ldr r1, _022F03A4 ; =0x0000012E
	cmp r0, r1
	bne _022F021C
	add r1, sp, #0x10
	mov r0, sl
	mov r8, #0
	bl ov00_022F2968
	movs r6, r0
	movmi r4, #3
	bmi _022F02B8
	cmp r6, #0
	mov r7, r8
	ble _022F0208
	ldr r4, _022F03A8 ; =ov00_0231A560
	mov fp, #8
_022F0134:
	ldr r3, [sp, #0x10]
	mov r1, r7
	add r2, r3, r7
	b _022F014C
_022F0144:
	add r2, r2, #1
	add r7, r7, #1
_022F014C:
	ldrsb r0, [r2]
	cmp r0, #0x3d
	beq _022F0160
	cmp r7, r6
	blt _022F0144
_022F0160:
	sub r0, r7, r1
	cmp r0, #8
	add r7, r7, #1
	bne _022F018C
	add r0, r3, r1
	mov r1, r4
	mov r2, fp
	bl ov00_022F1158
	cmp r0, #0
	moveq r8, #1
	movne r8, #0
_022F018C:
	ldr r1, [sp, #0x10]
	mov r3, r7
	add r2, r1, r7
	b _022F01A4
_022F019C:
	add r2, r2, #1
	add r7, r7, #1
_022F01A4:
	ldrsb r0, [r2]
	cmp r0, #0x26
	cmpne r0, #0xd
	cmpne r0, #0
	beq _022F01C0
	cmp r7, r6
	blt _022F019C
_022F01C0:
	cmp r8, #0
	sub r2, r7, r3
	add r7, r7, #1
	beq _022F0200
	cmp r2, #4
	bne _022F0208
	add r0, sp, #0xc
	add r1, r1, r3
	bl ov00_022EFB14
	mov r1, r0
	add r0, sp, #0xc
	mov r2, #0
	strb r2, [r0, r1]
	bl ov00_022F1190
	str r0, [sp]
	b _022F0208
_022F0200:
	cmp r7, r6
	blt _022F0134
_022F0208:
	ldr r0, [sp]
	cmp r0, #0
	movlt r4, #3
	movge r4, #5
	b _022F02B8
_022F021C:
	cmp r0, #0
	ble _022F022C
	cmp r0, #0xc8
	beq _022F0234
_022F022C:
	mov r4, #3
	b _022F02B8
_022F0234:
	cmp r5, #1
	beq _022F0250
	cmp r5, #2
	beq _022F026C
	cmp r5, #3
	beq _022F0288
	b _022F02B8
_022F0250:
	mov r0, sl
	mov r1, sb
	bl ov00_022F0CF0
	cmp r0, #0
	movne r4, #0
	moveq r4, #3
	b _022F02B8
_022F026C:
	mov r0, sl
	mov r1, sb
	bl ov00_022F0D70
	cmp r0, #0
	movne r4, #0
	moveq r4, #3
	b _022F02B8
_022F0288:
	mov r0, sl
	mov r1, sb
	bl ov00_022F0D44
	cmp r0, #0
	movne r4, #0
	moveq r4, #3
	b _022F02B8
_022F02A4:
	mov r4, #6
	b _022F02B8
_022F02AC:
	mov r4, #4
	b _022F02B8
_022F02B4:
	mov r4, #3
_022F02B8:
	cmp r5, #1
	beq _022F0328
	cmp r5, #2
	beq _022F02D4
	cmp r5, #3
	beq _022F0318
	b _022F0328
_022F02D4:
	ldr r0, [sb, #0x20]
	cmp r0, #0
	beq _022F02EC
	ldr r1, _022F03AC ; =ov00_02327744
	ldr r1, [r1]
	blx r1
_022F02EC:
	ldr r0, [sb, #0x1c]
	cmp r0, #0
	beq _022F0304
	ldr r1, _022F03AC ; =ov00_02327744
	ldr r1, [r1]
	blx r1
_022F0304:
	ldr r1, _022F03AC ; =ov00_02327744
	ldr r0, [sb, #0x18]
	ldr r1, [r1]
	blx r1
	b _022F0328
_022F0318:
	ldr r1, _022F03AC ; =ov00_02327744
	ldr r0, [sb, #0x10]
	ldr r1, [r1]
	blx r1
_022F0328:
	bl ov00_022F1010
	ldr r0, _022F03B0 ; =ov00_02327748
	mvn r1, #0
	str r1, [r0]
	bl ov00_022F1024
	mov r0, sl
	bl ov00_022F26E0
	ldr r1, _022F03AC ; =ov00_02327744
	mov r0, sb
	ldr r1, [r1]
	blx r1
	bl ov00_022F10AC
	cmp r4, #0
	ldrne r0, _022F03B4 ; =ov00_02327740
	strne r4, [r0]
	ldr r0, [sp, #8]
	cmp r0, #0
	beq _022F0384
	ldr r2, [sp]
	ldr r3, [sp, #8]
	mov r0, r5
	mov r1, r4
	blx r3
_022F0384:
	ldr r0, [sp, #4]
	cmp r0, #0
	addeq sp, sp, #0x18
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	bl ov00_022F10D8
	add sp, sp, #0x18
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022F03A0: .word ov00_0231A550
_022F03A4: .word 0x0000012E
_022F03A8: .word ov00_0231A560
_022F03AC: .word ov00_02327744
_022F03B0: .word ov00_02327748
_022F03B4: .word ov00_02327740
	arm_func_end ov00_022F0088

	arm_func_start ov00_022F03B8
ov00_022F03B8: ; 0x022F03B8
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, r1
	bl ov00_022F23F8
	bl ov00_022F10AC
	ldr r1, _022F03E0 ; =ov00_02327744
	mov r0, r4
	ldr r1, [r1]
	blx r1
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F03E0: .word ov00_02327744
	arm_func_end ov00_022F03B8

	arm_func_start ov00_022F03E4
ov00_022F03E4: ; 0x022F03E4
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	sub sp, sp, #8
	mov r8, r0
	mov r7, r1
	ldr r0, _022F0710 ; =ov00_0232780C
	ldr r1, _022F0714 ; =ov00_02327818
	mov r6, r2
	mov r5, r3
	bl ov00_022EFFD8
	cmp r0, #0
	bne _022F0428
	ldr r0, _022F0718 ; =ov00_02327740
	mov r1, #8
	str r1, [r0]
	add sp, sp, #8
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022F0428:
	ldr r1, _022F071C ; =ov00_02327730
	mov r0, #0x24
	ldr r2, [r1]
	mov r1, #4
	blx r2
	movs r4, r0
	bne _022F045C
	ldr r0, _022F0718 ; =ov00_02327740
	mov r1, #1
	str r1, [r0]
	add sp, sp, #8
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022F045C:
	ldr r0, _022F0720 ; =ov00_0232773C
	mov r1, #0
	ldr r0, [r0]
	str r0, [r4, #8]
	str r1, [r4, #0xc]
	bl ov00_022F1064
	cmp r0, #0
	bne _022F04A4
	ldr r1, _022F0724 ; =ov00_02327744
	mov r0, r4
	ldr r1, [r1]
	blx r1
	ldr r0, _022F0718 ; =ov00_02327740
	mov r1, #2
	str r1, [r0]
	add sp, sp, #8
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022F04A4:
	ldr r1, _022F0728 ; =ov00_022F0088
	ldr r0, _022F072C ; =ov00_02327734
	stmia sp, {r1, r4}
	ldr r0, [r0]
	ldr r3, [sp, #0x20]
	mov r2, r5
	mov r1, #1
	bl ov00_022F1E94
	movs r5, r0
	bne _022F04F8
	bl ov00_022F10AC
	ldr r1, _022F0724 ; =ov00_02327744
	mov r0, r4
	ldr r1, [r1]
	blx r1
	ldr r0, _022F0718 ; =ov00_02327740
	mov r1, #3
	str r1, [r0]
	add sp, sp, #8
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022F04F8:
	ldr r1, _022F0730 ; =ov00_0231A54C
	str r4, [r8]
	mov r2, #1
	str r5, [r7]
	bl ov00_022F16EC
	cmp r0, #0
	beq _022F06EC
	ldr r1, _022F0734 ; =ov00_0231A56C
	ldr r2, _022F0738 ; =ov00_023277AC
	mov r0, r5
	bl ov00_022F1654
	cmp r0, #0
	beq _022F06EC
	ldr r1, _022F073C ; =ov00_0231A578
	ldr r2, _022F0740 ; =ov00_02327758
	mov r0, r5
	bl ov00_022F1678
	cmp r0, #0
	beq _022F06EC
	ldr r1, _022F0744 ; =ov00_0231A580
	ldr r2, _022F0710 ; =ov00_0232780C
	mov r0, r5
	bl ov00_022F1678
	cmp r0, #0
	beq _022F06EC
	ldr r1, _022F0748 ; =ov00_0231A58C
	ldr r2, _022F074C ; =ov00_02327790
	mov r0, r5
	bl ov00_022F1678
	cmp r0, #0
	beq _022F06EC
	ldr r0, _022F0750 ; =ov00_0232772C
	ldr r1, _022F0754 ; =ov00_0231A594
	ldr r2, [r0]
	mov r0, r5
	bl ov00_022F1678
	cmp r0, #0
	beq _022F06EC
	ldr r1, _022F0758 ; =ov00_0231A59C
	ldr r2, _022F0714 ; =ov00_02327818
	mov r0, r5
	bl ov00_022F1678
	cmp r0, #0
	beq _022F06EC
	ldr r1, _022F075C ; =ov00_0231A5A4
	ldr r2, _022F0760 ; =ov00_02327764
	mov r0, r5
	bl ov00_022F1678
	cmp r0, #0
	beq _022F06EC
	ldr r1, _022F0764 ; =ov00_0231A5AC
	mov r0, r5
	mov r2, r6
	bl ov00_022F1678
	cmp r0, #0
	beq _022F06EC
	ldr r0, _022F0768 ; =ov00_0232774C
	ldr r2, [r0]
	cmp r2, #0
	beq _022F05FC
	ldr r1, _022F076C ; =ov00_0231A5B4
	mov r0, r5
	bl ov00_022F1678
	cmp r0, #0
	beq _022F06EC
_022F05FC:
	ldr r0, _022F0768 ; =ov00_0232774C
	ldr r2, [r0, #4]
	cmp r2, #0
	beq _022F0620
	ldr r1, _022F0770 ; =ov00_0231A5BC
	mov r0, r5
	bl ov00_022F1678
	cmp r0, #0
	beq _022F06EC
_022F0620:
	ldr r0, _022F0768 ; =ov00_0232774C
	ldr r2, [r0, #8]
	cmp r2, #0
	beq _022F0644
	ldr r1, _022F0774 ; =ov00_0231A5C4
	mov r0, r5
	bl ov00_022F1678
	cmp r0, #0
	beq _022F06EC
_022F0644:
	ldr r0, _022F0778 ; =ov00_02327728
	ldr r0, [r0]
	cmp r0, #0
	beq _022F066C
	ldr r1, _022F077C ; =ov00_0231A5CC
	ldr r2, _022F0780 ; =ov00_02327778
	mov r0, r5
	bl ov00_022F1678
	cmp r0, #0
	beq _022F06EC
_022F066C:
	ldr r0, [sp, #0x24]
	cmp r0, #0
	beq _022F06E0
	bl ov00_022F114C
	mov r6, r0
	cmp r6, #0x40
	ble _022F06AC
	ldr r2, _022F0718 ; =ov00_02327740
	mov r3, #7
	mov r0, r4
	mov r1, r5
	str r3, [r2]
	bl ov00_022F03B8
	add sp, sp, #8
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022F06AC:
	ldr r0, _022F0784 ; =ov00_02327830
	mov r1, #0x59
	bl ov00_022F1164
	ldr r1, [sp, #0x24]
	ldr r0, _022F0784 ; =ov00_02327830
	mov r2, r6
	bl ov00_022EFA1C
	ldr r1, _022F0788 ; =ov00_0231A5D4
	ldr r2, _022F0784 ; =ov00_02327830
	mov r0, r5
	bl ov00_022F1678
	cmp r0, #0
	beq _022F06EC
_022F06E0:
	add sp, sp, #8
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022F06EC:
	mov r0, r4
	mov r1, r5
	bl ov00_022F03B8
	ldr r0, _022F0718 ; =ov00_02327740
	mov r1, #1
	str r1, [r0]
	mov r0, #0
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022F0710: .word ov00_0232780C
_022F0714: .word ov00_02327818
_022F0718: .word ov00_02327740
_022F071C: .word ov00_02327730
_022F0720: .word ov00_0232773C
_022F0724: .word ov00_02327744
_022F0728: .word ov00_022F0088
_022F072C: .word ov00_02327734
_022F0730: .word ov00_0231A54C
_022F0734: .word ov00_0231A56C
_022F0738: .word ov00_023277AC
_022F073C: .word ov00_0231A578
_022F0740: .word ov00_02327758
_022F0744: .word ov00_0231A580
_022F0748: .word ov00_0231A58C
_022F074C: .word ov00_02327790
_022F0750: .word ov00_0232772C
_022F0754: .word ov00_0231A594
_022F0758: .word ov00_0231A59C
_022F075C: .word ov00_0231A5A4
_022F0760: .word ov00_02327764
_022F0764: .word ov00_0231A5AC
_022F0768: .word ov00_0232774C
_022F076C: .word ov00_0231A5B4
_022F0770: .word ov00_0231A5BC
_022F0774: .word ov00_0231A5C4
_022F0778: .word ov00_02327728
_022F077C: .word ov00_0231A5CC
_022F0780: .word ov00_02327778
_022F0784: .word ov00_02327830
_022F0788: .word ov00_0231A5D4
	arm_func_end ov00_022F03E4

	arm_func_start ov00_022F078C
ov00_022F078C: ; 0x022F078C
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r1
	mov r5, r0
	bl ov00_022F1010
	mov r0, r4
	bl ov00_022F24EC
	ldr r1, _022F07E4 ; =ov00_02327748
	str r0, [r5]
	str r0, [r1]
	bl ov00_022F1024
	ldr r0, [r5]
	cmp r0, #0
	movge r0, #1
	ldmgeia sp!, {r3, r4, r5, pc}
	mov r0, r5
	mov r1, r4
	bl ov00_022F03B8
	ldr r0, _022F07E8 ; =ov00_02327740
	mov r1, #3
	str r1, [r0]
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022F07E4: .word ov00_02327748
_022F07E8: .word ov00_02327740
	arm_func_end ov00_022F078C

	arm_func_start ov00_022F07EC
ov00_022F07EC: ; 0x022F07EC
	stmdb sp!, {r4, lr}
	sub sp, sp, #0x10
	mov ip, #0x80
	mov r4, r0
	str ip, [sp]
	mov ip, #0
	ldr r2, _022F0860 ; =ov00_023182FC
	ldr r3, _022F0864 ; =ov00_0232788C
	add r0, sp, #0xc
	add r1, sp, #8
	str ip, [sp, #4]
	bl ov00_022F03E4
	cmp r0, #0
	addeq sp, sp, #0x10
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	ldr r0, [sp, #0xc]
	mov r1, #1
	str r1, [r0, #4]
	ldr r0, [sp, #0xc]
	str r4, [r0, #0x10]
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #8]
	bl ov00_022F078C
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F0860: .word ov00_023182FC
_022F0864: .word ov00_0232788C
	arm_func_end ov00_022F07EC

	arm_func_start ov00_022F0868
ov00_022F0868: ; 0x022F0868
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #0x1c
	mov r4, r2
	mov r6, r1
	ldr r1, _022F0B14 ; =ov00_02327730
	mov r7, r4, lsl #8
	cmp r7, #0x80
	ldr r2, [r1]
	movlt r7, #0x80
	mov r5, r0
	mov r0, r7
	mov r1, #4
	blx r2
	movs r8, r0
	bne _022F08BC
	ldr r0, _022F0B18 ; =ov00_02327740
	mov r1, #1
	str r1, [r0]
	add sp, sp, #0x1c
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
_022F08BC:
	add r0, sp, #0x10
	mov r1, r6
	bl ov00_022F119C
	mov r6, r0
	bl ov00_022EFA00
	ldr r1, _022F0B14 ; =ov00_02327730
	add r0, r0, #1
	ldr r2, [r1]
	mov r1, #4
	blx r2
	movs sb, r0
	bne _022F0914
	ldr r1, _022F0B1C ; =ov00_02327744
	mov r0, r8
	ldr r1, [r1]
	blx r1
	ldr r0, _022F0B18 ; =ov00_02327740
	mov r1, #1
	str r1, [r0]
	add sp, sp, #0x1c
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
_022F0914:
	add r1, sp, #0x10
	mov r2, r6
	bl ov00_022EFA1C
	mov r1, #0
	strb r1, [sb, r0]
	add r0, sp, #0x10
	mov r1, r4
	bl ov00_022F119C
	mov r6, r0
	bl ov00_022EFA00
	ldr r1, _022F0B14 ; =ov00_02327730
	add r0, r0, #1
	ldr r2, [r1]
	mov r1, #4
	blx r2
	movs sl, r0
	bne _022F0990
	ldr r1, _022F0B1C ; =ov00_02327744
	mov r0, sb
	ldr r1, [r1]
	blx r1
	ldr r1, _022F0B1C ; =ov00_02327744
	mov r0, r8
	ldr r1, [r1]
	blx r1
	ldr r0, _022F0B18 ; =ov00_02327740
	mov r1, #1
	str r1, [r0]
	add sp, sp, #0x1c
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
_022F0990:
	add r1, sp, #0x10
	mov r2, r6
	bl ov00_022EFA1C
	mov r6, #0
	strb r6, [sl, r0]
	str r7, [sp]
	ldr r2, _022F0B20 ; =ov00_02318308
	add r0, sp, #0xc
	add r1, sp, #8
	mov r3, r8
	str r6, [sp, #4]
	bl ov00_022F03E4
	cmp r0, #0
	bne _022F0A04
	ldr r1, _022F0B1C ; =ov00_02327744
	mov r0, sl
	ldr r1, [r1]
	blx r1
	ldr r1, _022F0B1C ; =ov00_02327744
	mov r0, sb
	ldr r1, [r1]
	blx r1
	ldr r1, _022F0B1C ; =ov00_02327744
	mov r0, r8
	ldr r1, [r1]
	blx r1
	add sp, sp, #0x1c
	mov r0, r6
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
_022F0A04:
	ldr r0, [sp, #8]
	ldr r1, _022F0B24 ; =ov00_0231A5E4
	mov r2, sb
	bl ov00_022F1678
	cmp r0, #0
	beq _022F0AC0
	ldr r0, [sp, #8]
	ldr r1, _022F0B28 ; =ov00_0231A5EC
	mov r2, sl
	bl ov00_022F1678
	cmp r0, #0
	beq _022F0AC0
	ldr r0, [sp, #0xc]
	mov r1, #2
	str r1, [r0, #4]
	ldr r0, [sp, #0xc]
	str r5, [r0, #0x10]
	ldr r0, [sp, #0xc]
	str sb, [r0, #0x1c]
	ldr r0, [sp, #0xc]
	str sl, [r0, #0x20]
	ldr r0, [sp, #0xc]
	str r4, [r0, #0x14]
	ldr r0, [sp, #0xc]
	str r8, [r0, #0x18]
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #8]
	bl ov00_022F078C
	cmp r0, #0
	addne sp, sp, #0x1c
	movne r0, #1
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	ldr r1, _022F0B1C ; =ov00_02327744
	mov r0, sl
	ldr r1, [r1]
	blx r1
	ldr r1, _022F0B1C ; =ov00_02327744
	mov r0, sb
	ldr r1, [r1]
	blx r1
	ldr r1, _022F0B1C ; =ov00_02327744
	mov r0, r8
	ldr r1, [r1]
	blx r1
	add sp, sp, #0x1c
	mov r0, r6
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
_022F0AC0:
	ldr r1, _022F0B1C ; =ov00_02327744
	mov r0, sl
	ldr r1, [r1]
	blx r1
	ldr r1, _022F0B1C ; =ov00_02327744
	mov r0, sb
	ldr r1, [r1]
	blx r1
	ldr r1, _022F0B1C ; =ov00_02327744
	mov r0, r8
	ldr r1, [r1]
	blx r1
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #8]
	bl ov00_022F03B8
	ldr r0, _022F0B18 ; =ov00_02327740
	mov r1, #1
	str r1, [r0]
	mov r0, #0
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022F0B14: .word ov00_02327730
_022F0B18: .word ov00_02327740
_022F0B1C: .word ov00_02327744
_022F0B20: .word ov00_02318308
_022F0B24: .word ov00_0231A5E4
_022F0B28: .word ov00_0231A5EC
	arm_func_end ov00_022F0868

	arm_func_start ov00_022F0B2C
ov00_022F0B2C: ; 0x022F0B2C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x10
	mov sb, r0
	ldr r4, [sb, #0xac]
	mov r8, r1
	mov r7, r3
	cmp r2, r4
	bhs _022F0B64
	ldr r0, _022F0CDC ; =ov00_02327740
	mov r1, #7
	str r1, [r0]
	add sp, sp, #0x10
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F0B64:
	bl ov00_022F114C
	mov r4, r0
	cmp r4, #0x20
	ble _022F0B8C
	ldr r0, _022F0CDC ; =ov00_02327740
	mov r1, #7
	str r1, [r0]
	add sp, sp, #0x10
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F0B8C:
	cmp r4, #0
	movle r6, #0
	ble _022F0BA0
	bl ov00_022EFA00
	mov r6, r0
_022F0BA0:
	ldr r1, _022F0CE0 ; =ov00_02327730
	add r0, r6, #1
	ldr r2, [r1]
	mov r1, #4
	blx r2
	movs r5, r0
	bne _022F0BD4
	ldr r0, _022F0CDC ; =ov00_02327740
	mov r1, #1
	str r1, [r0]
	add sp, sp, #0x10
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F0BD4:
	ldr r1, [sb, #0xac]
	ldr r2, _022F0CE4 ; =ov00_02318314
	str r1, [sp]
	add r0, sp, #0xc
	add r1, sp, #8
	mov r3, r8
	str r7, [sp, #4]
	bl ov00_022F03E4
	cmp r0, #0
	bne _022F0C18
	ldr r1, _022F0CE8 ; =ov00_02327744
	mov r0, r5
	ldr r1, [r1]
	blx r1
	add sp, sp, #0x10
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F0C18:
	cmp r6, #0
	ble _022F0C50
	mov r0, r5
	mov r1, sb
	mov r2, r4
	bl ov00_022EFA1C
	mov r1, #0
	strb r1, [r5, r0]
	ldr r0, [sp, #8]
	ldr r1, _022F0CEC ; =ov00_0231A5F0
	mov r2, r5
	bl ov00_022F1678
	cmp r0, #0
	beq _022F0CA8
_022F0C50:
	ldr r0, [sp, #0xc]
	mov r1, #3
	str r1, [r0, #4]
	ldr r0, [sp, #0xc]
	str r5, [r0, #0x10]
	ldr r1, [sb, #0xac]
	ldr r0, [sp, #0xc]
	str r1, [r0, #0x14]
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #8]
	bl ov00_022F078C
	cmp r0, #0
	addne sp, sp, #0x10
	movne r0, #1
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	ldr r1, _022F0CE8 ; =ov00_02327744
	mov r0, r5
	ldr r1, [r1]
	blx r1
	add sp, sp, #0x10
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F0CA8:
	ldr r0, [sp, #0xc]
	ldr r1, [sp, #8]
	bl ov00_022F03B8
	ldr r1, _022F0CE8 ; =ov00_02327744
	mov r0, r5
	ldr r1, [r1]
	blx r1
	ldr r0, _022F0CDC ; =ov00_02327740
	mov r1, #1
	str r1, [r0]
	mov r0, #0
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022F0CDC: .word ov00_02327740
_022F0CE0: .word ov00_02327730
_022F0CE4: .word ov00_02318314
_022F0CE8: .word ov00_02327744
_022F0CEC: .word ov00_0231A5F0
	arm_func_end ov00_022F0B2C

	arm_func_start ov00_022F0CF0
ov00_022F0CF0: ; 0x022F0CF0
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #4
	mov r4, r1
	add r1, sp, #0
	bl ov00_022F2968
	movs r1, r0
	bmi _022F0D38
	ldr r0, [sp]
	bl ov00_022F1190
	ldr r1, [r4, #0x10]
	add sp, sp, #4
	str r0, [r1]
	ldr r0, [r4, #0x10]
	ldr r0, [r0]
	cmp r0, #0
	movge r0, #1
	movlt r0, #0
	ldmia sp!, {r3, r4, pc}
_022F0D38:
	mov r0, #0
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
	arm_func_end ov00_022F0CF0

	arm_func_start ov00_022F0D44
ov00_022F0D44: ; 0x022F0D44
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #4
	mov r4, r1
	add r1, sp, #0
	bl ov00_022F2968
	ldr r1, [r4, #0x14]
	cmp r0, r1
	moveq r0, #1
	movne r0, #0
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
	arm_func_end ov00_022F0D44

	arm_func_start ov00_022F0D70
ov00_022F0D70: ; 0x022F0D70
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x18
	ldr r2, [r1, #0x14]
	str r1, [sp]
	mov r1, #0xb0
	mul r1, r2, r1
	mov r4, r0
	ldr r0, [sp]
	mov r2, #0
	ldr r0, [r0, #0x10]
	str r2, [sp, #4]
	bl ov00_022F1164
	ldr r1, _022F0FF0 ; =ov00_0231A5FC
	add r2, sp, #0x10
	mov r0, r4
	bl ov00_022F2864
	cmp r0, #0
	ble _022F0DD8
	ldr r1, [sp, #0x10]
	ldrsb r0, [r1]
	cmp r0, #0x30
	ldreqsb r0, [r1, #1]
	cmpeq r0, #0
	addeq sp, sp, #0x18
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022F0DD8:
	add r1, sp, #0x14
	mov r0, r4
	bl ov00_022F2968
	mov r4, r0
	cmp r4, #0
	ble _022F0FE4
	ldr r0, [sp]
	mov r5, #0
	ldr r0, [r0, #0x14]
	str r5, [sp, #0xc]
	cmp r0, #0
	ble _022F0FE4
	str r5, [sp, #8]
_022F0E0C:
	cmp r5, r4
	movge r0, #1
	strge r0, [sp, #4]
	bge _022F0FE4
	ldr r0, [sp]
	mov r6, #0
	ldr r1, [r0, #0x10]
	ldr r0, [sp, #8]
	mov r7, r5
	mov r2, r6
	str r6, [sp, #4]
	cmp r5, r4
	add r8, r1, r0
	bge _022F0FBC
	mov sl, r6
	mov fp, #1
_022F0E4C:
	ldr r3, [sp, #0x14]
	ldrsb r0, [r3, r5]
	cmp r0, #0xd
	moveq r2, fp
	beq _022F0FB0
	cmp r2, #0
	beq _022F0EB8
	cmp r0, #0xa
	bne _022F0FAC
	cmp r6, #5
	bne _022F0E9C
	sub r0, r5, #1
	sub r1, r0, r7
	cmp r1, #8
	bgt _022F0FE4
	add r0, r3, r7
	bl ov00_022F1190
	cmp r0, #0
	blt _022F0FE4
	str r0, [r8, #0xac]
_022F0E9C:
	cmp r6, #5
	movge r0, #1
	strge r0, [sp, #4]
	movlt r0, #0
	add r5, r5, #1
	strlt r0, [sp, #4]
	b _022F0FBC
_022F0EB8:
	cmp r0, #9
	bne _022F0FAC
	cmp r6, #5
	addls pc, pc, r6, lsl #2
	b _022F0FA4
_022F0ECC: ; jump table
	b _022F0EE4 ; case 0
	b _022F0F00 ; case 1
	b _022F0F30 ; case 2
	b _022F0F4C ; case 3
	b _022F0F68 ; case 4
	b _022F0F84 ; case 5
_022F0EE4:
	sub r2, r5, r7
	cmp r2, #0x20
	bhi _022F0FE4
	add r1, r3, r7
	mov r0, r8
	bl ov00_022F1178
	b _022F0FA4
_022F0F00:
	sub sb, r5, r7
	mov r0, sb
	bl ov00_022EF9F4
	cmp r0, #0x66
	bhi _022F0FE4
	ldr r0, [sp, #0x14]
	mov r2, sb
	add r1, r0, r7
	add r0, r8, #0x22
	bl ov00_022EFB14
	strh sl, [r8, #0x86]
	b _022F0FA4
_022F0F30:
	sub r2, r5, r7
	cmp r2, #0xa
	bhi _022F0FE4
	add r1, r3, r7
	add r0, r8, #0x88
	bl ov00_022F1178
	b _022F0FA4
_022F0F4C:
	sub r2, r5, r7
	cmp r2, #0xa
	bhi _022F0FE4
	add r1, r3, r7
	add r0, r8, #0x93
	bl ov00_022F1178
	b _022F0FA4
_022F0F68:
	sub r2, r5, r7
	cmp r2, #0xa
	bhi _022F0FE4
	add r1, r3, r7
	add r0, r8, #0x9e
	bl ov00_022F1178
	b _022F0FA4
_022F0F84:
	sub r1, r5, r7
	cmp r1, #8
	bgt _022F0FE4
	add r0, r3, r7
	bl ov00_022F1190
	cmp r0, #0
	blt _022F0FE4
	str r0, [r8, #0xac]
_022F0FA4:
	add r6, r6, #1
	add r7, r5, #1
_022F0FAC:
	mov r2, #0
_022F0FB0:
	add r5, r5, #1
	cmp r5, r4
	blt _022F0E4C
_022F0FBC:
	ldr r0, [sp]
	ldr r1, [r0, #0x14]
	ldr r0, [sp, #0xc]
	add r0, r0, #1
	str r0, [sp, #0xc]
	cmp r0, r1
	ldr r0, [sp, #8]
	add r0, r0, #0xb0
	str r0, [sp, #8]
	blt _022F0E0C
_022F0FE4:
	ldr r0, [sp, #4]
	add sp, sp, #0x18
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022F0FF0: .word ov00_0231A5FC
	arm_func_end ov00_022F0D70

	arm_func_start ov00_022F0FF4
ov00_022F0FF4: ; 0x022F0FF4
	stmdb sp!, {r3, lr}
	ldr r0, _022F1008 ; =ov00_02327928
	bl OS_InitMutex
	mov r0, #1
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F1008: .word ov00_02327928
	arm_func_end ov00_022F0FF4

	arm_func_start ov00_022F100C
ov00_022F100C: ; 0x022F100C
	bx lr
	arm_func_end ov00_022F100C

	arm_func_start ov00_022F1010
ov00_022F1010: ; 0x022F1010
	ldr ip, _022F101C ; =sub_0207A048
	ldr r0, _022F1020 ; =ov00_02327928
	bx ip
	.align 2, 0
_022F101C: .word sub_0207A048
_022F1020: .word ov00_02327928
	arm_func_end ov00_022F1010

	arm_func_start ov00_022F1024
ov00_022F1024: ; 0x022F1024
	ldr ip, _022F1030 ; =sub_0207A0CC
	ldr r0, _022F1034 ; =ov00_02327928
	bx ip
	.align 2, 0
_022F1030: .word sub_0207A0CC
_022F1034: .word ov00_02327928
	arm_func_end ov00_022F1024

	arm_func_start ov00_022F1038
ov00_022F1038: ; 0x022F1038
	stmdb sp!, {r3, lr}
	ldr r0, _022F1058 ; =ov00_02327910
	bl OS_InitMutex
	ldr r0, _022F105C ; =ov00_0232790C
	mov r1, #0
	str r1, [r0]
	mov r0, #1
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F1058: .word ov00_02327910
_022F105C: .word ov00_0232790C
	arm_func_end ov00_022F1038

	arm_func_start ov00_022F1060
ov00_022F1060: ; 0x022F1060
	bx lr
	arm_func_end ov00_022F1060

	arm_func_start ov00_022F1064
ov00_022F1064: ; 0x022F1064
	stmdb sp!, {r4, lr}
	ldr r0, _022F10A4 ; =ov00_02327910
	bl sub_0207A048
	ldr r0, _022F10A8 ; =ov00_0232790C
	ldr r0, [r0]
	cmp r0, #0
	moveq r4, #1
	movne r4, #0
	cmp r4, #0
	ldrne r0, _022F10A8 ; =ov00_0232790C
	movne r1, #1
	strne r1, [r0]
	ldr r0, _022F10A4 ; =ov00_02327910
	bl sub_0207A0CC
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F10A4: .word ov00_02327910
_022F10A8: .word ov00_0232790C
	arm_func_end ov00_022F1064

	arm_func_start ov00_022F10AC
ov00_022F10AC: ; 0x022F10AC
	stmdb sp!, {r3, lr}
	ldr r0, _022F10D0 ; =ov00_02327910
	bl sub_0207A048
	ldr r1, _022F10D4 ; =ov00_0232790C
	mov r2, #0
	ldr r0, _022F10D0 ; =ov00_02327910
	str r2, [r1]
	bl sub_0207A0CC
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F10D0: .word ov00_02327910
_022F10D4: .word ov00_0232790C
	arm_func_end ov00_022F10AC

	arm_func_start ov00_022F10D8
ov00_022F10D8: ; 0x022F10D8
	ldr ip, _022F10E8 ; =sub_02079DE0
	mov r1, #0
	mov r2, r1
	bx ip
	.align 2, 0
_022F10E8: .word sub_02079DE0
	arm_func_end ov00_022F10D8

	arm_func_start ov00_022F10EC
ov00_022F10EC: ; 0x022F10EC
	stmdb sp!, {r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x14
	mov sb, r0
	add r0, sp, #0
	bl sub_0207B9EC
	mov r6, #0
	add r7, sp, #0
	mov r8, r6
	add r5, sp, #6
	mov r4, #2
_022F1114:
	ldrb r1, [r7], #1
	mov r2, r4
	add r0, r5, r8
	bl ov00_022F1280
	add r6, r6, #1
	cmp r6, #6
	add r8, r8, #2
	blt _022F1114
	add r1, sp, #6
	mov r0, sb
	mov r2, #0xc
	bl ov00_022EFA1C
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022F10EC

	arm_func_start ov00_022F114C
ov00_022F114C: ; 0x022F114C
	ldr ip, _022F1154 ; =sub_020852A4
	bx ip
	.align 2, 0
_022F1154: .word sub_020852A4
	arm_func_end ov00_022F114C

	arm_func_start ov00_022F1158
ov00_022F1158: ; 0x022F1158
	ldr ip, _022F1160 ; =sub_020852F8
	bx ip
	.align 2, 0
_022F1160: .word sub_020852F8
	arm_func_end ov00_022F1158

	arm_func_start ov00_022F1164
ov00_022F1164: ; 0x022F1164
	ldr ip, _022F1174 ; =MemsetFast
	mov r2, r1
	mov r1, #0
	bx ip
	.align 2, 0
_022F1174: .word MemsetFast
	arm_func_end ov00_022F1164

	arm_func_start ov00_022F1178
ov00_022F1178: ; 0x022F1178
	ldr ip, _022F118C ; =MemcpyFast
	mov r3, r0
	mov r0, r1
	mov r1, r3
	bx ip
	.align 2, 0
_022F118C: .word MemcpyFast
	arm_func_end ov00_022F1178

	arm_func_start ov00_022F1190
ov00_022F1190: ; 0x022F1190
	ldr ip, _022F1198 ; =ov00_022F43BC
	bx ip
	.align 2, 0
_022F1198: .word ov00_022F43BC
	arm_func_end ov00_022F1190

	arm_func_start ov00_022F119C
ov00_022F119C: ; 0x022F119C
	ldr ip, _022F11A4 ; =ov00_022F4454
	bx ip
	.align 2, 0
_022F11A4: .word ov00_022F4454
	arm_func_end ov00_022F119C

	arm_func_start ov00_022F11A8
ov00_022F11A8: ; 0x022F11A8
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov r8, r2
	ldr r4, _022F1274 ; =0x01634578
	ldr r2, _022F1278 ; =0x5D8A0000
	mov sb, r1
	cmp r8, r4
	mov sl, r0
	mov fp, r3
	mov r5, #0
	cmpeq sb, r2
	subhs r0, r5, #1
	ldmhsia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r4, r5
	mov r0, r5
_022F11E0:
	ldr r1, _022F127C ; =ov00_02318324
	add r1, r1, r4, lsl #3
	ldr r6, [r1, #4]
	ldr r1, _022F127C ; =ov00_02318324
	cmp r8, r6
	ldr r7, [r1, r4, lsl #3]
	cmpeq sb, r7
	blo _022F1238
	mov r0, sb
	mov r1, r8
	mov r2, r7
	mov r3, r6
	bl _ll_udiv
	umull r3, r2, r0, r7
	mla r2, r0, r6, r2
	add r0, r0, #0x30
	strb r0, [sl, r5]
	subs sb, sb, r3
	sbc r8, r8, r2
	mov r0, #1
	add r5, r5, #1
	b _022F1258
_022F1238:
	cmp r0, #0
	bne _022F124C
	rsb r1, r4, #0x11
	cmp r1, fp
	bgt _022F1258
_022F124C:
	mov r1, #0x30
	strb r1, [sl, r5]
	add r5, r5, #1
_022F1258:
	add r4, r4, #1
	cmp r4, #0x10
	blt _022F11E0
	adds r0, sb, #0x30
	strb r0, [sl, r5]
	add r0, r5, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022F1274: .word 0x01634578
_022F1278: .word 0x5D8A0000
_022F127C: .word ov00_02318324
	arm_func_end ov00_022F11A8

	arm_func_start ov00_022F1280
ov00_022F1280: ; 0x022F1280
	stmdb sp!, {r3, lr}
	mov lr, #0
	cmp r2, #8
	subgt r0, lr, #1
	ldmgtia sp!, {r3, pc}
	cmp r2, #1
	mov ip, #1
	blt _022F12D0
_022F12A0:
	sub r3, r2, ip
	mov r3, r3, lsl #2
	mov r3, r1, lsr r3
	and r3, r3, #0xf
	cmp r3, #0xa
	addlo r3, r3, #0x30
	addhs r3, r3, #0x57
	add ip, ip, #1
	strb r3, [r0, lr]
	add lr, lr, #1
	cmp ip, r2
	ble _022F12A0
_022F12D0:
	mov r0, lr
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F1280

	arm_func_start ov00_022F12D8
ov00_022F12D8: ; 0x022F12D8
	stmdb sp!, {r4, lr}
	ldr r3, _022F139C ; =ov00_02327940
	mov ip, #0
	str r0, [r3, #8]
	str r1, [r3, #0xc]
	str ip, [r3, #4]
	str ip, [r3, #0x1c]
	str ip, [r3, #0x20]
	str ip, [r3, #0x10]
	mov r4, r2
	str ip, [r3, #0x14]
	bl ov00_022F18F8
	cmp r0, #0
	bne _022F1324
	ldr r0, _022F139C ; =ov00_02327940
	mov r1, #9
	str r1, [r0, #4]
	mov r0, #0
	ldmia sp!, {r4, pc}
_022F1324:
	ldr r1, _022F139C ; =ov00_02327940
	mov r0, #0x2000
	ldr r2, [r1, #8]
	mov r1, #8
	blx r2
	movs r1, r0
	ldr r0, _022F139C ; =ov00_02327940
	str r1, [r0, #0x18]
	bne _022F135C
	mov r1, #1
	str r1, [r0, #4]
	bl ov00_022F1910
	mov r0, #0
	ldmia sp!, {r4, pc}
_022F135C:
	mov r0, r4
	bl ov00_022F193C
	cmp r0, #0
	ldrne r1, _022F139C ; =ov00_02327940
	movne r0, #1
	strne r0, [r1]
	ldmneia sp!, {r4, pc}
	ldr r1, _022F139C ; =ov00_02327940
	mov r0, #9
	str r0, [r1, #4]
	ldr r0, [r1, #0x18]
	ldr r1, [r1, #0xc]
	blx r1
	bl ov00_022F1910
	mov r0, #0
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F139C: .word ov00_02327940
	arm_func_end ov00_022F12D8

	arm_func_start ov00_022F13A0
ov00_022F13A0: ; 0x022F13A0
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	mov r2, r0
	mov ip, #0x800
	ldr r0, _022F13DC ; =ov00_02327964
	ldr r1, _022F13E0 ; =ov00_022F13E8
	ldr r3, _022F13E4 ; =ov00_02328224
	str ip, [sp]
	mov ip, #0x10
	str ip, [sp, #4]
	bl StartThread
	ldr r0, _022F13DC ; =ov00_02327964
	bl OS_WakeupThreadDirect
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F13DC: .word ov00_02327964
_022F13E0: .word ov00_022F13E8
_022F13E4: .word ov00_02328224
	arm_func_end ov00_022F13A0

	arm_func_start ov00_022F13E8
ov00_022F13E8: ; 0x022F13E8
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022F25F4
	bl ov00_022F19B4
	ldr r1, _022F1420 ; =ov00_02327940
	ldr r0, [r1, #0x18]
	ldr r1, [r1, #0xc]
	blx r1
	bl ov00_022F1910
	ldr r0, _022F1420 ; =ov00_02327940
	mov r1, #0
	str r1, [r0]
	blx r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F1420: .word ov00_02327940
	arm_func_end ov00_022F13E8

	arm_func_start ov00_022F1424
ov00_022F1424: ; 0x022F1424
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	mov sb, r0
	ldr sl, [sb]
	mov r8, r1
	mov r7, r2
	mov r6, r3
	cmp sl, #0
	mov r4, #0
	beq _022F14A0
	ldr r1, [sl, #8]
	mov r0, r8
	mov r5, sl
	bl ov00_022F4510
	cmp r0, #0
	beq _022F149C
	ldr r5, [sl, #4]
	ldr r0, [sb]
	cmp r5, r0
	beq _022F14A0
_022F1470:
	ldr r1, [r5, #8]
	mov r0, r8
	bl ov00_022F4510
	cmp r0, #0
	moveq r4, #1
	beq _022F14A0
	ldr r5, [r5, #4]
	ldr r0, [sb]
	cmp r5, r0
	bne _022F1470
	b _022F14A0
_022F149C:
	mov r4, #1
_022F14A0:
	cmp r4, #0
	strne r7, [r5, #0xc]
	bne _022F152C
	ldr r1, _022F1534 ; =ov00_02327948
	mov r0, r6
	ldr r2, [r1]
	mov r1, #4
	blx r2
	cmp r0, #0
	bne _022F14DC
	ldr r0, _022F1538 ; =ov00_02327944
	mov r1, #1
	str r1, [r0]
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022F14DC:
	str r8, [r0, #8]
	str r7, [r0, #0xc]
	mov r1, #0
	str r1, [r0, #0x10]
	str r1, [r0, #0x14]
	ldr r1, [sb]
	cmp r1, #0
	streq r0, [r0, #4]
	streq r0, [r0]
	streq r0, [sb]
	beq _022F152C
	ldr r1, [r1]
	str r1, [r0]
	ldr r1, [sb]
	str r1, [r0, #4]
	ldr r1, [sb]
	ldr r1, [r1]
	str r0, [r1, #4]
	ldr r1, [sb]
	str r0, [r1]
_022F152C:
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022F1534: .word ov00_02327948
_022F1538: .word ov00_02327944
	arm_func_end ov00_022F1424

	arm_func_start ov00_022F153C
ov00_022F153C: ; 0x022F153C
	ldr r3, [r0]
	cmp r3, #0
	beq _022F1578
	ldr r2, [r3]
	cmp r3, r2
	moveq r1, #0
	streq r1, [r0]
	beq _022F1578
	ldr r1, [r3, #4]
	str r1, [r2, #4]
	ldr r2, [r3]
	ldr r1, [r3, #4]
	str r2, [r1]
	ldr r1, [r3, #4]
	str r1, [r0]
_022F1578:
	mov r0, r3
	bx lr
	arm_func_end ov00_022F153C

	arm_func_start ov00_022F1580
ov00_022F1580: ; 0x022F1580
	add r0, r0, #1
	and r0, r0, #0xff
	cmp r0, #0x7b
	moveq r0, #0x30
	beq _022F15A8
	cmp r0, #0x5b
	moveq r0, #0x61
	beq _022F15A8
	cmp r0, #0x3a
	moveq r0, #0x41
_022F15A8:
	mov r0, r0, lsl #0x18
	mov r0, r0, asr #0x18
	bx lr
	arm_func_end ov00_022F1580

	arm_func_start ov00_022F15B4
ov00_022F15B4: ; 0x022F15B4
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov sl, r0
	mov sb, r1
	mov r8, r2
	mov r0, sb
	mov r1, r8
	add r2, sl, #0x46
	mov r3, #0x12
	bl ov00_022F4604
	cmp r0, #0
	movlt r0, #1
	ldmltia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r6, _022F1650 ; =ov00_023183B7
	mov fp, #0x13
	mov r4, #0x12
_022F15F0:
	add r7, sl, fp
	ldrsb r5, [r7, #0x44]
_022F15F8:
	and r0, r5, #0xff
	bl ov00_022F1580
	mov r5, r0
	strb r5, [r7, #0x44]
	ldrsb r0, [r6]
	cmp r5, r0
	beq _022F1638
	mov r0, sb
	mov r1, r8
	mov r3, r4
	add r2, sl, #0x46
	bl ov00_022F4604
	cmp r0, #0
	bge _022F15F8
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022F1638:
	sub fp, fp, #1
	cmp fp, #2
	sub r6, r6, #1
	bge _022F15F0
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022F1650: .word ov00_023183B7
	arm_func_end ov00_022F15B4

	arm_func_start ov00_022F1654
ov00_022F1654: ; 0x022F1654
	stmdb sp!, {r3, lr}
	ldr r3, [r0]
	cmp r3, #0
	movne r0, #0
	ldmneia sp!, {r3, pc}
	add r0, r0, #0x34
	mov r3, #0x18
	bl ov00_022F1424
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F1654

	arm_func_start ov00_022F1678
ov00_022F1678: ; 0x022F1678
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r8, r0
	ldr r0, [r8]
	mov r7, r1
	mov r6, r2
	mov r5, #0
	cmp r0, #0
	movne r0, r5
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	mov r0, r6
	bl ov00_022F2C28
	mov r4, r0
	mov r0, r8
	mov r1, r6
	mov r2, r4
	bl ov00_022F15B4
	cmp r0, #0
	beq _022F16E4
	mov r1, r7
	mov r2, r6
	add r0, r8, #0x38
	mov r3, #0x18
	bl ov00_022F1424
	movs r5, r0
	ldrne r0, [r8, #0x38]
	ldrne r0, [r0]
	strne r4, [r0, #0x10]
_022F16E4:
	mov r0, r5
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022F1678

	arm_func_start ov00_022F16EC
ov00_022F16EC: ; 0x022F16EC
	ldr r3, [r0]
	cmp r3, #0
	movne r0, #0
	streq r1, [r0, #0x1c]
	streq r2, [r0, #0x18]
	moveq r0, #1
	bx lr
	arm_func_end ov00_022F16EC

	arm_func_start ov00_022F1708
ov00_022F1708: ; 0x022F1708
	stmdb sp!, {r3, r4, r5, lr}
	ldr r1, _022F17B0 ; =ov00_02327948
	mov r4, r0
	ldr r2, [r1]
	mov r0, #0x14
	mov r1, #4
	mvn r5, #0
	blx r2
	cmp r0, #0
	beq _022F17A8
	ldr r1, _022F17B4 ; =ov00_02327960
	ldr r2, [r1]
	cmp r2, #0
	streq r0, [r0]
	streq r0, [r0, #4]
	streq r0, [r1]
	beq _022F1770
	ldr r2, [r2]
	str r2, [r0]
	ldr r2, [r1]
	str r2, [r0, #4]
	ldr r2, [r1]
	ldr r2, [r2]
	str r0, [r2, #4]
	ldr r1, [r1]
	str r0, [r1]
_022F1770:
	ldr r1, _022F17B8 ; =ov00_0232795C
	mvn r2, #0
	ldr ip, [r1]
	ldr r3, [r1]
	add r3, r3, #1
	str r3, [r1]
	str ip, [r0, #8]
	str r4, [r0, #0xc]
	str r2, [r0, #0x10]
	ldr r2, [r1]
	ldr r5, [r0, #8]
	cmp r2, #0
	movlt r0, #0
	strlt r0, [r1]
_022F17A8:
	mov r0, r5
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022F17B0: .word ov00_02327948
_022F17B4: .word ov00_02327960
_022F17B8: .word ov00_0232795C
	arm_func_end ov00_022F1708

	arm_func_start ov00_022F17BC
ov00_022F17BC: ; 0x022F17BC
	ldr r1, _022F1810 ; =ov00_02327960
	mov r2, #0
	ldr r3, [r1]
	cmp r3, #0
	beq _022F1808
	ldr r1, [r3, #8]
	cmp r1, r0
	moveq r2, r3
	beq _022F1808
	ldr ip, [r3, #4]
	cmp ip, r3
	beq _022F1808
_022F17EC:
	ldr r1, [ip, #8]
	cmp r1, r0
	moveq r2, ip
	beq _022F1808
	ldr ip, [ip, #4]
	cmp ip, r3
	bne _022F17EC
_022F1808:
	mov r0, r2
	bx lr
	.align 2, 0
_022F1810: .word ov00_02327960
	arm_func_end ov00_022F17BC

	arm_func_start ov00_022F1814
ov00_022F1814: ; 0x022F1814
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r5, #0
	bl ov00_022F17BC
	movs r4, r0
	beq _022F18A4
	ldr r0, _022F18AC ; =ov00_02327960
	ldr r2, [r0]
	ldr r1, [r2]
	cmp r2, r1
	beq _022F1864
	ldmia r4, {r1, r2}
	str r2, [r1, #4]
	ldr r2, [r4]
	ldr r1, [r4, #4]
	str r2, [r1]
	ldr r1, [r0]
	cmp r1, r4
	ldreq r1, [r4, #4]
	streq r1, [r0]
	b _022F186C
_022F1864:
	mov r1, r5
	str r1, [r0]
_022F186C:
	ldr r0, [r4, #0xc]
	ldr r5, [r0, #0x3c]
	ldr r6, [r0, #0x30]
	ldr r7, [r0, #0x2c]
	bl ov00_022F2474
	ldr r1, _022F18B0 ; =ov00_0232794C
	mov r0, r4
	ldr r1, [r1]
	blx r1
	mov r1, r6
	mov r2, r7
	mov r0, #8
	blx r5
	mov r5, #1
_022F18A4:
	mov r0, r5
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022F18AC: .word ov00_02327960
_022F18B0: .word ov00_0232794C
	arm_func_end ov00_022F1814

	arm_func_start ov00_022F18B4
ov00_022F18B4: ; 0x022F18B4
	stmdb sp!, {r4, lr}
	ldr r4, _022F18E0 ; =ov00_02327960
	ldr r0, [r4]
	cmp r0, #0
	ldmeqia sp!, {r4, pc}
_022F18C8:
	ldr r0, [r0, #8]
	bl ov00_022F1814
	ldr r0, [r4]
	cmp r0, #0
	bne _022F18C8
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F18E0: .word ov00_02327960
	arm_func_end ov00_022F18B4

	arm_func_start ov00_022F18E4
ov00_022F18E4: ; 0x022F18E4
	ldr ip, _022F18F0 ; =ov00_022F153C
	ldr r0, _022F18F4 ; =ov00_02327960
	bx ip
	.align 2, 0
_022F18F0: .word ov00_022F153C
_022F18F4: .word ov00_02327960
	arm_func_end ov00_022F18E4

	arm_func_start ov00_022F18F8
ov00_022F18F8: ; 0x022F18F8
	stmdb sp!, {r3, lr}
	ldr r0, _022F190C ; =ov00_02328228
	bl OS_InitMutex
	mov r0, #1
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F190C: .word ov00_02328228
	arm_func_end ov00_022F18F8

	arm_func_start ov00_022F1910
ov00_022F1910: ; 0x022F1910
	bx lr
	arm_func_end ov00_022F1910

	arm_func_start ov00_022F1914
ov00_022F1914: ; 0x022F1914
	ldr ip, _022F1920 ; =sub_0207A048
	ldr r0, _022F1924 ; =ov00_02328228
	bx ip
	.align 2, 0
_022F1920: .word sub_0207A048
_022F1924: .word ov00_02328228
	arm_func_end ov00_022F1914

	arm_func_start ov00_022F1928
ov00_022F1928: ; 0x022F1928
	ldr ip, _022F1934 ; =sub_0207A0CC
	ldr r0, _022F1938 ; =ov00_02328228
	bx ip
	.align 2, 0
_022F1934: .word sub_0207A0CC
_022F1938: .word ov00_02328228
	arm_func_end ov00_022F1928

	arm_func_start ov00_022F193C
ov00_022F193C: ; 0x022F193C
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #8
	mov r5, r0
	mov r4, r1
	bl sub_02079550
	cmp r0, #0
	addeq sp, sp, #8
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r0, _022F19A4 ; =ov00_02328240
	ldr r1, _022F19A8 ; =ov00_02328224
	mov r2, #1
	bl sub_02079DB8
	mov r0, #0x2000
	str r0, [sp]
	ldr r0, _022F19AC ; =ov00_02328260
	ldr r1, _022F19B0 ; =ov00_022F2EDC
	add r3, r4, #0x2000
	mov r2, #0
	str r5, [sp, #4]
	bl StartThread
	ldr r0, _022F19AC ; =ov00_02328260
	bl OS_WakeupThreadDirect
	mov r0, #1
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022F19A4: .word ov00_02328240
_022F19A8: .word ov00_02328224
_022F19AC: .word ov00_02328260
_022F19B0: .word ov00_022F2EDC
	arm_func_end ov00_022F193C

	arm_func_start ov00_022F19B4
ov00_022F19B4: ; 0x022F19B4
	stmdb sp!, {r3, lr}
	ldr r0, _022F19D4 ; =ov00_02327954
	mov r1, #1
	str r1, [r0]
	bl ov00_022F19F8
	ldr r0, _022F19D8 ; =ov00_02328260
	bl sub_02079800
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F19D4: .word ov00_02327954
_022F19D8: .word ov00_02328260
	arm_func_end ov00_022F19B4

	arm_func_start ov00_022F19DC
ov00_022F19DC: ; 0x022F19DC
	stmdb sp!, {r3, lr}
	ldr r0, _022F19F4 ; =ov00_02328240
	add r1, sp, #0
	mov r2, #1
	bl sub_02079E74
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F19F4: .word ov00_02328240
	arm_func_end ov00_022F19DC

	arm_func_start ov00_022F19F8
ov00_022F19F8: ; 0x022F19F8
	ldr ip, _022F1A0C ; =sub_02079DE0
	mov r1, #0
	ldr r0, _022F1A10 ; =ov00_02328240
	mov r2, r1
	bx ip
	.align 2, 0
_022F1A0C: .word sub_02079DE0
_022F1A10: .word ov00_02328240
	arm_func_end ov00_022F19F8

	arm_func_start ov00_022F1A14
ov00_022F1A14: ; 0x022F1A14
	stmdb sp!, {r3, lr}
	cmp r1, #0x400
	bge _022F1A30
	mov r0, #0
	str r0, [r2]
	str r1, [r3]
	ldmia sp!, {r3, pc}
_022F1A30:
	sub ip, r1, #0x400
	movs ip, ip, asr #9
	sub lr, ip, #1
	ldr ip, [r0, #0x1c]
	beq _022F1A54
_022F1A44:
	cmp lr, #0
	sub lr, lr, #1
	ldr ip, [ip]
	bne _022F1A44
_022F1A54:
	ldr r0, _022F1A6C ; =0x000001FF
	sub r1, r1, #0x400
	str ip, [r2]
	and r0, r1, r0
	str r0, [r3]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F1A6C: .word 0x000001FF
	arm_func_end ov00_022F1A14

	arm_func_start ov00_022F1A70
ov00_022F1A70: ; 0x022F1A70
	ldr r3, [r1]
	cmp r3, #0
	bne _022F1AB0
	ldr r3, [r2]
	cmp r3, #0x400
	bge _022F1A9C
	add r1, r3, #1
	str r1, [r2]
	add r0, r0, r3
	ldrsb r0, [r0, #0x20]
	bx lr
_022F1A9C:
	mov r3, #0
	str r3, [r2]
	ldr r0, [r0, #0x1c]
	str r0, [r1]
	b _022F1AD0
_022F1AB0:
	ldr r0, [r2]
	cmp r0, #0x200
	bne _022F1AD0
	mov r0, #0
	str r0, [r2]
	ldr r0, [r1]
	ldr r0, [r0]
	str r0, [r1]
_022F1AD0:
	ldr r3, [r2]
	add r0, r3, #1
	str r0, [r2]
	ldr r0, [r1]
	add r0, r0, r3
	ldrsb r0, [r0, #4]
	bx lr
	arm_func_end ov00_022F1A70

	arm_func_start ov00_022F1AEC
ov00_022F1AEC: ; 0x022F1AEC
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #8
	mov r6, #0
	movs r7, r3
	mov sl, r0
	subne r0, r6, #1
	mov sb, r1
	mov r8, r2
	strne r0, [r7]
	cmp sb, r8
	bge _022F1BB0
	add r2, sp, #4
	add r3, sp, #0
	mov r0, sl
	mov r1, sb
	bl ov00_022F1A14
	cmp sb, r8
	bge _022F1BB0
	mov fp, #1
	add r5, sp, #4
	add r4, sp, #0
_022F1B40:
	mov r0, sl
	mov r1, r5
	mov r2, r4
	bl ov00_022F1A70
	cmp r0, #0x3a
	bne _022F1B6C
	cmp r7, #0
	beq _022F1B6C
	ldr r1, [r7]
	cmp r1, #0
	strlt sb, [r7]
_022F1B6C:
	cmp r6, #0
	bne _022F1B80
	cmp r0, #0xd
	moveq r6, fp
	b _022F1BA4
_022F1B80:
	cmp r0, #0xa
	bne _022F1BA0
	sub r0, r8, #1
	cmp sb, r0
	moveq r0, #0
	add sp, sp, #8
	addne r0, sb, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022F1BA0:
	mov r6, #0
_022F1BA4:
	add sb, sb, #1
	cmp sb, r8
	blt _022F1B40
_022F1BB0:
	mvn r0, #0
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022F1AEC

	arm_func_start ov00_022F1BBC
ov00_022F1BBC: ; 0x022F1BBC
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	sub sp, sp, #8
	mov r7, r1
	mov r6, r2
	mov r8, r0
	cmp r7, r6
	bge _022F1C20
	add r2, sp, #4
	add r3, sp, #0
	bl ov00_022F1A14
	cmp r7, r6
	bge _022F1C20
	add r5, sp, #4
	add r4, sp, #0
_022F1BF4:
	mov r0, r8
	mov r1, r5
	mov r2, r4
	bl ov00_022F1A70
	cmp r0, #0x20
	addne sp, sp, #8
	movne r0, r7
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	add r7, r7, #1
	cmp r7, r6
	blt _022F1BF4
_022F1C20:
	mvn r0, #0
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022F1BBC

	arm_func_start ov00_022F1C2C
ov00_022F1C2C: ; 0x022F1C2C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #8
	mov sb, r1
	mov r4, r2
	mov sl, r0
	mov r8, r3
	cmp sb, r4
	ldr r7, [sp, #0x30]
	bge _022F1CF0
	add r2, sp, #4
	add r3, sp, #0
	bl ov00_022F1A14
	add r1, sp, #4
	add r2, sp, #0
	mov r0, sl
	bl ov00_022F1A70
	sub r6, r4, #1
	add r5, sp, #4
	add r4, sp, #0
	mov fp, #0
	b _022F1CB4
_022F1C80:
	cmp r2, #0
	cmpne r2, #0x20
	cmpne r2, r7
	cmpne sb, r6
	addeq sp, sp, #8
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r0, sl
	mov r1, r5
	mov r2, r4
	bl ov00_022F1A70
	add sb, sb, #1
	add r8, r8, #1
_022F1CB4:
	ldrsb r2, [r8]
	mov r1, fp
	cmp r2, #0x41
	blt _022F1CCC
	cmp r2, #0x5a
	movle r1, #1
_022F1CCC:
	cmp r1, #0
	addne r1, r2, #0x20
	moveq r1, r2
	cmp r0, #0x41
	blt _022F1CE8
	cmp r0, #0x5a
	addle r0, r0, #0x20
_022F1CE8:
	cmp r0, r1
	beq _022F1C80
_022F1CF0:
	mvn r0, #0
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022F1C2C

	arm_func_start ov00_022F1CFC
ov00_022F1CFC: ; 0x022F1CFC
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r4, r0
	mov r7, r2
	mov r6, r3
	ldr r0, [r4]
	add r2, r7, r6
	mov r8, r1
	cmp r2, r0
	bgt _022F1DDC
	cmp r6, #0
	beq _022F1DD4
	cmp r7, #0x400
	bge _022F1D5C
	rsb r5, r7, #0x400
	cmp r6, r5
	movle r5, r6
	add r1, r4, #0x20
	mov r0, r8
	mov r2, r5
	add r1, r1, r7
	bl ov00_022F2C48
	add r7, r7, r5
	sub r6, r6, r5
	add r8, r8, r5
_022F1D5C:
	cmp r6, #0
	beq _022F1DD4
	sub r2, r7, #0x400
	ldr r0, _022F1DE4 ; =0x000001FF
	movs r1, r2, asr #9
	and r7, r2, r0
	sub r0, r1, #1
	ldr r4, [r4, #0x1c]
	beq _022F1D90
_022F1D80:
	cmp r0, #0
	sub r0, r0, #1
	ldr r4, [r4]
	bne _022F1D80
_022F1D90:
	cmp r6, #0
	beq _022F1DD4
	ldr sb, _022F1DE4 ; =0x000001FF
_022F1D9C:
	rsb r5, r7, #0x200
	cmp r6, r5
	movle r5, r6
	add r1, r4, #4
	mov r0, r8
	mov r2, r5
	add r1, r1, r7
	bl ov00_022F2C48
	add r0, r7, r5
	and r7, r0, sb
	subs r6, r6, r5
	add r8, r8, r5
	ldr r4, [r4]
	bne _022F1D9C
_022F1DD4:
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F1DDC:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022F1DE4: .word 0x000001FF
	arm_func_end ov00_022F1CFC

	arm_func_start ov00_022F1DE8
ov00_022F1DE8: ; 0x022F1DE8
	ldr r0, [r0, #0xc]
	cmp r0, r1
	movls r0, #1
	movhi r0, #0
	bx lr
	arm_func_end ov00_022F1DE8

	arm_func_start ov00_022F1DFC
ov00_022F1DFC: ; 0x022F1DFC
	stmdb sp!, {r3, lr}
	ldr ip, [r0, #0x30]
	mov lr, r2
	str r3, [sp]
	ldr r2, [ip, #0x18]
	ldr r3, [ip, #0xc]
	add r2, r2, lr
	sub r3, r3, lr
	bl ov00_022F2B00
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F1DFC

	arm_func_start ov00_022F1E24
ov00_022F1E24: ; 0x022F1E24
	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
	sub sp, sp, #4
	mov r8, r0
	ldr r4, [r8, #0x30]
	mov r6, r2
	mov r7, r1
	mov r0, r4
	mov r1, r6
	mov r5, r3
	bl ov00_022F1DE8
	cmp r0, #0
	addne sp, sp, #4
	ldrne r0, _022F1E90 ; =0xFFFFFC15
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldr r0, [r4, #0xc]
	ldr r1, [sp, #0x20]
	sub r3, r0, r6
	str r1, [sp]
	ldr r2, [r4, #0x18]
	cmp r5, r3
	movle r3, r5
	mov r0, r8
	mov r1, r7
	add r2, r2, r6
	bl ov00_022F2B00
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022F1E90: .word 0xFFFFFC15
	arm_func_end ov00_022F1E24

	arm_func_start ov00_022F1E94
ov00_022F1E94: ; 0x022F1E94
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov fp, r0
	movs r0, r1
	cmpne r0, #1
	str r1, [sp]
	mov r5, r2
	mov r4, r3
	mov r7, #0
	cmpne r0, #2
	beq _022F1ECC
	ldr r0, _022F23DC ; =ov00_02327944
	mov r1, #0xb
	str r1, [r0]
	b _022F2358
_022F1ECC:
	cmp r4, #0
	bne _022F1EE4
	ldr r0, _022F23DC ; =ov00_02327944
	mov r1, #0xb
	str r1, [r0]
	b _022F2358
_022F1EE4:
	ldr r1, _022F23E0 ; =ov00_02327948
	mov r0, #0x58
	ldr r2, [r1]
	mov r1, #4
	blx r2
	movs r7, r0
	bne _022F1F10
	ldr r0, _022F23DC ; =ov00_02327944
	mov r1, #1
	str r1, [r0]
	b _022F2358
_022F1F10:
	mov r1, #0x58
	bl ov00_022F2C34
	ldr r1, _022F23E0 ; =ov00_02327948
	mov r0, #0x420
	ldr r2, [r1]
	mov r1, #4
	blx r2
	str r0, [r7, #0x30]
	cmp r0, #0
	bne _022F1F48
	ldr r0, _022F23DC ; =ov00_02327944
	mov r1, #1
	str r1, [r0]
	b _022F2358
_022F1F48:
	mov r1, #0x420
	bl ov00_022F2C34
	ldr r1, [r7, #0x30]
	mov r0, fp
	str r5, [r1, #0x18]
	ldr r1, [r7, #0x30]
	str r4, [r1, #0xc]
	bl ov00_022F2C28
	mov r4, r0
	cmp r4, #7
	bgt _022F1F84
	ldr r0, _022F23DC ; =ov00_02327944
	mov r1, #4
	str r1, [r0]
	b _022F2358
_022F1F84:
	mov r8, #7
	mov r3, #0x50
	ldr r1, _022F23E4 ; =ov00_0231A60C
	mov r0, fp
	mov r2, r8
	str r3, [r7, #0x28]
	bl ov00_022F2BC0
	cmp r0, #0
	beq _022F1FE4
	ldr r1, _022F23E8 ; =ov00_0231A614
	mov r0, fp
	mov r2, #8
	bl ov00_022F2BC0
	cmp r0, #0
	beq _022F1FD0
	ldr r0, _022F23DC ; =ov00_02327944
	mov r1, #4
	str r1, [r0]
	b _022F2358
_022F1FD0:
	mov r0, #1
	str r0, [r7, #8]
	rsb r0, r0, #0x1bc
	str r0, [r7, #0x28]
	mov r8, #8
_022F1FE4:
	sub r4, r4, r8
	cmp r4, #0
	add r6, fp, r8
	bgt _022F2004
	ldr r0, _022F23DC ; =ov00_02327944
	mov r1, #4
	str r1, [r0]
	b _022F2358
_022F2004:
	mov r5, #0
	mov sb, r5
	mov sl, r5
	b _022F2078
_022F2014:
	cmp sl, #2
	subeq sl, sl, #1
	beq _022F2074
	cmp sl, #1
	bne _022F2068
	sub r0, r5, #1
	mov r1, #2
	add r0, r6, r0
	bl ov00_022F42D4
	mov r0, r0, lsl #0x18
	movs r0, r0, asr #0x18
	sub sl, sl, #1
	bpl _022F2058
	ldr r0, _022F23DC ; =ov00_02327944
	mov r1, #4
	str r1, [r0]
	b _022F2358
_022F2058:
	cmp r0, #0x2f
	bne _022F2074
	sub sb, sb, #1
	b _022F208C
_022F2068:
	cmp r0, #0x25
	moveq sl, #2
	addeq sb, sb, #1
_022F2074:
	add r5, r5, #1
_022F2078:
	cmp r5, r4
	bge _022F208C
	ldrsb r0, [r6, r5]
	cmp r0, #0x2f
	bne _022F2014
_022F208C:
	cmp sl, #0
	beq _022F20A4
	ldr r0, _022F23DC ; =ov00_02327944
	mov r1, #4
	str r1, [r0]
	b _022F2358
_022F20A4:
	ldr r0, _022F23E0 ; =ov00_02327948
	add r1, r8, r4
	sub r1, r1, sb, lsl #1
	ldr r2, [r0]
	add r0, r1, #1
	mov r1, #4
	blx r2
	str r0, [r7, #0x24]
	cmp r0, #0
	bne _022F20DC
	ldr r0, _022F23DC ; =ov00_02327944
	mov r1, #1
	str r1, [r0]
	b _022F2358
_022F20DC:
	mov r1, fp
	mov r2, r8
	bl ov00_022F2C48
	mov sb, #0
	mov r5, sb
	mov sl, sb
	mov fp, sb
	cmp r4, #0
	ble _022F2180
_022F2100:
	cmp sl, #2
	subeq sl, sl, #1
	beq _022F2174
	cmp sl, #1
	bne _022F214C
	sub r0, sb, #1
	add r0, r6, r0
	mov r1, #2
	bl ov00_022F42D4
	mov r0, r0, lsl #0x18
	mov r1, r0, asr #0x18
	ldr r0, [r7, #0x24]
	cmp r1, #0x2f
	add r0, r8, r0
	add r0, r5, r0
	sub sl, sl, #1
	strb r1, [r0, #-1]
	moveq fp, #1
	b _022F2174
_022F214C:
	ldrsb r1, [r6, sb]
	cmp r1, #0x2f
	moveq fp, #1
	cmp fp, #0
	cmpeq r1, #0x25
	ldrne r0, [r7, #0x24]
	moveq sl, #2
	addne r0, r8, r0
	strneb r1, [r5, r0]
	add r5, r5, #1
_022F2174:
	add sb, sb, #1
	cmp sb, r4
	blt _022F2100
_022F2180:
	ldr r1, [r7, #0x24]
	add r0, r8, r5
	mov r2, #0
	strb r2, [r1, r0]
	ldr r0, [r7, #0x24]
	cmp r5, #0
	add r1, r0, r8
	ble _022F21C4
_022F21A0:
	ldrsb r0, [r1, r2]
	cmp r0, #0x2f
	cmpne r0, #0x3a
	addeq r0, r2, r8
	streq r0, [r7, #0xc]
	beq _022F21C4
	add r2, r2, #1
	cmp r2, r5
	blt _022F21A0
_022F21C4:
	cmp r2, r5
	bne _022F21DC
	add r0, r2, r8
	str r0, [r7, #0xc]
	str r0, [r7, #0x10]
	b _022F2280
_022F21DC:
	ldrsb r0, [r1, r2]
	cmp r0, #0x2f
	ldreq r0, [r7, #0xc]
	streq r0, [r7, #0x10]
	beq _022F2280
	cmp r0, #0x3a
	bne _022F2280
	cmp r2, r5
	bge _022F2220
_022F2200:
	ldrsb r0, [r1, r2]
	cmp r0, #0x2f
	addeq r0, r2, r8
	streq r0, [r7, #0x10]
	beq _022F2220
	add r2, r2, #1
	cmp r2, r5
	blt _022F2200
_022F2220:
	cmp r2, r5
	addeq r0, r2, r8
	streq r0, [r7, #0x10]
	beq _022F2280
	ldr r1, [r7, #0xc]
	ldr r0, [r7, #0x24]
	add r2, r1, #1
	ldr r1, [r7, #0x10]
	add r0, r0, r2
	sub r1, r1, r2
	bl ov00_022F4594
	cmp r0, #0
	ldrlt r0, [r7, #0x28]
	blt _022F2274
	ldr r1, _022F23EC ; =0x0000FFFF
	cmp r0, r1
	ble _022F2274
	ldr r0, _022F23DC ; =ov00_02327944
	mov r1, #4
	str r1, [r0]
	b _022F2358
_022F2274:
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	str r0, [r7, #0x28]
_022F2280:
	ldr r0, [r7, #8]
	cmp r0, #0
	beq _022F2328
	ldr r0, _022F23E0 ; =ov00_02327948
	ldr r3, [r7, #0xc]
	ldr r2, [r0]
	mov r0, #0x830
	mov r1, #4
	sub r4, r3, r8
	blx r2
	str r0, [r7, #0x20]
	cmp r0, #0
	bne _022F22C4
	ldr r0, _022F23DC ; =ov00_02327944
	mov r1, #1
	str r1, [r0]
	b _022F2358
_022F22C4:
	mov r1, #0x830
	bl ov00_022F2C34
	ldr r1, _022F23E0 ; =ov00_02327948
	add r0, r4, #1
	ldr r2, [r1]
	mov r1, #4
	blx r2
	ldr r1, [r7, #0x20]
	str r0, [r1, #0x800]
	ldr r0, [r7, #0x20]
	ldr r0, [r0, #0x800]
	cmp r0, #0
	bne _022F2308
	ldr r0, _022F23DC ; =ov00_02327944
	mov r1, #1
	str r1, [r0]
	b _022F2358
_022F2308:
	ldr r1, [r7, #0x24]
	mov r2, r4
	add r1, r1, r8
	bl ov00_022F2C48
	ldr r0, [r7, #0x20]
	mov r1, #0
	ldr r0, [r0, #0x800]
	strb r1, [r0, r4]
_022F2328:
	ldr r1, _022F23F0 ; =ov00_023183A4
	add r0, r7, #0x44
	mov r2, #0x14
	bl ov00_022F2C48
	ldr r0, [sp, #0x2c]
	ldr r1, [sp, #0x28]
	str r0, [r7, #0x2c]
	ldr r0, [sp]
	str r0, [r7, #0x40]
	mov r0, r7
	str r1, [r7, #0x3c]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022F2358:
	cmp r7, #0
	beq _022F23D4
	ldr r0, [r7, #0x20]
	cmp r0, #0
	beq _022F2394
	ldr r0, [r0, #0x800]
	cmp r0, #0
	beq _022F2384
	ldr r1, _022F23F4 ; =ov00_0232794C
	ldr r1, [r1]
	blx r1
_022F2384:
	ldr r1, _022F23F4 ; =ov00_0232794C
	ldr r0, [r7, #0x20]
	ldr r1, [r1]
	blx r1
_022F2394:
	ldr r0, [r7, #0x24]
	cmp r0, #0
	beq _022F23AC
	ldr r1, _022F23F4 ; =ov00_0232794C
	ldr r1, [r1]
	blx r1
_022F23AC:
	ldr r0, [r7, #0x30]
	cmp r0, #0
	beq _022F23C4
	ldr r1, _022F23F4 ; =ov00_0232794C
	ldr r1, [r1]
	blx r1
_022F23C4:
	ldr r1, _022F23F4 ; =ov00_0232794C
	mov r0, r7
	ldr r1, [r1]
	blx r1
_022F23D4:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022F23DC: .word ov00_02327944
_022F23E0: .word ov00_02327948
_022F23E4: .word ov00_0231A60C
_022F23E8: .word ov00_0231A614
_022F23EC: .word 0x0000FFFF
_022F23F0: .word ov00_023183A4
_022F23F4: .word ov00_0232794C
	arm_func_end ov00_022F1E94

	arm_func_start ov00_022F23F8
ov00_022F23F8: ; 0x022F23F8
	stmdb sp!, {r4, lr}
	ldr r1, _022F241C ; =ov00_0232794C
	mov r4, r0
	ldr r0, [r4, #0x30]
	ldr r1, [r1]
	blx r1
	mov r0, r4
	bl ov00_022F2474
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F241C: .word ov00_0232794C
	arm_func_end ov00_022F23F8

	arm_func_start ov00_022F2420
ov00_022F2420: ; 0x022F2420
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	movs r7, r0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r4, _022F2470 ; =ov00_0232794C
	mov r5, #0
_022F2434:
	ldr r0, [r7]
	cmp r7, r0
	beq _022F2454
	ldr r6, [r0]
	ldr r1, [r4]
	blx r1
	str r6, [r7]
	b _022F2464
_022F2454:
	ldr r1, [r4]
	mov r0, r7
	blx r1
	mov r7, r5
_022F2464:
	cmp r7, #0
	bne _022F2434
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022F2470: .word ov00_0232794C
	arm_func_end ov00_022F2420

	arm_func_start ov00_022F2474
ov00_022F2474: ; 0x022F2474
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r0, [r4, #0x34]
	bl ov00_022F2420
	ldr r0, [r4, #0x38]
	bl ov00_022F2420
	ldr r0, [r4, #0x20]
	cmp r0, #0
	beq _022F24C0
	ldr r0, [r0, #0x800]
	cmp r0, #0
	beq _022F24B0
	ldr r1, _022F24E8 ; =ov00_0232794C
	ldr r1, [r1]
	blx r1
_022F24B0:
	ldr r1, _022F24E8 ; =ov00_0232794C
	ldr r0, [r4, #0x20]
	ldr r1, [r1]
	blx r1
_022F24C0:
	ldr r1, _022F24E8 ; =ov00_0232794C
	ldr r0, [r4, #0x24]
	ldr r1, [r1]
	blx r1
	ldr r1, _022F24E8 ; =ov00_0232794C
	mov r0, r4
	ldr r1, [r1]
	blx r1
	mov r0, #1
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F24E8: .word ov00_0232794C
	arm_func_end ov00_022F2474

	arm_func_start ov00_022F24EC
ov00_022F24EC: ; 0x022F24EC
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	ldr r0, [r5]
	cmp r0, #0
	beq _022F2514
	ldr r0, _022F2574 ; =ov00_02327944
	mov r1, #0xb
	str r1, [r0]
	sub r0, r1, #0xc
	ldmia sp!, {r3, r4, r5, pc}
_022F2514:
	ldr r0, [r5, #0x40]
	cmp r0, #1
	ldreq r0, [r5, #0x38]
	cmpeq r0, #0
	bne _022F253C
	ldr r0, _022F2574 ; =ov00_02327944
	mov r1, #0xb
	str r1, [r0]
	sub r0, r1, #0xc
	ldmia sp!, {r3, r4, r5, pc}
_022F253C:
	bl ov00_022F1914
	mov r0, r5
	bl ov00_022F1708
	movs r4, r0
	ldrmi r0, _022F2574 ; =ov00_02327944
	movmi r1, #1
	strmi r1, [r0]
	bmi _022F2568
	mov r0, #1
	str r0, [r5]
	bl ov00_022F19F8
_022F2568:
	bl ov00_022F1928
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022F2574: .word ov00_02327944
	arm_func_end ov00_022F24EC

	arm_func_start ov00_022F2578
ov00_022F2578: ; 0x022F2578
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r0
	mov r5, #0
	bl ov00_022F1914
	ldr r0, _022F25F0 ; =ov00_02327950
	ldr r2, [r0]
	cmp r2, #0
	beq _022F25D0
	ldr r1, [r2, #8]
	cmp r1, r4
	ldreq r1, [r2, #0xc]
	ldreq r1, [r1, #4]
	cmpeq r1, #0
	bne _022F25D0
	ldr r1, [r2, #0xc]
	mov r2, #1
	str r2, [r1, #4]
	ldr r1, [r0]
	ldr r0, [r1, #0xc]
	ldr r1, [r1, #0x10]
	bl ov00_022F2B98
	mov r5, #1
_022F25D0:
	cmp r5, #0
	bne _022F25E4
	mov r0, r4
	bl ov00_022F1814
	mov r5, r0
_022F25E4:
	bl ov00_022F1928
	mov r0, r5
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022F25F0: .word ov00_02327950
	arm_func_end ov00_022F2578

	arm_func_start ov00_022F25F4
ov00_022F25F4: ; 0x022F25F4
	stmdb sp!, {r3, lr}
	bl ov00_022F1914
	ldr r0, _022F2644 ; =ov00_02327950
	ldr r2, [r0]
	cmp r2, #0
	beq _022F2638
	ldr r1, [r2, #0xc]
	ldr r1, [r1, #4]
	cmp r1, #0
	bne _022F2638
	ldr r1, [r2, #0xc]
	mov r2, #1
	str r2, [r1, #4]
	ldr r1, [r0]
	ldr r0, [r1, #0xc]
	ldr r1, [r1, #0x10]
	bl ov00_022F2B98
_022F2638:
	bl ov00_022F18B4
	bl ov00_022F1928
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F2644: .word ov00_02327950
	arm_func_end ov00_022F25F4

	arm_func_start ov00_022F2648
ov00_022F2648: ; 0x022F2648
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r5, r0
	ldr r2, [r5, #0x24]
	ldr r1, [r5, #0xc]
	mov r0, #0
	ldrsb r4, [r2, r1]
	strb r0, [r2, r1]
	ldr r0, [r5, #8]
	ldr r6, [r5, #0x24]
	cmp r0, #0
	movne r7, #8
	moveq r7, #7
	add r1, sp, #0
	add r0, r6, r7
	bl ov00_022CF824
	cmp r0, #0
	ldrne r0, [sp]
	bne _022F26D0
	add r0, r6, r7
	bl ov00_022CEDE0
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r2, r0, lsr #0x18
	mov r1, r0, lsr #8
	mov r3, r0, lsl #8
	mov ip, r0, lsl #0x18
	and r2, r2, #0xff
	and r0, r1, #0xff00
	and r1, r3, #0xff0000
	orr r0, r2, r0
	and r2, ip, #0xff000000
	orr r0, r1, r0
	orr r0, r2, r0
_022F26D0:
	ldr r2, [r5, #0x24]
	ldr r1, [r5, #0xc]
	strb r4, [r2, r1]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022F2648

	arm_func_start ov00_022F26E0
ov00_022F26E0: ; 0x022F26E0
	stmdb sp!, {r4, r5, r6, lr}
	mov r4, r0
	ldr r0, [r4, #0x1c]
	cmp r0, #0
	beq _022F2710
	ldr r5, _022F2754 ; =ov00_0232794C
_022F26F8:
	ldr r6, [r0]
	ldr r1, [r5]
	blx r1
	movs r0, r6
	str r6, [r4, #0x1c]
	bne _022F26F8
_022F2710:
	ldr r0, [r4, #0x10]
	cmp r0, #0
	beq _022F2728
	ldr r1, _022F2754 ; =ov00_0232794C
	ldr r1, [r1]
	blx r1
_022F2728:
	ldr r0, [r4, #0x14]
	cmp r0, #0
	beq _022F2740
	ldr r1, _022F2754 ; =ov00_0232794C
	ldr r1, [r1]
	blx r1
_022F2740:
	ldr r1, _022F2754 ; =ov00_0232794C
	mov r0, r4
	ldr r1, [r1]
	blx r1
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022F2754: .word ov00_0232794C
	arm_func_end ov00_022F26E0

	arm_func_start ov00_022F2758
ov00_022F2758: ; 0x022F2758
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #8
	mov r5, r0
	mov r4, r2
	mov sl, r1
	ldr r2, [r5]
	add r3, sp, #4
	mov r1, #0xc
	bl ov00_022F1AEC
	mov r8, r0
	cmp r8, #0
	ble _022F2858
	mov r6, #0
	add r7, sp, #4
_022F2790:
	ldr r2, [r5]
	mov r0, r5
	mov r1, r8
	mov r3, r7
	bl ov00_022F1AEC
	ldr r2, [sp, #4]
	mov sb, r0
	cmp r2, #0
	ble _022F284C
	mov r0, r5
	mov r1, r8
	mov r3, sl
	str r6, [sp]
	bl ov00_022F1C2C
	cmp r0, #0
	bne _022F284C
	ldr r1, [sp, #4]
	ldr r0, [r5]
	add r1, r1, #1
	cmp r1, r0
	bge _022F2840
	ldr r2, [r5]
	mov r0, r5
	mov r3, #0
	bl ov00_022F1AEC
	cmp r0, #0
	ldrle r6, [r5]
	ble _022F2814
	cmp r0, #2
	addlt sp, sp, #8
	mvnlt r0, #0
	ldmltia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	sub r6, r0, #2
_022F2814:
	ldr r1, [sp, #4]
	mov r0, r5
	mov r2, r6
	add r1, r1, #1
	bl ov00_022F1BBC
	cmp r0, #0
	movlt r0, r6
	str r0, [r4]
	add sp, sp, #8
	sub r0, r6, r0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022F2840:
	add sp, sp, #8
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022F284C:
	mov r8, sb
	cmp sb, #0
	bgt _022F2790
_022F2858:
	mvn r0, #0
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	arm_func_end ov00_022F2758

	arm_func_start ov00_022F2864
ov00_022F2864: ; 0x022F2864
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	ldr r0, [r7, #8]
	mov r6, r1
	cmp r0, #0
	mov r5, r2
	mvneq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r0, [r7, #0x14]
	cmp r0, #0
	beq _022F28A4
	ldr r1, _022F295C ; =ov00_0232794C
	ldr r1, [r1]
	blx r1
	mov r0, #0
	str r0, [r7, #0x14]
_022F28A4:
	add r2, sp, #0
	mov r0, r7
	mov r1, r6
	bl ov00_022F2758
	movs r4, r0
	bmi _022F2900
	ldr r1, _022F2960 ; =ov00_02327948
	add r0, r4, #1
	ldr r2, [r1]
	mov r1, #4
	blx r2
	str r0, [r7, #0x14]
	mov r1, #0
	strb r1, [r0, r4]
	ldr r1, [r7, #0x14]
	ldr r2, [sp]
	mov r0, r7
	mov r3, r4
	bl ov00_022F1CFC
	ldr r1, [r7, #0x14]
	mov r0, r4
	str r1, [r5]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022F2900:
	ldr r0, _022F2964 ; =ov00_0231A620
	mov r1, r6
	bl ov00_022F2BB4
	cmp r0, #0
	mvnne r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, _022F2960 ; =ov00_02327948
	mov r0, #4
	ldr r2, [r1]
	mov r1, r0
	blx r2
	str r0, [r7, #0x14]
	mov r1, #0
	strb r1, [r0, #3]
	ldr r1, [r7, #0x14]
	mov r0, r7
	mov r2, #9
	mov r3, #3
	bl ov00_022F1CFC
	ldr r1, [r7, #0x14]
	mov r0, #3
	str r1, [r5]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022F295C: .word ov00_0232794C
_022F2960: .word ov00_02327948
_022F2964: .word ov00_0231A620
	arm_func_end ov00_022F2864

	arm_func_start ov00_022F2968
ov00_022F2968: ; 0x022F2968
	ldr r2, [r0, #8]
	cmp r2, #0
	ldrne r2, [r0, #4]
	cmpne r2, #0
	mvneq r0, #0
	ldrne r2, [r0, #0x18]
	strne r2, [r1]
	ldrne r0, [r0, #4]
	bx lr
	arm_func_end ov00_022F2968

	arm_func_start ov00_022F298C
ov00_022F298C: ; 0x022F298C
	tst r0, #0x8000
	bicne r0, r0, #0x8000
	bx lr
	arm_func_end ov00_022F298C

	arm_func_start ov00_022F2998
ov00_022F2998: ; 0x022F2998
	stmdb sp!, {r3, lr}
	ldr r0, _022F29B4 ; =ov00_02328320
	bl sub_0207BB50
	ldr r0, _022F29B4 ; =ov00_02328320
	mov r1, #0x20
	bl ov00_022D1F04
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F29B4: .word ov00_02328320
	arm_func_end ov00_022F2998

	arm_func_start ov00_022F29B8
ov00_022F29B8: ; 0x022F29B8
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r0, #2
	mov r1, #1
	mov r2, #0
	bl socket
	movs r4, r0
	bmi _022F2A2C
	ldr r0, [r5, #8]
	cmp r0, #0
	beq _022F2A2C
	bl ov00_022F2998
	ldr r1, [r5, #0x1c]
	ldr r0, [r5, #0x20]
	ldr r2, _022F2A34 ; =ov00_022F298C
	str r1, [r0, #0x814]
	ldr r3, [r5, #0x18]
	ldr r1, [r5, #0x20]
	mov r0, r4
	str r3, [r1, #0x818]
	ldr r1, [r5, #0x20]
	str r2, [r1, #0x810]
	ldr r1, [r5, #0x20]
	bl ov00_022CF9CC
	cmp r0, #0
	bge _022F2A2C
	mov r0, r4
	bl CloseVeneer
	mvn r4, #0
_022F2A2C:
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022F2A34: .word ov00_022F298C
	arm_func_end ov00_022F29B8

	arm_func_start ov00_022F2A38
ov00_022F2A38: ; 0x022F2A38
	ldr ip, _022F2A44 ; =CloseVeneer
	mov r0, r1
	bx ip
	.align 2, 0
_022F2A44: .word CloseVeneer
	arm_func_end ov00_022F2A38

	arm_func_start ov00_022F2A48
ov00_022F2A48: ; 0x022F2A48
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r1
	mov r0, r6
	bl CloseVeneer
	mvn r4, #0x19
	cmp r0, r4
	ldmneia sp!, {r4, r5, r6, pc}
	mov r5, #0x1f4
_022F2A68:
	mov r0, r5
	bl sub_02079B14
	mov r0, r6
	bl CloseVeneer
	cmp r0, r4
	beq _022F2A68
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022F2A48

	arm_func_start ov00_022F2A84
ov00_022F2A84: ; 0x022F2A84
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #8
	mov r3, r3, lsl #0x10
	mov r3, r3, lsr #0x10
	mov ip, r3, asr #8
	mov r4, r0
	mov r5, #8
	mov lr, #2
	mov r3, r3, lsl #8
	mov r0, r1
	and ip, ip, #0xff
	and r1, r3, #0xff00
	orr r3, ip, r1
	add r1, sp, #0
	strb r5, [sp]
	strb lr, [sp, #1]
	strh r3, [sp, #2]
	str r2, [sp, #4]
	bl connect
	cmp r0, #0
	bge _022F2AF0
	ldr r0, [r4, #4]
	add sp, sp, #8
	cmp r0, #0
	ldrne r0, _022F2AFC ; =0xFFFFFC16
	mvneq r0, #0x3e8
	ldmia sp!, {r3, r4, r5, pc}
_022F2AF0:
	mov r0, #0
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022F2AFC: .word 0xFFFFFC16
	arm_func_end ov00_022F2A84

	arm_func_start ov00_022F2B00
ov00_022F2B00: ; 0x022F2B00
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, r1
	mov r1, r2
	mov r2, r3
	ldr r3, [sp, #8]
	bl recv
	cmp r0, #0
	ldmgeia sp!, {r4, pc}
	ldr r1, [r4, #4]
	cmp r1, #0
	ldrne r0, _022F2B48 ; =0xFFFFFC16
	ldmneia sp!, {r4, pc}
	mvn r1, #0x37
	cmp r0, r1
	moveq r0, #0
	mvnne r0, #0x3e8
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F2B48: .word 0xFFFFFC16
	arm_func_end ov00_022F2B00

	arm_func_start ov00_022F2B4C
ov00_022F2B4C: ; 0x022F2B4C
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, r1
	mov r1, r2
	mov r2, r3
	ldr r3, [sp, #8]
	bl send
	cmp r0, #0
	ldmgeia sp!, {r4, pc}
	ldr r1, [r4, #4]
	cmp r1, #0
	ldrne r0, _022F2B94 ; =0xFFFFFC16
	ldmneia sp!, {r4, pc}
	mvn r1, #0x37
	cmp r0, r1
	moveq r0, #0
	mvnne r0, #0x3e8
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F2B94: .word 0xFFFFFC16
	arm_func_end ov00_022F2B4C

	arm_func_start ov00_022F2B98
ov00_022F2B98: ; 0x022F2B98
	stmdb sp!, {r3, lr}
	cmp r1, #0
	ldmltia sp!, {r3, pc}
	mov r0, r1
	mov r1, #2
	bl ov00_022CF3BC
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F2B98

	arm_func_start ov00_022F2BB4
ov00_022F2BB4: ; 0x022F2BB4
	ldr ip, _022F2BBC ; =sub_020852CC
	bx ip
	.align 2, 0
_022F2BBC: .word sub_020852CC
	arm_func_end ov00_022F2BB4

	arm_func_start ov00_022F2BC0
ov00_022F2BC0: ; 0x022F2BC0
	cmp r2, #0
	ble _022F2C20
_022F2BC8:
	ldrsb ip, [r0], #1
	ldrsb r3, [r1], #1
	cmp ip, #0
	cmpne r3, #0
	bne _022F2BEC
	cmp ip, #0
	cmpeq r3, #0
	moveq r2, #0
	b _022F2C20
_022F2BEC:
	cmp r3, #0x41
	blt _022F2BFC
	cmp r3, #0x5a
	addle r3, r3, #0x20
_022F2BFC:
	cmp ip, #0x41
	blt _022F2C0C
	cmp ip, #0x5a
	addle ip, ip, #0x20
_022F2C0C:
	cmp ip, r3
	bne _022F2C20
	sub r2, r2, #1
	cmp r2, #0
	bgt _022F2BC8
_022F2C20:
	mov r0, r2
	bx lr
	arm_func_end ov00_022F2BC0

	arm_func_start ov00_022F2C28
ov00_022F2C28: ; 0x022F2C28
	ldr ip, _022F2C30 ; =sub_020852A4
	bx ip
	.align 2, 0
_022F2C30: .word sub_020852A4
	arm_func_end ov00_022F2C28

	arm_func_start ov00_022F2C34
ov00_022F2C34: ; 0x022F2C34
	ldr ip, _022F2C44 ; =MemsetFast
	mov r2, r1
	mov r1, #0
	bx ip
	.align 2, 0
_022F2C44: .word MemsetFast
	arm_func_end ov00_022F2C34

	arm_func_start ov00_022F2C48
ov00_022F2C48: ; 0x022F2C48
	ldr ip, _022F2C5C ; =MemcpyFast
	mov r3, r0
	mov r0, r1
	mov r1, r3
	bx ip
	.align 2, 0
_022F2C5C: .word MemcpyFast
	arm_func_end ov00_022F2C48

	arm_func_start ov00_022F2C60
ov00_022F2C60: ; 0x022F2C60
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	ldr r5, [sp, #0x28]
	mov sl, r0
	mov sb, r1
	mov r8, r2
	mov r7, r3
	cmp r5, #0
	ble _022F2D08
	ldr r4, _022F2D10 ; =ov00_02328388
	mov fp, #0
_022F2C88:
	ldr r0, [sl, #4]
	cmp r0, #0
	mvnne r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r8]
	mov r1, r7
	rsb r6, r0, #0x400
	cmp r5, r6
	movle r6, r5
	mov r2, r6
	add r0, r4, r0
	bl ov00_022F2C48
	ldr r0, [r8]
	add r7, r7, r6
	add r0, r0, r6
	str r0, [r8]
	cmp r0, #0x400
	sub r5, r5, r6
	bne _022F2D00
	mov r0, sl
	mov r1, sb
	mov r2, r4
	mov r3, #0x400
	str fp, [sp]
	bl ov00_022F2B4C
	cmp r0, #0
	ldmleia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r8]
	sub r0, r1, r0
	str r0, [r8]
_022F2D00:
	cmp r5, #0
	bgt _022F2C88
_022F2D08:
	ldr r0, [sp, #0x28]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022F2D10: .word ov00_02328388
	arm_func_end ov00_022F2C60

	arm_func_start ov00_022F2D14
ov00_022F2D14: ; 0x022F2D14
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #8
	mov r8, #0
	mov sl, r0
	mov sb, r1
	mov r7, r8
	strb r8, [sp, #4]
	strb r8, [sp, #5]
	mov r6, r8
	mov r5, #1
	add r4, sp, #4
	b _022F2D70
_022F2D44:
	mov r0, sl
	mov r1, sb
	mov r3, r5
	add r2, r4, r2
	str r6, [sp]
	bl ov00_022F2B00
	cmp r0, #0
	addle sp, sp, #8
	ldmleia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	add r8, r8, r0
	add r7, r7, #1
_022F2D70:
	and r2, r7, #1
	ldrsb r0, [r4, r2]
	cmp r0, #0xd
	bne _022F2D44
	sub r0, r7, #1
	and r0, r0, #1
	ldrsb r0, [r4, r0]
	cmp r0, #0xa
	bne _022F2D44
	mov r0, r8
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	arm_func_end ov00_022F2D14

	arm_func_start ov00_022F2DA0
ov00_022F2DA0: ; 0x022F2DA0
	stmdb sp!, {r4, lr}
	movs r4, r0
	ldmeqia sp!, {r4, pc}
	ldr r0, [r4, #0x800]
	cmp r0, #0
	beq _022F2DC4
	ldr r1, _022F2DD8 ; =ov00_0232794C
	ldr r1, [r1]
	blx r1
_022F2DC4:
	ldr r1, _022F2DD8 ; =ov00_0232794C
	mov r0, r4
	ldr r1, [r1]
	blx r1
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F2DD8: .word ov00_0232794C
	arm_func_end ov00_022F2DA0

	arm_func_start ov00_022F2DDC
ov00_022F2DDC: ; 0x022F2DDC
	stmdb sp!, {r4, r5, r6, lr}
	ldr r2, _022F2E70 ; =ov00_02328340
	mov r6, r0
	ldmia r2, {r0, r2}
	add r0, r0, #1
	and r4, r0, #7
	mov r5, r1
	cmp r4, r2
	bne _022F2E38
	ldr r1, _022F2E74 ; =ov00_02328348
	mov r0, #0
	ldr r1, [r1, r2, lsl #3]
	bl ov00_022F2A48
	ldr r0, _022F2E70 ; =ov00_02328340
	ldr r1, _022F2E78 ; =ov00_0232834C
	ldr r0, [r0, #4]
	ldr r0, [r1, r0, lsl #3]
	bl ov00_022F2DA0
	ldr r0, _022F2E70 ; =ov00_02328340
	ldr r1, [r0, #4]
	add r1, r1, #1
	and r1, r1, #7
	str r1, [r0, #4]
_022F2E38:
	ldr r0, [r5]
	cmp r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	ldr r0, _022F2E70 ; =ov00_02328340
	ldr r1, _022F2E74 ; =ov00_02328348
	ldr ip, [r0]
	ldr r2, _022F2E78 ; =ov00_0232834C
	str r6, [r1, ip, lsl #3]
	ldr r3, [r5]
	mov r1, #0
	str r3, [r2, ip, lsl #3]
	str r1, [r5]
	str r4, [r0]
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022F2E70: .word ov00_02328340
_022F2E74: .word ov00_02328348
_022F2E78: .word ov00_0232834C
	arm_func_end ov00_022F2DDC

	arm_func_start ov00_022F2E7C
ov00_022F2E7C: ; 0x022F2E7C
	stmdb sp!, {r4, r5, r6, lr}
	ldr r6, _022F2ED4 ; =ov00_02328340
	ldmia r6, {r0, r1}
	cmp r0, r1
	ldmeqia sp!, {r4, r5, r6, pc}
	ldr r4, _022F2ED8 ; =ov00_02328348
	mov r5, #0
_022F2E98:
	ldr r1, [r4, r1, lsl #3]
	mov r0, r5
	bl ov00_022F2A48
	ldr r0, [r6, #4]
	add r0, r4, r0, lsl #3
	ldr r0, [r0, #4]
	bl ov00_022F2DA0
	ldr r0, [r6, #4]
	add r0, r0, #1
	and r1, r0, #7
	str r1, [r6, #4]
	ldr r0, [r6]
	cmp r0, r1
	bne _022F2E98
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022F2ED4: .word ov00_02328340
_022F2ED8: .word ov00_02328348
	arm_func_end ov00_022F2E7C

	arm_func_start ov00_022F2EDC
ov00_022F2EDC: ; 0x022F2EDC
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x4c
	ldr r2, _022F3DFC ; =ov00_02328340
	mov r0, #0
	str r0, [sp, #0x3c]
	str r0, [r2]
	ldr r1, _022F3E00 ; =ov00_02327954
	mvn r6, #0
	str r0, [r2, #4]
	ldr r1, [r1]
	str r0, [sp, #0x10]
	str r6, [sp, #0x18]
	str r6, [sp, #0x14]
	str r0, [sp, #8]
	str r0, [sp, #0xc]
	cmp r1, #0
	bne _022F41AC
_022F2F20:
	bl ov00_022F1914
	bl ov00_022F18E4
	cmp r0, #0
	mvneq r4, #0
	beq _022F2F44
	ldr r4, [r0, #8]
	ldr r8, [r0, #0xc]
	ldr r1, _022F3E04 ; =ov00_02327950
	str r0, [r1]
_022F2F44:
	bl ov00_022F1928
	cmp r4, #0
	bge _022F2F58
	bl ov00_022F19DC
	b _022F419C
_022F2F58:
	ldr r0, [r8, #4]
	ldr sb, [r8, #0x30]
	cmp r0, #0
	bne _022F40CC
	mov r0, r8
	bl ov00_022F2648
	str r0, [sp, #0x1c]
	cmp r0, #0
	moveq r0, #4
	streq r0, [sp, #4]
	beq _022F40CC
	mov r1, r0
	ldr r0, [sp, #0x18]
	mov r2, #0
	cmp r1, r0
	ldreq r1, [r8, #0x28]
	ldreq r0, [sp, #0x14]
	add r5, sp, #0x38
	cmpeq r1, r0
	ldreq r1, [r8, #8]
	ldreq r0, [sp, #0xc]
	add r4, sp, #0x40
	cmpeq r1, r0
	ldr r0, [r8, #0x28]
	moveq r2, #1
	str r0, [sp, #0x14]
	ldr r0, [r8, #8]
	str r0, [sp, #0xc]
	ldr r0, [sp, #0x1c]
	str r0, [sp, #0x18]
	ldr r0, [sp, #8]
	and r0, r0, r2
	str r0, [sp, #8]
	mvn r0, #0
	str r0, [sp, #0x20]
_022F2FE4:
	mov r0, #0
	cmp r6, #0
	str r0, [sp, #4]
	blt _022F3034
	mov r0, #9
	strh r0, [sp, #0x2c]
	ldr r2, _022F3E08 ; =0x0000CC8D
	add r0, sp, #0x28
	mov r1, #1
	mov r3, #0
	str r6, [sp, #0x28]
	bl ov00_022CF918
	cmp r0, #0
	movle r0, #0
	strle r0, [sp, #8]
	ble _022F3034
	ldrsh r0, [sp, #0x2e]
	tst r0, #0xe0
	movne r0, #0
	strne r0, [sp, #8]
_022F3034:
	ldr r0, [sp, #8]
	cmp r0, #0
	bne _022F30FC
	cmp r6, #0
	blt _022F307C
	mov r0, r8
	mov r1, r6
	bl ov00_022F2A38
	cmp r0, #0
	movlt r0, #0xa
	strlt r0, [sp, #4]
	mov r0, r6
	add r1, sp, #0x3c
	bl ov00_022F2DDC
	ldr r0, [sp, #4]
	ldr r6, [sp, #0x20]
	cmp r0, #0
	bne _022F40CC
_022F307C:
	mov r0, r8
	bl ov00_022F29B8
	movs r6, r0
	movmi r0, #3
	strmi r0, [sp, #4]
	bmi _022F40CC
	ldr r0, [r8, #8]
	cmp r0, #0
	beq _022F30B0
	ldr r0, [r8, #0x20]
	str r0, [sp, #0x3c]
	mov r0, #0
	str r0, [r8, #0x20]
_022F30B0:
	bl ov00_022F1914
	ldr r0, _022F3E04 ; =ov00_02327950
	ldr r0, [r0]
	str r6, [r0, #0x10]
	bl ov00_022F1928
	ldr r0, [r8, #4]
	cmp r0, #0
	bne _022F40CC
	ldr r2, [sp, #0x1c]
	ldr r3, [r8, #0x28]
	mov r0, r8
	mov r1, r6
	bl ov00_022F2A84
	cmp r0, #0
	movge r0, #1
	strge r0, [sp, #8]
	movlt r0, #0
	strlt r0, [sp, #8]
	b _022F3130
_022F30FC:
	ldr r0, [r8, #8]
	cmp r0, #0
	beq _022F3118
	ldr r0, [r8, #0x20]
	bl ov00_022F2DA0
	mov r0, #0
	str r0, [r8, #0x20]
_022F3118:
	bl ov00_022F2998
	bl ov00_022F1914
	ldr r0, _022F3E04 ; =ov00_02327950
	ldr r0, [r0]
	str r6, [r0, #0x10]
	bl ov00_022F1928
_022F3130:
	ldr r0, [r8, #4]
	cmp r0, #0
	bne _022F40CC
	ldr r0, [sp, #8]
	cmp r0, #0
	moveq r0, #5
	streq r0, [sp, #4]
	beq _022F40CC
	mov r0, #0
	str r0, [sp, #0x38]
	str r0, [sp, #8]
	ldr r0, [r8, #0x24]
	bl ov00_022F2C28
	mov r7, r0
	mov r0, #0xa
	str r0, [sp, #4]
	ldr r0, [r8, #0x40]
	cmp r0, #0
	beq _022F3190
	cmp r0, #1
	beq _022F31BC
	cmp r0, #2
	beq _022F31E8
	b _022F3210
_022F3190:
	mov r0, #4
	str r0, [sp]
	ldr r3, _022F3E0C ; =ov00_0231A630
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	b _022F3210
_022F31BC:
	mov r0, #5
	str r0, [sp]
	ldr r3, _022F3E10 ; =ov00_0231A638
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	b _022F3210
_022F31E8:
	mov r0, #5
	str r0, [sp]
	ldr r3, _022F3E14 ; =ov00_0231A640
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
_022F3210:
	ldr sl, [r8, #0x10]
	cmp r7, sl
	ble _022F3250
	subs r0, r7, sl
	beq _022F3278
	str r0, [sp]
	mov r0, r8
	mov r1, r6
	mov r2, r5
	ldr r3, [r8, #0x24]
	add r3, r3, sl
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	b _022F3278
_022F3250:
	mov r0, #1
	str r0, [sp]
	ldr r3, _022F3E18 ; =ov00_0231A648
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
_022F3278:
	mov r0, #0xb
	str r0, [sp]
	ldr r3, _022F3E1C ; =ov00_0231A64C
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	ldr r0, [r8, #8]
	ldr r3, _022F3E20 ; =ov00_0231A658
	cmp r0, #0
	movne r0, #8
	moveq r0, #7
	str r0, [sp, #0x34]
	mov r0, #6
	str r0, [sp]
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	ldr r7, [sp, #0x34]
	ldr r0, [r8, #0xc]
	subs r0, r0, r7
	beq _022F3314
	str r0, [sp]
	mov r0, r8
	mov r1, r6
	mov r2, r5
	ldr r3, [r8, #0x24]
	add r3, r3, r7
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
_022F3314:
	mov r0, #2
	str r0, [sp]
	ldr r3, _022F3E24 ; =ov00_0231A660
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	add r0, r8, #0x34
	bl ov00_022F153C
	movs r7, r0
	beq _022F3424
_022F334C:
	ldr r0, [r7, #8]
	bl ov00_022F2C28
	cmp r0, #0
	beq _022F3380
	str r0, [sp]
	mov r0, r8
	mov r1, r6
	mov r2, r5
	ldr r3, [r7, #8]
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
_022F3380:
	mov r0, #2
	str r0, [sp]
	ldr r3, _022F3E28 ; =ov00_0231A664
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	ldr r0, [r7, #0xc]
	bl ov00_022F2C28
	cmp r0, #0
	beq _022F33DC
	str r0, [sp]
	mov r0, r8
	mov r1, r6
	mov r2, r5
	ldr r3, [r7, #0xc]
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
_022F33DC:
	mov r0, #2
	str r0, [sp]
	ldr r3, _022F3E24 ; =ov00_0231A660
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	ldr r1, _022F3E2C ; =ov00_0232794C
	mov r0, r7
	ldr r1, [r1]
	blx r1
	add r0, r8, #0x34
	bl ov00_022F153C
	movs r7, r0
	bne _022F334C
_022F3424:
	ldr r0, [r8, #0x40]
	cmp r0, #1
	bne _022F3644
	ldr sl, [r8, #0x38]
	mov r7, #0
	mov r0, r7
	str r0, [sp, #0x10]
	cmp sl, #0
	mov r1, sl
	beq _022F3474
_022F344C:
	ldr r0, [r1, #0x14]
	cmp r0, #0
	movne r0, #1
	strne r0, [sp, #0x10]
	bne _022F3474
	ldr r0, [sl]
	cmp r1, r0
	ldrne r1, [r1, #4]
	cmpne r1, #0
	bne _022F344C
_022F3474:
	ldr r0, [sp, #0x10]
	cmp r0, #0
	beq _022F3550
	cmp sl, #0
	beq _022F34D0
_022F3488:
	ldr r0, [sl, #8]
	add r7, r7, #0x16
	bl ov00_022F2C28
	add r0, r0, #0x29
	add r7, r7, r0
	ldr r0, [sl, #0x14]
	ldr r1, [sl, #0x10]
	cmp r0, #0
	ldr r0, [r8, #0x38]
	addne r7, r7, #0x4b
	ldr r0, [r0]
	add r2, r7, #2
	cmp sl, r0
	ldrne sl, [sl, #4]
	add r1, r2, r1
	add r7, r1, #2
	cmpne sl, #0
	bne _022F3488
_022F34D0:
	mov r0, #0x2c
	str r0, [sp]
	ldr r3, _022F3E30 ; =ov00_0231A668
	mov r0, r8
	mov r1, r6
	mov r2, r5
	add r7, r7, #0x18
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	mov r0, #0x12
	str r0, [sp]
	mov r0, r8
	mov r1, r6
	mov r2, r5
	add r3, r8, #0x46
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	mov r0, #2
	str r0, [sp]
	ldr r3, _022F3E24 ; =ov00_0231A660
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	b _022F35B8
_022F3550:
	cmp sl, #0
	beq _022F3590
_022F3558:
	ldr r0, [sl, #8]
	bl ov00_022F41DC
	add r0, r7, r0
	add r7, r0, #1
	ldr r0, [sl, #0xc]
	bl ov00_022F41DC
	add r7, r7, r0
	ldr r0, [r8, #0x38]
	ldr r0, [r0]
	cmp sl, r0
	ldrne sl, [sl, #4]
	addne r7, r7, #1
	cmpne sl, #0
	bne _022F3558
_022F3590:
	mov r0, #0x31
	str r0, [sp]
	ldr r3, _022F3E34 ; =ov00_0231A698
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
_022F35B8:
	mov r0, #0x10
	str r0, [sp]
	ldr r3, _022F3E38 ; =ov00_0231A6CC
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	mov r1, r7
	mov r0, r4
	bl ov00_022F4454
	str r0, [sp, #0x34]
	cmp r0, #0
	beq _022F361C
	str r0, [sp]
	mov r0, r8
	mov r1, r6
	mov r2, r5
	mov r3, r4
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
_022F361C:
	mov r0, #2
	str r0, [sp]
	ldr r3, _022F3E24 ; =ov00_0231A660
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
_022F3644:
	mov r0, #2
	str r0, [sp]
	ldr r3, _022F3E24 ; =ov00_0231A660
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	ldr r0, [r8, #0x40]
	cmp r0, #1
	bne _022F39C4
	ldr r0, [sp, #0x10]
	cmp r0, #0
	beq _022F3884
	ldr r7, [r8, #0x38]
	cmp r7, #0
	beq _022F3830
_022F3690:
	mov r0, #0x14
	str r0, [sp]
	mov r0, r8
	mov r1, r6
	mov r2, r5
	add r3, r8, #0x44
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	mov r0, #2
	str r0, [sp]
	ldr r3, _022F3E24 ; =ov00_0231A660
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	mov r0, #0x26
	str r0, [sp]
	ldr r3, _022F3E3C ; =ov00_023183BC
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	ldr r0, [r7, #8]
	bl ov00_022F2C28
	cmp r0, #0
	beq _022F373C
	str r0, [sp]
	mov r0, r8
	mov r1, r6
	mov r2, r5
	ldr r3, [r7, #8]
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
_022F373C:
	mov r0, #3
	str r0, [sp]
	ldr r3, _022F3E40 ; =ov00_0231A6E0
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	ldr r0, [r7, #0x14]
	cmp r0, #0
	beq _022F3798
	mov r0, #0x4b
	str r0, [sp]
	ldr r3, _022F3E44 ; =ov00_023183E4
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
_022F3798:
	mov r0, #2
	str r0, [sp]
	ldr r3, _022F3E24 ; =ov00_0231A660
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	ldr r0, [r7, #0x10]
	cmp r0, #0
	beq _022F37F0
	str r0, [sp]
	mov r0, r8
	mov r1, r6
	mov r2, r5
	ldr r3, [r7, #0xc]
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
_022F37F0:
	mov r0, #2
	str r0, [sp]
	ldr r3, _022F3E24 ; =ov00_0231A660
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	ldr r0, [r8, #0x38]
	ldr r0, [r0]
	cmp r7, r0
	ldrne r7, [r7, #4]
	cmpne r7, #0
	bne _022F3690
_022F3830:
	mov r0, #0x14
	str r0, [sp]
	mov r0, r8
	mov r1, r6
	mov r2, r5
	add r3, r8, #0x44
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	mov r0, #4
	str r0, [sp]
	ldr r3, _022F3E48 ; =ov00_0231A6E4
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	b _022F39C4
_022F3884:
	ldr sl, [r8, #0x38]
	cmp sl, #0
	beq _022F39C4
_022F3890:
	ldr r1, [sl, #8]
	mov r7, #0
	ldrsb r0, [r1]
	cmp r0, #0
	beq _022F38F4
_022F38A4:
	ldrsb r1, [r1, r7]
	mov r0, r4
	bl ov00_022F4244
	str r0, [sp, #0x34]
	cmp r0, #0
	beq _022F38E0
	str r0, [sp]
	mov r0, r8
	mov r1, r6
	mov r2, r5
	mov r3, r4
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
_022F38E0:
	add r7, r7, #1
	ldr r1, [sl, #8]
	ldrsb r0, [r1, r7]
	cmp r0, #0
	bne _022F38A4
_022F38F4:
	mov r0, #1
	str r0, [sp]
	ldr r3, _022F3E4C ; =ov00_0231A6EC
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	ldr r1, [sl, #0xc]
	mov r7, #0
	ldrsb r0, [r1]
	cmp r0, #0
	beq _022F3980
_022F3930:
	ldrsb r1, [r1, r7]
	mov r0, r4
	bl ov00_022F4244
	str r0, [sp, #0x34]
	cmp r0, #0
	beq _022F396C
	str r0, [sp]
	mov r0, r8
	mov r1, r6
	mov r2, r5
	mov r3, r4
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
_022F396C:
	add r7, r7, #1
	ldr r1, [sl, #0xc]
	ldrsb r0, [r1, r7]
	cmp r0, #0
	bne _022F3930
_022F3980:
	ldr r0, [r8, #0x38]
	ldr r0, [r0]
	cmp sl, r0
	beq _022F39C4
	mov r0, #1
	str r0, [sp]
	ldr r3, _022F3E50 ; =ov00_0231A6F0
	mov r0, r8
	mov r1, r6
	mov r2, r5
	bl ov00_022F2C60
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
	ldr sl, [sl, #4]
	cmp sl, #0
	bne _022F3890
_022F39C4:
	ldr r3, [sp, #0x38]
	cmp r3, #0
	ble _022F39F4
	mov r0, #0
	str r0, [sp]
	ldr r2, _022F3E54 ; =ov00_02328388
	mov r0, r8
	mov r1, r6
	bl ov00_022F2B4C
	cmp r0, #0
	blt _022F40CC
	beq _022F2FE4
_022F39F4:
	mov r0, #0
	str r0, [sb]
	strb r0, [sp, #0x40]
	strb r0, [sp, #0x41]
	mov r1, #7
	strb r0, [sp, #0x42]
	strb r0, [sp, #0x43]
	ldr r5, [sb, #0x1c]
	str r1, [sp, #4]
	str r0, [sp, #0x38]
	add sl, sb, #0x20
	add r4, sp, #0x40
_022F3A24:
	ldr r1, [r8, #4]
	cmp r1, #0
	bne _022F40CC
	cmp r0, #0x400
	bge _022F3A6C
	add r2, sl, r0
	mov r0, #0
	str r0, [sp]
	mov r0, r8
	mov r1, r6
	mov r3, #1
	bl ov00_022F2B00
	ldr r3, [sp, #0x38]
	add r1, sb, r3
	ldrsb r2, [r1, #0x20]
	and r1, r3, #3
	strb r2, [r4, r1]
	b _022F3B00
_022F3A6C:
	ldr r1, _022F3E58 ; =0x000001FF
	ands r7, r0, r1
	bne _022F3ACC
	cmp r5, #0
	mov r0, #0x204
	mov r1, #4
	beq _022F3AA0
	ldr r2, _022F3E5C ; =ov00_02327948
	ldr r2, [r2]
	blx r2
	str r0, [r5]
	mov r5, r0
	b _022F3AB4
_022F3AA0:
	ldr r2, _022F3E5C ; =ov00_02327948
	ldr r2, [r2]
	blx r2
	mov r5, r0
	str r5, [sb, #0x1c]
_022F3AB4:
	cmp r5, #0
	moveq r0, #1
	streq r0, [sp, #4]
	beq _022F40CC
	mov r0, #0
	str r0, [r5]
_022F3ACC:
	mov r0, #0
	add r2, r5, #4
	str r0, [sp]
	mov r0, r8
	mov r1, r6
	add r2, r2, r7
	mov r3, #1
	bl ov00_022F2B00
	add r1, r5, r7
	ldrsb r2, [r1, #4]
	ldr r1, [sp, #0x38]
	and r1, r1, #3
	strb r2, [r4, r1]
_022F3B00:
	cmp r0, #0
	movle r0, #0xa
	strle r0, [sp, #4]
	ble _022F40CC
	ldr r1, [sp, #0x38]
	add r0, r1, r0
	str r0, [sp, #0x38]
	sub r1, r0, #4
	and r1, r1, #3
	ldrsb r1, [r4, r1]
	cmp r1, #0xd
	bne _022F3A24
	sub r1, r0, #3
	and r1, r1, #3
	ldrsb r1, [r4, r1]
	cmp r1, #0xa
	bne _022F3A24
	sub r1, r0, #2
	and r1, r1, #3
	ldrsb r1, [r4, r1]
	cmp r1, #0xd
	bne _022F3A24
	sub r1, r0, #1
	and r1, r1, #3
	ldrsb r1, [r4, r1]
	cmp r1, #0xa
	bne _022F3A24
	str r0, [sb]
	ldr r0, [sb]
	cmp r0, #0
	beq _022F40CC
	ldr r1, _022F3E54 ; =ov00_02328388
	mov r0, sb
	mov r2, #0
	mov r3, #0xe
	bl ov00_022F1CFC
	cmp r0, #0
	beq _022F40CC
	ldr r0, _022F3E54 ; =ov00_02328388
	ldr r1, _022F3E60 ; =ov00_0231A6F4
	mov r2, #5
	bl ov00_022F2BC0
	cmp r0, #0
	ldreq r0, _022F3E54 ; =ov00_02328388
	ldreqsb r0, [r0, #8]
	cmpeq r0, #0x20
	bne _022F40CC
	ldr r0, _022F3E64 ; =ov00_02328391
	mov r1, #3
	bl ov00_022F43BC
	cmp r0, #0
	blt _022F40CC
	ldr r2, [sb]
	add r3, sp, #0x30
	mov r0, sb
	mov r1, #0xc
	bl ov00_022F1AEC
	cmp r0, #0
	blt _022F40CC
	ldr r1, _022F3E68 ; =ov00_0231A6FC
	add r2, sp, #0x34
	mov r0, sb
	bl ov00_022F2758
	movs r5, r0
	moveq r0, #0
	streq r0, [sp, #4]
	beq _022F40CC
	cmp r5, #0x400
	bgt _022F40CC
	cmp r5, #0
	ble _022F3C54
	ldr r2, [sp, #0x34]
	ldr r1, _022F3E54 ; =ov00_02328388
	mov r0, sb
	mov r3, r5
	bl ov00_022F1CFC
	cmp r0, #0
	beq _022F40CC
	ldr r0, _022F3E54 ; =ov00_02328388
	mov r1, r5
	bl ov00_022F43BC
	movs r5, r0
	bmi _022F40CC
	str r5, [r8, #0x14]
	b _022F3C5C
_022F3C54:
	mvn r0, #0
	str r0, [r8, #0x14]
_022F3C5C:
	ldr r1, _022F3E6C ; =ov00_0231A70C
	add r2, sp, #0x34
	mov r0, sb
	bl ov00_022F2758
	str r0, [sp, #8]
	cmp r0, #0
	beq _022F40CC
	bge _022F3CBC
	ldr r0, _022F3E54 ; =ov00_02328388
	mov r2, #0
	ldrsb r1, [r0, #5]
	ldrsb r3, [r0, #7]
	add r0, sp, #0x24
	strb r1, [sp, #0x24]
	mov r1, #2
	strb r3, [sp, #0x25]
	strb r2, [sp, #0x26]
	bl ov00_022F43BC
	cmp r0, #0xb
	movge r0, #1
	strge r0, [sp, #8]
	movlt r0, #0
	strlt r0, [sp, #8]
	b _022F3CFC
_022F3CBC:
	cmp r0, #0x400
	mov r0, #0
	strgt r0, [sp, #8]
	bgt _022F3CFC
	ldr r1, [sp, #0x34]
	ldr r2, [sp, #8]
	str r0, [sp]
	ldr r3, _022F3E70 ; =ov00_0231A718
	mov r0, sb
	add r2, r1, r2
	bl ov00_022F1C2C
	cmp r0, #0
	moveq r0, #1
	streq r0, [sp, #8]
	movne r0, #0
	strne r0, [sp, #8]
_022F3CFC:
	ldr r1, _022F3E74 ; =ov00_0231A724
	add r2, sp, #0x34
	mov r0, sb
	bl ov00_022F2758
	cmp r0, #0
	beq _022F40CC
	cmp r0, #0x400
	movgt r1, #0
	bgt _022F3D58
	cmp r0, #0
	ble _022F3D54
	ldr r1, [sp, #0x34]
	ldr r3, _022F3E78 ; =ov00_0231A738
	add r2, r1, r0
	mov r0, #0x3b
	str r0, [sp]
	mov r0, sb
	bl ov00_022F1C2C
	cmp r0, #0
	moveq r1, #1
	movne r1, #0
	b _022F3D58
_022F3D54:
	mov r1, #0
_022F3D58:
	ldr r0, [r8, #0x40]
	cmp r0, #2
	beq _022F40CC
	cmp r5, #0
	blt _022F3E7C
	mov r4, #0
	b _022F3DA8
_022F3D74:
	str r4, [sp]
	ldr r2, [sb, #4]
	mov r0, r8
	mov r1, r6
	mov r3, r5
	bl ov00_022F1E24
	cmp r0, #0
	blt _022F40CC
	beq _022F3DC4
	ldr r1, [sb, #4]
	sub r5, r5, r0
	add r0, r1, r0
	str r0, [sb, #4]
_022F3DA8:
	cmp r5, #0
	ble _022F3DC4
	ldr r1, [sb, #4]
	mov r0, sb
	bl ov00_022F1DE8
	cmp r0, #0
	beq _022F3D74
_022F3DC4:
	cmp r5, #0
	beq _022F3DF0
	ldr r1, [sb, #4]
	mov r0, sb
	bl ov00_022F1DE8
	cmp r0, #0
	movne r0, #6
	strne r0, [sp, #4]
	moveq r0, #0xa
	streq r0, [sp, #4]
	b _022F40CC
_022F3DF0:
	mov r0, #0
	str r0, [sp, #4]
	b _022F40CC
	.align 2, 0
_022F3DFC: .word ov00_02328340
_022F3E00: .word ov00_02327954
_022F3E04: .word ov00_02327950
_022F3E08: .word 0x0000CC8D
_022F3E0C: .word ov00_0231A630
_022F3E10: .word ov00_0231A638
_022F3E14: .word ov00_0231A640
_022F3E18: .word ov00_0231A648
_022F3E1C: .word ov00_0231A64C
_022F3E20: .word ov00_0231A658
_022F3E24: .word ov00_0231A660
_022F3E28: .word ov00_0231A664
_022F3E2C: .word ov00_0232794C
_022F3E30: .word ov00_0231A668
_022F3E34: .word ov00_0231A698
_022F3E38: .word ov00_0231A6CC
_022F3E3C: .word ov00_023183BC
_022F3E40: .word ov00_0231A6E0
_022F3E44: .word ov00_023183E4
_022F3E48: .word ov00_0231A6E4
_022F3E4C: .word ov00_0231A6EC
_022F3E50: .word ov00_0231A6F0
_022F3E54: .word ov00_02328388
_022F3E58: .word 0x000001FF
_022F3E5C: .word ov00_02327948
_022F3E60: .word ov00_0231A6F4
_022F3E64: .word ov00_02328391
_022F3E68: .word ov00_0231A6FC
_022F3E6C: .word ov00_0231A70C
_022F3E70: .word ov00_0231A718
_022F3E74: .word ov00_0231A724
_022F3E78: .word ov00_0231A738
_022F3E7C:
	mov r0, #0xa
	cmp r1, #0
	str r0, [sp, #4]
	beq _022F4020
	mov r7, #0
	ldr r5, _022F3E54 ; =ov00_02328388
	add r4, sp, #0x40
	mov sl, r7
_022F3E9C:
	mov r0, #0
	strb r0, [sp, #0x40]
	strb r0, [sp, #0x41]
	str r0, [sp, #0x38]
_022F3EAC:
	str r7, [sp]
	ldr r2, [sp, #0x38]
	mov r0, r8
	mov r1, r6
	mov r3, #1
	add r2, r5, r2
	bl ov00_022F2B00
	cmp r0, #0
	blt _022F40CC
	ldr r1, [sp, #0x38]
	ldrsb r0, [r5, r1]
	and r2, r1, #1
	strb r0, [r4, r2]
	cmp r0, #0x3b
	beq _022F3F04
	cmp r0, #0xa
	bne _022F3F4C
	sub r2, r1, #1
	and r2, r2, #1
	ldrsb r2, [r4, r2]
	cmp r2, #0xd
	bne _022F3F4C
_022F3F04:
	cmp r0, #0xa
	subeq r0, r1, #1
	streq r0, [sp, #0x34]
	beq _022F3F2C
	str r1, [sp, #0x34]
	mov r0, r8
	mov r1, r6
	bl ov00_022F2D14
	cmp r0, #0
	ble _022F40CC
_022F3F2C:
	ldr r1, [sp, #0x34]
	cmp r1, #0
	beq _022F40CC
	mov r0, r5
	bl ov00_022F42D4
	movs fp, r0
	bmi _022F40CC
	b _022F3F60
_022F3F4C:
	ldr r0, [sp, #0x38]
	add r0, r0, #1
	str r0, [sp, #0x38]
	cmp r0, #0x400
	blt _022F3EAC
_022F3F60:
	ldr r0, [sp, #0x38]
	cmp r0, #0x400
	moveq r0, #7
	streq r0, [sp, #4]
	beq _022F40CC
	cmp fp, #0
	ble _022F4008
	ble _022F3E9C
_022F3F80:
	str sl, [sp]
	mov r0, r8
	mov r1, r6
	ldr r2, [sb, #4]
	mov r3, fp
	bl ov00_022F1E24
	cmp r0, #0
	ble _022F40CC
	ldr r1, [sb, #4]
	subs fp, fp, r0
	add r0, r1, r0
	str r0, [sb, #4]
	bne _022F3FFC
	mov r0, #0
	str r0, [sp]
	mov r0, r8
	mov r1, r6
	mov r2, r5
	mov r3, #1
	bl ov00_022F2B00
	cmp r0, #0
	ble _022F40CC
	mov r0, #0
	str r0, [sp]
	mov r0, r8
	mov r1, r6
	mov r2, r5
	mov r3, #1
	bl ov00_022F2B00
	cmp r0, #0
	ble _022F40CC
_022F3FFC:
	cmp fp, #0
	bgt _022F3F80
	b _022F3E9C
_022F4008:
	mov r0, r8
	mov r1, r6
	bl ov00_022F2D14
	mov r0, #0
	str r0, [sp, #4]
	b _022F40CC
_022F4020:
	ldr r1, [sb, #4]
	mov r0, sb
	bl ov00_022F1DE8
	cmp r0, #0
	bne _022F40CC
	mov r5, #0
	ldr r4, _022F3E54 ; =ov00_02328388
	mov sl, #1
	mov r7, r5
_022F4044:
	mov r0, r8
	mov r1, r6
	ldr r2, [sb, #4]
	mov r3, r7
	bl ov00_022F1DFC
	cmp r0, #0
	blt _022F40CC
	moveq r0, #0
	streq r0, [sp, #4]
	beq _022F40CC
	ldr r1, [sb, #4]
	add r0, r1, r0
	str r0, [sb, #4]
	mov r0, sb
	ldr r1, [sb, #4]
	bl ov00_022F1DE8
	cmp r0, #0
	beq _022F40B8
	str r5, [sp]
	mov r0, r8
	mov r1, r6
	mov r2, r4
	mov r3, sl
	bl ov00_022F2B00
	cmp r0, #0
	blt _022F40CC
	movne r0, #6
	strne r0, [sp, #4]
	bne _022F40CC
_022F40B8:
	mov r0, sb
	ldr r1, [sb, #4]
	bl ov00_022F1DE8
	cmp r0, #0
	beq _022F4044
_022F40CC:
	bl ov00_022F1914
	ldr r0, _022F3E04 ; =ov00_02327950
	ldr r1, _022F3E2C ; =ov00_0232794C
	ldr r0, [r0]
	ldr r1, [r1]
	blx r1
	ldr r0, _022F3E04 ; =ov00_02327950
	mov r1, #0
	str r1, [r0]
	bl ov00_022F1928
	ldr r0, [r8, #4]
	cmp r0, #0
	movne r0, #8
	strne r0, [sp, #4]
	cmp r6, #0
	blt _022F4154
	ldr r0, [sp, #8]
	cmp r0, #0
	beq _022F4124
	ldr r0, [sp, #4]
	cmp r0, #0
	beq _022F4154
_022F4124:
	mov r0, r8
	mov r1, r6
	bl ov00_022F2A38
	cmp r0, #0
	movlt r0, #0xa
	strlt r0, [sp, #4]
	add r1, sp, #0x3c
	mov r0, r6
	bl ov00_022F2DDC
	mov r0, #0
	mvn r6, #0
	str r0, [sp, #8]
_022F4154:
	ldr r0, [sp, #4]
	cmp r0, #0
	moveq r0, #1
	streq r0, [sb, #8]
	beq _022F417C
	mov r0, #0
	str r0, [sb, #8]
	ldr r1, _022F41D8 ; =ov00_02327944
	ldr r0, [sp, #4]
	str r0, [r1]
_022F417C:
	ldr r4, [r8, #0x2c]
	mov r0, r8
	ldr r5, [r8, #0x3c]
	bl ov00_022F2474
	ldr r0, [sp, #4]
	mov r1, sb
	mov r2, r4
	blx r5
_022F419C:
	ldr r0, _022F3E00 ; =ov00_02327954
	ldr r0, [r0]
	cmp r0, #0
	beq _022F2F20
_022F41AC:
	cmp r6, #0
	blt _022F41CC
	mov r0, r8
	mov r1, r6
	bl ov00_022F2A38
	add r1, sp, #0x3c
	mov r0, r6
	bl ov00_022F2DDC
_022F41CC:
	bl ov00_022F2E7C
	add sp, sp, #0x4c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022F41D8: .word ov00_02327944
	arm_func_end ov00_022F2EDC

	arm_func_start ov00_022F41DC
ov00_022F41DC: ; 0x022F41DC
	ldrsb r2, [r0], #1
	mov r1, #0
	cmp r2, #0
	beq _022F423C
_022F41EC:
	cmp r2, #0x30
	blt _022F41FC
	cmp r2, #0x39
	ble _022F4224
_022F41FC:
	cmp r2, #0x41
	blt _022F420C
	cmp r2, #0x5a
	ble _022F4224
_022F420C:
	cmp r2, #0x61
	blt _022F421C
	cmp r2, #0x7a
	ble _022F4224
_022F421C:
	cmp r2, #0x20
	bne _022F422C
_022F4224:
	add r1, r1, #1
	b _022F4230
_022F422C:
	add r1, r1, #3
_022F4230:
	ldrsb r2, [r0], #1
	cmp r2, #0
	bne _022F41EC
_022F423C:
	mov r0, r1
	bx lr
	arm_func_end ov00_022F41DC

	arm_func_start ov00_022F4244
ov00_022F4244: ; 0x022F4244
	cmp r1, #0x20
	bne _022F425C
	mov r1, #0x2b
	strb r1, [r0]
	mov r0, #1
	bx lr
_022F425C:
	cmp r1, #0x30
	blt _022F426C
	cmp r1, #0x39
	ble _022F428C
_022F426C:
	cmp r1, #0x41
	blt _022F427C
	cmp r1, #0x5a
	ble _022F428C
_022F427C:
	cmp r1, #0x61
	blt _022F4298
	cmp r1, #0x7a
	bgt _022F4298
_022F428C:
	strb r1, [r0]
	mov r0, #1
	bx lr
_022F4298:
	mov r2, r1, asr #4
	and r3, r2, #0xf
	mov r2, #0x25
	strb r2, [r0]
	cmp r3, #0xa
	addlt r2, r3, #0x30
	addge r2, r3, #0x37
	and r1, r1, #0xf
	cmp r1, #0xa
	addlt r1, r1, #0x30
	strb r2, [r0, #1]
	addge r1, r1, #0x37
	strb r1, [r0, #2]
	mov r0, #3
	bx lr
	arm_func_end ov00_022F4244

	arm_func_start ov00_022F42D4
ov00_022F42D4: ; 0x022F42D4
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	cmp r1, #8
	mvngt r0, #0
	ldmgtia sp!, {r4, r5, r6, r7, r8, pc}
	bne _022F42F8
	ldrsb r2, [r0]
	cmp r2, #0x37
	mvngt r0, #0
	ldmgtia sp!, {r4, r5, r6, r7, r8, pc}
_022F42F8:
	mov r5, #0
	mov r6, r5
	mov r7, r5
	cmp r1, #0
	ble _022F43B4
	mov lr, #1
	mov r3, lr
	mov ip, lr
	mov r4, r5
_022F431C:
	ldrsb r8, [r0, r5]
	mov r2, r4
	cmp r8, #0x41
	blt _022F4334
	cmp r8, #0x5a
	movle r2, lr
_022F4334:
	cmp r2, #0
	addne r8, r8, #0x20
	mov r2, r8, lsl #0x18
	mov r2, r2, asr #0x18
	cmp r2, #0x30
	blt _022F4364
	cmp r2, #0x39
	bgt _022F4364
	add r2, r2, r6, lsl #4
	mov r7, ip
	sub r6, r2, #0x30
	b _022F43A8
_022F4364:
	cmp r2, #0x61
	blt _022F4384
	cmp r2, #0x66
	bgt _022F4384
	add r2, r2, r6, lsl #4
	mov r7, r3
	sub r6, r2, #0x57
	b _022F43A8
_022F4384:
	cmp r7, #0
	beq _022F4398
	cmp r2, #0x20
	cmpne r2, #0
	beq _022F43B4
_022F4398:
	cmp r7, #0
	cmpeq r2, #0x20
	mvnne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
_022F43A8:
	add r5, r5, #1
	cmp r5, r1
	blt _022F431C
_022F43B4:
	mov r0, r6
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022F42D4

	arm_func_start ov00_022F43BC
ov00_022F43BC: ; 0x022F43BC
	stmdb sp!, {r3, r4, r5, lr}
	cmp r1, #0xa
	mvngt r0, #0
	ldmgtia sp!, {r3, r4, r5, pc}
	mov lr, #0
	mov r4, lr
	mov r3, lr
	cmp r1, #0
	ble _022F444C
	mov ip, #1
	mov r2, #0xa
_022F43E8:
	cmp r3, #0
	ldrsb r5, [r0, lr]
	beq _022F4400
	cmp r5, #0x20
	cmpne r5, #0
	beq _022F444C
_022F4400:
	cmp r3, #0
	cmpeq r5, #0x20
	beq _022F4440
	cmp r5, #0x30
	blt _022F441C
	cmp r5, #0x39
	ble _022F4424
_022F441C:
	mvn r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022F4424:
	mla r3, r4, r2, r5
	mov r5, r4
	sub r4, r3, #0x30
	cmp r5, r4
	mov r3, ip
	mvngt r0, #0
	ldmgtia sp!, {r3, r4, r5, pc}
_022F4440:
	add lr, lr, #1
	cmp lr, r1
	blt _022F43E8
_022F444C:
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022F43BC

	arm_func_start ov00_022F4454
ov00_022F4454: ; 0x022F4454
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x24
	ldr r6, _022F450C ; =ov00_02318430
	add r4, sp, #0
	mov sl, r0
	mov sb, r1
	ldmia r6!, {r0, r1, r2, r3}
	mov r5, r4
	stmia r4!, {r0, r1, r2, r3}
	ldmia r6!, {r0, r1, r2, r3}
	stmia r4!, {r0, r1, r2, r3}
	ldr r0, [r6]
	mov r7, #0
	str r0, [r4]
	mov r6, r7
	mov r1, r7
	mov fp, #1
	mov r4, #0x30
_022F449C:
	ldr r8, [r5, r6, lsl #2]
	cmp sb, r8
	blo _022F44D4
	mov r0, sb
	mov r1, r8
	bl _u32_div_f
	mul r2, r0, r8
	cmp sl, #0
	addne r0, r0, #0x30
	strneb r0, [sl, r7]
	mov r1, fp
	sub sb, sb, r2
	add r7, r7, #1
	b _022F44E8
_022F44D4:
	cmp r1, #0
	beq _022F44E8
	cmp sl, #0
	strneb r4, [sl, r7]
	add r7, r7, #1
_022F44E8:
	add r6, r6, #1
	cmp r6, #9
	blt _022F449C
	cmp sl, #0
	addne r0, sb, #0x30
	strneb r0, [sl, r7]
	add r0, r7, #1
	add sp, sp, #0x24
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022F450C: .word ov00_02318430
	arm_func_end ov00_022F4454

	arm_func_start ov00_022F4510
ov00_022F4510: ; 0x022F4510
	stmdb sp!, {r4, r5, r6, lr}
	mov ip, #1
	mov r3, #0
	mov r2, ip
	mov lr, r3
	b _022F4540
_022F4528:
	cmp r5, #0
	cmpne r5, #0x20
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	add r0, r0, #1
	add r1, r1, #1
_022F4540:
	ldrsb r6, [r1]
	mov r4, lr
	cmp r6, #0x41
	blt _022F4558
	cmp r6, #0x5a
	movle r4, ip
_022F4558:
	ldrsb r5, [r0]
	cmp r4, #0
	addne r6, r6, #0x20
	mov r4, r3
	cmp r5, #0x41
	blt _022F4578
	cmp r5, #0x5a
	movle r4, r2
_022F4578:
	cmp r4, #0
	addne r4, r5, #0x20
	moveq r4, r5
	cmp r4, r6
	beq _022F4528
	mvn r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022F4510

	arm_func_start ov00_022F4594
ov00_022F4594: ; 0x022F4594
	stmdb sp!, {r3, lr}
	mov ip, #0
	cmp r1, #0
	mov lr, ip
	sub r1, r1, #1
	beq _022F45F4
	mov r2, #0xa
_022F45B0:
	ldrsb r3, [r0]
	cmp r3, #0x20
	beq _022F45E4
	cmp r3, #0x30
	blt _022F45E4
	cmp r3, #0x39
	bgt _022F45E4
	mla r3, lr, r2, r3
	add ip, ip, #1
	cmp ip, #9
	sub lr, r3, #0x30
	mvngt r0, #0
	ldmgtia sp!, {r3, pc}
_022F45E4:
	cmp r1, #0
	add r0, r0, #1
	sub r1, r1, #1
	bne _022F45B0
_022F45F4:
	cmp ip, #0
	mvneq lr, #0
	mov r0, lr
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F4594

	arm_func_start ov00_022F4604
ov00_022F4604: ; 0x022F4604
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	cmp r1, r3
	mvnlt r0, #0
	ldmltia sp!, {r4, r5, r6, r7, r8, pc}
	sub r1, r1, r3
	add r8, r1, #1
	cmp r8, #0
	mov r4, #0
	ble _022F4680
	ldrsb r7, [r2]
	mov lr, #1
_022F4630:
	ldrsb r1, [r0, r4]
	cmp r7, r1
	bne _022F4674
	mov r5, lr
	cmp r3, #1
	add r6, r0, r4
	ble _022F4668
_022F464C:
	ldrsb ip, [r6, r5]
	ldrsb r1, [r2, r5]
	cmp ip, r1
	bne _022F4668
	add r5, r5, #1
	cmp r5, r3
	blt _022F464C
_022F4668:
	cmp r5, r3
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
_022F4674:
	add r4, r4, #1
	cmp r4, r8
	blt _022F4630
_022F4680:
	mvn r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022F4604

	arm_func_start ov00_022F4688
ov00_022F4688: ; 0x022F4688
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r2, [r4, #0x10]
	cmp r2, #0
	ldmeqia sp!, {r4, pc}
	bl ov00_022F47A8
	ldr r1, [r4, #0x10]
	blx r1
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022F4688

	arm_func_start ov00_022F46AC
ov00_022F46AC: ; 0x022F46AC
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r1, [r4, #4]
	ldr r0, [r4, #0xc]
	add r2, r1, r0
	str r2, [r4, #4]
	ldr r0, [r4, #8]
	mul r1, r2, r0
	ldr r0, [r4, #0x14]
	bl ov00_022F5AFC
	str r0, [r4, #0x14]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022F46AC

	arm_func_start ov00_022F46DC
ov00_022F46DC: ; 0x022F46DC
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r1
	mov r5, r0
	mov r1, r2
	bl ov00_022F47A8
	ldr r2, [r5, #8]
	mov r1, r4
	bl memcpy
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022F46DC

	arm_func_start ov00_022F4700
ov00_022F4700: ; 0x022F4700
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r6, r1
	mov r0, #0x18
	mov r5, r2
	bl ov00_022F5AE4
	mov r4, r0
	cmp r6, #0
	moveq r6, #8
	mov r0, #0
	stmia r4, {r0, r6, r7}
	str r6, [r4, #0xc]
	str r5, [r4, #0x10]
	ldr r1, [r4, #4]
	cmp r1, #0
	beq _022F474C
	ldr r0, [r4, #8]
	mul r0, r1, r0
	bl ov00_022F5AE4
_022F474C:
	str r0, [r4, #0x14]
	mov r0, r4
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022F4700

	arm_func_start ov00_022F4758
ov00_022F4758: ; 0x022F4758
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	ldr r0, [r5]
	mov r4, #0
	cmp r0, #0
	ble _022F478C
_022F4770:
	mov r0, r5
	mov r1, r4
	bl ov00_022F4688
	ldr r0, [r5]
	add r4, r4, #1
	cmp r4, r0
	blt _022F4770
_022F478C:
	ldr r0, [r5, #0x14]
	bl ov00_022F5B14
	mov r0, r5
	bl ov00_022F5B14
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022F4758

	arm_func_start ov00_022F47A0
ov00_022F47A0: ; 0x022F47A0
	ldr r0, [r0]
	bx lr
	arm_func_end ov00_022F47A0

	arm_func_start ov00_022F47A8
ov00_022F47A8: ; 0x022F47A8
	cmp r1, #0
	blt _022F47BC
	ldr r2, [r0]
	cmp r1, r2
	blt _022F47C4
_022F47BC:
	mov r0, #0
	bx lr
_022F47C4:
	ldr r3, [r0, #0x14]
	ldr r2, [r0, #8]
	mla r0, r2, r1, r3
	bx lr
	arm_func_end ov00_022F47A8

	arm_func_start ov00_022F47D4
ov00_022F47D4: ; 0x022F47D4
	stmdb sp!, {r3, lr}
	cmp r0, #0
	ldmeqia sp!, {r3, pc}
	ldr r2, [r0]
	bl ov00_022F47EC
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F47D4

	arm_func_start ov00_022F47EC
ov00_022F47EC: ; 0x022F47EC
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r6, r0
	ldr r7, [r6]
	ldr r3, [r6, #4]
	mov r5, r1
	mov r4, r2
	cmp r7, r3
	bne _022F4810
	bl ov00_022F46AC
_022F4810:
	ldr r0, [r6]
	add r0, r0, #1
	sub r8, r0, #1
	str r0, [r6]
	cmp r4, r8
	bge _022F485C
	mov r0, r6
	add r1, r4, #1
	bl ov00_022F47A8
	mov r7, r0
	mov r0, r6
	mov r1, r4
	bl ov00_022F47A8
	mov r1, r0
	ldr r3, [r6, #8]
	sub r0, r8, r4
	mul r2, r3, r0
	mov r0, r7
	bl memmove
_022F485C:
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_022F46DC
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022F47EC

	arm_func_start ov00_022F4870
ov00_022F4870: ; 0x022F4870
	stmdb sp!, {r4, r5, lr}
	sub sp, sp, #0xc
	add r3, sp, #8
	stmia sp, {r2, r3}
	mov r5, r0
	mov r4, r1
	ldr r1, [r5, #0x14]
	ldr r2, [r5]
	ldr r3, [r5, #8]
	mov r0, r4
	bl ov00_022F4B30
	ldr r2, [r5, #0x14]
	ldr r1, [r5, #8]
	sub r0, r0, r2
	bl _s32_div_f
	mov r2, r0
	mov r0, r5
	mov r1, r4
	bl ov00_022F47EC
	add sp, sp, #0xc
	ldmia sp!, {r4, r5, pc}
	arm_func_end ov00_022F4870

	arm_func_start ov00_022F48C4
ov00_022F48C4: ; 0x022F48C4
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r4, r0
	ldr r2, [r4]
	mov r7, r1
	sub r6, r2, #1
	cmp r7, r6
	bge _022F490C
	bl ov00_022F47A8
	mov r5, r0
	mov r0, r4
	add r1, r7, #1
	bl ov00_022F47A8
	mov r1, r0
	ldr r3, [r4, #8]
	sub r0, r6, r7
	mul r2, r3, r0
	mov r0, r5
	bl memmove
_022F490C:
	ldr r0, [r4]
	sub r0, r0, #1
	str r0, [r4]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022F48C4

	arm_func_start ov00_022F491C
ov00_022F491C: ; 0x022F491C
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	bl ov00_022F4688
	mov r0, r5
	mov r1, r4
	bl ov00_022F48C4
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022F491C

	arm_func_start ov00_022F493C
ov00_022F493C: ; 0x022F493C
	stmdb sp!, {r4, r5, r6, lr}
	mov r4, r2
	mov r5, r1
	mov r6, r0
	mov r1, r4
	bl ov00_022F4688
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_022F46DC
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022F493C

	arm_func_start ov00_022F4968
ov00_022F4968: ; 0x022F4968
	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
	sub sp, sp, #0xc
	mov ip, #1
	movs r7, r0
	str ip, [sp, #8]
	ldrne r8, [r7]
	mov r6, r1
	cmpne r8, #0
	mov r5, r2
	mov r4, r3
	addeq sp, sp, #0xc
	mvneq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldr r1, [sp, #0x28]
	cmp r1, #0
	mov r1, r4
	beq _022F49D4
	bl ov00_022F47A8
	add r1, sp, #8
	str r5, [sp]
	str r1, [sp, #4]
	mov r1, r0
	ldr r3, [r7, #8]
	mov r0, r6
	sub r2, r8, r4
	bl ov00_022F4B30
	b _022F49F0
_022F49D4:
	bl ov00_022F47A8
	str r5, [sp]
	mov r1, r0
	ldr r3, [r7, #8]
	mov r0, r6
	sub r2, r8, r4
	bl ov00_022F4AD8
_022F49F0:
	cmp r0, #0
	ldrne r1, [sp, #8]
	cmpne r1, #0
	addeq sp, sp, #0xc
	mvneq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldr r2, [r7, #0x14]
	ldr r1, [r7, #8]
	sub r0, r0, r2
	bl _s32_div_f
	add sp, sp, #0xc
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022F4968

	arm_func_start ov00_022F4A20
ov00_022F4A20: ; 0x022F4A20
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	ldr r0, [r7]
	mov r6, r1
	mov r5, r2
	subs r4, r0, #1
	ldmmiia sp!, {r3, r4, r5, r6, r7, pc}
_022F4A3C:
	mov r0, r7
	mov r1, r4
	bl ov00_022F47A8
	mov r1, r5
	blx r6
	subs r4, r4, #1
	bpl _022F4A3C
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022F4A20

	arm_func_start ov00_022F4A5C
ov00_022F4A5C: ; 0x022F4A5C
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r8, r0
	ldr r0, [r8]
	mov r7, r1
	mov r6, r2
	subs r5, r0, #1
	bmi _022F4AA4
_022F4A78:
	mov r0, r8
	mov r1, r5
	bl ov00_022F47A8
	mov r1, r6
	mov r4, r0
	blx r7
	cmp r0, #0
	moveq r0, r4
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	subs r5, r5, #1
	bpl _022F4A78
_022F4AA4:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022F4A5C

	arm_func_start ov00_022F4AAC
ov00_022F4AAC: ; 0x022F4AAC
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	bl ov00_022F47A0
	subs r4, r0, #1
	ldmmiia sp!, {r3, r4, r5, pc}
_022F4AC0:
	mov r0, r5
	mov r1, r4
	bl ov00_022F491C
	subs r4, r4, #1
	bpl _022F4AC0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022F4AAC

	arm_func_start ov00_022F4AD8
ov00_022F4AD8: ; 0x022F4AD8
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	mov r8, r2
	mov sl, r0
	mov sb, r1
	mov r7, r3
	cmp r8, #0
	ldr r6, [sp, #0x20]
	mov r4, #0
	ble _022F4B28
	mov r5, r4
_022F4B00:
	mov r0, sl
	add r1, sb, r5
	blx r6
	cmp r0, #0
	mlaeq r0, r7, r4, sb
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	add r4, r4, #1
	cmp r4, r8
	add r5, r5, r7
	blt _022F4B00
_022F4B28:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	arm_func_end ov00_022F4AD8

	arm_func_start ov00_022F4B30
ov00_022F4B30: ; 0x022F4B30
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	ldr r7, [sp, #0x2c]
	mov r4, #0
	mov fp, r0
	mov sl, r1
	mov sb, r3
	str r4, [r7]
	subs r5, r2, #1
	ldr r8, [sp, #0x28]
	bmi _022F4B8C
_022F4B58:
	add r0, r4, r5
	mov r6, r0, asr #1
	mla r0, r6, sb, sl
	mov r1, fp
	blx r8
	cmp r0, #0
	moveq r1, #1
	streq r1, [r7]
	cmp r0, #0
	addlt r4, r6, #1
	subge r5, r6, #1
	cmp r4, r5
	ble _022F4B58
_022F4B8C:
	mla r0, r4, sb, sl
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022F4B30

	arm_func_start ov00_022F4B94
ov00_022F4B94: ; 0x022F4B94
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	ldr ip, [sp, #0x10]
	str r3, [sp]
	mov r3, r2
	mov r2, #4
	str ip, [sp, #4]
	bl ov00_022F4BBC
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F4B94

	arm_func_start ov00_022F4BBC
ov00_022F4BBC: ; 0x022F4BBC
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	mov sl, r0
	mov sb, r1
	mov r0, #0x14
	mov r8, r2
	mov r7, r3
	ldr r6, [sp, #0x24]
	bl ov00_022F5AE4
	mov r4, r0
	mov r0, sb, lsl #2
	bl ov00_022F5AE4
	str r0, [r4]
	cmp sb, #0
	mov r5, #0
	ble _022F4C1C
_022F4BF8:
	mov r0, sl
	mov r1, r8
	mov r2, r6
	bl ov00_022F4700
	ldr r1, [r4]
	str r0, [r1, r5, lsl #2]
	add r5, r5, #1
	cmp r5, sb
	blt _022F4BF8
_022F4C1C:
	str sb, [r4, #4]
	ldr r0, [sp, #0x20]
	str r6, [r4, #8]
	str r0, [r4, #0x10]
	mov r0, r4
	str r7, [r4, #0xc]
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	arm_func_end ov00_022F4BBC

	arm_func_start ov00_022F4C38
ov00_022F4C38: ; 0x022F4C38
	stmdb sp!, {r3, r4, r5, lr}
	movs r5, r0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r0, [r5, #4]
	mov r4, #0
	cmp r0, #0
	ble _022F4C70
_022F4C54:
	ldr r0, [r5]
	ldr r0, [r0, r4, lsl #2]
	bl ov00_022F4758
	ldr r0, [r5, #4]
	add r4, r4, #1
	cmp r4, r0
	blt _022F4C54
_022F4C70:
	ldr r0, [r5]
	bl ov00_022F5B14
	mov r0, r5
	bl ov00_022F5B14
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022F4C38

	arm_func_start ov00_022F4C84
ov00_022F4C84: ; 0x022F4C84
	stmdb sp!, {r4, r5, r6, lr}
	movs r6, r0
	mov r5, #0
	moveq r0, r5
	ldmeqia sp!, {r4, r5, r6, pc}
	ldr r0, [r6, #4]
	mov r4, r5
	cmp r0, #0
	ble _022F4CC8
_022F4CA8:
	ldr r0, [r6]
	ldr r0, [r0, r4, lsl #2]
	bl ov00_022F47A0
	ldr r1, [r6, #4]
	add r4, r4, #1
	cmp r4, r1
	add r5, r5, r0
	blt _022F4CA8
_022F4CC8:
	mov r0, r5
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022F4C84

	arm_func_start ov00_022F4CD0
ov00_022F4CD0: ; 0x022F4CD0
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #4
	movs r6, r0
	mov r5, r1
	addeq sp, sp, #4
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	ldr r1, [r6, #4]
	ldr r2, [r6, #0xc]
	mov r0, r5
	blx r2
	mov r3, #0
	str r3, [sp]
	ldr r1, [r6]
	mov r4, r0
	ldr r0, [r1, r4, lsl #2]
	ldr r2, [r6, #0x10]
	mov r1, r5
	bl ov00_022F4968
	mov r2, r0
	mvn r0, #0
	cmp r2, r0
	ldr r0, [r6]
	mov r1, r5
	bne _022F4D40
	ldr r0, [r0, r4, lsl #2]
	bl ov00_022F47D4
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, pc}
_022F4D40:
	ldr r0, [r0, r4, lsl #2]
	bl ov00_022F493C
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, pc}
	arm_func_end ov00_022F4CD0

	arm_func_start ov00_022F4D50
ov00_022F4D50: ; 0x022F4D50
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #4
	movs r6, r0
	mov r5, r1
	addeq sp, sp, #4
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	ldr r1, [r6, #4]
	ldr r2, [r6, #0xc]
	mov r0, r5
	blx r2
	mov r3, #0
	str r3, [sp]
	ldr r1, [r6]
	mov r4, r0
	ldr r0, [r1, r4, lsl #2]
	ldr r2, [r6, #0x10]
	mov r1, r5
	bl ov00_022F4968
	mov r1, r0
	mvn r0, #0
	cmp r1, r0
	addeq sp, sp, #4
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	ldr r0, [r6]
	ldr r0, [r0, r4, lsl #2]
	bl ov00_022F491C
	mov r0, #1
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, pc}
	arm_func_end ov00_022F4D50

	arm_func_start ov00_022F4DCC
ov00_022F4DCC: ; 0x022F4DCC
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #4
	movs r6, r0
	mov r5, r1
	addeq sp, sp, #4
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	ldr r1, [r6, #4]
	ldr r2, [r6, #0xc]
	mov r0, r5
	blx r2
	mov r3, #0
	str r3, [sp]
	ldr r1, [r6]
	mov r4, r0
	ldr r0, [r1, r4, lsl #2]
	ldr r2, [r6, #0x10]
	mov r1, r5
	bl ov00_022F4968
	mov r1, r0
	mvn r0, #0
	cmp r1, r0
	addeq sp, sp, #4
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	ldr r0, [r6]
	ldr r0, [r0, r4, lsl #2]
	bl ov00_022F47A8
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, pc}
	arm_func_end ov00_022F4DCC

	arm_func_start ov00_022F4E44
ov00_022F4E44: ; 0x022F4E44
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	ldr r0, [r7, #4]
	mov r6, r1
	mov r5, r2
	mov r4, #0
	cmp r0, #0
	ldmleia sp!, {r3, r4, r5, r6, r7, pc}
_022F4E64:
	ldr r0, [r7]
	mov r1, r6
	ldr r0, [r0, r4, lsl #2]
	mov r2, r5
	bl ov00_022F4A20
	ldr r0, [r7, #4]
	add r4, r4, #1
	cmp r4, r0
	blt _022F4E64
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022F4E44

	arm_func_start ov00_022F4E8C
ov00_022F4E8C: ; 0x022F4E8C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	ldr r0, [r7, #4]
	mov r6, r1
	mov r5, r2
	cmp r0, #0
	mov r4, #0
	ble _022F4ED8
_022F4EAC:
	ldr r0, [r7]
	mov r1, r6
	ldr r0, [r0, r4, lsl #2]
	mov r2, r5
	bl ov00_022F4A5C
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r0, [r7, #4]
	add r4, r4, #1
	cmp r4, r0
	blt _022F4EAC
_022F4ED8:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022F4E8C

	arm_func_start ov00_022F4EE0
ov00_022F4EE0: ; 0x022F4EE0
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, #0
	ldr ip, _022F4F38 ; =ov00_02318454
	mov r5, r4
_022F4EF0:
	ldrb r2, [r0, r4]
	add lr, r1, r5
	mov r2, r2, lsr #4
	ldrsb r2, [ip, r2]
	strb r2, [r1, r5]
	ldrb r2, [r0, r4]
	add r4, r4, #1
	cmp r4, #0x10
	mov r3, r2, lsr #0x1f
	rsb r2, r3, r2, lsl #28
	add r2, r3, r2, ror #28
	ldrsb r2, [ip, r2]
	add r5, r5, #2
	strb r2, [lr, #1]
	blo _022F4EF0
	mov r0, #0
	strb r0, [r1, #0x20]
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022F4F38: .word ov00_02318454
	arm_func_end ov00_022F4EE0

	arm_func_start ov00_022F4F3C
ov00_022F4F3C: ; 0x022F4F3C
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #0x68
	mov r6, r0
	add r0, sp, #0x10
	mov r5, r1
	mov r4, r2
	bl ov00_022D4A4C
	add r0, sp, #0x10
	mov r1, r6
	mov r2, r5
	bl ov00_022D4A58
	add r0, sp, #0
	add r1, sp, #0x10
	bl ov00_022D4A64
	add r0, sp, #0
	mov r1, r4
	bl ov00_022F4EE0
	add sp, sp, #0x68
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022F4F3C

	arm_func_start SocketCastError
SocketCastError: ; 0x022F4F88
	cmp r0, #0
	ldrlt r2, _022F4F9C ; =ov00_02328788
	strlt r0, [r2, #4]
	movlt r0, r1
	bx lr
	.align 2, 0
_022F4F9C: .word ov00_02328788
	arm_func_end SocketCastError

	arm_func_start SocketCreate
SocketCreate: ; 0x022F4FA0
	stmdb sp!, {r3, lr}
	bl socket
	mvn r1, #0
	bl SocketCastError
	ldmia sp!, {r3, pc}
	arm_func_end SocketCreate

	arm_func_start SocketClose
SocketClose: ; 0x022F4FB4
	stmdb sp!, {r3, lr}
	bl CloseVeneer
	mvn r1, #0
	bl SocketCastError
	ldmia sp!, {r3, pc}
	arm_func_end SocketClose

	arm_func_start ov00_022F4FC8
ov00_022F4FC8: ; 0x022F4FC8
	stmdb sp!, {r3, lr}
	bl ov00_022CF3BC
	mvn r1, #0
	bl SocketCastError
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F4FC8

	arm_func_start SocketBind
SocketBind: ; 0x022F4FDC
	stmdb sp!, {r4, lr}
	sub sp, sp, #8
	ldrh r3, [r1, #2]
	cmp r3, #0
	addeq sp, sp, #8
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	add r4, sp, #0
	mov lr, #4
_022F5000:
	ldrb ip, [r1]
	ldrb r3, [r1, #1]
	add r1, r1, #2
	subs lr, lr, #1
	strb ip, [r4]
	strb r3, [r4, #1]
	add r4, r4, #2
	bne _022F5000
	add r1, sp, #0
	strb r2, [sp]
	bl bind
	mvn r1, #0
	bl SocketCastError
	add sp, sp, #8
	ldmia sp!, {r4, pc}
	arm_func_end SocketBind

	arm_func_start SocketConnect
SocketConnect: ; 0x022F503C
	stmdb sp!, {r4, lr}
	sub sp, sp, #8
	add r4, sp, #0
	mov lr, #4
_022F504C:
	ldrb ip, [r1]
	ldrb r3, [r1, #1]
	add r1, r1, #2
	subs lr, lr, #1
	strb ip, [r4]
	strb r3, [r4, #1]
	add r4, r4, #2
	bne _022F504C
	add r1, sp, #0
	strb r2, [sp]
	bl connect
	mvn r1, #0
	bl SocketCastError
	add sp, sp, #8
	ldmia sp!, {r4, pc}
	arm_func_end SocketConnect

	arm_func_start SocketRecv
SocketRecv: ; 0x022F5088
	stmdb sp!, {r3, lr}
	bl recv
	mvn r1, #0
	bl SocketCastError
	ldmia sp!, {r3, pc}
	arm_func_end SocketRecv

	arm_func_start SocketRecvFrom
SocketRecvFrom: ; 0x022F509C
	stmdb sp!, {r3, r4, r5, lr}
	ldr r4, [sp, #0x14]
	ldr r5, [sp, #0x10]
	ldr ip, [r4]
	strb ip, [r5]
	str r5, [sp]
	bl recvfrom
	ldrb r2, [r5]
	mvn r1, #0
	str r2, [r4]
	bl SocketCastError
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end SocketRecvFrom

	arm_func_start SocketSend
SocketSend: ; 0x022F50CC
	stmdb sp!, {r3, lr}
	bl send
	mvn r1, #0
	bl SocketCastError
	ldmia sp!, {r3, pc}
	arm_func_end SocketSend

	arm_func_start SocketSendTo
SocketSendTo: ; 0x022F50E0
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #0xc
	ldr r5, [sp, #0x20]
	add r6, sp, #4
	mov r4, #4
_022F50F4:
	ldrb lr, [r5]
	ldrb ip, [r5, #1]
	add r5, r5, #2
	subs r4, r4, #1
	strb lr, [r6]
	strb ip, [r6, #1]
	add r6, r6, #2
	bne _022F50F4
	ldr lr, [sp, #0x24]
	add ip, sp, #4
	strb lr, [sp, #4]
	str ip, [sp]
	bl sendto
	mvn r1, #0
	bl SocketCastError
	add sp, sp, #0xc
	ldmia sp!, {r3, r4, r5, r6, pc}
	arm_func_end SocketSendTo

	arm_func_start ov00_022F5138
ov00_022F5138: ; 0x022F5138
	ldr ip, _022F5148 ; =SocketCastError
	mov r0, #0
	sub r1, r0, #1
	bx ip
	.align 2, 0
_022F5148: .word SocketCastError
	arm_func_end ov00_022F5138

	arm_func_start ov00_022F514C
ov00_022F514C: ; 0x022F514C
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r2
	ldr r2, [r4]
	mov r5, r1
	strb r2, [r5]
	bl ov00_022CF494
	ldrb r2, [r5]
	mvn r1, #0
	str r2, [r4]
	bl SocketCastError
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022F514C

	arm_func_start ov00_022F5178
ov00_022F5178: ; 0x022F5178
	stmdb sp!, {r3, lr}
	add r1, sp, #0
	bl ov00_022CF824
	cmp r0, #0
	mvneq r0, #0
	ldrne r0, [sp]
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F5178

	arm_func_start ov00_022F5194
ov00_022F5194: ; 0x022F5194
	ldr r0, _022F51A0 ; =ov00_02328788
	ldr r0, [r0, #4]
	bx lr
	.align 2, 0
_022F51A0: .word ov00_02328788
	arm_func_end ov00_022F5194

	arm_func_start ov00_022F51A4
ov00_022F51A4: ; 0x022F51A4
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #8
	movs r6, r1
	mov r1, #0
	strh r1, [sp, #4]
	str r0, [sp]
	ldrnesh r0, [sp, #4]
	mov r5, r2
	mov r2, #0
	orrne r0, r0, #1
	strneh r0, [sp, #4]
	cmp r5, #0
	ldrnesh r0, [sp, #4]
	mov r4, r3
	mov r3, r2
	orrne r0, r0, #8
	strneh r0, [sp, #4]
	add r0, sp, #0
	mov r1, #1
	strh r2, [sp, #6]
	bl ov00_022CF918
	cmp r0, #0
	addlt sp, sp, #8
	mvnlt r0, #0
	ldmltia sp!, {r4, r5, r6, pc}
	cmp r6, #0
	beq _022F5234
	cmp r0, #0
	ble _022F522C
	ldrsh r1, [sp, #6]
	tst r1, #0x41
	movne r1, #1
	strne r1, [r6]
	bne _022F5234
_022F522C:
	mov r1, #0
	str r1, [r6]
_022F5234:
	cmp r5, #0
	beq _022F5260
	cmp r0, #0
	ble _022F5258
	ldrsh r1, [sp, #6]
	tst r1, #8
	movne r1, #1
	strne r1, [r5]
	bne _022F5260
_022F5258:
	mov r1, #0
	str r1, [r5]
_022F5260:
	cmp r4, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r4, r5, r6, pc}
	cmp r0, #0
	ble _022F528C
	ldrsh r1, [sp, #6]
	tst r1, #0x20
	movne r1, #1
	addne sp, sp, #8
	strne r1, [r4]
	ldmneia sp!, {r4, r5, r6, pc}
_022F528C:
	mov r1, #0
	str r1, [r4]
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022F51A4

	arm_func_start SocketSetBlocking
SocketSetBlocking: ; 0x022F529C
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r1
	mov r1, #3
	mov r2, #0
	mov r5, r0
	bl fcntl
	cmp r4, #0
	bicne r2, r0, #4
	orreq r2, r0, #4
	mov r0, r5
	mov r1, #4
	bl fcntl
	cmp r0, #0
	moveq r0, #1
	movne r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end SocketSetBlocking

	arm_func_start ov00_022F52DC
ov00_022F52DC: ; 0x022F52DC
	stmdb sp!, {r0, r1, r2, r3}
	stmdb sp!, {r3, lr}
	ldr r1, _022F5318 ; =0x0000FFFF
	mov ip, #4
	ldr r2, _022F531C ; =0x00001002
	add r3, sp, #0xc
	str ip, [sp]
	bl ov00_022F5138
	mvn r1, #0
	cmp r0, r1
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, lr}
	add sp, sp, #0x10
	bx lr
	.align 2, 0
_022F5318: .word 0x0000FFFF
_022F531C: .word 0x00001002
	arm_func_end ov00_022F52DC

	arm_func_start ov00_022F5320
ov00_022F5320: ; 0x022F5320
	stmdb sp!, {r3, lr}
	mov r2, #0
	add r1, sp, #0
	mov r3, r2
	str r2, [sp]
	bl ov00_022F51A4
	cmp r0, #1
	ldreq r0, [sp]
	movne r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F5320

	arm_func_start ov00_022F5348
ov00_022F5348: ; 0x022F5348
	stmdb sp!, {r3, lr}
	mov r1, #0
	add r2, sp, #0
	mov r3, r1
	str r1, [sp]
	bl ov00_022F51A4
	cmp r0, #1
	ldreq r0, [sp]
	movne r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F5348

	arm_func_start ov00_022F5370
ov00_022F5370: ; 0x022F5370
	stmdb sp!, {r3, lr}
	ldr r2, _022F53E4 ; =ov00_0231A7B0
	ldr r0, _022F53E8 ; =ov00_02328788
	ldr r1, _022F53EC ; =ov00_02328788
	str r2, [r0, #0x18]
	str r1, [r0, #0x1c]
	mov r1, #2
	strh r1, [r0, #0x20]
	mov r2, #0
	ldr r1, _022F53F0 ; =ov00_023287C4
	strh r2, [r0, #0x22]
	str r1, [r0, #0x24]
	str r2, [r0, #0x28]
	bl ov00_022CEF10
	ldr r1, _022F53F4 ; =ov00_023287B0
	bl ov00_022CF8F8
	ldr r1, _022F53E8 ; =ov00_02328788
	ldr r0, [r1, #0x28]
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	ldr r2, _022F53F4 ; =ov00_023287B0
	mov r0, #4
	str r2, [r1, #0x3c]
	strh r0, [r1, #0x22]
	mov r2, #0
	ldr r0, _022F53F8 ; =ov00_023287A0
	str r2, [r1, #0x40]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F53E4: .word ov00_0231A7B0
_022F53E8: .word ov00_02328788
_022F53EC: .word ov00_02328788
_022F53F0: .word ov00_023287C4
_022F53F4: .word ov00_023287B0
_022F53F8: .word ov00_023287A0
	arm_func_end ov00_022F5370

	arm_func_start ov00_022F53FC
ov00_022F53FC: ; 0x022F53FC
	ldr r3, [r0]
	mov r1, r3, lsr #0x18
	mov r0, r3, lsr #8
	mov r2, r3, lsl #8
	and r1, r1, #0xff
	and r0, r0, #0xff00
	mov r3, r3, lsl #0x18
	orr r0, r1, r0
	and r2, r2, #0xff0000
	and r1, r3, #0xff000000
	orr r0, r2, r0
	orr r1, r1, r0
	mov r0, r1, lsr #0x18
	and r2, r0, #0xff
	mov r0, r1, lsr #0x10
	and r0, r0, #0xff
	cmp r2, #0xa
	moveq r0, #1
	bxeq lr
	cmp r2, #0xac
	bne _022F5464
	cmp r0, #0x10
	blt _022F5464
	cmp r0, #0x1f
	movle r0, #1
	bxle lr
_022F5464:
	cmp r2, #0xc0
	cmpeq r0, #0xa8
	moveq r0, #1
	movne r0, #0
	bx lr
	arm_func_end ov00_022F53FC

	arm_func_start ov00_022F5478
ov00_022F5478: ; 0x022F5478
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl sub_0207AE44
	mov r1, r1, lsl #6
	orr r1, r1, r0, lsr #26
	ldr r2, _022F54A8 ; =0x01FF6210
	mov r0, r0, lsl #6
	mov r3, #0
	bl _ll_udiv
	cmp r4, #0
	strne r0, [r4]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F54A8: .word 0x01FF6210
	arm_func_end ov00_022F5478

	arm_func_start ov00_022F54AC
ov00_022F54AC: ; 0x022F54AC
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r1
	bl ov00_022CF3D4
	movs r4, r0
	mvneq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	mov r0, #8
	bl ov00_022F5AE4
	cmp r0, #0
	mvneq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r1, [r4, #0xc]
	ldr r1, [r1]
	ldr r1, [r1]
	str r1, [r0, #4]
	str r0, [r5]
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022F54AC

	arm_func_start ov00_022F54F4
ov00_022F54F4: ; 0x022F54F4
	ldr ip, _022F54FC ; =ov00_022F5B14
	bx ip
	.align 2, 0
_022F54FC: .word ov00_022F5B14
	arm_func_end ov00_022F54F4

	arm_func_start ov00_022F5500
ov00_022F5500: ; 0x022F5500
	stmdb sp!, {r4, lr}
	ldr r4, [r0, #4]
	bl ov00_022F5B14
	mov r0, r4
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022F5500

	arm_func_start ov00_022F5514
ov00_022F5514: ; 0x022F5514
	stmdb sp!, {r3, r4, r5, lr}
	movs r5, r0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	bl strlen
	add r0, r0, #1
	bl ov00_022F5AE4
	movs r4, r0
	beq _022F5540
	mov r1, r5
	bl strcpy
_022F5540:
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022F5514

	arm_func_start ov00_022F5548
ov00_022F5548: ; 0x022F5548
	ldrsb r3, [r0]
	mov r2, r0
	cmp r3, #0
	beq _022F5580
	ldr r1, _022F5588 ; =_020AECB0
_022F555C:
	cmp r3, #0
	blt _022F5570
	cmp r3, #0x80
	bge _022F5570
	ldrb r3, [r1, r3]
_022F5570:
	strb r3, [r0]
	ldrsb r3, [r0, #1]!
	cmp r3, #0
	bne _022F555C
_022F5580:
	mov r0, r2
	bx lr
	.align 2, 0
_022F5588: .word _020AECB0
	arm_func_end ov00_022F5548

	arm_func_start ov00_022F558C
ov00_022F558C: ; 0x022F558C
	bx lr
	arm_func_end ov00_022F558C

	arm_func_start ov00_022F5590
ov00_022F5590: ; 0x022F5590
	bx lr
	arm_func_end ov00_022F5590

	arm_func_start ov00_022F5594
ov00_022F5594: ; 0x022F5594
	stmdb sp!, {r3, lr}
	bl sub_0207AE44
	mov r1, r1, lsl #6
	orr r1, r1, r0, lsr #26
	ldr r2, _022F55B8 ; =0x000082EA
	mov r0, r0, lsl #6
	mov r3, #0
	bl _ll_udiv
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F55B8: .word 0x000082EA
	arm_func_end ov00_022F5594

	arm_func_start ov00_022F55BC
ov00_022F55BC: ; 0x022F55BC
	stmdb sp!, {r3, lr}
	bl sub_0207AE44
	mov r2, #0xfa00
	umull ip, r3, r0, r2
	mla r3, r1, r2, r3
	ldr r2, _022F55E8 ; =0x000082EA
	mov r0, ip
	mov r1, r3
	mov r3, #0
	bl _ll_udiv
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F55E8: .word 0x000082EA
	arm_func_end ov00_022F55BC

	arm_func_start ov00_022F55EC
ov00_022F55EC: ; 0x022F55EC
	ldr ip, _022F55F4 ; =sub_02079B14
	bx ip
	.align 2, 0
_022F55F4: .word sub_02079B14
	arm_func_end ov00_022F55EC

	arm_func_start DoRand
DoRand: ; 0x022F55F8
	ldr r2, _022F5640 ; =0x000041A7
	mov r1, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	mul r3, r0, r2
	mov r1, r1, lsr #0x10
	mul r2, r1, r2
	mov r0, r3, lsl #0x11
	add r0, r2, r0, lsr #1
	mvn r1, #0x80000000
	cmp r0, r1
	bichi r0, r0, #0x80000000
	addhi r0, r0, #1
	add r0, r0, r3, lsr #15
	mvn r1, #0x80000000
	cmp r0, r1
	bichi r0, r0, #0x80000000
	addhi r0, r0, #1
	bx lr
	.align 2, 0
_022F5640: .word 0x000041A7
	arm_func_end DoRand

	arm_func_start rand
rand: ; 0x022F5644
	stmdb sp!, {r3, lr}
	ldr r0, _022F5660 ; =ov00_0231A740
	ldr r0, [r0]
	bl DoRand
	ldr r1, _022F5660 ; =ov00_0231A740
	str r0, [r1]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F5660: .word ov00_0231A740
	arm_func_end rand

	arm_func_start srand
srand: ; 0x022F5664
	cmp r0, #0
	bicne r1, r0, #0x80000000
	ldr r0, _022F567C ; =ov00_0231A740
	moveq r1, #1
	str r1, [r0]
	bx lr
	.align 2, 0
_022F567C: .word ov00_0231A740
	arm_func_end srand

	arm_func_start RandRangeOverlay0
RandRangeOverlay0: ; 0x022F5680
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	subs r4, r1, r5
	ldmeqia sp!, {r3, r4, r5, pc}
	bl rand
	mov r1, r4
	bl _u32_div_f
	add r0, r1, r5
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end RandRangeOverlay0

	arm_func_start ov00_022F56A4
ov00_022F56A4: ; 0x022F56A4
	cmp r2, #2
	blt _022F56C0
	ldrsb r3, [r0, #1]
	ldrsb ip, [r0]
	mov r3, r3, asr #4
	orr r3, r3, ip, lsl #2
	strb r3, [r1]
_022F56C0:
	cmp r2, #3
	blt _022F56E0
	ldrsb ip, [r0, #1]
	ldrsb r3, [r0, #2]
	mov ip, ip, lsl #0x1c
	mov r3, r3, asr #2
	orr r3, r3, ip, lsr #24
	strb r3, [r1, #1]
_022F56E0:
	cmp r2, #4
	bxlt lr
	ldrsb r2, [r0, #2]
	ldrsb r0, [r0, #3]
	mov r2, r2, lsl #0x1e
	orr r0, r0, r2, lsr #24
	strb r0, [r1, #2]
	bx lr
	arm_func_end ov00_022F56A4

	arm_func_start ov00_022F5700
ov00_022F5700: ; 0x022F5700
	stmdb sp!, {r3, lr}
	cmp r2, #0
	mov ip, #0
	ble _022F5728
	add lr, sp, #0
_022F5714:
	ldrsb r3, [r0, ip]
	add ip, ip, #1
	cmp ip, r2
	strb r3, [lr], #1
	blt _022F5714
_022F5728:
	cmp ip, #3
	bge _022F574C
	add r0, sp, #0
	add r2, r0, ip
	mov r0, #0
_022F573C:
	add ip, ip, #1
	cmp ip, #3
	strb r0, [r2], #1
	blt _022F573C
_022F574C:
	ldrb r0, [sp]
	mov r0, r0, asr #2
	strb r0, [r1]
	ldrb r2, [sp]
	ldrb r0, [sp, #1]
	mov r2, r2, lsl #0x1e
	mov r0, r0, asr #4
	orr r0, r0, r2, lsr #26
	strb r0, [r1, #1]
	ldrb r2, [sp, #1]
	ldrb r0, [sp, #2]
	mov r2, r2, lsl #0x1c
	mov r0, r0, asr #6
	orr r0, r0, r2, lsr #26
	strb r0, [r1, #2]
	ldrb r0, [sp, #2]
	and r0, r0, #0x3f
	strb r0, [r1, #3]
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F5700

	arm_func_start ov00_022F5798
ov00_022F5798: ; 0x022F5798
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	ldr r4, [sp, #0x28]
	mov r7, #0
	mov sl, r0
	mov sb, r1
	mov r8, r2
	mov fp, r3
	mov r6, r7
	cmp r4, #1
	beq _022F57CC
	cmp r4, #2
	beq _022F57D4
	b _022F57DC
_022F57CC:
	ldr r5, _022F5980 ; =ov00_02318468
	b _022F57E0
_022F57D4:
	ldr r5, _022F5984 ; =ov00_0231846C
	b _022F57E0
_022F57DC:
	ldr r5, _022F5988 ; =ov00_02318470
_022F57E0:
	cmp r8, #0
	bgt _022F5800
	cmp fp, #0
	movne r0, #0
	strne r0, [fp]
	mov r0, #0
	strb r0, [sb]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022F5800:
	add r4, sp, #0
	b _022F5914
_022F5808:
	cmp r0, #0x30
	blt _022F5830
	cmp r0, #0x39
	bgt _022F5830
	mov r2, r7, lsr #0x1f
	rsb r1, r2, r7, lsl #30
	add r1, r2, r1, ror #30
	add r0, r0, #4
	strb r0, [r4, r1]
	b _022F58F4
_022F5830:
	cmp r0, #0x61
	blt _022F5858
	cmp r0, #0x7a
	bgt _022F5858
	mov r2, r7, lsr #0x1f
	rsb r1, r2, r7, lsl #30
	add r1, r2, r1, ror #30
	sub r0, r0, #0x47
	strb r0, [r4, r1]
	b _022F58F4
_022F5858:
	cmp r0, #0x41
	blt _022F5880
	cmp r0, #0x5a
	bgt _022F5880
	mov r2, r7, lsr #0x1f
	rsb r1, r2, r7, lsl #30
	add r1, r2, r1, ror #30
	sub r0, r0, #0x41
	strb r0, [r4, r1]
	b _022F58F4
_022F5880:
	ldrsb r1, [r5]
	cmp r1, r0
	bne _022F58A4
	mov r1, r7, lsr #0x1f
	rsb r0, r1, r7, lsl #30
	add r1, r1, r0, ror #30
	mov r0, #0x3e
	strb r0, [r4, r1]
	b _022F58F4
_022F58A4:
	ldrsb r1, [r5, #1]
	cmp r1, r0
	bne _022F58C8
	mov r1, r7, lsr #0x1f
	rsb r0, r1, r7, lsl #30
	add r1, r1, r0, ror #30
	mov r0, #0x3f
	strb r0, [r4, r1]
	b _022F58F4
_022F58C8:
	ldrsb r1, [sl, r7]
	ldrsb r0, [r5, #2]
	cmp r0, r1
	cmpne r1, #0
	beq _022F592C
	cmp fp, #0
	movne r0, #0
	strne r0, [fp]
	mov r0, #0
	strb r0, [sb]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022F58F4:
	cmp r1, #3
	bne _022F5910
	mov r0, r4
	mov r2, #4
	add r1, sb, r6
	bl ov00_022F56A4
	add r6, r6, #3
_022F5910:
	add r7, r7, #1
_022F5914:
	cmp r7, r8
	bge _022F592C
	ldrsb r0, [sl, r7]
	ldrsb r1, [r5, #2]
	cmp r1, r0
	bne _022F5808
_022F592C:
	cmp r7, #0
	beq _022F5974
	mov r1, r7, lsr #0x1f
	rsb r0, r1, r7, lsl #30
	adds r4, r1, r0, ror #30
	beq _022F5974
	ldrsb r1, [r5, #2]
	add r0, sp, #0
	add r0, r0, r4
	rsb r2, r4, #4
	bl memset
	add r0, sp, #0
	mov r2, r4
	add r1, sb, r6
	bl ov00_022F56A4
	cmp r4, #3
	addeq r6, r6, #2
	addne r6, r6, #1
_022F5974:
	cmp fp, #0
	strne r6, [fp]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022F5980: .word ov00_02318468
_022F5984: .word ov00_0231846C
_022F5988: .word ov00_02318470
	arm_func_end ov00_022F5798

	arm_func_start ov00_022F598C
ov00_022F598C: ; 0x022F598C
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	mov r7, r1
	mov r6, r2
	mov sl, r0
	mov r5, r7
	mov sb, r6
	cmp r3, #1
	beq _022F59B8
	cmp r3, #2
	beq _022F59C0
	b _022F59C8
_022F59B8:
	ldr r4, _022F5AB4 ; =ov00_02318468
	b _022F59CC
_022F59C0:
	ldr r4, _022F5AB8 ; =ov00_0231846C
	b _022F59CC
_022F59C8:
	ldr r4, _022F5ABC ; =ov00_02318470
_022F59CC:
	cmp r6, #0
	ble _022F5A04
	mov r8, #3
_022F59D8:
	cmp sb, #3
	movlt r2, sb
	movge r2, r8
	mov r0, sl
	mov r1, r7
	bl ov00_022F5700
	sub sb, sb, #3
	cmp sb, #0
	add r7, r7, #4
	add sl, sl, #3
	bgt _022F59D8
_022F5A04:
	ldr r1, _022F5AC0 ; =0x55555556
	mov r2, #3
	smull r0, r3, r1, r6
	add r3, r3, r6, lsr #31
	smull r0, r1, r2, r3
	sub r3, r6, r0
	mov r1, r7
	cmp r3, #1
	subeq r1, r7, #2
	beq _022F5A34
	cmp r3, #2
	subeq r1, r7, #1
_022F5A34:
	mov r0, #0
	strb r0, [r7]
	cmp r7, r5
	ldmlsia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022F5A44:
	sub r7, r7, #1
	cmp r7, r1
	ldrhssb r0, [r4, #2]
	strhsb r0, [r7]
	bhs _022F5AA8
	ldrsb r0, [r7]
	cmp r0, #0x19
	addle r0, r0, #0x41
	strleb r0, [r7]
	ble _022F5AA8
	cmp r0, #0x33
	addle r0, r0, #0x47
	strleb r0, [r7]
	ble _022F5AA8
	cmp r0, #0x3d
	suble r0, r0, #4
	strleb r0, [r7]
	ble _022F5AA8
	cmp r0, #0x3e
	ldreqsb r0, [r4]
	streqb r0, [r7]
	beq _022F5AA8
	cmp r0, #0x3f
	ldreqsb r0, [r4, #1]
	streqb r0, [r7]
_022F5AA8:
	cmp r7, r5
	bhi _022F5A44
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022F5AB4: .word ov00_02318468
_022F5AB8: .word ov00_0231846C
_022F5ABC: .word ov00_02318470
_022F5AC0: .word 0x55555556
	arm_func_end ov00_022F598C

	arm_func_start ov00_022F5AC4
ov00_022F5AC4: ; 0x022F5AC4
	bx lr
	arm_func_end ov00_022F5AC4

	arm_func_start ov00_022F5AC8
ov00_022F5AC8: ; 0x022F5AC8
	ldr ip, _022F5AE0 ; =ov00_02328788
	str r0, [ip, #8]
	str r1, [ip, #0xc]
	str r2, [ip, #0x10]
	str r3, [ip, #0x14]
	bx lr
	.align 2, 0
_022F5AE0: .word ov00_02328788
	arm_func_end ov00_022F5AC8

	arm_func_start ov00_022F5AE4
ov00_022F5AE4: ; 0x022F5AE4
	stmdb sp!, {r3, lr}
	ldr r1, _022F5AF8 ; =ov00_02328788
	ldr r1, [r1, #8]
	blx r1
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F5AF8: .word ov00_02328788
	arm_func_end ov00_022F5AE4

	arm_func_start ov00_022F5AFC
ov00_022F5AFC: ; 0x022F5AFC
	stmdb sp!, {r3, lr}
	ldr r2, _022F5B10 ; =ov00_02328788
	ldr r2, [r2, #0x10]
	blx r2
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F5B10: .word ov00_02328788
	arm_func_end ov00_022F5AFC

	arm_func_start ov00_022F5B14
ov00_022F5B14: ; 0x022F5B14
	stmdb sp!, {r3, lr}
	cmp r0, #0
	ldmeqia sp!, {r3, pc}
	ldr r1, _022F5B30 ; =ov00_02328788
	ldr r1, [r1, #0xc]
	blx r1
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F5B30: .word ov00_02328788
	arm_func_end ov00_022F5B14

	arm_func_start ov00_022F5B34
ov00_022F5B34: ; 0x022F5B34
	stmdb sp!, {r3, r4, r5, lr}
	mov r1, r1, lsl #0x10
	mov r1, r1, lsr #0x10
	mov r3, r1, asr #8
	mov r1, r1, lsl #8
	mov r4, r2
	mov ip, #2
	and r2, r3, #0xff
	and r1, r1, #0xff00
	strb ip, [r4, #1]
	orr r1, r2, r1
	mov r5, r0
	strh r1, [r4, #2]
	bl ov00_022F5178
	mvn r1, #0
	str r0, [r4, #4]
	cmp r0, r1
	bne _022F5BA0
	mov r0, r5
	bl ov00_022CF3D4
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r0, [r0, #0xc]
	ldr r0, [r0]
	ldr r0, [r0]
	str r0, [r4, #4]
_022F5BA0:
	mov r0, #1
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022F5B34

	arm_func_start ov00_022F5BA8
ov00_022F5BA8: ; 0x022F5BA8
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	ldr r1, _022F5BEC ; =ov00_02328888
	mov r0, #8
	str r1, [sp]
	ldr r1, _022F5BF0 ; =ov00_02328884
	str r0, [sp, #4]
	ldr r0, [r1]
	ldr r2, [r1, #0x4c]
	ldr r1, _022F5BF4 ; =ov00_02328890
	mov r3, #0
	bl SocketSendTo
	bl ov00_022F5594
	ldr r1, _022F5BF0 ; =ov00_02328884
	str r0, [r1, #0x50]
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F5BEC: .word ov00_02328888
_022F5BF0: .word ov00_02328884
_022F5BF4: .word ov00_02328890
	arm_func_end ov00_022F5BA8

	arm_func_start ResolveAvailableNintendoWifi
ResolveAvailableNintendoWifi: ; 0x022F5BF8
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0x40
	mov r4, r0
	ldr r0, _022F5CD4 ; =ov00_02328804
	mov r1, r4
	bl strcpy
	ldr r0, _022F5CD8 ; =ov00_02328884
	mvn r1, #0
	str r1, [r0]
	bl ov00_022F558C
	ldr r0, _022F5CDC ; =ov00_02328844
	ldrsb r5, [r0]
	cmp r5, #0
	bne _022F5C40
	ldr r1, _022F5CE0 ; =ov00_0231A7BC
	add r0, sp, #0
	mov r2, r4
	bl sub_020790DC
_022F5C40:
	cmp r5, #0
	ldrne r0, _022F5CDC ; =ov00_02328844
	ldr r1, _022F5CE4 ; =0x00006CFC
	ldr r2, _022F5CE8 ; =ov00_02328888
	addeq r0, sp, #0
	bl ov00_022F5B34
	cmp r0, #0
	addeq sp, sp, #0x40
	ldmeqia sp!, {r3, r4, r5, pc}
	mov r0, #2
	mov r1, r0
	mov r2, #0
	bl SocketCreate
	ldr r2, _022F5CD8 ; =ov00_02328884
	mvn r1, #0
	cmp r0, r1
	str r0, [r2]
	addeq sp, sp, #0x40
	ldmeqia sp!, {r3, r4, r5, pc}
	mov r1, #9
	mov r0, r4
	strb r1, [r2, #0xc]
	bl strlen
	mov r5, r0
	ldr r0, _022F5CEC ; =ov00_02328895
	mov r1, r4
	add r2, r5, #1
	bl memcpy
	ldr r0, _022F5CD8 ; =ov00_02328884
	add r1, r5, #6
	str r1, [r0, #0x4c]
	bl ov00_022F5BA8
	ldr r0, _022F5CD8 ; =ov00_02328884
	mov r1, #0
	str r1, [r0, #0x54]
	add sp, sp, #0x40
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022F5CD4: .word ov00_02328804
_022F5CD8: .word ov00_02328884
_022F5CDC: .word ov00_02328844
_022F5CE0: .word ov00_0231A7BC
_022F5CE4: .word 0x00006CFC
_022F5CE8: .word ov00_02328888
_022F5CEC: .word ov00_02328895
	arm_func_end ResolveAvailableNintendoWifi

	arm_func_start ov00_022F5CF0
ov00_022F5CF0: ; 0x022F5CF0
	stmdb sp!, {r4, r5, r6, lr}
	mov r5, r0
	cmp r1, #7
	mov r6, r2
	mov r4, r3
	movlt r0, #1
	ldmltia sp!, {r4, r5, r6, pc}
	ldr r1, _022F5D9C ; =ov00_0232888C
	add r0, r6, #4
	mov r2, #4
	bl memcmp
	cmp r0, #0
	movne r0, #1
	ldmneia sp!, {r4, r5, r6, pc}
	ldr r0, _022F5DA0 ; =ov00_02328884
	ldrh r1, [r6, #2]
	ldrh r0, [r0, #6]
	cmp r1, r0
	movne r0, #1
	ldmneia sp!, {r4, r5, r6, pc}
	ldr r1, _022F5DA4 ; =ov00_0231A7E0
	mov r0, r5
	mov r2, #3
	bl memcmp
	cmp r0, #0
	movne r0, #1
	ldmneia sp!, {r4, r5, r6, pc}
	ldrsb r2, [r5, #3]
	ldrsb r1, [r5, #4]
	ldrsb r0, [r5, #5]
	mov r3, r2, lsl #0x18
	mov r2, r1, lsl #0x10
	mov r1, r0, lsl #8
	and r3, r3, #0xff000000
	and r2, r2, #0xff0000
	ldrb r0, [r5, #6]
	orr r2, r3, r2
	and r1, r1, #0xff00
	orr r1, r2, r1
	orr r0, r1, r0
	str r0, [r4]
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022F5D9C: .word ov00_0232888C
_022F5DA0: .word ov00_02328884
_022F5DA4: .word ov00_0231A7E0
	arm_func_end ov00_022F5CF0

	arm_func_start ov00_022F5DA8
ov00_022F5DA8: ; 0x022F5DA8
	stmdb sp!, {r3, lr}
	sub sp, sp, #0x58
	ldr r0, _022F5EE8 ; =ov00_02328884
	mov r2, #8
	ldr r0, [r0]
	sub r1, r2, #9
	str r2, [sp, #0xc]
	cmp r0, r1
	bne _022F5DE0
	ldr r1, _022F5EEC ; =ov00_02328800
	mov r0, #1
	str r0, [r1]
	add sp, sp, #0x58
	ldmia sp!, {r3, pc}
_022F5DE0:
	bl ov00_022F5320
	cmp r0, #0
	beq _022F5E88
	add r0, sp, #0x10
	str r0, [sp]
	add r1, sp, #0xc
	str r1, [sp, #4]
	ldr r0, _022F5EE8 ; =ov00_02328884
	add r1, sp, #0x18
	ldr r0, [r0]
	mov r2, #0x40
	mov r3, #0
	bl SocketRecvFrom
	mov r1, r0
	add r0, sp, #0x18
	add r2, sp, #0x10
	add r3, sp, #8
	bl ov00_022F5CF0
	cmp r0, #0
	bne _022F5E88
	ldr r0, _022F5EE8 ; =ov00_02328884
	ldr r0, [r0]
	bl SocketClose
	ldr r0, [sp, #8]
	tst r0, #1
	beq _022F5E58
	ldr r0, _022F5EEC ; =ov00_02328800
	mov r1, #2
	str r1, [r0]
	b _022F5E78
_022F5E58:
	tst r0, #2
	ldreq r0, _022F5EEC ; =ov00_02328800
	moveq r1, #1
	streq r1, [r0]
	beq _022F5E78
	ldr r0, _022F5EEC ; =ov00_02328800
	mov r1, #3
	str r1, [r0]
_022F5E78:
	ldr r0, _022F5EEC ; =ov00_02328800
	add sp, sp, #0x58
	ldr r0, [r0]
	ldmia sp!, {r3, pc}
_022F5E88:
	bl ov00_022F5594
	ldr r1, _022F5EE8 ; =ov00_02328884
	ldr r2, [r1, #0x50]
	add r2, r2, #0x7d0
	cmp r0, r2
	bls _022F5EDC
	ldr r0, [r1, #0x54]
	cmp r0, #1
	bne _022F5EC8
	ldr r0, [r1]
	bl SocketClose
	ldr r1, _022F5EEC ; =ov00_02328800
	mov r0, #1
	str r0, [r1]
	add sp, sp, #0x58
	ldmia sp!, {r3, pc}
_022F5EC8:
	bl ov00_022F5BA8
	ldr r0, _022F5EE8 ; =ov00_02328884
	ldr r1, [r0, #0x54]
	add r1, r1, #1
	str r1, [r0, #0x54]
_022F5EDC:
	mov r0, #0
	add sp, sp, #0x58
	ldmia sp!, {r3, pc}
	.align 2, 0
_022F5EE8: .word ov00_02328884
_022F5EEC: .word ov00_02328800
	arm_func_end ov00_022F5DA8

	arm_func_start ov00_022F5EF0
ov00_022F5EF0: ; 0x022F5EF0
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r7, r1
	mov r8, r0
	bl ov00_022F5594
	bl srand
	mov r6, #0
	cmp r7, #0
	ldmlsia sp!, {r4, r5, r6, r7, r8, pc}
	mov r5, r6
	mov r4, #0xff
_022F5F18:
	mov r0, r5
	mov r1, r4
	bl RandRangeOverlay0
	add r0, r0, #1
	strb r0, [r8, r6]
	add r6, r6, #1
	cmp r6, r7
	blo _022F5F18
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022F5EF0

	arm_func_start ov00_022F5F3C
ov00_022F5F3C: ; 0x022F5F3C
	ldr ip, _022F5F44 ; =ov00_022F5F48
	bx ip
	.align 2, 0
_022F5F44: .word ov00_022F5F48
	arm_func_end ov00_022F5F3C

	arm_func_start ov00_022F5F48
ov00_022F5F48: ; 0x022F5F48
	stmdb sp!, {r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x184
	mov r7, r2
	mov sb, r0
	cmp r7, #0x75
	add r4, sp, #0x104
	mov r8, r1
	mov r6, r3
	addhi sp, sp, #0x184
	mvnhi r0, #0
	ldmhiia sp!, {r4, r5, r6, r7, r8, sb, pc}
	rsb r5, r7, #0x7d
	mov r3, #0
	mov r2, #2
	mov r1, r5
	add r0, r4, #2
	strb r3, [r4]
	strb r2, [r4, #1]
	bl ov00_022F5EF0
	add r3, r4, #2
	rsb r0, r7, #0x7e
	add r4, r4, r5
	mov r5, #0
	mov r1, r8
	mov r2, r7
	add r0, r3, r0
	strb r5, [r4, #2]
	bl memcpy
	add r0, sp, #0
	add r1, sp, #0x104
	mov r2, #0x80
	bl ov00_022F7540
	cmp r0, #0
	beq _022F6000
	add r0, sp, #0
	mov r2, sb
	mov r3, r0
	add r1, sb, #0x104
	bl ov00_022F6D28
	cmp r0, #0
	beq _022F6000
	add r0, sp, #0
	mov r1, r6
	bl ov00_022F7584
	cmp r0, #0
	bne _022F600C
_022F6000:
	add sp, sp, #0x184
	mvn r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
_022F600C:
	mov r0, r5
	add sp, sp, #0x184
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022F5F48

	arm_func_start ov00_022F6018
ov00_022F6018: ; 0x022F6018
	stmdb sp!, {r4, lr}
	ldr r1, _022F605C ; =ov00_023288E8
	mov r4, r0
	ldr r0, [r1, r4, lsl #4]
	cmp r0, #0
	ldmneia sp!, {r4, pc}
	ldr r1, _022F6060 ; =ov00_023288E4
	ldr r0, [r1, r4, lsl #4]
	add r0, r0, #1
	str r0, [r1, r4, lsl #4]
	bl ov00_022F55BC
	ldr r2, _022F6064 ; =ov00_023288DC
	ldr r1, _022F605C ; =ov00_023288E8
	str r0, [r2, r4, lsl #4]
	mov r0, #1
	str r0, [r1, r4, lsl #4]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F605C: .word ov00_023288E8
_022F6060: .word ov00_023288E4
_022F6064: .word ov00_023288DC
	arm_func_end ov00_022F6018

	arm_func_start ov00_022F6068
ov00_022F6068: ; 0x022F6068
	stmdb sp!, {r4, lr}
	ldr r1, _022F60B0 ; =ov00_023288E8
	mov r4, r0
	ldr r0, [r1, r4, lsl #4]
	cmp r0, #1
	ldmneia sp!, {r4, pc}
	bl ov00_022F55BC
	ldr r1, _022F60B4 ; =ov00_023288DC
	ldr r3, _022F60B8 ; =ov00_023288E0
	ldr r1, [r1, r4, lsl #4]
	ldr r2, [r3, r4, lsl #4]
	sub r0, r0, r1
	add r1, r2, r0
	ldr r0, _022F60B0 ; =ov00_023288E8
	str r1, [r3, r4, lsl #4]
	mov r1, #0
	str r1, [r0, r4, lsl #4]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F60B0: .word ov00_023288E8
_022F60B4: .word ov00_023288DC
_022F60B8: .word ov00_023288E0
	arm_func_end ov00_022F6068

	arm_func_start ov00_022F60BC
ov00_022F60BC: ; 0x022F60BC
	b _022F60C4
_022F60C0:
	sub r1, r1, #1
	arm_func_end ov00_022F60BC
_022F60C4:
	add ip, r0, r1, lsl #2
	ldr ip, [ip, #-4]
	cmp ip, #0
	bne _022F60E4
	cmp r1, #0
	bne _022F60C0
	b _022F60E4
_022F60E0:
	sub r3, r3, #1
_022F60E4:
	add ip, r2, r3, lsl #2
	ldr ip, [ip, #-4]
	cmp ip, #0
	bne _022F60FC
	cmp r3, #0
	bne _022F60E0
_022F60FC:
	cmp r1, r3
	mvnlo r0, #0
	bxlo lr
	movhi r0, #1
	bxhi lr
	cmp r1, #0
	beq _022F6144
_022F6118:
	add ip, r2, r1, lsl #2
	add r3, r0, r1, lsl #2
	ldr ip, [ip, #-4]
	ldr r3, [r3, #-4]
	cmp r3, ip
	mvnlo r0, #0
	bxlo lr
	movhi r0, #1
	bxhi lr
	subs r1, r1, #1
	bne _022F6118
_022F6144:
	mov r0, #0
	bx lr

	arm_func_start ov00_022F614C
ov00_022F614C: ; 0x022F614C
	b _022F615C
_022F6150:
	ldr r1, [r0]
	sub r1, r1, #1
	str r1, [r0]
	arm_func_end ov00_022F614C
_022F615C:
	ldr r1, [r0]
	cmp r1, #0
	beq _022F6174
	ldr r1, [r0, r1, lsl #2]
	cmp r1, #0
	beq _022F6150
_022F6174:
	mov r0, #1
	bx lr

	arm_func_start ov00_022F617C
ov00_022F617C: ; 0x022F617C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov r6, #0
	mov sl, r0
	mov r0, #3
	mov fp, r1
	mov sb, r2
	mov r8, r3
	mov r5, r6
	mov r4, r6
	ldr r7, [sp, #0x28]
	bl ov00_022F6018
	ldr r0, [sp, #0x30]
	cmp r0, fp
	cmphs r0, r8
	movlo r0, #0
	ldmloia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp fp, r8
	movlo r0, fp
	movlo r1, sb
	movhs r0, r8
	movhs r8, fp
	movhs r1, sl
	cmp r0, #0
	bls _022F620C
	mov r2, #0
_022F61E0:
	ldr fp, [sl, r6, lsl #2]
	ldr r3, [sb, r6, lsl #2]
	adds fp, fp, r3
	adc r3, r2, #0
	adds r5, r5, fp
	str r5, [r7, r6, lsl #2]
	adc r5, r4, r3
	add r6, r6, #1
	cmp r6, r0
	mov r4, #0
	blo _022F61E0
_022F620C:
	mov r2, #0
	mov r0, r2
	b _022F6230
_022F6218:
	ldr r3, [r1, r6, lsl #2]
	adds r3, r5, r3
	str r3, [r7, r6, lsl #2]
	adc r5, r4, #0
	add r6, r6, #1
	mov r4, #0
_022F6230:
	cmp r4, r2
	cmpeq r5, r0
	beq _022F6244
	cmp r6, r8
	blo _022F6218
_022F6244:
	mov r0, #0
	cmp r4, r0
	cmpeq r5, r0
	beq _022F6270
	ldr r2, [sp, #0x30]
	cmp r2, r6
	ldmlsia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	str r5, [r7, r6, lsl #2]
	mov r5, r0
	mov r4, r0
	add r6, r6, #1
_022F6270:
	cmp r6, r8
	bhs _022F6298
	add r1, r1, r6, lsl #2
	add r0, r7, r6, lsl #2
	cmp r0, r1
	beq _022F6294
	sub r2, r8, r6
	mov r2, r2, lsl #2
	bl memcpy
_022F6294:
	mov r6, r8
_022F6298:
	ldr r1, [sp, #0x2c]
	mov r0, #3
	str r6, [r1]
	bl ov00_022F6068
	mov r0, #0
	cmp r4, r0
	cmpeq r5, r0
	moveq r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022F617C

	arm_func_start ov00_022F62BC
ov00_022F62BC: ; 0x022F62BC
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov fp, r1
	mov r8, r3
	cmp fp, r8
	strlo fp, [sp]
	mov r5, #0
	mov sl, r0
	strhs r8, [sp]
	mov r0, #4
	mov sb, r2
	mov r4, r5
	ldr r7, [sp, #0x28]
	mov r6, #0
	bl ov00_022F6018
	ldr r0, [sp]
	cmp r0, #0
	bls _022F6338
	mov r1, r6
_022F6304:
	ldr r2, [sb, r6, lsl #2]
	ldr r0, [sl, r6, lsl #2]
	subs r2, r2, r0
	rsc r0, r1, #0
	subs r3, r2, r5
	sbc r2, r0, r4
	str r3, [r7, r6, lsl #2]
	ldr r0, [sp]
	add r6, r6, #1
	cmp r6, r0
	mov r5, r2, lsr #0x1f
	mov r4, #0
	blo _022F6304
_022F6338:
	cmp r6, r8
	bhs _022F6364
_022F6340:
	ldr r0, [sb, r6, lsl #2]
	subs r1, r0, r5
	rsc r0, r4, #0
	str r1, [r7, r6, lsl #2]
	add r6, r6, #1
	cmp r6, r8
	mov r5, r0, lsr #0x1f
	mov r4, #0
	blo _022F6340
_022F6364:
	cmp r4, #0
	cmpeq r5, #0
	beq _022F6380
	mov r0, #4
	bl ov00_022F6068
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022F6380:
	cmp r6, fp
	bhs _022F63B0
_022F6388:
	ldr r0, [sl, r6, lsl #2]
	cmp r0, #0
	beq _022F63A4
	mov r0, #4
	bl ov00_022F6068
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022F63A4:
	add r6, r6, #1
	cmp r6, fp
	blo _022F6388
_022F63B0:
	ldr r1, [sp, #0x2c]
	mov r0, #4
	str r8, [r1]
	bl ov00_022F6068
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022F62BC

	arm_func_start ov00_022F63C8
ov00_022F63C8: ; 0x022F63C8
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x114
	str r0, [sp]
	ldr r0, [sp, #0x13c]
	ldr r4, [sp, #0x140]
	str r0, [sp, #0x13c]
	mov r0, #0
	str r1, [sp, #4]
	str r2, [sp, #8]
	str r3, [sp, #0xc]
	add r6, sp, #0x10
	mov r1, r0
	mov r2, r0
	mov r3, r0
	mov r5, #8
_022F6404:
	stmia r6!, {r0, r1, r2, r3}
	stmia r6!, {r0, r1, r2, r3}
	subs r5, r5, #1
	bne _022F6404
	ldr r1, [sp, #0x13c]
	str r0, [r6]
	mov r0, #0
	str r0, [r1]
	bl ov00_022F6018
	ldr r0, [sp, #0xc]
	mov fp, #0
	cmp r0, #0
	bls _022F6534
_022F6438:
	ldr r0, [sp, #8]
	ldr r0, [r0, fp, lsl #2]
	cmp r0, #0
	beq _022F6524
	ldr r0, [sp, #4]
	mov r7, #0
	cmp r0, #0
	bls _022F6524
	add r6, sp, #0x10
	mov r3, r7
	mov r2, r7
	mov r1, r7
	mov r0, r7
	mov ip, r7
_022F6470:
	ldr r5, [sp]
	ldr r8, [sp, #8]
	ldr r5, [r5, r7, lsl #2]
	ldr r8, [r8, fp, lsl #2]
	add sl, fp, r7
	umull sb, r8, r5, r8
	cmp sl, r4
	blo _022F64A4
	mov r0, #0
	bl ov00_022F6068
	add sp, sp, #0x114
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022F64A4:
	cmp r8, #0
	cmpeq sb, ip
	beq _022F6508
_022F64B0:
	add r5, r6, sl, lsl #2
	ldr lr, [r5, #4]
	add sl, sl, #1
	adds sb, sb, lr
	str sb, [r5, #4]
	adc sb, r8, #0
	cmp sl, r4
	mov r8, #0
	bhi _022F64E8
	cmp sl, r4
	bne _022F64FC
	cmp r8, r3
	cmpeq sb, r2
	beq _022F64FC
_022F64E8:
	mov r0, #0
	bl ov00_022F6068
	add sp, sp, #0x114
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022F64FC:
	cmp r8, r1
	cmpeq sb, r0
	bne _022F64B0
_022F6508:
	ldr r5, [sp, #0x10]
	add r7, r7, #1
	cmp sl, r5
	ldr r5, [sp, #4]
	strhi sl, [sp, #0x10]
	cmp r7, r5
	blo _022F6470
_022F6524:
	ldr r0, [sp, #0xc]
	add fp, fp, #1
	cmp fp, r0
	blo _022F6438
_022F6534:
	add r1, sp, #0x10
	b _022F6548
_022F653C:
	ldr r0, [sp, #0x10]
	sub r0, r0, #1
	str r0, [sp, #0x10]
_022F6548:
	ldr r4, [sp, #0x10]
	cmp r4, #0
	beq _022F6560
	ldr r0, [r1, r4, lsl #2]
	cmp r0, #0
	beq _022F653C
_022F6560:
	ldr r3, [sp, #0x13c]
	ldr r0, [sp, #0x138]
	add r1, sp, #0x14
	mov r2, r4, lsl #2
	str r4, [r3]
	bl memcpy
	mov r0, #0
	bl ov00_022F6068
	mov r0, #1
	add sp, sp, #0x114
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022F63C8

	arm_func_start ov00_022F658C
ov00_022F658C: ; 0x022F658C
	stmdb sp!, {r3, lr}
	str r3, [sp]
	mov ip, r1
	mov r3, r2
	ldr r1, [r0], #4
	mov r2, ip
	bl ov00_022F65AC
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F658C

	arm_func_start ov00_022F65AC
ov00_022F65AC: ; 0x022F65AC
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x314
	mov r4, r0
	mov r0, #5
	mov r6, r1
	mov r5, r3
	add r8, r2, #4
	ldr fp, [sp, #0x338]
	ldr sb, [r2]
	mov r7, #0x1f
	mov sl, #0
	bl ov00_022F6018
	mov r0, sl
	add ip, sp, #0x10
	mov r1, r0
	mov r2, r0
	mov r3, r0
	mov lr, #0x10
_022F65F4:
	stmia ip!, {r0, r1, r2, r3}
	stmia ip!, {r0, r1, r2, r3}
	subs lr, lr, #1
	bne _022F65F4
	cmp r6, #0x40
	bls _022F6624
	cmp r5, #0
	addne sp, sp, #0x314
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	b _022F6624
_022F6620:
	sub r6, r6, #1
_022F6624:
	cmp r6, #0
	beq _022F6644
	add r0, r4, r6, lsl #2
	ldr r0, [r0, #-4]
	cmp r0, #0
	beq _022F6620
	b _022F6644
_022F6640:
	sub sb, sb, #1
_022F6644:
	cmp sb, #0
	beq _022F665C
	add r0, r8, sb, lsl #2
	ldr r0, [r0, #-4]
	cmp r0, #0
	beq _022F6640
_022F665C:
	mov r0, r6, lsl #2
	str r0, [sp, #8]
	ldr r2, [sp, #8]
	add r0, sp, #0x10
	mov r1, r4
	bl memcpy
	mov r0, #0
	add ip, sp, #0x210
	mov r1, r0
	mov r2, r0
	mov r3, r0
	mov r4, #8
_022F668C:
	stmia ip!, {r0, r1, r2, r3}
	stmia ip!, {r0, r1, r2, r3}
	subs r4, r4, #1
	bne _022F668C
	cmp r6, #0
	str r0, [ip]
	cmpne sb, #0
	bne _022F66E8
	cmp r5, #0
	movne r0, #0
	strne r0, [r5, #4]
	strne r0, [r5]
	cmp fp, #0
	movne r0, #0
	strne r0, [fp, #4]
	strne r0, [fp]
	mov r0, #5
	bl ov00_022F6068
	cmp sb, #0
	moveq r0, #0
	add sp, sp, #0x314
	movne r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022F66E8:
	add r0, sp, #0x10
	mov r1, r6
	mov r2, r8
	mov r3, sb
	bl ov00_022F60BC
	mvn r1, #0
	cmp r0, r1
	bne _022F6740
	cmp r5, #0
	movne r0, #0
	strne r0, [r5]
	strne r0, [r5, #4]
	ldr r2, [sp, #8]
	add r1, sp, #0x10
	add r0, fp, #4
	str r6, [fp]
	bl memcpy
	mov r0, #5
	bl ov00_022F6068
	add sp, sp, #0x314
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022F6740:
	sub r2, sb, #1
	ldr r1, [r8, r2, lsl #2]
	mov r0, #1
	b _022F6754
_022F6750:
	sub r7, r7, #1
_022F6754:
	tst r1, r0, lsl r7
	bne _022F6764
	cmp r7, #0
	bge _022F6750
_022F6764:
	mvn r0, #0
	cmp r7, r0
	bne _022F6784
	mov r0, #5
	bl ov00_022F6068
	add sp, sp, #0x314
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022F6784:
	mov r4, sb
	add r7, r7, r2, lsl #5
	sub r6, r6, sb
_022F6790:
	add r0, sp, #0x10
	mov r1, r4
	mov r2, r8
	mov r3, sb
	add r0, r0, r6, lsl #2
	bl ov00_022F60BC
	mvn r1, #0
	cmp r0, r1
	bne _022F67C8
	cmp r6, #0
	subgt r6, r6, #1
	addgt r4, r4, #1
	movle sl, #1
	b _022F68CC
_022F67C8:
	cmp r0, #0
	mov r1, #0
	add r0, sp, #0x10
	bne _022F6818
	mov r2, r4, lsl #2
	add r0, r0, r6, lsl #2
	bl memset
	add r0, sp, #0x210
	add r2, r0, r6, lsl #2
	ldr r0, [r2, #4]
	add r1, r6, r4
	add r0, r0, #1
	str r0, [r2, #4]
	ldr r0, [sp, #0x210]
	cmp r0, r1
	strlo r1, [sp, #0x210]
	subs r6, r6, r4
	mov r4, #1
	movmi sl, r4
	b _022F68CC
_022F6818:
	str r1, [sp, #0xc]
	add ip, sp, #0xc
	mov r1, r4
	mov r2, r8
	mov r3, sb
	add r0, r0, r6, lsl #2
	stmia sp, {r7, ip}
	bl ov00_022F6938
	cmp r0, #0
	bne _022F6854
	mov r0, #5
	bl ov00_022F6068
	add sp, sp, #0x314
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022F6854:
	add r0, sp, #0x210
	add r2, r0, r6, lsl #2
	ldr r3, [sp, #0xc]
	ldr r0, [r2, #4]
	add r1, r6, r4
	add r0, r3, r0
	str r0, [r2, #4]
	ldr r0, [sp, #0x210]
	cmp r0, r1
	add r0, sp, #0x10
	strlo r1, [sp, #0x210]
	add r1, r0, r6, lsl #2
	b _022F688C
_022F6888:
	sub r4, r4, #1
_022F688C:
	add r0, r1, r4, lsl #2
	ldr r0, [r0, #-4]
	cmp r0, #0
	bne _022F68A4
	cmp r4, #1
	bgt _022F6888
_022F68A4:
	add r0, sp, #0x10
	add r1, r0, r4, lsl #2
	b _022F68B4
_022F68B0:
	sub r6, r6, #1
_022F68B4:
	add r0, r1, r6, lsl #2
	ldr r0, [r0, #-4]
	cmp r0, #0
	bne _022F68CC
	cmp r6, #1
	bgt _022F68B0
_022F68CC:
	cmp sl, #0
	beq _022F6790
	cmp r6, #0
	movlt r0, #0
	strlt r0, [fp, #4]
	strlt r0, [fp]
	blt _022F6900
	add r1, sp, #0x10
	add r0, fp, #4
	add r1, r1, r6, lsl #2
	mov r2, r4, lsl #2
	bl memcpy
	str r4, [fp]
_022F6900:
	cmp r5, #0
	beq _022F6924
	ldr r2, [sp, #0x210]
	add r1, sp, #0x214
	add r0, r5, #4
	mov r2, r2, lsl #2
	bl memcpy
	ldr r0, [sp, #0x210]
	str r0, [r5]
_022F6924:
	mov r0, #5
	bl ov00_022F6068
	mov r0, #1
	add sp, sp, #0x314
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022F65AC

	arm_func_start ov00_022F6938
ov00_022F6938: ; 0x022F6938
	stmdb sp!, {r0, r1, r2, r3}
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #0x214
	mov r6, r0
	mov r0, #6
	mov r5, r2
	mov r4, r3
	bl ov00_022F6018
	ldr r2, [sp, #0x23c]
	cmp r2, r4
	subls r0, r2, #1
	ldrls sb, [r6, r0, lsl #2]
	movls ip, #0
	bls _022F6994
	sub r1, r2, #2
	sub r0, r4, #1
	sub r2, r2, #1
	ldr r2, [r6, r2, lsl #2]
	ldr r1, [r6, r1, lsl #2]
	ldr r0, [r5, r0, lsl #2]
	orr ip, r2, #0
	and r0, r1, r0
	orr sb, r0, #0
_022F6994:
	sub r0, r4, #1
	ldr r2, [r5, r0, lsl #2]
	mov r0, sb
	mov r1, ip
	mov r3, #0
	bl _ll_udiv
	mov sb, r0
	mov r0, #0
	mov ip, r1
	add r8, sp, #0xc
	mov r1, r0
	mov r2, r0
	mov r3, r0
	mov r7, #8
_022F69CC:
	stmia r8!, {r0, r1, r2, r3}
	stmia r8!, {r0, r1, r2, r3}
	subs r7, r7, #1
	bne _022F69CC
	str r0, [r8]
	str sb, [sp, #0x10]
	str ip, [sp, #0x14]
	cmp ip, #0
	beq _022F6A00
	mvn r1, #0
	mov r0, #0
	str r1, [sp, #0x10]
	str r0, [sp, #0x14]
_022F6A00:
	mov r0, #1
	str r0, [sp, #0xc]
	add r1, sp, #0x114
	str r1, [sp]
	add r0, sp, #0x110
	str r0, [sp, #4]
	mov r0, #0x40
	str r0, [sp, #8]
	ldr r3, [sp, #0xc]
	add r2, sp, #0x10
	mov r0, r5
	mov r1, r4
	bl ov00_022F63C8
	cmp r0, #0
	bne _022F6A58
	mov r0, #6
	bl ov00_022F6068
	add sp, sp, #0x214
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, lr}
	add sp, sp, #0x10
	bx lr
_022F6A58:
	ldr r1, [sp, #0x110]
	ldr r3, [sp, #0x23c]
	add r0, sp, #0x114
	mov r2, r6
	bl ov00_022F60BC
	cmp r0, #1
	bne _022F6AF0
	add sl, sp, #0x114
	add sb, sp, #0x110
	mov r8, #0x40
	add r7, sp, #0x10
_022F6A84:
	ldr r1, [sp, #0x10]
	mov r0, r5
	mov r1, r1, lsr #1
	str r1, [sp, #0x10]
	str sl, [sp]
	str sb, [sp, #4]
	str r8, [sp, #8]
	ldr r3, [sp, #0xc]
	mov r1, r4
	mov r2, r7
	bl ov00_022F63C8
	cmp r0, #0
	bne _022F6AD4
	mov r0, #6
	bl ov00_022F6068
	add sp, sp, #0x214
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, lr}
	add sp, sp, #0x10
	bx lr
_022F6AD4:
	ldr r1, [sp, #0x110]
	ldr r3, [sp, #0x23c]
	mov r0, sl
	mov r2, r6
	bl ov00_022F60BC
	cmp r0, #1
	beq _022F6A84
_022F6AF0:
	add r0, sp, #0x23c
	str r6, [sp]
	str r0, [sp, #4]
	ldr r1, [sp, #0x110]
	ldr r3, [sp, #0x23c]
	add r0, sp, #0x114
	mov r2, r6
	bl ov00_022F62BC
	ldr r2, [sp, #0x10]
	ldr r1, [sp, #0x24c]
	mov r0, #6
	str r2, [r1]
	bl ov00_022F6068
	mov r0, #1
	add sp, sp, #0x214
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, lr}
	add sp, sp, #0x10
	bx lr
	arm_func_end ov00_022F6938

	arm_func_start ov00_022F6B38
ov00_022F6B38: ; 0x022F6B38
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x18
	sub sp, sp, #0x400
	mov r7, r0
	ldr r4, [r7]
	mov r6, #0
	mov r0, #7
	str r1, [sp, #0xc]
	str r2, [sp, #0x10]
	mov r5, r6
	mov fp, r6
	str r6, [sp, #0x14]
	bl ov00_022F6018
	mov r0, r6
	add sb, sp, #0x218
	mov r1, r0
	mov r2, r0
	mov r3, r0
	mov r8, #0x10
_022F6B84:
	stmia sb!, {r0, r1, r2, r3}
	stmia sb!, {r0, r1, r2, r3}
	subs r8, r8, #1
	bne _022F6B84
	mov r0, #0
	add sb, sp, #0x18
	mov r1, r0
	mov r2, r0
	mov r3, r0
	mov r8, #0x10
_022F6BAC:
	stmia sb!, {r0, r1, r2, r3}
	stmia sb!, {r0, r1, r2, r3}
	subs r8, r8, #1
	bne _022F6BAC
	cmp r4, #1
	mov sb, #1
	ble _022F6C44
	mov r0, #0
_022F6BCC:
	mov sl, #0
	cmp sb, #0
	ble _022F6C18
	add r1, sp, #0x18
	add ip, r1, sb, lsl #2
	add r3, r7, sb, lsl #2
_022F6BE4:
	ldr r8, [ip, sl, lsl #2]
	ldr r2, [r3, #4]
	add r1, r7, sl, lsl #2
	ldr r1, [r1, #4]
	mov lr, #0
	umlal r8, lr, r2, r1
	adds r1, r6, r8
	str r1, [ip, sl, lsl #2]
	adc r6, r5, lr
	mov r5, #0
	add sl, sl, #1
	cmp sl, sb
	blt _022F6BE4
_022F6C18:
	cmp r5, #0
	cmpeq r6, r0
	beq _022F6C38
	add r2, sb, sl
	add r1, sp, #0x18
	str r6, [r1, r2, lsl #2]
	mov r6, r5
	mov r5, #0
_022F6C38:
	add sb, sb, #1
	cmp sb, r4
	blt _022F6BCC
_022F6C44:
	mov r1, r4, lsl #1
	cmp r1, #0
	mov r8, #0
	ble _022F6C8C
	mov r2, r8
	mov r3, #1
	add r5, sp, #0x18
_022F6C60:
	ldr r6, [r5, r8, lsl #2]
	and r0, r6, #0x80000000
	cmp r0, #0x80000000
	moveq sb, r3
	add r0, fp, r6, lsl #1
	movne sb, r2
	str r0, [r5, r8, lsl #2]
	add r8, r8, #1
	mov fp, sb
	cmp r8, r1
	blt _022F6C60
_022F6C8C:
	cmp r4, #0
	mov r8, #0
	ble _022F6CC8
	mov r6, r8
	add r2, sp, #0x218
_022F6CA0:
	add r0, r7, r8, lsl #2
	ldr r5, [r0, #4]
	add r8, r8, #1
	umull r0, r3, r5, r5
	str r0, [r2, r6, lsl #2]
	add r0, r2, r6, lsl #2
	str r3, [r0, #4]
	cmp r8, r4
	add r6, r6, #2
	blt _022F6CA0
_022F6CC8:
	add r2, sp, #0x218
	str r1, [sp, #0x14]
	add r0, sp, #0x14
	str r2, [sp]
	str r0, [sp, #4]
	mov r4, #0x80
	add r0, sp, #0x18
	mov r3, r1
	str r4, [sp, #8]
	bl ov00_022F617C
	ldr r0, [sp, #0x10]
	ldr r2, [sp, #0xc]
	str r0, [sp]
	ldr r1, [sp, #0x14]
	add r0, sp, #0x218
	mov r3, #0
	bl ov00_022F65AC
	mov r4, r0
	mov r0, #7
	bl ov00_022F6068
	mov r0, r4
	add sp, sp, #0x18
	add sp, sp, #0x400
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022F6B38

	arm_func_start ov00_022F6D28
ov00_022F6D28: ; 0x022F6D28
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x28
	sub sp, sp, #0x800
	mov r6, r0
	mov r0, #8
	mov r5, r1
	mov r4, r2
	mov r8, r3
	bl ov00_022F6018
	mov r0, #0
	add sb, sp, #0x700
	add sb, sb, #0x24
	mov r1, r0
	mov r2, r0
	mov r3, r0
	mov r7, #8
_022F6D68:
	stmia sb!, {r0, r1, r2, r3}
	stmia sb!, {r0, r1, r2, r3}
	subs r7, r7, #1
	bne _022F6D68
	str r0, [sb]
	mov r0, #0
	add sb, sp, #0x620
	mov r1, r0
	mov r2, r0
	mov r3, r0
	mov r7, #8
_022F6D94:
	stmia sb!, {r0, r1, r2, r3}
	stmia sb!, {r0, r1, r2, r3}
	subs r7, r7, #1
	bne _022F6D94
	str r0, [sb]
	mov r0, #0
	add sb, sp, #0x500
	add sb, sb, #0x1c
	mov r1, r0
	mov r2, r0
	mov r3, r0
	mov r7, #8
_022F6DC4:
	stmia sb!, {r0, r1, r2, r3}
	stmia sb!, {r0, r1, r2, r3}
	subs r7, r7, #1
	bne _022F6DC4
	str r0, [sb]
	mov r0, #0
	add sb, sp, #0x400
	add sb, sb, #0x18
	mov r1, r0
	mov r2, r0
	mov r3, r0
	mov r7, #8
_022F6DF4:
	stmia sb!, {r0, r1, r2, r3}
	stmia sb!, {r0, r1, r2, r3}
	subs r7, r7, #1
	bne _022F6DF4
	str r0, [sb]
	mov r0, #0
	add sb, sp, #0x314
	mov r1, r0
	mov r2, r0
	mov r3, r0
	mov r7, #8
_022F6E20:
	stmia sb!, {r0, r1, r2, r3}
	stmia sb!, {r0, r1, r2, r3}
	subs r7, r7, #1
	bne _022F6E20
	str r0, [sb]
	add r0, sp, #0x210
	mov r1, r6
	mov r2, #0x104
	bl memcpy
	add r0, sp, #0x10c
	mov r1, r5
	mov r2, #0x104
	bl memcpy
	add r0, sp, #8
	mov r1, r4
	mov r2, #0x104
	bl memcpy
	add r0, sp, #0x210
	bl ov00_022F614C
	add r0, sp, #0x10c
	bl ov00_022F614C
	add r0, sp, #8
	bl ov00_022F614C
	ldr r3, [sp, #8]
	cmp r3, #0
	bne _022F6EA8
	mov r1, #0
	mov r0, #8
	str r1, [r8]
	bl ov00_022F6068
	add sp, sp, #0x28
	add sp, sp, #0x800
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F6EA8:
	cmp r3, #1
	ldreq r0, [sp, #0xc]
	cmpeq r0, #1
	bne _022F6EDC
	mov r1, #0
	str r1, [r8]
	mov r0, #8
	str r1, [r8, #4]
	bl ov00_022F6068
	add sp, sp, #0x28
	add sp, sp, #0x800
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F6EDC:
	ldr r0, [sp, #0x10c]
	cmp r0, #0
	bne _022F6F0C
	mov r1, #1
	str r1, [r8]
	mov r0, #8
	str r1, [r8, #4]
	bl ov00_022F6068
	add sp, sp, #0x28
	add sp, sp, #0x800
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F6F0C:
	ldr r0, [sp, #0xc]
	tst r0, #1
	bne _022F6F3C
	mov r1, #0
	str r1, [r8]
	mov r0, #8
	str r1, [r8, #4]
	bl ov00_022F6068
	add sp, sp, #0x28
	add sp, sp, #0x800
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F6F3C:
	ldr r1, [sp, #0x210]
	add r0, sp, #0x214
	add r2, sp, #0xc
	bl ov00_022F60BC
	mvn r1, #0
	cmp r0, r1
	beq _022F6F6C
	add r0, sp, #0x210
	add r1, sp, #8
	mov r3, r0
	mov r2, #0
	bl ov00_022F658C
_022F6F6C:
	ldr r0, [sp, #0x210]
	cmp r0, #0
	bne _022F6F9C
	mov r1, #0
	str r1, [r8]
	mov r0, #8
	str r1, [r8, #4]
	bl ov00_022F6068
	add sp, sp, #0x28
	add sp, sp, #0x800
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F6F9C:
	ldr r1, [sp, #0x10c]
	add r0, sp, #0x110
	sub r5, r1, #1
	ldr r0, [r0, r5, lsl #2]
	mov r4, #0x20
	tst r0, #0x80000000
	bne _022F6FD8
	add r0, sp, #0x10c
	add r0, r0, r5, lsl #2
	ldr r0, [r0, #4]
	mov r2, #1
_022F6FC8:
	sub r4, r4, #1
	sub r1, r4, #1
	tst r0, r2, lsl r1
	beq _022F6FC8
_022F6FD8:
	mov r0, #0
	add r6, sp, #0x700
	add r4, r4, r5, lsl #5
	add r6, r6, #0x24
	mov r1, r0
	mov r2, r0
	mov r3, r0
	mov r5, #8
_022F6FF8:
	stmia r6!, {r0, r1, r2, r3}
	stmia r6!, {r0, r1, r2, r3}
	subs r5, r5, #1
	bne _022F6FF8
	ldr r1, [sp, #8]
	str r0, [r6]
	add r3, r1, #1
	cmp r3, #0x40
	str r3, [sp, #0x724]
	addhi sp, sp, #0x28
	addhi sp, sp, #0x800
	movhi r0, #0
	ldmhiia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	add r2, sp, #0x700
	add r2, r2, #0x28
	add r0, sp, #8
	add r1, sp, #4
	sub r3, r3, #1
	mov r5, #1
	str r5, [r2, r3, lsl #2]
	bl ov00_022F7478
	add r0, sp, #0x700
	add r0, r0, #0x24
	add r1, sp, #8
	add r3, sp, #0x620
	mov r2, #0
	bl ov00_022F658C
	cmp r0, #0
	bne _022F7084
	mov r0, #8
	bl ov00_022F6068
	add sp, sp, #0x28
	add sp, sp, #0x800
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F7084:
	add r2, sp, #0x500
	add r0, sp, #0x620
	add r1, sp, #8
	add r2, r2, #0x1c
	bl ov00_022F6B38
	cmp r0, #0
	bne _022F70B8
	mov r0, #8
	bl ov00_022F6068
	add sp, sp, #0x28
	add sp, sp, #0x800
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F70B8:
	add r1, sp, #0x314
	str r1, [sp]
	add r1, sp, #0x500
	ldr r3, [sp, #4]
	add r0, sp, #0x210
	add r1, r1, #0x1c
	add r2, sp, #8
	bl ov00_022F71B0
	cmp r0, #0
	bne _022F70F8
	mov r0, #8
	bl ov00_022F6068
	add sp, sp, #0x28
	add sp, sp, #0x800
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F70F8:
	add r1, sp, #0x620
	mov r0, r8
	mov r2, #0x104
	bl memcpy
	subs r7, r4, #1
	bmi _022F7170
	add sb, sp, #0x314
	add r6, sp, #8
	add r4, sp, #0x10c
_022F711C:
	str r8, [sp]
	ldr r3, [sp, #4]
	mov r0, r8
	mov r1, r8
	mov r2, r6
	bl ov00_022F71B0
	mov r0, r7, lsr #5
	add r0, r4, r0, lsl #2
	ldr r0, [r0, #4]
	and r1, r7, #0x1f
	and r0, r0, r5, lsl r1
	cmp r0, r5, lsl r1
	bne _022F7168
	str r8, [sp]
	ldr r3, [sp, #4]
	mov r0, r8
	mov r1, sb
	mov r2, r6
	bl ov00_022F71B0
_022F7168:
	subs r7, r7, #1
	bpl _022F711C
_022F7170:
	mov r0, #1
	str r0, [sp, #0x418]
	str r0, [sp, #0x41c]
	str r8, [sp]
	add r1, sp, #0x400
	ldr r3, [sp, #4]
	add r1, r1, #0x18
	add r2, sp, #8
	mov r0, r8
	bl ov00_022F71B0
	mov r0, #8
	bl ov00_022F6068
	mov r0, #1
	add sp, sp, #0x28
	add sp, sp, #0x800
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022F6D28

	arm_func_start ov00_022F71B0
ov00_022F71B0: ; 0x022F71B0
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x218
	mov r6, r0
	mov r0, #0
	mov r5, r1
	ldr r1, [sp, #0x240]
	mov r4, r2
	str r3, [sp, #0xc]
	str r0, [sp, #0x14]
	str r1, [sp, #0x240]
	ldr r1, [r4]
	add r8, sp, #0x18
	str r1, [sp, #0x10]
	mov r1, r0
	mov r2, r0
	mov r3, r0
	mov r7, #0x10
_022F71F4:
	stmia r8!, {r0, r1, r2, r3}
	stmia r8!, {r0, r1, r2, r3}
	subs r7, r7, #1
	bne _022F71F4
	add r1, sp, #0x18
	add r0, sp, #0x14
	str r1, [sp]
	str r0, [sp, #4]
	mov r0, #0x80
	str r0, [sp, #8]
	ldr r1, [r6]
	ldr r3, [r5]
	add r0, r6, #4
	add r2, r5, #4
	bl ov00_022F63C8
	cmp r0, #0
	addeq sp, sp, #0x218
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r6, [r4]
	ldr r0, [sp, #0x14]
	add r2, sp, #0x18
	sub r3, r6, #1
	add r1, r4, #4
	cmp r0, r6, lsl #1
	add fp, r2, r3, lsl #2
	add r5, r1, r3, lsl #2
	bhs _022F7284
	rsb r1, r0, r6, lsl #1
	add r0, r2, r0, lsl #2
	mov r2, r1, lsl #2
	mov r1, #0
	bl memset
	ldr r0, [r4]
	mov r0, r0, lsl #1
	str r0, [sp, #0x14]
_022F7284:
	add lr, sp, #0x18
	cmp lr, fp
	bhi _022F735C
_022F7290:
	ldr r1, [lr]
	ldr r0, [sp, #0xc]
	add r6, r4, #4
	umull sb, r1, r0, r1
	mov sl, #0
	cmp r6, r5
	mov r7, lr
	mov r8, sl
	cmpls r6, r5
	bhi _022F72EC
	mov r0, sl
_022F72BC:
	ldr r1, [r6], #4
	ldr ip, [r7]
	umull r3, r2, sb, r1
	adds r3, ip, r3
	mla r2, sb, r0, r2
	mla r2, r8, r1, r2
	adc r1, r2, #0
	adds sl, sl, r3
	str sl, [r7], #4
	adc sl, r1, #0
	cmp r6, r5
	bls _022F72BC
_022F72EC:
	ldr r0, [sp, #0x14]
	mov r3, #0
	add r1, sp, #0x18
	sub r0, r0, #1
	add r2, r1, r0, lsl #2
	mov r8, r3
	mov r1, r3
	mov r0, r3
	b _022F7320
_022F7310:
	ldr r6, [r7]
	adds sl, r6, sl
	str sl, [r7], #4
	adc sl, r3, #0
_022F7320:
	cmp r8, r1
	cmpeq sl, r0
	beq _022F7334
	cmp r7, r2
	bls _022F7310
_022F7334:
	cmp r8, #0
	cmpeq sl, #0
	beq _022F7350
	ldr r0, [sp, #0x14]
	str sl, [r7]
	add r0, r0, #1
	str r0, [sp, #0x14]
_022F7350:
	add lr, lr, #4
	cmp lr, fp
	bls _022F7290
_022F735C:
	ldr r0, [sp, #0x10]
	add r1, sp, #0x18
	add r5, r1, r0, lsl #2
	ldr r2, [sp, #0x14]
	ldr r1, [sp, #0x10]
	ldr r3, [r4]
	sub r1, r2, r1
	mov r0, r5
	add r2, r4, #4
	bl ov00_022F60BC
	mvn r1, #0
	cmp r0, r1
	beq _022F740C
	ldr r0, [sp, #0x240]
	ldr r3, [sp, #0x10]
	add r0, r0, #4
	str r0, [sp]
	ldr r0, [sp, #0x240]
	mov r2, r5
	str r0, [sp, #4]
	ldr r6, [sp, #0x14]
	ldr r1, [r4]
	add r0, r4, #4
	sub r3, r6, r3
	bl ov00_022F62BC
	cmp r0, #0
	bne _022F746C
	mov r0, #0
	add r5, sp, #0x18
	mov r1, r0
	mov r2, r0
	mov r3, r0
	mov r4, #0x10
_022F73E0:
	stmia r5!, {r0, r1, r2, r3}
	stmia r5!, {r0, r1, r2, r3}
	subs r4, r4, #1
	bne _022F73E0
	ldr r0, [sp, #0x240]
	mov r1, #0
	mov r2, #0x104
	bl memset
	add sp, sp, #0x218
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022F740C:
	ldr r0, [sp, #0x240]
	mov r1, #0
	mov r2, #0x104
	bl memset
	ldr r1, [r4]
	ldr r0, [sp, #0x240]
	add r3, sp, #0x18
	str r1, [r0], #4
	ldr r2, [sp, #0x14]
	ldr r1, [sp, #0x10]
	sub r2, r2, r1
	add r1, r3, r1, lsl #2
	mov r2, r2, lsl #2
	bl memcpy
	mov r0, #0
	add r5, sp, #0x18
	mov r1, r0
	mov r2, r0
	mov r3, r0
	mov r4, #0x10
_022F745C:
	stmia r5!, {r0, r1, r2, r3}
	stmia r5!, {r0, r1, r2, r3}
	subs r4, r4, #1
	bne _022F745C
_022F746C:
	mov r0, #1
	add sp, sp, #0x218
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022F71B0

	arm_func_start ov00_022F7478
ov00_022F7478: ; 0x022F7478
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	mov r3, #2
	mov r2, #0
	ldr r5, [r0, #4]
	mov r0, r2
	mov lr, r3
	mov ip, #1
	mov r4, r2
	mvn r6, #0
_022F749C:
	umull sl, sb, r5, ip
	mla sb, r5, r0, sb
	mov r7, r2, lsl #1
	adds r8, r6, r3, lsl #1
	and r8, sl, r8
	orr r7, r7, r3, lsr #31
	adc r7, r7, r6
	mla sb, r4, ip, sb
	and r7, sb, r7
	cmp r2, r7
	cmpeq r3, r8
	bhs _022F74D4
	adds ip, ip, r3
	adc r0, r0, r2
_022F74D4:
	mov r2, r2, lsl #1
	add lr, lr, #1
	orr r2, r2, r3, lsr #31
	cmp lr, #0x20
	mov r3, r3, lsl #1
	bls _022F749C
	subs r0, r3, ip
	str r0, [r1]
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	arm_func_end ov00_022F7478

	arm_func_start ov00_022F74FC
ov00_022F74FC: ; 0x022F74FC
	ldr r1, [r0]
	add r2, r0, #4
	add r0, r2, r1, lsl #2
	cmp r1, #0
	sub r3, r0, #1
	moveq r0, #1
	bxeq lr
	cmp r2, r3
	bhs _022F7538
_022F7520:
	ldrsb r0, [r3]
	ldrsb r1, [r2]
	strb r0, [r2], #1
	strb r1, [r3], #-1
	cmp r2, r3
	blo _022F7520
_022F7538:
	mov r0, #1
	bx lr
	arm_func_end ov00_022F74FC

	arm_func_start ov00_022F7540
ov00_022F7540: ; 0x022F7540
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r2
	and r3, r5, #3
	mov r4, r0
	rsb r0, r3, #4
	mov ip, #0
	add r3, r4, #4
	and r0, r0, #3
	add r0, r3, r0
	str ip, [r4, #4]
	bl memcpy
	add r0, r5, #3
	mov r1, r0, lsr #2
	mov r0, r4
	str r1, [r4]
	bl ov00_022F74FC
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022F7540

	arm_func_start ov00_022F7584
ov00_022F7584: ; 0x022F7584
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #0x104
	mov r2, r0
	mov r4, r1
	mov r1, r2
	add r0, sp, #0
	mov r2, #0x104
	bl memcpy
	add r0, sp, #0
	bl ov00_022F74FC
	ldr r2, [sp]
	add r1, sp, #4
	mov r0, r4
	mov r2, r2, lsl #2
	bl memcpy
	mov r0, #1
	add sp, sp, #0x104
	ldmia sp!, {r3, r4, pc}
	arm_func_end ov00_022F7584

	arm_func_start ov00_022F75CC
ov00_022F75CC: ; 0x022F75CC
	ldrb r3, [r0]
	ldrb r2, [r1]
	strb r2, [r0]
	strb r3, [r1]
	bx lr
	arm_func_end ov00_022F75CC

	arm_func_start ov00_022F75E0
ov00_022F75E0: ; 0x022F75E0
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	mov r4, #0
	movs r8, r1
	mov r7, r2
	mov sb, r0
	mov r5, r4
	cmpne r7, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	strb r4, [sb]
	mov r1, r4
	strb r4, [sb, #1]
_022F760C:
	add r0, sb, r1
	strb r1, [r0, #2]
	add r1, r1, #1
	cmp r1, #0x100
	blt _022F760C
	mov r6, #0
	add sl, sb, #2
_022F7628:
	add r0, sb, r6
	ldrb r2, [r0, #2]
	ldrb r1, [r8, r5]
	add r0, sl, r6
	add r2, r4, r2
	add r1, r2, r1
	and r4, r1, #0xff
	add r1, sl, r4
	bl ov00_022F75CC
	mov r1, r7
	add r0, r5, #1
	bl _s32_div_f
	add r6, r6, #1
	cmp r6, #0x100
	and r5, r1, #0xff
	blt _022F7628
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	arm_func_end ov00_022F75E0

	arm_func_start ov00_022F766C
ov00_022F766C: ; 0x022F766C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r6, r3
	mov sb, r0
	mov r8, r1
	mov r7, r2
	mov r5, #0
	cmp r6, #0
	ldmleia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	add r4, sb, #2
_022F7690:
	ldrb r0, [sb]
	add r1, r0, #1
	and r0, r1, #0xff
	strb r1, [sb]
	add r0, sb, r0
	ldrb r1, [sb, #1]
	ldrb r0, [r0, #2]
	add r0, r1, r0
	strb r0, [sb, #1]
	ldrb r2, [sb]
	and r0, r0, #0xff
	add r1, r4, r0
	add r0, r4, r2
	bl ov00_022F75CC
	ldrb r2, [sb]
	ldrb r1, [sb, #1]
	ldrb r0, [r8, r5]
	add r2, sb, r2
	add r1, sb, r1
	ldrb r2, [r2, #2]
	ldrb r1, [r1, #2]
	add r1, r2, r1
	and r1, r1, #0xff
	add r1, sb, r1
	ldrb r1, [r1, #2]
	eor r0, r0, r1
	strb r0, [r7, r5]
	add r5, r5, #1
	cmp r5, r6
	blt _022F7690
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022F766C

	arm_func_start ov00_022F770C
ov00_022F770C: ; 0x022F770C
	cmp r0, #0
	moveq r0, #1
	bxeq lr
	mov r3, #0
	str r3, [r0, #0x14]
	str r3, [r0, #0x18]
	ldr r1, _022F7760 ; =0x67452301
	strh r3, [r0, #0x1c]
	ldr r2, _022F7764 ; =0xEFCDAB89
	str r1, [r0]
	ldr r1, _022F7768 ; =0x98BADCFE
	str r2, [r0, #4]
	ldr r2, _022F776C ; =0x10325476
	str r1, [r0, #8]
	ldr r1, _022F7770 ; =0xC3D2E1F0
	str r2, [r0, #0xc]
	str r1, [r0, #0x10]
	str r3, [r0, #0x60]
	str r3, [r0, #0x64]
	mov r0, r3
	bx lr
	.align 2, 0
_022F7760: .word 0x67452301
_022F7764: .word 0xEFCDAB89
_022F7768: .word 0x98BADCFE
_022F776C: .word 0x10325476
_022F7770: .word 0xC3D2E1F0
	arm_func_end ov00_022F770C

	arm_func_start ov00_022F7774
ov00_022F7774: ; 0x022F7774
	stmdb sp!, {r3, r4, r5, lr}
	movs r5, r0
	mov r4, r1
	cmpne r4, #0
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r1, [r5, #0x64]
	cmp r1, #0
	movne r0, r1
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r1, [r5, #0x60]
	cmp r1, #0
	bne _022F77D8
	bl ov00_022F7B24
	mov r2, #0
	mov r1, r2
_022F77B4:
	add r0, r5, r2
	add r2, r2, #1
	strb r1, [r0, #0x1e]
	cmp r2, #0x40
	blt _022F77B4
	str r1, [r5, #0x14]
	str r1, [r5, #0x18]
	mov r0, #1
	str r0, [r5, #0x60]
_022F77D8:
	mov r2, #0
_022F77DC:
	bic r1, r2, #3
	and r0, r2, #3
	rsb r0, r0, #3
	ldr r1, [r5, r1]
	mov r0, r0, lsl #3
	mov r0, r1, lsr r0
	strb r0, [r4, r2]
	add r2, r2, #1
	cmp r2, #0x14
	blt _022F77DC
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022F7774

	arm_func_start ov00_022F780C
ov00_022F780C: ; 0x022F780C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	movs r4, r2
	mov r6, r0
	mov r5, r1
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r6, #0
	cmpne r5, #0
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r0, [r6, #0x60]
	cmp r0, #0
	movne r0, #3
	strne r0, [r6, #0x64]
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r0, [r6, #0x64]
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	mov r7, #1
	b _022F78B0
_022F785C:
	ldrsh r0, [r6, #0x1c]
	mov r2, r0
	add r0, r0, #1
	strh r0, [r6, #0x1c]
	ldrb r1, [r5]
	add r0, r6, r2
	strb r1, [r0, #0x1e]
	ldr r0, [r6, #0x14]
	adds r0, r0, #8
	str r0, [r6, #0x14]
	bne _022F7898
	ldr r0, [r6, #0x18]
	adds r0, r0, #1
	str r0, [r6, #0x18]
	streq r7, [r6, #0x64]
_022F7898:
	ldrsh r0, [r6, #0x1c]
	cmp r0, #0x40
	bne _022F78AC
	mov r0, r6
	bl ov00_022F78D0
_022F78AC:
	add r5, r5, #1
_022F78B0:
	cmp r4, #0
	sub r4, r4, #1
	beq _022F78C8
	ldr r0, [r6, #0x64]
	cmp r0, #0
	beq _022F785C
_022F78C8:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022F780C

	arm_func_start ov00_022F78D0
ov00_022F78D0: ; 0x022F78D0
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #0x150
	ldr r1, _022F7B20 ; =ov00_02318474
	add r5, sp, #0
	mov lr, r0
	ldmia r1, {r0, r1, r2, r3}
	stmia r5, {r0, r1, r2, r3}
	mov r4, #0
	mov r5, r4
	add r2, sp, #0x10
_022F78F8:
	add r3, lr, r5
	ldrb r0, [r3, #0x1e]
	add r5, r5, #4
	mov r1, r0, lsl #0x18
	str r1, [r2, r4, lsl #2]
	ldrb r0, [r3, #0x1f]
	orr r1, r1, r0, lsl #16
	str r1, [r2, r4, lsl #2]
	ldrb r0, [r3, #0x20]
	orr r1, r1, r0, lsl #8
	str r1, [r2, r4, lsl #2]
	ldrb r0, [r3, #0x21]
	orr r0, r1, r0
	str r0, [r2, r4, lsl #2]
	add r4, r4, #1
	cmp r4, #0x10
	blt _022F78F8
	mov r5, #0x10
	add r4, sp, #0x10
_022F7944:
	add r3, r4, r5, lsl #2
	ldr r1, [r3, #-0xc]
	ldr r0, [r3, #-0x20]
	ldr r2, [r3, #-0x38]
	eor r0, r1, r0
	ldr r1, [r3, #-0x40]
	eor r0, r2, r0
	eor r1, r1, r0
	mov r0, r1, lsr #0x1f
	orr r0, r0, r1, lsl #1
	str r0, [r4, r5, lsl #2]
	add r5, r5, #1
	cmp r5, #0x50
	blt _022F7944
	ldmia lr, {r0, r1, r2, r3, ip}
	ldr r8, [sp]
	mov sb, #0
	add r7, sp, #0x10
_022F798C:
	mvn r6, r1
	mov r5, r0, lsr #0x1b
	and r4, r1, r2
	and sl, r6, r3
	ldr r6, [r7, sb, lsl #2]
	add sb, sb, #1
	orr r4, r4, sl
	orr r5, r5, r0, lsl #5
	add r4, r5, r4
	add r4, ip, r4
	mov ip, r3
	add r5, r6, r4
	mov r4, r1, lsr #2
	mov r3, r2
	orr r2, r4, r1, lsl #30
	cmp sb, #0x14
	mov r1, r0
	add r0, r8, r5
	blt _022F798C
	ldr r6, [sp, #4]
	mov r7, #0x14
	add r5, sp, #0x10
_022F79E4:
	mov sb, r0, lsr #0x1b
	eor r8, r1, r2
	ldr r4, [r5, r7, lsl #2]
	orr sb, sb, r0, lsl #5
	eor r8, r3, r8
	add r8, sb, r8
	add r8, ip, r8
	add r7, r7, #1
	mov ip, r3
	add r8, r4, r8
	mov r4, r1, lsr #2
	mov r3, r2
	orr r2, r4, r1, lsl #30
	cmp r7, #0x28
	mov r1, r0
	add r0, r6, r8
	blt _022F79E4
	ldr r8, [sp, #8]
	mov sb, #0x28
	add r7, sp, #0x10
_022F7A34:
	orr r6, r2, r3
	mov r5, r0, lsr #0x1b
	and r4, r2, r3
	and sl, r1, r6
	ldr r6, [r7, sb, lsl #2]
	add sb, sb, #1
	orr r4, r4, sl
	orr r5, r5, r0, lsl #5
	add r4, r5, r4
	add r4, ip, r4
	mov ip, r3
	add r5, r6, r4
	mov r4, r1, lsr #2
	mov r3, r2
	orr r2, r4, r1, lsl #30
	cmp sb, #0x3c
	mov r1, r0
	add r0, r8, r5
	blt _022F7A34
	ldr r6, [sp, #0xc]
	mov r7, #0x3c
	add r5, sp, #0x10
_022F7A8C:
	mov sb, r0, lsr #0x1b
	eor r8, r1, r2
	ldr r4, [r5, r7, lsl #2]
	orr sb, sb, r0, lsl #5
	eor r8, r3, r8
	add r8, sb, r8
	add r8, ip, r8
	add r4, r4, r8
	add r7, r7, #1
	mov ip, r3
	add r8, r6, r4
	mov r4, r1, lsr #2
	mov r3, r2
	orr r2, r4, r1, lsl #30
	cmp r7, #0x50
	mov r1, r0
	mov r0, r8
	blt _022F7A8C
	ldr r4, [lr]
	mov r0, #0
	add r4, r4, r8
	str r4, [lr]
	ldr r4, [lr, #4]
	add r1, r4, r1
	str r1, [lr, #4]
	ldr r1, [lr, #8]
	add r1, r1, r2
	str r1, [lr, #8]
	ldr r1, [lr, #0xc]
	add r1, r1, r3
	str r1, [lr, #0xc]
	ldr r1, [lr, #0x10]
	add r1, r1, ip
	str r1, [lr, #0x10]
	strh r0, [lr, #0x1c]
	add sp, sp, #0x150
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022F7B20: .word ov00_02318474
	arm_func_end ov00_022F78D0

	arm_func_start ov00_022F7B24
ov00_022F7B24: ; 0x022F7B24
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldrsh r1, [r4, #0x1c]
	add r0, r1, #1
	cmp r1, #0x37
	strh r0, [r4, #0x1c]
	ble _022F7BB8
	add r0, r4, r1
	mov r1, #0x80
	strb r1, [r0, #0x1e]
	ldrsh r0, [r4, #0x1c]
	cmp r0, #0x40
	bge _022F7B7C
	mov r1, #0
_022F7B5C:
	ldrsh r2, [r4, #0x1c]
	add r0, r4, r0
	add r2, r2, #1
	strh r2, [r4, #0x1c]
	strb r1, [r0, #0x1e]
	ldrsh r0, [r4, #0x1c]
	cmp r0, #0x40
	blt _022F7B5C
_022F7B7C:
	mov r0, r4
	bl ov00_022F78D0
	ldrsh r0, [r4, #0x1c]
	cmp r0, #0x38
	bge _022F7BF4
	mov r1, #0
_022F7B94:
	ldrsh r2, [r4, #0x1c]
	add r0, r4, r0
	add r2, r2, #1
	strh r2, [r4, #0x1c]
	strb r1, [r0, #0x1e]
	ldrsh r0, [r4, #0x1c]
	cmp r0, #0x38
	blt _022F7B94
	b _022F7BF4
_022F7BB8:
	add r0, r4, r1
	mov r1, #0x80
	strb r1, [r0, #0x1e]
	ldrsh r0, [r4, #0x1c]
	cmp r0, #0x38
	bge _022F7BF4
	mov r1, #0
_022F7BD4:
	ldrsh r2, [r4, #0x1c]
	add r0, r4, r0
	add r2, r2, #1
	strh r2, [r4, #0x1c]
	strb r1, [r0, #0x1e]
	ldrsh r0, [r4, #0x1c]
	cmp r0, #0x38
	blt _022F7BD4
_022F7BF4:
	ldr r1, [r4, #0x18]
	mov r0, r4
	mov r1, r1, lsr #0x18
	strb r1, [r4, #0x56]
	ldr r1, [r4, #0x18]
	mov r1, r1, lsr #0x10
	strb r1, [r4, #0x57]
	ldr r1, [r4, #0x18]
	mov r1, r1, lsr #8
	strb r1, [r4, #0x58]
	ldr r1, [r4, #0x18]
	strb r1, [r4, #0x59]
	ldr r1, [r4, #0x14]
	mov r1, r1, lsr #0x18
	strb r1, [r4, #0x5a]
	ldr r1, [r4, #0x14]
	mov r1, r1, lsr #0x10
	strb r1, [r4, #0x5b]
	ldr r1, [r4, #0x14]
	mov r1, r1, lsr #8
	strb r1, [r4, #0x5c]
	ldr r1, [r4, #0x14]
	strb r1, [r4, #0x5d]
	bl ov00_022F78D0
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022F7B24

	arm_func_start ov00_022F7C58
ov00_022F7C58: ; 0x022F7C58
	ldr r0, _022F7C60 ; =ov00_0232896C
	bx lr
	.align 2, 0
_022F7C60: .word ov00_0232896C
	arm_func_end ov00_022F7C58

	arm_func_start ov00_022F7C64
ov00_022F7C64: ; 0x022F7C64
	ldr ip, _022F7C70 ; =ov00_022F4758
	ldr r0, [r0, #0x20]
	bx ip
	.align 2, 0
_022F7C70: .word ov00_022F4758
	arm_func_end ov00_022F7C64

	arm_func_start ov00_022F7C74
ov00_022F7C74: ; 0x022F7C74
	ldr ip, _022F7C80 ; =memcmp
	mov r2, #0x10
	bx ip
	.align 2, 0
_022F7C80: .word memcmp
	arm_func_end ov00_022F7C74

	arm_func_start ov00_022F7C84
ov00_022F7C84: ; 0x022F7C84
	ldr ip, _022F7C98 ; =memcmp
	add r0, r0, #0x10
	add r1, r1, #0x10
	mov r2, #0x10
	bx ip
	.align 2, 0
_022F7C98: .word memcmp
	arm_func_end ov00_022F7C84

	arm_func_start ov00_022F7C9C
ov00_022F7C9C: ; 0x022F7C9C
	ldr r3, [r0]
	ldr r2, [r1]
	cmp r3, r2
	movne r0, #1
	bxne lr
	ldrh r2, [r0, #4]
	ldrh r0, [r1, #4]
	cmp r2, r0
	movne r0, #1
	moveq r0, #0
	bx lr
	arm_func_end ov00_022F7C9C

	arm_func_start ov00_022F7CC8
ov00_022F7CC8: ; 0x022F7CC8
	ldr r2, [r0, #8]
	ldr r0, [r1, #8]
	cmp r2, r0
	movne r0, #1
	moveq r0, #0
	bx lr
	arm_func_end ov00_022F7CC8

	arm_func_start ov00_022F7CE0
ov00_022F7CE0: ; 0x022F7CE0
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	bl ov00_022F7C58
	mov r7, r0
	ldr r2, [r7, #0x24]
	cmp r2, #0
	beq _022F7D04
	ldr r1, [r7, #0x2c]
	mov r0, #3
	blx r2
_022F7D04:
	ldr r0, [r7, #8]
	bl ov00_022F47A0
	mov r6, r0
	mov r5, #0
	cmp r6, #0
	ldmleia sp!, {r3, r4, r5, r6, r7, pc}
	mov r4, #3
_022F7D20:
	ldr r0, [r7, #8]
	mov r1, r5
	bl ov00_022F47A8
	ldr r2, [r0, #0x34]
	cmp r2, #0
	beq _022F7D44
	ldr r1, [r0, #0x38]
	mov r0, r4
	blx r2
_022F7D44:
	add r5, r5, #1
	cmp r5, r6
	blt _022F7D20
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022F7CE0

	arm_func_start ov00_022F7D54
ov00_022F7D54: ; 0x022F7D54
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #0x10
	mov r8, r1
	mov sb, r0
	bl ov00_022F7C58
	sub r1, r8, #2
	cmp r1, #1
	mov r5, r0
	movls r8, #2
	bls _022F7D84
	cmp r8, #4
	moveq r8, #3
_022F7D84:
	ldr r0, [r5, #8]
	bl ov00_022F47A0
	mov r7, r0
	cmp r7, #0
	mov r6, #0
	ble _022F7DF0
_022F7D9C:
	ldr r0, [r5, #8]
	mov r1, r6
	bl ov00_022F47A8
	mov r4, r0
	ldr r0, [r4, #0x24]
	cmp r0, #0
	beq _022F7DE4
	mov r0, sb
	bl ov00_0230E410
	mov sl, r0
	mov r0, sb
	bl ov00_0230E418
	mov r1, r0
	mov r0, sl
	mov r2, r8
	ldr r3, [r4, #0x38]
	ldr r4, [r4, #0x24]
	blx r4
_022F7DE4:
	add r6, r6, #1
	cmp r6, r7
	blt _022F7D9C
_022F7DF0:
	ldr r0, [r5, #0x14]
	cmp r0, #0
	beq _022F7E28
	mov r0, sb
	bl ov00_0230E410
	mov r4, r0
	mov r0, sb
	bl ov00_0230E418
	mov r1, r0
	ldr r3, [r5, #0x2c]
	mov r0, r4
	mov r2, r8
	ldr r4, [r5, #0x14]
	blx r4
_022F7E28:
	str sb, [sp, #0xc]
	mov r3, #0
	str r3, [sp]
	ldr r0, [r5, #4]
	ldr r2, _022F7E68 ; =ov00_022F7CC8
	add r1, sp, #4
	bl ov00_022F4968
	mov r1, r0
	mvn r0, #0
	cmp r1, r0
	addeq sp, sp, #0x10
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	ldr r0, [r5, #4]
	bl ov00_022F491C
	add sp, sp, #0x10
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022F7E68: .word ov00_022F7CC8
	arm_func_end ov00_022F7D54

	arm_func_start ov00_022F7E6C
ov00_022F7E6C: ; 0x022F7E6C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x20
	mov r4, r1
	mov r5, r0
	bl ov00_022F7C58
	mov r7, r0
	cmp r4, #7
	addls pc, pc, r4, lsl #2
	b _022F7EE0
_022F7E90: ; jump table
	b _022F7ED4 ; case 0
	b _022F7EE0 ; case 1
	b _022F7EBC ; case 2
	b _022F7EE0 ; case 3
	b _022F7EE0 ; case 4
	b _022F7EE0 ; case 5
	b _022F7EC8 ; case 6
	b _022F7EB0 ; case 7
_022F7EB0:
	mov r0, #7
	str r0, [sp, #4]
	b _022F7EE8
_022F7EBC:
	mov r0, #2
	str r0, [sp, #4]
	b _022F7EE8
_022F7EC8:
	mov r0, #6
	str r0, [sp, #4]
	b _022F7EE8
_022F7ED4:
	mov r0, #0
	str r0, [sp, #4]
	b _022F7EE8
_022F7EE0:
	mov r0, #0xd
	str r0, [sp, #4]
_022F7EE8:
	cmp r4, #2
	bne _022F7F38
	mov r0, r5
	bl ov00_0230E410
	str r0, [sp, #0x14]
	mov r0, r5
	bl ov00_0230E418
	strh r0, [sp, #0x18]
	mov r3, #0
	str r3, [sp]
	ldr r0, [r7, #4]
	ldr r2, _022F8080 ; =ov00_022F7C9C
	add r1, sp, #0x14
	bl ov00_022F4968
	mov r1, r0
	mvn r0, #0
	cmp r1, r0
	beq _022F7F38
	ldr r0, [r7, #4]
	bl ov00_022F491C
_022F7F38:
	ldr r0, [r7, #8]
	bl ov00_022F47A0
	mov sb, r0
	cmp sb, #0
	mov r8, #0
	ble _022F8010
	mvn r6, #0
_022F7F54:
	ldr r0, [r7, #8]
	mov r1, r8
	bl ov00_022F47A8
	mov sl, r0
	mov r0, r5
	bl ov00_0230E410
	str r0, [sp, #8]
	mov r0, r5
	bl ov00_0230E418
	strh r0, [sp, #0xc]
	mov r0, #0
	str r0, [sp]
	ldr r0, [sl, #0x20]
	ldr r2, _022F8080 ; =ov00_022F7C9C
	add r1, sp, #8
	mov r3, #0
	bl ov00_022F4968
	mov fp, r0
	cmp fp, r6
	beq _022F8004
	ldr r0, [sl, #0x2c]
	cmp r0, #0
	beq _022F7FF0
	cmp r4, #2
	moveq r6, #1
	mov r0, r5
	movne r6, #0
	bl ov00_0230E410
	mov r4, r0
	mov r0, r5
	bl ov00_0230E418
	ldr r1, [sl, #0x38]
	ldr r2, [sp, #4]
	str r1, [sp]
	mov r1, r0
	mov r0, r4
	ldr r4, [sl, #0x2c]
	mov r3, r6
	blx r4
_022F7FF0:
	ldr r0, [sl, #0x20]
	mov r1, fp
	bl ov00_022F491C
	add sp, sp, #0x20
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022F8004:
	add r8, r8, #1
	cmp r8, sb
	blt _022F7F54
_022F8010:
	ldr r0, [r7, #0x30]
	cmp r0, #0
	addle sp, sp, #0x20
	ldmleia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r7, #0x10]
	cmp r0, #0
	beq _022F806C
	cmp r4, #2
	moveq r8, #1
	mov r0, r5
	movne r8, #0
	bl ov00_0230E410
	mov r6, r0
	mov r0, r5
	bl ov00_0230E418
	ldr r2, [r7, #0x2c]
	mov r1, r0
	str r2, [sp]
	ldr r4, [r7, #0x10]
	ldr r2, [sp, #4]
	mov r0, r6
	mov r3, r8
	blx r4
_022F806C:
	ldr r0, [r7, #0x30]
	sub r0, r0, #1
	str r0, [r7, #0x30]
	add sp, sp, #0x20
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022F8080: .word ov00_022F7C9C
	arm_func_end ov00_022F7E6C

	arm_func_start ov00_022F8084
ov00_022F8084: ; 0x022F8084
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r5, r0
	mov r4, r1
	bl ov00_022F7C58
	mov r8, r0
	ldr r0, [r8, #8]
	bl ov00_022F47A0
	mov sb, r0
	cmp sb, #0
	mov r6, #0
	ble _022F8108
_022F80B0:
	ldr r0, [r8, #8]
	mov r1, r6
	bl ov00_022F47A8
	mov r7, r0
	ldr r0, [r7, #0x30]
	cmp r0, #0
	beq _022F80FC
	mov r0, r5
	bl ov00_0230E410
	mov r6, r0
	mov r0, r5
	bl ov00_0230E418
	mov r1, r0
	ldr r3, [r7, #0x38]
	ldr r5, [r7, #0x30]
	mov r0, r6
	mov r2, r4
	blx r5
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F80FC:
	add r6, r6, #1
	cmp r6, sb
	blt _022F80B0
_022F8108:
	ldr r0, [r8, #0x18]
	cmp r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	mov r0, r5
	bl ov00_0230E410
	mov r6, r0
	mov r0, r5
	bl ov00_0230E418
	mov r1, r0
	ldr r3, [r8, #0x2c]
	ldr r5, [r8, #0x18]
	mov r0, r6
	mov r2, r4
	blx r5
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022F8084

	arm_func_start ov00_022F8144
ov00_022F8144: ; 0x022F8144
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #0x44
	mov r5, r2
	mov r7, r0
	mov r6, r1
	mov r4, r3
	bl ov00_022F7C58
	mov sl, r0
	cmp r5, #0x10
	blt _022F8218
	add r8, sp, #0x18
	mov r3, r6
	mov r2, #8
_022F8178:
	ldrb r1, [r3]
	ldrb r0, [r3, #1]
	add r3, r3, #2
	subs r2, r2, #1
	strb r1, [r8]
	strb r0, [r8, #1]
	add r8, r8, #2
	bne _022F8178
	mov r3, #0
	str r3, [sp]
	ldr r0, [sl, #8]
	ldr r2, _022F8268 ; =ov00_022F7C84
	add r1, sp, #8
	bl ov00_022F4968
	mov r1, r0
	mvn r0, #0
	cmp r1, r0
	beq _022F8218
	ldr r0, [sl, #8]
	bl ov00_022F47A8
	mov sb, r0
	ldr r0, [sb, #0x28]
	cmp r0, #0
	beq _022F8218
	mov r0, r7
	bl ov00_0230E410
	mov r8, r0
	mov r0, r7
	bl ov00_0230E418
	str r4, [sp]
	ldr r2, [sb, #0x38]
	mov r1, r0
	str r2, [sp, #4]
	ldr r4, [sb, #0x28]
	mov r0, r8
	add r2, r6, #0x10
	sub r3, r5, #0x10
	blx r4
	add sp, sp, #0x44
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
_022F8218:
	ldr r0, [sl, #0x1c]
	cmp r0, #0
	addeq sp, sp, #0x44
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	mov r0, r7
	bl ov00_0230E410
	mov r8, r0
	mov r0, r7
	bl ov00_0230E418
	str r4, [sp]
	ldr r2, [sl, #0x2c]
	mov r1, r0
	str r2, [sp, #4]
	ldr r4, [sl, #0x1c]
	mov r0, r8
	mov r2, r6
	mov r3, r5
	blx r4
	add sp, sp, #0x44
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022F8268: .word ov00_022F7C84
	arm_func_end ov00_022F8144

	arm_func_start ov00_022F826C
ov00_022F826C: ; 0x022F826C
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #4
	mov r6, r1
	mov r5, r2
	mov r4, r3
	bl ov00_022F7C58
	ldr lr, [r0, #0x28]
	cmp lr, #0
	beq _022F82C0
	ldr ip, [r0, #0x2c]
	ldr r3, [sp, #0x18]
	mov r0, r6
	mov r1, r5
	mov r2, r4
	str ip, [sp]
	blx lr
	cmp r0, #0
	movne r0, #1
	add sp, sp, #4
	moveq r0, #0
	ldmia sp!, {r3, r4, r5, r6, pc}
_022F82C0:
	mov r0, #0
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, pc}
	arm_func_end ov00_022F826C

	arm_func_start ov00_022F82CC
ov00_022F82CC: ; 0x022F82CC
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x60
	mov r7, r1
	mov r6, r2
	mov r5, r3
	bl ov00_022F7C58
	ldr r1, [sp, #0x80]
	mov r4, r0
	cmp r1, #0x10
	blt _022F8390
	ldr r3, [sp, #0x7c]
	add ip, sp, #0x24
	mov r2, #8
_022F8300:
	ldrb r1, [r3]
	ldrb r0, [r3, #1]
	add r3, r3, #2
	subs r2, r2, #1
	strb r1, [ip]
	strb r0, [ip, #1]
	add ip, ip, #2
	bne _022F8300
	str r6, [sp, #0x18]
	strh r5, [sp, #0x1c]
	str r7, [sp, #0x20]
	ldr r0, [r4, #4]
	add r1, sp, #0x18
	bl ov00_022F47D4
	mov r3, #0
	str r3, [sp]
	ldr r0, [r4, #8]
	ldr r2, _022F83F8 ; =ov00_022F7C74
	add r1, sp, #0x24
	bl ov00_022F4968
	mvn r1, #0
	cmp r0, r1
	beq _022F8390
	ldr r5, _022F83FC ; =ov00_022F7D54
	ldr r4, _022F8400 ; =ov00_022F7E6C
	ldr r3, _022F8404 ; =ov00_022F8084
	ldr r2, _022F8408 ; =ov00_022F8144
	ldr r0, [sp, #0x20]
	add r1, sp, #8
	str r5, [sp, #0x10]
	str r4, [sp, #8]
	str r3, [sp, #0x14]
	str r2, [sp, #0xc]
	bl ov00_0230E0EC
	add sp, sp, #0x60
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022F8390:
	ldr ip, [r4, #0x20]
	cmp ip, #0
	beq _022F83C8
	ldr r0, [sp, #0x80]
	ldr r2, [sp, #0x78]
	str r0, [sp]
	ldr r4, [r4, #0x2c]
	ldr r3, [sp, #0x7c]
	mov r0, r6
	mov r1, r5
	str r4, [sp, #4]
	blx ip
	add sp, sp, #0x60
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022F83C8:
	mov r1, #0
	mov r0, r7
	mov r2, r1
	bl ov00_0230E0F8
	ldr r0, [r4, #4]
	bl ov00_022F47A0
	mov r1, r0
	ldr r0, [r4, #4]
	sub r1, r1, #1
	bl ov00_022F48C4
	add sp, sp, #0x60
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022F83F8: .word ov00_022F7C74
_022F83FC: .word ov00_022F7D54
_022F8400: .word ov00_022F7E6C
_022F8404: .word ov00_022F8084
_022F8408: .word ov00_022F8144
	arm_func_end ov00_022F82CC

	arm_func_start ov00_022F840C
ov00_022F840C: ; 0x022F840C
	stmdb sp!, {r3, lr}
	bl ov00_022F7C58
	ldr r0, [r0, #0xc]
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F840C

	arm_func_start ov00_022F841C
ov00_022F841C: ; 0x022F841C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
	sub sp, sp, #0x1c
	mov r6, r1
	mov r7, r0
	mov r5, r2
	mov r8, r3
	bl ov00_022F7C58
	mov r4, r0
	cmp r6, #0
	ldreq r6, _022F8560 ; =0x000005DC
	cmp r5, #0
	ldr r0, [sp, #0x48]
	str r8, [r4, #0x24]
	str r0, [r4, #0x28]
	ldr r1, [sp, #0x38]
	ldr r0, [sp, #0x3c]
	str r1, [r4, #0x10]
	str r0, [r4, #0x14]
	ldr r1, [sp, #0x40]
	ldr r0, [sp, #0x44]
	str r1, [r4, #0x18]
	str r0, [r4, #0x1c]
	ldr r3, [sp, #0x4c]
	ldreq r5, _022F8564 ; =0x000005B4
	add r2, sp, #4
	mov r1, r7
	mov r0, #0
	str r3, [r4, #0x20]
	bl ov00_02310BF4
	ldr r7, _022F8568 ; =ov00_022F7CE0
	add r1, sp, #4
	mov r0, r4
	mov r2, r5
	mov r3, r6
	str r7, [sp]
	bl ov00_0230E074
	cmp r0, #0
	addne sp, sp, #0x1c
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
	mov r0, #0xc
	mov r1, #1
	mov r2, #0
	bl ov00_022F4700
	cmp r0, #0
	str r0, [r4, #4]
	addeq sp, sp, #0x1c
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldr r2, _022F856C ; =ov00_022F7C64
	mov r0, #0x3c
	mov r1, #1
	bl ov00_022F4700
	cmp r0, #0
	str r0, [r4, #8]
	addeq sp, sp, #0x1c
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldr r0, [r4]
	ldr r1, _022F8570 ; =ov00_022F826C
	bl ov00_0230E450
	ldr r0, [r4]
	ldr r1, _022F8574 ; =ov00_022F82CC
	bl ov00_0230E0E0
	ldr r0, [r4]
	bl ov00_0230E420
	str r0, [r4, #0x34]
	ldr r0, [r4]
	bl ov00_0230E428
	strh r0, [r4, #0x38]
	mov r2, #0
	ldr r1, [sp, #0x50]
	str r2, [r4, #0x30]
	mov r0, #1
	str r0, [r4, #0xc]
	cmp r1, #0
	strne r1, [r4, #0x2c]
	streq r2, [r4, #0x2c]
	mov r0, #0
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022F8560: .word 0x000005DC
_022F8564: .word 0x000005B4
_022F8568: .word ov00_022F7CE0
_022F856C: .word ov00_022F7C64
_022F8570: .word ov00_022F826C
_022F8574: .word ov00_022F82CC
	arm_func_end ov00_022F841C

	arm_func_start ov00_022F8578
ov00_022F8578: ; 0x022F8578
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x10
	mov r7, r0
	mov r6, r1
	mov r5, r2
	bl ov00_022F7C58
	mov r4, r0
	ldr r0, [r4, #0xc]
	cmp r0, #0
	bne _022F85B4
	mov r0, #3
	str r0, [r5]
	add sp, sp, #0x10
	mov r0, #0xb
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022F85B4:
	str r7, [sp, #4]
	strh r6, [sp, #8]
	mov r3, #0
	str r3, [sp]
	ldr r0, [r4, #4]
	ldr r2, _022F8618 ; =ov00_022F7C9C
	add r1, sp, #4
	bl ov00_022F4968
	mov r1, r0
	mvn r0, #0
	cmp r1, r0
	bne _022F85F8
	mov r0, #3
	str r0, [r5]
	add sp, sp, #0x10
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022F85F8:
	ldr r0, [r4, #4]
	bl ov00_022F47A8
	ldr r0, [r0, #8]
	bl ov00_0230E3E8
	str r0, [r5]
	mov r0, #0
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022F8618: .word ov00_022F7C9C
	arm_func_end ov00_022F8578

	arm_func_start ov00_022F861C
ov00_022F861C: ; 0x022F861C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
	sub sp, sp, #0x84
	mov r8, r0
	mov r7, r1
	mov r6, r2
	mov r5, r3
	bl ov00_022F7C58
	mov r4, r0
	ldr r0, [r4, #0xc]
	cmp r0, #0
	addeq sp, sp, #0x84
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	cmp r8, #0
	cmpne r7, #0
	addeq sp, sp, #0x84
	moveq r0, #0xa
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	str r8, [sp, #0x60]
	strh r7, [sp, #0x64]
	mov r3, #0
	str r3, [sp]
	ldr r0, [r4, #4]
	ldr r2, _022F8830 ; =ov00_022F7C9C
	add r1, sp, #0x60
	bl ov00_022F4968
	mov r1, r0
	mvn r0, #0
	cmp r1, r0
	beq _022F8728
	ldr r0, [r4, #4]
	bl ov00_022F47A8
	mov r5, r0
	ldr r0, [r5, #8]
	bl ov00_0230E3E8
	cmp r0, #1
	addeq sp, sp, #0x84
	moveq r0, #5
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	cmp r0, #0
	bne _022F8824
	add r3, sp, #0x24
	mov r2, #8
_022F86C8:
	ldrb r1, [r6]
	ldrb r0, [r6, #1]
	add r6, r6, #2
	subs r2, r2, #1
	strb r1, [r3]
	strb r0, [r3, #1]
	add r3, r3, #2
	bne _022F86C8
	mov r3, #0
	str r3, [sp]
	ldr r0, [r4, #8]
	ldr r2, _022F8834 ; =ov00_022F7C74
	add r1, sp, #0x24
	bl ov00_022F4968
	mov r1, r0
	mvn r0, #0
	cmp r1, r0
	beq _022F8824
	ldr r0, [r4, #8]
	bl ov00_022F47A8
	ldr r0, [r0, #0x20]
	mov r1, r5
	bl ov00_022F47D4
	b _022F8824
_022F8728:
	add r2, sp, #0x6c
	mov r0, r8
	mov r1, r7
	bl ov00_02310BF4
	ldr r3, _022F8838 ; =ov00_022F7D54
	ldr r2, _022F883C ; =ov00_022F7E6C
	ldr r1, _022F8840 ; =ov00_022F8084
	ldr r0, _022F8844 ; =ov00_022F8144
	str r3, [sp, #0x1c]
	str r2, [sp, #0x14]
	str r1, [sp, #0x20]
	str r0, [sp, #0x18]
	mov r0, #0x10
	str r0, [sp]
	add r0, sp, #0x14
	str r5, [sp, #4]
	str r0, [sp, #8]
	mov r0, #0
	str r0, [sp, #0xc]
	ldr r0, [r4]
	add r1, sp, #0x68
	add r2, sp, #0x6c
	mov r3, r6
	bl ov00_0230E104
	ldr r0, [r4, #4]
	add r1, sp, #0x60
	bl ov00_022F47D4
	add r3, sp, #0x24
	mov r2, #8
_022F879C:
	ldrb r1, [r6]
	ldrb r0, [r6, #1]
	add r6, r6, #2
	subs r2, r2, #1
	strb r1, [r3]
	strb r0, [r3, #1]
	add r3, r3, #2
	bne _022F879C
	mov r3, #0
	str r3, [sp]
	ldr r0, [r4, #8]
	ldr r2, _022F8834 ; =ov00_022F7C74
	add r1, sp, #0x24
	bl ov00_022F4968
	mov r5, r0
	mvn r0, #0
	cmp r5, r0
	ldreq r0, [r4, #0x30]
	addeq r0, r0, #1
	streq r0, [r4, #0x30]
	beq _022F8824
	ldr r0, [r4, #4]
	bl ov00_022F47A0
	mov r1, r0
	ldr r0, [r4, #4]
	sub r1, r1, #1
	bl ov00_022F47A8
	str r0, [sp, #0x10]
	ldr r0, [r4, #8]
	mov r1, r5
	bl ov00_022F47A8
	ldr r0, [r0, #0x20]
	add r1, sp, #0x10
	bl ov00_022F47D4
_022F8824:
	mov r0, #0
	add sp, sp, #0x84
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022F8830: .word ov00_022F7C9C
_022F8834: .word ov00_022F7C74
_022F8838: .word ov00_022F7D54
_022F883C: .word ov00_022F7E6C
_022F8840: .word ov00_022F8084
_022F8844: .word ov00_022F8144
	arm_func_end ov00_022F861C

	arm_func_start ov00_022F8848
ov00_022F8848: ; 0x022F8848
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x28
	mov sb, r0
	mov r5, r1
	mov r8, r2
	mov r7, r3
	bl ov00_022F7C58
	mov r4, r0
	ldr r0, [r4, #0xc]
	cmp r0, #0
	addeq sp, sp, #0x28
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	ldrsb r0, [r8]
	mov r3, #0
	ldr r2, _022F8984 ; =ov00_022F7C9C
	cmp r0, #0
	ldrne r0, [sp, #0x48]
	str sb, [sp, #0x1c]
	strh r5, [sp, #0x20]
	addne r6, r0, #0x10
	str r3, [sp]
	ldr r0, [r4, #4]
	add r1, sp, #0x1c
	ldreq r6, [sp, #0x48]
	bl ov00_022F4968
	mov r1, r0
	mvn r0, #0
	cmp r1, r0
	bne _022F88DC
	add r2, sp, #4
	mov r0, sb
	mov r1, r5
	bl ov00_02310BF4
	add sp, sp, #0x28
	mov r0, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F88DC:
	ldr r0, [r4, #4]
	bl ov00_022F47A8
	mov r4, r0
	ldr r0, [r4, #8]
	bl ov00_0230E430
	cmp r6, r0
	ble _022F890C
	ldr r0, [sp, #0x4c]
	cmp r0, #0
	addne sp, sp, #0x28
	movne r0, #0xc
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F890C:
	mov r0, r6
	bl ov00_022F5AE4
	mov r5, r0
	mov r3, r5
	mov r2, #8
_022F8920:
	ldrb r1, [r8]
	ldrb r0, [r8, #1]
	add r8, r8, #2
	subs r2, r2, #1
	strb r1, [r3]
	strb r0, [r3, #1]
	add r3, r3, #2
	bne _022F8920
	ldr r2, [sp, #0x48]
	mov r1, r7
	add r0, r5, #0x10
	bl memcpy
	ldr r0, [r4, #8]
	ldr r3, [sp, #0x4c]
	mov r1, r5
	mov r2, r6
	bl ov00_0230E280
	mov r4, r0
	mov r0, r5
	bl ov00_022F5B14
	cmp r4, #0
	movne r0, #8
	moveq r0, #0
	add sp, sp, #0x28
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022F8984: .word ov00_022F7C9C
	arm_func_end ov00_022F8848

	arm_func_start ov00_022F8988
ov00_022F8988: ; 0x022F8988
	stmdb sp!, {r3, lr}
	bl ov00_022F7C58
	ldr r1, [r0, #0xc]
	cmp r1, #0
	moveq r0, #3
	ldmeqia sp!, {r3, pc}
	ldr r0, [r0]
	bl ov00_0230E0B0
	mov r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F8988

	arm_func_start ov00_022F89B0
ov00_022F89B0: ; 0x022F89B0
	stmdb sp!, {r4, lr}
	bl ov00_022F7C58
	mov r4, r0
	ldr r0, [r4, #0xc]
	cmp r0, #0
	moveq r0, #3
	ldmeqia sp!, {r4, pc}
	ldr r0, [r4]
	bl ov00_0230E098
	ldr r0, [r4, #8]
	bl ov00_022F4758
	ldr r0, [r4, #4]
	bl ov00_022F4758
	mov r0, #0
	str r0, [r4, #0xc]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022F89B0

	arm_func_start ov00_022F89F0
ov00_022F89F0: ; 0x022F89F0
	stmdb sp!, {r3, lr}
	bl ov00_022F7C58
	ldr r1, [r0, #0xc]
	cmp r1, #0
	ldrneh r0, [r0, #0x38]
	moveq r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F89F0

	arm_func_start ov00_022F8A0C
ov00_022F8A0C: ; 0x022F8A0C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
	sub sp, sp, #0x3c
	mov r8, r0
	mov r7, r1
	mov r6, r2
	mov r5, r3
	bl ov00_022F7C58
	mov r4, r0
	ldr r0, [r4, #0xc]
	cmp r0, #0
	addeq sp, sp, #0x3c
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldrsb r0, [r8]
	cmp r0, #0
	addeq sp, sp, #0x3c
	moveq r0, #0xa
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldrsb r0, [r7]
	cmp r0, #0
	addeq sp, sp, #0x3c
	moveq r0, #0xa
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldr r2, [sp, #0x58]
	ldr r1, [sp, #0x5c]
	ldr r0, [sp, #0x60]
	str r2, [sp, #0x24]
	add r3, sp, #0
	str r5, [sp, #0x2c]
	str r1, [sp, #0x30]
	str r0, [sp, #0x28]
	str r6, [sp, #0x34]
	mov r2, #8
_022F8A90:
	ldrb r1, [r8]
	ldrb r0, [r8, #1]
	add r8, r8, #2
	subs r2, r2, #1
	strb r1, [r3]
	strb r0, [r3, #1]
	add r3, r3, #2
	bne _022F8A90
	add r3, sp, #0x10
	mov r2, #8
_022F8AB8:
	ldrb r1, [r7]
	ldrb r0, [r7, #1]
	add r7, r7, #2
	subs r2, r2, #1
	strb r1, [r3]
	strb r0, [r3, #1]
	add r3, r3, #2
	bne _022F8AB8
	mov r0, #4
	mov r1, #1
	mov r2, #0
	bl ov00_022F4700
	str r0, [sp, #0x20]
	cmp r0, #0
	addeq sp, sp, #0x3c
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldr r0, [sp, #0x64]
	add r1, sp, #0
	str r0, [sp, #0x38]
	ldr r0, [r4, #8]
	bl ov00_022F47D4
	mov r0, #0
	add sp, sp, #0x3c
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022F8A0C

	arm_func_start ov00_022F8B1C
ov00_022F8B1C: ; 0x022F8B1C
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0x40
	mov r5, r0
	bl ov00_022F7C58
	mov r4, r0
	ldr r0, [r4, #0xc]
	cmp r0, #0
	addeq sp, sp, #0x40
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, pc}
	cmp r5, #0
	ldrnesb r0, [r5]
	cmpne r0, #0
	addeq sp, sp, #0x40
	moveq r0, #0xa
	ldmeqia sp!, {r3, r4, r5, pc}
	add r3, sp, #0x14
	mov r2, #8
_022F8B64:
	ldrb r1, [r5]
	ldrb r0, [r5, #1]
	add r5, r5, #2
	subs r2, r2, #1
	strb r1, [r3]
	strb r0, [r3, #1]
	add r3, r3, #2
	bne _022F8B64
	mov r3, #0
	str r3, [sp]
	ldr r0, [r4, #8]
	ldr r2, _022F8BC0 ; =ov00_022F7C84
	add r1, sp, #4
	bl ov00_022F4968
	mov r1, r0
	mvn r0, #0
	cmp r1, r0
	beq _022F8BB4
	ldr r0, [r4, #8]
	bl ov00_022F491C
_022F8BB4:
	mov r0, #0
	add sp, sp, #0x40
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022F8BC0: .word ov00_022F7C84
	arm_func_end ov00_022F8B1C

	arm_func_start ov00_022F8BC4
ov00_022F8BC4: ; 0x022F8BC4
	stmdb sp!, {r3, lr}
	bl ov00_022F7C58
	ldr r1, [r0, #0xc]
	cmp r1, #0
	moveq r0, #1
	ldmeqia sp!, {r3, pc}
	ldr r0, [r0, #8]
	bl ov00_022F47A0
	cmp r0, #0
	moveq r0, #1
	movne r0, #0
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F8BC4

	arm_func_start ov00_022F8BF4
ov00_022F8BF4: ; 0x022F8BF4
	stmdb sp!, {r3, lr}
	bl ov00_022F7C58
	ldr r1, [r0, #0xc]
	cmp r1, #0
	moveq r0, #1
	ldmeqia sp!, {r3, pc}
	ldr r1, [r0, #0x14]
	cmp r1, #0
	ldreq r1, [r0, #0x20]
	cmpeq r1, #0
	ldreq r1, [r0, #0x10]
	cmpeq r1, #0
	ldreq r1, [r0, #0x24]
	cmpeq r1, #0
	ldreq r1, [r0, #0x18]
	cmpeq r1, #0
	ldreq r1, [r0, #0x1c]
	cmpeq r1, #0
	ldreq r0, [r0, #0x28]
	cmpeq r0, #0
	movne r0, #0
	moveq r0, #1
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022F8BF4

	arm_func_start ov00_022F8C50
ov00_022F8C50: ; 0x022F8C50
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #0x10
	mov r6, r0
	mov r5, r1
	bl ov00_022F7C58
	mov r4, r0
	ldr r0, [r4, #0xc]
	cmp r0, #0
	addeq sp, sp, #0x10
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	str r6, [sp, #4]
	strh r5, [sp, #8]
	mov r3, #0
	str r3, [sp]
	ldr r0, [r4, #4]
	ldr r2, _022F8CCC ; =ov00_022F7C9C
	add r1, sp, #4
	bl ov00_022F4968
	mov r1, r0
	mvn r0, #0
	cmp r1, r0
	addeq sp, sp, #0x10
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	ldr r0, [r4, #4]
	bl ov00_022F47A8
	ldr r0, [r0, #8]
	bl ov00_0230E438
	add sp, sp, #0x10
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022F8CCC: .word ov00_022F7C9C
	arm_func_end ov00_022F8C50

	arm_func_start ov00_022F8CD0
ov00_022F8CD0: ; 0x022F8CD0
	ldr r0, [r0]
	bx lr
	arm_func_end ov00_022F8CD0

	arm_func_start ov00_022F8CD8
ov00_022F8CD8: ; 0x022F8CD8
	ldr r0, [r0, #4]
	bx lr
	arm_func_end ov00_022F8CD8

	arm_func_start ov00_022F8CE0
ov00_022F8CE0: ; 0x022F8CE0
	stmdb sp!, {r3, r4, r5, lr}
	movs r5, r0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	cmp r1, #0
	movle r0, #0
	ldmleia sp!, {r3, r4, r5, pc}
	ldmib r5, {r0, r2}
	add r4, r2, r1
	mov r1, r4
	bl ov00_022F5AFC
	cmp r0, #0
	moveq r0, #0
	stmneib r5, {r0, r4}
	movne r0, #1
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022F8CE0

	arm_func_start ov00_022F8D20
ov00_022F8D20: ; 0x022F8D20
	stmdb sp!, {r4, lr}
	mov r4, r1
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	cmp r4, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	cmp r2, #0
	movle r0, #0
	ldmleia sp!, {r4, pc}
	cmp r3, #0
	movle r0, #0
	ldmleia sp!, {r4, pc}
	str r0, [r4]
	mov ip, #0
	str ip, [r4, #4]
	str ip, [r4, #8]
	str ip, [r4, #0xc]
	str ip, [r4, #0x10]
	str r3, [r4, #0x14]
	str ip, [r4, #0x18]
	str ip, [r4, #0x1c]
	mov r0, r4
	mov r1, r2
	str ip, [r4, #0x20]
	bl ov00_022F8CE0
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	ldr r0, [r4, #4]
	mov r1, #0
	strb r1, [r0]
	mov r0, #1
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022F8D20

	arm_func_start ov00_022F8DAC
ov00_022F8DAC: ; 0x022F8DAC
	cmp r0, #0
	moveq r0, #0
	bxeq lr
	cmp r1, #0
	moveq r0, #0
	bxeq lr
	cmp r2, #0
	moveq r0, #0
	bxeq lr
	cmp r3, #0
	movle r0, #0
	bxle lr
	stmia r1, {r0, r2, r3}
	mov r2, #0
	str r2, [r1, #0xc]
	str r2, [r1, #0x10]
	str r2, [r1, #0x14]
	mov r0, #1
	str r0, [r1, #0x18]
	str r0, [r1, #0x1c]
	str r2, [r1, #0x20]
	ldr r1, [r1, #4]
	strb r2, [r1]
	bx lr
	arm_func_end ov00_022F8DAC

	arm_func_start ov00_022F8E0C
ov00_022F8E0C: ; 0x022F8E0C
	cmp r0, #0
	moveq r0, #0
	bxeq lr
	cmp r1, #0
	moveq r0, #0
	bxeq lr
	cmp r2, #0
	moveq r0, #0
	bxeq lr
	cmp r3, #0
	movle r0, #0
	bxle lr
	stmia r1, {r0, r2, r3}
	mov r0, #0
	str r0, [r1, #0x10]
	str r0, [r1, #0x14]
	mov r0, #1
	str r0, [r1, #0x18]
	str r0, [r1, #0x1c]
	str r0, [r1, #0x20]
	str r3, [r1, #0xc]
	bx lr
	arm_func_end ov00_022F8E0C

	arm_func_start ov00_022F8E64
ov00_022F8E64: ; 0x022F8E64
	stmdb sp!, {r4, lr}
	movs r4, r0
	ldrne r0, [r4, #4]
	cmpne r0, #0
	ldmeqia sp!, {r4, pc}
	ldr r1, [r4, #0x1c]
	cmp r1, #0
	bne _022F8E88
	bl ov00_022F5B14
_022F8E88:
	mov r0, r4
	mov r1, #0
	mov r2, #0x24
	bl memset
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022F8E64

	arm_func_start ov00_022F8E9C
ov00_022F8E9C: ; 0x022F8E9C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	movs r7, r0
	mov r6, r1
	mov r5, r2
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r6, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r5, #0
	movlt r0, #0
	ldmltia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r0, [r7, #0x20]
	cmp r0, #0
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r5, #0
	bne _022F8EF0
	mov r0, r6
	bl strlen
	mov r5, r0
_022F8EF0:
	ldr r1, [r7, #0xc]
	ldr r0, [r7, #8]
	add r4, r1, r5
	cmp r4, r0
	blt _022F8F6C
_022F8F04:
	ldr r0, [r7, #0x18]
	cmp r0, #0
	beq _022F8F30
	ldr r0, [r7]
	mov r1, #1
	str r1, [r0, #0x120]
	ldr r0, [r7]
	mov r1, #2
	str r1, [r0, #0x3c]
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022F8F30:
	ldr r1, [r7, #0x14]
	mov r0, r7
	bl ov00_022F8CE0
	cmp r0, #0
	bne _022F8F60
	ldr r0, [r7]
	mov r2, #1
	str r2, [r0, #0x120]
	ldr r1, [r7]
	mov r0, #0
	str r2, [r1, #0x3c]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022F8F60:
	ldr r0, [r7, #8]
	cmp r4, r0
	bge _022F8F04
_022F8F6C:
	ldr r3, [r7, #4]
	ldr r0, [r7, #0xc]
	mov r1, r6
	mov r2, r5
	add r0, r3, r0
	bl memcpy
	str r4, [r7, #0xc]
	ldr r0, [r7, #4]
	mov r1, #0
	strb r1, [r0, r4]
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022F8E9C

	arm_func_start ov00_022F8F9C
ov00_022F8F9C: ; 0x022F8F9C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #0xc
	mov r6, #0
	movs sl, r0
	str r6, [sp, #8]
	mov sb, r1
	mov r8, r2
	addeq sp, sp, #0xc
	moveq r0, r6
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	cmp sb, #0
	addeq sp, sp, #0xc
	moveq r0, r6
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	cmp r8, #0
	addlt sp, sp, #0xc
	movlt r0, r6
	ldmltia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	ldr r0, [sl, #0x20]
	cmp r0, #0
	addne sp, sp, #0xc
	movne r0, r6
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	ldr r1, [sl]
	ldr r0, [r1, #0x194]
	cmp r0, #0
	ldrne r0, [r1, #0x19c]
	cmpne r0, #0
	bne _022F9028
	mov r0, sl
	mov r1, sb
	mov r2, r8
	bl ov00_022F8E9C
	add sp, sp, #0xc
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
_022F9028:
	cmp r8, #0
	bne _022F903C
	mov r0, sb
	bl strlen
	mov r8, r0
_022F903C:
	cmp r8, #0
	addeq sp, sp, #0xc
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	ldr r1, [sl, #8]
	ldr r0, [sl, #0xc]
	ldr r5, _022F910C ; =0x00003F01
	sub r0, r1, r0
	str r0, [sp, #8]
	add r4, sp, #8
_022F9064:
	ldr r1, [sl, #0xc]
	ldmia sl, {r0, r2}
	add r1, r2, r1
	stmia sp, {r1, r4}
	cmp r8, r5
	movlt r7, r8
	ldr ip, [r0, #0x1a8]
	mov r3, r8
	add r1, r0, #0x190
	add r2, sb, r6
	movge r7, r5
	blx ip
	cmp r0, #2
	bne _022F90CC
	ldr r1, [sl, #0x14]
	mov r0, sl
	bl ov00_022F8CE0
	cmp r0, #0
	addeq sp, sp, #0xc
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	ldr r1, [sl, #8]
	ldr r0, [sl, #0xc]
	sub r0, r1, r0
	str r0, [sp, #8]
	b _022F90F8
_022F90CC:
	cmp r0, #1
	bne _022F90EC
	ldr r1, [sl, #8]
	ldr r0, [sp, #8]
	add r6, r6, r7
	sub r0, r1, r0
	str r0, [sl, #0xc]
	b _022F90F8
_022F90EC:
	add sp, sp, #0xc
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
_022F90F8:
	cmp r6, r8
	blt _022F9064
	mov r0, #1
	add sp, sp, #0xc
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022F910C: .word 0x00003F01
	arm_func_end ov00_022F8F9C

	arm_func_start ov00_022F9110
ov00_022F9110: ; 0x022F9110
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r2
	mov r2, #0
	mov r5, r0
	bl ov00_022F8E9C
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r1, _022F9188 ; =ov00_0231A7E4
	mov r0, r5
	mov r2, #2
	bl ov00_022F8E9C
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	mov r0, r5
	mov r1, r4
	mov r2, #0
	bl ov00_022F8E9C
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r1, _022F918C ; =ov00_0231A7E8
	mov r0, r5
	mov r2, #2
	bl ov00_022F8E9C
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022F9188: .word ov00_0231A7E4
_022F918C: .word ov00_0231A7E8
	arm_func_end ov00_022F9110

	arm_func_start ov00_022F9190
ov00_022F9190: ; 0x022F9190
	stmdb sp!, {r3, r4, r5, lr}
	movs r5, r0
	mov r4, r1
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r1, [r5, #0x20]
	cmp r1, #0
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r2, [r5, #0xc]
	ldr r1, [r5, #8]
	add r2, r2, #1
	cmp r2, r1
	blt _022F9220
	ldr r1, [r5, #0x18]
	cmp r1, #0
	beq _022F91F4
	ldr r0, [r5]
	mov r1, #1
	str r1, [r0, #0x120]
	ldr r0, [r5]
	mov r1, #2
	str r1, [r0, #0x3c]
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022F91F4:
	ldr r1, [r5, #0x14]
	bl ov00_022F8CE0
	cmp r0, #0
	bne _022F9220
	ldr r0, [r5]
	mov r2, #1
	str r2, [r0, #0x120]
	ldr r1, [r5]
	mov r0, #0
	str r2, [r1, #0x3c]
	ldmia sp!, {r3, r4, r5, pc}
_022F9220:
	ldr r1, [r5, #4]
	ldr r0, [r5, #0xc]
	mov r2, #0
	strb r4, [r1, r0]
	ldr r1, [r5, #0xc]
	mov r0, #1
	add r3, r1, #1
	str r3, [r5, #0xc]
	ldr r1, [r5, #4]
	strb r2, [r1, r3]
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022F9190

	arm_func_start ov00_022F924C
ov00_022F924C: ; 0x022F924C
	stmdb sp!, {r4, lr}
	sub sp, sp, #0x10
	mov r2, r1
	mov r4, r0
	ldr r1, _022F9280 ; =ov00_0231A7EC
	add r0, sp, #0
	bl sub_020790DC
	add r1, sp, #0
	mov r0, r4
	mov r2, #0
	bl ov00_022F8E9C
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F9280: .word ov00_0231A7EC
	arm_func_end ov00_022F924C

	arm_func_start ov00_022F9284
ov00_022F9284: ; 0x022F9284
	mov r2, #0
	str r2, [r0, #0xc]
	str r2, [r0, #0x10]
	ldr r1, [r0, #0x20]
	cmp r1, #0
	ldreq r0, [r0, #4]
	streqb r2, [r0]
	bx lr
	arm_func_end ov00_022F9284

	arm_func_start ov00_022F92A4
ov00_022F92A4: ; 0x022F92A4
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	sub sp, sp, #8
	mov r7, r0
	mov r6, #0
	add r5, sp, #4
	add r4, sp, #0
	mvn r8, #0
_022F92C0:
	ldr r0, [r7, #0x4c]
	mov r1, r6
	mov r2, r5
	mov r3, r4
	bl ov00_022F51A4
	cmp r0, r8
	beq _022F92F0
	cmp r0, #1
	bne _022F9328
	ldr r1, [sp]
	cmp r1, #0
	beq _022F9328
_022F92F0:
	mov r1, #1
	mov r2, #5
	str r1, [r7, #0x120]
	sub r1, r2, #6
	cmp r0, r1
	str r2, [r7, #0x3c]
	movne r0, #0
	bne _022F9318
	ldr r0, [r7, #0x4c]
	bl ov00_022F5194
_022F9318:
	add sp, sp, #8
	str r0, [r7, #0x50]
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022F9328:
	cmp r0, #1
	blt _022F933C
	ldr r0, [sp, #4]
	cmp r0, #0
	bne _022F9348
_022F933C:
	add sp, sp, #8
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022F9348:
	ldr r3, [r7, #0x64]
	ldr r1, [r7, #0x58]
	ldr r2, [r7, #0x60]
	mov r0, r7
	add r1, r1, r3
	sub r2, r2, r3
	bl ov00_022F9734
	cmp r0, r8
	addeq sp, sp, #8
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r1, [r7, #0x64]
	add r1, r1, r0
	str r1, [r7, #0x64]
	ldr r0, [r7, #0x60]
	cmp r1, r0
	blt _022F92C0
	mov r0, #1
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022F92A4

	arm_func_start ov00_022F9398
ov00_022F9398: ; 0x022F9398
	stmdb sp!, {r3, r4, r5, lr}
	movs r4, r2
	mov r5, r0
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r0, [r5, #0xc]
	cmp r0, r4
	movlt r0, #0
	ldmltia sp!, {r3, r4, r5, pc}
	ldr ip, [r5, #4]
	ldr r3, [r5, #0x10]
	mov r0, r1
	add r1, ip, r3
	bl memcpy
	ldr r1, [r5, #0x10]
	mov r0, #1
	add r1, r1, r4
	str r1, [r5, #0x10]
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022F9398

	arm_func_start ov00_022F93E4
ov00_022F93E4: ; 0x022F93E4
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	ldr ip, [r5, #0x44]
	cmp ip, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r0, [r5, #0xc]
	cmp r0, #0
	ldreq r4, [r5, #0xe8]
	ldr r0, [r5, #0x48]
	movne r4, #0
	str r0, [sp]
	ldr r0, [r5, #4]
	ldr r1, [r5, #0x3c]
	ldr r3, [r5, #0x124]
	mov r2, r4
	blx ip
	cmp r4, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	cmp r0, #0
	moveq r0, #1
	streq r0, [r5, #0x100]
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022F93E4

	arm_func_start ov00_022F943C
ov00_022F943C: ; 0x022F943C
	stmdb sp!, {lr}
	sub sp, sp, #0xc
	mov lr, r0
	ldr ip, [lr, #0x40]
	mov r3, r2
	cmp ip, #0
	addeq sp, sp, #0xc
	ldmeqia sp!, {pc}
	ldr r0, [lr, #0x124]
	mov r2, r1
	str r0, [sp]
	ldr r0, [lr, #0x128]
	str r0, [sp, #4]
	ldr r0, [lr, #0x48]
	str r0, [sp, #8]
	ldr r0, [lr, #4]
	ldr r1, [lr, #0x10]
	blx ip
	add sp, sp, #0xc
	ldmia sp!, {pc}
	arm_func_end ov00_022F943C

	arm_func_start ov00_022F948C
ov00_022F948C: ; 0x022F948C
	stmdb sp!, {r4, lr}
	sub sp, sp, #8
	mov r4, r0
	ldr r0, [r4, #0x174]
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r4, pc}
	ldr r0, [r4, #0x164]
	bl ov00_022F47A0
	str r0, [sp]
	ldr r0, [r4, #0x48]
	str r0, [sp, #4]
	ldr r0, [r4, #4]
	ldr r1, [r4, #0x16c]
	ldr r2, [r4, #0x170]
	ldr r3, [r4, #0x168]
	ldr ip, [r4, #0x174]
	blx ip
	add sp, sp, #8
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022F948C

	arm_func_start ov00_022F94DC
ov00_022F94DC: ; 0x022F94DC
	bx lr
	arm_func_end ov00_022F94DC

	arm_func_start ov00_022F94E0
ov00_022F94E0: ; 0x022F94E0
	bx lr
	arm_func_end ov00_022F94E0

	arm_func_start ov00_022F94E4
ov00_022F94E4: ; 0x022F94E4
	bx lr
	arm_func_end ov00_022F94E4

	arm_func_start ov00_022F94E8
ov00_022F94E8: ; 0x022F94E8
	bx lr
	arm_func_end ov00_022F94E8

	arm_func_start ov00_022F94EC
ov00_022F94EC: ; 0x022F94EC
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x10
	mov r1, #0
	mov r6, r0
	str r1, [sp, #0xc]
	str r1, [sp, #8]
	add r5, sp, #8
	add r4, sp, #0xc
_022F950C:
	ldr ip, [r6, #0xd0]
	ldr r0, [r6, #0xcc]
	ldr r2, [r6, #0xc4]
	sub r0, r0, ip
	str r0, [sp, #0xc]
	ldr r3, [r6, #0xa8]
	ldr r0, [r6, #0xa4]
	ldr r1, [r6, #0xa0]
	sub r0, r0, r3
	str r0, [sp, #8]
	add r0, r1, r3
	stmia sp, {r0, r5}
	ldr lr, [r6, #0x1ac]
	mov r0, r6
	mov r3, r4
	add r1, r6, #0x190
	add r2, r2, ip
	blx lr
	mov r7, r0
	cmp r7, #2
	bne _022F9580
	ldr r1, [r6, #0xb0]
	add r0, r6, #0x9c
	bl ov00_022F8CE0
	cmp r0, #0
	bne _022F9590
	add sp, sp, #0x10
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022F9580:
	cmp r7, #3
	addeq sp, sp, #0x10
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
_022F9590:
	cmp r7, #2
	ldreq r0, [sp, #8]
	cmpeq r0, #0
	beq _022F950C
	ldr r1, [sp, #0xc]
	ldr r0, [r6, #0xcc]
	cmp r1, r0
	addgt sp, sp, #0x10
	movgt r0, #0
	ldmgtia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r0, [r6, #0xd0]
	add r0, r0, r1
	str r0, [r6, #0xd0]
	ldr r1, [r6, #0xa8]
	ldr r0, [sp, #8]
	add r0, r1, r0
	str r0, [r6, #0xa8]
	ldr r0, [sp, #8]
	cmp r0, #0
	bgt _022F950C
	ldr r1, [r6, #0xd0]
	cmp r1, #0xff
	ble _022F9620
	ldr r0, [r6, #0xcc]
	subs r4, r0, r1
	bne _022F9604
	add r0, r6, #0xc0
	bl ov00_022F9284
	b _022F9620
_022F9604:
	ldr r0, [r6, #0xc4]
	mov r2, r4
	add r1, r0, r1
	bl memmove
	mov r0, #0
	str r0, [r6, #0xd0]
	str r4, [r6, #0xcc]
_022F9620:
	mov r0, #1
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022F94EC

	arm_func_start ov00_022F962C
ov00_022F962C: ; 0x022F962C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r5, r2
	ldr r2, [r5]
	ldr r0, [r7, #0x158]
	mov r6, r1
	cmp r0, #0
	sub r4, r2, #1
	beq _022F9680
	bl ov00_022F5594
	ldr r1, _022F9730 ; =ov00_0231A7F0
	ldr r3, [r7, #0x15c]
	ldr r2, [r1]
	add r2, r3, r2
	cmp r0, r2
	movlo r0, #1
	ldmloia sp!, {r3, r4, r5, r6, r7, pc}
	str r0, [r7, #0x15c]
	ldr r0, [r1, #4]
	cmp r4, r0
	movge r4, r0
_022F9680:
	ldr r0, [r7, #0x4c]
	mov r1, r6
	mov r2, r4
	mov r3, #0
	bl SocketRecv
	mvn r1, #0
	cmp r0, r1
	bne _022F9704
	ldr r0, [r7, #0x4c]
	bl ov00_022F5194
	mvn r2, #0x37
	cmp r0, r2
	bne _022F96C4
	mov r0, #1
	str r0, [r7, #0x154]
	mov r0, #2
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022F96C4:
	add r1, r2, #0x32
	cmp r0, r1
	addne r1, r2, #0x1e
	cmpne r0, r1
	subne r1, r2, #0x14
	cmpne r0, r1
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r2, #1
	str r2, [r7, #0x120]
	mov r1, #5
	str r1, [r7, #0x3c]
	str r0, [r7, #0x50]
	str r2, [r7, #0x154]
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022F9704:
	cmp r0, #0
	bne _022F971C
	mov r0, #1
	str r0, [r7, #0x154]
	mov r0, #2
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022F971C:
	mov r1, #0
	strb r1, [r6, r0]
	str r0, [r5]
	mov r0, r1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022F9730: .word ov00_0231A7F0
	arm_func_end ov00_022F962C

	arm_func_start ov00_022F9734
ov00_022F9734: ; 0x022F9734
	stmdb sp!, {r4, lr}
	mov r4, r0
	cmp r1, #0
	cmpne r2, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	ldr r0, [r4, #0x4c]
	mov r3, #0
	bl SocketSend
	mvn r1, #0
	cmp r0, r1
	bne _022F97A8
	ldr r0, [r4, #0x4c]
	bl ov00_022F5194
	mvn r2, #5
	cmp r0, r2
	subne r1, r2, #0x14
	cmpne r0, r1
	subne r1, r2, #0x46
	cmpne r0, r1
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	mov r1, #1
	str r1, [r4, #0x120]
	mov r1, #5
	str r1, [r4, #0x3c]
	str r0, [r4, #0x50]
	sub r0, r1, #6
	ldmia sp!, {r4, pc}
_022F97A8:
	ldr r1, [r4, #0x10]
	cmp r1, #6
	ldreq r1, [r4, #0x17c]
	cmpeq r1, #0
	ldreq r1, [r4, #0x16c]
	addeq r1, r1, r0
	streq r1, [r4, #0x16c]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022F9734

	arm_func_start ov00_022F97C8
ov00_022F97C8: ; 0x022F97C8
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	ldr r0, [r6, #0x194]
	mov r5, r1
	mov r4, r2
	cmp r0, #0
	mov r3, #0
	beq _022F9840
	ldr r0, [r6, #0x19c]
	cmp r0, #1
	bne _022F9840
	add r0, r6, #0x54
	bl ov00_022F8F9C
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	mov r0, r6
	bl ov00_022F92A4
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	ldr r1, [r6, #0x64]
	ldr r0, [r6, #0x60]
	cmp r1, r0
	movlt r0, #2
	ldmltia sp!, {r4, r5, r6, pc}
	add r0, r6, #0x54
	bl ov00_022F9284
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
_022F9840:
	ldr r1, [r6, #0x64]
	ldr r0, [r6, #0x60]
	cmp r1, r0
	blt _022F9880
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_022F9734
	mov r3, r0
	mvn r0, #0
	cmp r3, r0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	cmp r3, r4
	moveq r0, #1
	ldmeqia sp!, {r4, r5, r6, pc}
_022F9880:
	add r0, r6, #0x54
	add r1, r5, r3
	sub r2, r4, r3
	bl ov00_022F8E9C
	cmp r0, #0
	moveq r0, #0
	movne r0, #2
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022F97C8

	arm_func_start ov00_022F98A0
ov00_022F98A0: ; 0x022F98A0
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	ldr r1, _022F9988 ; =ov00_023289B0
	mov r0, #0
	ldr r3, [r1]
	cmp r3, #0
	arm_func_end ov00_022F98A0

	arm_func_start ov00_022F98B4
ov00_022F98B4: ; 0x022F98B4
	ble _022F98D8
	ldr r2, [r1, #0xc]
_022F98BC:
	ldr r1, [r2, r0, lsl #2]
	ldr r1, [r1]
	cmp r1, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	add r0, r0, #1
	cmp r0, r3
	blt _022F98BC
_022F98D8:
	ldr r0, _022F9988 ; =ov00_023289B0
	ldr r6, [r0]
	ldr r0, [r0, #0xc]
	add r5, r6, #4
	mov r1, r5, lsl #2
	bl ov00_022F5AFC
	cmp r0, #0
	mvneq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	ldr r8, _022F9988 ; =ov00_023289B0
	mov r7, r6
	str r0, [r8, #0xc]
	cmp r6, r5
	bge _022F9978
	mov sb, #0
	mov r4, #0x1b4
_022F9918:
	mov r0, r4
	bl ov00_022F5AE4
	ldr r1, [r8, #0xc]
	str r0, [r1, r7, lsl #2]
	ldr r0, [r8, #0xc]
	ldr r0, [r0, r7, lsl #2]
	cmp r0, #0
	bne _022F9968
	sub r7, r7, #1
	cmp r7, r6
	blt _022F9960
	ldr r4, _022F9988 ; =ov00_023289B0
_022F9948:
	ldr r0, [r4, #0xc]
	ldr r0, [r0, r7, lsl #2]
	bl ov00_022F5B14
	sub r7, r7, #1
	cmp r7, r6
	bge _022F9948
_022F9960:
	mvn r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022F9968:
	add r7, r7, #1
	str sb, [r0]
	cmp r7, r5
	blt _022F9918
_022F9978:
	ldr r1, _022F9988 ; =ov00_023289B0
	mov r0, r6
	str r5, [r1]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022F9988: .word ov00_023289B0
	arm_func_end ov00_022F98B4

	arm_func_start ov00_022F998C
ov00_022F998C: ; 0x022F998C
	stmdb sp!, {r3, r4, r5, lr}
	bl ov00_022F94E4
	bl ov00_022F98A0
	mov r5, r0
	mvn r0, #0
	cmp r5, r0
	bne _022F99B4
	bl ov00_022F94E8
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022F99B4:
	ldr r0, _022F9B3C ; =ov00_023289B0
	mov r1, #0
	ldr r0, [r0, #0xc]
	mov r2, #0x1b4
	ldr r4, [r0, r5, lsl #2]
	mov r0, r4
	bl memset
	mov r0, #1
	str r0, [r4]
	ldr r0, _022F9B3C ; =ov00_023289B0
	str r5, [r4, #4]
	ldr r2, [r0, #8]
	mov ip, #0
	add r1, r2, #1
	str r1, [r0, #8]
	str r2, [r4, #8]
	str ip, [r4, #0xc]
	str ip, [r4, #0x10]
	str ip, [r4, #0x14]
	str ip, [r4, #0x18]
	str ip, [r4, #0x1c]
	strh ip, [r4, #0x20]
	str ip, [r4, #0x24]
	str ip, [r4, #0x2c]
	str ip, [r4, #0x30]
	str ip, [r4, #0x34]
	str ip, [r4, #0x38]
	str ip, [r4, #0x3c]
	str ip, [r4, #0x40]
	str ip, [r4, #0x44]
	str ip, [r4, #0x48]
	sub r0, ip, #1
	str r0, [r4, #0x4c]
	str ip, [r4, #0x50]
	str ip, [r4, #0x108]
	str ip, [r4, #0x10c]
	str ip, [r4, #0x110]
	str ip, [r4, #0x114]
	str ip, [r4, #0x118]
	str ip, [r4, #0x11c]
	str ip, [r4, #0x120]
	str ip, [r4, #0x124]
	str r0, [r4, #0x128]
	str ip, [r4, #0x12c]
	str ip, [r4, #0x130]
	str ip, [r4, #0x134]
	str ip, [r4, #0x150]
	str ip, [r4, #0x158]
	str ip, [r4, #0x15c]
	str ip, [r4, #0x160]
	mov r0, #0x1f4
	str r0, [r4, #0x184]
	add r0, r4, #0x100
	mov r1, #0x50
	strh r1, [r0, #0x8c]
	str ip, [r4, #0x188]
	str ip, [r4, #0x190]
	mov r0, r4
	add r1, r4, #0x54
	mov r2, #0x800
	mov r3, #0x1000
	str ip, [r4, #0x1b0]
	bl ov00_022F8D20
	cmp r0, #0
	beq _022F9ACC
	mov r0, r4
	add r1, r4, #0x78
	mov r2, #0x800
	mov r3, #0x400
	bl ov00_022F8D20
_022F9ACC:
	cmp r0, #0
	beq _022F9AE8
	mov r2, #0x800
	mov r0, r4
	mov r3, r2
	add r1, r4, #0x9c
	bl ov00_022F8D20
_022F9AE8:
	cmp r0, #0
	beq _022F9B04
	mov r0, r4
	add r1, r4, #0xc0
	mov r2, #0x800
	mov r3, #0x400
	bl ov00_022F8D20
_022F9B04:
	cmp r0, #0
	bne _022F9B20
	mov r0, r4
	bl ov00_022F9B40
	bl ov00_022F94E8
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_022F9B20:
	ldr r0, _022F9B3C ; =ov00_023289B0
	ldr r1, [r0, #4]
	add r1, r1, #1
	str r1, [r0, #4]
	bl ov00_022F94E8
	mov r0, r4
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022F9B3C: .word ov00_023289B0
	arm_func_end ov00_022F998C

	arm_func_start ov00_022F9B40
ov00_022F9B40: ; 0x022F9B40
	stmdb sp!, {r4, lr}
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	ldr r0, [r4]
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	ldr r1, [r4, #4]
	cmp r1, #0
	movlt r0, #0
	ldmltia sp!, {r4, pc}
	ldr r0, _022F9C8C ; =ov00_023289B0
	ldr r0, [r0]
	cmp r1, r0
	movge r0, #0
	ldmgeia sp!, {r4, pc}
	bl ov00_022F94E4
	ldr r0, [r4, #0x14]
	bl ov00_022F5B14
	ldr r0, [r4, #0x18]
	bl ov00_022F5B14
	ldr r0, [r4, #0x24]
	bl ov00_022F5B14
	ldr r0, [r4, #0x2c]
	bl ov00_022F5B14
	ldr r0, [r4, #0x12c]
	bl ov00_022F5B14
	ldr r0, [r4, #0x188]
	bl ov00_022F5B14
	ldr r0, [r4, #0x4c]
	mvn r1, #0
	cmp r0, r1
	beq _022F9BD8
	mov r1, #2
	bl ov00_022F4FC8
	ldr r0, [r4, #0x4c]
	bl SocketClose
_022F9BD8:
	add r0, r4, #0x54
	bl ov00_022F8E64
	add r0, r4, #0x78
	bl ov00_022F8E64
	add r0, r4, #0x9c
	bl ov00_022F8E64
	add r0, r4, #0xc0
	bl ov00_022F8E64
	add r0, r4, #0xe4
	bl ov00_022F8E64
	ldr r0, [r4, #0x164]
	cmp r0, #0
	beq _022F9C14
	mov r0, r4
	bl ov00_022FC85C
_022F9C14:
	ldr r0, [r4, #0x160]
	cmp r0, #0
	beq _022F9C3C
	bl ov00_022FC1F0
	cmp r0, #0
	beq _022F9C3C
	ldr r0, [r4, #0x160]
	bl ov00_022FC1F8
	mov r0, #0
	str r0, [r4, #0x160]
_022F9C3C:
	ldr r0, [r4, #0x198]
	cmp r0, #0
	beq _022F9C68
	ldr r2, [r4, #0x1a4]
	cmp r2, #0
	beq _022F9C60
	mov r0, r4
	add r1, r4, #0x190
	blx r2
_022F9C60:
	mov r0, #0
	str r0, [r4, #0x198]
_022F9C68:
	mov r1, #0
	ldr r0, _022F9C8C ; =ov00_023289B0
	str r1, [r4]
	ldr r1, [r0, #4]
	sub r1, r1, #1
	str r1, [r0, #4]
	bl ov00_022F94E8
	mov r0, #1
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F9C8C: .word ov00_023289B0
	arm_func_end ov00_022F9B40

	arm_func_start ov00_022F9C90
ov00_022F9C90: ; 0x022F9C90
	stmdb sp!, {r4, lr}
	mov r4, r0
	bl ov00_022F94E4
	cmp r4, #0
	blt _022F9CB4
	ldr r0, _022F9CE0 ; =ov00_023289B0
	ldr r1, [r0]
	cmp r4, r1
	blt _022F9CC0
_022F9CB4:
	bl ov00_022F94E8
	mov r0, #0
	ldmia sp!, {r4, pc}
_022F9CC0:
	ldr r0, [r0, #0xc]
	ldr r4, [r0, r4, lsl #2]
	ldr r0, [r4]
	cmp r0, #0
	moveq r4, #0
	bl ov00_022F94E8
	mov r0, r4
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F9CE0: .word ov00_023289B0
	arm_func_end ov00_022F9C90

	arm_func_start ov00_022F9CE4
ov00_022F9CE4: ; 0x022F9CE4
	stmdb sp!, {r4, r5, r6, lr}
	ldr r1, _022F9D44 ; =ov00_023289B0
	mov r4, r0
	ldr r0, [r1, #4]
	cmp r0, #0
	ldmleia sp!, {r4, r5, r6, pc}
	bl ov00_022F94E4
	ldr r5, _022F9D44 ; =ov00_023289B0
	mov r6, #0
	ldr r0, [r5]
	cmp r0, #0
	ble _022F9D3C
_022F9D14:
	ldr r0, [r5, #0xc]
	ldr r0, [r0, r6, lsl #2]
	ldr r1, [r0]
	cmp r1, #0
	beq _022F9D2C
	blx r4
_022F9D2C:
	ldr r0, [r5]
	add r6, r6, #1
	cmp r6, r0
	blt _022F9D14
_022F9D3C:
	bl ov00_022F94E8
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022F9D44: .word ov00_023289B0
	arm_func_end ov00_022F9CE4

	arm_func_start ov00_022F9D48
ov00_022F9D48: ; 0x022F9D48
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r0, #0
	str r0, [r4, #0x10]
	ldr r0, [r4, #0x1b0]
	cmp r0, #0
	beq _022F9D78
	bl ov00_022F54F4
	ldr r0, [r4, #0x1b0]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0x1b0]
_022F9D78:
	ldr r0, [r4, #0x14]
	bl ov00_022F5B14
	ldr r1, [r4, #0x12c]
	mov r0, #0
	str r1, [r4, #0x14]
	str r0, [r4, #0x12c]
	ldr r0, [r4, #0x18]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0x18]
	str r0, [r4, #0x1c]
	strh r0, [r4, #0x20]
	ldr r0, [r4, #0x24]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0x24]
	ldr r0, [r4, #0x4c]
	mov r1, #2
	bl ov00_022F4FC8
	ldr r0, [r4, #0x4c]
	bl SocketClose
	mvn r1, #0
	add r0, r4, #0x54
	str r1, [r4, #0x4c]
	bl ov00_022F9284
	add r0, r4, #0x78
	bl ov00_022F9284
	add r0, r4, #0x9c
	bl ov00_022F9284
	add r0, r4, #0xc0
	bl ov00_022F9284
	mov r0, #0
	str r0, [r4, #0x10c]
	str r0, [r4, #0x110]
	str r0, [r4, #0x114]
	str r0, [r4, #0x118]
	str r0, [r4, #0x11c]
	str r0, [r4, #0x154]
	ldr r0, [r4, #0x198]
	cmp r0, #0
	beq _022F9E5C
	ldr r2, [r4, #0x1a4]
	cmp r2, #0
	beq _022F9E34
	mov r0, r4
	add r1, r4, #0x190
	blx r2
_022F9E34:
	mov r0, #0
	str r0, [r4, #0x198]
	ldr r1, [r4, #0x14]
	ldr r0, _022F9E6C ; =ov00_0231A7F8
	mov r2, #8
	bl strncmp
	cmp r0, #0
	movne r0, #0
	strne r0, [r4, #0x194]
	strne r0, [r4, #0x190]
_022F9E5C:
	ldr r0, [r4, #0x130]
	add r0, r0, #1
	str r0, [r4, #0x130]
	ldmia sp!, {r4, pc}
	.align 2, 0
_022F9E6C: .word ov00_0231A7F8
	arm_func_end ov00_022F9D48

	arm_func_start ov00_022F9E70
ov00_022F9E70: ; 0x022F9E70
	stmdb sp!, {r3, r4, r5, lr}
	ldr r0, _022F9EE0 ; =ov00_023289B0
	ldr r0, [r0, #0xc]
	cmp r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r0, _022F9EE4 ; =ov00_022F9B40
	bl ov00_022F9CE4
	ldr r4, _022F9EE0 ; =ov00_023289B0
	mov r5, #0
	ldr r0, [r4]
	cmp r0, #0
	ble _022F9EBC
_022F9EA0:
	ldr r0, [r4, #0xc]
	ldr r0, [r0, r5, lsl #2]
	bl ov00_022F5B14
	ldr r0, [r4]
	add r5, r5, #1
	cmp r5, r0
	blt _022F9EA0
_022F9EBC:
	ldr r0, _022F9EE0 ; =ov00_023289B0
	ldr r0, [r0, #0xc]
	bl ov00_022F5B14
	ldr r0, _022F9EE0 ; =ov00_023289B0
	mov r1, #0
	str r1, [r0, #0xc]
	str r1, [r0]
	str r1, [r0, #4]
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022F9EE0: .word ov00_023289B0
_022F9EE4: .word ov00_022F9B40
	arm_func_end ov00_022F9E70

	arm_func_start ov00_022F9EE8
ov00_022F9EE8: ; 0x022F9EE8
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r1
	bl ov00_022F9C90
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r1, [r4, #0x194]
	cmp r1, r5
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r0, [r4, #0x190]
	cmp r0, #0
	cmpne r1, r5
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	cmp r5, #0
	bne _022F9F48
	ldr r0, [r4, #0x14]
	ldr r1, _022F9F9C ; =ov00_0231A804
	mov r2, #8
	bl strncmp
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
_022F9F48:
	str r5, [r4, #0x194]
	cmp r5, #0
	bne _022F9F64
	mov r0, #0
	str r0, [r4, #0x190]
	mov r0, #1
	ldmia sp!, {r3, r4, r5, pc}
_022F9F64:
	mov r2, #0
	ldr r1, _022F9FA0 ; =ov00_022FA6A8
	str r2, [r4, #0x190]
	ldr r0, _022F9FA4 ; =ov00_022FA8B0
	str r1, [r4, #0x1a0]
	ldr r1, _022F9FA8 ; =ov00_022FA8E8
	str r0, [r4, #0x1a4]
	ldr r0, _022F9FAC ; =ov00_022FAAF8
	str r1, [r4, #0x1a8]
	str r0, [r4, #0x1ac]
	str r2, [r4, #0x198]
	str r2, [r4, #0x19c]
	mov r0, #1
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022F9F9C: .word ov00_0231A804
_022F9FA0: .word ov00_022FA6A8
_022F9FA4: .word ov00_022FA8B0
_022F9FA8: .word ov00_022FA8E8
_022F9FAC: .word ov00_022FAAF8
	arm_func_end ov00_022F9EE8

	arm_func_start ov00_022F9FB0
ov00_022F9FB0: ; 0x022F9FB0
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #4
	mov ip, r1, lsr #0x18
	mov r4, r1, lsl #0x18
	mov r3, r1, lsr #8
	mov lr, r1, lsl #8
	and r1, r3, #0xff00
	and ip, ip, #0xff
	and r3, lr, #0xff0000
	orr r1, ip, r1
	orr r1, r3, r1
	and r4, r4, #0xff000000
	orr r1, r4, r1
	str r1, [sp]
	cmp r2, #4
	add r3, sp, #0
	addhi sp, sp, #4
	ldmhiia sp!, {r3, r4, pc}
	rsb r1, r2, #4
	add r1, r3, r1
	bl memcpy
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
	arm_func_end ov00_022F9FB0

	arm_func_start ov00_022FA00C
ov00_022FA00C: ; 0x022FA00C
	stmdb sp!, {r4, lr}
	mov r4, r1
	cmp r2, #4
	movhi r0, #0
	ldmhiia sp!, {r4, pc}
	rsb r1, r2, #4
	add r1, r4, r1
	bl ov00_022F9398
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	ldr ip, [r4]
	mov r0, #1
	mov r2, ip, lsr #0x18
	mov r1, ip, lsr #8
	mov r3, ip, lsl #8
	mov ip, ip, lsl #0x18
	and r2, r2, #0xff
	and r1, r1, #0xff00
	and r3, r3, #0xff0000
	orr r1, r2, r1
	and r2, ip, #0xff000000
	orr r1, r3, r1
	orr r1, r2, r1
	str r1, [r4]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022FA00C

	arm_func_start ov00_022FA074
ov00_022FA074: ; 0x022FA074
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #8
	mov r4, r1
	mov r3, #0
	add r1, sp, #0
	mov r2, #1
	mov r5, r0
	strb r3, [sp]
	bl ov00_022F9398
	cmp r0, #0
	addeq sp, sp, #8
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldrsb r0, [sp]
	cmp r0, #0x30
	addne sp, sp, #8
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	add r1, sp, #0
	mov r0, r5
	mov r2, #1
	bl ov00_022F9398
	cmp r0, #0
	addeq sp, sp, #8
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldrsb r2, [sp]
	and r0, r2, #0x80
	cmp r0, #0x80
	bne _022FA144
	eor r0, r2, #0x80
	strb r0, [sp]
	ldrsb r2, [sp]
	mov r3, #0
	add r1, sp, #4
	mov r0, r5
	str r3, [sp, #4]
	bl ov00_022FA00C
	cmp r0, #0
	addeq sp, sp, #8
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r1, [r5, #0xc]
	ldr r0, [r5, #0x10]
	ldr r2, [sp, #4]
	sub r0, r1, r0
	cmp r2, r0
	movgt r0, #0
	add sp, sp, #8
	strle r2, [r4]
	movle r0, #1
	ldmia sp!, {r3, r4, r5, pc}
_022FA144:
	ldr r1, [r5, #0xc]
	ldr r0, [r5, #0x10]
	sub r0, r1, r0
	cmp r2, r0
	movgt r0, #0
	strle r2, [r4]
	movle r0, #1
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022FA074

	arm_func_start ov00_022FA168
ov00_022FA168: ; 0x022FA168
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #0x114
	mov r4, r0
	add r0, sp, #0xac
	bl ov00_022F770C
	ldr r1, _022FA698 ; =ov00_0231A810
	add r0, sp, #0xac
	mov r2, #1
	bl ov00_022F780C
	add r1, r4, #0x2a4
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x30
	bl ov00_022F780C
	add r1, r4, #0x284
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x20
	bl ov00_022F780C
	add r1, r4, #0x264
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x20
	bl ov00_022F780C
	add r0, sp, #0xac
	add r1, sp, #0x40
	bl ov00_022F7774
	add r0, sp, #0x54
	bl ov00_022D4A4C
	add r1, r4, #0x2a4
	add r0, sp, #0x54
	add r1, r1, #0x400
	mov r2, #0x30
	bl ov00_022D4A58
	add r0, sp, #0x54
	add r1, sp, #0x40
	mov r2, #0x14
	bl ov00_022D4A58
	add r0, r4, #0x2d4
	add r0, r0, #0x400
	add r1, sp, #0x54
	bl ov00_022D4A64
	add r0, sp, #0xac
	bl ov00_022F770C
	ldr r1, _022FA69C ; =ov00_0231A814
	add r0, sp, #0xac
	mov r2, #2
	bl ov00_022F780C
	add r1, r4, #0x2a4
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x30
	bl ov00_022F780C
	add r1, r4, #0x284
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x20
	bl ov00_022F780C
	add r1, r4, #0x264
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x20
	bl ov00_022F780C
	add r0, sp, #0xac
	add r1, sp, #0x40
	bl ov00_022F7774
	add r0, sp, #0x54
	bl ov00_022D4A4C
	add r1, r4, #0x2a4
	add r0, sp, #0x54
	add r1, r1, #0x400
	mov r2, #0x30
	bl ov00_022D4A58
	add r0, sp, #0x54
	add r1, sp, #0x40
	mov r2, #0x14
	bl ov00_022D4A58
	add r0, r4, #0x2e4
	add r0, r0, #0x400
	add r1, sp, #0x54
	bl ov00_022D4A64
	add r0, sp, #0xac
	bl ov00_022F770C
	ldr r1, _022FA6A0 ; =ov00_0231A818
	add r0, sp, #0xac
	mov r2, #3
	bl ov00_022F780C
	add r1, r4, #0x2a4
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x30
	bl ov00_022F780C
	add r1, r4, #0x284
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x20
	bl ov00_022F780C
	add r1, r4, #0x264
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x20
	bl ov00_022F780C
	add r0, sp, #0xac
	add r1, sp, #0x40
	bl ov00_022F7774
	add r0, sp, #0x54
	bl ov00_022D4A4C
	add r1, r4, #0x2a4
	add r0, sp, #0x54
	add r1, r1, #0x400
	mov r2, #0x30
	bl ov00_022D4A58
	add r0, sp, #0x54
	add r1, sp, #0x40
	mov r2, #0x14
	bl ov00_022D4A58
	add r0, r4, #0x2f4
	add r0, r0, #0x400
	add r1, sp, #0x54
	bl ov00_022D4A64
	add r0, sp, #0xac
	bl ov00_022F770C
	ldr r1, _022FA698 ; =ov00_0231A810
	add r0, sp, #0xac
	mov r2, #1
	bl ov00_022F780C
	add r1, r4, #0x2d4
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x30
	bl ov00_022F780C
	add r1, r4, #0x264
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x20
	bl ov00_022F780C
	add r1, r4, #0x284
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x20
	bl ov00_022F780C
	add r0, sp, #0xac
	add r1, sp, #0x40
	bl ov00_022F7774
	add r0, sp, #0x54
	bl ov00_022D4A4C
	add r1, r4, #0x2d4
	add r0, sp, #0x54
	add r1, r1, #0x400
	mov r2, #0x30
	bl ov00_022D4A58
	add r0, sp, #0x54
	add r1, sp, #0x40
	mov r2, #0x14
	bl ov00_022D4A58
	add r0, sp, #0
	add r1, sp, #0x54
	bl ov00_022D4A64
	add r0, sp, #0xac
	bl ov00_022F770C
	ldr r1, _022FA69C ; =ov00_0231A814
	add r0, sp, #0xac
	mov r2, #2
	bl ov00_022F780C
	add r1, r4, #0x2d4
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x30
	bl ov00_022F780C
	add r1, r4, #0x264
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x20
	bl ov00_022F780C
	add r1, r4, #0x284
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x20
	bl ov00_022F780C
	add r0, sp, #0xac
	add r1, sp, #0x40
	bl ov00_022F7774
	add r0, sp, #0x54
	bl ov00_022D4A4C
	add r1, r4, #0x2d4
	add r0, sp, #0x54
	add r1, r1, #0x400
	mov r2, #0x30
	bl ov00_022D4A58
	add r0, sp, #0x54
	add r1, sp, #0x40
	mov r2, #0x14
	bl ov00_022D4A58
	add r0, sp, #0x10
	add r1, sp, #0x54
	bl ov00_022D4A64
	add r0, sp, #0xac
	bl ov00_022F770C
	ldr r1, _022FA6A0 ; =ov00_0231A818
	add r0, sp, #0xac
	mov r2, #3
	bl ov00_022F780C
	add r0, r4, #0x2d4
	add r1, r0, #0x400
	add r0, sp, #0xac
	mov r2, #0x30
	bl ov00_022F780C
	add r1, r4, #0x264
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x20
	bl ov00_022F780C
	add r1, r4, #0x284
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x20
	bl ov00_022F780C
	add r0, sp, #0xac
	add r1, sp, #0x40
	bl ov00_022F7774
	add r0, sp, #0x54
	bl ov00_022D4A4C
	add r1, r4, #0x2d4
	add r0, sp, #0x54
	add r1, r1, #0x400
	mov r2, #0x30
	bl ov00_022D4A58
	add r0, sp, #0x54
	add r1, sp, #0x40
	mov r2, #0x14
	bl ov00_022D4A58
	add r0, sp, #0x20
	add r1, sp, #0x54
	bl ov00_022D4A64
	add r0, sp, #0xac
	bl ov00_022F770C
	ldr r1, _022FA6A4 ; =ov00_0231A81C
	add r0, sp, #0xac
	mov r2, #4
	bl ov00_022F780C
	add r1, r4, #0x2d4
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x30
	bl ov00_022F780C
	add r1, r4, #0x264
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x20
	bl ov00_022F780C
	add r1, r4, #0x284
	add r0, sp, #0xac
	add r1, r1, #0x400
	mov r2, #0x20
	bl ov00_022F780C
	add r0, sp, #0xac
	add r1, sp, #0x40
	bl ov00_022F7774
	add r0, sp, #0x54
	bl ov00_022D4A4C
	add r1, r4, #0x2d4
	add r0, sp, #0x54
	add r1, r1, #0x400
	mov r2, #0x30
	bl ov00_022D4A58
	add r0, sp, #0x54
	add r1, sp, #0x40
	mov r2, #0x14
	bl ov00_022D4A58
	add r0, sp, #0x30
	add r1, sp, #0x54
	bl ov00_022D4A64
	add ip, r4, #0x320
	add r3, sp, #0
	mov r2, #8
_022FA5B4:
	ldrb r1, [r3]
	ldrb r0, [r3, #1]
	add r3, r3, #2
	subs r2, r2, #1
	strb r1, [ip]
	strb r0, [ip, #1]
	add ip, ip, #2
	bne _022FA5B4
	add r3, sp, #0x10
	add ip, r4, #0x334
	mov r2, #8
_022FA5E0:
	ldrb r1, [r3]
	ldrb r0, [r3, #1]
	add r3, r3, #2
	subs r2, r2, #1
	strb r1, [ip]
	strb r0, [ip, #1]
	add ip, ip, #2
	bne _022FA5E0
	add r3, sp, #0x20
	add ip, r4, #0x348
	mov r2, #8
_022FA60C:
	ldrb r1, [r3]
	ldrb r0, [r3, #1]
	add r3, r3, #2
	subs r2, r2, #1
	strb r1, [ip]
	strb r0, [ip, #1]
	add ip, ip, #2
	bne _022FA60C
	add r3, sp, #0x30
	add ip, r4, #0x358
	mov r2, #8
_022FA638:
	ldrb r1, [r3]
	ldrb r0, [r3, #1]
	add r3, r3, #2
	subs r2, r2, #1
	strb r1, [ip]
	strb r0, [ip, #1]
	add ip, ip, #2
	bne _022FA638
	mov r0, #0x10
	str r0, [r4, #0x388]
	str r0, [r4, #0x38c]
	str r0, [r4, #0x390]
	str r0, [r4, #0x394]
	ldr r2, [r4, #0x390]
	add r0, r4, #0x3a0
	add r1, r4, #0x348
	bl ov00_022F75E0
	add r0, r4, #0xa2
	ldr r2, [r4, #0x394]
	add r0, r0, #0x400
	add r1, r4, #0x358
	bl ov00_022F75E0
	add sp, sp, #0x114
	ldmia sp!, {r3, r4, pc}
	.align 2, 0
_022FA698: .word ov00_0231A810
_022FA69C: .word ov00_0231A814
_022FA6A0: .word ov00_0231A818
_022FA6A4: .word ov00_0231A81C
	arm_func_end ov00_022FA168

	arm_func_start ov00_022FA6A8
ov00_022FA6A8: ; 0x022FA6A8
	stmdb sp!, {r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x34
	mov r6, r0
	ldr r2, [r6, #0x5c]
	ldr r0, [r6, #0x60]
	mov r5, r1
	sub r0, r2, r0
	cmp r0, #0x32
	addlo sp, sp, #0x34
	movlo r0, #2
	ldmloia sp!, {r4, r5, r6, r7, r8, sb, pc}
	ldr r0, _022FA8A8 ; =0x00000704
	bl ov00_022F5AE4
	cmp r0, #0
	str r0, [r5]
	addeq sp, sp, #0x34
	moveq r0, #3
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, pc}
	ldr r2, _022FA8A8 ; =0x00000704
	mov r1, #0
	bl memset
	ldr r4, [r5]
	mov r1, #1
	add r0, r4, #0x1a4
	str r1, [r5, #8]
	mov r1, #0
	add r0, r0, #0x400
	str r1, [r5, #0xc]
	bl ov00_022D4A4C
	add r0, r4, #0x1fc
	add r0, r0, #0x400
	bl ov00_022F770C
	mov r0, #0x16
	mov r1, #3
	mov r2, #0
	strb r0, [sp]
	strb r1, [sp, #1]
	strb r2, [sp, #2]
	add r0, sp, #3
	mov r1, #0x2d
	mov r2, #2
	bl ov00_022F9FB0
	mov r0, #1
	strb r0, [sp, #5]
	mov r0, #0
	mov r2, #3
	strb r0, [sp, #0xa]
	add r0, sp, #6
	mov r1, #0x29
	strb r2, [sp, #9]
	bl ov00_022F9FB0
	add r0, sp, #0xb
	mov r1, #0
	mov r2, #4
	bl ov00_022F9FB0
	bl ov00_022F5594
	bl srand
	mov r8, #0
	add sb, sp, #0
	mov r7, r8
	mov r5, #0xff
_022FA79C:
	mov r0, r7
	mov r1, r5
	bl RandRangeOverlay0
	add r8, r8, #1
	strb r0, [sb, #0xf]
	cmp r8, #0x1c
	add sb, sb, #1
	blt _022FA79C
	add ip, sp, #0xb
	ldrb r2, [ip]
	ldrb r1, [ip, #1]
	add r0, r4, #0x288
	add r5, r0, #0x400
	strb r2, [r4, #0x684]
	strb r1, [r4, #0x685]
	ldrb r1, [ip, #2]
	ldrb r0, [ip, #3]
	add r3, sp, #0xf
	mov r2, #0xe
	strb r1, [r4, #0x686]
	strb r0, [r4, #0x687]
_022FA7F0:
	ldrb r1, [r3]
	ldrb r0, [r3, #1]
	add r3, r3, #2
	subs r2, r2, #1
	strb r1, [r5]
	strb r0, [r5, #1]
	add r5, r5, #2
	bne _022FA7F0
	ldr r0, _022FA8AC ; =ov00_02318490
	mov ip, #0
	ldr r0, [r0]
	add r1, sp, #0
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	mov lr, r0, asr #8
	mov r2, r0, lsl #8
	add r0, r4, #0x1a4
	mov r3, #0x200
	mov r5, #1
	and lr, lr, #0xff
	and r2, r2, #0xff00
	orr lr, lr, r2
	add r0, r0, #0x400
	add r1, r1, #5
	mov r2, #0x2d
	strb ip, [sp, #0x2b]
	strh r3, [sp, #0x2c]
	strh lr, [sp, #0x2e]
	strb r5, [sp, #0x30]
	strb ip, [sp, #0x31]
	bl ov00_022D4A58
	add r1, sp, #0
	add r0, r4, #0x1fc
	add r0, r0, #0x400
	add r1, r1, #5
	mov r2, #0x2d
	bl ov00_022F780C
	add r1, sp, #0
	add r0, r6, #0x54
	mov r2, #0x32
	bl ov00_022F8E9C
	cmp r0, #0
	moveq r0, #2
	movne r0, r5
	add sp, sp, #0x34
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022FA8A8: .word 0x00000704
_022FA8AC: .word ov00_02318490
	arm_func_end ov00_022FA6A8

	arm_func_start ov00_022FA8B0
ov00_022FA8B0: ; 0x022FA8B0
	stmdb sp!, {r4, lr}
	movs r4, r1
	beq _022FA8E0
	ldr r0, [r4]
	cmp r0, #0
	beq _022FA8D4
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4]
_022FA8D4:
	mov r0, #0
	str r0, [r4, #8]
	str r0, [r4, #0xc]
_022FA8E0:
	mov r0, #1
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022FA8B0

	arm_func_start ov00_022FA8E8
ov00_022FA8E8: ; 0x022FA8E8
	stmdb sp!, {r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x6c
	mov sb, r2
	mov r8, r3
	cmp r1, #0
	ldr r7, [sp, #0x88]
	ldr r6, [sp, #0x8c]
	beq _022FAAE0
	ldr r4, [r1]
	cmp r4, #0
	ldrne r0, [r1, #0xc]
	cmpne r0, #0
	bne _022FA950
	ldr r0, [r6]
	cmp r8, r0
	addgt sp, sp, #0x6c
	movgt r0, #2
	ldmgtia sp!, {r4, r5, r6, r7, r8, sb, pc}
	mov r0, r7
	mov r1, sb
	mov r2, r8
	bl memcpy
	ldr r0, [r6]
	add r0, r0, r8
	str r0, [r6]
	b _022FAAE0
_022FA950:
	mov r0, r8, lsl #0x10
	mov r0, r0, lsr #0x10
	mov r1, r0, asr #8
	mov r0, r0, lsl #8
	and r1, r1, #0xff
	and r0, r0, #0xff00
	orr r0, r1, r0
	strh r0, [sp]
	ldr r1, [r6]
	add r0, r8, #5
	cmp r1, r0
	addlt sp, sp, #0x6c
	mov r1, #0
	movlt r0, #2
	ldmltia sp!, {r4, r5, r6, r7, r8, sb, pc}
	mov r0, #0x17
	strb r0, [r7]
	mov r0, #3
	strb r0, [r7, #1]
	add r0, sp, #0x14
	strb r1, [r7, #2]
	add r5, r1, #5
	bl ov00_022D4A4C
	ldr r2, [r4, #0x388]
	add r0, sp, #0x14
	add r1, r4, #0x320
	bl ov00_022D4A58
	ldr r1, _022FAAEC ; =ov00_0231A824
	add r0, sp, #0x14
	mov r2, #0x30
	bl ov00_022D4A58
	add r0, sp, #0x14
	add r1, r4, #0x310
	mov r2, #8
	bl ov00_022D4A58
	ldr r1, _022FAAF0 ; =ov00_0231A858
	add r0, sp, #0x14
	mov r2, #1
	bl ov00_022D4A58
	add r0, sp, #0x14
	add r1, sp, #0
	mov r2, #2
	bl ov00_022D4A58
	add r0, sp, #0x14
	mov r1, sb
	mov r2, r8
	bl ov00_022D4A58
	add r0, sp, #2
	add r1, sp, #0x14
	bl ov00_022D4A64
	add r0, sp, #0x14
	bl ov00_022D4A4C
	ldr r2, [r4, #0x388]
	add r0, sp, #0x14
	add r1, r4, #0x320
	bl ov00_022D4A58
	ldr r1, _022FAAF4 ; =ov00_0231A85C
	add r0, sp, #0x14
	mov r2, #0x30
	bl ov00_022D4A58
	add r0, sp, #0x14
	add r1, sp, #2
	mov r2, #0x10
	bl ov00_022D4A58
	add r0, sp, #2
	add r1, sp, #0x14
	bl ov00_022D4A64
	mov r1, sb
	add r0, r4, #0x3a0
	add r2, r7, r5
	mov r3, r8
	bl ov00_022F766C
	add r5, r5, r8
	add r0, r4, #0x3a0
	add r1, sp, #2
	add r2, r7, r5
	mov r3, #0x10
	bl ov00_022F766C
	add r1, r5, #0x10
	add r0, r7, #3
	sub r1, r1, #5
	mov r2, #2
	bl ov00_022F9FB0
	add r0, r5, #0x10
	ldr r1, [r6]
	mov r5, #7
	sub r0, r1, r0
	str r0, [r6]
	mov r0, #0
	mov r2, r0
_022FAAB8:
	add r3, r4, r5
	ldrb r1, [r3, #0x310]
	cmp r1, #0xff
	subeq r5, r5, #1
	streqb r2, [r3, #0x310]
	addne r1, r1, #1
	movne r5, r0
	strneb r1, [r3, #0x310]
	cmp r5, #0
	bge _022FAAB8
_022FAAE0:
	mov r0, #1
	add sp, sp, #0x6c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_022FAAEC: .word ov00_0231A824
_022FAAF0: .word ov00_0231A858
_022FAAF4: .word ov00_0231A85C
	arm_func_end ov00_022FA8E8

	arm_func_start ov00_022FAAF8
ov00_022FAAF8: ; 0x022FAAF8
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x28
	movs fp, r1
	mov sb, r0
	ldr r0, [sp, #0x50]
	ldrne r1, [fp]
	mov r5, #0
	mov r8, r2
	mov r7, r3
	mov r6, r5
	str r0, [sp, #0x50]
	ldr sl, [sp, #0x54]
	cmpne r1, #0
	bne _022FAB5C
	ldr r2, [r7]
	ldr r0, [sp, #0x50]
	mov r1, r8
	bl memcpy
	ldr r1, [r7]
	mov r0, #0
	str r1, [sl]
	str r0, [r7]
	add sp, sp, #0x28
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022FAB5C:
	addeq sp, sp, #0x28
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r7]
	cmp r0, #0
	ble _022FAD04
	add r4, r1, #0xa2
_022FAB78:
	mov r0, #0
	strh r0, [sp]
	ldr r0, [r7]
	sub r0, r0, r5
	cmp r0, #5
	blo _022FAD04
	add r1, r8, r5
	ldrb r3, [r1, #3]
	ldrb r2, [r1, #4]
	add r0, sp, #0
	strb r2, [r0, #1]
	strb r3, [r0]
	ldrh r3, [sp]
	mov r0, r3, asr #8
	and r2, r0, #0xff
	mov r0, r3, lsl #8
	and r0, r0, #0xff00
	orr r0, r2, r0
	strh r0, [sp]
	ldrh r3, [sp]
	ldr r0, [r7]
	add r2, r5, r3
	add r2, r2, #5
	cmp r0, r2
	blt _022FAD04
	ldr r0, [sb, #0x19c]
	cmp r0, #0
	beq _022FAC14
	ldr r2, [sl]
	sub r2, r2, r6
	cmp r2, r3
	bge _022FAC14
	str r5, [r7]
	cmp r6, #0
	movgt r0, #1
	add sp, sp, #0x28
	str r6, [sl]
	movle r0, #2
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022FAC14:
	ldrb r1, [r1]
	sub r1, r1, #0x14
	cmp r1, #3
	addls pc, pc, r1, lsl #2
	b _022FACE4
_022FAC28: ; jump table
	b _022FACCC ; case 0
	b _022FACDC ; case 1
	b _022FAC38 ; case 2
	b _022FAC88 ; case 3
_022FAC38:
	cmp r0, #0
	add r5, r5, #5
	beq _022FAC54
	add r1, r8, r5
	add r0, r4, #0x400
	mov r2, r1
	bl ov00_022F766C
_022FAC54:
	ldrh r3, [sp]
	mov r0, sb
	add r1, sp, #4
	add r2, r8, r5
	bl ov00_022F8E0C
	mov r0, sb
	mov r1, fp
	add r2, sp, #4
	bl ov00_022FAD2C
	cmp r0, #1
	beq _022FACF0
	add sp, sp, #0x28
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022FAC88:
	cmp r0, #0
	add r5, r5, #5
	beq _022FACA4
	add r1, r8, r5
	add r0, r4, #0x400
	mov r2, r1
	bl ov00_022F766C
_022FACA4:
	ldrh r2, [sp]
	ldr r0, [sp, #0x50]
	add r1, r8, r5
	add r0, r0, r6
	sub r2, r2, #0x10
	bl memcpy
	ldrh r0, [sp]
	sub r0, r0, #0x10
	add r6, r6, r0
	b _022FACF0
_022FACCC:
	mov r0, #1
	str r0, [sb, #0x19c]
	add r5, r5, #5
	b _022FACF0
_022FACDC:
	add r5, r5, #5
	b _022FACF0
_022FACE4:
	add sp, sp, #0x28
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022FACF0:
	ldrh r1, [sp]
	ldr r0, [r7]
	add r5, r5, r1
	cmp r5, r0
	blt _022FAB78
_022FAD04:
	str r5, [r7]
	str r6, [sl]
	ldr r0, [r7]
	cmp r0, #0
	movlt r0, #3
	movge r0, #1
	add sp, sp, #0x28
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022FAAF8

	arm_func_start ov00_022FAD24
ov00_022FAD24: ; 0x022FAD24
	mov r0, #1
	bx lr
	arm_func_end ov00_022FAD24

	arm_func_start ov00_022FAD2C
ov00_022FAD2C: ; 0x022FAD2C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x50
	mov r4, r2
	ldr r2, [r4, #0x10]
	ldr r3, [r4, #0xc]
	mov r5, r0
	mov r0, r2
	str r2, [sp]
	cmp r0, r3
	ldr r7, [r1]
	bge _022FBCF8
_022FAD58:
	mov r3, #0
	add r1, sp, #5
	mov r0, r4
	mov r2, #1
	strb r3, [sp, #5]
	bl ov00_022F9398
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldrsb r0, [sp, #5]
	cmp r0, #2
	bne _022FAF0C
	mov r0, #0
	str r0, [sp, #0x28]
	str r0, [sp, #0x24]
	strb r0, [sp, #4]
	ldr r0, [r7]
	cmp r0, #0
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r1, sp, #0x28
	mov r0, r4
	mov r2, #3
	bl ov00_022FA00C
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r4, #0xc]
	ldr r0, [r4, #0x10]
	ldr r2, [sp, #0x28]
	sub r1, r1, r0
	cmp r2, r1
	addgt sp, sp, #0x50
	movgt r0, #3
	ldmgtia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r1, r7, #0x264
	add r3, r0, #2
	mov r0, r4
	add r1, r1, #0x400
	mov r2, #0x20
	str r3, [r4, #0x10]
	bl ov00_022F9398
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r1, sp, #4
	mov r0, r4
	mov r2, #1
	bl ov00_022F9398
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldrsb r2, [sp, #4]
	mov r0, r4
	add r1, r7, #4
	bl ov00_022F9398
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldrsb r3, [sp, #4]
	add r1, sp, #0x24
	mov r0, r4
	mov r2, #2
	str r3, [r7]
	bl ov00_022FA00C
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r6, [sp, #0x24]
	add r3, r7, #0x100
	add r1, sp, #4
	mov r0, r4
	mov r2, #1
	strh r6, [r3, #4]
	bl ov00_022F9398
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldrsb r0, [sp, #4]
	cmp r0, #0
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r4, #0x10]
	ldr r0, [sp]
	ldr r3, [r4, #4]
	sub r6, r1, r0
	ldr r1, [sp]
	add r0, r7, #0x1a4
	mov r2, r6
	add r0, r0, #0x400
	add r1, r3, r1
	bl ov00_022D4A58
	add r0, r7, #0x1fc
	ldr r3, [r4, #4]
	ldr r1, [sp]
	mov r2, r6
	add r0, r0, #0x400
	add r1, r3, r1
	bl ov00_022F780C
	b _022FBCE4
_022FAF0C:
	cmp r0, #0xb
	bne _022FB6A0
	mov r8, #0
	add r1, sp, #0x20
	mov r0, r4
	mov r2, #3
	str r8, [sp, #0x20]
	str r8, [sp, #0x1c]
	bl ov00_022FA00C
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r1, sp, #0x1c
	mov r0, r4
	mov r2, #3
	bl ov00_022FA00C
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r2, [sp, #0x1c]
	ldr r1, [sp, #0x20]
	add r0, r2, #3
	cmp r1, r0
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r4, #0x10]
	ldr r0, [r4, #0xc]
	add sb, r1, r2
	sub r0, r0, r1
	cmp r2, r0
	addgt sp, sp, #0x50
	movgt r0, #3
	ldmgtia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp r1, sb
	bge _022FB630
	add r6, sp, #0x14
_022FAFA8:
	mov r0, #0
	str r0, [sp, #0x18]
	mov r0, r4
	add r1, sp, #0x18
	mov r2, #3
	bl ov00_022FA00C
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr fp, [r4, #0x10]
	ldr r0, [r4, #0xc]
	ldr r1, [sp, #0x18]
	sub r0, r0, fp
	cmp r1, r0
	addgt sp, sp, #0x50
	movgt r0, #3
	ldmgtia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, _022FBD10 ; =0x0000FFFF
	cmp r1, r0
	addgt sp, sp, #0x50
	movgt r0, #3
	ldmgtia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r8, r8, #1
	cmp r8, #1
	bne _022FB61C
	mov r0, #0
	str r0, [sp, #0x14]
	mov r0, r4
	mov r1, r6
	bl ov00_022FA074
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r0, r4
	mov r1, r6
	bl ov00_022FA074
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r4, #0x10]
	ldr r0, [r4, #0xc]
	sub r0, r0, r1
	cmp r0, #5
	addlt sp, sp, #0x50
	movlt r0, #3
	ldmltia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r0, r1
	add r0, r0, #1
	str r0, [r4, #0x10]
	ldr r0, [r4, #4]
	ldrb r0, [r0, r1]
	cmp r0, #0xa0
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r4, #0x10]
	mov r0, r1
	add r0, r0, #1
	str r0, [r4, #0x10]
	ldr r0, [r4, #4]
	ldrb r0, [r0, r1]
	cmp r0, #3
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r4, #0x10]
	mov r0, r1
	add r0, r0, #1
	str r0, [r4, #0x10]
	ldr r0, [r4, #4]
	ldrb r0, [r0, r1]
	cmp r0, #2
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r4, #0x10]
	mov r0, r1
	add r0, r0, #1
	str r0, [r4, #0x10]
	ldr r0, [r4, #4]
	ldrb r0, [r0, r1]
	cmp r0, #1
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r4, #0x10]
	add r1, r0, #1
	add r0, r1, #1
	str r0, [r4, #0x10]
	ldr r0, [r4, #4]
	ldrb r0, [r0, r1]
	cmp r0, #2
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r2, [r4, #0x10]
	mov r0, r2
	add r1, r0, #1
	str r1, [r4, #0x10]
	ldr r0, [r4, #4]
	ldrb sl, [r0, r2]
	add r0, r1, sl
	cmp r0, sb
	addgt sp, sp, #0x50
	movgt r0, #3
	ldmgtia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r4, #0x10]
	mov r0, r4
	add r1, r1, sl
	str r1, [r4, #0x10]
	mov r1, r6
	bl ov00_022FA074
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r2, [r4, #0x10]
	ldr r1, [sp, #0x14]
	mov r0, r4
	add r1, r2, r1
	str r1, [r4, #0x10]
	mov r1, r6
	bl ov00_022FA074
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r2, [r4, #0x10]
	ldr r1, [sp, #0x14]
	mov r0, r4
	add r1, r2, r1
	str r1, [r4, #0x10]
	mov r1, r6
	bl ov00_022FA074
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r2, [r4, #0x10]
	ldr r1, [sp, #0x14]
	mov r0, r4
	add r1, r2, r1
	str r1, [r4, #0x10]
	mov r1, r6
	bl ov00_022FA074
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r2, [r4, #0x10]
	ldr r1, [sp, #0x14]
	mov r0, r4
	add r1, r2, r1
	str r1, [r4, #0x10]
	mov r1, r6
	bl ov00_022FA074
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r0, r4
	mov r1, r6
	bl ov00_022FA074
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [sp, #0x14]
	cmp r0, #0xd
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r4, #0x10]
	mov r0, r1
	add r0, r0, #1
	str r0, [r4, #0x10]
	ldr r0, [r4, #4]
	ldrb r0, [r0, r1]
	cmp r0, #6
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r4, #0x10]
	mov r0, r1
	add r0, r0, #1
	str r0, [r4, #0x10]
	ldr r2, [r4, #4]
	ldrb r0, [r2, r1]
	cmp r0, #9
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r4, #0x10]
	ldr r1, _022FBD14 ; =ov00_02318484
	add r0, r2, r0
	mov r2, #9
	bl memcmp
	cmp r0, #0
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r4, #0x10]
	add r1, r0, #9
	add r0, r1, #1
	str r0, [r4, #0x10]
	ldr r0, [r4, #4]
	ldrb r0, [r0, r1]
	cmp r0, #5
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r4, #0x10]
	mov r0, r1
	add r0, r0, #1
	str r0, [r4, #0x10]
	ldr r0, [r4, #4]
	ldrb r0, [r0, r1]
	cmp r0, #0
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r4, #0x10]
	sub r0, sb, r1
	cmp r0, #2
	addlt sp, sp, #0x50
	movlt r0, #3
	ldmltia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r0, r1
	add r0, r0, #1
	str r0, [r4, #0x10]
	ldr r0, [r4, #4]
	ldrb r0, [r0, r1]
	cmp r0, #3
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r4, #0x10]
	mov r0, r1
	add r0, r0, #1
	str r0, [r4, #0x10]
	ldr r0, [r4, #4]
	ldrb r0, [r0, r1]
	cmp r0, #0x81
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r4, #0x10]
	sub r0, sb, r0
	cmp sl, r0
	addgt sp, sp, #0x50
	movgt r0, #3
	ldmgtia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r4, #0x10]
	add r1, r0, #1
	add r0, r1, #1
	str r0, [r4, #0x10]
	ldr r0, [r4, #4]
	ldrb r0, [r0, r1]
	cmp r0, #0
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r0, r4
	mov r1, r6
	bl ov00_022FA074
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r2, [r4, #0x10]
	mov r0, r2
	add r0, r0, #1
	str r0, [r4, #0x10]
	ldr r1, [r4, #4]
	ldrsb r0, [r1, r2]
	cmp r0, #2
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r4, #0x10]
	ldrsb r1, [r1, r0]
	and r1, r1, #0x80
	cmp r1, #0x80
	mov r1, r0
	add r1, r1, #1
	bne _022FB488
	str r1, [r4, #0x10]
	ldr r1, [r4, #4]
	ldrsb r0, [r1, r0]
	and r0, r0, #0x7f
	cmp r0, #4
	addgt sp, sp, #0x50
	movgt r0, #3
	ldmgtia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp r0, #0
	sub r0, r0, #1
	mov sl, #0
	ble _022FB494
_022FB45C:
	ldr r2, [r4, #0x10]
	cmp r0, #0
	mov r1, r2
	add r1, r1, #1
	str r1, [r4, #0x10]
	ldr r1, [r4, #4]
	sub r0, r0, #1
	ldrb r1, [r1, r2]
	orr sl, r1, sl, lsl #8
	bgt _022FB45C
	b _022FB494
_022FB488:
	str r1, [r4, #0x10]
	ldr r1, [r4, #4]
	ldrb sl, [r1, r0]
_022FB494:
	ldr r1, [r4, #0x10]
	add r0, r1, sl
	cmp r0, sb
	addgt sp, sp, #0x50
	movgt r0, #3
	ldmgtia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r0, r1
	add r0, r0, #1
	str r0, [r4, #0x10]
	ldr r0, [r4, #4]
	ldrsb r0, [r0, r1]
	cmp r0, #0
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	sub r2, sl, #1
	cmp r2, #0x800
	addhi sp, sp, #0x50
	movhi r0, #3
	ldmhiia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r0, r2, lsr #2
	str r0, [r7, #0x108]
	ldr r3, [r4, #4]
	ldr r1, [r4, #0x10]
	add r0, r7, #0x108
	add r1, r3, r1
	bl ov00_022F7540
	ldr r1, [r4, #0x10]
	sub r0, sl, #1
	add r2, r1, r0
	add r0, r2, #1
	str r0, [r4, #0x10]
	ldr r1, [r4, #4]
	ldrsb r0, [r1, r2]
	cmp r0, #2
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r4, #0x10]
	ldrsb r1, [r1, r0]
	and r1, r1, #0x80
	cmp r1, #0x80
	mov r1, r0
	add r1, r1, #1
	bne _022FB5A4
	str r1, [r4, #0x10]
	ldr r1, [r4, #4]
	ldrsb r0, [r1, r0]
	and r0, r0, #0x7f
	cmp r0, #4
	addgt sp, sp, #0x50
	movgt r0, #3
	ldmgtia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp r0, #0
	sub r0, r0, #1
	mov sl, #0
	ble _022FB5B0
_022FB578:
	ldr r2, [r4, #0x10]
	cmp r0, #0
	mov r1, r2
	add r1, r1, #1
	str r1, [r4, #0x10]
	ldr r1, [r4, #4]
	sub r0, r0, #1
	ldrb r1, [r1, r2]
	orr sl, r1, sl, lsl #8
	bgt _022FB578
	b _022FB5B0
_022FB5A4:
	str r1, [r4, #0x10]
	ldr r1, [r4, #4]
	ldrb sl, [r1, r0]
_022FB5B0:
	ldr r0, [r4, #0x10]
	add r0, r0, sl
	cmp r0, sb
	addgt sp, sp, #0x50
	movgt r0, #3
	ldmgtia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp sl, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp sl, #0x800
	addhi sp, sp, #0x50
	movhi r0, #3
	ldmhiia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	sub r0, sl, #1
	mov r0, r0, lsr #2
	add r0, r0, #1
	str r0, [r7, #0x20c]
	add r0, r7, #0x20c
	ldr r3, [r4, #4]
	ldr r1, [r4, #0x10]
	mov r2, sl
	add r1, r3, r1
	bl ov00_022F7540
	ldr r0, [r4, #0x10]
	add r0, r0, sl
	str r0, [r4, #0x10]
_022FB61C:
	ldr r0, [sp, #0x18]
	add r1, fp, r0
	str r1, [r4, #0x10]
	cmp r1, sb
	blt _022FAFA8
_022FB630:
	cmp r1, sb
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r0, r7
	bl ov00_022FAD24
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r4, #0x10]
	ldr r0, [sp]
	ldr r3, [r4, #4]
	sub r6, r1, r0
	ldr r1, [sp]
	add r0, r7, #0x1a4
	mov r2, r6
	add r0, r0, #0x400
	add r1, r3, r1
	bl ov00_022D4A58
	add r0, r7, #0x1fc
	ldr r3, [r4, #4]
	ldr r1, [sp]
	mov r2, r6
	add r0, r0, #0x400
	add r1, r3, r1
	bl ov00_022F780C
	b _022FBCE4
_022FB6A0:
	cmp r0, #0xe
	bne _022FBCC8
	mov r3, #0
	add r1, sp, #8
	mov r0, r4
	mov r2, #3
	str r3, [sp, #8]
	bl ov00_022FA00C
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [sp, #8]
	cmp r0, #0
	addne sp, sp, #0x50
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r2, [r4, #4]
	ldr r1, [sp]
	ldr r3, [r4, #0x10]
	add r1, r2, r1
	ldr r2, [sp]
	add r0, r7, #0x1a4
	add r0, r0, #0x400
	sub r2, r3, r2
	bl ov00_022D4A58
	add r0, r7, #0x1fc
	ldr r2, [r4, #4]
	ldr r1, [sp]
	ldr r3, [r4, #0x10]
	add r1, r2, r1
	ldr r2, [sp]
	add r0, r0, #0x400
	sub r2, r3, r2
	bl ov00_022F780C
	ldr r0, [r7, #0x108]
	mov r0, r0, lsl #2
	add r2, r0, #9
	str r2, [sp, #8]
	ldr r1, [r5, #0x5c]
	ldr r0, [r5, #0x60]
	sub r0, r1, r0
	cmp r0, r2
	bge _022FB784
_022FB750:
	ldr r1, [r5, #0x68]
	add r0, r5, #0x54
	bl ov00_022F8CE0
	cmp r0, #0
	addeq sp, sp, #0x50
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r2, [r5, #0x5c]
	ldr r1, [r5, #0x60]
	ldr r0, [sp, #8]
	sub r1, r2, r1
	cmp r1, r0
	blt _022FB750
_022FB784:
	mov r0, #3
	strb r0, [r7, #0x6a4]
	mov r0, #0
	strb r0, [r7, #0x6a5]
	mov sb, #2
	mov r8, r0
	mov r6, #0x100
_022FB7A0:
	bl ov00_022F5594
	bl srand
	mov r0, r8
	mov r1, r6
	bl RandRangeOverlay0
	add r1, r7, sb
	add sb, sb, #1
	strb r0, [r1, #0x6a4]
	cmp sb, #0x30
	blt _022FB7A0
	ldr r1, [r5, #0x60]
	ldr r2, [r5, #0x58]
	add r0, r1, #9
	str r0, [r5, #0x60]
	mov r0, #0x16
	strb r0, [r2, r1]
	add r6, r2, r1
	mov r0, #3
	strb r0, [r6, #1]
	mov r0, #0
	strb r0, [r6, #2]
	ldr r1, [r7, #0x108]
	add r0, r6, #3
	mov r1, r1, lsl #2
	add r1, r1, #4
	mov r2, #2
	bl ov00_022F9FB0
	mov r0, #0x10
	strb r0, [r6, #5]
	ldr r1, [r7, #0x108]
	add r0, r6, #6
	mov r1, r1, lsl #2
	mov r2, #3
	bl ov00_022F9FB0
	add r0, r7, #0x2a4
	add r1, r0, #0x400
	ldr r8, [r5, #0x58]
	ldr r3, [r5, #0x60]
	add r0, r7, #0x108
	mov r2, #0x30
	add r3, r8, r3
	bl ov00_022F5F3C
	add r0, r7, #0x1a4
	ldr r2, [r5, #0x60]
	ldr r1, [r7, #0x108]
	add r0, r0, #0x400
	add r1, r2, r1, lsl #2
	str r1, [r5, #0x60]
	ldr r2, [r7, #0x108]
	add r1, r6, #5
	mov r2, r2, lsl #2
	add r2, r2, #4
	bl ov00_022D4A58
	ldr r2, [r7, #0x108]
	add r0, r7, #0x1fc
	mov r2, r2, lsl #2
	add r1, r6, #5
	add r0, r0, #0x400
	add r2, r2, #4
	bl ov00_022F780C
	ldr r2, [r5, #0x58]
	ldr r1, [r5, #0x60]
	mov r0, #0x14
	strb r0, [r2, r1]
	add r1, r2, r1
	mov r0, #3
	strb r0, [r1, #1]
	mov r0, #0
	strb r0, [r1, #2]
	strb r0, [r1, #3]
	mov r2, #1
	strb r2, [r1, #4]
	ldr r0, [r5, #0x60]
	add r1, r0, #5
	add r0, r1, #1
	str r0, [r5, #0x60]
	ldr r0, [r5, #0x58]
	strb r2, [r0, r1]
	mov r0, r7
	bl ov00_022FA168
	ldr r2, [r5, #0x58]
	ldr r1, [r5, #0x60]
	mov r0, #0x16
	strb r0, [r2, r1]
	add r6, r2, r1
	mov r2, #3
	strb r2, [r6, #1]
	mov r0, #0
	strb r0, [r6, #2]
	strb r0, [r6, #3]
	mov r0, #0x38
	strb r0, [r6, #4]
	ldr r0, [r5, #0x60]
	mov r3, #0x14
	add r8, r0, #5
	add r0, r8, #1
	str r0, [r5, #0x60]
	ldr r0, [r5, #0x58]
	mov r1, #0x24
	strb r3, [r0, r8]
	ldr r3, [r5, #0x58]
	ldr r0, [r5, #0x60]
	add r0, r3, r0
	bl ov00_022F9FB0
	ldr r1, [r5, #0x60]
	add r0, r7, #0x1a4
	add r3, r1, #3
	ldr r1, _022FBD18 ; =ov00_0231A890
	add r0, r0, #0x400
	mov r2, #4
	str r3, [r5, #0x60]
	bl ov00_022D4A58
	add r0, r7, #0x1a4
	add r1, r7, #0x2d4
	add r0, r0, #0x400
	add r1, r1, #0x400
	mov r2, #0x30
	bl ov00_022D4A58
	add r0, r7, #0x1a4
	ldr r1, _022FBD1C ; =ov00_0231A824
	add r0, r0, #0x400
	mov r2, #0x30
	bl ov00_022D4A58
	add r1, r7, #0x1a4
	add r0, sp, #0x40
	add r1, r1, #0x400
	bl ov00_022D4A64
	add r0, r7, #0x1fc
	ldr r1, _022FBD18 ; =ov00_0231A890
	add r0, r0, #0x400
	mov r2, #4
	bl ov00_022F780C
	add r0, r7, #0x1fc
	add r1, r7, #0x2d4
	add r0, r0, #0x400
	add r1, r1, #0x400
	mov r2, #0x30
	bl ov00_022F780C
	add r0, r7, #0x1fc
	ldr r1, _022FBD1C ; =ov00_0231A824
	add r0, r0, #0x400
	mov r2, #0x28
	bl ov00_022F780C
	add r0, r7, #0x1fc
	add r0, r0, #0x400
	add r1, sp, #0x2c
	bl ov00_022F7774
	add r0, r7, #0x1a4
	add r0, r0, #0x400
	bl ov00_022D4A4C
	add r0, r7, #0x1a4
	add r1, r7, #0x2d4
	add r0, r0, #0x400
	add r1, r1, #0x400
	mov r2, #0x30
	bl ov00_022D4A58
	add r0, r7, #0x1a4
	ldr r1, _022FBD20 ; =ov00_0231A85C
	add r0, r0, #0x400
	mov r2, #0x30
	bl ov00_022D4A58
	add r0, r7, #0x1a4
	add r0, r0, #0x400
	add r1, sp, #0x40
	mov r2, #0x10
	bl ov00_022D4A58
	add r1, r7, #0x1a4
	add r0, sp, #0x40
	add r1, r1, #0x400
	bl ov00_022D4A64
	add r0, r7, #0x1fc
	add r0, r0, #0x400
	bl ov00_022F770C
	add r0, r7, #0x1fc
	add r1, r7, #0x2d4
	add r0, r0, #0x400
	add r1, r1, #0x400
	mov r2, #0x30
	bl ov00_022F780C
	add r0, r7, #0x1fc
	ldr r1, _022FBD20 ; =ov00_0231A85C
	add r0, r0, #0x400
	mov r2, #0x28
	bl ov00_022F780C
	add r0, r7, #0x1fc
	add r0, r0, #0x400
	add r1, sp, #0x2c
	mov r2, #0x14
	bl ov00_022F780C
	add r0, r7, #0x1fc
	add r0, r0, #0x400
	add r1, sp, #0x2c
	bl ov00_022F7774
	ldr r1, [r5, #0x58]
	ldr r0, [r5, #0x60]
	add r3, sp, #0x40
	add r8, r1, r0
	mov r2, #8
_022FBAB8:
	ldrb r1, [r3]
	ldrb r0, [r3, #1]
	add r3, r3, #2
	subs r2, r2, #1
	strb r1, [r8]
	strb r0, [r8, #1]
	add r8, r8, #2
	bne _022FBAB8
	ldr r0, [r5, #0x60]
	add r3, sp, #0x2c
	add r1, r0, #0x10
	str r1, [r5, #0x60]
	ldr r0, [r5, #0x58]
	mov r2, #0xa
	arm_func_end ov00_022FAD2C

	arm_func_start ov00_022FBAF0
ov00_022FBAF0: ; 0x022FBAF0
	add r8, r0, r1
_022FBAF4:
	ldrb r1, [r3]
	ldrb r0, [r3, #1]
	add r3, r3, #2
	subs r2, r2, #1
	strb r1, [r8]
	strb r0, [r8, #1]
	add r8, r8, #2
	bne _022FBAF4
	ldr r1, [r5, #0x60]
	add r0, r7, #0x1a4
	add r1, r1, #0x14
	add r0, r0, #0x400
	str r1, [r5, #0x60]
	bl ov00_022D4A4C
	add r0, r7, #0x1a4
	add r0, r0, #0x400
	add r1, r7, #0x320
	mov r2, #0x10
	bl ov00_022D4A58
	add r0, r7, #0x1a4
	ldr r1, _022FBD1C ; =ov00_0231A824
	add r0, r0, #0x400
	mov r2, #0x30
	bl ov00_022D4A58
	add r0, r7, #0x1a4
	add r0, r0, #0x400
	add r1, r7, #0x310
	mov r2, #8
	bl ov00_022D4A58
	mov r0, #0x16
	strb r0, [sp, #0xc]
	mov r0, #0
	strb r0, [sp, #0xd]
	strb r0, [sp, #0x10]
	strb r0, [sp, #0x11]
	mov r0, #0x28
	strb r0, [sp, #0xe]
	mov r0, #0x14
	strb r0, [sp, #0xf]
	mov r0, #0x24
	strb r0, [sp, #0x12]
	add r0, r7, #0x1a4
	add r0, r0, #0x400
	add r1, sp, #0xc
	mov r2, #7
	bl ov00_022D4A58
	add r0, r7, #0x1a4
	add r0, r0, #0x400
	add r1, sp, #0x40
	mov r2, #0x10
	bl ov00_022D4A58
	add r0, r7, #0x1a4
	add r0, r0, #0x400
	add r1, sp, #0x2c
	mov r2, #0x14
	bl ov00_022D4A58
	add r1, r7, #0x1a4
	add r0, sp, #0x40
	add r1, r1, #0x400
	bl ov00_022D4A64
	add r0, r7, #0x1a4
	add r0, r0, #0x400
	bl ov00_022D4A4C
	add r0, r7, #0x1a4
	add r0, r0, #0x400
	add r1, r7, #0x320
	mov r2, #0x10
	bl ov00_022D4A58
	add r0, r7, #0x1a4
	ldr r1, _022FBD20 ; =ov00_0231A85C
	add r0, r0, #0x400
	mov r2, #0x30
	bl ov00_022D4A58
	add r0, r7, #0x1a4
	add r0, r0, #0x400
	add r1, sp, #0x40
	mov r2, #0x10
	bl ov00_022D4A58
	add r1, r7, #0x1a4
	add r0, sp, #0x40
	add r1, r1, #0x400
	bl ov00_022D4A64
	ldr r1, [r5, #0x58]
	ldr r0, [r5, #0x60]
	add r3, sp, #0x40
	add r8, r1, r0
	mov r2, #8
_022FBC50:
	ldrb r1, [r3]
	ldrb r0, [r3, #1]
	add r3, r3, #2
	subs r2, r2, #1
	strb r1, [r8]
	strb r0, [r8, #1]
	add r8, r8, #2
	bne _022FBC50
	ldr r0, [r5, #0x60]
	mov r3, #0
	add r0, r0, #0x10
	str r0, [r5, #0x60]
	strb r3, [r7, #0x310]
	strb r3, [r7, #0x311]
	strb r3, [r7, #0x312]
	strb r3, [r7, #0x313]
	strb r3, [r7, #0x314]
	strb r3, [r7, #0x315]
	strb r3, [r7, #0x316]
	add r0, r7, #0x314
	mov r1, #1
	mov r2, #4
	strb r3, [r7, #0x317]
	bl ov00_022F9FB0
	add r1, r6, #5
	add r0, r7, #0x3a0
	mov r2, r1
	mov r3, #0x38
	bl ov00_022F766C
	b _022FBCE4
_022FBCC8:
	cmp r0, #0x14
	ldreq r0, [r4, #0xc]
	streq r0, [r4, #0x10]
	beq _022FBCE4
	add sp, sp, #0x50
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022FBCE4:
	ldr r0, [r4, #0x10]
	ldr r3, [r4, #0xc]
	str r0, [sp]
	cmp r0, r3
	blt _022FAD58
_022FBCF8:
	ldr r0, [sp]
	cmp r0, r3
	moveq r0, #1
	movne r0, #3
	add sp, sp, #0x50
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022FBD10: .word 0x0000FFFF
_022FBD14: .word ov00_02318484
_022FBD18: .word ov00_0231A890
_022FBD1C: .word ov00_0231A824
_022FBD20: .word ov00_0231A85C
	arm_func_end ov00_022FBAF0

	arm_func_start ov00_022FBD24
ov00_022FBD24: ; 0x022FBD24
	stmdb sp!, {r3, lr}
	ldr lr, [r0, #0x114]
	ldr r3, _022FBDDC ; =0x51EB851F
	mov r1, lr, lsr #0x1f
	smull r2, ip, r3, lr
	add ip, r1, ip, asr #5
	cmp ip, #5
	addls pc, pc, ip, lsl #2
	ldmia sp!, {r3, pc}
_022FBD48: ; jump table
	ldmia sp!, {r3, pc} ; case 0
	b _022FBD60 ; case 1
	b _022FBD60 ; case 2
	b _022FBD60 ; case 3
	b _022FBD64 ; case 4
	b _022FBDD0 ; case 5
_022FBD60:
	ldmia sp!, {r3, pc}
_022FBD64:
	sub r1, lr, #0x91
	sub r1, r1, #0x100
	cmp r1, #9
	addls pc, pc, r1, lsl #2
	b _022FBDC4
_022FBD78: ; jump table
	b _022FBDA0 ; case 0
	b _022FBDC4 ; case 1
	b _022FBDAC ; case 2
	b _022FBDB8 ; case 3
	b _022FBDC4 ; case 4
	b _022FBDC4 ; case 5
	b _022FBDC4 ; case 6
	b _022FBDC4 ; case 7
	b _022FBDC4 ; case 8
	b _022FBDB8 ; case 9
_022FBDA0:
	mov r1, #9
	str r1, [r0, #0x3c]
	ldmia sp!, {r3, pc}
_022FBDAC:
	mov r1, #0xa
	str r1, [r0, #0x3c]
	ldmia sp!, {r3, pc}
_022FBDB8:
	mov r1, #0xb
	str r1, [r0, #0x3c]
	ldmia sp!, {r3, pc}
_022FBDC4:
	mov r1, #8
	str r1, [r0, #0x3c]
	ldmia sp!, {r3, pc}
_022FBDD0:
	mov r1, #0xc
	str r1, [r0, #0x3c]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022FBDDC: .word 0x51EB851F
	arm_func_end ov00_022FBD24

	arm_func_start ov00_022FBDE0
ov00_022FBDE0: ; 0x022FBDE0
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r0
	ldr r1, [r4, #0x150]
	cmp r1, #0
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	mov r1, #1
	str r1, [r4, #0x150]
	ldr r1, [r4, #0x10]
	cmp r1, #0
	bne _022FBE10
	bl ov00_022FD924
_022FBE10:
	ldr r0, [r4, #0x10]
	cmp r0, #1
	bne _022FBE24
	mov r0, r4
	bl ov00_022FD9BC
_022FBE24:
	ldr r0, [r4, #0x10]
	cmp r0, #2
	bne _022FBE38
	mov r0, r4
	bl ov00_022FDA98
_022FBE38:
	ldr r0, [r4, #0x10]
	cmp r0, #3
	bne _022FBE4C
	mov r0, r4
	bl ov00_022FDB14
_022FBE4C:
	ldr r0, [r4, #0x10]
	cmp r0, #4
	bne _022FBE60
	mov r0, r4
	bl ov00_022FDD7C
_022FBE60:
	ldr r0, [r4, #0x10]
	cmp r0, #5
	bne _022FBE74
	mov r0, r4
	bl ov00_022FDEE8
_022FBE74:
	ldr r0, [r4, #0x10]
	cmp r0, #6
	bne _022FBE88
	mov r0, r4
	bl ov00_022FE1C0
_022FBE88:
	ldr r0, [r4, #0x10]
	cmp r0, #7
	bne _022FBE9C
	mov r0, r4
	bl ov00_022FE2A0
_022FBE9C:
	ldr r0, [r4, #0x10]
	cmp r0, #8
	bne _022FBEB0
	mov r0, r4
	bl ov00_022FE44C
_022FBEB0:
	ldr r0, [r4, #0x10]
	cmp r0, #9
	bne _022FBEC4
	mov r0, r4
	bl ov00_022FE8B8
_022FBEC4:
	ldr r0, [r4, #0x10]
	cmp r0, #0xa
	bne _022FBED8
	mov r0, r4
	bl ov00_022FEDD8
_022FBED8:
	ldr r0, [r4, #0x12c]
	cmp r0, #0
	beq _022FBEEC
	mov r0, r4
	bl ov00_022F9D48
_022FBEEC:
	ldr r0, [r4, #0x3c]
	ldr r5, [r4, #0x120]
	cmp r0, #0x12
	cmpeq r5, #0
	bne _022FBF14
	ldr r0, [r4, #0x4c]
	bl ov00_022F5320
	cmp r0, #0
	moveq r0, #1
	streq r0, [r4, #0x120]
_022FBF14:
	ldr r0, [r4, #0x120]
	cmp r0, #0
	moveq r0, #0
	streq r0, [r4, #0x150]
	beq _022FBF40
	mov r0, r4
	bl ov00_022FBD24
	mov r0, r4
	bl ov00_022F93E4
	mov r0, r4
	bl ov00_022F9B40
_022FBF40:
	mov r0, r5
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022FBDE0

	arm_func_start ov00_022FBF48
ov00_022FBF48: ; 0x022FBF48
	stmdb sp!, {r3, lr}
	bl ov00_022F94E4
	ldr r0, _022FBF90 ; =ov00_023289C0
	ldr r1, [r0]
	add r1, r1, #1
	str r1, [r0]
	cmp r1, #1
	bne _022FBF88
	bl ov00_022F94DC
	ldr r0, _022FBF94 ; =ov00_0231A7F0
	mov r2, #0xfa
	ldr r1, _022FBF98 ; =ov00_0231A7F4
	mov r3, #0x7d
	str r2, [r0]
	str r3, [r1]
	ldmia sp!, {r3, pc}
_022FBF88:
	bl ov00_022F94E8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022FBF90: .word ov00_023289C0
_022FBF94: .word ov00_0231A7F0
_022FBF98: .word ov00_0231A7F4
	arm_func_end ov00_022FBF48

	arm_func_start ov00_022FBF9C
ov00_022FBF9C: ; 0x022FBF9C
	stmdb sp!, {r3, lr}
	bl ov00_022F94E4
	ldr r0, _022FBFF0 ; =ov00_023289C0
	ldr r1, [r0]
	subs r1, r1, #1
	str r1, [r0]
	bne _022FBFE8
	bl ov00_022F9E70
	ldr r0, _022FBFF4 ; =ov00_023289AC
	ldr r0, [r0]
	cmp r0, #0
	beq _022FBFDC
	bl ov00_022F5B14
	ldr r0, _022FBFF4 ; =ov00_023289AC
	mov r1, #0
	str r1, [r0]
_022FBFDC:
	bl ov00_022F94E8
	bl ov00_022F94E0
	ldmia sp!, {r3, pc}
_022FBFE8:
	bl ov00_022F94E8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022FBFF0: .word ov00_023289C0
_022FBFF4: .word ov00_023289AC
	arm_func_end ov00_022FBF9C

	arm_func_start ov00_022FBFF8
ov00_022FBFF8: ; 0x022FBFF8
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	movs r8, r0
	ldrnesb r0, [r8]
	mov r7, r1
	mov r6, r2
	cmpne r0, #0
	mov r5, r3
	mvneq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	cmp r5, #0
	mvnlt r0, #0
	ldmltia sp!, {r4, r5, r6, r7, r8, pc}
	cmp r6, #0
	beq _022FC03C
	cmp r5, #0
	mvneq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
_022FC03C:
	ldr r0, _022FC1C0 ; =ov00_023289C0
	ldr r0, [r0]
	cmp r0, #0
	bne _022FC050
	bl ov00_022FBF48
_022FC050:
	bl ov00_022F998C
	movs r4, r0
	mvneq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	mov r1, #0
	mov r0, r8
	str r1, [r4, #0xc]
	bl ov00_022F5514
	str r0, [r4, #0x14]
	cmp r0, #0
	bne _022FC08C
	mov r0, r4
	bl ov00_022F9B40
	mvn r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022FC08C:
	cmp r7, #0
	ldrnesb r0, [r7]
	cmpne r0, #0
	beq _022FC0C0
	mov r0, r7
	bl ov00_022F5514
	str r0, [r4, #0x2c]
	cmp r0, #0
	bne _022FC0C0
	mov r0, r4
	bl ov00_022F9B40
	mvn r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022FC0C0:
	ldr r1, [sp, #0x18]
	ldr r0, [sp, #0x20]
	str r1, [r4, #0x160]
	str r0, [r4, #0x34]
	ldr r1, [sp, #0x24]
	ldr r0, [sp, #0x28]
	str r1, [r4, #0x40]
	str r0, [r4, #0x44]
	ldr r1, [sp, #0x2c]
	ldr r0, [sp, #0x1c]
	str r1, [r4, #0x48]
	str r0, [r4, #0x158]
	cmp r6, #0
	movne r0, #1
	moveq r0, #0
	str r0, [r4, #0x108]
	cmp r0, #0
	beq _022FC120
	mov r0, r4
	mov r2, r6
	mov r3, r5
	add r1, r4, #0xe4
	bl ov00_022F8DAC
	b _022FC134
_022FC120:
	mov r2, #0x800
	mov r0, r4
	mov r3, r2
	add r1, r4, #0xe4
	bl ov00_022F8D20
_022FC134:
	cmp r0, #0
	bne _022FC14C
	mov r0, r4
	bl ov00_022F9B40
	mvn r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022FC14C:
	ldr r0, [sp, #0x18]
	cmp r0, #0
	beq _022FC178
	mov r0, r4
	bl ov00_022FC718
	cmp r0, #0
	bne _022FC178
	mov r0, r4
	bl ov00_022F9B40
	mvn r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022FC178:
	ldr r0, [sp, #0x20]
	cmp r0, #0
	beq _022FC1B8
	mov r0, r4
	bl ov00_022FBDE0
	cmp r0, #0
	bne _022FC1B0
	mov r5, #0xa
_022FC198:
	mov r0, r5
	bl ov00_022F55EC
	mov r0, r4
	bl ov00_022FBDE0
	cmp r0, #0
	beq _022FC198
_022FC1B0:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022FC1B8:
	ldr r0, [r4, #4]
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_022FC1C0: .word ov00_023289C0
	arm_func_end ov00_022FBFF8

	arm_func_start ov00_022FC1C4
ov00_022FC1C4: ; 0x022FC1C4
	ldr ip, _022FC1D0 ; =ov00_022F9CE4
	ldr r0, _022FC1D4 ; =ov00_022FBDE0
	bx ip
	.align 2, 0
_022FC1D0: .word ov00_022F9CE4
_022FC1D4: .word ov00_022FBDE0
	arm_func_end ov00_022FC1C4

	arm_func_start ov00_022FC1D8
ov00_022FC1D8: ; 0x022FC1D8
	stmdb sp!, {r3, lr}
	bl ov00_022F9C90
	cmp r0, #0
	ldmeqia sp!, {r3, pc}
	bl ov00_022F9B40
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022FC1D8

	arm_func_start ov00_022FC1F0
ov00_022FC1F0: ; 0x022FC1F0
	ldr r0, [r0, #0x18]
	bx lr
	arm_func_end ov00_022FC1F0

	arm_func_start ov00_022FC1F8
ov00_022FC1F8: ; 0x022FC1F8
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r0, [r4]
	bl ov00_022F4758
	mov r0, r4
	bl ov00_022F5B14
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022FC1F8

	arm_func_start ov00_022FC214
ov00_022FC214: ; 0x022FC214
	ldr r1, [r0, #0x160]
	cmp r1, #0
	ldreq r0, _022FC258 ; =ov00_0231A8DC
	bxeq lr
	ldr r0, [r1, #0x14]
	cmp r0, #0
	ldrne r0, _022FC25C ; =ov00_0231A8E0
	bxne lr
	ldr r0, [r1, #0xc]
	cmp r0, #0
	ldrne r0, _022FC260 ; =ov00_0231A8F4
	bxne lr
	ldr r0, [r1, #0x10]
	cmp r0, #0
	ldrne r0, _022FC264 ; =ov00_0231A938
	ldreq r0, _022FC268 ; =ov00_0231A944
	bx lr
	.align 2, 0
_022FC258: .word ov00_0231A8DC
_022FC25C: .word ov00_0231A8E0
_022FC260: .word ov00_0231A8F4
_022FC264: .word ov00_0231A938
_022FC268: .word ov00_0231A944
	arm_func_end ov00_022FC214

	arm_func_start ov00_022FC26C
ov00_022FC26C: ; 0x022FC26C
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	ldr r5, [r0, #0x160]
	mov r8, #0
	ldr r0, [r5]
	bl ov00_022F47A0
	movs r7, r0
	moveq r0, r8
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	cmp r7, #0
	mov r6, r8
	ble _022FC2F8
_022FC298:
	ldr r0, [r5]
	mov r1, r6
	bl ov00_022F47A8
	mov r4, r0
	ldr r0, [r4]
	cmp r0, #0
	bne _022FC2D8
	ldr r0, [r4, #4]
	bl strlen
	ldr r1, [r4, #0xc]
	add r2, r8, r0
	ldr r0, [r4, #0x14]
	add r1, r2, r1
	add r0, r1, r0, lsl #1
	add r8, r0, #1
	b _022FC2EC
_022FC2D8:
	cmp r0, #3
	bne _022FC2EC
	ldr r0, [r4, #8]
	bl ov00_022F8CD8
	add r8, r8, r0
_022FC2EC:
	add r6, r6, #1
	cmp r6, r7
	blt _022FC298
_022FC2F8:
	sub r0, r7, #1
	add r0, r8, r0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022FC26C

	arm_func_start ov00_022FC304
ov00_022FC304: ; 0x022FC304
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0xc
	ldr r1, _022FC60C ; =ov00_023289C4
	str r0, [sp]
	ldr r2, [r1, #0x10]
	ldr r5, [r0, #0x160]
	cmp r2, #0
	mov r8, #0
	bne _022FC37C
	ldr r0, [r5, #0x14]
	cmp r0, #0
	beq _022FC34C
	mov r0, #0xc
	str r0, [r1, #0x10]
	str r0, [r1, #0xc]
	str r0, [r1, #8]
	stmia r1, {r0, r8}
	b _022FC37C
_022FC34C:
	ldr r0, _022FC610 ; =ov00_0231A968
	bl strlen
	ldr r1, _022FC60C ; =ov00_023289C4
	add r2, r0, #0x2f
	str r0, [r1, #0x10]
	str r2, [r1, #0xc]
	add r2, r0, #0x4c
	str r2, [r1, #8]
	mov r2, r8
	str r2, [r1]
	add r0, r0, #4
	str r0, [r1, #4]
_022FC37C:
	ldr r0, [r5]
	bl ov00_022F47A0
	str r0, [sp, #8]
	cmp r0, #0
	mov r7, #0
	ble _022FC5F8
	ldr r4, _022FC60C ; =ov00_023289C4
_022FC398:
	ldr r0, [r5]
	mov r1, r7
	bl ov00_022F47A8
	mov r6, r0
	ldr r0, [r6]
	cmp r0, #0
	bne _022FC3D4
	ldr r1, [r4, #0xc]
	ldr r0, [r6, #4]
	add r8, r8, r1
	bl strlen
	ldr r1, [r6, #0xc]
	add r0, r8, r0
	add r8, r0, r1
	b _022FC5E8
_022FC3D4:
	cmp r0, #1
	bne _022FC490
	ldr r1, [r4, #8]
	ldr r0, [r6, #4]
	add r8, r8, r1
	bl strlen
	add r8, r8, r0
	ldr r0, [r6, #0x10]
	bl strlen
	add r8, r8, r0
	ldr r0, [sp]
	mov r1, r7
	ldr r0, [r0, #0x164]
	bl ov00_022F47A8
	ldr sb, [r0, #0xc]
	ldr sl, [r5, #0x14]
	add r8, r8, sb
	cmp sl, #0
	bne _022FC42C
	ldr r0, [r6, #0xc]
	bl strlen
	add r8, r8, r0
_022FC42C:
	cmp sl, #0
	beq _022FC5E8
	ldr r0, [r6, #4]
	bl strlen
	mov r1, r0, lsr #0x1f
	rsb r0, r1, r0, lsl #30
	add r0, r1, r0, ror #30
	rsb r0, r0, #4
	cmp r0, #4
	addne r8, r8, r0
	ldr r0, [r6, #0x10]
	bl strlen
	mov r1, r0, lsr #0x1f
	rsb r0, r1, r0, lsl #30
	add r0, r1, r0, ror #30
	rsb r0, r0, #4
	cmp r0, #4
	mov r1, sb, lsr #0x1f
	addne r8, r8, r0
	rsb r0, r1, sb, lsl #30
	add r0, r1, r0, ror #30
	rsb r0, r0, #4
	cmp r0, #4
	addne r8, r8, r0
	b _022FC5E8
_022FC490:
	cmp r0, #2
	bne _022FC544
	ldr r0, [r6, #4]
	ldr r1, [r4, #8]
	str r0, [sp, #4]
	add r8, r8, r1
	bl strlen
	ldr sl, [r6, #0x14]
	add r8, r8, r0
	mov r0, sl
	bl strlen
	ldr sb, [r5, #0x14]
	ldr fp, [r6, #0xc]
	add r0, r8, r0
	add r8, r0, fp
	cmp sb, #0
	bne _022FC4E0
	ldr r0, [r6, #0x10]
	bl strlen
	add r8, r8, r0
_022FC4E0:
	cmp sb, #0
	beq _022FC5E8
	ldr r0, [sp, #4]
	bl strlen
	mov r1, r0, lsr #0x1f
	rsb r0, r1, r0, lsl #30
	add r0, r1, r0, ror #30
	rsb r0, r0, #4
	cmp r0, #4
	addne r8, r8, r0
	mov r0, sl
	bl strlen
	mov r1, r0, lsr #0x1f
	rsb r0, r1, r0, lsl #30
	add r0, r1, r0, ror #30
	rsb r0, r0, #4
	cmp r0, #4
	mov r1, fp, lsr #0x1f
	addne r8, r8, r0
	rsb r0, r1, fp, lsl #30
	add r0, r1, r0, ror #30
	rsb r0, r0, #4
	cmp r0, #4
	addne r8, r8, r0
	b _022FC5E8
_022FC544:
	cmp r0, #3
	bne _022FC5DC
	ldr r1, [r4]
	ldr r0, [r6, #8]
	add r8, r8, r1
	bl ov00_022F8CD8
	add r8, r8, r0
	ldr r0, [r6, #8]
	bl ov00_022F8CD8
	mov r1, r0, lsr #0x1f
	rsb r0, r1, r0, lsl #30
	add r0, r1, r0, ror #30
	rsb r0, r0, #4
	cmp r0, #4
	addne r8, r8, r0
	ldr r0, _022FC614 ; =ov00_0231A990
	bl strlen
	add r8, r8, r0
	ldr r0, _022FC614 ; =ov00_0231A990
	bl strlen
	mov r1, r0, lsr #0x1f
	rsb r0, r1, r0, lsl #30
	add r0, r1, r0, ror #30
	rsb r0, r0, #4
	cmp r0, #4
	addne r8, r8, r0
	ldr r0, _022FC618 ; =ov00_0231A998
	bl strlen
	add r8, r8, r0
	ldr r0, _022FC618 ; =ov00_0231A998
	bl strlen
	mov r1, r0, lsr #0x1f
	rsb r0, r1, r0, lsl #30
	add r0, r1, r0, ror #30
	rsb r0, r0, #4
	cmp r0, #4
	addne r8, r8, r0
	b _022FC5E8
_022FC5DC:
	add sp, sp, #0xc
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022FC5E8:
	ldr r0, [sp, #8]
	add r7, r7, #1
	cmp r7, r0
	blt _022FC398
_022FC5F8:
	ldr r0, _022FC60C ; =ov00_023289C4
	ldr r0, [r0, #4]
	add r0, r8, r0
	add sp, sp, #0xc
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022FC60C: .word ov00_023289C4
_022FC610: .word ov00_0231A968
_022FC614: .word ov00_0231A990
_022FC618: .word ov00_0231A998
	arm_func_end ov00_022FC304

	arm_func_start ov00_022FC61C
ov00_022FC61C: ; 0x022FC61C
	stmdb sp!, {r3, lr}
	ldr r1, [r0, #0x160]
	cmp r1, #0
	moveq r0, #0
	ldmeqia sp!, {r3, pc}
	ldr r1, [r1, #0xc]
	cmp r1, #0
	beq _022FC644
	bl ov00_022FC304
	ldmia sp!, {r3, pc}
_022FC644:
	bl ov00_022FC26C
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022FC61C

	arm_func_start ov00_022FC64C
ov00_022FC64C: ; 0x022FC64C
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r1, [r4]
	mvn r0, #0
	ldr r1, [r1]
	str r0, [r4, #4]
	cmp r1, #0
	beq _022FC6D4
	cmp r1, #1
	bne _022FC6C4
	ldr r0, [r4, #8]
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	mov r1, #0
	mov r2, #2
	bl sub_0208706C
	cmp r0, #0
	movne r0, #0
	ldmneia sp!, {r4, pc}
	ldr r0, [r4, #8]
	bl sub_02086D68
	mvn r1, #0
	str r0, [r4, #0xc]
	cmp r0, r1
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	ldr r0, [r4, #8]
	bl sub_02087198
	b _022FC6D4
_022FC6C4:
	cmp r1, #2
	cmpne r1, #3
	movne r0, #0
	ldmneia sp!, {r4, pc}
_022FC6D4:
	mov r0, #1
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022FC64C

	arm_func_start ov00_022FC6DC
ov00_022FC6DC: ; 0x022FC6DC
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r0, [r4]
	ldr r0, [r0]
	cmp r0, #0
	ldmeqia sp!, {r4, pc}
	cmp r0, #1
	ldmneia sp!, {r4, pc}
	ldr r0, [r4, #8]
	cmp r0, #0
	beq _022FC70C
	bl sub_02086B08
_022FC70C:
	mov r0, #0
	str r0, [r4, #8]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022FC6DC

	arm_func_start ov00_022FC718
ov00_022FC718: ; 0x022FC718
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	sub sp, sp, #0x10
	mov r4, r0
	ldr r0, [r4, #0x160]
	cmp r0, #0
	addeq sp, sp, #0x10
	mov r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	str r0, [r4, #0x168]
	str r0, [r4, #0x16c]
	str r0, [r4, #0x170]
	str r0, [r4, #0x180]
	ldr r0, [r4, #0x160]
	ldr r0, [r0, #4]
	str r0, [r4, #0x174]
	ldr r0, [r4, #0x160]
	ldr r0, [r0, #8]
	str r0, [r4, #0x178]
	ldr r0, [r4, #0x160]
	ldr r0, [r0]
	bl ov00_022F47A0
	mov r8, r0
	mov r1, r8
	mov r0, #0x10
	mov r2, #0
	bl ov00_022F4700
	cmp r0, #0
	str r0, [r4, #0x164]
	addeq sp, sp, #0x10
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	cmp r8, #0
	mov r7, #0
	ble _022FC82C
	add r6, sp, #0
	mov r5, r7
_022FC7A8:
	ldr r0, [r4, #0x160]
	mov r1, r7
	ldr r0, [r0]
	bl ov00_022F47A8
	str r5, [r6]
	str r0, [sp]
	mov r0, r6
	str r5, [r6, #4]
	str r5, [r6, #8]
	str r5, [r6, #0xc]
	bl ov00_022FC64C
	cmp r0, #0
	bne _022FC814
	subs r7, r7, #1
	bmi _022FC7FC
_022FC7E4:
	ldr r0, [r4, #0x164]
	mov r1, r7
	bl ov00_022F47A8
	bl ov00_022FC6DC
	subs r7, r7, #1
	bpl _022FC7E4
_022FC7FC:
	ldr r0, [r4, #0x164]
	bl ov00_022F4758
	mov r0, #0
	add sp, sp, #0x10
	str r0, [r4, #0x164]
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_022FC814:
	ldr r0, [r4, #0x164]
	mov r1, r6
	bl ov00_022F47D4
	add r7, r7, #1
	cmp r7, r8
	blt _022FC7A8
_022FC82C:
	mov r0, r4
	bl ov00_022FC61C
	str r0, [r4, #0x170]
	ldr r0, [r4, #0x160]
	ldr r0, [r0, #0x10]
	cmp r0, #1
	moveq r0, #1
	movne r0, #0
	str r0, [r4, #0x17c]
	mov r0, #1
	add sp, sp, #0x10
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022FC718

	arm_func_start ov00_022FC85C
ov00_022FC85C: ; 0x022FC85C
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	ldr r0, [r6, #0x164]
	cmp r0, #0
	beq _022FC8B0
	bl ov00_022F47A0
	mov r5, r0
	cmp r5, #0
	mov r4, #0
	ble _022FC8A0
_022FC884:
	ldr r0, [r6, #0x164]
	mov r1, r4
	bl ov00_022F47A8
	bl ov00_022FC6DC
	add r4, r4, #1
	cmp r4, r5
	blt _022FC884
_022FC8A0:
	ldr r0, [r6, #0x164]
	bl ov00_022F4758
	mov r0, #0
	str r0, [r6, #0x164]
_022FC8B0:
	ldr r0, [r6, #0x160]
	cmp r0, #0
	ldrne r1, [r0, #0x18]
	cmpne r1, #0
	ldmeqia sp!, {r4, r5, r6, pc}
	bl ov00_022FC1F8
	mov r0, #0
	str r0, [r6, #0x160]
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_022FC85C

	arm_func_start ov00_022FC8D4
ov00_022FC8D4: ; 0x022FC8D4
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	ldr r3, [r0]
	mov sl, r1
	ldr r2, [r3, #0xc]
	cmp r2, #0
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [sl, #0x160]
	ldr r0, [r1, #0xc]
	cmp r0, #0
	ldreq r0, [r1, #0x10]
	cmpeq r0, #0
	bne _022FC9F0
	ldr r0, [r3, #0x10]
	cmp r0, #0
	beq _022FC9F0
	ldr r0, _022FCA54 ; =ov00_023184A0
	ldr r8, [r3, #8]
	ldrb r2, [r0]
	ldrb r1, [r0, #1]
	mov r6, #0
	strb r2, [sp]
	strb r1, [sp, #1]
	ldrb r1, [r0, #2]
	ldrb r0, [r0, #3]
	strb r1, [sp, #2]
	strb r0, [sp, #3]
	ldr r0, [sl, #0x194]
	ldrsb r7, [r8]
	cmp r0, #0
	addeq sb, sl, #0x54
	addne sb, sl, #0x78
	cmp r7, #0
	beq _022FCA0C
	ldr r4, _022FCA58 ; =ov00_0231A9C4
	ldr r5, _022FCA5C ; =ov00_0231A898
	mov fp, #0x2b
_022FC968:
	mov r0, r5
	mov r1, r7
	bl strchr
	cmp r0, #0
	beq _022FC98C
	mov r0, sb
	mov r1, r7
	bl ov00_022F9190
	b _022FC9DC
_022FC98C:
	cmp r7, #0x20
	bne _022FC9A4
	mov r0, sb
	mov r1, fp
	bl ov00_022F9190
	b _022FC9DC
_022FC9A4:
	mov r0, r7, asr #3
	mov r2, r7, lsr #0x1f
	add r0, r7, r0, lsr #28
	rsb r1, r2, r7, lsl #28
	mov r3, r0, asr #4
	add r0, r2, r1, ror #28
	ldrsb r7, [r4, r3]
	ldrsb r3, [r4, r0]
	mov r0, sb
	add r1, sp, #0
	mov r2, #3
	strb r7, [sp, #1]
	strb r3, [sp, #2]
	bl ov00_022F8E9C
_022FC9DC:
	add r6, r6, #1
	ldrsb r7, [r8, r6]
	cmp r7, #0
	bne _022FC968
	b _022FCA0C
_022FC9F0:
	ldr r1, [r3, #8]
	mov r0, sl
	bl ov00_022F97C8
	cmp r0, #0
	moveq r0, #0
	movne r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022FCA0C:
	ldr r0, [sl, #0x194]
	cmp r0, #0
	bne _022FCA4C
	mov r0, sl
	bl ov00_022F92A4
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [sl, #0x64]
	ldr r0, [sl, #0x60]
	cmp r1, r0
	bne _022FCA44
	add r0, sl, #0x54
	bl ov00_022F9284
_022FCA44:
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022FCA4C:
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022FCA54: .word ov00_023184A0
_022FCA58: .word ov00_0231A9C4
_022FCA5C: .word ov00_0231A898
	arm_func_end ov00_022FC8D4

	arm_func_start ov00_022FCA60
ov00_022FCA60: ; 0x022FCA60
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr r2, [r0]
	add r0, sp, #0
	ldr r4, [r2, #8]
	mov r5, #0
	mov r6, r1
	strb r5, [r0]
	strb r5, [r0, #1]
	strb r5, [r0, #2]
	ldr r0, [r6, #0x160]
	ldr r0, [r0, #0x14]
	cmp r0, #0
	beq _022FCAB4
	mov r0, r4
	bl ov00_022F8CD8
	mov r1, r0, lsr #0x1f
	rsb r0, r1, r0, lsl #30
	add r0, r1, r0, ror #30
	rsb r5, r0, #4
	cmp r5, #4
	moveq r5, #0
_022FCAB4:
	ldr r0, [r6, #0x194]
	cmp r0, #0
	mov r0, r4
	bne _022FCB10
	bl ov00_022F8CD0
	mov r7, r0
	mov r0, r4
	bl ov00_022F8CD8
	mov r2, r0
	mov r0, r6
	mov r1, r7
	bl ov00_022F97C8
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	add r1, sp, #0
	mov r0, r6
	mov r2, r5
	bl ov00_022F97C8
	cmp r0, #0
	moveq r0, #0
	movne r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022FCB10:
	bl ov00_022F8CD0
	mov r7, r0
	mov r0, r4
	bl ov00_022F8CD8
	mov r2, r0
	mov r1, r7
	add r0, r6, #0x78
	bl ov00_022F8E9C
	cmp r0, #0
	beq _022FCB68
	add r1, sp, #0
	mov r2, r5
	add r0, r6, #0x78
	bl ov00_022F8E9C
	cmp r0, #0
	beq _022FCB68
	ldr r1, [r6, #0x7c]
	ldr r2, [r6, #0x84]
	add r0, r6, #0x54
	bl ov00_022F8F9C
	cmp r0, #0
	bne _022FCB70
_022FCB68:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022FCB70:
	add r0, r6, #0x78
	bl ov00_022F9284
	mov r0, r6
	bl ov00_022F92A4
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, [r6, #0x64]
	ldr r0, [r6, #0x60]
	cmp r1, r0
	bne _022FCBA4
	add r0, r6, #0x54
	bl ov00_022F9284
_022FCBA4:
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_022FCA60

	arm_func_start ov00_022FCBAC
ov00_022FCBAC: ; 0x022FCBAC
	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
	sub sp, sp, #4
	sub sp, sp, #0x1000
	mov r8, r0
	mov r7, r1
	add r6, sp, #3
	mov r5, #1
	mov r4, #0x1000
_022FCBCC:
	ldr r3, [r8, #8]
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl sub_020866B4
	mov r2, r0
	cmp r2, #0
	bgt _022FCC0C
	mov r0, #1
	add sp, sp, #4
	str r0, [r7, #0x120]
	mov r0, #0xe
	str r0, [r7, #0x3c]
	add sp, sp, #0x1000
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022FCC0C:
	ldr r0, [r8, #4]
	add r1, r0, r2
	str r1, [r8, #4]
	ldr r0, [r8, #0xc]
	cmp r1, r0
	ble _022FCC44
	mov r0, #1
	add sp, sp, #4
	str r0, [r7, #0x120]
	mov r0, #0xe
	str r0, [r7, #0x3c]
	add sp, sp, #0x1000
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022FCC44:
	mov r0, r7
	mov r1, r6
	bl ov00_022F97C8
	cmp r0, #0
	addeq sp, sp, #4
	addeq sp, sp, #0x1000
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldr r2, [r8, #4]
	ldr r1, [r8, #0xc]
	cmp r2, r1
	bne _022FCCE8
	ldr r0, [r7, #0x160]
	ldr r0, [r0, #0x14]
	cmp r0, #0
	beq _022FCCD8
	add r1, sp, #0
	mov r0, #0
	strb r0, [r1]
	strb r0, [r1, #1]
	strb r0, [r1, #2]
	ldr r0, [r8, #0xc]
	mov r2, r0, lsr #0x1f
	rsb r0, r2, r0, lsl #30
	add r0, r2, r0, ror #30
	rsb r2, r0, #4
	cmp r2, #4
	beq _022FCCD8
	cmp r2, #0
	ble _022FCCD8
	mov r0, r7
	bl ov00_022F97C8
	cmp r0, #0
	addeq sp, sp, #4
	addeq sp, sp, #0x1000
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022FCCD8:
	add sp, sp, #4
	add sp, sp, #0x1000
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_022FCCE8:
	cmp r0, #1
	beq _022FCBCC
	mov r0, #2
	add sp, sp, #4
	add sp, sp, #0x1000
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_022FCBAC

	arm_func_start ov00_022FCD00
ov00_022FCD00: ; 0x022FCD00
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #8
	mov r5, r0
	ldr r2, [r5]
	mov r4, r1
	ldr r7, [r2, #0xc]
	cmp r7, #0
	addeq sp, sp, #8
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r0, [r4, #0x194]
	cmp r0, #0
	bne _022FCE00
	mvn r6, #0
_022FCD38:
	ldr r3, [r5, #4]
	ldr r1, [r2, #8]
	mov r0, r4
	add r1, r1, r3
	sub r2, r7, r3
	bl ov00_022F9734
	cmp r0, r6
	addeq sp, sp, #8
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, [r5, #4]
	add r1, r1, r0
	str r1, [r5, #4]
	ldr r2, [r5]
	ldr r7, [r2, #0xc]
	cmp r7, r1
	bne _022FCDEC
	ldr r0, [r4, #0x160]
	ldr r0, [r0, #0x14]
	cmp r0, #0
	beq _022FCDE0
	add r1, sp, #3
	mov r0, #0
	strb r0, [r1]
	strb r0, [r1, #1]
	strb r0, [r1, #2]
	ldr r0, [r5]
	ldr r0, [r0, #0xc]
	mov r2, r0, lsr #0x1f
	rsb r0, r2, r0, lsl #30
	add r0, r2, r0, ror #30
	rsb r2, r0, #4
	cmp r2, #4
	beq _022FCDE0
	cmp r2, #0
	ble _022FCDE0
	mov r0, r4
	bl ov00_022F97C8
	cmp r0, #0
	addeq sp, sp, #8
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
_022FCDE0:
	add sp, sp, #8
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022FCDEC:
	cmp r0, #0
	bne _022FCD38
	add sp, sp, #8
	mov r0, #2
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022FCE00:
	ldr r6, _022FCED8 ; =0x00003F01
_022FCE04:
	ldr r3, [r5, #4]
	ldr r1, [r2, #8]
	sub r7, r7, r3
	cmp r7, r6
	movge r7, r6
	mov r0, r4
	mov r2, r7
	add r1, r1, r3
	bl ov00_022F97C8
	cmp r0, #0
	addeq sp, sp, #8
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, [r5, #4]
	add r1, r1, r7
	str r1, [r5, #4]
	ldr r2, [r5]
	ldr r7, [r2, #0xc]
	cmp r7, r1
	bne _022FCEC4
	ldr r0, [r4, #0x160]
	ldr r0, [r0, #0x14]
	cmp r0, #0
	beq _022FCEB8
	add r1, sp, #0
	mov r0, #0
	strb r0, [r1]
	strb r0, [r1, #1]
	strb r0, [r1, #2]
	ldr r0, [r5]
	ldr r0, [r0, #0xc]
	mov r2, r0, lsr #0x1f
	rsb r0, r2, r0, lsl #30
	add r0, r2, r0, ror #30
	rsb r2, r0, #4
	cmp r2, #4
	beq _022FCEB8
	cmp r2, #0
	ble _022FCEB8
	mov r0, r4
	bl ov00_022F97C8
	cmp r0, #0
	addeq sp, sp, #8
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
_022FCEB8:
	add sp, sp, #8
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022FCEC4:
	cmp r0, #1
	beq _022FCE04
	mov r0, #2
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022FCED8: .word 0x00003F01
	arm_func_end ov00_022FCD00

	arm_func_start ov00_022FCEDC
ov00_022FCEDC: ; 0x022FCEDC
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #0x820
	mov r8, r0
	mov r6, #0
	ldr r4, [r8, #4]
	sub r0, r6, #1
	mov r7, r1
	cmp r4, r0
	bne _022FD518
	str r6, [r8, #4]
	ldr sb, [r7, #0x160]
	ldr r0, [sb, #0xc]
	cmp r0, #0
	ldreq r0, [sb, #0x10]
	cmpeq r0, #0
	bne _022FCF48
	ldr r1, [r8]
	cmp r2, #0
	add r0, sp, #0x20
	ldr r2, [r1, #4]
	beq _022FCF3C
	ldr r1, _022FD580 ; =ov00_0231A9D8
	bl sub_020790DC
	b _022FD450
_022FCF3C:
	ldr r1, _022FD584 ; =ov00_0231A9DC
	bl sub_020790DC
	b _022FD450
_022FCF48:
	ldr sl, [r8]
	ldr r1, [sl]
	cmp r1, #0
	bne _022FCF78
	cmp r2, #0
	ldrne r2, _022FD588 ; =ov00_0231A9E4
	ldr r3, [sl, #4]
	ldreq r2, _022FD58C ; =ov00_0231AA0C
	ldr r1, _022FD590 ; =ov00_0231AA38
	add r0, sp, #0x20
	bl sub_020790DC
	b _022FD450
_022FCF78:
	cmp r1, #3
	bne _022FD1FC
	ldr r0, [sb, #0x14]
	cmp r0, #0
	beq _022FD1F0
	mov r0, #8
	cmp r2, #0
	strb r0, [sp, #0x14]
	andne r0, r0, #0xff
	orrne r0, r0, #4
	strneb r0, [sp, #0x14]
	cmp r3, #0
	ldrneb r0, [sp, #0x14]
	mov r2, #0x20
	mov r1, #0
	orrne r0, r0, #2
	strneb r0, [sp, #0x14]
	ldr r0, _022FD594 ; =ov00_0231A990
	mov r6, #0
	strb r2, [sp, #0x15]
	strh r1, [sp, #0x16]
	bl strlen
	mov r4, r0
	ldr r0, _022FD594 ; =ov00_0231A990
	bl strlen
	mov r1, r0, lsl #0x10
	mov r0, r4, lsl #0x10
	mov r0, r0, asr #0x10
	mov r0, r0, lsl #0x10
	mov r1, r1, asr #0x10
	mov r2, r0, lsr #0x10
	mov r0, r1, lsl #0x10
	mov r1, r2, asr #8
	mov r0, r0, lsr #8
	and r1, r1, #0xff
	and r0, r0, #0xff00
	orr r1, r1, r0
	ldr r0, _022FD598 ; =ov00_0231A998
	strh r1, [sp, #0x18]
	bl strlen
	mov r4, r0
	ldr r0, _022FD598 ; =ov00_0231A998
	bl strlen
	mov r1, r4, lsl #0x10
	mov r2, r1, asr #0x10
	mov r1, r0, lsl #0x10
	mov r0, r2, lsl #0x10
	mov r1, r1, asr #0x10
	mov r2, r0, lsr #0x10
	mov r0, r1, lsl #0x10
	mov r1, r2, asr #8
	mov r0, r0, lsr #8
	and r1, r1, #0xff
	and r0, r0, #0xff00
	orr r0, r1, r0
	strh r0, [sp, #0x1a]
	ldr r0, [r8]
	ldr r0, [r0, #8]
	bl ov00_022F8CD8
	ldr r1, [r8]
	mov sb, r0
	ldr r0, [r1, #8]
	bl ov00_022F8CD8
	ldr r1, [r8]
	mov r5, r0
	ldr r0, [r1, #8]
	bl ov00_022F8CD8
	ldr r1, [r8]
	mov r4, r0
	ldr r0, [r1, #8]
	bl ov00_022F8CD8
	mov r2, r5, lsl #8
	and r3, r2, #0xff0000
	mov r2, r4, lsr #0x18
	mov r0, r0, lsr #8
	mov r1, sb, lsl #0x18
	and r2, r2, #0xff
	and r0, r0, #0xff00
	orr r0, r2, r0
	orr r0, r3, r0
	and r1, r1, #0xff000000
	orr r0, r1, r0
	add r4, sp, #0x20
	add r3, sp, #0x14
	str r0, [sp, #0x1c]
	mov r2, #6
_022FD0D0:
	ldrb r1, [r3]
	ldrb r0, [r3, #1]
	add r3, r3, #2
	strb r1, [r4]
	strb r0, [r4, #1]
	add r4, r4, #2
	subs r2, r2, #1
	bne _022FD0D0
	add r0, sp, #0x20
	add r6, r6, #0xc
	ldr r3, _022FD594 ; =ov00_0231A990
	add r4, r0, r6
	mov r2, #4
_022FD104:
	ldrb r1, [r3]
	ldrb r0, [r3, #1]
	add r3, r3, #2
	strb r1, [r4]
	strb r0, [r4, #1]
	add r4, r4, #2
	subs r2, r2, #1
	bne _022FD104
	ldr r0, _022FD594 ; =ov00_0231A990
	bl strlen
	add r6, r6, r0
	ldr r0, _022FD594 ; =ov00_0231A990
	bl strlen
	and r0, r0, #3
	rsb r0, r0, #4
	cmp r0, #4
	beq _022FD170
	cmp r0, #0
	sub r2, r0, #1
	ble _022FD170
	mov r1, #0
	add r0, sp, #0x20
_022FD15C:
	strb r1, [r0, r6]
	cmp r2, #0
	add r6, r6, #1
	sub r2, r2, #1
	bgt _022FD15C
_022FD170:
	add r0, sp, #0x20
	ldr r3, _022FD598 ; =ov00_0231A998
	add r4, r0, r6
	mov r2, #0x15
_022FD180:
	ldrb r1, [r3]
	ldrb r0, [r3, #1]
	add r3, r3, #2
	strb r1, [r4]
	strb r0, [r4, #1]
	add r4, r4, #2
	subs r2, r2, #1
	bne _022FD180
	ldr r0, _022FD598 ; =ov00_0231A998
	bl strlen
	add r6, r6, r0
	ldr r0, _022FD598 ; =ov00_0231A998
	bl strlen
	and r0, r0, #3
	rsb r0, r0, #4
	cmp r0, #4
	beq _022FD450
	cmp r0, #0
	sub r2, r0, #1
	ble _022FD450
	mov r1, #0
	add r0, sp, #0x20
_022FD1D8:
	strb r1, [r0, r6]
	cmp r2, #0
	add r6, r6, #1
	sub r2, r2, #1
	bgt _022FD1D8
	b _022FD450
_022FD1F0:
	mov r0, #0
	strb r0, [sp, #0x20]
	b _022FD450
_022FD1FC:
	sub r0, r1, #1
	cmp r0, #1
	bhi _022FD450
	cmp r1, #1
	ldrne r5, [sl, #0xc]
	ldrne r1, [sl, #0x10]
	ldrne r4, [sl, #0x14]
	bne _022FD228
	ldr r5, [r8, #0xc]
	ldr r1, [sl, #0xc]
	ldr r4, [sl, #0x10]
_022FD228:
	ldr r0, [sb, #0x14]
	cmp r0, #0
	beq _022FD430
	mov r0, #8
	strb r0, [sp, #8]
	cmp r2, #0
	andne r0, r0, #0xff
	orrne r0, r0, #4
	strneb r0, [sp, #8]
	cmp r3, #0
	ldrneb r0, [sp, #8]
	mov r1, #0x10
	strb r1, [sp, #9]
	orrne r0, r0, #2
	strneb r0, [sp, #8]
	mov r0, #0
	strh r0, [sp, #0xa]
	ldr r0, [r8]
	mov r6, #0
	ldr sl, [r0, #4]
	mov r0, sl
	bl strlen
	mov sb, r0
	mov r0, sl
	bl strlen
	mov r1, r0, lsl #0x10
	mov r0, sb, lsl #0x10
	mov r0, r0, asr #0x10
	mov r0, r0, lsl #0x10
	mov r1, r1, asr #0x10
	mov r2, r0, lsr #0x10
	mov r0, r1, lsl #0x10
	mov r1, r2, asr #8
	mov r0, r0, lsr #8
	and r1, r1, #0xff
	and r0, r0, #0xff00
	orr r1, r1, r0
	mov r0, r4
	strh r1, [sp, #0xc]
	bl strlen
	mov sb, r0
	mov r0, r4
	bl strlen
	mov r1, sb, lsl #0x10
	mov r2, r1, asr #0x10
	mov r1, r0, lsl #0x10
	mov r0, r2, lsl #0x10
	mov r2, r0, lsr #0x10
	mov r1, r1, asr #0x10
	mov ip, r5, lsr #0x18
	mov r3, r2, asr #8
	mov r1, r1, lsl #0x10
	mov r2, r1, lsr #8
	mov r1, r5, lsl #0x18
	mov sb, r5, lsr #8
	mov r0, r5, lsl #8
	and r5, sb, #0xff00
	and ip, ip, #0xff
	and sb, r0, #0xff0000
	orr r0, ip, r5
	and r3, r3, #0xff
	and r2, r2, #0xff00
	orr r2, r3, r2
	strh r2, [sp, #0xe]
	and r1, r1, #0xff000000
	orr r0, sb, r0
	orr r0, r1, r0
	add r5, sp, #0x20
	add r3, sp, #8
	str r0, [sp, #0x10]
	mov r2, #6
_022FD344:
	ldrb r1, [r3]
	ldrb r0, [r3, #1]
	add r3, r3, #2
	strb r1, [r5]
	strb r0, [r5, #1]
	add r5, r5, #2
	subs r2, r2, #1
	bne _022FD344
	ldr r0, [r8]
	add r2, sp, #0x20
	add r6, r6, #0xc
	ldr r1, [r0, #4]
	add r0, r2, r6
	bl strcpy
	ldr r0, [r8]
	ldr r5, [r0, #4]
	mov r0, r5
	bl strlen
	add r6, r6, r0
	mov r0, r5
	bl strlen
	and r0, r0, #3
	rsb r0, r0, #4
	cmp r0, #4
	beq _022FD3D0
	cmp r0, #0
	sub r2, r0, #1
	ble _022FD3D0
	mov r1, #0
	add r0, sp, #0x20
_022FD3BC:
	strb r1, [r0, r6]
	cmp r2, #0
	add r6, r6, #1
	sub r2, r2, #1
	bgt _022FD3BC
_022FD3D0:
	add r0, sp, #0x20
	mov r1, r4
	add r0, r0, r6
	bl strcpy
	mov r0, r4
	bl strlen
	add r6, r6, r0
	mov r0, r4
	bl strlen
	and r0, r0, #3
	rsb r0, r0, #4
	cmp r0, #4
	beq _022FD450
	cmp r0, #0
	sub r2, r0, #1
	ble _022FD450
	mov r1, #0
	add r0, sp, #0x20
_022FD418:
	strb r1, [r0, r6]
	cmp r2, #0
	add r6, r6, #1
	sub r2, r2, #1
	bgt _022FD418
	b _022FD450
_022FD430:
	stmia sp, {r1, r4}
	cmp r2, #0
	ldrne r2, _022FD588 ; =ov00_0231A9E4
	ldr r3, [sl, #4]
	ldreq r2, _022FD58C ; =ov00_0231AA0C
	ldr r1, _022FD59C ; =ov00_0231AA68
	add r0, sp, #0x20
	bl sub_020790DC
_022FD450:
	ldr r0, [r7, #0x194]
	cmp r0, #0
	bne _022FD4AC
	cmp r6, #0
	bne _022FD470
	add r0, sp, #0x20
	bl strlen
	mov r6, r0
_022FD470:
	add r1, sp, #0x20
	mov r0, r7
	mov r2, r6
	bl ov00_022F97C8
	cmp r0, #0
	addeq sp, sp, #0x820
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	cmp r0, #2
	addeq sp, sp, #0x820
	moveq r0, #2
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	add r0, r7, #0x54
	bl ov00_022F9284
	b _022FD518
_022FD4AC:
	cmp r6, #0
	bne _022FD4C0
	add r0, sp, #0x20
	bl strlen
	mov r6, r0
_022FD4C0:
	add r1, sp, #0x20
	mov r2, r6
	add r0, r7, #0x54
	bl ov00_022F8F9C
	cmp r0, #0
	addeq sp, sp, #0x820
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	mov r0, r7
	bl ov00_022F92A4
	cmp r0, #0
	addeq sp, sp, #0x820
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	ldr r1, [r7, #0x64]
	ldr r0, [r7, #0x60]
	cmp r1, r0
	addlt sp, sp, #0x820
	movlt r0, #2
	ldmltia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	add r0, r7, #0x54
	bl ov00_022F9284
_022FD518:
	ldr r0, [r8]
	ldr r0, [r0]
	cmp r0, #0
	bne _022FD53C
	mov r0, r8
	mov r1, r7
	bl ov00_022FC8D4
	add sp, sp, #0x820
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022FD53C:
	cmp r0, #3
	bne _022FD558
	mov r0, r8
	mov r1, r7
	bl ov00_022FCA60
	add sp, sp, #0x820
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022FD558:
	cmp r0, #1
	mov r0, r8
	mov r1, r7
	bne _022FD574
	bl ov00_022FCBAC
	add sp, sp, #0x820
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_022FD574:
	bl ov00_022FCD00
	add sp, sp, #0x820
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_022FD580: .word ov00_0231A9D8
_022FD584: .word ov00_0231A9DC
_022FD588: .word ov00_0231A9E4
_022FD58C: .word ov00_0231AA0C
_022FD590: .word ov00_0231AA38
_022FD594: .word ov00_0231A990
_022FD598: .word ov00_0231A998
_022FD59C: .word ov00_0231AA68
	arm_func_end ov00_022FCEDC

	arm_func_start ov00_022FD5A0
ov00_022FD5A0: ; 0x022FD5A0
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov sl, r0
	ldr r0, [sl, #0x164]
	bl ov00_022F47A0
	ldr r2, [sl, #0x64]
	ldr r1, [sl, #0x60]
	mov r8, r0
	cmp r2, r1
	bge _022FD614
	mov r0, sl
	bl ov00_022F92A4
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [sl, #0x64]
	ldr r0, [sl, #0x60]
	cmp r1, r0
	movlt r0, #2
	ldmltia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r0, sl, #0x54
	bl ov00_022F9284
	ldr r0, [sl, #0x17c]
	cmp r0, #0
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [sl, #0x168]
	cmp r0, r8
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022FD614:
	ldr r0, [sl, #0x17c]
	cmp r0, #0
	beq _022FD684
	ldr r1, [sl, #0x160]
	ldr r0, [r1, #0xc]
	cmp r0, #0
	ldreq r0, [r1, #0x10]
	cmpeq r0, #0
	beq _022FD67C
	ldr r0, _022FD79C ; =ov00_0231AABC
	bl strlen
	mov r2, r0
	ldr r1, _022FD79C ; =ov00_0231AABC
	mov r0, sl
	bl ov00_022F97C8
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp r0, #2
	moveq r0, #2
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [sl, #0x17c]
	cmp r0, #1
	bne _022FD684
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022FD67C:
	mov r0, #0
	str r0, [sl, #0x17c]
_022FD684:
	ldr r1, [sl, #0x168]
	cmp r1, r8
	bge _022FD70C
	mov r5, #0
	mov r6, #1
	mov fp, r5
	mov r4, r6
_022FD6A0:
	ldr r0, [sl, #0x164]
	bl ov00_022F47A8
	mov r7, r0
	ldr r0, [sl, #0x164]
	ldr sb, [sl, #0x168]
	bl ov00_022F47A0
	sub r0, r0, #1
	cmp sb, r0
	moveq r3, r6
	movne r3, r5
	cmp sb, #0
	moveq r2, r4
	movne r2, fp
	mov r0, r7
	mov r1, sl
	bl ov00_022FCEDC
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	cmp r0, #2
	moveq r0, #2
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [sl, #0x168]
	add r1, r0, #1
	str r1, [sl, #0x168]
	cmp r1, r8
	blt _022FD6A0
_022FD70C:
	ldr r0, [sl, #0x194]
	cmp r0, #0
	beq _022FD744
	ldr r2, [sl, #0x84]
	cmp r2, #0
	ble _022FD744
	ldr r1, [sl, #0x7c]
	add r0, sl, #0x54
	bl ov00_022F8F9C
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r0, sl, #0x78
	bl ov00_022F9284
_022FD744:
	ldr r1, [sl, #0x160]
	ldr r0, [r1, #0xc]
	cmp r0, #0
	beq _022FD784
	ldr r0, [r1, #0x14]
	cmp r0, #0
	bne _022FD784
	ldr r0, _022FD7A0 ; =ov00_0231AAC0
	bl strlen
	mov r2, r0
	ldr r1, _022FD7A0 ; =ov00_0231AAC0
	mov r0, sl
	bl ov00_022F97C8
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022FD784:
	ldr r1, [sl, #0x64]
	ldr r0, [sl, #0x60]
	cmp r1, r0
	movlt r0, #2
	movge r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022FD79C: .word ov00_0231AABC
_022FD7A0: .word ov00_0231AAC0
	arm_func_end ov00_022FD5A0

	arm_func_start ov00_022FD7A4
ov00_022FD7A4: ; 0x022FD7A4
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	movs r5, r0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r4, [r5, #0x14]
	cmp r4, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, _022FD910 ; =ov00_0231AAEC
	mov r0, r4
	mov r2, #7
	bl strncmp
	cmp r0, #0
	bne _022FD7EC
	mov r0, #0
	str r0, [r5, #0x28]
	add r4, r4, #7
	b _022FD81C
_022FD7EC:
	ldr r1, _022FD914 ; =ov00_0231AAF4
	mov r0, r4
	mov r2, #8
	bl strncmp
	cmp r0, #0
	bne _022FD814
	mov r0, #1
	str r0, [r5, #0x28]
	add r4, r4, #8
	b _022FD81C
_022FD814:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022FD81C:
	ldr r1, _022FD918 ; =ov00_0231AB00
	mov r0, r4
	bl strcspn
	mov r6, r0
	ldrsb r7, [r4, r6]
	mov r1, #0
	mov r0, r4
	strb r1, [r4, r6]
	bl ov00_022F5514
	str r0, [r5, #0x18]
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	strb r7, [r4, r6]
	ldrsb r0, [r4, r6]!
	cmp r0, #0x3a
	bne _022FD898
	add r4, r4, #1
	mov r0, r4
	bl sub_0208B360
	strh r0, [r5, #0x20]
	ldrh r0, [r5, #0x20]
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
_022FD880:
	ldrsb r0, [r4, #1]!
	cmp r0, #0
	beq _022FD8B0
	cmp r0, #0x2f
	bne _022FD880
	b _022FD8B0
_022FD898:
	ldr r0, [r5, #0x28]
	cmp r0, #1
	ldreq r0, _022FD91C ; =0x000001BB
	streqh r0, [r5, #0x20]
	movne r0, #0x50
	strneh r0, [r5, #0x20]
_022FD8B0:
	ldrsb r0, [r4]
	cmp r0, #0
	ldreq r4, _022FD920 ; =ov00_0231AB04
	mov r0, r4
	bl ov00_022F5514
	mov r1, #0x20
	mov r7, r0
	str r0, [r5, #0x24]
	bl strchr
	cmp r0, #0
	beq _022FD900
	mov r6, #0x2b
	mov r4, #0x20
_022FD8E4:
	strb r6, [r0]
	ldr r7, [r5, #0x24]
	mov r1, r4
	mov r0, r7
	bl strchr
	cmp r0, #0
	bne _022FD8E4
_022FD900:
	cmp r7, #0
	moveq r0, #0
	movne r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022FD910: .word ov00_0231AAEC
_022FD914: .word ov00_0231AAF4
_022FD918: .word ov00_0231AB00
_022FD91C: .word 0x000001BB
_022FD920: .word ov00_0231AB04
	arm_func_end ov00_022FD7A4

	arm_func_start ov00_022FD924
ov00_022FD924: ; 0x022FD924
	stmdb sp!, {r4, lr}
	mov r1, #0
	mov r4, r0
	mov r2, r1
	bl ov00_022F943C
	bl ov00_022F558C
	mov r0, r4
	bl ov00_022FD7A4
	cmp r0, #0
	bne _022FD960
	mov r0, #1
	str r0, [r4, #0x120]
	mov r0, #3
	str r0, [r4, #0x3c]
	ldmia sp!, {r4, pc}
_022FD960:
	ldr r1, [r4, #0x28]
	cmp r1, #1
	ldreq r0, [r4, #0x194]
	cmpeq r0, #0
	bne _022FD984
	ldr r0, [r4, #4]
	mov r1, #1
	bl ov00_022F9EE8
	b _022FD9A0
_022FD984:
	cmp r1, #1
	ldrne r0, [r4, #0x194]
	cmpne r0, #0
	beq _022FD9A0
	ldr r0, [r4, #4]
	mov r1, #0
	bl ov00_022F9EE8
_022FD9A0:
	mov r1, #0
	mov r3, #1
	mov r0, r4
	mov r2, r1
	str r3, [r4, #0x10]
	bl ov00_022F943C
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022FD924

	arm_func_start ov00_022FD9BC
ov00_022FD9BC: ; 0x022FD9BC
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r0
	ldr r1, [r4, #0x1b0]
	cmp r1, #0
	beq _022FD9E8
	mov r1, #0
	mov r3, #2
	mov r2, r1
	str r3, [r4, #0x10]
	bl ov00_022F943C
	ldmia sp!, {r3, r4, r5, pc}
_022FD9E8:
	ldr r5, [r4, #0x188]
	cmp r5, #0
	bne _022FDA04
	ldr r0, _022FDA94 ; =ov00_023289AC
	ldr r5, [r0]
	cmp r5, #0
	ldreq r5, [r4, #0x18]
_022FDA04:
	mov r0, r5
	bl ov00_022F5178
	mvn r1, #0
	str r0, [r4, #0x1c]
	cmp r0, r1
	bne _022FDA50
	mov r0, r5
	add r1, r4, #0x1b0
	bl ov00_022F54AC
	mvn r1, #0
	cmp r0, r1
	bne _022FDA50
	mov r0, #0
	str r0, [r4, #0x1b0]
	mov r0, #1
	str r0, [r4, #0x120]
	mov r0, #4
	str r0, [r4, #0x3c]
	ldmia sp!, {r3, r4, r5, pc}
_022FDA50:
	ldr r1, [r4, #0x1c]
	mvn r0, #0
	cmp r1, r0
	mov r1, #0
	bne _022FDA7C
	mov r3, #2
	mov r0, r4
	mov r2, r1
	str r3, [r4, #0x10]
	bl ov00_022F943C
	ldmia sp!, {r3, r4, r5, pc}
_022FDA7C:
	mov r3, #3
	mov r0, r4
	mov r2, r1
	str r3, [r4, #0x10]
	bl ov00_022F943C
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022FDA94: .word ov00_023289AC
	arm_func_end ov00_022FD9BC

	arm_func_start ov00_022FDA98
ov00_022FDA98: ; 0x022FDA98
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r0, [r4, #0x1b0]
	bl ov00_022F5500
	mvn r1, #0
	str r0, [r4, #0x1c]
	cmp r0, r1
	bne _022FDAD4
	mov r0, #0
	str r0, [r4, #0x1b0]
	mov r0, #1
	str r0, [r4, #0x120]
	mov r0, #4
	str r0, [r4, #0x3c]
	ldmia sp!, {r4, pc}
_022FDAD4:
	cmp r0, #0
	mov r1, #0
	bne _022FDAF8
	mov r3, #2
	mov r0, r4
	mov r2, r1
	str r3, [r4, #0x10]
	bl ov00_022F943C
	ldmia sp!, {r4, pc}
_022FDAF8:
	mov r0, r4
	mov r2, r1
	str r1, [r4, #0x1b0]
	mov r3, #3
	str r3, [r4, #0x10]
	bl ov00_022F943C
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022FDA98

	arm_func_start ov00_022FDB14
ov00_022FDB14: ; 0x022FDB14
	stmdb sp!, {r4, lr}
	sub sp, sp, #0x10
	mov r4, r0
	ldr r1, [r4, #0x4c]
	mvn r0, #0
	cmp r1, r0
	bne _022FDCC0
	mov r0, #2
	mov r1, #1
	mov r2, #0
	bl SocketCreate
	mvn r1, #0
	str r0, [r4, #0x4c]
	cmp r0, r1
	bne _022FDB74
	mov r0, #1
	str r0, [r4, #0x120]
	mov r0, #5
	str r0, [r4, #0x3c]
	ldr r0, [r4, #0x4c]
	bl ov00_022F5194
	add sp, sp, #0x10
	str r0, [r4, #0x50]
	ldmia sp!, {r4, pc}
_022FDB74:
	mov r1, #0
	bl SocketSetBlocking
	cmp r0, #0
	bne _022FDBA8
	mov r0, #1
	str r0, [r4, #0x120]
	mov r0, #5
	str r0, [r4, #0x3c]
	ldr r0, [r4, #0x4c]
	bl ov00_022F5194
	add sp, sp, #0x10
	str r0, [r4, #0x50]
	ldmia sp!, {r4, pc}
_022FDBA8:
	ldr r0, [r4, #0x158]
	cmp r0, #0
	beq _022FDBC4
	ldr r1, _022FDD70 ; =ov00_0231A7F4
	ldr r0, [r4, #0x4c]
	ldr r1, [r1]
	bl ov00_022F52DC
_022FDBC4:
	add r2, sp, #8
	mov r1, #0
	str r1, [r2]
	mov r0, #2
	str r1, [r2, #4]
	strb r0, [sp, #9]
	ldr r0, [r4, #0x188]
	cmp r0, #0
	beq _022FDC0C
	add r0, r4, #0x100
	ldrh r0, [r0, #0x8c]
	mov r1, r0, asr #8
	mov r0, r0, lsl #8
	and r1, r1, #0xff
	and r0, r0, #0xff00
	orr r0, r1, r0
	strh r0, [sp, #0xa]
	b _022FDC5C
_022FDC0C:
	ldr r0, _022FDD74 ; =ov00_023289AC
	ldr r0, [r0]
	cmp r0, #0
	beq _022FDC40
	ldr r0, _022FDD78 ; =ov00_023289A8
	ldrh r0, [r0]
	mov r1, r0, asr #8
	mov r0, r0, lsl #8
	and r1, r1, #0xff
	and r0, r0, #0xff00
	orr r0, r1, r0
	strh r0, [sp, #0xa]
	b _022FDC5C
_022FDC40:
	ldrh r0, [r4, #0x20]
	mov r1, r0, asr #8
	mov r0, r0, lsl #8
	and r1, r1, #0xff
	and r0, r0, #0xff00
	orr r0, r1, r0
	strh r0, [sp, #0xa]
_022FDC5C:
	ldr r0, [r4, #0x1c]
	add r1, sp, #8
	str r0, [sp, #0xc]
	ldr r0, [r4, #0x4c]
	mov r2, #8
	bl SocketConnect
	mvn r1, #0
	cmp r0, r1
	bne _022FDCC0
	ldr r0, [r4, #0x4c]
	bl ov00_022F5194
	mvn r2, #5
	cmp r0, r2
	subne r1, r2, #0x14
	cmpne r0, r1
	subne r1, r2, #0x46
	cmpne r0, r1
	beq _022FDCC0
	mov r1, #1
	str r1, [r4, #0x120]
	mov r1, #6
	str r1, [r4, #0x3c]
	add sp, sp, #0x10
	str r0, [r4, #0x50]
	ldmia sp!, {r4, pc}
_022FDCC0:
	ldr r0, [r4, #0x4c]
	add r2, sp, #4
	add r3, sp, #0
	mov r1, #0
	bl ov00_022F51A4
	mvn r1, #0
	cmp r0, r1
	beq _022FDCF4
	cmp r0, #1
	bne _022FDD28
	ldr r1, [sp]
	cmp r1, #0
	beq _022FDD28
_022FDCF4:
	mov r1, #1
	mov r2, #6
	str r1, [r4, #0x120]
	sub r1, r2, #7
	cmp r0, r1
	str r2, [r4, #0x3c]
	movne r0, #0
	bne _022FDD1C
	ldr r0, [r4, #0x4c]
	bl ov00_022F5194
_022FDD1C:
	add sp, sp, #0x10
	str r0, [r4, #0x50]
	ldmia sp!, {r4, pc}
_022FDD28:
	cmp r0, #1
	addne sp, sp, #0x10
	ldmneia sp!, {r4, pc}
	ldr r0, [sp, #4]
	cmp r0, #0
	addeq sp, sp, #0x10
	ldmeqia sp!, {r4, pc}
	ldr r0, [r4, #0x194]
	mov r1, #0
	cmp r0, #0
	moveq r0, #5
	movne r0, #4
	str r0, [r4, #0x10]
	mov r0, r4
	mov r2, r1
	bl ov00_022F943C
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
	.align 2, 0
_022FDD70: .word ov00_0231A7F4
_022FDD74: .word ov00_023289AC
_022FDD78: .word ov00_023289A8
	arm_func_end ov00_022FDB14

	arm_func_start ov00_022FDD7C
ov00_022FDD7C: ; 0x022FDD7C
	stmdb sp!, {r4, lr}
	sub sp, sp, #8
	sub sp, sp, #0x400
	mov r4, r0
	ldr r1, [r4, #0x198]
	cmp r1, #0
	bne _022FDDC8
	ldr r2, [r4, #0x1a0]
	add r1, r4, #0x190
	blx r2
	cmp r0, #3
	bne _022FDDC8
	mov r0, #1
	add sp, sp, #8
	str r0, [r4, #0x120]
	mov r0, #0x11
	add sp, sp, #0x400
	str r0, [r4, #0x3c]
	ldmia sp!, {r4, pc}
_022FDDC8:
	ldr r1, [r4, #0x64]
	ldr r0, [r4, #0x60]
	cmp r1, r0
	bge _022FDE10
	mov r0, r4
	bl ov00_022F92A4
	cmp r0, #0
	addeq sp, sp, #8
	addeq sp, sp, #0x400
	ldmeqia sp!, {r4, pc}
	ldr r1, [r4, #0x64]
	ldr r0, [r4, #0x60]
	cmp r1, r0
	addlt sp, sp, #8
	addlt sp, sp, #0x400
	ldmltia sp!, {r4, pc}
	add r0, r4, #0x54
	bl ov00_022F9284
_022FDE10:
	ldr r3, _022FDEE4 ; =0x00000401
	add r1, sp, #4
	add r2, sp, #0
	mov r0, r4
	str r3, [sp]
	bl ov00_022F962C
	sub r1, r0, #2
	cmp r1, #1
	bhi _022FDE50
	mov r0, #1
	add sp, sp, #8
	str r0, [r4, #0x120]
	mov r0, #0x11
	add sp, sp, #0x400
	str r0, [r4, #0x3c]
	ldmia sp!, {r4, pc}
_022FDE50:
	cmp r0, #0
	addne sp, sp, #8
	addne sp, sp, #0x400
	ldmneia sp!, {r4, pc}
	ldr r2, [sp]
	add r1, sp, #4
	add r0, r4, #0xc0
	bl ov00_022F8E9C
	cmp r0, #0
	addeq sp, sp, #8
	addeq sp, sp, #0x400
	ldmeqia sp!, {r4, pc}
	mov r0, r4
	bl ov00_022F94EC
	cmp r0, #0
	bne _022FDEAC
	mov r0, #1
	add sp, sp, #8
	str r0, [r4, #0x120]
	mov r0, #0x11
	add sp, sp, #0x400
	str r0, [r4, #0x3c]
	ldmia sp!, {r4, pc}
_022FDEAC:
	ldr r0, [r4, #0x19c]
	cmp r0, #0
	addeq sp, sp, #8
	addeq sp, sp, #0x400
	ldmeqia sp!, {r4, pc}
	mov r1, #0
	mov r3, #5
	mov r0, r4
	mov r2, r1
	str r3, [r4, #0x10]
	bl ov00_022F943C
	add sp, sp, #8
	add sp, sp, #0x400
	ldmia sp!, {r4, pc}
	.align 2, 0
_022FDEE4: .word 0x00000401
	arm_func_end ov00_022FDD7C

	arm_func_start ov00_022FDEE8
ov00_022FDEE8: ; 0x022FDEE8
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0x10
	mov r5, r0
	ldr r0, [r5, #0x60]
	cmp r0, #0
	bne _022FE110
	ldr r0, [r5, #0x194]
	cmp r0, #0
	addeq r4, r5, #0x54
	ldr r0, [r5, #0x160]
	addne r4, r5, #0x78
	cmp r0, #0
	beq _022FDF2C
	ldr r0, [r5, #0x180]
	cmp r0, #0
	ldreq r1, _022FE180 ; =ov00_0231AB08
	beq _022FDF3C
_022FDF2C:
	ldr r0, [r5, #0xc]
	cmp r0, #3
	ldreq r1, _022FE184 ; =ov00_0231AB10
	ldrne r1, _022FE188 ; =ov00_0231AB18
_022FDF3C:
	mov r0, r4
	mov r2, #0
	bl ov00_022F8E9C
	ldr r0, [r5, #0x188]
	mov r2, #0
	cmp r0, #0
	ldreq r0, _022FE18C ; =ov00_023289AC
	ldreq r0, [r0]
	cmpeq r0, #0
	beq _022FDF74
	ldr r1, [r5, #0x14]
	mov r0, r4
	bl ov00_022F8E9C
	b _022FDF80
_022FDF74:
	ldr r1, [r5, #0x24]
	mov r0, r4
	bl ov00_022F8E9C
_022FDF80:
	ldr r1, _022FE190 ; =ov00_0231AB20
	mov r0, r4
	mov r2, #0
	bl ov00_022F8E9C
	ldrh r0, [r5, #0x20]
	cmp r0, #0x50
	bne _022FDFB0
	ldr r2, [r5, #0x18]
	ldr r1, _022FE194 ; =ov00_0231AB2C
	mov r0, r4
	bl ov00_022F9110
	b _022FDFF8
_022FDFB0:
	ldr r1, _022FE198 ; =ov00_0231AB34
	mov r0, r4
	mov r2, #0
	bl ov00_022F8E9C
	ldr r1, [r5, #0x18]
	mov r0, r4
	mov r2, #0
	bl ov00_022F8E9C
	mov r0, r4
	mov r1, #0x3a
	bl ov00_022F9190
	ldrh r1, [r5, #0x20]
	mov r0, r4
	bl ov00_022F924C
	mov r0, r4
	ldr r1, _022FE19C ; =ov00_0231AB3C
	mov r2, #2
	bl ov00_022F8E9C
_022FDFF8:
	ldr r0, [r5, #0x2c]
	cmp r0, #0
	beq _022FE014
	ldr r1, _022FE1A0 ; =ov00_0231AB40
	bl strstr
	cmp r0, #0
	bne _022FE024
_022FE014:
	ldr r1, _022FE1A0 ; =ov00_0231AB40
	ldr r2, _022FE1A4 ; =ov00_0231AB4C
	mov r0, r4
	bl ov00_022F9110
_022FE024:
	ldr r0, [r5, #0x38]
	cmp r0, #0
	beq _022FE044
	ldr r1, _022FE1A8 ; =ov00_0231AB5C
	ldr r2, _022FE1AC ; =ov00_0231AB68
	mov r0, r4
	bl ov00_022F9110
	b _022FE054
_022FE044:
	ldr r1, _022FE1A8 ; =ov00_0231AB5C
	ldr r2, _022FE1B0 ; =ov00_0231AB74
	mov r0, r4
	bl ov00_022F9110
_022FE054:
	ldr r0, [r5, #0x160]
	cmp r0, #0
	beq _022FE0A4
	ldr r0, [r5, #0x180]
	cmp r0, #0
	bne _022FE0A4
	ldr r2, [r5, #0x170]
	ldr r1, _022FE1B4 ; =ov00_0231AB7C
	add r0, sp, #0
	bl sub_020790DC
	ldr r1, _022FE1B8 ; =ov00_0231AB80
	add r2, sp, #0
	mov r0, r4
	bl ov00_022F9110
	mov r0, r5
	bl ov00_022FC214
	mov r2, r0
	ldr r1, _022FE1BC ; =ov00_0231AB90
	mov r0, r4
	bl ov00_022F9110
_022FE0A4:
	ldr r1, [r5, #0x2c]
	cmp r1, #0
	beq _022FE0BC
	mov r0, r4
	mov r2, #0
	bl ov00_022F8E9C
_022FE0BC:
	ldr r1, _022FE19C ; =ov00_0231AB3C
	mov r0, r4
	mov r2, #2
	bl ov00_022F8E9C
	ldr r0, [r5, #0x194]
	cmp r0, #0
	beq _022FE110
	ldr r1, [r4, #4]
	ldr r2, [r4, #0xc]
	add r0, r5, #0x54
	bl ov00_022F8F9C
	cmp r0, #0
	bne _022FE108
	mov r0, #1
	str r0, [r5, #0x120]
	mov r0, #0x11
	add sp, sp, #0x10
	str r0, [r5, #0x3c]
	ldmia sp!, {r3, r4, r5, pc}
_022FE108:
	mov r0, r4
	bl ov00_022F9284
_022FE110:
	mov r0, r5
	bl ov00_022F92A4
	cmp r0, #0
	addeq sp, sp, #0x10
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r1, [r5, #0x64]
	ldr r0, [r5, #0x60]
	cmp r1, r0
	addlt sp, sp, #0x10
	ldmltia sp!, {r3, r4, r5, pc}
	add r0, r5, #0x54
	bl ov00_022F9284
	ldr r0, [r5, #0x160]
	cmp r0, #0
	beq _022FE160
	ldr r0, [r5, #0x180]
	cmp r0, #0
	moveq r0, #6
	streq r0, [r5, #0x10]
	beq _022FE168
_022FE160:
	mov r0, #7
	str r0, [r5, #0x10]
_022FE168:
	mov r1, #0
	mov r0, r5
	mov r2, r1
	bl ov00_022F943C
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022FE180: .word ov00_0231AB08
_022FE184: .word ov00_0231AB10
_022FE188: .word ov00_0231AB18
_022FE18C: .word ov00_023289AC
_022FE190: .word ov00_0231AB20
_022FE194: .word ov00_0231AB2C
_022FE198: .word ov00_0231AB34
_022FE19C: .word ov00_0231AB3C
_022FE1A0: .word ov00_0231AB40
_022FE1A4: .word ov00_0231AB4C
_022FE1A8: .word ov00_0231AB5C
_022FE1AC: .word ov00_0231AB68
_022FE1B0: .word ov00_0231AB74
_022FE1B4: .word ov00_0231AB7C
_022FE1B8: .word ov00_0231AB80
_022FE1BC: .word ov00_0231AB90
	arm_func_end ov00_022FDEE8

	arm_func_start ov00_022FE1C0
ov00_022FE1C0: ; 0x022FE1C0
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #4
	mov r4, r0
	ldr r6, [r4, #0x16c]
	bl ov00_022FD5A0
	movs r5, r0
	bne _022FE23C
	mov r1, #0
	mov r0, r4
	str r1, [sp]
	bl ov00_022FC85C
	mov r2, #0
	ldr r0, [r4, #0x4c]
	add r1, sp, #0
	mov r3, r2
	bl ov00_022F51A4
	cmp r0, #1
	addne sp, sp, #4
	ldmneia sp!, {r3, r4, r5, r6, pc}
	ldr r0, [sp]
	cmp r0, #0
	addeq sp, sp, #4
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	mov r1, #0
	mov r3, #8
	mov r0, r4
	mov r2, r1
	str r3, [r4, #0x10]
	bl ov00_022F943C
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, pc}
_022FE23C:
	cmp r5, #3
	moveq r0, #0
	addeq sp, sp, #4
	streq r0, [r4, #0x17c]
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	ldr r0, [r4, #0x16c]
	cmp r6, r0
	beq _022FE264
	mov r0, r4
	bl ov00_022F948C
_022FE264:
	cmp r5, #1
	addne sp, sp, #4
	ldmneia sp!, {r3, r4, r5, r6, pc}
	mov r0, r4
	bl ov00_022FC85C
	mov r3, #1
	mov r1, #0
	str r3, [r4, #0x180]
	mov r3, #7
	mov r0, r4
	mov r2, r1
	str r3, [r4, #0x10]
	bl ov00_022F943C
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, pc}
	arm_func_end ov00_022FE1C0

	arm_func_start ov00_022FE2A0
ov00_022FE2A0: ; 0x022FE2A0
	stmdb sp!, {r4, lr}
	sub sp, sp, #8
	mov r4, r0
	ldr r0, [r4, #0x4c]
	add r1, sp, #4
	add r3, sp, #0
	mov r2, #0
	bl ov00_022F51A4
	mvn r1, #0
	cmp r0, r1
	beq _022FE2E0
	cmp r0, #1
	bne _022FE314
	ldr r1, [sp]
	cmp r1, #0
	beq _022FE314
_022FE2E0:
	mov r1, #1
	mov r2, #5
	str r1, [r4, #0x120]
	sub r1, r2, #6
	cmp r0, r1
	str r2, [r4, #0x3c]
	movne r0, #0
	bne _022FE308
	ldr r0, [r4, #0x4c]
	bl ov00_022F5194
_022FE308:
	add sp, sp, #8
	str r0, [r4, #0x50]
	ldmia sp!, {r4, pc}
_022FE314:
	cmp r0, #1
	addne sp, sp, #8
	ldmneia sp!, {r4, pc}
	ldr r0, [sp, #4]
	cmp r0, #0
	addeq sp, sp, #8
	ldmeqia sp!, {r4, pc}
	mov r1, #0
	mov r3, #8
	mov r0, r4
	mov r2, r1
	str r3, [r4, #0x10]
	bl ov00_022F943C
	add sp, sp, #8
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022FE2A0

	arm_func_start ov00_022FE350
ov00_022FE350: ; 0x022FE350
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #0x18
	add r2, sp, #0xc
	str r2, [sp]
	add r1, sp, #8
	str r1, [sp, #4]
	mov r4, r0
	ldr r0, [r4, #0xa0]
	ldr r1, _022FE444 ; =ov00_0231ABA0
	add r2, sp, #0x14
	add r3, sp, #0x10
	bl sub_02085338
	cmp r0, #3
	bne _022FE3A4
	ldr r6, [sp, #0x14]
	cmp r6, #1
	ldrge r0, [sp, #0xc]
	cmpge r0, #0x64
	blt _022FE3A4
	cmp r0, #0x258
	blt _022FE3C0
_022FE3A4:
	mov r0, #1
	str r0, [r4, #0x120]
	mov r0, #7
	str r0, [r4, #0x3c]
	add sp, sp, #0x18
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022FE3C0:
	mov r3, #0
	ldr lr, [sp, #8]
	mov ip, #1
	ldr r1, _022FE448 ; =_020AEDB0
	mov r2, r3
	b _022FE3E0
_022FE3D8:
	add lr, lr, #1
	str lr, [sp, #8]
_022FE3E0:
	ldr r0, [r4, #0xa0]
	ldrsb r0, [r0, lr]
	cmp r0, #0
	beq _022FE41C
	mov r5, ip
	blt _022FE400
	cmp r0, #0x80
	movlt r5, r3
_022FE400:
	cmp r5, #0
	movne r0, r2
	moveq r0, r0, lsl #1
	ldreqh r0, [r1, r0]
	andeq r0, r0, #0x100
	cmp r0, #0
	bne _022FE3D8
_022FE41C:
	str r6, [r4, #0x10c]
	ldr r1, [sp, #0x10]
	mov r0, #1
	str r1, [r4, #0x110]
	ldr r1, [sp, #0xc]
	str r1, [r4, #0x114]
	ldr r1, [sp, #8]
	str r1, [r4, #0x118]
	add sp, sp, #0x18
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022FE444: .word ov00_0231ABA0
_022FE448: .word _020AEDB0
	arm_func_end ov00_022FE350

	arm_func_start ov00_022FE44C
ov00_022FE44C: ; 0x022FE44C
	stmdb sp!, {r4, r5, lr}
	sub sp, sp, #4
	sub sp, sp, #0x400
	mov r3, #0x400
	add r1, sp, #4
	add r2, sp, #0
	mov r4, r0
	str r3, [sp]
	bl ov00_022F962C
	mov r5, r0
	cmp r5, #3
	cmpne r5, #1
	addeq sp, sp, #4
	addeq sp, sp, #0x400
	ldmeqia sp!, {r4, r5, pc}
	cmp r5, #0
	bne _022FE504
	ldr r0, [r4, #0x194]
	add r1, sp, #4
	cmp r0, #0
	beq _022FE4E8
	ldr r2, [sp]
	add r0, r4, #0xc0
	bl ov00_022F8E9C
	cmp r0, #0
	addeq sp, sp, #4
	addeq sp, sp, #0x400
	ldmeqia sp!, {r4, r5, pc}
	mov r0, r4
	bl ov00_022F94EC
	cmp r0, #0
	bne _022FE504
	mov r0, #1
	add sp, sp, #4
	str r0, [r4, #0x120]
	mov r0, #0x11
	add sp, sp, #0x400
	str r0, [r4, #0x3c]
	ldmia sp!, {r4, r5, pc}
_022FE4E8:
	ldr r2, [sp]
	add r0, r4, #0x9c
	bl ov00_022F8E9C
	cmp r0, #0
	addeq sp, sp, #4
	addeq sp, sp, #0x400
	ldmeqia sp!, {r4, r5, pc}
_022FE504:
	ldr r0, [r4, #0xa0]
	ldr r1, _022FE5F0 ; =ov00_0231AB3C
	bl strstr
	cmp r0, #0
	beq _022FE5B8
	mov r1, #0
	strb r1, [r0]
	ldr r1, [r4, #0xa0]
	sub r5, r0, r1
	mov r0, r4
	bl ov00_022FE350
	cmp r0, #0
	addeq sp, sp, #4
	addeq sp, sp, #0x400
	ldmeqia sp!, {r4, r5, pc}
	add r0, r5, #2
	str r0, [r4, #0x11c]
	ldr r0, [r4, #0x114]
	cmp r0, #0x64
	bne _022FE594
	ldr r0, [r4, #0x17c]
	cmp r0, #0
	beq _022FE594
	mov r1, #0
	add r0, r4, #0x9c
	str r1, [r4, #0x17c]
	bl ov00_022F9284
	mov r1, #0
	mov r3, #6
	mov r0, r4
	mov r2, r1
	str r3, [r4, #0x10]
	bl ov00_022F943C
	add sp, sp, #4
	add sp, sp, #0x400
	ldmia sp!, {r4, r5, pc}
_022FE594:
	mov r1, #0
	mov r3, #9
	mov r0, r4
	mov r2, r1
	str r3, [r4, #0x10]
	bl ov00_022F943C
	add sp, sp, #4
	add sp, sp, #0x400
	ldmia sp!, {r4, r5, pc}
_022FE5B8:
	cmp r5, #2
	addne sp, sp, #4
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, pc}
	mov r0, #1
	str r0, [r4, #0x120]
	mov r0, #7
	str r0, [r4, #0x3c]
	ldr r0, [r4, #0x4c]
	bl ov00_022F5194
	str r0, [r4, #0x50]
	add sp, sp, #4
	add sp, sp, #0x400
	ldmia sp!, {r4, r5, pc}
	.align 2, 0
_022FE5F0: .word ov00_0231AB3C
	arm_func_end ov00_022FE44C

	arm_func_start ov00_022FE5F4
ov00_022FE5F4: ; 0x022FE5F4
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r0, [r4, #0x124]
	mov ip, #0
	add r3, r0, r2
	str r3, [r4, #0x124]
	ldr r0, [r4, #0x128]
	mov lr, ip
	cmp r3, r0
	beq _022FE628
	ldr r0, [r4, #0x154]
	cmp r0, #0
	beq _022FE630
_022FE628:
	mov r0, #1
	str r0, [r4, #0x120]
_022FE630:
	ldr r0, [r4, #0xc]
	cmp r0, #0
	bne _022FE65C
	add r0, r4, #0xe4
	bl ov00_022F8E9C
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	ldr ip, [r4, #0xe8]
	ldr lr, [r4, #0xf0]
	b _022FE69C
_022FE65C:
	cmp r0, #1
	bne _022FE690
	cmp r2, #0
	beq _022FE684
	mov r0, #1
	str r0, [r4, #0x120]
	mov r0, #0xd
	str r0, [r4, #0x3c]
	mov r0, #0
	ldmia sp!, {r4, pc}
_022FE684:
	mov ip, r1
	mov lr, r2
	b _022FE69C
_022FE690:
	cmp r0, #2
	moveq ip, r1
	moveq lr, r2
_022FE69C:
	mov r0, r4
	mov r1, ip
	mov r2, lr
	bl ov00_022F943C
	mov r0, #1
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022FE5F4

	arm_func_start ov00_022FE6B4
ov00_022FE6B4: ; 0x022FE6B4
	stmdb sp!, {r3, lr}
	ldr r1, _022FE6D8 ; =ov00_0231ABB0
	add r2, sp, #0
	add r0, r0, #0x138
	bl sub_02085338
	cmp r0, #1
	mvnne r0, #0
	ldreq r0, [sp]
	ldmia sp!, {r3, pc}
	.align 2, 0
_022FE6D8: .word ov00_0231ABB0
	arm_func_end ov00_022FE6B4

	arm_func_start ov00_022FE6DC
ov00_022FE6DC: ; 0x022FE6DC
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	cmp r2, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r3, [r5, #0x144]
	cmp r3, #0xa
	ldmgeia sp!, {r3, r4, r5, pc}
	rsb r4, r3, #0xa
	cmp r4, r2
	movge r4, r2
	add r0, r5, #0x138
	mov r2, r4
	add r0, r0, r3
	bl memcpy
	ldr r0, [r5, #0x144]
	mov r1, #0
	add r0, r0, r4
	str r0, [r5, #0x144]
	add r0, r5, r0
	strb r1, [r0, #0x138]
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022FE6DC

	arm_func_start ov00_022FE730
ov00_022FE730: ; 0x022FE730
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov r6, r0
	ldr r3, [r6, #0x134]
	mov r5, r1
	mov r4, r2
	cmp r3, #0
	beq _022FE8B0
	cmp r4, #0
	ble _022FE8A8
	mov r8, #0
	mov fp, #1
	mov sb, #3
	mvn r7, #0
_022FE764:
	ldr r0, [r6, #0x14c]
	cmp r0, #0
	bne _022FE7F8
	mov r0, r5
	mov r1, #0xa
	bl strchr
	movs sl, r0
	beq _022FE7E0
	mov r0, r6
	mov r1, r5
	sub r2, sl, r5
	bl ov00_022FE6DC
	add r1, sl, #1
	sub r2, r1, r5
	mov r0, r6
	sub r4, r4, r2
	mov r5, r1
	bl ov00_022FE6B4
	str r0, [r6, #0x148]
	cmp r0, r7
	bne _022FE7D0
	mov r0, #1
	str r0, [r6, #0x120]
	mov r0, #7
	str r0, [r6, #0x3c]
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022FE7D0:
	cmp r0, #0
	streq sb, [r6, #0x14c]
	strne fp, [r6, #0x14c]
	b _022FE8A0
_022FE7E0:
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_022FE6DC
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022FE7F8:
	cmp r0, #1
	bne _022FE848
	ldr sl, [r6, #0x148]
	mov r0, r6
	cmp sl, r4
	movge sl, r4
	mov r1, r5
	mov r2, sl
	bl ov00_022FE5F4
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r6, #0x148]
	add r5, r5, sl
	subs r0, r0, sl
	str r0, [r6, #0x148]
	moveq r0, #2
	sub r4, r4, sl
	streq r0, [r6, #0x14c]
	b _022FE8A0
_022FE848:
	cmp r0, #2
	bne _022FE88C
	mov r0, r5
	mov r1, #0xa
	bl strchr
	cmp r0, #0
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	strb r8, [r6, #0x138]
	str r8, [r6, #0x144]
	add r0, r0, #1
	sub r1, r0, r5
	str r8, [r6, #0x148]
	mov r5, r0
	str r8, [r6, #0x14c]
	sub r4, r4, r1
	b _022FE8A0
_022FE88C:
	cmp r0, #3
	moveq r0, #1
	streq r0, [r6, #0x120]
	movne r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022FE8A0:
	cmp r4, #0
	bgt _022FE764
_022FE8A8:
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022FE8B0:
	bl ov00_022FE5F4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_022FE730

	arm_func_start ov00_022FE8B8
ov00_022FE8B8: ; 0x022FE8B8
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x18
	mov sl, r0
	mov r0, #0x1000
	mov r7, #1
	bl ov00_022F5AE4
	str r0, [sp, #4]
	cmp r0, #0
	bne _022FE8F0
	mov r0, r7
	str r0, [sl, #0x120]
	add sp, sp, #0x18
	str r0, [sl, #0x3c]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_022FE8F0:
	ldr r1, [sp, #4]
	mov r3, #0x1000
	add r2, sp, #8
	mov r0, sl
	str r3, [sp, #8]
	bl ov00_022F962C
	mov r6, r0
	cmp r6, #3
	cmpne r6, #1
	beq _022FEDA0
	cmp r6, #0
	bne _022FE980
	ldr r0, [sl, #0x194]
	cmp r0, #0
	beq _022FE968
	ldr r2, [sp, #8]
	ldr r1, [sp, #4]
	add r0, sl, #0xc0
	bl ov00_022F8E9C
	cmp r0, #0
	beq _022FEDA0
	mov r0, sl
	bl ov00_022F94EC
	cmp r0, #0
	bne _022FE980
	mov r0, r7
	str r0, [sl, #0x120]
	mov r0, #0x11
	str r0, [sl, #0x3c]
	b _022FEDA0
_022FE968:
	ldr r2, [sp, #8]
	ldr r1, [sp, #4]
	add r0, sl, #0x9c
	bl ov00_022F8E9C
	cmp r0, #0
	beq _022FEDA0
_022FE980:
	ldr r1, [sl, #0x114]
	ldr r2, _022FEDB0 ; =0x51EB851F
	mov r0, r1, lsr #0x1f
	smull r1, r3, r2, r1
	add r3, r0, r3, asr #5
	cmp r3, #1
	ldr r5, [sl, #0xa0]
	ldr r4, [sl, #0x11c]
	bne _022FE9E0
	ldr r1, _022FEDB4 ; =ov00_0231AB3C
	add r0, r5, r4
	mov r2, #2
	bl strncmp
	cmp r0, #0
	beq _022FE9D4
	ldr r1, _022FEDB8 ; =ov00_0231ABB4
	add r0, r5, r4
	mov r2, #2
	bl strncmp
	cmp r0, #0
	bne _022FE9E0
_022FE9D4:
	add r0, r5, r4
	mov r7, #0
	b _022FE9EC
_022FE9E0:
	ldr r1, _022FEDBC ; =ov00_0231ABB8
	add r0, r5, r4
	bl strstr
_022FE9EC:
	cmp r0, #0
	bne _022FEA00
	ldr r1, _022FEDB8 ; =ov00_0231ABB4
	add r0, r5, r4
	bl strstr
_022FEA00:
	cmp r0, #0
	beq _022FED7C
	cmp r7, #1
	addeq r0, r0, #2
	mov r1, #0
	strb r1, [r0]
	ldr r1, [sl, #0xa0]
	add r6, r0, #2
	sub r0, r0, r1
	ldr r7, [sl, #0xa8]
	add r0, r0, #1
	str r0, [sl, #0xa8]
	str r0, [sl, #0xac]
	ldr r2, [sl, #0x114]
	sub r1, r6, r1
	ldr r3, _022FEDB0 ; =0x51EB851F
	mov r0, r2, lsr #0x1f
	smull r2, r8, r3, r2
	add r8, r0, r8, asr #5
	cmp r8, #1
	sub r7, r7, r1
	bne _022FEAC4
	cmp r7, #0
	beq _022FEA78
	ldr r0, [sl, #0xa0]
	mov r1, r6
	add r2, r7, #1
	bl memmove
	str r7, [sl, #0xa8]
	b _022FEA80
_022FEA78:
	add r0, sl, #0x9c
	bl ov00_022F9284
_022FEA80:
	ldr r0, [sl, #0x17c]
	cmp r0, #0
	beq _022FEAA8
	mov r1, #0
	mov r0, sl
	mov r2, r1
	str r1, [sl, #0x17c]
	mov r3, #6
	str r3, [sl, #0x10]
	bl ov00_022F943C
_022FEAA8:
	mov r1, #0
	mov r3, #8
	mov r0, sl
	mov r2, r1
	str r3, [sl, #0x10]
	bl ov00_022F943C
	b _022FEDA0
_022FEAC4:
	cmp r8, #3
	bne _022FEC14
	ldr r0, [sl, #0x130]
	cmp r0, #0xa
	ble _022FEAEC
	mov r0, #1
	str r0, [sl, #0x120]
	mov r0, #0xb
	str r0, [sl, #0x3c]
	b _022FEDA0
_022FEAEC:
	ldr r1, _022FEDC0 ; =ov00_0231ABC0
	add r0, r5, r4
	bl strstr
	cmp r0, #0
	beq _022FEC14
	add r4, r0, #9
	ldr r1, _022FEDC4 ; =_020AEDB0
	mov r2, #0
	b _022FEB14
_022FEB10:
	add r4, r4, #1
_022FEB14:
	ldrsb r0, [r4]
	cmp r0, #0
	blt _022FEB28
	cmp r0, #0x80
	blt _022FEB30
_022FEB28:
	mov r0, r2
	b _022FEB3C
_022FEB30:
	mov r0, r0, lsl #1
	ldrh r0, [r1, r0]
	and r0, r0, #0x100
_022FEB3C:
	cmp r0, #0
	bne _022FEB10
	mov r3, r4
	ldr r1, _022FEDC4 ; =_020AEDB0
	mov r2, #0
	b _022FEB58
_022FEB54:
	add r3, r3, #1
_022FEB58:
	ldrsb r0, [r3]
	cmp r0, #0
	beq _022FEB8C
	blt _022FEB70
	cmp r0, #0x80
	blt _022FEB78
_022FEB70:
	mov r0, r2
	b _022FEB84
_022FEB78:
	mov r0, r0, lsl #1
	ldrh r0, [r1, r0]
	and r0, r0, #0x100
_022FEB84:
	cmp r0, #0
	beq _022FEB54
_022FEB8C:
	mov r0, #0
	strb r0, [r3]
	ldrsb r0, [r4]
	cmp r0, #0x2f
	bne _022FEBF0
	ldr r0, [sl, #0x18]
	bl strlen
	mov r5, r0
	mov r0, r4
	bl strlen
	add r1, r5, #0xe
	add r0, r1, r0
	bl ov00_022F5AE4
	str r0, [sl, #0x12c]
	cmp r0, #0
	moveq r0, #1
	streq r0, [sl, #0x120]
	streq r0, [sl, #0x3c]
	str r4, [sp]
	ldrh r3, [sl, #0x20]
	ldr r0, [sl, #0x12c]
	ldr r2, [sl, #0x18]
	ldr r1, _022FEDC8 ; =ov00_0231ABCC
	bl sub_020790DC
	b _022FEDA0
_022FEBF0:
	mov r0, r4
	bl ov00_022F5514
	str r0, [sl, #0x12c]
	cmp r0, #0
	bne _022FEDA0
	mov r0, #1
	str r0, [sl, #0x120]
	str r0, [sl, #0x3c]
	b _022FEDA0
_022FEC14:
	ldr r1, _022FEDCC ; =ov00_0231ABDC
	add r0, r5, r4
	bl strstr
	movs fp, r0
	beq _022FECEC
	ldr r8, _022FEDD0 ; =ov00_023184AC
	add r1, sp, #0xc
	mov r3, #5
_022FEC34:
	ldrb r2, [r8]
	ldrb r0, [r8, #1]
	add r8, r8, #2
	strb r2, [r1]
	strb r0, [r1, #1]
	add r1, r1, #2
	subs r3, r3, #1
	bne _022FEC34
	ldrb r2, [r8]
	add r8, fp, #0x10
	add r0, sp, #0xc
	mov sb, r8
	strb r2, [r1]
	bl strlen
	b _022FEC74
_022FEC70:
	add sb, sb, #1
_022FEC74:
	cmp sb, #0
	ldrnesb r1, [sb]
	cmpne r1, #0
	cmpne r1, #0xa
	cmpne r1, #0xd
	cmpne r1, #0x20
	bne _022FEC70
	sub r2, sb, r8
	cmp r2, r0
	ble _022FECB0
	mov r0, #1
	str r0, [sl, #0x120]
	mov r0, #0x10
	str r0, [sl, #0x3c]
	b _022FEDA0
_022FECB0:
	cmp r0, r2
	bne _022FECE0
	add r1, sp, #0xc
	mov r0, r8
	bl strncmp
	cmp r0, #0
	blt _022FECE0
	mov r0, #1
	str r0, [sl, #0x120]
	mov r0, #0x10
	str r0, [sl, #0x3c]
	b _022FEDA0
_022FECE0:
	mov r0, r8
	bl sub_0208B360
	str r0, [sl, #0x128]
_022FECEC:
	ldr r1, _022FEDD4 ; =ov00_0231ABEC
	add r0, r5, r4
	bl strstr
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	str r0, [sl, #0x134]
	cmp r0, #0
	beq _022FED24
	mov r0, #0
	strb r0, [sl, #0x138]
	str r0, [sl, #0x144]
	str r0, [sl, #0x148]
	str r0, [sl, #0x14c]
_022FED24:
	ldr r0, [sl, #0xc]
	sub r0, r0, #3
	cmp r0, #1
	movls r0, #1
	strls r0, [sl, #0x120]
	bls _022FEDA0
	mov r0, #0xa
	str r0, [sl, #0x10]
	cmp fp, #0
	beq _022FED60
	ldr r0, [sl, #0x128]
	cmp r0, #0
	moveq r0, #1
	streq r0, [sl, #0x120]
	beq _022FEDA0
_022FED60:
	cmp r7, #0
	ble _022FEDA0
	mov r0, sl
	mov r1, r6
	mov r2, r7
	bl ov00_022FE730
	b _022FEDA0
_022FED7C:
	cmp r6, #2
	bne _022FEDA0
	mov r0, #1
	str r0, [sl, #0x120]
	mov r0, #7
	str r0, [sl, #0x3c]
	ldr r0, [sl, #0x4c]
	bl ov00_022F5194
	str r0, [sl, #0x50]
_022FEDA0:
	ldr r0, [sp, #4]
	bl ov00_022F5B14
	add sp, sp, #0x18
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_022FEDB0: .word 0x51EB851F
_022FEDB4: .word ov00_0231AB3C
_022FEDB8: .word ov00_0231ABB4
_022FEDBC: .word ov00_0231ABB8
_022FEDC0: .word ov00_0231ABC0
_022FEDC4: .word _020AEDB0
_022FEDC8: .word ov00_0231ABCC
_022FEDCC: .word ov00_0231ABDC
_022FEDD0: .word ov00_023184AC
_022FEDD4: .word ov00_0231ABEC
	arm_func_end ov00_022FE8B8

	arm_func_start ov00_022FEDD8
ov00_022FEDD8: ; 0x022FEDD8
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov sb, r0
	bl ov00_022F5594
	mov r7, r0
	mov r0, #0x2000
	mov r8, #0
	bl ov00_022F5AE4
	movs r6, r0
	bne _022FEE0C
	mov r0, #1
	str r0, [sb, #0x120]
	str r0, [sb, #0x3c]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_022FEE0C:
	mov r5, #0x2000
	add r4, sp, #0
	b _022FEF04
_022FEE18:
	mov r0, sb
	mov r1, r6
	mov r2, r4
	str r5, [sp]
	bl ov00_022F962C
	cmp r0, #3
	cmpne r0, #1
	beq _022FEF1C
	cmp r0, #2
	bne _022FEE68
	mov r0, #1
	str r0, [sb, #0x120]
	ldr r1, [sb, #0x128]
	cmp r1, #0
	ble _022FEF1C
	ldr r0, [sb, #0x124]
	cmp r0, r1
	movlt r0, #0xf
	strlt r0, [sb, #0x3c]
	b _022FEF1C
_022FEE68:
	ldr r0, [sb, #0x194]
	cmp r0, #0
	beq _022FEEE4
	ldr r2, [sp]
	mov r1, r6
	add r0, sb, #0xc0
	bl ov00_022F8E9C
	cmp r0, #0
	beq _022FEF1C
	ldr r1, [sb, #0xac]
	mov r0, sb
	str r1, [sb, #0xa8]
	bl ov00_022F94EC
	cmp r0, #0
	bne _022FEEB8
	mov r0, #1
	str r0, [sb, #0x120]
	mov r0, #0x11
	str r0, [sb, #0x3c]
	b _022FEF1C
_022FEEB8:
	ldr r3, [sb, #0xac]
	ldr r0, [sb, #0xa8]
	subs r2, r0, r3
	beq _022FEEFC
	ldr r1, [sb, #0xa0]
	mov r0, sb
	add r1, r1, r3
	bl ov00_022FE730
	cmp r0, #0
	beq _022FEF1C
	b _022FEEFC
_022FEEE4:
	ldr r2, [sp]
	mov r0, sb
	mov r1, r6
	bl ov00_022FE730
	cmp r0, #0
	beq _022FEF1C
_022FEEFC:
	bl ov00_022F5594
	sub r8, r0, r7
_022FEF04:
	ldr r0, [sb, #0x120]
	cmp r0, #0
	bne _022FEF1C
	ldr r0, [sb, #0x184]
	cmp r8, r0
	blo _022FEE18
_022FEF1C:
	mov r0, r6
	bl ov00_022F5B14
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_022FEDD8

	arm_func_start ov00_022FEF28
ov00_022FEF28: ; 0x022FEF28
	stmdb sp!, {r3, lr}
	ldr ip, _022FEF54 ; =ov00_02328800
	ldr ip, [ip]
	cmp ip, #1
	movne r0, #2
	ldmneia sp!, {r3, pc}
	cmp r0, #0
	moveq r0, #2
	ldmeqia sp!, {r3, pc}
	bl ov00_022FFC5C
	ldmia sp!, {r3, pc}
	.align 2, 0
_022FEF54: .word ov00_02328800
	arm_func_end ov00_022FEF28

	arm_func_start ov00_022FEF58
ov00_022FEF58: ; 0x022FEF58
	stmdb sp!, {r3, lr}
	cmp r0, #0
	ldrne r1, [r0]
	cmpne r1, #0
	ldmeqia sp!, {r3, pc}
	bl ov00_022FFD88
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022FEF58

	arm_func_start ov00_022FEF74
ov00_022FEF74: ; 0x022FEF74
	stmdb sp!, {r3, lr}
	cmp r0, #0
	ldrne r1, [r0]
	cmpne r1, #0
	moveq r0, #2
	ldmeqia sp!, {r3, pc}
	ldr r1, [r1, #0x108]
	cmp r1, #0
	movne r0, #0
	ldmneia sp!, {r3, pc}
	mov r1, #0
	bl ov00_023003B4
	ldmia sp!, {r3, pc}
	arm_func_end ov00_022FEF74

	arm_func_start ov00_022FEFA8
ov00_022FEFA8: ; 0x022FEFA8
	stmdb sp!, {r3, lr}
	cmp r0, #0
	ldrne ip, [r0]
	cmpne ip, #0
	moveq r0, #2
	ldmeqia sp!, {r3, pc}
	cmp r1, #0
	blt _022FEFD0
	cmp r1, #9
	blt _022FEFE0
_022FEFD0:
	ldr r1, _022FEFF4 ; =ov00_0231AC08
	bl ov00_0230BCCC
	mov r0, #2
	ldmia sp!, {r3, pc}
_022FEFE0:
	add r0, ip, r1, lsl #3
	str r2, [r0, #0x1a8]
	str r3, [r0, #0x1ac]
	mov r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022FEFF4: .word ov00_0231AC08
	arm_func_end ov00_022FEFA8

	arm_func_start ov00_022FEFF8
ov00_022FEFF8: ; 0x022FEFF8
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #0x44
	movs lr, r0
	ldrne ip, [lr]
	cmpne ip, #0
	addeq sp, sp, #0x44
	moveq r0, #2
	ldmeqia sp!, {r3, r4, pc}
	cmp r1, #0
	ldrnesb r4, [r1]
	cmpne r4, #0
	addeq sp, sp, #0x44
	moveq r0, #2
	ldmeqia sp!, {r3, r4, pc}
	cmp r2, #0
	ldrnesb r4, [r2]
	cmpne r4, #0
	addeq sp, sp, #0x44
	moveq r0, #2
	ldmeqia sp!, {r3, r4, pc}
	ldr r4, [sp, #0x54]
	cmp r4, #0
	bne _022FF068
	ldr r1, _022FF0F4 ; =ov00_0231AC18
	bl ov00_0230BCCC
	add sp, sp, #0x44
	mov r0, #2
	ldmia sp!, {r3, r4, pc}
_022FF068:
	ldr ip, [ip, #0x108]
	cmp ip, #0
	beq _022FF0B0
	add r3, sp, #0x24
	mov r0, #0
	mov r2, r3
	mov r1, r0
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2, {r0, r1}
	ldr r2, [sp, #0x58]
	mov r0, lr
	mov r1, r3
	blx r4
	add sp, sp, #0x44
	mov r0, #0
	ldmia sp!, {r3, r4, pc}
_022FF0B0:
	ldr lr, _022FF0F8 ; =ov00_0231AC28
	mov ip, #0
	str lr, [sp]
	stmib sp, {r1, r2, ip}
	str r3, [sp, #0x10]
	str ip, [sp, #0x14]
	ldr r1, [sp, #0x50]
	ldr ip, [sp, #0x58]
	str r1, [sp, #0x18]
	str r4, [sp, #0x1c]
	mov r1, lr
	mov r2, lr
	mov r3, lr
	str ip, [sp, #0x20]
	bl ov00_02303664
	add sp, sp, #0x44
	ldmia sp!, {r3, r4, pc}
	.align 2, 0
_022FF0F4: .word ov00_0231AC18
_022FF0F8: .word ov00_0231AC28
	arm_func_end ov00_022FEFF8

	arm_func_start ov00_022FF0FC
ov00_022FF0FC: ; 0x022FF0FC
	stmdb sp!, {r4, lr}
	movs r4, r0
	ldrne r1, [r4]
	cmpne r1, #0
	ldmeqia sp!, {r4, pc}
	ldr r1, [r1, #0x108]
	cmp r1, #0
	ldmneia sp!, {r4, pc}
	mov r1, #1
	bl ov00_02304798
	mov r0, r4
	bl ov00_022FFE10
	ldmia sp!, {r4, pc}
	arm_func_end ov00_022FF0FC

	arm_func_start ov00_022FF130
ov00_022FF130: ; 0x022FF130
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #0x2c
	cmp r0, #0
	ldrne r4, [r0]
	cmpne r4, #0
	addeq sp, sp, #0x2c
	moveq r0, #2
	ldmeqia sp!, {r3, r4, pc}
	ldr ip, [sp, #0x48]
	cmp ip, #0
	bne _022FF170
	ldr r1, _022FF1F0 ; =ov00_0231AC18
	bl ov00_0230BCCC
	add sp, sp, #0x2c
	mov r0, #2
	ldmia sp!, {r3, r4, pc}
_022FF170:
	ldr r4, [r4, #0x108]
	cmp r4, #0
	beq _022FF1B0
	add r1, sp, #0x1c
	mov r4, #0
	ldr r2, [sp, #0x4c]
	ldr r3, _022FF1F4 ; =0x00000601
	str r4, [r1, #8]
	str r4, [r1]
	str r4, [r1, #4]
	str r4, [r1, #0xc]
	str r3, [sp, #0x24]
	blx ip
	add sp, sp, #0x2c
	mov r0, r4
	ldmia sp!, {r3, r4, pc}
_022FF1B0:
	ldr r4, [sp, #0x38]
	ldr lr, [sp, #0x3c]
	str r4, [sp]
	ldr r4, [sp, #0x40]
	str lr, [sp, #4]
	str r4, [sp, #8]
	mov r4, #0
	ldr lr, [sp, #0x44]
	str r4, [sp, #0xc]
	str lr, [sp, #0x10]
	ldr lr, [sp, #0x4c]
	str ip, [sp, #0x14]
	str lr, [sp, #0x18]
	bl ov00_0230915C
	add sp, sp, #0x2c
	ldmia sp!, {r3, r4, pc}
	.align 2, 0
_022FF1F0: .word ov00_0231AC18
_022FF1F4: .word 0x00000601
	arm_func_end ov00_022FF130

	arm_func_start ov00_022FF1F8
ov00_022FF1F8: ; 0x022FF1F8
	stmdb sp!, {r4, r5, lr}
	sub sp, sp, #0x20c
	movs r5, r0
	ldrne r4, [r5]
	cmpne r4, #0
	cmpne r1, #0
	addeq sp, sp, #0x20c
	moveq r0, #2
	ldmeqia sp!, {r4, r5, pc}
	ldr lr, [sp, #0x218]
	cmp lr, #0
	bne _022FF23C
	ldr r1, _022FF2CC ; =ov00_0231AC18
	bl ov00_0230BCCC
	add sp, sp, #0x20c
	mov r0, #2
	ldmia sp!, {r4, r5, pc}
_022FF23C:
	ldr ip, [r4, #0x108]
	cmp ip, #0
	beq _022FF294
	mov r0, #0
	add lr, sp, #8
	mov r1, r0
	mov r2, r0
	mov r3, r0
	mov ip, #0x10
_022FF260:
	stmia lr!, {r0, r1, r2, r3}
	stmia lr!, {r0, r1, r2, r3}
	subs ip, ip, #1
	bne _022FF260
	ldr r2, [sp, #0x21c]
	str r0, [lr]
	ldr r3, [sp, #0x218]
	add r1, sp, #8
	mov r0, r5
	blx r3
	add sp, sp, #0x20c
	mov r0, #0
	ldmia sp!, {r4, r5, pc}
_022FF294:
	ldr ip, [r4, #0x1f4]
	cmp ip, #4
	bne _022FF2B4
	ldr r1, _022FF2D0 ; =ov00_0231AC2C
	bl ov00_0230BCCC
	add sp, sp, #0x20c
	mov r0, #2
	ldmia sp!, {r4, r5, pc}
_022FF2B4:
	ldr ip, [sp, #0x21c]
	str lr, [sp]
	str ip, [sp, #4]
	bl ov00_023063A4
	add sp, sp, #0x20c
	ldmia sp!, {r4, r5, pc}
	.align 2, 0
_022FF2CC: .word ov00_0231AC18
_022FF2D0: .word ov00_0231AC2C
	arm_func_end ov00_022FF1F8

	arm_func_start ov00_022FF2D4
ov00_022FF2D4: ; 0x022FF2D4
	stmdb sp!, {r3, lr}
	cmp r0, #0
	ldrne ip, [r0]
	cmpne ip, #0
	moveq r0, #2
	ldmeqia sp!, {r3, pc}
	ldr r3, [ip, #0x108]
	cmp r3, #0
	movne r0, #0
	ldmneia sp!, {r3, pc}
	ldr r3, [ip, #0x1f4]
	cmp r3, #4
	bne _022FF318
	ldr r1, _022FF320 ; =ov00_0231AC2C
	bl ov00_0230BCCC
	mov r0, #2
	ldmia sp!, {r3, pc}
_022FF318:
	bl ov00_02305B24
	ldmia sp!, {r3, pc}
	.align 2, 0
_022FF320: .word ov00_0231AC2C
	arm_func_end ov00_022FF2D4

	arm_func_start ov00_022FF324
ov00_022FF324: ; 0x022FF324
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #4
	sub sp, sp, #0x400
	movs r6, r0
	ldrne r4, [r6]
	mov r5, r1
	cmpne r4, #0
	addeq sp, sp, #4
	addeq sp, sp, #0x400
	moveq r0, #2
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	ldr r1, [r4, #0x108]
	cmp r1, #0
	addne sp, sp, #4
	addne sp, sp, #0x400
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, r6, pc}
	ldr r1, [r4, #0x1f4]
	cmp r1, #4
	bne _022FF38C
	ldr r1, _022FF478 ; =ov00_0231AC2C
	bl ov00_0230BCCC
	add sp, sp, #4
	add sp, sp, #0x400
	mov r0, #2
	ldmia sp!, {r3, r4, r5, r6, pc}
_022FF38C:
	cmp r2, #0
	bne _022FF3AC
	ldr r1, _022FF47C ; =ov00_0231AC5C
	bl ov00_0230BCCC
	add sp, sp, #4
	add sp, sp, #0x400
	mov r0, #2
	ldmia sp!, {r3, r4, r5, r6, pc}
_022FF3AC:
	mov r1, r2
	ldr r2, _022FF480 ; =0x00000401
	add r0, sp, #0
	bl ov00_0230B930
	ldrsb r0, [sp]
	cmp r0, #0
	beq _022FF3E8
	add r2, sp, #0
	mov r1, #0x2f
_022FF3D0:
	ldrsb r0, [r2]
	cmp r0, #0x5c
	streqb r1, [r2]
	ldrsb r0, [r2, #1]!
	cmp r0, #0
	bne _022FF3D0
_022FF3E8:
	ldr r2, _022FF484 ; =ov00_0231AC6C
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	ldr r2, _022FF488 ; =ov00_0231AC78
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	ldr r2, [r4, #0x198]
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302668
	ldr r2, _022FF48C ; =ov00_0231AC84
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	mov r2, r5
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302668
	ldr r2, _022FF490 ; =ov00_0231AC94
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	mov r0, r6
	add r1, r4, #0x210
	add r2, sp, #0
	bl ov00_02302638
	ldr r2, _022FF494 ; =ov00_0231ACA0
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	mov r0, #0
	add sp, sp, #4
	add sp, sp, #0x400
	ldmia sp!, {r3, r4, r5, r6, pc}
	.align 2, 0
_022FF478: .word ov00_0231AC2C
_022FF47C: .word ov00_0231AC5C
_022FF480: .word 0x00000401
_022FF484: .word ov00_0231AC6C
_022FF488: .word ov00_0231AC78
_022FF48C: .word ov00_0231AC84
_022FF490: .word ov00_0231AC94
_022FF494: .word ov00_0231ACA0
	arm_func_end ov00_022FF324

	arm_func_start ov00_022FF498
ov00_022FF498: ; 0x022FF498
	stmdb sp!, {r3, lr}
	cmp r0, #0
	ldrne r3, [r0]
	cmpne r3, #0
	moveq r0, #2
	ldmeqia sp!, {r3, pc}
	ldr r2, [r3, #0x108]
	cmp r2, #0
	movne r0, #0
	ldmneia sp!, {r3, pc}
	ldr r2, [r3, #0x1f4]
	cmp r2, #4
	bne _022FF4DC
	ldr r1, _022FF4E4 ; =ov00_0231AC2C
	bl ov00_0230BCCC
	mov r0, #2
	ldmia sp!, {r3, pc}
_022FF4DC:
	bl ov00_023021A0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022FF4E4: .word ov00_0231AC2C
	arm_func_end ov00_022FF498

	arm_func_start ov00_022FF4E8
ov00_022FF4E8: ; 0x022FF4E8
	stmdb sp!, {r3, r4, r5, lr}
	movs r4, r0
	ldrne r5, [r4]
	cmpne r5, #0
	moveq r0, #2
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r2, [r5, #0x108]
	cmp r2, #0
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r2, [r5, #0x1f4]
	cmp r2, #4
	bne _022FF52C
	ldr r1, _022FF5A4 ; =ov00_0231AC2C
	bl ov00_0230BCCC
	mov r0, #2
	ldmia sp!, {r3, r4, r5, pc}
_022FF52C:
	add r2, sp, #0
	bl ov00_02308A4C
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r1, [sp]
	ldr r0, [r1, #0x18]
	sub r0, r0, #1
	str r0, [r1, #0x18]
	ldr r0, [r5, #0x100]
	cmp r0, #0
	bne _022FF59C
	ldr r1, [sp]
	ldr r0, [r1, #0x18]
	cmp r0, #0
	bgt _022FF59C
	ldr r0, [r1, #0x14]
	bl ov00_022F5B14
	ldr r0, [sp]
	mov r1, #0
	str r1, [r0, #0x14]
	ldr r0, [sp]
	bl ov00_02308E00
	cmp r0, #0
	beq _022FF59C
	ldr r1, [sp]
	mov r0, r4
	bl ov00_02308BCC
_022FF59C:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_022FF5A4: .word ov00_0231AC2C
	arm_func_end ov00_022FF4E8

	arm_func_start ov00_022FF5A8
ov00_022FF5A8: ; 0x022FF5A8
	cmp r0, #0
	ldrne r2, [r0]
	cmpne r2, #0
	moveq r0, #2
	bxeq lr
	ldr r0, [r2, #0x108]
	cmp r0, #0
	mov r0, #0
	strne r0, [r1]
	ldreq r2, [r2, #0x5d0]
	streq r2, [r1]
	bx lr
	arm_func_end ov00_022FF5A8

	arm_func_start ov00_022FF5D8
ov00_022FF5D8: ; 0x022FF5D8
	stmdb sp!, {r4, r5, r6, lr}
	movs r6, r0
	ldrne r3, [r6]
	mov r5, r2
	cmpne r3, #0
	moveq r0, #2
	ldmeqia sp!, {r4, r5, r6, pc}
	ldr r2, [r3, #0x108]
	cmp r2, #0
	beq _022FF618
	mov r0, r5
	mov r1, #0
	mov r2, #0x214
	bl memset
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_022FF618:
	cmp r5, #0
	bne _022FF630
	ldr r1, _022FF760 ; =ov00_0231ACA8
	bl ov00_0230BCCC
	mov r0, #2
	ldmia sp!, {r4, r5, r6, pc}
_022FF630:
	cmp r1, #0
	ldr r2, [r3, #0x5d0]
	blt _022FF644
	cmp r1, r2
	blt _022FF658
_022FF644:
	ldr r1, _022FF764 ; =ov00_0231ACB8
	mov r0, r6
	bl ov00_0230BCCC
	mov r0, #2
	ldmia sp!, {r4, r5, r6, pc}
_022FF658:
	bl ov00_02308D38
	movs r4, r0
	bne _022FF678
	ldr r1, _022FF764 ; =ov00_0231ACB8
	mov r0, r6
	bl ov00_0230BCCC
	mov r0, #2
	ldmia sp!, {r4, r5, r6, pc}
_022FF678:
	ldr r0, [r4, #0xc]
	cmp r0, #0
	beq _022FF6D8
	ldr r0, [r0, #4]
	cmp r0, #0
	bne _022FF6D8
	ldr r1, [r4]
	mov r0, #0
	str r1, [r5]
	ldr r1, [r4, #0xc]
	ldr r1, [r1, #4]
	str r1, [r5, #4]
	strb r0, [r5, #8]
	strb r0, [r5, #0x108]
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0x1c]
	str r0, [r5, #0x208]
	ldr r0, [r4, #0xc]
	ldrh r0, [r0, #0x20]
	str r0, [r5, #0x20c]
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0x30]
	str r0, [r5, #0x210]
	b _022FF758
_022FF6D8:
	ldr r0, [r4]
	str r0, [r5]
	ldr r0, [r4, #8]
	ldr r0, [r0, #4]
	str r0, [r5, #4]
	ldr r0, [r4, #8]
	ldr r1, [r0, #8]
	cmp r1, #0
	moveq r0, #0
	streqb r0, [r5, #8]
	beq _022FF710
	add r0, r5, #8
	mov r2, #0x100
	bl ov00_0230B930
_022FF710:
	ldr r0, [r4, #8]
	ldr r1, [r0, #0xc]
	cmp r1, #0
	moveq r0, #0
	streqb r0, [r5, #0x108]
	beq _022FF734
	add r0, r5, #0x108
	mov r2, #0x100
	bl ov00_0230B930
_022FF734:
	ldr r0, [r4, #8]
	ldr r0, [r0, #0x10]
	str r0, [r5, #0x208]
	ldr r0, [r4, #8]
	ldrh r0, [r0, #0x14]
	str r0, [r5, #0x20c]
	ldr r0, [r4, #8]
	ldr r0, [r0, #0x18]
	str r0, [r5, #0x210]
_022FF758:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_022FF760: .word ov00_0231ACA8
_022FF764: .word ov00_0231ACB8
	arm_func_end ov00_022FF5D8

	arm_func_start ov00_022FF768
ov00_022FF768: ; 0x022FF768
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #4
	movs r6, r0
	mov r4, r2
	ldrne r2, [r6]
	mov r5, r1
	cmpne r2, #0
	addeq sp, sp, #4
	moveq r0, #2
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	ldr r2, [r2, #0x108]
	cmp r2, #0
	movne r0, #0
	addne sp, sp, #4
	strne r0, [r4]
	ldmneia sp!, {r3, r4, r5, r6, pc}
	add r2, sp, #0
	bl ov00_02308A4C
	cmp r0, #0
	ldrne r0, [sp]
	ldrne r0, [r0, #8]
	cmpne r0, #0
	ldrne r0, [r0]
	strne r0, [r4]
	bne _022FF7FC
	add r2, sp, #0
	mov r0, r6
	mov r1, r5
	bl ov00_02308A4C
	cmp r0, #0
	ldrne r0, [sp]
	ldrne r0, [r0, #0xc]
	cmpne r0, #0
	ldrne r0, [r0]
	strne r0, [r4]
	mvneq r0, #0
	streq r0, [r4]
_022FF7FC:
	mov r0, #0
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, pc}
	arm_func_end ov00_022FF768

	arm_func_start ov00_022FF808
ov00_022FF808: ; 0x022FF808
	stmdb sp!, {r3, r4, r5, lr}
	movs r5, r0
	ldrne r2, [r5]
	mov r4, r1
	cmpne r2, #0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r2, [r2, #0x108]
	cmp r2, #0
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	add r2, sp, #0
	bl ov00_02308A4C
	cmp r0, #0
	ldrne r0, [sp]
	ldrne r0, [r0, #8]
	cmpne r0, #0
	movne r0, #1
	ldmneia sp!, {r3, r4, r5, pc}
	add r2, sp, #0
	mov r0, r5
	mov r1, r4
	bl ov00_02308A4C
	cmp r0, #0
	ldrne r0, [sp]
	ldrne r0, [r0, #0xc]
	cmpne r0, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022FF808

	arm_func_start ov00_022FF880
ov00_022FF880: ; 0x022FF880
	stmdb sp!, {r3, lr}
	cmp r0, #0
	ldrne r3, [r0]
	cmpne r3, #0
	moveq r0, #2
	ldmeqia sp!, {r3, pc}
	ldr r2, [r3, #0x108]
	cmp r2, #0
	movne r0, #0
	ldmneia sp!, {r3, pc}
	ldr r2, [r3, #0x1f4]
	cmp r2, #4
	bne _022FF8C4
	ldr r1, _022FF8D8 ; =ov00_0231AC2C
	bl ov00_0230BCCC
	mov r0, #2
	ldmia sp!, {r3, pc}
_022FF8C4:
	mov r2, #1
	bl ov00_023022B0
	cmp r0, #0
	moveq r0, #0
	ldmia sp!, {r3, pc}
	.align 2, 0
_022FF8D8: .word ov00_0231AC2C
	arm_func_end ov00_022FF880

	arm_func_start ov00_022FF8DC
ov00_022FF8DC: ; 0x022FF8DC
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x200
	movs r7, r0
	ldrne r4, [r7]
	mov r6, r1
	cmpne r4, #0
	mov r5, r3
	addeq sp, sp, #0x200
	moveq r0, #2
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, [r4, #0x108]
	cmp r1, #0
	addne sp, sp, #0x200
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, [r4, #0x1f4]
	cmp r1, #4
	bne _022FF938
	ldr r1, _022FFAF0 ; =ov00_0231AC2C
	bl ov00_0230BCCC
	add sp, sp, #0x200
	mov r0, #2
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022FF938:
	cmp r2, #0
	bne _022FF954
	ldr r1, _022FFAF4 ; =ov00_0231ACC8
	bl ov00_0230BCCC
	add sp, sp, #0x200
	mov r0, #2
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022FF954:
	cmp r5, #0
	bne _022FF970
	ldr r1, _022FFAF8 ; =ov00_0231ACE0
	bl ov00_0230BCCC
	add sp, sp, #0x200
	mov r0, #2
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022FF970:
	mov r1, r2
	add r0, sp, #0x100
	mov r2, #0x100
	bl ov00_0230B930
	add r0, sp, #0x100
	ldrsb r0, [r0]
	cmp r0, #0
	beq _022FF9B0
	add r2, sp, #0x100
	mov r1, #0x2f
_022FF998:
	ldrsb r0, [r2]
	cmp r0, #0x5c
	streqb r1, [r2]
	ldrsb r0, [r2, #1]!
	cmp r0, #0
	bne _022FF998
_022FF9B0:
	add r0, sp, #0
	mov r1, r5
	mov r2, #0x100
	bl ov00_0230B930
	ldrsb r0, [sp]
	cmp r0, #0
	beq _022FF9EC
	add r2, sp, #0
	mov r1, #0x2f
_022FF9D4:
	ldrsb r0, [r2]
	cmp r0, #0x5c
	streqb r1, [r2]
	ldrsb r0, [r2, #1]!
	cmp r0, #0
	bne _022FF9D4
_022FF9EC:
	ldr r0, [r4, #0x23c]
	cmp r6, r0
	bne _022FFA2C
	add r0, sp, #0x100
	add r1, r4, #0x3b8
	bl strcmp
	cmp r0, #0
	bne _022FFA2C
	add r1, r4, #0xb8
	add r0, sp, #0
	add r1, r1, #0x400
	bl strcmp
	cmp r0, #0
	addeq sp, sp, #0x200
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
_022FFA2C:
	add r1, sp, #0x100
	add r0, r4, #0x3b8
	mov r2, #0x100
	str r6, [r4, #0x23c]
	bl ov00_0230B930
	add r0, r4, #0xb8
	add r1, sp, #0
	add r0, r0, #0x400
	mov r2, #0x100
	bl ov00_0230B930
	ldr r2, _022FFAFC ; =ov00_0231ACF8
	mov r0, r7
	add r1, r4, #0x210
	bl ov00_02302638
	mov r0, r7
	mov r2, r6
	add r1, r4, #0x210
	bl ov00_02302668
	ldr r2, _022FFB00 ; =ov00_0231AC78
	mov r0, r7
	add r1, r4, #0x210
	bl ov00_02302638
	ldr r2, [r4, #0x198]
	mov r0, r7
	add r1, r4, #0x210
	bl ov00_02302668
	ldr r2, _022FFB04 ; =ov00_0231AD04
	mov r0, r7
	add r1, r4, #0x210
	bl ov00_02302638
	mov r0, r7
	add r1, r4, #0x210
	add r2, sp, #0x100
	bl ov00_02302638
	ldr r2, _022FFB08 ; =ov00_0231AD14
	mov r0, r7
	add r1, r4, #0x210
	bl ov00_02302638
	mov r0, r7
	add r1, r4, #0x210
	add r2, sp, #0
	bl ov00_02302638
	ldr r2, _022FFB0C ; =ov00_0231ACA0
	mov r0, r7
	add r1, r4, #0x210
	bl ov00_02302638
	mov r0, #0
	add sp, sp, #0x200
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022FFAF0: .word ov00_0231AC2C
_022FFAF4: .word ov00_0231ACC8
_022FFAF8: .word ov00_0231ACE0
_022FFAFC: .word ov00_0231ACF8
_022FFB00: .word ov00_0231AC78
_022FFB04: .word ov00_0231AD04
_022FFB08: .word ov00_0231AD14
_022FFB0C: .word ov00_0231ACA0
	arm_func_end ov00_022FF8DC

	arm_func_start ov00_022FFB10
ov00_022FFB10: ; 0x022FFB10
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	cmp r0, #0
	ldrne ip, [r0]
	mov r3, r2
	cmpne ip, #0
	addeq sp, sp, #8
	moveq r0, #2
	ldmeqia sp!, {r3, pc}
	ldr r2, [ip, #0x108]
	cmp r2, #0
	addne sp, sp, #8
	movne r0, #0
	ldmneia sp!, {r3, pc}
	ldr r2, [ip, #0x1f4]
	cmp r2, #4
	bne _022FFB68
	ldr r1, _022FFBA0 ; =ov00_0231AC2C
	bl ov00_0230BCCC
	add sp, sp, #8
	mov r0, #2
	ldmia sp!, {r3, pc}
_022FFB68:
	cmp r3, #0
	bne _022FFB84
	ldr r1, _022FFBA4 ; =ov00_0231AD20
	bl ov00_0230BCCC
	add sp, sp, #8
	mov r0, #2
	ldmia sp!, {r3, pc}
_022FFB84:
	mov ip, #0
	str ip, [sp]
	mov r2, #1
	str ip, [sp, #4]
	bl ov00_02301B2C
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	.align 2, 0
_022FFBA0: .word ov00_0231AC2C
_022FFBA4: .word ov00_0231AD20
	arm_func_end ov00_022FFB10

	arm_func_start ov00_022FFBA8
ov00_022FFBA8: ; 0x022FFBA8
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #0x14
	cmp r0, #0
	ldrne r4, [r0]
	cmpne r4, #0
	addeq sp, sp, #0x14
	moveq r0, #2
	ldmeqia sp!, {r3, r4, pc}
	ldr lr, [sp, #0x20]
	cmp lr, #0
	bne _022FFBE8
	ldr r1, _022FFC54 ; =ov00_0231AC18
	bl ov00_0230BCCC
	add sp, sp, #0x14
	mov r0, #2
	ldmia sp!, {r3, r4, pc}
_022FFBE8:
	ldr ip, [r4, #0x1f4]
	cmp ip, #4
	bne _022FFC08
	ldr r1, _022FFC58 ; =ov00_0231AC2C
	bl ov00_0230BCCC
	add sp, sp, #0x14
	mov r0, #2
	ldmia sp!, {r3, r4, pc}
_022FFC08:
	ldr ip, [r4, #0x108]
	cmp ip, #0
	beq _022FFC3C
	ldr r2, [sp, #0x24]
	add r1, sp, #8
	mov r3, #0
	str r3, [r1]
	str r3, [r1, #4]
	str r3, [r1, #8]
	blx lr
	add sp, sp, #0x14
	mov r0, #0
	ldmia sp!, {r3, r4, pc}
_022FFC3C:
	ldr ip, [sp, #0x24]
	str lr, [sp]
	str ip, [sp, #4]
	bl ov00_02309348
	add sp, sp, #0x14
	ldmia sp!, {r3, r4, pc}
	.align 2, 0
_022FFC54: .word ov00_0231AC18
_022FFC58: .word ov00_0231AC2C
	arm_func_end ov00_022FFBA8

	arm_func_start ov00_022FFC5C
ov00_022FFC5C: ; 0x022FFC5C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r4, #0
	str r4, [r7]
	ldr r0, _022FFD84 ; =0x00000634
	mov r6, r1
	mov r5, r2
	mov r4, r3
	bl ov00_022F5AE4
	str r0, [sp]
	cmp r0, #0
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r2, _022FFD84 ; =0x00000634
	mov r1, #0
	bl memset
	ldr r0, [sp]
	mov r3, #0
	strb r3, [r0]
	ldr r0, [sp]
	mov r2, #1
	str r3, [r0, #0x5b8]
	ldr r1, [sp]
	add r0, sp, #0
	str r2, [r1, #0x100]
	ldr r1, [sp]
	str r3, [r1, #0x104]
	ldr r1, [sp]
	str r3, [r1, #0x108]
	ldr r1, [sp]
	str r3, [r1, #0x10c]
	ldr r1, [sp]
	str r6, [r1, #0x608]
	ldr r1, [sp]
	str r5, [r1, #0x60c]
	ldr r1, [sp]
	str r4, [r1, #0x1a4]
	bl ov00_023087E4
	cmp r0, #0
	bne _022FFD14
	ldr r0, [sp]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [sp]
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022FFD14:
	ldr r0, [sp]
	mov r2, #0
	str r2, [r0, #0x5c0]
	mov r1, r2
_022FFD24:
	ldr r0, [sp]
	add r0, r0, r2, lsl #3
	str r1, [r0, #0x1a8]
	ldr r0, [sp]
	add r0, r0, r2, lsl #3
	add r2, r2, #1
	str r1, [r0, #0x1ac]
	cmp r2, #9
	blt _022FFD24
	add r0, sp, #0
	bl ov00_022FFE10
	movs r4, r0
	beq _022FFD68
	add r0, sp, #0
	bl ov00_022FFD88
	mov r0, r4
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_022FFD68:
	bl ov00_022F558C
	bl ov00_022F5594
	bl sub_020895E4
	ldr r1, [sp]
	mov r0, #0
	str r1, [r7]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_022FFD84: .word 0x00000634
	arm_func_end ov00_022FFC5C

	arm_func_start ov00_022FFD88
ov00_022FFD88: ; 0x022FFD88
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r1, #1
	ldr r4, [r5]
	bl ov00_02304798
	bl ov00_022F840C
	cmp r0, #0
	beq _022FFDCC
	add r0, r4, #0x220
	bl ov00_022F8B1C
	bl ov00_022F8BC4
	cmp r0, #0
	beq _022FFDCC
	bl ov00_022F8BF4
	cmp r0, #0
	beq _022FFDCC
	bl ov00_022F89B0
_022FFDCC:
	mov r0, r5
	bl ov00_02306760
	ldr r0, [r4, #0x5c8]
	bl ov00_022F4C38
	mov r0, r4
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r5]
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_022FFD88

	arm_func_start ov00_022FFDF0
ov00_022FFDF0: ; 0x022FFDF0
	mov r0, #0
	str r0, [r1, #8]
	str r0, [r1, #0xc]
	str r0, [r1, #0x14]
	str r0, [r1, #0x18]
	str r0, [r1, #0x1c]
	mov r0, #1
	bx lr
	arm_func_end ov00_022FFDF0

	arm_func_start ov00_022FFE10
ov00_022FFE10: ; 0x022FFE10
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r0
	ldr r0, [r4]
	mov r2, #0
	str r0, [sp]
	strb r2, [r0, #0x110]
	ldr r0, [sp]
	sub r1, r2, #1
	strb r2, [r0, #0x12f]
	ldr r0, [sp]
	strb r2, [r0, #0x144]
	ldr r0, [sp]
	str r1, [r0, #0x1f0]
	ldr r0, [sp]
	str r2, [r0, #0x1f4]
	ldr r0, [sp]
	str r2, [r0, #0x200]
	ldr r0, [sp]
	str r2, [r0, #0x204]
	ldr r0, [sp]
	str r2, [r0, #0x1fc]
	ldr r0, [sp]
	ldr r0, [r0, #0x1f8]
	bl ov00_022F5B14
	ldr r0, [sp]
	mov r1, #0
	str r1, [r0, #0x1f8]
	ldr r0, [sp]
	str r1, [r0, #0x1f8]
	ldr r0, [sp]
	str r1, [r0, #0x20c]
	ldr r0, [sp]
	ldr r0, [r0, #0x208]
	bl ov00_022F5B14
	ldr r0, [sp]
	mov r1, #0
	str r1, [r0, #0x208]
	ldr r0, [sp]
	str r1, [r0, #0x208]
	ldr r0, [sp]
	str r1, [r0, #0x218]
	ldr r0, [sp]
	str r1, [r0, #0x21c]
	ldr r0, [sp]
	str r1, [r0, #0x214]
	ldr r0, [sp]
	ldr r0, [r0, #0x210]
	bl ov00_022F5B14
	ldr r0, [sp]
	mov r1, #0
	str r1, [r0, #0x210]
	ldr r0, [sp]
	str r1, [r0, #0x210]
	ldr r0, [sp]
	str r1, [r0, #0x5e8]
	ldr r0, [sp]
	str r1, [r0, #0x5ec]
	ldr r0, [sp]
	str r1, [r0, #0x5e4]
	ldr r0, [sp]
	ldr r0, [r0, #0x5e0]
	bl ov00_022F5B14
	ldr r0, [sp]
	mov r1, #0
	str r1, [r0, #0x5e0]
	ldr r0, [sp]
	str r1, [r0, #0x5e0]
	ldr r0, [sp]
	str r1, [r0, #0x5f8]
	ldr r0, [sp]
	str r1, [r0, #0x5fc]
	ldr r0, [sp]
	str r1, [r0, #0x5f4]
	ldr r0, [sp]
	ldr r0, [r0, #0x5f0]
	bl ov00_022F5B14
	ldr r0, [sp]
	mov r2, #0
	str r2, [r0, #0x5f0]
	ldr r1, [sp]
	mov r0, r4
	str r2, [r1, #0x5f0]
	bl ov00_02306760
	add r0, sp, #0
	bl ov00_02306718
	movs r5, r0
	beq _022FFF7C
	add r0, sp, #0
	bl ov00_022FFD88
	mov r0, r5
	ldmia sp!, {r3, r4, r5, pc}
_022FFF7C:
	ldr r0, [sp]
	mov r1, #2
	str r1, [r0, #0x234]
	ldr r0, [sp]
	ldr r1, [r0, #0x5c4]
	cmp r1, #0
	beq _022FFFB0
_022FFF98:
	mov r0, r4
	bl ov00_0230716C
	ldr r0, [sp]
	ldr r1, [r0, #0x5c4]
	cmp r1, #0
	bne _022FFF98
_022FFFB0:
	mov r2, #0
	str r2, [r0, #0x5c4]
	ldr r3, [sp]
	ldr r1, _02300028 ; =ov00_022FFDF0
	mov r0, r4
	str r2, [r3, #0x5d0]
	bl ov00_02308CA8
	mov r0, #0
	ldr r1, [sp]
	sub r2, r0, #1
	str r0, [r1, #0x19c]
	ldr r1, [sp]
	str r0, [r1, #0x1a0]
	ldr r1, [sp]
	str r0, [r1, #0x198]
	ldr r1, [sp]
	str r0, [r1, #0x238]
	ldr r1, [sp]
	str r0, [r1, #0x5bc]
	ldr r1, [sp]
	str r0, [r1, #0x5d4]
	ldr r1, [sp]
	str r2, [r1, #0x23c]
	ldr r1, [sp]
	strb r0, [r1, #0x3b8]
	ldr r1, [sp]
	strb r0, [r1, #0x4b8]
	ldr r1, [sp]
	str r0, [r1, #0x630]
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_02300028: .word ov00_022FFDF0
	arm_func_end ov00_022FFE10

	arm_func_start ov00_0230002C
ov00_0230002C: ; 0x0230002C
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x14
	mov r1, #0
	mov r4, r0
	str r1, [sp, #8]
	ldr r8, [r4]
	bl ov00_022F5594
	mov sb, r0
_0230004C:
	mov r0, r4
	add r1, r8, #0x210
	bl ov00_023054EC
	ldr r0, [r8, #0x218]
	mov r1, #1
	cmp r0, #0
	strgt sb, [r8, #0x630]
	ldr r0, _02300384 ; =ov00_0231AD34
	str r1, [sp]
	str r0, [sp, #4]
	ldr r1, [r8, #0x1f0]
	add r3, sp, #8
	mov r0, r4
	add r2, r8, #0x210
	bl ov00_02302A04
	cmp r0, #0
	addne sp, sp, #0x14
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r1, sp, #8
	ldr r0, _02300384 ; =ov00_0231AD34
	str r1, [sp]
	str r0, [sp, #4]
	ldr r1, [r8, #0x1f0]
	add r3, sp, #0xc
	mov r0, r4
	add r2, r8, #0x1f8
	bl ov00_023028B4
	cmp r0, #0
	beq _023000F8
	cmp r0, #3
	addne sp, sp, #0x14
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r2, _02300388 ; =ov00_0231AD38
	mov r0, r4
	mov r1, #5
	bl ov00_0230BCA8
	mov r0, r4
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x14
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023000F8:
	ldr r0, [r8, #0x1f8]
	ldr r1, _0230038C ; =ov00_0231AD64
	bl strstr
	movs sl, r0
	beq ov00_023002F0
	ldr fp, _02300390 ; =ov00_0231AD7C
	ldr r5, _02300394 ; =ov00_0231AD94
	mov r6, #0x800
	mov r7, #0
_0230011C:
	str sb, [r8, #0x630]
	strb r7, [sl]
	ldr r0, [r8, #0x1f8]
	sub r1, sl, r0
	str r1, [sp, #0xc]
	ldr r0, [r8, #0x20c]
	cmp r1, r0
	ble _02300180
	ldr r0, [r8, #0x20c]
	cmp r1, #0x800
	movlt r1, r6
	add r0, r0, r1
	str r0, [r8, #0x20c]
	add r1, r0, #1
	ldr r0, [r8, #0x208]
	bl ov00_022F5AFC
	cmp r0, #0
	bne _0230017C
	ldr r1, _02300398 ; =ov00_0231AD6C
	mov r0, r4
	bl ov00_0230BCCC
	add sp, sp, #0x14
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230017C:
	str r0, [r8, #0x208]
_02300180:
	ldr r2, [sp, #0xc]
	ldr r0, [r8, #0x208]
	ldr r1, [r8, #0x1f8]
	add r2, r2, #1
	bl memcpy
	ldr r0, [r8, #0x1f8]
	add r1, sl, #7
	ldr r2, [r8, #0x200]
	sub r0, r1, r0
	sub r0, r2, r0
	str r0, [r8, #0x200]
	add r2, r0, #1
	ldr r0, [r8, #0x1f8]
	bl memmove
	ldr sl, [r8, #0x208]
	mov r1, fp
	mov r0, sl
	bl strstr
	cmp r0, #0
	beq _02300210
	add r0, r0, #4
	bl sub_0208B360
	mov r2, r0
	mov r0, r4
	add r1, sp, #0x10
	bl ov00_023071BC
	cmp r0, #0
	beq _023002DC
	mov r0, r4
	ldr r1, [sp, #0x10]
	ldr r2, [r8, #0x208]
	bl ov00_02307244
	cmp r0, #0
	beq _023002DC
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300210:
	mov r1, sl
	mov r0, r4
	mov r2, #1
	bl ov00_0230B950
	cmp r0, #0
	addne sp, sp, #0x14
	movne r0, #4
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr sl, [r8, #0x208]
	ldr r1, _0230039C ; =ov00_0231AD84
	mov r0, sl
	mov r2, #4
	bl strncmp
	cmp r0, #0
	bne _02300268
	mov r1, sl
	mov r0, r4
	bl ov00_023005CC
	cmp r0, #0
	beq _023002DC
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300268:
	ldr r1, _023003A0 ; =ov00_0231AD8C
	mov r0, sl
	mov r2, #4
	bl strncmp
	cmp r0, #0
	beq _023002DC
	mov r0, sl
	mov r1, r5
	mov r2, #4
	bl strncmp
	cmp r0, #0
	mov r0, sl
	bne _023002B0
	mov r1, r5
	add r2, r8, #0x610
	mov r3, #0x19
	bl ov00_0230BA28
	b _023002DC
_023002B0:
	ldr r1, _023003A4 ; =ov00_0231AD9C
	mov r2, #5
	bl strncmp
	cmp r0, #0
	bne _023002DC
	mov r1, sl
	mov r0, r4
	bl ov00_023011FC
	cmp r0, #0
	addne sp, sp, #0x14
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023002DC:
	ldr r0, [r8, #0x1f8]
	ldr r1, _0230038C ; =ov00_0231AD64
	bl strstr
	movs sl, r0
	bne _0230011C
	arm_func_end ov00_0230002C

	arm_func_start ov00_023002F0
ov00_023002F0: ; 023002F0
	ldr r0, [sp, #8]
	cmp r0, #0
	ldrne r0, [r8, #0x1f4]
	cmpne r0, #5
	beq _02300330
	ldr r2, _023003A8 ; =ov00_0231ADA4
	mov r0, r4
	mov r1, #7
	bl ov00_0230BCA8
	mov r0, r4
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x14
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300330:
	mov r0, r4
	bl ov00_02307208
	movs r5, r0
	beq _02300348
	mov r0, #0xa
	bl ov00_022F55EC
_02300348:
	cmp r5, #0
	bne _0230004C
	ldr r1, [r8, #0x630]
	ldr r0, _023003AC ; =0x0001D4C0
	sub r1, sb, r1
	cmp r1, r0
	bls _02300378
	ldr r2, _023003B0 ; =ov00_0231ADCC
	mov r0, r4
	add r1, r8, #0x210
	bl ov00_02302638
	str sb, [r8, #0x630]
_02300378:
	mov r0, #0
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_02300384: .word ov00_0231AD34
_02300388: .word ov00_0231AD38
_0230038C: .word ov00_0231AD64
_02300390: .word ov00_0231AD7C
_02300394: .word ov00_0231AD94
_02300398: .word ov00_0231AD6C
_0230039C: .word ov00_0231AD84
_023003A0: .word ov00_0231AD8C
_023003A4: .word ov00_0231AD9C
_023003A8: .word ov00_0231ADA4
_023003AC: .word 0x0001D4C0
_023003B0: .word ov00_0231ADCC
	arm_func_end ov00_023002F0

	arm_func_start ov00_023003B4
ov00_023003B4: ; 0x023003B4
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov sl, r0
	ldr r6, [sl]
	mov sb, r1
	ldr r0, [r6, #0x1f4]
	mov r7, #0
	cmp r0, #1
	bne _0230044C
	mov r4, r7
	mov r5, #1
	mov fp, #0xa
_023003E0:
	mov r0, sl
	bl ov00_023045B4
	movs r7, r0
	bne _02300408
	cmp sb, #0
	beq _02300408
	ldr r0, [r6, #0x1f4]
	cmp r0, #1
	moveq r8, r5
	beq _0230040C
_02300408:
	mov r8, r4
_0230040C:
	cmp r8, #0
	beq _0230041C
	mov r0, fp
	bl ov00_022F55EC
_0230041C:
	cmp r8, #0
	bne _023003E0
	cmp r7, #0
	beq _0230044C
	add r1, sp, #0
	mov r0, sl
	mov r2, #1
	bl ov00_023071BC
	cmp r0, #0
	ldrne r0, [sp]
	movne r1, #4
	strne r1, [r0, #0x1c]
_0230044C:
	ldr r0, [r6, #0x1f4]
	cmp r0, #3
	cmpne r0, #2
	cmpne r0, #5
	bne _02300488
	cmp r7, #0
	bne _02300474
	mov r0, sl
	bl ov00_0230002C
	mov r7, r0
_02300474:
	cmp r7, #0
	bne _02300488
	mov r0, sl
	bl ov00_02307ED4
	mov r7, r0
_02300488:
	cmp r7, #0
	bne _0230049C
	mov r0, sl
	bl ov00_0230B4E8
	mov r7, r0
_0230049C:
	ldr r1, [r6, #0x5c4]
	str r1, [sp]
	cmp r1, #0
	beq _023004E8
_023004AC:
	ldr r0, [r1, #0x1c]
	cmp r0, #0
	ldreq r0, [r1, #0x20]
	streq r0, [sp]
	beq _023004DC
	mov r0, sl
	bl ov00_02306C84
	ldr r1, [sp]
	mov r0, sl
	ldr r2, [r1, #0x20]
	str r2, [sp]
	bl ov00_0230716C
_023004DC:
	ldr r1, [sp]
	cmp r1, #0
	bne _023004AC
_023004E8:
	mov r0, sl
	mov r1, sb
	bl ov00_023031B0
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r6, #0x5bc]
	cmp r0, #0
	beq _0230051C
	mov r0, sl
	mov r1, #0
	bl ov00_02304798
	mov r0, sl
	bl ov00_022FFE10
_0230051C:
	mov r0, r7
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_023003B4

	arm_func_start ov00_02300524
ov00_02300524: ; 0x02300524
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	ldr r4, [r6]
	ldr r2, _023005B8 ; =ov00_0231ADD8
	mov r5, r1
	add r1, r4, #0x210
	bl ov00_02302638
	ldr r2, _023005BC ; =ov00_0231ADE4
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	ldr r2, [r4, #0x198]
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302668
	ldr r2, _023005C0 ; =ov00_0231ADF0
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	mov r0, r6
	add r1, r4, #0x210
	ldr r2, [r5]
	bl ov00_02302668
	mov r0, r6
	add r1, r4, #0x210
	ldr r2, _023005C4 ; =ov00_0231AE00
	bl ov00_02302638
	ldr r2, [r5, #0x14]
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	mov r0, r6
	add r1, r4, #0x210
	ldr r2, _023005C8 ; =ov00_0231AE08
	bl ov00_02302638
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_023005B8: .word ov00_0231ADD8
_023005BC: .word ov00_0231ADE4
_023005C0: .word ov00_0231ADF0
_023005C4: .word ov00_0231AE00
_023005C8: .word ov00_0231AE08
	arm_func_end ov00_02300524

	arm_func_start ov00_023005CC
ov00_023005CC: ; 0x023005CC
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x150
	sub sp, sp, #0x1000
	mov r7, r1
	mov r6, r0
	ldr r1, _023011B8 ; =ov00_0231AE10
	add r2, sp, #0x150
	mov r0, r7
	mov r3, #0x1000
	ldr r4, [r6]
	bl ov00_0230BA28
	cmp r0, #0
	bne _02300630
	ldr r2, _023011BC ; =ov00_0231AE18
	mov r0, r6
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300630:
	add r0, sp, #0x150
	bl sub_0208B360
	mov r8, r0
	ldr r1, _023011C0 ; =ov00_0231AE48
	add r2, sp, #0x150
	mov r0, r7
	mov r3, #0x1000
	bl ov00_0230BA28
	cmp r0, #0
	bne _02300688
	ldr r2, _023011BC ; =ov00_0231AE18
	mov r0, r6
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300688:
	add r0, sp, #0x150
	bl sub_0208B360
	mov sb, r0
	ldr r1, _023011C4 ; =ov00_0231AE4C
	add r2, sp, #0x150
	mov r0, r7
	mov r3, #0x1000
	bl ov00_0230BA28
	cmp r0, #0
	beq _023006BC
	add r0, sp, #0x150
	bl sub_0208B360
	b _023006C4
_023006BC:
	mov r0, #0
	bl ov00_022F5478
_023006C4:
	mov r5, r0
	cmp r8, #0x64
	bgt _023006FC
	bge _02300BFC
	cmp r8, #6
	addls pc, pc, r8, lsl #2
	b _023011A8
_023006E0: ; jump table
	b _023011A8 ; case 0
	b _02300718 ; case 1
	b _02300938 ; case 2
	b _023011A8 ; case 3
	b _02300AFC ; case 4
	b _02300828 ; case 5
	b _02300B7C ; case 6
_023006FC:
	cmp r8, #0x65
	bgt _0230070C
	beq _02300FAC
	b _023011A8
_0230070C:
	cmp r8, #0x66
	beq _0230113C
	b _023011A8
_02300718:
	ldr r1, [r4, #0x1c0]
	ldr r0, [r4, #0x1c4]
	str r1, [sp, #0x38]
	str r0, [sp, #0x3c]
	cmp r1, #0
	beq _023011A8
	mov r0, #0xc
	bl ov00_022F5AE4
	movs r4, r0
	bne _0230075C
	ldr r1, _023011C8 ; =ov00_0231AE54
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230075C:
	ldr r1, _023011CC ; =ov00_0231AE64
	add r2, sp, #0x150
	mov r0, r7
	mov r3, #0x1000
	bl ov00_0230BA28
	cmp r0, #0
	bne _023007A8
	ldr r2, _023011BC ; =ov00_0231AE18
	mov r0, r6
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023007A8:
	add r0, sp, #0x150
	bl strlen
	add r0, r0, #1
	bl ov00_022F5AE4
	str r0, [r4, #8]
	cmp r0, #0
	bne _023007E0
	ldr r1, _023011C8 ; =ov00_0231AE54
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023007E0:
	add r1, sp, #0x150
	bl strcpy
	str sb, [r4]
	str r5, [r4, #4]
	mov r2, #0
	str r2, [sp]
	mov r2, #2
	add r1, sp, #0x38
	str r2, [sp, #4]
	mov r0, r6
	mov r3, r4
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _023011A8
	add sp, sp, #0x150
	add sp, sp, #0x1000
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300828:
	ldr r1, [r4, #0x1c8]
	ldr r0, [r4, #0x1cc]
	str r1, [sp, #8]
	str r0, [sp, #0xc]
	cmp r1, #0
	beq _023011A8
	mov r0, #0xc
	bl ov00_022F5AE4
	movs r4, r0
	bne _0230086C
	ldr r1, _023011C8 ; =ov00_0231AE54
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230086C:
	ldr r1, _023011CC ; =ov00_0231AE64
	add r2, sp, #0x150
	mov r0, r7
	mov r3, #0x1000
	bl ov00_0230BA28
	cmp r0, #0
	bne _023008B8
	ldr r2, _023011BC ; =ov00_0231AE18
	mov r0, r6
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023008B8:
	add r0, sp, #0x150
	bl strlen
	add r0, r0, #1
	bl ov00_022F5AE4
	str r0, [r4, #8]
	cmp r0, #0
	bne _023008F0
	ldr r1, _023011C8 ; =ov00_0231AE54
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023008F0:
	add r1, sp, #0x150
	bl strcpy
	str sb, [r4]
	str r5, [r4, #4]
	mov r2, #0
	str r2, [sp]
	mov r2, #0xb
	add r1, sp, #8
	str r2, [sp, #4]
	mov r0, r6
	mov r3, r4
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _023011A8
	add sp, sp, #0x150
	add sp, sp, #0x1000
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300938:
	mov r0, r6
	mov r1, sb
	bl ov00_0230899C
	movs r8, r0
	bne _02300968
	ldr r1, _023011C8 ; =ov00_0231AE54
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300968:
	ldr r1, _023011CC ; =ov00_0231AE64
	add r2, sp, #0x150
	mov r0, r7
	mov r3, #0x1000
	bl ov00_0230BA28
	cmp r0, #0
	bne _023009B4
	ldr r2, _023011BC ; =ov00_0231AE18
	mov r0, r6
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023009B4:
	ldr r1, _023011D0 ; =ov00_0231AE6C
	add r0, sp, #0x150
	bl strstr
	movs r7, r0
	bne _023009F8
	ldr r2, _023011BC ; =ov00_0231AE18
	mov r0, r6
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023009F8:
	mov r1, #0
	add r0, r7, #8
	strb r1, [r7]
	bl strlen
	cmp r0, #0x20
	beq _02300A40
	ldr r2, _023011BC ; =ov00_0231AE18
	mov r0, r6
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300A40:
	ldr r0, [r8, #0x14]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r8, #0x14]
	add r0, r7, #8
	bl ov00_022F5514
	str r0, [r8, #0x14]
	ldr r0, [r8, #0x18]
	add r0, r0, #1
	str r0, [r8, #0x18]
	ldr r1, [r4, #0x1b0]
	ldr r0, [r4, #0x1b4]
	str r1, [sp, #0x10]
	str r0, [sp, #0x14]
	cmp r1, #0
	beq _023011A8
	ldr r0, _023011D4 ; =0x0000040C
	bl ov00_022F5AE4
	movs r4, r0
	bne _02300AAC
	ldr r1, _023011C8 ; =ov00_0231AE54
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300AAC:
	ldr r2, _023011D8 ; =0x00000401
	add r1, sp, #0x150
	add r0, r4, #8
	bl ov00_0230B930
	str sb, [r4]
	str r5, [r4, #4]
	mov r2, #0
	str r2, [sp]
	mov r2, #6
	add r1, sp, #0x10
	str r2, [sp, #4]
	mov r0, r6
	mov r3, r4
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _023011A8
	add sp, sp, #0x150
	add sp, sp, #0x1000
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300AFC:
	ldr r1, [r4, #0x1e0]
	ldr r0, [r4, #0x1e4]
	str r1, [sp, #0x18]
	str r0, [sp, #0x1c]
	cmp r1, #0
	beq _023011A8
	mov r0, #8
	bl ov00_022F5AE4
	movs r3, r0
	bne _02300B40
	ldr r1, _023011C8 ; =ov00_0231AE54
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300B40:
	str sb, [r3]
	str r5, [r3, #4]
	mov r2, #0
	str r2, [sp]
	mov r2, #0xa
	add r1, sp, #0x18
	str r2, [sp, #4]
	mov r0, r6
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _023011A8
	add sp, sp, #0x150
	add sp, sp, #0x1000
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300B7C:
	ldr r1, [r4, #0x1e8]
	ldr r0, [r4, #0x1ec]
	str r1, [sp, #0x20]
	str r0, [sp, #0x24]
	cmp r1, #0
	beq _023011A8
	mov r0, #8
	bl ov00_022F5AE4
	movs r3, r0
	bne _02300BC0
	ldr r1, _023011C8 ; =ov00_0231AE54
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300BC0:
	str sb, [r3]
	str r5, [r3, #4]
	mov r2, #0
	str r2, [sp]
	mov r2, #0xc
	add r1, sp, #0x20
	str r2, [sp, #4]
	mov r0, r6
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _023011A8
	add sp, sp, #0x150
	add sp, sp, #0x1000
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300BFC:
	mov r0, r6
	mov r1, sb
	bl ov00_0230899C
	movs r8, r0
	bne _02300C2C
	ldr r1, _023011C8 ; =ov00_0231AE54
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300C2C:
	ldr r0, [r8, #8]
	cmp r0, #0
	bne _02300CCC
	mov r0, #0x1c
	bl ov00_022F5AE4
	str r0, [r8, #8]
	cmp r0, #0
	bne _02300C68
	ldr r1, _023011C8 ; =ov00_0231AE54
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300C68:
	mov r2, #7
	mov r1, #0
_02300C70:
	strb r1, [r0]
	strb r1, [r0, #1]
	strb r1, [r0, #2]
	strb r1, [r0, #3]
	add r0, r0, #4
	subs r2, r2, #1
	bne _02300C70
	ldr r0, [r8, #0xc]
	cmp r0, #0
	beq _02300CB8
	ldr r1, [r0]
	ldr r0, [r8, #8]
	str r1, [r0]
	ldr r0, [r8, #0xc]
	bl ov00_02308D9C
	mov r0, #0
	str r0, [r8, #0xc]
	b _02300CCC
_02300CB8:
	ldr r1, [r4, #0x5d0]
	add r0, r1, #1
	str r0, [r4, #0x5d0]
	ldr r0, [r8, #8]
	str r1, [r0]
_02300CCC:
	ldr r1, _023011CC ; =ov00_0231AE64
	add r2, sp, #0x150
	mov r0, r7
	mov r3, #0x1000
	ldr sl, [r8, #8]
	bl ov00_0230BA28
	cmp r0, #0
	bne _02300D1C
	ldr r2, _023011BC ; =ov00_0231AE18
	mov r0, r6
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300D1C:
	ldr r1, _023011DC ; =ov00_0231AE78
	add r0, sp, #0x150
	add r2, sp, #0x40
	mov r3, #0x10
	bl ov00_0230BA28
	cmp r0, #0
	bne _02300D68
	ldr r2, _023011BC ; =ov00_0231AE18
	mov r0, r6
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300D68:
	add r0, sp, #0x40
	bl sub_0208B360
	str r0, [sl, #4]
	ldr r0, [sl, #8]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [sl, #8]
	ldr r1, _023011E0 ; =ov00_0231AE7C
	add r0, sp, #0x150
	add r2, sp, #0x50
	mov r3, #0x100
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	streqb r0, [sp, #0x50]
	add r0, sp, #0x50
	bl ov00_022F5514
	str r0, [sl, #8]
	cmp r0, #0
	bne _02300DD4
	ldr r1, _023011C8 ; =ov00_0231AE54
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300DD4:
	ldr r0, [sl, #0xc]
	bl ov00_022F5B14
	mov r7, #0
	ldr r1, _023011E4 ; =ov00_0231AE84
	add r0, sp, #0x150
	add r2, sp, #0x50
	mov r3, #0x100
	str r7, [sl, #0xc]
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, r7
	streqb r0, [sp, #0x50]
	add r0, sp, #0x50
	bl ov00_022F5514
	str r0, [sl, #0xc]
	cmp r0, #0
	bne _02300E34
	ldr r1, _023011C8 ; =ov00_0231AE54
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300E34:
	ldr r1, _023011E8 ; =ov00_0231AE8C
	add r0, sp, #0x150
	add r2, sp, #0x40
	mov r3, #0x10
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	beq _02300EAC
	add r0, sp, #0x40
	bl sub_0208B360
	mov r8, r0
	add r0, sp, #0x40
	bl sub_0208B360
	mov fp, r0
	add r0, sp, #0x40
	bl sub_0208B360
	mov r7, r0
	add r0, sp, #0x40
	bl sub_0208B360
	mov r1, r7, lsr #0x18
	mov r0, r0, lsr #8
	mov r2, fp, lsl #8
	and r1, r1, #0xff
	and r0, r0, #0xff00
	mov r3, r8, lsl #0x18
	orr r0, r1, r0
	and r2, r2, #0xff0000
	and r1, r3, #0xff000000
	orr r0, r2, r0
	orr r0, r1, r0
_02300EAC:
	ldr r1, _023011EC ; =ov00_0231AE94
	str r0, [sl, #0x10]
	add r0, sp, #0x150
	add r2, sp, #0x40
	mov r3, #0x10
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	beq _02300EF4
	add r0, sp, #0x40
	bl sub_0208B360
	mov r0, r0, lsl #0x10
	mov r0, r0, lsr #0x10
	mov r1, r0, asr #8
	mov r0, r0, lsl #8
	and r1, r1, #0xff
	and r0, r0, #0xff00
	orr r0, r1, r0
_02300EF4:
	ldr r1, _023011F0 ; =ov00_0231AE98
	strh r0, [sl, #0x14]
	add r0, sp, #0x150
	add r2, sp, #0x40
	mov r3, #0x10
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	beq _02300F20
	add r0, sp, #0x40
	bl sub_0208B360
_02300F20:
	str r0, [sl, #0x18]
	ldr r1, [r4, #0x1b8]
	ldr r0, [r4, #0x1bc]
	str r1, [sp, #0x28]
	str r0, [sp, #0x2c]
	cmp r1, #0
	beq _023011A8
	mov r0, #0xc
	bl ov00_022F5AE4
	movs r3, r0
	bne _02300F68
	ldr r1, _023011C8 ; =ov00_0231AE54
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300F68:
	str sb, [r3]
	ldr r0, [sl]
	mov r2, #0
	str r0, [r3, #8]
	str r5, [r3, #4]
	str r2, [sp]
	mov r2, #5
	add r1, sp, #0x28
	str r2, [sp, #4]
	mov r0, r6
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _023011A8
	add sp, sp, #0x150
	add sp, sp, #0x1000
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300FAC:
	ldr r1, _023011CC ; =ov00_0231AE64
	add r2, sp, #0x150
	mov r0, r7
	mov r3, #0x1000
	bl ov00_0230BA28
	cmp r0, #0
	bne _02300FF8
	ldr r2, _023011BC ; =ov00_0231AE18
	mov r0, r6
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02300FF8:
	ldr r1, _023011EC ; =ov00_0231AE94
	add r0, sp, #0x150
	bl strstr
	cmp r0, #0
	bne _0230103C
	ldr r2, _023011BC ; =ov00_0231AE18
	mov r0, r6
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230103C:
	ldrsb r1, [r0, #3]
	cmp r1, #0
	bne _02301078
	ldr r2, _023011BC ; =ov00_0231AE18
	mov r0, r6
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02301078:
	add r0, r0, #3
	bl sub_0208B360
	mov r5, r0
	ldr r1, _023011F4 ; =ov00_0231AEA0
	add r0, sp, #0x150
	bl strstr
	movs r1, r0
	moveq r0, #0
	streqb r0, [sp, #0x50]
	beq _023010B0
	add r0, sp, #0x50
	add r1, r1, #3
	mov r2, #0x100
	bl ov00_0230B930
_023010B0:
	ldr r1, [r4, #0x1d0]
	ldr r0, [r4, #0x1d4]
	str r1, [sp, #0x30]
	str r0, [sp, #0x34]
	cmp r1, #0
	beq _023011A8
	mov r0, #0x108
	bl ov00_022F5AE4
	movs r4, r0
	bne _023010F4
	ldr r1, _023011C8 ; =ov00_0231AE54
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023010F4:
	str sb, [r4]
	add r1, sp, #0x50
	add r0, r4, #8
	str r5, [r4, #4]
	bl strcpy
	mov r2, #0
	str r2, [sp]
	add r1, sp, #0x30
	str r2, [sp, #4]
	mov r0, r6
	mov r3, r4
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _023011A8
	add sp, sp, #0x150
	add sp, sp, #0x1000
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230113C:
	ldr r1, _023011CC ; =ov00_0231AE64
	add r2, sp, #0x150
	mov r0, r7
	mov r3, #0x1000
	bl ov00_0230BA28
	cmp r0, #0
	bne _02301188
	ldr r2, _023011BC ; =ov00_0231AE18
	mov r0, r6
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x150
	add sp, sp, #0x1000
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02301188:
	mov r4, #0
	str r4, [sp]
	ldr r3, _023011F8 ; =ov00_0231AEA4
	mov r0, r6
	mov r1, sb
	mov r2, #0x67
	str r4, [sp, #4]
	bl ov00_02301B2C
_023011A8:
	mov r0, #0
	add sp, sp, #0x150
	add sp, sp, #0x1000
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_023011B8: .word ov00_0231AE10
_023011BC: .word ov00_0231AE18
_023011C0: .word ov00_0231AE48
_023011C4: .word ov00_0231AE4C
_023011C8: .word ov00_0231AE54
_023011CC: .word ov00_0231AE64
_023011D0: .word ov00_0231AE6C
_023011D4: .word 0x0000040C
_023011D8: .word 0x00000401
_023011DC: .word ov00_0231AE78
_023011E0: .word ov00_0231AE7C
_023011E4: .word ov00_0231AE84
_023011E8: .word ov00_0231AE8C
_023011EC: .word ov00_0231AE94
_023011F0: .word ov00_0231AE98
_023011F4: .word ov00_0231AEA0
_023011F8: .word ov00_0231AEA4
	arm_func_end ov00_023005CC

	arm_func_start ov00_023011FC
ov00_023011FC: ; 0x023011FC
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x14
	sub sp, sp, #0x400
	mov r7, r0
	mov r0, #0
	mov r6, r1
	ldr r4, [r7]
	bl ov00_022F5478
	mov fp, r0
	ldr r1, _02301A08 ; =ov00_0231AEA8
	add r2, sp, #0x14
	mov r0, r6
	mov r3, #0x400
	bl ov00_0230BA28
	cmp r0, #0
	bne _0230126C
	ldr r2, _02301A0C ; =ov00_0231AE18
	mov r0, r7
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230126C:
	add r0, sp, #0x14
	bl sub_0208B360
	str r0, [sp, #8]
	ldr r1, [sp, #8]
	mov r0, r7
	bl ov00_0230899C
	movs r8, r0
	bne _023012A8
	ldr r1, _02301A10 ; =ov00_0231AE54
	mov r0, r7
	bl ov00_0230BCCC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023012A8:
	ldr r5, [r8, #0xc]
	cmp r5, #0
	bne _02301374
	mov r0, #0x3c
	bl ov00_022F5AE4
	str r0, [r8, #0xc]
	cmp r0, #0
	bne _023012E4
	ldr r1, _02301A10 ; =ov00_0231AE54
	mov r0, r7
	bl ov00_0230BCCC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023012E4:
	mov r1, #0
	mov r2, #0x3c
	bl memset
	ldr r0, [r8, #8]
	cmp r0, #0
	beq _0230131C
	ldr r1, [r0]
	ldr r0, [r8, #0xc]
	str r1, [r0]
	ldr r0, [r8, #8]
	bl ov00_02308D68
	mov r0, #0
	str r0, [r8, #8]
	b _02301330
_0230131C:
	ldr r1, [r4, #0x5d0]
	add r0, r1, #1
	str r0, [r4, #0x5d0]
	ldr r0, [r8, #0xc]
	str r1, [r0]
_02301330:
	ldr r2, _02301A14 ; =ov00_023066EC
	mov r0, #8
	mov r1, #1
	bl ov00_022F4700
	ldr r1, [r8, #0xc]
	str r0, [r1, #0x38]
	ldr r5, [r8, #0xc]
	ldr r0, [r5, #0x38]
	cmp r0, #0
	bne _02301374
	ldr r1, _02301A10 ; =ov00_0231AE54
	mov r0, r7
	bl ov00_0230BCCC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02301374:
	ldr r1, _02301A18 ; =ov00_0231AEB4
	add r2, sp, #0x14
	mov r0, r6
	mov r3, #0x400
	bl ov00_0230BA28
	cmp r0, #0
	bne _023013C0
	ldr r2, _02301A0C ; =ov00_0231AE18
	mov r0, r7
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023013C0:
	add r0, sp, #0x14
	bl sub_0208B360
	str r0, [r5, #4]
	ldr r1, _02301A1C ; =ov00_0231AEBC
	add r2, sp, #0x14
	mov r0, r6
	mov r3, #0x400
	bl ov00_0230BA28
	cmp r0, #0
	bne _02301418
	ldr r2, _02301A0C ; =ov00_0231AE18
	mov r0, r7
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02301418:
	add r0, sp, #0x14
	bl sub_0208B360
	mov sl, r0
	add r0, sp, #0x14
	bl sub_0208B360
	mov sb, r0
	add r0, sp, #0x14
	bl sub_0208B360
	mov r8, r0
	add r0, sp, #0x14
	bl sub_0208B360
	mov r1, sl, lsl #0x18
	mov r3, r8, lsr #0x18
	mov r0, r0, lsr #8
	and r2, r1, #0xff000000
	mov r1, sb, lsl #8
	and r3, r3, #0xff
	and r0, r0, #0xff00
	orr r0, r3, r0
	and r1, r1, #0xff0000
	orr r0, r1, r0
	orr r0, r2, r0
	str r0, [r5, #0x1c]
	ldr r1, _02301A20 ; =ov00_0231AEC4
	mov r0, r6
	add r2, sp, #0x14
	mov r3, #0x400
	bl ov00_0230BA28
	cmp r0, #0
	bne _023014C0
	ldr r2, _02301A0C ; =ov00_0231AE18
	mov r0, r7
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023014C0:
	add r0, sp, #0x14
	bl sub_0208B360
	strh r0, [r5, #0x20]
	ldr r1, _02301A24 ; =ov00_0231AECC
	add r2, sp, #0x14
	mov r0, r6
	mov r3, #0x400
	bl ov00_0230BA28
	cmp r0, #0
	bne _02301518
	ldr r2, _02301A0C ; =ov00_0231AE18
	mov r0, r7
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02301518:
	add r0, sp, #0x14
	bl sub_0208B360
	mov sl, r0
	add r0, sp, #0x14
	bl sub_0208B360
	mov sb, r0
	add r0, sp, #0x14
	bl sub_0208B360
	mov r8, r0
	add r0, sp, #0x14
	bl sub_0208B360
	mov r1, sl, lsl #0x18
	mov r3, r8, lsr #0x18
	mov r0, r0, lsr #8
	and r2, r1, #0xff000000
	mov r1, sb, lsl #8
	and r3, r3, #0xff
	and r0, r0, #0xff00
	orr r0, r3, r0
	and r1, r1, #0xff0000
	orr r0, r1, r0
	orr r0, r2, r0
	str r0, [r5, #0x24]
	ldr r1, _02301A28 ; =ov00_0231AED8
	mov r0, r6
	add r2, sp, #0x14
	mov r3, #0x400
	bl ov00_0230BA28
	cmp r0, #0
	bne _023015C0
	ldr r2, _02301A0C ; =ov00_0231AE18
	mov r0, r7
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023015C0:
	add r0, sp, #0x14
	bl sub_0208B360
	mov sl, r0
	add r0, sp, #0x14
	bl sub_0208B360
	mov sb, r0
	add r0, sp, #0x14
	bl sub_0208B360
	mov r8, r0
	add r0, sp, #0x14
	bl sub_0208B360
	mov r1, sl, lsl #0x18
	mov r3, r8, lsr #0x18
	mov r0, r0, lsr #8
	and r2, r1, #0xff000000
	mov r1, sb, lsl #8
	and r3, r3, #0xff
	and r0, r0, #0xff00
	orr r0, r3, r0
	and r1, r1, #0xff0000
	orr r0, r1, r0
	orr r0, r2, r0
	str r0, [r5, #0x28]
	ldr r1, _02301A2C ; =ov00_0231AEE4
	mov r0, r6
	add r2, sp, #0x14
	mov r3, #0x400
	bl ov00_0230BA28
	cmp r0, #0
	bne _02301668
	ldr r2, _02301A0C ; =ov00_0231AE18
	mov r0, r7
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02301668:
	add r0, sp, #0x14
	bl sub_0208B360
	strh r0, [r5, #0x2c]
	ldr r1, _02301A30 ; =ov00_0231AEEC
	add r2, sp, #0x14
	mov r0, r6
	mov r3, #0x400
	bl ov00_0230BA28
	cmp r0, #0
	bne _023016C0
	ldr r2, _02301A0C ; =ov00_0231AE18
	mov r0, r7
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023016C0:
	add r0, sp, #0x14
	bl sub_0208B360
	strh r0, [r5, #0x2e]
	ldr r1, _02301A34 ; =ov00_0231AEF4
	add r2, sp, #0x14
	mov r0, r6
	mov r3, #0x400
	bl ov00_0230BA28
	cmp r0, #0
	bne _02301718
	ldr r2, _02301A0C ; =ov00_0231AE18
	mov r0, r7
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02301718:
	add r0, sp, #0x14
	bl sub_0208B360
	str r0, [r5, #0x18]
	ldr r0, [r5, #8]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r5, #8]
	ldr r1, _02301A38 ; =ov00_0231AF00
	mov r0, r6
	add r2, sp, #0x14
	mov r3, #0x400
	bl ov00_0230BA28
	cmp r0, #0
	bne _02301780
	ldr r2, _02301A0C ; =ov00_0231AE18
	mov r0, r7
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02301780:
	add r0, sp, #0x14
	bl ov00_022F5514
	str r0, [r5, #8]
	ldr r0, [r5, #0xc]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r5, #0xc]
	ldr r1, _02301A3C ; =ov00_0231AF0C
	mov r0, r6
	add r2, sp, #0x14
	mov r3, #0x400
	bl ov00_0230BA28
	cmp r0, #0
	bne _023017E8
	ldr r2, _02301A0C ; =ov00_0231AE18
	mov r0, r7
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023017E8:
	add r0, sp, #0x14
	bl ov00_022F5514
	str r0, [r5, #0xc]
	ldr r0, [r5, #0x10]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r5, #0x10]
	ldr r1, _02301A40 ; =ov00_0231AF18
	mov r0, r6
	add r2, sp, #0x14
	mov r3, #0x400
	bl ov00_0230BA28
	cmp r0, #0
	bne _02301850
	ldr r2, _02301A0C ; =ov00_0231AE18
	mov r0, r7
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02301850:
	add r0, sp, #0x14
	bl ov00_022F5514
	str r0, [r5, #0x10]
	ldr r0, [r5, #0x14]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r5, #0x14]
	ldr r1, _02301A44 ; =ov00_0231AF24
	mov r0, r6
	add r2, sp, #0x14
	mov r3, #0x400
	bl ov00_0230BA28
	cmp r0, #0
	bne _023018B8
	ldr r2, _02301A0C ; =ov00_0231AE18
	mov r0, r7
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023018B8:
	add r0, sp, #0x14
	bl ov00_022F5514
	str r0, [r5, #0x14]
	ldr r1, _02301A48 ; =ov00_0231AF30
	add r2, sp, #0x14
	mov r0, r6
	mov r3, #0x400
	bl ov00_0230BA28
	cmp r0, #0
	bne _02301910
	ldr r2, _02301A0C ; =ov00_0231AE18
	mov r0, r7
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02301910:
	add r0, sp, #0x14
	bl sub_0208B360
	str r0, [r5, #0x34]
	ldr r1, _02301A4C ; =ov00_0231AF3C
	add r2, sp, #0x14
	mov r0, r6
	mov r3, #0x400
	bl ov00_0230BA28
	cmp r0, #0
	bne _02301968
	ldr r2, _02301A0C ; =ov00_0231AE18
	mov r0, r7
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02301968:
	add r0, sp, #0x14
	bl sub_0208B360
	str r0, [r5, #0x30]
	ldr r1, [r4, #0x1b8]
	ldr r0, [r4, #0x1bc]
	str r1, [sp, #0xc]
	str r0, [sp, #0x10]
	cmp r1, #0
	beq _023019F8
	mov r0, #0xc
	bl ov00_022F5AE4
	movs r3, r0
	bne _023019B8
	ldr r1, _02301A10 ; =ov00_0231AE54
	mov r0, r7
	bl ov00_0230BCCC
	add sp, sp, #0x14
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023019B8:
	str fp, [r3, #4]
	ldr r0, [r5]
	mov r2, #0
	str r0, [r3, #8]
	ldr r0, [sp, #8]
	add r1, sp, #0xc
	str r0, [r3]
	str r2, [sp]
	str r2, [sp, #4]
	mov r0, r7
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	addne sp, sp, #0x14
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023019F8:
	mov r0, #0
	add sp, sp, #0x14
	add sp, sp, #0x400
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_02301A08: .word ov00_0231AEA8
_02301A0C: .word ov00_0231AE18
_02301A10: .word ov00_0231AE54
_02301A14: .word ov00_023066EC
_02301A18: .word ov00_0231AEB4
_02301A1C: .word ov00_0231AEBC
_02301A20: .word ov00_0231AEC4
_02301A24: .word ov00_0231AECC
_02301A28: .word ov00_0231AED8
_02301A2C: .word ov00_0231AEE4
_02301A30: .word ov00_0231AEEC
_02301A34: .word ov00_0231AEF4
_02301A38: .word ov00_0231AF00
_02301A3C: .word ov00_0231AF0C
_02301A40: .word ov00_0231AF18
_02301A44: .word ov00_0231AF24
_02301A48: .word ov00_0231AF30
_02301A4C: .word ov00_0231AF3C
	arm_func_end ov00_023011FC

	arm_func_start ov00_02301A50
ov00_02301A50: ; 0x02301A50
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0xdb0
	mov r7, r0
	mov r5, r2
	mov r6, r1
	ldr r2, _02301B14 ; =0x00000DAD
	add r0, sp, #0
	mov r1, r3
	ldr r4, [r7]
	bl ov00_0230B930
	ldr r2, _02301B18 ; =ov00_0231AE10
	mov r0, r7
	add r1, r4, #0x210
	bl ov00_02302638
	mov r0, r7
	mov r2, r5
	add r1, r4, #0x210
	bl ov00_02302668
	ldr r2, _02301B1C ; =ov00_0231ADE4
	mov r0, r7
	add r1, r4, #0x210
	bl ov00_02302638
	ldr r2, [r4, #0x198]
	mov r0, r7
	add r1, r4, #0x210
	bl ov00_02302668
	ldr r2, _02301B20 ; =ov00_0231AF4C
	mov r0, r7
	add r1, r4, #0x210
	bl ov00_02302638
	mov r2, r6
	mov r0, r7
	add r1, r4, #0x210
	bl ov00_02302668
	ldr r2, _02301B24 ; =ov00_0231AE64
	mov r0, r7
	add r1, r4, #0x210
	bl ov00_02302638
	mov r0, r7
	add r1, r4, #0x210
	add r2, sp, #0
	bl ov00_02302638
	ldr r2, _02301B28 ; =ov00_0231AE08
	mov r0, r7
	add r1, r4, #0x210
	bl ov00_02302638
	mov r0, #0
	add sp, sp, #0xdb0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_02301B14: .word 0x00000DAD
_02301B18: .word ov00_0231AE10
_02301B1C: .word ov00_0231ADE4
_02301B20: .word ov00_0231AF4C
_02301B24: .word ov00_0231AE64
_02301B28: .word ov00_0231AE08
	arm_func_end ov00_02301A50

	arm_func_start ov00_02301B2C
ov00_02301B2C: ; 0x02301B2C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
	sub sp, sp, #4
	mov r8, r0
	mov r7, r1
	mov r6, r2
	mov r5, r3
	bl ov00_02307F60
	movs r4, r0
	bne _02301C0C
	add r2, sp, #0
	mov r0, r8
	mov r1, r7
	bl ov00_02308A4C
	cmp r0, #0
	ldrne r0, [sp]
	ldrne r0, [r0, #0xc]
	cmpne r0, #0
	ldrneh r0, [r0, #0x20]
	cmpne r0, #0
	bne _02301BAC
	ldr r0, [sp, #0x20]
	cmp r0, #0xb00
	addeq sp, sp, #4
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	mov r0, r8
	mov r1, r7
	mov r2, r6
	mov r3, r5
	bl ov00_02301A50
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_02301BAC:
	mov r0, r8
	mov r1, r7
	mov r2, #1
	bl ov00_02307FF4
	movs r4, r0
	addeq sp, sp, #4
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldr r0, [sp]
	mov r1, r4
	ldr r0, [r0, #0x1c]
	cmp r0, #0
	mov r0, r8
	bne _02301BF8
	bl ov00_02308080
	cmp r0, #0
	beq _02301C7C
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_02301BF8:
	bl ov00_023080E4
	cmp r0, #0
	beq _02301C7C
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_02301C0C:
	ldr r0, [r4]
	cmp r0, #0x6a
	bne _02301C7C
	add r2, sp, #0
	mov r0, r8
	mov r1, r7
	bl ov00_02308A4C
	cmp r0, #0
	beq _02301C7C
	ldr r0, [sp]
	ldr r1, [r0, #0xc]
	cmp r1, #0
	movne r0, #0
	strneh r0, [r1, #0x20]
	ldr r0, [sp, #0x20]
	cmp r0, #0xb00
	addeq sp, sp, #4
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	cmp r6, #0x64
	bge _02301C7C
	mov r0, r8
	mov r1, r7
	mov r2, r6
	mov r3, r5
	bl ov00_02301A50
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_02301C7C:
	ldr r1, [sp, #0x24]
	cmp r1, #0
	beq _02301C90
	mov r0, r4
	bl ov00_023085D0
_02301C90:
	mov r0, r8
	mov r1, r4
	mov r2, r6
	mov r3, r5
	bl ov00_023081E4
	cmp r0, #0
	moveq r0, #0
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_02301B2C

	arm_func_start ov00_02301CB4
ov00_02301CB4: ; 0x02301CB4
	stmdb sp!, {r4, r5, lr}
	sub sp, sp, #0xc
	mov r4, r1
	add r1, sp, #8
	mov r5, r0
	bl ov00_02306958
	cmp r0, #0
	addne sp, sp, #0xc
	ldmneia sp!, {r4, r5, pc}
	ldr r0, [sp, #8]
	mov r2, #0x69
	cmp r0, #0
	ldreq r0, _02301D4C ; =ov00_0231AF50
	streq r0, [sp, #8]
	mov r0, #0xb00
	str r0, [sp]
	mov r0, #0
	str r0, [sp, #4]
	ldr r1, [r4, #0x10]
	ldr r3, [sp, #8]
	mov r0, r5
	bl ov00_02301B2C
	cmp r0, #0
	addne sp, sp, #0xc
	ldmneia sp!, {r4, r5, pc}
	ldr r4, [sp, #8]
	ldr r1, _02301D4C ; =ov00_0231AF50
	mov r0, r4
	bl strcmp
	cmp r0, #0
	beq _02301D40
	mov r0, r4
	bl ov00_022F5B14
	mov r0, #0
	str r0, [sp, #8]
_02301D40:
	mov r0, #0
	add sp, sp, #0xc
	ldmia sp!, {r4, r5, pc}
	.align 2, 0
_02301D4C: .word ov00_0231AF50
	arm_func_end ov00_02301CB4

	arm_func_start ov00_02301D50
ov00_02301D50: ; 0x02301D50
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x3c
	sub sp, sp, #0x800
	str r1, [sp, #8]
	str r2, [sp, #0xc]
	ldr r1, [r1, #0x10]
	add r2, sp, #0x38
	mov sl, r0
	bl ov00_02308A4C
	cmp r0, #0
	bne _02301D98
	ldr r1, _02302190 ; =ov00_0231AF54
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0x3c
	add sp, sp, #0x800
	mov r0, #2
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02301D98:
	ldr r1, _02302194 ; =ov00_0231AF50
	ldr r0, [sp, #0xc]
	bl strcmp
	cmp r0, #0
	bne _02301E58
	ldr r0, [sp, #8]
	ldr r4, [r0, #0x44]
	cmp r4, #0
	beq _02301DD0
_02301DBC:
	ldr r0, [r4, #0x10]
	cmp r0, #0x68
	ldrne r4, [r4, #0xc]
	cmpne r4, #0
	bne _02301DBC
_02301DD0:
	cmp r4, #0
	addeq sp, sp, #0x3c
	addeq sp, sp, #0x800
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r4, #0x10]
	cmp r0, #0x68
	bne _02302180
	ldr r0, [r4, #8]
	cmp r0, #0
	beq _02302180
	mov r0, #0x10
	bl ov00_022F5AE4
	ldmib r4, {r5, r6}
	mov r3, r0
	mov r2, #0
	str r2, [r3, #4]
	str r2, [r3, #0xc]
	ldr r0, [sp, #8]
	str r2, [r3, #8]
	ldr r0, [r0, #0x10]
	add r1, sp, #0x30
	str r0, [r3]
	str r2, [sp]
	mov r0, sl
	str r6, [sp, #0x30]
	str r5, [sp, #0x34]
	str r2, [sp, #4]
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	ldr r0, [sp, #8]
	mov r1, r4
	bl ov00_02308618
	b _02302180
_02301E58:
	mov r5, #0
	add r4, sp, #0x400
	add r3, sp, #0x600
	ldr r1, [sp, #0xc]
	add r4, r4, #0x3c
	add r2, sp, #0x28
	add r3, r3, #0x3c
	mov r0, sl
	str r5, [sp, #0x2c]
	str r5, [sp, #0x28]
	str r5, [sp, #0x24]
	str r4, [sp]
	bl ov00_0230BB58
	add r0, sp, #0x600
	ldr r1, _02302198 ; =ov00_0231AF68
	add r0, r0, #0x3c
	bl strcmp
	cmp r0, #0
	beq _02301ED4
	ldr r2, _0230219C ; =ov00_0231AF70
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, r5
	bl ov00_02302DEC
	add sp, sp, #0x3c
	add sp, sp, #0x800
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02301ED4:
	mov r0, r4
	bl sub_0208B360
	movs r8, r0
	bne _02301F90
	ldr r0, [sp, #8]
	ldr r4, [r0, #0x44]
	cmp r4, #0
	beq _02301F08
_02301EF4:
	ldr r0, [r4, #0x10]
	cmp r0, #0x68
	ldrne r4, [r4, #0xc]
	cmpne r4, #0
	bne _02301EF4
_02301F08:
	cmp r4, #0
	addeq sp, sp, #0x3c
	addeq sp, sp, #0x800
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r4, #0x10]
	cmp r0, #0x68
	bne _02302180
	ldr r0, [r4, #8]
	cmp r0, #0
	beq _02302180
	mov r0, #0x10
	bl ov00_022F5AE4
	ldmib r4, {r5, r6}
	mov r3, r0
	mov r2, #0
	str r2, [r3, #4]
	str r2, [r3, #0xc]
	ldr r0, [sp, #8]
	str r2, [r3, #8]
	ldr r0, [r0, #0x10]
	add r1, sp, #0x1c
	str r0, [r3]
	str r2, [sp]
	mov r0, sl
	str r6, [sp, #0x1c]
	str r5, [sp, #0x20]
	str r2, [sp, #4]
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	ldr r0, [sp, #8]
	mov r1, r4
	bl ov00_02308618
	b _02302180
_02301F90:
	mov r4, r8, lsl #2
	mov r0, r4
	bl ov00_022F5AE4
	str r0, [sp, #0x10]
	mov r0, r4
	bl ov00_022F5AE4
	mov fp, r0
	cmp r8, #0
	mov sb, r5
	ble _023020D4
	add r7, sp, #0x400
	add r6, sp, #0x600
	add r5, sp, #0x23c
	add r4, sp, #0x3c
	add r7, r7, #0x3c
	add r6, r6, #0x3c
_02301FD0:
	ldr r1, [sp, #0xc]
	mov r0, sl
	add r2, sp, #0x28
	mov r3, r6
	str r7, [sp]
	bl ov00_0230BB58
	mov r0, r6
	bl strlen
	mov r1, #2
	str r1, [sp]
	mov r2, r0
	mov r0, r6
	mov r1, r5
	add r3, sp, #0x2c
	bl ov00_022F5798
	ldr r2, [sp, #0x2c]
	mov r1, #0
	mov r0, r7
	strb r1, [r5, r2]
	bl strlen
	mov r1, #2
	str r1, [sp]
	mov r2, r0
	mov r0, r7
	mov r1, r4
	add r3, sp, #0x2c
	bl ov00_022F5798
	ldr r2, [sp, #0x2c]
	mov r1, #0
	mov r0, r5
	strb r1, [r4, r2]
	bl ov00_022F5514
	ldr r1, [sp, #0x10]
	str r0, [r1, sb, lsl #2]
	mov r0, r4
	bl ov00_022F5514
	str r0, [fp, sb, lsl #2]
	ldr r1, [sp, #0x38]
	mov r0, sl
	ldr r1, [r1, #0xc]
	mov r2, r5
	ldr r1, [r1, #0x38]
	add r3, sp, #0x24
	bl ov00_023068C4
	cmp r0, #0
	ldreq r0, [sp, #0x24]
	cmpeq r0, #0
	mov r0, sl
	bne _023020B0
	ldr r1, [sp, #0x38]
	mov r2, r5
	ldr r1, [r1, #0xc]
	mov r3, r4
	ldr r1, [r1, #0x38]
	bl ov00_02306798
	b _023020C8
_023020B0:
	ldr r1, [sp, #0x38]
	mov r2, r5
	ldr r1, [r1, #0xc]
	mov r3, r4
	ldr r1, [r1, #0x38]
	bl ov00_02306820
_023020C8:
	add sb, sb, #1
	cmp sb, r8
	blt _02301FD0
_023020D4:
	ldr r0, [sp, #8]
	ldr r4, [r0, #0x44]
	cmp r4, #0
	beq _023020F8
_023020E4:
	ldr r0, [r4, #0x10]
	cmp r0, #0x68
	ldrne r4, [r4, #0xc]
	cmpne r4, #0
	bne _023020E4
_023020F8:
	cmp r4, #0
	addeq sp, sp, #0x3c
	addeq sp, sp, #0x800
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r4, #0x10]
	cmp r0, #0x68
	bne _02302180
	ldr r0, [r4, #8]
	cmp r0, #0
	beq _02302180
	mov r0, #0x10
	bl ov00_022F5AE4
	ldmib r4, {r5, r6}
	mov r3, r0
	ldr r0, [sp, #0x10]
	str r8, [r3, #0xc]
	stmib r3, {r0, fp}
	ldr r0, [sp, #8]
	mov r2, #0
	ldr r0, [r0, #0x10]
	add r1, sp, #0x14
	str r0, [r3]
	str r2, [sp]
	mov r2, #0xe
	mov r0, sl
	str r6, [sp, #0x14]
	str r5, [sp, #0x18]
	str r2, [sp, #4]
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	ldr r0, [sp, #8]
	mov r1, r4
	bl ov00_02308618
_02302180:
	mov r0, #0
	add sp, sp, #0x3c
	add sp, sp, #0x800
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_02302190: .word ov00_0231AF54
_02302194: .word ov00_0231AF50
_02302198: .word ov00_0231AF68
_0230219C: .word ov00_0231AF70
	arm_func_end ov00_02301D50

	arm_func_start ov00_023021A0
ov00_023021A0: ; 0x023021A0
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r0
	add r2, sp, #0
	ldr r5, [r4]
	bl ov00_02308A4C
	cmp r0, #0
	bne _023021D0
	ldr r1, _02302268 ; =ov00_0231AF54
	mov r0, r4
	bl ov00_0230BCCC
	mov r0, #2
	ldmia sp!, {r3, r4, r5, pc}
_023021D0:
	ldr r1, [sp]
	ldr r0, [r1, #0x14]
	cmp r0, #0
	bne _023021F4
	ldr r1, _02302268 ; =ov00_0231AF54
	mov r0, r4
	bl ov00_0230BCCC
	mov r0, #2
	ldmia sp!, {r3, r4, r5, pc}
_023021F4:
	mov r0, r4
	bl ov00_02300524
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r1, [sp]
	ldr r0, [r1, #0x18]
	sub r0, r0, #1
	str r0, [r1, #0x18]
	ldr r0, [r5, #0x100]
	cmp r0, #0
	bne _02302260
	ldr r1, [sp]
	ldr r0, [r1, #0x18]
	cmp r0, #0
	bgt _02302260
	ldr r0, [r1, #0x14]
	bl ov00_022F5B14
	ldr r0, [sp]
	mov r1, #0
	str r1, [r0, #0x14]
	ldr r0, [sp]
	bl ov00_02308E00
	cmp r0, #0
	beq _02302260
	ldr r1, [sp]
	mov r0, r4
	bl ov00_02308BCC
_02302260:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_02302268: .word ov00_0231AF54
	arm_func_end ov00_023021A0

	arm_func_start ov00_0230226C
ov00_0230226C: ; 0x0230226C
	ldr r3, [r1, #8]
	cmp r3, #0
	beq _0230228C
	ldr r0, [r3]
	cmp r0, r2
	subgt r0, r0, #1
	strgt r0, [r3]
	bgt _023022A8
_0230228C:
	ldr r1, [r1, #0xc]
	cmp r1, #0
	beq _023022A8
	ldr r0, [r1]
	cmp r0, r2
	subgt r0, r0, #1
	strgt r0, [r1]
_023022A8:
	mov r0, #1
	bx lr
	arm_func_end ov00_0230226C

	arm_func_start ov00_023022B0
ov00_023022B0: ; 0x023022B0
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #4
	mov r5, r2
	mov r6, r0
	add r2, sp, #0
	ldr r4, [r6]
	bl ov00_02308A4C
	cmp r0, #0
	bne _023022EC
	ldr r1, _02302504 ; =ov00_0231AF54
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #4
	mov r0, #2
	ldmia sp!, {r3, r4, r5, r6, pc}
_023022EC:
	cmp r5, #1
	bne _02302358
	ldr r2, _02302508 ; =ov00_0231AF94
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	ldr r2, _0230250C ; =ov00_0231ADE4
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	ldr r2, [r4, #0x198]
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302668
	ldr r2, _02302510 ; =ov00_0231AFA0
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	mov r0, r6
	add r1, r4, #0x210
	ldr r2, [sp]
	ldr r2, [r2]
	bl ov00_02302668
	mov r0, r6
	add r1, r4, #0x210
	ldr r2, _02302514 ; =ov00_0231AE08
	bl ov00_02302638
_02302358:
	ldr r0, [sp]
	ldr r1, [r0, #8]
	cmp r1, #0
	beq _023023F4
	ldr r0, [r1, #8]
	ldr r5, [r1]
	bl ov00_022F5B14
	ldr r0, [sp]
	mov r1, #0
	ldr r0, [r0, #8]
	str r1, [r0, #8]
	ldr r0, [sp]
	ldr r0, [r0, #8]
	ldr r0, [r0, #0xc]
	bl ov00_022F5B14
	ldr r0, [sp]
	mov r1, #0
	ldr r0, [r0, #8]
	str r1, [r0, #0xc]
	ldr r0, [sp]
	ldr r0, [r0, #8]
	bl ov00_022F5B14
	ldr r0, [sp]
	mov r1, #0
	str r1, [r0, #8]
	ldr r0, [sp]
	bl ov00_02308E00
	cmp r0, #0
	beq _023023D8
	ldr r1, [sp]
	mov r0, r6
	bl ov00_02308BCC
_023023D8:
	ldr r0, [r4, #0x5d0]
	ldr r1, _02302518 ; =ov00_0230226C
	sub r3, r0, #1
	mov r0, r6
	mov r2, r5
	str r3, [r4, #0x5d0]
	bl ov00_02308CA8
_023023F4:
	ldr r0, [sp]
	ldr r1, [r0, #0xc]
	cmp r1, #0
	beq _023024F8
	ldr r0, [r1, #8]
	ldr r5, [r1]
	bl ov00_022F5B14
	ldr r0, [sp]
	mov r1, #0
	ldr r0, [r0, #0xc]
	str r1, [r0, #8]
	ldr r0, [sp]
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0xc]
	bl ov00_022F5B14
	ldr r0, [sp]
	mov r1, #0
	ldr r0, [r0, #0xc]
	str r1, [r0, #0xc]
	ldr r0, [sp]
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x10]
	bl ov00_022F5B14
	ldr r0, [sp]
	mov r1, #0
	ldr r0, [r0, #0xc]
	str r1, [r0, #0x10]
	ldr r0, [sp]
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x14]
	bl ov00_022F5B14
	ldr r0, [sp]
	mov r1, #0
	ldr r0, [r0, #0xc]
	str r1, [r0, #0x14]
	ldr r0, [sp]
	ldr r0, [r0, #0xc]
	bl ov00_022F5B14
	ldr r0, [sp]
	mov r1, #0
	str r1, [r0, #0xc]
	ldr r0, [sp]
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x38]
	cmp r0, #0
	beq _023024C0
	bl ov00_022F4758
	ldr r0, [sp]
	mov r1, #0
	ldr r0, [r0, #0xc]
	str r1, [r0, #0x38]
_023024C0:
	ldr r0, [sp]
	bl ov00_02308E00
	cmp r0, #0
	beq _023024DC
	ldr r1, [sp]
	mov r0, r6
	bl ov00_02308BCC
_023024DC:
	ldr r0, [r4, #0x5d0]
	ldr r1, _02302518 ; =ov00_0230226C
	sub r3, r0, #1
	mov r0, r6
	mov r2, r5
	str r3, [r4, #0x5d0]
	bl ov00_02308CA8
_023024F8:
	mov r0, #0
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, pc}
	.align 2, 0
_02302504: .word ov00_0231AF54
_02302508: .word ov00_0231AF94
_0230250C: .word ov00_0231ADE4
_02302510: .word ov00_0231AFA0
_02302514: .word ov00_0231AE08
_02302518: .word ov00_0230226C
	arm_func_end ov00_023022B0

	arm_func_start ov00_0230251C
ov00_0230251C: ; 0x0230251C
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r4, r1
	ldr r5, [r4, #8]
	ldr r6, [r4, #4]
	mov r8, r0
	mov r7, r2
	cmp r6, r5
	ldr r0, [r4]
	bne _02302568
	add r6, r6, #0x800
	add r1, r6, #1
	bl ov00_022F5AFC
	cmp r0, #0
	bne _02302568
	ldr r1, _02302590 ; =ov00_0231AFB0
	mov r0, r8
	bl ov00_0230BCCC
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_02302568:
	strb r7, [r0, r5]
	add r1, r5, #1
	mov r2, #0
	strb r2, [r0, r1]
	ldr r1, [r4, #8]
	add r1, r1, #1
	str r1, [r4, #8]
	stmia r4, {r0, r6}
	mov r0, r2
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_02302590: .word ov00_0231AFB0
	arm_func_end ov00_0230251C

	arm_func_start ov00_02302594
ov00_02302594: ; 0x02302594
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	movs r8, r2
	mov sl, r0
	mov sb, r1
	mov r7, r3
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	ldr r4, [sb, #8]
	ldr r5, [sb, #4]
	ldr r6, [sb]
	sub r0, r5, r4
	cmp r0, r7
	bge _02302600
	cmp r7, #0x800
	movlt r0, #0x800
	movge r0, r7
	add r5, r5, r0
	mov r0, r6
	add r1, r5, #1
	bl ov00_022F5AFC
	movs r6, r0
	bne _02302600
	ldr r1, _02302634 ; =ov00_0231AFB0
	mov r0, sl
	bl ov00_0230BCCC
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_02302600:
	mov r1, r8
	mov r2, r7
	add r0, r6, r4
	bl memcpy
	add r1, r4, r7
	mov r0, #0
	strb r0, [r6, r1]
	ldr r1, [sb, #8]
	add r1, r1, r7
	str r1, [sb, #8]
	str r5, [sb, #4]
	str r6, [sb]
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_02302634: .word ov00_0231AFB0
	arm_func_end ov00_02302594

	arm_func_start ov00_02302638
ov00_02302638: ; 0x02302638
	stmdb sp!, {r4, r5, r6, lr}
	mov r4, r2
	mov r6, r0
	mov r5, r1
	mov r0, r4
	bl strlen
	mov r3, r0
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_02302594
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_02302638

	arm_func_start ov00_02302668
ov00_02302668: ; 0x02302668
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0x10
	mov r4, r1
	mov r5, r0
	ldr r1, _0230269C ; =ov00_0231AFC0
	add r0, sp, #0
	bl sub_020790DC
	add r2, sp, #0
	mov r0, r5
	mov r1, r4
	bl ov00_02302638
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_0230269C: .word ov00_0231AFC0
	arm_func_end ov00_02302668

	arm_func_start ov00_023026A0
ov00_023026A0: ; 0x023026A0
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r8, r1
	mov r7, r0
	mov r1, r2
	mov r2, r3
	mov r0, r8
	mov r3, #0
	ldr r6, [sp, #0x18]
	ldr r5, [sp, #0x1c]
	ldr r4, [sp, #0x20]
	bl SocketSend
	mvn r1, #0
	cmp r0, r1
	bne _0230274C
	mov r0, r8
	bl ov00_022F5194
	mvn r2, #5
	cmp r0, r2
	subne r1, r2, #0x14
	cmpne r0, r1
	subne r1, r2, #0x46
	cmpne r0, r1
	beq _0230273C
	ldrsb r0, [r4]
	cmp r0, #0x50
	ldreqsb r0, [r4, #1]
	cmpeq r0, #0x52
	moveq r0, #3
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r2, _02302778 ; =ov00_0231AFC4
	mov r0, r7
	mov r1, #5
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #0
	bl ov00_02302DEC
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_0230273C:
	mov r0, #0
	str r0, [r5]
	str r0, [r6]
	b _02302770
_0230274C:
	cmp r0, #0
	strne r0, [r5]
	movne r0, #0
	strne r0, [r6]
	bne _02302770
	mov r0, #0
	str r0, [r5]
	mov r0, #1
	str r0, [r6]
_02302770:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_02302778: .word ov00_0231AFC4
	arm_func_end ov00_023026A0

	arm_func_start ov00_0230277C
ov00_0230277C: ; 0x0230277C
	mov r0, #0
	bx lr
	arm_func_end ov00_0230277C

	arm_func_start ov00_02302784
ov00_02302784: ; 0x02302784
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #8
	mov sb, r0
	ldr r4, [sb]
	movs r6, r3
	mov r5, #0
	mov r8, r1
	mov r7, r2
	addeq sp, sp, #8
	moveq r0, r5
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	ldr r1, [r8, #0x34]
	ldr r0, [r8, #0x38]
	subs r0, r1, r0
	bne _02302850
	ldr r0, [r8, #0x3c]
	bl ov00_022F47A0
	cmp r0, #0
	bne _02302850
	ldrh r1, [r8, #0xc]
	ldr r0, [r8, #8]
	bl ov00_022F8C50
	sub r0, r0, #0x17
	cmp r6, r0
	bgt _02302814
	str r6, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldrh r1, [r8, #0xc]
	ldr r0, [r8, #8]
	mov r3, r7
	add r2, r4, #0x220
	bl ov00_022F8848
	mov r5, r6
	mov r6, #0
	b _02302850
_02302814:
	ldrh r1, [r8, #0xc]
	ldr r0, [r8, #8]
	bl ov00_022F8C50
	cmp r0, #0x17
	bls _02302850
	sub r5, r0, #0x17
	str r5, [sp]
	mov r0, #1
	str r0, [sp, #4]
	ldrh r1, [r8, #0xc]
	ldr r0, [r8, #8]
	mov r3, r7
	add r2, r4, #0x220
	bl ov00_022F8848
	sub r6, r6, r5
_02302850:
	cmp r6, #0
	beq _02302878
	mov r0, sb
	mov r3, r6
	add r1, r8, #0x2c
	add r2, r7, r5
	bl ov00_02302594
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_02302878:
	mov r0, #0
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_02302784

	arm_func_start ov00_02302884
ov00_02302884: ; 0x02302884
	stmdb sp!, {r4, r5, r6, lr}
	mov r4, r2
	mov r6, r0
	mov r5, r1
	mov r0, r4
	bl strlen
	mov r3, r0
	mov r0, r6
	mov r1, r5
	mov r2, r4
	bl ov00_02302784
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_02302884

	arm_func_start ov00_023028B4
ov00_023028B4: ; 0x023028B4
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x18
	str r0, [sp]
	mvn r0, #0
	str r0, [sp, #8]
	sub r0, r0, #0x4b
	str r0, [sp, #0x14]
	ldr r0, [sp, #8]
	mov fp, r2
	sub r0, r0, #0x19
	str r0, [sp, #0x10]
	ldr r0, [sp, #8]
	mov r8, #0
	sub r0, r0, #5
	ldr r5, [fp, #8]
	ldmia fp, {r4, r6}
	mov sl, r1
	str r3, [sp, #4]
	mov sb, r8
	str r0, [sp, #0xc]
_02302904:
	add r0, r5, #0x800
	cmp r0, r6
	ble _02302944
	mov r6, r0
	add r1, r0, #1
	mov r0, r4
	bl ov00_022F5AFC
	movs r4, r0
	bne _02302940
	ldr r1, _023029FC ; =ov00_0231AFB0
	ldr r0, [sp]
	bl ov00_0230BCCC
	add sp, sp, #0x18
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02302940:
	stmia fp, {r4, r6}
_02302944:
	mov r0, sl
	add r1, r4, r5
	sub r2, r6, r5
	mov r3, #0
	bl SocketRecv
	mov r7, r0
	ldr r0, [sp, #8]
	cmp r7, r0
	bne _023029A4
	mov r0, sl
	bl ov00_022F5194
	ldr r1, [sp, #0xc]
	cmp r0, r1
	ldrne r1, [sp, #0x10]
	cmpne r0, r1
	ldrne r1, [sp, #0x14]
	cmpne r0, r1
	beq _023029B4
	ldr r1, _02302A00 ; =ov00_0231AFEC
	ldr r0, [sp]
	bl ov00_0230BCCC
	add sp, sp, #0x18
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023029A4:
	cmp r7, #0
	moveq sb, #1
	addne r5, r5, r7
	addne r8, r8, r7
_023029B4:
	mov r0, #0
	cmp r7, #0
	strb r0, [r4, r5]
	blt _023029D4
	cmp sb, #0
	bne _023029D4
	cmp r8, #0x20000
	blt _02302904
_023029D4:
	str r4, [fp]
	str r5, [fp, #8]
	ldr r0, [sp, #4]
	str r6, [fp, #4]
	str r8, [r0]
	ldr r1, [sp, #0x40]
	mov r0, #0
	str sb, [r1]
	add sp, sp, #0x18
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_023029FC: .word ov00_0231AFB0
_02302A00: .word ov00_0231AFEC
	arm_func_end ov00_023028B4

	arm_func_start ov00_02302A04
ov00_02302A04: ; 0x02302A04
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x1c
	mov sl, r0
	mov r0, r2
	ldr fp, [r2, #8]
	ldr r7, [r2, #0xc]
	ldr r8, [sp, #0x44]
	ldr r6, [r0]
	str r2, [sp, #0xc]
	mov sb, r1
	str r3, [sp, #0x10]
	subs r5, fp, r7
	mov r4, #0
	addeq sp, sp, #0x1c
	moveq r0, r4
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02302A44:
	add r0, sp, #0x18
	str r0, [sp]
	add r1, r7, r4
	add r0, sp, #0x14
	str r0, [sp, #4]
	add r2, r6, r1
	mov r0, sl
	mov r1, sb
	mov r3, r5
	str r8, [sp, #8]
	bl ov00_023026A0
	cmp r0, #0
	addne sp, sp, #0x1c
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [sp, #0x14]
	cmp r0, #0
	subne r5, r5, r0
	addne r4, r4, r0
	cmp r0, #0
	cmpne r5, #0
	bne _02302A44
	ldr r0, [sp, #0x40]
	cmp r0, #0
	beq _02302AC4
	cmp r4, #0
	ble _02302AC8
	mov r0, r6
	add r1, r6, r4
	add r2, r5, #1
	bl memmove
	sub fp, fp, r4
	b _02302AC8
_02302AC4:
	add r7, r7, r4
_02302AC8:
	ldr r0, [sp, #0xc]
	str fp, [r0, #8]
	str r7, [r0, #0xc]
	ldr r0, [sp, #0x10]
	cmp r0, #0
	ldrne r1, [sp, #0x18]
	strne r1, [r0]
	mov r0, #0
	add sp, sp, #0x1c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_02302A04

	arm_func_start ov00_02302AF0
ov00_02302AF0: ; 0x02302AF0
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x14
	str r3, [sp, #8]
	ldr r3, [r3, #8]
	mov sl, r1
	str r3, [sp, #0xc]
	ldr r3, [sp, #8]
	ldr r1, [sp, #0xc]
	ldr r6, [r3, #0xc]
	ldr fp, [r0]
	subs r4, r1, r6
	ldr r1, [sp, #0x38]
	mov r0, r3
	str r1, [sp, #0x38]
	ldr r5, [r0]
	mov r7, #0
	mov sb, r2
	addeq sp, sp, #0x14
	moveq r0, r7
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r0, sl
	mov r1, sb
	bl ov00_022F8C50
	sub r0, r0, #0x17
	cmp r4, r0
	bgt _02302B84
	mov r0, sl
	mov r1, sb
	str r4, [sp]
	mov r7, #1
	add r2, fp, #0x220
	add r3, r5, r6
	str r7, [sp, #4]
	bl ov00_022F8848
	mov r7, r4
	mov r4, #0
	b _02302BD4
_02302B84:
	mov r0, sl
	mov r1, sb
	bl ov00_022F8C50
	sub r8, r0, #0x17
	cmp r8, #0x17
	bls _02302BD4
	add r1, r6, r7
	add r3, r5, r1
	str r8, [sp]
	mov r1, #1
	str r1, [sp, #4]
	mov r0, sl
	mov r1, sb
	add r2, fp, #0x220
	bl ov00_022F8848
	cmp r0, #8
	beq _02302BD4
	add r7, r7, r8
	subs r4, r4, r8
	bne _02302B84
_02302BD4:
	ldr r0, [sp, #0x3c]
	cmp r0, #0
	beq _02302C08
	cmp r7, #0
	beq _02302C0C
	mov r0, r5
	add r1, r5, r7
	add r2, r4, #1
	bl memmove
	ldr r0, [sp, #0xc]
	sub r0, r0, r7
	str r0, [sp, #0xc]
	b _02302C0C
_02302C08:
	add r6, r6, r7
_02302C0C:
	ldr r1, [sp, #0xc]
	ldr r0, [sp, #8]
	ldr r3, [sp, #8]
	str r1, [r0, #8]
	add r2, sp, #0x10
	mov r0, sl
	mov r1, sb
	str r6, [r3, #0xc]
	bl ov00_022F8578
	ldr r0, [sp, #0x10]
	cmp r0, #3
	ldreq r0, [sp, #0x38]
	moveq r1, #1
	ldrne r0, [sp, #0x38]
	movne r1, #0
	str r1, [r0]
	mov r0, #0
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	arm_func_end ov00_02302AF0

	arm_func_start ov00_02302C58
ov00_02302C58: ; 0x02302C58
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x10
	mov r5, r2
	mov r0, #0
	mov r6, r1
	str r0, [r5]
	ldr r1, [r6, #8]
	mov r7, r3
	cmp r1, #5
	addlt sp, sp, #0x10
	ldmltia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r0, [r6]
	mov r1, #0xa
	bl strchr
	movs r4, r0
	beq _02302D7C
	ldr r1, _02302D88 ; =ov00_0231B018
	sub r0, r4, #5
	mov r2, #5
	bl strncmp
	cmp r0, #0
	addne sp, sp, #0x10
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	mov r0, #0
	strb r0, [r4]
	ldr r0, [r6]
	ldr r1, _02302D8C ; =ov00_0231B020
	add r2, sp, #0
	mov r3, #0x10
	bl ov00_0230BA28
	cmp r0, #0
	addeq sp, sp, #0x10
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	add r0, sp, #0
	bl sub_0208B360
	str r0, [r7]
	ldr r0, [r6]
	ldr r1, _02302D90 ; =ov00_0231B024
	add r2, sp, #0
	mov r3, #0x10
	bl ov00_0230BA28
	cmp r0, #0
	addeq sp, sp, #0x10
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	add r0, sp, #0
	bl sub_0208B360
	ldr r2, [r6]
	add r1, r0, #1
	sub r2, r4, r2
	ldr r3, [r6, #8]
	add r2, r1, r2
	cmp r3, r2
	ble _02302D74
	ldrsb r2, [r4, r1]
	cmp r2, #0
	addne sp, sp, #0x10
	movne r0, #3
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	add r3, r4, #1
	ldr r2, [sp, #0x28]
	str r3, [r5]
	str r0, [r2]
	ldr r0, [r6]
	sub r0, r4, r0
	add r0, r1, r0
	add r0, r0, #1
	str r0, [r6, #0xc]
	b _02302D7C
_02302D74:
	mov r0, #0xa
	strb r0, [r4]
_02302D7C:
	mov r0, #0
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_02302D88: .word ov00_0231B018
_02302D8C: .word ov00_0231B020
_02302D90: .word ov00_0231B024
	arm_func_end ov00_02302C58

	arm_func_start ov00_02302D94
ov00_02302D94: ; 0x02302D94
	stmdb sp!, {r4, lr}
	movs r4, r1
	ldrne r0, [r4]
	cmpne r0, #0
	ldrne r1, [r4, #0xc]
	cmpne r1, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	ldr r0, [r4, #8]
	subs r2, r0, r1
	str r2, [r4, #8]
	beq _02302DD4
	ldr r0, [r4]
	ldr r1, [r4, #0xc]
	add r1, r0, r1
	bl memmove
_02302DD4:
	ldr r2, [r4]
	ldr r1, [r4, #8]
	mov r0, #0
	strb r0, [r2, r1]
	str r0, [r4, #0xc]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_02302D94

	arm_func_start ov00_02302DEC
ov00_02302DEC: ; 0x02302DEC
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x10
	mov r4, r0
	mov r6, r2
	cmp r6, #1
	ldr r5, [r4]
	moveq r0, #1
	streq r0, [r5, #0x5bc]
	mov r7, r1
	ldr r1, [r5, #0x1a8]
	ldr r0, [r5, #0x1ac]
	str r1, [sp, #8]
	str r0, [sp, #0xc]
	cmp r1, #0
	addeq sp, sp, #0x10
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r0, #0x10
	bl ov00_022F5AE4
	movs r3, r0
	beq _02302E4C
	str r7, [r3]
	str r6, [r3, #0xc]
	ldr r0, [r5, #0x5b8]
	stmib r3, {r0, r5}
_02302E4C:
	mov r2, #0
	str r2, [sp]
	mov r2, #1
	add r1, sp, #8
	str r2, [sp, #4]
	mov r0, r4
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_02302DEC

	arm_func_start ov00_02302E74
ov00_02302E74: ; 0x02302E74
	stmdb sp!, {r0, r1, r2, r3}
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	mov r0, #0x18
	mov r5, r3
	ldr r4, [r6]
	bl ov00_022F5AE4
	cmp r0, #0
	bne _02302EB4
	ldr r1, _02302F14 ; =ov00_0231B02C
	mov r0, r6
	bl ov00_0230BCCC
	mov r0, #1
	ldmia sp!, {r4, r5, r6, lr}
	add sp, sp, #0x10
	bx lr
_02302EB4:
	ldr r1, [sp, #0x14]
	ldr r2, [sp, #0x18]
	str r1, [r0]
	ldr r1, [sp, #0x20]
	stmib r0, {r2, r5}
	cmp r1, #0
	ldrne r1, [r1, #0x18]
	ldr r2, [sp, #0x24]
	moveq r1, #0
	str r1, [r0, #0x10]
	mov r1, #0
	str r2, [r0, #0xc]
	str r1, [r0, #0x14]
	ldr r1, [r4, #0x5d8]
	cmp r1, #0
	streq r0, [r4, #0x5d8]
	ldr r1, [r4, #0x5dc]
	cmp r1, #0
	strne r0, [r1, #0x14]
	str r0, [r4, #0x5dc]
	mov r0, #0
	ldmia sp!, {r4, r5, r6, lr}
	add sp, sp, #0x10
	bx lr
	.align 2, 0
_02302F14: .word ov00_0231B02C
	arm_func_end ov00_02302E74

	arm_func_start ov00_02302F18
ov00_02302F18: ; 0x02302F18
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r4, r1
	ldr r1, [r4, #8]
	ldr r2, [r4, #4]
	ldr r3, [r4]
	mov r5, r0
	blx r3
	ldr r0, [r4, #0xc]
	cmp r0, #2
	bne _02302F5C
	ldr r0, [r4, #8]
	ldr r0, [r0, #8]
	bl ov00_022F5B14
	ldr r0, [r4, #8]
	mov r1, #0
	str r1, [r0, #8]
	b _02303194
_02302F5C:
	cmp r0, #0xb
	bne _02302F80
	ldr r0, [r4, #8]
	ldr r0, [r0, #8]
	bl ov00_022F5B14
	ldr r0, [r4, #8]
	mov r1, #0
	str r1, [r0, #8]
	b _02303194
_02302F80:
	cmp r0, #3
	bne _02303000
	ldr r7, [r4, #8]
	mov r6, #0
	ldr r0, [r7, #0x38]
	cmp r0, #0
	ble _02302FDC
	mov r5, r6
	mov r8, r6
_02302FA4:
	ldr r0, [r7, #0x3c]
	ldr r0, [r0, r6, lsl #2]
	bl ov00_022F5B14
	ldr r0, [r7, #0x3c]
	str r5, [r0, r6, lsl #2]
	ldr r0, [r7, #0x40]
	ldr r0, [r0, r6, lsl #2]
	bl ov00_022F5B14
	ldr r0, [r7, #0x40]
	str r8, [r0, r6, lsl #2]
	ldr r0, [r7, #0x38]
	add r6, r6, #1
	cmp r6, r0
	blt _02302FA4
_02302FDC:
	ldr r0, [r7, #0x3c]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r7, #0x3c]
	ldr r0, [r7, #0x40]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r7, #0x40]
	b _02303194
_02303000:
	cmp r0, #4
	bne _02303020
	ldr r5, [r4, #8]
	ldr r0, [r5, #0xc]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r5, #0xc]
	b _02303194
_02303020:
	cmp r0, #7
	bne _02303048
	ldr r5, [r4, #8]
	ldr r0, [r5, #0x10]
	cmp r0, #0
	beq _02303194
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r5, #0x10]
	b _02303194
_02303048:
	cmp r0, #8
	bne _02303070
	ldr r5, [r4, #8]
	ldr r0, [r5, #8]
	cmp r0, #0
	beq _02303194
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r5, #8]
	b _02303194
_02303070:
	cmp r0, #9
	bne _023030C8
	ldr r6, [r4, #8]
	mov r5, #0
	ldr r0, [r6, #4]
	cmp r0, #0
	ble _023030B4
	mov r7, r5
_02303090:
	ldr r0, [r6, #8]
	ldr r0, [r0, r5, lsl #2]
	bl ov00_022F5B14
	ldr r0, [r6, #8]
	str r7, [r0, r5, lsl #2]
	ldr r0, [r6, #4]
	add r5, r5, #1
	cmp r5, r0
	blt _02303090
_023030B4:
	ldr r0, [r6, #8]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r6, #8]
	b _02303194
_023030C8:
	cmp r0, #0xc
	bne _023030E8
	ldr r1, [r4, #8]
	mov r0, r5
	ldr r1, [r1]
	mov r2, #0
	bl ov00_023022B0
	b _02303194
_023030E8:
	cmp r0, #0xd
	bne _02303110
	ldr r5, [r4, #8]
	ldr r0, [r5, #8]
	cmp r0, #0
	beq _02303194
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r5, #8]
	b _02303194
_02303110:
	cmp r0, #0xe
	bne _02303194
	ldr r6, [r4, #8]
	ldr r0, [r6, #0xc]
	cmp r0, #0
	beq _02303194
	cmp r0, #0
	mov r7, #0
	ble _02303174
	mov r5, r7
	mov r8, r7
_0230313C:
	ldr r0, [r6, #4]
	ldr r0, [r0, r7, lsl #2]
	bl ov00_022F5B14
	ldr r0, [r6, #4]
	str r5, [r0, r7, lsl #2]
	ldr r0, [r6, #8]
	ldr r0, [r0, r7, lsl #2]
	bl ov00_022F5B14
	ldr r0, [r6, #8]
	str r8, [r0, r7, lsl #2]
	ldr r0, [r6, #0xc]
	add r7, r7, #1
	cmp r7, r0
	blt _0230313C
_02303174:
	ldr r0, [r6, #4]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r6, #4]
	ldr r0, [r6, #8]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r6, #8]
_02303194:
	ldr r0, [r4, #8]
	bl ov00_022F5B14
	mov r1, #0
	mov r0, r4
	str r1, [r4, #8]
	bl ov00_022F5B14
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_02302F18

	arm_func_start ov00_023031B0
ov00_023031B0: ; 0x023031B0
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	mov sl, r0
	movs sb, r1
	ldr r4, [sl]
	beq _0230324C
	ldr r5, [r4, #0x5d8]
	ldr r6, [r4, #0x5dc]
	mov r7, #0
	str r7, [r4, #0x5d8]
	mov r1, r5
	str r7, [r4, #0x5dc]
	cmp r5, #0
	beq _0230322C
_023031E4:
	ldr r0, [r1, #0x10]
	ldr r8, [r1, #0x14]
	cmp r0, sb
	ldrne r0, [r1, #0xc]
	cmpne r0, #1
	bne _0230321C
	mov r0, sl
	cmp r7, #0
	strne r8, [r7, #0x14]
	moveq r5, r8
	cmp r6, r1
	moveq r6, r7
	bl ov00_02302F18
	b _02303220
_0230321C:
	mov r7, r1
_02303220:
	mov r1, r8
	cmp r8, #0
	bne _023031E4
_0230322C:
	ldr r0, [r4, #0x5d8]
	cmp r0, #0
	ldrne r0, [r4, #0x5dc]
	strne r5, [r0, #0x14]
	streq r5, [r4, #0x5d8]
	str r6, [r4, #0x5dc]
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_0230324C:
	ldr r1, [r4, #0x5d8]
	cmp r1, #0
	beq _02303290
	mov r5, #0
_0230325C:
	str r5, [r4, #0x5d8]
	str r5, [r4, #0x5dc]
	cmp r1, #0
	beq _02303284
_0230326C:
	ldr r6, [r1, #0x14]
	mov r0, sl
	bl ov00_02302F18
	mov r1, r6
	cmp r6, #0
	bne _0230326C
_02303284:
	ldr r1, [r4, #0x5d8]
	cmp r1, #0
	bne _0230325C
_02303290:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	arm_func_end ov00_023031B0

	arm_func_start ov00_02303298
ov00_02303298: ; 0x02303298
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov r8, r1
	mov sb, r0
	cmp r8, #0
	mov r7, #0
	ble _023032EC
	ldr r6, _023032F8 ; =ov00_0231B07C
	ldr r5, _023032FC ; =0x08421085
	mov r4, #0x3e
_023032BC:
	bl sub_020895B0
	umull r1, r2, r0, r5
	sub r1, r0, r2
	add r2, r2, r1, lsr #1
	mov r2, r2, lsr #5
	umull r1, r2, r4, r2
	sub r2, r0, r1
	ldrsb r0, [r6, r2]
	strb r0, [sb, r7]
	add r7, r7, #1
	cmp r7, r8
	blt _023032BC
_023032EC:
	mov r0, #0
	strb r0, [sb, r7]
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_023032F8: .word ov00_0231B07C
_023032FC: .word 0x08421085
	arm_func_end ov00_02303298

	arm_func_start ov00_02303300
ov00_02303300: ; 0x02303300
	stmdb sp!, {r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x24
	mov r7, r0
	ldr r4, [r7]
	mov r6, r1
	ldr r1, _0230362C ; =ov00_0231B0BC
	add r0, r4, #0x220
	mov r2, #0x10
	bl strncpy
	bl ov00_022F840C
	cmp r0, #0
	bne _0230340C
	mov r1, #0
	str r1, [sp]
	str r1, [sp, #4]
	str r1, [sp, #8]
	str r1, [sp, #0xc]
	ldr r5, _02303630 ; =0x00001964
	str r1, [sp, #0x10]
	str r1, [sp, #0x14]
	mov r0, r5
	mov r2, r1
	mov r3, r1
	str r1, [sp, #0x18]
	bl ov00_022F841C
	cmp r0, #0
	beq _023033F8
	mov sb, #0
	add r8, r5, #0x64
	b _023033B4
_02303378:
	str sb, [sp]
	str sb, [sp, #4]
	str sb, [sp, #8]
	add r0, r5, #1
	str sb, [sp, #0xc]
	mov r0, r0, lsl #0x10
	str sb, [sp, #0x10]
	mov r5, r0, lsr #0x10
	str sb, [sp, #0x14]
	mov r0, r5
	mov r1, sb
	mov r2, sb
	mov r3, sb
	str sb, [sp, #0x18]
	bl ov00_022F841C
_023033B4:
	cmp r0, #0
	beq _023033C4
	cmp r5, r8
	blo _02303378
_023033C4:
	cmp r0, #0
	beq _023033F8
	ldr r2, _02303634 ; =ov00_0231B0C8
	mov r0, r7
	mov r1, #8
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x24
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
_023033F8:
	ldr r0, [r4, #0x10c]
	cmp r0, #0
	addeq r0, r4, #0x200
	streqh r5, [r0, #0x30]
	b _02303418
_0230340C:
	bl ov00_022F89F0
	add r1, r4, #0x200
	strh r0, [r1, #0x30]
_02303418:
	ldr r0, _02303638 ; =ov00_0230847C
	ldr r1, _0230363C ; =ov00_023085CC
	str r0, [sp]
	ldr r0, _02303640 ; =ov00_023084A4
	str r1, [sp, #4]
	str r0, [sp, #8]
	add r0, r4, #0x220
	ldr r3, _02303644 ; =ov00_0230859C
	mov r1, r0
	mov r2, #0
	str r7, [sp, #0xc]
	bl ov00_022F8A0C
	cmp r0, #0
	beq _0230347C
	ldr r2, _02303648 ; =ov00_0231B0F0
	mov r0, r7
	mov r1, #8
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x24
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
_0230347C:
	ldr r0, [r4, #0x10c]
	mov r2, #0
	cmp r0, #0
	addne r0, r4, #0x200
	movne r1, #0
	strneh r1, [r0, #0x30]
	mov r0, #2
	mov r1, #1
	bl SocketCreate
	mvn r1, #0
	str r0, [r4, #0x1f0]
	cmp r0, r1
	bne _023034DC
	ldr r2, _0230364C ; =ov00_0231B11C
	mov r0, r7
	mov r1, #5
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x24
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
_023034DC:
	mov r1, #0
	bl SocketSetBlocking
	cmp r0, #0
	bne _02303518
	ldr r2, _02303650 ; =ov00_0231B144
	mov r0, r7
	mov r1, #5
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x24
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
_02303518:
	add r3, sp, #0x1c
	mov r2, #0
	ldr r0, _02303654 ; =ov00_0231B03C
	str r2, [r3]
	mov r1, #2
	str r2, [r3, #4]
	strb r1, [sp, #0x1d]
	bl ov00_022F5178
	mvn r1, #0
	cmp r0, r1
	bne _02303594
	ldr r0, _02303654 ; =ov00_0231B03C
	bl ov00_022CF3D4
	cmp r0, #0
	bne _02303580
	ldr r2, _02303658 ; =ov00_0231B178
	mov r0, r7
	mov r1, #5
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x24
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
_02303580:
	ldr r0, [r0, #0xc]
	ldr r0, [r0]
	ldr r0, [r0]
	str r0, [sp, #0x20]
	b _023035A0
_02303594:
	ldr r0, _02303654 ; =ov00_0231B03C
	bl ov00_022F5178
	str r0, [sp, #0x20]
_023035A0:
	ldr r0, _0230365C ; =0x0000CC74
	add r1, sp, #0x1c
	strh r0, [sp, #0x1e]
	ldr r0, [r4, #0x1f0]
	mov r2, #8
	bl SocketConnect
	mvn r1, #0
	cmp r0, r1
	bne _02303614
	ldr r0, [r4, #0x1f0]
	bl ov00_022F5194
	mvn r2, #5
	cmp r0, r2
	subne r1, r2, #0x14
	cmpne r0, r1
	subne r1, r2, #0x46
	cmpne r0, r1
	beq _02303614
	ldr r2, _02303660 ; =ov00_0231B1AC
	mov r0, r7
	mov r1, #5
	bl ov00_0230BCA8
	mov r0, r7
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x24
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
_02303614:
	mov r0, #1
	str r0, [r6, #0x14]
	str r0, [r4, #0x1f4]
	mov r0, #0
	add sp, sp, #0x24
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_0230362C: .word ov00_0231B0BC
_02303630: .word 0x00001964
_02303634: .word ov00_0231B0C8
_02303638: .word ov00_0230847C
_0230363C: .word ov00_023085CC
_02303640: .word ov00_023084A4
_02303644: .word ov00_0230859C
_02303648: .word ov00_0231B0F0
_0230364C: .word ov00_0231B11C
_02303650: .word ov00_0231B144
_02303654: .word ov00_0231B03C
_02303658: .word ov00_0231B178
_0230365C: .word 0x0000CC74
_02303660: .word ov00_0231B1AC
	arm_func_end ov00_02303300

	arm_func_start ov00_02303664
ov00_02303664: ; 0x02303664
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	sub sp, sp, #0x10
	mov r8, r0
	ldr r4, [r8]
	mov r7, r1
	ldr r1, [r4, #0x1f4]
	mov r6, r2
	mov r5, r3
	cmp r1, #4
	bne _0230369C
	bl ov00_022FFE10
	cmp r0, #0
	addne sp, sp, #0x10
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
_0230369C:
	ldr r0, [r4, #0x1f4]
	cmp r0, #0
	beq _023036C0
	ldr r1, _02303858 ; =ov00_0231B1D4
	mov r0, r8
	bl ov00_0230BCCC
	add sp, sp, #0x10
	mov r0, #2
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_023036C0:
	mov r3, #1
	mov r1, r7
	add r0, r4, #0x110
	mov r2, #0x1f
	str r3, [r4, #0x10c]
	bl ov00_0230B930
	add r0, r4, #0x2f
	mov r1, r6
	add r0, r0, #0x100
	mov r2, #0x15
	bl ov00_0230B930
	mov r1, r5
	add r0, r4, #0x144
	mov r2, #0x33
	bl ov00_0230B930
	add r0, r4, #0x77
	ldr r1, [sp, #0x28]
	add r0, r0, #0x100
	mov r2, #0x1f
	bl ov00_0230B930
	add r0, r4, #0x144
	bl ov00_022F5548
	mov r0, #0x308
	bl ov00_022F5AE4
	movs r4, r0
	bne _02303740
	ldr r1, _0230385C ; =ov00_0231B1E8
	mov r0, r8
	bl ov00_0230BCCC
	add sp, sp, #0x10
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_02303740:
	mov r1, #0
	mov r2, #0x308
	bl memset
	ldr r0, [sp, #0x3c]
	ldr r1, [sp, #0x2c]
	str r0, [r4, #0x304]
	ldrsb r0, [r1]
	cmp r0, #0
	ldrne r0, [sp, #0x30]
	ldrnesb r0, [r0]
	cmpne r0, #0
	beq _02303790
	add r0, r4, #0xc2
	mov r2, #0x100
	bl ov00_0230B930
	add r0, r4, #0xc2
	ldr r1, [sp, #0x30]
	add r0, r0, #0x100
	mov r2, #0x100
	bl ov00_0230B930
_02303790:
	ldr r1, [sp, #0x34]
	cmp r1, #0
	beq _023037AC
	add r0, r4, #0xc2
	add r0, r0, #0x200
	mov r2, #0x41
	bl ov00_0230B930
_023037AC:
	ldr r1, [sp, #0x40]
	ldr r0, [sp, #0x44]
	str r1, [sp]
	str r0, [sp, #4]
	ldr r5, [sp, #0x48]
	add r3, sp, #0xc
	mov r0, r8
	mov r2, r4
	mov r1, #0
	str r5, [sp, #8]
	bl ov00_0230703C
	cmp r0, #0
	addne sp, sp, #0x10
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r1, [sp, #0xc]
	mov r0, r8
	bl ov00_02303300
	movs r4, r0
	beq _02303824
	ldr r1, [sp, #0xc]
	mov r0, r8
	str r4, [r1, #0x1c]
	ldr r1, [sp, #0xc]
	bl ov00_02306C84
	mov r0, r8
	mov r1, #0
	bl ov00_02304798
	add sp, sp, #0x10
	mov r0, r4
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_02303824:
	ldr r1, [sp, #0xc]
	ldr r0, [r1, #8]
	cmp r0, #0
	beq _0230384C
	ldr r1, [r1, #0x18]
	mov r0, r8
	bl ov00_023003B4
	cmp r0, #0
	addne sp, sp, #0x10
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
_0230384C:
	mov r0, #0
	add sp, sp, #0x10
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_02303858: .word ov00_0231B1D4
_0230385C: .word ov00_0231B1E8
	arm_func_end ov00_02303664

	arm_func_start ov00_02303860
ov00_02303860: ; 0x02303860
	stmdb sp!, {r4, r5, r6, r7, lr}
	sub sp, sp, #0x294
	mov r5, r1
	mov r6, r0
	add r0, r5, #0x80
	mov r1, #0x20
	ldr r4, [r6]
	bl ov00_02303298
	add r0, r5, #0x100
	ldrsb r0, [r0, #0xc2]
	cmp r0, #0
	addne r0, r5, #0xc2
	addeq r0, r4, #0x77
	add r7, r0, #0x100
	mov r0, r7
	bl strlen
	mov r1, r0
	mov r0, r7
	add r2, r5, #0xa1
	bl ov00_022F4F3C
	ldr r2, [r4, #0x1a4]
	cmp r2, #0
	beq _023038CC
	ldr r1, _02303C30 ; =ov00_0231B1F8
	add r0, sp, #0x14
	bl sub_020790DC
	b _023038DC
_023038CC:
	ldr r0, _02303C34 ; =ov00_0231B1FC
	add r1, sp, #0x14
	ldrb r0, [r0]
	strb r0, [r1]
_023038DC:
	ldrsb r0, [r5, #0xc2]
	cmp r0, #0
	addne r0, r5, #0xc2
	bne _02303934
	add r0, r4, #0x100
	ldrsb r0, [r0, #0x2f]
	add r2, sp, #0x14
	cmp r0, #0
	add r0, sp, #0x40
	beq _0230391C
	add r3, r4, #0x2f
	ldr r1, _02303C38 ; =ov00_0231B200
	add r3, r3, #0x100
	bl sub_020790DC
	add r0, sp, #0x40
	b _02303934
_0230391C:
	ldr r1, _02303C3C ; =ov00_0231B208
	add ip, r4, #0x144
	add r3, r4, #0x110
	str ip, [sp]
	bl sub_020790DC
	add r0, sp, #0x40
_02303934:
	str r0, [sp]
	add r0, r5, #0x80
	str r0, [sp, #4]
	ldr r1, _02303C40 ; =ov00_0231B210
	ldr r3, _02303C44 ; =ov00_0231B220
	add r0, sp, #0x92
	str r5, [sp, #8]
	add r2, r5, #0xa1
	str r2, [sp, #0xc]
	bl sub_020790DC
	add r0, sp, #0x92
	bl strlen
	mov r1, r0
	add r0, sp, #0x92
	add r2, sp, #0x1f
	bl ov00_022F4F3C
	ldr r0, [r4, #0x100]
	cmp r0, #0
	beq _023039B4
	add r3, sp, #0x10
	mov r0, r6
	add r1, r4, #0x110
	add r2, r4, #0x144
	bl ov00_02308C40
	ldr r0, [sp, #0x10]
	cmp r0, #0
	beq _023039B4
	ldr r0, [r0, #4]
	str r0, [r4, #0x19c]
	ldr r0, [sp, #0x10]
	ldr r0, [r0]
	str r0, [r4, #0x1a0]
_023039B4:
	ldr r2, _02303C48 ; =ov00_0231B254
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	ldr r2, _02303C4C ; =ov00_0231B25C
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	mov r0, r6
	add r1, r4, #0x210
	add r2, r5, #0x80
	bl ov00_02302638
	ldrsb r0, [r5, #0xc2]
	cmp r0, #0
	beq _02303A14
	ldr r2, _02303C50 ; =ov00_0231B268
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	mov r0, r6
	add r1, r4, #0x210
	add r2, r5, #0xc2
	bl ov00_02302638
	b _02303A8C
_02303A14:
	add r0, r4, #0x100
	ldrsb r0, [r0, #0x2f]
	cmp r0, #0
	beq _02303A4C
	ldr r2, _02303C54 ; =ov00_0231B274
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	add r2, r4, #0x2f
	mov r0, r6
	add r1, r4, #0x210
	add r2, r2, #0x100
	bl ov00_02302638
	b _02303A8C
_02303A4C:
	ldr r2, _02303C58 ; =ov00_0231B284
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	mov r0, r6
	add r1, r4, #0x210
	add r2, r4, #0x110
	bl ov00_02302638
	ldr r2, _02303C5C ; =ov00_0231B28C
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	mov r0, r6
	add r1, r4, #0x210
	add r2, r4, #0x144
	bl ov00_02302638
_02303A8C:
	ldr r0, [r4, #0x19c]
	cmp r0, #0
	beq _02303AB8
	ldr r2, _02303C60 ; =ov00_0231B290
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	ldr r2, [r4, #0x19c]
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302668
_02303AB8:
	ldr r0, [r4, #0x1a0]
	cmp r0, #0
	beq _02303AE4
	ldr r2, _02303C64 ; =ov00_0231B29C
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	ldr r2, [r4, #0x1a0]
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302668
_02303AE4:
	ldr r2, _02303C68 ; =ov00_0231B2A8
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	ldr r2, [r4, #0x1a4]
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302668
	ldr r2, _02303C6C ; =ov00_0231B2B4
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	add r2, sp, #0x1f
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	ldr r0, [r4, #0x10c]
	cmp r0, #1
	bne _02303B40
	ldr r2, _02303C70 ; =ov00_0231B2C0
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
_02303B40:
	ldr r2, _02303C74 ; =ov00_0231B2CC
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	add r0, r4, #0x200
	ldrh r2, [r0, #0x30]
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302668
	ldr r2, _02303C78 ; =ov00_0231B2D4
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302638
	ldr r2, [r4, #0x608]
	mov r0, r6
	add r1, r4, #0x210
	bl ov00_02302668
	mov r0, r6
	add r1, r4, #0x210
	ldr r2, _02303C7C ; =ov00_0231B2E0
	bl ov00_02302638
	mov r0, r6
	add r1, r4, #0x210
	ldr r2, _02303C80 ; =ov00_02328804
	bl ov00_02302638
	mov r0, r6
	add r1, r4, #0x210
	ldr r2, _02303C84 ; =ov00_0231B2EC
	bl ov00_02302638
	mov r0, r6
	add r1, r4, #0x210
	ldr r2, [r4, #0x60c]
	bl ov00_02302668
	mov r0, r6
	add r1, r4, #0x210
	ldr r2, _02303C88 ; =ov00_0231B2FC
	bl ov00_02302638
	mov r0, r6
	add r1, r4, #0x210
	mov r2, #3
	bl ov00_02302668
	mov r0, r6
	add r1, r4, #0x210
	ldr r2, _02303C8C ; =ov00_0231B30C
	bl ov00_02302638
	mov r0, r6
	add r1, r4, #0x210
	ldr r2, [r4, #0x62c]
	bl ov00_02302668
	mov r0, r6
	add r1, r4, #0x210
	ldr r2, _02303C90 ; =ov00_0231B314
	bl ov00_02302638
	mov r0, r6
	add r1, r4, #0x210
	ldr r2, _02303C94 ; =ov00_0231B31C
	bl ov00_02302638
	mov r0, #0
	add sp, sp, #0x294
	ldmia sp!, {r4, r5, r6, r7, pc}
	.align 2, 0
_02303C30: .word ov00_0231B1F8
_02303C34: .word ov00_0231B1FC
_02303C38: .word ov00_0231B200
_02303C3C: .word ov00_0231B208
_02303C40: .word ov00_0231B210
_02303C44: .word ov00_0231B220
_02303C48: .word ov00_0231B254
_02303C4C: .word ov00_0231B25C
_02303C50: .word ov00_0231B268
_02303C54: .word ov00_0231B274
_02303C58: .word ov00_0231B284
_02303C5C: .word ov00_0231B28C
_02303C60: .word ov00_0231B290
_02303C64: .word ov00_0231B29C
_02303C68: .word ov00_0231B2A8
_02303C6C: .word ov00_0231B2B4
_02303C70: .word ov00_0231B2C0
_02303C74: .word ov00_0231B2CC
_02303C78: .word ov00_0231B2D4
_02303C7C: .word ov00_0231B2E0
_02303C80: .word ov00_02328804
_02303C84: .word ov00_0231B2EC
_02303C88: .word ov00_0231B2FC
_02303C8C: .word ov00_0231B30C
_02303C90: .word ov00_0231B314
_02303C94: .word ov00_0231B31C
	arm_func_end ov00_02303860

	arm_func_start ov00_02303C98
ov00_02303C98: ; 0x02303C98
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0xc8
	mov sl, r0
	ldr r5, [sl]
	mov sb, r1
	add r0, r5, #0x77
	add r1, sp, #0
	add r0, r0, #0x100
	bl PasswordEncryptString
	ldr r2, _02303EA8 ; =ov00_0231B324
	mov r0, sl
	add r1, r5, #0x210
	bl ov00_02302638
	ldr r2, _02303EAC ; =ov00_0231B330
	mov r0, sl
	add r1, r5, #0x210
	bl ov00_02302638
	mov r0, sl
	add r1, r5, #0x210
	add r2, r5, #0x144
	bl ov00_02302638
	ldr r2, _02303EB0 ; =ov00_0231B338
	mov r0, sl
	add r1, r5, #0x210
	bl ov00_02302638
	mov r0, sl
	add r1, r5, #0x210
	add r2, r5, #0x110
	bl ov00_02302638
	ldr r2, _02303EB4 ; =ov00_0231B340
	mov r0, sl
	add r1, r5, #0x210
	bl ov00_02302638
	mov r0, sl
	add r1, r5, #0x210
	add r2, sp, #0
	bl ov00_02302638
	ldr r2, _02303EB8 ; =ov00_0231B2D4
	mov r0, sl
	add r1, r5, #0x210
	bl ov00_02302638
	ldr r2, [r5, #0x608]
	mov r0, sl
	add r1, r5, #0x210
	bl ov00_02302668
	ldr r2, _02303EBC ; =ov00_0231B2E0
	mov r0, sl
	add r1, r5, #0x210
	bl ov00_02302638
	ldr r2, _02303EC0 ; =ov00_02328804
	mov r0, sl
	add r1, r5, #0x210
	bl ov00_02302638
	ldr r2, _02303EC4 ; =ov00_0231B2EC
	mov r0, sl
	add r1, r5, #0x210
	bl ov00_02302638
	ldr r2, [r5, #0x60c]
	mov r0, sl
	add r1, r5, #0x210
	bl ov00_02302668
	ldr r2, _02303EC8 ; =ov00_0231B274
	mov r0, sl
	add r1, r5, #0x210
	bl ov00_02302638
	add r2, r5, #0x2f
	mov r0, sl
	add r1, r5, #0x210
	add r2, r2, #0x100
	bl ov00_02302638
	add r0, sb, #0x200
	ldrsb r0, [r0, #0xc2]
	cmp r0, #0
	beq _02303E5C
	add r0, sb, #0xc2
	add r0, r0, #0x200
	bl strlen
	mov r7, r0
	ldr r0, _02303ECC ; =0x79707367
	bl srand
	cmp r7, #0
	mov r6, #0
	bls _02303E20
	add r8, sp, #0x87
	mov r4, r6
	mov fp, #0xff
_02303DF0:
	mov r0, r4
	mov r1, fp
	bl RandRangeOverlay0
	add r1, sb, r6
	add r1, r1, #0x200
	add r6, r6, #1
	ldrsb r1, [r1, #0xc2]
	mov r0, r0, lsl #0x18
	cmp r6, r7
	eor r0, r1, r0, asr #24
	strb r0, [r8], #1
	blo _02303DF0
_02303E20:
	add r0, sp, #0x87
	mov r4, #0
	add r1, sp, #0x2d
	mov r2, r7
	mov r3, #1
	strb r4, [r0, r6]
	bl ov00_022F598C
	ldr r2, _02303ED0 ; =ov00_0231B350
	mov r0, sl
	add r1, r5, #0x210
	bl ov00_02302638
	add r2, sp, #0x2d
	mov r0, sl
	add r1, r5, #0x210
	bl ov00_02302638
_02303E5C:
	ldr r2, _02303ED4 ; =ov00_0231B2A8
	mov r0, sl
	add r1, r5, #0x210
	bl ov00_02302638
	ldr r2, [r5, #0x1a4]
	mov r0, sl
	add r1, r5, #0x210
	bl ov00_02302668
	ldr r2, _02303ED8 ; =ov00_0231B314
	mov r0, sl
	add r1, r5, #0x210
	bl ov00_02302638
	ldr r2, _02303EDC ; =ov00_0231B31C
	mov r0, sl
	add r1, r5, #0x210
	bl ov00_02302638
	mov r0, #0
	add sp, sp, #0xc8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_02303EA8: .word ov00_0231B324
_02303EAC: .word ov00_0231B330
_02303EB0: .word ov00_0231B338
_02303EB4: .word ov00_0231B340
_02303EB8: .word ov00_0231B2D4
_02303EBC: .word ov00_0231B2E0
_02303EC0: .word ov00_02328804
_02303EC4: .word ov00_0231B2EC
_02303EC8: .word ov00_0231B274
_02303ECC: .word 0x79707367
_02303ED0: .word ov00_0231B350
_02303ED4: .word ov00_0231B2A8
_02303ED8: .word ov00_0231B314
_02303EDC: .word ov00_0231B31C
	arm_func_end ov00_02303C98

	arm_func_start ov00_02303EE0
ov00_02303EE0: ; 0x02303EE0
	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
	sub sp, sp, #0x2ac
	mov r6, r2
	mov r8, r0
	mov r7, r1
	mov r1, r6
	mov r2, #0
	ldr r5, [r8]
	bl ov00_0230B950
	cmp r0, #0
	beq _02303FA0
	ldr r2, [r5, #0x5b8]
	ldr r0, _02304558 ; =0x00000106
	cmp r2, r0
	bne _02303F40
	ldr r1, [r5, #0x1a0]
	cmp r1, #0
	beq _02303F40
	mov r0, r8
	bl ov00_02308B98
	mov r0, #0
	str r0, [r5, #0x19c]
	str r0, [r5, #0x1a0]
	b _02303F74
_02303F40:
	ldr r0, _0230455C ; =0x00000201
	cmp r2, r0
	bne _02303F74
	ldr r1, _02304560 ; =ov00_0231B35C
	add r2, sp, #0xab
	mov r0, r6
	mov r3, #0x200
	bl ov00_0230BA28
	cmp r0, #0
	beq _02303F74
	add r0, sp, #0xab
	bl sub_0208B360
	str r0, [r5, #0x1a0]
_02303F74:
	ldr r1, [r5, #0x5b8]
	mov r0, r8
	mov r2, r5
	bl ov00_0230BCA8
	mov r0, r8
	mov r1, #4
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x2ac
	mov r0, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_02303FA0:
	ldr r0, [r7, #0x14]
	ldr r4, [r7, #4]
	cmp r0, #1
	beq _02303FC4
	cmp r0, #2
	beq _023041AC
	cmp r0, #3
	beq _0230409C
	b _0230454C
_02303FC4:
	ldr r1, _02304564 ; =ov00_0231B364
	mov r0, r6
	mov r2, #5
	bl strncmp
	cmp r0, #0
	beq _02304008
	ldr r2, _02304568 ; =ov00_0231B36C
	mov r0, r8
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r8
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x2ac
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_02304008:
	ldr r1, _0230456C ; =ov00_0231B25C
	mov r0, r6
	mov r2, r4
	mov r3, #0x80
	bl ov00_0230BA28
	cmp r0, #0
	bne _02304050
	ldr r2, _02304568 ; =ov00_0231B36C
	mov r0, r8
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r8
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x2ac
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_02304050:
	ldr r0, [r4, #0x304]
	mov r1, r4
	cmp r0, #0
	mov r0, r8
	beq _02304080
	bl ov00_02303C98
	cmp r0, #0
	addne sp, sp, #0x2ac
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
	mov r0, #3
	str r0, [r7, #0x14]
	b _0230454C
_02304080:
	bl ov00_02303860
	cmp r0, #0
	addne sp, sp, #0x2ac
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
	mov r0, #2
	str r0, [r7, #0x14]
	b _0230454C
_0230409C:
	ldr r1, _02304570 ; =ov00_0231B39C
	mov r0, r6
	mov r2, #5
	bl strncmp
	cmp r0, #0
	beq _023040E0
	ldr r2, _02304568 ; =ov00_0231B36C
	mov r0, r8
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r8
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x2ac
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_023040E0:
	ldr r1, _02304574 ; =ov00_0231B290
	add r2, sp, #0xab
	mov r0, r6
	mov r3, #0x200
	bl ov00_0230BA28
	cmp r0, #0
	bne _02304128
	ldr r2, _02304578 ; =ov00_0231B3A4
	mov r0, r8
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r8
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x2ac
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_02304128:
	add r0, sp, #0xab
	bl sub_0208B360
	str r0, [r5, #0x19c]
	ldr r1, _0230457C ; =ov00_0231B29C
	add r2, sp, #0xab
	mov r0, r6
	mov r3, #0x200
	bl ov00_0230BA28
	cmp r0, #0
	bne _0230417C
	ldr r2, _02304578 ; =ov00_0231B3A4
	mov r0, r8
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r8
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x2ac
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_0230417C:
	add r0, sp, #0xab
	bl sub_0208B360
	str r0, [r5, #0x1a0]
	mov r0, r8
	mov r1, r4
	bl ov00_02303860
	cmp r0, #0
	addne sp, sp, #0x2ac
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
	mov r0, #2
	str r0, [r7, #0x14]
	b _0230454C
_023041AC:
	ldr r1, _02304580 ; =ov00_0231B3D4
	mov r0, r6
	mov r2, #5
	bl strncmp
	cmp r0, #0
	beq _023041F0
	ldr r2, _02304568 ; =ov00_0231B36C
	mov r0, r8
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r8
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x2ac
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_023041F0:
	ldr r1, _02304584 ; =ov00_0231B3DC
	add r2, sp, #0xab
	mov r0, r6
	mov r3, #0x200
	bl ov00_0230BA28
	cmp r0, #0
	bne _02304238
	ldr r2, _02304578 ; =ov00_0231B3A4
	mov r0, r8
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r8
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x2ac
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_02304238:
	add r0, sp, #0xab
	bl sub_0208B360
	str r0, [r5, #0x198]
	ldr r1, _02304574 ; =ov00_0231B290
	add r2, sp, #0xab
	mov r0, r6
	mov r3, #0x200
	bl ov00_0230BA28
	cmp r0, #0
	bne _0230428C
	ldr r2, _02304578 ; =ov00_0231B3A4
	mov r0, r8
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r8
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x2ac
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_0230428C:
	add r0, sp, #0xab
	bl sub_0208B360
	str r0, [r5, #0x19c]
	ldr r1, _0230457C ; =ov00_0231B29C
	add r2, sp, #0xab
	mov r0, r6
	mov r3, #0x200
	bl ov00_0230BA28
	cmp r0, #0
	bne _023042E0
	ldr r2, _02304578 ; =ov00_0231B3A4
	mov r0, r8
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r8
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x2ac
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_023042E0:
	add r0, sp, #0xab
	bl sub_0208B360
	str r0, [r5, #0x1a0]
	ldr r1, _02304588 ; =ov00_0231B274
	add r2, sp, #0x23
	mov r0, r6
	mov r3, #0x15
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	streqb r0, [sp, #0x23]
	ldr r1, _0230458C ; =ov00_0231B3E8
	mov r0, r6
	add r2, r5, #0x610
	mov r3, #0x19
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	streqb r0, [r5, #0x610]
	ldr r2, [r5, #0x1a4]
	cmp r2, #0
	beq _02304348
	ldr r1, _02304590 ; =ov00_0231B1F8
	add r0, sp, #0x18
	bl sub_020790DC
	b _02304358
_02304348:
	ldr r0, _02304594 ; =ov00_0231B1FC
	add r1, sp, #0x18
	ldrb r0, [r0]
	strb r0, [r1]
_02304358:
	ldrsb r0, [r4, #0xc2]
	cmp r0, #0
	addne r0, r4, #0xc2
	bne _023043B0
	add r0, r5, #0x100
	ldrsb r0, [r0, #0x2f]
	add r2, sp, #0x18
	cmp r0, #0
	add r0, sp, #0x59
	beq _02304398
	add r3, r5, #0x2f
	ldr r1, _02304598 ; =ov00_0231B200
	add r3, r3, #0x100
	bl sub_020790DC
	add r0, sp, #0x59
	b _023043B0
_02304398:
	ldr r1, _0230459C ; =ov00_0231B208
	add ip, r5, #0x144
	add r3, r5, #0x110
	str ip, [sp]
	bl sub_020790DC
	add r0, sp, #0x59
_023043B0:
	stmia sp, {r0, r4}
	add r2, r4, #0x80
	str r2, [sp, #8]
	add r2, r4, #0xa1
	ldr r1, _023045A0 ; =ov00_0231B210
	ldr r3, _023045A4 ; =ov00_0231B220
	add r0, sp, #0xab
	str r2, [sp, #0xc]
	bl sub_020790DC
	add r0, sp, #0xab
	bl strlen
	mov r1, r0
	add r0, sp, #0xab
	add r2, sp, #0x38
	bl ov00_022F4F3C
	ldr r1, _023045A8 ; =ov00_0231B3F0
	mov r0, r6
	add r2, sp, #0xab
	mov r3, #0x200
	bl ov00_0230BA28
	cmp r0, #0
	bne _02304434
	ldr r2, _02304578 ; =ov00_0231B3A4
	mov r0, r8
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r8
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x2ac
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_02304434:
	add r0, sp, #0x38
	add r1, sp, #0xab
	mov r2, #0x20
	bl memcmp
	cmp r0, #0
	beq _02304478
	ldr r2, _023045AC ; =ov00_0231B3F8
	mov r0, r8
	mov r1, #0x108
	bl ov00_0230BCA8
	mov r0, r8
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x2ac
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_02304478:
	ldr r0, [r5, #0x100]
	cmp r0, #0
	beq _023044A0
	ldr r1, [r5, #0x1a0]
	mov r0, r8
	bl ov00_0230899C
	ldr r1, [r5, #0x1a0]
	str r1, [r0]
	ldr r1, [r5, #0x19c]
	str r1, [r0, #4]
_023044A0:
	mov r0, #3
	str r0, [r5, #0x1f4]
	ldr r1, [r7, #0xc]
	ldr r0, [r7, #0x10]
	str r1, [sp, #0x10]
	str r0, [sp, #0x14]
	cmp r1, #0
	beq _02304540
	mov r0, #0x20
	bl ov00_022F5AE4
	movs r4, r0
	bne _023044E8
	ldr r1, _023045B0 ; =ov00_0231B1E8
	mov r0, r8
	bl ov00_0230BCCC
	add sp, sp, #0x2ac
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_023044E8:
	mov r1, #0
	mov r2, #0x20
	bl memset
	ldr r0, [r5, #0x1a0]
	mov r3, #0
	str r0, [r4, #4]
	add r1, sp, #0x23
	add r0, r4, #8
	mov r2, #0x15
	str r3, [r4]
	bl ov00_0230B930
	add r1, sp, #0x10
	mov r0, r8
	mov r3, r4
	str r7, [sp]
	mov r2, #0
	str r2, [sp, #4]
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	addne sp, sp, #0x2ac
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
_02304540:
	mov r0, r8
	mov r1, r7
	bl ov00_0230716C
_0230454C:
	mov r0, #0
	add sp, sp, #0x2ac
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
	.align 2, 0
_02304558: .word 0x00000106
_0230455C: .word 0x00000201
_02304560: .word ov00_0231B35C
_02304564: .word ov00_0231B364
_02304568: .word ov00_0231B36C
_0230456C: .word ov00_0231B25C
_02304570: .word ov00_0231B39C
_02304574: .word ov00_0231B290
_02304578: .word ov00_0231B3A4
_0230457C: .word ov00_0231B29C
_02304580: .word ov00_0231B3D4
_02304584: .word ov00_0231B3DC
_02304588: .word ov00_0231B274
_0230458C: .word ov00_0231B3E8
_02304590: .word ov00_0231B1F8
_02304594: .word ov00_0231B1FC
_02304598: .word ov00_0231B200
_0230459C: .word ov00_0231B208
_023045A0: .word ov00_0231B210
_023045A4: .word ov00_0231B220
_023045A8: .word ov00_0231B3F0
_023045AC: .word ov00_0231B3F8
_023045B0: .word ov00_0231B1E8
	arm_func_end ov00_02303EE0

	arm_func_start ov00_023045B4
ov00_023045B4: ; 0x023045B4
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	ldr r4, [r5]
	add r2, sp, #0
	ldr r1, [r4, #0x1f0]
	bl ov00_0230BA94
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r0, [sp]
	cmp r0, #4
	bne _02304608
	ldr r1, _02304620 ; =0x00000107
	ldr r2, _02304624 ; =ov00_0231B418
	mov r0, r5
	bl ov00_0230BCA8
	mov r0, r5
	mov r1, #4
	mov r2, #1
	bl ov00_02302DEC
	mov r0, #4
	ldmia sp!, {r3, r4, r5, pc}
_02304608:
	cmp r0, #0
	moveq r0, #0
	movne r0, #2
	strne r0, [r4, #0x1f4]
	movne r0, #0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_02304620: .word 0x00000107
_02304624: .word ov00_0231B418
	arm_func_end ov00_023045B4

	arm_func_start ov00_02304628
ov00_02304628: ; 0x02304628
	stmdb sp!, {r4, r5, r6, lr}
	mov r5, r1
	ldr r1, [r5, #8]
	mov r6, r0
	cmp r1, #0
	ldr r4, [r6]
	beq _0230468C
	ldr r0, [r4, #0x104]
	cmp r0, #0
	bne _0230468C
	ldr r0, [r1, #8]
	bl ov00_022F5B14
	ldr r0, [r5, #8]
	mov r1, #0
	str r1, [r0, #8]
	ldr r0, [r5, #8]
	ldr r0, [r0, #0xc]
	bl ov00_022F5B14
	ldr r0, [r5, #8]
	mov r1, #0
	str r1, [r0, #0xc]
	ldr r0, [r5, #8]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r5, #8]
_0230468C:
	ldr r1, [r5, #0xc]
	cmp r1, #0
	beq _02304730
	ldr r0, [r4, #0x104]
	cmp r0, #0
	bne _02304730
	ldr r0, [r1, #8]
	bl ov00_022F5B14
	ldr r0, [r5, #0xc]
	mov r1, #0
	str r1, [r0, #8]
	ldr r0, [r5, #0xc]
	ldr r0, [r0, #0xc]
	bl ov00_022F5B14
	ldr r0, [r5, #0xc]
	mov r1, #0
	str r1, [r0, #0xc]
	ldr r0, [r5, #0xc]
	ldr r0, [r0, #0x10]
	bl ov00_022F5B14
	ldr r0, [r5, #0xc]
	mov r1, #0
	str r1, [r0, #0x10]
	ldr r0, [r5, #0xc]
	ldr r0, [r0, #0x14]
	bl ov00_022F5B14
	ldr r0, [r5, #0xc]
	mov r1, #0
	str r1, [r0, #0x14]
	ldr r0, [r5, #0xc]
	ldr r0, [r0, #0x38]
	cmp r0, #0
	beq _02304720
	bl ov00_022F4758
	ldr r0, [r5, #0xc]
	mov r1, #0
	str r1, [r0, #0x38]
_02304720:
	ldr r0, [r5, #0xc]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r5, #0xc]
_02304730:
	ldr r0, [r5, #0x14]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r5, #0x14]
	ldr r0, [r5, #0x1c]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r5, #0x1c]
	str r0, [r5, #0x18]
	ldr r0, [r5, #0x10]
	cmp r0, #0
	beq _0230477C
	ldr r0, [r4, #0x104]
	cmp r0, #1
	ldreq r0, [r5, #8]
	cmpeq r0, #0
	ldreq r0, [r5, #0xc]
	cmpeq r0, #0
	bne _02304790
_0230477C:
	mov r0, r6
	mov r1, r5
	bl ov00_02308BCC
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_02304790:
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_02304628

	arm_func_start ov00_02304798
ov00_02304798: ; 0x02304798
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #0xc
	mov r5, r0
	ldr r4, [r5]
	ldr r2, [r4, #0x1f4]
	cmp r2, #4
	addeq sp, sp, #0xc
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	cmp r2, #0
	beq _0230485C
	cmp r1, #0
	beq _023047FC
	cmp r2, #3
	bne _023047FC
	ldr r2, _02304928 ; =ov00_0231B440
	add r1, r4, #0x210
	bl ov00_02302638
	ldr r2, [r4, #0x198]
	mov r0, r5
	add r1, r4, #0x210
	bl ov00_02302668
	ldr r2, _0230492C ; =ov00_0231B31C
	mov r0, r5
	add r1, r4, #0x210
	bl ov00_02302638
_023047FC:
	mov r1, #1
	ldr r0, _02304930 ; =ov00_0231B454
	str r1, [sp]
	str r0, [sp, #4]
	ldr r1, [r4, #0x1f0]
	add r3, sp, #8
	mov r0, r5
	add r2, r4, #0x210
	bl ov00_02302A04
	ldr r0, [r4, #0x1f0]
	mvn r1, #0
	cmp r0, r1
	beq _02304848
	mov r1, #2
	bl ov00_022F4FC8
	ldr r0, [r4, #0x1f0]
	bl SocketClose
	mvn r0, #0
	str r0, [r4, #0x1f0]
_02304848:
	mov r0, #4
	str r0, [r4, #0x1f4]
	mov r0, #0
	str r0, [r4, #0x19c]
	str r0, [r4, #0x1a0]
_0230485C:
	ldr r0, [r4, #0x1f8]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0x1f8]
	ldr r0, [r4, #0x208]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0x208]
	ldr r0, [r4, #0x210]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0x210]
	ldr r0, [r4, #0x5e0]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0x5e0]
	ldr r0, [r4, #0x5f0]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0x5f0]
	ldr r1, [r4, #0x5c4]
	cmp r1, #0
	beq _023048CC
_023048B8:
	mov r0, r5
	bl ov00_0230716C
	ldr r1, [r4, #0x5c4]
	cmp r1, #0
	bne _023048B8
_023048CC:
	mov r0, #0
	str r0, [r4, #0x5c4]
	ldr r6, [r4, #0x5d4]
	cmp r6, #0
	beq _023048F8
_023048E0:
	mov r1, r6
	ldr r6, [r6, #0x4c]
	mov r0, r5
	bl ov00_02307DBC
	cmp r6, #0
	bne _023048E0
_023048F8:
	mov r0, #0
	str r0, [r4, #0x5d4]
	ldr r6, _02304934 ; =ov00_02304628
	mov r4, r0
_02304908:
	mov r0, r5
	mov r1, r6
	mov r2, r4
	bl ov00_02308CA8
	cmp r0, #0
	beq _02304908
	add sp, sp, #0xc
	ldmia sp!, {r3, r4, r5, r6, pc}
	.align 2, 0
_02304928: .word ov00_0231B440
_0230492C: .word ov00_0231B31C
_02304930: .word ov00_0231B454
_02304934: .word ov00_02304628
	arm_func_end ov00_02304798

	arm_func_start ov00_02304938
ov00_02304938: ; 0x02304938
	stmdb sp!, {r3, r4, r5, lr}
	cmp r0, #0
	cmpeq r1, #0
	cmpeq r2, #0
	moveq r0, #1
	ldmeqia sp!, {r3, r4, r5, pc}
	cmp r0, #0
	cmpge r1, #0
	cmpge r2, #0
	movlt r0, #0
	ldmltia sp!, {r3, r4, r5, pc}
	cmp r1, #0xc
	addls pc, pc, r1, lsl #2
	b _02304A40
_02304970: ; jump table
	b _023049A4 ; case 0
	b _023049B4 ; case 1
	b _023049D4 ; case 2
	b _023049B4 ; case 3
	b _023049C4 ; case 4
	b _023049B4 ; case 5
	b _023049C4 ; case 6
	b _023049B4 ; case 7
	b _023049B4 ; case 8
	b _023049C4 ; case 9
	b _023049B4 ; case 10
	b _023049C4 ; case 11
	b _023049B4 ; case 12
_023049A4:
	cmp r0, #0
	beq _02304A48
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_023049B4:
	cmp r0, #0x1f
	ble _02304A48
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_023049C4:
	cmp r0, #0x1e
	ble _02304A48
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_023049D4:
	mov r4, r2, lsr #0x1f
	rsb r3, r4, r2, lsl #30
	adds r3, r4, r3, ror #30
	bne _02304A00
	ldr ip, _02304A90 ; =0x51EB851F
	mov lr, #0x64
	smull r3, r5, ip, r2
	add r5, r4, r5, asr #5
	smull r3, ip, lr, r5
	subs r5, r2, r3
	bne _02304A20
_02304A00:
	ldr lr, _02304A90 ; =0x51EB851F
	mov r3, r2, lsr #0x1f
	smull ip, r4, lr, r2
	add r4, r3, r4, asr #7
	mov lr, #0x190
	smull r3, ip, lr, r4
	subs r4, r2, r3
	bne _02304A30
_02304A20:
	cmp r0, #0x1d
	ble _02304A48
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_02304A30:
	cmp r0, #0x1c
	ble _02304A48
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_02304A40:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_02304A48:
	ldr ip, _02304A94 ; =0x0000076C
	cmp r2, ip
	movlt r0, #0
	ldmltia sp!, {r3, r4, r5, pc}
	add r3, ip, #0xb3
	cmp r2, r3
	movgt r0, #0
	ldmgtia sp!, {r3, r4, r5, pc}
	bne _02304A88
	cmp r1, #6
	movgt r0, #0
	ldmgtia sp!, {r3, r4, r5, pc}
	bne _02304A88
	cmp r0, #6
	movgt r0, #0
	ldmgtia sp!, {r3, r4, r5, pc}
_02304A88:
	mov r0, #1
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_02304A90: .word 0x51EB851F
_02304A94: .word 0x0000076C
	arm_func_end ov00_02304938

	arm_func_start ov00_02304A98
ov00_02304A98: ; 0x02304A98
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	mov lr, r1, asr #0x18
	mov ip, r1, asr #0x10
	mov r1, r1, lsl #0x10
	and r5, ip, #0xff
	and r4, lr, #0xff
	mov sb, r0
	mov r6, r1, lsr #0x10
	mov r8, r2
	mov r0, r4
	mov r1, r5
	mov r2, r6
	mov r7, r3
	bl ov00_02304938
	cmp r0, #0
	bne _02304AEC
	ldr r1, _02304B04 ; =ov00_0231B458
	mov r0, sb
	bl ov00_0230BCCC
	mov r0, #2
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_02304AEC:
	str r4, [r8]
	ldr r0, [sp, #0x20]
	str r5, [r7]
	str r6, [r0]
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_02304B04: .word ov00_0231B458
	arm_func_end ov00_02304A98

	arm_func_start ov00_02304B08
ov00_02304B08: ; 0x02304B08
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r1
	ldr r1, [r5]
	cmp r1, #0
	moveq r0, #0
	streqb r0, [r4, #8]
	beq _02304B34
	add r0, r4, #8
	mov r2, #0x1f
	bl ov00_0230B930
_02304B34:
	ldr r1, [r5, #4]
	cmp r1, #0
	moveq r0, #0
	streqb r0, [r4, #0x27]
	beq _02304B54
	add r0, r4, #0x27
	mov r2, #0x15
	bl ov00_0230B930
_02304B54:
	ldr r1, [r5, #8]
	cmp r1, #0
	moveq r0, #0
	streqb r0, [r4, #0x3c]
	beq _02304B74
	add r0, r4, #0x3c
	mov r2, #0x33
	bl ov00_0230B930
_02304B74:
	ldr r1, [r5, #0xc]
	cmp r1, #0
	moveq r0, #0
	streqb r0, [r4, #0x6f]
	beq _02304B94
	add r0, r4, #0x6f
	mov r2, #0x1f
	bl ov00_0230B930
_02304B94:
	ldr r1, [r5, #0x10]
	cmp r1, #0
	moveq r0, #0
	streqb r0, [r4, #0x8e]
	beq _02304BB4
	add r0, r4, #0x8e
	mov r2, #0x1f
	bl ov00_0230B930
_02304BB4:
	ldr r1, [r5, #0x14]
	cmp r1, #0
	moveq r0, #0
	streqb r0, [r4, #0xad]
	beq _02304BD4
	add r0, r4, #0xad
	mov r2, #0x4c
	bl ov00_0230B930
_02304BD4:
	ldr r3, [r5, #0x18]
	add r0, r4, #0x100
	add r1, r5, #0x1c
	mov r2, #0xb
	str r3, [r4, #0xfc]
	bl ov00_0230B930
	add r0, r4, #0xb
	add r0, r0, #0x100
	add r1, r5, #0x27
	mov r2, #3
	bl ov00_0230B930
	ldr r0, [r5, #0x2c]
	adds r1, r5, #0x34
	str r0, [r4, #0x110]
	ldr r0, [r5, #0x30]
	str r0, [r4, #0x114]
	moveq r0, #0
	streqb r0, [r4, #0x118]
	beq _02304C2C
	add r0, r4, #0x118
	mov r2, #0x80
	bl ov00_0230B930
_02304C2C:
	ldr r0, [r5, #0xb4]
	str r0, [r4, #0x198]
	ldr r0, [r5, #0xb8]
	str r0, [r4, #0x19c]
	ldr r0, [r5, #0xbc]
	str r0, [r4, #0x1a0]
	ldr r0, [r5, #0xc0]
	str r0, [r4, #0x1a4]
	ldr r0, [r5, #0xc4]
	str r0, [r4, #0x1a8]
	ldr r1, [r5, #0xc8]
	cmp r1, #0
	moveq r0, #0
	streqb r0, [r4, #0x1ac]
	beq _02304C74
	add r0, r4, #0x1ac
	mov r2, #0x33
	bl ov00_0230B930
_02304C74:
	ldr r0, [r5, #0x18]
	str r0, [r4, #0xfc]
	ldr r0, [r5, #0x2c]
	str r0, [r4, #0x110]
	ldr r0, [r5, #0x30]
	str r0, [r4, #0x114]
	ldr r0, [r5, #0xb4]
	str r0, [r4, #0x198]
	ldr r0, [r5, #0xb8]
	str r0, [r4, #0x19c]
	ldr r0, [r5, #0xbc]
	str r0, [r4, #0x1a0]
	ldr r0, [r5, #0xc0]
	str r0, [r4, #0x1a4]
	ldr r0, [r5, #0xc4]
	str r0, [r4, #0x1a8]
	ldr r0, [r5, #0xcc]
	str r0, [r4, #0x1e0]
	ldr r0, [r5, #0xd0]
	str r0, [r4, #0x1e4]
	ldr r0, [r5, #0xd4]
	str r0, [r4, #0x1e8]
	ldr r0, [r5, #0xd8]
	str r0, [r4, #0x1ec]
	ldr r0, [r5, #0xdc]
	str r0, [r4, #0x1f0]
	ldr r0, [r5, #0xe0]
	str r0, [r4, #0x1f4]
	ldr r0, [r5, #0xe4]
	str r0, [r4, #0x1f8]
	ldr r0, [r5, #0xe8]
	str r0, [r4, #0x1fc]
	ldr r0, [r5, #0xec]
	str r0, [r4, #0x200]
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_02304B08

	arm_func_start ov00_02304D00
ov00_02304D00: ; 0x02304D00
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x268
	mov r4, r2
	mov sl, r0
	mov fp, r1
	mov r1, r4
	mov r2, #1
	ldr r6, [sl]
	bl ov00_0230B950
	cmp r0, #0
	addne sp, sp, #0x268
	movne r0, #4
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, _0230546C ; =ov00_0231B468
	mov r0, r4
	mov r2, #4
	bl strncmp
	cmp r0, #0
	beq _02304D78
	ldr r2, _02305470 ; =ov00_0231B470
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x268
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02304D78:
	ldr r1, _02305474 ; =ov00_0231B4A0
	add r2, sp, #0xec
	mov r0, r4
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	bne _02304DC0
	ldr r2, _02305470 ; =ov00_0231B470
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x268
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02304DC0:
	add r0, sp, #0xec
	bl sub_0208B360
	mov sb, r0
	add r2, sp, #0x10
	mov r0, sl
	mov r1, sb
	bl ov00_02308A4C
	mov r0, #0
	add r7, sp, #0x178
	mov r1, r0
	mov r2, r0
	mov r3, r0
	mov r5, #7
_02304DF4:
	stmia r7!, {r0, r1, r2, r3}
	stmia r7!, {r0, r1, r2, r3}
	subs r5, r5, #1
	bne _02304DF4
	stmia r7!, {r0, r1, r2, r3}
	add r3, sp, #0xb8
	add r1, sp, #0x66
	add r2, sp, #0xcd
	add r5, sp, #0x85
	add r0, sp, #0x47
	str r3, [sp, #0x17c]
	add r3, sp, #0x12c
	str r1, [sp, #0x184]
	str r5, [sp, #0x180]
	add r5, sp, #0x14
	str r0, [sp, #0x188]
	str r3, [sp, #0x18c]
	ldr r1, _02305478 ; =ov00_0231B4AC
	mov r0, r4
	mov r3, #0x1f
	str r2, [sp, #0x178]
	str r5, [sp, #0x240]
	bl ov00_0230BA28
	cmp r0, #0
	ldreq r0, [sp, #0x178]
	moveq r1, #0
	streqb r1, [r0]
	ldr r2, [sp, #0x17c]
	ldr r1, _0230547C ; =ov00_0231B4B4
	mov r0, r4
	mov r3, #0x15
	bl ov00_0230BA28
	cmp r0, #0
	ldreq r0, [sp, #0x17c]
	moveq r1, #0
	streqb r1, [r0]
	ldr r2, [sp, #0x180]
	ldr r1, _02305480 ; =ov00_0231B4C4
	mov r0, r4
	mov r3, #0x33
	bl ov00_0230BA28
	cmp r0, #0
	ldreq r0, [sp, #0x180]
	moveq r1, #0
	streqb r1, [r0]
	ldr r2, [sp, #0x184]
	ldr r1, _02305484 ; =ov00_0231B4CC
	mov r0, r4
	mov r3, #0x1f
	bl ov00_0230BA28
	cmp r0, #0
	ldreq r0, [sp, #0x184]
	moveq r1, #0
	streqb r1, [r0]
	ldr r2, [sp, #0x188]
	ldr r1, _02305488 ; =ov00_0231B4D8
	mov r0, r4
	mov r3, #0x1f
	bl ov00_0230BA28
	cmp r0, #0
	ldreq r0, [sp, #0x188]
	moveq r1, #0
	streqb r1, [r0]
	ldr r1, _0230548C ; =ov00_0231B4E4
	add r2, sp, #0xec
	mov r0, r4
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	mvneq r0, #0
	streq r0, [sp, #0x190]
	beq _02304F20
	add r0, sp, #0xec
	bl sub_0208B360
	str r0, [sp, #0x190]
_02304F20:
	ldr r2, [sp, #0x18c]
	ldr r1, _02305490 ; =ov00_0231B4F0
	mov r0, r4
	mov r3, #0x4c
	bl ov00_0230BA28
	cmp r0, #0
	ldreq r0, [sp, #0x18c]
	moveq r1, #0
	streqb r1, [r0]
	ldr r1, _02305494 ; =ov00_0231B4FC
	add r2, sp, #0x194
	mov r0, r4
	mov r3, #0xb
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	add r2, sp, #0x100
	streqb r0, [sp, #0x194]
	ldr r1, _02305498 ; =ov00_0231B508
	add r2, r2, #0x9f
	mov r0, r4
	mov r3, #3
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	streqb r0, [sp, #0x19f]
	ldr r1, _0230549C ; =ov00_0231B518
	add r2, sp, #0xec
	mov r0, r4
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	streq r0, [sp, #0x1a4]
	beq _02304FBC
	add r0, sp, #0xec
	bl sub_0208AE08
	bl _d2f
	str r0, [sp, #0x1a4]
_02304FBC:
	ldr r1, _023054A0 ; =ov00_0231B520
	add r2, sp, #0xec
	mov r0, r4
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	streq r0, [sp, #0x1a8]
	beq _02304FF0
	add r0, sp, #0xec
	bl sub_0208AE08
	bl _d2f
	str r0, [sp, #0x1a8]
_02304FF0:
	ldr r1, _023054A4 ; =ov00_0231B528
	add r2, sp, #0x1ac
	mov r0, r4
	mov r3, #0x80
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	streqb r0, [sp, #0x1ac]
	ldr r1, _023054A8 ; =ov00_0231B530
	add r2, sp, #0xec
	mov r0, r4
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	bne _02305040
	mov r0, #0
	str r0, [sp, #0x22c]
	str r0, [sp, #0x230]
	str r0, [sp, #0x234]
	b _02305070
_02305040:
	add r0, sp, #0xec
	bl sub_0208B360
	add r5, sp, #0x234
	mov r1, r0
	add r2, sp, #0x22c
	add r3, sp, #0x230
	mov r0, sl
	str r5, [sp]
	bl ov00_02304A98
	cmp r0, #0
	addne sp, sp, #0x268
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02305070:
	ldr r1, _023054AC ; =ov00_0231B53C
	add r2, sp, #0xec
	mov r0, r4
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	ldreq r0, _023054B0 ; =0x00000502
	streq r0, [sp, #0x238]
	beq _023050BC
	ldrsb r0, [sp, #0xec]
	cmp r0, #0x30
	moveq r0, #0x500
	streq r0, [sp, #0x238]
	beq _023050BC
	cmp r0, #0x31
	ldreq r0, _023054B4 ; =0x00000501
	streq r0, [sp, #0x238]
	ldrne r0, _023054B0 ; =0x00000502
	strne r0, [sp, #0x238]
_023050BC:
	ldr r1, _023054B8 ; =ov00_0231B544
	add r2, sp, #0xec
	mov r0, r4
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	mvneq r0, #0
	streq r0, [sp, #0x23c]
	beq _023050EC
	add r0, sp, #0xec
	bl sub_0208B360
	str r0, [sp, #0x23c]
_023050EC:
	ldr r2, [sp, #0x240]
	ldr r1, _023054BC ; =ov00_0231B54C
	mov r0, r4
	mov r3, #0x33
	bl ov00_0230BA28
	cmp r0, #0
	ldreq r0, [sp, #0x240]
	moveq r1, #0
	streqb r1, [r0]
	ldr r1, _023054C0 ; =ov00_0231B554
	add r2, sp, #0xec
	mov r0, r4
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	streq r0, [sp, #0x244]
	beq _02305140
	add r0, sp, #0xec
	bl sub_0208B360
	str r0, [sp, #0x244]
_02305140:
	ldr r1, _023054C4 ; =ov00_0231B55C
	add r2, sp, #0xec
	mov r0, r4
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	streq r0, [sp, #0x248]
	beq _02305170
	add r0, sp, #0xec
	bl sub_0208B360
	str r0, [sp, #0x248]
_02305170:
	ldr r1, _023054C8 ; =ov00_0231B564
	add r2, sp, #0xec
	mov r0, r4
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	streq r0, [sp, #0x24c]
	beq _023051A0
	add r0, sp, #0xec
	bl sub_0208B360
	str r0, [sp, #0x24c]
_023051A0:
	ldr r1, _023054CC ; =ov00_0231B56C
	add r2, sp, #0xec
	mov r0, r4
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	streq r0, [sp, #0x250]
	beq _023051D0
	add r0, sp, #0xec
	bl sub_0208B360
	str r0, [sp, #0x250]
_023051D0:
	ldr r1, _023054D0 ; =ov00_0231B574
	add r2, sp, #0xec
	mov r0, r4
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	streq r0, [sp, #0x254]
	beq _02305200
	add r0, sp, #0xec
	bl sub_0208B360
	str r0, [sp, #0x254]
_02305200:
	ldr r1, _023054D4 ; =ov00_0231B57C
	add r2, sp, #0xec
	mov r0, r4
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	streq r0, [sp, #0x258]
	beq _02305230
	add r0, sp, #0xec
	bl sub_0208B360
	str r0, [sp, #0x258]
_02305230:
	ldr r1, _023054D8 ; =ov00_0231B584
	add r2, sp, #0xec
	mov r0, r4
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	streq r0, [sp, #0x25c]
	beq _02305260
	add r0, sp, #0xec
	bl sub_0208B360
	str r0, [sp, #0x25c]
_02305260:
	ldr r1, _023054DC ; =ov00_0231B58C
	add r2, sp, #0xec
	mov r0, r4
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	streq r0, [sp, #0x260]
	beq _02305290
	add r0, sp, #0xec
	bl sub_0208B360
	str r0, [sp, #0x260]
_02305290:
	ldr r1, _023054E0 ; =ov00_0231B594
	add r2, sp, #0xec
	mov r0, r4
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	streq r0, [sp, #0x264]
	beq _023052C0
	add r0, sp, #0xec
	bl sub_0208B360
	str r0, [sp, #0x264]
_023052C0:
	ldr r1, _023054E4 ; =ov00_0231B59C
	add r2, sp, #0xec
	mov r0, r4
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	bne _02305308
	ldr r2, _02305470 ; =ov00_0231B470
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x268
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02305308:
	ldr r7, [r6, #0x5d4]
	ldr r8, [r6, #0x100]
	cmp r7, #0
	beq _02305364
	mov r5, #0x66
	mov r4, #1
_02305320:
	ldr r0, [r7, #0x10]
	cmp r0, sb
	ldreq r0, [r7]
	cmpeq r0, #0x65
	bne _02305358
	ldr r0, [sp, #0x10]
	cmp r0, #0
	bne _02305350
	mov r0, sl
	mov r1, sb
	bl ov00_0230899C
	str r0, [sp, #0x10]
_02305350:
	mov r8, r4
	str r5, [r7]
_02305358:
	ldr r7, [r7, #0x4c]
	cmp r7, #0
	bne _02305320
_02305364:
	ldr r0, [sp, #0x10]
	cmp r0, #0
	bne _0230538C
	ldr r0, [r6, #0x100]
	cmp r0, #0
	beq _0230538C
	mov r0, sl
	mov r1, sb
	bl ov00_0230899C
	str r0, [sp, #0x10]
_0230538C:
	cmp r8, #0
	beq _023053BC
	ldr r0, [sp, #0x10]
	ldr r0, [r0, #0x1c]
	bl ov00_022F5B14
	ldr r1, [sp, #0x10]
	mov r2, #0
	add r0, sp, #0xec
	str r2, [r1, #0x1c]
	bl ov00_022F5514
	ldr r1, [sp, #0x10]
	str r0, [r1, #0x1c]
_023053BC:
	ldr r0, [r6, #0x100]
	cmp r0, #0
	beq _023053D8
	ldr r1, [sp, #0x10]
	add r2, sp, #0x178
	mov r0, sl
	bl ov00_02306548
_023053D8:
	ldr r1, [fp, #0xc]
	ldr r0, [fp, #0x10]
	str r1, [sp, #8]
	str r0, [sp, #0xc]
	cmp r1, #0
	beq _02305454
	mov r0, #0x204
	bl ov00_022F5AE4
	movs r4, r0
	bne _02305418
	ldr r1, _023054E8 ; =ov00_0231B5A4
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0x268
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02305418:
	add r0, sp, #0x178
	mov r1, r4
	bl ov00_02304B08
	mov r2, #0
	stmia r4, {r2, sb}
	str fp, [sp]
	add r1, sp, #8
	str r2, [sp, #4]
	mov r0, sl
	mov r3, r4
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	addne sp, sp, #0x268
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02305454:
	mov r0, sl
	mov r1, fp
	bl ov00_0230716C
	mov r0, #0
	add sp, sp, #0x268
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_0230546C: .word ov00_0231B468
_02305470: .word ov00_0231B470
_02305474: .word ov00_0231B4A0
_02305478: .word ov00_0231B4AC
_0230547C: .word ov00_0231B4B4
_02305480: .word ov00_0231B4C4
_02305484: .word ov00_0231B4CC
_02305488: .word ov00_0231B4D8
_0230548C: .word ov00_0231B4E4
_02305490: .word ov00_0231B4F0
_02305494: .word ov00_0231B4FC
_02305498: .word ov00_0231B508
_0230549C: .word ov00_0231B518
_023054A0: .word ov00_0231B520
_023054A4: .word ov00_0231B528
_023054A8: .word ov00_0231B530
_023054AC: .word ov00_0231B53C
_023054B0: .word 0x00000502
_023054B4: .word 0x00000501
_023054B8: .word ov00_0231B544
_023054BC: .word ov00_0231B54C
_023054C0: .word ov00_0231B554
_023054C4: .word ov00_0231B55C
_023054C8: .word ov00_0231B564
_023054CC: .word ov00_0231B56C
_023054D0: .word ov00_0231B574
_023054D4: .word ov00_0231B57C
_023054D8: .word ov00_0231B584
_023054DC: .word ov00_0231B58C
_023054E0: .word ov00_0231B594
_023054E4: .word ov00_0231B59C
_023054E8: .word ov00_0231B5A4
	arm_func_end ov00_02304D00

	arm_func_start ov00_023054EC
ov00_023054EC: ; 0x023054EC
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	ldr r4, [r6]
	mov r5, r1
	ldr r2, [r4, #0x5e8]
	cmp r2, #0
	ble _02305568
	ldr r2, _023055C4 ; =ov00_0231B5B4
	bl ov00_02302638
	ldr r2, [r4, #0x198]
	mov r0, r6
	mov r1, r5
	bl ov00_02302668
	ldr r2, [r4, #0x5e0]
	mov r0, r6
	mov r1, r5
	bl ov00_02302638
	ldr r2, _023055C8 ; =ov00_0231B5CC
	mov r0, r6
	mov r1, r5
	bl ov00_02302638
	mov r0, r6
	mov r1, r5
	ldr r2, [r4, #0x1a4]
	bl ov00_02302668
	mov r0, r6
	mov r1, r5
	ldr r2, _023055CC ; =ov00_0231B5D8
	bl ov00_02302638
	mov r0, #0
	str r0, [r4, #0x5e8]
_02305568:
	ldr r0, [r4, #0x5f8]
	cmp r0, #0
	ble _023055BC
	ldr r2, _023055D0 ; =ov00_0231B5E0
	mov r0, r6
	mov r1, r5
	bl ov00_02302638
	ldr r2, [r4, #0x198]
	mov r0, r6
	mov r1, r5
	bl ov00_02302668
	ldr r2, [r4, #0x5f0]
	mov r0, r6
	mov r1, r5
	bl ov00_02302638
	ldr r2, _023055CC ; =ov00_0231B5D8
	mov r0, r6
	mov r1, r5
	bl ov00_02302638
	mov r0, #0
	str r0, [r4, #0x5f8]
_023055BC:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_023055C4: .word ov00_0231B5B4
_023055C8: .word ov00_0231B5CC
_023055CC: .word ov00_0231B5D8
_023055D0: .word ov00_0231B5E0
	arm_func_end ov00_023054EC

	arm_func_start ov00_023055D4
ov00_023055D4: ; 0x023055D4
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	ldr r4, [r6]
	mov r5, r2
	mov r2, r1
	add r1, r4, #0x5e0
	bl ov00_02302638
	cmp r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	mov r0, r6
	mov r2, r5
	add r1, r4, #0x5e0
	bl ov00_02302638
	cmp r0, #0
	moveq r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_023055D4

	arm_func_start ov00_02305614
ov00_02305614: ; 0x02305614
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r0
	ldr r4, [r6]
	mov r5, r2
	mov r2, r1
	add r1, r4, #0x5f0
	bl ov00_02302638
	cmp r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	mov r0, r6
	mov r2, r5
	add r1, r4, #0x5f0
	bl ov00_02302638
	cmp r0, #0
	moveq r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_02305614

	arm_func_start ov00_02305654
ov00_02305654: ; 0x02305654
	stmdb sp!, {r4, lr}
	sub sp, sp, #0x10
	sub r1, r1, #6
	sub r1, r1, #0x700
	mov r4, r0
	cmp r1, #0x18
	addls pc, pc, r1, lsl #2
	b _02305A98
_02305674: ; jump table
	b _023057AC ; case 0
	b _02305A98 ; case 1
	b _023056D8 ; case 2
	b _02305A98 ; case 3
	b _02305A98 ; case 4
	b _02305720 ; case 5
	b _023057D8 ; case 6
	b _02305804 ; case 7
	b _02305830 ; case 8
	b _02305A98 ; case 9
	b _02305868 ; case 10
	b _02305A98 ; case 11
	b _023058A0 ; case 12
	b _023058D8 ; case 13
	b _02305904 ; case 14
	b _02305930 ; case 15
	b _02305A98 ; case 16
	b _02305A98 ; case 17
	b _02305964 ; case 18
	b _02305990 ; case 19
	b _023059BC ; case 20
	b _023059E8 ; case 21
	b _02305A14 ; case 22
	b _02305A40 ; case 23
	b _02305A6C ; case 24
_023056D8:
	cmp r2, #0
	bge _023056F4
	ldr r1, _02305ABC ; =ov00_0231B5F4
	bl ov00_0230BCCC
	add sp, sp, #0x10
	mov r0, #2
	ldmia sp!, {r4, pc}
_023056F4:
	ldr r1, _02305AC0 ; =ov00_0231B608
	add r0, sp, #0
	bl sub_020790DC
	ldr r1, _02305AC4 ; =ov00_0231B4FC
	add r2, sp, #0
	mov r0, r4
	bl ov00_023055D4
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_02305720:
	cmp r2, #0x500
	beq _02305744
	ldr r1, _02305AC8 ; =0x00000501
	cmp r2, r1
	beq _02305760
	add r1, r1, #1
	cmp r2, r1
	beq _0230577C
	b _02305798
_02305744:
	ldr r1, _02305ACC ; =ov00_0231B53C
	ldr r2, _02305AD0 ; =ov00_0231B60C
	bl ov00_023055D4
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_02305760:
	ldr r1, _02305ACC ; =ov00_0231B53C
	ldr r2, _02305AD4 ; =ov00_0231B610
	bl ov00_023055D4
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_0230577C:
	ldr r1, _02305ACC ; =ov00_0231B53C
	ldr r2, _02305AD8 ; =ov00_0231B614
	bl ov00_023055D4
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_02305798:
	ldr r1, _02305ADC ; =ov00_0231B618
	bl ov00_0230BCCC
	add sp, sp, #0x10
	mov r0, #2
	ldmia sp!, {r4, pc}
_023057AC:
	ldr r1, _02305AC0 ; =ov00_0231B608
	add r0, sp, #0
	bl sub_020790DC
	ldr r1, _02305AE0 ; =ov00_0231B4E4
	add r2, sp, #0
	mov r0, r4
	bl ov00_023055D4
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_023057D8:
	ldr r1, _02305AC0 ; =ov00_0231B608
	add r0, sp, #0
	bl sub_020790DC
	ldr r1, _02305AE4 ; =ov00_0231B628
	add r2, sp, #0
	mov r0, r4
	bl ov00_02305614
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_02305804:
	ldr r1, _02305AC0 ; =ov00_0231B608
	add r0, sp, #0
	bl sub_020790DC
	ldr r1, _02305AE8 ; =ov00_0231B638
	add r2, sp, #0
	mov r0, r4
	bl ov00_02305614
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_02305830:
	mov r0, r2, asr #3
	add r2, r2, r0, lsr #28
	ldr r1, _02305AC0 ; =ov00_0231B608
	add r0, sp, #0
	mov r2, r2, asr #4
	bl sub_020790DC
	ldr r1, _02305AEC ; =ov00_0231B644
	add r2, sp, #0
	mov r0, r4
	bl ov00_02305614
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_02305868:
	mov r0, r2, asr #1
	add r2, r2, r0, lsr #30
	ldr r1, _02305AC0 ; =ov00_0231B608
	add r0, sp, #0
	mov r2, r2, asr #2
	bl sub_020790DC
	ldr r1, _02305AF0 ; =ov00_0231B650
	add r2, sp, #0
	mov r0, r4
	bl ov00_02305614
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_023058A0:
	mov r0, r2, asr #1
	add r2, r2, r0, lsr #30
	ldr r1, _02305AC0 ; =ov00_0231B608
	add r0, sp, #0
	mov r2, r2, asr #2
	bl sub_020790DC
	ldr r1, _02305AF4 ; =ov00_0231B660
	add r2, sp, #0
	mov r0, r4
	bl ov00_02305614
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_023058D8:
	ldr r1, _02305AC0 ; =ov00_0231B608
	add r0, sp, #0
	bl sub_020790DC
	ldr r1, _02305AF8 ; =ov00_0231B670
	add r2, sp, #0
	mov r0, r4
	bl ov00_02305614
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_02305904:
	ldr r1, _02305AC0 ; =ov00_0231B608
	add r0, sp, #0
	bl sub_020790DC
	ldr r1, _02305AFC ; =ov00_0231B680
	add r2, sp, #0
	mov r0, r4
	bl ov00_02305614
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_02305930:
	ldr r1, _02305AC0 ; =ov00_0231B608
	cmp r2, #0
	movne r2, #1
	add r0, sp, #0
	bl sub_020790DC
	ldr r1, _02305B00 ; =ov00_0231B694
	add r2, sp, #0
	mov r0, r4
	bl ov00_02305614
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_02305964:
	ldr r1, _02305AC0 ; =ov00_0231B608
	add r0, sp, #0
	bl sub_020790DC
	ldr r1, _02305B04 ; =ov00_0231B554
	add r2, sp, #0
	mov r0, r4
	bl ov00_023055D4
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_02305990:
	ldr r1, _02305AC0 ; =ov00_0231B608
	add r0, sp, #0
	bl sub_020790DC
	ldr r1, _02305B08 ; =ov00_0231B55C
	add r2, sp, #0
	mov r0, r4
	bl ov00_023055D4
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_023059BC:
	ldr r1, _02305AC0 ; =ov00_0231B608
	add r0, sp, #0
	bl sub_020790DC
	ldr r1, _02305B0C ; =ov00_0231B564
	add r2, sp, #0
	mov r0, r4
	bl ov00_023055D4
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_023059E8:
	ldr r1, _02305AC0 ; =ov00_0231B608
	add r0, sp, #0
	bl sub_020790DC
	ldr r1, _02305B10 ; =ov00_0231B56C
	add r2, sp, #0
	mov r0, r4
	bl ov00_023055D4
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_02305A14:
	ldr r1, _02305AC0 ; =ov00_0231B608
	add r0, sp, #0
	bl sub_020790DC
	ldr r1, _02305B14 ; =ov00_0231B574
	add r2, sp, #0
	mov r0, r4
	bl ov00_023055D4
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_02305A40:
	ldr r1, _02305AC0 ; =ov00_0231B608
	add r0, sp, #0
	bl sub_020790DC
	ldr r1, _02305B18 ; =ov00_0231B57C
	add r2, sp, #0
	mov r0, r4
	bl ov00_023055D4
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_02305A6C:
	ldr r1, _02305AC0 ; =ov00_0231B608
	add r0, sp, #0
	bl sub_020790DC
	ldr r1, _02305B1C ; =ov00_0231B584
	add r2, sp, #0
	mov r0, r4
	bl ov00_023055D4
	cmp r0, #0
	beq _02305AB0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
_02305A98:
	ldr r1, _02305B20 ; =ov00_0231B6A4
	mov r0, r4
	bl ov00_0230BCCC
	add sp, sp, #0x10
	mov r0, #2
	ldmia sp!, {r4, pc}
_02305AB0:
	mov r0, #0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
	.align 2, 0
_02305ABC: .word ov00_0231B5F4
_02305AC0: .word ov00_0231B608
_02305AC4: .word ov00_0231B4FC
_02305AC8: .word 0x00000501
_02305ACC: .word ov00_0231B53C
_02305AD0: .word ov00_0231B60C
_02305AD4: .word ov00_0231B610
_02305AD8: .word ov00_0231B614
_02305ADC: .word ov00_0231B618
_02305AE0: .word ov00_0231B4E4
_02305AE4: .word ov00_0231B628
_02305AE8: .word ov00_0231B638
_02305AEC: .word ov00_0231B644
_02305AF0: .word ov00_0231B650
_02305AF4: .word ov00_0231B660
_02305AF8: .word ov00_0231B670
_02305AFC: .word ov00_0231B680
_02305B00: .word ov00_0231B694
_02305B04: .word ov00_0231B554
_02305B08: .word ov00_0231B55C
_02305B0C: .word ov00_0231B564
_02305B10: .word ov00_0231B56C
_02305B14: .word ov00_0231B574
_02305B18: .word ov00_0231B57C
_02305B1C: .word ov00_0231B584
_02305B20: .word ov00_0231B6A4
	arm_func_end ov00_02305654

	arm_func_start ov00_02305B24
ov00_02305B24: ; 0x02305B24
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #0x130
	mov r6, r0
	movs r5, r2
	ldr r4, [r6]
	bne _02305B50
	ldr r1, _02306284 ; =ov00_0231B6B4
	bl ov00_0230BCCC
	add sp, sp, #0x130
	mov r0, #2
	ldmia sp!, {r4, r5, r6, pc}
_02305B50:
	sub r1, r1, #0x700
	cmp r1, #0x1e
	addls pc, pc, r1, lsl #2
	b _02306260
_02305B60: ; jump table
	b _02305BDC ; case 0
	b _02305C3C ; case 1
	b _02305CA0 ; case 2
	b _02305D08 ; case 3
	b _02305D7C ; case 4
	b _02305DAC ; case 5
	b _02305F30 ; case 6
	b _02305DDC ; case 7
	b _02305E0C ; case 8
	b _02305E3C ; case 9
	b _02306260 ; case 10
	b _02305E94 ; case 11
	b _02306260 ; case 12
	b _02305F60 ; case 13
	b _02305F88 ; case 14
	b _02305FB0 ; case 15
	b _02305FE0 ; case 16
	b _02306008 ; case 17
	b _02306038 ; case 18
	b _02306260 ; case 19
	b _02306060 ; case 20
	b _02306088 ; case 21
	b _023060B0 ; case 22
	b _023060E0 ; case 23
	b _02306110 ; case 24
	b _02306140 ; case 25
	b _02306170 ; case 26
	b _023061A0 ; case 27
	b _023061D0 ; case 28
	b _02306200 ; case 29
	b _02306230 ; case 30
_02305BDC:
	ldrsb r1, [r5]
	cmp r1, #0
	bne _02305BFC
	ldr r1, _02306284 ; =ov00_0231B6B4
	bl ov00_0230BCCC
	add sp, sp, #0x130
	mov r0, #2
	ldmia sp!, {r4, r5, r6, pc}
_02305BFC:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x1f
	bl ov00_0230B930
	add r1, sp, #0x2d
	add r0, r4, #0x110
	mov r2, #0x1f
	bl ov00_0230B930
	ldr r1, _02306288 ; =ov00_0231B4AC
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02305C3C:
	ldrsb r1, [r5]
	cmp r1, #0
	bne _02305C5C
	ldr r1, _02306284 ; =ov00_0231B6B4
	bl ov00_0230BCCC
	add sp, sp, #0x130
	mov r0, #2
	ldmia sp!, {r4, r5, r6, pc}
_02305C5C:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x15
	bl ov00_0230B930
	add r0, r4, #0x2f
	add r1, sp, #0x2d
	add r0, r0, #0x100
	mov r2, #0x15
	bl ov00_0230B930
	ldr r1, _0230628C ; =ov00_0231B4B4
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02305CA0:
	ldrsb r1, [r5]
	cmp r1, #0
	bne _02305CC0
	ldr r1, _02306284 ; =ov00_0231B6B4
	bl ov00_0230BCCC
	add sp, sp, #0x130
	mov r0, #2
	ldmia sp!, {r4, r5, r6, pc}
_02305CC0:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x33
	bl ov00_0230B930
	add r0, sp, #0x2d
	bl ov00_022F5548
	add r1, sp, #0x2d
	add r0, r4, #0x144
	mov r2, #0x33
	bl ov00_0230B930
	ldr r1, _02306290 ; =ov00_0231B4C4
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_02305614
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02305D08:
	ldrsb r1, [r5]
	cmp r1, #0
	bne _02305D28
	ldr r1, _02306284 ; =ov00_0231B6B4
	bl ov00_0230BCCC
	add sp, sp, #0x130
	mov r0, #2
	ldmia sp!, {r4, r5, r6, pc}
_02305D28:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x1f
	bl ov00_0230B930
	add r0, r4, #0x77
	add r1, sp, #0x2d
	add r0, r0, #0x100
	mov r2, #0x1f
	bl ov00_0230B930
	add r0, r4, #0x77
	add r1, sp, #0
	add r0, r0, #0x100
	bl PasswordEncryptString
	ldr r1, _02306294 ; =ov00_0231B6C4
	add r2, sp, #0
	mov r0, r6
	bl ov00_02305614
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02305D7C:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x1f
	bl ov00_0230B930
	ldr r1, _02306298 ; =ov00_0231B4CC
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02305DAC:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x1f
	bl ov00_0230B930
	ldr r1, _0230629C ; =ov00_0231B4D8
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02305DDC:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x4c
	bl ov00_0230B930
	ldr r1, _023062A0 ; =ov00_0231B4F0
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02305E0C:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0xb
	bl ov00_0230B930
	ldr r1, _023062A4 ; =ov00_0231B4FC
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02305E3C:
	mov r0, r5
	bl strlen
	cmp r0, #2
	beq _02305E64
	ldr r1, _023062A8 ; =ov00_0231B6D4
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x130
	mov r0, #2
	ldmia sp!, {r4, r5, r6, pc}
_02305E64:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #3
	bl ov00_0230B930
	ldr r1, _023062AC ; =ov00_0231B508
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02305E94:
	ldrsb r1, [r5]
	cmp r1, #0
	blt _02305EB0
	cmp r1, #0x80
	bge _02305EB0
	ldr r0, _023062B0 ; =_020AED30
	ldrb r1, [r0, r1]
_02305EB0:
	mov r0, r1, lsl #0x18
	mov r0, r0, asr #0x18
	cmp r0, #0x4d
	add r2, sp, #0x2d
	bne _02305EDC
	ldr r0, _023062B4 ; =ov00_0231B60C
	ldrb r1, [r0]
	ldrb r0, [r0, #1]
	strb r1, [r2]
	strb r0, [r2, #1]
	b _02305F10
_02305EDC:
	cmp r0, #0x46
	bne _02305EFC
	ldr r0, _023062B8 ; =ov00_0231B610
	ldrb r1, [r0]
	ldrb r0, [r0, #1]
	strb r1, [r2]
	strb r0, [r2, #1]
	b _02305F10
_02305EFC:
	ldr r0, _023062BC ; =ov00_0231B614
	ldrb r1, [r0]
	ldrb r0, [r0, #1]
	strb r1, [r2]
	strb r0, [r2, #1]
_02305F10:
	ldr r1, _023062C0 ; =ov00_0231B53C
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02305F30:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x100
	bl ov00_0230B930
	ldr r1, _023062C4 ; =ov00_0231B4E4
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02305F60:
	mov r0, r5
	bl sub_0208B360
	mov r2, r0
	ldr r1, _023062C8 ; =0x0000070D
	mov r0, r6
	bl ov00_02305654
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02305F88:
	mov r0, r5
	bl sub_0208B360
	mov r2, r0
	ldr r1, _023062CC ; =0x0000070E
	mov r0, r6
	bl ov00_02305654
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02305FB0:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x100
	bl ov00_0230B930
	ldr r1, _023062D0 ; =ov00_0231B6EC
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02305FE0:
	mov r0, r5
	bl sub_0208B360
	mov r2, r0
	mov r0, r6
	mov r1, #0x710
	bl ov00_02305654
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02306008:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x100
	bl ov00_0230B930
	ldr r1, _023062D4 ; =ov00_0231B700
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02306038:
	mov r0, r5
	bl sub_0208B360
	mov r2, r0
	ldr r1, _023062D8 ; =0x00000712
	mov r0, r6
	bl ov00_02305654
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02306060:
	mov r0, r5
	bl sub_0208B360
	mov r2, r0
	ldr r1, _023062DC ; =0x00000714
	mov r0, r6
	bl ov00_02305654
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02306088:
	mov r0, r5
	bl sub_0208B360
	mov r2, r0
	ldr r1, _023062E0 ; =0x00000715
	mov r0, r6
	bl ov00_02305654
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_023060B0:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x100
	bl ov00_0230B930
	ldr r1, _023062E4 ; =ov00_0231B714
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_023060E0:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x33
	bl ov00_0230B930
	ldr r1, _023062E8 ; =ov00_0231B54C
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02306110:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x100
	bl ov00_0230B930
	ldr r1, _023062EC ; =ov00_0231B554
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02306140:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x100
	bl ov00_0230B930
	ldr r1, _023062F0 ; =ov00_0231B55C
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02306170:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x100
	bl ov00_0230B930
	ldr r1, _023062F4 ; =ov00_0231B564
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_023061A0:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x100
	bl ov00_0230B930
	ldr r1, _023062F8 ; =ov00_0231B56C
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_023061D0:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x100
	bl ov00_0230B930
	ldr r1, _023062FC ; =ov00_0231B574
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02306200:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x100
	bl ov00_0230B930
	ldr r1, _02306300 ; =ov00_0231B57C
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02306230:
	add r0, sp, #0x2d
	mov r1, r5
	mov r2, #0x100
	bl ov00_0230B930
	ldr r1, _02306304 ; =ov00_0231B584
	add r2, sp, #0x2d
	mov r0, r6
	bl ov00_023055D4
	cmp r0, #0
	beq _02306278
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
_02306260:
	ldr r1, _02306308 ; =ov00_0231B6A4
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x130
	mov r0, #2
	ldmia sp!, {r4, r5, r6, pc}
_02306278:
	mov r0, #0
	add sp, sp, #0x130
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_02306284: .word ov00_0231B6B4
_02306288: .word ov00_0231B4AC
_0230628C: .word ov00_0231B4B4
_02306290: .word ov00_0231B4C4
_02306294: .word ov00_0231B6C4
_02306298: .word ov00_0231B4CC
_0230629C: .word ov00_0231B4D8
_023062A0: .word ov00_0231B4F0
_023062A4: .word ov00_0231B4FC
_023062A8: .word ov00_0231B6D4
_023062AC: .word ov00_0231B508
_023062B0: .word _020AED30
_023062B4: .word ov00_0231B60C
_023062B8: .word ov00_0231B610
_023062BC: .word ov00_0231B614
_023062C0: .word ov00_0231B53C
_023062C4: .word ov00_0231B4E4
_023062C8: .word 0x0000070D
_023062CC: .word 0x0000070E
_023062D0: .word ov00_0231B6EC
_023062D4: .word ov00_0231B700
_023062D8: .word 0x00000712
_023062DC: .word 0x00000714
_023062E0: .word 0x00000715
_023062E4: .word ov00_0231B714
_023062E8: .word ov00_0231B54C
_023062EC: .word ov00_0231B554
_023062F0: .word ov00_0231B55C
_023062F4: .word ov00_0231B564
_023062F8: .word ov00_0231B56C
_023062FC: .word ov00_0231B574
_02306300: .word ov00_0231B57C
_02306304: .word ov00_0231B584
_02306308: .word ov00_0231B6A4
	arm_func_end ov00_02305B24

	arm_func_start ov00_0230630C
ov00_0230630C: ; 0x0230630C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	ldr r4, [r7]
	mov r5, r2
	mov r6, r1
	ldr r2, _02306394 ; =ov00_0231B720
	add r1, r4, #0x210
	bl ov00_02302638
	ldr r2, [r4, #0x198]
	mov r0, r7
	add r1, r4, #0x210
	bl ov00_02302668
	ldr r2, _02306398 ; =ov00_0231B4A0
	mov r0, r7
	add r1, r4, #0x210
	bl ov00_02302638
	mov r2, r6
	mov r0, r7
	add r1, r4, #0x210
	bl ov00_02302668
	mov r0, r7
	add r1, r4, #0x210
	ldr r2, _0230639C ; =ov00_0231B738
	bl ov00_02302638
	mov r2, r5
	mov r0, r7
	add r1, r4, #0x210
	bl ov00_02302668
	mov r0, r7
	add r1, r4, #0x210
	ldr r2, _023063A0 ; =ov00_0231B5D8
	bl ov00_02302638
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_02306394: .word ov00_0231B720
_02306398: .word ov00_0231B4A0
_0230639C: .word ov00_0231B738
_023063A0: .word ov00_0231B5D8
	arm_func_end ov00_0230630C

	arm_func_start ov00_023063A4
ov00_023063A4: ; 0x023063A4
	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
	sub sp, sp, #0x1c
	mov r8, r0
	ldr r0, [r8]
	mov r4, #0
	str r4, [sp, #0x14]
	ldr r0, [r0, #0x100]
	cmp r2, #1
	moveq r4, #1
	cmp r0, #0
	ldr r5, [sp, #0x38]
	moveq r4, #0
	cmp r5, #0
	mov r7, r1
	mov r6, r3
	cmpne r4, #0
	beq _023064C4
	add r2, sp, #0x18
	mov r0, r8
	mov r1, r7
	bl ov00_02308A4C
	cmp r0, #0
	ldrne r0, [sp, #0x18]
	ldrne r0, [r0, #0x10]
	cmpne r0, #0
	beq _023064C4
	mov r0, #0x204
	bl ov00_022F5AE4
	movs r4, r0
	bne _02306434
	ldr r1, _02306544 ; =ov00_0231B5A4
	mov r0, r8
	bl ov00_0230BCCC
	add sp, sp, #0x1c
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
_02306434:
	ldr r0, [sp, #0x18]
	mov r1, r4
	ldr r0, [r0, #0x10]
	bl ov00_02304B08
	mov r2, #0
	ldr ip, [sp, #0x3c]
	stmia r4, {r2, r7}
	mov r0, #1
	stmia sp, {r0, r5}
	add r3, sp, #0x14
	mov r0, r8
	mov r1, #2
	str r5, [sp, #0xc]
	str ip, [sp, #0x10]
	str ip, [sp, #8]
	bl ov00_0230703C
	cmp r0, #0
	addne sp, sp, #0x1c
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldr r2, [sp, #0x14]
	add r1, sp, #0xc
	ldr r5, [r2, #0x18]
	mov r0, r8
	str r2, [sp]
	mov r2, #0
	str r2, [sp, #4]
	mov r3, r4
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	addne sp, sp, #0x1c
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldr r1, [sp, #0x14]
	mov r0, r8
	bl ov00_0230716C
	b _02306518
_023064C4:
	str r6, [sp]
	ldr r4, [sp, #0x3c]
	str r5, [sp, #4]
	add r3, sp, #0x14
	mov r0, r8
	mov r1, #2
	mov r2, #0
	str r4, [sp, #8]
	bl ov00_0230703C
	cmp r0, #0
	addne sp, sp, #0x1c
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldr r1, [sp, #0x14]
	mov r0, r8
	ldr r5, [r1, #0x18]
	mov r1, r7
	mov r2, r5
	bl ov00_0230630C
	cmp r0, #0
	addne sp, sp, #0x1c
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
_02306518:
	cmp r6, #0
	beq _02306538
	mov r0, r8
	mov r1, r5
	bl ov00_023003B4
	cmp r0, #0
	addne sp, sp, #0x1c
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, pc}
_02306538:
	mov r0, #0
	add sp, sp, #0x1c
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
	.align 2, 0
_02306544: .word ov00_0231B5A4
	arm_func_end ov00_023063A4

	arm_func_start ov00_02306548
ov00_02306548: ; 0x02306548
	stmdb sp!, {r4, r5, r6, lr}
	ldr r0, [r0]
	mov r5, r1
	ldr r0, [r0, #0x100]
	mov r4, r2
	cmp r0, #0
	moveq r0, #1
	ldmeqia sp!, {r4, r5, r6, pc}
	mov r0, r5
	bl ov00_02306620
	mov r0, #0xf0
	bl ov00_022F5AE4
	movs r6, r0
	str r0, [r5, #0x10]
	beq _0230660C
	mov lr, r4
	mov ip, #0xf
_0230658C:
	ldmia lr!, {r0, r1, r2, r3}
	stmia r6!, {r0, r1, r2, r3}
	subs ip, ip, #1
	bne _0230658C
	ldr r0, [r4]
	bl ov00_022F5514
	ldr r1, [r5, #0x10]
	str r0, [r1]
	ldr r0, [r4, #4]
	bl ov00_022F5514
	ldr r1, [r5, #0x10]
	str r0, [r1, #4]
	ldr r0, [r4, #8]
	bl ov00_022F5514
	ldr r1, [r5, #0x10]
	str r0, [r1, #8]
	ldr r0, [r4, #0xc]
	bl ov00_022F5514
	ldr r1, [r5, #0x10]
	str r0, [r1, #0xc]
	ldr r0, [r4, #0x10]
	bl ov00_022F5514
	ldr r1, [r5, #0x10]
	str r0, [r1, #0x10]
	ldr r0, [r4, #0x14]
	bl ov00_022F5514
	ldr r1, [r5, #0x10]
	str r0, [r1, #0x14]
	ldr r0, [r4, #0xc8]
	bl ov00_022F5514
	ldr r1, [r5, #0x10]
	str r0, [r1, #0xc8]
_0230660C:
	ldr r0, [r5, #0x10]
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_02306548

	arm_func_start ov00_02306620
ov00_02306620: ; 0x02306620
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r0, [r4, #0x10]
	cmp r0, #0
	ldmeqia sp!, {r4, pc}
	ldr r0, [r0]
	bl ov00_022F5B14
	ldr r0, [r4, #0x10]
	mov r1, #0
	str r1, [r0]
	ldr r0, [r4, #0x10]
	ldr r0, [r0, #4]
	bl ov00_022F5B14
	ldr r0, [r4, #0x10]
	mov r1, #0
	str r1, [r0, #4]
	ldr r0, [r4, #0x10]
	ldr r0, [r0, #8]
	bl ov00_022F5B14
	ldr r0, [r4, #0x10]
	mov r1, #0
	str r1, [r0, #8]
	ldr r0, [r4, #0x10]
	ldr r0, [r0, #0xc]
	bl ov00_022F5B14
	ldr r0, [r4, #0x10]
	mov r1, #0
	str r1, [r0, #0xc]
	ldr r0, [r4, #0x10]
	ldr r0, [r0, #0x10]
	bl ov00_022F5B14
	ldr r0, [r4, #0x10]
	mov r1, #0
	str r1, [r0, #0x10]
	ldr r0, [r4, #0x10]
	ldr r0, [r0, #0x14]
	bl ov00_022F5B14
	ldr r0, [r4, #0x10]
	mov r1, #0
	str r1, [r0, #0x14]
	ldr r0, [r4, #0x10]
	ldr r0, [r0, #0xc8]
	bl ov00_022F5B14
	ldr r0, [r4, #0x10]
	mov r1, #0
	str r1, [r0, #0xc8]
	ldr r0, [r4, #0x10]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0x10]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_02306620

	arm_func_start ov00_023066EC
ov00_023066EC: ; 0x023066EC
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r0, [r4]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4]
	ldr r0, [r4, #4]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #4]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_023066EC

	arm_func_start ov00_02306718
ov00_02306718: ; 0x02306718
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	ldr r2, _02306758 ; =ov00_023066EC
	ldr r4, [r5]
	mov r0, #8
	mov r1, #1
	bl ov00_022F4700
	str r0, [r4, #0x3b4]
	cmp r0, #0
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r1, _0230675C ; =ov00_0231B740
	mov r0, r5
	bl ov00_0230BCCC
	mov r0, #1
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_02306758: .word ov00_023066EC
_0230675C: .word ov00_0231B740
	arm_func_end ov00_02306718

	arm_func_start ov00_02306760
ov00_02306760: ; 0x02306760
	stmdb sp!, {r4, lr}
	ldr r4, [r0]
	ldr r0, [r4, #0x3b4]
	cmp r0, #0
	ldmeqia sp!, {r4, pc}
	bl ov00_022F4758
	mov r0, #0
	str r0, [r4, #0x3b4]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_02306760

	arm_func_start ov00_02306784
ov00_02306784: ; 0x02306784
	ldr ip, _02306794 ; =strcmp
	ldr r0, [r0]
	ldr r1, [r1]
	bx ip
	.align 2, 0
_02306794: .word strcmp
	arm_func_end ov00_02306784

	arm_func_start ov00_02306798
ov00_02306798: ; 0x02306798
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #8
	mov r5, r1
	mov r4, r3
	cmp r2, #0
	bne _023067C4
	ldr r1, _02306814 ; =ov00_0231B750
	bl ov00_0230BCCC
	add sp, sp, #8
	mov r0, #2
	ldmia sp!, {r3, r4, r5, pc}
_023067C4:
	cmp r4, #0
	bne _023067E0
	ldr r1, _02306818 ; =ov00_0231B764
	bl ov00_0230BCCC
	add sp, sp, #8
	mov r0, #2
	ldmia sp!, {r3, r4, r5, pc}
_023067E0:
	mov r0, r2
	bl ov00_022F5514
	str r0, [sp]
	mov r0, r4
	bl ov00_022F5514
	str r0, [sp, #4]
	ldr r2, _0230681C ; =ov00_02306784
	add r1, sp, #0
	mov r0, r5
	bl ov00_022F4870
	mov r0, #0
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_02306814: .word ov00_0231B750
_02306818: .word ov00_0231B764
_0230681C: .word ov00_02306784
	arm_func_end ov00_02306798

	arm_func_start ov00_02306820
ov00_02306820: ; 0x02306820
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #0xc
	mov r6, r1
	mov r5, r3
	cmp r2, #0
	bne _0230684C
	ldr r1, _023068BC ; =ov00_0231B750
	bl ov00_0230BCCC
	add sp, sp, #0xc
	mov r0, #2
	ldmia sp!, {r3, r4, r5, r6, pc}
_0230684C:
	mov r0, r2
	bl ov00_022F5514
	str r0, [sp, #4]
	mov r4, #1
	ldr r2, _023068C0 ; =ov00_02306784
	add r1, sp, #4
	mov r0, r6
	mov r3, #0
	str r4, [sp]
	bl ov00_022F4968
	mov r1, r0
	mvn r0, #0
	cmp r1, r0
	beq _023068A4
	mov r0, r6
	bl ov00_022F47A8
	mov r4, r0
	ldr r0, [r4, #4]
	bl ov00_022F5B14
	mov r0, r5
	bl ov00_022F5514
	str r0, [r4, #4]
_023068A4:
	ldr r0, [sp, #4]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [sp, #4]
	add sp, sp, #0xc
	ldmia sp!, {r3, r4, r5, r6, pc}
	.align 2, 0
_023068BC: .word ov00_0231B750
_023068C0: .word ov00_02306784
	arm_func_end ov00_02306820

	arm_func_start ov00_023068C4
ov00_023068C4: ; 0x023068C4
	stmdb sp!, {r4, r5, lr}
	sub sp, sp, #0xc
	mov r5, r1
	mov r4, r3
	cmp r2, #0
	bne _023068F0
	ldr r1, _02306950 ; =ov00_0231B750
	bl ov00_0230BCCC
	add sp, sp, #0xc
	mov r0, #2
	ldmia sp!, {r4, r5, pc}
_023068F0:
	mov r0, r2
	bl ov00_022F5514
	str r0, [sp, #4]
	mov ip, #1
	ldr r2, _02306954 ; =ov00_02306784
	add r1, sp, #4
	mov r0, r5
	mov r3, #0
	str ip, [sp]
	bl ov00_022F4968
	mov r1, r0
	mvn r0, #0
	cmp r1, r0
	beq _02306938
	mov r0, r5
	bl ov00_022F47A8
	ldr r0, [r0, #4]
	str r0, [r4]
_02306938:
	ldr r0, [sp, #4]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [sp, #4]
	add sp, sp, #0xc
	ldmia sp!, {r4, r5, pc}
	.align 2, 0
_02306950: .word ov00_0231B750
_02306954: .word ov00_02306784
	arm_func_end ov00_023068C4

	arm_func_start ov00_02306958
ov00_02306958: ; 0x02306958
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x48
	ldr fp, [r0]
	str r0, [sp]
	ldr r0, [fp, #0x3b4]
	str r1, [sp, #4]
	mov r8, #0
	bl ov00_022F47A0
	mov r4, r0
	ldr r1, _02306C74 ; =ov00_0231B778
	add r0, sp, #8
	mov r2, r4
	bl sub_020790DC
	cmp r4, #0
	mov sb, r8
	ble _02306AA4
	ldr r6, _02306C78 ; =0xAAAAAAAB
_0230699C:
	ldr r0, [fp, #0x3b4]
	mov r1, sb
	bl ov00_022F47A8
	mov r7, r0
	ldr sl, [r7]
	mov r0, sl
	bl strlen
	umull r1, r2, r0, r6
	mov r2, r2, lsr #1
	mov r1, #3
	umull r2, r3, r1, r2
	subs r2, r0, r2
	mov r0, sl
	beq _02306A0C
	bl strlen
	mov r5, r0
	mov r0, sl
	bl strlen
	mov r2, r0, lsl #2
	umull r1, r0, r2, r6
	umull r1, r2, r5, r6
	mov r2, r2, lsr #1
	mov r1, #3
	umull r2, r3, r1, r2
	sub r2, r5, r2
	rsb r1, r2, #4
	add r5, r1, r0, lsr #1
	b _02306A1C
_02306A0C:
	bl strlen
	mov r1, r0, lsl #2
	umull r0, r5, r1, r6
	mov r5, r5, lsr #1
_02306A1C:
	ldr sl, [r7, #4]
	mov r0, sl
	bl strlen
	umull r1, r2, r0, r6
	mov r2, r2, lsr #1
	mov r1, #3
	umull r2, r3, r1, r2
	subs r2, r0, r2
	mov r0, sl
	beq _02306A7C
	bl strlen
	mov r7, r0
	mov r0, sl
	bl strlen
	mov r2, r0, lsl #2
	umull r1, r0, r2, r6
	umull r1, r2, r7, r6
	mov r2, r2, lsr #1
	mov r1, #3
	umull r2, r3, r1, r2
	sub r2, r7, r2
	rsb r1, r2, #4
	add r2, r1, r0, lsr #1
	b _02306A8C
_02306A7C:
	bl strlen
	mov r1, r0, lsl #2
	umull r0, r2, r1, r6
	mov r2, r2, lsr #1
_02306A8C:
	add r0, r5, #2
	add r0, r0, r2
	add sb, sb, #1
	cmp sb, r4
	add r8, r8, r0
	blt _0230699C
_02306AA4:
	add r0, sp, #8
	bl strlen
	add r0, r8, r0
	add r0, r0, #1
	bl ov00_022F5AE4
	ldr r1, [sp, #4]
	cmp r0, #0
	str r0, [r1]
	bne _02306AE0
	ldr r1, _02306C7C ; =ov00_0231B740
	ldr r0, [sp]
	bl ov00_0230BCCC
	add sp, sp, #0x48
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02306AE0:
	add r1, sp, #8
	bl sub_020790DC
	ldr r1, [sp, #4]
	cmp r4, #0
	ldr r1, [r1]
	mov sl, #0
	add r7, r1, r0
	ble _02306C68
	ldr r5, _02306C78 ; =0xAAAAAAAB
_02306B04:
	ldr r0, [fp, #0x3b4]
	mov r1, sl
	bl ov00_022F47A8
	mov r8, r0
	ldr r1, _02306C80 ; =ov00_0231B784
	mov r0, r7
	bl strcat
	ldr r6, [r8]
	add r7, r7, #1
	mov r0, r6
	bl strlen
	mov r2, r0
	mov r0, r6
	mov r1, r7
	mov r3, #2
	bl ov00_022F598C
	ldr sb, [r8]
	mov r0, sb
	bl strlen
	umull r1, r2, r0, r5
	mov r2, r2, lsr #1
	mov r1, #3
	umull r2, r3, r1, r2
	subs r2, r0, r2
	mov r0, sb
	beq _02306BA8
	bl strlen
	mov r6, r0
	mov r0, sb
	bl strlen
	mov r2, r0, lsl #2
	umull r1, r0, r2, r5
	umull r1, r2, r6, r5
	mov r2, r2, lsr #1
	mov r1, #3
	umull r2, r3, r1, r2
	sub r2, r6, r2
	rsb r1, r2, #4
	add r0, r1, r0, lsr #1
	add r7, r7, r0
	b _02306BB8
_02306BA8:
	bl strlen
	mov r1, r0, lsl #2
	umull r0, r2, r1, r5
	add r7, r7, r2, lsr #1
_02306BB8:
	ldr r1, _02306C80 ; =ov00_0231B784
	mov r0, r7
	bl strcat
	ldr r6, [r8, #4]
	add r7, r7, #1
	mov r0, r6
	bl strlen
	mov r2, r0
	mov r0, r6
	mov r1, r7
	mov r3, #2
	bl ov00_022F598C
	ldr r8, [r8, #4]
	mov r0, r8
	bl strlen
	umull r1, r2, r0, r5
	mov r2, r2, lsr #1
	mov r1, #3
	umull r2, r3, r1, r2
	subs r2, r0, r2
	mov r0, r8
	beq _02306C4C
	bl strlen
	mov r6, r0
	mov r0, r8
	bl strlen
	mov r1, r0, lsl #2
	umull r0, r3, r1, r5
	umull r0, r1, r6, r5
	mov r1, r1, lsr #1
	mov r0, #3
	umull r1, r2, r0, r1
	sub r1, r6, r1
	rsb r0, r1, #4
	add r0, r0, r3, lsr #1
	add r7, r7, r0
	b _02306C5C
_02306C4C:
	bl strlen
	mov r1, r0, lsl #2
	umull r0, r2, r1, r5
	add r7, r7, r2, lsr #1
_02306C5C:
	add sl, sl, #1
	cmp sl, r4
	blt _02306B04
_02306C68:
	mov r0, #0
	add sp, sp, #0x48
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_02306C74: .word ov00_0231B778
_02306C78: .word 0xAAAAAAAB
_02306C7C: .word ov00_0231B740
_02306C80: .word ov00_0231B784
	arm_func_end ov00_02306958

	arm_func_start ov00_02306C84
ov00_02306C84: ; 0x02306C84
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x10
	mov r6, r1
	ldr r2, [r6, #0xc]
	ldr r1, [r6, #0x10]
	mov r7, r0
	str r2, [sp, #8]
	str r1, [sp, #0xc]
	cmp r2, #0
	ldr r4, [r7]
	beq _02307028
	ldr r0, [r6]
	cmp r0, #6
	addls pc, pc, r0, lsl #2
	b _02307028
_02306CC0: ; jump table
	b _02306CDC ; case 0
	b _02306D68 ; case 1
	b _02306E60 ; case 2
	b _02306ECC ; case 3
	b _02306F54 ; case 4
	b _02306DE4 ; case 5
	b _02306FC0 ; case 6
_02306CDC:
	mov r0, #0x20
	bl ov00_022F5AE4
	movs r5, r0
	bne _02306D04
	ldr r1, _02307034 ; =ov00_0231B788
	mov r0, r7
	bl ov00_0230BCCC
	add sp, sp, #0x10
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_02306D04:
	mov r1, #0
	mov r2, #0x20
	bl memset
	ldr r1, [r6, #0x1c]
	ldr r0, _02307038 ; =0x00000201
	str r1, [r5]
	ldr r1, [r4, #0x5b8]
	cmp r1, r0
	bne _02306D38
	ldr r1, [r4, #0x1a0]
	mov r0, #0
	str r1, [r5, #4]
	str r0, [r4, #0x1a0]
_02306D38:
	add r1, sp, #8
	mov r0, r7
	mov r3, r5
	str r6, [sp]
	mov r2, #0
	str r2, [sp, #4]
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _02307028
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_02306D68:
	mov r0, #8
	bl ov00_022F5AE4
	movs r3, r0
	bne _02306D90
	ldr r1, _02307034 ; =ov00_0231B788
	mov r0, r7
	bl ov00_0230BCCC
	add sp, sp, #0x10
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_02306D90:
	mov r2, #0
	strb r2, [r3]
	strb r2, [r3, #1]
	strb r2, [r3, #2]
	strb r2, [r3, #3]
	strb r2, [r3, #4]
	strb r2, [r3, #5]
	strb r2, [r3, #6]
	strb r2, [r3, #7]
	ldr r0, [r6, #0x1c]
	add r1, sp, #8
	str r0, [r3]
	str r6, [sp]
	str r2, [sp, #4]
	mov r0, r7
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _02307028
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_02306DE4:
	mov r0, #8
	bl ov00_022F5AE4
	movs r3, r0
	bne _02306E0C
	ldr r1, _02307034 ; =ov00_0231B788
	mov r0, r7
	bl ov00_0230BCCC
	add sp, sp, #0x10
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_02306E0C:
	mov r2, #0
	strb r2, [r3]
	strb r2, [r3, #1]
	strb r2, [r3, #2]
	strb r2, [r3, #3]
	strb r2, [r3, #4]
	strb r2, [r3, #5]
	strb r2, [r3, #6]
	strb r2, [r3, #7]
	ldr r0, [r6, #0x1c]
	add r1, sp, #8
	str r0, [r3]
	str r6, [sp]
	str r2, [sp, #4]
	mov r0, r7
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _02307028
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_02306E60:
	mov r0, #0x204
	bl ov00_022F5AE4
	movs r4, r0
	bne _02306E88
	ldr r1, _02307034 ; =ov00_0231B788
	mov r0, r7
	bl ov00_0230BCCC
	add sp, sp, #0x10
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_02306E88:
	mov r1, #0
	mov r2, #0x204
	bl memset
	ldr r0, [r6, #0x1c]
	add r1, sp, #8
	str r0, [r4]
	mov r0, r7
	mov r3, r4
	str r6, [sp]
	mov r2, #0
	str r2, [sp, #4]
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _02307028
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_02306ECC:
	mov r0, #0x10
	bl ov00_022F5AE4
	movs r3, r0
	bne _02306EF4
	ldr r1, _02307034 ; =ov00_0231B788
	mov r0, r7
	bl ov00_0230BCCC
	add sp, sp, #0x10
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_02306EF4:
	mov r2, r3
	mov r1, #4
	mov r0, #0
_02306F00:
	strb r0, [r2]
	strb r0, [r2, #1]
	strb r0, [r2, #2]
	strb r0, [r2, #3]
	add r2, r2, #4
	subs r1, r1, #1
	bne _02306F00
	ldr r0, [r6, #0x1c]
	mov r2, #0
	str r0, [r3]
	str r2, [r3, #0xc]
	str r6, [sp]
	add r1, sp, #8
	str r2, [sp, #4]
	mov r0, r7
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _02307028
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_02306F54:
	mov r0, #4
	bl ov00_022F5AE4
	movs r3, r0
	bne _02306F7C
	ldr r1, _02307034 ; =ov00_0231B788
	mov r0, r7
	bl ov00_0230BCCC
	add sp, sp, #0x10
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_02306F7C:
	mov r2, #0
	strb r2, [r3]
	strb r2, [r3, #1]
	strb r2, [r3, #2]
	strb r2, [r3, #3]
	ldr r0, [r6, #0x1c]
	add r1, sp, #8
	str r0, [r3]
	str r6, [sp]
	str r2, [sp, #4]
	mov r0, r7
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _02307028
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_02306FC0:
	mov r0, #4
	bl ov00_022F5AE4
	movs r3, r0
	bne _02306FE8
	ldr r1, _02307034 ; =ov00_0231B788
	mov r0, r7
	bl ov00_0230BCCC
	add sp, sp, #0x10
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_02306FE8:
	mov r2, #0
	strb r2, [r3]
	strb r2, [r3, #1]
	strb r2, [r3, #2]
	strb r2, [r3, #3]
	ldr r0, [r6, #0x1c]
	add r1, sp, #8
	str r0, [r3]
	str r6, [sp]
	str r2, [sp, #4]
	mov r0, r7
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	addne sp, sp, #0x10
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
_02307028:
	mov r0, #0
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_02307034: .word ov00_0231B788
_02307038: .word 0x00000201
	arm_func_end ov00_02306C84

	arm_func_start ov00_0230703C
ov00_0230703C: ; 0x0230703C
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r8, r0
	mov r0, #0x24
	mov r7, r1
	mov r6, r2
	mov r5, r3
	ldr r4, [r8]
	bl ov00_022F5AE4
	cmp r0, #0
	bne _02307078
	ldr r1, _023070F0 ; =ov00_0231B788
	mov r0, r8
	bl ov00_0230BCCC
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_02307078:
	str r7, [r0]
	ldr r1, [sp, #0x18]
	str r6, [r0, #4]
	str r1, [r0, #8]
	mov r1, #0
	str r1, [r0, #0x14]
	cmp r7, #0
	moveq r1, #1
	streq r1, [r0, #0x18]
	beq _023070C0
	ldr r2, [r4, #0x234]
	add r1, r2, #1
	str r1, [r4, #0x234]
	str r2, [r0, #0x18]
	ldr r1, [r4, #0x234]
	cmp r1, #2
	movlt r1, #2
	strlt r1, [r4, #0x234]
_023070C0:
	mov r3, #0
	ldr r2, [sp, #0x1c]
	str r3, [r0, #0x1c]
	ldr r1, [sp, #0x20]
	str r2, [r0, #0xc]
	str r1, [r0, #0x10]
	ldr r1, [r4, #0x5c4]
	str r1, [r0, #0x20]
	str r0, [r4, #0x5c4]
	str r0, [r5]
	mov r0, r3
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_023070F0: .word ov00_0231B788
	arm_func_end ov00_0230703C

	arm_func_start ov00_023070F4
ov00_023070F4: ; 0x023070F4
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r1
	ldr r1, [r4]
	ldr r2, [r0]
	cmp r1, #3
	bne _02307150
	ldr r0, [r2, #0x238]
	ldr r5, [r4, #4]
	sub r0, r0, #1
	str r0, [r2, #0x238]
	ldr r0, [r5, #4]
	mov r1, #2
	bl ov00_022F4FC8
	ldr r0, [r5, #4]
	bl SocketClose
	ldr r0, [r5, #0x18]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r5, #0x18]
	ldr r0, [r5, #8]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r5, #8]
_02307150:
	ldr r0, [r4, #4]
	bl ov00_022F5B14
	mov r1, #0
	mov r0, r4
	str r1, [r4, #4]
	bl ov00_022F5B14
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_023070F4

	arm_func_start ov00_0230716C
ov00_0230716C: ; 0x0230716C
	stmdb sp!, {r3, lr}
	ldr r3, [r0]
	mov ip, #0
	ldr r2, [r3, #0x5c4]
	cmp r2, #0
	ldmeqia sp!, {r3, pc}
_02307184:
	cmp r2, r1
	bne _023071A8
	cmp ip, #0
	ldreq r2, [r2, #0x20]
	streq r2, [r3, #0x5c4]
	ldrne r2, [r1, #0x20]
	strne r2, [ip, #0x20]
	bl ov00_023070F4
	ldmia sp!, {r3, pc}
_023071A8:
	mov ip, r2
	ldr r2, [r2, #0x20]
	cmp r2, #0
	bne _02307184
	ldmia sp!, {r3, pc}
	arm_func_end ov00_0230716C

	arm_func_start ov00_023071BC
ov00_023071BC: ; 0x023071BC
	ldr r0, [r0]
	ldr r3, [r0, #0x5c4]
	cmp r3, #0
	beq _023071F4
_023071CC:
	ldr r0, [r3, #0x18]
	cmp r0, r2
	bne _023071E8
	cmp r1, #0
	strne r3, [r1]
	mov r0, #1
	bx lr
_023071E8:
	ldr r3, [r3, #0x20]
	cmp r3, #0
	bne _023071CC
_023071F4:
	cmp r1, #0
	movne r0, #0
	strne r0, [r1]
	mov r0, #0
	bx lr
	arm_func_end ov00_023071BC

	arm_func_start ov00_02307208
ov00_02307208: ; 0x02307208
	ldr r0, [r0]
	ldr r1, [r0, #0x5c4]
	cmp r1, #0
	beq _0230723C
_02307218:
	ldr r0, [r1, #8]
	cmp r0, #0
	ldrne r0, [r1]
	cmpne r0, #3
	movne r0, #1
	bxne lr
	ldr r1, [r1, #0x20]
	cmp r1, #0
	bne _02307218
_0230723C:
	mov r0, #0
	bx lr
	arm_func_end ov00_02307208

	arm_func_start ov00_02307244
ov00_02307244: ; 0x02307244
	stmdb sp!, {r4, lr}
	mov r4, r1
	ldr r3, [r4]
	mov ip, #0
	cmp r3, #6
	addls pc, pc, r3, lsl #2
	b _023072C0
_02307260: ; jump table
	b _0230727C ; case 0
	b _02307288 ; case 1
	b _023072A0 ; case 2
	b _023072C0 ; case 3
	b _023072AC ; case 4
	b _02307294 ; case 5
	b _023072B8 ; case 6
_0230727C:
	bl ov00_02303EE0
	mov ip, r0
	b _023072C0
_02307288:
	bl ov00_0230883C
	mov ip, r0
	b _023072C0
_02307294:
	bl ov00_02308A88
	mov ip, r0
	b _023072C0
_023072A0:
	bl ov00_02304D00
	mov ip, r0
	b _023072C0
_023072AC:
	bl ov00_0230B728
	mov ip, r0
	b _023072C0
_023072B8:
	bl ov00_0230B82C
	mov ip, r0
_023072C0:
	cmp ip, #0
	strne ip, [r4, #0x1c]
	mov r0, ip
	ldmia sp!, {r4, pc}
	arm_func_end ov00_02307244

	arm_func_start ov00_023072D0
ov00_023072D0: ; 0x023072D0
	stmdb sp!, {r4, r5, r6, r7, lr}
	sub sp, sp, #0x14
	mov r7, r0
	ldr r4, [r7]
	movs r6, r1
	addeq sp, sp, #0x14
	mov r3, #0
	moveq r0, #3
	ldmeqia sp!, {r4, r5, r6, r7, pc}
	ldr r2, [r6]
	cmp r2, #0x6a
	cmpne r2, #0x64
	addeq sp, sp, #0x14
	moveq r0, #3
	ldmeqia sp!, {r4, r5, r6, r7, pc}
	sub r2, r2, #0x65
	cmp r2, #3
	addls pc, pc, r2, lsl #2
	b _02307568
_0230731C: ; jump table
	b _02307568 ; case 0
	b _0230732C ; case 1
	b _02307340 ; case 2
	b _0230749C ; case 3
_0230732C:
	bl ov00_023080E4
	cmp r0, #0
	beq _02307568
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, pc}
_02307340:
	ldrh r1, [r6, #0xc]
	ldr r0, [r6, #8]
	add r2, sp, #8
	bl ov00_022F8578
	ldr r0, [sp, #8]
	cmp r0, #1
	bne _02307568
	ldr r1, [r6, #0x10]
	add r2, sp, #0xc
	mov r0, r7
	mov r5, #1
	bl ov00_02308A4C
	cmp r0, #0
	bne _02307390
	ldr r1, _023075B8 ; =ov00_0231B798
	mov r0, r7
	bl ov00_0230BCCC
	add sp, sp, #0x14
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, pc}
_02307390:
	ldr r2, _023075BC ; =ov00_0231B7B4
	mov r0, r7
	add r1, r6, #0x2c
	bl ov00_02302638
	ldr r2, _023075C0 ; =ov00_0231B7BC
	mov r0, r7
	add r1, r6, #0x2c
	bl ov00_02302638
	ldr r2, [r4, #0x1a0]
	mov r0, r7
	add r1, r6, #0x2c
	bl ov00_02302668
	ldr r2, _023075C4 ; =ov00_0231B7C4
	mov r0, r7
	add r1, r6, #0x2c
	bl ov00_02302638
	mov r0, r7
	add r1, r6, #0x2c
	add r2, r4, #0x110
	bl ov00_02302638
	mov r0, r7
	add r1, r6, #0x2c
	ldr r2, _023075C8 ; =ov00_0231B7CC
	bl ov00_02302638
	mov r0, r7
	add r1, r6, #0x2c
	ldr r2, [sp, #0xc]
	ldr r2, [r2, #0x1c]
	bl ov00_02302638
	mov r0, r7
	add r1, r6, #0x2c
	ldr r2, _023075CC ; =ov00_0231B7D4
	bl ov00_02302638
	ldr r2, [r4, #0x5d4]
	cmp r2, #0
	beq _02307454
	ldr r3, [r6, #0x10]
	mov r0, #0
_02307428:
	ldr r1, [r2, #0x10]
	cmp r1, r3
	bne _02307448
	cmp r2, r6
	beq _02307448
	ldr r1, [r2]
	cmp r1, #0x67
	movle r5, r0
_02307448:
	ldr r2, [r2, #0x4c]
	cmp r2, #0
	bne _02307428
_02307454:
	cmp r5, #0
	beq _02307490
	ldr r0, [sp, #0xc]
	ldr r0, [r0, #0x1c]
	bl ov00_022F5B14
	ldr r0, [sp, #0xc]
	mov r1, #0
	str r1, [r0, #0x1c]
	ldr r0, [sp, #0xc]
	bl ov00_02308E00
	cmp r0, #0
	beq _02307490
	ldr r1, [sp, #0xc]
	mov r0, r7
	bl ov00_02308BCC
_02307490:
	mov r0, #0x68
	str r0, [r6]
	b _02307568
_0230749C:
	ldr r0, [r6, #0x1c]
	cmp r0, #0
	beq _023074B4
	ldr r1, _023075CC ; =ov00_0231B7D4
	bl strstr
	mov r3, r0
_023074B4:
	cmp r3, #0
	beq _02307568
	mov r0, #0
	strb r0, [r3]
	ldr r4, [r6, #0x1c]
	ldr r1, _023075D0 ; =ov00_0231B7DC
	mov r0, r4
	mov r2, #7
	bl strncmp
	cmp r0, #0
	bne _02307528
	ldr r0, [r6, #0x18]
	add r0, r0, #1
	str r0, [r6, #0x18]
	cmp r0, #1
	ble _0230750C
	ldr r1, _023075D4 ; =ov00_0231B7E4
	mov r0, r7
	bl ov00_0230BCCC
	add sp, sp, #0x14
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, pc}
_0230750C:
	mov r0, r7
	mov r1, r6
	bl ov00_02308080
	cmp r0, #0
	beq _02307558
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, pc}
_02307528:
	ldr r1, _023075D8 ; =ov00_0231B808
	mov r0, r4
	mov r2, #6
	bl strncmp
	cmp r0, #0
	beq _02307558
	ldr r1, _023075DC ; =ov00_0231B810
	mov r0, r7
	bl ov00_0230BCCC
	add sp, sp, #0x14
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, pc}
_02307558:
	mov r0, #0x69
	str r0, [r6]
	mov r0, #0
	str r0, [r6, #0x24]
_02307568:
	ldr r0, [r6, #0x34]
	cmp r0, #0
	ble _023075AC
	add r1, sp, #0x10
	mov r0, #1
	str r1, [sp]
	str r0, [sp, #4]
	ldrh r2, [r6, #0xc]
	ldr r1, [r6, #8]
	mov r0, r7
	add r3, r6, #0x2c
	bl ov00_02302AF0
	ldr r1, [sp, #0x10]
	cmp r1, #0
	cmpeq r0, #0
	movne r0, #0x6a
	strne r0, [r6]
_023075AC:
	mov r0, #0
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, pc}
	.align 2, 0
_023075B8: .word ov00_0231B798
_023075BC: .word ov00_0231B7B4
_023075C0: .word ov00_0231B7BC
_023075C4: .word ov00_0231B7C4
_023075C8: .word ov00_0231B7CC
_023075CC: .word ov00_0231B7D4
_023075D0: .word ov00_0231B7DC
_023075D4: .word ov00_0231B7E4
_023075D8: .word ov00_0231B808
_023075DC: .word ov00_0231B810
	arm_func_end ov00_023072D0

	arm_func_start ov00_023075E0
ov00_023075E0: ; 0x023075E0
	stmdb sp!, {r4, r5, r6, r7, lr}
	sub sp, sp, #0x184
	mov r4, r1
	ldr r1, [r4]
	mov r5, r0
	cmp r1, #0x68
	ldr r7, [r5]
	addne sp, sp, #0x184
	movne r0, #3
	ldmneia sp!, {r4, r5, r6, r7, pc}
	ldrh r1, [r4, #0xc]
	ldr r0, [r4, #8]
	add r2, sp, #0xc
	bl ov00_022F8578
	ldr r0, [sp, #0xc]
	cmp r0, #3
	bne _02307638
	mov r0, #0x6a
	str r0, [r4]
	add sp, sp, #0x184
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, pc}
_02307638:
	ldr r0, [r4, #0x1c]
	ldr r1, _02307804 ; =ov00_0231B7D4
	bl strstr
	cmp r0, #0
	beq _023077F8
	mov r1, #0
	strb r1, [r0]
	ldr r6, [r4, #0x1c]
	ldr r1, _02307808 ; =ov00_0231B7B4
	mov r0, r6
	mov r2, #6
	bl strncmp
	cmp r0, #0
	bne _023077DC
	ldr r1, _0230780C ; =ov00_0231B7BC
	add r2, sp, #0x71
	mov r0, r6
	mov r3, #0x10
	bl ov00_0230BA28
	cmp r0, #0
	bne _023076A0
	mov r0, #0x6a
	str r0, [r4]
	add sp, sp, #0x184
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, pc}
_023076A0:
	add r0, sp, #0x71
	bl sub_0208B360
	mov r6, r0
	ldr r0, [r4, #0x1c]
	ldr r1, _02307810 ; =ov00_0231B7C4
	add r2, sp, #0x52
	mov r3, #0x1f
	bl ov00_0230BA28
	cmp r0, #0
	bne _023076DC
	mov r0, #0x6a
	str r0, [r4]
	add sp, sp, #0x184
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, pc}
_023076DC:
	ldr r0, [r4, #0x1c]
	ldr r1, _02307814 ; =ov00_0231B7CC
	add r2, sp, #0x31
	mov r3, #0x21
	bl ov00_0230BA28
	cmp r0, #0
	bne _0230770C
	mov r0, #0x6a
	str r0, [r4]
	add sp, sp, #0x184
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, pc}
_0230770C:
	str r6, [sp]
	add r2, r7, #0x77
	ldr r3, [r7, #0x1a0]
	ldr r1, _02307818 ; =ov00_0231B830
	add r0, sp, #0x81
	add r2, r2, #0x100
	bl sub_020790DC
	add r0, sp, #0x81
	bl strlen
	mov r1, r0
	add r0, sp, #0x81
	add r2, sp, #0x10
	bl ov00_022F4F3C
	add r0, sp, #0x31
	add r1, sp, #0x10
	bl strcmp
	cmp r0, #0
	beq _023077AC
	ldr r2, _0230781C ; =ov00_0231B7DC
	mov r0, r5
	add r1, r4, #0x2c
	bl ov00_02302638
	ldr r2, _02307804 ; =ov00_0231B7D4
	mov r0, r5
	add r1, r4, #0x2c
	bl ov00_02302638
	add r1, sp, #8
	mov r0, #1
	str r1, [sp]
	str r0, [sp, #4]
	ldrh r2, [r4, #0xc]
	ldr r1, [r4, #8]
	mov r0, r5
	add r3, r4, #0x2c
	bl ov00_02302AF0
	mov r0, #0x6a
	str r0, [r4]
	add sp, sp, #0x184
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, pc}
_023077AC:
	ldr r2, _02307820 ; =ov00_0231B808
	mov r0, r5
	add r1, r4, #0x2c
	bl ov00_02302638
	ldr r2, _02307804 ; =ov00_0231B7D4
	mov r0, r5
	add r1, r4, #0x2c
	bl ov00_02302638
	mov r0, #0x69
	str r0, [r4]
	str r6, [r4, #0x10]
	b _023077F0
_023077DC:
	mov r0, #0x6a
	str r0, [r4]
	add sp, sp, #0x184
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, pc}
_023077F0:
	mov r0, #0
	str r0, [r4, #0x24]
_023077F8:
	mov r0, #0
	add sp, sp, #0x184
	ldmia sp!, {r4, r5, r6, r7, pc}
	.align 2, 0
_02307804: .word ov00_0231B7D4
_02307808: .word ov00_0231B7B4
_0230780C: .word ov00_0231B7BC
_02307810: .word ov00_0231B7C4
_02307814: .word ov00_0231B7CC
_02307818: .word ov00_0231B830
_0230781C: .word ov00_0231B7DC
_02307820: .word ov00_0231B808
	arm_func_end ov00_023075E0

	arm_func_start ov00_02307824
ov00_02307824: ; 0x02307824
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #0xc
	movs r8, r1
	mov sb, r0
	addeq sp, sp, #0xc
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	ldr r0, [r8, #0x34]
	cmp r0, #0
	addne sp, sp, #0xc
	movne r0, #0
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	ldr r0, [r8, #0x3c]
	bl ov00_022F47A0
	cmp r0, #0
	beq _023078F0
	mov sl, #0
	mov r7, sl
	add r5, sp, #8
	mov r4, sl
_02307874:
	ldr r0, [r8, #0x3c]
	mov r1, r7
	bl ov00_022F47A8
	mov r6, r0
	str r5, [sp]
	str r4, [sp, #4]
	ldrh r2, [r8, #0xc]
	ldr r1, [r8, #8]
	mov r0, sb
	mov r3, r6
	bl ov00_02302AF0
	ldr r1, [sp, #8]
	cmp r1, #0
	cmpeq r0, #0
	beq _023078C4
	mov r0, #0x6a
	str r0, [r8]
	add sp, sp, #0xc
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
_023078C4:
	ldr r1, [r6, #0xc]
	ldr r0, [r6, #8]
	cmp r1, r0
	bne _023078F0
	ldr r0, [r8, #0x3c]
	mov r1, sl
	bl ov00_022F491C
	ldr r0, [r8, #0x3c]
	bl ov00_022F47A0
	cmp r0, #0
	bne _02307874
_023078F0:
	mov r0, #0
	add sp, sp, #0xc
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, pc}
	arm_func_end ov00_02307824

	arm_func_start ov00_023078FC
ov00_023078FC: ; 0x023078FC
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0x2c
	mov r7, r0
	ldr r5, [r7]
	movs r6, r1
	addeq sp, sp, #0x2c
	moveq r0, #3
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, [r6, #0x34]
	cmp r1, #0
	beq _0230796C
	add r2, sp, #0x24
	mov r1, #1
	str r2, [sp]
	str r1, [sp, #4]
	ldrh r2, [r6, #0xc]
	ldr r1, [r6, #8]
	add r3, r6, #0x2c
	bl ov00_02302AF0
	ldr r1, [sp, #0x24]
	cmp r1, #0
	cmpeq r0, #0
	beq _0230796C
	mov r0, #0x6a
	str r0, [r6]
	add sp, sp, #0x2c
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230796C:
	ldr r0, [r6, #0x34]
	cmp r0, #0
	bne _023079A4
	mov r0, r7
	mov r1, r6
	bl ov00_02307824
	cmp r0, #0
	addne sp, sp, #0x2c
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [r6]
	cmp r0, #0x6a
	addeq sp, sp, #0x2c
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023079A4:
	ldr r0, [r6, #0x24]
	cmp r0, #0
	ble _023079C4
	mov r0, #0
	bl ov00_022F5478
	add r0, r0, #0x710
	add r0, r0, #0x2000
	str r0, [r6, #0x14]
_023079C4:
	mov sb, #0
	mov sl, #2
	add fp, sp, #0x1c
	add r4, sp, #0x10
_023079D4:
	mov r0, r7
	add r1, r6, #0x1c
	add r2, sp, #0x18
	add r3, sp, #0x14
	str r4, [sp]
	bl ov00_02302C58
	cmp r0, #0
	addne sp, sp, #0x2c
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r2, [sp, #0x18]
	cmp r2, #0
	beq _02307C38
	ldr r1, [sp, #0x14]
	cmp r1, #0x69
	bgt _02307A54
	cmp r1, #0x68
	blt _02307A28
	beq _02307BD4
	cmp r1, #0x69
	beq _02307BF0
	b _02307C2C
_02307A28:
	cmp r1, #5
	bgt _02307A48
	cmp r1, #1
	blt _02307C2C
	beq _02307A98
	cmp r1, #5
	beq _02307B1C
	b _02307C2C
_02307A48:
	cmp r1, #0x66
	beq _02307BB0
	b _02307C2C
_02307A54:
	cmp r1, #0xc9
	bgt _02307A6C
	bge _02307C0C
	cmp r1, #0xc8
	beq _02307C0C
	b _02307C2C
_02307A6C:
	sub r0, r1, #0xca
	cmp r0, #6
	addls pc, pc, r0, lsl #2
	b _02307C2C
_02307A7C: ; jump table
	b _02307C0C ; case 0
	b _02307C0C ; case 1
	b _02307C0C ; case 2
	b _02307C0C ; case 3
	b _02307C0C ; case 4
	b _02307C0C ; case 5
	b _02307C0C ; case 6
_02307A98:
	ldr r1, [r5, #0x1c0]
	ldr r0, [r5, #0x1c4]
	str r1, [sp, #0x1c]
	str r0, [sp, #0x20]
	cmp r1, #0
	beq _02307C2C
	mov r0, #0xc
	bl ov00_022F5AE4
	movs r8, r0
	bne _02307AD8
	ldr r1, _02307C70 ; =ov00_0231B838
	mov r0, r7
	bl ov00_0230BCCC
	add sp, sp, #0x2c
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02307AD8:
	ldr r0, [r6, #0x10]
	str r0, [r8]
	ldr r0, [sp, #0x18]
	bl ov00_022F5514
	str r0, [r8, #8]
	mov r0, #0
	bl ov00_022F5478
	str r0, [r8, #4]
	mov r3, r8
	mov r0, r7
	stmia sp, {sb, sl}
	ldmia fp, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _02307C2C
	add sp, sp, #0x2c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02307B1C:
	ldr r1, [r5, #0x1c8]
	ldr r0, [r5, #0x1cc]
	str r1, [sp, #8]
	str r0, [sp, #0xc]
	cmp r1, #0
	beq _02307C2C
	mov r0, #0xc
	bl ov00_022F5AE4
	movs r8, r0
	bne _02307B5C
	ldr r1, _02307C70 ; =ov00_0231B838
	mov r0, r7
	bl ov00_0230BCCC
	add sp, sp, #0x2c
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02307B5C:
	ldr r0, [r6, #0x10]
	str r0, [r8]
	ldr r0, [sp, #0x18]
	bl ov00_022F5514
	str r0, [r8, #8]
	mov r0, #0
	bl ov00_022F5478
	str r0, [r8, #4]
	mov r0, #0
	str r0, [sp]
	mov r0, #2
	str r0, [sp, #4]
	add r1, sp, #8
	mov r3, r8
	mov r0, r7
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _02307C2C
	add sp, sp, #0x2c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02307BB0:
	mov r0, #0
	str r0, [sp]
	str r0, [sp, #4]
	ldr r1, [r6, #0x10]
	ldr r3, _02307C74 ; =ov00_0231B848
	mov r0, r7
	mov r2, #0x67
	bl ov00_02301B2C
	b _02307C2C
_02307BD4:
	mov r0, r7
	mov r1, r6
	bl ov00_02301CB4
	cmp r0, #0
	beq _02307C2C
	add sp, sp, #0x2c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02307BF0:
	mov r0, r7
	mov r1, r6
	bl ov00_02301D50
	cmp r0, #0
	beq _02307C2C
	add sp, sp, #0x2c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02307C0C:
	str r2, [sp]
	mov r2, r1
	ldr r1, [sp, #0x10]
	mov r0, r7
	str r1, [sp, #4]
	mov r1, r6
	ldr r3, [r6, #0x1c]
	bl ov00_0230B6A4
_02307C2C:
	mov r0, r7
	add r1, r6, #0x1c
	bl ov00_02302D94
_02307C38:
	ldr r0, [sp, #0x18]
	cmp r0, #0
	bne _023079D4
	ldrh r1, [r6, #0xc]
	ldr r0, [r6, #8]
	add r2, sp, #0x28
	bl ov00_022F8578
	ldr r0, [sp, #0x28]
	cmp r0, #3
	moveq r0, #0x6a
	streq r0, [r6]
	mov r0, #0
	add sp, sp, #0x2c
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_02307C70: .word ov00_0231B838
_02307C74: .word ov00_0231B848
	arm_func_end ov00_023078FC

	arm_func_start ov00_02307C78
ov00_02307C78: ; 0x02307C78
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x10
	movs r7, r1
	ldr r6, [r7, #0x44]
	mov r8, r0
	addeq sp, sp, #0x10
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	mov r5, #0x10
	mov r4, #0
	add sb, sp, #8
	b _02307D28
_02307CA4:
	ldr r0, [r6]
	cmp r0, #2
	beq _02307D24
	bl ov00_022F5594
	ldr r1, [r6, #0x14]
	cmp r0, r1
	bls _02307D24
	ldr r0, [r6, #8]
	cmp r0, #0
	beq _02307D24
	ldr r0, [r6, #0x10]
	cmp r0, #0x68
	bne _02307D18
	mov r0, r5
	bl ov00_022F5AE4
	ldmib r6, {r1, r2}
	mov r3, r0
	str r4, [r3, #4]
	str r4, [r3, #0xc]
	str r4, [r3, #8]
	ldr r0, [r7, #0x10]
	str r2, [sp, #8]
	str r0, [r3]
	str r4, [sp]
	str r1, [sp, #0xc]
	mov r0, r8
	str r4, [sp, #4]
	ldmia sb, {r1, r2}
	bl ov00_02302E74
_02307D18:
	mov r0, r7
	mov r1, r6
	bl ov00_02308618
_02307D24:
	ldr r6, [r6, #0xc]
_02307D28:
	cmp r6, #0
	ldrne r0, [r7, #0x48]
	cmpne r6, r0
	bne _02307CA4
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	arm_func_end ov00_02307C78

	arm_func_start ov00_02307D40
ov00_02307D40: ; 0x02307D40
	stmdb sp!, {r4, r5, r6, lr}
	mov r5, r1
	ldr r2, [r5]
	mov r6, r0
	cmp r2, #0x64
	mov r4, #0
	moveq r0, #3
	ldmeqia sp!, {r4, r5, r6, pc}
	cmp r2, #0x69
	beq _02307D88
	ldr r2, [r5, #4]
	cmp r2, #0
	beq _02307D80
	bl ov00_023072D0
	mov r4, r0
	b _02307D88
_02307D80:
	bl ov00_023075E0
	mov r4, r0
_02307D88:
	cmp r4, #0
	ldreq r0, [r5]
	cmpeq r0, #0x69
	bne _02307DB4
	mov r0, r6
	mov r1, r5
	bl ov00_023078FC
	mov r4, r0
	mov r0, r6
	mov r1, r5
	bl ov00_02307C78
_02307DB4:
	mov r0, r4
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_02307D40

	arm_func_start ov00_02307DBC
ov00_02307DBC: ; 0x02307DBC
	stmdb sp!, {r4, lr}
	mov r4, r1
	ldr r0, [r4, #0x1c]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0x1c]
	ldr r0, [r4, #0x2c]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0x2c]
	ldr r0, [r4, #0x3c]
	cmp r0, #0
	beq _02307DFC
	bl ov00_022F4758
	mov r0, #0
	str r0, [r4, #0x3c]
_02307DFC:
	mov r0, r4
	bl ov00_022F5B14
	ldmia sp!, {r4, pc}
	arm_func_end ov00_02307DBC

	arm_func_start ov00_02307E08
ov00_02307E08: ; 0x02307E08
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r5, r0
	movs r4, r1
	ldr r1, [r5]
	ldrne r2, [r1, #0x5d4]
	cmpne r2, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	cmp r2, r4
	ldreq r0, [r4, #0x4c]
	streq r0, [r1, #0x5d4]
	beq _02307E60
	ldr r0, [r2, #0x4c]
	cmp r0, r4
	beq _02307E58
_02307E40:
	cmp r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r2, r0
	ldr r0, [r0, #0x4c]
	cmp r0, r4
	bne _02307E40
_02307E58:
	ldr r0, [r4, #0x4c]
	str r0, [r2, #0x4c]
_02307E60:
	ldr r0, [r4, #0x3c]
	bl ov00_022F47A0
	cmp r0, #0
	beq _02307EC4
	mov r6, #0
	mov r7, r6
_02307E78:
	ldr r0, [r4, #0x3c]
	mov r1, r7
	bl ov00_022F47A8
	ldr r2, [r0, #0x10]
	cmp r2, #0x64
	bge _02307EA8
	ldr ip, [r0]
	ldr r3, [r0, #0x14]
	ldr r1, [r4, #0x10]
	mov r0, r5
	add r3, ip, r3
	bl ov00_02301A50
_02307EA8:
	ldr r0, [r4, #0x3c]
	mov r1, r6
	bl ov00_022F491C
	ldr r0, [r4, #0x3c]
	bl ov00_022F47A0
	cmp r0, #0
	bne _02307E78
_02307EC4:
	mov r0, r5
	mov r1, r4
	bl ov00_02307DBC
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_02307E08

	arm_func_start ov00_02307ED4
ov00_02307ED4: ; 0x02307ED4
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r4, r0
	ldr r5, [r4]
	bl ov00_022F8988
	ldr r7, [r5, #0x5d4]
	cmp r7, #0
	beq _02307F58
	mov r5, #0
_02307EF4:
	ldr r0, [r7]
	ldr r6, [r7, #0x4c]
	cmp r0, #0x6a
	mov r0, r4
	mov r1, r7
	bne _02307F14
	bl ov00_02307E08
	b _02307F4C
_02307F14:
	bl ov00_02307D40
	ldr r1, [r7]
	cmp r1, #0x6a
	beq _02307F40
	cmp r0, #0
	bne _02307F40
	mov r0, r5
	bl ov00_022F5478
	ldr r1, [r7, #0x14]
	cmp r0, r1
	ble _02307F4C
_02307F40:
	mov r0, r4
	mov r1, r7
	bl ov00_02307E08
_02307F4C:
	mov r7, r6
	cmp r6, #0
	bne _02307EF4
_02307F58:
	mov r0, #0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_02307ED4

	arm_func_start ov00_02307F60
ov00_02307F60: ; 0x02307F60
	ldr r0, [r0]
	ldr r0, [r0, #0x5d4]
	cmp r0, #0
	beq _02307F88
_02307F70:
	ldr r2, [r0, #0x10]
	cmp r2, r1
	bxeq lr
	ldr r0, [r0, #0x4c]
	cmp r0, #0
	bne _02307F70
_02307F88:
	mov r0, #0
	bx lr
	arm_func_end ov00_02307F60

	arm_func_start ov00_02307F90
ov00_02307F90: ; 0x02307F90
	ldr r0, [r0]
	cmp r1, #0
	cmpeq r2, #0
	moveq r0, #0
	bxeq lr
	ldr r0, [r0, #0x5d4]
	cmp r0, #0
	beq _02307FD0
_02307FB0:
	ldr r3, [r0, #8]
	cmp r3, r1
	ldreqh r3, [r0, #0xc]
	cmpeq r3, r2
	bxeq lr
	ldr r0, [r0, #0x4c]
	cmp r0, #0
	bne _02307FB0
_02307FD0:
	mov r0, #0
	bx lr
	arm_func_end ov00_02307F90

	arm_func_start ov00_02307FD8
ov00_02307FD8: ; 0x02307FD8
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r0, [r4]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_02307FD8

	arm_func_start ov00_02307FF4
ov00_02307FF4: ; 0x02307FF4
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr r5, [r0]
	mov r0, #0x50
	mov r7, r1
	mov r6, r2
	bl ov00_022F5AE4
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r1, #0
	mov r2, #0x50
	bl memset
	mov r0, #0x64
	stmia r4, {r0, r6}
	mov r0, #0
	str r7, [r4, #0x10]
	bl ov00_022F5478
	add r0, r0, #0x710
	add r0, r0, #0x2000
	str r0, [r4, #0x14]
	ldr r0, [r5, #0x5d4]
	ldr r2, _0230807C ; =ov00_02307FD8
	str r0, [r4, #0x4c]
	mov r0, #0x18
	mov r1, #0
	bl ov00_022F4700
	str r0, [r4, #0x3c]
	str r4, [r5, #0x5d4]
	mov r1, #0
	str r1, [r4, #0x44]
	str r1, [r4, #0x48]
	mov r0, r4
	str r1, [r4, #0x40]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_0230807C: .word ov00_02307FD8
	arm_func_end ov00_02307FF4

	arm_func_start ov00_02308080
ov00_02308080: ; 0x02308080
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0x10
	mov r2, #0
	str r2, [sp]
	mov r4, r1
	str r2, [sp, #4]
	add r3, sp, #0xc
	mov r1, #2
	mov r5, r0
	str r2, [sp, #8]
	bl ov00_0230703C
	cmp r0, #0
	addne sp, sp, #0x10
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r0, [sp, #0xc]
	ldr r1, [r4, #0x10]
	ldr r2, [r0, #0x18]
	mov r0, r5
	bl ov00_0230630C
	cmp r0, #0
	moveq r0, #0x65
	streq r0, [r4]
	moveq r0, #0
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_02308080

	arm_func_start ov00_023080E4
ov00_023080E4: ; 0x023080E4
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #8
	mov r5, r1
	ldr r1, [r5, #0x10]
	mov r6, r0
	add r2, sp, #4
	ldr r4, [r6]
	bl ov00_02308A4C
	cmp r0, #0
	bne _02308124
	ldr r1, _023081D8 ; =ov00_0231B798
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #8
	mov r0, #3
	ldmia sp!, {r4, r5, r6, pc}
_02308124:
	ldr r0, [sp, #4]
	ldr r0, [r0, #0xc]
	cmp r0, #0
	beq _023081C4
	ldrh r1, [r0, #0x20]
	ldr r0, [r0, #0x1c]
	add r2, sp, #0
	bl ov00_022F8578
	ldr r0, [sp]
	cmp r0, #1
	cmpeq r0, #0
	beq _023081A4
	ldr r0, [sp, #4]
	ldr r3, _023081DC ; =0x00002710
	ldr r0, [r0, #0xc]
	add r2, r4, #0x220
	ldrh r1, [r0, #0x20]
	ldr r0, [r0, #0x1c]
	bl ov00_022F861C
	cmp r0, #5
	beq _023081A4
	ldr r2, _023081E0 ; =ov00_0231B84C
	mov r0, r6
	mov r1, #5
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #0
	bl ov00_02302DEC
	add sp, sp, #8
	mov r0, #3
	ldmia sp!, {r4, r5, r6, pc}
_023081A4:
	ldr r0, [sp, #4]
	ldr r0, [r0, #0xc]
	ldr r0, [r0, #0x1c]
	str r0, [r5, #8]
	ldr r0, [sp, #4]
	ldr r0, [r0, #0xc]
	ldrh r0, [r0, #0x20]
	strh r0, [r5, #0xc]
_023081C4:
	mov r0, #0x67
	str r0, [r5]
	mov r0, #0
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_023081D8: .word ov00_0231B798
_023081DC: .word 0x00002710
_023081E0: .word ov00_0231B84C
	arm_func_end ov00_023080E4

	arm_func_start ov00_023081E4
ov00_023081E4: ; 0x023081E4
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	sub sp, sp, #0x18
	movs r4, r1
	mov r8, r0
	mov r7, r2
	mov r6, r3
	addeq sp, sp, #0x18
	moveq r0, #3
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	cmp r6, #0
	addeq sp, sp, #0x18
	moveq r0, #3
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	mov r0, r6
	bl strlen
	mov r5, r0
	add r1, sp, #0
	mov r3, #0
	str r3, [r1, #0x10]
	ldr r2, _02308340 ; =ov00_0231B884
	mov r0, r8
	str r3, [r1]
	str r3, [r1, #4]
	str r3, [r1, #8]
	str r3, [r1, #0xc]
	str r3, [r1, #0x14]
	str r7, [sp, #0x10]
	bl ov00_02302638
	cmp r0, #0
	addne sp, sp, #0x18
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	add r1, sp, #0
	mov r0, r8
	mov r2, r7
	bl ov00_02302668
	cmp r0, #0
	addne sp, sp, #0x18
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r2, _02308344 ; =ov00_0231B888
	add r1, sp, #0
	mov r0, r8
	bl ov00_02302638
	cmp r0, #0
	addne sp, sp, #0x18
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	add r1, sp, #0
	mov r0, r8
	mov r2, r5
	bl ov00_02302668
	cmp r0, #0
	addne sp, sp, #0x18
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r2, _02308348 ; =ov00_0231B890
	add r1, sp, #0
	mov r0, r8
	bl ov00_02302638
	cmp r0, #0
	addne sp, sp, #0x18
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	ldr ip, [sp, #8]
	add r1, sp, #0
	mov r0, r8
	mov r2, r6
	mov r3, r5
	str ip, [sp, #0x14]
	bl ov00_02302594
	cmp r0, #0
	addne sp, sp, #0x18
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	add r1, sp, #0
	mov r0, r8
	mov r2, #0
	bl ov00_0230251C
	cmp r0, #0
	addne sp, sp, #0x18
	ldmneia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r0, [r4, #0x3c]
	add r1, sp, #0
	bl ov00_022F47D4
	mov r0, #0
	bl ov00_022F5478
	add r0, r0, #0x710
	add r0, r0, #0x2000
	str r0, [r4, #0x14]
	mov r0, #0
	add sp, sp, #0x18
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_02308340: .word ov00_0231B884
_02308344: .word ov00_0231B888
_02308348: .word ov00_0231B890
	arm_func_end ov00_023081E4

	arm_func_start ov00_0230834C
ov00_0230834C: ; 0x0230834C
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0x48
	mov r4, r1
	cmp r3, #0
	mov r5, r0
	addeq sp, sp, #0x48
	ldr lr, [r3]
	ldmib r3, {r1, ip}
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, pc}
	str r1, [sp]
	ldr r1, _023083A4 ; =ov00_0231B898
	add r0, sp, #8
	mov r3, lr
	str ip, [sp, #4]
	bl sub_020790DC
	add r2, sp, #8
	mov r0, r5
	mov r1, r4
	bl ov00_02302884
	add sp, sp, #0x48
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_023083A4: .word ov00_0231B898
	arm_func_end ov00_0230834C

	arm_func_start ov00_023083A8
ov00_023083A8: ; 0x023083A8
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x20
	movs r6, r1
	mov r7, r0
	mov r5, r2
	mov r4, r3
	addeq sp, sp, #0x20
	moveq r0, #3
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mvn r0, #0
	cmp r5, #0
	ldreq r5, _02308474 ; =ov00_0231B8AC
	cmp r4, r0
	bne _023083EC
	mov r0, r5
	bl strlen
	mov r4, r0
_023083EC:
	ldr r1, _02308478 ; =ov00_0231B8B0
	add r0, sp, #0
	mov r2, r4
	bl sub_020790DC
	add r2, sp, #0
	mov r0, r7
	mov r1, r6
	bl ov00_02302884
	cmp r0, #0
	addne sp, sp, #0x20
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	mov r0, r7
	mov r1, r6
	mov r2, r5
	mov r3, r4
	bl ov00_02302784
	cmp r0, #0
	addne sp, sp, #0x20
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	mov r0, r7
	mov r1, r6
	mov r2, #0
	bl ov00_0230277C
	cmp r0, #0
	addne sp, sp, #0x20
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	mov r0, #0
	bl ov00_022F5478
	add r0, r0, #0x710
	add r0, r0, #0x2000
	str r0, [r6, #0x14]
	mov r0, #0
	add sp, sp, #0x20
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_02308474: .word ov00_0231B8AC
_02308478: .word ov00_0231B8B0
	arm_func_end ov00_023083A8

	arm_func_start ov00_0230847C
ov00_0230847C: ; 0x0230847C
	stmdb sp!, {r3, lr}
	mov ip, r0
	mov r2, r1
	mov r0, r3
	mov r1, ip
	bl ov00_02307F90
	cmp r0, #0
	movne r1, #0x6a
	strne r1, [r0]
	ldmia sp!, {r3, pc}
	arm_func_end ov00_0230847C

	arm_func_start ov00_023084A4
ov00_023084A4: ; 0x023084A4
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	ldr r4, [sp, #0x24]
	mov r7, r0
	mov r6, r1
	mov sl, r2
	mov r0, r4
	mov r1, r7
	mov r2, r6
	mov sb, r3
	bl ov00_02307F90
	movs r5, r0
	bne _023084FC
	mov r0, r4
	mvn r1, #0
	mov r2, #0
	bl ov00_02307FF4
	movs r5, r0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	mov r0, #0x68
	str r0, [r5]
	str r7, [r5, #8]
	strh r6, [r5, #0xc]
_023084FC:
	ldr r7, [r5, #0x24]
	ldr r8, [r5, #0x20]
	ldr r6, [r5, #0x1c]
	sub r0, r8, r7
	cmp sb, r0
	ble _02308564
	cmp sb, #0x800
	movlt r0, #0x800
	movge r0, sb
	add r8, r7, r0
	mov r0, r6
	add r1, r8, #1
	bl ov00_022F5AFC
	cmp r0, #0
	bne _02308560
	mov r0, r6
	bl ov00_022F5B14
	ldr r1, _02308598 ; =ov00_0231B838
	mov r0, r4
	bl ov00_0230BCCC
	mov r0, r4
	mov r1, #1
	mov r2, #0
	bl ov00_02302DEC
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_02308560:
	mov r6, r0
_02308564:
	mov r1, sl
	mov r2, sb
	add r0, r6, r7
	bl memcpy
	str r6, [r5, #0x1c]
	ldr r0, [r5, #0x24]
	mov r1, #0
	add r0, r0, sb
	str r0, [r5, #0x24]
	str r8, [r5, #0x20]
	ldr r0, [r5, #0x24]
	strb r1, [r6, r0]
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_02308598: .word ov00_0231B838
	arm_func_end ov00_023084A4

	arm_func_start ov00_0230859C
ov00_0230859C: ; 0x0230859C
	stmdb sp!, {r4, lr}
	mov r4, r0
	mov r2, r1
	mov r1, r4
	ldr r0, [sp, #8]
	mov r4, r3
	bl ov00_02307F90
	cmp r0, #0
	cmpne r4, #0
	movne r1, #0x6a
	strne r1, [r0]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_0230859C

	arm_func_start ov00_023085CC
ov00_023085CC: ; 0x023085CC
	bx lr
	arm_func_end ov00_023085CC

	arm_func_start ov00_023085D0
ov00_023085D0: ; 0x023085D0
	cmp r0, #0
	cmpne r1, #0
	bxeq lr
	ldr r2, [r0, #0x40]
	cmp r2, #0
	bne _023085F8
	str r1, [r0, #0x44]
	str r1, [r0, #0x48]
	str r1, [r0, #0x40]
	bx lr
_023085F8:
	ldr r3, [r0, #0x48]
	ldr r2, [r0, #0x44]
	cmp r2, r3
	streq r1, [r2, #0xc]
	streq r1, [r0, #0x48]
	strne r1, [r3, #0xc]
	strne r1, [r0, #0x48]
	bx lr
	arm_func_end ov00_023085D0

	arm_func_start ov00_02308618
ov00_02308618: ; 0x02308618
	stmdb sp!, {r3, lr}
	cmp r0, #0
	cmpne r1, #0
	ldmeqia sp!, {r3, pc}
	ldr r2, [r0, #0x40]
	cmp r2, #0
	ldmeqia sp!, {r3, pc}
	ldr r3, [r0, #0x44]
	ldr r2, [r0, #0x48]
	cmp r3, r2
	cmpeq r3, r1
	bne _0230865C
	ldr r2, [r1, #0xc]
	str r2, [r0, #0x48]
	str r2, [r0, #0x44]
	str r2, [r0, #0x40]
	b _023086A0
_0230865C:
	cmp r3, r1
	bne _02308674
	ldr r2, [r3, #0xc]
	str r2, [r0, #0x44]
	str r2, [r0, #0x40]
	b _023086A0
_02308674:
	ldr r0, [r3, #0xc]
	cmp r0, r1
	beq _02308698
_02308680:
	cmp r0, #0
	ldmeqia sp!, {r3, pc}
	mov r3, r0
	ldr r0, [r0, #0xc]
	cmp r0, r1
	bne _02308680
_02308698:
	ldr r0, [r1, #0xc]
	str r0, [r3, #0xc]
_023086A0:
	mov r0, r1
	bl ov00_022F5B14
	ldmia sp!, {r3, pc}
	arm_func_end ov00_02308618

	arm_func_start ov00_023086AC
ov00_023086AC: ; 0x023086AC
	stmdb sp!, {r3, lr}
	ldr r0, [r0]
	bl _s32_div_f
	mov r0, r1
	ldmia sp!, {r3, pc}
	arm_func_end ov00_023086AC

	arm_func_start ov00_023086C0
ov00_023086C0: ; 0x023086C0
	ldr r2, [r0]
	ldr r0, [r1]
	sub r0, r2, r0
	bx lr
	arm_func_end ov00_023086C0

	arm_func_start ov00_023086D0
ov00_023086D0: ; 0x023086D0
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r0, [r4, #8]
	cmp r0, #0
	beq _02308720
	ldr r0, [r0, #8]
	bl ov00_022F5B14
	ldr r0, [r4, #8]
	mov r1, #0
	str r1, [r0, #8]
	ldr r0, [r4, #8]
	ldr r0, [r0, #0xc]
	bl ov00_022F5B14
	ldr r0, [r4, #8]
	mov r1, #0
	str r1, [r0, #0xc]
	ldr r0, [r4, #8]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #8]
_02308720:
	ldr r0, [r4, #0xc]
	cmp r0, #0
	beq _023087B8
	ldr r0, [r0, #8]
	bl ov00_022F5B14
	ldr r0, [r4, #0xc]
	mov r1, #0
	str r1, [r0, #8]
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0xc]
	bl ov00_022F5B14
	ldr r0, [r4, #0xc]
	mov r1, #0
	str r1, [r0, #0xc]
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0x10]
	bl ov00_022F5B14
	ldr r0, [r4, #0xc]
	mov r1, #0
	str r1, [r0, #0x10]
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0x14]
	bl ov00_022F5B14
	ldr r0, [r4, #0xc]
	mov r1, #0
	str r1, [r0, #0x14]
	ldr r0, [r4, #0xc]
	ldr r0, [r0, #0x38]
	cmp r0, #0
	beq _023087A8
	bl ov00_022F4758
	ldr r0, [r4, #0xc]
	mov r1, #0
	str r1, [r0, #0x38]
_023087A8:
	ldr r0, [r4, #0xc]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0xc]
_023087B8:
	mov r0, r4
	bl ov00_02306620
	ldr r0, [r4, #0x14]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0x14]
	ldr r0, [r4, #0x1c]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0x1c]
	ldmia sp!, {r4, pc}
	arm_func_end ov00_023086D0

	arm_func_start ov00_023087E4
ov00_023087E4: ; 0x023087E4
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #4
	ldr r4, [r0]
	mov r0, #0
	str r0, [r4, #0x5d0]
	str r0, [r4, #0x5cc]
	ldr ip, _02308830 ; =ov00_023086D0
	ldr r2, _02308834 ; =ov00_023086AC
	ldr r3, _02308838 ; =ov00_023086C0
	mov r0, #0x20
	mov r1, #4
	str ip, [sp]
	bl ov00_022F4B94
	str r0, [r4, #0x5c8]
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
	.align 2, 0
_02308830: .word ov00_023086D0
_02308834: .word ov00_023086AC
_02308838: .word ov00_023086C0
	arm_func_end ov00_023087E4

	arm_func_start ov00_0230883C
ov00_0230883C: ; 0x0230883C
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #0x20
	mov r6, r2
	mov r4, r1
	mov r1, r6
	mov r2, #1
	mov r5, r0
	bl ov00_0230B950
	cmp r0, #0
	addne sp, sp, #0x20
	movne r0, #4
	ldmneia sp!, {r4, r5, r6, pc}
	ldr r1, _0230898C ; =ov00_0231B8C0
	mov r0, r6
	mov r2, #5
	bl strncmp
	cmp r0, #0
	beq _023088B0
	ldr r2, _02308990 ; =ov00_0231B8C8
	mov r0, r5
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r5
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x20
	mov r0, #3
	ldmia sp!, {r4, r5, r6, pc}
_023088B0:
	ldr r1, _02308994 ; =ov00_0231B8F8
	add r2, sp, #0x10
	mov r0, r6
	mov r3, #0x10
	bl ov00_0230BA28
	cmp r0, #0
	bne _023088F8
	ldr r2, _02308990 ; =ov00_0231B8C8
	mov r0, r5
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r5
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x20
	mov r0, #3
	ldmia sp!, {r4, r5, r6, pc}
_023088F8:
	add r0, sp, #0x10
	bl sub_0208B360
	ldr r2, [r4, #0xc]
	ldr r1, [r4, #0x10]
	mov r6, r0
	str r2, [sp, #8]
	str r1, [sp, #0xc]
	cmp r2, #0
	beq _02308974
	mov r0, #8
	bl ov00_022F5AE4
	movs r3, r0
	bne _02308944
	ldr r1, _02308998 ; =ov00_0231B904
	mov r0, r5
	bl ov00_0230BCCC
	add sp, sp, #0x20
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
_02308944:
	str r6, [r3, #4]
	mov r2, #0
	str r2, [r3]
	str r4, [sp]
	add r1, sp, #8
	str r2, [sp, #4]
	mov r0, r5
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	addne sp, sp, #0x20
	ldmneia sp!, {r4, r5, r6, pc}
_02308974:
	mov r0, r5
	mov r1, r4
	bl ov00_0230716C
	mov r0, #0
	add sp, sp, #0x20
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_0230898C: .word ov00_0231B8C0
_02308990: .word ov00_0231B8C8
_02308994: .word ov00_0231B8F8
_02308998: .word ov00_0231B904
	arm_func_end ov00_0230883C

	arm_func_start ov00_0230899C
ov00_0230899C: ; 0x0230899C
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #0x24
	mov r6, r0
	mov r5, r1
	cmp r5, #0
	ldr r4, [r6]
	addle sp, sp, #0x24
	movle r0, #0
	ldmleia sp!, {r3, r4, r5, r6, pc}
	add r2, sp, #0
	bl ov00_02308A4C
	cmp r0, #0
	ldrne r0, [sp]
	addne sp, sp, #0x24
	ldmneia sp!, {r3, r4, r5, r6, pc}
	add r3, sp, #4
	mov r0, #0
	mov r2, r3
	mov r1, r0
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2!, {r0, r1}
	stmia r2, {r0, r1}
	str r5, [sp, #4]
	str r0, [sp, #8]
	str r0, [sp, #0x14]
	str r0, [sp, #0x18]
	str r0, [sp, #0x20]
	str r0, [sp, #0x1c]
	ldr r0, [r4, #0x5c8]
	mov r1, r3
	bl ov00_022F4CD0
	ldr r0, [r4, #0x5cc]
	add r2, sp, #0
	add r3, r0, #1
	mov r0, r6
	mov r1, r5
	str r3, [r4, #0x5cc]
	bl ov00_02308A4C
	cmp r0, #0
	ldrne r0, [sp]
	moveq r0, #0
	add sp, sp, #0x24
	ldmia sp!, {r3, r4, r5, r6, pc}
	arm_func_end ov00_0230899C

	arm_func_start ov00_02308A4C
ov00_02308A4C: ; 0x02308A4C
	stmdb sp!, {r4, lr}
	sub sp, sp, #0x20
	ldr r0, [r0]
	mov r4, r2
	str r1, [sp]
	ldr r0, [r0, #0x5c8]
	add r1, sp, #0
	bl ov00_022F4DCC
	cmp r4, #0
	strne r0, [r4]
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	add sp, sp, #0x20
	ldmia sp!, {r4, pc}
	arm_func_end ov00_02308A4C

	arm_func_start ov00_02308A88
ov00_02308A88: ; 0x02308A88
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x10
	mov r7, r2
	mov r5, r0
	mov r4, r1
	mov r1, r7
	mov r2, #1
	ldr r6, [r5]
	bl ov00_0230B950
	cmp r0, #0
	addne sp, sp, #0x10
	movne r0, #4
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, _02308B8C ; =ov00_0231B914
	mov r0, r7
	mov r2, #5
	bl strncmp
	cmp r0, #0
	beq _02308B00
	ldr r2, _02308B90 ; =ov00_0231B8C8
	mov r0, r5
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r5
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x10
	mov r0, #3
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_02308B00:
	ldr r1, [r4, #0xc]
	ldr r0, [r4, #0x10]
	str r1, [sp, #8]
	str r0, [sp, #0xc]
	cmp r1, #0
	beq _02308B74
	mov r0, #8
	bl ov00_022F5AE4
	movs r3, r0
	bne _02308B40
	ldr r1, _02308B94 ; =ov00_0231B904
	mov r0, r5
	bl ov00_0230BCCC
	add sp, sp, #0x10
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_02308B40:
	ldr r0, [r6, #0x1a0]
	mov r2, #0
	str r0, [r3, #4]
	str r2, [r3]
	str r4, [sp]
	add r1, sp, #8
	str r2, [sp, #4]
	mov r0, r5
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	addne sp, sp, #0x10
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
_02308B74:
	mov r0, r5
	mov r1, r4
	bl ov00_0230716C
	mov r0, #0
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_02308B8C: .word ov00_0231B914
_02308B90: .word ov00_0231B8C8
_02308B94: .word ov00_0231B904
	arm_func_end ov00_02308A88

	arm_func_start ov00_02308B98
ov00_02308B98: ; 0x02308B98
	stmdb sp!, {r3, r4, lr}
	sub sp, sp, #4
	add r2, sp, #0
	ldr r4, [r0]
	bl ov00_02308A4C
	cmp r0, #0
	addeq sp, sp, #4
	ldmeqia sp!, {r3, r4, pc}
	ldr r0, [r4, #0x5c8]
	ldr r1, [sp]
	bl ov00_022F4D50
	add sp, sp, #4
	ldmia sp!, {r3, r4, pc}
	arm_func_end ov00_02308B98

	arm_func_start ov00_02308BCC
ov00_02308BCC: ; 0x02308BCC
	ldr r0, [r0]
	ldr ip, _02308BDC ; =ov00_022F4D50
	ldr r0, [r0, #0x5c8]
	bx ip
	.align 2, 0
_02308BDC: .word ov00_022F4D50
	arm_func_end ov00_02308BCC

	arm_func_start ov00_02308BE0
ov00_02308BE0: ; 0x02308BE0
	stmdb sp!, {r4, r5, r6, lr}
	mov r6, r1
	ldr r4, [r6, #0x10]
	mov r5, r2
	cmp r4, #0
	beq _02308C38
	ldr r0, [r5]
	ldr r1, [r4]
	bl strcmp
	cmp r0, #0
	bne _02308C38
	ldr r0, [r5, #4]
	ldr r1, [r4, #8]
	bl strcmp
	cmp r0, #0
	bne _02308C38
	ldr r1, [r5, #8]
	mov r0, #1
	str r6, [r1]
	str r0, [r5, #0xc]
	mov r0, #0
	ldmia sp!, {r4, r5, r6, pc}
_02308C38:
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
	arm_func_end ov00_02308BE0

	arm_func_start ov00_02308C40
ov00_02308C40: ; 0x02308C40
	stmdb sp!, {r4, lr}
	sub sp, sp, #0x10
	str r1, [sp]
	mov ip, #0
	str r2, [sp, #4]
	mov r4, r3
	ldr r1, _02308C88 ; =ov00_02308BE0
	add r2, sp, #0
	str ip, [sp, #0xc]
	str r4, [sp, #8]
	bl ov00_02308CA8
	ldr r0, [sp, #0xc]
	cmp r0, #0
	moveq r0, #0
	streq r0, [r4]
	mov r0, #0
	add sp, sp, #0x10
	ldmia sp!, {r4, pc}
	.align 2, 0
_02308C88: .word ov00_02308BE0
	arm_func_end ov00_02308C40

	arm_func_start ov00_02308C8C
ov00_02308C8C: ; 0x02308C8C
	stmdb sp!, {r3, lr}
	mov ip, r0
	ldr r2, [r1, #8]
	ldmia r1, {r0, r3}
	mov r1, ip
	blx r3
	ldmia sp!, {r3, pc}
	arm_func_end ov00_02308C8C

	arm_func_start ov00_02308CA8
ov00_02308CA8: ; 0x02308CA8
	stmdb sp!, {lr}
	sub sp, sp, #0xc
	ldr r3, [r0]
	str r1, [sp, #4]
	str r2, [sp, #8]
	str r0, [sp]
	ldr r0, [r3, #0x5c8]
	ldr r1, _02308CE4 ; =ov00_02308C8C
	add r2, sp, #0
	bl ov00_022F4E8C
	cmp r0, #0
	moveq r0, #1
	movne r0, #0
	add sp, sp, #0xc
	ldmia sp!, {pc}
	.align 2, 0
_02308CE4: .word ov00_02308C8C
_02308CE8:
	ldr r0, [r1, #8]
	cmp r0, #0
	beq _02308D0C
	ldr r3, [r2]
	ldr r0, [r0]
	cmp r3, r0
	streq r1, [r2, #4]
	moveq r0, #0
	bxeq lr
_02308D0C:
	ldr r0, [r1, #0xc]
	cmp r0, #0
	beq _02308D30
	ldr r3, [r2]
	ldr r0, [r0]
	cmp r3, r0
	streq r1, [r2, #4]
	moveq r0, #0
	bxeq lr
_02308D30:
	mov r0, #1
	bx lr
	arm_func_end ov00_02308CA8

	arm_func_start ov00_02308D38
ov00_02308D38: ; 0x02308D38
	stmdb sp!, {r3, lr}
	sub sp, sp, #8
	str r1, [sp]
	mov r3, #0
	ldr r1, _02308D64 ; =_02308CE8
	add r2, sp, #0
	str r3, [sp, #4]
	bl ov00_02308CA8
	ldr r0, [sp, #4]
	add sp, sp, #8
	ldmia sp!, {r3, pc}
	.align 2, 0
_02308D64: .word _02308CE8
	arm_func_end ov00_02308D38

	arm_func_start ov00_02308D68
ov00_02308D68: ; 0x02308D68
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r0, [r4, #0xc]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0xc]
	ldr r0, [r4, #8]
	bl ov00_022F5B14
	mov r1, #0
	mov r0, r4
	str r1, [r4, #8]
	bl ov00_022F5B14
	ldmia sp!, {r4, pc}
	arm_func_end ov00_02308D68

	arm_func_start ov00_02308D9C
ov00_02308D9C: ; 0x02308D9C
	stmdb sp!, {r4, lr}
	mov r4, r0
	ldr r0, [r4, #8]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #8]
	ldr r0, [r4, #0xc]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0xc]
	ldr r0, [r4, #0x10]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0x10]
	ldr r0, [r4, #0x14]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [r4, #0x14]
	ldr r0, [r4, #0x38]
	bl ov00_022F4758
	mov r1, #0
	mov r0, r4
	str r1, [r4, #0x38]
	bl ov00_022F5B14
	ldmia sp!, {r4, pc}
	arm_func_end ov00_02308D9C

	arm_func_start ov00_02308E00
ov00_02308E00: ; 0x02308E00
	cmp r0, #0
	beq _02308E38
	ldr r1, [r0, #0x10]
	cmp r1, #0
	ldreq r1, [r0, #8]
	cmpeq r1, #0
	ldreq r1, [r0, #0xc]
	cmpeq r1, #0
	ldreq r1, [r0, #0x1c]
	cmpeq r1, #0
	ldreq r0, [r0, #0x14]
	cmpeq r0, #0
	moveq r0, #1
	bxeq lr
_02308E38:
	mov r0, #0
	bx lr
	arm_func_end ov00_02308E00

	arm_func_start ov00_02308E40
ov00_02308E40: ; 0x02308E40
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #8
	mov r5, r1
	ldr r4, [r5, #4]
	mov r1, #0x1000
	mov r6, r0
	add r0, r1, #1
	str r1, [r4, #0xc]
	bl ov00_022F5AE4
	str r0, [r4, #8]
	cmp r0, #0
	bne _02308E88
	ldr r1, _02309000 ; =ov00_0231B95C
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #8
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
_02308E88:
	mov r0, #2
	mov r1, #1
	mov r2, #0
	bl SocketCreate
	mvn r1, #0
	str r0, [r4, #4]
	cmp r0, r1
	bne _02308ED4
	ldr r2, _02309004 ; =ov00_0231B96C
	mov r0, r6
	mov r1, #5
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #8
	mov r0, #3
	ldmia sp!, {r4, r5, r6, pc}
_02308ED4:
	mov r1, #0
	bl SocketSetBlocking
	cmp r0, #0
	bne _02308F10
	ldr r2, _02309008 ; =ov00_0231B994
	mov r0, r6
	mov r1, #5
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #8
	mov r0, #3
	ldmia sp!, {r4, r5, r6, pc}
_02308F10:
	ldr r0, _0230900C ; =ov00_0231B91C
	bl ov00_022CF3D4
	cmp r0, #0
	bne _02308F4C
	ldr r2, _02309010 ; =ov00_0231B9C8
	mov r0, r6
	mov r1, #5
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #8
	mov r0, #3
	ldmia sp!, {r4, r5, r6, pc}
_02308F4C:
	add r1, sp, #0
	mov r3, #0
	str r3, [r1]
	mov r2, #2
	str r3, [r1, #4]
	strb r2, [sp, #1]
	ldr r2, [r0, #0xc]
	ldr r0, _02309014 ; =0x0000CD74
	ldr r3, [r2]
	mov r2, #8
	ldr r3, [r3]
	str r3, [sp, #4]
	strh r0, [sp, #2]
	ldr r0, [r4, #4]
	bl SocketConnect
	mvn r1, #0
	cmp r0, r1
	bne _02308FE4
	ldr r0, [r4, #4]
	bl ov00_022F5194
	mvn r2, #5
	cmp r0, r2
	subne r1, r2, #0x14
	cmpne r0, r1
	subne r1, r2, #0x46
	cmpne r0, r1
	beq _02308FE4
	ldr r2, _02309018 ; =ov00_0231B9F8
	mov r0, r6
	mov r1, #5
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #8
	mov r0, #3
	ldmia sp!, {r4, r5, r6, pc}
_02308FE4:
	mov r0, #1
	str r0, [r5, #0x14]
	bl ov00_022F5594
	str r0, [r4, #0x148]
	mov r0, #0
	add sp, sp, #8
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_02309000: .word ov00_0231B95C
_02309004: .word ov00_0231B96C
_02309008: .word ov00_0231B994
_0230900C: .word ov00_0231B91C
_02309010: .word ov00_0231B9C8
_02309014: .word 0x0000CD74
_02309018: .word ov00_0231B9F8
	arm_func_end ov00_02308E40

	arm_func_start ov00_0230901C
ov00_0230901C: ; 0x0230901C
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r0, #0x154
	mov r6, r1
	mov r5, r2
	bl ov00_022F5AE4
	movs r4, r0
	bne _02309050
	ldr r1, _023090C8 ; =ov00_0231B95C
	mov r0, r7
	bl ov00_0230BCCC
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_02309050:
	mov r1, #0
	mov r2, #0x154
	bl memset
	str r5, [r4]
	mvn r0, #0
	str r0, [r4, #4]
	mov r0, #0
	str r0, [r4, #8]
	str r0, [r4, #0x10]
	str r0, [r4, #0x14]
	str r0, [r4, #0xc]
	str r0, [r4, #0x20]
	mov r1, #0x1000
	str r0, [r4, #0x24]
	add r0, r1, #1
	str r1, [r4, #0x1c]
	bl ov00_022F5AE4
	str r0, [r4, #0x18]
	cmp r0, #0
	bne _023090B4
	ldr r1, _023090C8 ; =ov00_0231B95C
	mov r0, r7
	bl ov00_0230BCCC
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_023090B4:
	mov r0, #0
	str r0, [r4, #0x140]
	str r0, [r4, #0x144]
	str r4, [r6]
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_023090C8: .word ov00_0231B95C
	arm_func_end ov00_0230901C

	arm_func_start ov00_023090CC
ov00_023090CC: ; 0x023090CC
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0x10
	mov r5, r0
	ldr r4, [r5]
	ldr ip, [sp, #0x20]
	ldr lr, [r4, #0x238]
	add lr, lr, #1
	str lr, [r4, #0x238]
	stmia sp, {r2, r3}
	mov r2, r1
	add r3, sp, #0xc
	mov r1, #3
	str ip, [sp, #8]
	bl ov00_0230703C
	cmp r0, #0
	addne sp, sp, #0x10
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r1, [sp, #0xc]
	mov r0, r5
	bl ov00_02308E40
	cmp r0, #0
	addne sp, sp, #0x10
	ldmneia sp!, {r3, r4, r5, pc}
	ldr r1, [sp, #0xc]
	ldr r0, [r1, #8]
	cmp r0, #0
	beq _02309150
	ldr r1, [r1, #0x18]
	mov r0, r5
	bl ov00_023003B4
	cmp r0, #0
	addne sp, sp, #0x10
	ldmneia sp!, {r3, r4, r5, pc}
_02309150:
	mov r0, #0
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_023090CC

	arm_func_start ov00_0230915C
ov00_0230915C: ; 0x0230915C
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #8
	movs r8, r1
	mov sb, r0
	ldrnesb r0, [r8]
	mov r7, r2
	mov r6, r3
	ldr r5, [sp, #0x28]
	ldr r4, [sp, #0x2c]
	cmpne r0, #0
	bne _023091EC
	cmp r6, #0
	ldrnesb r0, [r6]
	cmpne r0, #0
	bne _023091EC
	cmp r5, #0
	ldrnesb r0, [r5]
	cmpne r0, #0
	bne _023091EC
	cmp r4, #0
	ldrnesb r0, [r4]
	cmpne r0, #0
	bne _023091EC
	ldr r0, [sp, #0x30]
	cmp r0, #0
	bne _023091EC
	cmp r7, #0
	ldrnesb r0, [r7]
	cmpne r0, #0
	bne _023091EC
	ldr r1, _02309344 ; =ov00_0231BA20
	mov r0, sb
	bl ov00_0230BCCC
	add sp, sp, #8
	mov r0, #2
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
_023091EC:
	add r1, sp, #4
	mov r0, sb
	mov r2, #1
	bl ov00_0230901C
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	cmp r8, #0
	bne _02309220
	ldr r0, [sp, #4]
	mov r1, #0
	strb r1, [r0, #0x28]
	b _02309234
_02309220:
	ldr r0, [sp, #4]
	mov r1, r8
	add r0, r0, #0x28
	mov r2, #0x1f
	bl ov00_0230B930
_02309234:
	cmp r7, #0
	bne _0230924C
	ldr r0, [sp, #4]
	mov r1, #0
	strb r1, [r0, #0x47]
	b _02309260
_0230924C:
	ldr r0, [sp, #4]
	mov r1, r7
	add r0, r0, #0x47
	mov r2, #0x15
	bl ov00_0230B930
_02309260:
	cmp r6, #0
	bne _02309278
	ldr r0, [sp, #4]
	mov r1, #0
	strb r1, [r0, #0x5c]
	b _0230928C
_02309278:
	ldr r0, [sp, #4]
	mov r1, r6
	add r0, r0, #0x5c
	mov r2, #0x33
	bl ov00_0230B930
_0230928C:
	ldr r0, [sp, #4]
	add r0, r0, #0x5c
	bl ov00_022F5548
	cmp r5, #0
	bne _023092B0
	ldr r0, [sp, #4]
	mov r1, #0
	strb r1, [r0, #0x8f]
	b _023092C4
_023092B0:
	ldr r0, [sp, #4]
	mov r1, r5
	add r0, r0, #0x8f
	mov r2, #0x1f
	bl ov00_0230B930
_023092C4:
	cmp r4, #0
	bne _023092DC
	ldr r0, [sp, #4]
	mov r1, #0
	strb r1, [r0, #0xae]
	b _023092F0
_023092DC:
	ldr r0, [sp, #4]
	mov r1, r4
	add r0, r0, #0xae
	mov r2, #0x1f
	bl ov00_0230B930
_023092F0:
	ldr r0, [sp, #0x34]
	ldr r2, [sp, #0x30]
	ldr r1, [sp, #4]
	cmp r0, #0
	movlt r0, #0
	strlt r0, [sp, #0x34]
	str r2, [r1, #0x134]
	ldr r2, [sp, #0x34]
	ldr r1, [sp, #4]
	ldr r0, [sp, #0x40]
	str r2, [r1, #0x138]
	str r0, [sp]
	ldr r1, [sp, #4]
	ldr r2, [sp, #0x38]
	ldr r3, [sp, #0x3c]
	mov r0, sb
	bl ov00_023090CC
	cmp r0, #0
	moveq r0, #0
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_02309344: .word ov00_0231BA20
	arm_func_end ov00_0230915C

	arm_func_start ov00_02309348
ov00_02309348: ; 0x02309348
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #8
	mov r6, r1
	mov r5, r2
	add r1, sp, #4
	mov r2, #9
	mov r7, r0
	mov r4, r3
	bl ov00_0230901C
	cmp r0, #0
	addne sp, sp, #8
	ldmneia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, [sp, #4]
	ldr r0, [sp, #0x24]
	str r6, [r1, #0x14c]
	ldr r1, [sp, #4]
	ldr r3, [sp, #0x20]
	str r5, [r1, #0x150]
	str r0, [sp]
	ldr r1, [sp, #4]
	mov r0, r7
	mov r2, r4
	bl ov00_023090CC
	cmp r0, #0
	moveq r0, #0
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_02309348

	arm_func_start ov00_023093B4
ov00_023093B4: ; 0x023093B4
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, fp, lr}
	sub sp, sp, #0xcc
	sub sp, sp, #0x400
	mov sl, r0
	ldr r0, [sl]
	str r1, [sp, #0x1c]
	ldr r1, [r1, #8]
	str r0, [sp, #0x2c]
	ldr r0, [sp, #0x1c]
	cmp r1, #0
	movne r4, #1
	moveq r4, #0
	ldr r6, [r0, #4]
	cmp r1, #0
	bne _02309440
	bl ov00_022F5594
	ldr r2, [r6, #0x148]
	ldr r1, _0230A144 ; =0x0000EA60
	sub r0, r0, r2
	cmp r0, r1
	bls _02309440
	ldr r1, _0230A148 ; =0x00000D02
	mov r3, #1
	ldr r2, _0230A14C ; =ov00_0231BA34
	mov r0, sl
	str r3, [r6, #0x144]
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #0
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02309440:
	mov r1, #1
	ldr r0, _0230A150 ; =ov00_0231BA4C
	str r1, [sp]
	str r0, [sp, #4]
	ldr r1, [r6, #4]
	add r3, sp, #0x74
	mov r0, sl
	add r2, r6, #0x18
	bl ov00_02302A04
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [sp, #0x1c]
	ldr r0, [r0, #0x14]
	cmp r0, #1
	bne _02309C8C
	ldr r1, [r6, #4]
	add r2, sp, #0x88
	mov r0, sl
	bl ov00_0230BA94
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r0, [sp, #0x88]
	cmp r0, #4
	bne _023094E0
	ldr r1, _0230A154 ; =0x00000D01
	ldr r2, _0230A158 ; =ov00_0231BA50
	mov r0, sl
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #4
	mov r2, #0
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #4
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_023094E0:
	cmp r0, #3
	bne _0230B46C
	ldr r0, [r6]
	cmp r0, #1
	bne _023096CC
	ldr r2, _0230A15C ; =ov00_0231BA7C
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, _0230A160 ; =ov00_0231BA88
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r0, [sp, #0x2c]
	add r1, r6, #0x18
	ldr r2, [r0, #0x198]
	mov r0, sl
	bl ov00_02302668
	ldr r2, _0230A164 ; =ov00_0231BA94
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [sp, #0x2c]
	mov r0, sl
	ldr r2, [r2, #0x1a0]
	add r1, r6, #0x18
	bl ov00_02302668
	ldr r2, _0230A168 ; =ov00_0231BAA0
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [sp, #0x2c]
	mov r0, sl
	ldr r2, [r2, #0x60c]
	add r1, r6, #0x18
	bl ov00_02302668
	ldr r2, _0230A16C ; =ov00_0231BAB0
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [sp, #0x2c]
	mov r0, sl
	ldr r2, [r2, #0x1a4]
	add r1, r6, #0x18
	bl ov00_02302668
	ldrsb r0, [r6, #0x28]
	cmp r0, #0
	beq _023095C0
	ldr r2, _0230A170 ; =ov00_0231BABC
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	mov r0, sl
	add r1, r6, #0x18
	add r2, r6, #0x28
	bl ov00_02302638
_023095C0:
	ldrsb r0, [r6, #0x47]
	cmp r0, #0
	beq _023095EC
	ldr r2, _0230A174 ; =ov00_0231BAC4
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	mov r0, sl
	add r1, r6, #0x18
	add r2, r6, #0x47
	bl ov00_02302638
_023095EC:
	ldrsb r0, [r6, #0x5c]
	cmp r0, #0
	beq _02309618
	ldr r2, _0230A178 ; =ov00_0231BAD4
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	mov r0, sl
	add r1, r6, #0x18
	add r2, r6, #0x5c
	bl ov00_02302638
_02309618:
	ldrsb r0, [r6, #0x8f]
	cmp r0, #0
	beq _02309644
	ldr r2, _0230A17C ; =ov00_0231BADC
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	mov r0, sl
	add r1, r6, #0x18
	add r2, r6, #0x8f
	bl ov00_02302638
_02309644:
	ldrsb r0, [r6, #0xae]
	cmp r0, #0
	beq _02309670
	ldr r2, _0230A180 ; =ov00_0231BAE8
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	mov r0, sl
	add r1, r6, #0x18
	add r2, r6, #0xae
	bl ov00_02302638
_02309670:
	ldr r0, [r6, #0x134]
	cmp r0, #0
	beq _0230969C
	ldr r2, _0230A184 ; =ov00_0231BAF4
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [r6, #0x134]
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302668
_0230969C:
	ldr r0, [r6, #0x138]
	cmp r0, #0
	ble _02309C4C
	ldr r2, _0230A188 ; =ov00_0231BB00
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [r6, #0x138]
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302668
	b _02309C4C
_023096CC:
	cmp r0, #2
	bne _0230972C
	ldr r2, _0230A18C ; =ov00_0231BB08
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, _0230A178 ; =ov00_0231BAD4
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	mov r0, sl
	add r1, r6, #0x18
	add r2, r6, #0x5c
	bl ov00_02302638
	ldr r2, _0230A16C ; =ov00_0231BAB0
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [sp, #0x2c]
	mov r0, sl
	ldr r2, [r2, #0x1a4]
	add r1, r6, #0x18
	bl ov00_02302668
	b _02309C4C
_0230972C:
	cmp r0, #3
	bne _023097DC
	ldr r2, _0230A190 ; =ov00_0231BB10
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, _0230A178 ; =ov00_0231BAD4
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	mov r0, sl
	add r1, r6, #0x18
	add r2, r6, #0x5c
	bl ov00_02302638
	add r0, r6, #0xcd
	add r1, sp, #0x9c
	bl PasswordEncryptString
	ldr r2, _0230A194 ; =ov00_0231BB18
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	mov r0, sl
	add r1, r6, #0x18
	add r2, sp, #0x9c
	bl ov00_02302638
	ldr r2, _0230A168 ; =ov00_0231BAA0
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [sp, #0x2c]
	mov r0, sl
	ldr r2, [r2, #0x60c]
	add r1, r6, #0x18
	bl ov00_02302668
	ldr r2, _0230A16C ; =ov00_0231BAB0
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [sp, #0x2c]
	mov r0, sl
	ldr r2, [r2, #0x1a4]
	add r1, r6, #0x18
	bl ov00_02302668
	b _02309C4C
_023097DC:
	cmp r0, #4
	bne _02309860
	ldr r2, _0230A198 ; =ov00_0231BB24
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, _0230A160 ; =ov00_0231BA88
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r0, [sp, #0x2c]
	add r1, r6, #0x18
	ldr r2, [r0, #0x198]
	mov r0, sl
	bl ov00_02302668
	ldr r2, _0230A164 ; =ov00_0231BA94
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [sp, #0x2c]
	mov r0, sl
	ldr r2, [r2, #0x1a0]
	add r1, r6, #0x18
	bl ov00_02302668
	ldr r2, _0230A19C ; =ov00_0231BB30
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [r6, #0x13c]
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302668
	b _02309C4C
_02309860:
	cmp r0, #5
	bne _0230990C
	ldr r2, _0230A1A0 ; =ov00_0231BB3C
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, _0230A170 ; =ov00_0231BABC
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	mov r0, sl
	add r1, r6, #0x18
	add r2, r6, #0x28
	bl ov00_02302638
	ldr r2, _0230A178 ; =ov00_0231BAD4
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	mov r0, sl
	add r1, r6, #0x18
	add r2, r6, #0x5c
	bl ov00_02302638
	ldr r2, _0230A16C ; =ov00_0231BAB0
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [sp, #0x2c]
	mov r0, sl
	ldr r2, [r2, #0x1a4]
	add r1, r6, #0x18
	bl ov00_02302668
	add r0, r6, #0xcd
	add r1, sp, #0x9c
	bl PasswordEncryptString
	ldr r2, _0230A194 ; =ov00_0231BB18
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	mov r0, sl
	add r1, r6, #0x18
	add r2, sp, #0x9c
	bl ov00_02302638
	b _02309C4C
_0230990C:
	cmp r0, #6
	bne _02309A4C
	ldr r2, _0230A1A4 ; =ov00_0231BB44
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, _0230A170 ; =ov00_0231BABC
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	mov r0, sl
	add r1, r6, #0x18
	add r2, r6, #0x28
	bl ov00_02302638
	ldr r2, _0230A178 ; =ov00_0231BAD4
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	mov r0, sl
	add r1, r6, #0x18
	add r2, r6, #0x5c
	bl ov00_02302638
	add r0, r6, #0xcd
	add r1, sp, #0x9c
	bl PasswordEncryptString
	ldr r2, _0230A194 ; =ov00_0231BB18
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	mov r0, sl
	add r1, r6, #0x18
	add r2, sp, #0x9c
	bl ov00_02302638
	ldr r2, _0230A1A8 ; =ov00_0231BB50
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [sp, #0x2c]
	mov r0, sl
	ldr r2, [r2, #0x608]
	add r1, r6, #0x18
	bl ov00_02302668
	ldr r2, _0230A168 ; =ov00_0231BAA0
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [sp, #0x2c]
	mov r0, sl
	ldr r2, [r2, #0x60c]
	add r1, r6, #0x18
	bl ov00_02302668
	ldr r2, _0230A174 ; =ov00_0231BAC4
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	mov r0, sl
	add r1, r6, #0x18
	add r2, r6, #0x47
	bl ov00_02302638
	ldrsb r0, [r6, #0xec]
	cmp r0, #0
	beq _02309A24
	ldr r2, _0230A1AC ; =ov00_0231BB5C
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	mov r0, sl
	add r1, r6, #0x18
	add r2, r6, #0xec
	bl ov00_02302638
_02309A24:
	ldr r2, _0230A16C ; =ov00_0231BAB0
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r0, [sp, #0x2c]
	add r1, r6, #0x18
	ldr r2, [r0, #0x1a4]
	mov r0, sl
	bl ov00_02302668
	b _02309C4C
_02309A4C:
	cmp r0, #7
	bne _02309AD4
	ldr r2, _0230A1B0 ; =ov00_0231BB64
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, _0230A160 ; =ov00_0231BA88
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r0, [sp, #0x2c]
	add r1, r6, #0x18
	ldr r2, [r0, #0x198]
	mov r0, sl
	bl ov00_02302668
	ldr r2, _0230A164 ; =ov00_0231BA94
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [sp, #0x2c]
	mov r0, sl
	ldr r2, [r2, #0x1a0]
	add r1, r6, #0x18
	bl ov00_02302668
	ldr r2, _0230A168 ; =ov00_0231BAA0
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [sp, #0x2c]
	mov r0, sl
	ldr r2, [r2, #0x60c]
	add r1, r6, #0x18
	bl ov00_02302668
	b _02309C4C
_02309AD4:
	cmp r0, #9
	bne _02309BF0
	ldr r2, _0230A1B4 ; =ov00_0231BB70
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, _0230A160 ; =ov00_0231BA88
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r0, [sp, #0x2c]
	add r1, r6, #0x18
	ldr r2, [r0, #0x198]
	mov r0, sl
	bl ov00_02302668
	ldr r2, _0230A164 ; =ov00_0231BA94
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [sp, #0x2c]
	mov r0, sl
	ldr r2, [r2, #0x1a0]
	add r1, r6, #0x18
	bl ov00_02302668
	ldr r2, _0230A1B8 ; =ov00_0231BB80
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [r6, #0x150]
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302668
	ldr r2, _0230A1BC ; =ov00_0231BB8C
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r0, [r6, #0x14c]
	cmp r0, #0
	beq _02309BC8
	ldr r2, [r0]
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302668
	ldr r0, [r6, #0x150]
	mov r5, #1
	cmp r0, #1
	ble _02309BC8
	ldr r7, _0230A1C0 ; =ov00_0231BB94
_02309B94:
	mov r0, sl
	mov r2, r7
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r1, [r6, #0x14c]
	mov r0, sl
	ldr r2, [r1, r5, lsl #2]
	add r1, r6, #0x18
	bl ov00_02302668
	ldr r0, [r6, #0x150]
	add r5, r5, #1
	cmp r5, r0
	blt _02309B94
_02309BC8:
	ldr r2, _0230A168 ; =ov00_0231BAA0
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r0, [sp, #0x2c]
	add r1, r6, #0x18
	ldr r2, [r0, #0x60c]
	mov r0, sl
	bl ov00_02302668
	b _02309C4C
_02309BF0:
	cmp r0, #8
	bne _02309C4C
	ldr r2, _0230A1C4 ; =ov00_0231BB98
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, _0230A1C8 ; =ov00_0231BBA8
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	mov r0, sl
	add r1, r6, #0x18
	add r2, r6, #0x47
	bl ov00_02302638
	ldr r2, _0230A168 ; =ov00_0231BAA0
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, [sp, #0x2c]
	mov r0, sl
	ldr r2, [r2, #0x60c]
	add r1, r6, #0x18
	bl ov00_02302668
_02309C4C:
	ldr r2, _0230A1CC ; =ov00_0231BBB8
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, _0230A1D0 ; =ov00_02328804
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r2, _0230A1D4 ; =ov00_0231BBC4
	mov r0, sl
	add r1, r6, #0x18
	bl ov00_02302638
	ldr r0, [sp, #0x1c]
	mov r1, #4
	str r1, [r0, #0x14]
	b _0230B46C
_02309C8C:
	cmp r0, #4
	bne _0230B46C
	add r1, sp, #0x74
	ldr r0, _0230A150 ; =ov00_0231BA4C
	str r1, [sp]
	str r0, [sp, #4]
	ldr r1, [r6, #4]
	add r3, sp, #0x78
	mov r0, sl
	add r2, r6, #8
	bl ov00_023028B4
	cmp r0, #0
	beq _02309D00
	cmp r0, #3
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, _0230A154 ; =0x00000D01
	ldr r2, _0230A1D8 ; =ov00_0231BBCC
	mov r0, sl
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #0
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02309D00:
	ldr r0, [sp, #0x1c]
	ldr r0, [r0, #8]
	cmp r0, #0
	beq _02309D60
	bl ov00_022F5594
	ldr r2, [r6, #0x148]
	ldr r1, _0230A144 ; =0x0000EA60
	sub r0, r0, r2
	cmp r0, r1
	bls _02309D60
	ldr r1, _0230A148 ; =0x00000D02
	mov r3, #1
	ldr r2, _0230A14C ; =ov00_0231BA34
	mov r0, sl
	str r3, [r6, #0x144]
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #0
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02309D60:
	ldr r0, [r6, #8]
	ldr r1, _0230A1D4 ; =ov00_0231BBC4
	bl strstr
	cmp r0, #0
	beq _0230B46C
	mov r0, #0
	str r0, [sp, #0x84]
	ldr r0, [sp, #0x1c]
	mov r1, #5
	str r1, [r0, #0x14]
	ldr r1, [r6, #8]
	mov r0, sl
	mov r2, #1
	bl ov00_0230B950
	cmp r0, #0
	beq _02309DB8
	add sp, sp, #0xcc
	mov r0, #1
	str r0, [r6, #0x144]
	add sp, sp, #0x400
	mov r0, #4
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02309DB8:
	ldr r0, [r6]
	cmp r0, #1
	bne _0230A214
	ldr r1, _0230A1DC ; =0x00000601
	mov r0, #0
	add r4, sp, #0x200
	str r0, [sp, #0x30]
	str r0, [sp, #0x8c]
	str r0, [sp, #0x90]
	str r0, [sp, #0x98]
	str r1, [sp, #0x94]
	add r4, r4, #0xc9
	add r5, sp, #0xc9
	add fp, sp, #0x84
_02309DF0:
	str r5, [sp]
	ldr r1, [r6, #8]
	mov r0, sl
	mov r2, fp
	mov r3, r4
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, _0230A1E0 ; =ov00_0231BBF8
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _02309E8C
	str r5, [sp]
	ldr r1, [r6, #8]
	mov r0, sl
	mov r2, fp
	mov r3, r4
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, _0230A1E4 ; =ov00_0231BC00
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _02309E80
	ldr r1, _0230A1E8 ; =ov00_0231BC08
	mov r0, r5
	bl strcmp
	cmp r0, #0
	movne r0, #0x600
	strne r0, [sp, #0x94]
_02309E80:
	mov r0, #1
	str r0, [sp, #0x30]
	b _0230A078
_02309E8C:
	ldr r1, _0230A1EC ; =ov00_0231BC0C
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230A048
	ldr r1, [sp, #0x90]
	ldr r0, [sp, #0x98]
	add r2, r1, #1
	mov r1, #0xac
	mul r1, r2, r1
	str r2, [sp, #0x90]
	bl ov00_022F5AFC
	movs r7, r0
	str r7, [sp, #0x98]
	bne _02309EE4
	ldr r1, _0230A1F0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_02309EE4:
	ldr r0, [sp, #0x90]
	mov r1, #0
	sub r2, r0, #1
	mov r0, #0xac
	mul r8, r2, r0
	add sb, r7, r8
	mov r0, sb
	mov r2, #0xac
	bl memset
	mov r0, r5
	bl sub_0208B360
	str r0, [r7, r8]
	mov r8, #0
_02309F18:
	ldr r7, [sp, #0x84]
	mov r0, sl
	str r5, [sp]
	ldr r1, [r6, #8]
	mov r2, fp
	mov r3, r4
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, _0230A1F4 ; =ov00_0231BC10
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _02309F6C
	add r0, sb, #4
	mov r1, r5
	mov r2, #0x1f
	bl ov00_0230B930
	b _0230A03C
_02309F6C:
	ldr r1, _0230A1F8 ; =ov00_0231BC18
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _02309F94
	add r0, sb, #0x23
	mov r1, r5
	mov r2, #0x15
	bl ov00_0230B930
	b _0230A03C
_02309F94:
	ldr r1, _0230A1FC ; =ov00_0231BC24
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _02309FBC
	add r0, sb, #0x38
	mov r1, r5
	mov r2, #0x1f
	bl ov00_0230B930
	b _0230A03C
_02309FBC:
	ldr r1, _0230A200 ; =ov00_0231BC30
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _02309FE4
	add r0, sb, #0x57
	mov r1, r5
	mov r2, #0x1f
	bl ov00_0230B930
	b _0230A03C
_02309FE4:
	ldr r1, _0230A204 ; =ov00_0231BC3C
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230A00C
	add r0, sb, #0x76
	mov r1, r5
	mov r2, #0x33
	bl ov00_0230B930
	b _0230A03C
_0230A00C:
	ldr r1, _0230A1EC ; =ov00_0231BC0C
	mov r0, r4
	bl strcmp
	cmp r0, #0
	beq _0230A034
	ldr r1, _0230A1E0 ; =ov00_0231BBF8
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230A03C
_0230A034:
	str r7, [sp, #0x84]
	mov r8, #1
_0230A03C:
	cmp r8, #0
	beq _02309F18
	b _0230A078
_0230A048:
	ldr r2, _0230A208 ; =ov00_0231BC44
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A078:
	ldr r0, [sp, #0x30]
	cmp r0, #0
	beq _02309DF0
	ldr r0, [sp, #0x1c]
	ldr r4, [sp, #0x94]
	ldr r3, [r0, #0xc]
	ldr r2, [r0, #0x10]
	str r3, [sp, #0x7c]
	str r2, [sp, #0x80]
	cmp r3, #0
	beq _0230A0B0
	add r1, sp, #0x8c
	mov r0, sl
	blx r3
_0230A0B0:
	cmp r4, #0x600
	ldreq r0, [sp, #0x94]
	cmpeq r0, #0x600
	bne _0230A130
	add r0, r6, #0x8f
	str r0, [sp]
	add r0, r6, #0xae
	str r0, [sp, #4]
	ldr r1, [r6, #0x134]
	mov r0, sl
	str r1, [sp, #8]
	ldr r3, [sp, #0x90]
	ldr r2, [r6, #0x138]
	add r1, r6, #0x28
	add r2, r3, r2
	str r2, [sp, #0xc]
	ldr r2, [sp, #0x1c]
	ldr r3, [r2, #8]
	add r2, r6, #0x47
	str r3, [sp, #0x10]
	ldr r3, [sp, #0x1c]
	ldr r4, [r3, #0xc]
	add r3, r6, #0x5c
	str r4, [sp, #0x14]
	ldr r4, [sp, #0x1c]
	ldr r4, [r4, #0x10]
	str r4, [sp, #0x18]
	bl ov00_0230915C
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A130:
	ldr r0, [sp, #0x98]
	bl ov00_022F5B14
	mov r0, #0
	str r0, [sp, #0x98]
	b _0230B460
	.align 2, 0
_0230A144: .word 0x0000EA60
_0230A148: .word 0x00000D02
_0230A14C: .word ov00_0231BA34
_0230A150: .word ov00_0231BA4C
_0230A154: .word 0x00000D01
_0230A158: .word ov00_0231BA50
_0230A15C: .word ov00_0231BA7C
_0230A160: .word ov00_0231BA88
_0230A164: .word ov00_0231BA94
_0230A168: .word ov00_0231BAA0
_0230A16C: .word ov00_0231BAB0
_0230A170: .word ov00_0231BABC
_0230A174: .word ov00_0231BAC4
_0230A178: .word ov00_0231BAD4
_0230A17C: .word ov00_0231BADC
_0230A180: .word ov00_0231BAE8
_0230A184: .word ov00_0231BAF4
_0230A188: .word ov00_0231BB00
_0230A18C: .word ov00_0231BB08
_0230A190: .word ov00_0231BB10
_0230A194: .word ov00_0231BB18
_0230A198: .word ov00_0231BB24
_0230A19C: .word ov00_0231BB30
_0230A1A0: .word ov00_0231BB3C
_0230A1A4: .word ov00_0231BB44
_0230A1A8: .word ov00_0231BB50
_0230A1AC: .word ov00_0231BB5C
_0230A1B0: .word ov00_0231BB64
_0230A1B4: .word ov00_0231BB70
_0230A1B8: .word ov00_0231BB80
_0230A1BC: .word ov00_0231BB8C
_0230A1C0: .word ov00_0231BB94
_0230A1C4: .word ov00_0231BB98
_0230A1C8: .word ov00_0231BBA8
_0230A1CC: .word ov00_0231BBB8
_0230A1D0: .word ov00_02328804
_0230A1D4: .word ov00_0231BBC4
_0230A1D8: .word ov00_0231BBCC
_0230A1DC: .word 0x00000601
_0230A1E0: .word ov00_0231BBF8
_0230A1E4: .word ov00_0231BC00
_0230A1E8: .word ov00_0231BC08
_0230A1EC: .word ov00_0231BC0C
_0230A1F0: .word ov00_0231B95C
_0230A1F4: .word ov00_0231BC10
_0230A1F8: .word ov00_0231BC18
_0230A1FC: .word ov00_0231BC24
_0230A200: .word ov00_0231BC30
_0230A204: .word ov00_0231BC3C
_0230A208: .word ov00_0231BC44
_0230A20C: .word ov00_0231BC6C
_0230A210: .word ov00_0231BC70
_0230A214:
	cmp r0, #2
	bne _0230A340
	ldr r0, [sp, #0x1c]
	ldr r1, [r0, #0xc]
	ldr r0, [r0, #0x10]
	str r1, [sp, #0x34]
	str r0, [sp, #0x38]
	cmp r1, #0
	beq _0230B460
	add r0, sp, #0xc9
	str r0, [sp]
	add r3, sp, #0x200
	ldr r1, [r6, #8]
	add r2, sp, #0x84
	add r3, r3, #0xc9
	mov r0, sl
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r0, sp, #0x200
	ldr r1, _0230A20C ; =ov00_0231BC6C
	add r0, r0, #0xc9
	bl strcmp
	cmp r0, #0
	beq _0230A2B0
	ldr r2, _0230A208 ; =ov00_0231BC44
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A2B0:
	mov r0, #0x3c
	bl ov00_022F5AE4
	movs r4, r0
	bne _0230A2DC
	ldr r1, _0230A1F0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A2DC:
	mov r0, #0
	str r0, [r4]
	add r0, r4, #4
	add r1, r6, #0x5c
	mov r2, #0x33
	bl ov00_0230B930
	ldrsb r0, [sp, #0xc9]
	ldr r1, [sp, #0x1c]
	add r2, sp, #0x34
	cmp r0, #0x30
	moveq r0, #0
	movne r0, #1
	str r0, [r4, #0x38]
	str r1, [sp]
	mov r1, #0
	str r1, [sp, #4]
	mov r0, sl
	mov r3, r4
	ldmia r2, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _0230B460
	add sp, sp, #0xcc
	add sp, sp, #0x400
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A340:
	cmp r0, #3
	bne _0230A654
	ldr r0, [sp, #0x1c]
	ldr r1, [r0, #0xc]
	ldr r0, [r0, #0x10]
	str r1, [sp, #0x3c]
	str r0, [sp, #0x40]
	cmp r1, #0
	beq _0230B460
	mov r0, #0x44
	bl ov00_022F5AE4
	movs r8, r0
	bne _0230A390
	ldr r1, _0230A1F0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A390:
	mov r2, #0
	add r0, r8, #4
	add r1, r6, #0x5c
	str r2, [r8]
	bl strcpy
	mov r1, #0
	str r1, [r8, #0x38]
	str r1, [r8, #0x3c]
	add r3, sp, #0x200
	add r0, sp, #0xc9
	str r1, [r8, #0x40]
	str r0, [sp]
	ldr r1, [r6, #8]
	add r2, sp, #0x84
	add r3, r3, #0xc9
	mov r0, sl
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r0, sp, #0x200
	ldr r1, _0230A210 ; =ov00_0231BC70
	add r0, r0, #0xc9
	bl strcmp
	cmp r0, #0
	beq _0230A42C
	ldr r2, _0230A208 ; =ov00_0231BC44
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A42C:
	add r4, sp, #0x200
	ldr fp, _0230A1F4 ; =ov00_0231BC10
	mov sb, #0
	add r4, r4, #0xc9
	add r7, sp, #0xc9
	add r5, sp, #0x84
_0230A444:
	str r7, [sp]
	ldr r1, [r6, #8]
	mov r0, sl
	mov r2, r5
	mov r3, r4
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	mov r0, r4
	mov r1, fp
	bl strcmp
	cmp r0, #0
	bne _0230A51C
	ldr r0, [r8, #0x3c]
	ldr r1, [r8, #0x38]
	add r1, r1, #1
	mov r1, r1, lsl #2
	bl ov00_022F5AFC
	cmp r0, #0
	bne _0230A4B8
	ldr r1, _0230A1F0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A4B8:
	str r0, [r8, #0x3c]
	mov r0, #0x1f
	bl ov00_022F5AE4
	cmp r0, #0
	bne _0230A4E8
	ldr r1, _0230A1F0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A4E8:
	ldr r3, [r8, #0x3c]
	ldr r2, [r8, #0x38]
	mov r1, r7
	str r0, [r3, r2, lsl #2]
	ldr r3, [r8, #0x3c]
	ldr r0, [r8, #0x38]
	mov r2, #0x1f
	ldr r0, [r3, r0, lsl #2]
	bl ov00_0230B930
	ldr r0, [r8, #0x38]
	add r0, r0, #1
	str r0, [r8, #0x38]
	b _0230A614
_0230A51C:
	ldr r1, _0230A1F8 ; =ov00_0231BC18
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230A5CC
	ldr r0, [r8, #0x38]
	cmp r0, #0
	ble _0230A614
	mov r1, r0, lsl #2
	ldr r0, [r8, #0x40]
	bl ov00_022F5AFC
	cmp r0, #0
	bne _0230A56C
	ldr r1, _0230A1F0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A56C:
	str r0, [r8, #0x40]
	mov r0, #0x15
	bl ov00_022F5AE4
	cmp r0, #0
	bne _0230A59C
	ldr r1, _0230A1F0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A59C:
	ldr r3, [r8, #0x40]
	ldr r2, [r8, #0x38]
	mov r1, r7
	add r2, r3, r2, lsl #2
	str r0, [r2, #-4]
	ldr r3, [r8, #0x40]
	ldr r0, [r8, #0x38]
	mov r2, #0x15
	add r0, r3, r0, lsl #2
	ldr r0, [r0, #-4]
	bl ov00_0230B930
	b _0230A614
_0230A5CC:
	ldr r1, _0230B494 ; =ov00_0231BC74
	mov r0, r4
	bl strcmp
	cmp r0, #0
	moveq sb, #1
	beq _0230A614
	ldr r2, _0230A208 ; =ov00_0231BC44
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A614:
	cmp sb, #0
	beq _0230A444
	ldr r1, [sp, #0x1c]
	add r2, sp, #0x3c
	str r1, [sp]
	mov r1, #3
	str r1, [sp, #4]
	mov r0, sl
	mov r3, r8
	ldmia r2, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _0230B460
	add sp, sp, #0xcc
	add sp, sp, #0x400
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A654:
	cmp r0, #4
	bne _0230A8EC
	ldr r0, [sp, #0x1c]
	ldr r1, [r0, #0xc]
	ldr r0, [r0, #0x10]
	str r1, [sp, #0x44]
	str r0, [sp, #0x48]
	cmp r1, #0
	beq _0230B460
	mov r0, #0x10
	bl ov00_022F5AE4
	movs fp, r0
	bne _0230A6A4
	ldr r1, _0230A1F0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A6A4:
	ldr r1, [r6, #0x13c]
	mov r0, #0
	stmia fp, {r0, r1}
	str r0, [fp, #8]
	add r4, sp, #0x200
	str r0, [sp, #0x20]
	str r0, [fp, #0xc]
	add r4, r4, #0xc9
	add r5, sp, #0xc9
_0230A6C8:
	str r5, [sp]
	ldr r1, [r6, #8]
	mov r0, sl
	add r2, sp, #0x84
	mov r3, r4
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, _0230B498 ; =ov00_0231BC7C
	mov r0, r4
	bl strcmp
	cmp r0, #0
	moveq r0, #1
	streq r0, [sp, #0x20]
	beq _0230A8A8
	ldr r1, _0230B49C ; =ov00_0231BC84
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230A878
	ldr r0, [fp, #8]
	add r2, r0, #1
	mov r0, #0x128
	mul r1, r2, r0
	str r2, [fp, #8]
	ldr r0, [fp, #0xc]
	bl ov00_022F5AFC
	str r0, [fp, #0xc]
	movs r8, r0
	bne _0230A764
	ldr r1, _0230A1F0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A764:
	ldr r0, [fp, #8]
	mov r1, #0
	sub r2, r0, #1
	mov r0, #0x128
	mul sb, r2, r0
	add r7, r8, sb
	mov r0, r7
	mov r2, #0x128
	bl memset
	mov r0, #1
	str r0, [r7, #0x24]
	mov r0, r5
	bl sub_0208B360
	str r0, [r8, sb]
	mov r8, #0
_0230A7A0:
	ldr sb, [sp, #0x84]
	mov r0, sl
	str r5, [sp]
	ldr r1, [r6, #8]
	add r2, sp, #0x84
	mov r3, r4
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, _0230B4A0 ; =ov00_0231BC88
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230A7F4
	add r0, r7, #0x28
	mov r1, r5
	mov r2, #0x100
	bl ov00_0230B930
	b _0230A818
_0230A7F4:
	ldr r1, _0230A1F4 ; =ov00_0231BC10
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230A818
	add r0, r7, #4
	mov r1, r5
	mov r2, #0x1f
	bl ov00_0230B930
_0230A818:
	ldr r1, _0230B4A4 ; =ov00_0231BC90
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230A83C
	mov r0, r5
	bl sub_0208B360
	str r0, [r7, #0x24]
	b _0230A86C
_0230A83C:
	ldr r1, _0230B49C ; =ov00_0231BC84
	mov r0, r4
	bl strcmp
	cmp r0, #0
	beq _0230A864
	ldr r1, _0230B498 ; =ov00_0231BC7C
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230A86C
_0230A864:
	str sb, [sp, #0x84]
	mov r8, #1
_0230A86C:
	cmp r8, #0
	beq _0230A7A0
	b _0230A8A8
_0230A878:
	ldr r2, _0230A208 ; =ov00_0231BC44
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A8A8:
	ldr r0, [sp, #0x20]
	cmp r0, #0
	beq _0230A6C8
	ldr r1, [sp, #0x1c]
	add r2, sp, #0x44
	str r1, [sp]
	mov r1, #4
	str r1, [sp, #4]
	mov r0, sl
	mov r3, fp
	ldmia r2, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _0230B460
	add sp, sp, #0xcc
	add sp, sp, #0x400
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A8EC:
	cmp r0, #5
	bne _0230AA64
	ldr r0, [sp, #0x1c]
	ldr r1, [r0, #0xc]
	ldr r0, [r0, #0x10]
	str r1, [sp, #0x4c]
	str r0, [sp, #0x50]
	cmp r1, #0
	beq _0230B460
	add r0, sp, #0xc9
	str r0, [sp]
	add r3, sp, #0x200
	ldr r1, [r6, #8]
	add r2, sp, #0x84
	add r3, r3, #0xc9
	mov r0, sl
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r0, sp, #0x200
	ldr r1, _0230B4A8 ; =ov00_0231BC9C
	add r0, r0, #0xc9
	bl strcmp
	cmp r0, #0
	beq _0230A988
	ldr r2, _0230A208 ; =ov00_0231BC44
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A988:
	add r0, sp, #0xc9
	bl sub_0208B360
	movs r4, r0
	beq _0230A9A8
	ldr r0, [sp, #0x2c]
	mov r5, #0
	str r4, [r0, #0x5b8]
	b _0230AA00
_0230A9A8:
	ldr r0, [r6, #8]
	ldr r1, _0230B4AC ; =ov00_0231BCA0
	add r2, sp, #0xc9
	mov r3, #0x200
	bl ov00_0230BA28
	cmp r0, #0
	bne _0230A9F4
	ldr r2, _0230A208 ; =ov00_0231BC44
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230A9F4:
	add r0, sp, #0xc9
	bl sub_0208B360
	mov r5, r0
_0230AA00:
	mov r0, #8
	bl ov00_022F5AE4
	movs r3, r0
	bne _0230AA2C
	ldr r1, _0230A1F0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230AA2C:
	stmia r3, {r4, r5}
	ldr r1, [sp, #0x1c]
	add r2, sp, #0x4c
	str r1, [sp]
	mov r1, #0
	str r1, [sp, #4]
	mov r0, sl
	ldmia r2, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _0230B460
	add sp, sp, #0xcc
	add sp, sp, #0x400
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230AA64:
	cmp r0, #6
	bne _0230ABE0
	ldr r0, [sp, #0x1c]
	ldr r1, [r0, #0xc]
	ldr r0, [r0, #0x10]
	str r1, [sp, #0x54]
	str r0, [sp, #0x58]
	cmp r1, #0
	beq _0230B460
	add r0, sp, #0xc9
	str r0, [sp]
	add r3, sp, #0x200
	ldr r1, [r6, #8]
	add r2, sp, #0x84
	add r3, r3, #0xc9
	mov r0, sl
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r0, sp, #0x200
	ldr r1, _0230B4B0 ; =ov00_0231BCA8
	add r0, r0, #0xc9
	bl strcmp
	cmp r0, #0
	beq _0230AB00
	ldr r2, _0230A208 ; =ov00_0231BC44
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230AB00:
	add r0, sp, #0xc9
	bl sub_0208B360
	movs r4, r0
	ldrne r0, [sp, #0x2c]
	ldr r1, _0230B4AC ; =ov00_0231BCA0
	strne r4, [r0, #0x5b8]
	ldr r0, [r6, #8]
	add r2, sp, #0xc9
	mov r3, #0x200
	bl ov00_0230BA28
	cmp r0, #0
	bne _0230AB70
	cmp r4, #0
	bne _0230AB68
	ldr r2, _0230A208 ; =ov00_0231BC44
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230AB68:
	mov r5, #0
	b _0230AB7C
_0230AB70:
	add r0, sp, #0xc9
	bl sub_0208B360
	mov r5, r0
_0230AB7C:
	mov r0, #8
	bl ov00_022F5AE4
	movs r3, r0
	bne _0230ABA8
	ldr r1, _0230A1F0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230ABA8:
	stmia r3, {r4, r5}
	ldr r1, [sp, #0x1c]
	add r2, sp, #0x54
	str r1, [sp]
	mov r1, #0
	str r1, [sp, #4]
	mov r0, sl
	ldmia r2, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _0230B460
	add sp, sp, #0xcc
	add sp, sp, #0x400
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230ABE0:
	cmp r0, #7
	bne _0230AF48
	ldr r0, [sp, #0x1c]
	ldr r1, [r0, #0xc]
	ldr r0, [r0, #0x10]
	str r1, [sp, #0x5c]
	str r0, [sp, #0x60]
	cmp r1, #0
	beq _0230B460
	mov r0, #0xc
	bl ov00_022F5AE4
	movs fp, r0
	bne _0230AC30
	ldr r1, _0230A1F0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230AC30:
	mov r1, #0
	str r1, [fp]
	str r1, [fp, #4]
	add r0, sp, #0xc9
	str r1, [fp, #8]
	str r0, [sp]
	add r3, sp, #0x200
	ldr r1, [r6, #8]
	add r2, sp, #0x84
	add r3, r3, #0xc9
	mov r0, sl
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r0, sp, #0x200
	ldr r1, _0230B4B4 ; =ov00_0231BCAC
	add r0, r0, #0xc9
	bl strcmp
	cmp r0, #0
	beq _0230ACB8
	ldr r2, _0230A208 ; =ov00_0231BC44
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230ACB8:
	mov r0, #0
	add r4, sp, #0x200
	str r0, [sp, #0x24]
	add r4, r4, #0xc9
	add r5, sp, #0xc9
_0230ACCC:
	str r5, [sp]
	ldr r1, [r6, #8]
	mov r0, sl
	add r2, sp, #0x84
	mov r3, r4
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, _0230B4B8 ; =ov00_0231BCB4
	mov r0, r4
	bl strcmp
	cmp r0, #0
	moveq r0, #1
	streq r0, [sp, #0x24]
	beq _0230AF04
	ldr r1, _0230B4BC ; =ov00_0231BCBC
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230AED4
	ldr r1, [fp, #4]
	ldr r0, [fp, #8]
	add r2, r1, #1
	mov r1, #0xac
	mul r1, r2, r1
	bl ov00_022F5AFC
	cmp r0, #0
	bne _0230AD60
	ldr r1, _0230A1F0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230AD60:
	str r0, [fp, #8]
	ldr r2, [fp, #4]
	mov r8, r0
	mov r0, #0xac
	mul sb, r2, r0
	add r7, r8, sb
	mov r1, #0
	mov r0, r7
	mov r2, #0xac
	bl memset
	ldr r1, [fp, #4]
	mov r0, r5
	add r1, r1, #1
	str r1, [fp, #4]
	bl sub_0208B360
	str r0, [r8, sb]
	mov r8, #0
_0230ADA4:
	ldr sb, [sp, #0x84]
	mov r0, sl
	str r5, [sp]
	ldr r1, [r6, #8]
	add r2, sp, #0x84
	mov r3, r4
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, _0230A1F4 ; =ov00_0231BC10
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230ADF8
	add r0, r7, #4
	mov r1, r5
	mov r2, #0x1f
	bl ov00_0230B930
	b _0230AEC8
_0230ADF8:
	ldr r1, _0230A1F8 ; =ov00_0231BC18
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230AE20
	add r0, r7, #0x23
	mov r1, r5
	mov r2, #0x15
	bl ov00_0230B930
	b _0230AEC8
_0230AE20:
	ldr r1, _0230B4C0 ; =ov00_0231BCC0
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230AE48
	add r0, r7, #0x38
	mov r1, r5
	mov r2, #0x1f
	bl ov00_0230B930
	b _0230AEC8
_0230AE48:
	ldr r1, _0230B4C4 ; =ov00_0231BCC8
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230AE70
	add r0, r7, #0x57
	mov r1, r5
	mov r2, #0x1f
	bl ov00_0230B930
	b _0230AEC8
_0230AE70:
	ldr r1, _0230A204 ; =ov00_0231BC3C
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230AE98
	add r0, r7, #0x76
	mov r1, r5
	mov r2, #0x33
	bl ov00_0230B930
	b _0230AEC8
_0230AE98:
	ldr r1, _0230B4BC ; =ov00_0231BCBC
	mov r0, r4
	bl strcmp
	cmp r0, #0
	beq _0230AEC0
	ldr r1, _0230B4B8 ; =ov00_0231BCB4
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230AEC8
_0230AEC0:
	str sb, [sp, #0x84]
	mov r8, #1
_0230AEC8:
	cmp r8, #0
	beq _0230ADA4
	b _0230AF04
_0230AED4:
	ldr r2, _0230A208 ; =ov00_0231BC44
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230AF04:
	ldr r0, [sp, #0x24]
	cmp r0, #0
	beq _0230ACCC
	ldr r1, [sp, #0x1c]
	add r2, sp, #0x5c
	str r1, [sp]
	mov r1, #8
	str r1, [sp, #4]
	mov r0, sl
	mov r3, fp
	ldmia r2, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _0230B460
	add sp, sp, #0xcc
	add sp, sp, #0x400
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230AF48:
	cmp r0, #9
	bne _0230B220
	ldr r0, [sp, #0x1c]
	ldr r1, [r0, #0xc]
	ldr r0, [r0, #0x10]
	str r1, [sp, #0x64]
	str r0, [sp, #0x68]
	cmp r1, #0
	beq _0230B460
	mov r0, #0xc
	bl ov00_022F5AE4
	movs fp, r0
	bne _0230AF98
	ldr r1, _0230A1F0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230AF98:
	mov r1, #0
	str r1, [fp]
	str r1, [fp, #4]
	add r0, sp, #0xc9
	str r1, [fp, #8]
	str r0, [sp]
	add r3, sp, #0x200
	ldr r1, [r6, #8]
	add r2, sp, #0x84
	add r3, r3, #0xc9
	mov r0, sl
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r0, sp, #0x200
	ldr r1, _0230B4C8 ; =ov00_0231BCD0
	add r0, r0, #0xc9
	bl strcmp
	cmp r0, #0
	beq _0230B020
	ldr r2, _0230A208 ; =ov00_0231BC44
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230B020:
	mov r0, #0
	add r4, sp, #0x200
	str r0, [sp, #0x28]
	add r4, r4, #0xc9
	add r5, sp, #0xc9
_0230B034:
	str r5, [sp]
	ldr r1, [r6, #8]
	mov r0, sl
	add r2, sp, #0x84
	mov r3, r4
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, _0230B4CC ; =ov00_0231BCDC
	mov r0, r4
	bl strcmp
	cmp r0, #0
	moveq r0, #1
	streq r0, [sp, #0x28]
	beq _0230B1DC
	ldr r1, _0230B4BC ; =ov00_0231BCBC
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230B1AC
	ldr r1, [fp, #4]
	ldr r0, [fp, #8]
	add r2, r1, #1
	mov r1, #0x1c
	mul r1, r2, r1
	bl ov00_022F5AFC
	cmp r0, #0
	bne _0230B0C8
	ldr r1, _0230B4D0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230B0C8:
	str r0, [fp, #8]
	ldr r3, [fp, #4]
	mov r1, #0x1c
	mla r7, r3, r1, r0
	mov r2, #7
	mov r1, r7
_0230B0E0:
	mov r0, #0
	strb r0, [r1]
	strb r0, [r1, #1]
	strb r0, [r1, #2]
	strb r0, [r1, #3]
	add r1, r1, #4
	subs r2, r2, #1
	bne _0230B0E0
	ldr r1, [fp, #4]
	mov r0, r5
	add r1, r1, #1
	str r1, [fp, #4]
	bl sub_0208B360
	str r0, [r7]
	mov r8, #0
_0230B11C:
	ldr sb, [sp, #0x84]
	mov r0, sl
	str r5, [sp]
	ldr r1, [r6, #8]
	add r2, sp, #0x84
	mov r3, r4
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, _0230B4D4 ; =ov00_0231BC18
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230B170
	add r0, r7, #4
	mov r1, r5
	mov r2, #0x15
	bl ov00_0230B930
	b _0230B1A0
_0230B170:
	ldr r1, _0230B4BC ; =ov00_0231BCBC
	mov r0, r4
	bl strcmp
	cmp r0, #0
	beq _0230B198
	ldr r1, _0230B4CC ; =ov00_0231BCDC
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230B1A0
_0230B198:
	str sb, [sp, #0x84]
	mov r8, #1
_0230B1A0:
	cmp r8, #0
	beq _0230B11C
	b _0230B1DC
_0230B1AC:
	ldr r2, _0230B4D8 ; =ov00_0231BC44
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230B1DC:
	ldr r0, [sp, #0x28]
	cmp r0, #0
	beq _0230B034
	ldr r1, [sp, #0x1c]
	add r2, sp, #0x64
	str r1, [sp]
	mov r1, #0xd
	str r1, [sp, #4]
	mov r0, sl
	mov r3, fp
	ldmia r2, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	beq _0230B460
	add sp, sp, #0xcc
	add sp, sp, #0x400
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230B220:
	cmp r0, #8
	bne _0230B460
	ldr r0, [sp, #0x1c]
	ldr r1, [r0, #0xc]
	ldr r0, [r0, #0x10]
	str r1, [sp, #0x6c]
	str r0, [sp, #0x70]
	cmp r1, #0
	beq _0230B460
	mov r0, #0xc
	mov r7, #0
	bl ov00_022F5AE4
	movs r8, r0
	bne _0230B274
	ldr r1, _0230B4D0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230B274:
	mov r1, r7
	str r1, [r8]
	str r1, [r8, #4]
	add r0, sp, #0xc9
	str r1, [r8, #8]
	str r0, [sp]
	add r3, sp, #0x200
	ldr r1, [r6, #8]
	add r2, sp, #0x84
	add r3, r3, #0xc9
	mov r0, sl
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	add r0, sp, #0x200
	ldr r1, _0230B4DC ; =ov00_0231BCE4
	add r0, r0, #0xc9
	bl strcmp
	cmp r0, #0
	beq _0230B2FC
	ldr r2, _0230B4D8 ; =ov00_0231BC44
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230B2FC:
	add r0, sp, #0xc9
	bl sub_0208B360
	str r0, [r8, #4]
	mov r0, r0, lsl #2
	bl ov00_022F5AE4
	str r0, [r8, #8]
	cmp r0, #0
	bne _0230B338
	ldr r1, _0230B4D0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230B338:
	add r4, sp, #0x200
	mov sb, r7
	add r4, r4, #0xc9
	add r5, sp, #0xc9
	add fp, sp, #0x84
_0230B34C:
	str r5, [sp]
	ldr r1, [r6, #8]
	mov r0, sl
	mov r2, fp
	mov r3, r4
	bl ov00_0230BB58
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	ldr r1, _0230B4E0 ; =ov00_0231BC10
	mov r0, r4
	bl strcmp
	cmp r0, #0
	bne _0230B3D8
	mov r0, #0x15
	bl ov00_022F5AE4
	ldr r1, [r8, #8]
	str r0, [r1, r7, lsl #2]
	ldr r0, [r8, #8]
	ldr r0, [r0, r7, lsl #2]
	cmp r0, #0
	bne _0230B3C4
	ldr r1, _0230B4D0 ; =ov00_0231B95C
	mov r0, sl
	bl ov00_0230BCCC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230B3C4:
	mov r1, r5
	mov r2, #0x15
	bl ov00_0230B930
	add r7, r7, #1
	b _0230B424
_0230B3D8:
	ldr r1, _0230B4E4 ; =ov00_0231BCE8
	mov r0, r4
	bl strcmp
	cmp r0, #0
	streq r7, [r8, #4]
	moveq sb, #1
	beq _0230B424
	ldr r2, _0230B4D8 ; =ov00_0231BC44
	mov r0, sl
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, sl
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0xcc
	add sp, sp, #0x400
	mov r0, #3
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230B424:
	cmp sb, #0
	beq _0230B34C
	ldr r1, [sp, #0x1c]
	add r2, sp, #0x6c
	str r1, [sp]
	mov r1, #9
	str r1, [sp, #4]
	mov r0, sl
	mov r3, r8
	ldmia r2, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	addne sp, sp, #0xcc
	addne sp, sp, #0x400
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
_0230B460:
	mov r0, #1
	str r0, [r6, #0x144]
	mov r4, #0
_0230B46C:
	cmp r4, #0
	beq _0230B47C
	mov r0, #0xa
	bl ov00_022F55EC
_0230B47C:
	cmp r4, #0
	bne _02309440
	mov r0, #0
	add sp, sp, #0xcc
	add sp, sp, #0x400
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_0230B494: .word ov00_0231BC74
_0230B498: .word ov00_0231BC7C
_0230B49C: .word ov00_0231BC84
_0230B4A0: .word ov00_0231BC88
_0230B4A4: .word ov00_0231BC90
_0230B4A8: .word ov00_0231BC9C
_0230B4AC: .word ov00_0231BCA0
_0230B4B0: .word ov00_0231BCA8
_0230B4B4: .word ov00_0231BCAC
_0230B4B8: .word ov00_0231BCB4
_0230B4BC: .word ov00_0231BCBC
_0230B4C0: .word ov00_0231BCC0
_0230B4C4: .word ov00_0231BCC8
_0230B4C8: .word ov00_0231BCD0
_0230B4CC: .word ov00_0231BCDC
_0230B4D0: .word ov00_0231B95C
_0230B4D4: .word ov00_0231BC18
_0230B4D8: .word ov00_0231BC44
_0230B4DC: .word ov00_0231BCE4
_0230B4E0: .word ov00_0231BC10
_0230B4E4: .word ov00_0231BCE8
	arm_func_end ov00_023093B4

	arm_func_start ov00_0230B4E8
ov00_0230B4E8: ; 0x0230B4E8
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r7, r0
	ldr r6, [r7]
	mov r5, #0
	ldr r0, [r6, #0x238]
	cmp r0, #0
	ble _0230B5F4
	mov r0, r0, lsl #2
	bl ov00_022F5AE4
	movs r4, r0
	bne _0230B528
	ldr r1, _0230B5FC ; =ov00_0231B95C
	mov r0, r7
	bl ov00_0230BCCC
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
_0230B528:
	ldr r2, [r6, #0x5c4]
	cmp r2, #0
	beq _0230B57C
	mov r1, #1
_0230B538:
	ldr r0, [r2]
	cmp r0, #3
	bne _0230B570
	ldr r0, [r2, #0x14]
	cmp r0, #5
	beq _0230B570
	ldr r0, [r2, #4]
	ldr r0, [r0, #0x140]
	cmp r0, #0
	bne _0230B570
	str r2, [r4, r5, lsl #2]
	ldr r0, [r2, #4]
	add r5, r5, #1
	str r1, [r0, #0x140]
_0230B570:
	ldr r2, [r2, #0x20]
	cmp r2, #0
	bne _0230B538
_0230B57C:
	cmp r5, #0
	mov r6, #0
	ble _0230B5AC
_0230B588:
	ldr r1, [r4, r6, lsl #2]
	mov r0, r7
	bl ov00_023093B4
	cmp r0, #0
	ldrne r1, [r4, r6, lsl #2]
	add r6, r6, #1
	strne r0, [r1, #0x1c]
	cmp r6, r5
	blt _0230B588
_0230B5AC:
	cmp r5, #0
	mov r6, #0
	ble _0230B5EC
	mov r8, r6
_0230B5BC:
	ldr r0, [r4, r6, lsl #2]
	ldr r0, [r0, #4]
	str r8, [r0, #0x140]
	ldr r0, [r0, #0x144]
	cmp r0, #0
	beq _0230B5E0
	ldr r1, [r4, r6, lsl #2]
	mov r0, r7
	bl ov00_0230716C
_0230B5E0:
	add r6, r6, #1
	cmp r6, r5
	blt _0230B5BC
_0230B5EC:
	mov r0, r4
	bl ov00_022F5B14
_0230B5F4:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_0230B5FC: .word ov00_0231B95C
	arm_func_end ov00_0230B4E8

	arm_func_start ov00_0230B600
ov00_0230B600: ; 0x0230B600
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #0x20
	ldr ip, [sp, #0x30]
	mov r5, r2
	mov r6, r0
	cmp ip, #0
	ldreq r0, _0230B69C ; =ov00_0231BCF0
	mov lr, r1
	mov r4, r3
	streq r0, [sp, #0x30]
	mov r0, r6
	mov r1, r5
	mov r3, lr
	mov r2, #0xc9
	bl ov00_0230834C
	cmp r0, #0
	addne sp, sp, #0x20
	ldmneia sp!, {r4, r5, r6, pc}
	ldr r1, _0230B6A0 ; =ov00_0231BCF4
	add r0, sp, #0
	mov r3, r4
	mov r2, #1
	bl sub_020790DC
	add r2, sp, #0
	mov r0, r6
	mov r1, r5
	bl ov00_02302884
	cmp r0, #0
	addne sp, sp, #0x20
	ldmneia sp!, {r4, r5, r6, pc}
	ldr r2, [sp, #0x30]
	mov r0, r6
	mov r1, r5
	mvn r3, #0
	bl ov00_023083A8
	cmp r0, #0
	moveq r0, #0
	add sp, sp, #0x20
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_0230B69C: .word ov00_0231BCF0
_0230B6A0: .word ov00_0231BCF4
	arm_func_end ov00_0230B600

	arm_func_start ov00_0230B6A4
ov00_0230B6A4: ; 0x0230B6A4
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #0x50
	mov r4, r1
	mov r5, r0
	mov r0, r3
	ldr r1, _0230B720 ; =ov00_0231BD0C
	add r2, sp, #0x10
	mov r3, #0x40
	bl ov00_0230BA28
	cmp r0, #0
	addeq sp, sp, #0x50
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r1, _0230B724 ; =ov00_0231BD14
	add ip, sp, #0xc
	add r0, sp, #0x10
	add r2, sp, #4
	add r3, sp, #8
	str ip, [sp]
	bl sub_02085338
	cmp r0, #3
	addne sp, sp, #0x50
	ldmneia sp!, {r3, r4, r5, pc}
	mov ip, #0
	add r1, sp, #4
	mov r0, r5
	mov r2, r4
	mov r3, #2
	str ip, [sp]
	bl ov00_0230B600
	add sp, sp, #0x50
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_0230B720: .word ov00_0231BD0C
_0230B724: .word ov00_0231BD14
	arm_func_end ov00_0230B6A4

	arm_func_start ov00_0230B728
ov00_0230B728: ; 0x0230B728
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #0x10
	mov r4, r2
	mov r5, r1
	mov r1, r4
	mov r2, #1
	mov r6, r0
	bl ov00_0230B950
	cmp r0, #0
	addne sp, sp, #0x10
	movne r0, #4
	ldmneia sp!, {r4, r5, r6, pc}
	ldr r1, _0230B820 ; =ov00_0231BD20
	mov r0, r4
	mov r2, #4
	bl strncmp
	cmp r0, #0
	beq _0230B79C
	ldr r2, _0230B824 ; =ov00_0231BD28
	mov r0, r6
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x10
	mov r0, #3
	ldmia sp!, {r4, r5, r6, pc}
_0230B79C:
	ldr r1, [r5, #0xc]
	ldr r0, [r5, #0x10]
	str r1, [sp, #8]
	str r0, [sp, #0xc]
	cmp r1, #0
	beq _0230B808
	mov r0, #4
	bl ov00_022F5AE4
	movs r3, r0
	bne _0230B7DC
	ldr r1, _0230B828 ; =ov00_0231BD58
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x10
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
_0230B7DC:
	mov r2, #0
	str r2, [r3]
	str r5, [sp]
	add r1, sp, #8
	str r2, [sp, #4]
	mov r0, r6
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	addne sp, sp, #0x10
	ldmneia sp!, {r4, r5, r6, pc}
_0230B808:
	mov r0, r6
	mov r1, r5
	bl ov00_0230716C
	mov r0, #0
	add sp, sp, #0x10
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_0230B820: .word ov00_0231BD20
_0230B824: .word ov00_0231BD28
_0230B828: .word ov00_0231BD58
	arm_func_end ov00_0230B728

	arm_func_start ov00_0230B82C
ov00_0230B82C: ; 0x0230B82C
	stmdb sp!, {r4, r5, r6, lr}
	sub sp, sp, #0x10
	mov r4, r2
	mov r5, r1
	mov r1, r4
	mov r2, #1
	mov r6, r0
	bl ov00_0230B950
	cmp r0, #0
	addne sp, sp, #0x10
	movne r0, #4
	ldmneia sp!, {r4, r5, r6, pc}
	ldr r1, _0230B924 ; =ov00_0231BD68
	mov r0, r4
	mov r2, #4
	bl strncmp
	cmp r0, #0
	beq _0230B8A0
	ldr r2, _0230B928 ; =ov00_0231BD28
	mov r0, r6
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r6
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #0x10
	mov r0, #3
	ldmia sp!, {r4, r5, r6, pc}
_0230B8A0:
	ldr r1, [r5, #0xc]
	ldr r0, [r5, #0x10]
	str r1, [sp, #8]
	str r0, [sp, #0xc]
	cmp r1, #0
	beq _0230B90C
	mov r0, #4
	bl ov00_022F5AE4
	movs r3, r0
	bne _0230B8E0
	ldr r1, _0230B92C ; =ov00_0231BD58
	mov r0, r6
	bl ov00_0230BCCC
	add sp, sp, #0x10
	mov r0, #1
	ldmia sp!, {r4, r5, r6, pc}
_0230B8E0:
	mov r2, #0
	str r2, [r3]
	str r5, [sp]
	add r1, sp, #8
	str r2, [sp, #4]
	mov r0, r6
	ldmia r1, {r1, r2}
	bl ov00_02302E74
	cmp r0, #0
	addne sp, sp, #0x10
	ldmneia sp!, {r4, r5, r6, pc}
_0230B90C:
	mov r0, r6
	mov r1, r5
	bl ov00_0230716C
	mov r0, #0
	add sp, sp, #0x10
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_0230B924: .word ov00_0231BD68
_0230B928: .word ov00_0231BD28
_0230B92C: .word ov00_0231BD58
	arm_func_end ov00_0230B82C

	arm_func_start ov00_0230B930
ov00_0230B930: ; 0x0230B930
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	mov r4, r2
	bl strncpy
	add r0, r5, r4
	mov r1, #0
	strb r1, [r0, #-1]
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_0230B930

	arm_func_start ov00_0230B950
ov00_0230B950: ; 0x0230B950
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	sub sp, sp, #0x10
	mov r6, r1
	mov r7, r0
	mov r5, r2
	ldr r1, _0230BA18 ; =ov00_0231BD70
	mov r0, r6
	mov r2, #7
	ldr r4, [r7]
	bl strncmp
	cmp r0, #0
	bne _0230BA0C
	ldr r1, _0230BA1C ; =ov00_0231BD78
	add r2, sp, #0
	mov r0, r6
	mov r3, #0x10
	bl ov00_0230BA28
	cmp r0, #0
	beq _0230B9A8
	add r0, sp, #0
	bl sub_0208B360
	str r0, [r4, #0x5b8]
_0230B9A8:
	ldr r1, _0230BA20 ; =ov00_0231BD80
	mov r0, r6
	mov r2, r4
	mov r3, #0x100
	bl ov00_0230BA28
	cmp r0, #0
	moveq r0, #0
	streqb r0, [r4]
	cmp r5, #0
	beq _0230BA00
	ldr r1, _0230BA24 ; =ov00_0231BD8C
	mov r0, r6
	bl strstr
	cmp r0, #0
	movne r0, #1
	moveq r0, #0
	cmp r0, #0
	movne r2, #1
	moveq r2, #0
	mov r0, r7
	mov r1, #4
	bl ov00_02302DEC
_0230BA00:
	add sp, sp, #0x10
	mov r0, #1
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_0230BA0C:
	mov r0, #0
	add sp, sp, #0x10
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_0230BA18: .word ov00_0231BD70
_0230BA1C: .word ov00_0231BD78
_0230BA20: .word ov00_0231BD80
_0230BA24: .word ov00_0231BD8C
	arm_func_end ov00_0230B950

	arm_func_start ov00_0230BA28
ov00_0230BA28: ; 0x0230BA28
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	mov r8, r1
	ldrsb r6, [r8]
	mov r4, r2
	mov r7, r3
	bl strstr
	movs r5, r0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	mov r0, r8
	bl strlen
	add r1, r5, r0
	mov r3, #0
	sub r0, r7, #1
	b _0230BA6C
_0230BA64:
	strb r2, [r4, r3]
	add r3, r3, #1
_0230BA6C:
	cmp r3, r0
	bge _0230BA84
	ldrsb r2, [r1, r3]
	cmp r2, #0
	cmpne r2, r6
	bne _0230BA64
_0230BA84:
	mov r0, #0
	strb r0, [r4, r3]
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	arm_func_end ov00_0230BA28

	arm_func_start ov00_0230BA94
ov00_0230BA94: ; 0x0230BA94
	stmdb sp!, {r3, r4, r5, lr}
	sub sp, sp, #8
	mov ip, #0
	mov r4, r2
	mov r5, r0
	mov r0, r1
	add r2, sp, #4
	add r3, sp, #0
	mov r1, ip
	str ip, [sp, #4]
	str ip, [sp]
	bl ov00_022F51A4
	mvn r1, #0
	cmp r0, r1
	bne _0230BAFC
	ldr r2, _0230BB54 ; =ov00_0231BD94
	mov r0, r5
	mov r1, #5
	bl ov00_0230BCA8
	mov r0, r5
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	add sp, sp, #8
	mov r0, #3
	ldmia sp!, {r3, r4, r5, pc}
_0230BAFC:
	cmp r0, #0
	ble _0230BB44
	ldr r0, [sp]
	cmp r0, #0
	beq _0230BB24
	mov r0, #4
	str r0, [r4]
	add sp, sp, #8
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_0230BB24:
	ldr r0, [sp, #4]
	cmp r0, #0
	beq _0230BB44
	mov r0, #3
	str r0, [r4]
	add sp, sp, #8
	mov r0, #0
	ldmia sp!, {r3, r4, r5, pc}
_0230BB44:
	mov r0, #0
	str r0, [r4]
	add sp, sp, #8
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_0230BB54: .word ov00_0231BD94
	arm_func_end ov00_0230BA94

	arm_func_start ov00_0230BB58
ov00_0230BB58: ; 0x0230BB58
	stmdb sp!, {r4, r5, r6, lr}
	ldr ip, [r2]
	mov r4, r0
	ldrsb lr, [r1, ip]
	add r6, r1, ip
	ldr ip, [sp, #0x10]
	cmp lr, #0x5c
	beq _0230BB9C
	ldr r2, _0230BCA0 ; =ov00_0231BDCC
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r4
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	mov r0, #3
	ldmia sp!, {r4, r5, r6, pc}
_0230BB9C:
	ldrsb lr, [r6, #1]
	add r1, r6, #2
	mov r5, #0
	cmp lr, #0x5c
	beq _0230BC28
	ldr r0, _0230BCA4 ; =0x000001FF
_0230BBB4:
	cmp lr, #0
	bne _0230BBE4
	ldr r2, _0230BCA0 ; =ov00_0231BDCC
	mov r0, r4
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r4
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	mov r0, #3
	ldmia sp!, {r4, r5, r6, pc}
_0230BBE4:
	cmp r5, r0
	bne _0230BC14
	ldr r2, _0230BCA0 ; =ov00_0231BDCC
	mov r0, r4
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r4
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	mov r0, #3
	ldmia sp!, {r4, r5, r6, pc}
_0230BC14:
	strb lr, [r3], #1
	ldrsb lr, [r1], #1
	add r5, r5, #1
	cmp lr, #0x5c
	bne _0230BBB4
_0230BC28:
	mov r5, #0
	strb r5, [r3]
	ldr r0, _0230BCA4 ; =0x000001FF
	b _0230BC70
_0230BC38:
	cmp r5, r0
	bne _0230BC68
	ldr r2, _0230BCA0 ; =ov00_0231BDCC
	mov r0, r4
	mov r1, #1
	bl ov00_0230BCA8
	mov r0, r4
	mov r1, #3
	mov r2, #1
	bl ov00_02302DEC
	mov r0, #3
	ldmia sp!, {r4, r5, r6, pc}
_0230BC68:
	strb r3, [ip], #1
	add r5, r5, #1
_0230BC70:
	ldrsb r3, [r1], #1
	cmp r3, #0x5c
	cmpne r3, #0
	bne _0230BC38
	mov r0, #0
	strb r0, [ip]
	sub r1, r1, r6
	ldr r3, [r2]
	sub r1, r1, #1
	add r1, r3, r1
	str r1, [r2]
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_0230BCA0: .word ov00_0231BDCC
_0230BCA4: .word 0x000001FF
	arm_func_end ov00_0230BB58

	arm_func_start ov00_0230BCA8
ov00_0230BCA8: ; 0x0230BCA8
	stmdb sp!, {r3, r4, r5, lr}
	ldr r4, [r0]
	mov r5, r1
	mov r1, r2
	mov r0, r4
	mov r2, #0x100
	bl ov00_0230B930
	str r5, [r4, #0x5b8]
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_0230BCA8

	arm_func_start ov00_0230BCCC
ov00_0230BCCC: ; 0x0230BCCC
	ldr ip, _0230BCDC ; =ov00_0230B930
	ldr r0, [r0]
	mov r2, #0x100
	bx ip
	.align 2, 0
_0230BCDC: .word ov00_0230B930
	arm_func_end ov00_0230BCCC

	arm_func_start PasswordEncryptString
PasswordEncryptString: ; 0x0230BCE0
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	sub sp, sp, #0x20
	mov sl, r0
	mov sb, r1
	bl strlen
	mov r7, r0
	ldr r0, _0230BD64 ; =0x79707367
	bl srand
	cmp r7, #0
	mov r6, #0
	bls _0230BD40
	add r8, sp, #0
	mov r5, r6
	mov r4, #0xff
_0230BD18:
	mov r0, r5
	mov r1, r4
	bl RandRangeOverlay0
	ldrsb r1, [sl, r6]
	mov r0, r0, lsl #0x18
	add r6, r6, #1
	eor r0, r1, r0, asr #24
	cmp r6, r7
	strb r0, [r8], #1
	blo _0230BD18
_0230BD40:
	add r0, sp, #0
	mov r4, #0
	mov r1, sb
	mov r2, r7
	mov r3, #1
	strb r4, [r0, r6]
	bl ov00_022F598C
	add sp, sp, #0x20
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_0230BD64: .word 0x79707367
	arm_func_end PasswordEncryptString

	arm_func_start ov00_0230BD68
ov00_0230BD68: ; 0x0230BD68
	stmdb sp!, {r4, r5, r6, r7, lr}
	sub sp, sp, #0x14
	movs r7, r0
	ldreq r0, _0230BDD8 ; =ov00_023289D8
	mov r6, r1
	ldreq r7, [r0]
	mov r0, r6
	mov r5, r2
	mov r4, r3
	bl ov00_022F5514
	mov r3, #0
	mov r2, #1
	str r0, [sp]
	add r0, sp, #0
	mov r1, r4
	str r5, [sp, #4]
	str r3, [sp, #0xc]
	str r2, [sp, #8]
	bl ov00_0230C1D0
	ldr r0, [r7]
	add r1, sp, #0
	bl ov00_022F4CD0
	mov r0, r7
	mov r1, r6
	bl ov00_0230C26C
	bl ov00_0230C24C
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, pc}
	.align 2, 0
_0230BDD8: .word ov00_023289D8
	arm_func_end ov00_0230BD68

	arm_func_start ov00_0230BDDC
ov00_0230BDDC: ; 0x0230BDDC
	stmdb sp!, {r4, lr}
	mov r4, r2
	bl ov00_0230C26C
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	mov r2, #0
	mov r1, r4
	str r2, [r0, #8]
	bl ov00_0230C1D0
	ldmia sp!, {r4, pc}
	arm_func_end ov00_0230BDDC

	arm_func_start ov00_0230BE08
ov00_0230BE08: ; 0x0230BE08
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r0
	mov r6, r1
	mov r5, r2
	bl ov00_0230C26C
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, [r4, #4]
	cmp r1, #0
	bne _0230BE58
	bl ov00_0230C24C
	ldr r1, [r5]
	ldr r0, [r0]
	add r0, r1, r0
	bl ov00_0230C16C
	mov r1, r0
	mov r0, r4
	bl ov00_0230C1D0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_0230BE58:
	cmp r1, #1
	bne _0230BE88
	bl ov00_0230C24C
	mov r3, r0
	ldmia r5, {r0, r1}
	ldmia r3, {r2, r3}
	bl _dadd
	bl ov00_0230C184
	mov r1, r0
	mov r0, r4
	bl ov00_0230C1D0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_0230BE88:
	mov r0, r7
	mov r1, r6
	mov r2, r5
	bl ov00_0230C024
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_0230BE08

	arm_func_start ov00_0230BE9C
ov00_0230BE9C: ; 0x0230BE9C
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r2
	bl ov00_0230C26C
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r1, [r4, #4]
	cmp r1, #0
	bne _0230BEE4
	bl ov00_0230C24C
	ldr r1, [r0]
	ldr r0, [r5]
	sub r0, r1, r0
	bl ov00_0230C16C
	mov r1, r0
	mov r0, r4
	bl ov00_0230C1D0
	ldmia sp!, {r3, r4, r5, pc}
_0230BEE4:
	cmp r1, #1
	bne _0230BF18
	bl ov00_0230C24C
	ldr ip, [r0]
	ldr r1, [r0, #4]
	mov r0, ip
	ldmia r5, {r2, r3}
	bl _dsub
	bl ov00_0230C184
	mov r1, r0
	mov r0, r4
	bl ov00_0230C1D0
	ldmia sp!, {r3, r4, r5, pc}
_0230BF18:
	bl ov00_0230C24C
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_0230BE9C

	arm_func_start ov00_0230BF20
ov00_0230BF20: ; 0x0230BF20
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r2
	bl ov00_0230C26C
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r1, [r4, #4]
	cmp r1, #0
	bne _0230BF68
	bl ov00_0230C24C
	ldr r1, [r5]
	ldr r0, [r0]
	mul r0, r1, r0
	bl ov00_0230C16C
	mov r1, r0
	mov r0, r4
	bl ov00_0230C1D0
	ldmia sp!, {r3, r4, r5, pc}
_0230BF68:
	cmp r1, #1
	bne _0230BF98
	bl ov00_0230C24C
	mov r3, r0
	ldmia r5, {r0, r1}
	ldmia r3, {r2, r3}
	bl _dmul
	bl ov00_0230C184
	mov r1, r0
	mov r0, r4
	bl ov00_0230C1D0
	ldmia sp!, {r3, r4, r5, pc}
_0230BF98:
	bl ov00_0230C24C
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_0230BF20

	arm_func_start ov00_0230BFA0
ov00_0230BFA0: ; 0x0230BFA0
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r2
	bl ov00_0230C26C
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r1, [r4, #4]
	cmp r1, #0
	bne _0230BFE8
	bl ov00_0230C24C
	ldr r0, [r0]
	ldr r1, [r5]
	bl _s32_div_f
	bl ov00_0230C16C
	mov r1, r0
	mov r0, r4
	bl ov00_0230C1D0
	ldmia sp!, {r3, r4, r5, pc}
_0230BFE8:
	cmp r1, #1
	bne _0230C01C
	bl ov00_0230C24C
	ldr ip, [r0]
	ldr r1, [r0, #4]
	mov r0, ip
	ldmia r5, {r2, r3}
	bl _ddiv
	bl ov00_0230C184
	mov r1, r0
	mov r0, r4
	bl ov00_0230C1D0
	ldmia sp!, {r3, r4, r5, pc}
_0230C01C:
	bl ov00_0230C24C
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_0230BFA0

	arm_func_start ov00_0230C024
ov00_0230C024: ; 0x0230C024
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r2
	bl ov00_0230C26C
	movs r6, r0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	bl ov00_0230C24C
	mov r5, r0
	bl strlen
	mov r4, r0
	mov r0, r7
	bl strlen
	add r0, r4, r0
	add r0, r0, #1
	bl ov00_022F5AE4
	mov r4, r0
	mov r1, r5
	bl strcpy
	mov r0, r4
	mov r1, r7
	bl strcat
	mov r0, r6
	mov r1, r4
	bl ov00_0230C1D0
	mov r0, r4
	bl ov00_022F5B14
	mov r0, r6
	bl ov00_0230C24C
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_0230C024

	arm_func_start ov00_0230C098
ov00_0230C098: ; 0x0230C098
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	mov r7, r2
	bl ov00_0230C26C
	movs r4, r0
	moveq r0, #0
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	ldr r1, [r4, #4]
	cmp r1, #0
	bne _0230C0F0
	bl ov00_0230C24C
	ldr r1, [r4, #8]
	add r1, r1, #1
	str r1, [r4, #8]
	ldr r2, [r7]
	ldr r0, [r0]
	mla r0, r1, r0, r2
	bl _s32_div_f
	bl ov00_0230C16C
	mov r1, r0
	mov r0, r4
	bl ov00_0230C1D0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_0230C0F0:
	cmp r1, #1
	bne _0230C164
	bl ov00_0230C24C
	ldr r1, [r4, #8]
	mov r5, r0
	add r6, r1, #1
	mov r0, r6
	str r6, [r4, #8]
	bl _dflt
	ldmia r5, {r2, r3}
	bl _dmul
	mov r2, r0
	mov r3, r1
	ldmia r7, {r0, r1}
	bl _dadd
	mov r5, r0
	mov r0, r6
	mov r6, r1
	bl _dflt
	mov r2, r0
	mov r3, r1
	mov r0, r5
	mov r1, r6
	bl _ddiv
	bl ov00_0230C184
	mov r1, r0
	mov r0, r4
	bl ov00_0230C1D0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
_0230C164:
	bl ov00_0230C24C
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	arm_func_end ov00_0230C098

	arm_func_start ov00_0230C16C
ov00_0230C16C: ; 0x0230C16C
	ldr r1, _0230C17C ; =ov00_023289D8
	str r0, [r1, #4]
	ldr r0, _0230C180 ; =ov00_023289DC
	bx lr
	.align 2, 0
_0230C17C: .word ov00_023289D8
_0230C180: .word ov00_023289DC
	arm_func_end ov00_0230C16C

	arm_func_start ov00_0230C184
ov00_0230C184: ; 0x0230C184
	ldr r2, _0230C198 ; =ov00_023289D8
	str r0, [r2, #8]
	ldr r0, _0230C19C ; =ov00_023289E0
	str r1, [r2, #0xc]
	bx lr
	.align 2, 0
_0230C198: .word ov00_023289D8
_0230C19C: .word ov00_023289E0
	arm_func_end ov00_0230C184

	arm_func_start ov00_0230C1A0
ov00_0230C1A0: ; 0x0230C1A0
	ldrsb r3, [r0]
	mov r2, r0
	cmp r3, #0
	beq _0230C1C8
	mov r1, #0x2f
_0230C1B4:
	cmp r3, #0x5c
	streqb r1, [r0]
	ldrsb r3, [r0, #1]!
	cmp r3, #0
	bne _0230C1B4
_0230C1C8:
	mov r0, r2
	bx lr
	arm_func_end ov00_0230C1A0

	arm_func_start ov00_0230C1D0
ov00_0230C1D0: ; 0x0230C1D0
	stmdb sp!, {r3, r4, r5, lr}
	mov r5, r0
	ldr r0, [r5, #4]
	mov r4, r1
	cmp r0, #0
	ldreq r0, [r4]
	streq r0, [r5, #0xc]
	beq _0230C240
	cmp r0, #1
	bne _0230C20C
	ldr r1, [r4]
	ldr r0, [r4, #4]
	str r1, [r5, #0xc]
	str r0, [r5, #0x10]
	b _0230C240
_0230C20C:
	cmp r0, #2
	bne _0230C240
	ldr r0, [r5, #0xc]
	cmp r0, #0
	beq _0230C224
	bl ov00_022F5B14
_0230C224:
	cmp r4, #0
	moveq r0, #0
	beq _0230C23C
	mov r0, r4
	bl ov00_022F5514
	bl ov00_0230C1A0
_0230C23C:
	str r0, [r5, #0xc]
_0230C240:
	mov r0, r5
	bl ov00_0230C24C
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_0230C1D0

	arm_func_start ov00_0230C24C
ov00_0230C24C: ; 0x0230C24C
	cmp r0, #0
	moveq r0, #0
	bxeq lr
	ldr r1, [r0, #4]
	cmp r1, #2
	ldreq r0, [r0, #0xc]
	addne r0, r0, #0xc
	bx lr
	arm_func_end ov00_0230C24C

	arm_func_start ov00_0230C26C
ov00_0230C26C: ; 0x0230C26C
	stmdb sp!, {lr}
	sub sp, sp, #0x14
	cmp r0, #0
	ldreq r0, _0230C298 ; =ov00_023289D8
	str r1, [sp]
	ldreq r0, [r0]
	add r1, sp, #0
	ldr r0, [r0]
	bl ov00_022F4DCC
	add sp, sp, #0x14
	ldmia sp!, {pc}
	.align 2, 0
_0230C298: .word ov00_023289D8
	arm_func_end ov00_0230C26C

	arm_func_start ov00_0230C29C
ov00_0230C29C: ; 0x0230C29C
	stmdb sp!, {r3, lr}
	ldr r0, _0230C304 ; =ov00_0231BDDC
	mvn r1, #0
	ldr r0, [r0, #4]
	cmp r0, r1
	beq _0230C2C8
	mov r1, #2
	bl ov00_022F4FC8
	ldr r0, _0230C304 ; =ov00_0231BDDC
	ldr r0, [r0, #4]
	bl SocketClose
_0230C2C8:
	ldr r0, _0230C304 ; =ov00_0231BDDC
	mvn r1, #0
	str r1, [r0, #4]
	bl ov00_0230CBD4
	ldr r0, _0230C308 ; =ov00_023289E8
	ldr r0, [r0, #0x28]
	cmp r0, #0
	ldmeqia sp!, {r3, pc}
	bl ov00_022F5B14
	ldr r0, _0230C308 ; =ov00_023289E8
	mov r1, #0
	str r1, [r0, #0x28]
	str r1, [r0, #0x18]
	str r1, [r0, #8]
	ldmia sp!, {r3, pc}
	.align 2, 0
_0230C304: .word ov00_0231BDDC
_0230C308: .word ov00_023289E8
	arm_func_end ov00_0230C29C

	arm_func_start ov00_0230C30C
ov00_0230C30C: ; 0x0230C30C
	ldr r1, _0230C328 ; =ov00_0231BDDC
	mvn r0, #0
	ldr r1, [r1, #4]
	cmp r1, r0
	movne r0, #1
	moveq r0, #0
	bx lr
	.align 2, 0
_0230C328: .word ov00_0231BDDC
	arm_func_end ov00_0230C30C

	arm_func_start ov00_0230C32C
ov00_0230C32C: ; 0x0230C32C
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	ldr r0, _0230C474 ; =ov00_0231BDDC
	mvn r1, #0
	ldr r0, [r0, #4]
	cmp r0, r1
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	ldr r1, _0230C478 ; =ov00_023289E8
	ldr r1, [r1, #0x2c]
	cmp r1, #5
	movne r0, #0
	ldmneia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	bl ov00_0230C5B0
	cmp r0, #0
	beq _0230C458
	mov r7, #0
	ldr sl, _0230C478 ; =ov00_023289E8
	ldr sb, _0230C474 ; =ov00_0231BDDC
	mov r8, #0x100
	mov r6, r7
	mov r4, r7
_0230C380:
	ldr r1, [sl, #0x18]
	ldr r0, [sl, #8]
	sub r0, r1, r0
	cmp r0, #0x80
	bge _0230C3C4
	cmp r1, #0x100
	strlt r8, [sl, #0x18]
	movge r0, r1, lsl #1
	strge r0, [sl, #0x18]
	ldr r1, [sl, #0x18]
	ldr r0, [sl, #0x28]
	add r1, r1, #1
	bl ov00_022F5AFC
	str r0, [sl, #0x28]
	cmp r0, #0
	moveq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_0230C3C4:
	ldr r5, [sl, #8]
	ldr r1, [sl, #0x28]
	ldr r2, [sl, #0x18]
	ldr r0, [sb, #4]
	mov r3, r7
	add r1, r1, r5
	sub r2, r2, r5
	bl SocketRecv
	cmp r0, #0
	bgt _0230C3F8
	bl ov00_0230C29C
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_0230C3F8:
	ldr r1, [sl, #8]
	add r1, r1, r0
	str r1, [sl, #8]
	ldr r0, [sl, #0x28]
	strb r6, [r0, r1]
	ldr r0, [sl, #0x28]
	ldr r1, [sl, #8]
	bl ov00_0230CA48
	ldr r1, [sl, #8]
	mov r5, r0
	cmp r5, r1
	streq r4, [sl, #8]
	beq _0230C448
	ldr r0, [sl, #0x28]
	sub r2, r1, r5
	add r1, r0, r5
	bl memmove
	ldr r0, [sl, #8]
	sub r0, r0, r5
	str r0, [sl, #8]
_0230C448:
	ldr r0, [sb, #4]
	bl ov00_0230C5B0
	cmp r0, #0
	bne _0230C380
_0230C458:
	ldr r1, _0230C474 ; =ov00_0231BDDC
	mvn r0, #0
	ldr r1, [r1, #4]
	cmp r1, r0
	moveq r0, #0
	movne r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_0230C474: .word ov00_0231BDDC
_0230C478: .word ov00_023289E8
	arm_func_end ov00_0230C32C

	arm_func_start ov00_0230C47C
ov00_0230C47C: ; 0x0230C47C
	stmdb sp!, {r4, lr}
	ldr r2, _0230C4C0 ; =ov00_0231BDDC
	cmp r1, #0
	ldr r4, [r2]
	mov lr, #0
	ldmleia sp!, {r4, pc}
_0230C494:
	ldrsb ip, [r0, lr]
	ldrsb r3, [r4]
	eor r3, ip, r3
	strb r3, [r0, lr]
	ldrsb r3, [r4, #1]!
	add lr, lr, #1
	cmp r3, #0
	ldreq r4, [r2]
	cmp lr, r1
	blt _0230C494
	ldmia sp!, {r4, pc}
	.align 2, 0
_0230C4C0: .word ov00_0231BDDC
	arm_func_end ov00_0230C47C

	arm_func_start ov00_0230C4C4
ov00_0230C4C4: ; 0x0230C4C4
	stmdb sp!, {r4, lr}
	sub sp, sp, #0x100
	ldr lr, _0230C588 ; =ov00_02318660
	add ip, sp, #0
	mov r4, r0
	mov r3, #0x80
_0230C4DC:
	ldrb r2, [lr]
	ldrb r0, [lr, #1]
	add lr, lr, #2
	strb r2, [ip]
	strb r0, [ip, #1]
	add ip, ip, #2
	subs r3, r3, #1
	bne _0230C4DC
	ldr r2, _0230C58C ; =ov00_023289E8
	add r0, sp, #0
	ldr r3, [r2, #0x20]
	eor r3, r3, #1
	str r3, [r2, #0x20]
	bl strcat
	ldr r1, _0230C590 ; =ov00_0231BE4C
	add r0, sp, #0
	bl strcat
	add r1, sp, #0
	mov r0, r4
	bl strstr
	movs r4, r0
	addeq sp, sp, #0x100
	moveq r0, #0
	ldmeqia sp!, {r4, pc}
	add r0, sp, #0
	bl strlen
	ldr r1, _0230C58C ; =ov00_023289E8
	ldr r2, _0230C594 ; =ov00_02328C18
	ldr r1, [r1, #0x20]
	add r3, r4, r0
	add r0, r2, r1, lsl #8
	mov r2, r0
	b _0230C568
_0230C560:
	ldrsb r1, [r3], #1
	strb r1, [r2], #1
_0230C568:
	ldrsb r1, [r3]
	cmp r1, #0
	cmpne r1, #0x5c
	bne _0230C560
	mov r1, #0
	strb r1, [r2]
	add sp, sp, #0x100
	ldmia sp!, {r4, pc}
	.align 2, 0
_0230C588: .word ov00_02318660
_0230C58C: .word ov00_023289E8
_0230C590: .word ov00_0231BE4C
_0230C594: .word ov00_02328C18
	arm_func_end ov00_0230C4C4

	arm_func_start ov00_0230C598
ov00_0230C598: ; 0x0230C598
	stmdb sp!, {r3, lr}
	bl ov00_0230C4C4
	cmp r0, #0
	ldreq r0, _0230C5AC ; =ov00_0231BE48
	ldmia sp!, {r3, pc}
	.align 2, 0
_0230C5AC: .word ov00_0231BE48
	arm_func_end ov00_0230C598

	arm_func_start ov00_0230C5B0
ov00_0230C5B0: ; 0x0230C5B0
	ldr ip, _0230C5B8 ; =ov00_022F5320
	bx ip
	.align 2, 0
_0230C5B8: .word ov00_022F5320
	arm_func_end ov00_0230C5B0

	arm_func_start ov00_0230C5BC
ov00_0230C5BC: ; 0x0230C5BC
	sub r3, r1, #6
	mov r2, r0
	cmp r3, #0
	ble _0230C61C
_0230C5CC:
	ldrsb r1, [r2]
	cmp r1, #0x5c
	ldreqsb r1, [r2, #1]
	cmpeq r1, #0x66
	ldreqsb r1, [r2, #2]
	cmpeq r1, #0x69
	ldreqsb r1, [r2, #3]
	cmpeq r1, #0x6e
	ldreqsb r1, [r2, #4]
	cmpeq r1, #0x61
	ldreqsb r1, [r2, #5]
	cmpeq r1, #0x6c
	ldreqsb r1, [r2, #6]
	cmpeq r1, #0x5c
	moveq r0, r2
	bxeq lr
	add r2, r2, #1
	sub r1, r2, r0
	cmp r1, r3
	blt _0230C5CC
_0230C61C:
	mov r0, #0
	bx lr
	arm_func_end ov00_0230C5BC

	arm_func_start ov00_0230C624
ov00_0230C624: ; 0x0230C624
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	ldr r3, _0230C6A4 ; =ov00_023289E8
	mov r7, r0
	ldr r0, [r3, #0x14]
	mov r6, r1
	cmp r0, #0
	mov r5, r2
	mvneq r0, #0
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	mov r4, #0
	bl ov00_022F47A0
	cmp r0, #0
	ble _0230C69C
	ldr r8, _0230C6A4 ; =ov00_023289E8
_0230C65C:
	ldr r0, [r8, #0x14]
	mov r1, r4
	bl ov00_022F47A8
	ldr r1, [r0]
	cmp r1, r7
	ldreq r1, [r0, #4]
	cmpeq r1, r6
	ldreq r0, [r0, #8]
	cmpeq r0, r5
	moveq r0, r4
	ldmeqia sp!, {r4, r5, r6, r7, r8, pc}
	ldr r0, [r8, #0x14]
	add r4, r4, #1
	bl ov00_022F47A0
	cmp r4, r0
	blt _0230C65C
_0230C69C:
	mvn r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_0230C6A4: .word ov00_023289E8
	arm_func_end ov00_0230C624

	arm_func_start ov00_0230C6A8
ov00_0230C6A8: ; 0x0230C6A8
	stmdb sp!, {r3, r4, r5, r6, lr}
	sub sp, sp, #4
	ldr r1, _0230C748 ; =ov00_0231BE50
	mov r6, r0
	bl ov00_0230C598
	bl sub_0208B360
	mov r5, r0
	ldr r1, _0230C74C ; =ov00_0231BE58
	mov r0, r6
	bl ov00_0230C598
	bl sub_0208B360
	mov r4, r0
	ldr r1, _0230C750 ; =ov00_0231BE5C
	mov r0, r6
	bl ov00_0230C598
	mov r6, r0
	mov r0, #0
	mov r1, r4
	mov r2, r0
	bl ov00_0230C624
	mov r4, r0
	mvn r0, #0
	cmp r4, r0
	addeq sp, sp, #4
	ldmeqia sp!, {r3, r4, r5, r6, pc}
	ldr r0, _0230C754 ; =ov00_023289E8
	mov r1, r4
	ldr r0, [r0, #0x14]
	bl ov00_022F47A8
	cmp r5, #0
	movgt r1, #1
	str r5, [r0, #8]
	mov r2, #0
	movle r1, #0
	mov r0, r4
	mov r3, r6
	str r2, [sp]
	bl ov00_0230CAD0
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, pc}
	.align 2, 0
_0230C748: .word ov00_0231BE50
_0230C74C: .word ov00_0231BE58
_0230C750: .word ov00_0231BE5C
_0230C754: .word ov00_023289E8
	arm_func_end ov00_0230C6A8

	arm_func_start ov00_0230C758
ov00_0230C758: ; 0x0230C758
	stmdb sp!, {r3, r4, r5, lr}
	ldr r1, _0230C7D8 ; =ov00_0231BE64
	mov r5, r0
	bl ov00_0230C598
	bl sub_0208B360
	mov r4, r0
	ldr r1, _0230C7DC ; =ov00_0231BE58
	mov r0, r5
	bl ov00_0230C598
	bl sub_0208B360
	mov r1, r0
	mov r0, #3
	mov r2, #0
	bl ov00_0230C624
	mov r5, r0
	mvn r0, #0
	cmp r5, r0
	ldmeqia sp!, {r3, r4, r5, pc}
	ldr r0, _0230C7E0 ; =ov00_023289E8
	mov r1, r5
	ldr r0, [r0, #0x14]
	bl ov00_022F47A8
	cmp r4, #0
	movgt r1, #1
	mov r2, #0
	str r4, [r0, #8]
	movle r1, #0
	mov r0, r5
	mov r3, r2
	str r2, [sp]
	bl ov00_0230CAD0
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_0230C7D8: .word ov00_0231BE64
_0230C7DC: .word ov00_0231BE58
_0230C7E0: .word ov00_023289E8
	arm_func_end ov00_0230C758

	arm_func_start ov00_0230C7E4
ov00_0230C7E4: ; 0x0230C7E4
	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
	sub sp, sp, #4
	ldr r1, _0230C8AC ; =ov00_0231BE6C
	mov r4, r0
	bl ov00_0230C598
	bl sub_0208B360
	mov r7, r0
	ldr r1, _0230C8B0 ; =ov00_0231BE58
	mov r0, r4
	bl ov00_0230C598
	bl sub_0208B360
	mov r6, r0
	ldr r1, _0230C8B4 ; =ov00_0231BE74
	mov r0, r4
	bl ov00_0230C598
	bl sub_0208B360
	mov r5, r0
	ldr r1, _0230C8B8 ; =ov00_0231BE78
	mov r0, r4
	bl ov00_0230C598
	bl sub_0208B360
	mov r8, r0
	mov r1, r6
	mov r2, r5
	mov r0, #1
	bl ov00_0230C624
	mov r5, r0
	mvn r0, #0
	cmp r5, r0
	addeq sp, sp, #4
	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, pc}
	ldr r1, _0230C8BC ; =ov00_0231BE7C
	mov r0, r4
	bl ov00_0230C598
	bl sub_0208B360
	mov r6, r0
	ldr r1, _0230C8C0 ; =ov00_0231BE84
	mov r0, r4
	bl strstr
	cmp r0, #0
	ldreq r3, _0230C8C4 ; =ov00_0231BE48
	moveq r6, #0
	addne r3, r0, #6
	mov r0, r5
	mov r1, r7
	mov r2, r8
	str r6, [sp]
	bl ov00_0230CAD0
	add sp, sp, #4
	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
	.align 2, 0
_0230C8AC: .word ov00_0231BE6C
_0230C8B0: .word ov00_0231BE58
_0230C8B4: .word ov00_0231BE74
_0230C8B8: .word ov00_0231BE78
_0230C8BC: .word ov00_0231BE7C
_0230C8C0: .word ov00_0231BE84
_0230C8C4: .word ov00_0231BE48
	arm_func_end ov00_0230C7E4

	arm_func_start ov00_0230C8C8
ov00_0230C8C8: ; 0x0230C8C8
	stmdb sp!, {r3, r4, r5, r6, r7, lr}
	ldr r1, _0230C950 ; =ov00_0231BE8C
	mov r7, r0
	bl ov00_0230C598
	bl sub_0208B360
	mov r6, r0
	ldr r1, _0230C954 ; =ov00_0231BE74
	mov r0, r7
	bl ov00_0230C598
	bl sub_0208B360
	mov r5, r0
	ldr r1, _0230C958 ; =ov00_0231BE58
	mov r0, r7
	bl ov00_0230C598
	bl sub_0208B360
	mov r4, r0
	ldr r1, _0230C95C ; =ov00_0231BE78
	mov r0, r7
	bl ov00_0230C598
	bl sub_0208B360
	mov r1, r4
	mov r4, r0
	mov r2, r5
	mov r0, #2
	bl ov00_0230C624
	mvn r1, #0
	cmp r0, r1
	ldmeqia sp!, {r3, r4, r5, r6, r7, pc}
	mov r3, #0
	mov r1, r6
	mov r2, r4
	str r3, [sp]
	bl ov00_0230CAD0
	ldmia sp!, {r3, r4, r5, r6, r7, pc}
	.align 2, 0
_0230C950: .word ov00_0231BE8C
_0230C954: .word ov00_0231BE74
_0230C958: .word ov00_0231BE58
_0230C95C: .word ov00_0231BE78
	arm_func_end ov00_0230C8C8

	arm_func_start ov00_0230C960
ov00_0230C960: ; 0x0230C960
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r1
	ldr r1, _0230CA38 ; =ov00_0231BE94
	mov r5, r0
	mov r3, #0
	mov r2, #8
	strb r3, [r5, r4]
	bl strncmp
	cmp r0, #0
	bne _0230C998
	mov r0, r5
	mov r1, r4
	bl ov00_0230C6A8
	ldmia sp!, {r3, r4, r5, pc}
_0230C998:
	ldr r1, _0230CA3C ; =ov00_0231BEA0
	mov r0, r5
	mov r2, #9
	bl strncmp
	cmp r0, #0
	bne _0230C9C0
	mov r0, r5
	mov r1, r4
	bl ov00_0230C758
	ldmia sp!, {r3, r4, r5, pc}
_0230C9C0:
	ldr r1, _0230CA3C ; =ov00_0231BEA0
	mov r0, r5
	mov r2, #9
	bl strncmp
	cmp r0, #0
	bne _0230C9E8
	mov r0, r5
	mov r1, r4
	bl ov00_0230C758
	ldmia sp!, {r3, r4, r5, pc}
_0230C9E8:
	ldr r1, _0230CA40 ; =ov00_0231BEAC
	mov r0, r5
	mov r2, #8
	bl strncmp
	cmp r0, #0
	bne _0230CA10
	mov r0, r5
	mov r1, r4
	bl ov00_0230C7E4
	ldmia sp!, {r3, r4, r5, pc}
_0230CA10:
	ldr r1, _0230CA44 ; =ov00_0231BEB8
	mov r0, r5
	mov r2, #8
	bl strncmp
	cmp r0, #0
	ldmneia sp!, {r3, r4, r5, pc}
	mov r0, r5
	mov r1, r4
	bl ov00_0230C8C8
	ldmia sp!, {r3, r4, r5, pc}
	.align 2, 0
_0230CA38: .word ov00_0231BE94
_0230CA3C: .word ov00_0231BEA0
_0230CA40: .word ov00_0231BEAC
_0230CA44: .word ov00_0231BEB8
	arm_func_end ov00_0230C960

	arm_func_start ov00_0230CA48
ov00_0230CA48: ; 0x0230CA48
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	mov sb, r1
	mov sl, r0
	mov r7, sb
	bl ov00_0230C5BC
	mov r6, r0
	ldr r5, _0230CAC8 ; =ov00_0231BE28
	ldr r4, _0230CACC ; =ov00_0231BDDC
	b _0230CAB0
_0230CA6C:
	sub r8, r6, sl
	mov r0, sl
	mov r1, r8
	str r5, [r4]
	bl ov00_0230C47C
	mov r0, sl
	mov r1, r8
	bl ov00_0230C960
	add r0, r8, #7
	sub sb, sb, r0
	cmp sb, #0
	add sl, r6, #7
	ble _0230CAB0
	mov r0, sl
	mov r1, sb
	bl ov00_0230C5BC
	mov r6, r0
_0230CAB0:
	cmp sb, #0
	ble _0230CAC0
	cmp r6, #0
	bne _0230CA6C
_0230CAC0:
	sub r0, r7, sb
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	.align 2, 0
_0230CAC8: .word ov00_0231BE28
_0230CACC: .word ov00_0231BDDC
	arm_func_end ov00_0230CA48

	arm_func_start ov00_0230CAD0
ov00_0230CAD0: ; 0x0230CAD0
	stmdb sp!, {r4, r5, r6, r7, lr}
	sub sp, sp, #0x14
	movs r7, r0
	mov r6, r1
	mov r5, r2
	mov r4, r3
	addmi sp, sp, #0x14
	ldmmiia sp!, {r4, r5, r6, r7, pc}
	ldr r0, _0230CBD0 ; =ov00_023289E8
	ldr r0, [r0, #0x14]
	bl ov00_022F47A0
	cmp r7, r0
	addge sp, sp, #0x14
	ldmgeia sp!, {r4, r5, r6, r7, pc}
	ldr r0, _0230CBD0 ; =ov00_023289E8
	mov r1, r7
	ldr r0, [r0, #0x14]
	bl ov00_022F47A8
	mov r3, r0
	ldr ip, [r3, #0x18]
	cmp ip, #0
	beq _0230CBB8
	ldr r0, [r3]
	cmp r0, #3
	addls pc, pc, r0, lsl #2
	b _0230CBB8
_0230CB38: ; jump table
	b _0230CB48 ; case 0
	b _0230CB64 ; case 1
	b _0230CB8C ; case 2
	b _0230CBA8 ; case 3
_0230CB48:
	ldr r0, [r3, #0x14]
	mov r2, r6
	str r0, [sp]
	ldmib r3, {r0, r1}
	mov r3, r4
	blx ip
	b _0230CBB8
_0230CB64:
	str r6, [sp]
	str r5, [sp, #4]
	ldr r0, [sp, #0x28]
	str r4, [sp, #8]
	str r0, [sp, #0xc]
	ldr r0, [r3, #0x14]
	str r0, [sp, #0x10]
	ldmib r3, {r0, r1, r2, r3}
	blx ip
	b _0230CBB8
_0230CB8C:
	str r6, [sp]
	str r5, [sp, #4]
	ldr r0, [r3, #0x14]
	str r0, [sp, #8]
	ldmib r3, {r0, r1, r2, r3}
	blx ip
	b _0230CBB8
_0230CBA8:
	ldmib r3, {r0, r1}
	ldr r3, [r3, #0x14]
	mov r2, r6
	blx ip
_0230CBB8:
	ldr r0, _0230CBD0 ; =ov00_023289E8
	mov r1, r7
	ldr r0, [r0, #0x14]
	bl ov00_022F491C
	add sp, sp, #0x14
	ldmia sp!, {r4, r5, r6, r7, pc}
	.align 2, 0
_0230CBD0: .word ov00_023289E8
	arm_func_end ov00_0230CAD0

	arm_func_start ov00_0230CBD4
ov00_0230CBD4: ; 0x0230CBD4
	stmdb sp!, {r4, r5, r6, r7, r8, sb, lr}
	sub sp, sp, #0x24
	ldr r0, _0230CCB8 ; =ov00_023289E8
	ldr r0, [r0, #0x14]
	cmp r0, #0
	addeq sp, sp, #0x24
	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, pc}
	bl ov00_022F47A0
	subs r4, r0, #1
	bmi _0230CC98
	ldr r5, _0230CCBC ; =ov00_023184D0
	add r3, sp, #4
	mov r2, #8
_0230CC08:
	ldrb r1, [r5]
	ldrb r0, [r5, #1]
	add r5, r5, #2
	strb r1, [r3]
	strb r0, [r3, #1]
	add r3, r3, #2
	subs r2, r2, #1
	bne _0230CC08
	ldr sb, _0230CCC0 ; =ov00_0231BE38
	ldr r5, _0230CCC4 ; =ov00_0231BDDC
	add r8, sp, #0x14
	mov r7, #0xf
	mov r6, #0
_0230CC3C:
	add ip, sp, #4
	add r3, sp, #0x14
	mov r2, #8
_0230CC48:
	ldrb r1, [ip]
	ldrb r0, [ip, #1]
	add ip, ip, #2
	strb r1, [r3]
	strb r0, [r3, #1]
	add r3, r3, #2
	subs r2, r2, #1
	bne _0230CC48
	mov r0, r8
	mov r1, r7
	str sb, [r5]
	bl ov00_0230C47C
	mov r0, r4
	mov r1, r6
	mov r2, r6
	mov r3, r8
	str r6, [sp]
	bl ov00_0230CAD0
	subs r4, r4, #1
	bpl _0230CC3C
_0230CC98:
	ldr r0, _0230CCB8 ; =ov00_023289E8
	ldr r0, [r0, #0x14]
	bl ov00_022F4758
	ldr r0, _0230CCB8 ; =ov00_023289E8
	mov r1, #0
	str r1, [r0, #0x14]
	add sp, sp, #0x24
	ldmia sp!, {r4, r5, r6, r7, r8, sb, pc}
	.align 2, 0
_0230CCB8: .word ov00_023289E8
_0230CCBC: .word ov00_023184D0
_0230CCC0: .word ov00_0231BE38
_0230CCC4: .word ov00_0231BDDC
	arm_func_end ov00_0230CBD4

	arm_func_start ov00_0230CCC8
ov00_0230CCC8: ; 0x0230CCC8
	stmdb sp!, {r3, lr}
	cmp r0, #0
	ldreq r0, _0230CCF4 ; =ov00_023289E8
	ldreq r0, [r0, #0xc]
	cmp r0, #0
	moveq r0, r1
	ldmeqia sp!, {r3, pc}
	ldr r0, [r0, #0x20]
	bl ov00_022F47A8
	ldr r0, [r0]
	ldmia sp!, {r3, pc}
	.align 2, 0
_0230CCF4: .word ov00_023289E8
	arm_func_end ov00_0230CCC8

	arm_func_start ov00_0230CCF8
ov00_0230CCF8: ; 0x0230CCF8
	stmdb sp!, {r3, lr}
	cmp r0, #0
	ldreq r0, _0230CD24 ; =ov00_023289E8
	ldreq r0, [r0, #0xc]
	cmp r0, #0
	moveq r0, r1
	ldmeqia sp!, {r3, pc}
	ldr r0, [r0, #0x1c]
	bl ov00_022F47A8
	ldr r0, [r0]
	ldmia sp!, {r3, pc}
	.align 2, 0
_0230CD24: .word ov00_023289E8
	arm_func_end ov00_0230CCF8

	arm_func_start ov00_0230CD28
ov00_0230CD28: ; 0x0230CD28
	stmdb sp!, {r0, r1, r2, r3}
	stmdb sp!, {r3, r4, r5, lr}
	movs r5, r0
	ldreq r0, _0230CD8C ; =ov00_023289E8
	mov r4, r1
	ldreq r5, [r0, #0xc]
	mov r3, r2
	cmp r5, #0
	addeq r0, sp, #0x1c
	beq _0230CD7C
	ldr r0, [r5, #0xc]
	add r2, sp, #0x1c
	mov r1, r4
	blx r3
	cmp r0, #0
	bne _0230CD7C
	ldr r0, [r5, #0xc]
	add r3, sp, #0x1c
	mov r1, r4
	mov r2, #0
	bl ov00_0230BD68
_0230CD7C:
	ldr r0, [r0]
	ldmia sp!, {r3, r4, r5, lr}
	add sp, sp, #0x10
	bx lr
	.align 2, 0
_0230CD8C: .word ov00_023289E8
	arm_func_end ov00_0230CD28

	arm_func_start ov00_0230CD90
ov00_0230CD90: ; 0x0230CD90
	stmdb sp!, {r0, r1, r2, r3}
	stmdb sp!, {r3, r4, r5, lr}
	movs r5, r0
	ldreq r0, _0230CDFC ; =ov00_023289E8
	mov r4, r1
	ldreq r5, [r0, #0xc]
	mov r3, r2
	cmp r5, #0
	addeq r0, sp, #0x1c
	beq _0230CDE4
	ldr r0, [r5, #0xc]
	add r2, sp, #0x1c
	mov r1, r4
	blx r3
	cmp r0, #0
	bne _0230CDE4
	ldr r0, [r5, #0xc]
	add r3, sp, #0x1c
	mov r1, r4
	mov r2, #1
	bl ov00_0230BD68
_0230CDE4:
	ldr r2, [r0]
	ldr r1, [r0, #4]
	mov r0, r2
	ldmia sp!, {r3, r4, r5, lr}
	add sp, sp, #0x10
	bx lr
	.align 2, 0
_0230CDFC: .word ov00_023289E8
	arm_func_end ov00_0230CD90

	arm_func_start ov00_0230CE00
ov00_0230CE00: ; 0x0230CE00
	stmdb sp!, {r4, r5, r6, lr}
	movs r6, r0
	ldreq r0, _0230CE58 ; =ov00_023289E8
	mov r5, r1
	ldreq r6, [r0, #0xc]
	mov r4, r3
	cmp r6, #0
	mov ip, r2
	moveq r0, r4
	ldmeqia sp!, {r4, r5, r6, pc}
	ldr r0, [r6, #0xc]
	mov r1, r5
	mov r2, r4
	blx ip
	cmp r0, #0
	ldmneia sp!, {r4, r5, r6, pc}
	ldr r0, [r6, #0xc]
	mov r1, r5
	mov r3, r4
	mov r2, #2
	bl ov00_0230BD68
	ldmia sp!, {r4, r5, r6, pc}
	.align 2, 0
_0230CE58: .word ov00_023289E8
	arm_func_end ov00_0230CE00

	arm_func_start ov00_0230CE5C
ov00_0230CE5C: ; 0x0230CE5C
	stmdb sp!, {r4, r5, r6, r7, lr}
	sub sp, sp, #0x44
	mov r6, r1
	ldr r1, [sp, #0x58]
	mov r7, r0
	mov r5, r2
	mov r4, r3
	bl ov00_0230CCC8
	mov r3, r0
	ldr r1, _0230CEB4 ; =ov00_0231BEC4
	add r0, sp, #4
	mov r2, r6
	bl sub_020790DC
	ldr ip, [sp, #0x58]
	mov r0, r7
	mov r2, r5
	mov r3, r4
	add r1, sp, #4
	str ip, [sp]
	bl ov00_0230CD28
	add sp, sp, #0x44
	ldmia sp!, {r4, r5, r6, r7, pc}
	.align 2, 0
_0230CEB4: .word ov00_0231BEC4
	arm_func_end ov00_0230CE5C

	arm_func_start ov00_0230CEB8
ov00_0230CEB8: ; 0x0230CEB8
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	sub sp, sp, #0x48
	mov r7, r1
	ldr r1, [sp, #0x64]
	mov r8, r0
	mov r6, r2
	mov r5, r3
	ldr r4, [sp, #0x60]
	bl ov00_0230CCC8
	mov r3, r0
	ldr r1, _0230CF14 ; =ov00_0231BEC4
	add r0, sp, #8
	mov r2, r7
	bl sub_020790DC
	ldr ip, [sp, #0x64]
	mov r3, r5
	mov r0, r8
	mov r2, r6
	add r1, sp, #8
	stmia sp, {r4, ip}
	bl ov00_0230CD90
	add sp, sp, #0x48
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_0230CF14: .word ov00_0231BEC4
	arm_func_end ov00_0230CEB8

	arm_func_start ov00_0230CF18
ov00_0230CF18: ; 0x0230CF18
	stmdb sp!, {r4, r5, r6, r7, lr}
	sub sp, sp, #0x44
	mov r6, r1
	ldr r1, [sp, #0x58]
	mov r7, r0
	mov r5, r2
	mov r4, r3
	bl ov00_0230CCC8
	mov r3, r0
	ldr r1, _0230CF70 ; =ov00_0231BEC4
	add r0, sp, #4
	mov r2, r6
	bl sub_020790DC
	ldr ip, [sp, #0x58]
	mov r0, r7
	mov r2, r5
	mov r3, r4
	add r1, sp, #4
	str ip, [sp]
	bl ov00_0230CE00
	add sp, sp, #0x44
	ldmia sp!, {r4, r5, r6, r7, pc}
	.align 2, 0
_0230CF70: .word ov00_0231BEC4
	arm_func_end ov00_0230CF18

	arm_func_start ov00_0230CF74
ov00_0230CF74: ; 0x0230CF74
	stmdb sp!, {r4, r5, r6, r7, lr}
	sub sp, sp, #0x44
	mov r6, r1
	ldr r1, [sp, #0x58]
	mov r7, r0
	mov r5, r2
	mov r4, r3
	bl ov00_0230CCF8
	mov r3, r0
	ldr r1, _0230CFCC ; =ov00_0231BECC
	add r0, sp, #4
	mov r2, r6
	bl sub_020790DC
	ldr ip, [sp, #0x58]
	mov r0, r7
	mov r2, r5
	mov r3, r4
	add r1, sp, #4
	str ip, [sp]
	bl ov00_0230CD28
	add sp, sp, #0x44
	ldmia sp!, {r4, r5, r6, r7, pc}
	.align 2, 0
_0230CFCC: .word ov00_0231BECC
	arm_func_end ov00_0230CF74

	arm_func_start ov00_0230CFD0
ov00_0230CFD0: ; 0x0230CFD0
	stmdb sp!, {r4, r5, r6, r7, r8, lr}
	sub sp, sp, #0x48
	mov r7, r1
	ldr r1, [sp, #0x64]
	mov r8, r0
	mov r6, r2
	mov r5, r3
	ldr r4, [sp, #0x60]
	bl ov00_0230CCF8
	mov r3, r0
	ldr r1, _0230D02C ; =ov00_0231BECC
	add r0, sp, #8
	arm_func_end ov00_0230CFD0

	arm_func_start ov00_0230D000
ov00_0230D000: ; 0x0230D000
	mov r2, r7
	bl sub_020790DC
	ldr ip, [sp, #0x64]
	mov r3, r5
	mov r0, r8
	mov r2, r6
	add r1, sp, #8
	stmia sp, {r4, ip}
	bl ov00_0230CD90
	add sp, sp, #0x48
	ldmia sp!, {r4, r5, r6, r7, r8, pc}
	.align 2, 0
_0230D02C: .word ov00_0231BECC
	arm_func_end ov00_0230D000

	arm_func_start ov00_0230D030
ov00_0230D030: ; 0x0230D030
	stmdb sp!, {r4, r5, r6, r7, lr}
	sub sp, sp, #0x44
	mov r6, r1
	ldr r1, [sp, #0x58]
	mov r7, r0
	mov r5, r2
	mov r4, r3
	bl ov00_0230CCF8
	mov r3, r0
	ldr r1, _0230D088 ; =ov00_0231BECC
	add r0, sp, #4
	mov r2, r6
	bl sub_020790DC
	ldr ip, [sp, #0x58]
	mov r0, r7
	mov r2, r5
	mov r3, r4
	add r1, sp, #4
	str ip, [sp]
	bl ov00_0230CE00
	add sp, sp, #0x44
	ldmia sp!, {r4, r5, r6, r7, pc}
	.align 2, 0
_0230D088: .word ov00_0231BECC
	arm_func_end ov00_0230D030

	arm_func_start ov00_0230D08C
ov00_0230D08C: ; 0x0230D08C
	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
	ldrb r5, [r0]
	mov lr, #0
	mov r4, #1
	and r6, r5, #1
	mov r3, lr
	mov ip, r4
	mov r1, lr
	mov r2, r4
_0230D0B0:
	add r7, r0, r4
	ldrb sl, [r7, #-1]
	cmp sl, r5
	eor sl, r4, sl
	movlo r8, ip
	and sl, sl, #1
	movhs r8, r3
	cmp r5, #0x4f
	movlo sb, r2
	eor sl, lr, sl
	movhs sb, r1
	eor sl, r6, sl
	eor sb, sl, sb
	eors lr, sb, r8
	beq _0230D0F8
	ldrb r8, [r7]
	tst r8, #1
	beq _0230D10C
_0230D0F8:
	cmp lr, #0
	ldreqb r7, [r7]
	andeq r7, r7, #1
	cmpeq r7, #1
	bne _0230D114
_0230D10C:
	mov r0, #0
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
_0230D114:
	add r4, r4, #1
	cmp r4, #0x20
	blt _0230D0B0
	mov r0, #1
	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
	arm_func_end ov00_0230D08C

	arm_func_start ov00_0230D128
ov00_0230D128: ; 0x0230D128
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov sl, r0
	bl ov00_022F5594
	bl sub_020895E4
	bl sub_020895B0
	ldr r5, _0230D21C ; =0x2C0B02C1
	mov r1, r0, lsr #0x1f
	smull r2, r4, r5, r0
	mov r8, #0
	mov r7, #1
	add r4, r1, r4, asr #4
	mov r3, #0x5d
	smull r1, r2, r3, r4
	sub r4, r0, r1
	add r0, r4, #0x21
	strb r0, [sl]
	mov fp, r8
	mov r6, r7
	mov r4, r3
_0230D174:
	add sb, sl, r7
	ldrb r3, [sb, #-1]
	ldrb r0, [sl]
	cmp r3, r0
	eor r3, r7, r3
	movlo r1, r6
	and r3, r3, #1
	movhs r1, fp
	cmp r0, #0x4f
	movlo r2, #1
	and r0, r0, #1
	eor r3, r8, r3
	movhs r2, #0
	eor r0, r0, r3
	eor r0, r0, r2
	eor r8, r0, r1
	bl sub_020895B0
	smull r2, r3, r5, r0
	mov r1, r0, lsr #0x1f
	add r3, r1, r3, asr #4
	smull r1, r2, r4, r3
	sub r3, r0, r1
	add r0, r3, #0x21
	cmp r8, #0
	strb r0, [sb]
	beq _0230D1E8
	ldrb r0, [sb]
	tst r0, #1
	beq _0230D1FC
_0230D1E8:
	cmp r8, #0
	ldreqb r0, [sb]
	andeq r0, r0, #1
	cmpeq r0, #1
	bne _0230D208
_0230D1FC:
	ldrb r0, [sb]
	add r0, r0, #1
	strb r0, [sb]
_0230D208:
	add r7, r7, #1
	cmp r7, #0x20
	blt _0230D174
	mov r0, sl
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_0230D21C: .word 0x2C0B02C1
	arm_func_end ov00_0230D128

	arm_func_start ov00_0230D220
ov00_0230D220: ; 0x0230D220
	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
	mov r5, r0
	ldr r0, _0230D320 ; =ov00_0231BED4
	mov r4, r1
	bl strlen
	mov r7, r0
	mov r0, r4
	bl ov00_0230D08C
	mov sl, #0
	mov fp, r0
	mov r8, sl
_0230D24C:
	cmp fp, #0
	cmpne sl, #0
	cmpne sl, #0xd
	bne _0230D284
	bl sub_020895B0
	ldr r1, _0230D324 ; =0x2C0B02C1
	mov r2, r0, lsr #0x1f
	smull r3, r6, r1, r0
	add r6, r2, r6, asr #4
	mov r1, #0x5d
	smull r2, r3, r1, r6
	sub r6, r0, r2
	add r0, r6, #0x21
	b _0230D300
_0230D284:
	cmp sl, #1
	cmpne sl, #0xe
	ldreqsb r6, [r4, sl]
	addne r0, r4, sl
	ldrb sb, [r4, sl]
	ldrnesb r6, [r0, #-1]
	mov r1, r7
	add r0, sl, sb
	bl _s32_div_f
	mul r0, r6, r8
	mov r6, r1
	mov r1, r7
	bl _s32_div_f
	ldr r0, _0230D320 ; =ov00_0231BED4
	ldrsb r3, [r0, r6]
	ldrsb r2, [r0, r1]
	mla r0, sl, sb, r3
	mov r1, r0, lsr #0x1f
	rsb r0, r1, r0, lsl #27
	add r0, r1, r0, ror #27
	ldrb r0, [r4, r0]
	eor r0, r0, r2
	bl abs
	ldr r1, _0230D324 ; =0x2C0B02C1
	smull r2, r3, r1, r0
	mov r1, r0, lsr #0x1f
	add r3, r1, r3, asr #4
	mov r1, #0x5d
	smull r2, r3, r1, r3
	sub r3, r0, r2
	add r0, r3, #0x21
_0230D300:
	strb r0, [r5, sl]
	add r0, r8, #0x47
	add sl, sl, #1
	cmp sl, #0x20
	add r8, r0, #0x4600
	blt _0230D24C
	mov r0, r5
	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
	.align 2, 0
_0230D320: .word ov00_0231BED4
_0230D324: .word 0x2C0B02C1
	arm_func_end ov00_0230D220

	arm_func_start ov00_0230D328
ov00_0230D328: ; 0x0230D328
	mov ip, #0
_0230D32C:
	cmp ip, #0
	cmpne ip, #0xd
	ldrneb r3, [r0, ip]
	ldrneb r2, [r1, ip]
	cmpne r3, r2
	movne r0, #0
	bxne lr
	add ip, ip, #1
	cmp ip, #0x20
	blt _0230D32C
	mov r0, #1
	bx lr
	arm_func_end ov00_0230D328

	arm_func_start ov00_0230D35C
ov00_0230D35C: ; 0x0230D35C
	stmdb sp!, {r3, r4, r5, lr}
	mov r4, r1
	mov r5, r0
	mov r0, r4
	bl ov00_022F5AE4
	str r0, [r5]
	cmp r0, #0
	moveq r0, #0
	strne r4, [r5, #4]
	movne r0, #1
	ldmia sp!, {r3, r4, r5, pc}
	arm_func_end ov00_0230D35C