From 6e1d5f73335045569f78bb5c8b80f26392cc1756 Mon Sep 17 00:00:00 2001 From: AnonymousRandomPerson Date: Mon, 14 Aug 2023 00:17:21 -0400 Subject: [PATCH] Added BSS to overlays --- .gitignore | 1 - asm/overlay_00.s | 201 +++++++++++++------------ asm/overlay_01.s | 316 ++++++++++++++++++++-------------------- asm/overlay_02.s | 10 +- asm/overlay_03.s | 36 +++-- asm/overlay_04.s | 32 ++-- asm/overlay_05.s | 20 ++- asm/overlay_06.s | 24 +-- asm/overlay_07.s | 30 ++-- asm/overlay_08.s | 8 +- asm/overlay_10.s | 38 ++--- asm/overlay_11.s | 110 +++++++------- asm/overlay_20.s | 16 +- asm/overlay_28.s | 40 ++--- asm/overlay_29.s | 6 +- asm/overlay_31.s | 66 +++++---- asm/overlay_34.s | 28 ++-- graphics_files_rules.mk | 6 - 18 files changed, 525 insertions(+), 463 deletions(-) diff --git a/.gitignore b/.gitignore index 0db8bd8a..b6566f85 100644 --- a/.gitignore +++ b/.gitignore @@ -19,7 +19,6 @@ sub/build/** # Generated files *.4bpp -*.lz *.gbapal # For asmdiff diff --git a/asm/overlay_00.s b/asm/overlay_00.s index c7531a0d..c3340103 100644 --- a/asm/overlay_00.s +++ b/asm/overlay_00.s @@ -83,7 +83,7 @@ _022BCB94: mov r0, #4 ldmia sp!, {r4, r5, r6, pc} .align 2, 0 -_022BCB9C: .word 0x023187A0 +_022BCB9C: .word _02318770 + 0x20 _022BCBA0: .word 0x0003FFE0 _022BCBA4: .word ov00_022BDE30 _022BCBA8: .word ov00_022BDF1C @@ -126,7 +126,7 @@ _022BCBF0: str r1, [r0, #0x18] ldmia sp!, {r3, pc} .align 2, 0 -_022BCC2C: .word 0x023187A0 +_022BCC2C: .word _02318770 + 0x20 arm_func_end ov00_022BCBAC arm_func_start ov00_022BCC30 @@ -155,7 +155,7 @@ _022BCC64: mov r0, #0 ldmia sp!, {r3, pc} .align 2, 0 -_022BCC88: .word 0x023187A0 +_022BCC88: .word _02318770 + 0x20 _022BCC8C: .word 0x59465945 arm_func_end ov00_022BCC30 @@ -168,7 +168,7 @@ ov00_022BCC90: ; 0x022BCC90 and r0, r0, #0xff ldmia sp!, {r3, pc} .align 2, 0 -_022BCCA8: .word 0x023187A0 +_022BCCA8: .word _02318770 + 0x20 arm_func_end ov00_022BCC90 arm_func_start ov00_022BCCAC @@ -180,7 +180,7 @@ ov00_022BCCAC: ; 0x022BCCAC and r0, r0, #0xff ldmia sp!, {r3, pc} .align 2, 0 -_022BCCC4: .word 0x023187A0 +_022BCCC4: .word _02318770 + 0x20 arm_func_end ov00_022BCCAC arm_func_start ov00_022BCCC8 @@ -196,7 +196,7 @@ ov00_022BCCC8: ; 0x022BCCC8 add sp, sp, #0xc ldmia sp!, {pc} .align 2, 0 -_022BCCF0: .word 0x023187A0 +_022BCCF0: .word _02318770 + 0x20 arm_func_end ov00_022BCCC8 arm_func_start ov00_022BCCF4 @@ -208,7 +208,7 @@ ov00_022BCCF4: ; 0x022BCCF4 and r0, r0, #0xff ldmia sp!, {r3, pc} .align 2, 0 -_022BCD0C: .word 0x023187A0 +_022BCD0C: .word _02318770 + 0x20 arm_func_end ov00_022BCCF4 arm_func_start ov00_022BCD10 @@ -219,7 +219,7 @@ ov00_022BCD10: ; 0x022BCD10 ldr r1, [r1, #0xc] bx ip .align 2, 0 -_022BCD24: .word 0x023187A0 +_022BCD24: .word _02318770 + 0x20 _022BCD28: .word MemcpySimple arm_func_end ov00_022BCD10 @@ -232,7 +232,7 @@ ov00_022BCD2C: ; 0x022BCD2C mov r2, #0x40 bx ip .align 2, 0 -_022BCD44: .word 0x023187A0 +_022BCD44: .word _02318770 + 0x20 _022BCD48: .word MemcpySimple arm_func_end ov00_022BCD2C @@ -261,7 +261,7 @@ _022BCD7C: bl ov00_022DBA1C ldmia sp!, {r4, pc} .align 2, 0 -_022BCDA0: .word 0x023187A0 +_022BCDA0: .word _02318770 + 0x20 arm_func_end ov00_022BCD4C arm_func_start ov00_022BCDA4 @@ -271,7 +271,7 @@ ov00_022BCDA4: ; 0x022BCDA4 ldr r0, [r0, #0xc] bx ip .align 2, 0 -_022BCDB4: .word 0x023187A0 +_022BCDB4: .word _02318770 + 0x20 _022BCDB8: .word ov00_022DB9EC arm_func_end ov00_022BCDA4 @@ -371,7 +371,7 @@ _022BCF08: add sp, sp, #0x10 ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc} .align 2, 0 -_022BCF10: .word 0x023187A0 +_022BCF10: .word _02318770 + 0x20 arm_func_end ov00_022BCDBC arm_func_start ov00_022BCF14 @@ -398,7 +398,7 @@ ov00_022BCF14: ; 0x022BCF14 mov r0, #1 ldmia sp!, {r4, pc} .align 2, 0 -_022BCF68: .word 0x023187A0 +_022BCF68: .word _02318770 + 0x20 arm_func_end ov00_022BCF14 arm_func_start ov00_022BCF6C @@ -428,7 +428,7 @@ ov00_022BCF6C: ; 0x022BCF6C mov r0, #1 ldmia sp!, {r4, pc} .align 2, 0 -_022BCFCC: .word 0x023187A0 +_022BCFCC: .word _02318770 + 0x20 arm_func_end ov00_022BCF6C arm_func_start ov00_022BCFD0 @@ -458,7 +458,7 @@ _022BD004: mov r0, #1 ldmia sp!, {r3, r4, r5, pc} .align 2, 0 -_022BD028: .word 0x023187A0 +_022BD028: .word _02318770 + 0x20 arm_func_end ov00_022BCFD0 arm_func_start ov00_022BD02C @@ -495,7 +495,7 @@ _022BD08C: mvn r0, #0 ldmia sp!, {r4, r5, r6, r7, r8, pc} .align 2, 0 -_022BD09C: .word 0x023187A0 +_022BD09C: .word _02318770 + 0x20 arm_func_end ov00_022BD02C arm_func_start ov00_022BD0A0 @@ -513,7 +513,7 @@ ov00_022BD0A0: ; 0x022BD0A0 and r0, r0, #0xff ldmia sp!, {r3, pc} .align 2, 0 -_022BD0D0: .word 0x023187A0 +_022BD0D0: .word _02318770 + 0x20 arm_func_end ov00_022BD0A0 arm_func_start ov00_022BD0D4 @@ -531,7 +531,7 @@ ov00_022BD0D4: ; 0x022BD0D4 mla r0, r4, r0, r1 ldmia sp!, {r4, pc} .align 2, 0 -_022BD104: .word 0x023187A0 +_022BD104: .word _02318770 + 0x20 arm_func_end ov00_022BD0D4 arm_func_start ov00_022BD108 @@ -549,7 +549,7 @@ ov00_022BD108: ; 0x022BD108 bl ov00_022DB964 ldmia sp!, {r3, pc} .align 2, 0 -_022BD138: .word 0x023187A0 +_022BD138: .word _02318770 + 0x20 arm_func_end ov00_022BD108 arm_func_start ov00_022BD13C @@ -567,7 +567,7 @@ ov00_022BD13C: ; 0x022BD13C bl ov00_022DB98C ldmia sp!, {r3, pc} .align 2, 0 -_022BD16C: .word 0x023187A0 +_022BD16C: .word _02318770 + 0x20 arm_func_end ov00_022BD13C arm_func_start ov00_022BD170 @@ -584,7 +584,7 @@ ov00_022BD170: ; 0x022BD170 bl ov00_022DB254 ldmia sp!, {r3, pc} .align 2, 0 -_022BD19C: .word 0x023187A0 +_022BD19C: .word _02318770 + 0x20 arm_func_end ov00_022BD170 arm_func_start ov00_022BD1A0 @@ -662,7 +662,7 @@ ov00_022BD264: ; 0x022BD264 strb r0, [r1] bx lr .align 2, 0 -_022BD270: .word 0x023187A0 +_022BD270: .word _02318770 + 0x20 arm_func_end ov00_022BD264 arm_func_start ov00_022BD274 @@ -671,7 +671,7 @@ ov00_022BD274: ; 0x022BD274 ldrb r0, [r0] bx lr .align 2, 0 -_022BD280: .word 0x023187A0 +_022BD280: .word _02318770 + 0x20 arm_func_end ov00_022BD274 arm_func_start ov00_022BD284 @@ -684,7 +684,7 @@ ov00_022BD284: ; 0x022BD284 ldrlob r0, [r0, #0x1a0] bx lr .align 2, 0 -_022BD2A0: .word 0x023187A0 +_022BD2A0: .word _02318770 + 0x20 arm_func_end ov00_022BD284 arm_func_start ov00_022BD2A4 @@ -696,7 +696,7 @@ ov00_022BD2A4: ; 0x022BD2A4 strlob r1, [r0, #0x1a0] bx lr .align 2, 0 -_022BD2BC: .word 0x023187A0 +_022BD2BC: .word _02318770 + 0x20 arm_func_end ov00_022BD2A4 arm_func_start ov00_022BD2C0 @@ -714,7 +714,7 @@ ov00_022BD2C0: ; 0x022BD2C0 and r0, r0, #0xff ldmia sp!, {r3, pc} .align 2, 0 -_022BD2F0: .word 0x023187A0 +_022BD2F0: .word _02318770 + 0x20 arm_func_end ov00_022BD2C0 arm_func_start ov00_022BD2F4 @@ -737,7 +737,7 @@ _022BD308: mov r0, r7 ldmia sp!, {r3, r4, r5, r6, r7, pc} .align 2, 0 -_022BD334: .word 0x023187A0 +_022BD334: .word _02318770 + 0x20 arm_func_end ov00_022BD2F4 arm_func_start ov00_022BD338 @@ -768,7 +768,7 @@ _022BD380: mov r0, r5 ldmia sp!, {r4, r5, r6, r7, r8, pc} .align 2, 0 -_022BD394: .word 0x023187A0 +_022BD394: .word _02318770 + 0x20 arm_func_end ov00_022BD338 arm_func_start ov00_022BD398 @@ -800,7 +800,7 @@ ov00_022BD3B4: ; 0x022BD3B4 bl ov00_022E3680 ldmia sp!, {r4, pc} .align 2, 0 -_022BD3F0: .word 0x023187A0 +_022BD3F0: .word _02318770 + 0x20 arm_func_end ov00_022BD3B4 arm_func_start ov00_022BD3F4 @@ -825,7 +825,7 @@ _022BD428: blt _022BD404 ldmia sp!, {r4, r5, r6, pc} .align 2, 0 -_022BD438: .word 0x023187A0 +_022BD438: .word _02318770 + 0x20 arm_func_end ov00_022BD3F4 arm_func_start ov00_022BD43C @@ -847,14 +847,14 @@ ov00_022BD43C: ; 0x022BD43C mov r0, #1 ldmia sp!, {r4, r5, r6, pc} .align 2, 0 -_022BD47C: .word 0x023187A0 +_022BD47C: .word _02318770 + 0x20 arm_func_end ov00_022BD43C arm_func_start ov00_022BD480 ov00_022BD480: ; 0x022BD480 stmdb sp!, {lr} sub sp, sp, #0xc - ldr r2, _022BD4CC ; =0x0231D420 + ldr r2, _022BD4CC ; =_0231D420 mov r1, #0 strb r1, [r2, #2] ldr r0, _022BD4D0 ; =ov00_022BE058 @@ -872,7 +872,7 @@ ov00_022BD480: ; 0x022BD480 add sp, sp, #0xc ldmia sp!, {pc} .align 2, 0 -_022BD4CC: .word 0x0231D420 +_022BD4CC: .word _0231D420 _022BD4D0: .word ov00_022BE058 _022BD4D4: .word ov00_022BE044 _022BD4D8: .word ov00_022BE020 @@ -880,11 +880,11 @@ _022BD4D8: .word ov00_022BE020 arm_func_start ov00_022BD4DC ov00_022BD4DC: ; 0x022BD4DC - ldr r0, _022BD4E8 ; =0x0231D420 + ldr r0, _022BD4E8 ; =_0231D420 ldrb r0, [r0, #2] bx lr .align 2, 0 -_022BD4E8: .word 0x0231D420 +_022BD4E8: .word _0231D420 arm_func_end ov00_022BD4DC arm_func_start ov00_022BD4EC @@ -924,7 +924,7 @@ _022BD550: blt _022BD550 ldmia sp!, {r3, r4, r5, pc} .align 2, 0 -_022BD570: .word 0x023187A0 +_022BD570: .word _02318770 + 0x20 _022BD574: .word 0x00003FFF arm_func_end ov00_022BD4EC @@ -941,7 +941,7 @@ _022BD588: bne _022BD588 bx lr .align 2, 0 -_022BD59C: .word 0x023187A0 +_022BD59C: .word _02318770 + 0x20 arm_func_end ov00_022BD578 arm_func_start ov00_022BD5A0 @@ -957,7 +957,7 @@ _022BD5B0: bne _022BD5B0 bx lr .align 2, 0 -_022BD5C4: .word 0x023187A0 +_022BD5C4: .word _02318770 + 0x20 arm_func_end ov00_022BD5A0 arm_func_start ov00_022BD5C8 @@ -971,7 +971,7 @@ ov00_022BD5C8: ; 0x022BD5C8 and r0, r0, #0xff bx lr .align 2, 0 -_022BD5E8: .word 0x023187A0 +_022BD5E8: .word _02318770 + 0x20 arm_func_end ov00_022BD5C8 arm_func_start ov00_022BD5EC @@ -981,7 +981,7 @@ ov00_022BD5EC: ; 0x022BD5EC add r0, r0, #0x1b0 bx lr .align 2, 0 -_022BD5FC: .word 0x023187A0 +_022BD5FC: .word _02318770 + 0x20 arm_func_end ov00_022BD5EC arm_func_start ov00_022BD600 @@ -997,7 +997,7 @@ ov00_022BD600: ; 0x022BD600 and r0, r0, #0xff bx lr .align 2, 0 -_022BD628: .word 0x023187A0 +_022BD628: .word _02318770 + 0x20 _022BD62C: .word 0x00002710 arm_func_end ov00_022BD600 @@ -1009,7 +1009,7 @@ ov00_022BD630: ; 0x022BD630 ldrh r0, [r0, #0xe6] bx lr .align 2, 0 -_022BD644: .word 0x023187A0 +_022BD644: .word _02318770 + 0x20 arm_func_end ov00_022BD630 arm_func_start ov00_022BD648 @@ -1020,7 +1020,7 @@ ov00_022BD648: ; 0x022BD648 strh r0, [r1, #0xe6] bx lr .align 2, 0 -_022BD65C: .word 0x023187A0 +_022BD65C: .word _02318770 + 0x20 arm_func_end ov00_022BD648 arm_func_start ov00_022BD660 @@ -1036,7 +1036,7 @@ ov00_022BD660: ; 0x022BD660 and r0, r0, #0xff bx lr .align 2, 0 -_022BD688: .word 0x023187A0 +_022BD688: .word _02318770 + 0x20 _022BD68C: .word 0x00002710 arm_func_end ov00_022BD660 @@ -1048,7 +1048,7 @@ ov00_022BD690: ; 0x022BD690 ldrh r0, [r0, #0xe8] bx lr .align 2, 0 -_022BD6A4: .word 0x023187A0 +_022BD6A4: .word _02318770 + 0x20 arm_func_end ov00_022BD690 arm_func_start ov00_022BD6A8 @@ -1059,7 +1059,7 @@ ov00_022BD6A8: ; 0x022BD6A8 strh r0, [r1, #0xe8] bx lr .align 2, 0 -_022BD6BC: .word 0x023187A0 +_022BD6BC: .word _02318770 + 0x20 arm_func_end ov00_022BD6A8 arm_func_start ov00_022BD6C0 @@ -1071,7 +1071,7 @@ ov00_022BD6C0: ; 0x022BD6C0 strh r1, [r0, #0xe8] bx lr .align 2, 0 -_022BD6D8: .word 0x023187A0 +_022BD6D8: .word _02318770 + 0x20 _022BD6DC: .word 0x00003FFF arm_func_end ov00_022BD6C0 @@ -1082,7 +1082,7 @@ ov00_022BD6E0: ; 0x022BD6E0 ldrb r0, [r0, #0x1ea] bx lr .align 2, 0 -_022BD6F0: .word 0x023187A0 +_022BD6F0: .word _02318770 + 0x20 arm_func_end ov00_022BD6E0 arm_func_start ov00_022BD6F4 @@ -1092,7 +1092,7 @@ ov00_022BD6F4: ; 0x022BD6F4 ldrb r0, [r0, #0x1eb] bx lr .align 2, 0 -_022BD704: .word 0x023187A0 +_022BD704: .word _02318770 + 0x20 arm_func_end ov00_022BD6F4 arm_func_start ov00_022BD708 @@ -1102,7 +1102,7 @@ ov00_022BD708: ; 0x022BD708 ldrb r0, [r0, #0x1ec] bx lr .align 2, 0 -_022BD718: .word 0x023187A0 +_022BD718: .word _02318770 + 0x20 arm_func_end ov00_022BD708 arm_func_start ov00_022BD71C @@ -1112,7 +1112,7 @@ ov00_022BD71C: ; 0x022BD71C ldrb r0, [r0, #0x1ed] bx lr .align 2, 0 -_022BD72C: .word 0x023187A0 +_022BD72C: .word _02318770 + 0x20 arm_func_end ov00_022BD71C arm_func_start ov00_022BD730 @@ -1122,7 +1122,7 @@ ov00_022BD730: ; 0x022BD730 strb r0, [r1, #0x1ea] bx lr .align 2, 0 -_022BD740: .word 0x023187A0 +_022BD740: .word _02318770 + 0x20 arm_func_end ov00_022BD730 arm_func_start ov00_022BD744 @@ -1132,7 +1132,7 @@ ov00_022BD744: ; 0x022BD744 strb r0, [r1, #0x1eb] bx lr .align 2, 0 -_022BD754: .word 0x023187A0 +_022BD754: .word _02318770 + 0x20 arm_func_end ov00_022BD744 arm_func_start ov00_022BD758 @@ -1142,7 +1142,7 @@ ov00_022BD758: ; 0x022BD758 strb r0, [r1, #0x1ec] bx lr .align 2, 0 -_022BD768: .word 0x023187A0 +_022BD768: .word _02318770 + 0x20 arm_func_end ov00_022BD758 arm_func_start ov00_022BD76C @@ -1152,7 +1152,7 @@ ov00_022BD76C: ; 0x022BD76C strb r0, [r1, #0x1ed] bx lr .align 2, 0 -_022BD77C: .word 0x023187A0 +_022BD77C: .word _02318770 + 0x20 arm_func_end ov00_022BD76C arm_func_start ov00_022BD780 @@ -1162,7 +1162,7 @@ ov00_022BD780: ; 0x022BD780 ldr r0, [r0, #0xc] bx ip .align 2, 0 -_022BD790: .word 0x023187A0 +_022BD790: .word _02318770 + 0x20 _022BD794: .word ov00_022DB914 arm_func_end ov00_022BD780 @@ -1269,7 +1269,7 @@ ov00_022BD870: ; 0x022BD870 str ip, [sp, #0x10] bl ov00_022E1690 mov r1, #0 - ldr ip, _022BD8F4 ; =0x0231D420 + ldr ip, _022BD8F4 ; =_0231D420 ldr r2, _022BD8F8 ; =ov00_022BE008 mov r0, r4 mov r3, r1 @@ -1279,12 +1279,12 @@ ov00_022BD870: ; 0x022BD870 add sp, sp, #0x14 ldmia sp!, {r3, r4, pc} .align 2, 0 -_022BD8E0: .word 0x023187A0 +_022BD8E0: .word _02318770 + 0x20 _022BD8E4: .word 0x02317F54 _022BD8E8: .word 0x0231D490 _022BD8EC: .word 0x00002B1A _022BD8F0: .word 0x02317F44 -_022BD8F4: .word 0x0231D420 +_022BD8F4: .word _0231D420 _022BD8F8: .word ov00_022BE008 arm_func_end ov00_022BD870 @@ -1298,11 +1298,11 @@ _022BD904: .word ov00_022E1A84 arm_func_start ov00_022BD908 ov00_022BD908: ; 0x022BD908 - ldr r0, _022BD914 ; =0x0231D420 + ldr r0, _022BD914 ; =_0231D420 ldrb r0, [r0, #1] bx lr .align 2, 0 -_022BD914: .word 0x0231D420 +_022BD914: .word _0231D420 arm_func_end ov00_022BD908 arm_func_start ov00_022BD918 @@ -1358,7 +1358,7 @@ ov00_022BD980: ; 0x022BD980 strb r1, [r0, #1] ldmia sp!, {r3, pc} .align 2, 0 -_022BD998: .word 0x023187A0 +_022BD998: .word _02318770 + 0x20 arm_func_end ov00_022BD980 arm_func_start ov00_022BD99C @@ -1453,7 +1453,7 @@ ov00_022BDA74: ; 0x022BDA74 bl ov00_022EF4AC ldmia sp!, {r3, pc} .align 2, 0 -_022BDA90: .word 0x023187A0 +_022BDA90: .word _02318770 + 0x20 arm_func_end ov00_022BDA74 arm_func_start ov00_022BDA94 @@ -1463,7 +1463,7 @@ ov00_022BDA94: ; 0x022BDA94 ldr r1, _022BDAC0 ; =0x023187D0 ldr r2, _022BDAC4 ; =0x023187D8 bl ov00_022E1178 - ldr r0, _022BDAC8 ; =0x0231D420 + ldr r0, _022BDAC8 ; =_0231D420 mov r1, #0 str r1, [r0, #4] str r1, [r0, #8] @@ -1472,16 +1472,16 @@ ov00_022BDA94: ; 0x022BDA94 _022BDABC: .word ov00_022BE06C _022BDAC0: .word 0x023187D0 _022BDAC4: .word 0x023187D8 -_022BDAC8: .word 0x0231D420 +_022BDAC8: .word _0231D420 arm_func_end ov00_022BDA94 arm_func_start ov00_022BDACC ov00_022BDACC: ; 0x022BDACC - ldr r0, _022BDAD8 ; =0x0231D420 + ldr r0, _022BDAD8 ; =_0231D420 ldr r0, [r0, #8] bx lr .align 2, 0 -_022BDAD8: .word 0x0231D420 +_022BDAD8: .word _0231D420 arm_func_end ov00_022BDACC arm_func_start ov00_022BDADC @@ -1507,14 +1507,14 @@ ov00_022BDB04: ; 0x022BDB04 ldmeqia sp!, {r3, pc} bl ov00_022E1310 cmp r0, #0 - ldrne r0, _022BDB34 ; =0x0231D420 + ldrne r0, _022BDB34 ; =_0231D420 movne r1, #0 strne r1, [r0, #8] movne r0, #1 moveq r0, #0 ldmia sp!, {r3, pc} .align 2, 0 -_022BDB34: .word 0x0231D420 +_022BDB34: .word _0231D420 arm_func_end ov00_022BDB04 arm_func_start ov00_022BDB38 @@ -1525,14 +1525,14 @@ ov00_022BDB38: ; 0x022BDB38 ldmeqia sp!, {r3, pc} bl ov00_022E1334 cmp r0, #0 - ldrne r0, _022BDB68 ; =0x0231D420 + ldrne r0, _022BDB68 ; =_0231D420 movne r1, #0 strne r1, [r0, #8] movne r0, #1 moveq r0, #0 ldmia sp!, {r3, pc} .align 2, 0 -_022BDB68: .word 0x0231D420 +_022BDB68: .word _0231D420 arm_func_end ov00_022BDB38 arm_func_start ov00_022BDB6C @@ -1545,26 +1545,26 @@ ov00_022BDB6C: ; 0x022BDB6C ldmeqia sp!, {r3, pc} bl ov00_022E137C cmp r0, #0 - ldrne r0, _022BDBA4 ; =0x0231D420 + ldrne r0, _022BDBA4 ; =_0231D420 movne r1, #0 strne r1, [r0, #8] movne r0, #1 moveq r0, #0 ldmia sp!, {r3, pc} .align 2, 0 -_022BDBA4: .word 0x0231D420 +_022BDBA4: .word _0231D420 arm_func_end ov00_022BDB6C arm_func_start ov00_022BDBA8 ov00_022BDBA8: ; 0x022BDBA8 stmdb sp!, {r3, lr} - ldr r0, _022BDBE0 ; =0x0231D420 + ldr r0, _022BDBE0 ; =_0231D420 ldr r0, [r0, #8] cmp r0, #1 beq _022BDBD8 bl ov00_022E13B4 cmp r0, #0 - ldrne r1, _022BDBE0 ; =0x0231D420 + ldrne r1, _022BDBE0 ; =_0231D420 movne r0, #1 strne r0, [r1, #8] moveq r0, #0 @@ -1573,13 +1573,13 @@ _022BDBD8: mov r0, #1 ldmia sp!, {r3, pc} .align 2, 0 -_022BDBE0: .word 0x0231D420 +_022BDBE0: .word _0231D420 arm_func_end ov00_022BDBA8 arm_func_start ov00_022BDBE4 ov00_022BDBE4: ; 0x022BDBE4 stmdb sp!, {r3, lr} - ldr r0, _022BDC54 ; =0x0231D420 + ldr r0, _022BDC54 ; =_0231D420 ldr r1, [r0, #8] cmp r1, #1 movne r0, #0 @@ -1597,7 +1597,7 @@ _022BDC1C: bl ov00_022E1290 cmp r0, #0 beq _022BDC4C - ldr r0, _022BDC54 ; =0x0231D420 + ldr r0, _022BDC54 ; =_0231D420 ldr r1, [r0, #4] cmp r1, #0 moveq r1, #1 @@ -1610,7 +1610,7 @@ _022BDC4C: mov r0, #0 ldmia sp!, {r3, pc} .align 2, 0 -_022BDC54: .word 0x0231D420 +_022BDC54: .word _0231D420 _022BDC58: .word ov00_022BE080 arm_func_end ov00_022BDBE4 @@ -1851,7 +1851,7 @@ _022BDEEC: mov r0, r4 ldmia sp!, {r4, r5, r6, pc} .align 2, 0 -_022BDF18: .word 0x023187A0 +_022BDF18: .word _02318770 + 0x20 arm_func_end ov00_022BDE30 arm_func_start ov00_022BDF1C @@ -1917,72 +1917,72 @@ _022BDFFC: bl SetIrqFlag ldmia sp!, {r4, r5, r6, pc} .align 2, 0 -_022BE004: .word 0x023187A0 +_022BE004: .word _02318770 + 0x20 arm_func_end ov00_022BDF1C arm_func_start ov00_022BE008 ov00_022BE008: ; 0x022BE008 cmp r0, #0 - ldreq r0, _022BE01C ; =0x0231D420 + ldreq r0, _022BE01C ; =_0231D420 moveq r1, #1 streqb r1, [r0, #1] bx lr .align 2, 0 -_022BE01C: .word 0x0231D420 +_022BE01C: .word _0231D420 arm_func_end ov00_022BE008 arm_func_start ov00_022BE020 ov00_022BE020: ; 0x022BE020 cmp r0, #0 bxne lr - ldr r0, _022BE040 ; =0x0231D420 + ldr r0, _022BE040 ; =_0231D420 mov r2, #1 strb r2, [r0, #2] cmp r1, #0 strneb r2, [r0] bx lr .align 2, 0 -_022BE040: .word 0x0231D420 +_022BE040: .word _0231D420 arm_func_end ov00_022BE020 arm_func_start ov00_022BE044 ov00_022BE044: ; 0x022BE044 - ldr r0, _022BE054 ; =0x0231D420 + ldr r0, _022BE054 ; =_0231D420 mov r1, #1 strb r1, [r0] bx lr .align 2, 0 -_022BE054: .word 0x0231D420 +_022BE054: .word _0231D420 arm_func_end ov00_022BE044 arm_func_start ov00_022BE058 ov00_022BE058: ; 0x022BE058 - ldr r0, _022BE068 ; =0x0231D420 + ldr r0, _022BE068 ; =_0231D420 mov r1, #1 strb r1, [r0] bx lr .align 2, 0 -_022BE068: .word 0x0231D420 +_022BE068: .word _0231D420 arm_func_end ov00_022BE058 arm_func_start ov00_022BE06C ov00_022BE06C: ; 0x022BE06C - ldr r0, _022BE07C ; =0x0231D420 + ldr r0, _022BE07C ; =_0231D420 mov r1, #1 str r1, [r0, #8] bx lr .align 2, 0 -_022BE07C: .word 0x0231D420 +_022BE07C: .word _0231D420 arm_func_end ov00_022BE06C arm_func_start ov00_022BE080 ov00_022BE080: ; 0x022BE080 - ldr r0, _022BE090 ; =0x0231D420 + ldr r0, _022BE090 ; =_0231D420 mov r1, #2 str r1, [r0, #4] bx lr .align 2, 0 -_022BE090: .word 0x0231D420 +_022BE090: .word _0231D420 arm_func_end ov00_022BE080 arm_func_start ov00_022BE094 @@ -108536,8 +108536,11 @@ _02317F3C: .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfd, 0xfc, 0x1e, 0x66 - .byte 0x6a, 0xb2, 0x00, 0x00, 0x98, 0xd3, 0x31, 0x02, 0x90, 0xd3, 0x31, 0x02, 0x00, 0x00, 0x00, 0x00 - .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + .byte 0x6a, 0xb2, 0x00, 0x00, 0x98, 0xd3, 0x31, 0x02, 0x90, 0xd3, 0x31, 0x02 + + .data +_02318770: + .byte 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 @@ -109761,4 +109764,10 @@ _02317F3C: .byte 0x5c, 0x25, 0x73, 0x00, 0xcc, 0xd3, 0x31, 0x02, 0x51, 0x75, 0x65, 0x72, 0x79, 0x20, 0x45, 0x72 .byte 0x72, 0x6f, 0x72, 0x3a, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x25, 0x73, 0x2e, 0x6d .byte 0x73, 0x25, 0x64, 0x2e, 0x67, 0x73, 0x2e, 0x6e, 0x69, 0x6e, 0x74, 0x65, 0x6e, 0x64, 0x6f, 0x77 - .byte 0x69, 0x66, 0x69, 0x2e, 0x6e, 0x65, 0x74, 0x00, 0xff, 0xff, 0xff, 0xff + .byte 0x69, 0x66, 0x69, 0x2e, 0x6e, 0x65, 0x74, 0x00, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 + .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + + .bss +_0231D420: + .space 0xC100 diff --git a/asm/overlay_01.s b/asm/overlay_01.s index 79b79d3d..cbe0f005 100644 --- a/asm/overlay_01.s +++ b/asm/overlay_01.s @@ -25,7 +25,7 @@ _02329540: .word 0x0233C0C0 arm_func_start ov01_02329544 ov01_02329544: ; 0x02329544 stmdb sp!, {r3, lr} - ldr r0, _02329568 ; =0x0233C240 + ldr r0, _02329568 ; =_0233C240 mov r1, #3 str r1, [r0, #0x7c] mov r1, #0 @@ -34,7 +34,7 @@ ov01_02329544: ; 0x02329544 bl ov01_02329A38 ldmia sp!, {r3, pc} .align 2, 0 -_02329568: .word 0x0233C240 +_02329568: .word _0233C240 arm_func_end ov01_02329544 arm_func_start ov01_0232956C @@ -83,7 +83,7 @@ ov01_023295C4: ; 0x023295C4 bl ov01_0232AB88 ldmia sp!, {r3, pc} _023295DC: - ldr r1, _02329618 ; =0x0233C240 + ldr r1, _02329618 ; =_0233C240 ldrh r3, [r0, #0xa] ldrh r2, [r1] cmp r2, r3 @@ -100,7 +100,7 @@ _02329610: bl ov01_0232AB88 ldmia sp!, {r3, pc} .align 2, 0 -_02329618: .word 0x0233C240 +_02329618: .word _0233C240 arm_func_end ov01_023295C4 arm_func_start ov01_0232961C @@ -131,7 +131,7 @@ ov01_0232965C: ; 0x0232965C ldr r4, _02329828 ; =0x0233C0C0 mov lr, #0 str lr, [r4, #8] - ldr ip, _0232982C ; =0x0233C240 + ldr ip, _0232982C ; =_0233C240 str lr, [r4, #4] str lr, [ip, #0x7c] strh lr, [ip, #8] @@ -147,12 +147,12 @@ ov01_0232965C: ; 0x0232965C mov r1, #8 str lr, [ip, #0x18] bl MemAlloc - ldr r2, _0232982C ; =0x0233C240 + ldr r2, _0232982C ; =_0233C240 mov r1, #8 str r0, [r2, #0x10] mov r0, #0x60 bl MemAlloc - ldr r2, _0232982C ; =0x0233C240 + ldr r2, _0232982C ; =_0233C240 add r1, r0, #0x1f str r0, [r2, #0x24] bic r3, r1, #0x1f @@ -160,7 +160,7 @@ ov01_0232965C: ; 0x0232965C mov r1, #8 str r3, [r2, #0x20] bl MemAlloc - ldr r2, _0232982C ; =0x0233C240 + ldr r2, _0232982C ; =_0233C240 add r1, r0, #0x1f str r0, [r2, #0x70] bic r3, r1, #0x1f @@ -168,7 +168,7 @@ ov01_0232965C: ; 0x0232965C mov r1, #8 str r3, [r2, #0x28] bl MemAlloc - ldr r1, _0232982C ; =0x0233C240 + ldr r1, _0232982C ; =_0233C240 add r2, r0, #0x1f str r0, [r1, #0x38] bic r0, r2, #0x1f @@ -179,7 +179,7 @@ ov01_0232965C: ; 0x0232965C mov r0, #0x840 mov r1, #8 bl MemAlloc - ldr r2, _0232982C ; =0x0233C240 + ldr r2, _0232982C ; =_0233C240 add r1, r0, #0x1f str r0, [r2, #0x54] bic r3, r1, #0x1f @@ -187,18 +187,18 @@ ov01_0232965C: ; 0x0232965C mov r1, #8 str r3, [r2, #0x50] bl MemAlloc - ldr r1, _0232982C ; =0x0233C240 + ldr r1, _0232982C ; =_0233C240 add r2, r0, #0x1f str r0, [r1, #0x5c] bic r0, r2, #0x1f str r0, [r1, #0x58] _02329760: - ldr r0, _0232982C ; =0x0233C240 + ldr r0, _0232982C ; =_0233C240 mov r1, #0 str r1, [r0, #0x60] ldrh r1, [r4, #0x34] ldrh r0, [r4, #0x36] - ldr r2, _0232982C ; =0x0233C240 + ldr r2, _0232982C ; =_0233C240 add r1, r1, #0x23 add r0, r0, #0x21 bic r3, r1, #0x1f @@ -209,7 +209,7 @@ _02329760: mov r1, #8 str r3, [r2, #0x34] bl MemAlloc - ldr r1, _0232982C ; =0x0233C240 + ldr r1, _0232982C ; =_0233C240 add r2, r0, #0x1f str r0, [r1, #0x40] bic r0, r2, #0x1f @@ -227,12 +227,12 @@ _02329760: cmp r3, r0, lsl #1 mov r0, r0, lsl #1 movle r3, r0 - ldr r2, _0232982C ; =0x0233C240 + ldr r2, _0232982C ; =_0233C240 add r0, r3, #0x20 mov r1, #8 str r3, [r2, #0x44] bl MemAlloc - ldr r1, _0232982C ; =0x0233C240 + ldr r1, _0232982C ; =_0233C240 add r2, r0, #0x1f str r0, [r1, #0x1c] bic r0, r2, #0x1f @@ -245,7 +245,7 @@ _02329760: ldmia sp!, {r4, pc} .align 2, 0 _02329828: .word 0x0233C0C0 -_0232982C: .word 0x0233C240 +_0232982C: .word _0233C240 arm_func_end ov01_0232965C arm_func_start ov01_02329830 @@ -255,7 +255,7 @@ ov01_02329830: ; 0x02329830 mov r2, r1 mov r0, #0xd bl ov00_022BF308 - ldr r0, _023298E0 ; =0x0233C240 + ldr r0, _023298E0 ; =_0233C240 ldr r0, [r0, #0x7c] cmp r0, #0 cmpne r0, #2 @@ -263,32 +263,32 @@ ov01_02329830: ; 0x02329830 bl ov00_022BEB74 cmp r0, #0 ldmneia sp!, {r3, pc} - ldr r0, _023298E0 ; =0x0233C240 + ldr r0, _023298E0 ; =_0233C240 ldr r0, [r0, #0x1c] bl MemFree - ldr r0, _023298E0 ; =0x0233C240 + ldr r0, _023298E0 ; =_0233C240 ldr r0, [r0, #0x40] bl MemFree - ldr r0, _023298E0 ; =0x0233C240 + ldr r0, _023298E0 ; =_0233C240 ldr r1, [r0, #0x30] cmp r1, #0 beq _023298A0 ldr r0, [r0, #0x5c] bl MemFree - ldr r0, _023298E0 ; =0x0233C240 + ldr r0, _023298E0 ; =_0233C240 ldr r0, [r0, #0x54] bl MemFree _023298A0: - ldr r0, _023298E0 ; =0x0233C240 + ldr r0, _023298E0 ; =_0233C240 ldr r0, [r0, #0x38] bl MemFree - ldr r0, _023298E0 ; =0x0233C240 + ldr r0, _023298E0 ; =_0233C240 ldr r0, [r0, #0x70] bl MemFree - ldr r0, _023298E0 ; =0x0233C240 + ldr r0, _023298E0 ; =_0233C240 ldr r0, [r0, #0x24] bl MemFree - ldr r0, _023298E0 ; =0x0233C240 + ldr r0, _023298E0 ; =_0233C240 ldr r0, [r0, #0x10] bl MemFree ldr r0, _023298E4 ; =0x0233C0C0 @@ -296,7 +296,7 @@ _023298A0: str r1, [r0, #4] ldmia sp!, {r3, pc} .align 2, 0 -_023298E0: .word 0x0233C240 +_023298E0: .word _0233C240 _023298E4: .word 0x0233C0C0 arm_func_end ov01_02329830 @@ -309,7 +309,7 @@ ov01_023298E8: ; 0x023298E8 mov r4, r1 str r3, [r2, #0x10] bl ov00_022BF96C - ldr r2, _02329998 ; =0x0233C240 + ldr r2, _02329998 ; =_0233C240 ldr r1, _02329994 ; =0x0233C0C0 strh r0, [r2, #2] str r5, [r1, #0x14] @@ -352,7 +352,7 @@ _0232997C: ldmia sp!, {r3, r4, r5, pc} .align 2, 0 _02329994: .word 0x0233C0C0 -_02329998: .word 0x0233C240 +_02329998: .word _0233C240 arm_func_end ov01_023298E8 arm_func_start ov01_0232999C @@ -361,7 +361,7 @@ ov01_0232999C: ; 0x0232999C ldr r1, _02329A30 ; =0x0233C0C0 mov r2, #0 str r0, [r1, #0xc] - ldr r0, _02329A34 ; =0x0233C240 + ldr r0, _02329A34 ; =_0233C240 str r2, [r1, #0x10] ldr r1, [r0, #0x7c] cmp r1, #5 @@ -401,13 +401,13 @@ _02329A18: ldmia sp!, {r3, pc} .align 2, 0 _02329A30: .word 0x0233C0C0 -_02329A34: .word 0x0233C240 +_02329A34: .word _0233C240 arm_func_end ov01_0232999C arm_func_start ov01_02329A38 ov01_02329A38: ; 0x02329A38 stmdb sp!, {r3, lr} - ldr r0, _02329AA4 ; =0x0233C240 + ldr r0, _02329AA4 ; =_0233C240 ldr r1, [r0, #0x7c] cmp r1, #5 addls pc, pc, r1, lsl #2 @@ -438,13 +438,13 @@ _02329A8C: bl ov01_0232AB88 ldmia sp!, {r3, pc} .align 2, 0 -_02329AA4: .word 0x0233C240 +_02329AA4: .word _0233C240 arm_func_end ov01_02329A38 arm_func_start ov01_02329AA8 ov01_02329AA8: ; 0x02329AA8 stmdb sp!, {r3, lr} - ldr r0, _02329B14 ; =0x0233C240 + ldr r0, _02329B14 ; =_0233C240 ldr r1, [r0, #0x7c] cmp r1, #5 addls pc, pc, r1, lsl #2 @@ -475,31 +475,31 @@ _02329AFC: bl ov01_0232AB88 ldmia sp!, {r3, pc} .align 2, 0 -_02329B14: .word 0x0233C240 +_02329B14: .word _0233C240 arm_func_end ov01_02329AA8 arm_func_start ov01_02329B18 ov01_02329B18: ; 0x02329B18 - ldr r0, _02329B24 ; =0x0233C240 + ldr r0, _02329B24 ; =_0233C240 ldr r0, [r0, #0x7c] bx lr .align 2, 0 -_02329B24: .word 0x0233C240 +_02329B24: .word _0233C240 arm_func_end ov01_02329B18 arm_func_start ov01_02329B28 ov01_02329B28: ; 0x02329B28 - ldr r0, _02329B34 ; =0x0233C240 + ldr r0, _02329B34 ; =_0233C240 ldrh r0, [r0, #8] bx lr .align 2, 0 -_02329B34: .word 0x0233C240 +_02329B34: .word _0233C240 arm_func_end ov01_02329B28 arm_func_start ov01_02329B38 ov01_02329B38: ; 0x02329B38 stmdb sp!, {r3, lr} - ldr r2, _02329B6C ; =0x0233C240 + ldr r2, _02329B6C ; =_0233C240 ldr r3, [r2, #0x20] ldrh r3, [r3, #0x34] cmp r1, r3 @@ -512,13 +512,13 @@ ov01_02329B38: ; 0x02329B38 bl ov01_0232AD60 ldmia sp!, {r3, pc} .align 2, 0 -_02329B6C: .word 0x0233C240 +_02329B6C: .word _0233C240 arm_func_end ov01_02329B38 arm_func_start ov01_02329B70 ov01_02329B70: ; 0x02329B70 stmdb sp!, {r3, lr} - ldr r2, _02329BA4 ; =0x0233C240 + ldr r2, _02329BA4 ; =_0233C240 ldr r3, [r2, #0x4c] ldrh r3, [r3, #0x36] cmp r1, r3 @@ -531,41 +531,41 @@ ov01_02329B70: ; 0x02329B70 bl ov01_0232AD60 ldmia sp!, {r3, pc} .align 2, 0 -_02329BA4: .word 0x0233C240 +_02329BA4: .word _0233C240 arm_func_end ov01_02329B70 arm_func_start ov01_02329BA8 ov01_02329BA8: ; 0x02329BA8 - ldr r1, _02329BB4 ; =0x0233C240 + ldr r1, _02329BB4 ; =_0233C240 str r0, [r1, #0x2c] bx lr .align 2, 0 -_02329BB4: .word 0x0233C240 +_02329BB4: .word _0233C240 arm_func_end ov01_02329BA8 arm_func_start ov01_02329BB8 ov01_02329BB8: ; 0x02329BB8 - ldr r1, _02329BC4 ; =0x0233C240 + ldr r1, _02329BC4 ; =_0233C240 str r0, [r1, #0x18] bx lr .align 2, 0 -_02329BC4: .word 0x0233C240 +_02329BC4: .word _0233C240 arm_func_end ov01_02329BB8 arm_func_start ov01_02329BC8 ov01_02329BC8: ; 0x02329BC8 stmdb sp!, {r3, lr} - ldr r1, _02329C2C ; =0x0233C240 + ldr r1, _02329C2C ; =_0233C240 mov r2, #0x40 ldr r0, [r1, #0x4c] ldr r1, [r1, #0x20] bl sub_0207C330 - ldr r0, _02329C2C ; =0x0233C240 + ldr r0, _02329C2C ; =_0233C240 ldrh r1, [r0, #6] ldr r0, [r0, #0x20] strh r1, [r0, #0x32] bl ov00_022BF6F0 - ldr r2, _02329C2C ; =0x0233C240 + ldr r2, _02329C2C ; =_0233C240 ldr r1, _02329C30 ; =0x0233C0C0 ldr r3, [r2, #0x20] strh r0, [r3, #0x18] @@ -580,14 +580,14 @@ ov01_02329BC8: ; 0x02329BC8 strh r1, [r0, #4] ldmia sp!, {r3, pc} .align 2, 0 -_02329C2C: .word 0x0233C240 +_02329C2C: .word _0233C240 _02329C30: .word 0x0233C0C0 arm_func_end ov01_02329BC8 arm_func_start ov01_02329C34 ov01_02329C34: ; 0x02329C34 stmdb sp!, {r3, lr} - ldr r0, _02329CA4 ; =0x0233C240 + ldr r0, _02329CA4 ; =_0233C240 ldr r2, [r0, #0x6c] ldr r1, [r0, #0x28] str r2, [r1] @@ -596,7 +596,7 @@ ov01_02329C34: ; 0x02329C34 ldrh r1, [r1, #0x32] strh r1, [r0, #4] bl ov00_022BF780 - ldr r1, _02329CA4 ; =0x0233C240 + ldr r1, _02329CA4 ; =_0233C240 mov r2, #0xff ldr r3, [r1, #0x28] strh r0, [r3, #6] @@ -615,7 +615,7 @@ ov01_02329C34: ; 0x02329C34 bl ov01_02329CA8 ldmia sp!, {r3, pc} .align 2, 0 -_02329CA4: .word 0x0233C240 +_02329CA4: .word _0233C240 arm_func_end ov01_02329C34 arm_func_start ov01_02329CA8 @@ -625,7 +625,7 @@ ov01_02329CA8: ; 0x02329CA8 cmp r0, #0 moveq r0, #0 ldmeqia sp!, {r3, pc} - ldr r1, _02329D28 ; =0x0233C240 + ldr r1, _02329D28 ; =_0233C240 mov ip, #0 ldr lr, [r1, #0x28] mov r3, #1 @@ -638,7 +638,7 @@ _02329CD0: add r1, r2, r1, ror #28 tst r0, r3, lsl r1 beq _02329D14 - ldr r0, _02329D28 ; =0x0233C240 + ldr r0, _02329D28 ; =_0233C240 ldr r2, [r0, #0x28] ldrh r0, [r2, #4] add r0, r0, ip @@ -657,7 +657,7 @@ _02329D20: mov r0, #1 ldmia sp!, {r3, pc} .align 2, 0 -_02329D28: .word 0x0233C240 +_02329D28: .word _0233C240 arm_func_end ov01_02329CA8 arm_func_start ov01_02329D2C @@ -669,7 +669,7 @@ ov01_02329D2C: ; 0x02329D2C mov r4, r0 cmp r1, #0 bne _02329D90 - ldr r0, _02329DA8 ; =0x0233C240 + ldr r0, _02329DA8 ; =_0233C240 ldr r1, [r0, #0x78] cmp r1, #5 addls pc, pc, r1, lsl #2 @@ -692,7 +692,7 @@ _02329D88: bl ov01_0232AAEC b _02329D9C _02329D90: - ldr r0, _02329DA8 ; =0x0233C240 + ldr r0, _02329DA8 ; =_0233C240 mov r1, #2 str r1, [r0, #0x7c] _02329D9C: @@ -700,7 +700,7 @@ _02329D9C: bl SetIrqFlag ldmia sp!, {r4, pc} .align 2, 0 -_02329DA8: .word 0x0233C240 +_02329DA8: .word _0233C240 arm_func_end ov01_02329D2C arm_func_start ov01_02329DAC @@ -712,7 +712,7 @@ ov01_02329DAC: ; 0x02329DAC mov r4, r0 cmp r1, #0 bne _02329E44 - ldr r1, _02329E5C ; =0x0233C240 + ldr r1, _02329E5C ; =_0233C240 ldr r0, [r1, #0x78] cmp r0, #5 addls pc, pc, r0, lsl #2 @@ -749,7 +749,7 @@ _02329E2C: bl ov01_0232999C b _02329E50 _02329E44: - ldr r0, _02329E5C ; =0x0233C240 + ldr r0, _02329E5C ; =_0233C240 mov r1, #2 str r1, [r0, #0x7c] _02329E50: @@ -757,7 +757,7 @@ _02329E50: bl SetIrqFlag ldmia sp!, {r4, pc} .align 2, 0 -_02329E5C: .word 0x0233C240 +_02329E5C: .word _0233C240 _02329E60: .word 0x0233C0C0 arm_func_end ov01_02329DAC @@ -770,7 +770,7 @@ ov01_02329E64: ; 0x02329E64 mov r4, r0 cmp r1, #0 bne _02329FA8 - ldr r0, _02329FC0 ; =0x0233C240 + ldr r0, _02329FC0 ; =_0233C240 ldr r0, [r0, #0x78] cmp r0, #5 addls pc, pc, r0, lsl #2 @@ -789,7 +789,7 @@ _02329EB4: bl ov01_0232AB58 cmp r0, #0 beq _02329FB4 - ldr r1, _02329FC0 ; =0x0233C240 + ldr r1, _02329FC0 ; =_0233C240 ldr r0, [r1, #0x68] cmp r0, #1 mov r0, #0 @@ -815,7 +815,7 @@ _02329F08: bl ov01_0232AC00 cmp r0, #0 bne _02329FB4 - ldr r0, _02329FC0 ; =0x0233C240 + ldr r0, _02329FC0 ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 @@ -830,14 +830,14 @@ _02329F34: bne _02329F88 bl ov01_02329C34 cmp r0, #0 - ldreq r0, _02329FC0 ; =0x0233C240 + ldreq r0, _02329FC0 ; =_0233C240 moveq r1, #2 streq r1, [r0, #0x7c] beq _02329FB4 bl ov01_0232AC2C cmp r0, #0 bne _02329FB4 - ldr r0, _02329FC0 ; =0x0233C240 + ldr r0, _02329FC0 ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 @@ -846,13 +846,13 @@ _02329F88: bl ov01_0232AC78 cmp r0, #0 bne _02329FB4 - ldr r0, _02329FC0 ; =0x0233C240 + ldr r0, _02329FC0 ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 b _02329FB4 _02329FA8: - ldr r0, _02329FC0 ; =0x0233C240 + ldr r0, _02329FC0 ; =_0233C240 mov r1, #2 str r1, [r0, #0x7c] _02329FB4: @@ -860,7 +860,7 @@ _02329FB4: bl SetIrqFlag ldmia sp!, {r4, pc} .align 2, 0 -_02329FC0: .word 0x0233C240 +_02329FC0: .word _0233C240 _02329FC4: .word 0x0233C0C0 arm_func_end ov01_02329E64 @@ -873,7 +873,7 @@ ov01_02329FC8: ; 0x02329FC8 mov r4, r0 cmp r1, #0 bne _0232A02C - ldr r0, _0232A044 ; =0x0233C240 + ldr r0, _0232A044 ; =_0233C240 ldr r1, [r0, #0x78] cmp r1, #5 addls pc, pc, r1, lsl #2 @@ -896,7 +896,7 @@ _0232A024: bl ov01_0232AAEC b _0232A038 _0232A02C: - ldr r0, _0232A044 ; =0x0233C240 + ldr r0, _0232A044 ; =_0233C240 mov r1, #2 str r1, [r0, #0x7c] _0232A038: @@ -904,7 +904,7 @@ _0232A038: bl SetIrqFlag ldmia sp!, {r4, pc} .align 2, 0 -_0232A044: .word 0x0233C240 +_0232A044: .word _0233C240 arm_func_end ov01_02329FC8 arm_func_start ov01_0232A048 @@ -914,14 +914,14 @@ ov01_0232A048: ; 0x0232A048 bl EnableIrqFlag ldrh r1, [r4, #2] cmp r1, #8 - ldreq r1, _0232A074 ; =0x0233C240 + ldreq r1, _0232A074 ; =_0233C240 moveq r2, #2 streq r2, [r1, #0x78] streq r2, [r1, #0x7c] bl SetIrqFlag ldmia sp!, {r4, pc} .align 2, 0 -_0232A074: .word 0x0233C240 +_0232A074: .word _0233C240 arm_func_end ov01_0232A048 arm_func_start ov01_0232A078 @@ -933,7 +933,7 @@ ov01_0232A078: ; 0x0232A078 mov r4, r0 cmp r1, #0 bne _0232A174 - ldr r0, _0232A18C ; =0x0233C240 + ldr r0, _0232A18C ; =_0233C240 mov r1, #0 strh r1, [r0, #8] ldr r1, [r0, #0x18] @@ -942,7 +942,7 @@ ov01_0232A078: ; 0x0232A078 mov r0, r5 blx r1 _0232A0B4: - ldr r0, _0232A18C ; =0x0233C240 + ldr r0, _0232A18C ; =_0233C240 ldr r0, [r0, #0x78] cmp r0, #5 addls pc, pc, r0, lsl #2 @@ -962,7 +962,7 @@ _0232A0E8: bl ov01_0232AC00 cmp r0, #0 bne _0232A180 - ldr r0, _0232A18C ; =0x0233C240 + ldr r0, _0232A18C ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 @@ -974,14 +974,14 @@ _0232A10C: bne _0232A154 bl ov01_02329C34 cmp r0, #0 - ldreq r0, _0232A18C ; =0x0233C240 + ldreq r0, _0232A18C ; =_0233C240 moveq r1, #2 streq r1, [r0, #0x7c] beq _0232A180 bl ov01_0232AC2C cmp r0, #0 bne _0232A180 - ldr r0, _0232A18C ; =0x0233C240 + ldr r0, _0232A18C ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 @@ -990,13 +990,13 @@ _0232A154: bl ov01_0232AC78 cmp r0, #0 bne _0232A180 - ldr r0, _0232A18C ; =0x0233C240 + ldr r0, _0232A18C ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 b _0232A180 _0232A174: - ldr r0, _0232A18C ; =0x0233C240 + ldr r0, _0232A18C ; =_0233C240 mov r1, #2 str r1, [r0, #0x7c] _0232A180: @@ -1004,7 +1004,7 @@ _0232A180: bl SetIrqFlag ldmia sp!, {r3, r4, r5, pc} .align 2, 0 -_0232A18C: .word 0x0233C240 +_0232A18C: .word _0233C240 _0232A190: .word 0x0233C0C0 arm_func_end ov01_0232A078 @@ -1017,7 +1017,7 @@ ov01_0232A194: ; 0x0232A194 mov r4, r0 cmp r1, #0 bne _0232A218 - ldr r0, _0232A240 ; =0x0233C240 + ldr r0, _0232A240 ; =_0233C240 ldr r1, [r0, #0x78] cmp r1, #5 addls pc, pc, r1, lsl #2 @@ -1037,7 +1037,7 @@ _0232A1E4: bl ov00_022BFD9C cmp r0, #2 beq _0232A234 - ldr r0, _0232A240 ; =0x0233C240 + ldr r0, _0232A240 ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 @@ -1048,7 +1048,7 @@ _0232A208: bl ov01_0232AB88 b _0232A234 _0232A218: - ldr r0, _0232A240 ; =0x0233C240 + ldr r0, _0232A240 ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] ldrh r1, [r5, #2] @@ -1060,7 +1060,7 @@ _0232A234: bl SetIrqFlag ldmia sp!, {r3, r4, r5, pc} .align 2, 0 -_0232A240: .word 0x0233C240 +_0232A240: .word _0233C240 _0232A244: .word ov01_0232A24C _0232A248: .word 0x0233C0C0 arm_func_end ov01_0232A194 @@ -1094,7 +1094,7 @@ _0232A2A4: cmp r0, #0x1a b _0232A36C _0232A2AC: - ldr r0, _0232A378 ; =0x0233C240 + ldr r0, _0232A378 ; =_0233C240 mov r1, #0 strh r1, [r0, #8] ldr r1, [r0, #0x78] @@ -1115,7 +1115,7 @@ _0232A2E8: bl ov01_0232ACD8 cmp r0, #0 bne _0232A36C - ldr r0, _0232A378 ; =0x0233C240 + ldr r0, _0232A378 ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 @@ -1126,7 +1126,7 @@ _0232A308: bl ov01_0232AB88 b _0232A36C _0232A318: - ldr r0, _0232A378 ; =0x0233C240 + ldr r0, _0232A378 ; =_0233C240 ldr r1, [r0, #0x18] cmp r1, #0 beq _0232A36C @@ -1134,7 +1134,7 @@ _0232A318: blx r1 b _0232A36C _0232A334: - ldr r0, _0232A378 ; =0x0233C240 + ldr r0, _0232A378 ; =_0233C240 ldr r1, [r0, #0x18] cmp r1, #0 beq _0232A34C @@ -1146,7 +1146,7 @@ _0232A34C: str r1, [r0, #8] b _0232A36C _0232A35C: - ldr r0, _0232A378 ; =0x0233C240 + ldr r0, _0232A378 ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 @@ -1155,7 +1155,7 @@ _0232A36C: bl SetIrqFlag ldmia sp!, {r3, r4, r5, pc} .align 2, 0 -_0232A378: .word 0x0233C240 +_0232A378: .word _0233C240 _0232A37C: .word 0x0233C0C0 arm_func_end ov01_0232A24C @@ -1168,7 +1168,7 @@ ov01_0232A380: ; 0x0232A380 mov r4, r0 cmp r1, #0 bne _0232A508 - ldr r1, _0232A524 ; =0x0233C240 + ldr r1, _0232A524 ; =_0233C240 ldr r0, [r1, #0x78] cmp r0, #5 addls pc, pc, r0, lsl #2 @@ -1187,7 +1187,7 @@ _0232A3D0: bl ov01_0232AC58 cmp r0, #0 bne _0232A518 - ldr r0, _0232A524 ; =0x0233C240 + ldr r0, _0232A524 ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 @@ -1205,14 +1205,14 @@ _0232A3F0: ldr r0, [r1, #0x6c] mov r1, #0xc0 bl sub_0207A2A4 - ldr r1, _0232A524 ; =0x0233C240 + ldr r1, _0232A524 ; =_0233C240 ldr r0, [r1, #0x60] cmp r0, #0 ldr r0, [r1, #0x6c] beq _0232A458 bl sub_020851AC cmp r0, #0 - ldrne r0, _0232A524 ; =0x0233C240 + ldrne r0, _0232A524 ; =_0233C240 ldrne r1, [r0, #0x64] cmpne r1, #0 beq _0232A4C4 @@ -1242,7 +1242,7 @@ _0232A458: bl ov01_0232AC58 cmp r0, #0 bne _0232A518 - ldr r0, _0232A524 ; =0x0233C240 + ldr r0, _0232A524 ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 @@ -1254,7 +1254,7 @@ _0232A4C4: bl ov01_0232AC2C cmp r0, #0 bne _0232A518 - ldr r0, _0232A524 ; =0x0233C240 + ldr r0, _0232A524 ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 @@ -1267,7 +1267,7 @@ _0232A4F0: bl ov01_0232AB88 b _0232A518 _0232A508: - ldr r0, _0232A524 ; =0x0233C240 + ldr r0, _0232A524 ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 @@ -1276,7 +1276,7 @@ _0232A518: bl SetIrqFlag ldmia sp!, {r3, r4, r5, pc} .align 2, 0 -_0232A524: .word 0x0233C240 +_0232A524: .word _0233C240 _0232A528: .word 0x0233C0C0 arm_func_end ov01_0232A380 @@ -1289,7 +1289,7 @@ ov01_0232A52C: ; 0x0232A52C mov r4, r0 cmp r1, #0 bne _0232A5C0 - ldr r0, _0232A5DC ; =0x0233C240 + ldr r0, _0232A5DC ; =_0233C240 ldr r0, [r0, #0x78] cmp r0, #5 addls pc, pc, r0, lsl #2 @@ -1309,7 +1309,7 @@ _0232A57C: bl ov01_0232AC00 cmp r0, #0 bne _0232A5D0 - ldr r0, _0232A5DC ; =0x0233C240 + ldr r0, _0232A5DC ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 @@ -1318,13 +1318,13 @@ _0232A5A0: bl ov01_0232AC78 cmp r0, #0 bne _0232A5D0 - ldr r0, _0232A5DC ; =0x0233C240 + ldr r0, _0232A5DC ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 b _0232A5D0 _0232A5C0: - ldr r0, _0232A5DC ; =0x0233C240 + ldr r0, _0232A5DC ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 @@ -1333,7 +1333,7 @@ _0232A5D0: bl SetIrqFlag ldmia sp!, {r4, pc} .align 2, 0 -_0232A5DC: .word 0x0233C240 +_0232A5DC: .word _0233C240 arm_func_end ov01_0232A52C arm_func_start ov01_0232A5E0 @@ -1345,7 +1345,7 @@ ov01_0232A5E0: ; 0x0232A5E0 mov r4, r0 cmp r1, #0 bne _0232A6E8 - ldr r0, _0232A748 ; =0x0233C240 + ldr r0, _0232A748 ; =_0233C240 ldr r1, [r0, #0x78] cmp r1, #5 addls pc, pc, r1, lsl #2 @@ -1388,7 +1388,7 @@ _0232A670: bl ov01_0232ACD8 cmp r0, #0 bne _0232A73C - ldr r0, _0232A748 ; =0x0233C240 + ldr r0, _0232A748 ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 @@ -1406,7 +1406,7 @@ _0232A6BC: str r1, [r0, #8] b _0232A73C _0232A6CC: - ldr r0, _0232A748 ; =0x0233C240 + ldr r0, _0232A748 ; =_0233C240 mov r1, #3 str r1, [r0, #0x7c] mov r1, #0 @@ -1416,7 +1416,7 @@ _0232A6CC: _0232A6E8: cmp r1, #0xb bne _0232A708 - ldr r0, _0232A748 ; =0x0233C240 + ldr r0, _0232A748 ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] ldrh r1, [r5, #2] @@ -1425,11 +1425,11 @@ _0232A6E8: _0232A708: ldrh r0, [r5, #2] cmp r0, #0xc - ldreq r0, _0232A748 ; =0x0233C240 + ldreq r0, _0232A748 ; =_0233C240 moveq r1, #5 streq r1, [r0, #0x78] beq _0232A738 - ldr r0, _0232A748 ; =0x0233C240 + ldr r0, _0232A748 ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] ldrh r1, [r5, #2] @@ -1442,7 +1442,7 @@ _0232A73C: bl SetIrqFlag ldmia sp!, {r3, r4, r5, pc} .align 2, 0 -_0232A748: .word 0x0233C240 +_0232A748: .word _0233C240 _0232A74C: .word 0x0233C0C0 arm_func_end ov01_0232A5E0 @@ -1464,7 +1464,7 @@ ov01_0232A750: ; 0x0232A750 cmpne r0, #0xc b _0232A8A4 _0232A78C: - ldr r0, _0232A8B4 ; =0x0233C240 + ldr r0, _0232A8B4 ; =_0233C240 ldr r1, [r0, #0x78] cmp r1, #5 addls pc, pc, r1, lsl #2 @@ -1495,20 +1495,20 @@ _0232A7C0: movhi ip, r5 mov r2, r0, lsr #0x10 str ip, [sp] - ldr r0, _0232A8B4 ; =0x0233C240 + ldr r0, _0232A8B4 ; =_0233C240 ldrh r3, [r3, #0x36] ldr r0, [r0, #0x50] mov r1, #0xc bl ov00_022C0810 cmp r0, #0 movne r1, #0 - ldreq r0, _0232A8B4 ; =0x0233C240 + ldreq r0, _0232A8B4 ; =_0233C240 moveq r1, #1 streq r1, [r0, #0x14] cmp r1, #0 movne r5, #1 bne _0232A848 - ldr r0, _0232A8B4 ; =0x0233C240 + ldr r0, _0232A8B4 ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 @@ -1518,7 +1518,7 @@ _0232A844: _0232A848: cmp r5, #0 beq _0232A8A4 - ldr r0, _0232A8B4 ; =0x0233C240 + ldr r0, _0232A8B4 ; =_0233C240 mov r1, #1 str r1, [r0, #0x74] ldr r1, [r0, #0x78] @@ -1534,7 +1534,7 @@ _0232A87C: cmpne r1, #0xd cmpne r1, #0xf beq _0232A8A4 - ldr r0, _0232A8B4 ; =0x0233C240 + ldr r0, _0232A8B4 ; =_0233C240 mov r1, #3 str r1, [r0, #0x7c] mov r1, #0 @@ -1546,7 +1546,7 @@ _0232A8A4: add sp, sp, #4 ldmia sp!, {r3, r4, r5, r6, pc} .align 2, 0 -_0232A8B4: .word 0x0233C240 +_0232A8B4: .word _0233C240 arm_func_end ov01_0232A750 arm_func_start ov01_0232A8B8 @@ -1572,7 +1572,7 @@ ov01_0232A8DC: ; 0x0232A8DC mov r4, r0 cmp r1, #0 bne _0232A914 - ldr r0, _0232A930 ; =0x0233C240 + ldr r0, _0232A930 ; =_0233C240 ldr r1, [r0, #0x18] cmp r1, #0 beq _0232A924 @@ -1580,7 +1580,7 @@ ov01_0232A8DC: ; 0x0232A8DC blx r1 b _0232A924 _0232A914: - ldr r0, _0232A930 ; =0x0233C240 + ldr r0, _0232A930 ; =_0233C240 mov r1, #0 str r1, [r0, #0x78] bl ov01_0232AB88 @@ -1589,7 +1589,7 @@ _0232A924: bl SetIrqFlag ldmia sp!, {r3, r4, r5, pc} .align 2, 0 -_0232A930: .word 0x0233C240 +_0232A930: .word _0233C240 arm_func_end ov01_0232A8DC arm_func_start ov01_0232A934 @@ -1597,7 +1597,7 @@ ov01_0232A934: ; 0x0232A934 stmdb sp!, {r3, r4, r5, lr} mov r5, r0 bl EnableIrqFlag - ldr r1, _0232A970 ; =0x0233C240 + ldr r1, _0232A970 ; =_0233C240 mov r2, #1 str r2, [r1, #0x74] ldr r1, [r1, #0x18] @@ -1611,7 +1611,7 @@ _0232A964: bl SetIrqFlag ldmia sp!, {r3, r4, r5, pc} .align 2, 0 -_0232A970: .word 0x0233C240 +_0232A970: .word _0233C240 arm_func_end ov01_0232A934 arm_func_start ov01_0232A974 @@ -1639,7 +1639,7 @@ _0232A9C0: cmp r0, #0x1a b _0232AA7C _0232A9C8: - ldr r0, _0232AA88 ; =0x0233C240 + ldr r0, _0232AA88 ; =_0233C240 ldr r1, [r0, #0x7c] cmp r1, #4 beq _0232A9E4 @@ -1665,7 +1665,7 @@ _0232AA04: blx r3 b _0232AA7C _0232AA24: - ldr r0, _0232AA88 ; =0x0233C240 + ldr r0, _0232AA88 ; =_0233C240 ldr r1, [r0, #0x7c] cmp r1, #4 beq _0232AA40 @@ -1694,7 +1694,7 @@ _0232AA7C: bl SetIrqFlag ldmia sp!, {r3, r4, r5, pc} .align 2, 0 -_0232AA88: .word 0x0233C240 +_0232AA88: .word _0233C240 arm_func_end ov01_0232A974 arm_func_start ov01_0232AA8C @@ -1703,7 +1703,7 @@ ov01_0232AA8C: ; 0x0232AA8C ldr r0, _0232AAB4 ; =ov01_02329D2C bl ov00_022BF9E0 cmp r0, #2 - ldrne r0, _0232AAB8 ; =0x0233C240 + ldrne r0, _0232AAB8 ; =_0233C240 movne r1, #2 strne r1, [r0, #0x7c] movne r0, #0 @@ -1711,7 +1711,7 @@ ov01_0232AA8C: ; 0x0232AA8C ldmia sp!, {r3, pc} .align 2, 0 _0232AAB4: .word ov01_02329D2C -_0232AAB8: .word 0x0233C240 +_0232AAB8: .word _0233C240 arm_func_end ov01_0232AA8C arm_func_start ov01_0232AABC @@ -1720,7 +1720,7 @@ ov01_0232AABC: ; 0x0232AABC ldr r0, _0232AAE4 ; =ov01_02329DAC bl ov00_022BFA54 cmp r0, #2 - ldrne r0, _0232AAE8 ; =0x0233C240 + ldrne r0, _0232AAE8 ; =_0233C240 movne r1, #2 strne r1, [r0, #0x7c] movne r0, #0 @@ -1728,26 +1728,26 @@ ov01_0232AABC: ; 0x0232AABC ldmia sp!, {r3, pc} .align 2, 0 _0232AAE4: .word ov01_02329DAC -_0232AAE8: .word 0x0233C240 +_0232AAE8: .word _0233C240 arm_func_end ov01_0232AABC arm_func_start ov01_0232AAEC ov01_0232AAEC: ; 0x0232AAEC stmdb sp!, {r3, lr} - ldr r1, _0232AB20 ; =0x0233C240 + ldr r1, _0232AB20 ; =_0233C240 mov r2, #1 ldr r0, _0232AB24 ; =ov01_02329E64 str r2, [r1, #0x68] bl ov00_022BFA94 cmp r0, #2 - ldrne r0, _0232AB20 ; =0x0233C240 + ldrne r0, _0232AB20 ; =_0233C240 movne r1, #2 strne r1, [r0, #0x7c] movne r0, #0 moveq r0, #1 ldmia sp!, {r3, pc} .align 2, 0 -_0232AB20: .word 0x0233C240 +_0232AB20: .word _0233C240 _0232AB24: .word ov01_02329E64 arm_func_end ov01_0232AAEC @@ -1757,7 +1757,7 @@ ov01_0232AB28: ; 0x0232AB28 ldr r0, _0232AB50 ; =ov01_02329FC8 bl ov00_022BFAD4 cmp r0, #2 - ldrne r0, _0232AB54 ; =0x0233C240 + ldrne r0, _0232AB54 ; =_0233C240 movne r1, #2 strne r1, [r0, #0x7c] movne r0, #0 @@ -1765,7 +1765,7 @@ ov01_0232AB28: ; 0x0232AB28 ldmia sp!, {r3, pc} .align 2, 0 _0232AB50: .word ov01_02329FC8 -_0232AB54: .word 0x0233C240 +_0232AB54: .word _0233C240 arm_func_end ov01_0232AB28 arm_func_start ov01_0232AB58 @@ -1774,7 +1774,7 @@ ov01_0232AB58: ; 0x0232AB58 ldr r0, _0232AB80 ; =ov01_0232A048 bl ov00_022BF2C4 cmp r0, #0 - ldrne r0, _0232AB84 ; =0x0233C240 + ldrne r0, _0232AB84 ; =_0233C240 movne r1, #2 strne r1, [r0, #0x7c] movne r0, #0 @@ -1782,13 +1782,13 @@ ov01_0232AB58: ; 0x0232AB58 ldmia sp!, {r3, pc} .align 2, 0 _0232AB80: .word ov01_0232A048 -_0232AB84: .word 0x0233C240 +_0232AB84: .word _0233C240 arm_func_end ov01_0232AB58 arm_func_start ov01_0232AB88 ov01_0232AB88: ; 0x0232AB88 stmdb sp!, {r3, lr} - ldr r0, _0232ABF8 ; =0x0233C240 + ldr r0, _0232ABF8 ; =_0233C240 ldr r1, [r0, #0x14] cmp r1, #0 beq _0232ABBC @@ -1797,11 +1797,11 @@ ov01_0232AB88: ; 0x0232AB88 cmp r0, #0 movne r0, #0 ldmneia sp!, {r3, pc} - ldr r0, _0232ABF8 ; =0x0233C240 + ldr r0, _0232ABF8 ; =_0233C240 mov r1, #0 str r1, [r0, #0x14] _0232ABBC: - ldr r0, _0232ABF8 ; =0x0233C240 + ldr r0, _0232ABF8 ; =_0233C240 ldr r1, [r0, #0x7c] cmp r1, #3 cmpne r1, #2 @@ -1810,21 +1810,21 @@ _0232ABBC: ldr r0, _0232ABFC ; =ov01_0232A078 bl ov00_022BFB9C cmp r0, #2 - ldrne r0, _0232ABF8 ; =0x0233C240 + ldrne r0, _0232ABF8 ; =_0233C240 movne r1, #2 strne r1, [r0, #0x7c] movne r0, #0 moveq r0, #1 ldmia sp!, {r3, pc} .align 2, 0 -_0232ABF8: .word 0x0233C240 +_0232ABF8: .word _0233C240 _0232ABFC: .word ov01_0232A078 arm_func_end ov01_0232AB88 arm_func_start ov01_0232AC00 ov01_0232AC00: ; 0x0232AC00 stmdb sp!, {r3, lr} - ldr r1, _0232AC24 ; =0x0233C240 + ldr r1, _0232AC24 ; =_0233C240 ldr r0, _0232AC28 ; =ov01_0232A194 ldr r1, [r1, #0x20] bl ov00_022BFC14 @@ -1833,14 +1833,14 @@ ov01_0232AC00: ; 0x0232AC00 movne r0, #0 ldmia sp!, {r3, pc} .align 2, 0 -_0232AC24: .word 0x0233C240 +_0232AC24: .word _0233C240 _0232AC28: .word ov01_0232A194 arm_func_end ov01_0232AC00 arm_func_start ov01_0232AC2C ov01_0232AC2C: ; 0x0232AC2C stmdb sp!, {r3, lr} - ldr r1, _0232AC50 ; =0x0233C240 + ldr r1, _0232AC50 ; =_0233C240 ldr r0, _0232AC54 ; =ov01_0232A380 ldr r1, [r1, #0x28] bl ov00_022BFDEC @@ -1849,7 +1849,7 @@ ov01_0232AC2C: ; 0x0232AC2C movne r0, #0 ldmia sp!, {r3, pc} .align 2, 0 -_0232AC50: .word 0x0233C240 +_0232AC50: .word _0233C240 _0232AC54: .word ov01_0232A380 arm_func_end ov01_0232AC2C @@ -1875,7 +1875,7 @@ ov01_0232AC78: ; 0x0232AC78 mov r3, #1 cmp r1, #0 bne _0232ACAC - ldr r0, _0232ACD0 ; =0x0233C240 + ldr r0, _0232ACD0 ; =_0233C240 str r2, [sp] ldr r1, [r0, #0x6c] ldr r0, _0232ACD4 ; =ov01_0232A5E0 @@ -1893,7 +1893,7 @@ _0232ACBC: ldmia sp!, {r3, pc} .align 2, 0 _0232ACCC: .word 0x0233C0C0 -_0232ACD0: .word 0x0233C240 +_0232ACD0: .word _0233C240 _0232ACD4: .word ov01_0232A5E0 arm_func_end ov01_0232AC78 @@ -1901,7 +1901,7 @@ _0232ACD4: .word ov01_0232A5E0 ov01_0232ACD8: ; 0x0232ACD8 stmdb sp!, {r3, lr} sub sp, sp, #8 - ldr r0, _0232AD54 ; =0x0233C240 + ldr r0, _0232AD54 ; =_0233C240 ldr r0, [r0, #0x30] cmp r0, #0 bne _0232AD0C @@ -1913,7 +1913,7 @@ ov01_0232ACD8: ; 0x0232ACD8 movne r0, #0 bne _0232AD4C _0232AD0C: - ldr r3, _0232AD54 ; =0x0233C240 + ldr r3, _0232AD54 ; =_0233C240 mov r2, #1 ldr r1, [r3, #0x34] ldr r0, _0232AD5C ; =ov01_0232A750 @@ -1933,7 +1933,7 @@ _0232AD4C: add sp, sp, #8 ldmia sp!, {r3, pc} .align 2, 0 -_0232AD54: .word 0x0233C240 +_0232AD54: .word _0233C240 _0232AD58: .word ov01_0232A974 _0232AD5C: .word ov01_0232A750 arm_func_end ov01_0232ACD8 @@ -1954,7 +1954,7 @@ ov01_0232AD60: ; 0x0232AD60 str ip, [sp, #8] bl ov00_022C0498 cmp r0, #2 - ldrne r0, _0232ADBC ; =0x0233C240 + ldrne r0, _0232ADBC ; =_0233C240 movne r1, #1 strne r1, [r0, #0x74] movne r0, #0 @@ -1964,7 +1964,7 @@ ov01_0232AD60: ; 0x0232AD60 .align 2, 0 _0232ADB4: .word 0x0000FFFF _0232ADB8: .word ov01_0232A934 -_0232ADBC: .word 0x0233C240 +_0232ADBC: .word _0233C240 arm_func_end ov01_0232AD60 arm_func_start ov01_0232ADC0 @@ -21408,3 +21408,7 @@ _0233AE74: .word 0x0233C0A4 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + + .bss +_0233C240: + .space 0x840 diff --git a/asm/overlay_02.s b/asm/overlay_02.s index 216b7f52..6c142294 100644 --- a/asm/overlay_02.s +++ b/asm/overlay_02.s @@ -242,14 +242,14 @@ ov02_023297C8: ; 0x023297C8 mov r1, #4 str r2, [r4, #0x20] bl ov02_02329560 - ldr r0, _0232983C ; =0x023544C0 + ldr r0, _0232983C ; =_023544C0 ldr r0, [r0] cmp r0, #0 bne _02329828 ldr r0, _02329840 ; =0x023544C4 mov r1, #4 bl ov02_02329560 - ldr r0, _0232983C ; =0x023544C0 + ldr r0, _0232983C ; =_023544C0 mov r1, #1 str r1, [r0] _02329828: @@ -259,7 +259,7 @@ _02329828: bl ov02_023295A4 ldmia sp!, {r4, pc} .align 2, 0 -_0232983C: .word 0x023544C0 +_0232983C: .word _023544C0 _02329840: .word 0x023544C4 arm_func_end ov02_023297C8 @@ -54287,3 +54287,7 @@ _0234FBC4: .word 0x0235ABE8 .byte 0x6B, 0x63, 0x5F, 0x6D, 0x2E, 0x4E, 0x46, 0x54, 0x52, 0x2E, 0x6C, 0x00, 0x6D, 0x73, 0x67, 0x2F .byte 0x6C, 0x63, 0x5F, 0x6D, 0x2E, 0x4E, 0x46, 0x54, 0x52, 0x2E, 0x6C, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + + .bss +_023544C0: + .space 0x6740 diff --git a/asm/overlay_03.s b/asm/overlay_03.s index de6514d9..05bdad6d 100644 --- a/asm/overlay_03.s +++ b/asm/overlay_03.s @@ -6,75 +6,75 @@ arm_func_start ov03_0233CA80 ov03_0233CA80: ; 0x0233CA80 ldr ip, _0233CA90 ; =MemZero - ldr r0, _0233CA94 ; =0x02346BE0 + ldr r0, _0233CA94 ; =_02346BE0 mov r1, #0x10 bx ip .align 2, 0 _0233CA90: .word MemZero -_0233CA94: .word 0x02346BE0 +_0233CA94: .word _02346BE0 arm_func_end ov03_0233CA80 arm_func_start ov03_0233CA98 ov03_0233CA98: ; 0x0233CA98 - ldr r1, _0233CAA4 ; =0x02346BE0 + ldr r1, _0233CAA4 ; =_02346BE0 str r0, [r1] bx lr .align 2, 0 -_0233CAA4: .word 0x02346BE0 +_0233CAA4: .word _02346BE0 arm_func_end ov03_0233CA98 arm_func_start ov03_0233CAA8 ov03_0233CAA8: ; 0x0233CAA8 - ldr r1, _0233CAB4 ; =0x02346BE0 + ldr r1, _0233CAB4 ; =_02346BE0 str r0, [r1, #4] bx lr .align 2, 0 -_0233CAB4: .word 0x02346BE0 +_0233CAB4: .word _02346BE0 arm_func_end ov03_0233CAA8 arm_func_start ov03_0233CAB8 ov03_0233CAB8: ; 0x0233CAB8 - ldr r0, _0233CAC4 ; =0x02346BE0 + ldr r0, _0233CAC4 ; =_02346BE0 ldr r0, [r0, #4] bx lr .align 2, 0 -_0233CAC4: .word 0x02346BE0 +_0233CAC4: .word _02346BE0 arm_func_end ov03_0233CAB8 arm_func_start ov03_0233CAC8 ov03_0233CAC8: ; 0x0233CAC8 - ldr r1, _0233CAD4 ; =0x02346BE0 + ldr r1, _0233CAD4 ; =_02346BE0 str r0, [r1, #8] bx lr .align 2, 0 -_0233CAD4: .word 0x02346BE0 +_0233CAD4: .word _02346BE0 arm_func_end ov03_0233CAC8 arm_func_start ov03_0233CAD8 ov03_0233CAD8: ; 0x0233CAD8 - ldr r0, _0233CAE4 ; =0x02346BE0 + ldr r0, _0233CAE4 ; =_02346BE0 ldr r0, [r0, #8] bx lr .align 2, 0 -_0233CAE4: .word 0x02346BE0 +_0233CAE4: .word _02346BE0 arm_func_end ov03_0233CAD8 arm_func_start ov03_0233CAE8 ov03_0233CAE8: ; 0x0233CAE8 - ldr r1, _0233CAF4 ; =0x02346BE0 + ldr r1, _0233CAF4 ; =_02346BE0 str r0, [r1, #0xc] bx lr .align 2, 0 -_0233CAF4: .word 0x02346BE0 +_0233CAF4: .word _02346BE0 arm_func_end ov03_0233CAE8 arm_func_start ov03_0233CAF8 ov03_0233CAF8: ; 0x0233CAF8 - ldr r0, _0233CB04 ; =0x02346BE0 + ldr r0, _0233CB04 ; =_02346BE0 ldr r0, [r0, #0xc] bx lr .align 2, 0 -_0233CB04: .word 0x02346BE0 +_0233CB04: .word _02346BE0 arm_func_end ov03_0233CAF8 arm_func_start ov03_0233CB08 @@ -11211,3 +11211,7 @@ _02346734: .word 0x02346BDC .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x7A, 0x38, 0x7B, 0x38, 0x7C, 0x38, 0x00, 0x00 + + .bss +_02346BE0: + .space 0x20 diff --git a/asm/overlay_04.s b/asm/overlay_04.s index dcaf65ca..083b402f 100644 --- a/asm/overlay_04.s +++ b/asm/overlay_04.s @@ -6,66 +6,66 @@ arm_func_start ov04_0233CA80 ov04_0233CA80: ; 0x0233CA80 ldr ip, _0233CA90 ; =MemZero - ldr r0, _0233CA94 ; =0x0233F660 + ldr r0, _0233CA94 ; =_0233F660 mov r1, #0x10 bx ip .align 2, 0 _0233CA90: .word MemZero -_0233CA94: .word 0x0233F660 +_0233CA94: .word _0233F660 arm_func_end ov04_0233CA80 arm_func_start ov04_0233CA98 ov04_0233CA98: ; 0x0233CA98 - ldr r1, _0233CAA4 ; =0x0233F660 + ldr r1, _0233CAA4 ; =_0233F660 str r0, [r1] bx lr .align 2, 0 -_0233CAA4: .word 0x0233F660 +_0233CAA4: .word _0233F660 arm_func_end ov04_0233CA98 arm_func_start ov04_0233CAA8 ov04_0233CAA8: ; 0x0233CAA8 - ldr r0, _0233CAB4 ; =0x0233F660 + ldr r0, _0233CAB4 ; =_0233F660 ldr r0, [r0] bx lr .align 2, 0 -_0233CAB4: .word 0x0233F660 +_0233CAB4: .word _0233F660 arm_func_end ov04_0233CAA8 arm_func_start ov04_0233CAB8 ov04_0233CAB8: ; 0x0233CAB8 - ldr r1, _0233CAC4 ; =0x0233F660 + ldr r1, _0233CAC4 ; =_0233F660 str r0, [r1, #4] bx lr .align 2, 0 -_0233CAC4: .word 0x0233F660 +_0233CAC4: .word _0233F660 arm_func_end ov04_0233CAB8 arm_func_start ov04_0233CAC8 ov04_0233CAC8: ; 0x0233CAC8 - ldr r0, _0233CAD4 ; =0x0233F660 + ldr r0, _0233CAD4 ; =_0233F660 ldr r0, [r0, #4] bx lr .align 2, 0 -_0233CAD4: .word 0x0233F660 +_0233CAD4: .word _0233F660 arm_func_end ov04_0233CAC8 arm_func_start ov04_0233CAD8 ov04_0233CAD8: ; 0x0233CAD8 - ldr r1, _0233CAE4 ; =0x0233F660 + ldr r1, _0233CAE4 ; =_0233F660 strb r0, [r1, #0xc] bx lr .align 2, 0 -_0233CAE4: .word 0x0233F660 +_0233CAE4: .word _0233F660 arm_func_end ov04_0233CAD8 arm_func_start ov04_0233CAE8 ov04_0233CAE8: ; 0x0233CAE8 - ldr r0, _0233CAF4 ; =0x0233F660 + ldr r0, _0233CAF4 ; =_0233F660 ldrb r0, [r0, #0xc] bx lr .align 2, 0 -_0233CAF4: .word 0x0233F660 +_0233CAF4: .word _0233F660 arm_func_end ov04_0233CAE8 arm_func_start ov04_0233CAF8 @@ -3147,3 +3147,7 @@ _0233F564: .word 0x0233F644 .byte 0x45, 0x44, 0x41, 0x54, 0x2F, 0x69, 0x74, 0x65, 0x6D, 0x30, 0x30, 0x2E, 0x64, 0x61, 0x74, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + + .bss +_0233F660: + .space 0x20 diff --git a/asm/overlay_05.s b/asm/overlay_05.s index d75b07fa..30ca443c 100644 --- a/asm/overlay_05.s +++ b/asm/overlay_05.s @@ -6,39 +6,39 @@ arm_func_start ov05_0233CA80 ov05_0233CA80: ; 0x0233CA80 ldr ip, _0233CA90 ; =MemZero - ldr r0, _0233CA94 ; =0x0233FCC0 + ldr r0, _0233CA94 ; =_0233FCC0 mov r1, #0xc bx ip .align 2, 0 _0233CA90: .word MemZero -_0233CA94: .word 0x0233FCC0 +_0233CA94: .word _0233FCC0 arm_func_end ov05_0233CA80 arm_func_start ov05_0233CA98 ov05_0233CA98: ; 0x0233CA98 - ldr r1, _0233CAA4 ; =0x0233FCC0 + ldr r1, _0233CAA4 ; =_0233FCC0 str r0, [r1] bx lr .align 2, 0 -_0233CAA4: .word 0x0233FCC0 +_0233CAA4: .word _0233FCC0 arm_func_end ov05_0233CA98 arm_func_start ov05_0233CAA8 ov05_0233CAA8: ; 0x0233CAA8 - ldr r0, _0233CAB4 ; =0x0233FCC0 + ldr r0, _0233CAB4 ; =_0233FCC0 ldr r0, [r0] bx lr .align 2, 0 -_0233CAB4: .word 0x0233FCC0 +_0233CAB4: .word _0233FCC0 arm_func_end ov05_0233CAA8 arm_func_start ov05_0233CAB8 ov05_0233CAB8: ; 0x0233CAB8 - ldr r1, _0233CAC4 ; =0x0233FCC0 + ldr r1, _0233CAC4 ; =_0233FCC0 str r0, [r1, #4] bx lr .align 2, 0 -_0233CAC4: .word 0x0233FCC0 +_0233CAC4: .word _0233FCC0 arm_func_end ov05_0233CAB8 arm_func_start ov05_0233CAC8 @@ -3545,3 +3545,7 @@ _0233FB48: .word 0x0233FC6C .byte 0x5D, 0x5B, 0x72, 0x61, 0x6E, 0x6B, 0x3A, 0x30, 0x5D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00 + + .bss +_0233FCC0: + .space 0x20 diff --git a/asm/overlay_06.s b/asm/overlay_06.s index d1286964..a0272689 100644 --- a/asm/overlay_06.s +++ b/asm/overlay_06.s @@ -6,48 +6,48 @@ arm_func_start ov06_0233CA80 ov06_0233CA80: ; 0x0233CA80 ldr ip, _0233CA90 ; =MemZero - ldr r0, _0233CA94 ; =0x0233EEE0 + ldr r0, _0233CA94 ; =_0233EEE0 mov r1, #0xc bx ip .align 2, 0 _0233CA90: .word MemZero -_0233CA94: .word 0x0233EEE0 +_0233CA94: .word _0233EEE0 arm_func_end ov06_0233CA80 arm_func_start ov06_0233CA98 ov06_0233CA98: ; 0x0233CA98 - ldr r1, _0233CAA4 ; =0x0233EEE0 + ldr r1, _0233CAA4 ; =_0233EEE0 str r0, [r1] bx lr .align 2, 0 -_0233CAA4: .word 0x0233EEE0 +_0233CAA4: .word _0233EEE0 arm_func_end ov06_0233CA98 arm_func_start ov06_0233CAA8 ov06_0233CAA8: ; 0x0233CAA8 - ldr r0, _0233CAB4 ; =0x0233EEE0 + ldr r0, _0233CAB4 ; =_0233EEE0 ldr r0, [r0] bx lr .align 2, 0 -_0233CAB4: .word 0x0233EEE0 +_0233CAB4: .word _0233EEE0 arm_func_end ov06_0233CAA8 arm_func_start ov06_0233CAB8 ov06_0233CAB8: ; 0x0233CAB8 - ldr r1, _0233CAC4 ; =0x0233EEE0 + ldr r1, _0233CAC4 ; =_0233EEE0 str r0, [r1, #4] bx lr .align 2, 0 -_0233CAC4: .word 0x0233EEE0 +_0233CAC4: .word _0233EEE0 arm_func_end ov06_0233CAB8 arm_func_start ov06_0233CAC8 ov06_0233CAC8: ; 0x0233CAC8 - ldr r0, _0233CAD4 ; =0x0233EEE0 + ldr r0, _0233CAD4 ; =_0233EEE0 ldr r0, [r0, #4] bx lr .align 2, 0 -_0233CAD4: .word 0x0233EEE0 +_0233CAD4: .word _0233EEE0 arm_func_end ov06_0233CAC8 arm_func_start ov06_0233CAD8 @@ -2414,3 +2414,7 @@ _0233ED00: .word 0x0233EEF0 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + + .bss +_0233EEE0: + .space 0x20 diff --git a/asm/overlay_07.s b/asm/overlay_07.s index 8b0d5cd0..cd3f0c2a 100644 --- a/asm/overlay_07.s +++ b/asm/overlay_07.s @@ -9,7 +9,7 @@ ov07_0233CA80: ; 0x0233CA80 mov r0, #0x14 mov r1, #8 bl MemAlloc - ldr r1, _0233CAC4 ; =0x02341B80 + ldr r1, _0233CAC4 ; =_02341B80 mov r2, #0 str r0, [r1] str r2, [r0] @@ -27,12 +27,12 @@ ov07_0233CAA8: ; 0x0233CAA8 strb r2, [r0, #0x10] ldmia sp!, {r3, pc} .align 2, 0 -_0233CAC4: .word 0x02341B80 +_0233CAC4: .word _02341B80 arm_func_end ov07_0233CAA8 arm_func_start ov07_0233CAC8 ov07_0233CAC8: ; 0x0233CAC8 - ldr r1, _0233CAE4 ; =0x02341B80 + ldr r1, _0233CAE4 ; =_02341B80 mov r2, #1 ldr r3, [r1] str r0, [r3, #0xc] @@ -44,7 +44,7 @@ ov07_0233CAD8: ; 0x0233CAD8 strb r2, [r0, #0x10] bx lr .align 2, 0 -_0233CAE4: .word 0x02341B80 +_0233CAE4: .word _02341B80 arm_func_end ov07_0233CAD8 arm_func_start ov07_0233CAE8 @@ -56,7 +56,7 @@ ov07_0233CAE8: ; 0x0233CAE8 mov r7, #5 mov r6, #3 mov r8, #1 - ldr r4, _0233CCEC ; =0x02341B80 + ldr r4, _0233CCEC ; =_02341B80 b _0233CCDC _0233CB0C: ldr r1, [r4] @@ -184,11 +184,11 @@ _0233CC88: b _0233CCDC _0233CCB8: bl ov01_02338EB0 - ldr r1, _0233CCEC ; =0x02341B80 + ldr r1, _0233CCEC ; =_02341B80 ldr r1, [r1] strb r0, [r1, #8] bl ov01_02338B08 - ldr r0, _0233CCEC ; =0x02341B80 + ldr r0, _0233CCEC ; =_02341B80 ldr r0, [r0] ldr r0, [r0, #4] ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc} @@ -198,32 +198,32 @@ _0233CCDC: mov r0, #0 ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc} .align 2, 0 -_0233CCEC: .word 0x02341B80 +_0233CCEC: .word _02341B80 arm_func_start ov07_0233CCF0 ov07_0233CCF0: ; 0x0233CCF0 - ldr r0, _0233CD00 ; =0x02341B80 + ldr r0, _0233CD00 ; =_02341B80 ldr r0, [r0] ldrb r0, [r0, #8] bx lr .align 2, 0 -_0233CD00: .word 0x02341B80 +_0233CD00: .word _02341B80 arm_func_end ov07_0233CCF0 arm_func_start ov07_0233CD04 ov07_0233CD04: ; 0x0233CD04 stmdb sp!, {r3, lr} - ldr r0, _0233CD2C ; =0x02341B80 + ldr r0, _0233CD2C ; =_02341B80 ldr r0, [r0] cmp r0, #0 ldmeqia sp!, {r3, pc} bl MemFree - ldr r0, _0233CD2C ; =0x02341B80 + ldr r0, _0233CD2C ; =_02341B80 mov r1, #0 str r1, [r0] ldmia sp!, {r3, pc} .align 2, 0 -_0233CD2C: .word 0x02341B80 +_0233CD2C: .word _02341B80 arm_func_end ov07_0233CD04 arm_func_start ov07_0233CD30 @@ -5726,3 +5726,7 @@ _023418B8: .word 0x02341B78 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00 + + .bss +_02341B80: + .space 0x20 diff --git a/asm/overlay_08.s b/asm/overlay_08.s index 471a8fe0..65e5aac4 100644 --- a/asm/overlay_08.s +++ b/asm/overlay_08.s @@ -583,7 +583,7 @@ ov08_0233D178: ; 0x0233D178 ldr r1, [r1, #4] mov r2, r0 ldrh r3, [r1, #0x2a] - ldr r0, _0233D1F0 ; =0x0233EC80 + ldr r0, _0233D1F0 ; =_0233EC80 add r1, r1, #0x14 bl ov00_022C6EFC ldr r1, _0233D1EC ; =0x0233EC28 @@ -605,7 +605,7 @@ ov08_0233D178: ; 0x0233D178 ldmia sp!, {r3, pc} .align 2, 0 _0233D1EC: .word 0x0233EC28 -_0233D1F0: .word 0x0233EC80 +_0233D1F0: .word _0233EC80 _0233D1F4: .word ov08_0233D964 arm_func_end ov08_0233D178 @@ -2452,3 +2452,7 @@ ov08_0233EC20: .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xD0, 0xEA, 0x33, 0x02, 0xBC, 0xEA, 0x33, 0x02 .byte 0x0C, 0xEB, 0x33, 0x02, 0xE4, 0xEA, 0x33, 0x02, 0x24, 0xEB, 0x33, 0x02, 0x54, 0xEB, 0x33, 0x02 .byte 0x3C, 0xEB, 0x33, 0x02, 0x88, 0xEB, 0x33, 0x02, 0x6C, 0xEB, 0x33, 0x02, 0xF8, 0xEA, 0x33, 0x02 + + .bss +_0233EC80: + .space 0xDCC0 diff --git a/asm/overlay_10.s b/asm/overlay_10.s index 17105a92..8293f05e 100644 --- a/asm/overlay_10.s +++ b/asm/overlay_10.s @@ -835,14 +835,14 @@ _022BD568: .word 0x022C43B0 arm_func_start ov10_022BD56C ov10_022BD56C: ; 0x022BD56C stmdb sp!, {r3, lr} - ldr r0, _022BD5A8 ; =0x022DC220 + ldr r0, _022BD5A8 ; =_022DC220 ldr r0, [r0] cmp r0, #0 ldmneia sp!, {r3, pc} mov r0, #0xa4 mov r1, #8 bl MemAlloc - ldr r1, _022BD5A8 ; =0x022DC220 + ldr r1, _022BD5A8 ; =_022DC220 mov r2, #0 str r0, [r1] str r2, [r0] @@ -850,13 +850,13 @@ ov10_022BD56C: ; 0x022BD56C str r2, [r0, #4] ldmia sp!, {r3, pc} .align 2, 0 -_022BD5A8: .word 0x022DC220 +_022BD5A8: .word _022DC220 arm_func_end ov10_022BD56C arm_func_start ov10_022BD5AC ov10_022BD5AC: ; 0x022BD5AC stmdb sp!, {r3, lr} - ldr r0, _022BD710 ; =0x022DC220 + ldr r0, _022BD710 ; =_022DC220 ldr r1, [r0] ldr r0, [r1] cmp r0, #4 @@ -872,7 +872,7 @@ _022BD5DC: ldr r0, _022BD714 ; =0x020B0A48 mov r1, #0x68 ldr r0, [r0] - ldr r2, _022BD710 ; =0x022DC220 + ldr r2, _022BD710 ; =_022DC220 add r0, r0, #0x9000 ldr r0, [r0, #0x84c] mla r0, r3, r1, r0 @@ -883,12 +883,12 @@ _022BD5DC: bl sub_020562B8 cmp r0, #0 beq _022BD668 - ldr r0, _022BD710 ; =0x022DC220 + ldr r0, _022BD710 ; =_022DC220 ldr r0, [r0] ldr r1, [r0, #0x4c] add r0, r0, #8 bl sub_020534BC - ldr r0, _022BD710 ; =0x022DC220 + ldr r0, _022BD710 ; =_022DC220 mov r2, #0 ldr r1, [r0] strb r2, [r1, #0xe] @@ -899,25 +899,25 @@ _022BD5DC: bl sub_02055CCC mvn r1, #0 cmp r0, r1 - ldreq r0, _022BD710 ; =0x022DC220 + ldreq r0, _022BD710 ; =_022DC220 moveq r1, #1 ldreq r0, [r0] streq r1, [r0] beq _022BD690 _022BD668: - ldr r0, _022BD710 ; =0x022DC220 + ldr r0, _022BD710 ; =_022DC220 ldr r1, [r0] ldr r0, [r1, #4] add r0, r0, #1 str r0, [r1, #4] _022BD67C: - ldr r0, _022BD710 ; =0x022DC220 + ldr r0, _022BD710 ; =_022DC220 ldr ip, [r0] ldr r3, [ip, #4] cmp r3, #4 blt _022BD5DC _022BD690: - ldr r0, _022BD710 ; =0x022DC220 + ldr r0, _022BD710 ; =_022DC220 ldr r1, [r0] ldr r0, [r1, #4] cmp r0, #4 @@ -927,7 +927,7 @@ _022BD690: _022BD6AC: add r0, r1, #8 bl ov11_023061CC - ldr r0, _022BD710 ; =0x022DC220 + ldr r0, _022BD710 ; =_022DC220 mov r1, #2 ldr r0, [r0] str r1, [r0] @@ -938,7 +938,7 @@ _022BD6C8: cmpne r0, #4 bne _022BD708 bl ov11_02306C64 - ldr r0, _022BD710 ; =0x022DC220 + ldr r0, _022BD710 ; =_022DC220 mov r1, #0 ldr r3, [r0] ldr r2, [r3, #4] @@ -954,24 +954,24 @@ _022BD708: mov r0, #1 ldmia sp!, {r3, pc} .align 2, 0 -_022BD710: .word 0x022DC220 +_022BD710: .word _022DC220 _022BD714: .word 0x020B0A48 arm_func_end ov10_022BD5AC arm_func_start ov10_022BD718 ov10_022BD718: ; 0x022BD718 stmdb sp!, {r3, lr} - ldr r0, _022BD740 ; =0x022DC220 + ldr r0, _022BD740 ; =_022DC220 ldr r0, [r0] cmp r0, #0 ldmeqia sp!, {r3, pc} bl MemFree - ldr r0, _022BD740 ; =0x022DC220 + ldr r0, _022BD740 ; =_022DC220 mov r1, #0 str r1, [r0] ldmia sp!, {r3, pc} .align 2, 0 -_022BD740: .word 0x022DC220 +_022BD740: .word _022DC220 arm_func_end ov10_022BD718 arm_func_start ov10_022BD744 @@ -15204,3 +15204,7 @@ ov10_022C434C: ; 0x022C434C .byte 0x10, 0x00, 0x00, 0x00, 0x19, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x0C, 0x00, 0x09, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x10, 0x00, 0x0C, 0x00, 0x19, 0x00, 0x0D, 0x00, 0x00, 0x00, 0x00, 0x00 + + .bss +_022DC220: + .space 0x20 diff --git a/asm/overlay_11.s b/asm/overlay_11.s index 659368df..01152075 100644 --- a/asm/overlay_11.s +++ b/asm/overlay_11.s @@ -353,7 +353,7 @@ ov11_022DC6C4: ; 0x022DC6C4 mov r1, #6 bl MemAlloc ldr r2, _022DC710 ; =0x02324C64 - ldr r1, _022DC714 ; =0x02324E80 + ldr r1, _022DC714 ; =_02324E80 mov r3, #1 str r0, [r2, #4] strb r3, [r1] @@ -369,7 +369,7 @@ ov11_022DC6C4: ; 0x022DC6C4 ldmia sp!, {r3, pc} .align 2, 0 _022DC710: .word 0x02324C64 -_022DC714: .word 0x02324E80 +_022DC714: .word _02324E80 arm_func_end ov11_022DC6C4 arm_func_start ov11_022DC718 @@ -383,7 +383,7 @@ ov11_022DC718: ; 0x022DC718 ldr r0, _022DC790 ; =0x02324ECC bl InitPreprocessorArgs mov r3, #0 - ldr r0, _022DC794 ; =0x02324E80 + ldr r0, _022DC794 ; =_02324E80 mvn r1, #0 str r1, [r0, #0xc] str r1, [r0, #0x10] @@ -407,7 +407,7 @@ _022DC770: _022DC788: .word 0x02324E94 _022DC78C: .word 0x02324EA4 _022DC790: .word 0x02324ECC -_022DC794: .word 0x02324E80 +_022DC794: .word _02324E80 _022DC798: .word 0x02324EB4 _022DC79C: .word 0x02324F1C arm_func_end ov11_022DC718 @@ -446,22 +446,22 @@ _022DC804: .word 0x02324C64 arm_func_start ov11_022DC808 ov11_022DC808: ; 0x022DC808 - ldr r0, _022DC818 ; =0x02324E80 + ldr r0, _022DC818 ; =_02324E80 mov r1, #1 strb r1, [r0] bx lr .align 2, 0 -_022DC818: .word 0x02324E80 +_022DC818: .word _02324E80 arm_func_end ov11_022DC808 arm_func_start ov11_022DC81C ov11_022DC81C: ; 0x022DC81C - ldr r0, _022DC82C ; =0x02324E80 + ldr r0, _022DC82C ; =_02324E80 mov r1, #0 strb r1, [r0] bx lr .align 2, 0 -_022DC82C: .word 0x02324E80 +_022DC82C: .word _02324E80 arm_func_end ov11_022DC81C arm_func_start ov11_022DC830 @@ -1008,12 +1008,12 @@ ov11_022DCEEC: ; 0x022DCEEC strh r1, [r0, #0x3e] mov r1, #3 strh r1, [r0, #0xe] - ldr r1, _022DCF08 ; =0x02324E80 + ldr r1, _022DCF08 ; =_02324E80 mov r0, #1 strb r0, [r1, #1] bx lr .align 2, 0 -_022DCF08: .word 0x02324E80 +_022DCF08: .word _02324E80 arm_func_end ov11_022DCEEC arm_func_start ov11_022DCF0C @@ -1185,7 +1185,7 @@ ov11_022DD130: ; 0x022DD130 stmdb sp!, {r3, lr} ldr ip, _022DD158 ; =0x02324EB4 mov lr, #1 - ldr r1, _022DD15C ; =0x02324E80 + ldr r1, _022DD15C ; =_02324E80 ldr r2, _022DD160 ; =0x02324F1C mov r3, #0 strb lr, [ip, r0] @@ -1194,7 +1194,7 @@ ov11_022DD130: ; 0x022DD130 ldmia sp!, {r3, pc} .align 2, 0 _022DD158: .word 0x02324EB4 -_022DD15C: .word 0x02324E80 +_022DD15C: .word _02324E80 _022DD160: .word 0x02324F1C arm_func_end ov11_022DD130 @@ -1209,7 +1209,7 @@ ov11_022DD164: ; 0x022DD164 mov r5, #1 mov sb, r8 mov r4, r8 - ldr r7, _022DD2BC ; =0x02324E80 + ldr r7, _022DD2BC ; =_02324E80 b _022DD2A4 _022DD190: ldrsh r0, [r6, #0xe] @@ -1303,7 +1303,7 @@ _022DD2B4: mov r0, #0 ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc} .align 2, 0 -_022DD2BC: .word 0x02324E80 +_022DD2BC: .word _02324E80 arm_func_end ov11_022DD164 arm_func_start ov11_022DD2C0 @@ -1461,14 +1461,14 @@ _022DD468: str r0, [r4, #0x1c] b _022DDD00 _022DD4F4: - ldr r0, _022DDD18 ; =0x02324E80 + ldr r0, _022DDD18 ; =_02324E80 ldrsh r0, [r0, #6] bl ov11_022F12C0 mov r0, #2 strh r0, [r4, #0xe] b _022DDD00 _022DD50C: - ldr r0, _022DDD18 ; =0x02324E80 + ldr r0, _022DDD18 ; =_02324E80 ldrsh r0, [r0, #6] bl ov11_022F173C mov r0, #2 @@ -1597,7 +1597,7 @@ _022DD6BC: b _022DDD00 _022DD6D0: ldr r0, _022DDD34 ; =0x00000113 - ldr r1, _022DDD18 ; =0x02324E80 + ldr r1, _022DDD18 ; =_02324E80 strh r0, [r1, #6] bl ov11_022F12C0 mov r0, #3 @@ -1620,7 +1620,7 @@ _022DD700: mov r8, r0 ldrh r0, [r6, #8] bl ov11_022E48AC - ldr r1, _022DDD18 ; =0x02324E80 + ldr r1, _022DDD18 ; =_02324E80 mov r6, r0 strh r7, [r1, #6] ldrsh r0, [r1, #6] @@ -1652,7 +1652,7 @@ _022DD758: b _022DDD00 _022DD7A0: ldr r0, _022DDD34 ; =0x00000113 - ldr r1, _022DDD18 ; =0x02324E80 + ldr r1, _022DDD18 ; =_02324E80 strh r0, [r1, #6] bl ov11_022F12C0 mov r0, #4 @@ -1665,7 +1665,7 @@ _022DD7A0: b _022DDD00 _022DD7D0: ldr r0, _022DDD38 ; =0x00000132 - ldr r1, _022DDD18 ; =0x02324E80 + ldr r1, _022DDD18 ; =_02324E80 strh r0, [r1, #6] bl ov11_022F12C0 mov r0, #5 @@ -1678,7 +1678,7 @@ _022DD7D0: b _022DDD00 _022DD800: ldr r0, _022DDD34 ; =0x00000113 - ldr r1, _022DDD18 ; =0x02324E80 + ldr r1, _022DDD18 ; =_02324E80 strh r0, [r1, #6] bl ov11_022F12C0 mov r0, #6 @@ -1772,7 +1772,7 @@ _022DD938: bl DebugPrint ldr r0, _022DDD44 ; =0x02324EA4 bl sub_02034E28 - ldr r0, _022DDD18 ; =0x02324E80 + ldr r0, _022DDD18 ; =_02324E80 ldr r2, _022DDD48 ; =0x02324ECC ldr r0, [r0, #0xc] cmp r0, #0 @@ -2046,7 +2046,7 @@ _022DDD08: .word 0x0000012F _022DDD0C: .word 0x02319260 _022DDD10: .word 0x02319284 _022DDD14: .word 0x023192B4 -_022DDD18: .word 0x02324E80 +_022DDD18: .word _02324E80 _022DDD1C: .word 0x023192E8 _022DDD20: .word 0x02319304 _022DDD24: .word 0x02319320 @@ -2586,7 +2586,7 @@ ov11_022DE4BC: ; 0x022DE4BC _022DE500: ldrh r0, [r6] bl ov11_022E48AC - ldr r1, _022DED18 ; =0x02324E80 + ldr r1, _022DED18 ; =_02324E80 strh r0, [r1, #8] ldrsh r2, [r1, #8] mov r0, #2 @@ -2594,7 +2594,7 @@ _022DE500: bl GetDebugFlag2 cmp r0, #0 beq _022DE554 - ldr r3, _022DED18 ; =0x02324E80 + ldr r3, _022DED18 ; =_02324E80 mov r0, #0xc ldrsh r2, [r3, #8] ldr r4, _022DED1C ; =0x020A5490 @@ -2606,12 +2606,12 @@ _022DE500: ldrsh r3, [r3, #6] bl DebugPrint _022DE554: - ldr r1, _022DED18 ; =0x02324E80 + ldr r1, _022DED18 ; =_02324E80 mov r0, #0 ldrsh r2, [r1, #8] mov r1, #0x1f bl SaveScriptVariableValue - ldr r0, _022DED18 ; =0x02324E80 + ldr r0, _022DED18 ; =_02324E80 mov r1, #0xc ldrsh r3, [r0, #8] ldr r2, _022DED24 ; =0x020A548A @@ -2620,7 +2620,7 @@ _022DE554: ldrsh r2, [r2, r1] mov r1, #0x20 bl SaveScriptVariableValue - ldr r0, _022DED18 ; =0x02324E80 + ldr r0, _022DED18 ; =_02324E80 ldrsh r0, [r0, #6] bl ov11_022F46B4 mov r0, #0 @@ -2643,7 +2643,7 @@ _022DE5BC: _022DE5D8: ldrh r0, [r6] bl ov11_022E48AC - ldr r1, _022DED18 ; =0x02324E80 + ldr r1, _022DED18 ; =_02324E80 strh r0, [r1, #2] ldrsh r2, [r1, #2] mov r0, #2 @@ -2651,7 +2651,7 @@ _022DE5D8: bl GetDebugFlag2 cmp r0, #0 beq _022DE62C - ldr r3, _022DED18 ; =0x02324E80 + ldr r3, _022DED18 ; =_02324E80 mov r0, #0xc ldrsh r2, [r3, #2] ldr r4, _022DED1C ; =0x020A5490 @@ -2663,11 +2663,11 @@ _022DE5D8: ldrsh r3, [r3, #4] bl DebugPrint _022DE62C: - ldr r1, _022DED18 ; =0x02324E80 + ldr r1, _022DED18 ; =_02324E80 mov r0, #0 ldrsh r1, [r1, #4] bl ov11_022E7F28 - ldr r0, _022DED18 ; =0x02324E80 + ldr r0, _022DED18 ; =_02324E80 ldrsh r0, [r0, #6] bl ov11_022F4734 mov r0, #4 @@ -2677,13 +2677,13 @@ _022DE650: bl ov11_022E48AC mov r4, r0 bl ov11_022F1710 - ldr r1, _022DED18 ; =0x02324E80 + ldr r1, _022DED18 ; =_02324E80 mov r0, #2 strh r4, [r1, #6] bl GetDebugFlag2 cmp r0, #0 beq _022DE6A4 - ldr r3, _022DED18 ; =0x02324E80 + ldr r3, _022DED18 ; =_02324E80 mov r0, #0xc ldrsh r2, [r3, #8] ldr r4, _022DED1C ; =0x020A5490 @@ -2949,10 +2949,10 @@ ov11_022DE9B8: ; 0x022DE9B8 mov r0, r0, lsl #0x10 mov r0, r0, asr #0x10 _022DE9E8: - ldr r1, _022DED18 ; =0x02324E80 + ldr r1, _022DED18 ; =_02324E80 strh r0, [r1, #0xa] bl ov11_022E5148 - ldr r0, _022DED18 ; =0x02324E80 + ldr r0, _022DED18 ; =_02324E80 ldrsh r0, [r0, #0xa] bl ov11_022F71E4 mov r0, #6 @@ -2971,7 +2971,7 @@ ov11_022DEA08: ; 0x022DEA08 mov r0, r0, lsl #0x18 cmp r1, r7, asr #16 mov r7, r0, asr #0x18 - ldreq r0, _022DED18 ; =0x02324E80 + ldreq r0, _022DED18 ; =_02324E80 ldreqsh r6, [r0, #8] cmp r7, #0 ldrltsb r7, [r4, #0x12] @@ -2985,7 +2985,7 @@ ov11_022DEA08: ; 0x022DEA08 mov r0, r6 and r2, r2, #0xff bl ov11_022F722C - ldr r0, _022DED18 ; =0x02324E80 + ldr r0, _022DED18 ; =_02324E80 ldrsh r1, [r0, #0xa] cmp r1, r6 beq _022DEAA0 @@ -3027,7 +3027,7 @@ ov11_022DEAC4: ; 0x022DEAC4 mvn r1, #0 cmp r1, sb, asr #16 mov r6, r0, asr #0x18 - ldreq r0, _022DED18 ; =0x02324E80 + ldreq r0, _022DED18 ; =_02324E80 mov r1, r8 ldreqsh r7, [r0, #8] cmp r6, #0 @@ -3046,7 +3046,7 @@ ov11_022DEAC4: ; 0x022DEAC4 mov r2, r6 and r3, r3, #0xff bl ov11_022F72A0 - ldr r0, _022DED18 ; =0x02324E80 + ldr r0, _022DED18 ; =_02324E80 ldrsh r1, [r0, #0xa] cmp r1, r7 beq _022DEB80 @@ -3088,7 +3088,7 @@ ov11_022DEBA4: ; 0x022DEBA4 mvn r1, #0 cmp r1, sb, asr #16 mov r6, r0, asr #0x18 - ldreq r0, _022DED18 ; =0x02324E80 + ldreq r0, _022DED18 ; =_02324E80 mov r1, r8 ldreqsh r7, [r0, #8] cmp r6, #0 @@ -3107,7 +3107,7 @@ ov11_022DEBA4: ; 0x022DEBA4 mov r2, r6 and r3, r3, #0xff bl ov11_022F7354 - ldr r0, _022DED18 ; =0x02324E80 + ldr r0, _022DED18 ; =_02324E80 ldrsh r1, [r0, #0xa] cmp r1, r7 strneh r7, [r0, #0xa] @@ -3142,7 +3142,7 @@ ov11_022DEC7C: ; 0x022DEC7C mvn r2, #0 mov r1, r0 cmp r2, r5, asr #16 - ldreq r0, _022DED18 ; =0x02324E80 + ldreq r0, _022DED18 ; =_02324E80 ldreqsh r6, [r0, #8] add r0, sp, #0x130 bl ov11_022E4600 @@ -3176,7 +3176,7 @@ _022DED08: .word 0x02318610 _022DED0C: .word 0x00000172 _022DED10: .word 0x023193EC _022DED14: .word 0x02319410 -_022DED18: .word 0x02324E80 +_022DED18: .word _02324E80 _022DED1C: .word 0x020A5490 _022DED20: .word 0x02319438 _022DED24: .word 0x020A548A @@ -4066,11 +4066,11 @@ ov11_022DF8B8: ; 0x022DF8B8 ov11_022DF8F4: ; 0x022DF8F4 ldrh r0, [r6] bl ov11_022E48AC - ldr r1, _022DED18 ; =0x02324E80 + ldr r1, _022DED18 ; =_02324E80 str r0, [r1, #0xc] ldrh r0, [r6, #2] bl ov11_022E48AC - ldr r2, _022DED18 ; =0x02324E80 + ldr r2, _022DED18 ; =_02324E80 mov r1, r0 str r1, [r2, #0x10] ldr r0, [r2, #0xc] @@ -4103,7 +4103,7 @@ _022DF960: ldr r0, _022DFE24 ; =0x02324E94 bl sub_02034E28 _022DF968: - ldr r0, _022DED18 ; =0x02324E80 + ldr r0, _022DED18 ; =_02324E80 ldr r0, [r0, #0xc] cmp r0, #0 movge r1, #0x20 @@ -4176,7 +4176,7 @@ ov11_022DFA50: ; 0x022DFA50 ldrh r1, [r6] add r0, r4, #0x14 bl ov11_022E4248 - ldr r3, _022DED18 ; =0x02324E80 + ldr r3, _022DED18 ; =_02324E80 ldr r1, _022DFE18 ; =0x02324ECC ldr r2, [r3, #0xc] ldr r3, [r3, #0x10] @@ -4193,7 +4193,7 @@ ov11_022DFA78: ; 0x022DFA78 ldrh r1, [r6, #2] add r0, r4, #0x14 bl ov11_022E4248 - ldr r2, _022DED18 ; =0x02324E80 + ldr r2, _022DED18 ; =_02324E80 ldr r1, _022DFE18 ; =0x02324ECC ldr r3, [r2, #0xc] mov r2, r5 @@ -4211,7 +4211,7 @@ ov11_022DFAAC: ; 0x022DFAAC mov r0, #2 mov r6, #0 bl DebugPrint - ldr r0, _022DED18 ; =0x02324E80 + ldr r0, _022DED18 ; =_02324E80 ldr r0, [r0, #0xc] cmp r0, #0 movge r8, #0x20 @@ -4322,7 +4322,7 @@ _022DFC44: str r0, [r4, #0x1c] b _022E2474 _022DFC64: - ldr r0, _022DED18 ; =0x02324E80 + ldr r0, _022DED18 ; =_02324E80 ldrsh r0, [r0, #6] bl ov11_022F46B4 mov r0, #0 @@ -9386,7 +9386,7 @@ _022E4348: arm_func_start ov11_022E4350 ov11_022E4350: ; 0x022E4350 stmdb sp!, {r4, r5, r6, r7, r8, lr} - ldr r0, _022E43DC ; =0x02324E80 + ldr r0, _022E43DC ; =_02324E80 ldrb r1, [r0, #1] cmp r1, #0 ldmeqia sp!, {r4, r5, r6, r7, r8, pc} @@ -9423,7 +9423,7 @@ _022E43CC: blt _022E437C ldmia sp!, {r4, r5, r6, r7, r8, pc} .align 2, 0 -_022E43DC: .word 0x02324E80 +_022E43DC: .word _02324E80 _022E43E0: .word 0x023195EC _022E43E4: .word 0x02324EB4 arm_func_end ov11_022E4350 @@ -72933,3 +72933,7 @@ _02316788: .word 0x02324E78 .byte 0x40, 0x51, 0x31, 0x02, 0x9C, 0x5A, 0x31, 0x02, 0x08, 0x5C, 0x31, 0x02, 0x20, 0x5E, 0x31, 0x02 .byte 0xD8, 0x5E, 0x31, 0x02, 0x18, 0x60, 0x31, 0x02, 0x78, 0x52, 0x31, 0x02, 0x78, 0x52, 0x31, 0x02 .byte 0x68, 0x61, 0x31, 0x02, 0x68, 0x61, 0x31, 0x02, 0xE0, 0x63, 0x31, 0x02 + + .bss +_02324E80: + .space 0x652C0 diff --git a/asm/overlay_20.s b/asm/overlay_20.s index cb757fbf..c0057446 100644 --- a/asm/overlay_20.s +++ b/asm/overlay_20.s @@ -2527,7 +2527,7 @@ _0238C360: cmp r5, #0 mov r3, #0 beq _0238C3A4 - ldr r2, _0238C4DC ; =0x0238D140 + ldr r2, _0238C4DC ; =_0238D140 b _0238C394 _0238C380: ldr r0, [r4] @@ -2541,7 +2541,7 @@ _0238C394: blt _0238C380 b _0238C3C0 _0238C3A4: - ldr r1, _0238C4DC ; =0x0238D140 + ldr r1, _0238C4DC ; =_0238D140 ldr r0, _0238C4E0 ; =0x0000041A mov r2, r3 _0238C3B0: @@ -2622,7 +2622,7 @@ _0238C3C0: ldmia sp!, {r4, r5, r6, pc} .align 2, 0 _0238C4D8: .word 0x0238D12C -_0238C4DC: .word 0x0238D140 +_0238C4DC: .word _0238D140 _0238C4E0: .word 0x0000041A _0238C4E4: .word 0x0000032F arm_func_end ov20_0238C2E0 @@ -3021,7 +3021,7 @@ ov20_0238CA3C: ; 0x0238CA3C ldmeqia sp!, {r3, pc} ldr r2, [ip, #0x1b8] mov r3, #0 - ldr r1, _0238CAD8 ; =0x0238D140 + ldr r1, _0238CAD8 ; =_0238D140 b _0238CA74 _0238CA60: ldr r0, [r2] @@ -3034,7 +3034,7 @@ _0238CA74: cmp r3, r0 blt _0238CA60 mov r2, #0 - ldr r1, _0238CAD8 ; =0x0238D140 + ldr r1, _0238CAD8 ; =_0238D140 ldr r0, _0238CADC ; =0x0000041A b _0238CA98 _0238CA90: @@ -3058,7 +3058,7 @@ _0238CA98: ldmia sp!, {r3, pc} .align 2, 0 _0238CAD4: .word 0x0238D12C -_0238CAD8: .word 0x0238D140 +_0238CAD8: .word _0238D140 _0238CADC: .word 0x0000041A arm_func_end ov20_0238CA3C @@ -3464,3 +3464,7 @@ _0238CF78: .word 0x00004628 .byte 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00 + + .bss +_0238D140: + .space 0x420 diff --git a/asm/overlay_28.s b/asm/overlay_28.s index 83af5e21..327076c8 100644 --- a/asm/overlay_28.s +++ b/asm/overlay_28.s @@ -11,7 +11,7 @@ ov28_0238A140: ; 0x0238A140 str r1, [r0, #0xc] str r2, [r0, #4] sub r2, r2, #1 - ldr r1, _0238A17C ; =0x0238ADA0 + ldr r1, _0238A17C ; =_0238ADA0 str r2, [r0, #8] ldr r2, [r1] mov r1, #0xc @@ -21,7 +21,7 @@ ov28_0238A140: ; 0x0238A140 strh r1, [r0, #0x18] bx lr .align 2, 0 -_0238A17C: .word 0x0238ADA0 +_0238A17C: .word _0238ADA0 _0238A180: .word 0x0238AD28 arm_func_end ov28_0238A140 @@ -41,7 +41,7 @@ _0238A1A0: ; jump table b _0238A398 ; case 3 b _0238A41C ; case 4 _0238A1B4: - ldr r0, _0238A454 ; =0x0238ADA0 + ldr r0, _0238A454 ; =_0238ADA0 ldr r1, _0238A458 ; =0x0238AD80 ldr r2, [r0] mov r0, #0xc @@ -115,7 +115,7 @@ _0238A2A4: ldr r0, [r5, #0xc] and r0, r0, #0xff bl sub_02028F88 - ldr r2, _0238A454 ; =0x0238ADA0 + ldr r2, _0238A454 ; =_0238ADA0 ldr r0, _0238A460 ; =0x0238AD0C ldr r1, [r2] ldr r3, [r5, #4] @@ -178,7 +178,7 @@ _0238A398: ldr r0, [r5, #0xc] and r0, r0, #0xff bl sub_02028F88 - ldr r0, _0238A454 ; =0x0238ADA0 + ldr r0, _0238A454 ; =_0238ADA0 ldr r1, _0238A460 ; =0x0238AD0C ldr r0, [r0] ldr r2, [r5, #4] @@ -220,7 +220,7 @@ _0238A44C: add sp, sp, #0x10 ldmia sp!, {r3, r4, r5, pc} .align 2, 0 -_0238A454: .word 0x0238ADA0 +_0238A454: .word _0238ADA0 _0238A458: .word 0x0238AD80 _0238A45C: .word 0x0238AD24 _0238A460: .word 0x0238AD0C @@ -234,12 +234,12 @@ ov28_0238A468: ; 0x0238A468 ldr r0, _0238A488 ; =0x0238ACFC bl sub_020348E4 cmp r0, #0 - ldrne r0, _0238A48C ; =0x0238ADA0 + ldrne r0, _0238A48C ; =_0238ADA0 strne r4, [r0] ldmia sp!, {r4, pc} .align 2, 0 _0238A488: .word 0x0238ACFC -_0238A48C: .word 0x0238ADA0 +_0238A48C: .word _0238ADA0 arm_func_end ov28_0238A468 arm_func_start ov28_0238A490 @@ -272,7 +272,7 @@ _0238A4E4: strb r2, [r1, #9] cmp r3, #0x14 blt _0238A4E4 - ldr r1, _0238A580 ; =0x0238ADA0 + ldr r1, _0238A580 ; =_0238ADA0 mov r0, #0xc ldr r2, [r1] ldr r1, _0238A584 ; =0x0238AD24 @@ -308,7 +308,7 @@ _0238A54C: .align 2, 0 _0238A578: .word 0x00003618 _0238A57C: .word 0x0238AD80 -_0238A580: .word 0x0238ADA0 +_0238A580: .word _0238ADA0 _0238A584: .word 0x0238AD24 _0238A588: .word 0x0238AD2C arm_func_end ov28_0238A490 @@ -356,7 +356,7 @@ _0238A608: bl ov11_022E6EC8 cmp r0, #0 beq _0238AB44 - ldr r0, _0238AB54 ; =0x0238ADA0 + ldr r0, _0238AB54 ; =_0238ADA0 mov r1, r6 ldr r0, [r0] cmp r0, #0 @@ -432,7 +432,7 @@ _0238A718: add r4, r4, #1 cmp r4, #0x14 blt _0238A6D0 - ldr r0, _0238AB54 ; =0x0238ADA0 + ldr r0, _0238AB54 ; =_0238ADA0 ldr r2, [r0] cmp r2, #0 bne _0238A854 @@ -470,7 +470,7 @@ _0238A790: ldr r0, [r4, #0x40c] and r0, r0, #0xff bl sub_02028F88 - ldr r0, _0238AB54 ; =0x0238ADA0 + ldr r0, _0238AB54 ; =_0238ADA0 ldr r1, _0238AB58 ; =0x0238AD0C ldr r0, [r0] ldr r2, [r4, #0x404] @@ -543,7 +543,7 @@ _0238A8A4: ldr r0, [r4, #0x2c] and r0, r0, #0xff bl sub_02028F88 - ldr r0, _0238AB54 ; =0x0238ADA0 + ldr r0, _0238AB54 ; =_0238ADA0 ldr r1, _0238AB58 ; =0x0238AD0C ldr r0, [r0] ldr r2, [r4, #0x24] @@ -612,7 +612,7 @@ _0238A9A8: ldr r0, [r4, #0x448] and r0, r0, #0xff bl sub_02028F88 - ldr r0, _0238AB54 ; =0x0238ADA0 + ldr r0, _0238AB54 ; =_0238ADA0 ldr r1, _0238AB58 ; =0x0238AD0C ldr r0, [r0] ldr r2, [r4, #0x440] @@ -637,7 +637,7 @@ _0238A9A8: str r0, [r4, #0x44c] b _0238AA48 _0238AA2C: - ldr r0, _0238AB54 ; =0x0238ADA0 + ldr r0, _0238AB54 ; =_0238ADA0 ldr r1, _0238AB58 ; =0x0238AD0C ldr r0, [r0] ldr r2, [r4, #0x440] @@ -682,7 +682,7 @@ _0238AAC0: bl ov28_0238AB5C mov r0, #0 bl ov11_022E6E8C - ldr r0, _0238AB54 ; =0x0238ADA0 + ldr r0, _0238AB54 ; =_0238ADA0 ldr r0, [r0] cmp r0, #5 addls pc, pc, r0, lsl #2 @@ -727,7 +727,7 @@ _0238AB48: ldmia sp!, {r4, r5, r6, r7, r8, pc} .align 2, 0 _0238AB50: .word 0x0238AD80 -_0238AB54: .word 0x0238ADA0 +_0238AB54: .word _0238ADA0 _0238AB58: .word 0x0238AD0C arm_func_end ov28_0238A5CC @@ -859,3 +859,7 @@ _0238ACF8: .word 0x0238AD80 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00 + + .bss +_0238ADA0: + .space 0x20 diff --git a/asm/overlay_29.s b/asm/overlay_29.s index 1a4524da..c76e4052 100644 --- a/asm/overlay_29.s +++ b/asm/overlay_29.s @@ -214,7 +214,7 @@ _022DC518: ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc} .align 2, 0 _022DC52C: .word 0x00019628 -_022DC530: .word 0x02353880 +_022DC530: .word _02353860 + 0x20 _022DC534: .word 0x020AFC70 _022DC538: .word 0x00007FFF _022DC53C: .word 0x00018304 @@ -138495,3 +138495,7 @@ _0234FCF8: .word 0x02353848 .byte 0xF3, 0x00, 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00 + + .bss +_02353860: + .space 0x2EFC0 diff --git a/asm/overlay_31.s b/asm/overlay_31.s index 99db84a3..ba0d1d31 100644 --- a/asm/overlay_31.s +++ b/asm/overlay_31.s @@ -467,7 +467,7 @@ ov31_02382E18: ; 0x02382E18 mov r5, #0 mov r6, #1 mov r7, #0x62 - ldr r4, _02382ED0 ; =0x0238A2A0 + ldr r4, _02382ED0 ; =_0238A2A0 b _02382E64 _02382E5C: mov r0, r7 @@ -504,7 +504,7 @@ _02382EC4: bl ov29_022E0C2C ldmia sp!, {r4, r5, r6, r7, r8, pc} .align 2, 0 -_02382ED0: .word 0x0238A2A0 +_02382ED0: .word _0238A2A0 arm_func_end ov31_02382E18 arm_func_start ov31_02382ED4 @@ -518,7 +518,7 @@ ov31_02382ED4: ; 0x02382ED4 mov r0, #0x18 mov r1, #8 bl MemAlloc - ldr r1, _02382F64 ; =0x0238A2A0 + ldr r1, _02382F64 ; =_0238A2A0 mov r2, #0 str r0, [r1, #4] str r2, [r0, #4] @@ -541,19 +541,19 @@ ov31_02382ED4: ; 0x02382ED4 cmp r0, #0 movne r4, #3 _02382F50: - ldr r0, _02382F64 ; =0x0238A2A0 + ldr r0, _02382F64 ; =_0238A2A0 ldr r0, [r0, #4] str r4, [r0, #0x14] ldmia sp!, {r3, r4, r5, pc} .align 2, 0 _02382F60: .word 0x02389E30 -_02382F64: .word 0x0238A2A0 +_02382F64: .word _0238A2A0 arm_func_end ov31_02382ED4 arm_func_start ov31_02382F68 ov31_02382F68: ; 0x02382F68 stmdb sp!, {r4, lr} - ldr r1, _02382FB4 ; =0x0238A2A0 + ldr r1, _02382FB4 ; =_0238A2A0 ldr r2, _02382FB8 ; =0x02389E22 ldr r1, [r1, #4] mov r4, r0 @@ -562,7 +562,7 @@ ov31_02382F68: ; 0x02382F68 ldrh r0, [r2, r0] bl StringFromMessageId mov r3, r0 - ldr ip, _02382FB4 ; =0x0238A2A0 + ldr ip, _02382FB4 ; =_0238A2A0 mov r0, r4 mov r1, #0x10 mov r2, #0x12 @@ -572,7 +572,7 @@ ov31_02382F68: ; 0x02382F68 bl sub_02027AF0 ldmia sp!, {r4, pc} .align 2, 0 -_02382FB4: .word 0x0238A2A0 +_02382FB4: .word _0238A2A0 _02382FB8: .word 0x02389E22 arm_func_end ov31_02382F68 @@ -580,7 +580,7 @@ _02382FB8: .word 0x02389E22 ov31_02382FBC: ; 0x02382FBC stmdb sp!, {r4, lr} sub sp, sp, #0x138 - ldr r0, _02383218 ; =0x0238A2A0 + ldr r0, _02383218 ; =_0238A2A0 ldr r1, [r0, #4] ldr r0, [r1, #0xc] cmp r0, #5 @@ -601,7 +601,7 @@ _02382FF4: ldr r1, _02383224 ; =0x00400013 mov r2, #0 bl sub_0202A5CC - ldr r1, _02383218 ; =0x0238A2A0 + ldr r1, _02383218 ; =_0238A2A0 ldr r3, _02383228 ; =0x02389E22 ldr r4, [r1, #4] mov r2, #0x10 @@ -620,14 +620,14 @@ _02382FF4: add r2, sp, #0xa0 str r4, [sp, #4] bl sub_020305B4 - ldr r2, _02383218 ; =0x0238A2A0 + ldr r2, _02383218 ; =_0238A2A0 mov r1, r4 ldr r3, [r2, #4] strb r0, [r3] ldr r0, [r2, #4] ldrsb r0, [r0] bl sub_020307A4 - ldr r0, _02383218 ; =0x0238A2A0 + ldr r0, _02383218 ; =_0238A2A0 mov r1, #1 ldr r0, [r0, #4] str r1, [r0, #0xc] @@ -637,15 +637,15 @@ _0238308C: bl sub_0202AB40 cmp r0, #0 bne _0238320C - ldr r0, _02383218 ; =0x0238A2A0 + ldr r0, _02383218 ; =_0238A2A0 ldr r0, [r0, #4] ldrsb r0, [r0, #1] bl sub_0202ABB0 - ldr r1, _02383218 ; =0x0238A2A0 + ldr r1, _02383218 ; =_0238A2A0 ldr r1, [r1, #4] str r0, [r1, #4] bl FUN_0238328C - ldr r0, _02383218 ; =0x0238A2A0 + ldr r0, _02383218 ; =_0238A2A0 ldr r1, [r0, #4] ldr r0, [r1, #4] add r0, r0, #1 @@ -683,7 +683,7 @@ _023830F4: b _02383210 _02383144: bl FUN_0238328C - ldr r0, _02383218 ; =0x0238A2A0 + ldr r0, _02383218 ; =_0238A2A0 mov r3, #2 ldr r2, [r0, #4] mov r1, #3 @@ -715,7 +715,7 @@ _02383170: add r2, sp, #8 str ip, [sp, #4] bl sub_020305B4 - ldr r1, _02383218 ; =0x0238A2A0 + ldr r1, _02383218 ; =_0238A2A0 mov r2, #4 ldr r3, [r1, #4] strb r0, [r3, #2] @@ -727,11 +727,11 @@ _023831DC: bl sub_020308C4 cmp r0, #0 bne _0238320C - ldr r0, _02383218 ; =0x0238A2A0 + ldr r0, _02383218 ; =_0238A2A0 ldr r0, [r0, #4] ldrsb r0, [r0, #2] bl sub_020308A0 - ldr r0, _02383218 ; =0x0238A2A0 + ldr r0, _02383218 ; =_0238A2A0 mov r1, #0 ldr r0, [r0, #4] str r1, [r0, #0xc] @@ -741,7 +741,7 @@ _02383210: add sp, sp, #0x138 ldmia sp!, {r4, pc} .align 2, 0 -_02383218: .word 0x0238A2A0 +_02383218: .word _0238A2A0 _0238321C: .word 0x02389E70 _02383220: .word 0x02389E60 _02383224: .word 0x00400013 @@ -758,7 +758,7 @@ _02383244: .word ov31_02383248 arm_func_start ov31_02383248 ov31_02383248: ; 0x02383248 stmdb sp!, {r4, lr} - ldr r1, _02383284 ; =0x0238A2A0 + ldr r1, _02383284 ; =_0238A2A0 ldr r2, _02383288 ; =0x02389E20 ldr r1, [r1, #4] mov r4, r0 @@ -773,58 +773,58 @@ ov31_02383248: ; 0x02383248 bl sub_02026214 ldmia sp!, {r4, pc} .align 2, 0 -_02383284: .word 0x0238A2A0 +_02383284: .word _0238A2A0 _02383288: .word 0x02389E20 arm_func_end ov31_02383248 arm_func_start FUN_0238328C FUN_0238328C: ; 0x0238328C stmdb sp!, {r3, lr} - ldr r0, _023832EC ; =0x0238A2A0 + ldr r0, _023832EC ; =_0238A2A0 mvn r1, #1 ldr r0, [r0, #4] ldrsb r0, [r0] cmp r0, r1 beq _023832BC bl sub_020308A0 - ldr r0, _023832EC ; =0x0238A2A0 + ldr r0, _023832EC ; =_0238A2A0 mvn r1, #1 ldr r0, [r0, #4] strb r1, [r0] _023832BC: - ldr r0, _023832EC ; =0x0238A2A0 + ldr r0, _023832EC ; =_0238A2A0 mvn r1, #1 ldr r0, [r0, #4] ldrsb r0, [r0, #1] cmp r0, r1 ldmeqia sp!, {r3, pc} bl sub_0202AABC - ldr r0, _023832EC ; =0x0238A2A0 + ldr r0, _023832EC ; =_0238A2A0 mvn r1, #1 ldr r0, [r0, #4] strb r1, [r0, #1] ldmia sp!, {r3, pc} .align 2, 0 -_023832EC: .word 0x0238A2A0 +_023832EC: .word _0238A2A0 arm_func_end FUN_0238328C arm_func_start ov31_023832F0 ov31_023832F0: ; 0x023832F0 stmdb sp!, {r3, lr} - ldr r0, _02383324 ; =0x0238A2A0 + ldr r0, _02383324 ; =_0238A2A0 ldr r0, [r0, #4] cmp r0, #0 ldmeqia sp!, {r3, pc} bl FUN_0238328C - ldr r0, _02383324 ; =0x0238A2A0 + ldr r0, _02383324 ; =_0238A2A0 ldr r0, [r0, #4] bl MemFree - ldr r0, _02383324 ; =0x0238A2A0 + ldr r0, _02383324 ; =_0238A2A0 mov r1, #0 str r1, [r0, #4] ldmia sp!, {r3, pc} .align 2, 0 -_02383324: .word 0x0238A2A0 +_02383324: .word _0238A2A0 arm_func_end ov31_023832F0 arm_func_start ov31_02383328 @@ -8543,3 +8543,7 @@ ov31_02389D80: ; 0x02389D80 .byte 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + + .bss +_0238A2A0: + .space 0x20 diff --git a/asm/overlay_34.s b/asm/overlay_34.s index 2d382985..5c45c2e8 100644 --- a/asm/overlay_34.s +++ b/asm/overlay_34.s @@ -8,7 +8,7 @@ ExplorersOfSkyMain: ; 0x022DC240 stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr} sub sp, sp, #0xa0 ldr r3, _022DC598 ; =ov34_022DC738 - ldr r1, _022DC59C ; =0x022DD0A0 + ldr r1, _022DC59C ; =_022DD0A0 mov r2, #0 str r3, [sp, #0x8c] str r2, [sp, #0x90] @@ -19,7 +19,7 @@ ExplorersOfSkyMain: ; 0x022DC240 bl sub_02028E2C bl sub_02017A68 bl sub_02017B70 - ldr r0, _022DC59C ; =0x022DD0A0 + ldr r0, _022DC59C ; =_022DD0A0 ldr r0, [r0, #8] cmp r0, #3 beq _022DC28C @@ -32,7 +32,7 @@ _022DC28C: ldr r0, _022DC5A4 ; =ov34_022DC5B0 strb r2, [r1] bl sub_0200383C - ldr r0, _022DC59C ; =0x022DD0A0 + ldr r0, _022DC59C ; =_022DD0A0 ldr r1, [r0, #8] cmp r1, #0xd addls pc, pc, r1, lsl #2 @@ -135,7 +135,7 @@ _022DC3F8: _022DC404: mov r8, #1 mov fp, #2 - ldr r5, _022DC59C ; =0x022DD0A0 + ldr r5, _022DC59C ; =_022DD0A0 ldr r4, _022DC5A0 ; =0x022DD080 mov r7, r8 mov r6, r8 @@ -231,20 +231,20 @@ _022DC560: mov r0, #0 bl sub_0200383C bl sub_0201DCD0 - ldr r0, _022DC59C ; =0x022DD0A0 + ldr r0, _022DC59C ; =_022DD0A0 ldr r0, [r0, #8] cmp r0, #3 beq _022DC584 bl sub_02051B44 _022DC584: bl sub_02034710 - ldr r0, _022DC59C ; =0x022DD0A0 + ldr r0, _022DC59C ; =_022DD0A0 ldr r0, [r0] add sp, sp, #0xa0 ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc} .align 2, 0 _022DC598: .word ov34_022DC738 -_022DC59C: .word 0x022DD0A0 +_022DC59C: .word _022DD0A0 _022DC5A0: .word 0x022DD080 _022DC5A4: .word ov34_022DC5B0 _022DC5A8: .word 0x022DCFF4 @@ -279,7 +279,7 @@ _022DC5F0: mov r4, r0 ldrb r0, [r1] cmp r0, #0 - ldrne r0, _022DC714 ; =0x022DD0A0 + ldrne r0, _022DC714 ; =_022DD0A0 ldrne r0, [r0, #8] cmpne r0, #1 beq _022DC6C4 @@ -335,7 +335,7 @@ _022DC6C4: bl sub_020778D0 bl sub_0201DE10 bl sub_02028E88 - ldr r0, _022DC714 ; =0x022DD0A0 + ldr r0, _022DC714 ; =_022DD0A0 ldr r0, [r0, #8] cmp r0, #3 beq _022DC6F8 @@ -349,12 +349,12 @@ _022DC6F8: ldmia sp!, {r4, pc} .align 2, 0 _022DC710: .word 0x022DD080 -_022DC714: .word 0x022DD0A0 +_022DC714: .word _022DD0A0 arm_func_end ov34_022DC5B0 arm_func_start ov34_022DC718 ov34_022DC718: ; 0x022DC718 - ldr r1, _022DC734 ; =0x022DD0A0 + ldr r1, _022DC734 ; =_022DD0A0 ldr r2, [r1] cmp r2, #0 streq r0, [r1] @@ -362,7 +362,7 @@ ov34_022DC718: ; 0x022DC718 movne r0, #0 bx lr .align 2, 0 -_022DC734: .word 0x022DD0A0 +_022DC734: .word _022DD0A0 arm_func_end ov34_022DC718 arm_func_start ov34_022DC738 @@ -1090,3 +1090,7 @@ _022DCFF0: .word 0x022DD08C .byte 0x20, 0x3D, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 .byte 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + + .bss +_022DD0A0: + .space 0xC0 diff --git a/graphics_files_rules.mk b/graphics_files_rules.mk index 76c1a7a6..d950d25d 100644 --- a/graphics_files_rules.mk +++ b/graphics_files_rules.mk @@ -10,9 +10,6 @@ $(8BPP_NSCR_FILES): GFX_FLAGS = -bitdepth 8 $(8BPP_COMP10_NOPAD_NCLR_PNG_FILES): GFX_FLAGS = -bitdepth 8 -nopad -comp 10 $(8BPP_COMP10_NOPAD_NCLR_PAL_FILES): GFX_FLAGS = -bitdepth 8 -nopad -comp 10 -LZ_FLAGS := -l2 -s -$(PADDED_LZ_FILES): LZ_FLAGS += -A4 - %.NCGR: %.png $(GFX) $< $@ $(GFX_FLAGS) @@ -27,6 +24,3 @@ $(PADDED_LZ_FILES): LZ_FLAGS += -A4 %.nbfp: %.png $(GFX) $< $@ $(GFX_FLAGS) - -%.lz: % - $(NTRCOMP) $(LZ_FLAGS) -o $@ $<