From 65a0a07be86aeddbc60489986d0f2bc6633e521d Mon Sep 17 00:00:00 2001
From: Chesyon <55322011+Chesyon@users.noreply.github.com>
Date: Fri, 19 Sep 2025 18:03:04 -0400
Subject: [PATCH] Decomp UnloadFile and MemFree

---
 asm/include/main_02000DE0.inc   |   58 +-
 asm/include/main_0200119C.inc   |   61 +
 asm/include/main_020082C4.inc   |  128 +-
 asm/include/main_02008BF4.inc   |  125 +
 asm/main_02000DE0.s             | 2710 --------------------
 asm/main_0200119C.s             | 2704 ++++++++++++++++++++
 asm/main_020082C4.s             | 4195 -------------------------------
 asm/main_02008BF4.s             | 4187 ++++++++++++++++++++++++++++++
 include/main_02001188.h         |   26 +
 include/main_02008BD4.h         |    8 +
 main.lsf                        |    4 +
 src/ground_bg.c                 |    4 +-
 src/main_02001188.c             |    8 +
 src/main_02008BD4.c             |    8 +
 src/overlay_13_EntryOverlay13.c |    2 +-
 src/overlay_15_0238AE6C.c       |    2 +-
 src/overlay_17_0238A71C.c       |    2 +-
 src/overlay_28_0238A58C.c       |    2 +-
 src/overlay_31_02382820.c       |    2 +-
 src/overlay_31_02383880.c       |    2 +-
 20 files changed, 7154 insertions(+), 7084 deletions(-)
 create mode 100644 asm/include/main_0200119C.inc
 create mode 100644 asm/include/main_02008BF4.inc
 create mode 100644 asm/main_0200119C.s
 create mode 100644 asm/main_02008BF4.s
 create mode 100644 include/main_02001188.h
 create mode 100644 include/main_02008BD4.h
 create mode 100644 src/main_02001188.c
 create mode 100644 src/main_02008BD4.c

diff --git a/asm/include/main_02000DE0.inc b/asm/include/main_02000DE0.inc
index 7f7ab1d1..2b38c85b 100644
--- a/asm/include/main_02000DE0.inc
+++ b/asm/include/main_02000DE0.inc
@@ -1,58 +1,18 @@
 #pragma once
+.public DEFAULT_MEMORY_ARENA_MEMORY
+.public Debug_FatalError
+.public Debug_Print0
+.public MEMORY_ALLOCATION_ARENA_GETTERS
+.public MemLocateSet
 .public _02090B40
 .public _02090B70
 .public _02090BA0
-.public _02090BC8
-.public _02090BFC
-.public _02090C48
-.public _02092464
 .public _020AEF08
-.public _020AEF30
-.public _020AEF58
 .public _020B3380
 .public _020B3384
 .public _020B33A0
 .public _020B33C0
-.public _0229AFC0
-.public _0229AFCC
-.public _0229AFE4
-.public _0229B004
-.public _0229B0E0
-.public _0229B0E8
-.public _0229B0F0
-.public _0229B0F8
-.public _0229B110
-.public _0229B114
-.public _022B966C
-.public CardPullOut
-.public Debug_FatalError
-.public Debug_Print0
-.public DEFAULT_MEMORY_ARENA_MEMORY
-.public GX_DispOff
-.public MEMORY_ALLOCATION_ARENA_GETTERS
-.public NATURAL_LOG_VALUE_TABLE
-.public OS_GetLockID
-.public PRNG_SEQUENCE_NUM
-.public StartThread
-.public sub_02003AD0
-.public sub_020059A8
-.public sub_02079844
-.public sub_02079888
-.public sub_02079940
-.public sub_02079A64
-.public sub_02079B0C
-.public sub_02079C14
-.public sub_02079DB8
-.public sub_02079DE0
-.public sub_02079E74
-.public sub_0207A030
-.public sub_0207A048
-.public sub_0207A0CC
-.public sub_0207A164
-.public sub_0207B930
-.public sub_02083434
-.public sub_02083450
-.public sub_0208346C
-.public sub_0208347C
-.public sub_020845D8
-.public WaitForInterrupt
+.public sub_02002C40
+.public sub_02002CAC
+.public sub_02002CB4
+.public sub_02002E98
diff --git a/asm/include/main_0200119C.inc b/asm/include/main_0200119C.inc
new file mode 100644
index 00000000..fa13d66e
--- /dev/null
+++ b/asm/include/main_0200119C.inc
@@ -0,0 +1,61 @@
+#pragma once
+.public CardPullOut
+.public Debug_FatalError
+.public Debug_Print0
+.public FindAvailableMemBlock
+.public GX_DispOff
+.public InitMemAllocTable
+.public InitMemArena
+.public MEMORY_ALLOCATION_ARENA_GETTERS
+.public MemAlloc
+.public MemAllocFlagsToBlockType
+.public NATURAL_LOG_VALUE_TABLE
+.public OS_GetLockID
+.public PRNG_SEQUENCE_NUM
+.public SplitMemBlock
+.public StartThread
+.public WaitForInterrupt
+.public _02090B40
+.public _02090BA0
+.public _02090BC8
+.public _02090BFC
+.public _02090C48
+.public _02092464
+.public _020AEF08
+.public _020AEF30
+.public _020AEF58
+.public _020B3380
+.public _020B3384
+.public _020B33A0
+.public _0229AFC0
+.public _0229AFCC
+.public _0229AFE4
+.public _0229B004
+.public _0229B0E0
+.public _0229B0E8
+.public _0229B0F0
+.public _0229B0F8
+.public _0229B110
+.public _0229B114
+.public _022B966C
+.public sub_02003AD0
+.public sub_020059A8
+.public sub_02079844
+.public sub_02079888
+.public sub_02079940
+.public sub_02079A64
+.public sub_02079B0C
+.public sub_02079C14
+.public sub_02079DB8
+.public sub_02079DE0
+.public sub_02079E74
+.public sub_0207A030
+.public sub_0207A048
+.public sub_0207A0CC
+.public sub_0207A164
+.public sub_0207B930
+.public sub_02083434
+.public sub_02083450
+.public sub_0208346C
+.public sub_0208347C
+.public sub_020845D8
diff --git a/asm/include/main_020082C4.inc b/asm/include/main_020082C4.inc
index 92e14208..c31d18d0 100644
--- a/asm/include/main_020082C4.inc
+++ b/asm/include/main_020082C4.inc
@@ -1,21 +1,14 @@
 #pragma once
-.public _0200A314
-.public _0200A344
+.public CardPullOutWithStatus
+.public DebugPrintSystemClock
+.public Debug_FatalError
+.public Debug_Print0
+.public MemAlloc
 .public _02092908
 .public _02092978
 .public _0209297C
 .public _0209299C
 .public _020929B8
-.public _02092A04
-.public _02092A18
-.public _02092A38
-.public _02092A58
-.public _02092A78
-.public _02092A98
-.public _02092AB8
-.public _02092AD8
-.public _02094AE8
-.public _02094AF0
 .public _020AF360
 .public _020AF3D0
 .public _020AF3E4
@@ -25,112 +18,9 @@
 .public _020AF490
 .public _020AF53C
 .public _020AF5E8
-.public _020AF694
-.public _020AFF38_EU
-.public _020AFF3C_EU
 .public _022A3698
 .public _022A369C
 .public _022A36C4
-.public _022A37A0
-.public _022A37A4
-.public _022A37AC
-.public _022A37AD
-.public _022A37AE
-.public _022A37AF
-.public _022A37B0
-.public _022A37B6
-.public _022A37B7
-.public _022A37B8
-.public _022A37B9
-.public _022A37BA
-.public _022A37BC
-.public _022A37BE
-.public _022A37CC
-.public _022A37D0
-.public _022A37D4
-.public _022A37D8
-.public _022A37EC
-.public _022A37ED
-.public _022A37EE
-.public _022A37EF
-.public _022A37F0
-.public _022A37F1
-.public _022A37F2
-.public _022A37F3
-.public _022A37F4
-.public _022A37F5
-.public _022A37F6
-.public _022A37F7
-.public _022A37F8
-.public _022A37F9
-.public _022A37FA
-.public _022A37FB
-.public _022A37FC
-.public _022A37FD
-.public _022A37FE
-.public _022A37FF
-.public _022A3800
-.public _022A3801
-.public _022A3802
-.public _022A3803
-.public _022A3804
-.public _022A3805
-.public _022A3806
-.public _s32_div_f
-.public ArrayFill32Fast
-.public CardPullOutWithStatus
-.public CART_REMOVED_IMG_DATA
-.public Debug_FatalError
-.public Debug_Print0
-.public DebugPrintSystemClock
-.public DecompressAtFromMemoryPointer
-.public G2x_SetBlendAlpha_
-.public G3X_ClearFifo
-.public G3X_Init
-.public G3X_SetClearColor
-.public GetLanguage
-.public GX_BeginLoadBGExtPltt
-.public GX_BeginLoadOBJExtPltt
-.public GX_DisableBankForBG
-.public GX_DisableBankForBGExtPltt
-.public GX_DisableBankForLCDC
-.public GX_DisableBankForOBJ
-.public GX_DisableBankForOBJExtPltt
-.public GX_DisableBankForSubBG
-.public GX_DisableBankForSubBGExtPltt
-.public GX_DisableBankForSubOBJ
-.public GX_DisableBankForTex
-.public GX_DisableBankForTexPltt
-.public GX_DispOff
-.public GX_DispOn
-.public GX_EndLoadBGExtPltt
-.public GX_EndLoadOBJExtPltt
-.public GX_Init
-.public GX_SetBankForBG
-.public GX_SetBankForBGExtPltt
-.public GX_SetBankForLCDC
-.public GX_SetBankForOBJ
-.public GX_SetBankForOBJExtPltt
-.public GX_SetBankForSubBG
-.public GX_SetBankForSubBGExtPltt
-.public GX_SetBankForSubOBJ
-.public GX_SetBankForTex
-.public GX_SetBankForTexPltt
-.public GX_SetGraphicsMode
-.public GXi_DmaId
-.public GXS_BeginLoadBGExtPltt
-.public GXS_BeginLoadOBJExtPltt
-.public GXS_EndLoadBGExtPltt
-.public GXS_EndLoadOBJExtPltt
-.public GXS_SetGraphicsMode
-.public GXx_SetMasterBrightness_
-.public MemAlloc
-.public Memcpy32
-.public MemcpySimple
-.public MemFree
-.public MemZero16
-.public MemZero32
-.public Rgb8ToRgb5
 .public strcpy
 .public sub_02002778
 .public sub_020027E8
@@ -149,9 +39,6 @@
 .public sub_02002F34
 .public sub_02002F7C
 .public sub_02002F98
-.public sub_02004FF8
-.public sub_02005D30
-.public sub_02005E10
 .public sub_02006ED4
 .public sub_02007004
 .public sub_02007380
@@ -172,8 +59,5 @@
 .public sub_02007CA0
 .public sub_02007D94
 .public sub_02007E2C
-.public sub_02019304
-.public sub_0207A2DC
-.public sub_0207C164
+.public sub_02008C68
 .public sub_0207F70C
-.public sub_02082420
diff --git a/asm/include/main_02008BF4.inc b/asm/include/main_02008BF4.inc
new file mode 100644
index 00000000..4ad37fbb
--- /dev/null
+++ b/asm/include/main_02008BF4.inc
@@ -0,0 +1,125 @@
+#pragma once
+.public ArrayFill32Fast
+.public CART_REMOVED_IMG_DATA
+.public Debug_Print0
+.public DecompressAtFromMemoryPointer
+.public G2x_SetBlendAlpha_
+.public G3X_ClearFifo
+.public G3X_Init
+.public G3X_SetClearColor
+.public GXS_BeginLoadBGExtPltt
+.public GXS_BeginLoadOBJExtPltt
+.public GXS_EndLoadBGExtPltt
+.public GXS_EndLoadOBJExtPltt
+.public GXS_SetGraphicsMode
+.public GX_BeginLoadBGExtPltt
+.public GX_BeginLoadOBJExtPltt
+.public GX_DisableBankForBG
+.public GX_DisableBankForBGExtPltt
+.public GX_DisableBankForLCDC
+.public GX_DisableBankForOBJ
+.public GX_DisableBankForOBJExtPltt
+.public GX_DisableBankForSubBG
+.public GX_DisableBankForSubBGExtPltt
+.public GX_DisableBankForSubOBJ
+.public GX_DisableBankForTex
+.public GX_DisableBankForTexPltt
+.public GX_DispOff
+.public GX_DispOn
+.public GX_EndLoadBGExtPltt
+.public GX_EndLoadOBJExtPltt
+.public GX_Init
+.public GX_SetBankForBG
+.public GX_SetBankForBGExtPltt
+.public GX_SetBankForLCDC
+.public GX_SetBankForOBJ
+.public GX_SetBankForOBJExtPltt
+.public GX_SetBankForSubBG
+.public GX_SetBankForSubBGExtPltt
+.public GX_SetBankForSubOBJ
+.public GX_SetBankForTex
+.public GX_SetBankForTexPltt
+.public GX_SetGraphicsMode
+.public GXi_DmaId
+.public GXx_SetMasterBrightness_
+.public GetLanguage
+.public MemAlloc
+.public MemFree
+.public MemZero16
+.public MemZero32
+.public Memcpy32
+.public MemcpySimple
+.public Rgb8ToRgb5
+.public UnloadFile
+.public _0200A314
+.public _0200A344
+.public _02092A04
+.public _02092A18
+.public _02092A38
+.public _02092A58
+.public _02092A78
+.public _02092A98
+.public _02092AB8
+.public _02092AD8
+.public _02094AE8
+.public _02094AF0
+.public _020AF694
+.public _020AFF38_EU
+.public _020AFF3C_EU
+.public _022A37A0
+.public _022A37A4
+.public _022A37AC
+.public _022A37AD
+.public _022A37AE
+.public _022A37AF
+.public _022A37B0
+.public _022A37B6
+.public _022A37B7
+.public _022A37B8
+.public _022A37B9
+.public _022A37BA
+.public _022A37BC
+.public _022A37BE
+.public _022A37CC
+.public _022A37D0
+.public _022A37D4
+.public _022A37D8
+.public _022A37EC
+.public _022A37ED
+.public _022A37EE
+.public _022A37EF
+.public _022A37F0
+.public _022A37F1
+.public _022A37F2
+.public _022A37F3
+.public _022A37F4
+.public _022A37F5
+.public _022A37F6
+.public _022A37F7
+.public _022A37F8
+.public _022A37F9
+.public _022A37FA
+.public _022A37FB
+.public _022A37FC
+.public _022A37FD
+.public _022A37FE
+.public _022A37FF
+.public _022A3800
+.public _022A3801
+.public _022A3802
+.public _022A3803
+.public _022A3804
+.public _022A3805
+.public _022A3806
+.public _s32_div_f
+.public sub_02004FF8
+.public sub_02005D30
+.public sub_02005E10
+.public sub_0200844C
+.public sub_0200846C
+.public sub_02008980
+.public sub_02008A84
+.public sub_02019304
+.public sub_0207A2DC
+.public sub_0207C164
+.public sub_02082420
diff --git a/asm/main_02000DE0.s b/asm/main_02000DE0.s
index c3cd5f62..6c525705 100644
--- a/asm/main_02000DE0.s
+++ b/asm/main_02000DE0.s
@@ -294,2713 +294,3 @@ MemAlloc: ; 0x02001170
 	.align 2, 0
 _02001184: .word MemLocateSet
 	arm_func_end MemAlloc
-
-	arm_func_start MemFree
-MemFree: ; 0x02001188
-	ldr ip, _02001198 ; =MemLocateUnset
-	mov r1, r0
-	mov r0, #0
-	bx ip
-	.align 2, 0
-_02001198: .word MemLocateUnset
-	arm_func_end MemFree
-
-	arm_func_start MemArenaAlloc
-MemArenaAlloc: ; 0x0200119C
-	stmdb sp!, {r4, r5, r6, r7, lr}
-	sub sp, sp, #0x14
-	mov r5, r0
-	ldr r0, _0200126C ; =_020AEF08
-	mov r4, r1
-	mov r7, r2
-	mov r6, r3
-	bl sub_02002CB4
-	ldr r1, _02001270 ; =MEMORY_ALLOCATION_ARENA_GETTERS
-	mov r0, r5
-	ldr r2, [r1]
-	mov r1, r6
-	blx r2
-	movs r5, r0
-	ldreq r5, _02001274 ; =_020B3384
-	mov r2, r4
-	mov r0, r5
-	mov r1, #9
-	bl FindAvailableMemBlock
-	movs r1, r0
-	bmi _02001238
-	mov r0, r5
-	mov r3, r4
-	str r6, [sp]
-	mov r2, #9
-	bl SplitMemBlock
-	ldr r2, [r0, #0xc]
-	mov r1, r7
-	str r2, [sp, #0xc]
-	ldr r2, [r0, #0x10]
-	add r0, sp, #0xc
-	str r2, [sp, #0x10]
-	bl CreateMemArena
-	mov r4, r0
-	ldr r0, _0200126C ; =_020AEF08
-	str r5, [r4, #4]
-	bl sub_02002E98
-	mov r0, r4
-	b _02001264
-_02001238:
-	ldr r0, _0200126C ; =_020AEF08
-	bl sub_02002E98
-	ldr r1, _02001278 ; =_02090B40
-	add r0, sp, #4
-	ldr r3, [r1, #0xc]
-	ldr ip, [r1, #8]
-	ldr r1, _0200127C ; =_02090BC8
-	mov r2, r4
-	str ip, [sp, #4]
-	str r3, [sp, #8]
-	bl Debug_FatalError
-_02001264:
-	add sp, sp, #0x14
-	ldmia sp!, {r4, r5, r6, r7, pc}
-	.align 2, 0
-_0200126C: .word _020AEF08
-_02001270: .word MEMORY_ALLOCATION_ARENA_GETTERS
-_02001274: .word _020B3384
-_02001278: .word _02090B40
-_0200127C: .word _02090BC8
-	arm_func_end MemArenaAlloc
-
-	arm_func_start CreateMemArena
-CreateMemArena: ; 0x02001280
-	stmdb sp!, {r4, lr}
-	sub sp, sp, #8
-	mov r3, r1
-	mov r1, #0x18
-	mul r2, r3, r1
-	ldr r1, [r0, #4]
-	ldr r4, [r0]
-	add r0, r2, #3
-	bic ip, r0, #3
-	sub r0, r1, #0x1c
-	sub r0, r0, ip
-	bic lr, r0, #3
-	add r2, r4, #0x1c
-	add ip, r2, ip
-	add r1, sp, #0
-	mov r0, r4
-	str ip, [sp]
-	str lr, [sp, #4]
-	bl InitMemArena
-	mov r0, r4
-	add sp, sp, #8
-	ldmia sp!, {r4, pc}
-	arm_func_end CreateMemArena
-
-	arm_func_start sub_020012D8
-sub_020012D8: ; 0x020012D8
-	stmdb sp!, {r3, lr}
-	movs r1, r0
-	ldmeqia sp!, {r3, pc}
-	ldr r0, [r1, #0xc]
-	cmp r0, #1
-	ldreq r0, [r1, #8]
-	ldreq r0, [r0, #4]
-	cmpeq r0, #0
-	moveq r0, #1
-	movne r0, #0
-	tst r0, #0xff
-	ldmeqia sp!, {r3, pc}
-	ldr r0, _02001388 ; =_020B3380
-	mov ip, #0
-	mov r3, ip
-	ldr lr, [r0]
-	ldr r2, _0200138C ; =_020B33A0
-	b _02001368
-_02001320:
-	ldr r0, [r2, r3, lsl #2]
-	cmp r0, r1
-	bne _02001364
-	ldr r0, _02001388 ; =_020B3380
-	ldr r2, [r0]
-	sub ip, r2, #1
-	str ip, [r0]
-	ldr r2, _0200138C ; =_020B33A0
-	b _02001354
-_02001344:
-	add r0, r2, r3, lsl #2
-	ldr r0, [r0, #4]
-	str r0, [r2, r3, lsl #2]
-	add r3, r3, #1
-_02001354:
-	cmp r3, ip
-	blt _02001344
-	mov ip, #1
-	b _02001370
-_02001364:
-	add r3, r3, #1
-_02001368:
-	cmp r3, lr
-	blt _02001320
-_02001370:
-	cmp ip, #0
-	ldrne r0, [r1, #4]
-	cmpne r0, #0
-	ldmeqia sp!, {r3, pc}
-	bl MemLocateUnset
-	ldmia sp!, {r3, pc}
-	.align 2, 0
-_02001388: .word _020B3380
-_0200138C: .word _020B33A0
-	arm_func_end sub_020012D8
-
-	arm_func_start MemLocateSet
-MemLocateSet: ; 0x02001390
-	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
-	sub sp, sp, #0x20
-	mov r4, r0
-	ldr r0, _0200161C ; =_020AEF08
-	mov r5, r1
-	orr r7, r2, #0x100
-	bl sub_02002CB4
-	ldr r1, _02001620 ; =MEMORY_ALLOCATION_ARENA_GETTERS
-	mov r0, r4
-	ldr r2, [r1]
-	mov r1, r7
-	blx r2
-	movs r4, r0
-	mov r0, r7, asr #8
-	orr r8, r0, #1
-	and r0, r8, #2
-	ldreq r4, _02001624 ; =_020B3384
-	cmp r0, #2
-	and sb, r7, #0xff
-	bne _020015A0
-	tst r8, #4
-	ldr r0, [r4, #8]
-	ldr lr, [r4, #0xc]
-	beq _02001458
-	mov r2, r0
-	mov r7, #0
-	b _02001420
-_020013FC:
-	ldr r1, [r2, #4]
-	tst r1, #1
-	bne _02001418
-	ldr r1, [r2, #0x10]
-	cmp r1, r5
-	blt _0200144C
-	b _020014A8
-_02001418:
-	add r7, r7, #1
-	add r2, r2, #0x18
-_02001420:
-	cmp r7, lr
-	blt _020013FC
-	b _0200144C
-_0200142C:
-	ldr r1, [r2, #4]
-	tst r1, #1
-	bne _02001444
-	ldr r1, [r2, #0x10]
-	cmp r1, r5
-	bge _020014A8
-_02001444:
-	add r7, r7, #1
-	add r2, r2, #0x18
-_0200144C:
-	cmp r7, lr
-	blt _0200142C
-	b _020014A4
-_02001458:
-	mov sl, r0
-	mvn r7, #0
-	ldr r2, _02001628 ; =0x001E6401
-	mov r3, #0
-	b _02001498
-_0200146C:
-	ldr r1, [sl, #4]
-	tst r1, #1
-	bne _02001490
-	ldr r1, [sl, #0x10]
-	cmp r1, r5
-	blt _02001490
-	cmp r1, r2
-	movlt r7, r3
-	movlt r2, r1
-_02001490:
-	add r3, r3, #1
-	add sl, sl, #0x18
-_02001498:
-	cmp r3, lr
-	blt _0200146C
-	b _020014A8
-_020014A4:
-	mvn r7, #0
-_020014A8:
-	cmp r7, #0
-	blt _020015DC
-	mov r1, #0x18
-	mla r6, r7, r1, r0
-	add r3, r5, #3
-	ldr r2, [r6, #0x10]
-	bic fp, r3, #3
-	cmp r2, fp
-	ble _02001584
-	mla ip, lr, r1, r0
-	b _0200150C
-_020014D4:
-	sub r0, ip, #0x18
-	mov sl, r0
-	ldmia sl!, {r0, r1, r2, r3}
-	str sl, [sp, #0xc]
-	mov sl, ip
-	stmia sl!, {r0, r1, r2, r3}
-	str ip, [sp, #8]
-	ldr r0, [sp, #0xc]
-	mov r2, sl
-	ldmia r0, {r0, r1}
-	stmia r2, {r0, r1}
-	str sl, [sp, #8]
-	sub lr, lr, #1
-	sub ip, ip, #0x18
-_0200150C:
-	cmp lr, r7
-	bgt _020014D4
-	ldr r0, [r4, #0xc]
-	add r1, r0, #1
-	str r1, [r4, #0xc]
-	ldr r0, [r4, #0x10]
-	cmp r1, r0
-	ble _02001554
-	ldr r1, _0200162C ; =_02090B40
-	add r0, sp, #0x18
-	ldr r2, [r1, #0x14]
-	ldr r1, [r1, #0x10]
-	str r2, [sp, #0x1c]
-	str r1, [sp, #0x18]
-	ldr r2, [r4, #0xc]
-	ldr r3, [r4, #0x10]
-	ldr r1, _02001630 ; =_02090BA0
-	bl Debug_FatalError
-_02001554:
-	ldr r2, [r4, #8]
-	add r1, r7, #1
-	mov r0, #0x18
-	mla r2, r1, r0, r2
-	ldr r0, [r2, #0xc]
-	add r0, r0, fp
-	str r0, [r2, #0xc]
-	ldr r0, [r2, #0x10]
-	sub r0, r0, fp
-	str r0, [r2, #0x10]
-	str fp, [r6, #0x10]
-	str r5, [r6, #0x14]
-_02001584:
-	mov r0, r8
-	bl MemAllocFlagsToBlockType
-	stmia r6, {r0, r8, sb}
-	ldr r0, _0200161C ; =_020AEF08
-	ldr r6, [r6, #0xc]
-	bl sub_02002E98
-	b _02001610
-_020015A0:
-	mov r0, r4
-	mov r1, r8
-	mov r2, r5
-	bl FindAvailableMemBlock
-	movs r1, r0
-	bmi _020015DC
-	mov r0, r4
-	mov r2, r8
-	mov r3, r5
-	str sb, [sp]
-	bl SplitMemBlock
-	ldr r6, [r0, #0xc]
-	ldr r0, _0200161C ; =_020AEF08
-	bl sub_02002E98
-	b _02001610
-_020015DC:
-	ldr r0, _0200161C ; =_020AEF08
-	bl sub_02002E98
-	ldr r1, _0200162C ; =_02090B40
-	add r0, sp, #0x10
-	ldr r2, [r1, #4]
-	ldr r1, [r1]
-	str r2, [sp, #0x14]
-	str r1, [sp, #0x10]
-	ldr r1, _02001634 ; =_02090BFC
-	mov r2, r4
-	mov r3, r5
-	stmia sp, {r8, sb}
-	bl Debug_FatalError
-_02001610:
-	mov r0, r6
-	add sp, sp, #0x20
-	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-	.align 2, 0
-_0200161C: .word _020AEF08
-_02001620: .word MEMORY_ALLOCATION_ARENA_GETTERS
-_02001624: .word _020B3384
-_02001628: .word 0x001E6401
-_0200162C: .word _02090B40
-_02001630: .word _02090BA0
-_02001634: .word _02090BFC
-	arm_func_end MemLocateSet
-
-	arm_func_start MemLocateUnset
-MemLocateUnset: ; 0x02001638
-	stmdb sp!, {r4, r5, r6, r7, r8, lr}
-	mov r7, r0
-	ldr r0, _020017A8 ; =_020AEF08
-	mov r6, r1
-	bl sub_02002CB4
-	ldr r1, _020017AC ; =MEMORY_ALLOCATION_ARENA_GETTERS
-	mov r0, r7
-	ldr r2, [r1, #4]
-	mov r1, r6
-	blx r2
-	movs r7, r0
-	ldreq r7, _020017B0 ; =_020B3384
-	cmp r6, #0
-	bne _0200167C
-	ldr r0, _020017A8 ; =_020AEF08
-	bl sub_02002E98
-	ldmia sp!, {r4, r5, r6, r7, r8, pc}
-_0200167C:
-	ldr r4, [r7, #8]
-	ldr r1, [r7, #0xc]
-	mov r5, #0
-	b _02001794
-_0200168C:
-	ldr r0, [r4, #0xc]
-	cmp r0, r6
-	bne _0200178C
-	mov r0, #0
-	str r0, [r4]
-	str r0, [r4, #4]
-	str r0, [r4, #0x14]
-	str r0, [r4, #8]
-	ldr r0, [r7, #0xc]
-	sub r0, r0, #1
-	cmp r5, r0
-	bge _0200171C
-	add ip, r4, #0x18
-	ldr r0, [ip, #4]
-	cmp r0, #0
-	bne _0200171C
-	ldr r1, [r4, #0x10]
-	ldr r0, [ip, #0x10]
-	add lr, r5, #1
-	add r0, r1, r0
-	str r0, [r4, #0x10]
-	ldr r0, [r7, #0xc]
-	sub r0, r0, #1
-	str r0, [r7, #0xc]
-	b _02001710
-_020016F0:
-	add r8, ip, #0x18
-	mov r6, ip
-	ldmia r8!, {r0, r1, r2, r3}
-	stmia r6!, {r0, r1, r2, r3}
-	ldmia r8, {r0, r1}
-	stmia r6, {r0, r1}
-	add lr, lr, #1
-	add ip, ip, #0x18
-_02001710:
-	ldr r0, [r7, #0xc]
-	cmp lr, r0
-	blt _020016F0
-_0200171C:
-	cmp r5, #0
-	ble _02001780
-	sub r2, r4, #0x18
-	ldr r0, [r2, #4]
-	cmp r0, #0
-	bne _02001780
-	ldr r1, [r2, #0x10]
-	ldr r0, [r4, #0x10]
-	add r0, r1, r0
-	str r0, [r2, #0x10]
-	ldr r0, [r7, #0xc]
-	sub r0, r0, #1
-	str r0, [r7, #0xc]
-	b _02001774
-_02001754:
-	add ip, r4, #0x18
-	mov r6, r4
-	ldmia ip!, {r0, r1, r2, r3}
-	stmia r6!, {r0, r1, r2, r3}
-	ldmia ip, {r0, r1}
-	stmia r6, {r0, r1}
-	add r5, r5, #1
-	add r4, r4, #0x18
-_02001774:
-	ldr r0, [r7, #0xc]
-	cmp r5, r0
-	blt _02001754
-_02001780:
-	ldr r0, _020017A8 ; =_020AEF08
-	bl sub_02002E98
-	ldmia sp!, {r4, r5, r6, r7, r8, pc}
-_0200178C:
-	add r5, r5, #1
-	add r4, r4, #0x18
-_02001794:
-	cmp r5, r1
-	blt _0200168C
-	ldr r0, _020017A8 ; =_020AEF08
-	bl sub_02002E98
-	ldmia sp!, {r4, r5, r6, r7, r8, pc}
-	.align 2, 0
-_020017A8: .word _020AEF08
-_020017AC: .word MEMORY_ALLOCATION_ARENA_GETTERS
-_020017B0: .word _020B3384
-	arm_func_end MemLocateUnset
-
-	arm_func_start sub_020017B4
-sub_020017B4: ; 0x020017B4
-	ldr r2, [r0, #8]
-	ldr ip, [r0, #0xc]
-	mov r3, #0
-	b _020017DC
-_020017C4:
-	ldr r0, [r2, #0xc]
-	cmp r0, r1
-	moveq r0, #1
-	bxeq lr
-	add r3, r3, #1
-	add r2, r2, #0x18
-_020017DC:
-	cmp r3, ip
-	blt _020017C4
-	mov r0, #0
-	bx lr
-	arm_func_end sub_020017B4
-
-	arm_func_start sub_020017EC
-sub_020017EC: ; 0x020017EC
-	stmdb sp!, {r3, lr}
-	ldr r0, _02001804 ; =_020AEF08
-	bl sub_02002CB4
-	ldr r0, _02001804 ; =_020AEF08
-	bl sub_02002E98
-	ldmia sp!, {r3, pc}
-	.align 2, 0
-_02001804: .word _020AEF08
-	arm_func_end sub_020017EC
-
-	arm_func_start sub_02001808
-sub_02001808: ; 0x02001808
-	stmdb sp!, {r4, lr}
-	ldr r0, _0200187C ; =_020AEF08
-	bl sub_02002CB4
-	ldr r0, _02001880 ; =MEMORY_ALLOCATION_ARENA_GETTERS
-	mov r4, #0
-	ldr r2, [r0]
-	ldr r0, _02001884 ; =_020B3384
-	mov r1, r4
-	blx r2
-	cmp r0, #0
-	ldreq r0, _02001884 ; =_020B3384
-	mov r1, #0
-	ldr r2, [r0, #8]
-	ldr r3, [r0, #0xc]
-	b _02001864
-_02001844:
-	ldr r0, [r2]
-	cmp r0, #0
-	bne _0200185C
-	ldr r0, [r2, #0x10]
-	cmp r4, r0
-	movlt r4, r0
-_0200185C:
-	add r1, r1, #1
-	add r2, r2, #0x18
-_02001864:
-	cmp r1, r3
-	blt _02001844
-	ldr r0, _0200187C ; =_020AEF08
-	bl sub_02002E98
-	mov r0, r4
-	ldmia sp!, {r4, pc}
-	.align 2, 0
-_0200187C: .word _020AEF08
-_02001880: .word MEMORY_ALLOCATION_ARENA_GETTERS
-_02001884: .word _020B3384
-	arm_func_end sub_02001808
-
-	arm_func_start sub_02001888
-sub_02001888: ; 0x02001888
-	tst r0, #0xff
-	addne r0, r0, #0x100
-	bx lr
-	arm_func_end sub_02001888
-
-	arm_func_start RoundUpDiv256
-RoundUpDiv256: ; 0x02001894
-	tst r0, #0xff
-	addne r0, r0, #0x100
-	mov r0, r0, asr #8
-	bx lr
-	arm_func_end RoundUpDiv256
-
-	arm_func_start sub_020018A4
-sub_020018A4: ; 0x020018A4
-	and r2, r1, #0
-	and r3, r0, #0xff
-	cmp r2, #0
-	cmpeq r3, #0
-	mov r2, #0
-	beq _020018C4
-	adds r0, r0, #0x100
-	adc r1, r1, r2
-_020018C4:
-	mov r0, r0, lsr #8
-	orr r0, r0, r1, lsl #24
-	bx lr
-	arm_func_end sub_020018A4
-
-	arm_func_start SinAbs4096
-SinAbs4096: ; 0x020018D0
-	and r1, r0, #0xc00
-	cmp r1, #0x400
-	bgt _020018EC
-	bge _0200191C
-	cmp r1, #0
-	beq _02001908
-	b _02001970
-_020018EC:
-	cmp r1, #0x800
-	bgt _020018FC
-	beq _02001938
-	b _02001970
-_020018FC:
-	cmp r1, #0xc00
-	beq _02001950
-	b _02001970
-_02001908:
-	mov r1, r0, lsl #0x16
-	ldr r0, _02001978 ; =_02090C48
-	mov r1, r1, lsr #0x15
-	ldrsh r0, [r0, r1]
-	bx lr
-_0200191C:
-	ldr r1, _0200197C ; =0x000003FF
-	ldr r2, _02001978 ; =_02090C48
-	and r0, r0, r1
-	sub r0, r1, r0
-	mov r0, r0, lsl #1
-	ldrsh r0, [r2, r0]
-	bx lr
-_02001938:
-	mov r1, r0, lsl #0x16
-	ldr r0, _02001978 ; =_02090C48
-	mov r1, r1, lsr #0x15
-	ldrsh r0, [r0, r1]
-	rsb r0, r0, #0
-	bx lr
-_02001950:
-	ldr r1, _0200197C ; =0x000003FF
-	ldr r2, _02001978 ; =_02090C48
-	and r0, r0, r1
-	sub r0, r1, r0
-	mov r0, r0, lsl #1
-	ldrsh r0, [r2, r0]
-	rsb r0, r0, #0
-	bx lr
-_02001970:
-	mov r0, #0
-	bx lr
-	.align 2, 0
-_02001978: .word _02090C48
-_0200197C: .word 0x000003FF
-	arm_func_end SinAbs4096
-
-	arm_func_start sub_02001980
-sub_02001980: ; 0x02001980
-	and r1, r0, #0xc00
-	cmp r1, #0x400
-	bgt _0200199C
-	bge _020019D4
-	cmp r1, #0
-	beq _020019B8
-	b _02001A20
-_0200199C:
-	cmp r1, #0x800
-	bgt _020019AC
-	beq _020019EC
-	b _02001A20
-_020019AC:
-	cmp r1, #0xc00
-	beq _02001A0C
-	b _02001A20
-_020019B8:
-	ldr r1, _02001A28 ; =0x000003FF
-	ldr r2, _02001A2C ; =_02090C48
-	and r0, r0, r1
-	sub r0, r1, r0
-	mov r0, r0, lsl #1
-	ldrsh r0, [r2, r0]
-	bx lr
-_020019D4:
-	mov r1, r0, lsl #0x16
-	ldr r0, _02001A2C ; =_02090C48
-	mov r1, r1, lsr #0x15
-	ldrsh r0, [r0, r1]
-	rsb r0, r0, #0
-	bx lr
-_020019EC:
-	ldr r1, _02001A28 ; =0x000003FF
-	ldr r2, _02001A2C ; =_02090C48
-	and r0, r0, r1
-	sub r0, r1, r0
-	mov r0, r0, lsl #1
-	ldrsh r0, [r2, r0]
-	rsb r0, r0, #0
-	bx lr
-_02001A0C:
-	mov r1, r0, lsl #0x16
-	ldr r0, _02001A2C ; =_02090C48
-	mov r1, r1, lsr #0x15
-	ldrsh r0, [r0, r1]
-	bx lr
-_02001A20:
-	mov r0, #0
-	bx lr
-	.align 2, 0
-_02001A28: .word 0x000003FF
-_02001A2C: .word _02090C48
-	arm_func_end sub_02001980
-
-	arm_func_start UFixedPoint64CmpLt
-UFixedPoint64CmpLt: ; 0x02001A30
-	cmp r0, r2
-	movlo r0, #1
-	bxlo lr
-	movhi r0, #0
-	bxhi lr
-	cmp r1, r3
-	movlo r0, #1
-	movhs r0, #0
-	bx lr
-	arm_func_end UFixedPoint64CmpLt
-
-	arm_func_start MultiplyByFixedPoint
-MultiplyByFixedPoint: ; 0x02001A54
-	stmdb sp!, {r3, r4, r5, lr}
-	tst r0, #0x80000000
-	movne r2, #1
-	moveq r2, #0
-	tst r1, #0x80000000
-	and r4, r2, #0xff
-	movne r2, #1
-	moveq r2, #0
-	cmp r0, #0
-	and r5, r2, #0xff
-	moveq r0, #0
-	ldmeqia sp!, {r3, r4, r5, pc}
-	cmp r1, #0
-	moveq r0, #0
-	ldmeqia sp!, {r3, r4, r5, pc}
-	cmp r4, #0
-	rsbne r0, r0, #0
-	cmp r5, #0
-	rsbne r1, r1, #0
-	bl UMultiplyByFixedPoint
-	cmp r4, r5
-	rsbne r0, r0, #0
-	ldmia sp!, {r3, r4, r5, pc}
-	arm_func_end MultiplyByFixedPoint
-
-	arm_func_start sub_02001AB0
-sub_02001AB0: ; 0x02001AB0
-	stmdb sp!, {r3, r4, r5, lr}
-	tst r0, #0x80000000
-	movne r2, #1
-	moveq r2, #0
-	tst r1, #0x80000000
-	and r4, r2, #0xff
-	movne r2, #1
-	moveq r2, #0
-	cmp r1, #0
-	and r5, r2, #0xff
-	mvneq r0, #0x80000000
-	ldmeqia sp!, {r3, r4, r5, pc}
-	cmp r0, #0
-	moveq r0, #0
-	ldmeqia sp!, {r3, r4, r5, pc}
-	cmp r4, #0
-	rsbne r0, r0, #0
-	cmp r5, #0
-	rsbne r1, r1, #0
-	bl sub_02001BB4
-	cmp r4, r5
-	rsbne r0, r0, #0
-	ldmia sp!, {r3, r4, r5, pc}
-	arm_func_end sub_02001AB0
-
-	arm_func_start UMultiplyByFixedPoint
-UMultiplyByFixedPoint: ; 0x02001B0C
-	stmdb sp!, {r3, r4, r5, lr}
-	cmp r0, #0
-	moveq r0, #0
-	ldmeqia sp!, {r3, r4, r5, pc}
-	cmp r1, #0
-	moveq r0, #0
-	ldmeqia sp!, {r3, r4, r5, pc}
-	mov r3, #0
-	mov r2, r3
-	mov ip, r3
-	mov lr, r3
-	mov r4, r3
-_02001B3C:
-	mov r5, lr
-	tst r1, #1
-	beq _02001B58
-	add lr, lr, r0
-	add ip, ip, r3
-	cmp r5, lr
-	addhi ip, ip, #1
-_02001B58:
-	mov r1, r1, lsr #1
-	tst r2, #1
-	orrne r1, r1, #0x80000000
-	mov r2, r2, lsr #1
-	tst r0, #0x80000000
-	mov r3, r3, lsl #1
-	mov r0, r0, lsl #1
-	add r4, r4, #1
-	orrne r3, r3, #1
-	bic r2, r2, #0x80000000
-	cmp r4, #0x40
-	bic r0, r0, #1
-	blt _02001B3C
-	mov r0, lr, lsr #8
-	tst lr, #0x80
-	movne r1, #1
-	bic r0, r0, #0xff000000
-	moveq r1, #0
-	orr lr, r0, ip, lsl #24
-	tst r1, #0xff
-	addne lr, lr, #1
-	mov r0, lr
-	ldmia sp!, {r3, r4, r5, pc}
-	arm_func_end UMultiplyByFixedPoint
-
-	arm_func_start sub_02001BB4
-sub_02001BB4: ; 0x02001BB4
-	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
-	movs sl, r1
-	mvneq r0, #0x80000000
-	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-	cmp r0, #0
-	moveq r0, #0
-	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-	mov r8, #0
-	mov r1, r0, asr #0x18
-	mov r0, r0, lsl #8
-	mov r4, r8
-	mov r5, r8
-	mov sb, r8
-	and r6, r1, #0xff
-	bic r7, r0, #0xff
-	mov fp, r8
-_02001BF4:
-	mov r0, r5, lsl #1
-	tst r5, #0x80000000
-	mov r4, r4, lsl #1
-	orrne r4, r4, #1
-	bic r5, r0, #1
-	tst r6, #0x80000000
-	orrne r5, r5, #1
-	mov r3, r7, lsl #1
-	tst r7, #0x80000000
-	mov r6, r6, lsl #1
-	bic r7, r3, #1
-	mov r0, r4
-	mov r1, r5
-	mov r2, fp
-	mov r3, sl
-	orrne r6, r6, #1
-	bl UFixedPoint64CmpLt
-	cmp r0, #0
-	bne _02001C58
-	mov r0, r5
-	sub r5, r5, sl
-	cmp r0, r5
-	mov r1, #1
-	sublo r4, r4, #1
-	b _02001C5C
-_02001C58:
-	mov r1, #0
-_02001C5C:
-	mov r0, r8, lsl #1
-	bic r8, r0, #1
-	cmp r1, #0
-	add sb, sb, #1
-	orrne r8, r8, #1
-	cmp sb, #0x40
-	blt _02001BF4
-	mov r0, r8
-	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-	arm_func_end sub_02001BB4
-
-	arm_func_start IntToFixedPoint64
-IntToFixedPoint64: ; 0x02001C80
-	mov r2, #0x10000
-	rsb r2, r2, #0
-	and r3, r1, r2
-	mov r3, r3, lsr #0x10
-	str r3, [r0]
-	mov r3, r1, lsl #0x10
-	str r3, [r0, #4]
-	tst r1, #0x8000
-	ldrne r1, [r0]
-	orrne r1, r1, r2
-	strne r1, [r0]
-	bx lr
-	arm_func_end IntToFixedPoint64
-
-	arm_func_start FixedPoint64ToInt
-FixedPoint64ToInt: ; 0x02001CB0
-	ldmia r0, {r1, r2}
-	mov r0, #0x10000
-	rsb r0, r0, #0
-	mov r1, r1, lsl #0x10
-	and r0, r2, r0
-	orr r0, r1, r0, lsr #16
-	tst r2, #0x8000
-	addne r0, r0, #1
-	bx lr
-	arm_func_end FixedPoint64ToInt
-
-	arm_func_start FixedPoint32To64
-FixedPoint32To64: ; 0x02001CD4
-	mov r2, r1, asr #0x18
-	mov r3, r1, lsl #8
-	tst r2, #0x80
-	mvnne r1, #0x7f
-	orrne r1, r2, r1
-	stmia r0, {r2, r3}
-	andeq r1, r2, #0x7f
-	str r1, [r0]
-	bx lr
-	arm_func_end FixedPoint32To64
-
-	arm_func_start NegateFixedPoint64
-NegateFixedPoint64: ; 0x02001CF8
-	ldr r2, [r0]
-	mvn r1, #0
-	eor r2, r2, r1
-	str r2, [r0]
-	ldr r2, [r0, #4]
-	eor r2, r2, r1
-	adds r1, r2, #1
-	str r1, [r0, #4]
-	ldreq r1, [r0]
-	addeq r1, r1, #1
-	streq r1, [r0]
-	bx lr
-	arm_func_end NegateFixedPoint64
-
-	arm_func_start FixedPoint64IsZero
-FixedPoint64IsZero: ; 0x02001D28
-	ldr r1, [r0]
-	cmp r1, #0
-	movne r0, #0
-	bxne lr
-	ldr r0, [r0, #4]
-	cmp r0, #0
-	moveq r0, #1
-	movne r0, #0
-	and r0, r0, #0xff
-	bx lr
-	arm_func_end FixedPoint64IsZero
-
-	arm_func_start FixedPoint64IsNegative
-FixedPoint64IsNegative: ; 0x02001D50
-	ldr r0, [r0]
-	tst r0, #0x80000000
-	movne r0, #1
-	moveq r0, #0
-	and r0, r0, #0xff
-	bx lr
-	arm_func_end FixedPoint64IsNegative
-
-	arm_func_start FixedPoint64CmpLt
-FixedPoint64CmpLt: ; 0x02001D68
-	stmdb sp!, {r3, lr}
-	mov ip, r1
-	ldr r2, [ip]
-	mov lr, r0
-	tst r2, #0x80000000
-	movne r1, #2
-	ldr r0, [lr]
-	moveq r1, #0
-	tst r0, #0x80000000
-	movne r3, #1
-	moveq r3, #0
-	orr r1, r3, r1
-	cmp r1, #3
-	addls pc, pc, r1, lsl #2
-	b _02001DB4
-_02001DA4: ; jump table
-	b _02001DB4 ; case 0
-	b _02001DC4 ; case 1
-	b _02001DCC ; case 2
-	b _02001DD4 ; case 3
-_02001DB4:
-	ldr r1, [lr, #4]
-	ldr r3, [ip, #4]
-	bl UFixedPoint64CmpLt
-	ldmia sp!, {r3, pc}
-_02001DC4:
-	mov r0, #1
-	ldmia sp!, {r3, pc}
-_02001DCC:
-	mov r0, #0
-	ldmia sp!, {r3, pc}
-_02001DD4:
-	ldr r1, [lr, #4]
-	ldr r3, [ip, #4]
-	bl UFixedPoint64CmpLt
-	cmp r0, #0
-	moveq r0, #1
-	movne r0, #0
-	and r0, r0, #0xff
-	ldmia sp!, {r3, pc}
-	arm_func_end FixedPoint64CmpLt
-
-	arm_func_start MultiplyFixedPoint64
-MultiplyFixedPoint64: ; 0x02001DF4
-	stmdb sp!, {r4, r5, r6, lr}
-	sub sp, sp, #0x18
-	ldr r3, [r1]
-	mov r4, r0
-	str r3, [sp, #0x10]
-	ldr r1, [r1, #4]
-	add r0, sp, #0x10
-	str r1, [sp, #0x14]
-	ldr r1, [r2]
-	str r1, [sp, #8]
-	ldr r1, [r2, #4]
-	str r1, [sp, #0xc]
-	bl FixedPoint64IsNegative
-	mov r5, r0
-	add r0, sp, #8
-	bl FixedPoint64IsNegative
-	mov r6, r0
-	add r0, sp, #0x10
-	bl FixedPoint64IsZero
-	cmp r0, #0
-	movne r0, #0
-	strne r0, [r4]
-	strne r0, [r4, #4]
-	bne _02001EC0
-	add r0, sp, #8
-	bl FixedPoint64IsZero
-	cmp r0, #0
-	movne r0, #0
-	strne r0, [r4]
-	strne r0, [r4, #4]
-	bne _02001EC0
-	cmp r5, #0
-	beq _02001E80
-	add r0, sp, #0x10
-	bl NegateFixedPoint64
-_02001E80:
-	cmp r6, #0
-	beq _02001E90
-	add r0, sp, #8
-	bl NegateFixedPoint64
-_02001E90:
-	add r0, sp, #0
-	add r1, sp, #0x10
-	add r2, sp, #8
-	bl UMultiplyFixedPoint64
-	cmp r5, r6
-	beq _02001EB0
-	add r0, sp, #0
-	bl NegateFixedPoint64
-_02001EB0:
-	ldr r0, [sp]
-	str r0, [r4]
-	ldr r0, [sp, #4]
-	str r0, [r4, #4]
-_02001EC0:
-	add sp, sp, #0x18
-	ldmia sp!, {r4, r5, r6, pc}
-	arm_func_end MultiplyFixedPoint64
-
-	arm_func_start DivideFixedPoint64
-DivideFixedPoint64: ; 0x02001EC8
-	stmdb sp!, {r4, r5, r6, lr}
-	sub sp, sp, #0x18
-	ldr r3, [r1]
-	mov r4, r0
-	str r3, [sp, #0x10]
-	ldr r1, [r1, #4]
-	add r0, sp, #0x10
-	str r1, [sp, #0x14]
-	ldr r1, [r2]
-	str r1, [sp, #8]
-	ldr r1, [r2, #4]
-	str r1, [sp, #0xc]
-	bl FixedPoint64IsNegative
-	mov r5, r0
-	add r0, sp, #8
-	bl FixedPoint64IsNegative
-	mov r6, r0
-	add r0, sp, #8
-	bl FixedPoint64IsZero
-	cmp r0, #0
-	mvnne r0, #0x80000000
-	strne r0, [r4]
-	subne r0, r0, #0x80000000
-	strne r0, [r4, #4]
-	bne _02001F98
-	add r0, sp, #0x10
-	bl FixedPoint64IsZero
-	cmp r0, #0
-	movne r0, #0
-	strne r0, [r4]
-	strne r0, [r4, #4]
-	bne _02001F98
-	cmp r5, #0
-	beq _02001F58
-	add r0, sp, #0x10
-	bl NegateFixedPoint64
-_02001F58:
-	cmp r6, #0
-	beq _02001F68
-	add r0, sp, #8
-	bl NegateFixedPoint64
-_02001F68:
-	add r0, sp, #0
-	add r1, sp, #0x10
-	add r2, sp, #8
-	bl UDivideFixedPoint64
-	cmp r5, r6
-	beq _02001F88
-	add r0, sp, #0
-	bl NegateFixedPoint64
-_02001F88:
-	ldr r0, [sp]
-	str r0, [r4]
-	ldr r0, [sp, #4]
-	str r0, [r4, #4]
-_02001F98:
-	add sp, sp, #0x18
-	ldmia sp!, {r4, r5, r6, pc}
-	arm_func_end DivideFixedPoint64
-
-	arm_func_start UMultiplyFixedPoint64
-UMultiplyFixedPoint64: ; 0x02001FA0
-	stmdb sp!, {r4, r5, r6, lr}
-	mov r6, r1
-	mov r4, r0
-	mov r0, r6
-	mov r5, r2
-	bl FixedPoint64IsZero
-	cmp r0, #0
-	movne r0, #0
-	strne r0, [r4]
-	strne r0, [r4, #4]
-	ldmneia sp!, {r4, r5, r6, pc}
-	mov r0, r5
-	bl FixedPoint64IsZero
-	cmp r0, #0
-	movne r0, #0
-	strne r0, [r4]
-	strne r0, [r4, #4]
-	ldmneia sp!, {r4, r5, r6, pc}
-	mov lr, #0
-	ldmia r6, {r1, r2}
-	ldmia r5, {r3, ip}
-	mov r5, lr
-	mov r6, lr
-_02001FFC:
-	mov r0, r5
-	tst ip, #1
-	beq _02002018
-	add r5, r5, r2
-	add lr, lr, r1
-	cmp r0, r5
-	addhi lr, lr, #1
-_02002018:
-	mov r0, r3, lsr #1
-	tst r3, #1
-	mov ip, ip, lsr #1
-	bic r3, r0, #0x80000000
-	orrne ip, ip, #0x80000000
-	mov r1, r1, lsl #1
-	tst r2, #0x80000000
-	mov r0, r2, lsl #1
-	add r6, r6, #1
-	orrne r1, r1, #1
-	cmp r6, #0x40
-	bic r2, r0, #1
-	blt _02001FFC
-	mov r0, r5, lsr #0x10
-	mov r0, r0, lsl #0x10
-	tst r5, #0x8000
-	mov r1, lr, lsl #0x10
-	movne r2, #1
-	orr r5, r1, r0, lsr #16
-	mov r0, lr, lsr #0x10
-	moveq r2, #0
-	mov r0, r0, lsl #0x10
-	tst r2, #0xff
-	addne r5, r5, #1
-	mov r0, r0, lsr #0x10
-	stmia r4, {r0, r5}
-	ldmia sp!, {r4, r5, r6, pc}
-	arm_func_end UMultiplyFixedPoint64
-
-	arm_func_start UDivideFixedPoint64
-UDivideFixedPoint64: ; 0x02002084
-	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
-	sub sp, sp, #8
-	mov r4, r2
-	mov sl, r0
-	mov r0, r4
-	mov r5, r1
-	bl FixedPoint64IsZero
-	cmp r0, #0
-	mvnne r0, #0x80000000
-	strne r0, [sl]
-	subne r0, r0, #0x80000000
-	strne r0, [sl, #4]
-	bne _020021C0
-	mov r0, r5
-	bl FixedPoint64IsZero
-	cmp r0, #0
-	movne r0, #0
-	strne r0, [sl]
-	strne r0, [sl, #4]
-	bne _020021C0
-	ldr r2, [r5, #4]
-	mov r0, #0x10000
-	mov r1, r2, lsr #0x10
-	mov r8, #0
-	ldr r3, [r5]
-	rsb r0, r0, #0
-	and r2, r0, r2, lsl #16
-	and r3, r0, r3, lsl #16
-	ldr r0, [r4]
-	mov r1, r1, lsl #0x10
-	ldr fp, [r4, #4]
-	str r0, [sp, #4]
-	mov sb, r8
-	mov r4, r8
-	mov r5, r8
-	str r8, [sp]
-	orr r6, r3, r1, lsr #16
-	orr r7, r2, #0x8000
-_0200211C:
-	mov r0, r5, lsl #1
-	tst r5, #0x80000000
-	mov r4, r4, lsl #1
-	orrne r4, r4, #1
-	bic r5, r0, #1
-	tst r6, #0x80000000
-	orrne r5, r5, #1
-	mov r1, r7, lsl #1
-	tst r7, #0x80000000
-	mov r6, r6, lsl #1
-	bic r7, r1, #1
-	ldr r2, [sp, #4]
-	mov r0, r4
-	mov r1, r5
-	mov r3, fp
-	orrne r6, r6, #1
-	bl UFixedPoint64CmpLt
-	cmp r0, #0
-	bne _02002188
-	mov r0, r5
-	sub r5, r5, fp
-	cmp r0, r5
-	ldr r0, [sp, #4]
-	mov r1, #1
-	sub r4, r4, r0
-	sublo r4, r4, #1
-	b _0200218C
-_02002188:
-	mov r1, #0
-_0200218C:
-	mov r0, sb, lsl #1
-	tst sb, #0x80000000
-	bic sb, r0, #1
-	ldr r0, [sp]
-	mov r8, r8, lsl #1
-	add r0, r0, #1
-	orrne r8, r8, #1
-	cmp r1, #0
-	orrne sb, sb, #1
-	str r0, [sp]
-	cmp r0, #0x40
-	blt _0200211C
-	stmia sl, {r8, sb}
-_020021C0:
-	add sp, sp, #8
-	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-	arm_func_end UDivideFixedPoint64
-
-	arm_func_start AddFixedPoint64
-AddFixedPoint64: ; 0x020021C8
-	stmdb sp!, {r3, lr}
-	ldr ip, [r1, #4]
-	ldr lr, [r1]
-	ldr r1, [r2]
-	ldr r3, [r2, #4]
-	add r1, lr, r1
-	add r2, ip, r3
-	cmp r2, ip
-	addlo r1, r1, #1
-	stmia r0, {r1, r2}
-	ldmia sp!, {r3, pc}
-	arm_func_end AddFixedPoint64
-
-	arm_func_start ClampedLn
-ClampedLn: ; 0x020021F4
-	cmp r1, #1
-	movlt r1, #1
-	cmp r1, #0x800
-	ldrge r1, _02002220 ; =0x000007FF
-	ldr r2, _02002224 ; =NATURAL_LOG_VALUE_TABLE
-	mov r1, r1, lsl #1
-	ldrsh r2, [r2, r1]
-	mov r1, #0
-	mov r2, r2, lsl #4
-	stmia r0, {r1, r2}
-	bx lr
-	.align 2, 0
-_02002220: .word 0x000007FF
-_02002224: .word NATURAL_LOG_VALUE_TABLE
-	arm_func_end ClampedLn
-
-	arm_func_start sub_02002228
-sub_02002228: ; 0x02002228
-	bx lr
-	arm_func_end sub_02002228
-
-	arm_func_start GetRngSeed
-GetRngSeed: ; 0x0200222C
-	ldr r0, _02002238 ; =PRNG_SEQUENCE_NUM
-	ldrh r0, [r0]
-	bx lr
-	.align 2, 0
-_02002238: .word PRNG_SEQUENCE_NUM
-	arm_func_end GetRngSeed
-
-	arm_func_start SetRngSeed
-SetRngSeed: ; 0x0200223C
-	ldr r1, _02002248 ; =PRNG_SEQUENCE_NUM
-	strh r0, [r1]
-	bx lr
-	.align 2, 0
-_02002248: .word PRNG_SEQUENCE_NUM
-	arm_func_end SetRngSeed
-
-	arm_func_start Rand16Bit
-Rand16Bit: ; 0x0200224C
-	ldr r1, _02002270 ; =PRNG_SEQUENCE_NUM
-	mov r0, #0x6d
-	ldrh r2, [r1]
-	mul r0, r2, r0
-	add r0, r0, #0xfd
-	add r0, r0, #0x300
-	strh r0, [r1]
-	ldrh r0, [r1]
-	bx lr
-	.align 2, 0
-_02002270: .word PRNG_SEQUENCE_NUM
-	arm_func_end Rand16Bit
-
-	arm_func_start RandInt
-RandInt: ; 0x02002274
-	stmdb sp!, {r4, lr}
-	mov r4, r0
-	bl Rand16Bit
-	mul r0, r4, r0
-	mov r0, r0, asr #0x10
-	ldmia sp!, {r4, pc}
-	arm_func_end RandInt
-
-	arm_func_start RandRange
-RandRange: ; 0x0200228C
-	stmdb sp!, {r3, r4, r5, lr}
-	mov r5, r0
-	mov r4, r1
-	bl Rand16Bit
-	sub r1, r4, r5
-	mul r0, r1, r0
-	add r0, r5, r0, asr #16
-	ldmia sp!, {r3, r4, r5, pc}
-	arm_func_end RandRange
-
-	arm_func_start Rand32Bit
-Rand32Bit: ; 0x020022AC
-	stmdb sp!, {r4, lr}
-	bl Rand16Bit
-	mov r4, r0
-	bl Rand16Bit
-	orr r0, r0, r4, lsl #16
-	ldmia sp!, {r4, pc}
-	arm_func_end Rand32Bit
-
-	arm_func_start sub_020022C4
-sub_020022C4: ; 0x020022C4
-	mov r1, #1
-	str r1, [r0]
-	bx lr
-	arm_func_end sub_020022C4
-
-	arm_func_start sub_020022D0
-sub_020022D0: ; 0x020022D0
-	ldr r3, [r0]
-	ldr r2, _020022F4 ; =0x5D588B65
-	mul r2, r3, r2
-	add r3, r2, #1
-	mov r2, r3, lsr #0x10
-	mul r1, r2, r1
-	str r3, [r0]
-	mov r0, r1, lsr #0x10
-	bx lr
-	.align 2, 0
-_020022F4: .word 0x5D588B65
-	arm_func_end sub_020022D0
-
-	arm_func_start RandIntSafe
-RandIntSafe: ; 0x020022F8
-	stmdb sp!, {r4, lr}
-	mov r4, r0
-	bl Rand16Bit
-	mov r0, r0, lsl #0x10
-	mov r1, r0, lsr #0x10
-	mul r0, r1, r4
-	mov r0, r0, asr #0x10
-	ldmia sp!, {r4, pc}
-	arm_func_end RandIntSafe
-
-	arm_func_start RandRangeSafe
-RandRangeSafe: ; 0x02002318
-	stmdb sp!, {r3, r4, r5, lr}
-	mov r5, r0
-	mov r4, r1
-	cmp r5, r4
-	ldmeqia sp!, {r3, r4, r5, pc}
-	bge _0200234C
-	bl Rand16Bit
-	mov r0, r0, lsl #0x10
-	mov r1, r0, lsr #0x10
-	sub r0, r4, r5
-	mul r0, r1, r0
-	add r0, r5, r0, asr #16
-	ldmia sp!, {r3, r4, r5, pc}
-_0200234C:
-	bl Rand16Bit
-	mov r0, r0, lsl #0x10
-	mov r1, r0, lsr #0x10
-	sub r0, r5, r4
-	mul r0, r1, r0
-	add r0, r4, r0, asr #16
-	ldmia sp!, {r3, r4, r5, pc}
-	arm_func_end RandRangeSafe
-
-	arm_func_start sub_02002368
-sub_02002368: ; 0x02002368
-	b _02002378
-_0200236C:
-	cmp r2, r1
-	bxeq lr
-	add r0, r0, #1
-	arm_func_end sub_02002368
-_02002378:
-	ldrsb r2, [r0]
-	cmp r2, #0
-	bne _0200236C
-	mov r0, #0
-	bx lr
-
-	arm_func_start sub_0200238C
-sub_0200238C: ; 0x0200238C
-	cmp r0, #0x41
-	bxlt lr
-	cmp r0, #0x5a
-	addle r0, r0, #0x20
-	movle r0, r0, lsl #0x18
-	movle r0, r0, asr #0x18
-	bx lr
-	arm_func_end sub_0200238C
-
-	arm_func_start sub_020023A8
-sub_020023A8: ; 0x020023A8
-	mov ip, #0
-	b _020023E4
-_020023B0:
-	ldrsb r3, [r1]
-	cmp r3, #0
-	bne _020023D8
-	mov r1, #0x20
-	b _020023CC
-_020023C4:
-	strb r1, [r0], #1
-	add ip, ip, #1
-_020023CC:
-	cmp ip, r2
-	blt _020023C4
-	b _020023EC
-_020023D8:
-	add r1, r1, #1
-	strb r3, [r0], #1
-	add ip, ip, #1
-_020023E4:
-	cmp ip, r2
-	blt _020023B0
-_020023EC:
-	mov r1, #0
-	strb r1, [r0]
-	bx lr
-	arm_func_end sub_020023A8
-
-	arm_func_start sub_020023F8
-sub_020023F8: ; 0x020023F8
-	stmdb sp!, {r3, lr}
-	mov lr, #0
-	b _02002428
-_02002404:
-	ldrsb ip, [r0], #1
-	ldrsb r3, [r1], #1
-	cmp r3, ip
-	movne r0, #0
-	ldmneia sp!, {r3, pc}
-	cmp ip, #0
-	moveq r0, #1
-	ldmeqia sp!, {r3, pc}
-	add lr, lr, #1
-_02002428:
-	cmp lr, r2
-	blt _02002404
-	mov r0, #1
-	ldmia sp!, {r3, pc}
-	arm_func_end sub_020023F8
-
-	arm_func_start WaitForever
-WaitForever: ; 0x02002438
-	stmdb sp!, {r3, lr}
-	bl sub_02079C14
-_02002440:
-	bl WaitForInterrupt
-	b _02002440
-	arm_func_end WaitForever
-
-	arm_func_start sub_02002448
-sub_02002448: ; 0x02002448
-	stmdb sp!, {r4, lr}
-	mov r4, r0
-	bl sub_02003AD0
-	bl sub_02002580
-	mov r1, #1
-	bl sub_020027F8
-	bl sub_02079C14
-	bl GX_DispOff
-	ldr r3, _02002498 ; =0x04001000
-	ldr r0, _0200249C ; =_02092464
-	ldr r2, [r3]
-	mov r1, r4
-	bic r2, r2, #0x10000
-	str r2, [r3]
-	bl Debug_Print0
-	mov r0, r4
-	bl sub_0207B930
-	bl sub_02079C14
-_02002490:
-	bl WaitForInterrupt
-	b _02002490
-	.align 2, 0
-_02002498: .word 0x04001000
-_0200249C: .word _02092464
-	arm_func_end sub_02002448
-
-	arm_func_start sub_020024A0
-sub_020024A0: ; 0x020024A0
-	ldr r0, _020024AC ; =0x027FFC20
-	ldr r0, [r0]
-	bx lr
-	.align 2, 0
-_020024AC: .word 0x027FFC20
-	arm_func_end sub_020024A0
-
-	arm_func_start sub_020024B0
-sub_020024B0: ; 0x020024B0
-	ldr ip, _020024BC ; =sub_020845D8
-	mov r0, #0
-	bx ip
-	.align 2, 0
-_020024BC: .word sub_020845D8
-	arm_func_end sub_020024B0
-
-	arm_func_start sub_020024C0
-sub_020024C0: ; 0x020024C0
-	ldr ip, _020024CC ; =sub_020845D8
-	ldr r0, _020024D0 ; =sub_020024D4
-	bx ip
-	.align 2, 0
-_020024CC: .word sub_020845D8
-_020024D0: .word sub_020024D4
-	arm_func_end sub_020024C0
-
-	arm_func_start sub_020024D4
-sub_020024D4: ; 0x020024D4
-	stmdb sp!, {r3, lr}
-	bl CardPullOut
-	mov r0, #0
-	ldmia sp!, {r3, pc}
-	arm_func_end sub_020024D4
-
-	arm_func_start sub_020024E4
-sub_020024E4: ; 0x020024E4
-	stmdb sp!, {r3, lr}
-	ldr r0, _0200256C ; =_0229AFCC
-	bl sub_0207A030
-	ldr r0, _0200256C ; =_0229AFCC
-	bl sub_0207A048
-	mov r1, #0
-	ldr r0, _02002570 ; =_0229AFE4
-	mov r2, r1
-_02002504:
-	add r1, r1, #1
-	cmp r1, #8
-	str r2, [r0], #4
-	blt _02002504
-	ldr r1, _02002574 ; =_0229AFC0
-	ldr r0, _0200256C ; =_0229AFCC
-	str r2, [r1]
-	str r2, [r1, #4]
-	str r2, [r1, #8]
-	bl sub_0207A0CC
-	ldr r1, _02002578 ; =_022B966C
-	ldr r0, _0200257C ; =_0229B004
-	ldr r1, [r1, #4]
-	mov r2, #0
-	stmia r0, {r1, r2}
-	str r2, [r0, #8]
-	str r2, [r0, #0xc]
-	mov r1, #7
-	str r1, [r0, #0x10]
-	str r2, [r0, #0x14]
-	bl sub_020026E4
-	ldr r0, _02002578 ; =_022B966C
-	mov r1, #7
-	ldr r0, [r0, #4]
-	bl sub_02079A64
-	ldmia sp!, {r3, pc}
-	.align 2, 0
-_0200256C: .word _0229AFCC
-_02002570: .word _0229AFE4
-_02002574: .word _0229AFC0
-_02002578: .word _022B966C
-_0200257C: .word _0229B004
-	arm_func_end sub_020024E4
-
-	arm_func_start sub_02002580
-sub_02002580: ; 0x02002580
-	stmdb sp!, {r3, r4, r5, lr}
-	ldr r1, _020025E8 ; =_022B966C
-	ldr r0, _020025EC ; =_0229AFCC
-	ldr r4, [r1, #4]
-	bl sub_0207A048
-	ldr r0, _020025F0 ; =_0229AFC0
-	mov r1, #0
-	ldr r3, [r0]
-	ldr r2, _020025F4 ; =_0229AFE4
-	b _020025CC
-_020025A8:
-	ldr r5, [r2]
-	ldr r0, [r5]
-	cmp r0, r4
-	bne _020025C4
-	ldr r0, _020025EC ; =_0229AFCC
-	bl sub_0207A0CC
-	b _020025E0
-_020025C4:
-	add r1, r1, #1
-	add r2, r2, #4
-_020025CC:
-	cmp r1, r3
-	blt _020025A8
-	ldr r0, _020025EC ; =_0229AFCC
-	bl sub_0207A0CC
-	mov r5, #0
-_020025E0:
-	mov r0, r5
-	ldmia sp!, {r3, r4, r5, pc}
-	.align 2, 0
-_020025E8: .word _022B966C
-_020025EC: .word _0229AFCC
-_020025F0: .word _0229AFC0
-_020025F4: .word _0229AFE4
-	arm_func_end sub_02002580
-
-; https://decomp.me/scratch/Gairr
-	arm_func_start sub_020025F8
-sub_020025F8: ; 0x020025F8
-	stmdb sp!, {r4, lr}
-	cmp r0, #0
-	beq _02002614
-	ldr r0, [r0]
-	mov r1, #0
-	bl sub_02079844
-	ldmia sp!, {r4, pc}
-_02002614:
-	mov r4, #0
-_02002618:
-	mov r0, r4
-	bl sub_02079888
-	b _02002618
-	arm_func_end sub_020025F8
-
-	arm_func_start sub_02002624
-sub_02002624: ; 0x02002624
-	ldmia sp!, {r4, pc}
-	arm_func_end sub_02002624
-
-	arm_func_start sub_02002628
-sub_02002628: ; 0x02002628
-	stmdb sp!, {r3, r4, r5, lr}
-	ldr r2, _02002658 ; =_022B966C
-	mov r5, r0
-	ldr r0, [r2, #4]
-	mov r4, r1
-	str r0, [r5]
-	bl sub_02079B0C
-	str r0, [r5, #4]
-	ldr r0, [r5]
-	mov r1, r4
-	bl sub_02079A64
-	ldmia sp!, {r3, r4, r5, pc}
-	.align 2, 0
-_02002658: .word _022B966C
-	arm_func_end sub_02002628
-
-	arm_func_start sub_0200265C
-sub_0200265C: ; 0x0200265C
-	ldr ip, _0200266C ; =sub_02079A64
-	mov r1, r0
-	ldmia r1, {r0, r1}
-	bx ip
-	.align 2, 0
-_0200266C: .word sub_02079A64
-	arm_func_end sub_0200265C
-
-	arm_func_start sub_02002670
-sub_02002670: ; 0x02002670
-	stmdb sp!, {r3, r4, r5, lr}
-	ldr r0, _020026AC ; =_022B966C
-	ldr r5, [r0, #4]
-	mov r0, r5
-	bl sub_02079B0C
-	mov r4, r0
-	mov r0, r5
-	mov r1, #7
-	bl sub_02079A64
-	ldr r0, _020026B0 ; =_0229AFCC
-	bl sub_0207A048
-	ldr r0, _020026B4 ; =_020AEF30
-	str r5, [r0]
-	str r4, [r0, #4]
-	ldmia sp!, {r3, r4, r5, pc}
-	.align 2, 0
-_020026AC: .word _022B966C
-_020026B0: .word _0229AFCC
-_020026B4: .word _020AEF30
-	arm_func_end sub_02002670
-
-	arm_func_start sub_020026B8
-sub_020026B8: ; 0x020026B8
-	stmdb sp!, {r3, r4, r5, lr}
-	ldr r1, _020026DC ; =_020AEF30
-	ldr r0, _020026E0 ; =_0229AFCC
-	ldmia r1, {r4, r5}
-	bl sub_0207A0CC
-	mov r0, r4
-	mov r1, r5
-	bl sub_02079A64
-	ldmia sp!, {r3, r4, r5, pc}
-	.align 2, 0
-_020026DC: .word _020AEF30
-_020026E0: .word _0229AFCC
-	arm_func_end sub_020026B8
-
-	arm_func_start sub_020026E4
-sub_020026E4: ; 0x020026E4
-	stmdb sp!, {r4, r5, r6, lr}
-	ldr r1, _02002768 ; =_022B966C
-	mov r6, r0
-	ldr r5, [r1, #4]
-	mov r0, r5
-	bl sub_02079B0C
-	mov r4, r0
-	mov r0, r5
-	mov r1, #7
-	bl sub_02079A64
-	ldr r0, _0200276C ; =_0229AFCC
-	bl sub_0207A048
-	ldr r0, _02002770 ; =_0229AFC0
-	ldr r3, [r0]
-	cmp r3, #8
-	bge _02002750
-	add r1, r3, #1
-	ldr r2, _02002774 ; =_0229AFE4
-	str r1, [r0]
-	ldr r1, [r0]
-	str r6, [r2, r3, lsl #2]
-	str r1, [r0, #4]
-	ldr r2, [r0, #4]
-	ldr r1, [r0, #8]
-	cmp r2, r1
-	ldrgt r1, [r0, #4]
-	strgt r1, [r0, #8]
-_02002750:
-	ldr r0, _0200276C ; =_0229AFCC
-	bl sub_0207A0CC
-	mov r0, r5
-	mov r1, r4
-	bl sub_02079A64
-	ldmia sp!, {r4, r5, r6, pc}
-	.align 2, 0
-_02002768: .word _022B966C
-_0200276C: .word _0229AFCC
-_02002770: .word _0229AFC0
-_02002774: .word _0229AFE4
-	arm_func_end sub_020026E4
-
-	arm_func_start sub_02002778
-sub_02002778: ; 0x02002778
-	stmdb sp!, {r4, r5, r6, lr}
-	sub sp, sp, #8
-	mov r4, r0
-	mov ip, r1
-	add r0, r4, #0x1c
-	mov r5, ip
-	str r0, [r4]
-	mov r6, r2
-	ldmia r5!, {r0, r1, r2, r3}
-	add lr, r4, #4
-	stmia lr!, {r0, r1, r2, r3}
-	ldr r0, [r5]
-	mov r2, r6
-	str r0, [lr]
-	str r6, [r4, #0x18]
-	ldr r1, [ip, #8]
-	str r1, [sp]
-	ldr r0, [ip, #0xc]
-	bic r3, r1, #7
-	str r0, [sp, #4]
-	ldmia ip, {r1, lr}
-	ldr r0, [r4]
-	add r3, lr, r3
-	bl StartThread
-	mov r0, r4
-	bl sub_020026E4
-	add sp, sp, #8
-	ldmia sp!, {r4, r5, r6, pc}
-	arm_func_end sub_02002778
-
-	arm_func_start sub_020027E8
-sub_020027E8: ; 0x020027E8
-	ldr ip, _020027F4 ; =sub_02079940
-	ldr r0, [r0]
-	bx ip
-	.align 2, 0
-_020027F4: .word sub_02079940
-	arm_func_end sub_020027E8
-
-	arm_func_start sub_020027F8
-sub_020027F8: ; 0x020027F8
-	stmdb sp!, {r4, r5, r6, lr}
-	mov r6, r0
-	ldr r0, [r6]
-	mov r5, r1
-	bl sub_02079B0C
-	mov r4, r0
-	ldr r0, [r6]
-	mov r1, r5
-	bl sub_02079A64
-	mov r0, r4
-	ldmia sp!, {r4, r5, r6, pc}
-	arm_func_end sub_020027F8
-
-	arm_func_start sub_02002824
-sub_02002824: ; 0x02002824
-	stmdb sp!, {r4, r5, r6, lr}
-	ldr r1, _02002854 ; =_022B966C
-	mov r6, r0
-	ldr r5, [r1, #4]
-	mov r0, r5
-	bl sub_02079B0C
-	mov r4, r0
-	mov r0, r5
-	mov r1, r6
-	bl sub_02079A64
-	mov r0, r4
-	ldmia sp!, {r4, r5, r6, pc}
-	.align 2, 0
-_02002854: .word _022B966C
-	arm_func_end sub_02002824
-
-	arm_func_start sub_02002858
-sub_02002858: ; 0x02002858
-	str r1, [r0, #0x14]
-	bx lr
-	arm_func_end sub_02002858
-
-	arm_func_start sub_02002860
-sub_02002860: ; 0x02002860
-	cmp r0, #0
-	ldrne r1, [r0]
-	cmpne r1, #0
-	ldrne r0, [r0, #0x14]
-	moveq r0, #0
-	bx lr
-	arm_func_end sub_02002860
-
-	arm_func_start sub_02002878
-sub_02002878: ; 0x02002878
-	stmdb sp!, {r4, lr}
-	mov r4, r0
-	bl sub_02002580
-	cmp r0, #0
-	beq _020028A4
-	ldr r0, [r0, #0x14]
-	cmp r0, r4
-	moveq r0, #1
-	movne r0, #0
-	and r0, r0, #0xff
-	ldmia sp!, {r4, pc}
-_020028A4:
-	mov r0, #0
-	ldmia sp!, {r4, pc}
-	arm_func_end sub_02002878
-
-	arm_func_start sub_020028AC
-sub_020028AC: ; 0x020028AC
-	bx lr
-	arm_func_end sub_020028AC
-
-	arm_func_start sub_020028B0
-sub_020028B0: ; 0x020028B0
-	stmdb sp!, {r4, lr}
-	mov r4, r0
-	bl sub_0207A030
-	mov r0, r4
-	bl sub_0207A048
-	bl sub_02002670
-	ldr r0, _020028F4 ; =_0229B0E0
-	ldr r1, [r0]
-	add r1, r1, #1
-	str r1, [r0]
-	ldr r2, [r0]
-	ldr r1, [r0, #4]
-	cmp r2, r1
-	ldrgt r1, [r0]
-	strgt r1, [r0, #4]
-	bl sub_020026B8
-	ldmia sp!, {r4, pc}
-	.align 2, 0
-_020028F4: .word _0229B0E0
-	arm_func_end sub_020028B0
-
-	arm_func_start sub_020028F8
-sub_020028F8: ; 0x020028F8
-	ldr ip, _02002900 ; =sub_0207A0CC
-	bx ip
-	.align 2, 0
-_02002900: .word sub_0207A0CC
-	arm_func_end sub_020028F8
-
-	arm_func_start sub_02002904
-sub_02002904: ; 0x02002904
-	ldr ip, _0200290C ; =sub_0207A048
-	bx ip
-	.align 2, 0
-_0200290C: .word sub_0207A048
-	arm_func_end sub_02002904
-
-	arm_func_start sub_02002910
-sub_02002910: ; 0x02002910
-	stmdb sp!, {r4, lr}
-	mov r4, r0
-	bl sub_0207A164
-	tst r0, #0xff
-	beq _02002944
-	ldr r0, [r4, #0xc]
-	cmp r0, #1
-	movle r0, #1
-	ldmleia sp!, {r4, pc}
-	mov r0, r4
-	bl sub_0207A0CC
-	mov r0, #0
-	ldmia sp!, {r4, pc}
-_02002944:
-	mov r0, #0
-	ldmia sp!, {r4, pc}
-	arm_func_end sub_02002910
-
-	arm_func_start sub_0200294C
-sub_0200294C: ; 0x0200294C
-	bx lr
-	arm_func_end sub_0200294C
-
-	arm_func_start sub_02002950
-sub_02002950: ; 0x02002950
-	stmdb sp!, {r3, lr}
-	mov r3, r0
-	add r1, r3, #4
-	add r0, r3, #8
-	mov r2, #1
-	str r1, [r3]
-	bl sub_02079DB8
-	bl sub_02002670
-	ldr r0, _0200299C ; =_0229B0E8
-	ldr r1, [r0]
-	add r1, r1, #1
-	str r1, [r0]
-	ldr r2, [r0]
-	ldr r1, [r0, #4]
-	cmp r2, r1
-	ldrgt r1, [r0]
-	strgt r1, [r0, #4]
-	bl sub_020026B8
-	ldmia sp!, {r3, pc}
-	.align 2, 0
-_0200299C: .word _0229B0E8
-	arm_func_end sub_02002950
-
-	arm_func_start sub_020029A0
-sub_020029A0: ; 0x020029A0
-	ldr ip, _020029B4 ; =sub_02079DE0
-	mov r1, #0
-	mov r2, r1
-	add r0, r0, #8
-	bx ip
-	.align 2, 0
-_020029B4: .word sub_02079DE0
-	arm_func_end sub_020029A0
-
-	arm_func_start sub_020029B8
-sub_020029B8: ; 0x020029B8
-	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
-	ldr r1, _02002A40 ; =_022B966C
-	mov r4, r0
-	ldr sb, [r1, #4]
-	mov r7, #0
-	mov r0, sb
-	bl sub_02079B0C
-	mov r8, r0
-	mov r0, sb
-	mov r1, #7
-	bl sub_02079A64
-	mov r5, r7
-	b _020029F0
-_020029EC:
-	add r7, r7, #1
-_020029F0:
-	mov r1, r5
-	mov r2, r5
-	add r0, r4, #8
-	bl sub_02079DE0
-	cmp r0, #0
-	bne _020029EC
-	add r6, sp, #0
-	mov r5, #0
-_02002A10:
-	mov r1, r6
-	mov r2, r5
-	add r0, r4, #8
-	bl sub_02079E74
-	cmp r0, #0
-	subne r7, r7, #1
-	bne _02002A10
-	mov r0, sb
-	mov r1, r8
-	bl sub_02079A64
-	mov r0, r7
-	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
-	.align 2, 0
-_02002A40: .word _022B966C
-	arm_func_end sub_020029B8
-
-	arm_func_start sub_02002A44
-sub_02002A44: ; 0x02002A44
-	stmdb sp!, {r3, r4, r5, r6, lr}
-	sub sp, sp, #4
-	ldr r1, _02002A94 ; =_022B966C
-	mov r6, r0
-	ldr r5, [r1, #4]
-	mov r0, r5
-	bl sub_02079B0C
-	mov r4, r0
-	mov r0, r5
-	mov r1, #6
-	bl sub_02079A64
-	add r1, sp, #0
-	add r0, r6, #8
-	mov r2, #1
-	bl sub_02079E74
-	mov r0, r5
-	mov r1, r4
-	bl sub_02079A64
-	add sp, sp, #4
-	ldmia sp!, {r3, r4, r5, r6, pc}
-	.align 2, 0
-_02002A94: .word _022B966C
-	arm_func_end sub_02002A44
-
-	arm_func_start sub_02002A98
-sub_02002A98: ; 0x02002A98
-	bx lr
-	arm_func_end sub_02002A98
-
-	arm_func_start sub_02002A9C
-sub_02002A9C: ; 0x02002A9C
-	stmdb sp!, {r4, r5, r6, lr}
-	mov r6, r0
-	str r1, [r6, #0xa4]
-	add r1, r6, #4
-	str r2, [r6, #0xa8]
-	str r1, [r6]
-	ldr r2, [r6, #0xa4]
-	add r0, r6, #0x84
-	bl sub_02079DB8
-	mov r5, #0
-	mov r4, r5
-	b _02002AE0
-_02002ACC:
-	mov r1, r4
-	mov r2, r4
-	add r0, r6, #0x84
-	bl sub_02079DE0
-	add r5, r5, #1
-_02002AE0:
-	ldr r0, [r6, #0xa8]
-	cmp r5, r0
-	blt _02002ACC
-	bl sub_02002670
-	ldr r0, _02002B1C ; =_0229B0F0
-	ldr r1, [r0]
-	add r1, r1, #1
-	str r1, [r0]
-	ldr r2, [r0]
-	ldr r1, [r0, #4]
-	cmp r2, r1
-	ldrgt r1, [r0]
-	strgt r1, [r0, #4]
-	bl sub_020026B8
-	ldmia sp!, {r4, r5, r6, pc}
-	.align 2, 0
-_02002B1C: .word _0229B0F0
-	arm_func_end sub_02002A9C
-
-	arm_func_start sub_02002B20
-sub_02002B20: ; 0x02002B20
-	ldr ip, _02002B34 ; =sub_02079DE0
-	mov r1, #0
-	mov r2, r1
-	add r0, r0, #0x84
-	bx ip
-	.align 2, 0
-_02002B34: .word sub_02079DE0
-	arm_func_end sub_02002B20
-
-	arm_func_start sub_02002B38
-sub_02002B38: ; 0x02002B38
-	ldr ip, _02002B4C ; =sub_02079DE0
-	mov r1, #0
-	mov r2, r1
-	add r0, r0, #0x84
-	bx ip
-	.align 2, 0
-_02002B4C: .word sub_02079DE0
-	arm_func_end sub_02002B38
-
-	arm_func_start sub_02002B50
-sub_02002B50: ; 0x02002B50
-	stmdb sp!, {r3, lr}
-	ldr r1, [r0, #0x98]
-	cmp r1, #0
-	movne r0, #0
-	ldmneia sp!, {r3, pc}
-	mov r1, #0
-	mov r2, r1
-	add r0, r0, #0x84
-	bl sub_02079DE0
-	mov r0, #1
-	ldmia sp!, {r3, pc}
-	arm_func_end sub_02002B50
-
-	arm_func_start sub_02002B7C
-sub_02002B7C: ; 0x02002B7C
-	stmdb sp!, {r3, r4, r5, r6, lr}
-	sub sp, sp, #4
-	ldr r1, _02002BCC ; =_022B966C
-	mov r6, r0
-	ldr r5, [r1, #4]
-	mov r0, r5
-	bl sub_02079B0C
-	mov r4, r0
-	mov r0, r5
-	mov r1, #6
-	bl sub_02079A64
-	add r1, sp, #0
-	add r0, r6, #0x84
-	mov r2, #1
-	bl sub_02079E74
-	mov r0, r5
-	mov r1, r4
-	bl sub_02079A64
-	add sp, sp, #4
-	ldmia sp!, {r3, r4, r5, r6, pc}
-	.align 2, 0
-_02002BCC: .word _022B966C
-	arm_func_end sub_02002B7C
-
-	arm_func_start sub_02002BD0
-sub_02002BD0: ; 0x02002BD0
-	stmdb sp!, {r3, r4, r5, r6, lr}
-	sub sp, sp, #4
-	ldr r1, _02002C28 ; =_022B966C
-	mov r5, r0
-	ldr r6, [r1, #4]
-	mov r0, r6
-	bl sub_02079B0C
-	mov r4, r0
-	mov r0, r6
-	mov r1, #6
-	bl sub_02079A64
-	add r1, sp, #0
-	add r0, r5, #0x84
-	mov r2, #0
-	bl sub_02079E74
-	and r5, r0, #0xff
-	mov r0, r6
-	mov r1, r4
-	bl sub_02079A64
-	mov r0, r5
-	add sp, sp, #4
-	ldmia sp!, {r3, r4, r5, r6, pc}
-	.align 2, 0
-_02002C28: .word _022B966C
-	arm_func_end sub_02002BD0
-
-	arm_func_start sub_02002C2C
-sub_02002C2C: ; 0x02002C2C
-	ldr ip, _02002C38 ; =sub_0207A030
-	ldr r0, _02002C3C ; =_0229B0F8
-	bx ip
-	.align 2, 0
-_02002C38: .word sub_0207A030
-_02002C3C: .word _0229B0F8
-	arm_func_end sub_02002C2C
-
-	arm_func_start sub_02002C40
-sub_02002C40: ; 0x02002C40
-	stmdb sp!, {r4, r5, r6, lr}
-	ldr r1, _02002CA4 ; =_022B966C
-	mov r6, r0
-	ldr r5, [r1, #4]
-	mov r0, r5
-	bl sub_02079B0C
-	mov r4, r0
-	mov r0, r5
-	mov r1, #7
-	bl sub_02079A64
-	ldr r0, _02002CA8 ; =_0229B0F8
-	bl sub_0207A048
-	mov r0, r6
-	bl sub_020028B0
-	bl sub_02002580
-	str r0, [r6, #0x18]
-	mov r0, #0
-	str r0, [r6, #0x20]
-	str r0, [r6, #0x1c]
-	ldr r0, _02002CA8 ; =_0229B0F8
-	bl sub_0207A0CC
-	mov r0, r5
-	mov r1, r4
-	bl sub_02079A64
-	ldmia sp!, {r4, r5, r6, pc}
-	.align 2, 0
-_02002CA4: .word _022B966C
-_02002CA8: .word _0229B0F8
-	arm_func_end sub_02002C40
-
-	arm_func_start sub_02002CAC
-sub_02002CAC: ; 0x02002CAC
-	str r1, [r0, #0x20]
-	bx lr
-	arm_func_end sub_02002CAC
-
-	arm_func_start sub_02002CB4
-sub_02002CB4: ; 0x02002CB4
-	stmdb sp!, {r4, r5, r6, lr}
-	ldr r1, _02002D10 ; =_022B966C
-	mov r6, r0
-	ldr r5, [r1, #4]
-	mov r0, r5
-	bl sub_02079B0C
-	ldr r1, [r6, #0x20]
-	mov r4, r0
-	cmp r1, #0
-	beq _02002CF4
-	cmp r1, r4
-	movhs r4, #0
-	bhs _02002CF8
-	mov r0, r5
-	bl sub_02079A64
-	b _02002CF8
-_02002CF4:
-	mov r4, #0
-_02002CF8:
-	mov r0, r6
-	bl sub_02002904
-	str r4, [r6, #0x1c]
-	bl sub_02002580
-	str r0, [r6, #0x18]
-	ldmia sp!, {r4, r5, r6, pc}
-	.align 2, 0
-_02002D10: .word _022B966C
-	arm_func_end sub_02002CB4
-
-	arm_func_start sub_02002D14
-sub_02002D14: ; 0x02002D14
-	stmdb sp!, {r3, r4, r5, r6, r7, lr}
-	ldr r2, _02002D7C ; =_022B966C
-	mov r7, r0
-	ldr r5, [r2, #4]
-	mov r6, r1
-	mov r0, r5
-	bl sub_02079B0C
-	ldr r1, [r7, #0x20]
-	mov r4, r0
-	cmp r1, #0
-	beq _02002D58
-	cmp r1, r4
-	movhs r4, #0
-	bhs _02002D5C
-	mov r0, r5
-	bl sub_02079A64
-	b _02002D5C
-_02002D58:
-	mov r4, #0
-_02002D5C:
-	mov r0, r6
-	bl sub_02002B7C
-	mov r0, r7
-	bl sub_02002904
-	str r4, [r7, #0x1c]
-	bl sub_02002580
-	str r0, [r7, #0x18]
-	ldmia sp!, {r3, r4, r5, r6, r7, pc}
-	.align 2, 0
-_02002D7C: .word _022B966C
-	arm_func_end sub_02002D14
-
-	arm_func_start sub_02002D80
-sub_02002D80: ; 0x02002D80
-	stmdb sp!, {r3, r4, r5, r6, r7, lr}
-	mov r7, r0
-	mov r6, r1
-	bl sub_02002580
-	mov r4, r0
-	ldr r0, [r4]
-	bl sub_02079B0C
-	ldr r1, [r7, #0x20]
-	mov r5, r0
-	cmp r1, #0
-	beq _02002DC4
-	cmp r1, r5
-	movhs r5, #0
-	bhs _02002DC8
-	ldr r0, [r4]
-	bl sub_02079A64
-	b _02002DC8
-_02002DC4:
-	mov r5, #0
-_02002DC8:
-	mov r0, r6
-	bl sub_02002BD0
-	cmp r0, #0
-	beq _02002DF4
-	mov r0, r7
-	bl sub_02002904
-	str r5, [r7, #0x1c]
-	bl sub_02002580
-	str r0, [r7, #0x18]
-	mov r0, #1
-	ldmia sp!, {r3, r4, r5, r6, r7, pc}
-_02002DF4:
-	cmp r5, #0
-	beq _02002E08
-	mov r0, r4
-	mov r1, r5
-	bl sub_020027F8
-_02002E08:
-	mov r0, #0
-	ldmia sp!, {r3, r4, r5, r6, r7, pc}
-	arm_func_end sub_02002D80
-
-	arm_func_start sub_02002E10
-sub_02002E10: ; 0x02002E10
-	stmdb sp!, {r4, r5, r6, lr}
-	ldr r1, _02002E94 ; =_022B966C
-	mov r6, r0
-	ldr r5, [r1, #4]
-	mov r0, r5
-	bl sub_02079B0C
-	ldr r1, [r6, #0x20]
-	mov r4, r0
-	cmp r1, #0
-	beq _02002E50
-	cmp r1, r4
-	movhs r4, #0
-	bhs _02002E54
-	mov r0, r5
-	bl sub_02079A64
-	b _02002E54
-_02002E50:
-	mov r4, #0
-_02002E54:
-	mov r0, r6
-	bl sub_02002910
-	cmp r0, #0
-	beq _02002E78
-	str r4, [r6, #0x1c]
-	bl sub_02002580
-	str r0, [r6, #0x18]
-	mov r0, #1
-	ldmia sp!, {r4, r5, r6, pc}
-_02002E78:
-	cmp r4, #0
-	beq _02002E8C
-	mov r0, r5
-	mov r1, r4
-	bl sub_02079A64
-_02002E8C:
-	mov r0, #0
-	ldmia sp!, {r4, r5, r6, pc}
-	.align 2, 0
-_02002E94: .word _022B966C
-	arm_func_end sub_02002E10
-
-	arm_func_start sub_02002E98
-sub_02002E98: ; 0x02002E98
-	stmdb sp!, {r3, r4, r5, lr}
-	ldr r4, [r0, #0x1c]
-	ldr r5, [r0, #0x18]
-	mov r1, #0
-	str r1, [r0, #0x1c]
-	str r1, [r0, #0x18]
-	bl sub_020028F8
-	cmp r4, #0
-	ldmeqia sp!, {r3, r4, r5, pc}
-	mov r0, r5
-	mov r1, r4
-	bl sub_020027F8
-	ldmia sp!, {r3, r4, r5, pc}
-	arm_func_end sub_02002E98
-
-	arm_func_start sub_02002ECC
-sub_02002ECC: ; 0x02002ECC
-	stmdb sp!, {r4, r5, r6, lr}
-	ldr r4, [r0, #0x1c]
-	ldr r5, [r0, #0x18]
-	mov r2, #0
-	str r2, [r0, #0x18]
-	mov r6, r1
-	str r2, [r0, #0x1c]
-	bl sub_020028F8
-	mov r0, r6
-	bl sub_02002B20
-	cmp r4, #0
-	ldmeqia sp!, {r4, r5, r6, pc}
-	mov r0, r5
-	mov r1, r4
-	bl sub_020027F8
-	ldmia sp!, {r4, r5, r6, pc}
-	arm_func_end sub_02002ECC
-
-	arm_func_start sub_02002F0C
-sub_02002F0C: ; 0x02002F0C
-	stmdb sp!, {r3, lr}
-	ldr r0, _02002F30 ; =_020AEF58
-	bl sub_02002C40
-	ldr r0, _02002F30 ; =_020AEF58
-	mov r1, #7
-	bl sub_02002CAC
-	ldr r0, _02002F30 ; =_020AEF58
-	bl sub_02002E98
-	ldmia sp!, {r3, pc}
-	.align 2, 0
-_02002F30: .word _020AEF58
-	arm_func_end sub_02002F0C
-
-	arm_func_start sub_02002F34
-sub_02002F34: ; 0x02002F34
-	stmdb sp!, {r3, r4, r5, lr}
-	mov r5, r0
-	ldr r0, _02002F78 ; =_020AEF58
-	mov r4, r1
-	bl sub_02002CB4
-	mov r0, r4, lsl #2
-	mov r1, #1
-	bl MemAlloc
-	str r0, [r5, #0x20]
-	str r4, [r5, #0x24]
-	ldr r1, [r5, #0x20]
-	mov r0, r5
-	mov r2, r4
-	bl sub_02079DB8
-	ldr r0, _02002F78 ; =_020AEF58
-	bl sub_02002E98
-	ldmia sp!, {r3, r4, r5, pc}
-	.align 2, 0
-_02002F78: .word _020AEF58
-	arm_func_end sub_02002F34
-
-	arm_func_start sub_02002F7C
-sub_02002F7C: ; 0x02002F7C
-	stmdb sp!, {r3, lr}
-	cmp r2, #0
-	movne r2, #1
-	moveq r2, #0
-	bl sub_02079DE0
-	and r0, r0, #0xff
-	ldmia sp!, {r3, pc}
-	arm_func_end sub_02002F7C
-
-	arm_func_start sub_02002F98
-sub_02002F98: ; 0x02002F98
-	stmdb sp!, {r3, lr}
-	cmp r2, #0
-	movne r2, #1
-	moveq r2, #0
-	bl sub_02079E74
-	and r0, r0, #0xff
-	ldmia sp!, {r3, pc}
-	arm_func_end sub_02002F98
-
-	arm_func_start sub_02002FB4
-sub_02002FB4: ; 0x02002FB4
-	bx lr
-	arm_func_end sub_02002FB4
-
-	arm_func_start sub_02002FB8
-sub_02002FB8: ; 0x02002FB8
-	stmdb sp!, {r4, r5, r6, lr}
-	ldr r0, _02003024 ; =_0229B110
-	mov r6, #0
-	strh r6, [r0]
-	cmp r6, #6
-	ldr r5, _02003028 ; =_0229B114
-	bge _0200301C
-	mov r4, r6
-	b _02003014
-_02002FDC:
-	mov r0, r5
-	bl sub_02002C40
-	cmp r6, #4
-	str r4, [r5, #0x24]
-	cmpne r6, #5
-	bne _02003000
-	bl OS_GetLockID
-	strh r0, [r5, #0x28]
-	b _02003004
-_02003000:
-	strh r4, [r5, #0x28]
-_02003004:
-	mov r0, r5
-	bl sub_02002E98
-	add r6, r6, #1
-	add r5, r5, #0x2c
-_02003014:
-	cmp r6, #6
-	blt _02002FDC
-_0200301C:
-	bl sub_020059A8
-	ldmia sp!, {r4, r5, r6, pc}
-	.align 2, 0
-_02003024: .word _0229B110
-_02003028: .word _0229B114
-	arm_func_end sub_02002FB8
-
-	arm_func_start sub_0200302C
-sub_0200302C: ; 0x0200302C
-	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
-	movs r8, r0
-	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
-	bl sub_02002580
-	mov r7, r0
-	mov r6, #0
-	ldr r5, _020030C4 ; =_0229B114
-	mov r4, #1
-	ldr sl, _020030C8 ; =_0229B110
-	b _020030B8
-_02003054:
-	mov r0, r4, lsl r6
-	mov sb, r0, lsl #0x10
-	tst r8, sb, lsr #16
-	beq _020030B0
-	mov r0, r5
-	bl sub_02002CB4
-	bl InterruptMasterDisable
-	ldrh r0, [sl]
-	ldrh r0, [sl]
-	str r7, [r5, #0x24]
-	orr r0, r0, sb, lsr #16
-	strh r0, [sl]
-	bl InterruptMasterEnable
-	cmp r6, #4
-	beq _0200309C
-	cmp r6, #5
-	beq _020030A8
-	b _020030B0
-_0200309C:
-	ldrh r0, [r5, #0x28]
-	bl sub_02083434
-	b _020030B0
-_020030A8:
-	ldrh r0, [r5, #0x28]
-	bl sub_0208346C
-_020030B0:
-	add r6, r6, #1
-	add r5, r5, #0x2c
-_020030B8:
-	cmp r6, #6
-	blt _02003054
-	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
-	.align 2, 0
-_020030C4: .word _0229B114
-_020030C8: .word _0229B110
-	arm_func_end sub_0200302C
-
-	arm_func_start InterruptMasterDisable
-InterruptMasterDisable: ; 0x020030CC
-	ldr r2, _020030E0 ; =0x04000208
-	mov r1, #0
-	ldrh r0, [r2]
-	strh r1, [r2]
-	bx lr
-	.align 2, 0
-_020030E0: .word 0x04000208
-	arm_func_end InterruptMasterDisable
-
-	arm_func_start InterruptMasterEnable
-InterruptMasterEnable: ; 0x020030E4
-	ldr r2, _020030F8 ; =0x04000208
-	mov r1, #1
-	ldrh r0, [r2]
-	strh r1, [r2]
-	bx lr
-	.align 2, 0
-_020030F8: .word 0x04000208
-	arm_func_end InterruptMasterEnable
-
-	arm_func_start sub_020030FC
-sub_020030FC: ; 0x020030FC
-	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
-	movs sl, r0
-	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-	bl sub_02002580
-	mov r1, #7
-	mov r8, r0
-	bl sub_020027F8
-	mov sb, r0
-	mov r7, #0
-	ldr r6, _020031B8 ; =_0229B114
-	mov fp, #1
-	ldr r5, _020031BC ; =_0229B110
-	b _020031A0
-_02003130:
-	mov r0, fp, lsl r7
-	mov r4, r0, lsl #0x10
-	tst sl, r4, lsr #16
-	beq _02003198
-	cmp r7, #4
-	beq _02003154
-	cmp r7, #5
-	beq _02003160
-	b _02003168
-_02003154:
-	ldrh r0, [r6, #0x28]
-	bl sub_02083450
-	b _02003168
-_02003160:
-	ldrh r0, [r6, #0x28]
-	bl sub_0208347C
-_02003168:
-	bl InterruptMasterDisable
-	ldrh r0, [r5]
-	mvn r1, r4, lsr #16
-	ldrh r0, [r5]
-	ldrh r2, [r5]
-	mov r0, #0
-	str r0, [r6, #0x24]
-	and r0, r2, r1
-	strh r0, [r5]
-	bl InterruptMasterEnable
-	mov r0, r6
-	bl sub_02002E98
-_02003198:
-	add r7, r7, #1
-	add r6, r6, #0x2c
-_020031A0:
-	cmp r7, #6
-	blt _02003130
-	mov r0, r8
-	mov r1, sb
-	bl sub_020027F8
-	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-	.align 2, 0
-_020031B8: .word _0229B114
-_020031BC: .word _0229B110
-	arm_func_end sub_020030FC
-
-	arm_func_start sub_020031C0
-sub_020031C0: ; 0x020031C0
-	stmdb sp!, {r3, r4, r5, lr}
-	mov r4, r0
-	bl sub_02002580
-	mov r5, #0
-	mov lr, r5
-	cmp r5, #6
-	ldr ip, _02003218 ; =_0229B114
-	bge _02003210
-	mov r3, #1
-	b _02003208
-_020031E8:
-	mov r1, r3, lsl lr
-	mov r1, r1, lsl #0x10
-	tst r4, r1, lsr #16
-	ldrne r2, [ip, #0x24]
-	add lr, lr, #1
-	cmpne r2, r0
-	orrne r5, r5, r1, lsr #16
-	add ip, ip, #0x2c
-_02003208:
-	cmp lr, #6
-	blt _020031E8
-_02003210:
-	mov r0, r5
-	ldmia sp!, {r3, r4, r5, pc}
-	.align 2, 0
-_02003218: .word _0229B114
-	arm_func_end sub_020031C0
-
-	arm_func_start InitMemAllocTableVeneer
-InitMemAllocTableVeneer: ; 0x0200321C
-	ldr ip, _02003224 ; =InitMemAllocTable
-	bx ip
-	.align 2, 0
-_02003224: .word InitMemAllocTable
-	arm_func_end InitMemAllocTableVeneer
diff --git a/asm/main_0200119C.s b/asm/main_0200119C.s
new file mode 100644
index 00000000..12241b53
--- /dev/null
+++ b/asm/main_0200119C.s
@@ -0,0 +1,2704 @@
+	.include "asm/macros.inc"
+	.include "main_0200119C.inc"
+
+	.text
+
+	arm_func_start MemArenaAlloc
+MemArenaAlloc: ; 0x0200119C
+	stmdb sp!, {r4, r5, r6, r7, lr}
+	sub sp, sp, #0x14
+	mov r5, r0
+	ldr r0, _0200126C ; =_020AEF08
+	mov r4, r1
+	mov r7, r2
+	mov r6, r3
+	bl sub_02002CB4
+	ldr r1, _02001270 ; =MEMORY_ALLOCATION_ARENA_GETTERS
+	mov r0, r5
+	ldr r2, [r1]
+	mov r1, r6
+	blx r2
+	movs r5, r0
+	ldreq r5, _02001274 ; =_020B3384
+	mov r2, r4
+	mov r0, r5
+	mov r1, #9
+	bl FindAvailableMemBlock
+	movs r1, r0
+	bmi _02001238
+	mov r0, r5
+	mov r3, r4
+	str r6, [sp]
+	mov r2, #9
+	bl SplitMemBlock
+	ldr r2, [r0, #0xc]
+	mov r1, r7
+	str r2, [sp, #0xc]
+	ldr r2, [r0, #0x10]
+	add r0, sp, #0xc
+	str r2, [sp, #0x10]
+	bl CreateMemArena
+	mov r4, r0
+	ldr r0, _0200126C ; =_020AEF08
+	str r5, [r4, #4]
+	bl sub_02002E98
+	mov r0, r4
+	b _02001264
+_02001238:
+	ldr r0, _0200126C ; =_020AEF08
+	bl sub_02002E98
+	ldr r1, _02001278 ; =_02090B40
+	add r0, sp, #4
+	ldr r3, [r1, #0xc]
+	ldr ip, [r1, #8]
+	ldr r1, _0200127C ; =_02090BC8
+	mov r2, r4
+	str ip, [sp, #4]
+	str r3, [sp, #8]
+	bl Debug_FatalError
+_02001264:
+	add sp, sp, #0x14
+	ldmia sp!, {r4, r5, r6, r7, pc}
+	.align 2, 0
+_0200126C: .word _020AEF08
+_02001270: .word MEMORY_ALLOCATION_ARENA_GETTERS
+_02001274: .word _020B3384
+_02001278: .word _02090B40
+_0200127C: .word _02090BC8
+	arm_func_end MemArenaAlloc
+
+	arm_func_start CreateMemArena
+CreateMemArena: ; 0x02001280
+	stmdb sp!, {r4, lr}
+	sub sp, sp, #8
+	mov r3, r1
+	mov r1, #0x18
+	mul r2, r3, r1
+	ldr r1, [r0, #4]
+	ldr r4, [r0]
+	add r0, r2, #3
+	bic ip, r0, #3
+	sub r0, r1, #0x1c
+	sub r0, r0, ip
+	bic lr, r0, #3
+	add r2, r4, #0x1c
+	add ip, r2, ip
+	add r1, sp, #0
+	mov r0, r4
+	str ip, [sp]
+	str lr, [sp, #4]
+	bl InitMemArena
+	mov r0, r4
+	add sp, sp, #8
+	ldmia sp!, {r4, pc}
+	arm_func_end CreateMemArena
+
+	arm_func_start sub_020012D8
+sub_020012D8: ; 0x020012D8
+	stmdb sp!, {r3, lr}
+	movs r1, r0
+	ldmeqia sp!, {r3, pc}
+	ldr r0, [r1, #0xc]
+	cmp r0, #1
+	ldreq r0, [r1, #8]
+	ldreq r0, [r0, #4]
+	cmpeq r0, #0
+	moveq r0, #1
+	movne r0, #0
+	tst r0, #0xff
+	ldmeqia sp!, {r3, pc}
+	ldr r0, _02001388 ; =_020B3380
+	mov ip, #0
+	mov r3, ip
+	ldr lr, [r0]
+	ldr r2, _0200138C ; =_020B33A0
+	b _02001368
+_02001320:
+	ldr r0, [r2, r3, lsl #2]
+	cmp r0, r1
+	bne _02001364
+	ldr r0, _02001388 ; =_020B3380
+	ldr r2, [r0]
+	sub ip, r2, #1
+	str ip, [r0]
+	ldr r2, _0200138C ; =_020B33A0
+	b _02001354
+_02001344:
+	add r0, r2, r3, lsl #2
+	ldr r0, [r0, #4]
+	str r0, [r2, r3, lsl #2]
+	add r3, r3, #1
+_02001354:
+	cmp r3, ip
+	blt _02001344
+	mov ip, #1
+	b _02001370
+_02001364:
+	add r3, r3, #1
+_02001368:
+	cmp r3, lr
+	blt _02001320
+_02001370:
+	cmp ip, #0
+	ldrne r0, [r1, #4]
+	cmpne r0, #0
+	ldmeqia sp!, {r3, pc}
+	bl MemLocateUnset
+	ldmia sp!, {r3, pc}
+	.align 2, 0
+_02001388: .word _020B3380
+_0200138C: .word _020B33A0
+	arm_func_end sub_020012D8
+
+	arm_func_start MemLocateSet
+MemLocateSet: ; 0x02001390
+	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
+	sub sp, sp, #0x20
+	mov r4, r0
+	ldr r0, _0200161C ; =_020AEF08
+	mov r5, r1
+	orr r7, r2, #0x100
+	bl sub_02002CB4
+	ldr r1, _02001620 ; =MEMORY_ALLOCATION_ARENA_GETTERS
+	mov r0, r4
+	ldr r2, [r1]
+	mov r1, r7
+	blx r2
+	movs r4, r0
+	mov r0, r7, asr #8
+	orr r8, r0, #1
+	and r0, r8, #2
+	ldreq r4, _02001624 ; =_020B3384
+	cmp r0, #2
+	and sb, r7, #0xff
+	bne _020015A0
+	tst r8, #4
+	ldr r0, [r4, #8]
+	ldr lr, [r4, #0xc]
+	beq _02001458
+	mov r2, r0
+	mov r7, #0
+	b _02001420
+_020013FC:
+	ldr r1, [r2, #4]
+	tst r1, #1
+	bne _02001418
+	ldr r1, [r2, #0x10]
+	cmp r1, r5
+	blt _0200144C
+	b _020014A8
+_02001418:
+	add r7, r7, #1
+	add r2, r2, #0x18
+_02001420:
+	cmp r7, lr
+	blt _020013FC
+	b _0200144C
+_0200142C:
+	ldr r1, [r2, #4]
+	tst r1, #1
+	bne _02001444
+	ldr r1, [r2, #0x10]
+	cmp r1, r5
+	bge _020014A8
+_02001444:
+	add r7, r7, #1
+	add r2, r2, #0x18
+_0200144C:
+	cmp r7, lr
+	blt _0200142C
+	b _020014A4
+_02001458:
+	mov sl, r0
+	mvn r7, #0
+	ldr r2, _02001628 ; =0x001E6401
+	mov r3, #0
+	b _02001498
+_0200146C:
+	ldr r1, [sl, #4]
+	tst r1, #1
+	bne _02001490
+	ldr r1, [sl, #0x10]
+	cmp r1, r5
+	blt _02001490
+	cmp r1, r2
+	movlt r7, r3
+	movlt r2, r1
+_02001490:
+	add r3, r3, #1
+	add sl, sl, #0x18
+_02001498:
+	cmp r3, lr
+	blt _0200146C
+	b _020014A8
+_020014A4:
+	mvn r7, #0
+_020014A8:
+	cmp r7, #0
+	blt _020015DC
+	mov r1, #0x18
+	mla r6, r7, r1, r0
+	add r3, r5, #3
+	ldr r2, [r6, #0x10]
+	bic fp, r3, #3
+	cmp r2, fp
+	ble _02001584
+	mla ip, lr, r1, r0
+	b _0200150C
+_020014D4:
+	sub r0, ip, #0x18
+	mov sl, r0
+	ldmia sl!, {r0, r1, r2, r3}
+	str sl, [sp, #0xc]
+	mov sl, ip
+	stmia sl!, {r0, r1, r2, r3}
+	str ip, [sp, #8]
+	ldr r0, [sp, #0xc]
+	mov r2, sl
+	ldmia r0, {r0, r1}
+	stmia r2, {r0, r1}
+	str sl, [sp, #8]
+	sub lr, lr, #1
+	sub ip, ip, #0x18
+_0200150C:
+	cmp lr, r7
+	bgt _020014D4
+	ldr r0, [r4, #0xc]
+	add r1, r0, #1
+	str r1, [r4, #0xc]
+	ldr r0, [r4, #0x10]
+	cmp r1, r0
+	ble _02001554
+	ldr r1, _0200162C ; =_02090B40
+	add r0, sp, #0x18
+	ldr r2, [r1, #0x14]
+	ldr r1, [r1, #0x10]
+	str r2, [sp, #0x1c]
+	str r1, [sp, #0x18]
+	ldr r2, [r4, #0xc]
+	ldr r3, [r4, #0x10]
+	ldr r1, _02001630 ; =_02090BA0
+	bl Debug_FatalError
+_02001554:
+	ldr r2, [r4, #8]
+	add r1, r7, #1
+	mov r0, #0x18
+	mla r2, r1, r0, r2
+	ldr r0, [r2, #0xc]
+	add r0, r0, fp
+	str r0, [r2, #0xc]
+	ldr r0, [r2, #0x10]
+	sub r0, r0, fp
+	str r0, [r2, #0x10]
+	str fp, [r6, #0x10]
+	str r5, [r6, #0x14]
+_02001584:
+	mov r0, r8
+	bl MemAllocFlagsToBlockType
+	stmia r6, {r0, r8, sb}
+	ldr r0, _0200161C ; =_020AEF08
+	ldr r6, [r6, #0xc]
+	bl sub_02002E98
+	b _02001610
+_020015A0:
+	mov r0, r4
+	mov r1, r8
+	mov r2, r5
+	bl FindAvailableMemBlock
+	movs r1, r0
+	bmi _020015DC
+	mov r0, r4
+	mov r2, r8
+	mov r3, r5
+	str sb, [sp]
+	bl SplitMemBlock
+	ldr r6, [r0, #0xc]
+	ldr r0, _0200161C ; =_020AEF08
+	bl sub_02002E98
+	b _02001610
+_020015DC:
+	ldr r0, _0200161C ; =_020AEF08
+	bl sub_02002E98
+	ldr r1, _0200162C ; =_02090B40
+	add r0, sp, #0x10
+	ldr r2, [r1, #4]
+	ldr r1, [r1]
+	str r2, [sp, #0x14]
+	str r1, [sp, #0x10]
+	ldr r1, _02001634 ; =_02090BFC
+	mov r2, r4
+	mov r3, r5
+	stmia sp, {r8, sb}
+	bl Debug_FatalError
+_02001610:
+	mov r0, r6
+	add sp, sp, #0x20
+	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+	.align 2, 0
+_0200161C: .word _020AEF08
+_02001620: .word MEMORY_ALLOCATION_ARENA_GETTERS
+_02001624: .word _020B3384
+_02001628: .word 0x001E6401
+_0200162C: .word _02090B40
+_02001630: .word _02090BA0
+_02001634: .word _02090BFC
+	arm_func_end MemLocateSet
+
+	arm_func_start MemLocateUnset
+MemLocateUnset: ; 0x02001638
+	stmdb sp!, {r4, r5, r6, r7, r8, lr}
+	mov r7, r0
+	ldr r0, _020017A8 ; =_020AEF08
+	mov r6, r1
+	bl sub_02002CB4
+	ldr r1, _020017AC ; =MEMORY_ALLOCATION_ARENA_GETTERS
+	mov r0, r7
+	ldr r2, [r1, #4]
+	mov r1, r6
+	blx r2
+	movs r7, r0
+	ldreq r7, _020017B0 ; =_020B3384
+	cmp r6, #0
+	bne _0200167C
+	ldr r0, _020017A8 ; =_020AEF08
+	bl sub_02002E98
+	ldmia sp!, {r4, r5, r6, r7, r8, pc}
+_0200167C:
+	ldr r4, [r7, #8]
+	ldr r1, [r7, #0xc]
+	mov r5, #0
+	b _02001794
+_0200168C:
+	ldr r0, [r4, #0xc]
+	cmp r0, r6
+	bne _0200178C
+	mov r0, #0
+	str r0, [r4]
+	str r0, [r4, #4]
+	str r0, [r4, #0x14]
+	str r0, [r4, #8]
+	ldr r0, [r7, #0xc]
+	sub r0, r0, #1
+	cmp r5, r0
+	bge _0200171C
+	add ip, r4, #0x18
+	ldr r0, [ip, #4]
+	cmp r0, #0
+	bne _0200171C
+	ldr r1, [r4, #0x10]
+	ldr r0, [ip, #0x10]
+	add lr, r5, #1
+	add r0, r1, r0
+	str r0, [r4, #0x10]
+	ldr r0, [r7, #0xc]
+	sub r0, r0, #1
+	str r0, [r7, #0xc]
+	b _02001710
+_020016F0:
+	add r8, ip, #0x18
+	mov r6, ip
+	ldmia r8!, {r0, r1, r2, r3}
+	stmia r6!, {r0, r1, r2, r3}
+	ldmia r8, {r0, r1}
+	stmia r6, {r0, r1}
+	add lr, lr, #1
+	add ip, ip, #0x18
+_02001710:
+	ldr r0, [r7, #0xc]
+	cmp lr, r0
+	blt _020016F0
+_0200171C:
+	cmp r5, #0
+	ble _02001780
+	sub r2, r4, #0x18
+	ldr r0, [r2, #4]
+	cmp r0, #0
+	bne _02001780
+	ldr r1, [r2, #0x10]
+	ldr r0, [r4, #0x10]
+	add r0, r1, r0
+	str r0, [r2, #0x10]
+	ldr r0, [r7, #0xc]
+	sub r0, r0, #1
+	str r0, [r7, #0xc]
+	b _02001774
+_02001754:
+	add ip, r4, #0x18
+	mov r6, r4
+	ldmia ip!, {r0, r1, r2, r3}
+	stmia r6!, {r0, r1, r2, r3}
+	ldmia ip, {r0, r1}
+	stmia r6, {r0, r1}
+	add r5, r5, #1
+	add r4, r4, #0x18
+_02001774:
+	ldr r0, [r7, #0xc]
+	cmp r5, r0
+	blt _02001754
+_02001780:
+	ldr r0, _020017A8 ; =_020AEF08
+	bl sub_02002E98
+	ldmia sp!, {r4, r5, r6, r7, r8, pc}
+_0200178C:
+	add r5, r5, #1
+	add r4, r4, #0x18
+_02001794:
+	cmp r5, r1
+	blt _0200168C
+	ldr r0, _020017A8 ; =_020AEF08
+	bl sub_02002E98
+	ldmia sp!, {r4, r5, r6, r7, r8, pc}
+	.align 2, 0
+_020017A8: .word _020AEF08
+_020017AC: .word MEMORY_ALLOCATION_ARENA_GETTERS
+_020017B0: .word _020B3384
+	arm_func_end MemLocateUnset
+
+	arm_func_start sub_020017B4
+sub_020017B4: ; 0x020017B4
+	ldr r2, [r0, #8]
+	ldr ip, [r0, #0xc]
+	mov r3, #0
+	b _020017DC
+_020017C4:
+	ldr r0, [r2, #0xc]
+	cmp r0, r1
+	moveq r0, #1
+	bxeq lr
+	add r3, r3, #1
+	add r2, r2, #0x18
+_020017DC:
+	cmp r3, ip
+	blt _020017C4
+	mov r0, #0
+	bx lr
+	arm_func_end sub_020017B4
+
+	arm_func_start sub_020017EC
+sub_020017EC: ; 0x020017EC
+	stmdb sp!, {r3, lr}
+	ldr r0, _02001804 ; =_020AEF08
+	bl sub_02002CB4
+	ldr r0, _02001804 ; =_020AEF08
+	bl sub_02002E98
+	ldmia sp!, {r3, pc}
+	.align 2, 0
+_02001804: .word _020AEF08
+	arm_func_end sub_020017EC
+
+	arm_func_start sub_02001808
+sub_02001808: ; 0x02001808
+	stmdb sp!, {r4, lr}
+	ldr r0, _0200187C ; =_020AEF08
+	bl sub_02002CB4
+	ldr r0, _02001880 ; =MEMORY_ALLOCATION_ARENA_GETTERS
+	mov r4, #0
+	ldr r2, [r0]
+	ldr r0, _02001884 ; =_020B3384
+	mov r1, r4
+	blx r2
+	cmp r0, #0
+	ldreq r0, _02001884 ; =_020B3384
+	mov r1, #0
+	ldr r2, [r0, #8]
+	ldr r3, [r0, #0xc]
+	b _02001864
+_02001844:
+	ldr r0, [r2]
+	cmp r0, #0
+	bne _0200185C
+	ldr r0, [r2, #0x10]
+	cmp r4, r0
+	movlt r4, r0
+_0200185C:
+	add r1, r1, #1
+	add r2, r2, #0x18
+_02001864:
+	cmp r1, r3
+	blt _02001844
+	ldr r0, _0200187C ; =_020AEF08
+	bl sub_02002E98
+	mov r0, r4
+	ldmia sp!, {r4, pc}
+	.align 2, 0
+_0200187C: .word _020AEF08
+_02001880: .word MEMORY_ALLOCATION_ARENA_GETTERS
+_02001884: .word _020B3384
+	arm_func_end sub_02001808
+
+	arm_func_start sub_02001888
+sub_02001888: ; 0x02001888
+	tst r0, #0xff
+	addne r0, r0, #0x100
+	bx lr
+	arm_func_end sub_02001888
+
+	arm_func_start RoundUpDiv256
+RoundUpDiv256: ; 0x02001894
+	tst r0, #0xff
+	addne r0, r0, #0x100
+	mov r0, r0, asr #8
+	bx lr
+	arm_func_end RoundUpDiv256
+
+	arm_func_start sub_020018A4
+sub_020018A4: ; 0x020018A4
+	and r2, r1, #0
+	and r3, r0, #0xff
+	cmp r2, #0
+	cmpeq r3, #0
+	mov r2, #0
+	beq _020018C4
+	adds r0, r0, #0x100
+	adc r1, r1, r2
+_020018C4:
+	mov r0, r0, lsr #8
+	orr r0, r0, r1, lsl #24
+	bx lr
+	arm_func_end sub_020018A4
+
+	arm_func_start SinAbs4096
+SinAbs4096: ; 0x020018D0
+	and r1, r0, #0xc00
+	cmp r1, #0x400
+	bgt _020018EC
+	bge _0200191C
+	cmp r1, #0
+	beq _02001908
+	b _02001970
+_020018EC:
+	cmp r1, #0x800
+	bgt _020018FC
+	beq _02001938
+	b _02001970
+_020018FC:
+	cmp r1, #0xc00
+	beq _02001950
+	b _02001970
+_02001908:
+	mov r1, r0, lsl #0x16
+	ldr r0, _02001978 ; =_02090C48
+	mov r1, r1, lsr #0x15
+	ldrsh r0, [r0, r1]
+	bx lr
+_0200191C:
+	ldr r1, _0200197C ; =0x000003FF
+	ldr r2, _02001978 ; =_02090C48
+	and r0, r0, r1
+	sub r0, r1, r0
+	mov r0, r0, lsl #1
+	ldrsh r0, [r2, r0]
+	bx lr
+_02001938:
+	mov r1, r0, lsl #0x16
+	ldr r0, _02001978 ; =_02090C48
+	mov r1, r1, lsr #0x15
+	ldrsh r0, [r0, r1]
+	rsb r0, r0, #0
+	bx lr
+_02001950:
+	ldr r1, _0200197C ; =0x000003FF
+	ldr r2, _02001978 ; =_02090C48
+	and r0, r0, r1
+	sub r0, r1, r0
+	mov r0, r0, lsl #1
+	ldrsh r0, [r2, r0]
+	rsb r0, r0, #0
+	bx lr
+_02001970:
+	mov r0, #0
+	bx lr
+	.align 2, 0
+_02001978: .word _02090C48
+_0200197C: .word 0x000003FF
+	arm_func_end SinAbs4096
+
+	arm_func_start sub_02001980
+sub_02001980: ; 0x02001980
+	and r1, r0, #0xc00
+	cmp r1, #0x400
+	bgt _0200199C
+	bge _020019D4
+	cmp r1, #0
+	beq _020019B8
+	b _02001A20
+_0200199C:
+	cmp r1, #0x800
+	bgt _020019AC
+	beq _020019EC
+	b _02001A20
+_020019AC:
+	cmp r1, #0xc00
+	beq _02001A0C
+	b _02001A20
+_020019B8:
+	ldr r1, _02001A28 ; =0x000003FF
+	ldr r2, _02001A2C ; =_02090C48
+	and r0, r0, r1
+	sub r0, r1, r0
+	mov r0, r0, lsl #1
+	ldrsh r0, [r2, r0]
+	bx lr
+_020019D4:
+	mov r1, r0, lsl #0x16
+	ldr r0, _02001A2C ; =_02090C48
+	mov r1, r1, lsr #0x15
+	ldrsh r0, [r0, r1]
+	rsb r0, r0, #0
+	bx lr
+_020019EC:
+	ldr r1, _02001A28 ; =0x000003FF
+	ldr r2, _02001A2C ; =_02090C48
+	and r0, r0, r1
+	sub r0, r1, r0
+	mov r0, r0, lsl #1
+	ldrsh r0, [r2, r0]
+	rsb r0, r0, #0
+	bx lr
+_02001A0C:
+	mov r1, r0, lsl #0x16
+	ldr r0, _02001A2C ; =_02090C48
+	mov r1, r1, lsr #0x15
+	ldrsh r0, [r0, r1]
+	bx lr
+_02001A20:
+	mov r0, #0
+	bx lr
+	.align 2, 0
+_02001A28: .word 0x000003FF
+_02001A2C: .word _02090C48
+	arm_func_end sub_02001980
+
+	arm_func_start UFixedPoint64CmpLt
+UFixedPoint64CmpLt: ; 0x02001A30
+	cmp r0, r2
+	movlo r0, #1
+	bxlo lr
+	movhi r0, #0
+	bxhi lr
+	cmp r1, r3
+	movlo r0, #1
+	movhs r0, #0
+	bx lr
+	arm_func_end UFixedPoint64CmpLt
+
+	arm_func_start MultiplyByFixedPoint
+MultiplyByFixedPoint: ; 0x02001A54
+	stmdb sp!, {r3, r4, r5, lr}
+	tst r0, #0x80000000
+	movne r2, #1
+	moveq r2, #0
+	tst r1, #0x80000000
+	and r4, r2, #0xff
+	movne r2, #1
+	moveq r2, #0
+	cmp r0, #0
+	and r5, r2, #0xff
+	moveq r0, #0
+	ldmeqia sp!, {r3, r4, r5, pc}
+	cmp r1, #0
+	moveq r0, #0
+	ldmeqia sp!, {r3, r4, r5, pc}
+	cmp r4, #0
+	rsbne r0, r0, #0
+	cmp r5, #0
+	rsbne r1, r1, #0
+	bl UMultiplyByFixedPoint
+	cmp r4, r5
+	rsbne r0, r0, #0
+	ldmia sp!, {r3, r4, r5, pc}
+	arm_func_end MultiplyByFixedPoint
+
+	arm_func_start sub_02001AB0
+sub_02001AB0: ; 0x02001AB0
+	stmdb sp!, {r3, r4, r5, lr}
+	tst r0, #0x80000000
+	movne r2, #1
+	moveq r2, #0
+	tst r1, #0x80000000
+	and r4, r2, #0xff
+	movne r2, #1
+	moveq r2, #0
+	cmp r1, #0
+	and r5, r2, #0xff
+	mvneq r0, #0x80000000
+	ldmeqia sp!, {r3, r4, r5, pc}
+	cmp r0, #0
+	moveq r0, #0
+	ldmeqia sp!, {r3, r4, r5, pc}
+	cmp r4, #0
+	rsbne r0, r0, #0
+	cmp r5, #0
+	rsbne r1, r1, #0
+	bl sub_02001BB4
+	cmp r4, r5
+	rsbne r0, r0, #0
+	ldmia sp!, {r3, r4, r5, pc}
+	arm_func_end sub_02001AB0
+
+	arm_func_start UMultiplyByFixedPoint
+UMultiplyByFixedPoint: ; 0x02001B0C
+	stmdb sp!, {r3, r4, r5, lr}
+	cmp r0, #0
+	moveq r0, #0
+	ldmeqia sp!, {r3, r4, r5, pc}
+	cmp r1, #0
+	moveq r0, #0
+	ldmeqia sp!, {r3, r4, r5, pc}
+	mov r3, #0
+	mov r2, r3
+	mov ip, r3
+	mov lr, r3
+	mov r4, r3
+_02001B3C:
+	mov r5, lr
+	tst r1, #1
+	beq _02001B58
+	add lr, lr, r0
+	add ip, ip, r3
+	cmp r5, lr
+	addhi ip, ip, #1
+_02001B58:
+	mov r1, r1, lsr #1
+	tst r2, #1
+	orrne r1, r1, #0x80000000
+	mov r2, r2, lsr #1
+	tst r0, #0x80000000
+	mov r3, r3, lsl #1
+	mov r0, r0, lsl #1
+	add r4, r4, #1
+	orrne r3, r3, #1
+	bic r2, r2, #0x80000000
+	cmp r4, #0x40
+	bic r0, r0, #1
+	blt _02001B3C
+	mov r0, lr, lsr #8
+	tst lr, #0x80
+	movne r1, #1
+	bic r0, r0, #0xff000000
+	moveq r1, #0
+	orr lr, r0, ip, lsl #24
+	tst r1, #0xff
+	addne lr, lr, #1
+	mov r0, lr
+	ldmia sp!, {r3, r4, r5, pc}
+	arm_func_end UMultiplyByFixedPoint
+
+	arm_func_start sub_02001BB4
+sub_02001BB4: ; 0x02001BB4
+	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
+	movs sl, r1
+	mvneq r0, #0x80000000
+	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+	cmp r0, #0
+	moveq r0, #0
+	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+	mov r8, #0
+	mov r1, r0, asr #0x18
+	mov r0, r0, lsl #8
+	mov r4, r8
+	mov r5, r8
+	mov sb, r8
+	and r6, r1, #0xff
+	bic r7, r0, #0xff
+	mov fp, r8
+_02001BF4:
+	mov r0, r5, lsl #1
+	tst r5, #0x80000000
+	mov r4, r4, lsl #1
+	orrne r4, r4, #1
+	bic r5, r0, #1
+	tst r6, #0x80000000
+	orrne r5, r5, #1
+	mov r3, r7, lsl #1
+	tst r7, #0x80000000
+	mov r6, r6, lsl #1
+	bic r7, r3, #1
+	mov r0, r4
+	mov r1, r5
+	mov r2, fp
+	mov r3, sl
+	orrne r6, r6, #1
+	bl UFixedPoint64CmpLt
+	cmp r0, #0
+	bne _02001C58
+	mov r0, r5
+	sub r5, r5, sl
+	cmp r0, r5
+	mov r1, #1
+	sublo r4, r4, #1
+	b _02001C5C
+_02001C58:
+	mov r1, #0
+_02001C5C:
+	mov r0, r8, lsl #1
+	bic r8, r0, #1
+	cmp r1, #0
+	add sb, sb, #1
+	orrne r8, r8, #1
+	cmp sb, #0x40
+	blt _02001BF4
+	mov r0, r8
+	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+	arm_func_end sub_02001BB4
+
+	arm_func_start IntToFixedPoint64
+IntToFixedPoint64: ; 0x02001C80
+	mov r2, #0x10000
+	rsb r2, r2, #0
+	and r3, r1, r2
+	mov r3, r3, lsr #0x10
+	str r3, [r0]
+	mov r3, r1, lsl #0x10
+	str r3, [r0, #4]
+	tst r1, #0x8000
+	ldrne r1, [r0]
+	orrne r1, r1, r2
+	strne r1, [r0]
+	bx lr
+	arm_func_end IntToFixedPoint64
+
+	arm_func_start FixedPoint64ToInt
+FixedPoint64ToInt: ; 0x02001CB0
+	ldmia r0, {r1, r2}
+	mov r0, #0x10000
+	rsb r0, r0, #0
+	mov r1, r1, lsl #0x10
+	and r0, r2, r0
+	orr r0, r1, r0, lsr #16
+	tst r2, #0x8000
+	addne r0, r0, #1
+	bx lr
+	arm_func_end FixedPoint64ToInt
+
+	arm_func_start FixedPoint32To64
+FixedPoint32To64: ; 0x02001CD4
+	mov r2, r1, asr #0x18
+	mov r3, r1, lsl #8
+	tst r2, #0x80
+	mvnne r1, #0x7f
+	orrne r1, r2, r1
+	stmia r0, {r2, r3}
+	andeq r1, r2, #0x7f
+	str r1, [r0]
+	bx lr
+	arm_func_end FixedPoint32To64
+
+	arm_func_start NegateFixedPoint64
+NegateFixedPoint64: ; 0x02001CF8
+	ldr r2, [r0]
+	mvn r1, #0
+	eor r2, r2, r1
+	str r2, [r0]
+	ldr r2, [r0, #4]
+	eor r2, r2, r1
+	adds r1, r2, #1
+	str r1, [r0, #4]
+	ldreq r1, [r0]
+	addeq r1, r1, #1
+	streq r1, [r0]
+	bx lr
+	arm_func_end NegateFixedPoint64
+
+	arm_func_start FixedPoint64IsZero
+FixedPoint64IsZero: ; 0x02001D28
+	ldr r1, [r0]
+	cmp r1, #0
+	movne r0, #0
+	bxne lr
+	ldr r0, [r0, #4]
+	cmp r0, #0
+	moveq r0, #1
+	movne r0, #0
+	and r0, r0, #0xff
+	bx lr
+	arm_func_end FixedPoint64IsZero
+
+	arm_func_start FixedPoint64IsNegative
+FixedPoint64IsNegative: ; 0x02001D50
+	ldr r0, [r0]
+	tst r0, #0x80000000
+	movne r0, #1
+	moveq r0, #0
+	and r0, r0, #0xff
+	bx lr
+	arm_func_end FixedPoint64IsNegative
+
+	arm_func_start FixedPoint64CmpLt
+FixedPoint64CmpLt: ; 0x02001D68
+	stmdb sp!, {r3, lr}
+	mov ip, r1
+	ldr r2, [ip]
+	mov lr, r0
+	tst r2, #0x80000000
+	movne r1, #2
+	ldr r0, [lr]
+	moveq r1, #0
+	tst r0, #0x80000000
+	movne r3, #1
+	moveq r3, #0
+	orr r1, r3, r1
+	cmp r1, #3
+	addls pc, pc, r1, lsl #2
+	b _02001DB4
+_02001DA4: ; jump table
+	b _02001DB4 ; case 0
+	b _02001DC4 ; case 1
+	b _02001DCC ; case 2
+	b _02001DD4 ; case 3
+_02001DB4:
+	ldr r1, [lr, #4]
+	ldr r3, [ip, #4]
+	bl UFixedPoint64CmpLt
+	ldmia sp!, {r3, pc}
+_02001DC4:
+	mov r0, #1
+	ldmia sp!, {r3, pc}
+_02001DCC:
+	mov r0, #0
+	ldmia sp!, {r3, pc}
+_02001DD4:
+	ldr r1, [lr, #4]
+	ldr r3, [ip, #4]
+	bl UFixedPoint64CmpLt
+	cmp r0, #0
+	moveq r0, #1
+	movne r0, #0
+	and r0, r0, #0xff
+	ldmia sp!, {r3, pc}
+	arm_func_end FixedPoint64CmpLt
+
+	arm_func_start MultiplyFixedPoint64
+MultiplyFixedPoint64: ; 0x02001DF4
+	stmdb sp!, {r4, r5, r6, lr}
+	sub sp, sp, #0x18
+	ldr r3, [r1]
+	mov r4, r0
+	str r3, [sp, #0x10]
+	ldr r1, [r1, #4]
+	add r0, sp, #0x10
+	str r1, [sp, #0x14]
+	ldr r1, [r2]
+	str r1, [sp, #8]
+	ldr r1, [r2, #4]
+	str r1, [sp, #0xc]
+	bl FixedPoint64IsNegative
+	mov r5, r0
+	add r0, sp, #8
+	bl FixedPoint64IsNegative
+	mov r6, r0
+	add r0, sp, #0x10
+	bl FixedPoint64IsZero
+	cmp r0, #0
+	movne r0, #0
+	strne r0, [r4]
+	strne r0, [r4, #4]
+	bne _02001EC0
+	add r0, sp, #8
+	bl FixedPoint64IsZero
+	cmp r0, #0
+	movne r0, #0
+	strne r0, [r4]
+	strne r0, [r4, #4]
+	bne _02001EC0
+	cmp r5, #0
+	beq _02001E80
+	add r0, sp, #0x10
+	bl NegateFixedPoint64
+_02001E80:
+	cmp r6, #0
+	beq _02001E90
+	add r0, sp, #8
+	bl NegateFixedPoint64
+_02001E90:
+	add r0, sp, #0
+	add r1, sp, #0x10
+	add r2, sp, #8
+	bl UMultiplyFixedPoint64
+	cmp r5, r6
+	beq _02001EB0
+	add r0, sp, #0
+	bl NegateFixedPoint64
+_02001EB0:
+	ldr r0, [sp]
+	str r0, [r4]
+	ldr r0, [sp, #4]
+	str r0, [r4, #4]
+_02001EC0:
+	add sp, sp, #0x18
+	ldmia sp!, {r4, r5, r6, pc}
+	arm_func_end MultiplyFixedPoint64
+
+	arm_func_start DivideFixedPoint64
+DivideFixedPoint64: ; 0x02001EC8
+	stmdb sp!, {r4, r5, r6, lr}
+	sub sp, sp, #0x18
+	ldr r3, [r1]
+	mov r4, r0
+	str r3, [sp, #0x10]
+	ldr r1, [r1, #4]
+	add r0, sp, #0x10
+	str r1, [sp, #0x14]
+	ldr r1, [r2]
+	str r1, [sp, #8]
+	ldr r1, [r2, #4]
+	str r1, [sp, #0xc]
+	bl FixedPoint64IsNegative
+	mov r5, r0
+	add r0, sp, #8
+	bl FixedPoint64IsNegative
+	mov r6, r0
+	add r0, sp, #8
+	bl FixedPoint64IsZero
+	cmp r0, #0
+	mvnne r0, #0x80000000
+	strne r0, [r4]
+	subne r0, r0, #0x80000000
+	strne r0, [r4, #4]
+	bne _02001F98
+	add r0, sp, #0x10
+	bl FixedPoint64IsZero
+	cmp r0, #0
+	movne r0, #0
+	strne r0, [r4]
+	strne r0, [r4, #4]
+	bne _02001F98
+	cmp r5, #0
+	beq _02001F58
+	add r0, sp, #0x10
+	bl NegateFixedPoint64
+_02001F58:
+	cmp r6, #0
+	beq _02001F68
+	add r0, sp, #8
+	bl NegateFixedPoint64
+_02001F68:
+	add r0, sp, #0
+	add r1, sp, #0x10
+	add r2, sp, #8
+	bl UDivideFixedPoint64
+	cmp r5, r6
+	beq _02001F88
+	add r0, sp, #0
+	bl NegateFixedPoint64
+_02001F88:
+	ldr r0, [sp]
+	str r0, [r4]
+	ldr r0, [sp, #4]
+	str r0, [r4, #4]
+_02001F98:
+	add sp, sp, #0x18
+	ldmia sp!, {r4, r5, r6, pc}
+	arm_func_end DivideFixedPoint64
+
+	arm_func_start UMultiplyFixedPoint64
+UMultiplyFixedPoint64: ; 0x02001FA0
+	stmdb sp!, {r4, r5, r6, lr}
+	mov r6, r1
+	mov r4, r0
+	mov r0, r6
+	mov r5, r2
+	bl FixedPoint64IsZero
+	cmp r0, #0
+	movne r0, #0
+	strne r0, [r4]
+	strne r0, [r4, #4]
+	ldmneia sp!, {r4, r5, r6, pc}
+	mov r0, r5
+	bl FixedPoint64IsZero
+	cmp r0, #0
+	movne r0, #0
+	strne r0, [r4]
+	strne r0, [r4, #4]
+	ldmneia sp!, {r4, r5, r6, pc}
+	mov lr, #0
+	ldmia r6, {r1, r2}
+	ldmia r5, {r3, ip}
+	mov r5, lr
+	mov r6, lr
+_02001FFC:
+	mov r0, r5
+	tst ip, #1
+	beq _02002018
+	add r5, r5, r2
+	add lr, lr, r1
+	cmp r0, r5
+	addhi lr, lr, #1
+_02002018:
+	mov r0, r3, lsr #1
+	tst r3, #1
+	mov ip, ip, lsr #1
+	bic r3, r0, #0x80000000
+	orrne ip, ip, #0x80000000
+	mov r1, r1, lsl #1
+	tst r2, #0x80000000
+	mov r0, r2, lsl #1
+	add r6, r6, #1
+	orrne r1, r1, #1
+	cmp r6, #0x40
+	bic r2, r0, #1
+	blt _02001FFC
+	mov r0, r5, lsr #0x10
+	mov r0, r0, lsl #0x10
+	tst r5, #0x8000
+	mov r1, lr, lsl #0x10
+	movne r2, #1
+	orr r5, r1, r0, lsr #16
+	mov r0, lr, lsr #0x10
+	moveq r2, #0
+	mov r0, r0, lsl #0x10
+	tst r2, #0xff
+	addne r5, r5, #1
+	mov r0, r0, lsr #0x10
+	stmia r4, {r0, r5}
+	ldmia sp!, {r4, r5, r6, pc}
+	arm_func_end UMultiplyFixedPoint64
+
+	arm_func_start UDivideFixedPoint64
+UDivideFixedPoint64: ; 0x02002084
+	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
+	sub sp, sp, #8
+	mov r4, r2
+	mov sl, r0
+	mov r0, r4
+	mov r5, r1
+	bl FixedPoint64IsZero
+	cmp r0, #0
+	mvnne r0, #0x80000000
+	strne r0, [sl]
+	subne r0, r0, #0x80000000
+	strne r0, [sl, #4]
+	bne _020021C0
+	mov r0, r5
+	bl FixedPoint64IsZero
+	cmp r0, #0
+	movne r0, #0
+	strne r0, [sl]
+	strne r0, [sl, #4]
+	bne _020021C0
+	ldr r2, [r5, #4]
+	mov r0, #0x10000
+	mov r1, r2, lsr #0x10
+	mov r8, #0
+	ldr r3, [r5]
+	rsb r0, r0, #0
+	and r2, r0, r2, lsl #16
+	and r3, r0, r3, lsl #16
+	ldr r0, [r4]
+	mov r1, r1, lsl #0x10
+	ldr fp, [r4, #4]
+	str r0, [sp, #4]
+	mov sb, r8
+	mov r4, r8
+	mov r5, r8
+	str r8, [sp]
+	orr r6, r3, r1, lsr #16
+	orr r7, r2, #0x8000
+_0200211C:
+	mov r0, r5, lsl #1
+	tst r5, #0x80000000
+	mov r4, r4, lsl #1
+	orrne r4, r4, #1
+	bic r5, r0, #1
+	tst r6, #0x80000000
+	orrne r5, r5, #1
+	mov r1, r7, lsl #1
+	tst r7, #0x80000000
+	mov r6, r6, lsl #1
+	bic r7, r1, #1
+	ldr r2, [sp, #4]
+	mov r0, r4
+	mov r1, r5
+	mov r3, fp
+	orrne r6, r6, #1
+	bl UFixedPoint64CmpLt
+	cmp r0, #0
+	bne _02002188
+	mov r0, r5
+	sub r5, r5, fp
+	cmp r0, r5
+	ldr r0, [sp, #4]
+	mov r1, #1
+	sub r4, r4, r0
+	sublo r4, r4, #1
+	b _0200218C
+_02002188:
+	mov r1, #0
+_0200218C:
+	mov r0, sb, lsl #1
+	tst sb, #0x80000000
+	bic sb, r0, #1
+	ldr r0, [sp]
+	mov r8, r8, lsl #1
+	add r0, r0, #1
+	orrne r8, r8, #1
+	cmp r1, #0
+	orrne sb, sb, #1
+	str r0, [sp]
+	cmp r0, #0x40
+	blt _0200211C
+	stmia sl, {r8, sb}
+_020021C0:
+	add sp, sp, #8
+	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+	arm_func_end UDivideFixedPoint64
+
+	arm_func_start AddFixedPoint64
+AddFixedPoint64: ; 0x020021C8
+	stmdb sp!, {r3, lr}
+	ldr ip, [r1, #4]
+	ldr lr, [r1]
+	ldr r1, [r2]
+	ldr r3, [r2, #4]
+	add r1, lr, r1
+	add r2, ip, r3
+	cmp r2, ip
+	addlo r1, r1, #1
+	stmia r0, {r1, r2}
+	ldmia sp!, {r3, pc}
+	arm_func_end AddFixedPoint64
+
+	arm_func_start ClampedLn
+ClampedLn: ; 0x020021F4
+	cmp r1, #1
+	movlt r1, #1
+	cmp r1, #0x800
+	ldrge r1, _02002220 ; =0x000007FF
+	ldr r2, _02002224 ; =NATURAL_LOG_VALUE_TABLE
+	mov r1, r1, lsl #1
+	ldrsh r2, [r2, r1]
+	mov r1, #0
+	mov r2, r2, lsl #4
+	stmia r0, {r1, r2}
+	bx lr
+	.align 2, 0
+_02002220: .word 0x000007FF
+_02002224: .word NATURAL_LOG_VALUE_TABLE
+	arm_func_end ClampedLn
+
+	arm_func_start sub_02002228
+sub_02002228: ; 0x02002228
+	bx lr
+	arm_func_end sub_02002228
+
+	arm_func_start GetRngSeed
+GetRngSeed: ; 0x0200222C
+	ldr r0, _02002238 ; =PRNG_SEQUENCE_NUM
+	ldrh r0, [r0]
+	bx lr
+	.align 2, 0
+_02002238: .word PRNG_SEQUENCE_NUM
+	arm_func_end GetRngSeed
+
+	arm_func_start SetRngSeed
+SetRngSeed: ; 0x0200223C
+	ldr r1, _02002248 ; =PRNG_SEQUENCE_NUM
+	strh r0, [r1]
+	bx lr
+	.align 2, 0
+_02002248: .word PRNG_SEQUENCE_NUM
+	arm_func_end SetRngSeed
+
+	arm_func_start Rand16Bit
+Rand16Bit: ; 0x0200224C
+	ldr r1, _02002270 ; =PRNG_SEQUENCE_NUM
+	mov r0, #0x6d
+	ldrh r2, [r1]
+	mul r0, r2, r0
+	add r0, r0, #0xfd
+	add r0, r0, #0x300
+	strh r0, [r1]
+	ldrh r0, [r1]
+	bx lr
+	.align 2, 0
+_02002270: .word PRNG_SEQUENCE_NUM
+	arm_func_end Rand16Bit
+
+	arm_func_start RandInt
+RandInt: ; 0x02002274
+	stmdb sp!, {r4, lr}
+	mov r4, r0
+	bl Rand16Bit
+	mul r0, r4, r0
+	mov r0, r0, asr #0x10
+	ldmia sp!, {r4, pc}
+	arm_func_end RandInt
+
+	arm_func_start RandRange
+RandRange: ; 0x0200228C
+	stmdb sp!, {r3, r4, r5, lr}
+	mov r5, r0
+	mov r4, r1
+	bl Rand16Bit
+	sub r1, r4, r5
+	mul r0, r1, r0
+	add r0, r5, r0, asr #16
+	ldmia sp!, {r3, r4, r5, pc}
+	arm_func_end RandRange
+
+	arm_func_start Rand32Bit
+Rand32Bit: ; 0x020022AC
+	stmdb sp!, {r4, lr}
+	bl Rand16Bit
+	mov r4, r0
+	bl Rand16Bit
+	orr r0, r0, r4, lsl #16
+	ldmia sp!, {r4, pc}
+	arm_func_end Rand32Bit
+
+	arm_func_start sub_020022C4
+sub_020022C4: ; 0x020022C4
+	mov r1, #1
+	str r1, [r0]
+	bx lr
+	arm_func_end sub_020022C4
+
+	arm_func_start sub_020022D0
+sub_020022D0: ; 0x020022D0
+	ldr r3, [r0]
+	ldr r2, _020022F4 ; =0x5D588B65
+	mul r2, r3, r2
+	add r3, r2, #1
+	mov r2, r3, lsr #0x10
+	mul r1, r2, r1
+	str r3, [r0]
+	mov r0, r1, lsr #0x10
+	bx lr
+	.align 2, 0
+_020022F4: .word 0x5D588B65
+	arm_func_end sub_020022D0
+
+	arm_func_start RandIntSafe
+RandIntSafe: ; 0x020022F8
+	stmdb sp!, {r4, lr}
+	mov r4, r0
+	bl Rand16Bit
+	mov r0, r0, lsl #0x10
+	mov r1, r0, lsr #0x10
+	mul r0, r1, r4
+	mov r0, r0, asr #0x10
+	ldmia sp!, {r4, pc}
+	arm_func_end RandIntSafe
+
+	arm_func_start RandRangeSafe
+RandRangeSafe: ; 0x02002318
+	stmdb sp!, {r3, r4, r5, lr}
+	mov r5, r0
+	mov r4, r1
+	cmp r5, r4
+	ldmeqia sp!, {r3, r4, r5, pc}
+	bge _0200234C
+	bl Rand16Bit
+	mov r0, r0, lsl #0x10
+	mov r1, r0, lsr #0x10
+	sub r0, r4, r5
+	mul r0, r1, r0
+	add r0, r5, r0, asr #16
+	ldmia sp!, {r3, r4, r5, pc}
+_0200234C:
+	bl Rand16Bit
+	mov r0, r0, lsl #0x10
+	mov r1, r0, lsr #0x10
+	sub r0, r5, r4
+	mul r0, r1, r0
+	add r0, r4, r0, asr #16
+	ldmia sp!, {r3, r4, r5, pc}
+	arm_func_end RandRangeSafe
+
+	arm_func_start sub_02002368
+sub_02002368: ; 0x02002368
+	b _02002378
+_0200236C:
+	cmp r2, r1
+	bxeq lr
+	add r0, r0, #1
+	arm_func_end sub_02002368
+_02002378:
+	ldrsb r2, [r0]
+	cmp r2, #0
+	bne _0200236C
+	mov r0, #0
+	bx lr
+
+	arm_func_start sub_0200238C
+sub_0200238C: ; 0x0200238C
+	cmp r0, #0x41
+	bxlt lr
+	cmp r0, #0x5a
+	addle r0, r0, #0x20
+	movle r0, r0, lsl #0x18
+	movle r0, r0, asr #0x18
+	bx lr
+	arm_func_end sub_0200238C
+
+	arm_func_start sub_020023A8
+sub_020023A8: ; 0x020023A8
+	mov ip, #0
+	b _020023E4
+_020023B0:
+	ldrsb r3, [r1]
+	cmp r3, #0
+	bne _020023D8
+	mov r1, #0x20
+	b _020023CC
+_020023C4:
+	strb r1, [r0], #1
+	add ip, ip, #1
+_020023CC:
+	cmp ip, r2
+	blt _020023C4
+	b _020023EC
+_020023D8:
+	add r1, r1, #1
+	strb r3, [r0], #1
+	add ip, ip, #1
+_020023E4:
+	cmp ip, r2
+	blt _020023B0
+_020023EC:
+	mov r1, #0
+	strb r1, [r0]
+	bx lr
+	arm_func_end sub_020023A8
+
+	arm_func_start sub_020023F8
+sub_020023F8: ; 0x020023F8
+	stmdb sp!, {r3, lr}
+	mov lr, #0
+	b _02002428
+_02002404:
+	ldrsb ip, [r0], #1
+	ldrsb r3, [r1], #1
+	cmp r3, ip
+	movne r0, #0
+	ldmneia sp!, {r3, pc}
+	cmp ip, #0
+	moveq r0, #1
+	ldmeqia sp!, {r3, pc}
+	add lr, lr, #1
+_02002428:
+	cmp lr, r2
+	blt _02002404
+	mov r0, #1
+	ldmia sp!, {r3, pc}
+	arm_func_end sub_020023F8
+
+	arm_func_start WaitForever
+WaitForever: ; 0x02002438
+	stmdb sp!, {r3, lr}
+	bl sub_02079C14
+_02002440:
+	bl WaitForInterrupt
+	b _02002440
+	arm_func_end WaitForever
+
+	arm_func_start sub_02002448
+sub_02002448: ; 0x02002448
+	stmdb sp!, {r4, lr}
+	mov r4, r0
+	bl sub_02003AD0
+	bl sub_02002580
+	mov r1, #1
+	bl sub_020027F8
+	bl sub_02079C14
+	bl GX_DispOff
+	ldr r3, _02002498 ; =0x04001000
+	ldr r0, _0200249C ; =_02092464
+	ldr r2, [r3]
+	mov r1, r4
+	bic r2, r2, #0x10000
+	str r2, [r3]
+	bl Debug_Print0
+	mov r0, r4
+	bl sub_0207B930
+	bl sub_02079C14
+_02002490:
+	bl WaitForInterrupt
+	b _02002490
+	.align 2, 0
+_02002498: .word 0x04001000
+_0200249C: .word _02092464
+	arm_func_end sub_02002448
+
+	arm_func_start sub_020024A0
+sub_020024A0: ; 0x020024A0
+	ldr r0, _020024AC ; =0x027FFC20
+	ldr r0, [r0]
+	bx lr
+	.align 2, 0
+_020024AC: .word 0x027FFC20
+	arm_func_end sub_020024A0
+
+	arm_func_start sub_020024B0
+sub_020024B0: ; 0x020024B0
+	ldr ip, _020024BC ; =sub_020845D8
+	mov r0, #0
+	bx ip
+	.align 2, 0
+_020024BC: .word sub_020845D8
+	arm_func_end sub_020024B0
+
+	arm_func_start sub_020024C0
+sub_020024C0: ; 0x020024C0
+	ldr ip, _020024CC ; =sub_020845D8
+	ldr r0, _020024D0 ; =sub_020024D4
+	bx ip
+	.align 2, 0
+_020024CC: .word sub_020845D8
+_020024D0: .word sub_020024D4
+	arm_func_end sub_020024C0
+
+	arm_func_start sub_020024D4
+sub_020024D4: ; 0x020024D4
+	stmdb sp!, {r3, lr}
+	bl CardPullOut
+	mov r0, #0
+	ldmia sp!, {r3, pc}
+	arm_func_end sub_020024D4
+
+	arm_func_start sub_020024E4
+sub_020024E4: ; 0x020024E4
+	stmdb sp!, {r3, lr}
+	ldr r0, _0200256C ; =_0229AFCC
+	bl sub_0207A030
+	ldr r0, _0200256C ; =_0229AFCC
+	bl sub_0207A048
+	mov r1, #0
+	ldr r0, _02002570 ; =_0229AFE4
+	mov r2, r1
+_02002504:
+	add r1, r1, #1
+	cmp r1, #8
+	str r2, [r0], #4
+	blt _02002504
+	ldr r1, _02002574 ; =_0229AFC0
+	ldr r0, _0200256C ; =_0229AFCC
+	str r2, [r1]
+	str r2, [r1, #4]
+	str r2, [r1, #8]
+	bl sub_0207A0CC
+	ldr r1, _02002578 ; =_022B966C
+	ldr r0, _0200257C ; =_0229B004
+	ldr r1, [r1, #4]
+	mov r2, #0
+	stmia r0, {r1, r2}
+	str r2, [r0, #8]
+	str r2, [r0, #0xc]
+	mov r1, #7
+	str r1, [r0, #0x10]
+	str r2, [r0, #0x14]
+	bl sub_020026E4
+	ldr r0, _02002578 ; =_022B966C
+	mov r1, #7
+	ldr r0, [r0, #4]
+	bl sub_02079A64
+	ldmia sp!, {r3, pc}
+	.align 2, 0
+_0200256C: .word _0229AFCC
+_02002570: .word _0229AFE4
+_02002574: .word _0229AFC0
+_02002578: .word _022B966C
+_0200257C: .word _0229B004
+	arm_func_end sub_020024E4
+
+	arm_func_start sub_02002580
+sub_02002580: ; 0x02002580
+	stmdb sp!, {r3, r4, r5, lr}
+	ldr r1, _020025E8 ; =_022B966C
+	ldr r0, _020025EC ; =_0229AFCC
+	ldr r4, [r1, #4]
+	bl sub_0207A048
+	ldr r0, _020025F0 ; =_0229AFC0
+	mov r1, #0
+	ldr r3, [r0]
+	ldr r2, _020025F4 ; =_0229AFE4
+	b _020025CC
+_020025A8:
+	ldr r5, [r2]
+	ldr r0, [r5]
+	cmp r0, r4
+	bne _020025C4
+	ldr r0, _020025EC ; =_0229AFCC
+	bl sub_0207A0CC
+	b _020025E0
+_020025C4:
+	add r1, r1, #1
+	add r2, r2, #4
+_020025CC:
+	cmp r1, r3
+	blt _020025A8
+	ldr r0, _020025EC ; =_0229AFCC
+	bl sub_0207A0CC
+	mov r5, #0
+_020025E0:
+	mov r0, r5
+	ldmia sp!, {r3, r4, r5, pc}
+	.align 2, 0
+_020025E8: .word _022B966C
+_020025EC: .word _0229AFCC
+_020025F0: .word _0229AFC0
+_020025F4: .word _0229AFE4
+	arm_func_end sub_02002580
+
+; https://decomp.me/scratch/Gairr
+	arm_func_start sub_020025F8
+sub_020025F8: ; 0x020025F8
+	stmdb sp!, {r4, lr}
+	cmp r0, #0
+	beq _02002614
+	ldr r0, [r0]
+	mov r1, #0
+	bl sub_02079844
+	ldmia sp!, {r4, pc}
+_02002614:
+	mov r4, #0
+_02002618:
+	mov r0, r4
+	bl sub_02079888
+	b _02002618
+	arm_func_end sub_020025F8
+
+	arm_func_start sub_02002624
+sub_02002624: ; 0x02002624
+	ldmia sp!, {r4, pc}
+	arm_func_end sub_02002624
+
+	arm_func_start sub_02002628
+sub_02002628: ; 0x02002628
+	stmdb sp!, {r3, r4, r5, lr}
+	ldr r2, _02002658 ; =_022B966C
+	mov r5, r0
+	ldr r0, [r2, #4]
+	mov r4, r1
+	str r0, [r5]
+	bl sub_02079B0C
+	str r0, [r5, #4]
+	ldr r0, [r5]
+	mov r1, r4
+	bl sub_02079A64
+	ldmia sp!, {r3, r4, r5, pc}
+	.align 2, 0
+_02002658: .word _022B966C
+	arm_func_end sub_02002628
+
+	arm_func_start sub_0200265C
+sub_0200265C: ; 0x0200265C
+	ldr ip, _0200266C ; =sub_02079A64
+	mov r1, r0
+	ldmia r1, {r0, r1}
+	bx ip
+	.align 2, 0
+_0200266C: .word sub_02079A64
+	arm_func_end sub_0200265C
+
+	arm_func_start sub_02002670
+sub_02002670: ; 0x02002670
+	stmdb sp!, {r3, r4, r5, lr}
+	ldr r0, _020026AC ; =_022B966C
+	ldr r5, [r0, #4]
+	mov r0, r5
+	bl sub_02079B0C
+	mov r4, r0
+	mov r0, r5
+	mov r1, #7
+	bl sub_02079A64
+	ldr r0, _020026B0 ; =_0229AFCC
+	bl sub_0207A048
+	ldr r0, _020026B4 ; =_020AEF30
+	str r5, [r0]
+	str r4, [r0, #4]
+	ldmia sp!, {r3, r4, r5, pc}
+	.align 2, 0
+_020026AC: .word _022B966C
+_020026B0: .word _0229AFCC
+_020026B4: .word _020AEF30
+	arm_func_end sub_02002670
+
+	arm_func_start sub_020026B8
+sub_020026B8: ; 0x020026B8
+	stmdb sp!, {r3, r4, r5, lr}
+	ldr r1, _020026DC ; =_020AEF30
+	ldr r0, _020026E0 ; =_0229AFCC
+	ldmia r1, {r4, r5}
+	bl sub_0207A0CC
+	mov r0, r4
+	mov r1, r5
+	bl sub_02079A64
+	ldmia sp!, {r3, r4, r5, pc}
+	.align 2, 0
+_020026DC: .word _020AEF30
+_020026E0: .word _0229AFCC
+	arm_func_end sub_020026B8
+
+	arm_func_start sub_020026E4
+sub_020026E4: ; 0x020026E4
+	stmdb sp!, {r4, r5, r6, lr}
+	ldr r1, _02002768 ; =_022B966C
+	mov r6, r0
+	ldr r5, [r1, #4]
+	mov r0, r5
+	bl sub_02079B0C
+	mov r4, r0
+	mov r0, r5
+	mov r1, #7
+	bl sub_02079A64
+	ldr r0, _0200276C ; =_0229AFCC
+	bl sub_0207A048
+	ldr r0, _02002770 ; =_0229AFC0
+	ldr r3, [r0]
+	cmp r3, #8
+	bge _02002750
+	add r1, r3, #1
+	ldr r2, _02002774 ; =_0229AFE4
+	str r1, [r0]
+	ldr r1, [r0]
+	str r6, [r2, r3, lsl #2]
+	str r1, [r0, #4]
+	ldr r2, [r0, #4]
+	ldr r1, [r0, #8]
+	cmp r2, r1
+	ldrgt r1, [r0, #4]
+	strgt r1, [r0, #8]
+_02002750:
+	ldr r0, _0200276C ; =_0229AFCC
+	bl sub_0207A0CC
+	mov r0, r5
+	mov r1, r4
+	bl sub_02079A64
+	ldmia sp!, {r4, r5, r6, pc}
+	.align 2, 0
+_02002768: .word _022B966C
+_0200276C: .word _0229AFCC
+_02002770: .word _0229AFC0
+_02002774: .word _0229AFE4
+	arm_func_end sub_020026E4
+
+	arm_func_start sub_02002778
+sub_02002778: ; 0x02002778
+	stmdb sp!, {r4, r5, r6, lr}
+	sub sp, sp, #8
+	mov r4, r0
+	mov ip, r1
+	add r0, r4, #0x1c
+	mov r5, ip
+	str r0, [r4]
+	mov r6, r2
+	ldmia r5!, {r0, r1, r2, r3}
+	add lr, r4, #4
+	stmia lr!, {r0, r1, r2, r3}
+	ldr r0, [r5]
+	mov r2, r6
+	str r0, [lr]
+	str r6, [r4, #0x18]
+	ldr r1, [ip, #8]
+	str r1, [sp]
+	ldr r0, [ip, #0xc]
+	bic r3, r1, #7
+	str r0, [sp, #4]
+	ldmia ip, {r1, lr}
+	ldr r0, [r4]
+	add r3, lr, r3
+	bl StartThread
+	mov r0, r4
+	bl sub_020026E4
+	add sp, sp, #8
+	ldmia sp!, {r4, r5, r6, pc}
+	arm_func_end sub_02002778
+
+	arm_func_start sub_020027E8
+sub_020027E8: ; 0x020027E8
+	ldr ip, _020027F4 ; =sub_02079940
+	ldr r0, [r0]
+	bx ip
+	.align 2, 0
+_020027F4: .word sub_02079940
+	arm_func_end sub_020027E8
+
+	arm_func_start sub_020027F8
+sub_020027F8: ; 0x020027F8
+	stmdb sp!, {r4, r5, r6, lr}
+	mov r6, r0
+	ldr r0, [r6]
+	mov r5, r1
+	bl sub_02079B0C
+	mov r4, r0
+	ldr r0, [r6]
+	mov r1, r5
+	bl sub_02079A64
+	mov r0, r4
+	ldmia sp!, {r4, r5, r6, pc}
+	arm_func_end sub_020027F8
+
+	arm_func_start sub_02002824
+sub_02002824: ; 0x02002824
+	stmdb sp!, {r4, r5, r6, lr}
+	ldr r1, _02002854 ; =_022B966C
+	mov r6, r0
+	ldr r5, [r1, #4]
+	mov r0, r5
+	bl sub_02079B0C
+	mov r4, r0
+	mov r0, r5
+	mov r1, r6
+	bl sub_02079A64
+	mov r0, r4
+	ldmia sp!, {r4, r5, r6, pc}
+	.align 2, 0
+_02002854: .word _022B966C
+	arm_func_end sub_02002824
+
+	arm_func_start sub_02002858
+sub_02002858: ; 0x02002858
+	str r1, [r0, #0x14]
+	bx lr
+	arm_func_end sub_02002858
+
+	arm_func_start sub_02002860
+sub_02002860: ; 0x02002860
+	cmp r0, #0
+	ldrne r1, [r0]
+	cmpne r1, #0
+	ldrne r0, [r0, #0x14]
+	moveq r0, #0
+	bx lr
+	arm_func_end sub_02002860
+
+	arm_func_start sub_02002878
+sub_02002878: ; 0x02002878
+	stmdb sp!, {r4, lr}
+	mov r4, r0
+	bl sub_02002580
+	cmp r0, #0
+	beq _020028A4
+	ldr r0, [r0, #0x14]
+	cmp r0, r4
+	moveq r0, #1
+	movne r0, #0
+	and r0, r0, #0xff
+	ldmia sp!, {r4, pc}
+_020028A4:
+	mov r0, #0
+	ldmia sp!, {r4, pc}
+	arm_func_end sub_02002878
+
+	arm_func_start sub_020028AC
+sub_020028AC: ; 0x020028AC
+	bx lr
+	arm_func_end sub_020028AC
+
+	arm_func_start sub_020028B0
+sub_020028B0: ; 0x020028B0
+	stmdb sp!, {r4, lr}
+	mov r4, r0
+	bl sub_0207A030
+	mov r0, r4
+	bl sub_0207A048
+	bl sub_02002670
+	ldr r0, _020028F4 ; =_0229B0E0
+	ldr r1, [r0]
+	add r1, r1, #1
+	str r1, [r0]
+	ldr r2, [r0]
+	ldr r1, [r0, #4]
+	cmp r2, r1
+	ldrgt r1, [r0]
+	strgt r1, [r0, #4]
+	bl sub_020026B8
+	ldmia sp!, {r4, pc}
+	.align 2, 0
+_020028F4: .word _0229B0E0
+	arm_func_end sub_020028B0
+
+	arm_func_start sub_020028F8
+sub_020028F8: ; 0x020028F8
+	ldr ip, _02002900 ; =sub_0207A0CC
+	bx ip
+	.align 2, 0
+_02002900: .word sub_0207A0CC
+	arm_func_end sub_020028F8
+
+	arm_func_start sub_02002904
+sub_02002904: ; 0x02002904
+	ldr ip, _0200290C ; =sub_0207A048
+	bx ip
+	.align 2, 0
+_0200290C: .word sub_0207A048
+	arm_func_end sub_02002904
+
+	arm_func_start sub_02002910
+sub_02002910: ; 0x02002910
+	stmdb sp!, {r4, lr}
+	mov r4, r0
+	bl sub_0207A164
+	tst r0, #0xff
+	beq _02002944
+	ldr r0, [r4, #0xc]
+	cmp r0, #1
+	movle r0, #1
+	ldmleia sp!, {r4, pc}
+	mov r0, r4
+	bl sub_0207A0CC
+	mov r0, #0
+	ldmia sp!, {r4, pc}
+_02002944:
+	mov r0, #0
+	ldmia sp!, {r4, pc}
+	arm_func_end sub_02002910
+
+	arm_func_start sub_0200294C
+sub_0200294C: ; 0x0200294C
+	bx lr
+	arm_func_end sub_0200294C
+
+	arm_func_start sub_02002950
+sub_02002950: ; 0x02002950
+	stmdb sp!, {r3, lr}
+	mov r3, r0
+	add r1, r3, #4
+	add r0, r3, #8
+	mov r2, #1
+	str r1, [r3]
+	bl sub_02079DB8
+	bl sub_02002670
+	ldr r0, _0200299C ; =_0229B0E8
+	ldr r1, [r0]
+	add r1, r1, #1
+	str r1, [r0]
+	ldr r2, [r0]
+	ldr r1, [r0, #4]
+	cmp r2, r1
+	ldrgt r1, [r0]
+	strgt r1, [r0, #4]
+	bl sub_020026B8
+	ldmia sp!, {r3, pc}
+	.align 2, 0
+_0200299C: .word _0229B0E8
+	arm_func_end sub_02002950
+
+	arm_func_start sub_020029A0
+sub_020029A0: ; 0x020029A0
+	ldr ip, _020029B4 ; =sub_02079DE0
+	mov r1, #0
+	mov r2, r1
+	add r0, r0, #8
+	bx ip
+	.align 2, 0
+_020029B4: .word sub_02079DE0
+	arm_func_end sub_020029A0
+
+	arm_func_start sub_020029B8
+sub_020029B8: ; 0x020029B8
+	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, lr}
+	ldr r1, _02002A40 ; =_022B966C
+	mov r4, r0
+	ldr sb, [r1, #4]
+	mov r7, #0
+	mov r0, sb
+	bl sub_02079B0C
+	mov r8, r0
+	mov r0, sb
+	mov r1, #7
+	bl sub_02079A64
+	mov r5, r7
+	b _020029F0
+_020029EC:
+	add r7, r7, #1
+_020029F0:
+	mov r1, r5
+	mov r2, r5
+	add r0, r4, #8
+	bl sub_02079DE0
+	cmp r0, #0
+	bne _020029EC
+	add r6, sp, #0
+	mov r5, #0
+_02002A10:
+	mov r1, r6
+	mov r2, r5
+	add r0, r4, #8
+	bl sub_02079E74
+	cmp r0, #0
+	subne r7, r7, #1
+	bne _02002A10
+	mov r0, sb
+	mov r1, r8
+	bl sub_02079A64
+	mov r0, r7
+	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, pc}
+	.align 2, 0
+_02002A40: .word _022B966C
+	arm_func_end sub_020029B8
+
+	arm_func_start sub_02002A44
+sub_02002A44: ; 0x02002A44
+	stmdb sp!, {r3, r4, r5, r6, lr}
+	sub sp, sp, #4
+	ldr r1, _02002A94 ; =_022B966C
+	mov r6, r0
+	ldr r5, [r1, #4]
+	mov r0, r5
+	bl sub_02079B0C
+	mov r4, r0
+	mov r0, r5
+	mov r1, #6
+	bl sub_02079A64
+	add r1, sp, #0
+	add r0, r6, #8
+	mov r2, #1
+	bl sub_02079E74
+	mov r0, r5
+	mov r1, r4
+	bl sub_02079A64
+	add sp, sp, #4
+	ldmia sp!, {r3, r4, r5, r6, pc}
+	.align 2, 0
+_02002A94: .word _022B966C
+	arm_func_end sub_02002A44
+
+	arm_func_start sub_02002A98
+sub_02002A98: ; 0x02002A98
+	bx lr
+	arm_func_end sub_02002A98
+
+	arm_func_start sub_02002A9C
+sub_02002A9C: ; 0x02002A9C
+	stmdb sp!, {r4, r5, r6, lr}
+	mov r6, r0
+	str r1, [r6, #0xa4]
+	add r1, r6, #4
+	str r2, [r6, #0xa8]
+	str r1, [r6]
+	ldr r2, [r6, #0xa4]
+	add r0, r6, #0x84
+	bl sub_02079DB8
+	mov r5, #0
+	mov r4, r5
+	b _02002AE0
+_02002ACC:
+	mov r1, r4
+	mov r2, r4
+	add r0, r6, #0x84
+	bl sub_02079DE0
+	add r5, r5, #1
+_02002AE0:
+	ldr r0, [r6, #0xa8]
+	cmp r5, r0
+	blt _02002ACC
+	bl sub_02002670
+	ldr r0, _02002B1C ; =_0229B0F0
+	ldr r1, [r0]
+	add r1, r1, #1
+	str r1, [r0]
+	ldr r2, [r0]
+	ldr r1, [r0, #4]
+	cmp r2, r1
+	ldrgt r1, [r0]
+	strgt r1, [r0, #4]
+	bl sub_020026B8
+	ldmia sp!, {r4, r5, r6, pc}
+	.align 2, 0
+_02002B1C: .word _0229B0F0
+	arm_func_end sub_02002A9C
+
+	arm_func_start sub_02002B20
+sub_02002B20: ; 0x02002B20
+	ldr ip, _02002B34 ; =sub_02079DE0
+	mov r1, #0
+	mov r2, r1
+	add r0, r0, #0x84
+	bx ip
+	.align 2, 0
+_02002B34: .word sub_02079DE0
+	arm_func_end sub_02002B20
+
+	arm_func_start sub_02002B38
+sub_02002B38: ; 0x02002B38
+	ldr ip, _02002B4C ; =sub_02079DE0
+	mov r1, #0
+	mov r2, r1
+	add r0, r0, #0x84
+	bx ip
+	.align 2, 0
+_02002B4C: .word sub_02079DE0
+	arm_func_end sub_02002B38
+
+	arm_func_start sub_02002B50
+sub_02002B50: ; 0x02002B50
+	stmdb sp!, {r3, lr}
+	ldr r1, [r0, #0x98]
+	cmp r1, #0
+	movne r0, #0
+	ldmneia sp!, {r3, pc}
+	mov r1, #0
+	mov r2, r1
+	add r0, r0, #0x84
+	bl sub_02079DE0
+	mov r0, #1
+	ldmia sp!, {r3, pc}
+	arm_func_end sub_02002B50
+
+	arm_func_start sub_02002B7C
+sub_02002B7C: ; 0x02002B7C
+	stmdb sp!, {r3, r4, r5, r6, lr}
+	sub sp, sp, #4
+	ldr r1, _02002BCC ; =_022B966C
+	mov r6, r0
+	ldr r5, [r1, #4]
+	mov r0, r5
+	bl sub_02079B0C
+	mov r4, r0
+	mov r0, r5
+	mov r1, #6
+	bl sub_02079A64
+	add r1, sp, #0
+	add r0, r6, #0x84
+	mov r2, #1
+	bl sub_02079E74
+	mov r0, r5
+	mov r1, r4
+	bl sub_02079A64
+	add sp, sp, #4
+	ldmia sp!, {r3, r4, r5, r6, pc}
+	.align 2, 0
+_02002BCC: .word _022B966C
+	arm_func_end sub_02002B7C
+
+	arm_func_start sub_02002BD0
+sub_02002BD0: ; 0x02002BD0
+	stmdb sp!, {r3, r4, r5, r6, lr}
+	sub sp, sp, #4
+	ldr r1, _02002C28 ; =_022B966C
+	mov r5, r0
+	ldr r6, [r1, #4]
+	mov r0, r6
+	bl sub_02079B0C
+	mov r4, r0
+	mov r0, r6
+	mov r1, #6
+	bl sub_02079A64
+	add r1, sp, #0
+	add r0, r5, #0x84
+	mov r2, #0
+	bl sub_02079E74
+	and r5, r0, #0xff
+	mov r0, r6
+	mov r1, r4
+	bl sub_02079A64
+	mov r0, r5
+	add sp, sp, #4
+	ldmia sp!, {r3, r4, r5, r6, pc}
+	.align 2, 0
+_02002C28: .word _022B966C
+	arm_func_end sub_02002BD0
+
+	arm_func_start sub_02002C2C
+sub_02002C2C: ; 0x02002C2C
+	ldr ip, _02002C38 ; =sub_0207A030
+	ldr r0, _02002C3C ; =_0229B0F8
+	bx ip
+	.align 2, 0
+_02002C38: .word sub_0207A030
+_02002C3C: .word _0229B0F8
+	arm_func_end sub_02002C2C
+
+	arm_func_start sub_02002C40
+sub_02002C40: ; 0x02002C40
+	stmdb sp!, {r4, r5, r6, lr}
+	ldr r1, _02002CA4 ; =_022B966C
+	mov r6, r0
+	ldr r5, [r1, #4]
+	mov r0, r5
+	bl sub_02079B0C
+	mov r4, r0
+	mov r0, r5
+	mov r1, #7
+	bl sub_02079A64
+	ldr r0, _02002CA8 ; =_0229B0F8
+	bl sub_0207A048
+	mov r0, r6
+	bl sub_020028B0
+	bl sub_02002580
+	str r0, [r6, #0x18]
+	mov r0, #0
+	str r0, [r6, #0x20]
+	str r0, [r6, #0x1c]
+	ldr r0, _02002CA8 ; =_0229B0F8
+	bl sub_0207A0CC
+	mov r0, r5
+	mov r1, r4
+	bl sub_02079A64
+	ldmia sp!, {r4, r5, r6, pc}
+	.align 2, 0
+_02002CA4: .word _022B966C
+_02002CA8: .word _0229B0F8
+	arm_func_end sub_02002C40
+
+	arm_func_start sub_02002CAC
+sub_02002CAC: ; 0x02002CAC
+	str r1, [r0, #0x20]
+	bx lr
+	arm_func_end sub_02002CAC
+
+	arm_func_start sub_02002CB4
+sub_02002CB4: ; 0x02002CB4
+	stmdb sp!, {r4, r5, r6, lr}
+	ldr r1, _02002D10 ; =_022B966C
+	mov r6, r0
+	ldr r5, [r1, #4]
+	mov r0, r5
+	bl sub_02079B0C
+	ldr r1, [r6, #0x20]
+	mov r4, r0
+	cmp r1, #0
+	beq _02002CF4
+	cmp r1, r4
+	movhs r4, #0
+	bhs _02002CF8
+	mov r0, r5
+	bl sub_02079A64
+	b _02002CF8
+_02002CF4:
+	mov r4, #0
+_02002CF8:
+	mov r0, r6
+	bl sub_02002904
+	str r4, [r6, #0x1c]
+	bl sub_02002580
+	str r0, [r6, #0x18]
+	ldmia sp!, {r4, r5, r6, pc}
+	.align 2, 0
+_02002D10: .word _022B966C
+	arm_func_end sub_02002CB4
+
+	arm_func_start sub_02002D14
+sub_02002D14: ; 0x02002D14
+	stmdb sp!, {r3, r4, r5, r6, r7, lr}
+	ldr r2, _02002D7C ; =_022B966C
+	mov r7, r0
+	ldr r5, [r2, #4]
+	mov r6, r1
+	mov r0, r5
+	bl sub_02079B0C
+	ldr r1, [r7, #0x20]
+	mov r4, r0
+	cmp r1, #0
+	beq _02002D58
+	cmp r1, r4
+	movhs r4, #0
+	bhs _02002D5C
+	mov r0, r5
+	bl sub_02079A64
+	b _02002D5C
+_02002D58:
+	mov r4, #0
+_02002D5C:
+	mov r0, r6
+	bl sub_02002B7C
+	mov r0, r7
+	bl sub_02002904
+	str r4, [r7, #0x1c]
+	bl sub_02002580
+	str r0, [r7, #0x18]
+	ldmia sp!, {r3, r4, r5, r6, r7, pc}
+	.align 2, 0
+_02002D7C: .word _022B966C
+	arm_func_end sub_02002D14
+
+	arm_func_start sub_02002D80
+sub_02002D80: ; 0x02002D80
+	stmdb sp!, {r3, r4, r5, r6, r7, lr}
+	mov r7, r0
+	mov r6, r1
+	bl sub_02002580
+	mov r4, r0
+	ldr r0, [r4]
+	bl sub_02079B0C
+	ldr r1, [r7, #0x20]
+	mov r5, r0
+	cmp r1, #0
+	beq _02002DC4
+	cmp r1, r5
+	movhs r5, #0
+	bhs _02002DC8
+	ldr r0, [r4]
+	bl sub_02079A64
+	b _02002DC8
+_02002DC4:
+	mov r5, #0
+_02002DC8:
+	mov r0, r6
+	bl sub_02002BD0
+	cmp r0, #0
+	beq _02002DF4
+	mov r0, r7
+	bl sub_02002904
+	str r5, [r7, #0x1c]
+	bl sub_02002580
+	str r0, [r7, #0x18]
+	mov r0, #1
+	ldmia sp!, {r3, r4, r5, r6, r7, pc}
+_02002DF4:
+	cmp r5, #0
+	beq _02002E08
+	mov r0, r4
+	mov r1, r5
+	bl sub_020027F8
+_02002E08:
+	mov r0, #0
+	ldmia sp!, {r3, r4, r5, r6, r7, pc}
+	arm_func_end sub_02002D80
+
+	arm_func_start sub_02002E10
+sub_02002E10: ; 0x02002E10
+	stmdb sp!, {r4, r5, r6, lr}
+	ldr r1, _02002E94 ; =_022B966C
+	mov r6, r0
+	ldr r5, [r1, #4]
+	mov r0, r5
+	bl sub_02079B0C
+	ldr r1, [r6, #0x20]
+	mov r4, r0
+	cmp r1, #0
+	beq _02002E50
+	cmp r1, r4
+	movhs r4, #0
+	bhs _02002E54
+	mov r0, r5
+	bl sub_02079A64
+	b _02002E54
+_02002E50:
+	mov r4, #0
+_02002E54:
+	mov r0, r6
+	bl sub_02002910
+	cmp r0, #0
+	beq _02002E78
+	str r4, [r6, #0x1c]
+	bl sub_02002580
+	str r0, [r6, #0x18]
+	mov r0, #1
+	ldmia sp!, {r4, r5, r6, pc}
+_02002E78:
+	cmp r4, #0
+	beq _02002E8C
+	mov r0, r5
+	mov r1, r4
+	bl sub_02079A64
+_02002E8C:
+	mov r0, #0
+	ldmia sp!, {r4, r5, r6, pc}
+	.align 2, 0
+_02002E94: .word _022B966C
+	arm_func_end sub_02002E10
+
+	arm_func_start sub_02002E98
+sub_02002E98: ; 0x02002E98
+	stmdb sp!, {r3, r4, r5, lr}
+	ldr r4, [r0, #0x1c]
+	ldr r5, [r0, #0x18]
+	mov r1, #0
+	str r1, [r0, #0x1c]
+	str r1, [r0, #0x18]
+	bl sub_020028F8
+	cmp r4, #0
+	ldmeqia sp!, {r3, r4, r5, pc}
+	mov r0, r5
+	mov r1, r4
+	bl sub_020027F8
+	ldmia sp!, {r3, r4, r5, pc}
+	arm_func_end sub_02002E98
+
+	arm_func_start sub_02002ECC
+sub_02002ECC: ; 0x02002ECC
+	stmdb sp!, {r4, r5, r6, lr}
+	ldr r4, [r0, #0x1c]
+	ldr r5, [r0, #0x18]
+	mov r2, #0
+	str r2, [r0, #0x18]
+	mov r6, r1
+	str r2, [r0, #0x1c]
+	bl sub_020028F8
+	mov r0, r6
+	bl sub_02002B20
+	cmp r4, #0
+	ldmeqia sp!, {r4, r5, r6, pc}
+	mov r0, r5
+	mov r1, r4
+	bl sub_020027F8
+	ldmia sp!, {r4, r5, r6, pc}
+	arm_func_end sub_02002ECC
+
+	arm_func_start sub_02002F0C
+sub_02002F0C: ; 0x02002F0C
+	stmdb sp!, {r3, lr}
+	ldr r0, _02002F30 ; =_020AEF58
+	bl sub_02002C40
+	ldr r0, _02002F30 ; =_020AEF58
+	mov r1, #7
+	bl sub_02002CAC
+	ldr r0, _02002F30 ; =_020AEF58
+	bl sub_02002E98
+	ldmia sp!, {r3, pc}
+	.align 2, 0
+_02002F30: .word _020AEF58
+	arm_func_end sub_02002F0C
+
+	arm_func_start sub_02002F34
+sub_02002F34: ; 0x02002F34
+	stmdb sp!, {r3, r4, r5, lr}
+	mov r5, r0
+	ldr r0, _02002F78 ; =_020AEF58
+	mov r4, r1
+	bl sub_02002CB4
+	mov r0, r4, lsl #2
+	mov r1, #1
+	bl MemAlloc
+	str r0, [r5, #0x20]
+	str r4, [r5, #0x24]
+	ldr r1, [r5, #0x20]
+	mov r0, r5
+	mov r2, r4
+	bl sub_02079DB8
+	ldr r0, _02002F78 ; =_020AEF58
+	bl sub_02002E98
+	ldmia sp!, {r3, r4, r5, pc}
+	.align 2, 0
+_02002F78: .word _020AEF58
+	arm_func_end sub_02002F34
+
+	arm_func_start sub_02002F7C
+sub_02002F7C: ; 0x02002F7C
+	stmdb sp!, {r3, lr}
+	cmp r2, #0
+	movne r2, #1
+	moveq r2, #0
+	bl sub_02079DE0
+	and r0, r0, #0xff
+	ldmia sp!, {r3, pc}
+	arm_func_end sub_02002F7C
+
+	arm_func_start sub_02002F98
+sub_02002F98: ; 0x02002F98
+	stmdb sp!, {r3, lr}
+	cmp r2, #0
+	movne r2, #1
+	moveq r2, #0
+	bl sub_02079E74
+	and r0, r0, #0xff
+	ldmia sp!, {r3, pc}
+	arm_func_end sub_02002F98
+
+	arm_func_start sub_02002FB4
+sub_02002FB4: ; 0x02002FB4
+	bx lr
+	arm_func_end sub_02002FB4
+
+	arm_func_start sub_02002FB8
+sub_02002FB8: ; 0x02002FB8
+	stmdb sp!, {r4, r5, r6, lr}
+	ldr r0, _02003024 ; =_0229B110
+	mov r6, #0
+	strh r6, [r0]
+	cmp r6, #6
+	ldr r5, _02003028 ; =_0229B114
+	bge _0200301C
+	mov r4, r6
+	b _02003014
+_02002FDC:
+	mov r0, r5
+	bl sub_02002C40
+	cmp r6, #4
+	str r4, [r5, #0x24]
+	cmpne r6, #5
+	bne _02003000
+	bl OS_GetLockID
+	strh r0, [r5, #0x28]
+	b _02003004
+_02003000:
+	strh r4, [r5, #0x28]
+_02003004:
+	mov r0, r5
+	bl sub_02002E98
+	add r6, r6, #1
+	add r5, r5, #0x2c
+_02003014:
+	cmp r6, #6
+	blt _02002FDC
+_0200301C:
+	bl sub_020059A8
+	ldmia sp!, {r4, r5, r6, pc}
+	.align 2, 0
+_02003024: .word _0229B110
+_02003028: .word _0229B114
+	arm_func_end sub_02002FB8
+
+	arm_func_start sub_0200302C
+sub_0200302C: ; 0x0200302C
+	stmdb sp!, {r4, r5, r6, r7, r8, sb, sl, lr}
+	movs r8, r0
+	ldmeqia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
+	bl sub_02002580
+	mov r7, r0
+	mov r6, #0
+	ldr r5, _020030C4 ; =_0229B114
+	mov r4, #1
+	ldr sl, _020030C8 ; =_0229B110
+	b _020030B8
+_02003054:
+	mov r0, r4, lsl r6
+	mov sb, r0, lsl #0x10
+	tst r8, sb, lsr #16
+	beq _020030B0
+	mov r0, r5
+	bl sub_02002CB4
+	bl InterruptMasterDisable
+	ldrh r0, [sl]
+	ldrh r0, [sl]
+	str r7, [r5, #0x24]
+	orr r0, r0, sb, lsr #16
+	strh r0, [sl]
+	bl InterruptMasterEnable
+	cmp r6, #4
+	beq _0200309C
+	cmp r6, #5
+	beq _020030A8
+	b _020030B0
+_0200309C:
+	ldrh r0, [r5, #0x28]
+	bl sub_02083434
+	b _020030B0
+_020030A8:
+	ldrh r0, [r5, #0x28]
+	bl sub_0208346C
+_020030B0:
+	add r6, r6, #1
+	add r5, r5, #0x2c
+_020030B8:
+	cmp r6, #6
+	blt _02003054
+	ldmia sp!, {r4, r5, r6, r7, r8, sb, sl, pc}
+	.align 2, 0
+_020030C4: .word _0229B114
+_020030C8: .word _0229B110
+	arm_func_end sub_0200302C
+
+	arm_func_start InterruptMasterDisable
+InterruptMasterDisable: ; 0x020030CC
+	ldr r2, _020030E0 ; =0x04000208
+	mov r1, #0
+	ldrh r0, [r2]
+	strh r1, [r2]
+	bx lr
+	.align 2, 0
+_020030E0: .word 0x04000208
+	arm_func_end InterruptMasterDisable
+
+	arm_func_start InterruptMasterEnable
+InterruptMasterEnable: ; 0x020030E4
+	ldr r2, _020030F8 ; =0x04000208
+	mov r1, #1
+	ldrh r0, [r2]
+	strh r1, [r2]
+	bx lr
+	.align 2, 0
+_020030F8: .word 0x04000208
+	arm_func_end InterruptMasterEnable
+
+	arm_func_start sub_020030FC
+sub_020030FC: ; 0x020030FC
+	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
+	movs sl, r0
+	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+	bl sub_02002580
+	mov r1, #7
+	mov r8, r0
+	bl sub_020027F8
+	mov sb, r0
+	mov r7, #0
+	ldr r6, _020031B8 ; =_0229B114
+	mov fp, #1
+	ldr r5, _020031BC ; =_0229B110
+	b _020031A0
+_02003130:
+	mov r0, fp, lsl r7
+	mov r4, r0, lsl #0x10
+	tst sl, r4, lsr #16
+	beq _02003198
+	cmp r7, #4
+	beq _02003154
+	cmp r7, #5
+	beq _02003160
+	b _02003168
+_02003154:
+	ldrh r0, [r6, #0x28]
+	bl sub_02083450
+	b _02003168
+_02003160:
+	ldrh r0, [r6, #0x28]
+	bl sub_0208347C
+_02003168:
+	bl InterruptMasterDisable
+	ldrh r0, [r5]
+	mvn r1, r4, lsr #16
+	ldrh r0, [r5]
+	ldrh r2, [r5]
+	mov r0, #0
+	str r0, [r6, #0x24]
+	and r0, r2, r1
+	strh r0, [r5]
+	bl InterruptMasterEnable
+	mov r0, r6
+	bl sub_02002E98
+_02003198:
+	add r7, r7, #1
+	add r6, r6, #0x2c
+_020031A0:
+	cmp r7, #6
+	blt _02003130
+	mov r0, r8
+	mov r1, sb
+	bl sub_020027F8
+	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+	.align 2, 0
+_020031B8: .word _0229B114
+_020031BC: .word _0229B110
+	arm_func_end sub_020030FC
+
+	arm_func_start sub_020031C0
+sub_020031C0: ; 0x020031C0
+	stmdb sp!, {r3, r4, r5, lr}
+	mov r4, r0
+	bl sub_02002580
+	mov r5, #0
+	mov lr, r5
+	cmp r5, #6
+	ldr ip, _02003218 ; =_0229B114
+	bge _02003210
+	mov r3, #1
+	b _02003208
+_020031E8:
+	mov r1, r3, lsl lr
+	mov r1, r1, lsl #0x10
+	tst r4, r1, lsr #16
+	ldrne r2, [ip, #0x24]
+	add lr, lr, #1
+	cmpne r2, r0
+	orrne r5, r5, r1, lsr #16
+	add ip, ip, #0x2c
+_02003208:
+	cmp lr, #6
+	blt _020031E8
+_02003210:
+	mov r0, r5
+	ldmia sp!, {r3, r4, r5, pc}
+	.align 2, 0
+_02003218: .word _0229B114
+	arm_func_end sub_020031C0
+
+	arm_func_start InitMemAllocTableVeneer
+InitMemAllocTableVeneer: ; 0x0200321C
+	ldr ip, _02003224 ; =InitMemAllocTable
+	bx ip
+	.align 2, 0
+_02003224: .word InitMemAllocTable
+	arm_func_end InitMemAllocTableVeneer
diff --git a/asm/main_020082C4.s b/asm/main_020082C4.s
index 1e58b8cd..36ef6b8a 100644
--- a/asm/main_020082C4.s
+++ b/asm/main_020082C4.s
@@ -676,4198 +676,3 @@ sub_02008BA8: ; 0x02008BA8
 	add sp, sp, #0x40
 	ldmia sp!, {r3, pc}
 	arm_func_end sub_02008BA8
-
-	arm_func_start UnloadFile
-UnloadFile: ; 0x02008BD4
-	stmdb sp!, {r4, lr}
-	mov r4, r0
-	ldr r0, [r4]
-	bl MemFree
-	mov r0, #0
-	str r0, [r4]
-	str r0, [r4, #4]
-	ldmia sp!, {r4, pc}
-	arm_func_end UnloadFile
-
-	arm_func_start sub_02008BF4
-sub_02008BF4: ; 0x02008BF4
-	stmdb sp!, {r3, lr}
-	sub sp, sp, #0x28
-	mov r3, r0
-	mov r2, r1
-	add r0, sp, #0
-	mov r1, r3
-	bl sub_02008CC4
-	add sp, sp, #0x28
-	ldmia sp!, {r3, pc}
-	arm_func_end sub_02008BF4
-
-	arm_func_start sub_02008C18
-sub_02008C18: ; 0x02008C18
-	stmdb sp!, {r3, lr}
-	sub sp, sp, #0x28
-	mov r3, r0
-	mov r2, r1
-	add r0, sp, #0
-	mov r1, r3
-	bl sub_02008D10
-	add sp, sp, #0x28
-	ldmia sp!, {r3, pc}
-	arm_func_end sub_02008C18
-
-	arm_func_start LoadFileFromRom
-LoadFileFromRom: ; 0x02008C3C
-	stmdb sp!, {r3, lr}
-	sub sp, sp, #0x28
-	mov lr, r0
-	mov ip, r1
-	mov r3, r2
-	add r0, sp, #0
-	mov r1, lr
-	mov r2, ip
-	bl sub_02008D60
-	add sp, sp, #0x28
-	ldmia sp!, {r3, pc}
-	arm_func_end LoadFileFromRom
-
-	arm_func_start sub_02008C68
-sub_02008C68: ; 0x02008C68
-	stmdb sp!, {r4, r5, r6, lr}
-	sub sp, sp, #0x100
-	mov r6, r0
-	mov r4, r2
-	mov r5, r1
-	bl sub_0200844C
-	add r0, sp, #0
-	mov r1, r6
-	mov r3, r4
-	mov r2, #6
-	bl sub_02008980
-	mov r0, r5
-	str r5, [sp, #0x10]
-	bl sub_0200846C
-	add r0, sp, #0
-	bl sub_02008A84
-	ldr r0, [r5, #0x14]
-	cmp r0, #0
-	moveq r0, #1
-	movne r0, #0
-	and r0, r0, #0xff
-	add sp, sp, #0x100
-	ldmia sp!, {r4, r5, r6, pc}
-	arm_func_end sub_02008C68
-
-	arm_func_start sub_02008CC4
-sub_02008CC4: ; 0x02008CC4
-	stmdb sp!, {r4, r5, r6, lr}
-	sub sp, sp, #0x100
-	mov r6, r0
-	mov r4, r2
-	mov r5, r1
-	bl sub_0200844C
-	add r0, sp, #0
-	mov r1, r6
-	mov r3, r4
-	mov r2, #8
-	bl sub_02008980
-	mvn r1, #0
-	add r0, sp, #0
-	str r5, [sp, #0xc]
-	str r1, [sp, #0x14]
-	bl sub_02008A84
-	ldr r0, [r6, #0x10]
-	add sp, sp, #0x100
-	ldmia sp!, {r4, r5, r6, pc}
-	arm_func_end sub_02008CC4
-
-	arm_func_start sub_02008D10
-sub_02008D10: ; 0x02008D10
-	stmdb sp!, {r4, r5, r6, lr}
-	sub sp, sp, #0x100
-	mov r6, r0
-	mov r4, r2
-	mov r5, r1
-	bl sub_0200844C
-	add r0, sp, #0
-	mov r1, r6
-	mov r3, r4
-	mov r2, #8
-	bl sub_02008980
-	ldr r1, [r5]
-	add r0, sp, #0
-	str r1, [sp, #0xc]
-	ldr r1, [r5, #4]
-	str r1, [sp, #0x14]
-	bl sub_02008A84
-	ldr r0, [r6, #0x10]
-	add sp, sp, #0x100
-	ldmia sp!, {r4, r5, r6, pc}
-	arm_func_end sub_02008D10
-
-	arm_func_start sub_02008D60
-sub_02008D60: ; 0x02008D60
-	stmdb sp!, {r3, r4, r5, r6, r7, lr}
-	sub sp, sp, #0x100
-	mov r7, r0
-	mov r5, r2
-	mov r6, r1
-	mov r4, r3
-	bl sub_0200844C
-	add r0, sp, #0
-	mov r1, r7
-	mov r3, r5
-	mov r2, #0xa
-	bl sub_02008980
-	add r0, sp, #0
-	str r6, [sp, #0x10]
-	str r4, [sp, #0x24]
-	bl sub_02008A84
-	ldr r0, [r7, #0x10]
-	add sp, sp, #0x100
-	ldmia sp!, {r3, r4, r5, r6, r7, pc}
-	arm_func_end sub_02008D60
-
-	arm_func_start sub_02008DAC
-sub_02008DAC: ; 0x02008DAC
-	stmdb sp!, {r4, lr}
-	ldr r1, _02008EAC ; =_020AF694
-	mov r3, #0xff
-	ldr r0, _02008EB0 ; =GXi_DmaId
-	mov r2, #3
-	strb r3, [r1]
-	str r2, [r0]
-	bl GX_Init
-	ldr r2, _02008EB4 ; =0x04000304
-	ldr r0, _02008EB8 ; =0xFFFFFDF1
-	ldrh r1, [r2]
-	and r0, r1, r0
-	orr r0, r0, #0xe
-	orr r0, r0, #0x200
-	strh r0, [r2]
-	bl G3X_Init
-	bl G3X_ClearFifo
-	bl GX_DispOff
-	ldr r1, _02008EBC ; =0x04001000
-	ldr r0, [r1]
-	bic r0, r0, #0x10000
-	str r0, [r1]
-	bl sub_0200961C
-	ldr r0, _02008EC0 ; =0x000001FF
-	bl GX_SetBankForLCDC
-	mov r0, #0
-	mov r1, #0x6800000
-	mov r2, #0xa4000
-	bl ArrayFill32Fast
-	bl GX_DisableBankForLCDC
-	mov r0, #0xc0
-	mov r1, #0x7000000
-	mov r2, #0x400
-	bl ArrayFill32Fast
-	mov r0, #0
-	mov r1, #0x5000000
-	mov r2, #0x400
-	bl ArrayFill32Fast
-	mov r0, #0xc0
-	ldr r1, _02008EC4 ; =0x07000400
-	mov r2, #0x400
-	bl ArrayFill32Fast
-	mov r0, #0
-	ldr r1, _02008EC8 ; =0x05000400
-	mov r2, #0x400
-	bl ArrayFill32Fast
-	mov r1, #0x100
-	ldr r0, _02008ECC ; =_022A37A0
-	str r1, [r0, #4]
-	str r1, [r0, #8]
-	bl sub_02009648
-	mov r2, #0
-	ldr r0, _02008ECC ; =_022A37A0
-	mov r1, #0x100
-	str r2, [r0]
-	str r1, [r0, #4]
-	str r1, [r0, #8]
-	bl sub_02008F88
-	mov r4, #1
-_02008E98:
-	mov r0, r4
-	bl sub_02082420
-	cmp r0, #0
-	beq _02008E98
-	ldmia sp!, {r4, pc}
-	.align 2, 0
-_02008EAC: .word _020AF694
-_02008EB0: .word GXi_DmaId
-_02008EB4: .word 0x04000304
-_02008EB8: .word 0xFFFFFDF1
-_02008EBC: .word 0x04001000
-_02008EC0: .word 0x000001FF
-_02008EC4: .word 0x07000400
-_02008EC8: .word 0x05000400
-_02008ECC: .word _022A37A0
-	arm_func_end sub_02008DAC
-
-	arm_func_start sub_02008ED0
-sub_02008ED0: ; 0x02008ED0
-	stmdb sp!, {r4, lr}
-	ldr r1, _02008F30 ; =_020AF694
-	mov r4, r0
-	ldrb r1, [r1]
-	cmp r1, r4
-	ldmeqia sp!, {r4, pc}
-	ldr r0, _02008F34 ; =_02092AB8
-	mov r2, r4
-	bl Debug_Print0
-	cmp r4, #0
-	beq _02008F0C
-	cmp r4, #0xff
-	bne _02008F24
-	bl sub_0200961C
-	b _02008F24
-_02008F0C:
-	bl sub_02009648
-	bl GX_DispOn
-	ldr r1, _02008F38 ; =0x04001000
-	ldr r0, [r1]
-	orr r0, r0, #0x10000
-	str r0, [r1]
-_02008F24:
-	ldr r0, _02008F30 ; =_020AF694
-	strb r4, [r0]
-	ldmia sp!, {r4, pc}
-	.align 2, 0
-_02008F30: .word _020AF694
-_02008F34: .word _02092AB8
-_02008F38: .word 0x04001000
-	arm_func_end sub_02008ED0
-
-	arm_func_start sub_02008F3C
-sub_02008F3C: ; 0x02008F3C
-	ldr r2, _02008F48 ; =_022A37A4
-	str r1, [r2, r0, lsl #2]
-	bx lr
-	.align 2, 0
-_02008F48: .word _022A37A4
-	arm_func_end sub_02008F3C
-
-	arm_func_start sub_02008F4C
-sub_02008F4C: ; 0x02008F4C
-	ldr r1, _02008F60 ; =_022A37A4
-	ldr r0, [r1, r0, lsl #2]
-	mov r0, r0, lsl #0x10
-	mov r0, r0, asr #0x10
-	bx lr
-	.align 2, 0
-_02008F60: .word _022A37A4
-	arm_func_end sub_02008F4C
-
-	arm_func_start sub_02008F64
-sub_02008F64: ; 0x02008F64
-	ldr r2, _02008F80 ; =_022A37A0
-	add r0, r1, r0, lsl #2
-	ldr r3, [r2]
-	mov r1, #1
-	orr r0, r3, r1, lsl r0
-	str r0, [r2]
-	bx lr
-	.align 2, 0
-_02008F80: .word _022A37A0
-	arm_func_end sub_02008F64
-
-	arm_func_start sub_02008F84
-sub_02008F84: ; 0x02008F84
-	bx lr
-	arm_func_end sub_02008F84
-
-	arm_func_start sub_02008F88
-sub_02008F88: ; 0x02008F88
-	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
-	mov r0, #0
-	bl sub_02009DCC
-	mov r0, #1
-	bl sub_02009DCC
-	mov r0, #0
-	bl sub_02009D48
-	mov r0, #1
-	bl sub_02009D48
-	mov r0, #0
-	bl sub_02009F9C
-	mov r0, #1
-	bl sub_02009F9C
-	mov r0, #0
-	bl sub_02009E70
-	mov r0, #1
-	bl sub_02009E70
-	ldr r1, _02009080 ; =_022A37A0
-	ldr r0, _02009084 ; =0x0400006C
-	ldr r2, [r1, #4]
-	mov r1, r2, asr #3
-	add r1, r2, r1, lsr #28
-	mov r1, r1, asr #4
-	bl GXx_SetMasterBrightness_
-	ldr r1, _02009080 ; =_022A37A0
-	ldr r0, _02009088 ; =0x0400106C
-	ldr r2, [r1, #8]
-	mov r1, r2, asr #3
-	add r1, r2, r1, lsr #28
-	mov r1, r1, asr #4
-	bl GXx_SetMasterBrightness_
-	ldr r0, _02009080 ; =_022A37A0
-	ldr sb, [r0]
-	cmp sb, #0
-	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-	mov sl, #0
-	ldr r8, _0200908C ; =_02092A18
-	mov fp, #2
-	ldr r7, _02009090 ; =_02092A38
-	ldr r6, _02009094 ; =_02092A58
-	ldr r5, _02009098 ; =_02092A78
-	ldr r4, _0200909C ; =_02092A98
-	b _02009068
-_02009034:
-	tst sb, #1
-	beq _02009060
-	ldr r0, [r8, sl, lsl #2]
-	mov r1, fp
-	bl MemZero16
-	ldr r0, [r7, sl, lsl #2]
-	ldr r1, [r6, sl, lsl #2]
-	bl MemZero32
-	ldr r0, [r5, sl, lsl #2]
-	ldr r1, [r4, sl, lsl #2]
-	bl MemZero32
-_02009060:
-	mov sb, sb, asr #1
-	add sl, sl, #1
-_02009068:
-	cmp sb, #0
-	bne _02009034
-	ldr r0, _02009080 ; =_022A37A0
-	mov r1, #0
-	str r1, [r0]
-	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-	.align 2, 0
-_02009080: .word _022A37A0
-_02009084: .word 0x0400006C
-_02009088: .word 0x0400106C
-_0200908C: .word _02092A18
-_02009090: .word _02092A38
-_02009094: .word _02092A58
-_02009098: .word _02092A78
-_0200909C: .word _02092A98
-	arm_func_end sub_02008F88
-
-	arm_func_start sub_020090A0
-sub_020090A0: ; 0x020090A0
-	mov r3, r1, lsr #0x1f
-	ldr ip, _020090BC ; =_022A37CC
-	rsb r1, r3, r1, lsl #30
-	add r3, r3, r1, ror #30
-	add r1, ip, r2, lsl #4
-	str r3, [r1, r0, lsl #2]
-	bx lr
-	.align 2, 0
-_020090BC: .word _022A37CC
-	arm_func_end sub_020090A0
-
-	arm_func_start sub_020090C0
-sub_020090C0: ; 0x020090C0
-	stmdb sp!, {r4, r5, r6, lr}
-	mov r6, r0
-	mov r5, r1
-	mov r4, #0
-_020090D0:
-	ldrb r1, [r6, r4]
-	mov r0, r4
-	mov r2, r5
-	bl sub_020090A0
-	add r0, r4, #1
-	and r4, r0, #0xff
-	cmp r4, #4
-	blo _020090D0
-	ldmia sp!, {r4, r5, r6, pc}
-	arm_func_end sub_020090C0
-
-	arm_func_start sub_020090F4
-sub_020090F4: ; 0x020090F4
-	ldr r2, _0200911C ; =_022A37CC
-	mov ip, #0
-	add r3, r2, r1, lsl #4
-_02009100:
-	ldr r2, [r3, ip, lsl #2]
-	add r1, ip, #1
-	strb r2, [r0, ip]
-	and ip, r1, #0xff
-	cmp ip, #4
-	blo _02009100
-	bx lr
-	.align 2, 0
-_0200911C: .word _022A37CC
-	arm_func_end sub_020090F4
-
-	arm_func_start sub_02009120
-sub_02009120: ; 0x02009120
-	cmp r0, #0
-	bne _02009150
-	ldr r2, _02009184 ; =_022A37CC
-	mov r3, #1
-	str r3, [r2, r0, lsl #4]
-	ldr r1, _02009188 ; =_022A37D0
-	mov r3, #0
-	str r3, [r1, r0, lsl #4]
-	ldr r2, _0200918C ; =_022A37D4
-	mov r3, #2
-	ldr r1, _02009190 ; =_022A37D8
-	b _02009174
-_02009150:
-	ldr r2, _02009184 ; =_022A37CC
-	mov r3, #0
-	str r3, [r2, r0, lsl #4]
-	ldr r1, _02009188 ; =_022A37D0
-	mov r3, #1
-	str r3, [r1, r0, lsl #4]
-	ldr r2, _0200918C ; =_022A37D4
-	ldr r1, _02009190 ; =_022A37D8
-	mov r3, #2
-_02009174:
-	str r3, [r2, r0, lsl #4]
-	mov r2, #3
-	str r2, [r1, r0, lsl #4]
-	bx lr
-	.align 2, 0
-_02009184: .word _022A37CC
-_02009188: .word _022A37D0
-_0200918C: .word _022A37D4
-_02009190: .word _022A37D8
-	arm_func_end sub_02009120
-
-	arm_func_start sub_02009194
-sub_02009194: ; 0x02009194
-	ldr r2, _020091AC ; =_022A37AC
-	add r1, r1, r1, lsl #2
-	add r1, r2, r1
-	mov r2, #1
-	strb r2, [r0, r1]
-	bx lr
-	.align 2, 0
-_020091AC: .word _022A37AC
-	arm_func_end sub_02009194
-
-	arm_func_start sub_020091B0
-sub_020091B0: ; 0x020091B0
-	ldr r2, _020091C8 ; =_022A37AC
-	add r1, r1, r1, lsl #2
-	add r1, r2, r1
-	mov r2, #0
-	strb r2, [r0, r1]
-	bx lr
-	.align 2, 0
-_020091C8: .word _022A37AC
-	arm_func_end sub_020091B0
-
-	arm_func_start sub_020091CC
-sub_020091CC: ; 0x020091CC
-	ldr r1, _020091F4 ; =_022A37AC
-	add r0, r0, r0, lsl #2
-	add r2, r1, r0
-	mov r1, #0
-	mov r0, r1
-_020091E0:
-	strb r0, [r2, r1]
-	add r1, r1, #1
-	cmp r1, #5
-	blt _020091E0
-	bx lr
-	.align 2, 0
-_020091F4: .word _022A37AC
-	arm_func_end sub_020091CC
-
-	arm_func_start sub_020091F8
-sub_020091F8: ; 0x020091F8
-	stmdb sp!, {r3, lr}
-	mov ip, #0x1b
-	mul lr, r3, ip
-	ldr ip, _02009220 ; =_022A37EC
-	ldr r3, _02009224 ; =_022A37ED
-	strb r0, [ip, lr]
-	ldr r0, _02009228 ; =_022A37EE
-	strb r1, [r3, lr]
-	strb r2, [r0, lr]
-	ldmia sp!, {r3, pc}
-	.align 2, 0
-_02009220: .word _022A37EC
-_02009224: .word _022A37ED
-_02009228: .word _022A37EE
-	arm_func_end sub_020091F8
-
-	arm_func_start sub_0200922C
-sub_0200922C: ; 0x0200922C
-	stmdb sp!, {r4, lr}
-	ldrb r4, [sp, #0x10]
-	mov ip, #0x1b
-	ldr lr, _02009278 ; =_022A37F3
-	smulbb r4, r4, ip
-	ldr ip, _0200927C ; =_022A37F4
-	strb r0, [lr, r4]
-	ldr lr, _02009280 ; =_022A37F5
-	strb r1, [ip, r4]
-	ldrb ip, [sp, #8]
-	ldr r0, _02009284 ; =_022A37F6
-	strb r2, [lr, r4]
-	ldrb r1, [sp, #0xc]
-	ldr r2, _02009288 ; =_022A37F7
-	strb r3, [r0, r4]
-	ldr r0, _0200928C ; =_022A37EF
-	strb ip, [r2, r4]
-	strb r1, [r0, r4]
-	ldmia sp!, {r4, pc}
-	.align 2, 0
-_02009278: .word _022A37F3
-_0200927C: .word _022A37F4
-_02009280: .word _022A37F5
-_02009284: .word _022A37F6
-_02009288: .word _022A37F7
-_0200928C: .word _022A37EF
-	arm_func_end sub_0200922C
-
-	arm_func_start sub_02009290
-sub_02009290: ; 0x02009290
-	stmdb sp!, {r4, lr}
-	ldrb r4, [sp, #0x10]
-	mov ip, #0x1b
-	ldr lr, _020092DC ; =_022A37F8
-	smulbb r4, r4, ip
-	ldr ip, _020092E0 ; =_022A37F9
-	strb r0, [lr, r4]
-	ldr lr, _020092E4 ; =_022A37FA
-	strb r1, [ip, r4]
-	ldrb ip, [sp, #8]
-	ldr r0, _020092E8 ; =_022A37FB
-	strb r2, [lr, r4]
-	ldrb r1, [sp, #0xc]
-	ldr r2, _020092EC ; =_022A37FC
-	strb r3, [r0, r4]
-	ldr r0, _020092F0 ; =_022A37F0
-	strb ip, [r2, r4]
-	strb r1, [r0, r4]
-	ldmia sp!, {r4, pc}
-	.align 2, 0
-_020092DC: .word _022A37F8
-_020092E0: .word _022A37F9
-_020092E4: .word _022A37FA
-_020092E8: .word _022A37FB
-_020092EC: .word _022A37FC
-_020092F0: .word _022A37F0
-	arm_func_end sub_02009290
-
-	arm_func_start sub_020092F4
-sub_020092F4: ; 0x020092F4
-	stmdb sp!, {r4, lr}
-	ldrb r4, [sp, #0x10]
-	mov ip, #0x1b
-	ldr lr, _02009340 ; =_022A3802
-	smulbb r4, r4, ip
-	ldr ip, _02009344 ; =_022A3803
-	strb r0, [lr, r4]
-	ldr lr, _02009348 ; =_022A3804
-	strb r1, [ip, r4]
-	ldrb ip, [sp, #8]
-	ldr r0, _0200934C ; =_022A3805
-	strb r2, [lr, r4]
-	ldrb r1, [sp, #0xc]
-	ldr r2, _02009350 ; =_022A3806
-	strb r3, [r0, r4]
-	ldr r0, _02009354 ; =_022A37EF
-	strb ip, [r2, r4]
-	strb r1, [r0, r4]
-	ldmia sp!, {r4, pc}
-	.align 2, 0
-_02009340: .word _022A3802
-_02009344: .word _022A3803
-_02009348: .word _022A3804
-_0200934C: .word _022A3805
-_02009350: .word _022A3806
-_02009354: .word _022A37EF
-	arm_func_end sub_020092F4
-
-	arm_func_start sub_02009358
-sub_02009358: ; 0x02009358
-	stmdb sp!, {r4, lr}
-	ldrb r4, [sp, #0x10]
-	mov ip, #0x1b
-	ldr lr, _020093A4 ; =_022A37FD
-	smulbb r4, r4, ip
-	ldr ip, _020093A8 ; =_022A37FE
-	strb r0, [lr, r4]
-	ldr lr, _020093AC ; =_022A37FF
-	strb r1, [ip, r4]
-	ldrb ip, [sp, #8]
-	ldr r0, _020093B0 ; =_022A3800
-	strb r2, [lr, r4]
-	ldrb r1, [sp, #0xc]
-	ldr r2, _020093B4 ; =_022A3801
-	strb r3, [r0, r4]
-	ldr r0, _020093B8 ; =_022A37F1
-	strb ip, [r2, r4]
-	strb r1, [r0, r4]
-	ldmia sp!, {r4, pc}
-	.align 2, 0
-_020093A4: .word _022A37FD
-_020093A8: .word _022A37FE
-_020093AC: .word _022A37FF
-_020093B0: .word _022A3800
-_020093B4: .word _022A3801
-_020093B8: .word _022A37F1
-	arm_func_end sub_02009358
-
-	arm_func_start sub_020093BC
-sub_020093BC: ; 0x020093BC
-	stmdb sp!, {r3, r4, lr}
-	sub sp, sp, #0xc
-	mov r4, r0
-	mov r0, #0
-	mov r1, r0
-	mov r2, r0
-	mov r3, r4
-	bl sub_020091F8
-	mov r0, #0
-	str r0, [sp]
-	mov r1, r0
-	mov r2, r0
-	mov r3, r0
-	stmib sp, {r0, r4}
-	bl sub_0200922C
-	mov r0, #0
-	str r0, [sp]
-	mov r1, r0
-	mov r2, r0
-	mov r3, r0
-	stmib sp, {r0, r4}
-	bl sub_02009290
-	mov r0, #0
-	str r0, [sp]
-	stmib sp, {r0, r4}
-	mov r1, r0
-	mov r2, r0
-	mov r3, r0
-	bl sub_020092F4
-	mov r0, #0
-	str r0, [sp]
-	mov r1, r0
-	mov r2, r0
-	mov r3, r0
-	stmib sp, {r0, r4}
-	bl sub_02009358
-	add sp, sp, #0xc
-	ldmia sp!, {r3, r4, pc}
-	arm_func_end sub_020093BC
-
-	arm_func_start sub_02009454
-sub_02009454: ; 0x02009454
-	ldr ip, _02009468 ; =_022A37B6
-	mov r3, #0xa
-	mla r3, r2, r3, ip
-	strb r1, [r0, r3]
-	bx lr
-	.align 2, 0
-_02009468: .word _022A37B6
-	arm_func_end sub_02009454
-
-	arm_func_start sub_0200946C
-sub_0200946C: ; 0x0200946C
-	ldr r3, _02009494 ; =_022A37B6
-	mov r2, #0xa
-	mla r3, r1, r2, r3
-	mov r2, #0
-_0200947C:
-	ldrb r1, [r0, r2]
-	strb r1, [r3, r2]
-	add r2, r2, #1
-	cmp r2, #5
-	blt _0200947C
-	bx lr
-	.align 2, 0
-_02009494: .word _022A37B6
-	arm_func_end sub_0200946C
-
-	arm_func_start sub_02009498
-sub_02009498: ; 0x02009498
-	ldr r3, _020094C0 ; =_022A37B6
-	mov r2, #0xa
-	mla r3, r1, r2, r3
-	mov r2, #0
-_020094A8:
-	ldrb r1, [r3, r2]
-	strb r1, [r0, r2]
-	add r2, r2, #1
-	cmp r2, #5
-	blt _020094A8
-	bx lr
-	.align 2, 0
-_020094C0: .word _022A37B6
-	arm_func_end sub_02009498
-
-	arm_func_start sub_020094C4
-sub_020094C4: ; 0x020094C4
-	mov r3, #0xa
-	mul ip, r2, r3
-	ldr r3, _020094E0 ; =_022A37BC
-	ldr r2, _020094E4 ; =_022A37BE
-	strh r0, [r3, ip]
-	strh r1, [r2, ip]
-	bx lr
-	.align 2, 0
-_020094E0: .word _022A37BC
-_020094E4: .word _022A37BE
-	arm_func_end sub_020094C4
-
-	arm_func_start sub_020094E8
-sub_020094E8: ; 0x020094E8
-	mov r3, #0xa
-	mul ip, r2, r3
-	ldr r3, _0200950C ; =_022A37BC
-	ldr r2, _02009510 ; =_022A37BE
-	ldrsh r3, [r3, ip]
-	strh r3, [r0]
-	ldrsh r0, [r2, ip]
-	strh r0, [r1]
-	bx lr
-	.align 2, 0
-_0200950C: .word _022A37BC
-_02009510: .word _022A37BE
-	arm_func_end sub_020094E8
-
-	arm_func_start sub_02009514
-sub_02009514: ; 0x02009514
-	stmdb sp!, {r4, lr}
-	mov r4, r0
-	mov r0, #0x40
-	mov r1, r0
-	mov r2, r4
-	bl sub_020094C4
-	mov r0, #0xa
-	mul r3, r4, r0
-	cmp r4, #0
-	bne _02009568
-	ldr r0, _02009598 ; =_022A37B6
-	mov r2, #1
-	strb r2, [r0, r3]
-	ldr r1, _0200959C ; =_022A37B7
-	mov r2, #2
-	strb r2, [r1, r3]
-	ldr r0, _020095A0 ; =_022A37B8
-	ldr r1, _020095A4 ; =_022A37B9
-	strb r2, [r0, r3]
-	ldr r0, _020095A8 ; =_022A37BA
-	b _0200958C
-_02009568:
-	ldr r0, _02009598 ; =_022A37B6
-	mov r2, #2
-	strb r2, [r0, r3]
-	ldr r1, _0200959C ; =_022A37B7
-	ldr r0, _020095A0 ; =_022A37B8
-	strb r2, [r1, r3]
-	strb r2, [r0, r3]
-	ldr r1, _020095A4 ; =_022A37B9
-	ldr r0, _020095A8 ; =_022A37BA
-_0200958C:
-	strb r2, [r1, r3]
-	strb r2, [r0, r3]
-	ldmia sp!, {r4, pc}
-	.align 2, 0
-_02009598: .word _022A37B6
-_0200959C: .word _022A37B7
-_020095A0: .word _022A37B8
-_020095A4: .word _022A37B9
-_020095A8: .word _022A37BA
-	arm_func_end sub_02009514
-
-	arm_func_start sub_020095AC
-sub_020095AC: ; 0x020095AC
-	ldr r2, _020095C4 ; =0x04001008
-	ldrh r1, [r2]
-	bic r1, r1, #3
-	orr r0, r1, r0
-	strh r0, [r2]
-	bx lr
-	.align 2, 0
-_020095C4: .word 0x04001008
-	arm_func_end sub_020095AC
-
-	arm_func_start sub_020095C8
-sub_020095C8: ; 0x020095C8
-	ldr r2, _020095E0 ; =0x0400100A
-	ldrh r1, [r2]
-	bic r1, r1, #3
-	orr r0, r1, r0
-	strh r0, [r2]
-	bx lr
-	.align 2, 0
-_020095E0: .word 0x0400100A
-	arm_func_end sub_020095C8
-
-	arm_func_start sub_020095E4
-sub_020095E4: ; 0x020095E4
-	ldr r2, _020095FC ; =0x0400100C
-	ldrh r1, [r2]
-	bic r1, r1, #3
-	orr r0, r1, r0
-	strh r0, [r2]
-	bx lr
-	.align 2, 0
-_020095FC: .word 0x0400100C
-	arm_func_end sub_020095E4
-
-	arm_func_start sub_02009600
-sub_02009600: ; 0x02009600
-	ldr r2, _02009618 ; =0x0400100E
-	ldrh r1, [r2]
-	bic r1, r1, #3
-	orr r0, r1, r0
-	strh r0, [r2]
-	bx lr
-	.align 2, 0
-_02009618: .word 0x0400100E
-	arm_func_end sub_02009600
-
-	arm_func_start sub_0200961C
-sub_0200961C: ; 0x0200961C
-	stmdb sp!, {r3, lr}
-	bl GX_DisableBankForBG
-	bl GX_DisableBankForOBJ
-	bl GX_DisableBankForBGExtPltt
-	bl GX_DisableBankForOBJExtPltt
-	bl GX_DisableBankForTex
-	bl GX_DisableBankForTexPltt
-	bl GX_DisableBankForSubBG
-	bl GX_DisableBankForSubOBJ
-	bl GX_DisableBankForSubBGExtPltt
-	ldmia sp!, {r3, pc}
-	arm_func_end sub_0200961C
-
-	arm_func_start sub_02009648
-sub_02009648: ; 0x02009648
-	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
-	sub sp, sp, #0xc
-	mov r0, #1
-	bl GX_SetBankForBG
-	mov r0, #2
-	bl GX_SetBankForOBJ
-	mov r0, #0x10
-	bl GX_SetBankForBGExtPltt
-	mov r0, #0x40
-	bl GX_SetBankForOBJExtPltt
-	mov r0, #8
-	bl GX_SetBankForTex
-	mov r0, #0x20
-	bl GX_SetBankForTexPltt
-	mov r0, #1
-	mov r1, #0
-	mov r2, r0
-	bl GX_SetGraphicsMode
-	mov r2, #0x4000000
-	ldr r1, [r2]
-	ldr r0, _02009B78 ; =0x00005C10
-	bic r1, r1, #0x1f00
-	orr r1, r1, #0x1f00
-	str r1, [r2]
-	add r3, r0, #0x208
-	ldr r1, [r2]
-	mov r0, #0x1c
-	bic r1, r1, #0x38000000
-	str r1, [r2]
-	ldr r4, [r2]
-	mov r1, #0
-	bic r4, r4, #0x7000000
-	str r4, [r2]
-	ldrh r4, [r2, #0xa]
-	and r4, r4, #0x43
-	orr r4, r4, #0x1b80
-	strh r4, [r2, #0xa]
-	ldrh r4, [r2, #0xc]
-	and r4, r4, #0x43
-	orr r4, r4, #0xc10
-	orr r4, r4, #0x5000
-	strh r4, [r2, #0xc]
-	ldrh r4, [r2, #0xe]
-	and r4, r4, #0x43
-	orr r3, r4, r3
-	strh r3, [r2, #0xe]
-	ldr r3, [r2]
-	bic r3, r3, #0xe000
-	str r3, [r2]
-	ldr r3, [r2]
-	bic r3, r3, #0x800000
-	str r3, [r2]
-	bl sub_02009B98
-	mov r0, #0x1c
-	mov r1, #0
-	bl sub_02009BC0
-	mov r0, #0
-	mov r1, r0
-	bl sub_02009BE8
-	mov r0, #0xc
-	mov r1, #0
-	bl sub_02009C10
-	mov r3, #8
-	str r3, [sp]
-	ldr r0, _02009B7C ; =0x04000050
-	mov r1, #1
-	mov r2, #0x3e
-	bl G2x_SetBlendAlpha_
-	ldr ip, _02009B80 ; =0x04000040
-	mov lr, #0
-	strh lr, [ip]
-	strh lr, [ip, #4]
-	strh lr, [ip, #2]
-	strh lr, [ip, #6]
-	sub r4, ip, #0x36
-	ldrh r0, [r4]
-	sub r3, ip, #0x38
-	sub r2, ip, #0x34
-	bic r0, r0, #3
-	strh r0, [r4]
-	ldrh r0, [r3]
-	sub r1, ip, #0x32
-	mov r6, #0x4000000
-	bic r0, r0, #3
-	orr r0, r0, #1
-	strh r0, [r3]
-	ldrh r7, [r2]
-	ldr r5, _02009B84 ; =0xFFCFFFEF
-	mov r0, #4
-	bic r7, r7, #3
-	orr r7, r7, #2
-	strh r7, [r2]
-	ldrh r7, [r1]
-	bic r7, r7, #3
-	orr r7, r7, #3
-	strh r7, [r1]
-	str lr, [ip, #-0x2c]
-	str lr, [ip, #-0x28]
-	str lr, [ip, #-0x24]
-	ldrh r7, [r3]
-	bic r7, r7, #0x40
-	strh r7, [r3]
-	ldrh r3, [r4]
-	bic r3, r3, #0x40
-	strh r3, [r4]
-	ldrh r3, [r2]
-	bic r3, r3, #0x40
-	strh r3, [r2]
-	ldrh r2, [r1]
-	bic r2, r2, #0x40
-	strh r2, [r1]
-	ldr r1, [r6]
-	and r1, r1, r5
-	orr r1, r1, #0x10
-	orr r1, r1, #0x200000
-	str r1, [r6]
-	bl GX_SetBankForSubBG
-	mov r0, #0x100
-	bl GX_SetBankForSubOBJ
-	mov r0, #0x80
-	bl GX_SetBankForSubBGExtPltt
-	mov r0, #0
-	bl GXS_SetGraphicsMode
-	ldr r2, _02009B88 ; =0x04001000
-	ldr r0, [r2]
-	bic r0, r0, #0x1f00
-	orr r0, r0, #0x1f00
-	str r0, [r2]
-	ldrh r0, [r2, #8]
-	and r0, r0, #0x43
-	orr r0, r0, #0x1a80
-	strh r0, [r2, #8]
-	ldrh r3, [r2, #0xa]
-	ldr r1, _02009B78 ; =0x00005C10
-	mov r0, #0x1e
-	and r3, r3, #0x43
-	orr r3, r3, #0x38c
-	orr r3, r3, #0x1800
-	strh r3, [r2, #0xa]
-	ldrh r4, [r2, #0xc]
-	add r3, r1, #0x208
-	mov r1, #1
-	and r4, r4, #0x43
-	orr r4, r4, #0xc10
-	orr r4, r4, #0x5000
-	strh r4, [r2, #0xc]
-	ldrh r4, [r2, #0xe]
-	and r4, r4, #0x43
-	orr r3, r4, r3
-	strh r3, [r2, #0xe]
-	ldr r3, [r2]
-	bic r3, r3, #0xe000
-	str r3, [r2]
-	ldr r3, [r2]
-	orr r3, r3, #0x800000
-	str r3, [r2]
-	bl sub_02009CA8
-	mov r0, #0x1e
-	mov r1, #1
-	bl sub_02009CD0
-	mov r0, #0
-	mov r1, r0
-	bl sub_02009CF8
-	mov r0, #0x1e
-	mov r1, #1
-	bl sub_02009D20
-	ldr ip, _02009B8C ; =0x04001050
-	mov r1, #0
-	strh r1, [ip]
-	strh r1, [ip, #-0x10]
-	strh r1, [ip, #-0xc]
-	strh r1, [ip, #-0xe]
-	strh r1, [ip, #-0xa]
-	sub r3, ip, #0x48
-	ldrh r4, [r3]
-	sub r0, ip, #0x46
-	sub r2, ip, #0x44
-	bic r4, r4, #3
-	strh r4, [r3]
-	ldrh r5, [r0]
-	sub r4, ip, #0x42
-	bic r5, r5, #3
-	orr r5, r5, #1
-	strh r5, [r0]
-	ldrh r5, [r2]
-	bic r5, r5, #3
-	orr r5, r5, #2
-	strh r5, [r2]
-	ldrh r5, [r4]
-	bic r5, r5, #3
-	orr r5, r5, #3
-	strh r5, [r4]
-	str r1, [ip, #-0x40]
-	str r1, [ip, #-0x3c]
-	str r1, [ip, #-0x38]
-	str r1, [ip, #-0x34]
-	ldrh r5, [r3]
-	ldr r6, _02009B90 ; =0xFFFFCFFD
-	ldr lr, _02009B94 ; =0x04000304
-	bic r5, r5, #0x40
-	strh r5, [r3]
-	ldrh r3, [r0]
-	sub r7, ip, #0x50
-	ldr r5, _02009B84 ; =0xFFCFFFEF
-	bic r3, r3, #0x40
-	strh r3, [r0]
-	ldrh r3, [r2]
-	sub ip, lr, #0x2a4
-	mov r0, r6, lsr #0x16
-	bic r3, r3, #0x40
-	strh r3, [r2]
-	ldrh r8, [r4]
-	mov r2, r6, lsr #0x11
-	mov r3, #0x3f
-	bic r8, r8, #0x40
-	strh r8, [r4]
-	ldr r4, [r7]
-	and r4, r4, r5
-	orr r4, r4, #0x10
-	orr r4, r4, #0x200000
-	str r4, [r7]
-	ldrh r4, [lr]
-	bic r4, r4, #0x8000
-	strh r4, [lr]
-	ldrh r4, [ip]
-	and r4, r4, r6
-	strh r4, [ip]
-	ldrh r4, [ip]
-	bic r4, r4, #0x3000
-	orr r4, r4, #0x10
-	strh r4, [ip]
-	ldrh r4, [ip]
-	bic r4, r4, #0x3000
-	orr r4, r4, #8
-	strh r4, [ip]
-	ldrh r4, [ip]
-	bic r4, r4, #0x3000
-	orr r4, r4, #4
-	strh r4, [ip]
-	strh r1, [lr, #0x3c]
-	str r1, [sp]
-	bl G3X_SetClearColor
-	mov r0, #0
-	bl sub_02009120
-	mov r0, #1
-	bl sub_02009120
-	mov r0, #0
-	bl sub_020091CC
-	mov r0, #1
-	bl sub_020091CC
-	mov r0, #0
-	bl sub_02009514
-	mov r0, #1
-	bl sub_02009514
-	mov r0, #0
-	mov r1, r0
-	mov r2, r0
-	mov r3, r0
-	bl sub_020091F8
-	mov r0, #0
-	str r0, [sp]
-	str r0, [sp, #4]
-	mov r1, r0
-	mov r2, r0
-	mov r3, r0
-	str r0, [sp, #8]
-	bl sub_0200922C
-	mov r0, #0
-	str r0, [sp]
-	str r0, [sp, #4]
-	mov r1, r0
-	mov r2, r0
-	mov r3, r0
-	str r0, [sp, #8]
-	bl sub_02009290
-	mov r0, #0
-	str r0, [sp]
-	str r0, [sp, #4]
-	mov r1, r0
-	str r0, [sp, #8]
-	mov r2, r0
-	mov r3, r0
-	bl sub_020092F4
-	mov r0, #0
-	str r0, [sp]
-	str r0, [sp, #4]
-	str r0, [sp, #8]
-	mov r1, r0
-	mov r2, r0
-	mov r3, r0
-	bl sub_02009358
-	mov r0, #0
-	mov r1, r0
-	mov r2, r0
-	mov r3, #1
-	bl sub_020091F8
-	mov r0, #0
-	str r0, [sp]
-	str r0, [sp, #4]
-	mov r1, #1
-	str r1, [sp, #8]
-	mov r1, r0
-	mov r2, r0
-	mov r3, r0
-	bl sub_0200922C
-	mov r0, #0
-	str r0, [sp]
-	str r0, [sp, #4]
-	mov r1, #1
-	str r1, [sp, #8]
-	mov r1, r0
-	mov r2, r0
-	mov r3, r0
-	bl sub_02009290
-	mov r0, #0
-	str r0, [sp]
-	mov r1, r0
-	mov r2, r0
-	mov r3, r0
-	str r0, [sp, #4]
-	mov r4, #1
-	str r4, [sp, #8]
-	bl sub_020092F4
-	mov r0, #0
-	str r0, [sp]
-	mov r1, r0
-	mov r2, r0
-	mov r3, r0
-	stmib sp, {r0, r4}
-	bl sub_02009358
-	add sp, sp, #0xc
-	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
-	.align 2, 0
-_02009B78: .word 0x00005C10
-_02009B7C: .word 0x04000050
-_02009B80: .word 0x04000040
-_02009B84: .word 0xFFCFFFEF
-_02009B88: .word 0x04001000
-_02009B8C: .word 0x04001050
-_02009B90: .word 0xFFFFCFFD
-_02009B94: .word 0x04000304
-	arm_func_end sub_02009648
-
-	arm_func_start sub_02009B98
-sub_02009B98: ; 0x02009B98
-	ldr r2, _02009BBC ; =0x04000048
-	cmp r1, #0
-	ldrh r1, [r2]
-	bic r1, r1, #0x3f
-	orr r1, r1, r0
-	ldr r0, _02009BBC ; =0x04000048
-	orrne r1, r1, #0x20
-	strh r1, [r0]
-	bx lr
-	.align 2, 0
-_02009BBC: .word 0x04000048
-	arm_func_end sub_02009B98
-
-	arm_func_start sub_02009BC0
-sub_02009BC0: ; 0x02009BC0
-	ldr r2, _02009BE4 ; =0x04000048
-	cmp r1, #0
-	ldrh r1, [r2]
-	bic r1, r1, #0x3f00
-	orr r1, r1, r0, lsl #8
-	ldr r0, _02009BE4 ; =0x04000048
-	orrne r1, r1, #0x2000
-	strh r1, [r0]
-	bx lr
-	.align 2, 0
-_02009BE4: .word 0x04000048
-	arm_func_end sub_02009BC0
-
-	arm_func_start sub_02009BE8
-sub_02009BE8: ; 0x02009BE8
-	ldr r2, _02009C0C ; =0x0400004A
-	cmp r1, #0
-	ldrh r1, [r2]
-	bic r1, r1, #0x3f00
-	orr r1, r1, r0, lsl #8
-	ldr r0, _02009C0C ; =0x0400004A
-	orrne r1, r1, #0x2000
-	strh r1, [r0]
-	bx lr
-	.align 2, 0
-_02009C0C: .word 0x0400004A
-	arm_func_end sub_02009BE8
-
-	arm_func_start sub_02009C10
-sub_02009C10: ; 0x02009C10
-	ldr r2, _02009C34 ; =0x0400004A
-	cmp r1, #0
-	ldrh r1, [r2]
-	bic r1, r1, #0x3f
-	orr r1, r1, r0
-	ldr r0, _02009C34 ; =0x0400004A
-	orrne r1, r1, #0x20
-	strh r1, [r0]
-	bx lr
-	.align 2, 0
-_02009C34: .word 0x0400004A
-	arm_func_end sub_02009C10
-
-	arm_func_start sub_02009C38
-sub_02009C38: ; 0x02009C38
-	ldr r2, _02009C50 ; =0x0400000A
-	ldrh r1, [r2]
-	bic r1, r1, #3
-	orr r0, r1, r0
-	strh r0, [r2]
-	bx lr
-	.align 2, 0
-_02009C50: .word 0x0400000A
-	arm_func_end sub_02009C38
-
-	arm_func_start sub_02009C54
-sub_02009C54: ; 0x02009C54
-	ldr r2, _02009C6C ; =0x04000008
-	ldrh r1, [r2]
-	bic r1, r1, #3
-	orr r0, r1, r0
-	strh r0, [r2]
-	bx lr
-	.align 2, 0
-_02009C6C: .word 0x04000008
-	arm_func_end sub_02009C54
-
-	arm_func_start sub_02009C70
-sub_02009C70: ; 0x02009C70
-	ldr r2, _02009C88 ; =0x0400000C
-	ldrh r1, [r2]
-	bic r1, r1, #3
-	orr r0, r1, r0
-	strh r0, [r2]
-	bx lr
-	.align 2, 0
-_02009C88: .word 0x0400000C
-	arm_func_end sub_02009C70
-
-	arm_func_start sub_02009C8C
-sub_02009C8C: ; 0x02009C8C
-	ldr r2, _02009CA4 ; =0x0400000E
-	ldrh r1, [r2]
-	bic r1, r1, #3
-	orr r0, r1, r0
-	strh r0, [r2]
-	bx lr
-	.align 2, 0
-_02009CA4: .word 0x0400000E
-	arm_func_end sub_02009C8C
-
-	arm_func_start sub_02009CA8
-sub_02009CA8: ; 0x02009CA8
-	ldr r2, _02009CCC ; =0x04001048
-	cmp r1, #0
-	ldrh r1, [r2]
-	bic r1, r1, #0x3f
-	orr r1, r1, r0
-	ldr r0, _02009CCC ; =0x04001048
-	orrne r1, r1, #0x20
-	strh r1, [r0]
-	bx lr
-	.align 2, 0
-_02009CCC: .word 0x04001048
-	arm_func_end sub_02009CA8
-
-	arm_func_start sub_02009CD0
-sub_02009CD0: ; 0x02009CD0
-	ldr r2, _02009CF4 ; =0x04001048
-	cmp r1, #0
-	ldrh r1, [r2]
-	bic r1, r1, #0x3f00
-	orr r1, r1, r0, lsl #8
-	ldr r0, _02009CF4 ; =0x04001048
-	orrne r1, r1, #0x2000
-	strh r1, [r0]
-	bx lr
-	.align 2, 0
-_02009CF4: .word 0x04001048
-	arm_func_end sub_02009CD0
-
-	arm_func_start sub_02009CF8
-sub_02009CF8: ; 0x02009CF8
-	ldr r2, _02009D1C ; =0x0400104A
-	cmp r1, #0
-	ldrh r1, [r2]
-	bic r1, r1, #0x3f00
-	orr r1, r1, r0, lsl #8
-	ldr r0, _02009D1C ; =0x0400104A
-	orrne r1, r1, #0x2000
-	strh r1, [r0]
-	bx lr
-	.align 2, 0
-_02009D1C: .word 0x0400104A
-	arm_func_end sub_02009CF8
-
-	arm_func_start sub_02009D20
-sub_02009D20: ; 0x02009D20
-	ldr r2, _02009D44 ; =0x0400104A
-	cmp r1, #0
-	ldrh r1, [r2]
-	bic r1, r1, #0x3f
-	orr r1, r1, r0
-	ldr r0, _02009D44 ; =0x0400104A
-	orrne r1, r1, #0x20
-	strh r1, [r0]
-	bx lr
-	.align 2, 0
-_02009D44: .word 0x0400104A
-	arm_func_end sub_02009D20
-
-	arm_func_start sub_02009D48
-sub_02009D48: ; 0x02009D48
-	stmdb sp!, {r4, lr}
-	movs r4, r0
-	bne _02009D88
-	ldr r0, _02009DBC ; =_022A37CC
-	ldr r0, [r0, r4, lsl #4]
-	bl sub_02009C54
-	ldr r0, _02009DC0 ; =_022A37D0
-	ldr r0, [r0, r4, lsl #4]
-	bl sub_02009C38
-	ldr r0, _02009DC4 ; =_022A37D4
-	ldr r0, [r0, r4, lsl #4]
-	bl sub_02009C70
-	ldr r0, _02009DC8 ; =_022A37D8
-	ldr r0, [r0, r4, lsl #4]
-	bl sub_02009C8C
-	ldmia sp!, {r4, pc}
-_02009D88:
-	ldr r0, _02009DBC ; =_022A37CC
-	ldr r0, [r0, r4, lsl #4]
-	bl sub_020095AC
-	ldr r0, _02009DC0 ; =_022A37D0
-	ldr r0, [r0, r4, lsl #4]
-	bl sub_020095C8
-	ldr r0, _02009DC4 ; =_022A37D4
-	ldr r0, [r0, r4, lsl #4]
-	bl sub_020095E4
-	ldr r0, _02009DC8 ; =_022A37D8
-	ldr r0, [r0, r4, lsl #4]
-	bl sub_02009600
-	ldmia sp!, {r4, pc}
-	.align 2, 0
-_02009DBC: .word _022A37CC
-_02009DC0: .word _022A37D0
-_02009DC4: .word _022A37D4
-_02009DC8: .word _022A37D8
-	arm_func_end sub_02009D48
-
-	arm_func_start sub_02009DCC
-sub_02009DCC: ; 0x02009DCC
-	ldr r1, _02009E58 ; =_022A37AC
-	add r3, r0, r0, lsl #2
-	ldrb r2, [r1, r3]
-	mov r1, #0x1f
-	cmp r2, #0
-	ldr r2, _02009E5C ; =_022A37AD
-	bicne r1, r1, #1
-	ldrb r2, [r2, r3]
-	cmp r2, #0
-	ldr r2, _02009E60 ; =_022A37AE
-	bicne r1, r1, #2
-	ldrb r2, [r2, r3]
-	cmp r2, #0
-	ldr r2, _02009E64 ; =_022A37AF
-	bicne r1, r1, #4
-	ldrb r2, [r2, r3]
-	cmp r2, #0
-	ldr r2, _02009E68 ; =_022A37B0
-	bicne r1, r1, #8
-	ldrb r2, [r2, r3]
-	cmp r2, #0
-	bicne r1, r1, #0x10
-	cmp r0, #0
-	ldrne r2, _02009E6C ; =0x04001000
-	ldrne r0, [r2]
-	bicne r0, r0, #0x1f00
-	orrne r0, r0, r1, lsl #8
-	strne r0, [r2]
-	bxne lr
-	mov r2, #0x4000000
-	ldr r0, [r2]
-	bic r0, r0, #0x1f00
-	orr r0, r0, r1, lsl #8
-	str r0, [r2]
-	bx lr
-	.align 2, 0
-_02009E58: .word _022A37AC
-_02009E5C: .word _022A37AD
-_02009E60: .word _022A37AE
-_02009E64: .word _022A37AF
-_02009E68: .word _022A37B0
-_02009E6C: .word 0x04001000
-	arm_func_end sub_02009DCC
-
-	arm_func_start sub_02009E70
-sub_02009E70: ; 0x02009E70
-	stmdb sp!, {r3, lr}
-	mov r1, #0xa
-	mul r3, r0, r1
-	ldr r2, _02009F78 ; =_022A37B6
-	mov r1, #0
-	ldrb ip, [r2, r3]
-	mov r2, #0x20
-	cmp ip, #1
-	orreq r1, r1, #1
-	beq _02009EA0
-	cmp ip, #2
-	orreq r2, r2, #1
-_02009EA0:
-	ldr ip, _02009F7C ; =_022A37B7
-	ldrb ip, [ip, r3]
-	cmp ip, #1
-	orreq r1, r1, #2
-	beq _02009EBC
-	cmp ip, #2
-	orreq r2, r2, #2
-_02009EBC:
-	ldr ip, _02009F80 ; =_022A37B8
-	ldrb ip, [ip, r3]
-	cmp ip, #1
-	orreq r1, r1, #4
-	beq _02009ED8
-	cmp ip, #2
-	orreq r2, r2, #4
-_02009ED8:
-	ldr ip, _02009F84 ; =_022A37B9
-	ldrb ip, [ip, r3]
-	cmp ip, #1
-	orreq r1, r1, #8
-	beq _02009EF4
-	cmp ip, #2
-	orreq r2, r2, #8
-_02009EF4:
-	ldr ip, _02009F88 ; =_022A37BA
-	ldrb ip, [ip, r3]
-	cmp ip, #1
-	orreq r1, r1, #0x10
-	beq _02009F10
-	cmp ip, #2
-	orreq r2, r2, #0x10
-_02009F10:
-	cmp r0, #0
-	bne _02009F48
-	ldr r0, _02009F8C ; =_022A37BE
-	ldr ip, _02009F90 ; =_022A37BC
-	ldrh lr, [r0, r3]
-	ldr r0, _02009F94 ; =0x04000050
-	and lr, lr, #0xf8
-	mov lr, lr, asr #3
-	str lr, [sp]
-	ldrh r3, [ip, r3]
-	and r3, r3, #0xf8
-	mov r3, r3, asr #3
-	bl G2x_SetBlendAlpha_
-	ldmia sp!, {r3, pc}
-_02009F48:
-	ldr r0, _02009F8C ; =_022A37BE
-	ldr ip, _02009F90 ; =_022A37BC
-	ldrh lr, [r0, r3]
-	ldr r0, _02009F98 ; =0x04001050
-	and lr, lr, #0xf8
-	mov lr, lr, asr #3
-	str lr, [sp]
-	ldrh r3, [ip, r3]
-	and r3, r3, #0xf8
-	mov r3, r3, asr #3
-	bl G2x_SetBlendAlpha_
-	ldmia sp!, {r3, pc}
-	.align 2, 0
-_02009F78: .word _022A37B6
-_02009F7C: .word _022A37B7
-_02009F80: .word _022A37B8
-_02009F84: .word _022A37B9
-_02009F88: .word _022A37BA
-_02009F8C: .word _022A37BE
-_02009F90: .word _022A37BC
-_02009F94: .word 0x04000050
-_02009F98: .word 0x04001050
-	arm_func_end sub_02009E70
-
-	arm_func_start sub_02009F9C
-sub_02009F9C: ; 0x02009F9C
-	stmdb sp!, {r4, r5, r6, r7, r8, lr}
-	mov r1, #0x1b
-	mul r4, r0, r1
-	ldr r3, _0200A100 ; =_022A37EC
-	mov r2, #0
-	ldrb r1, [r3, r4]
-	add lr, r3, r4
-	mov r3, #0
-	cmp r1, #0
-	ldr r1, _0200A104 ; =_022A37ED
-	orrne r2, r2, #1
-	ldrb r1, [r1, r4]
-	mov r5, r3
-	mov r6, r3
-	cmp r1, #0
-	ldr r1, _0200A108 ; =_022A37EE
-	orrne r2, r2, #2
-	ldrb r1, [r1, r4]
-	mov ip, r3
-	cmp r1, #0
-	ldr r1, _0200A10C ; =_02092A04
-	orrne r2, r2, #4
-_02009FF4:
-	add r7, lr, ip
-	ldrb r8, [r7, #7]
-	cmp r8, #0
-	ldrne r8, [r1, ip, lsl #2]
-	orrne r3, r3, r8
-	ldrb r8, [r7, #0xc]
-	cmp r8, #0
-	ldrne r8, [r1, ip, lsl #2]
-	orrne r3, r3, r8
-	ldrb r8, [r7, #0x16]
-	ldrb r7, [r7, #0x11]
-	cmp r8, #0
-	ldrne r8, [r1, ip, lsl #2]
-	orrne r6, r6, r8
-	cmp r7, #0
-	ldrne r7, [r1, ip, lsl #2]
-	orrne r5, r5, r7
-	add r7, ip, #1
-	and ip, r7, #0xff
-	cmp ip, #5
-	blo _02009FF4
-	cmp r0, #0
-	bne _0200A0A8
-	mov r7, #0x4000000
-	ldr r1, [r7]
-	ldr r0, _0200A110 ; =_022A37EF
-	bic r1, r1, #0xe000
-	orr r1, r1, r2, lsl #13
-	str r1, [r7]
-	ldrb r1, [r0, r4]
-	mov r0, r3
-	bl sub_02009B98
-	ldr r1, _0200A114 ; =_022A37F0
-	mov r0, #0
-	ldrb r1, [r1, r4]
-	bl sub_02009BC0
-	ldr r1, _0200A118 ; =_022A37F1
-	mov r0, r5
-	ldrb r1, [r1, r4]
-	bl sub_02009BE8
-	ldr r1, _0200A11C ; =_022A37F2
-	mov r0, r6
-	ldrb r1, [r1, r4]
-	bl sub_02009C10
-	ldmia sp!, {r4, r5, r6, r7, r8, pc}
-_0200A0A8:
-	ldr ip, _0200A120 ; =0x04001000
-	ldr r1, _0200A110 ; =_022A37EF
-	ldr r7, [ip]
-	mov r0, r3
-	bic r3, r7, #0xe000
-	orr r2, r3, r2, lsl #13
-	str r2, [ip]
-	ldrb r1, [r1, r4]
-	bl sub_02009CA8
-	ldr r1, _0200A114 ; =_022A37F0
-	mov r0, #0
-	ldrb r1, [r1, r4]
-	bl sub_02009CD0
-	ldr r1, _0200A118 ; =_022A37F1
-	mov r0, r5
-	ldrb r1, [r1, r4]
-	bl sub_02009CF8
-	ldr r1, _0200A11C ; =_022A37F2
-	mov r0, r6
-	ldrb r1, [r1, r4]
-	bl sub_02009D20
-	ldmia sp!, {r4, r5, r6, r7, r8, pc}
-	.align 2, 0
-_0200A100: .word _022A37EC
-_0200A104: .word _022A37ED
-_0200A108: .word _022A37EE
-_0200A10C: .word _02092A04
-_0200A110: .word _022A37EF
-_0200A114: .word _022A37F0
-_0200A118: .word _022A37F1
-_0200A11C: .word _022A37F2
-_0200A120: .word 0x04001000
-	arm_func_end sub_02009F9C
-
-	arm_func_start sub_0200A124
-sub_0200A124: ; 0x0200A124
-	stmdb sp!, {r4, lr}
-	mov r4, r0
-	stmia r4, {r1, r2}
-	mov r0, #0
-	strb r0, [r4, #8]
-	ldr r1, [sp, #8]
-	str r3, [r4, #0xc]
-	mov r0, r2, lsl #1
-	bl MemAlloc
-	str r0, [r4, #0x10]
-	mov r0, r4
-	bl sub_0200A274
-	ldmia sp!, {r4, pc}
-	arm_func_end sub_0200A124
-
-	arm_func_start sub_0200A158
-sub_0200A158: ; 0x0200A158
-	stmdb sp!, {r4, lr}
-	mov r4, r0
-	ldr r0, [r4, #0x10]
-	bl MemFree
-	mov r0, #0
-	str r0, [r4, #0x10]
-	ldmia sp!, {r4, pc}
-	arm_func_end sub_0200A158
-
-	arm_func_start sub_0200A174
-sub_0200A174: ; 0x0200A174
-	mov r1, #1
-	strb r1, [r0, #8]
-	bx lr
-	arm_func_end sub_0200A174
-
-	arm_func_start sub_0200A180
-sub_0200A180: ; 0x0200A180
-	bx lr
-	arm_func_end sub_0200A180
-
-	arm_func_start sub_0200A184
-sub_0200A184: ; 0x0200A184
-	stmdb sp!, {r4, r5, r6, lr}
-	mov r6, r0
-	ldrb r0, [r6, #8]
-	cmp r0, #0
-	ldmeqia sp!, {r4, r5, r6, pc}
-	ldr r4, [r6, #0x10]
-	ldr r1, [r6, #4]
-	mov r0, r4
-	mov r1, r1, lsl #1
-	ldr r5, [r6, #0xc]
-	bl sub_0207A2DC
-	ldr r0, [r6]
-	cmp r0, #4
-	addls pc, pc, r0, lsl #2
-	b _0200A1D4
-_0200A1C0: ; jump table
-	b _0200A1D4 ; case 0
-	b _0200A1EC ; case 1
-	b _0200A20C ; case 2
-	b _0200A22C ; case 3
-	b _0200A24C ; case 4
-_0200A1D4:
-	ldr r2, [r6, #4]
-	mov r0, r5
-	mov r1, r4
-	mov r2, r2, lsl #1
-	bl Memcpy32
-	b _0200A268
-_0200A1EC:
-	bl GX_BeginLoadBGExtPltt
-	ldr r2, [r6, #4]
-	mov r0, r5
-	mov r1, r4
-	mov r2, r2, lsl #1
-	bl Memcpy32
-	bl GX_EndLoadBGExtPltt
-	b _0200A268
-_0200A20C:
-	bl GX_BeginLoadOBJExtPltt
-	ldr r2, [r6, #4]
-	mov r0, r5
-	mov r1, r4
-	mov r2, r2, lsl #1
-	bl Memcpy32
-	bl GX_EndLoadOBJExtPltt
-	b _0200A268
-_0200A22C:
-	bl GXS_BeginLoadBGExtPltt
-	ldr r2, [r6, #4]
-	mov r0, r5
-	mov r1, r4
-	mov r2, r2, lsl #1
-	bl Memcpy32
-	bl GXS_EndLoadBGExtPltt
-	b _0200A268
-_0200A24C:
-	bl GXS_BeginLoadOBJExtPltt
-	ldr r2, [r6, #4]
-	mov r0, r5
-	mov r1, r4
-	mov r2, r2, lsl #1
-	bl Memcpy32
-	bl GXS_EndLoadOBJExtPltt
-_0200A268:
-	mov r0, #0
-	strb r0, [r6, #8]
-	ldmia sp!, {r4, r5, r6, pc}
-	arm_func_end sub_0200A184
-
-	arm_func_start sub_0200A274
-sub_0200A274: ; 0x0200A274
-	mov r3, #0
-	ldr ip, [r0, #0x10]
-	mov r2, r3
-	b _0200A28C
-_0200A284:
-	strh r2, [ip], #2
-	add r3, r3, #1
-_0200A28C:
-	ldr r1, [r0, #4]
-	cmp r3, r1
-	blt _0200A284
-	bx lr
-	arm_func_end sub_0200A274
-
-	arm_func_start sub_0200A29C
-sub_0200A29C: ; 0x0200A29C
-	ldr r0, [r0, #0x10]
-	ldr ip, _0200A2B0 ; =Rgb8ToRgb5
-	add r0, r0, r1, lsl #1
-	mov r1, r2
-	bx ip
-	.align 2, 0
-_0200A2B0: .word Rgb8ToRgb5
-	arm_func_end sub_0200A29C
-
-	arm_func_start sub_0200A2B4
-sub_0200A2B4: ; 0x0200A2B4
-	ldr r3, [r0, #0x10]
-	ldr ip, _0200A2C8 ; =sub_02004FF8
-	mov r0, r1
-	add r1, r3, r2, lsl #1
-	bx ip
-	.align 2, 0
-_0200A2C8: .word sub_02004FF8
-	arm_func_end sub_0200A2B4
-
-	arm_func_start sub_0200A2CC
-sub_0200A2CC: ; 0x0200A2CC
-	mov r1, #0
-	str r1, [r0]
-	str r1, [r0, #4]
-	str r1, [r0, #0x18]
-	str r1, [r0, #0x1c]
-	str r1, [r0, #0x20]
-	str r1, [r0, #0x24]
-	str r1, [r0, #0x14]
-	strb r1, [r0, #8]
-	bx lr
-	arm_func_end sub_0200A2CC
-
-	arm_func_start sub_0200A2F4
-sub_0200A2F4: ; 0x0200A2F4
-	mov r1, #0
-_0200A2F8:
-	ldr r2, [r0, #0x24]
-	str r1, [r0, #0x20]
-	str r1, [r0, #0x24]
-	cmp r2, #0
-	movne r0, r2
-	bne _0200A2F8
-	bx lr
-	arm_func_end sub_0200A2F4
-_0200A314:
-	ldr r2, [r0, #0x24]
-	cmp r2, #0
-	beq _0200A330
-	cmp r2, r1
-	bxeq lr
-	mov r0, r2
-	b _0200A314
-_0200A330:
-	str r1, [r0, #0x24]
-	str r0, [r1, #0x20]
-	mov r0, #0
-	str r0, [r1, #0x24]
-	bx lr
-_0200A344:
-	ldr r2, [r0, #0x24]
-	cmp r2, #0
-	bxeq lr
-	cmp r2, r1
-	movne r0, r2
-	bne _0200A344
-	ldr r2, [r1, #0x24]
-	str r2, [r0, #0x24]
-	cmp r2, #0
-	strne r0, [r2, #0x20]
-	mov r0, #0
-	str r0, [r1, #0x20]
-	str r0, [r1, #0x24]
-	bx lr
-
-	arm_func_start sub_0200A37C
-sub_0200A37C: ; 0x0200A37C
-	stmdb sp!, {r3, r4, r5, lr}
-	mov r5, r1
-	ldr r4, [r0, #0x24]
-	b _0200A39C
-_0200A38C:
-	mov r0, r4
-	mov r1, r5
-	bl sub_0200A618
-	ldr r4, [r4, #0x24]
-_0200A39C:
-	cmp r4, #0
-	bne _0200A38C
-	ldmia sp!, {r3, r4, r5, pc}
-	arm_func_end sub_0200A37C
-
-	arm_func_start sub_0200A3A8
-sub_0200A3A8: ; 0x0200A3A8
-	stmdb sp!, {r4, r5, r6, lr}
-	mov r6, r1
-	mov r5, r2
-	ldr r4, [r0, #0x24]
-	b _0200A3D0
-_0200A3BC:
-	mov r0, r4
-	mov r1, r6
-	mov r2, r5
-	bl sub_0200A64C
-	ldr r4, [r4, #0x24]
-_0200A3D0:
-	cmp r4, #0
-	bne _0200A3BC
-	ldmia sp!, {r4, r5, r6, pc}
-	arm_func_end sub_0200A3A8
-
-	arm_func_start sub_0200A3DC
-sub_0200A3DC: ; 0x0200A3DC
-	stmdb sp!, {r4, r5, r6, lr}
-	mov r6, r1
-	mov r5, r2
-	ldr r4, [r0, #0x24]
-	b _0200A404
-_0200A3F0:
-	mov r0, r4
-	mov r1, r6
-	mov r2, r5
-	bl sub_0200A688
-	ldr r4, [r4, #0x24]
-_0200A404:
-	cmp r4, #0
-	bne _0200A3F0
-	ldmia sp!, {r4, r5, r6, pc}
-	arm_func_end sub_0200A3DC
-
-	arm_func_start sub_0200A410
-sub_0200A410: ; 0x0200A410
-	stmdb sp!, {r4, r5, r6, lr}
-	mov r6, r1
-	mov r5, r2
-	ldr r4, [r0, #0x24]
-	b _0200A438
-_0200A424:
-	mov r0, r4
-	mov r1, r6
-	mov r2, r5
-	bl sub_0200A6C4
-	ldr r4, [r4, #0x24]
-_0200A438:
-	cmp r4, #0
-	bne _0200A424
-	ldmia sp!, {r4, r5, r6, pc}
-	arm_func_end sub_0200A410
-
-	arm_func_start sub_0200A444
-sub_0200A444: ; 0x0200A444
-	stmdb sp!, {r4, r5, r6, lr}
-	mov r6, r1
-	mov r5, r2
-	ldr r4, [r0, #0x24]
-	b _0200A46C
-_0200A458:
-	mov r0, r4
-	mov r1, r6
-	mov r2, r5
-	bl sub_0200A700
-	ldr r4, [r4, #0x24]
-_0200A46C:
-	cmp r4, #0
-	bne _0200A458
-	ldmia sp!, {r4, r5, r6, pc}
-	arm_func_end sub_0200A444
-
-	arm_func_start sub_0200A478
-sub_0200A478: ; 0x0200A478
-	stmdb sp!, {r4, r5, r6, lr}
-	mov r6, r0
-	mov r5, r1
-	str r5, [r6]
-	ldr r1, [sp, #0x10]
-	str r3, [r6, #4]
-	mov r0, r3, lsl #2
-	mov r4, r2
-	bl MemAlloc
-	str r0, [r6, #0x18]
-	ldr r0, [r5, #0x10]
-	mov r1, #0
-	add r0, r0, r4, lsl #1
-	str r0, [r6, #0x1c]
-	str r1, [r6, #0x20]
-	mov r0, r6
-	str r1, [r6, #0x24]
-	bl sub_0200A544
-	ldmia sp!, {r4, r5, r6, pc}
-	arm_func_end sub_0200A478
-
-	arm_func_start sub_0200A4C4
-sub_0200A4C4: ; 0x0200A4C4
-	stmdb sp!, {r4, lr}
-	mov r4, r0
-	ldr r1, [r4, #0x20]
-	ldr r2, [r4, #0x24]
-	mov r0, #0
-	str r0, [r4, #0x20]
-	str r0, [r4, #0x24]
-	cmp r1, #0
-	strne r2, [r1, #0x24]
-	cmp r2, #0
-	strne r1, [r2, #0x20]
-	ldr r0, [r4, #0x18]
-	bl MemFree
-	mov r0, #0
-	str r0, [r4, #0x18]
-	ldmia sp!, {r4, pc}
-	arm_func_end sub_0200A4C4
-
-	arm_func_start sub_0200A504
-sub_0200A504: ; 0x0200A504
-	mov r1, #1
-	strb r1, [r0, #8]
-	bx lr
-	arm_func_end sub_0200A504
-
-	arm_func_start sub_0200A510
-sub_0200A510: ; 0x0200A510
-	stmdb sp!, {r4, lr}
-	mov r4, r0
-	ldrb r1, [r4, #8]
-	cmp r1, #0
-	ldmeqia sp!, {r4, pc}
-	ldr r1, [r4, #0x14]
-	blx r1
-	mov r0, #0
-	strb r0, [r4, #8]
-	ldr r0, [r4]
-	mov r1, #1
-	strb r1, [r0, #8]
-	ldmia sp!, {r4, pc}
-	arm_func_end sub_0200A510
-
-	arm_func_start sub_0200A544
-sub_0200A544: ; 0x0200A544
-	mov ip, #0
-	ldr r3, [r0, #0x18]
-	mov r2, ip
-	b _0200A56C
-_0200A554:
-	mov r1, r3
-	strb r2, [r3], #4
-	strb r2, [r1, #1]
-	strb r2, [r1, #2]
-	strb r2, [r1, #3]
-	add ip, ip, #1
-_0200A56C:
-	ldr r1, [r0, #4]
-	cmp ip, r1
-	blt _0200A554
-	ldr r2, _0200A58C ; =sub_0200A73C
-	mov r1, #1
-	str r2, [r0, #0x14]
-	strb r1, [r0, #8]
-	bx lr
-	.align 2, 0
-_0200A58C: .word sub_0200A73C
-	arm_func_end sub_0200A544
-
-	arm_func_start sub_0200A590
-sub_0200A590: ; 0x0200A590
-	ldr r0, [r0, #0x18]
-	mov r3, #4
-	add r1, r0, r1, lsl #2
-_0200A59C:
-	ldrb r0, [r2], #1
-	subs r3, r3, #1
-	strb r0, [r1], #1
-	bne _0200A59C
-	bx lr
-	arm_func_end sub_0200A590
-
-	arm_func_start sub_0200A5B0
-sub_0200A5B0: ; 0x0200A5B0
-	stmdb sp!, {r3, r4, r5, lr}
-	ldr r0, [r0, #0x18]
-	mov lr, #0
-	add ip, r0, r1, lsl #2
-	b _0200A5EC
-_0200A5C4:
-	mov r4, r2
-	mov r5, ip
-	add r2, r2, #4
-	add ip, ip, #4
-	mov r1, #4
-_0200A5D8:
-	ldrb r0, [r4], #1
-	subs r1, r1, #1
-	strb r0, [r5], #1
-	bne _0200A5D8
-	add lr, lr, #1
-_0200A5EC:
-	cmp lr, r3
-	blt _0200A5C4
-	ldmia sp!, {r3, r4, r5, pc}
-	arm_func_end sub_0200A5B0
-
-	arm_func_start sub_0200A5F8
-sub_0200A5F8: ; 0x0200A5F8
-	ldr r0, [r0, #0x18]
-	mov r3, #4
-	add r2, r0, r2, lsl #2
-_0200A604:
-	ldrb r0, [r2], #1
-	subs r3, r3, #1
-	strb r0, [r1], #1
-	bne _0200A604
-	bx lr
-	arm_func_end sub_0200A5F8
-
-	arm_func_start sub_0200A618
-sub_0200A618: ; 0x0200A618
-	strh r1, [r0, #0xa]
-	mov r2, #0
-	strb r2, [r0, #0xc]
-	strb r2, [r0, #0xd]
-	strb r2, [r0, #0xe]
-	strb r2, [r0, #0xf]
-	ldr r1, _0200A648 ; =sub_0200A78C
-	str r2, [r0, #0x10]
-	str r1, [r0, #0x14]
-	mov r1, #1
-	strb r1, [r0, #8]
-	bx lr
-	.align 2, 0
-_0200A648: .word sub_0200A78C
-	arm_func_end sub_0200A618
-
-	arm_func_start sub_0200A64C
-sub_0200A64C: ; 0x0200A64C
-	strh r1, [r0, #0xa]
-	add ip, r0, #0xc
-	mov r3, #4
-_0200A658:
-	ldrb r1, [r2], #1
-	subs r3, r3, #1
-	strb r1, [ip], #1
-	bne _0200A658
-	mov r2, #0
-	ldr r1, _0200A684 ; =sub_0200A9E4
-	str r2, [r0, #0x10]
-	str r1, [r0, #0x14]
-	mov r1, #1
-	strb r1, [r0, #8]
-	bx lr
-	.align 2, 0
-_0200A684: .word sub_0200A9E4
-	arm_func_end sub_0200A64C
-
-	arm_func_start sub_0200A688
-sub_0200A688: ; 0x0200A688
-	strh r1, [r0, #0xa]
-	add ip, r0, #0xc
-	mov r3, #4
-_0200A694:
-	ldrb r1, [r2], #1
-	subs r3, r3, #1
-	strb r1, [ip], #1
-	bne _0200A694
-	mov r2, #0
-	ldr r1, _0200A6C0 ; =sub_0200ACB0
-	str r2, [r0, #0x10]
-	str r1, [r0, #0x14]
-	mov r1, #1
-	strb r1, [r0, #8]
-	bx lr
-	.align 2, 0
-_0200A6C0: .word sub_0200ACB0
-	arm_func_end sub_0200A688
-
-	arm_func_start sub_0200A6C4
-sub_0200A6C4: ; 0x0200A6C4
-	strh r1, [r0, #0xa]
-	add ip, r0, #0xc
-	mov r3, #4
-_0200A6D0:
-	ldrb r1, [r2], #1
-	subs r3, r3, #1
-	strb r1, [ip], #1
-	bne _0200A6D0
-	mov r2, #0
-	ldr r1, _0200A6FC ; =TransformPaletteDataWithFlushDivideFade
-	str r2, [r0, #0x10]
-	str r1, [r0, #0x14]
-	mov r1, #1
-	strb r1, [r0, #8]
-	bx lr
-	.align 2, 0
-_0200A6FC: .word TransformPaletteDataWithFlushDivideFade
-	arm_func_end sub_0200A6C4
-
-	arm_func_start sub_0200A700
-sub_0200A700: ; 0x0200A700
-	strh r1, [r0, #0xa]
-	add ip, r0, #0xc
-	mov r3, #4
-_0200A70C:
-	ldrb r1, [r2], #1
-	subs r3, r3, #1
-	strb r1, [ip], #1
-	bne _0200A70C
-	mov r2, #0
-	ldr r1, _0200A738 ; =sub_0200B0AC
-	str r2, [r0, #0x10]
-	str r1, [r0, #0x14]
-	mov r1, #1
-	strb r1, [r0, #8]
-	bx lr
-	.align 2, 0
-_0200A738: .word sub_0200B0AC
-	arm_func_end sub_0200A700
-
-	arm_func_start sub_0200A73C
-sub_0200A73C: ; 0x0200A73C
-	stmdb sp!, {r4, lr}
-	ldr ip, [r0, #0x18]
-	ldr lr, [r0, #0x1c]
-	mov r4, #0
-	b _0200A77C
-_0200A750:
-	ldrb r1, [ip, #1]
-	ldrb r2, [ip, #2]
-	ldrb r3, [ip], #4
-	and r1, r1, #0xf8
-	and r2, r2, #0xf8
-	mov r1, r1, lsl #2
-	and r3, r3, #0xf8
-	orr r1, r1, r2, lsl #7
-	orr r1, r1, r3, asr #3
-	strh r1, [lr], #2
-	add r4, r4, #1
-_0200A77C:
-	ldr r1, [r0, #4]
-	cmp r4, r1
-	blt _0200A750
-	ldmia sp!, {r4, pc}
-	arm_func_end sub_0200A73C
-
-	arm_func_start sub_0200A78C
-sub_0200A78C: ; 0x0200A78C
-	stmdb sp!, {r4, r5, r6, r7, r8, lr}
-	ldrh r2, [r0, #0xa]
-	ldr r1, [r0]
-	ldr r3, [r0, #0x18]
-	cmp r2, #0x100
-	ldr r1, [r1]
-	ldr ip, [r0, #0x1c]
-	blo _0200A7F0
-	mov r5, #0
-	b _0200A7E0
-_0200A7B4:
-	ldrb r1, [r3, #1]
-	ldrb r2, [r3, #2]
-	ldrb r4, [r3], #4
-	and r1, r1, #0xf8
-	and r2, r2, #0xf8
-	mov r1, r1, lsl #2
-	and r4, r4, #0xf8
-	orr r1, r1, r2, lsl #7
-	orr r1, r1, r4, asr #3
-	strh r1, [ip], #2
-	add r5, r5, #1
-_0200A7E0:
-	ldr r1, [r0, #4]
-	cmp r5, r1
-	blt _0200A7B4
-	ldmia sp!, {r4, r5, r6, r7, r8, pc}
-_0200A7F0:
-	cmp r2, #0
-	bne _0200A898
-	cmp r1, #2
-	bne _0200A874
-	mov lr, #0
-	mov r1, lr
-	mov r2, lr
-	b _0200A864
-_0200A810:
-	mov r4, r2
-_0200A814:
-	add r4, r4, #1
-	cmp r4, #0xf0
-	strh r1, [ip], #2
-	add lr, lr, #1
-	blt _0200A814
-	mov r4, r1
-_0200A82C:
-	ldrb r5, [r3, #1]
-	ldrb r6, [r3, #2]
-	ldrb r7, [r3], #4
-	and r5, r5, #0xf8
-	and r6, r6, #0xf8
-	mov r5, r5, lsl #2
-	add r4, r4, #1
-	and r7, r7, #0xf8
-	orr r5, r5, r6, lsl #7
-	orr r5, r5, r7, asr #3
-	cmp r4, #0x10
-	strh r5, [ip], #2
-	add lr, lr, #1
-	blt _0200A82C
-_0200A864:
-	ldr r4, [r0, #4]
-	cmp lr, r4
-	blt _0200A810
-	ldmia sp!, {r4, r5, r6, r7, r8, pc}
-_0200A874:
-	mov r3, #0
-	mov r2, r3
-	b _0200A888
-_0200A880:
-	strh r2, [ip], #2
-	add r3, r3, #1
-_0200A888:
-	ldr r1, [r0, #4]
-	cmp r3, r1
-	blt _0200A880
-	ldmia sp!, {r4, r5, r6, r7, r8, pc}
-_0200A898:
-	cmp r1, #2
-	mov lr, #0
-	bne _0200A9D4
-	b _0200A95C
-_0200A8A8:
-	mov r4, #0
-_0200A8AC:
-	ldrb r1, [r3, #1]
-	ldrb r5, [r3, #2]
-	ldrb r6, [r3], #4
-	mul r7, r1, r2
-	mul r8, r5, r2
-	mul r1, r6, r2
-	mov r5, r7, asr #7
-	add r7, r7, r5, lsr #24
-	mov r6, r8, asr #7
-	mov r5, r1, asr #7
-	add r1, r1, r5, lsr #24
-	add r6, r8, r6, lsr #24
-	mov r1, r1, lsl #8
-	add r4, r4, #1
-	mov r7, r7, lsl #8
-	mov r5, r6, lsl #8
-	mov r6, r7, lsr #0x10
-	mov r7, r5, lsr #0x10
-	and r5, r6, #0xf8
-	mov r8, r1, lsr #0x10
-	mov r1, r5, lsl #2
-	and r6, r7, #0xf8
-	and r5, r8, #0xf8
-	orr r1, r1, r6, lsl #7
-	orr r1, r1, r5, asr #3
-	strh r1, [ip], #2
-	cmp r4, #0xf0
-	add lr, lr, #1
-	blt _0200A8AC
-	mov r1, #0
-_0200A924:
-	ldrb r4, [r3, #1]
-	ldrb r5, [r3, #2]
-	ldrb r6, [r3], #4
-	and r4, r4, #0xf8
-	and r5, r5, #0xf8
-	mov r4, r4, lsl #2
-	add r1, r1, #1
-	and r6, r6, #0xf8
-	orr r4, r4, r5, lsl #7
-	orr r4, r4, r6, asr #3
-	cmp r1, #0x10
-	strh r4, [ip], #2
-	add lr, lr, #1
-	blt _0200A924
-_0200A95C:
-	ldr r1, [r0, #4]
-	cmp lr, r1
-	blt _0200A8A8
-	ldmia sp!, {r4, r5, r6, r7, r8, pc}
-_0200A96C:
-	ldrb r1, [r3, #1]
-	ldrb r4, [r3, #2]
-	ldrb r5, [r3], #4
-	mul r6, r1, r2
-	mul r7, r4, r2
-	mul r1, r5, r2
-	mov r4, r6, asr #7
-	add r6, r6, r4, lsr #24
-	mov r5, r7, asr #7
-	mov r4, r1, asr #7
-	add r1, r1, r4, lsr #24
-	add r5, r7, r5, lsr #24
-	mov r1, r1, lsl #8
-	mov r6, r6, lsl #8
-	mov r4, r5, lsl #8
-	mov r5, r6, lsr #0x10
-	mov r6, r4, lsr #0x10
-	and r4, r5, #0xf8
-	mov r7, r1, lsr #0x10
-	mov r1, r4, lsl #2
-	and r5, r6, #0xf8
-	and r4, r7, #0xf8
-	orr r1, r1, r5, lsl #7
-	orr r1, r1, r4, asr #3
-	strh r1, [ip], #2
-	add lr, lr, #1
-_0200A9D4:
-	ldr r1, [r0, #4]
-	cmp lr, r1
-	blt _0200A96C
-	ldmia sp!, {r4, r5, r6, r7, r8, pc}
-	arm_func_end sub_0200A78C
-
-	arm_func_start sub_0200A9E4
-sub_0200A9E4: ; 0x0200A9E4
-	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
-	ldr r1, [r0]
-	ldrh r5, [r0, #0xa]
-	ldr r1, [r1]
-	add r4, sp, #0
-	add r6, r0, #0xc
-	mov r3, #4
-_0200AA00:
-	ldrb r2, [r6], #1
-	subs r3, r3, #1
-	strb r2, [r4], #1
-	bne _0200AA00
-	cmp r5, #0x100
-	ldr r2, [r0, #0x18]
-	ldr r4, [r0, #0x1c]
-	blo _0200AA64
-	mov r6, #0
-	b _0200AA54
-_0200AA28:
-	ldrb r1, [r2, #1]
-	ldrb r3, [r2, #2]
-	ldrb r5, [r2], #4
-	and r1, r1, #0xf8
-	and r3, r3, #0xf8
-	mov r1, r1, lsl #2
-	and r5, r5, #0xf8
-	orr r1, r1, r3, lsl #7
-	orr r1, r1, r5, asr #3
-	strh r1, [r4], #2
-	add r6, r6, #1
-_0200AA54:
-	ldr r1, [r0, #4]
-	cmp r6, r1
-	blt _0200AA28
-	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-_0200AA64:
-	cmp r5, #0
-	bne _0200AB38
-	ldrb r3, [sp, #1]
-	ldrb r5, [sp, #2]
-	ldrb r6, [sp]
-	and r3, r3, #0xf8
-	and r5, r5, #0xf8
-	mov r3, r3, lsl #2
-	and r6, r6, #0xf8
-	orr r3, r3, r5, lsl #7
-	orr r3, r3, r6, asr #3
-	mov r3, r3, lsl #0x10
-	cmp r1, #2
-	mov r5, r3, lsr #0x10
-	bne _0200AB18
-	mov r6, #0
-	mov r3, r6
-	mov r1, r6
-	b _0200AB08
-_0200AAB0:
-	mov r7, r3
-_0200AAB4:
-	add r7, r7, #1
-	cmp r7, #0xf0
-	strh r5, [r4], #2
-	add r2, r2, #4
-	add r6, r6, #1
-	blt _0200AAB4
-	mov r7, r1
-_0200AAD0:
-	ldrb r8, [r2, #1]
-	ldrb sb, [r2, #2]
-	ldrb sl, [r2], #4
-	and r8, r8, #0xf8
-	and sb, sb, #0xf8
-	mov r8, r8, lsl #2
-	add r7, r7, #1
-	and sl, sl, #0xf8
-	orr r8, r8, sb, lsl #7
-	orr r8, r8, sl, asr #3
-	cmp r7, #0x10
-	strh r8, [r4], #2
-	add r6, r6, #1
-	blt _0200AAD0
-_0200AB08:
-	ldr r7, [r0, #4]
-	cmp r6, r7
-	blt _0200AAB0
-	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-_0200AB18:
-	mov r2, #0
-	b _0200AB28
-_0200AB20:
-	strh r5, [r4], #2
-	add r2, r2, #1
-_0200AB28:
-	ldr r1, [r0, #4]
-	cmp r2, r1
-	blt _0200AB20
-	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-_0200AB38:
-	rsb r3, r5, #0x100
-	mov r3, r3, lsl #0x10
-	ldrb r8, [sp]
-	mov sb, r3, lsr #0x10
-	ldrb r7, [sp, #1]
-	ldrb r6, [sp, #2]
-	mul r3, r8, sb
-	mul ip, r7, sb
-	mul lr, r6, sb
-	cmp r1, #2
-	bne _0200AC30
-	mov r6, #0
-	b _0200AC20
-_0200AB6C:
-	mov r7, #0
-_0200AB70:
-	ldrb r1, [r2, #1]
-	ldrb fp, [r2, #2]
-	ldrb sb, [r2], #4
-	mla sl, r1, r5, ip
-	mla r8, fp, r5, lr
-	mla r1, sb, r5, r3
-	mov sb, sl, asr #7
-	add sb, sl, sb, lsr #24
-	mov fp, r8, asr #7
-	add r8, r8, fp, lsr #24
-	mov sl, r1, asr #7
-	mov sb, sb, lsl #8
-	add r1, r1, sl, lsr #24
-	mov r8, r8, lsl #8
-	mov r1, r1, lsl #8
-	mov r1, r1, lsr #0x10
-	add r7, r7, #1
-	mov sb, sb, lsr #0x10
-	mov sl, r8, lsr #0x10
-	and r8, sb, #0xf8
-	and sb, sl, #0xf8
-	mov r8, r8, lsl #2
-	and r1, r1, #0xf8
-	orr r8, r8, sb, lsl #7
-	orr r1, r8, r1, asr #3
-	strh r1, [r4], #2
-	cmp r7, #0xf0
-	add r6, r6, #1
-	blt _0200AB70
-	mov r7, #0
-_0200ABE8:
-	ldrb r8, [r2, #1]
-	ldrb sb, [r2, #2]
-	ldrb r1, [r2], #4
-	and r8, r8, #0xf8
-	and sb, sb, #0xf8
-	mov r8, r8, lsl #2
-	and sl, r1, #0xf8
-	orr r1, r8, sb, lsl #7
-	add r7, r7, #1
-	orr r1, r1, sl, asr #3
-	cmp r7, #0x10
-	strh r1, [r4], #2
-	add r6, r6, #1
-	blt _0200ABE8
-_0200AC20:
-	ldr r1, [r0, #4]
-	cmp r6, r1
-	blt _0200AB6C
-	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-_0200AC30:
-	mov r7, #0
-	b _0200ACA0
-_0200AC38:
-	ldrb r1, [r2, #1]
-	ldrb r6, [r2, #2]
-	ldrb r8, [r2], #4
-	mla sl, r1, r5, ip
-	mla r1, r6, r5, lr
-	mla r6, r8, r5, r3
-	mov r8, sl, asr #7
-	add sl, sl, r8, lsr #24
-	mov sb, r1, asr #7
-	mov r8, r6, asr #7
-	add sb, r1, sb, lsr #24
-	add r1, r6, r8, lsr #24
-	mov sl, sl, lsl #8
-	mov r6, sb, lsl #8
-	mov r8, sl, lsr #0x10
-	mov r1, r1, lsl #8
-	mov sb, r6, lsr #0x10
-	and r6, r8, #0xf8
-	mov sl, r1, lsr #0x10
-	mov r1, r6, lsl #2
-	and r8, sb, #0xf8
-	and r6, sl, #0xf8
-	orr r1, r1, r8, lsl #7
-	orr r1, r1, r6, asr #3
-	strh r1, [r4], #2
-	add r7, r7, #1
-_0200ACA0:
-	ldr r1, [r0, #4]
-	cmp r7, r1
-	blt _0200AC38
-	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-	arm_func_end sub_0200A9E4
-
-	arm_func_start sub_0200ACB0
-sub_0200ACB0: ; 0x0200ACB0
-	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
-	sub sp, sp, #4
-	ldr r1, [r0]
-	ldrh r2, [r0, #0xa]
-	ldr r1, [r1]
-	add r5, sp, #0
-	add r6, r0, #0xc
-	mov r4, #4
-_0200ACD0:
-	ldrb r3, [r6], #1
-	subs r4, r4, #1
-	strb r3, [r5], #1
-	bne _0200ACD0
-	cmp r2, #0x100
-	ldr r3, [r0, #0x18]
-	ldr r4, [r0, #0x1c]
-	blo _0200AD20
-	ldrb r2, [sp, #1]
-	ldrb r5, [sp, #2]
-	ldrb r6, [sp]
-	and r2, r2, #0xf8
-	and r5, r5, #0xf8
-	mov r2, r2, lsl #2
-	and r6, r6, #0xf8
-	orr r2, r2, r5, lsl #7
-	orr r2, r2, r6, asr #3
-	mov r2, r2, lsl #0x10
-	mov ip, r2, lsr #0x10
-	b _0200AD94
-_0200AD20:
-	cmp r2, #0
-	moveq ip, #0
-	beq _0200AD94
-	ldrb r5, [sp, #1]
-	ldrb r7, [sp, #2]
-	ldrb ip, [sp]
-	mul r6, r5, r2
-	mul r8, r7, r2
-	mul r7, ip, r2
-	mov r2, r6, asr #7
-	mov r5, r8, asr #7
-	add ip, r6, r2, lsr #24
-	mov r2, r7, asr #7
-	add r5, r8, r5, lsr #24
-	mov ip, ip, lsl #8
-	add r2, r7, r2, lsr #24
-	mov r5, r5, lsl #8
-	mov r6, ip, lsr #0x10
-	mov r2, r2, lsl #8
-	mov r7, r5, lsr #0x10
-	and r5, r6, #0xf8
-	mov r8, r2, lsr #0x10
-	and r6, r7, #0xf8
-	mov r2, r5, lsl #2
-	and r5, r8, #0xf8
-	orr r2, r2, r6, lsl #7
-	orr r2, r2, r5, asr #3
-	mov r2, r2, lsl #0x10
-	mov ip, r2, lsr #0x10
-_0200AD94:
-	cmp r1, #2
-	bne _0200AE14
-	mov lr, #0
-	mov r2, lr
-	mov r1, lr
-	b _0200AE04
-_0200ADAC:
-	mov r5, r2
-_0200ADB0:
-	add r5, r5, #1
-	cmp r5, #0xf0
-	strh ip, [r4], #2
-	add r3, r3, #4
-	add lr, lr, #1
-	blt _0200ADB0
-	mov r5, r1
-_0200ADCC:
-	ldrb r6, [r3, #1]
-	ldrb r7, [r3, #2]
-	ldrb r8, [r3], #4
-	and r6, r6, #0xf8
-	and r7, r7, #0xf8
-	mov r6, r6, lsl #2
-	add r5, r5, #1
-	and r8, r8, #0xf8
-	orr r6, r6, r7, lsl #7
-	orr r6, r6, r8, asr #3
-	cmp r5, #0x10
-	strh r6, [r4], #2
-	add lr, lr, #1
-	blt _0200ADCC
-_0200AE04:
-	ldr r5, [r0, #4]
-	cmp lr, r5
-	blt _0200ADAC
-	b _0200AE30
-_0200AE14:
-	mov r2, #0
-	b _0200AE24
-_0200AE1C:
-	strh ip, [r4], #2
-	add r2, r2, #1
-_0200AE24:
-	ldr r1, [r0, #4]
-	cmp r2, r1
-	blt _0200AE1C
-_0200AE30:
-	add sp, sp, #4
-	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
-	arm_func_end sub_0200ACB0
-
-; https://decomp.me/scratch/xdMiD
-	arm_func_start TransformPaletteDataWithFlushDivideFade
-TransformPaletteDataWithFlushDivideFade: ; 0x0200AE38
-	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
-	sub sp, sp, #0x18
-	mov sl, r0
-	ldr r1, [sl]
-	ldrh r0, [sl, #0xa]
-	ldr fp, [r1]
-	add r3, sp, #0x14
-	add r4, sl, #0xc
-	mov r2, #4
-_0200AE5C:
-	ldrb r1, [r4], #1
-	subs r2, r2, #1
-	strb r1, [r3], #1
-	bne _0200AE5C
-	cmp r0, #0x100
-	ldr r4, [sl, #0x18]
-	ldr r5, [sl, #0x1c]
-	blo _0200AEC0
-	mov r3, #0
-	b _0200AEB0
-_0200AE84:
-	ldrb r0, [r4, #1]
-	ldrb r1, [r4, #2]
-	ldrb r2, [r4], #4
-	and r0, r0, #0xf8
-	and r1, r1, #0xf8
-	mov r0, r0, lsl #2
-	and r2, r2, #0xf8
-	orr r0, r0, r1, lsl #7
-	orr r0, r0, r2, asr #3
-	strh r0, [r5], #2
-	add r3, r3, #1
-_0200AEB0:
-	ldr r0, [sl, #4]
-	cmp r3, r0
-	blt _0200AE84
-	b _0200B0A4
-_0200AEC0:
-	ldrb sb, [sp, #0x14]
-	ldrb r7, [sp, #0x15]
-	ldrb r3, [sp, #0x16]
-	rsb r6, sb, #0xff
-	mul r8, r6, r0
-	rsb r2, r7, #0xff
-	mov ip, r8, asr #7
-	add r8, r8, ip, lsr #24
-	add r8, sb, r8, asr #8
-	rsb r1, r3, #0xff
-	mul r6, r2, r0
-	mul r2, r1, r0
-	mov r0, r6, asr #7
-	mov r1, r2, asr #7
-	add r0, r6, r0, lsr #24
-	add r1, r2, r1, lsr #24
-	add r6, r7, r0, asr #8
-	add r2, r3, r1, asr #8
-	mov r0, r8, lsl #0x10
-	mov r1, r6, lsl #0x10
-	mov r2, r2, lsl #0x10
-	cmp fp, #2
-	mov r8, r0, lsr #0x10
-	mov r6, r1, lsr #0x10
-	mov r7, r2, lsr #0x10
-	mov sb, #0
-	bne _0200B098
-	b _0200B004
-_0200AF30:
-	mov fp, #0
-_0200AF34:
-	ldrb r2, [r4]
-	str r5, [sp]
-	mov r1, #0xff
-	mul r0, r2, r8
-	add r5, r5, #2
-	bl _s32_div_f
-	ldrb r2, [r4, #2]
-	str r0, [sp, #4]
-	mov r1, #0xff
-	mul r0, r2, r7
-	bl _s32_div_f
-	ldrb r2, [r4, #1]
-	str r0, [sp, #8]
-	mov r1, #0xff
-	mul r0, r2, r6
-	bl _s32_div_f
-	ldr r1, [sp, #4]
-	mov r0, r0, lsl #0x10
-	mov r1, r1, lsl #0x10
-	mov r1, r1, lsr #0x10
-	and r2, r1, #0xf8
-	ldr r1, [sp, #8]
-	mov r0, r0, lsr #0x10
-	mov r1, r1, lsl #0x10
-	mov r1, r1, lsr #0x10
-	and r0, r0, #0xf8
-	add fp, fp, #1
-	and r1, r1, #0xf8
-	mov r0, r0, lsl #2
-	orr r0, r0, r1, lsl #7
-	orr r1, r0, r2, asr #3
-	ldr r0, [sp]
-	add r4, r4, #4
-	strh r1, [r0]
-	cmp fp, #0xf0
-	add sb, sb, #1
-	blt _0200AF34
-	mov r1, #0
-_0200AFCC:
-	ldrb r2, [r4, #1]
-	ldrb r3, [r4, #2]
-	ldrb r0, [r4], #4
-	and r2, r2, #0xf8
-	and r3, r3, #0xf8
-	mov r2, r2, lsl #2
-	and fp, r0, #0xf8
-	orr r0, r2, r3, lsl #7
-	add r1, r1, #1
-	orr r0, r0, fp, asr #3
-	cmp r1, #0x10
-	strh r0, [r5], #2
-	add sb, sb, #1
-	blt _0200AFCC
-_0200B004:
-	ldr r0, [sl, #4]
-	cmp sb, r0
-	blt _0200AF30
-	b _0200B0A4
-_0200B014:
-	ldrb r2, [r4]
-	mov fp, r5
-	mov r1, #0xff
-	mul r0, r2, r8
-	add r5, r5, #2
-	bl _s32_div_f
-	ldrb r2, [r4, #2]
-	str r0, [sp, #0xc]
-	mov r1, #0xff
-	mul r0, r2, r7
-	bl _s32_div_f
-	ldrb r2, [r4, #1]
-	str r0, [sp, #0x10]
-	mov r1, #0xff
-	mul r0, r2, r6
-	bl _s32_div_f
-	ldr r1, [sp, #0xc]
-	mov r0, r0, lsl #0x10
-	mov r1, r1, lsl #0x10
-	mov r1, r1, lsr #0x10
-	and r2, r1, #0xf8
-	ldr r1, [sp, #0x10]
-	mov r0, r0, lsr #0x10
-	mov r1, r1, lsl #0x10
-	mov r1, r1, lsr #0x10
-	and r0, r0, #0xf8
-	and r1, r1, #0xf8
-	mov r0, r0, lsl #2
-	orr r0, r0, r1, lsl #7
-	orr r0, r0, r2, asr #3
-	strh r0, [fp]
-	add r4, r4, #4
-	add sb, sb, #1
-_0200B098:
-	ldr r0, [sl, #4]
-	cmp sb, r0
-	blt _0200B014
-_0200B0A4:
-	add sp, sp, #0x18
-	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-	arm_func_end TransformPaletteDataWithFlushDivideFade
-
-	arm_func_start sub_0200B0AC
-sub_0200B0AC: ; 0x0200B0AC
-	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
-	sub sp, sp, #0x18
-	mov sl, r0
-	ldr r0, [sl]
-	ldrh r3, [sl, #0xa]
-	ldr r2, [r0]
-	add r4, sp, #0x14
-	add r5, sl, #0xc
-	mov r1, #4
-_0200B0D0:
-	ldrb r0, [r5], #1
-	subs r1, r1, #1
-	strb r0, [r4], #1
-	bne _0200B0D0
-	ldrb r0, [sp, #0x14]
-	ldrb r7, [sp, #0x15]
-	cmp r3, #0x100
-	movhs r3, #0x100
-	ldrb r5, [sp, #0x16]
-	mul r1, r0, r3
-	mul r0, r7, r3
-	mul r8, r5, r3
-	mov r3, r1, asr #7
-	mov r5, r0, asr #7
-	add r1, r1, r3, lsr #24
-	add r3, r0, r5, lsr #24
-	mov r0, r1, lsl #8
-	mov r7, r8, asr #7
-	add r5, r8, r7, lsr #24
-	mov r1, r3, lsl #8
-	mov r3, r5, lsl #8
-	ldr r4, [sl, #0x18]
-	ldr r6, [sl, #0x1c]
-	cmp r2, #2
-	mov sb, r0, lsr #0x10
-	mov r7, r1, lsr #0x10
-	mov r8, r3, lsr #0x10
-	mov r5, #0
-	bne _0200B2B0
-	b _0200B21C
-_0200B148:
-	mov fp, #0
-_0200B14C:
-	ldrb r2, [r4]
-	str r6, [sp]
-	mov r1, #0xff
-	mul r0, r2, sb
-	add r6, r6, #2
-	bl _s32_div_f
-	ldrb r2, [r4, #2]
-	str r0, [sp, #4]
-	mov r1, #0xff
-	mul r0, r2, r8
-	bl _s32_div_f
-	ldrb r2, [r4, #1]
-	str r0, [sp, #8]
-	mov r1, #0xff
-	mul r0, r2, r7
-	bl _s32_div_f
-	ldr r1, [sp, #4]
-	mov r0, r0, lsl #0x10
-	mov r1, r1, lsl #0x10
-	mov r1, r1, lsr #0x10
-	and r2, r1, #0xf8
-	ldr r1, [sp, #8]
-	mov r0, r0, lsr #0x10
-	mov r1, r1, lsl #0x10
-	mov r1, r1, lsr #0x10
-	and r0, r0, #0xf8
-	add fp, fp, #1
-	and r1, r1, #0xf8
-	mov r0, r0, lsl #2
-	orr r0, r0, r1, lsl #7
-	orr r1, r0, r2, asr #3
-	ldr r0, [sp]
-	add r4, r4, #4
-	strh r1, [r0]
-	cmp fp, #0xf0
-	add r5, r5, #1
-	blt _0200B14C
-	mov r1, #0
-_0200B1E4:
-	ldrb r2, [r4, #1]
-	ldrb r3, [r4, #2]
-	ldrb r0, [r4], #4
-	and r2, r2, #0xf8
-	and r3, r3, #0xf8
-	mov r2, r2, lsl #2
-	and fp, r0, #0xf8
-	orr r0, r2, r3, lsl #7
-	add r1, r1, #1
-	orr r0, r0, fp, asr #3
-	cmp r1, #0x10
-	strh r0, [r6], #2
-	add r5, r5, #1
-	blt _0200B1E4
-_0200B21C:
-	ldr r0, [sl, #4]
-	cmp r5, r0
-	blt _0200B148
-	b _0200B2BC
-_0200B22C:
-	ldrb r2, [r4]
-	mov fp, r6
-	mov r1, #0xff
-	mul r0, r2, sb
-	add r6, r6, #2
-	bl _s32_div_f
-	ldrb r2, [r4, #2]
-	str r0, [sp, #0xc]
-	mov r1, #0xff
-	mul r0, r2, r8
-	bl _s32_div_f
-	ldrb r2, [r4, #1]
-	str r0, [sp, #0x10]
-	mov r1, #0xff
-	mul r0, r2, r7
-	bl _s32_div_f
-	ldr r1, [sp, #0xc]
-	mov r0, r0, lsl #0x10
-	mov r1, r1, lsl #0x10
-	mov r1, r1, lsr #0x10
-	and r2, r1, #0xf8
-	ldr r1, [sp, #0x10]
-	mov r0, r0, lsr #0x10
-	mov r1, r1, lsl #0x10
-	mov r1, r1, lsr #0x10
-	and r0, r0, #0xf8
-	and r1, r1, #0xf8
-	mov r0, r0, lsl #2
-	orr r0, r0, r1, lsl #7
-	orr r0, r0, r2, asr #3
-	strh r0, [fp]
-	add r4, r4, #4
-	add r5, r5, #1
-_0200B2B0:
-	ldr r0, [sl, #4]
-	cmp r5, r0
-	blt _0200B22C
-_0200B2BC:
-	add sp, sp, #0x18
-	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
-	arm_func_end sub_0200B0AC
-
-	arm_func_start sub_0200B2C4
-sub_0200B2C4: ; 0x0200B2C4
-	stmdb sp!, {r4, lr}
-	mov r4, r0
-	strb r1, [r4]
-	mov r0, #0
-	strb r0, [r4, #1]
-	str r3, [r4, #0x10]
-	str r0, [r4, #4]
-	str r0, [r4, #8]
-	str r2, [r4, #0xc]
-	ldrb r2, [r4]
-	ldr r0, _0200B310 ; =_02092AD8
-	ldr r1, [sp, #8]
-	ldr r0, [r0, r2, lsl #2]
-	str r0, [r4, #0x14]
-	bl MemAlloc
-	str r0, [r4, #0x18]
-	mov r0, r4
-	bl sub_0200B3D4
-	ldmia sp!, {r4, pc}
-	.align 2, 0
-_0200B310: .word _02092AD8
-	arm_func_end sub_0200B2C4
-
-	arm_func_start sub_0200B314
-sub_0200B314: ; 0x0200B314
-	stmdb sp!, {r4, lr}
-	mov r4, r0
-	ldr r0, [r4, #0x18]
-	bl MemFree
-	mov r0, #0
-	str r0, [r4, #0x18]
-	ldmia sp!, {r4, pc}
-	arm_func_end sub_0200B314
-
-	arm_func_start sub_0200B330
-sub_0200B330: ; 0x0200B330
-	mov r1, #1
-	strb r1, [r0, #1]
-	bx lr
-	arm_func_end sub_0200B330
-
-	arm_func_start sub_0200B33C
-sub_0200B33C: ; 0x0200B33C
-	bx lr
-	arm_func_end sub_0200B33C
-
-	arm_func_start sub_0200B340
-sub_0200B340: ; 0x0200B340
-	stmdb sp!, {r3, r4, r5, r6, lr}
-	sub sp, sp, #4
-	mov r4, r0
-	ldr r0, _0200B3BC ; =0x000001FF
-	ldmib r4, {r1, r2}
-	and r1, r1, r0
-	mov r2, r2, lsl #0x17
-	ldr r0, [r4, #0xc]
-	orr r1, r1, r2, lsr #7
-	str r1, [r0]
-	ldrb r0, [r4, #1]
-	cmp r0, #0
-	beq _0200B3B4
-	ldr r5, [r4, #0x18]
-	ldr r1, [r4, #0x14]
-	mov r0, r5
-	ldr r6, [r4, #0x10]
-	bl sub_0207A2DC
-	ldr ip, [r4, #0x14]
-	mov r2, r6
-	mov r3, r5
-	mov r0, #3
-	mov r1, #1
-	str ip, [sp]
-	bl sub_02005E10
-	mov r0, #3
-	bl sub_02005D30
-	mov r0, #0
-	strb r0, [r4, #1]
-_0200B3B4:
-	add sp, sp, #4
-	ldmia sp!, {r3, r4, r5, r6, pc}
-	.align 2, 0
-_0200B3BC: .word 0x000001FF
-	arm_func_end sub_0200B340
-
-	arm_func_start sub_0200B3C0
-sub_0200B3C0: ; 0x0200B3C0
-	ldr r2, [r1]
-	ldr r1, [r1, #4]
-	str r2, [r0, #4]
-	str r1, [r0, #8]
-	bx lr
-	arm_func_end sub_0200B3C0
-
-	arm_func_start sub_0200B3D4
-sub_0200B3D4: ; 0x0200B3D4
-	mov r3, #0
-	ldr ip, [r0, #0x18]
-	mov r2, r3
-	b _0200B3EC
-_0200B3E4:
-	strh r2, [ip], #2
-	add r3, r3, #1
-_0200B3EC:
-	ldr r1, [r0, #0x14]
-	cmp r3, r1, lsr #1
-	blo _0200B3E4
-	bx lr
-	arm_func_end sub_0200B3D4
-
-	arm_func_start sub_0200B3FC
-sub_0200B3FC: ; 0x0200B3FC
-	ldrb r3, [r0]
-	cmp r3, #3
-	addls pc, pc, r3, lsl #2
-	bx lr
-_0200B40C: ; jump table
-	b _0200B41C ; case 0
-	b _0200B438 ; case 1
-	b _0200B470 ; case 2
-	b _0200B48C ; case 3
-_0200B41C:
-	ldr ip, [r0, #0x18]
-	ldr r0, [r1, #4]
-	ldr r3, [r1]
-	add r0, ip, r0, lsl #6
-	mov r1, r3, lsl #1
-	strh r2, [r1, r0]
-	bx lr
-_0200B438:
-	ldr ip, [r1]
-	ldr r3, [r0, #0x18]
-	cmp ip, #0x20
-	ldrlt r0, [r1, #4]
-	movlt r1, ip, lsl #1
-	addlt r0, r3, r0, lsl #6
-	strlth r2, [r1, r0]
-	bxlt lr
-	ldr r0, [r1, #4]
-	add r0, r3, r0, lsl #6
-	add r0, r0, ip, lsl #1
-	add r0, r0, #0x700
-	strh r2, [r0, #0xc0]
-	bx lr
-_0200B470:
-	ldr ip, [r0, #0x18]
-	ldr r0, [r1, #4]
-	ldr r3, [r1]
-	add r0, ip, r0, lsl #6
-	mov r1, r3, lsl #1
-	strh r2, [r1, r0]
-	bx lr
-_0200B48C:
-	ldr ip, [r1, #4]
-	cmp ip, #0x40
-	bge _0200B4C4
-	ldr r1, [r1]
-	ldr r0, [r0, #0x18]
-	cmp r1, #0x20
-	movlt r1, r1, lsl #1
-	addlt r0, r0, ip, lsl #6
-	strlth r2, [r1, r0]
-	addge r0, r0, ip, lsl #6
-	addge r0, r0, r1, lsl #1
-	addge r0, r0, #0x700
-	strgeh r2, [r0, #0xc0]
-	bx lr
-_0200B4C4:
-	ldr r3, [r1]
-	ldr r1, [r0, #0x18]
-	cmp r3, #0x20
-	subge r0, ip, #0x20
-	addge r0, r1, r0, lsl #6
-	addge r0, r0, r3, lsl #1
-	addge r0, r0, #0x1700
-	strgeh r2, [r0, #0xc0]
-	bxge lr
-	sub r0, ip, #0x20
-	add r0, r1, r0, lsl #6
-	add r0, r0, r3, lsl #1
-	add r0, r0, #0x1000
-	strh r2, [r0]
-	bx lr
-	arm_func_end sub_0200B3FC
-
-	arm_func_start sub_0200B500
-sub_0200B500: ; 0x0200B500
-	ldr r0, [r0, #0x18]
-	bx lr
-	arm_func_end sub_0200B500
-
-	arm_func_start sub_0200B508
-sub_0200B508: ; 0x0200B508
-	stmdb sp!, {r3, r4, r5, lr}
-	mov r5, r0
-	mov r4, r1
-	str r4, [r5]
-	str r2, [r5, #4]
-	mov r0, #0
-	strb r0, [r5, #0x14]
-	str r3, [r5, #0x18]
-	cmp r2, #0
-	strle r0, [r5, #0xc]
-	ble _0200B550
-	ldr r1, [sp, #0x10]
-	mov r0, r2, lsl #1
-	bl MemAlloc
-	str r0, [r5, #0xc]
-	ldr r1, [sp, #0x10]
-	mov r0, r4, lsl #3
-	bl MemAlloc
-_0200B550:
-	ldr r1, [sp, #0x10]
-	str r0, [r5, #0x10]
-	mov r0, r4, lsl #3
-	bl MemAlloc
-	str r0, [r5, #0x1c]
-	mov r0, r5
-	bl sub_0200B67C
-	ldmia sp!, {r3, r4, r5, pc}
-	arm_func_end sub_0200B508
-
-	arm_func_start sub_0200B570
-sub_0200B570: ; 0x0200B570
-	mov r1, #1
-	strb r1, [r0, #0x14]
-	bx lr
-	arm_func_end sub_0200B570
-
-	arm_func_start sub_0200B57C
-sub_0200B57C: ; 0x0200B57C
-	stmdb sp!, {r3, r4, r5, lr}
-	ldr ip, [r0, #8]
-	cmp ip, #0
-	ldmleia sp!, {r3, r4, r5, pc}
-	ldr r3, [r0]
-	ldr r2, [r0, #0x1c]
-	sub r1, r3, #1
-	add lr, r2, r1, lsl #3
-	sub r3, r3, ip
-	ldr r4, [r0, #0xc]
-	mov r2, #0x200
-	mov r1, #0
-	b _0200B5C4
-_0200B5B0:
-	strh r2, [lr]
-	strh r1, [lr, #2]
-	strh r1, [lr, #4]
-	sub lr, lr, #8
-	sub r3, r3, #1
-_0200B5C4:
-	cmp r3, #0
-	bgt _0200B5B0
-	ldr r5, [r0, #4]
-	mvn r3, #0
-	b _0200B61C
-_0200B5D8:
-	ldrsh ip, [r4]
-	strh r3, [r4], #2
-	b _0200B610
-_0200B5E4:
-	ldr r2, [r0, #0x10]
-	mov r1, ip, lsl #3
-	ldrh r1, [r2, r1]
-	add r2, r2, ip, lsl #3
-	strh r1, [lr]
-	ldrh r1, [r2, #2]
-	strh r1, [lr, #2]
-	ldrh r1, [r2, #4]
-	strh r1, [lr, #4]
-	ldrsh ip, [r2, #6]
-	sub lr, lr, #8
-_0200B610:
-	cmp ip, #0
-	bge _0200B5E4
-	sub r5, r5, #1
-_0200B61C:
-	cmp r5, #0
-	bgt _0200B5D8
-	mov r1, #0
-	str r1, [r0, #8]
-	ldmia sp!, {r3, r4, r5, pc}
-	arm_func_end sub_0200B57C
-
-	arm_func_start sub_0200B630
-sub_0200B630: ; 0x0200B630
-	stmdb sp!, {r4, r5, r6, lr}
-	mov r6, r0
-	ldrb r0, [r6, #0x14]
-	cmp r0, #0
-	ldmeqia sp!, {r4, r5, r6, pc}
-	ldr r4, [r6, #0x1c]
-	ldr r1, [r6]
-	mov r0, r4
-	mov r1, r1, lsl #3
-	ldr r5, [r6, #0x18]
-	bl sub_0207A2DC
-	ldr r2, [r6]
-	mov r0, r5
-	mov r1, r4
-	mov r2, r2, lsl #3
-	bl Memcpy32
-	mov r0, #0
-	strb r0, [r6, #0x14]
-	ldmia sp!, {r4, r5, r6, pc}
-	arm_func_end sub_0200B630
-
-	arm_func_start sub_0200B67C
-sub_0200B67C: ; 0x0200B67C
-	stmdb sp!, {r3, lr}
-	ldr ip, [r0, #0x1c]
-	mov lr, #0
-	str lr, [r0, #8]
-	mov r3, #0x200
-	mov r2, lr
-	b _0200B6B0
-_0200B698:
-	strh r3, [ip]
-	strh r2, [ip, #2]
-	strh r2, [ip, #4]
-	strh r2, [ip, #6]
-	add ip, ip, #8
-	add lr, lr, #1
-_0200B6B0:
-	ldr r1, [r0]
-	cmp lr, r1
-	blt _0200B698
-	ldr r1, [r0, #4]
-	cmp r1, #0
-	ldmleia sp!, {r3, pc}
-	ldr r3, [r0, #0xc]
-	mov ip, #0
-	mvn r2, #0
-	b _0200B6E0
-_0200B6D8:
-	strh r2, [r3], #2
-	add ip, ip, #1
-_0200B6E0:
-	ldr r1, [r0, #4]
-	cmp ip, r1
-	blt _0200B6D8
-	ldmia sp!, {r3, pc}
-	arm_func_end sub_0200B67C
-
-	arm_func_start sub_0200B6F0
-sub_0200B6F0: ; 0x0200B6F0
-	stmdb sp!, {r4, lr}
-	ldr r4, [r0, #8]
-	ldr r3, [r0]
-	cmp r4, r3
-	ldmgeia sp!, {r4, pc}
-	cmp r2, #0
-	movlt r2, #0
-	blt _0200B71C
-	ldr r3, [r0, #4]
-	cmp r2, r3
-	subge r2, r3, #1
-_0200B71C:
-	ldrh r3, [r1]
-	ldr lr, [r0, #0x10]
-	mov ip, r4, lsl #3
-	strh r3, [lr, ip]
-	ldrh ip, [r1, #2]
-	add lr, lr, r4, lsl #3
-	mov r3, r2, lsl #1
-	strh ip, [lr, #2]
-	ldrh r1, [r1, #4]
-	strh r1, [lr, #4]
-	ldr r1, [r0, #0xc]
-	ldrsh r1, [r1, r3]
-	strh r1, [lr, #6]
-	ldr r2, [r0, #8]
-	add r1, r2, #1
-	str r1, [r0, #8]
-	ldr r0, [r0, #0xc]
-	strh r2, [r0, r3]
-	ldmia sp!, {r4, pc}
-	arm_func_end sub_0200B6F0
-
-	arm_func_start sub_0200B768
-sub_0200B768: ; 0x0200B768
-#ifdef EUROPE
-	stmdb sp!, {r4, lr}
-	sub sp, sp, #8
-	bl GetLanguage
-	ldr r1, _0200B7E4 ; =_020AFF38_EU
-	mov r4, r0
-	ldrsb r0, [r1]
-	cmp r0, r4
-	beq _0200B7DC
-	ldr r1, _0200B7E8 ; =_020AFF3C_EU
-	add r0, sp, #0
-	ldr r1, [r1, r4, lsl #2]
-	mov r2, #1
-	bl LoadFileFromRom
-	ldr r2, _0200B7EC ; =0x04000208
-	mov r1, #0
-	ldrh r0, [r2]
-	strh r1, [r2]
-	ldr r0, _0200B7F0 ; =CART_REMOVED_IMG_DATA
-	ldr r1, [sp]
-	ldr r2, [sp, #4]
-	bl MemcpySimple
-	ldr r2, _0200B7EC ; =0x04000208
-	add r0, sp, #0
-	ldrh r1, [r2]
-	mov r1, #1
-	strh r1, [r2]
-	bl UnloadFile
-	ldr r0, _0200B7E4 ; =_020AFF38_EU
-	strb r4, [r0]
-_0200B7DC:
-	add sp, sp, #8
-	ldmia sp!, {r4, pc}
-	.align 2, 0
-_0200B7E4: .word _020AFF38_EU
-_0200B7E8: .word _020AFF3C_EU
-_0200B7EC: .word 0x04000208
-_0200B7F0: .word CART_REMOVED_IMG_DATA
-#else
-	bx lr
-#endif
-	arm_func_end sub_0200B768
-
-	arm_func_start sub_0200B76C
-sub_0200B76C: ; 0x0200B76C
-	stmdb sp!, {r4, lr}
-	bl GX_DispOff
-	ldr r2, _0200B874 ; =0x04001000
-	mov r0, #3
-	ldr r1, [r2]
-	bic r1, r1, #0x10000
-	str r1, [r2]
-	bl sub_0207C164
-	bl GX_DisableBankForBG
-	bl GX_DisableBankForOBJ
-	bl GX_DisableBankForBGExtPltt
-	bl GX_DisableBankForOBJExtPltt
-	bl GX_DisableBankForTex
-	bl GX_DisableBankForTexPltt
-	bl GX_DisableBankForSubBG
-	bl GX_DisableBankForSubOBJ
-	bl GX_DisableBankForSubBGExtPltt
-	ldr r0, _0200B878 ; =0x000001FF
-	bl GX_SetBankForLCDC
-	mov r0, #0
-	mov r1, #0x6800000
-	mov r2, #0xa4000
-	bl ArrayFill32Fast
-	mov r0, #0xc0
-	mov r1, #0x7000000
-	mov r2, #0x400
-	bl ArrayFill32Fast
-	mov r0, #0
-	mov r1, #0x5000000
-	mov r2, #0x400
-	bl ArrayFill32Fast
-	mov r0, #0xc0
-	ldr r1, _0200B87C ; =0x07000400
-	mov r2, #0x400
-	bl ArrayFill32Fast
-	mov r0, #0
-	ldr r1, _0200B880 ; =0x05000400
-	mov r2, #0x400
-	bl ArrayFill32Fast
-	bl sub_02019304
-	mov r4, r0
-	ldr r1, _0200B884 ; =CART_REMOVED_IMG_DATA
-	mov r2, #0xc000
-	bl MemcpySimple
-	mov r2, r4
-	ldr r0, _0200B888 ; =0x06806000
-	mov r1, #0xc000
-	bl DecompressAtFromMemoryPointer
-	mov r0, #2
-	mov r1, #0
-	mov r2, r1
-	bl GX_SetGraphicsMode
-	mov r0, #0
-	bl GXS_SetGraphicsMode
-	ldr r0, _0200B88C ; =0x0400006C
-	mov r1, #0
-	bl GXx_SetMasterBrightness_
-	ldr r0, _0200B890 ; =0x0400106C
-	mov r1, #0
-	bl GXx_SetMasterBrightness_
-	bl GX_DispOn
-	ldr r1, _0200B874 ; =0x04001000
-	ldr r0, [r1]
-	orr r0, r0, #0x10000
-	str r0, [r1]
-	ldmia sp!, {r4, pc}
-	.align 2, 0
-_0200B874: .word 0x04001000
-_0200B878: .word 0x000001FF
-_0200B87C: .word 0x07000400
-_0200B880: .word 0x05000400
-_0200B884: .word CART_REMOVED_IMG_DATA
-_0200B888: .word 0x06806000
-_0200B88C: .word 0x0400006C
-_0200B890: .word 0x0400106C
-	arm_func_end sub_0200B76C
-
-	arm_func_start sub_0200B894
-sub_0200B894: ; 0x0200B894
-	stmdb sp!, {r3, r4, r5, lr}
-	mov r5, r0
-	mov r4, r1
-	add r0, r5, #0x1c
-	bl sub_0200A2CC
-	mov r0, r5
-	mov r1, r4
-	bl sub_0200B8D4
-	ldmia sp!, {r3, r4, r5, pc}
-	arm_func_end sub_0200B894
-
-	arm_func_start sub_0200B8B8
-sub_0200B8B8: ; 0x0200B8B8
-	stmdb sp!, {r4, lr}
-	mov r4, r0
-	mov r1, #0
-	bl sub_0200B8D4
-	add r0, r4, #0x1c
-	bl sub_0200A2F4
-	ldmia sp!, {r4, pc}
-	arm_func_end sub_0200B8B8
-
-	arm_func_start sub_0200B8D4
-sub_0200B8D4: ; 0x0200B8D4
-	ldr r2, _0200B904 ; =_02094AE8
-	mov r1, r1, lsl #1
-	mov r3, #0
-	ldrsh r1, [r2, r1]
-	str r3, [r0]
-	mov r2, #1
-	str r2, [r0, #4]
-	strh r1, [r0, #0x10]
-	strh r1, [r0, #0x14]
-	str r3, [r0, #8]
-	str r3, [r0, #0xc]
-	bx lr
-	.align 2, 0
-_0200B904: .word _02094AE8
-	arm_func_end sub_0200B8D4
-
-	arm_func_start sub_0200B908
-sub_0200B908: ; 0x0200B908
-	ldr ip, _0200B914 ; =_0200A314
-	add r0, r0, #0x1c
-	bx ip
-	.align 2, 0
-_0200B914: .word _0200A314
-	arm_func_end sub_0200B908
-
-	arm_func_start sub_0200B918
-sub_0200B918: ; 0x0200B918
-	ldr ip, _0200B924 ; =_0200A344
-	add r0, r0, #0x1c
-	bx ip
-	.align 2, 0
-_0200B924: .word _0200A344
-	arm_func_end sub_0200B918
-
-	arm_func_start sub_0200B928
-sub_0200B928: ; 0x0200B928
-	mov r2, #0
-	strh r2, [r0, #0x10]
-	cmp r1, #0
-	ldrnesh r2, [r0, #0x14]
-	cmpne r2, #0
-	bne _0200B958
-	mov r2, #0
-	strh r2, [r0, #0x14]
-	mov r1, #1
-	stmib r0, {r1, r2}
-	str r2, [r0, #0xc]
-	bx lr
-_0200B958:
-	cmp r1, #0
-	movlt r1, #0x1e
-	cmp r2, #0
-	movlt r2, #2
-	strlt r2, [r0, #4]
-	ldrltsh r2, [r0, #0x14]
-	rsblt r2, r2, #0
-	movge r2, #3
-	strge r2, [r0, #4]
-	ldrgesh r2, [r0, #0x14]
-	strh r2, [r0, #0x12]
-	str r1, [r0, #8]
-	str r1, [r0, #0xc]
-	bx lr
-	arm_func_end sub_0200B928
-
-	arm_func_start UpdateFadeStatus
-UpdateFadeStatus: ; 0x0200B990
-	ldr r3, _0200BA00 ; =_02094AE8
-	mov ip, r1, lsl #1
-	ldrsh r3, [r3, ip]
-	cmp r2, #0
-	strh r3, [r0, #0x10]
-	ldrnesh r3, [r0, #0x10]
-	ldrnesh ip, [r0, #0x14]
-	cmpne ip, r3
-	bne _0200B9D4
-	ldrsh r3, [r0, #0x10]
-	mov r2, #1
-	mov r1, #0
-	strh r3, [r0, #0x14]
-	str r2, [r0, #4]
-	str r1, [r0, #8]
-	str r1, [r0, #0xc]
-	bx lr
-_0200B9D4:
-	cmp r2, #0
-	movlt r2, #0x1e
-	cmp r3, #0
-	sublt r3, ip, r3
-	subge r3, r3, ip
-	strh r3, [r0, #0x12]
-	ldr r3, _0200BA04 ; =_02094AF0
-	ldr r1, [r3, r1, lsl #2]
-	stmib r0, {r1, r2}
-	str r2, [r0, #0xc]
-	bx lr
-	.align 2, 0
-_0200BA00: .word _02094AE8
-_0200BA04: .word _02094AF0
-	arm_func_end UpdateFadeStatus
-
-	arm_func_start HandleFades
-HandleFades: ; 0x0200BA08
-	stmdb sp!, {r4, lr}
-	mov r4, r0
-	ldr r0, [r4, #4]
-	cmp r0, #5
-	addls pc, pc, r0, lsl #2
-	b _0200BB58
-_0200BA20: ; jump table
-	b _0200BB50 ; case 0
-	b _0200BB40 ; case 1
-	b _0200BA38 ; case 2
-	b _0200BA80 ; case 3
-	b _0200BAC8 ; case 4
-	b _0200BB04 ; case 5
-_0200BA38:
-	ldr r0, [r4, #8]
-	sub r2, r0, #1
-	str r2, [r4, #8]
-	cmp r2, #0
-	ldrlesh r1, [r4, #0x10]
-	movle r0, #0
-	strleh r1, [r4, #0x14]
-	strle r0, [r4, #4]
-	ble _0200BA78
-	ldrsh r0, [r4, #0x12]
-	ldr r1, [r4, #0xc]
-	mul r0, r2, r0
-	bl _s32_div_f
-	ldrsh r1, [r4, #0x10]
-	sub r0, r1, r0
-	strh r0, [r4, #0x14]
-_0200BA78:
-	mov r0, #1
-	ldmia sp!, {r4, pc}
-_0200BA80:
-	ldr r0, [r4, #8]
-	sub r2, r0, #1
-	str r2, [r4, #8]
-	cmp r2, #0
-	ldrlesh r1, [r4, #0x10]
-	movle r0, #0
-	strleh r1, [r4, #0x14]
-	strle r0, [r4, #4]
-	ble _0200BAC0
-	ldrsh r0, [r4, #0x12]
-	ldr r1, [r4, #0xc]
-	mul r0, r2, r0
-	bl _s32_div_f
-	ldrsh r1, [r4, #0x10]
-	add r0, r1, r0
-	strh r0, [r4, #0x14]
-_0200BAC0:
-	mov r0, #1
-	ldmia sp!, {r4, pc}
-_0200BAC8:
-	ldr r0, [r4, #8]
-	sub r2, r0, #1
-	str r2, [r4, #8]
-	cmp r2, #0
-	ldrlesh r0, [r4, #0x10]
-	ble _0200BAF8
-	ldrsh r0, [r4, #0x12]
-	ldr r1, [r4, #0xc]
-	mul r0, r2, r0
-	bl _s32_div_f
-	ldrsh r1, [r4, #0x10]
-	sub r0, r1, r0
-_0200BAF8:
-	strh r0, [r4, #0x14]
-	mov r0, #1
-	ldmia sp!, {r4, pc}
-_0200BB04:
-	ldr r0, [r4, #8]
-	sub r2, r0, #1
-	str r2, [r4, #8]
-	cmp r2, #0
-	ldrlesh r0, [r4, #0x10]
-	ble _0200BB34
-	ldrsh r0, [r4, #0x12]
-	ldr r1, [r4, #0xc]
-	mul r0, r2, r0
-	bl _s32_div_f
-	ldrsh r1, [r4, #0x10]
-	add r0, r1, r0
-_0200BB34:
-	strh r0, [r4, #0x14]
-	mov r0, #1
-	ldmia sp!, {r4, pc}
-_0200BB40:
-	mov r0, #0
-	str r0, [r4, #4]
-	mov r0, #1
-	ldmia sp!, {r4, pc}
-_0200BB50:
-	mov r0, #0
-	ldmia sp!, {r4, pc}
-_0200BB58:
-	mov r0, #0
-	ldmia sp!, {r4, pc}
-	arm_func_end HandleFades
-
-	arm_func_start sub_0200BB60
-sub_0200BB60: ; 0x0200BB60
-	ldr ip, _0200BB70 ; =sub_0200B928
-	mov r2, #1
-	str r2, [r0]
-	bx ip
-	.align 2, 0
-_0200BB70: .word sub_0200B928
-	arm_func_end sub_0200BB60
-
-	arm_func_start sub_0200BB74
-sub_0200BB74: ; 0x0200BB74
-	ldr ip, _0200BB84 ; =UpdateFadeStatus
-	mov r3, #1
-	str r3, [r0]
-	bx ip
-	.align 2, 0
-_0200BB84: .word UpdateFadeStatus
-	arm_func_end sub_0200BB74
-
-	arm_func_start sub_0200BB88
-sub_0200BB88: ; 0x0200BB88
-	mov r2, #1
-	str r2, [r0]
-	mov r2, #0
-	strh r2, [r0, #0x10]
-	cmp r1, #0
-	ldrnesh r2, [r0, #0x14]
-	cmpne r2, #0
-	bne _0200BBC0
-	mov r2, #0
-	strh r2, [r0, #0x14]
-	mov r1, #1
-	stmib r0, {r1, r2}
-	str r2, [r0, #0xc]
-	bx lr
-_0200BBC0:
-	cmp r1, #0
-	movlt r1, #0x1e
-	cmp r2, #0
-	movlt r2, #4
-	strlt r2, [r0, #4]
-	ldrltsh r2, [r0, #0x14]
-	rsblt r2, r2, #0
-	movge r2, #5
-	strge r2, [r0, #4]
-	ldrgesh r2, [r0, #0x14]
-	strh r2, [r0, #0x12]
-	str r1, [r0, #8]
-	str r1, [r0, #0xc]
-	bx lr
-	arm_func_end sub_0200BB88
-
-	arm_func_start sub_0200BBF8
-sub_0200BBF8: ; 0x0200BBF8
-	mov ip, #1
-	cmp r1, #0
-	movlt r1, #0x1e
-	str ip, [r0]
-	cmp r2, r3
-	movgt ip, #3
-	strgt ip, [r0, #4]
-	subgt ip, r2, r3
-	strgth ip, [r0, #0x12]
-	bgt _0200BC40
-	movlt ip, #2
-	strlt ip, [r0, #4]
-	sublt ip, r3, r2
-	strlth ip, [r0, #0x12]
-	movge ip, #1
-	strge ip, [r0, #4]
-	movge ip, #0
-	strgeh ip, [r0, #0x12]
-_0200BC40:
-	str r1, [r0, #8]
-	str r1, [r0, #0xc]
-	strh r2, [r0, #0x14]
-	strh r3, [r0, #0x10]
-	bx lr
-	arm_func_end sub_0200BBF8
-
-	arm_func_start sub_0200BC54
-sub_0200BC54: ; 0x0200BC54
-	ldr ip, _0200BC5C ; =HandleFades
-	bx ip
-	.align 2, 0
-_0200BC5C: .word HandleFades
-	arm_func_end sub_0200BC54
-
-	arm_func_start sub_0200BC60
-sub_0200BC60: ; 0x0200BC60
-	stmdb sp!, {r4, lr}
-	str r1, [r0]
-	add r4, r0, #0x16
-	mov lr, #4
-_0200BC70:
-	ldrb ip, [r3], #1
-	subs lr, lr, #1
-	strb ip, [r4], #1
-	bne _0200BC70
-	cmp r1, #3
-	cmpne r1, #5
-	cmpne r1, #7
-	cmpne r1, #9
-	cmpne r1, #0xb
-	bne _0200BCA4
-	mov r1, #2
-	bl UpdateFadeStatus
-	ldmia sp!, {r4, pc}
-_0200BCA4:
-	mov r1, r2
-	bl sub_0200B928
-	ldmia sp!, {r4, pc}
-	arm_func_end sub_0200BC60
-
-	arm_func_start sub_0200BCB0
-sub_0200BCB0: ; 0x0200BCB0
-	stmdb sp!, {r4, lr}
-	str r1, [r0]
-	add r4, r0, #0x16
-	mov lr, #4
-_0200BCC0:
-	ldrb ip, [r3], #1
-	subs lr, lr, #1
-	strb ip, [r4], #1
-	bne _0200BCC0
-	cmp r1, #1
-	bne _0200BCE4
-	mov r1, #1
-	bl UpdateFadeStatus
-	ldmia sp!, {r4, pc}
-_0200BCE4:
-	cmp r1, #3
-	cmpne r1, #5
-	cmpne r1, #7
-	cmpne r1, #9
-	cmpne r1, #0xb
-	bne _0200BD08
-	mov r1, r2
-	bl sub_0200B928
-	ldmia sp!, {r4, pc}
-_0200BD08:
-	mov r1, #2
-	bl UpdateFadeStatus
-	ldmia sp!, {r4, pc}
-	arm_func_end sub_0200BCB0
-
-	arm_func_start sub_0200BD14
-sub_0200BD14: ; 0x0200BD14
-	ldr r0, [r0, #4]
-	cmp r0, #0
-	movne r0, #1
-	moveq r0, #0
-	and r0, r0, #0xff
-	bx lr
-	arm_func_end sub_0200BD14
-
-	arm_func_start GetFadeStatus
-GetFadeStatus: ; 0x0200BD2C
-	ldrsh r1, [r0, #0x10]
-	mvn r0, #0xff
-	cmp r1, r0
-	moveq r0, #1
-	bxeq lr
-	cmp r1, #0x100
-	moveq r0, #2
-	movne r0, #0
-	bx lr
-	arm_func_end GetFadeStatus
-
-	arm_func_start sub_0200BD50
-sub_0200BD50: ; 0x0200BD50
-	stmdb sp!, {r3, r4, lr}
-	sub sp, sp, #4
-	mov r4, r0
-	ldr r0, [r4]
-	cmp r0, #0
-	ldreq r0, [r4, #4]
-	cmpeq r0, #0
-	beq _0200C000
-	mov r0, r4
-	bl HandleFades
-	cmp r0, #0
-	beq _0200BF90
-	ldr r0, [r4]
-	cmp r0, #0xb
-	addls pc, pc, r0, lsl #2
-	b _0200C000
-_0200BD90: ; jump table
-	b _0200C000 ; case 0
-	b _0200BDC0 ; case 1
-	b _0200BDDC ; case 2
-	b _0200BDFC ; case 3
-	b _0200BE10 ; case 4
-	b _0200BE30 ; case 5
-	b _0200BE44 ; case 6
-	b _0200BEB0 ; case 7
-	b _0200BE44 ; case 8
-	b _0200BEB0 ; case 9
-	b _0200BF10 ; case 10
-	b _0200BF54 ; case 11
-_0200BDC0:
-	ldrsh r1, [r4, #0x14]
-	add r0, r4, #0x1c
-	add r1, r1, #0x100
-	mov r1, r1, lsl #0x10
-	mov r1, r1, lsr #0x10
-	bl sub_0200A37C
-	b _0200C000
-_0200BDDC:
-	ldrsh r1, [r4, #0x14]
-	add r0, r4, #0x1c
-	add r2, r4, #0x16
-	rsb r1, r1, #0x100
-	mov r1, r1, lsl #0x10
-	mov r1, r1, lsr #0x10
-	bl sub_0200A3A8
-	b _0200C000
-_0200BDFC:
-	ldrh r1, [r4, #0x14]
-	add r0, r4, #0x1c
-	add r2, r4, #0x16
-	bl sub_0200A3DC
-	b _0200C000
-_0200BE10:
-	ldrsh r1, [r4, #0x14]
-	add r0, r4, #0x1c
-	add r2, r4, #0x16
-	rsb r1, r1, #0x100
-	mov r1, r1, lsl #0x10
-	mov r1, r1, lsr #0x10
-	bl sub_0200A410
-	b _0200C000
-_0200BE30:
-	ldrh r1, [r4, #0x14]
-	add r0, r4, #0x1c
-	add r2, r4, #0x16
-	bl sub_0200A444
-	b _0200C000
-_0200BE44:
-	cmp r0, #6
-	beq _0200BE58
-	cmp r0, #8
-	beq _0200BE74
-	b _0200BE90
-_0200BE58:
-	mov r1, #0x90
-	mov r0, #0xff
-	strb r1, [sp]
-	strb r1, [sp, #1]
-	strb r0, [sp, #2]
-	strb r0, [sp, #3]
-	b _0200BE90
-_0200BE74:
-	mov r2, #0xff
-	mov r1, #0xc0
-	mov r0, #0x80
-	strb r2, [sp]
-	strb r1, [sp, #1]
-	strb r0, [sp, #2]
-	strb r2, [sp, #3]
-_0200BE90:
-	ldrsh r1, [r4, #0x14]
-	add r2, sp, #0
-	add r0, r4, #0x1c
-	rsb r1, r1, #0x100
-	mov r1, r1, lsl #0x10
-	mov r1, r1, lsr #0x10
-	bl sub_0200A410
-	b _0200C000
-_0200BEB0:
-	cmp r0, #7
-	beq _0200BEC4
-	cmp r0, #9
-	beq _0200BEE0
-	b _0200BEFC
-_0200BEC4:
-	mov r1, #0x90
-	mov r0, #0xff
-	strb r1, [sp]
-	strb r1, [sp, #1]
-	strb r0, [sp, #2]
-	strb r0, [sp, #3]
-	b _0200BEFC
-_0200BEE0:
-	mov r2, #0xff
-	mov r1, #0xc0
-	mov r0, #0x80
-	strb r2, [sp]
-	strb r1, [sp, #1]
-	strb r0, [sp, #2]
-	strb r2, [sp, #3]
-_0200BEFC:
-	ldrh r1, [r4, #0x14]
-	add r2, sp, #0
-	add r0, r4, #0x1c
-	bl sub_0200A444
-	b _0200C000
-_0200BF10:
-	mov r0, #0xff
-	strb r0, [sp]
-	strb r0, [sp, #1]
-	strb r0, [sp, #2]
-	strb r0, [sp, #3]
-	ldrsh r1, [r4, #0x14]
-	add r2, sp, #0
-	add r0, r4, #0x1c
-	add r3, r1, r1, lsl #1
-	mov r1, r3, asr #1
-	add r1, r3, r1, lsr #30
-	mov r1, r1, asr #2
-	rsb r1, r1, #0x100
-	mov r1, r1, lsl #0x10
-	mov r1, r1, lsr #0x10
-	bl sub_0200A3A8
-	b _0200C000
-_0200BF54:
-	mov r0, #0xff
-	strb r0, [sp]
-	strb r0, [sp, #1]
-	strb r0, [sp, #2]
-	strb r0, [sp, #3]
-	ldrsh r1, [r4, #0x14]
-	add r2, sp, #0
-	add r0, r4, #0x1c
-	rsb r3, r1, #0x100
-	mov r1, r3, asr #1
-	add r1, r3, r1, lsr #30
-	mov r1, r1, lsl #0xe
-	mov r1, r1, lsr #0x10
-	bl sub_0200A3A8
-	b _0200C000
-_0200BF90:
-	ldr r0, [r4, #4]
-	cmp r0, #0
-	bne _0200C000
-	ldr r0, [r4]
-	cmp r0, #0xb
-	addls pc, pc, r0, lsl #2
-	b _0200C000
-_0200BFAC: ; jump table
-	b _0200C000 ; case 0
-	b _0200C000 ; case 1
-	b _0200BFDC ; case 2
-	b _0200BFF0 ; case 3
-	b _0200BFDC ; case 4
-	b _0200BFF0 ; case 5
-	b _0200BFDC ; case 6
-	b _0200BFF0 ; case 7
-	b _0200BFDC ; case 8
-	b _0200BFF0 ; case 9
-	b _0200BFDC ; case 10
-	b _0200BFF0 ; case 11
-_0200BFDC:
-	ldrsh r0, [r4, #0x14]
-	cmp r0, #0x100
-	movge r0, #0
-	strge r0, [r4]
-	b _0200C000
-_0200BFF0:
-	ldrsh r0, [r4, #0x14]
-	cmp r0, #0
-	movle r0, #0
-	strle r0, [r4]
-_0200C000:
-	add sp, sp, #4
-	ldmia sp!, {r3, r4, pc}
-	arm_func_end sub_0200BD50
-
-	arm_func_start sub_0200C008
-sub_0200C008: ; 0x0200C008
-	ldr ip, _0200C01C ; =sub_0200A29C
-	mov r3, r2, lsl #0x10
-	mov r2, r1
-	mov r1, r3, lsr #0x10
-	bx ip
-	.align 2, 0
-_0200C01C: .word sub_0200A29C
-	arm_func_end sub_0200C008
-
-	arm_func_start sub_0200C020
-sub_0200C020: ; 0x0200C020
-	stmdb sp!, {r3, r4, lr}
-	sub sp, sp, #4
-	ldr ip, [sp, #0x10]
-	cmp ip, #0
-	beq _0200C084
-	ldrb lr, [r1]
-	mov r4, #0xff
-	ldrb lr, [ip, lr, lsl #2]
-	mul lr, r3, lr
-	mov lr, lr, lsr #5
-	strb lr, [sp]
-	ldrb lr, [r1, #1]
-	add lr, ip, lr, lsl #2
-	ldrb lr, [lr, #1]
-	mul lr, r3, lr
-	mov lr, lr, lsr #5
-	strb lr, [sp, #1]
-	ldrb r1, [r1, #2]
-	add r1, ip, r1, lsl #2
-	ldrb r1, [r1, #2]
-	mul r1, r3, r1
-	mov r1, r1, lsr #5
-	strb r1, [sp, #2]
-	strb r4, [sp, #3]
-	b _0200C0BC
-_0200C084:
-	ldrb r4, [r1]
-	mov ip, #0xff
-	mul lr, r4, r3
-	mov r4, lr, lsr #5
-	strb r4, [sp]
-	ldrb lr, [r1, #1]
-	mul r4, lr, r3
-	mov r4, r4, lsr #5
-	strb r4, [sp, #1]
-	ldrb r1, [r1, #2]
-	mul r3, r1, r3
-	mov r1, r3, lsr #5
-	strb r1, [sp, #2]
-	strb ip, [sp, #3]
-_0200C0BC:
-	mov r1, r2, lsl #0x10
-	add r2, sp, #0
-	mov r1, r1, lsr #0x10
-	bl sub_0200A590
-	add sp, sp, #4
-	ldmia sp!, {r3, r4, pc}
-	arm_func_end sub_0200C020
diff --git a/asm/main_02008BF4.s b/asm/main_02008BF4.s
new file mode 100644
index 00000000..80d246af
--- /dev/null
+++ b/asm/main_02008BF4.s
@@ -0,0 +1,4187 @@
+	.include "asm/macros.inc"
+	.include "main_02008BF4.inc"
+
+	.text
+
+	arm_func_start sub_02008BF4
+sub_02008BF4: ; 0x02008BF4
+	stmdb sp!, {r3, lr}
+	sub sp, sp, #0x28
+	mov r3, r0
+	mov r2, r1
+	add r0, sp, #0
+	mov r1, r3
+	bl sub_02008CC4
+	add sp, sp, #0x28
+	ldmia sp!, {r3, pc}
+	arm_func_end sub_02008BF4
+
+	arm_func_start sub_02008C18
+sub_02008C18: ; 0x02008C18
+	stmdb sp!, {r3, lr}
+	sub sp, sp, #0x28
+	mov r3, r0
+	mov r2, r1
+	add r0, sp, #0
+	mov r1, r3
+	bl sub_02008D10
+	add sp, sp, #0x28
+	ldmia sp!, {r3, pc}
+	arm_func_end sub_02008C18
+
+	arm_func_start LoadFileFromRom
+LoadFileFromRom: ; 0x02008C3C
+	stmdb sp!, {r3, lr}
+	sub sp, sp, #0x28
+	mov lr, r0
+	mov ip, r1
+	mov r3, r2
+	add r0, sp, #0
+	mov r1, lr
+	mov r2, ip
+	bl sub_02008D60
+	add sp, sp, #0x28
+	ldmia sp!, {r3, pc}
+	arm_func_end LoadFileFromRom
+
+	arm_func_start sub_02008C68
+sub_02008C68: ; 0x02008C68
+	stmdb sp!, {r4, r5, r6, lr}
+	sub sp, sp, #0x100
+	mov r6, r0
+	mov r4, r2
+	mov r5, r1
+	bl sub_0200844C
+	add r0, sp, #0
+	mov r1, r6
+	mov r3, r4
+	mov r2, #6
+	bl sub_02008980
+	mov r0, r5
+	str r5, [sp, #0x10]
+	bl sub_0200846C
+	add r0, sp, #0
+	bl sub_02008A84
+	ldr r0, [r5, #0x14]
+	cmp r0, #0
+	moveq r0, #1
+	movne r0, #0
+	and r0, r0, #0xff
+	add sp, sp, #0x100
+	ldmia sp!, {r4, r5, r6, pc}
+	arm_func_end sub_02008C68
+
+	arm_func_start sub_02008CC4
+sub_02008CC4: ; 0x02008CC4
+	stmdb sp!, {r4, r5, r6, lr}
+	sub sp, sp, #0x100
+	mov r6, r0
+	mov r4, r2
+	mov r5, r1
+	bl sub_0200844C
+	add r0, sp, #0
+	mov r1, r6
+	mov r3, r4
+	mov r2, #8
+	bl sub_02008980
+	mvn r1, #0
+	add r0, sp, #0
+	str r5, [sp, #0xc]
+	str r1, [sp, #0x14]
+	bl sub_02008A84
+	ldr r0, [r6, #0x10]
+	add sp, sp, #0x100
+	ldmia sp!, {r4, r5, r6, pc}
+	arm_func_end sub_02008CC4
+
+	arm_func_start sub_02008D10
+sub_02008D10: ; 0x02008D10
+	stmdb sp!, {r4, r5, r6, lr}
+	sub sp, sp, #0x100
+	mov r6, r0
+	mov r4, r2
+	mov r5, r1
+	bl sub_0200844C
+	add r0, sp, #0
+	mov r1, r6
+	mov r3, r4
+	mov r2, #8
+	bl sub_02008980
+	ldr r1, [r5]
+	add r0, sp, #0
+	str r1, [sp, #0xc]
+	ldr r1, [r5, #4]
+	str r1, [sp, #0x14]
+	bl sub_02008A84
+	ldr r0, [r6, #0x10]
+	add sp, sp, #0x100
+	ldmia sp!, {r4, r5, r6, pc}
+	arm_func_end sub_02008D10
+
+	arm_func_start sub_02008D60
+sub_02008D60: ; 0x02008D60
+	stmdb sp!, {r3, r4, r5, r6, r7, lr}
+	sub sp, sp, #0x100
+	mov r7, r0
+	mov r5, r2
+	mov r6, r1
+	mov r4, r3
+	bl sub_0200844C
+	add r0, sp, #0
+	mov r1, r7
+	mov r3, r5
+	mov r2, #0xa
+	bl sub_02008980
+	add r0, sp, #0
+	str r6, [sp, #0x10]
+	str r4, [sp, #0x24]
+	bl sub_02008A84
+	ldr r0, [r7, #0x10]
+	add sp, sp, #0x100
+	ldmia sp!, {r3, r4, r5, r6, r7, pc}
+	arm_func_end sub_02008D60
+
+	arm_func_start sub_02008DAC
+sub_02008DAC: ; 0x02008DAC
+	stmdb sp!, {r4, lr}
+	ldr r1, _02008EAC ; =_020AF694
+	mov r3, #0xff
+	ldr r0, _02008EB0 ; =GXi_DmaId
+	mov r2, #3
+	strb r3, [r1]
+	str r2, [r0]
+	bl GX_Init
+	ldr r2, _02008EB4 ; =0x04000304
+	ldr r0, _02008EB8 ; =0xFFFFFDF1
+	ldrh r1, [r2]
+	and r0, r1, r0
+	orr r0, r0, #0xe
+	orr r0, r0, #0x200
+	strh r0, [r2]
+	bl G3X_Init
+	bl G3X_ClearFifo
+	bl GX_DispOff
+	ldr r1, _02008EBC ; =0x04001000
+	ldr r0, [r1]
+	bic r0, r0, #0x10000
+	str r0, [r1]
+	bl sub_0200961C
+	ldr r0, _02008EC0 ; =0x000001FF
+	bl GX_SetBankForLCDC
+	mov r0, #0
+	mov r1, #0x6800000
+	mov r2, #0xa4000
+	bl ArrayFill32Fast
+	bl GX_DisableBankForLCDC
+	mov r0, #0xc0
+	mov r1, #0x7000000
+	mov r2, #0x400
+	bl ArrayFill32Fast
+	mov r0, #0
+	mov r1, #0x5000000
+	mov r2, #0x400
+	bl ArrayFill32Fast
+	mov r0, #0xc0
+	ldr r1, _02008EC4 ; =0x07000400
+	mov r2, #0x400
+	bl ArrayFill32Fast
+	mov r0, #0
+	ldr r1, _02008EC8 ; =0x05000400
+	mov r2, #0x400
+	bl ArrayFill32Fast
+	mov r1, #0x100
+	ldr r0, _02008ECC ; =_022A37A0
+	str r1, [r0, #4]
+	str r1, [r0, #8]
+	bl sub_02009648
+	mov r2, #0
+	ldr r0, _02008ECC ; =_022A37A0
+	mov r1, #0x100
+	str r2, [r0]
+	str r1, [r0, #4]
+	str r1, [r0, #8]
+	bl sub_02008F88
+	mov r4, #1
+_02008E98:
+	mov r0, r4
+	bl sub_02082420
+	cmp r0, #0
+	beq _02008E98
+	ldmia sp!, {r4, pc}
+	.align 2, 0
+_02008EAC: .word _020AF694
+_02008EB0: .word GXi_DmaId
+_02008EB4: .word 0x04000304
+_02008EB8: .word 0xFFFFFDF1
+_02008EBC: .word 0x04001000
+_02008EC0: .word 0x000001FF
+_02008EC4: .word 0x07000400
+_02008EC8: .word 0x05000400
+_02008ECC: .word _022A37A0
+	arm_func_end sub_02008DAC
+
+	arm_func_start sub_02008ED0
+sub_02008ED0: ; 0x02008ED0
+	stmdb sp!, {r4, lr}
+	ldr r1, _02008F30 ; =_020AF694
+	mov r4, r0
+	ldrb r1, [r1]
+	cmp r1, r4
+	ldmeqia sp!, {r4, pc}
+	ldr r0, _02008F34 ; =_02092AB8
+	mov r2, r4
+	bl Debug_Print0
+	cmp r4, #0
+	beq _02008F0C
+	cmp r4, #0xff
+	bne _02008F24
+	bl sub_0200961C
+	b _02008F24
+_02008F0C:
+	bl sub_02009648
+	bl GX_DispOn
+	ldr r1, _02008F38 ; =0x04001000
+	ldr r0, [r1]
+	orr r0, r0, #0x10000
+	str r0, [r1]
+_02008F24:
+	ldr r0, _02008F30 ; =_020AF694
+	strb r4, [r0]
+	ldmia sp!, {r4, pc}
+	.align 2, 0
+_02008F30: .word _020AF694
+_02008F34: .word _02092AB8
+_02008F38: .word 0x04001000
+	arm_func_end sub_02008ED0
+
+	arm_func_start sub_02008F3C
+sub_02008F3C: ; 0x02008F3C
+	ldr r2, _02008F48 ; =_022A37A4
+	str r1, [r2, r0, lsl #2]
+	bx lr
+	.align 2, 0
+_02008F48: .word _022A37A4
+	arm_func_end sub_02008F3C
+
+	arm_func_start sub_02008F4C
+sub_02008F4C: ; 0x02008F4C
+	ldr r1, _02008F60 ; =_022A37A4
+	ldr r0, [r1, r0, lsl #2]
+	mov r0, r0, lsl #0x10
+	mov r0, r0, asr #0x10
+	bx lr
+	.align 2, 0
+_02008F60: .word _022A37A4
+	arm_func_end sub_02008F4C
+
+	arm_func_start sub_02008F64
+sub_02008F64: ; 0x02008F64
+	ldr r2, _02008F80 ; =_022A37A0
+	add r0, r1, r0, lsl #2
+	ldr r3, [r2]
+	mov r1, #1
+	orr r0, r3, r1, lsl r0
+	str r0, [r2]
+	bx lr
+	.align 2, 0
+_02008F80: .word _022A37A0
+	arm_func_end sub_02008F64
+
+	arm_func_start sub_02008F84
+sub_02008F84: ; 0x02008F84
+	bx lr
+	arm_func_end sub_02008F84
+
+	arm_func_start sub_02008F88
+sub_02008F88: ; 0x02008F88
+	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
+	mov r0, #0
+	bl sub_02009DCC
+	mov r0, #1
+	bl sub_02009DCC
+	mov r0, #0
+	bl sub_02009D48
+	mov r0, #1
+	bl sub_02009D48
+	mov r0, #0
+	bl sub_02009F9C
+	mov r0, #1
+	bl sub_02009F9C
+	mov r0, #0
+	bl sub_02009E70
+	mov r0, #1
+	bl sub_02009E70
+	ldr r1, _02009080 ; =_022A37A0
+	ldr r0, _02009084 ; =0x0400006C
+	ldr r2, [r1, #4]
+	mov r1, r2, asr #3
+	add r1, r2, r1, lsr #28
+	mov r1, r1, asr #4
+	bl GXx_SetMasterBrightness_
+	ldr r1, _02009080 ; =_022A37A0
+	ldr r0, _02009088 ; =0x0400106C
+	ldr r2, [r1, #8]
+	mov r1, r2, asr #3
+	add r1, r2, r1, lsr #28
+	mov r1, r1, asr #4
+	bl GXx_SetMasterBrightness_
+	ldr r0, _02009080 ; =_022A37A0
+	ldr sb, [r0]
+	cmp sb, #0
+	ldmeqia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+	mov sl, #0
+	ldr r8, _0200908C ; =_02092A18
+	mov fp, #2
+	ldr r7, _02009090 ; =_02092A38
+	ldr r6, _02009094 ; =_02092A58
+	ldr r5, _02009098 ; =_02092A78
+	ldr r4, _0200909C ; =_02092A98
+	b _02009068
+_02009034:
+	tst sb, #1
+	beq _02009060
+	ldr r0, [r8, sl, lsl #2]
+	mov r1, fp
+	bl MemZero16
+	ldr r0, [r7, sl, lsl #2]
+	ldr r1, [r6, sl, lsl #2]
+	bl MemZero32
+	ldr r0, [r5, sl, lsl #2]
+	ldr r1, [r4, sl, lsl #2]
+	bl MemZero32
+_02009060:
+	mov sb, sb, asr #1
+	add sl, sl, #1
+_02009068:
+	cmp sb, #0
+	bne _02009034
+	ldr r0, _02009080 ; =_022A37A0
+	mov r1, #0
+	str r1, [r0]
+	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+	.align 2, 0
+_02009080: .word _022A37A0
+_02009084: .word 0x0400006C
+_02009088: .word 0x0400106C
+_0200908C: .word _02092A18
+_02009090: .word _02092A38
+_02009094: .word _02092A58
+_02009098: .word _02092A78
+_0200909C: .word _02092A98
+	arm_func_end sub_02008F88
+
+	arm_func_start sub_020090A0
+sub_020090A0: ; 0x020090A0
+	mov r3, r1, lsr #0x1f
+	ldr ip, _020090BC ; =_022A37CC
+	rsb r1, r3, r1, lsl #30
+	add r3, r3, r1, ror #30
+	add r1, ip, r2, lsl #4
+	str r3, [r1, r0, lsl #2]
+	bx lr
+	.align 2, 0
+_020090BC: .word _022A37CC
+	arm_func_end sub_020090A0
+
+	arm_func_start sub_020090C0
+sub_020090C0: ; 0x020090C0
+	stmdb sp!, {r4, r5, r6, lr}
+	mov r6, r0
+	mov r5, r1
+	mov r4, #0
+_020090D0:
+	ldrb r1, [r6, r4]
+	mov r0, r4
+	mov r2, r5
+	bl sub_020090A0
+	add r0, r4, #1
+	and r4, r0, #0xff
+	cmp r4, #4
+	blo _020090D0
+	ldmia sp!, {r4, r5, r6, pc}
+	arm_func_end sub_020090C0
+
+	arm_func_start sub_020090F4
+sub_020090F4: ; 0x020090F4
+	ldr r2, _0200911C ; =_022A37CC
+	mov ip, #0
+	add r3, r2, r1, lsl #4
+_02009100:
+	ldr r2, [r3, ip, lsl #2]
+	add r1, ip, #1
+	strb r2, [r0, ip]
+	and ip, r1, #0xff
+	cmp ip, #4
+	blo _02009100
+	bx lr
+	.align 2, 0
+_0200911C: .word _022A37CC
+	arm_func_end sub_020090F4
+
+	arm_func_start sub_02009120
+sub_02009120: ; 0x02009120
+	cmp r0, #0
+	bne _02009150
+	ldr r2, _02009184 ; =_022A37CC
+	mov r3, #1
+	str r3, [r2, r0, lsl #4]
+	ldr r1, _02009188 ; =_022A37D0
+	mov r3, #0
+	str r3, [r1, r0, lsl #4]
+	ldr r2, _0200918C ; =_022A37D4
+	mov r3, #2
+	ldr r1, _02009190 ; =_022A37D8
+	b _02009174
+_02009150:
+	ldr r2, _02009184 ; =_022A37CC
+	mov r3, #0
+	str r3, [r2, r0, lsl #4]
+	ldr r1, _02009188 ; =_022A37D0
+	mov r3, #1
+	str r3, [r1, r0, lsl #4]
+	ldr r2, _0200918C ; =_022A37D4
+	ldr r1, _02009190 ; =_022A37D8
+	mov r3, #2
+_02009174:
+	str r3, [r2, r0, lsl #4]
+	mov r2, #3
+	str r2, [r1, r0, lsl #4]
+	bx lr
+	.align 2, 0
+_02009184: .word _022A37CC
+_02009188: .word _022A37D0
+_0200918C: .word _022A37D4
+_02009190: .word _022A37D8
+	arm_func_end sub_02009120
+
+	arm_func_start sub_02009194
+sub_02009194: ; 0x02009194
+	ldr r2, _020091AC ; =_022A37AC
+	add r1, r1, r1, lsl #2
+	add r1, r2, r1
+	mov r2, #1
+	strb r2, [r0, r1]
+	bx lr
+	.align 2, 0
+_020091AC: .word _022A37AC
+	arm_func_end sub_02009194
+
+	arm_func_start sub_020091B0
+sub_020091B0: ; 0x020091B0
+	ldr r2, _020091C8 ; =_022A37AC
+	add r1, r1, r1, lsl #2
+	add r1, r2, r1
+	mov r2, #0
+	strb r2, [r0, r1]
+	bx lr
+	.align 2, 0
+_020091C8: .word _022A37AC
+	arm_func_end sub_020091B0
+
+	arm_func_start sub_020091CC
+sub_020091CC: ; 0x020091CC
+	ldr r1, _020091F4 ; =_022A37AC
+	add r0, r0, r0, lsl #2
+	add r2, r1, r0
+	mov r1, #0
+	mov r0, r1
+_020091E0:
+	strb r0, [r2, r1]
+	add r1, r1, #1
+	cmp r1, #5
+	blt _020091E0
+	bx lr
+	.align 2, 0
+_020091F4: .word _022A37AC
+	arm_func_end sub_020091CC
+
+	arm_func_start sub_020091F8
+sub_020091F8: ; 0x020091F8
+	stmdb sp!, {r3, lr}
+	mov ip, #0x1b
+	mul lr, r3, ip
+	ldr ip, _02009220 ; =_022A37EC
+	ldr r3, _02009224 ; =_022A37ED
+	strb r0, [ip, lr]
+	ldr r0, _02009228 ; =_022A37EE
+	strb r1, [r3, lr]
+	strb r2, [r0, lr]
+	ldmia sp!, {r3, pc}
+	.align 2, 0
+_02009220: .word _022A37EC
+_02009224: .word _022A37ED
+_02009228: .word _022A37EE
+	arm_func_end sub_020091F8
+
+	arm_func_start sub_0200922C
+sub_0200922C: ; 0x0200922C
+	stmdb sp!, {r4, lr}
+	ldrb r4, [sp, #0x10]
+	mov ip, #0x1b
+	ldr lr, _02009278 ; =_022A37F3
+	smulbb r4, r4, ip
+	ldr ip, _0200927C ; =_022A37F4
+	strb r0, [lr, r4]
+	ldr lr, _02009280 ; =_022A37F5
+	strb r1, [ip, r4]
+	ldrb ip, [sp, #8]
+	ldr r0, _02009284 ; =_022A37F6
+	strb r2, [lr, r4]
+	ldrb r1, [sp, #0xc]
+	ldr r2, _02009288 ; =_022A37F7
+	strb r3, [r0, r4]
+	ldr r0, _0200928C ; =_022A37EF
+	strb ip, [r2, r4]
+	strb r1, [r0, r4]
+	ldmia sp!, {r4, pc}
+	.align 2, 0
+_02009278: .word _022A37F3
+_0200927C: .word _022A37F4
+_02009280: .word _022A37F5
+_02009284: .word _022A37F6
+_02009288: .word _022A37F7
+_0200928C: .word _022A37EF
+	arm_func_end sub_0200922C
+
+	arm_func_start sub_02009290
+sub_02009290: ; 0x02009290
+	stmdb sp!, {r4, lr}
+	ldrb r4, [sp, #0x10]
+	mov ip, #0x1b
+	ldr lr, _020092DC ; =_022A37F8
+	smulbb r4, r4, ip
+	ldr ip, _020092E0 ; =_022A37F9
+	strb r0, [lr, r4]
+	ldr lr, _020092E4 ; =_022A37FA
+	strb r1, [ip, r4]
+	ldrb ip, [sp, #8]
+	ldr r0, _020092E8 ; =_022A37FB
+	strb r2, [lr, r4]
+	ldrb r1, [sp, #0xc]
+	ldr r2, _020092EC ; =_022A37FC
+	strb r3, [r0, r4]
+	ldr r0, _020092F0 ; =_022A37F0
+	strb ip, [r2, r4]
+	strb r1, [r0, r4]
+	ldmia sp!, {r4, pc}
+	.align 2, 0
+_020092DC: .word _022A37F8
+_020092E0: .word _022A37F9
+_020092E4: .word _022A37FA
+_020092E8: .word _022A37FB
+_020092EC: .word _022A37FC
+_020092F0: .word _022A37F0
+	arm_func_end sub_02009290
+
+	arm_func_start sub_020092F4
+sub_020092F4: ; 0x020092F4
+	stmdb sp!, {r4, lr}
+	ldrb r4, [sp, #0x10]
+	mov ip, #0x1b
+	ldr lr, _02009340 ; =_022A3802
+	smulbb r4, r4, ip
+	ldr ip, _02009344 ; =_022A3803
+	strb r0, [lr, r4]
+	ldr lr, _02009348 ; =_022A3804
+	strb r1, [ip, r4]
+	ldrb ip, [sp, #8]
+	ldr r0, _0200934C ; =_022A3805
+	strb r2, [lr, r4]
+	ldrb r1, [sp, #0xc]
+	ldr r2, _02009350 ; =_022A3806
+	strb r3, [r0, r4]
+	ldr r0, _02009354 ; =_022A37EF
+	strb ip, [r2, r4]
+	strb r1, [r0, r4]
+	ldmia sp!, {r4, pc}
+	.align 2, 0
+_02009340: .word _022A3802
+_02009344: .word _022A3803
+_02009348: .word _022A3804
+_0200934C: .word _022A3805
+_02009350: .word _022A3806
+_02009354: .word _022A37EF
+	arm_func_end sub_020092F4
+
+	arm_func_start sub_02009358
+sub_02009358: ; 0x02009358
+	stmdb sp!, {r4, lr}
+	ldrb r4, [sp, #0x10]
+	mov ip, #0x1b
+	ldr lr, _020093A4 ; =_022A37FD
+	smulbb r4, r4, ip
+	ldr ip, _020093A8 ; =_022A37FE
+	strb r0, [lr, r4]
+	ldr lr, _020093AC ; =_022A37FF
+	strb r1, [ip, r4]
+	ldrb ip, [sp, #8]
+	ldr r0, _020093B0 ; =_022A3800
+	strb r2, [lr, r4]
+	ldrb r1, [sp, #0xc]
+	ldr r2, _020093B4 ; =_022A3801
+	strb r3, [r0, r4]
+	ldr r0, _020093B8 ; =_022A37F1
+	strb ip, [r2, r4]
+	strb r1, [r0, r4]
+	ldmia sp!, {r4, pc}
+	.align 2, 0
+_020093A4: .word _022A37FD
+_020093A8: .word _022A37FE
+_020093AC: .word _022A37FF
+_020093B0: .word _022A3800
+_020093B4: .word _022A3801
+_020093B8: .word _022A37F1
+	arm_func_end sub_02009358
+
+	arm_func_start sub_020093BC
+sub_020093BC: ; 0x020093BC
+	stmdb sp!, {r3, r4, lr}
+	sub sp, sp, #0xc
+	mov r4, r0
+	mov r0, #0
+	mov r1, r0
+	mov r2, r0
+	mov r3, r4
+	bl sub_020091F8
+	mov r0, #0
+	str r0, [sp]
+	mov r1, r0
+	mov r2, r0
+	mov r3, r0
+	stmib sp, {r0, r4}
+	bl sub_0200922C
+	mov r0, #0
+	str r0, [sp]
+	mov r1, r0
+	mov r2, r0
+	mov r3, r0
+	stmib sp, {r0, r4}
+	bl sub_02009290
+	mov r0, #0
+	str r0, [sp]
+	stmib sp, {r0, r4}
+	mov r1, r0
+	mov r2, r0
+	mov r3, r0
+	bl sub_020092F4
+	mov r0, #0
+	str r0, [sp]
+	mov r1, r0
+	mov r2, r0
+	mov r3, r0
+	stmib sp, {r0, r4}
+	bl sub_02009358
+	add sp, sp, #0xc
+	ldmia sp!, {r3, r4, pc}
+	arm_func_end sub_020093BC
+
+	arm_func_start sub_02009454
+sub_02009454: ; 0x02009454
+	ldr ip, _02009468 ; =_022A37B6
+	mov r3, #0xa
+	mla r3, r2, r3, ip
+	strb r1, [r0, r3]
+	bx lr
+	.align 2, 0
+_02009468: .word _022A37B6
+	arm_func_end sub_02009454
+
+	arm_func_start sub_0200946C
+sub_0200946C: ; 0x0200946C
+	ldr r3, _02009494 ; =_022A37B6
+	mov r2, #0xa
+	mla r3, r1, r2, r3
+	mov r2, #0
+_0200947C:
+	ldrb r1, [r0, r2]
+	strb r1, [r3, r2]
+	add r2, r2, #1
+	cmp r2, #5
+	blt _0200947C
+	bx lr
+	.align 2, 0
+_02009494: .word _022A37B6
+	arm_func_end sub_0200946C
+
+	arm_func_start sub_02009498
+sub_02009498: ; 0x02009498
+	ldr r3, _020094C0 ; =_022A37B6
+	mov r2, #0xa
+	mla r3, r1, r2, r3
+	mov r2, #0
+_020094A8:
+	ldrb r1, [r3, r2]
+	strb r1, [r0, r2]
+	add r2, r2, #1
+	cmp r2, #5
+	blt _020094A8
+	bx lr
+	.align 2, 0
+_020094C0: .word _022A37B6
+	arm_func_end sub_02009498
+
+	arm_func_start sub_020094C4
+sub_020094C4: ; 0x020094C4
+	mov r3, #0xa
+	mul ip, r2, r3
+	ldr r3, _020094E0 ; =_022A37BC
+	ldr r2, _020094E4 ; =_022A37BE
+	strh r0, [r3, ip]
+	strh r1, [r2, ip]
+	bx lr
+	.align 2, 0
+_020094E0: .word _022A37BC
+_020094E4: .word _022A37BE
+	arm_func_end sub_020094C4
+
+	arm_func_start sub_020094E8
+sub_020094E8: ; 0x020094E8
+	mov r3, #0xa
+	mul ip, r2, r3
+	ldr r3, _0200950C ; =_022A37BC
+	ldr r2, _02009510 ; =_022A37BE
+	ldrsh r3, [r3, ip]
+	strh r3, [r0]
+	ldrsh r0, [r2, ip]
+	strh r0, [r1]
+	bx lr
+	.align 2, 0
+_0200950C: .word _022A37BC
+_02009510: .word _022A37BE
+	arm_func_end sub_020094E8
+
+	arm_func_start sub_02009514
+sub_02009514: ; 0x02009514
+	stmdb sp!, {r4, lr}
+	mov r4, r0
+	mov r0, #0x40
+	mov r1, r0
+	mov r2, r4
+	bl sub_020094C4
+	mov r0, #0xa
+	mul r3, r4, r0
+	cmp r4, #0
+	bne _02009568
+	ldr r0, _02009598 ; =_022A37B6
+	mov r2, #1
+	strb r2, [r0, r3]
+	ldr r1, _0200959C ; =_022A37B7
+	mov r2, #2
+	strb r2, [r1, r3]
+	ldr r0, _020095A0 ; =_022A37B8
+	ldr r1, _020095A4 ; =_022A37B9
+	strb r2, [r0, r3]
+	ldr r0, _020095A8 ; =_022A37BA
+	b _0200958C
+_02009568:
+	ldr r0, _02009598 ; =_022A37B6
+	mov r2, #2
+	strb r2, [r0, r3]
+	ldr r1, _0200959C ; =_022A37B7
+	ldr r0, _020095A0 ; =_022A37B8
+	strb r2, [r1, r3]
+	strb r2, [r0, r3]
+	ldr r1, _020095A4 ; =_022A37B9
+	ldr r0, _020095A8 ; =_022A37BA
+_0200958C:
+	strb r2, [r1, r3]
+	strb r2, [r0, r3]
+	ldmia sp!, {r4, pc}
+	.align 2, 0
+_02009598: .word _022A37B6
+_0200959C: .word _022A37B7
+_020095A0: .word _022A37B8
+_020095A4: .word _022A37B9
+_020095A8: .word _022A37BA
+	arm_func_end sub_02009514
+
+	arm_func_start sub_020095AC
+sub_020095AC: ; 0x020095AC
+	ldr r2, _020095C4 ; =0x04001008
+	ldrh r1, [r2]
+	bic r1, r1, #3
+	orr r0, r1, r0
+	strh r0, [r2]
+	bx lr
+	.align 2, 0
+_020095C4: .word 0x04001008
+	arm_func_end sub_020095AC
+
+	arm_func_start sub_020095C8
+sub_020095C8: ; 0x020095C8
+	ldr r2, _020095E0 ; =0x0400100A
+	ldrh r1, [r2]
+	bic r1, r1, #3
+	orr r0, r1, r0
+	strh r0, [r2]
+	bx lr
+	.align 2, 0
+_020095E0: .word 0x0400100A
+	arm_func_end sub_020095C8
+
+	arm_func_start sub_020095E4
+sub_020095E4: ; 0x020095E4
+	ldr r2, _020095FC ; =0x0400100C
+	ldrh r1, [r2]
+	bic r1, r1, #3
+	orr r0, r1, r0
+	strh r0, [r2]
+	bx lr
+	.align 2, 0
+_020095FC: .word 0x0400100C
+	arm_func_end sub_020095E4
+
+	arm_func_start sub_02009600
+sub_02009600: ; 0x02009600
+	ldr r2, _02009618 ; =0x0400100E
+	ldrh r1, [r2]
+	bic r1, r1, #3
+	orr r0, r1, r0
+	strh r0, [r2]
+	bx lr
+	.align 2, 0
+_02009618: .word 0x0400100E
+	arm_func_end sub_02009600
+
+	arm_func_start sub_0200961C
+sub_0200961C: ; 0x0200961C
+	stmdb sp!, {r3, lr}
+	bl GX_DisableBankForBG
+	bl GX_DisableBankForOBJ
+	bl GX_DisableBankForBGExtPltt
+	bl GX_DisableBankForOBJExtPltt
+	bl GX_DisableBankForTex
+	bl GX_DisableBankForTexPltt
+	bl GX_DisableBankForSubBG
+	bl GX_DisableBankForSubOBJ
+	bl GX_DisableBankForSubBGExtPltt
+	ldmia sp!, {r3, pc}
+	arm_func_end sub_0200961C
+
+	arm_func_start sub_02009648
+sub_02009648: ; 0x02009648
+	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
+	sub sp, sp, #0xc
+	mov r0, #1
+	bl GX_SetBankForBG
+	mov r0, #2
+	bl GX_SetBankForOBJ
+	mov r0, #0x10
+	bl GX_SetBankForBGExtPltt
+	mov r0, #0x40
+	bl GX_SetBankForOBJExtPltt
+	mov r0, #8
+	bl GX_SetBankForTex
+	mov r0, #0x20
+	bl GX_SetBankForTexPltt
+	mov r0, #1
+	mov r1, #0
+	mov r2, r0
+	bl GX_SetGraphicsMode
+	mov r2, #0x4000000
+	ldr r1, [r2]
+	ldr r0, _02009B78 ; =0x00005C10
+	bic r1, r1, #0x1f00
+	orr r1, r1, #0x1f00
+	str r1, [r2]
+	add r3, r0, #0x208
+	ldr r1, [r2]
+	mov r0, #0x1c
+	bic r1, r1, #0x38000000
+	str r1, [r2]
+	ldr r4, [r2]
+	mov r1, #0
+	bic r4, r4, #0x7000000
+	str r4, [r2]
+	ldrh r4, [r2, #0xa]
+	and r4, r4, #0x43
+	orr r4, r4, #0x1b80
+	strh r4, [r2, #0xa]
+	ldrh r4, [r2, #0xc]
+	and r4, r4, #0x43
+	orr r4, r4, #0xc10
+	orr r4, r4, #0x5000
+	strh r4, [r2, #0xc]
+	ldrh r4, [r2, #0xe]
+	and r4, r4, #0x43
+	orr r3, r4, r3
+	strh r3, [r2, #0xe]
+	ldr r3, [r2]
+	bic r3, r3, #0xe000
+	str r3, [r2]
+	ldr r3, [r2]
+	bic r3, r3, #0x800000
+	str r3, [r2]
+	bl sub_02009B98
+	mov r0, #0x1c
+	mov r1, #0
+	bl sub_02009BC0
+	mov r0, #0
+	mov r1, r0
+	bl sub_02009BE8
+	mov r0, #0xc
+	mov r1, #0
+	bl sub_02009C10
+	mov r3, #8
+	str r3, [sp]
+	ldr r0, _02009B7C ; =0x04000050
+	mov r1, #1
+	mov r2, #0x3e
+	bl G2x_SetBlendAlpha_
+	ldr ip, _02009B80 ; =0x04000040
+	mov lr, #0
+	strh lr, [ip]
+	strh lr, [ip, #4]
+	strh lr, [ip, #2]
+	strh lr, [ip, #6]
+	sub r4, ip, #0x36
+	ldrh r0, [r4]
+	sub r3, ip, #0x38
+	sub r2, ip, #0x34
+	bic r0, r0, #3
+	strh r0, [r4]
+	ldrh r0, [r3]
+	sub r1, ip, #0x32
+	mov r6, #0x4000000
+	bic r0, r0, #3
+	orr r0, r0, #1
+	strh r0, [r3]
+	ldrh r7, [r2]
+	ldr r5, _02009B84 ; =0xFFCFFFEF
+	mov r0, #4
+	bic r7, r7, #3
+	orr r7, r7, #2
+	strh r7, [r2]
+	ldrh r7, [r1]
+	bic r7, r7, #3
+	orr r7, r7, #3
+	strh r7, [r1]
+	str lr, [ip, #-0x2c]
+	str lr, [ip, #-0x28]
+	str lr, [ip, #-0x24]
+	ldrh r7, [r3]
+	bic r7, r7, #0x40
+	strh r7, [r3]
+	ldrh r3, [r4]
+	bic r3, r3, #0x40
+	strh r3, [r4]
+	ldrh r3, [r2]
+	bic r3, r3, #0x40
+	strh r3, [r2]
+	ldrh r2, [r1]
+	bic r2, r2, #0x40
+	strh r2, [r1]
+	ldr r1, [r6]
+	and r1, r1, r5
+	orr r1, r1, #0x10
+	orr r1, r1, #0x200000
+	str r1, [r6]
+	bl GX_SetBankForSubBG
+	mov r0, #0x100
+	bl GX_SetBankForSubOBJ
+	mov r0, #0x80
+	bl GX_SetBankForSubBGExtPltt
+	mov r0, #0
+	bl GXS_SetGraphicsMode
+	ldr r2, _02009B88 ; =0x04001000
+	ldr r0, [r2]
+	bic r0, r0, #0x1f00
+	orr r0, r0, #0x1f00
+	str r0, [r2]
+	ldrh r0, [r2, #8]
+	and r0, r0, #0x43
+	orr r0, r0, #0x1a80
+	strh r0, [r2, #8]
+	ldrh r3, [r2, #0xa]
+	ldr r1, _02009B78 ; =0x00005C10
+	mov r0, #0x1e
+	and r3, r3, #0x43
+	orr r3, r3, #0x38c
+	orr r3, r3, #0x1800
+	strh r3, [r2, #0xa]
+	ldrh r4, [r2, #0xc]
+	add r3, r1, #0x208
+	mov r1, #1
+	and r4, r4, #0x43
+	orr r4, r4, #0xc10
+	orr r4, r4, #0x5000
+	strh r4, [r2, #0xc]
+	ldrh r4, [r2, #0xe]
+	and r4, r4, #0x43
+	orr r3, r4, r3
+	strh r3, [r2, #0xe]
+	ldr r3, [r2]
+	bic r3, r3, #0xe000
+	str r3, [r2]
+	ldr r3, [r2]
+	orr r3, r3, #0x800000
+	str r3, [r2]
+	bl sub_02009CA8
+	mov r0, #0x1e
+	mov r1, #1
+	bl sub_02009CD0
+	mov r0, #0
+	mov r1, r0
+	bl sub_02009CF8
+	mov r0, #0x1e
+	mov r1, #1
+	bl sub_02009D20
+	ldr ip, _02009B8C ; =0x04001050
+	mov r1, #0
+	strh r1, [ip]
+	strh r1, [ip, #-0x10]
+	strh r1, [ip, #-0xc]
+	strh r1, [ip, #-0xe]
+	strh r1, [ip, #-0xa]
+	sub r3, ip, #0x48
+	ldrh r4, [r3]
+	sub r0, ip, #0x46
+	sub r2, ip, #0x44
+	bic r4, r4, #3
+	strh r4, [r3]
+	ldrh r5, [r0]
+	sub r4, ip, #0x42
+	bic r5, r5, #3
+	orr r5, r5, #1
+	strh r5, [r0]
+	ldrh r5, [r2]
+	bic r5, r5, #3
+	orr r5, r5, #2
+	strh r5, [r2]
+	ldrh r5, [r4]
+	bic r5, r5, #3
+	orr r5, r5, #3
+	strh r5, [r4]
+	str r1, [ip, #-0x40]
+	str r1, [ip, #-0x3c]
+	str r1, [ip, #-0x38]
+	str r1, [ip, #-0x34]
+	ldrh r5, [r3]
+	ldr r6, _02009B90 ; =0xFFFFCFFD
+	ldr lr, _02009B94 ; =0x04000304
+	bic r5, r5, #0x40
+	strh r5, [r3]
+	ldrh r3, [r0]
+	sub r7, ip, #0x50
+	ldr r5, _02009B84 ; =0xFFCFFFEF
+	bic r3, r3, #0x40
+	strh r3, [r0]
+	ldrh r3, [r2]
+	sub ip, lr, #0x2a4
+	mov r0, r6, lsr #0x16
+	bic r3, r3, #0x40
+	strh r3, [r2]
+	ldrh r8, [r4]
+	mov r2, r6, lsr #0x11
+	mov r3, #0x3f
+	bic r8, r8, #0x40
+	strh r8, [r4]
+	ldr r4, [r7]
+	and r4, r4, r5
+	orr r4, r4, #0x10
+	orr r4, r4, #0x200000
+	str r4, [r7]
+	ldrh r4, [lr]
+	bic r4, r4, #0x8000
+	strh r4, [lr]
+	ldrh r4, [ip]
+	and r4, r4, r6
+	strh r4, [ip]
+	ldrh r4, [ip]
+	bic r4, r4, #0x3000
+	orr r4, r4, #0x10
+	strh r4, [ip]
+	ldrh r4, [ip]
+	bic r4, r4, #0x3000
+	orr r4, r4, #8
+	strh r4, [ip]
+	ldrh r4, [ip]
+	bic r4, r4, #0x3000
+	orr r4, r4, #4
+	strh r4, [ip]
+	strh r1, [lr, #0x3c]
+	str r1, [sp]
+	bl G3X_SetClearColor
+	mov r0, #0
+	bl sub_02009120
+	mov r0, #1
+	bl sub_02009120
+	mov r0, #0
+	bl sub_020091CC
+	mov r0, #1
+	bl sub_020091CC
+	mov r0, #0
+	bl sub_02009514
+	mov r0, #1
+	bl sub_02009514
+	mov r0, #0
+	mov r1, r0
+	mov r2, r0
+	mov r3, r0
+	bl sub_020091F8
+	mov r0, #0
+	str r0, [sp]
+	str r0, [sp, #4]
+	mov r1, r0
+	mov r2, r0
+	mov r3, r0
+	str r0, [sp, #8]
+	bl sub_0200922C
+	mov r0, #0
+	str r0, [sp]
+	str r0, [sp, #4]
+	mov r1, r0
+	mov r2, r0
+	mov r3, r0
+	str r0, [sp, #8]
+	bl sub_02009290
+	mov r0, #0
+	str r0, [sp]
+	str r0, [sp, #4]
+	mov r1, r0
+	str r0, [sp, #8]
+	mov r2, r0
+	mov r3, r0
+	bl sub_020092F4
+	mov r0, #0
+	str r0, [sp]
+	str r0, [sp, #4]
+	str r0, [sp, #8]
+	mov r1, r0
+	mov r2, r0
+	mov r3, r0
+	bl sub_02009358
+	mov r0, #0
+	mov r1, r0
+	mov r2, r0
+	mov r3, #1
+	bl sub_020091F8
+	mov r0, #0
+	str r0, [sp]
+	str r0, [sp, #4]
+	mov r1, #1
+	str r1, [sp, #8]
+	mov r1, r0
+	mov r2, r0
+	mov r3, r0
+	bl sub_0200922C
+	mov r0, #0
+	str r0, [sp]
+	str r0, [sp, #4]
+	mov r1, #1
+	str r1, [sp, #8]
+	mov r1, r0
+	mov r2, r0
+	mov r3, r0
+	bl sub_02009290
+	mov r0, #0
+	str r0, [sp]
+	mov r1, r0
+	mov r2, r0
+	mov r3, r0
+	str r0, [sp, #4]
+	mov r4, #1
+	str r4, [sp, #8]
+	bl sub_020092F4
+	mov r0, #0
+	str r0, [sp]
+	mov r1, r0
+	mov r2, r0
+	mov r3, r0
+	stmib sp, {r0, r4}
+	bl sub_02009358
+	add sp, sp, #0xc
+	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
+	.align 2, 0
+_02009B78: .word 0x00005C10
+_02009B7C: .word 0x04000050
+_02009B80: .word 0x04000040
+_02009B84: .word 0xFFCFFFEF
+_02009B88: .word 0x04001000
+_02009B8C: .word 0x04001050
+_02009B90: .word 0xFFFFCFFD
+_02009B94: .word 0x04000304
+	arm_func_end sub_02009648
+
+	arm_func_start sub_02009B98
+sub_02009B98: ; 0x02009B98
+	ldr r2, _02009BBC ; =0x04000048
+	cmp r1, #0
+	ldrh r1, [r2]
+	bic r1, r1, #0x3f
+	orr r1, r1, r0
+	ldr r0, _02009BBC ; =0x04000048
+	orrne r1, r1, #0x20
+	strh r1, [r0]
+	bx lr
+	.align 2, 0
+_02009BBC: .word 0x04000048
+	arm_func_end sub_02009B98
+
+	arm_func_start sub_02009BC0
+sub_02009BC0: ; 0x02009BC0
+	ldr r2, _02009BE4 ; =0x04000048
+	cmp r1, #0
+	ldrh r1, [r2]
+	bic r1, r1, #0x3f00
+	orr r1, r1, r0, lsl #8
+	ldr r0, _02009BE4 ; =0x04000048
+	orrne r1, r1, #0x2000
+	strh r1, [r0]
+	bx lr
+	.align 2, 0
+_02009BE4: .word 0x04000048
+	arm_func_end sub_02009BC0
+
+	arm_func_start sub_02009BE8
+sub_02009BE8: ; 0x02009BE8
+	ldr r2, _02009C0C ; =0x0400004A
+	cmp r1, #0
+	ldrh r1, [r2]
+	bic r1, r1, #0x3f00
+	orr r1, r1, r0, lsl #8
+	ldr r0, _02009C0C ; =0x0400004A
+	orrne r1, r1, #0x2000
+	strh r1, [r0]
+	bx lr
+	.align 2, 0
+_02009C0C: .word 0x0400004A
+	arm_func_end sub_02009BE8
+
+	arm_func_start sub_02009C10
+sub_02009C10: ; 0x02009C10
+	ldr r2, _02009C34 ; =0x0400004A
+	cmp r1, #0
+	ldrh r1, [r2]
+	bic r1, r1, #0x3f
+	orr r1, r1, r0
+	ldr r0, _02009C34 ; =0x0400004A
+	orrne r1, r1, #0x20
+	strh r1, [r0]
+	bx lr
+	.align 2, 0
+_02009C34: .word 0x0400004A
+	arm_func_end sub_02009C10
+
+	arm_func_start sub_02009C38
+sub_02009C38: ; 0x02009C38
+	ldr r2, _02009C50 ; =0x0400000A
+	ldrh r1, [r2]
+	bic r1, r1, #3
+	orr r0, r1, r0
+	strh r0, [r2]
+	bx lr
+	.align 2, 0
+_02009C50: .word 0x0400000A
+	arm_func_end sub_02009C38
+
+	arm_func_start sub_02009C54
+sub_02009C54: ; 0x02009C54
+	ldr r2, _02009C6C ; =0x04000008
+	ldrh r1, [r2]
+	bic r1, r1, #3
+	orr r0, r1, r0
+	strh r0, [r2]
+	bx lr
+	.align 2, 0
+_02009C6C: .word 0x04000008
+	arm_func_end sub_02009C54
+
+	arm_func_start sub_02009C70
+sub_02009C70: ; 0x02009C70
+	ldr r2, _02009C88 ; =0x0400000C
+	ldrh r1, [r2]
+	bic r1, r1, #3
+	orr r0, r1, r0
+	strh r0, [r2]
+	bx lr
+	.align 2, 0
+_02009C88: .word 0x0400000C
+	arm_func_end sub_02009C70
+
+	arm_func_start sub_02009C8C
+sub_02009C8C: ; 0x02009C8C
+	ldr r2, _02009CA4 ; =0x0400000E
+	ldrh r1, [r2]
+	bic r1, r1, #3
+	orr r0, r1, r0
+	strh r0, [r2]
+	bx lr
+	.align 2, 0
+_02009CA4: .word 0x0400000E
+	arm_func_end sub_02009C8C
+
+	arm_func_start sub_02009CA8
+sub_02009CA8: ; 0x02009CA8
+	ldr r2, _02009CCC ; =0x04001048
+	cmp r1, #0
+	ldrh r1, [r2]
+	bic r1, r1, #0x3f
+	orr r1, r1, r0
+	ldr r0, _02009CCC ; =0x04001048
+	orrne r1, r1, #0x20
+	strh r1, [r0]
+	bx lr
+	.align 2, 0
+_02009CCC: .word 0x04001048
+	arm_func_end sub_02009CA8
+
+	arm_func_start sub_02009CD0
+sub_02009CD0: ; 0x02009CD0
+	ldr r2, _02009CF4 ; =0x04001048
+	cmp r1, #0
+	ldrh r1, [r2]
+	bic r1, r1, #0x3f00
+	orr r1, r1, r0, lsl #8
+	ldr r0, _02009CF4 ; =0x04001048
+	orrne r1, r1, #0x2000
+	strh r1, [r0]
+	bx lr
+	.align 2, 0
+_02009CF4: .word 0x04001048
+	arm_func_end sub_02009CD0
+
+	arm_func_start sub_02009CF8
+sub_02009CF8: ; 0x02009CF8
+	ldr r2, _02009D1C ; =0x0400104A
+	cmp r1, #0
+	ldrh r1, [r2]
+	bic r1, r1, #0x3f00
+	orr r1, r1, r0, lsl #8
+	ldr r0, _02009D1C ; =0x0400104A
+	orrne r1, r1, #0x2000
+	strh r1, [r0]
+	bx lr
+	.align 2, 0
+_02009D1C: .word 0x0400104A
+	arm_func_end sub_02009CF8
+
+	arm_func_start sub_02009D20
+sub_02009D20: ; 0x02009D20
+	ldr r2, _02009D44 ; =0x0400104A
+	cmp r1, #0
+	ldrh r1, [r2]
+	bic r1, r1, #0x3f
+	orr r1, r1, r0
+	ldr r0, _02009D44 ; =0x0400104A
+	orrne r1, r1, #0x20
+	strh r1, [r0]
+	bx lr
+	.align 2, 0
+_02009D44: .word 0x0400104A
+	arm_func_end sub_02009D20
+
+	arm_func_start sub_02009D48
+sub_02009D48: ; 0x02009D48
+	stmdb sp!, {r4, lr}
+	movs r4, r0
+	bne _02009D88
+	ldr r0, _02009DBC ; =_022A37CC
+	ldr r0, [r0, r4, lsl #4]
+	bl sub_02009C54
+	ldr r0, _02009DC0 ; =_022A37D0
+	ldr r0, [r0, r4, lsl #4]
+	bl sub_02009C38
+	ldr r0, _02009DC4 ; =_022A37D4
+	ldr r0, [r0, r4, lsl #4]
+	bl sub_02009C70
+	ldr r0, _02009DC8 ; =_022A37D8
+	ldr r0, [r0, r4, lsl #4]
+	bl sub_02009C8C
+	ldmia sp!, {r4, pc}
+_02009D88:
+	ldr r0, _02009DBC ; =_022A37CC
+	ldr r0, [r0, r4, lsl #4]
+	bl sub_020095AC
+	ldr r0, _02009DC0 ; =_022A37D0
+	ldr r0, [r0, r4, lsl #4]
+	bl sub_020095C8
+	ldr r0, _02009DC4 ; =_022A37D4
+	ldr r0, [r0, r4, lsl #4]
+	bl sub_020095E4
+	ldr r0, _02009DC8 ; =_022A37D8
+	ldr r0, [r0, r4, lsl #4]
+	bl sub_02009600
+	ldmia sp!, {r4, pc}
+	.align 2, 0
+_02009DBC: .word _022A37CC
+_02009DC0: .word _022A37D0
+_02009DC4: .word _022A37D4
+_02009DC8: .word _022A37D8
+	arm_func_end sub_02009D48
+
+	arm_func_start sub_02009DCC
+sub_02009DCC: ; 0x02009DCC
+	ldr r1, _02009E58 ; =_022A37AC
+	add r3, r0, r0, lsl #2
+	ldrb r2, [r1, r3]
+	mov r1, #0x1f
+	cmp r2, #0
+	ldr r2, _02009E5C ; =_022A37AD
+	bicne r1, r1, #1
+	ldrb r2, [r2, r3]
+	cmp r2, #0
+	ldr r2, _02009E60 ; =_022A37AE
+	bicne r1, r1, #2
+	ldrb r2, [r2, r3]
+	cmp r2, #0
+	ldr r2, _02009E64 ; =_022A37AF
+	bicne r1, r1, #4
+	ldrb r2, [r2, r3]
+	cmp r2, #0
+	ldr r2, _02009E68 ; =_022A37B0
+	bicne r1, r1, #8
+	ldrb r2, [r2, r3]
+	cmp r2, #0
+	bicne r1, r1, #0x10
+	cmp r0, #0
+	ldrne r2, _02009E6C ; =0x04001000
+	ldrne r0, [r2]
+	bicne r0, r0, #0x1f00
+	orrne r0, r0, r1, lsl #8
+	strne r0, [r2]
+	bxne lr
+	mov r2, #0x4000000
+	ldr r0, [r2]
+	bic r0, r0, #0x1f00
+	orr r0, r0, r1, lsl #8
+	str r0, [r2]
+	bx lr
+	.align 2, 0
+_02009E58: .word _022A37AC
+_02009E5C: .word _022A37AD
+_02009E60: .word _022A37AE
+_02009E64: .word _022A37AF
+_02009E68: .word _022A37B0
+_02009E6C: .word 0x04001000
+	arm_func_end sub_02009DCC
+
+	arm_func_start sub_02009E70
+sub_02009E70: ; 0x02009E70
+	stmdb sp!, {r3, lr}
+	mov r1, #0xa
+	mul r3, r0, r1
+	ldr r2, _02009F78 ; =_022A37B6
+	mov r1, #0
+	ldrb ip, [r2, r3]
+	mov r2, #0x20
+	cmp ip, #1
+	orreq r1, r1, #1
+	beq _02009EA0
+	cmp ip, #2
+	orreq r2, r2, #1
+_02009EA0:
+	ldr ip, _02009F7C ; =_022A37B7
+	ldrb ip, [ip, r3]
+	cmp ip, #1
+	orreq r1, r1, #2
+	beq _02009EBC
+	cmp ip, #2
+	orreq r2, r2, #2
+_02009EBC:
+	ldr ip, _02009F80 ; =_022A37B8
+	ldrb ip, [ip, r3]
+	cmp ip, #1
+	orreq r1, r1, #4
+	beq _02009ED8
+	cmp ip, #2
+	orreq r2, r2, #4
+_02009ED8:
+	ldr ip, _02009F84 ; =_022A37B9
+	ldrb ip, [ip, r3]
+	cmp ip, #1
+	orreq r1, r1, #8
+	beq _02009EF4
+	cmp ip, #2
+	orreq r2, r2, #8
+_02009EF4:
+	ldr ip, _02009F88 ; =_022A37BA
+	ldrb ip, [ip, r3]
+	cmp ip, #1
+	orreq r1, r1, #0x10
+	beq _02009F10
+	cmp ip, #2
+	orreq r2, r2, #0x10
+_02009F10:
+	cmp r0, #0
+	bne _02009F48
+	ldr r0, _02009F8C ; =_022A37BE
+	ldr ip, _02009F90 ; =_022A37BC
+	ldrh lr, [r0, r3]
+	ldr r0, _02009F94 ; =0x04000050
+	and lr, lr, #0xf8
+	mov lr, lr, asr #3
+	str lr, [sp]
+	ldrh r3, [ip, r3]
+	and r3, r3, #0xf8
+	mov r3, r3, asr #3
+	bl G2x_SetBlendAlpha_
+	ldmia sp!, {r3, pc}
+_02009F48:
+	ldr r0, _02009F8C ; =_022A37BE
+	ldr ip, _02009F90 ; =_022A37BC
+	ldrh lr, [r0, r3]
+	ldr r0, _02009F98 ; =0x04001050
+	and lr, lr, #0xf8
+	mov lr, lr, asr #3
+	str lr, [sp]
+	ldrh r3, [ip, r3]
+	and r3, r3, #0xf8
+	mov r3, r3, asr #3
+	bl G2x_SetBlendAlpha_
+	ldmia sp!, {r3, pc}
+	.align 2, 0
+_02009F78: .word _022A37B6
+_02009F7C: .word _022A37B7
+_02009F80: .word _022A37B8
+_02009F84: .word _022A37B9
+_02009F88: .word _022A37BA
+_02009F8C: .word _022A37BE
+_02009F90: .word _022A37BC
+_02009F94: .word 0x04000050
+_02009F98: .word 0x04001050
+	arm_func_end sub_02009E70
+
+	arm_func_start sub_02009F9C
+sub_02009F9C: ; 0x02009F9C
+	stmdb sp!, {r4, r5, r6, r7, r8, lr}
+	mov r1, #0x1b
+	mul r4, r0, r1
+	ldr r3, _0200A100 ; =_022A37EC
+	mov r2, #0
+	ldrb r1, [r3, r4]
+	add lr, r3, r4
+	mov r3, #0
+	cmp r1, #0
+	ldr r1, _0200A104 ; =_022A37ED
+	orrne r2, r2, #1
+	ldrb r1, [r1, r4]
+	mov r5, r3
+	mov r6, r3
+	cmp r1, #0
+	ldr r1, _0200A108 ; =_022A37EE
+	orrne r2, r2, #2
+	ldrb r1, [r1, r4]
+	mov ip, r3
+	cmp r1, #0
+	ldr r1, _0200A10C ; =_02092A04
+	orrne r2, r2, #4
+_02009FF4:
+	add r7, lr, ip
+	ldrb r8, [r7, #7]
+	cmp r8, #0
+	ldrne r8, [r1, ip, lsl #2]
+	orrne r3, r3, r8
+	ldrb r8, [r7, #0xc]
+	cmp r8, #0
+	ldrne r8, [r1, ip, lsl #2]
+	orrne r3, r3, r8
+	ldrb r8, [r7, #0x16]
+	ldrb r7, [r7, #0x11]
+	cmp r8, #0
+	ldrne r8, [r1, ip, lsl #2]
+	orrne r6, r6, r8
+	cmp r7, #0
+	ldrne r7, [r1, ip, lsl #2]
+	orrne r5, r5, r7
+	add r7, ip, #1
+	and ip, r7, #0xff
+	cmp ip, #5
+	blo _02009FF4
+	cmp r0, #0
+	bne _0200A0A8
+	mov r7, #0x4000000
+	ldr r1, [r7]
+	ldr r0, _0200A110 ; =_022A37EF
+	bic r1, r1, #0xe000
+	orr r1, r1, r2, lsl #13
+	str r1, [r7]
+	ldrb r1, [r0, r4]
+	mov r0, r3
+	bl sub_02009B98
+	ldr r1, _0200A114 ; =_022A37F0
+	mov r0, #0
+	ldrb r1, [r1, r4]
+	bl sub_02009BC0
+	ldr r1, _0200A118 ; =_022A37F1
+	mov r0, r5
+	ldrb r1, [r1, r4]
+	bl sub_02009BE8
+	ldr r1, _0200A11C ; =_022A37F2
+	mov r0, r6
+	ldrb r1, [r1, r4]
+	bl sub_02009C10
+	ldmia sp!, {r4, r5, r6, r7, r8, pc}
+_0200A0A8:
+	ldr ip, _0200A120 ; =0x04001000
+	ldr r1, _0200A110 ; =_022A37EF
+	ldr r7, [ip]
+	mov r0, r3
+	bic r3, r7, #0xe000
+	orr r2, r3, r2, lsl #13
+	str r2, [ip]
+	ldrb r1, [r1, r4]
+	bl sub_02009CA8
+	ldr r1, _0200A114 ; =_022A37F0
+	mov r0, #0
+	ldrb r1, [r1, r4]
+	bl sub_02009CD0
+	ldr r1, _0200A118 ; =_022A37F1
+	mov r0, r5
+	ldrb r1, [r1, r4]
+	bl sub_02009CF8
+	ldr r1, _0200A11C ; =_022A37F2
+	mov r0, r6
+	ldrb r1, [r1, r4]
+	bl sub_02009D20
+	ldmia sp!, {r4, r5, r6, r7, r8, pc}
+	.align 2, 0
+_0200A100: .word _022A37EC
+_0200A104: .word _022A37ED
+_0200A108: .word _022A37EE
+_0200A10C: .word _02092A04
+_0200A110: .word _022A37EF
+_0200A114: .word _022A37F0
+_0200A118: .word _022A37F1
+_0200A11C: .word _022A37F2
+_0200A120: .word 0x04001000
+	arm_func_end sub_02009F9C
+
+	arm_func_start sub_0200A124
+sub_0200A124: ; 0x0200A124
+	stmdb sp!, {r4, lr}
+	mov r4, r0
+	stmia r4, {r1, r2}
+	mov r0, #0
+	strb r0, [r4, #8]
+	ldr r1, [sp, #8]
+	str r3, [r4, #0xc]
+	mov r0, r2, lsl #1
+	bl MemAlloc
+	str r0, [r4, #0x10]
+	mov r0, r4
+	bl sub_0200A274
+	ldmia sp!, {r4, pc}
+	arm_func_end sub_0200A124
+
+	arm_func_start sub_0200A158
+sub_0200A158: ; 0x0200A158
+	stmdb sp!, {r4, lr}
+	mov r4, r0
+	ldr r0, [r4, #0x10]
+	bl MemFree
+	mov r0, #0
+	str r0, [r4, #0x10]
+	ldmia sp!, {r4, pc}
+	arm_func_end sub_0200A158
+
+	arm_func_start sub_0200A174
+sub_0200A174: ; 0x0200A174
+	mov r1, #1
+	strb r1, [r0, #8]
+	bx lr
+	arm_func_end sub_0200A174
+
+	arm_func_start sub_0200A180
+sub_0200A180: ; 0x0200A180
+	bx lr
+	arm_func_end sub_0200A180
+
+	arm_func_start sub_0200A184
+sub_0200A184: ; 0x0200A184
+	stmdb sp!, {r4, r5, r6, lr}
+	mov r6, r0
+	ldrb r0, [r6, #8]
+	cmp r0, #0
+	ldmeqia sp!, {r4, r5, r6, pc}
+	ldr r4, [r6, #0x10]
+	ldr r1, [r6, #4]
+	mov r0, r4
+	mov r1, r1, lsl #1
+	ldr r5, [r6, #0xc]
+	bl sub_0207A2DC
+	ldr r0, [r6]
+	cmp r0, #4
+	addls pc, pc, r0, lsl #2
+	b _0200A1D4
+_0200A1C0: ; jump table
+	b _0200A1D4 ; case 0
+	b _0200A1EC ; case 1
+	b _0200A20C ; case 2
+	b _0200A22C ; case 3
+	b _0200A24C ; case 4
+_0200A1D4:
+	ldr r2, [r6, #4]
+	mov r0, r5
+	mov r1, r4
+	mov r2, r2, lsl #1
+	bl Memcpy32
+	b _0200A268
+_0200A1EC:
+	bl GX_BeginLoadBGExtPltt
+	ldr r2, [r6, #4]
+	mov r0, r5
+	mov r1, r4
+	mov r2, r2, lsl #1
+	bl Memcpy32
+	bl GX_EndLoadBGExtPltt
+	b _0200A268
+_0200A20C:
+	bl GX_BeginLoadOBJExtPltt
+	ldr r2, [r6, #4]
+	mov r0, r5
+	mov r1, r4
+	mov r2, r2, lsl #1
+	bl Memcpy32
+	bl GX_EndLoadOBJExtPltt
+	b _0200A268
+_0200A22C:
+	bl GXS_BeginLoadBGExtPltt
+	ldr r2, [r6, #4]
+	mov r0, r5
+	mov r1, r4
+	mov r2, r2, lsl #1
+	bl Memcpy32
+	bl GXS_EndLoadBGExtPltt
+	b _0200A268
+_0200A24C:
+	bl GXS_BeginLoadOBJExtPltt
+	ldr r2, [r6, #4]
+	mov r0, r5
+	mov r1, r4
+	mov r2, r2, lsl #1
+	bl Memcpy32
+	bl GXS_EndLoadOBJExtPltt
+_0200A268:
+	mov r0, #0
+	strb r0, [r6, #8]
+	ldmia sp!, {r4, r5, r6, pc}
+	arm_func_end sub_0200A184
+
+	arm_func_start sub_0200A274
+sub_0200A274: ; 0x0200A274
+	mov r3, #0
+	ldr ip, [r0, #0x10]
+	mov r2, r3
+	b _0200A28C
+_0200A284:
+	strh r2, [ip], #2
+	add r3, r3, #1
+_0200A28C:
+	ldr r1, [r0, #4]
+	cmp r3, r1
+	blt _0200A284
+	bx lr
+	arm_func_end sub_0200A274
+
+	arm_func_start sub_0200A29C
+sub_0200A29C: ; 0x0200A29C
+	ldr r0, [r0, #0x10]
+	ldr ip, _0200A2B0 ; =Rgb8ToRgb5
+	add r0, r0, r1, lsl #1
+	mov r1, r2
+	bx ip
+	.align 2, 0
+_0200A2B0: .word Rgb8ToRgb5
+	arm_func_end sub_0200A29C
+
+	arm_func_start sub_0200A2B4
+sub_0200A2B4: ; 0x0200A2B4
+	ldr r3, [r0, #0x10]
+	ldr ip, _0200A2C8 ; =sub_02004FF8
+	mov r0, r1
+	add r1, r3, r2, lsl #1
+	bx ip
+	.align 2, 0
+_0200A2C8: .word sub_02004FF8
+	arm_func_end sub_0200A2B4
+
+	arm_func_start sub_0200A2CC
+sub_0200A2CC: ; 0x0200A2CC
+	mov r1, #0
+	str r1, [r0]
+	str r1, [r0, #4]
+	str r1, [r0, #0x18]
+	str r1, [r0, #0x1c]
+	str r1, [r0, #0x20]
+	str r1, [r0, #0x24]
+	str r1, [r0, #0x14]
+	strb r1, [r0, #8]
+	bx lr
+	arm_func_end sub_0200A2CC
+
+	arm_func_start sub_0200A2F4
+sub_0200A2F4: ; 0x0200A2F4
+	mov r1, #0
+_0200A2F8:
+	ldr r2, [r0, #0x24]
+	str r1, [r0, #0x20]
+	str r1, [r0, #0x24]
+	cmp r2, #0
+	movne r0, r2
+	bne _0200A2F8
+	bx lr
+	arm_func_end sub_0200A2F4
+_0200A314:
+	ldr r2, [r0, #0x24]
+	cmp r2, #0
+	beq _0200A330
+	cmp r2, r1
+	bxeq lr
+	mov r0, r2
+	b _0200A314
+_0200A330:
+	str r1, [r0, #0x24]
+	str r0, [r1, #0x20]
+	mov r0, #0
+	str r0, [r1, #0x24]
+	bx lr
+_0200A344:
+	ldr r2, [r0, #0x24]
+	cmp r2, #0
+	bxeq lr
+	cmp r2, r1
+	movne r0, r2
+	bne _0200A344
+	ldr r2, [r1, #0x24]
+	str r2, [r0, #0x24]
+	cmp r2, #0
+	strne r0, [r2, #0x20]
+	mov r0, #0
+	str r0, [r1, #0x20]
+	str r0, [r1, #0x24]
+	bx lr
+
+	arm_func_start sub_0200A37C
+sub_0200A37C: ; 0x0200A37C
+	stmdb sp!, {r3, r4, r5, lr}
+	mov r5, r1
+	ldr r4, [r0, #0x24]
+	b _0200A39C
+_0200A38C:
+	mov r0, r4
+	mov r1, r5
+	bl sub_0200A618
+	ldr r4, [r4, #0x24]
+_0200A39C:
+	cmp r4, #0
+	bne _0200A38C
+	ldmia sp!, {r3, r4, r5, pc}
+	arm_func_end sub_0200A37C
+
+	arm_func_start sub_0200A3A8
+sub_0200A3A8: ; 0x0200A3A8
+	stmdb sp!, {r4, r5, r6, lr}
+	mov r6, r1
+	mov r5, r2
+	ldr r4, [r0, #0x24]
+	b _0200A3D0
+_0200A3BC:
+	mov r0, r4
+	mov r1, r6
+	mov r2, r5
+	bl sub_0200A64C
+	ldr r4, [r4, #0x24]
+_0200A3D0:
+	cmp r4, #0
+	bne _0200A3BC
+	ldmia sp!, {r4, r5, r6, pc}
+	arm_func_end sub_0200A3A8
+
+	arm_func_start sub_0200A3DC
+sub_0200A3DC: ; 0x0200A3DC
+	stmdb sp!, {r4, r5, r6, lr}
+	mov r6, r1
+	mov r5, r2
+	ldr r4, [r0, #0x24]
+	b _0200A404
+_0200A3F0:
+	mov r0, r4
+	mov r1, r6
+	mov r2, r5
+	bl sub_0200A688
+	ldr r4, [r4, #0x24]
+_0200A404:
+	cmp r4, #0
+	bne _0200A3F0
+	ldmia sp!, {r4, r5, r6, pc}
+	arm_func_end sub_0200A3DC
+
+	arm_func_start sub_0200A410
+sub_0200A410: ; 0x0200A410
+	stmdb sp!, {r4, r5, r6, lr}
+	mov r6, r1
+	mov r5, r2
+	ldr r4, [r0, #0x24]
+	b _0200A438
+_0200A424:
+	mov r0, r4
+	mov r1, r6
+	mov r2, r5
+	bl sub_0200A6C4
+	ldr r4, [r4, #0x24]
+_0200A438:
+	cmp r4, #0
+	bne _0200A424
+	ldmia sp!, {r4, r5, r6, pc}
+	arm_func_end sub_0200A410
+
+	arm_func_start sub_0200A444
+sub_0200A444: ; 0x0200A444
+	stmdb sp!, {r4, r5, r6, lr}
+	mov r6, r1
+	mov r5, r2
+	ldr r4, [r0, #0x24]
+	b _0200A46C
+_0200A458:
+	mov r0, r4
+	mov r1, r6
+	mov r2, r5
+	bl sub_0200A700
+	ldr r4, [r4, #0x24]
+_0200A46C:
+	cmp r4, #0
+	bne _0200A458
+	ldmia sp!, {r4, r5, r6, pc}
+	arm_func_end sub_0200A444
+
+	arm_func_start sub_0200A478
+sub_0200A478: ; 0x0200A478
+	stmdb sp!, {r4, r5, r6, lr}
+	mov r6, r0
+	mov r5, r1
+	str r5, [r6]
+	ldr r1, [sp, #0x10]
+	str r3, [r6, #4]
+	mov r0, r3, lsl #2
+	mov r4, r2
+	bl MemAlloc
+	str r0, [r6, #0x18]
+	ldr r0, [r5, #0x10]
+	mov r1, #0
+	add r0, r0, r4, lsl #1
+	str r0, [r6, #0x1c]
+	str r1, [r6, #0x20]
+	mov r0, r6
+	str r1, [r6, #0x24]
+	bl sub_0200A544
+	ldmia sp!, {r4, r5, r6, pc}
+	arm_func_end sub_0200A478
+
+	arm_func_start sub_0200A4C4
+sub_0200A4C4: ; 0x0200A4C4
+	stmdb sp!, {r4, lr}
+	mov r4, r0
+	ldr r1, [r4, #0x20]
+	ldr r2, [r4, #0x24]
+	mov r0, #0
+	str r0, [r4, #0x20]
+	str r0, [r4, #0x24]
+	cmp r1, #0
+	strne r2, [r1, #0x24]
+	cmp r2, #0
+	strne r1, [r2, #0x20]
+	ldr r0, [r4, #0x18]
+	bl MemFree
+	mov r0, #0
+	str r0, [r4, #0x18]
+	ldmia sp!, {r4, pc}
+	arm_func_end sub_0200A4C4
+
+	arm_func_start sub_0200A504
+sub_0200A504: ; 0x0200A504
+	mov r1, #1
+	strb r1, [r0, #8]
+	bx lr
+	arm_func_end sub_0200A504
+
+	arm_func_start sub_0200A510
+sub_0200A510: ; 0x0200A510
+	stmdb sp!, {r4, lr}
+	mov r4, r0
+	ldrb r1, [r4, #8]
+	cmp r1, #0
+	ldmeqia sp!, {r4, pc}
+	ldr r1, [r4, #0x14]
+	blx r1
+	mov r0, #0
+	strb r0, [r4, #8]
+	ldr r0, [r4]
+	mov r1, #1
+	strb r1, [r0, #8]
+	ldmia sp!, {r4, pc}
+	arm_func_end sub_0200A510
+
+	arm_func_start sub_0200A544
+sub_0200A544: ; 0x0200A544
+	mov ip, #0
+	ldr r3, [r0, #0x18]
+	mov r2, ip
+	b _0200A56C
+_0200A554:
+	mov r1, r3
+	strb r2, [r3], #4
+	strb r2, [r1, #1]
+	strb r2, [r1, #2]
+	strb r2, [r1, #3]
+	add ip, ip, #1
+_0200A56C:
+	ldr r1, [r0, #4]
+	cmp ip, r1
+	blt _0200A554
+	ldr r2, _0200A58C ; =sub_0200A73C
+	mov r1, #1
+	str r2, [r0, #0x14]
+	strb r1, [r0, #8]
+	bx lr
+	.align 2, 0
+_0200A58C: .word sub_0200A73C
+	arm_func_end sub_0200A544
+
+	arm_func_start sub_0200A590
+sub_0200A590: ; 0x0200A590
+	ldr r0, [r0, #0x18]
+	mov r3, #4
+	add r1, r0, r1, lsl #2
+_0200A59C:
+	ldrb r0, [r2], #1
+	subs r3, r3, #1
+	strb r0, [r1], #1
+	bne _0200A59C
+	bx lr
+	arm_func_end sub_0200A590
+
+	arm_func_start sub_0200A5B0
+sub_0200A5B0: ; 0x0200A5B0
+	stmdb sp!, {r3, r4, r5, lr}
+	ldr r0, [r0, #0x18]
+	mov lr, #0
+	add ip, r0, r1, lsl #2
+	b _0200A5EC
+_0200A5C4:
+	mov r4, r2
+	mov r5, ip
+	add r2, r2, #4
+	add ip, ip, #4
+	mov r1, #4
+_0200A5D8:
+	ldrb r0, [r4], #1
+	subs r1, r1, #1
+	strb r0, [r5], #1
+	bne _0200A5D8
+	add lr, lr, #1
+_0200A5EC:
+	cmp lr, r3
+	blt _0200A5C4
+	ldmia sp!, {r3, r4, r5, pc}
+	arm_func_end sub_0200A5B0
+
+	arm_func_start sub_0200A5F8
+sub_0200A5F8: ; 0x0200A5F8
+	ldr r0, [r0, #0x18]
+	mov r3, #4
+	add r2, r0, r2, lsl #2
+_0200A604:
+	ldrb r0, [r2], #1
+	subs r3, r3, #1
+	strb r0, [r1], #1
+	bne _0200A604
+	bx lr
+	arm_func_end sub_0200A5F8
+
+	arm_func_start sub_0200A618
+sub_0200A618: ; 0x0200A618
+	strh r1, [r0, #0xa]
+	mov r2, #0
+	strb r2, [r0, #0xc]
+	strb r2, [r0, #0xd]
+	strb r2, [r0, #0xe]
+	strb r2, [r0, #0xf]
+	ldr r1, _0200A648 ; =sub_0200A78C
+	str r2, [r0, #0x10]
+	str r1, [r0, #0x14]
+	mov r1, #1
+	strb r1, [r0, #8]
+	bx lr
+	.align 2, 0
+_0200A648: .word sub_0200A78C
+	arm_func_end sub_0200A618
+
+	arm_func_start sub_0200A64C
+sub_0200A64C: ; 0x0200A64C
+	strh r1, [r0, #0xa]
+	add ip, r0, #0xc
+	mov r3, #4
+_0200A658:
+	ldrb r1, [r2], #1
+	subs r3, r3, #1
+	strb r1, [ip], #1
+	bne _0200A658
+	mov r2, #0
+	ldr r1, _0200A684 ; =sub_0200A9E4
+	str r2, [r0, #0x10]
+	str r1, [r0, #0x14]
+	mov r1, #1
+	strb r1, [r0, #8]
+	bx lr
+	.align 2, 0
+_0200A684: .word sub_0200A9E4
+	arm_func_end sub_0200A64C
+
+	arm_func_start sub_0200A688
+sub_0200A688: ; 0x0200A688
+	strh r1, [r0, #0xa]
+	add ip, r0, #0xc
+	mov r3, #4
+_0200A694:
+	ldrb r1, [r2], #1
+	subs r3, r3, #1
+	strb r1, [ip], #1
+	bne _0200A694
+	mov r2, #0
+	ldr r1, _0200A6C0 ; =sub_0200ACB0
+	str r2, [r0, #0x10]
+	str r1, [r0, #0x14]
+	mov r1, #1
+	strb r1, [r0, #8]
+	bx lr
+	.align 2, 0
+_0200A6C0: .word sub_0200ACB0
+	arm_func_end sub_0200A688
+
+	arm_func_start sub_0200A6C4
+sub_0200A6C4: ; 0x0200A6C4
+	strh r1, [r0, #0xa]
+	add ip, r0, #0xc
+	mov r3, #4
+_0200A6D0:
+	ldrb r1, [r2], #1
+	subs r3, r3, #1
+	strb r1, [ip], #1
+	bne _0200A6D0
+	mov r2, #0
+	ldr r1, _0200A6FC ; =TransformPaletteDataWithFlushDivideFade
+	str r2, [r0, #0x10]
+	str r1, [r0, #0x14]
+	mov r1, #1
+	strb r1, [r0, #8]
+	bx lr
+	.align 2, 0
+_0200A6FC: .word TransformPaletteDataWithFlushDivideFade
+	arm_func_end sub_0200A6C4
+
+	arm_func_start sub_0200A700
+sub_0200A700: ; 0x0200A700
+	strh r1, [r0, #0xa]
+	add ip, r0, #0xc
+	mov r3, #4
+_0200A70C:
+	ldrb r1, [r2], #1
+	subs r3, r3, #1
+	strb r1, [ip], #1
+	bne _0200A70C
+	mov r2, #0
+	ldr r1, _0200A738 ; =sub_0200B0AC
+	str r2, [r0, #0x10]
+	str r1, [r0, #0x14]
+	mov r1, #1
+	strb r1, [r0, #8]
+	bx lr
+	.align 2, 0
+_0200A738: .word sub_0200B0AC
+	arm_func_end sub_0200A700
+
+	arm_func_start sub_0200A73C
+sub_0200A73C: ; 0x0200A73C
+	stmdb sp!, {r4, lr}
+	ldr ip, [r0, #0x18]
+	ldr lr, [r0, #0x1c]
+	mov r4, #0
+	b _0200A77C
+_0200A750:
+	ldrb r1, [ip, #1]
+	ldrb r2, [ip, #2]
+	ldrb r3, [ip], #4
+	and r1, r1, #0xf8
+	and r2, r2, #0xf8
+	mov r1, r1, lsl #2
+	and r3, r3, #0xf8
+	orr r1, r1, r2, lsl #7
+	orr r1, r1, r3, asr #3
+	strh r1, [lr], #2
+	add r4, r4, #1
+_0200A77C:
+	ldr r1, [r0, #4]
+	cmp r4, r1
+	blt _0200A750
+	ldmia sp!, {r4, pc}
+	arm_func_end sub_0200A73C
+
+	arm_func_start sub_0200A78C
+sub_0200A78C: ; 0x0200A78C
+	stmdb sp!, {r4, r5, r6, r7, r8, lr}
+	ldrh r2, [r0, #0xa]
+	ldr r1, [r0]
+	ldr r3, [r0, #0x18]
+	cmp r2, #0x100
+	ldr r1, [r1]
+	ldr ip, [r0, #0x1c]
+	blo _0200A7F0
+	mov r5, #0
+	b _0200A7E0
+_0200A7B4:
+	ldrb r1, [r3, #1]
+	ldrb r2, [r3, #2]
+	ldrb r4, [r3], #4
+	and r1, r1, #0xf8
+	and r2, r2, #0xf8
+	mov r1, r1, lsl #2
+	and r4, r4, #0xf8
+	orr r1, r1, r2, lsl #7
+	orr r1, r1, r4, asr #3
+	strh r1, [ip], #2
+	add r5, r5, #1
+_0200A7E0:
+	ldr r1, [r0, #4]
+	cmp r5, r1
+	blt _0200A7B4
+	ldmia sp!, {r4, r5, r6, r7, r8, pc}
+_0200A7F0:
+	cmp r2, #0
+	bne _0200A898
+	cmp r1, #2
+	bne _0200A874
+	mov lr, #0
+	mov r1, lr
+	mov r2, lr
+	b _0200A864
+_0200A810:
+	mov r4, r2
+_0200A814:
+	add r4, r4, #1
+	cmp r4, #0xf0
+	strh r1, [ip], #2
+	add lr, lr, #1
+	blt _0200A814
+	mov r4, r1
+_0200A82C:
+	ldrb r5, [r3, #1]
+	ldrb r6, [r3, #2]
+	ldrb r7, [r3], #4
+	and r5, r5, #0xf8
+	and r6, r6, #0xf8
+	mov r5, r5, lsl #2
+	add r4, r4, #1
+	and r7, r7, #0xf8
+	orr r5, r5, r6, lsl #7
+	orr r5, r5, r7, asr #3
+	cmp r4, #0x10
+	strh r5, [ip], #2
+	add lr, lr, #1
+	blt _0200A82C
+_0200A864:
+	ldr r4, [r0, #4]
+	cmp lr, r4
+	blt _0200A810
+	ldmia sp!, {r4, r5, r6, r7, r8, pc}
+_0200A874:
+	mov r3, #0
+	mov r2, r3
+	b _0200A888
+_0200A880:
+	strh r2, [ip], #2
+	add r3, r3, #1
+_0200A888:
+	ldr r1, [r0, #4]
+	cmp r3, r1
+	blt _0200A880
+	ldmia sp!, {r4, r5, r6, r7, r8, pc}
+_0200A898:
+	cmp r1, #2
+	mov lr, #0
+	bne _0200A9D4
+	b _0200A95C
+_0200A8A8:
+	mov r4, #0
+_0200A8AC:
+	ldrb r1, [r3, #1]
+	ldrb r5, [r3, #2]
+	ldrb r6, [r3], #4
+	mul r7, r1, r2
+	mul r8, r5, r2
+	mul r1, r6, r2
+	mov r5, r7, asr #7
+	add r7, r7, r5, lsr #24
+	mov r6, r8, asr #7
+	mov r5, r1, asr #7
+	add r1, r1, r5, lsr #24
+	add r6, r8, r6, lsr #24
+	mov r1, r1, lsl #8
+	add r4, r4, #1
+	mov r7, r7, lsl #8
+	mov r5, r6, lsl #8
+	mov r6, r7, lsr #0x10
+	mov r7, r5, lsr #0x10
+	and r5, r6, #0xf8
+	mov r8, r1, lsr #0x10
+	mov r1, r5, lsl #2
+	and r6, r7, #0xf8
+	and r5, r8, #0xf8
+	orr r1, r1, r6, lsl #7
+	orr r1, r1, r5, asr #3
+	strh r1, [ip], #2
+	cmp r4, #0xf0
+	add lr, lr, #1
+	blt _0200A8AC
+	mov r1, #0
+_0200A924:
+	ldrb r4, [r3, #1]
+	ldrb r5, [r3, #2]
+	ldrb r6, [r3], #4
+	and r4, r4, #0xf8
+	and r5, r5, #0xf8
+	mov r4, r4, lsl #2
+	add r1, r1, #1
+	and r6, r6, #0xf8
+	orr r4, r4, r5, lsl #7
+	orr r4, r4, r6, asr #3
+	cmp r1, #0x10
+	strh r4, [ip], #2
+	add lr, lr, #1
+	blt _0200A924
+_0200A95C:
+	ldr r1, [r0, #4]
+	cmp lr, r1
+	blt _0200A8A8
+	ldmia sp!, {r4, r5, r6, r7, r8, pc}
+_0200A96C:
+	ldrb r1, [r3, #1]
+	ldrb r4, [r3, #2]
+	ldrb r5, [r3], #4
+	mul r6, r1, r2
+	mul r7, r4, r2
+	mul r1, r5, r2
+	mov r4, r6, asr #7
+	add r6, r6, r4, lsr #24
+	mov r5, r7, asr #7
+	mov r4, r1, asr #7
+	add r1, r1, r4, lsr #24
+	add r5, r7, r5, lsr #24
+	mov r1, r1, lsl #8
+	mov r6, r6, lsl #8
+	mov r4, r5, lsl #8
+	mov r5, r6, lsr #0x10
+	mov r6, r4, lsr #0x10
+	and r4, r5, #0xf8
+	mov r7, r1, lsr #0x10
+	mov r1, r4, lsl #2
+	and r5, r6, #0xf8
+	and r4, r7, #0xf8
+	orr r1, r1, r5, lsl #7
+	orr r1, r1, r4, asr #3
+	strh r1, [ip], #2
+	add lr, lr, #1
+_0200A9D4:
+	ldr r1, [r0, #4]
+	cmp lr, r1
+	blt _0200A96C
+	ldmia sp!, {r4, r5, r6, r7, r8, pc}
+	arm_func_end sub_0200A78C
+
+	arm_func_start sub_0200A9E4
+sub_0200A9E4: ; 0x0200A9E4
+	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
+	ldr r1, [r0]
+	ldrh r5, [r0, #0xa]
+	ldr r1, [r1]
+	add r4, sp, #0
+	add r6, r0, #0xc
+	mov r3, #4
+_0200AA00:
+	ldrb r2, [r6], #1
+	subs r3, r3, #1
+	strb r2, [r4], #1
+	bne _0200AA00
+	cmp r5, #0x100
+	ldr r2, [r0, #0x18]
+	ldr r4, [r0, #0x1c]
+	blo _0200AA64
+	mov r6, #0
+	b _0200AA54
+_0200AA28:
+	ldrb r1, [r2, #1]
+	ldrb r3, [r2, #2]
+	ldrb r5, [r2], #4
+	and r1, r1, #0xf8
+	and r3, r3, #0xf8
+	mov r1, r1, lsl #2
+	and r5, r5, #0xf8
+	orr r1, r1, r3, lsl #7
+	orr r1, r1, r5, asr #3
+	strh r1, [r4], #2
+	add r6, r6, #1
+_0200AA54:
+	ldr r1, [r0, #4]
+	cmp r6, r1
+	blt _0200AA28
+	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+_0200AA64:
+	cmp r5, #0
+	bne _0200AB38
+	ldrb r3, [sp, #1]
+	ldrb r5, [sp, #2]
+	ldrb r6, [sp]
+	and r3, r3, #0xf8
+	and r5, r5, #0xf8
+	mov r3, r3, lsl #2
+	and r6, r6, #0xf8
+	orr r3, r3, r5, lsl #7
+	orr r3, r3, r6, asr #3
+	mov r3, r3, lsl #0x10
+	cmp r1, #2
+	mov r5, r3, lsr #0x10
+	bne _0200AB18
+	mov r6, #0
+	mov r3, r6
+	mov r1, r6
+	b _0200AB08
+_0200AAB0:
+	mov r7, r3
+_0200AAB4:
+	add r7, r7, #1
+	cmp r7, #0xf0
+	strh r5, [r4], #2
+	add r2, r2, #4
+	add r6, r6, #1
+	blt _0200AAB4
+	mov r7, r1
+_0200AAD0:
+	ldrb r8, [r2, #1]
+	ldrb sb, [r2, #2]
+	ldrb sl, [r2], #4
+	and r8, r8, #0xf8
+	and sb, sb, #0xf8
+	mov r8, r8, lsl #2
+	add r7, r7, #1
+	and sl, sl, #0xf8
+	orr r8, r8, sb, lsl #7
+	orr r8, r8, sl, asr #3
+	cmp r7, #0x10
+	strh r8, [r4], #2
+	add r6, r6, #1
+	blt _0200AAD0
+_0200AB08:
+	ldr r7, [r0, #4]
+	cmp r6, r7
+	blt _0200AAB0
+	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+_0200AB18:
+	mov r2, #0
+	b _0200AB28
+_0200AB20:
+	strh r5, [r4], #2
+	add r2, r2, #1
+_0200AB28:
+	ldr r1, [r0, #4]
+	cmp r2, r1
+	blt _0200AB20
+	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+_0200AB38:
+	rsb r3, r5, #0x100
+	mov r3, r3, lsl #0x10
+	ldrb r8, [sp]
+	mov sb, r3, lsr #0x10
+	ldrb r7, [sp, #1]
+	ldrb r6, [sp, #2]
+	mul r3, r8, sb
+	mul ip, r7, sb
+	mul lr, r6, sb
+	cmp r1, #2
+	bne _0200AC30
+	mov r6, #0
+	b _0200AC20
+_0200AB6C:
+	mov r7, #0
+_0200AB70:
+	ldrb r1, [r2, #1]
+	ldrb fp, [r2, #2]
+	ldrb sb, [r2], #4
+	mla sl, r1, r5, ip
+	mla r8, fp, r5, lr
+	mla r1, sb, r5, r3
+	mov sb, sl, asr #7
+	add sb, sl, sb, lsr #24
+	mov fp, r8, asr #7
+	add r8, r8, fp, lsr #24
+	mov sl, r1, asr #7
+	mov sb, sb, lsl #8
+	add r1, r1, sl, lsr #24
+	mov r8, r8, lsl #8
+	mov r1, r1, lsl #8
+	mov r1, r1, lsr #0x10
+	add r7, r7, #1
+	mov sb, sb, lsr #0x10
+	mov sl, r8, lsr #0x10
+	and r8, sb, #0xf8
+	and sb, sl, #0xf8
+	mov r8, r8, lsl #2
+	and r1, r1, #0xf8
+	orr r8, r8, sb, lsl #7
+	orr r1, r8, r1, asr #3
+	strh r1, [r4], #2
+	cmp r7, #0xf0
+	add r6, r6, #1
+	blt _0200AB70
+	mov r7, #0
+_0200ABE8:
+	ldrb r8, [r2, #1]
+	ldrb sb, [r2, #2]
+	ldrb r1, [r2], #4
+	and r8, r8, #0xf8
+	and sb, sb, #0xf8
+	mov r8, r8, lsl #2
+	and sl, r1, #0xf8
+	orr r1, r8, sb, lsl #7
+	add r7, r7, #1
+	orr r1, r1, sl, asr #3
+	cmp r7, #0x10
+	strh r1, [r4], #2
+	add r6, r6, #1
+	blt _0200ABE8
+_0200AC20:
+	ldr r1, [r0, #4]
+	cmp r6, r1
+	blt _0200AB6C
+	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+_0200AC30:
+	mov r7, #0
+	b _0200ACA0
+_0200AC38:
+	ldrb r1, [r2, #1]
+	ldrb r6, [r2, #2]
+	ldrb r8, [r2], #4
+	mla sl, r1, r5, ip
+	mla r1, r6, r5, lr
+	mla r6, r8, r5, r3
+	mov r8, sl, asr #7
+	add sl, sl, r8, lsr #24
+	mov sb, r1, asr #7
+	mov r8, r6, asr #7
+	add sb, r1, sb, lsr #24
+	add r1, r6, r8, lsr #24
+	mov sl, sl, lsl #8
+	mov r6, sb, lsl #8
+	mov r8, sl, lsr #0x10
+	mov r1, r1, lsl #8
+	mov sb, r6, lsr #0x10
+	and r6, r8, #0xf8
+	mov sl, r1, lsr #0x10
+	mov r1, r6, lsl #2
+	and r8, sb, #0xf8
+	and r6, sl, #0xf8
+	orr r1, r1, r8, lsl #7
+	orr r1, r1, r6, asr #3
+	strh r1, [r4], #2
+	add r7, r7, #1
+_0200ACA0:
+	ldr r1, [r0, #4]
+	cmp r7, r1
+	blt _0200AC38
+	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+	arm_func_end sub_0200A9E4
+
+	arm_func_start sub_0200ACB0
+sub_0200ACB0: ; 0x0200ACB0
+	stmdb sp!, {r3, r4, r5, r6, r7, r8, lr}
+	sub sp, sp, #4
+	ldr r1, [r0]
+	ldrh r2, [r0, #0xa]
+	ldr r1, [r1]
+	add r5, sp, #0
+	add r6, r0, #0xc
+	mov r4, #4
+_0200ACD0:
+	ldrb r3, [r6], #1
+	subs r4, r4, #1
+	strb r3, [r5], #1
+	bne _0200ACD0
+	cmp r2, #0x100
+	ldr r3, [r0, #0x18]
+	ldr r4, [r0, #0x1c]
+	blo _0200AD20
+	ldrb r2, [sp, #1]
+	ldrb r5, [sp, #2]
+	ldrb r6, [sp]
+	and r2, r2, #0xf8
+	and r5, r5, #0xf8
+	mov r2, r2, lsl #2
+	and r6, r6, #0xf8
+	orr r2, r2, r5, lsl #7
+	orr r2, r2, r6, asr #3
+	mov r2, r2, lsl #0x10
+	mov ip, r2, lsr #0x10
+	b _0200AD94
+_0200AD20:
+	cmp r2, #0
+	moveq ip, #0
+	beq _0200AD94
+	ldrb r5, [sp, #1]
+	ldrb r7, [sp, #2]
+	ldrb ip, [sp]
+	mul r6, r5, r2
+	mul r8, r7, r2
+	mul r7, ip, r2
+	mov r2, r6, asr #7
+	mov r5, r8, asr #7
+	add ip, r6, r2, lsr #24
+	mov r2, r7, asr #7
+	add r5, r8, r5, lsr #24
+	mov ip, ip, lsl #8
+	add r2, r7, r2, lsr #24
+	mov r5, r5, lsl #8
+	mov r6, ip, lsr #0x10
+	mov r2, r2, lsl #8
+	mov r7, r5, lsr #0x10
+	and r5, r6, #0xf8
+	mov r8, r2, lsr #0x10
+	and r6, r7, #0xf8
+	mov r2, r5, lsl #2
+	and r5, r8, #0xf8
+	orr r2, r2, r6, lsl #7
+	orr r2, r2, r5, asr #3
+	mov r2, r2, lsl #0x10
+	mov ip, r2, lsr #0x10
+_0200AD94:
+	cmp r1, #2
+	bne _0200AE14
+	mov lr, #0
+	mov r2, lr
+	mov r1, lr
+	b _0200AE04
+_0200ADAC:
+	mov r5, r2
+_0200ADB0:
+	add r5, r5, #1
+	cmp r5, #0xf0
+	strh ip, [r4], #2
+	add r3, r3, #4
+	add lr, lr, #1
+	blt _0200ADB0
+	mov r5, r1
+_0200ADCC:
+	ldrb r6, [r3, #1]
+	ldrb r7, [r3, #2]
+	ldrb r8, [r3], #4
+	and r6, r6, #0xf8
+	and r7, r7, #0xf8
+	mov r6, r6, lsl #2
+	add r5, r5, #1
+	and r8, r8, #0xf8
+	orr r6, r6, r7, lsl #7
+	orr r6, r6, r8, asr #3
+	cmp r5, #0x10
+	strh r6, [r4], #2
+	add lr, lr, #1
+	blt _0200ADCC
+_0200AE04:
+	ldr r5, [r0, #4]
+	cmp lr, r5
+	blt _0200ADAC
+	b _0200AE30
+_0200AE14:
+	mov r2, #0
+	b _0200AE24
+_0200AE1C:
+	strh ip, [r4], #2
+	add r2, r2, #1
+_0200AE24:
+	ldr r1, [r0, #4]
+	cmp r2, r1
+	blt _0200AE1C
+_0200AE30:
+	add sp, sp, #4
+	ldmia sp!, {r3, r4, r5, r6, r7, r8, pc}
+	arm_func_end sub_0200ACB0
+
+; https://decomp.me/scratch/xdMiD
+	arm_func_start TransformPaletteDataWithFlushDivideFade
+TransformPaletteDataWithFlushDivideFade: ; 0x0200AE38
+	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
+	sub sp, sp, #0x18
+	mov sl, r0
+	ldr r1, [sl]
+	ldrh r0, [sl, #0xa]
+	ldr fp, [r1]
+	add r3, sp, #0x14
+	add r4, sl, #0xc
+	mov r2, #4
+_0200AE5C:
+	ldrb r1, [r4], #1
+	subs r2, r2, #1
+	strb r1, [r3], #1
+	bne _0200AE5C
+	cmp r0, #0x100
+	ldr r4, [sl, #0x18]
+	ldr r5, [sl, #0x1c]
+	blo _0200AEC0
+	mov r3, #0
+	b _0200AEB0
+_0200AE84:
+	ldrb r0, [r4, #1]
+	ldrb r1, [r4, #2]
+	ldrb r2, [r4], #4
+	and r0, r0, #0xf8
+	and r1, r1, #0xf8
+	mov r0, r0, lsl #2
+	and r2, r2, #0xf8
+	orr r0, r0, r1, lsl #7
+	orr r0, r0, r2, asr #3
+	strh r0, [r5], #2
+	add r3, r3, #1
+_0200AEB0:
+	ldr r0, [sl, #4]
+	cmp r3, r0
+	blt _0200AE84
+	b _0200B0A4
+_0200AEC0:
+	ldrb sb, [sp, #0x14]
+	ldrb r7, [sp, #0x15]
+	ldrb r3, [sp, #0x16]
+	rsb r6, sb, #0xff
+	mul r8, r6, r0
+	rsb r2, r7, #0xff
+	mov ip, r8, asr #7
+	add r8, r8, ip, lsr #24
+	add r8, sb, r8, asr #8
+	rsb r1, r3, #0xff
+	mul r6, r2, r0
+	mul r2, r1, r0
+	mov r0, r6, asr #7
+	mov r1, r2, asr #7
+	add r0, r6, r0, lsr #24
+	add r1, r2, r1, lsr #24
+	add r6, r7, r0, asr #8
+	add r2, r3, r1, asr #8
+	mov r0, r8, lsl #0x10
+	mov r1, r6, lsl #0x10
+	mov r2, r2, lsl #0x10
+	cmp fp, #2
+	mov r8, r0, lsr #0x10
+	mov r6, r1, lsr #0x10
+	mov r7, r2, lsr #0x10
+	mov sb, #0
+	bne _0200B098
+	b _0200B004
+_0200AF30:
+	mov fp, #0
+_0200AF34:
+	ldrb r2, [r4]
+	str r5, [sp]
+	mov r1, #0xff
+	mul r0, r2, r8
+	add r5, r5, #2
+	bl _s32_div_f
+	ldrb r2, [r4, #2]
+	str r0, [sp, #4]
+	mov r1, #0xff
+	mul r0, r2, r7
+	bl _s32_div_f
+	ldrb r2, [r4, #1]
+	str r0, [sp, #8]
+	mov r1, #0xff
+	mul r0, r2, r6
+	bl _s32_div_f
+	ldr r1, [sp, #4]
+	mov r0, r0, lsl #0x10
+	mov r1, r1, lsl #0x10
+	mov r1, r1, lsr #0x10
+	and r2, r1, #0xf8
+	ldr r1, [sp, #8]
+	mov r0, r0, lsr #0x10
+	mov r1, r1, lsl #0x10
+	mov r1, r1, lsr #0x10
+	and r0, r0, #0xf8
+	add fp, fp, #1
+	and r1, r1, #0xf8
+	mov r0, r0, lsl #2
+	orr r0, r0, r1, lsl #7
+	orr r1, r0, r2, asr #3
+	ldr r0, [sp]
+	add r4, r4, #4
+	strh r1, [r0]
+	cmp fp, #0xf0
+	add sb, sb, #1
+	blt _0200AF34
+	mov r1, #0
+_0200AFCC:
+	ldrb r2, [r4, #1]
+	ldrb r3, [r4, #2]
+	ldrb r0, [r4], #4
+	and r2, r2, #0xf8
+	and r3, r3, #0xf8
+	mov r2, r2, lsl #2
+	and fp, r0, #0xf8
+	orr r0, r2, r3, lsl #7
+	add r1, r1, #1
+	orr r0, r0, fp, asr #3
+	cmp r1, #0x10
+	strh r0, [r5], #2
+	add sb, sb, #1
+	blt _0200AFCC
+_0200B004:
+	ldr r0, [sl, #4]
+	cmp sb, r0
+	blt _0200AF30
+	b _0200B0A4
+_0200B014:
+	ldrb r2, [r4]
+	mov fp, r5
+	mov r1, #0xff
+	mul r0, r2, r8
+	add r5, r5, #2
+	bl _s32_div_f
+	ldrb r2, [r4, #2]
+	str r0, [sp, #0xc]
+	mov r1, #0xff
+	mul r0, r2, r7
+	bl _s32_div_f
+	ldrb r2, [r4, #1]
+	str r0, [sp, #0x10]
+	mov r1, #0xff
+	mul r0, r2, r6
+	bl _s32_div_f
+	ldr r1, [sp, #0xc]
+	mov r0, r0, lsl #0x10
+	mov r1, r1, lsl #0x10
+	mov r1, r1, lsr #0x10
+	and r2, r1, #0xf8
+	ldr r1, [sp, #0x10]
+	mov r0, r0, lsr #0x10
+	mov r1, r1, lsl #0x10
+	mov r1, r1, lsr #0x10
+	and r0, r0, #0xf8
+	and r1, r1, #0xf8
+	mov r0, r0, lsl #2
+	orr r0, r0, r1, lsl #7
+	orr r0, r0, r2, asr #3
+	strh r0, [fp]
+	add r4, r4, #4
+	add sb, sb, #1
+_0200B098:
+	ldr r0, [sl, #4]
+	cmp sb, r0
+	blt _0200B014
+_0200B0A4:
+	add sp, sp, #0x18
+	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+	arm_func_end TransformPaletteDataWithFlushDivideFade
+
+	arm_func_start sub_0200B0AC
+sub_0200B0AC: ; 0x0200B0AC
+	stmdb sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, lr}
+	sub sp, sp, #0x18
+	mov sl, r0
+	ldr r0, [sl]
+	ldrh r3, [sl, #0xa]
+	ldr r2, [r0]
+	add r4, sp, #0x14
+	add r5, sl, #0xc
+	mov r1, #4
+_0200B0D0:
+	ldrb r0, [r5], #1
+	subs r1, r1, #1
+	strb r0, [r4], #1
+	bne _0200B0D0
+	ldrb r0, [sp, #0x14]
+	ldrb r7, [sp, #0x15]
+	cmp r3, #0x100
+	movhs r3, #0x100
+	ldrb r5, [sp, #0x16]
+	mul r1, r0, r3
+	mul r0, r7, r3
+	mul r8, r5, r3
+	mov r3, r1, asr #7
+	mov r5, r0, asr #7
+	add r1, r1, r3, lsr #24
+	add r3, r0, r5, lsr #24
+	mov r0, r1, lsl #8
+	mov r7, r8, asr #7
+	add r5, r8, r7, lsr #24
+	mov r1, r3, lsl #8
+	mov r3, r5, lsl #8
+	ldr r4, [sl, #0x18]
+	ldr r6, [sl, #0x1c]
+	cmp r2, #2
+	mov sb, r0, lsr #0x10
+	mov r7, r1, lsr #0x10
+	mov r8, r3, lsr #0x10
+	mov r5, #0
+	bne _0200B2B0
+	b _0200B21C
+_0200B148:
+	mov fp, #0
+_0200B14C:
+	ldrb r2, [r4]
+	str r6, [sp]
+	mov r1, #0xff
+	mul r0, r2, sb
+	add r6, r6, #2
+	bl _s32_div_f
+	ldrb r2, [r4, #2]
+	str r0, [sp, #4]
+	mov r1, #0xff
+	mul r0, r2, r8
+	bl _s32_div_f
+	ldrb r2, [r4, #1]
+	str r0, [sp, #8]
+	mov r1, #0xff
+	mul r0, r2, r7
+	bl _s32_div_f
+	ldr r1, [sp, #4]
+	mov r0, r0, lsl #0x10
+	mov r1, r1, lsl #0x10
+	mov r1, r1, lsr #0x10
+	and r2, r1, #0xf8
+	ldr r1, [sp, #8]
+	mov r0, r0, lsr #0x10
+	mov r1, r1, lsl #0x10
+	mov r1, r1, lsr #0x10
+	and r0, r0, #0xf8
+	add fp, fp, #1
+	and r1, r1, #0xf8
+	mov r0, r0, lsl #2
+	orr r0, r0, r1, lsl #7
+	orr r1, r0, r2, asr #3
+	ldr r0, [sp]
+	add r4, r4, #4
+	strh r1, [r0]
+	cmp fp, #0xf0
+	add r5, r5, #1
+	blt _0200B14C
+	mov r1, #0
+_0200B1E4:
+	ldrb r2, [r4, #1]
+	ldrb r3, [r4, #2]
+	ldrb r0, [r4], #4
+	and r2, r2, #0xf8
+	and r3, r3, #0xf8
+	mov r2, r2, lsl #2
+	and fp, r0, #0xf8
+	orr r0, r2, r3, lsl #7
+	add r1, r1, #1
+	orr r0, r0, fp, asr #3
+	cmp r1, #0x10
+	strh r0, [r6], #2
+	add r5, r5, #1
+	blt _0200B1E4
+_0200B21C:
+	ldr r0, [sl, #4]
+	cmp r5, r0
+	blt _0200B148
+	b _0200B2BC
+_0200B22C:
+	ldrb r2, [r4]
+	mov fp, r6
+	mov r1, #0xff
+	mul r0, r2, sb
+	add r6, r6, #2
+	bl _s32_div_f
+	ldrb r2, [r4, #2]
+	str r0, [sp, #0xc]
+	mov r1, #0xff
+	mul r0, r2, r8
+	bl _s32_div_f
+	ldrb r2, [r4, #1]
+	str r0, [sp, #0x10]
+	mov r1, #0xff
+	mul r0, r2, r7
+	bl _s32_div_f
+	ldr r1, [sp, #0xc]
+	mov r0, r0, lsl #0x10
+	mov r1, r1, lsl #0x10
+	mov r1, r1, lsr #0x10
+	and r2, r1, #0xf8
+	ldr r1, [sp, #0x10]
+	mov r0, r0, lsr #0x10
+	mov r1, r1, lsl #0x10
+	mov r1, r1, lsr #0x10
+	and r0, r0, #0xf8
+	and r1, r1, #0xf8
+	mov r0, r0, lsl #2
+	orr r0, r0, r1, lsl #7
+	orr r0, r0, r2, asr #3
+	strh r0, [fp]
+	add r4, r4, #4
+	add r5, r5, #1
+_0200B2B0:
+	ldr r0, [sl, #4]
+	cmp r5, r0
+	blt _0200B22C
+_0200B2BC:
+	add sp, sp, #0x18
+	ldmia sp!, {r3, r4, r5, r6, r7, r8, sb, sl, fp, pc}
+	arm_func_end sub_0200B0AC
+
+	arm_func_start sub_0200B2C4
+sub_0200B2C4: ; 0x0200B2C4
+	stmdb sp!, {r4, lr}
+	mov r4, r0
+	strb r1, [r4]
+	mov r0, #0
+	strb r0, [r4, #1]
+	str r3, [r4, #0x10]
+	str r0, [r4, #4]
+	str r0, [r4, #8]
+	str r2, [r4, #0xc]
+	ldrb r2, [r4]
+	ldr r0, _0200B310 ; =_02092AD8
+	ldr r1, [sp, #8]
+	ldr r0, [r0, r2, lsl #2]
+	str r0, [r4, #0x14]
+	bl MemAlloc
+	str r0, [r4, #0x18]
+	mov r0, r4
+	bl sub_0200B3D4
+	ldmia sp!, {r4, pc}
+	.align 2, 0
+_0200B310: .word _02092AD8
+	arm_func_end sub_0200B2C4
+
+	arm_func_start sub_0200B314
+sub_0200B314: ; 0x0200B314
+	stmdb sp!, {r4, lr}
+	mov r4, r0
+	ldr r0, [r4, #0x18]
+	bl MemFree
+	mov r0, #0
+	str r0, [r4, #0x18]
+	ldmia sp!, {r4, pc}
+	arm_func_end sub_0200B314
+
+	arm_func_start sub_0200B330
+sub_0200B330: ; 0x0200B330
+	mov r1, #1
+	strb r1, [r0, #1]
+	bx lr
+	arm_func_end sub_0200B330
+
+	arm_func_start sub_0200B33C
+sub_0200B33C: ; 0x0200B33C
+	bx lr
+	arm_func_end sub_0200B33C
+
+	arm_func_start sub_0200B340
+sub_0200B340: ; 0x0200B340
+	stmdb sp!, {r3, r4, r5, r6, lr}
+	sub sp, sp, #4
+	mov r4, r0
+	ldr r0, _0200B3BC ; =0x000001FF
+	ldmib r4, {r1, r2}
+	and r1, r1, r0
+	mov r2, r2, lsl #0x17
+	ldr r0, [r4, #0xc]
+	orr r1, r1, r2, lsr #7
+	str r1, [r0]
+	ldrb r0, [r4, #1]
+	cmp r0, #0
+	beq _0200B3B4
+	ldr r5, [r4, #0x18]
+	ldr r1, [r4, #0x14]
+	mov r0, r5
+	ldr r6, [r4, #0x10]
+	bl sub_0207A2DC
+	ldr ip, [r4, #0x14]
+	mov r2, r6
+	mov r3, r5
+	mov r0, #3
+	mov r1, #1
+	str ip, [sp]
+	bl sub_02005E10
+	mov r0, #3
+	bl sub_02005D30
+	mov r0, #0
+	strb r0, [r4, #1]
+_0200B3B4:
+	add sp, sp, #4
+	ldmia sp!, {r3, r4, r5, r6, pc}
+	.align 2, 0
+_0200B3BC: .word 0x000001FF
+	arm_func_end sub_0200B340
+
+	arm_func_start sub_0200B3C0
+sub_0200B3C0: ; 0x0200B3C0
+	ldr r2, [r1]
+	ldr r1, [r1, #4]
+	str r2, [r0, #4]
+	str r1, [r0, #8]
+	bx lr
+	arm_func_end sub_0200B3C0
+
+	arm_func_start sub_0200B3D4
+sub_0200B3D4: ; 0x0200B3D4
+	mov r3, #0
+	ldr ip, [r0, #0x18]
+	mov r2, r3
+	b _0200B3EC
+_0200B3E4:
+	strh r2, [ip], #2
+	add r3, r3, #1
+_0200B3EC:
+	ldr r1, [r0, #0x14]
+	cmp r3, r1, lsr #1
+	blo _0200B3E4
+	bx lr
+	arm_func_end sub_0200B3D4
+
+	arm_func_start sub_0200B3FC
+sub_0200B3FC: ; 0x0200B3FC
+	ldrb r3, [r0]
+	cmp r3, #3
+	addls pc, pc, r3, lsl #2
+	bx lr
+_0200B40C: ; jump table
+	b _0200B41C ; case 0
+	b _0200B438 ; case 1
+	b _0200B470 ; case 2
+	b _0200B48C ; case 3
+_0200B41C:
+	ldr ip, [r0, #0x18]
+	ldr r0, [r1, #4]
+	ldr r3, [r1]
+	add r0, ip, r0, lsl #6
+	mov r1, r3, lsl #1
+	strh r2, [r1, r0]
+	bx lr
+_0200B438:
+	ldr ip, [r1]
+	ldr r3, [r0, #0x18]
+	cmp ip, #0x20
+	ldrlt r0, [r1, #4]
+	movlt r1, ip, lsl #1
+	addlt r0, r3, r0, lsl #6
+	strlth r2, [r1, r0]
+	bxlt lr
+	ldr r0, [r1, #4]
+	add r0, r3, r0, lsl #6
+	add r0, r0, ip, lsl #1
+	add r0, r0, #0x700
+	strh r2, [r0, #0xc0]
+	bx lr
+_0200B470:
+	ldr ip, [r0, #0x18]
+	ldr r0, [r1, #4]
+	ldr r3, [r1]
+	add r0, ip, r0, lsl #6
+	mov r1, r3, lsl #1
+	strh r2, [r1, r0]
+	bx lr
+_0200B48C:
+	ldr ip, [r1, #4]
+	cmp ip, #0x40
+	bge _0200B4C4
+	ldr r1, [r1]
+	ldr r0, [r0, #0x18]
+	cmp r1, #0x20
+	movlt r1, r1, lsl #1
+	addlt r0, r0, ip, lsl #6
+	strlth r2, [r1, r0]
+	addge r0, r0, ip, lsl #6
+	addge r0, r0, r1, lsl #1
+	addge r0, r0, #0x700
+	strgeh r2, [r0, #0xc0]
+	bx lr
+_0200B4C4:
+	ldr r3, [r1]
+	ldr r1, [r0, #0x18]
+	cmp r3, #0x20
+	subge r0, ip, #0x20
+	addge r0, r1, r0, lsl #6
+	addge r0, r0, r3, lsl #1
+	addge r0, r0, #0x1700
+	strgeh r2, [r0, #0xc0]
+	bxge lr
+	sub r0, ip, #0x20
+	add r0, r1, r0, lsl #6
+	add r0, r0, r3, lsl #1
+	add r0, r0, #0x1000
+	strh r2, [r0]
+	bx lr
+	arm_func_end sub_0200B3FC
+
+	arm_func_start sub_0200B500
+sub_0200B500: ; 0x0200B500
+	ldr r0, [r0, #0x18]
+	bx lr
+	arm_func_end sub_0200B500
+
+	arm_func_start sub_0200B508
+sub_0200B508: ; 0x0200B508
+	stmdb sp!, {r3, r4, r5, lr}
+	mov r5, r0
+	mov r4, r1
+	str r4, [r5]
+	str r2, [r5, #4]
+	mov r0, #0
+	strb r0, [r5, #0x14]
+	str r3, [r5, #0x18]
+	cmp r2, #0
+	strle r0, [r5, #0xc]
+	ble _0200B550
+	ldr r1, [sp, #0x10]
+	mov r0, r2, lsl #1
+	bl MemAlloc
+	str r0, [r5, #0xc]
+	ldr r1, [sp, #0x10]
+	mov r0, r4, lsl #3
+	bl MemAlloc
+_0200B550:
+	ldr r1, [sp, #0x10]
+	str r0, [r5, #0x10]
+	mov r0, r4, lsl #3
+	bl MemAlloc
+	str r0, [r5, #0x1c]
+	mov r0, r5
+	bl sub_0200B67C
+	ldmia sp!, {r3, r4, r5, pc}
+	arm_func_end sub_0200B508
+
+	arm_func_start sub_0200B570
+sub_0200B570: ; 0x0200B570
+	mov r1, #1
+	strb r1, [r0, #0x14]
+	bx lr
+	arm_func_end sub_0200B570
+
+	arm_func_start sub_0200B57C
+sub_0200B57C: ; 0x0200B57C
+	stmdb sp!, {r3, r4, r5, lr}
+	ldr ip, [r0, #8]
+	cmp ip, #0
+	ldmleia sp!, {r3, r4, r5, pc}
+	ldr r3, [r0]
+	ldr r2, [r0, #0x1c]
+	sub r1, r3, #1
+	add lr, r2, r1, lsl #3
+	sub r3, r3, ip
+	ldr r4, [r0, #0xc]
+	mov r2, #0x200
+	mov r1, #0
+	b _0200B5C4
+_0200B5B0:
+	strh r2, [lr]
+	strh r1, [lr, #2]
+	strh r1, [lr, #4]
+	sub lr, lr, #8
+	sub r3, r3, #1
+_0200B5C4:
+	cmp r3, #0
+	bgt _0200B5B0
+	ldr r5, [r0, #4]
+	mvn r3, #0
+	b _0200B61C
+_0200B5D8:
+	ldrsh ip, [r4]
+	strh r3, [r4], #2
+	b _0200B610
+_0200B5E4:
+	ldr r2, [r0, #0x10]
+	mov r1, ip, lsl #3
+	ldrh r1, [r2, r1]
+	add r2, r2, ip, lsl #3
+	strh r1, [lr]
+	ldrh r1, [r2, #2]
+	strh r1, [lr, #2]
+	ldrh r1, [r2, #4]
+	strh r1, [lr, #4]
+	ldrsh ip, [r2, #6]
+	sub lr, lr, #8
+_0200B610:
+	cmp ip, #0
+	bge _0200B5E4
+	sub r5, r5, #1
+_0200B61C:
+	cmp r5, #0
+	bgt _0200B5D8
+	mov r1, #0
+	str r1, [r0, #8]
+	ldmia sp!, {r3, r4, r5, pc}
+	arm_func_end sub_0200B57C
+
+	arm_func_start sub_0200B630
+sub_0200B630: ; 0x0200B630
+	stmdb sp!, {r4, r5, r6, lr}
+	mov r6, r0
+	ldrb r0, [r6, #0x14]
+	cmp r0, #0
+	ldmeqia sp!, {r4, r5, r6, pc}
+	ldr r4, [r6, #0x1c]
+	ldr r1, [r6]
+	mov r0, r4
+	mov r1, r1, lsl #3
+	ldr r5, [r6, #0x18]
+	bl sub_0207A2DC
+	ldr r2, [r6]
+	mov r0, r5
+	mov r1, r4
+	mov r2, r2, lsl #3
+	bl Memcpy32
+	mov r0, #0
+	strb r0, [r6, #0x14]
+	ldmia sp!, {r4, r5, r6, pc}
+	arm_func_end sub_0200B630
+
+	arm_func_start sub_0200B67C
+sub_0200B67C: ; 0x0200B67C
+	stmdb sp!, {r3, lr}
+	ldr ip, [r0, #0x1c]
+	mov lr, #0
+	str lr, [r0, #8]
+	mov r3, #0x200
+	mov r2, lr
+	b _0200B6B0
+_0200B698:
+	strh r3, [ip]
+	strh r2, [ip, #2]
+	strh r2, [ip, #4]
+	strh r2, [ip, #6]
+	add ip, ip, #8
+	add lr, lr, #1
+_0200B6B0:
+	ldr r1, [r0]
+	cmp lr, r1
+	blt _0200B698
+	ldr r1, [r0, #4]
+	cmp r1, #0
+	ldmleia sp!, {r3, pc}
+	ldr r3, [r0, #0xc]
+	mov ip, #0
+	mvn r2, #0
+	b _0200B6E0
+_0200B6D8:
+	strh r2, [r3], #2
+	add ip, ip, #1
+_0200B6E0:
+	ldr r1, [r0, #4]
+	cmp ip, r1
+	blt _0200B6D8
+	ldmia sp!, {r3, pc}
+	arm_func_end sub_0200B67C
+
+	arm_func_start sub_0200B6F0
+sub_0200B6F0: ; 0x0200B6F0
+	stmdb sp!, {r4, lr}
+	ldr r4, [r0, #8]
+	ldr r3, [r0]
+	cmp r4, r3
+	ldmgeia sp!, {r4, pc}
+	cmp r2, #0
+	movlt r2, #0
+	blt _0200B71C
+	ldr r3, [r0, #4]
+	cmp r2, r3
+	subge r2, r3, #1
+_0200B71C:
+	ldrh r3, [r1]
+	ldr lr, [r0, #0x10]
+	mov ip, r4, lsl #3
+	strh r3, [lr, ip]
+	ldrh ip, [r1, #2]
+	add lr, lr, r4, lsl #3
+	mov r3, r2, lsl #1
+	strh ip, [lr, #2]
+	ldrh r1, [r1, #4]
+	strh r1, [lr, #4]
+	ldr r1, [r0, #0xc]
+	ldrsh r1, [r1, r3]
+	strh r1, [lr, #6]
+	ldr r2, [r0, #8]
+	add r1, r2, #1
+	str r1, [r0, #8]
+	ldr r0, [r0, #0xc]
+	strh r2, [r0, r3]
+	ldmia sp!, {r4, pc}
+	arm_func_end sub_0200B6F0
+
+	arm_func_start sub_0200B768
+sub_0200B768: ; 0x0200B768
+#ifdef EUROPE
+	stmdb sp!, {r4, lr}
+	sub sp, sp, #8
+	bl GetLanguage
+	ldr r1, _0200B7E4 ; =_020AFF38_EU
+	mov r4, r0
+	ldrsb r0, [r1]
+	cmp r0, r4
+	beq _0200B7DC
+	ldr r1, _0200B7E8 ; =_020AFF3C_EU
+	add r0, sp, #0
+	ldr r1, [r1, r4, lsl #2]
+	mov r2, #1
+	bl LoadFileFromRom
+	ldr r2, _0200B7EC ; =0x04000208
+	mov r1, #0
+	ldrh r0, [r2]
+	strh r1, [r2]
+	ldr r0, _0200B7F0 ; =CART_REMOVED_IMG_DATA
+	ldr r1, [sp]
+	ldr r2, [sp, #4]
+	bl MemcpySimple
+	ldr r2, _0200B7EC ; =0x04000208
+	add r0, sp, #0
+	ldrh r1, [r2]
+	mov r1, #1
+	strh r1, [r2]
+	bl UnloadFile
+	ldr r0, _0200B7E4 ; =_020AFF38_EU
+	strb r4, [r0]
+_0200B7DC:
+	add sp, sp, #8
+	ldmia sp!, {r4, pc}
+	.align 2, 0
+_0200B7E4: .word _020AFF38_EU
+_0200B7E8: .word _020AFF3C_EU
+_0200B7EC: .word 0x04000208
+_0200B7F0: .word CART_REMOVED_IMG_DATA
+#else
+	bx lr
+#endif
+	arm_func_end sub_0200B768
+
+	arm_func_start sub_0200B76C
+sub_0200B76C: ; 0x0200B76C
+	stmdb sp!, {r4, lr}
+	bl GX_DispOff
+	ldr r2, _0200B874 ; =0x04001000
+	mov r0, #3
+	ldr r1, [r2]
+	bic r1, r1, #0x10000
+	str r1, [r2]
+	bl sub_0207C164
+	bl GX_DisableBankForBG
+	bl GX_DisableBankForOBJ
+	bl GX_DisableBankForBGExtPltt
+	bl GX_DisableBankForOBJExtPltt
+	bl GX_DisableBankForTex
+	bl GX_DisableBankForTexPltt
+	bl GX_DisableBankForSubBG
+	bl GX_DisableBankForSubOBJ
+	bl GX_DisableBankForSubBGExtPltt
+	ldr r0, _0200B878 ; =0x000001FF
+	bl GX_SetBankForLCDC
+	mov r0, #0
+	mov r1, #0x6800000
+	mov r2, #0xa4000
+	bl ArrayFill32Fast
+	mov r0, #0xc0
+	mov r1, #0x7000000
+	mov r2, #0x400
+	bl ArrayFill32Fast
+	mov r0, #0
+	mov r1, #0x5000000
+	mov r2, #0x400
+	bl ArrayFill32Fast
+	mov r0, #0xc0
+	ldr r1, _0200B87C ; =0x07000400
+	mov r2, #0x400
+	bl ArrayFill32Fast
+	mov r0, #0
+	ldr r1, _0200B880 ; =0x05000400
+	mov r2, #0x400
+	bl ArrayFill32Fast
+	bl sub_02019304
+	mov r4, r0
+	ldr r1, _0200B884 ; =CART_REMOVED_IMG_DATA
+	mov r2, #0xc000
+	bl MemcpySimple
+	mov r2, r4
+	ldr r0, _0200B888 ; =0x06806000
+	mov r1, #0xc000
+	bl DecompressAtFromMemoryPointer
+	mov r0, #2
+	mov r1, #0
+	mov r2, r1
+	bl GX_SetGraphicsMode
+	mov r0, #0
+	bl GXS_SetGraphicsMode
+	ldr r0, _0200B88C ; =0x0400006C
+	mov r1, #0
+	bl GXx_SetMasterBrightness_
+	ldr r0, _0200B890 ; =0x0400106C
+	mov r1, #0
+	bl GXx_SetMasterBrightness_
+	bl GX_DispOn
+	ldr r1, _0200B874 ; =0x04001000
+	ldr r0, [r1]
+	orr r0, r0, #0x10000
+	str r0, [r1]
+	ldmia sp!, {r4, pc}
+	.align 2, 0
+_0200B874: .word 0x04001000
+_0200B878: .word 0x000001FF
+_0200B87C: .word 0x07000400
+_0200B880: .word 0x05000400
+_0200B884: .word CART_REMOVED_IMG_DATA
+_0200B888: .word 0x06806000
+_0200B88C: .word 0x0400006C
+_0200B890: .word 0x0400106C
+	arm_func_end sub_0200B76C
+
+	arm_func_start sub_0200B894
+sub_0200B894: ; 0x0200B894
+	stmdb sp!, {r3, r4, r5, lr}
+	mov r5, r0
+	mov r4, r1
+	add r0, r5, #0x1c
+	bl sub_0200A2CC
+	mov r0, r5
+	mov r1, r4
+	bl sub_0200B8D4
+	ldmia sp!, {r3, r4, r5, pc}
+	arm_func_end sub_0200B894
+
+	arm_func_start sub_0200B8B8
+sub_0200B8B8: ; 0x0200B8B8
+	stmdb sp!, {r4, lr}
+	mov r4, r0
+	mov r1, #0
+	bl sub_0200B8D4
+	add r0, r4, #0x1c
+	bl sub_0200A2F4
+	ldmia sp!, {r4, pc}
+	arm_func_end sub_0200B8B8
+
+	arm_func_start sub_0200B8D4
+sub_0200B8D4: ; 0x0200B8D4
+	ldr r2, _0200B904 ; =_02094AE8
+	mov r1, r1, lsl #1
+	mov r3, #0
+	ldrsh r1, [r2, r1]
+	str r3, [r0]
+	mov r2, #1
+	str r2, [r0, #4]
+	strh r1, [r0, #0x10]
+	strh r1, [r0, #0x14]
+	str r3, [r0, #8]
+	str r3, [r0, #0xc]
+	bx lr
+	.align 2, 0
+_0200B904: .word _02094AE8
+	arm_func_end sub_0200B8D4
+
+	arm_func_start sub_0200B908
+sub_0200B908: ; 0x0200B908
+	ldr ip, _0200B914 ; =_0200A314
+	add r0, r0, #0x1c
+	bx ip
+	.align 2, 0
+_0200B914: .word _0200A314
+	arm_func_end sub_0200B908
+
+	arm_func_start sub_0200B918
+sub_0200B918: ; 0x0200B918
+	ldr ip, _0200B924 ; =_0200A344
+	add r0, r0, #0x1c
+	bx ip
+	.align 2, 0
+_0200B924: .word _0200A344
+	arm_func_end sub_0200B918
+
+	arm_func_start sub_0200B928
+sub_0200B928: ; 0x0200B928
+	mov r2, #0
+	strh r2, [r0, #0x10]
+	cmp r1, #0
+	ldrnesh r2, [r0, #0x14]
+	cmpne r2, #0
+	bne _0200B958
+	mov r2, #0
+	strh r2, [r0, #0x14]
+	mov r1, #1
+	stmib r0, {r1, r2}
+	str r2, [r0, #0xc]
+	bx lr
+_0200B958:
+	cmp r1, #0
+	movlt r1, #0x1e
+	cmp r2, #0
+	movlt r2, #2
+	strlt r2, [r0, #4]
+	ldrltsh r2, [r0, #0x14]
+	rsblt r2, r2, #0
+	movge r2, #3
+	strge r2, [r0, #4]
+	ldrgesh r2, [r0, #0x14]
+	strh r2, [r0, #0x12]
+	str r1, [r0, #8]
+	str r1, [r0, #0xc]
+	bx lr
+	arm_func_end sub_0200B928
+
+	arm_func_start UpdateFadeStatus
+UpdateFadeStatus: ; 0x0200B990
+	ldr r3, _0200BA00 ; =_02094AE8
+	mov ip, r1, lsl #1
+	ldrsh r3, [r3, ip]
+	cmp r2, #0
+	strh r3, [r0, #0x10]
+	ldrnesh r3, [r0, #0x10]
+	ldrnesh ip, [r0, #0x14]
+	cmpne ip, r3
+	bne _0200B9D4
+	ldrsh r3, [r0, #0x10]
+	mov r2, #1
+	mov r1, #0
+	strh r3, [r0, #0x14]
+	str r2, [r0, #4]
+	str r1, [r0, #8]
+	str r1, [r0, #0xc]
+	bx lr
+_0200B9D4:
+	cmp r2, #0
+	movlt r2, #0x1e
+	cmp r3, #0
+	sublt r3, ip, r3
+	subge r3, r3, ip
+	strh r3, [r0, #0x12]
+	ldr r3, _0200BA04 ; =_02094AF0
+	ldr r1, [r3, r1, lsl #2]
+	stmib r0, {r1, r2}
+	str r2, [r0, #0xc]
+	bx lr
+	.align 2, 0
+_0200BA00: .word _02094AE8
+_0200BA04: .word _02094AF0
+	arm_func_end UpdateFadeStatus
+
+	arm_func_start HandleFades
+HandleFades: ; 0x0200BA08
+	stmdb sp!, {r4, lr}
+	mov r4, r0
+	ldr r0, [r4, #4]
+	cmp r0, #5
+	addls pc, pc, r0, lsl #2
+	b _0200BB58
+_0200BA20: ; jump table
+	b _0200BB50 ; case 0
+	b _0200BB40 ; case 1
+	b _0200BA38 ; case 2
+	b _0200BA80 ; case 3
+	b _0200BAC8 ; case 4
+	b _0200BB04 ; case 5
+_0200BA38:
+	ldr r0, [r4, #8]
+	sub r2, r0, #1
+	str r2, [r4, #8]
+	cmp r2, #0
+	ldrlesh r1, [r4, #0x10]
+	movle r0, #0
+	strleh r1, [r4, #0x14]
+	strle r0, [r4, #4]
+	ble _0200BA78
+	ldrsh r0, [r4, #0x12]
+	ldr r1, [r4, #0xc]
+	mul r0, r2, r0
+	bl _s32_div_f
+	ldrsh r1, [r4, #0x10]
+	sub r0, r1, r0
+	strh r0, [r4, #0x14]
+_0200BA78:
+	mov r0, #1
+	ldmia sp!, {r4, pc}
+_0200BA80:
+	ldr r0, [r4, #8]
+	sub r2, r0, #1
+	str r2, [r4, #8]
+	cmp r2, #0
+	ldrlesh r1, [r4, #0x10]
+	movle r0, #0
+	strleh r1, [r4, #0x14]
+	strle r0, [r4, #4]
+	ble _0200BAC0
+	ldrsh r0, [r4, #0x12]
+	ldr r1, [r4, #0xc]
+	mul r0, r2, r0
+	bl _s32_div_f
+	ldrsh r1, [r4, #0x10]
+	add r0, r1, r0
+	strh r0, [r4, #0x14]
+_0200BAC0:
+	mov r0, #1
+	ldmia sp!, {r4, pc}
+_0200BAC8:
+	ldr r0, [r4, #8]
+	sub r2, r0, #1
+	str r2, [r4, #8]
+	cmp r2, #0
+	ldrlesh r0, [r4, #0x10]
+	ble _0200BAF8
+	ldrsh r0, [r4, #0x12]
+	ldr r1, [r4, #0xc]
+	mul r0, r2, r0
+	bl _s32_div_f
+	ldrsh r1, [r4, #0x10]
+	sub r0, r1, r0
+_0200BAF8:
+	strh r0, [r4, #0x14]
+	mov r0, #1
+	ldmia sp!, {r4, pc}
+_0200BB04:
+	ldr r0, [r4, #8]
+	sub r2, r0, #1
+	str r2, [r4, #8]
+	cmp r2, #0
+	ldrlesh r0, [r4, #0x10]
+	ble _0200BB34
+	ldrsh r0, [r4, #0x12]
+	ldr r1, [r4, #0xc]
+	mul r0, r2, r0
+	bl _s32_div_f
+	ldrsh r1, [r4, #0x10]
+	add r0, r1, r0
+_0200BB34:
+	strh r0, [r4, #0x14]
+	mov r0, #1
+	ldmia sp!, {r4, pc}
+_0200BB40:
+	mov r0, #0
+	str r0, [r4, #4]
+	mov r0, #1
+	ldmia sp!, {r4, pc}
+_0200BB50:
+	mov r0, #0
+	ldmia sp!, {r4, pc}
+_0200BB58:
+	mov r0, #0
+	ldmia sp!, {r4, pc}
+	arm_func_end HandleFades
+
+	arm_func_start sub_0200BB60
+sub_0200BB60: ; 0x0200BB60
+	ldr ip, _0200BB70 ; =sub_0200B928
+	mov r2, #1
+	str r2, [r0]
+	bx ip
+	.align 2, 0
+_0200BB70: .word sub_0200B928
+	arm_func_end sub_0200BB60
+
+	arm_func_start sub_0200BB74
+sub_0200BB74: ; 0x0200BB74
+	ldr ip, _0200BB84 ; =UpdateFadeStatus
+	mov r3, #1
+	str r3, [r0]
+	bx ip
+	.align 2, 0
+_0200BB84: .word UpdateFadeStatus
+	arm_func_end sub_0200BB74
+
+	arm_func_start sub_0200BB88
+sub_0200BB88: ; 0x0200BB88
+	mov r2, #1
+	str r2, [r0]
+	mov r2, #0
+	strh r2, [r0, #0x10]
+	cmp r1, #0
+	ldrnesh r2, [r0, #0x14]
+	cmpne r2, #0
+	bne _0200BBC0
+	mov r2, #0
+	strh r2, [r0, #0x14]
+	mov r1, #1
+	stmib r0, {r1, r2}
+	str r2, [r0, #0xc]
+	bx lr
+_0200BBC0:
+	cmp r1, #0
+	movlt r1, #0x1e
+	cmp r2, #0
+	movlt r2, #4
+	strlt r2, [r0, #4]
+	ldrltsh r2, [r0, #0x14]
+	rsblt r2, r2, #0
+	movge r2, #5
+	strge r2, [r0, #4]
+	ldrgesh r2, [r0, #0x14]
+	strh r2, [r0, #0x12]
+	str r1, [r0, #8]
+	str r1, [r0, #0xc]
+	bx lr
+	arm_func_end sub_0200BB88
+
+	arm_func_start sub_0200BBF8
+sub_0200BBF8: ; 0x0200BBF8
+	mov ip, #1
+	cmp r1, #0
+	movlt r1, #0x1e
+	str ip, [r0]
+	cmp r2, r3
+	movgt ip, #3
+	strgt ip, [r0, #4]
+	subgt ip, r2, r3
+	strgth ip, [r0, #0x12]
+	bgt _0200BC40
+	movlt ip, #2
+	strlt ip, [r0, #4]
+	sublt ip, r3, r2
+	strlth ip, [r0, #0x12]
+	movge ip, #1
+	strge ip, [r0, #4]
+	movge ip, #0
+	strgeh ip, [r0, #0x12]
+_0200BC40:
+	str r1, [r0, #8]
+	str r1, [r0, #0xc]
+	strh r2, [r0, #0x14]
+	strh r3, [r0, #0x10]
+	bx lr
+	arm_func_end sub_0200BBF8
+
+	arm_func_start sub_0200BC54
+sub_0200BC54: ; 0x0200BC54
+	ldr ip, _0200BC5C ; =HandleFades
+	bx ip
+	.align 2, 0
+_0200BC5C: .word HandleFades
+	arm_func_end sub_0200BC54
+
+	arm_func_start sub_0200BC60
+sub_0200BC60: ; 0x0200BC60
+	stmdb sp!, {r4, lr}
+	str r1, [r0]
+	add r4, r0, #0x16
+	mov lr, #4
+_0200BC70:
+	ldrb ip, [r3], #1
+	subs lr, lr, #1
+	strb ip, [r4], #1
+	bne _0200BC70
+	cmp r1, #3
+	cmpne r1, #5
+	cmpne r1, #7
+	cmpne r1, #9
+	cmpne r1, #0xb
+	bne _0200BCA4
+	mov r1, #2
+	bl UpdateFadeStatus
+	ldmia sp!, {r4, pc}
+_0200BCA4:
+	mov r1, r2
+	bl sub_0200B928
+	ldmia sp!, {r4, pc}
+	arm_func_end sub_0200BC60
+
+	arm_func_start sub_0200BCB0
+sub_0200BCB0: ; 0x0200BCB0
+	stmdb sp!, {r4, lr}
+	str r1, [r0]
+	add r4, r0, #0x16
+	mov lr, #4
+_0200BCC0:
+	ldrb ip, [r3], #1
+	subs lr, lr, #1
+	strb ip, [r4], #1
+	bne _0200BCC0
+	cmp r1, #1
+	bne _0200BCE4
+	mov r1, #1
+	bl UpdateFadeStatus
+	ldmia sp!, {r4, pc}
+_0200BCE4:
+	cmp r1, #3
+	cmpne r1, #5
+	cmpne r1, #7
+	cmpne r1, #9
+	cmpne r1, #0xb
+	bne _0200BD08
+	mov r1, r2
+	bl sub_0200B928
+	ldmia sp!, {r4, pc}
+_0200BD08:
+	mov r1, #2
+	bl UpdateFadeStatus
+	ldmia sp!, {r4, pc}
+	arm_func_end sub_0200BCB0
+
+	arm_func_start sub_0200BD14
+sub_0200BD14: ; 0x0200BD14
+	ldr r0, [r0, #4]
+	cmp r0, #0
+	movne r0, #1
+	moveq r0, #0
+	and r0, r0, #0xff
+	bx lr
+	arm_func_end sub_0200BD14
+
+	arm_func_start GetFadeStatus
+GetFadeStatus: ; 0x0200BD2C
+	ldrsh r1, [r0, #0x10]
+	mvn r0, #0xff
+	cmp r1, r0
+	moveq r0, #1
+	bxeq lr
+	cmp r1, #0x100
+	moveq r0, #2
+	movne r0, #0
+	bx lr
+	arm_func_end GetFadeStatus
+
+	arm_func_start sub_0200BD50
+sub_0200BD50: ; 0x0200BD50
+	stmdb sp!, {r3, r4, lr}
+	sub sp, sp, #4
+	mov r4, r0
+	ldr r0, [r4]
+	cmp r0, #0
+	ldreq r0, [r4, #4]
+	cmpeq r0, #0
+	beq _0200C000
+	mov r0, r4
+	bl HandleFades
+	cmp r0, #0
+	beq _0200BF90
+	ldr r0, [r4]
+	cmp r0, #0xb
+	addls pc, pc, r0, lsl #2
+	b _0200C000
+_0200BD90: ; jump table
+	b _0200C000 ; case 0
+	b _0200BDC0 ; case 1
+	b _0200BDDC ; case 2
+	b _0200BDFC ; case 3
+	b _0200BE10 ; case 4
+	b _0200BE30 ; case 5
+	b _0200BE44 ; case 6
+	b _0200BEB0 ; case 7
+	b _0200BE44 ; case 8
+	b _0200BEB0 ; case 9
+	b _0200BF10 ; case 10
+	b _0200BF54 ; case 11
+_0200BDC0:
+	ldrsh r1, [r4, #0x14]
+	add r0, r4, #0x1c
+	add r1, r1, #0x100
+	mov r1, r1, lsl #0x10
+	mov r1, r1, lsr #0x10
+	bl sub_0200A37C
+	b _0200C000
+_0200BDDC:
+	ldrsh r1, [r4, #0x14]
+	add r0, r4, #0x1c
+	add r2, r4, #0x16
+	rsb r1, r1, #0x100
+	mov r1, r1, lsl #0x10
+	mov r1, r1, lsr #0x10
+	bl sub_0200A3A8
+	b _0200C000
+_0200BDFC:
+	ldrh r1, [r4, #0x14]
+	add r0, r4, #0x1c
+	add r2, r4, #0x16
+	bl sub_0200A3DC
+	b _0200C000
+_0200BE10:
+	ldrsh r1, [r4, #0x14]
+	add r0, r4, #0x1c
+	add r2, r4, #0x16
+	rsb r1, r1, #0x100
+	mov r1, r1, lsl #0x10
+	mov r1, r1, lsr #0x10
+	bl sub_0200A410
+	b _0200C000
+_0200BE30:
+	ldrh r1, [r4, #0x14]
+	add r0, r4, #0x1c
+	add r2, r4, #0x16
+	bl sub_0200A444
+	b _0200C000
+_0200BE44:
+	cmp r0, #6
+	beq _0200BE58
+	cmp r0, #8
+	beq _0200BE74
+	b _0200BE90
+_0200BE58:
+	mov r1, #0x90
+	mov r0, #0xff
+	strb r1, [sp]
+	strb r1, [sp, #1]
+	strb r0, [sp, #2]
+	strb r0, [sp, #3]
+	b _0200BE90
+_0200BE74:
+	mov r2, #0xff
+	mov r1, #0xc0
+	mov r0, #0x80
+	strb r2, [sp]
+	strb r1, [sp, #1]
+	strb r0, [sp, #2]
+	strb r2, [sp, #3]
+_0200BE90:
+	ldrsh r1, [r4, #0x14]
+	add r2, sp, #0
+	add r0, r4, #0x1c
+	rsb r1, r1, #0x100
+	mov r1, r1, lsl #0x10
+	mov r1, r1, lsr #0x10
+	bl sub_0200A410
+	b _0200C000
+_0200BEB0:
+	cmp r0, #7
+	beq _0200BEC4
+	cmp r0, #9
+	beq _0200BEE0
+	b _0200BEFC
+_0200BEC4:
+	mov r1, #0x90
+	mov r0, #0xff
+	strb r1, [sp]
+	strb r1, [sp, #1]
+	strb r0, [sp, #2]
+	strb r0, [sp, #3]
+	b _0200BEFC
+_0200BEE0:
+	mov r2, #0xff
+	mov r1, #0xc0
+	mov r0, #0x80
+	strb r2, [sp]
+	strb r1, [sp, #1]
+	strb r0, [sp, #2]
+	strb r2, [sp, #3]
+_0200BEFC:
+	ldrh r1, [r4, #0x14]
+	add r2, sp, #0
+	add r0, r4, #0x1c
+	bl sub_0200A444
+	b _0200C000
+_0200BF10:
+	mov r0, #0xff
+	strb r0, [sp]
+	strb r0, [sp, #1]
+	strb r0, [sp, #2]
+	strb r0, [sp, #3]
+	ldrsh r1, [r4, #0x14]
+	add r2, sp, #0
+	add r0, r4, #0x1c
+	add r3, r1, r1, lsl #1
+	mov r1, r3, asr #1
+	add r1, r3, r1, lsr #30
+	mov r1, r1, asr #2
+	rsb r1, r1, #0x100
+	mov r1, r1, lsl #0x10
+	mov r1, r1, lsr #0x10
+	bl sub_0200A3A8
+	b _0200C000
+_0200BF54:
+	mov r0, #0xff
+	strb r0, [sp]
+	strb r0, [sp, #1]
+	strb r0, [sp, #2]
+	strb r0, [sp, #3]
+	ldrsh r1, [r4, #0x14]
+	add r2, sp, #0
+	add r0, r4, #0x1c
+	rsb r3, r1, #0x100
+	mov r1, r3, asr #1
+	add r1, r3, r1, lsr #30
+	mov r1, r1, lsl #0xe
+	mov r1, r1, lsr #0x10
+	bl sub_0200A3A8
+	b _0200C000
+_0200BF90:
+	ldr r0, [r4, #4]
+	cmp r0, #0
+	bne _0200C000
+	ldr r0, [r4]
+	cmp r0, #0xb
+	addls pc, pc, r0, lsl #2
+	b _0200C000
+_0200BFAC: ; jump table
+	b _0200C000 ; case 0
+	b _0200C000 ; case 1
+	b _0200BFDC ; case 2
+	b _0200BFF0 ; case 3
+	b _0200BFDC ; case 4
+	b _0200BFF0 ; case 5
+	b _0200BFDC ; case 6
+	b _0200BFF0 ; case 7
+	b _0200BFDC ; case 8
+	b _0200BFF0 ; case 9
+	b _0200BFDC ; case 10
+	b _0200BFF0 ; case 11
+_0200BFDC:
+	ldrsh r0, [r4, #0x14]
+	cmp r0, #0x100
+	movge r0, #0
+	strge r0, [r4]
+	b _0200C000
+_0200BFF0:
+	ldrsh r0, [r4, #0x14]
+	cmp r0, #0
+	movle r0, #0
+	strle r0, [r4]
+_0200C000:
+	add sp, sp, #4
+	ldmia sp!, {r3, r4, pc}
+	arm_func_end sub_0200BD50
+
+	arm_func_start sub_0200C008
+sub_0200C008: ; 0x0200C008
+	ldr ip, _0200C01C ; =sub_0200A29C
+	mov r3, r2, lsl #0x10
+	mov r2, r1
+	mov r1, r3, lsr #0x10
+	bx ip
+	.align 2, 0
+_0200C01C: .word sub_0200A29C
+	arm_func_end sub_0200C008
+
+	arm_func_start sub_0200C020
+sub_0200C020: ; 0x0200C020
+	stmdb sp!, {r3, r4, lr}
+	sub sp, sp, #4
+	ldr ip, [sp, #0x10]
+	cmp ip, #0
+	beq _0200C084
+	ldrb lr, [r1]
+	mov r4, #0xff
+	ldrb lr, [ip, lr, lsl #2]
+	mul lr, r3, lr
+	mov lr, lr, lsr #5
+	strb lr, [sp]
+	ldrb lr, [r1, #1]
+	add lr, ip, lr, lsl #2
+	ldrb lr, [lr, #1]
+	mul lr, r3, lr
+	mov lr, lr, lsr #5
+	strb lr, [sp, #1]
+	ldrb r1, [r1, #2]
+	add r1, ip, r1, lsl #2
+	ldrb r1, [r1, #2]
+	mul r1, r3, r1
+	mov r1, r1, lsr #5
+	strb r1, [sp, #2]
+	strb r4, [sp, #3]
+	b _0200C0BC
+_0200C084:
+	ldrb r4, [r1]
+	mov ip, #0xff
+	mul lr, r4, r3
+	mov r4, lr, lsr #5
+	strb r4, [sp]
+	ldrb lr, [r1, #1]
+	mul r4, lr, r3
+	mov r4, r4, lsr #5
+	strb r4, [sp, #1]
+	ldrb r1, [r1, #2]
+	mul r3, r1, r3
+	mov r1, r3, lsr #5
+	strb r1, [sp, #2]
+	strb ip, [sp, #3]
+_0200C0BC:
+	mov r1, r2, lsl #0x10
+	add r2, sp, #0
+	mov r1, r1, lsr #0x10
+	bl sub_0200A590
+	add sp, sp, #4
+	ldmia sp!, {r3, r4, pc}
+	arm_func_end sub_0200C020
diff --git a/include/main_02001188.h b/include/main_02001188.h
new file mode 100644
index 00000000..a8a31104
--- /dev/null
+++ b/include/main_02001188.h
@@ -0,0 +1,26 @@
+#ifndef PMDSKY_MAIN_02001188_H
+#define PMDSKY_MAIN_02001188_H
+
+// Unclear if these structs match, since they haven't been used other than in extern prototypes. Hopefully they do, though.
+struct mem_block {
+    u32 content_flags; // Bit 0: in_use. Bit 1: object. Bit 2: arena. Bits 3-31: Unused?
+    u32 allocator_flags; // Bit 0: alloc_in_use. Bit 1: alloc_object. Bit 2: alloc_arena. Bit 3: alloc_subarena. Bits 4-31: Unused?
+    u32 user_flags; // Bits 0-7: ??? Bit 8: user_alloc_in_use. Bit 9: user_alloc_arena. Bit 10: user_alloc_arena. Bit 11: user_alloc_subarena. Bits 12-31: Unused?
+    void * data;
+    u32 available;
+    u32 used;
+};
+
+struct mem_arena {
+    u32 content_flags;
+    struct mem_arena *parent;
+    struct mem_block *blocks;
+    u32 n_blocks;
+    u32 max_blocks;
+    void *data;
+    u32 len;
+};
+
+void MemFree(void * ptr);
+
+#endif //PMDSKY_MAIN_02001188_H
diff --git a/include/main_02008BD4.h b/include/main_02008BD4.h
new file mode 100644
index 00000000..062bd4bf
--- /dev/null
+++ b/include/main_02008BD4.h
@@ -0,0 +1,8 @@
+#ifndef PMDSKY_MAIN_02008BD4_H
+#define PMDSKY_MAIN_02008BD4_H
+
+#include <file.h>
+
+void UnloadFile(struct iovec* iov);
+
+#endif //PMDSKY_MAIN_02008BD4_H
diff --git a/main.lsf b/main.lsf
index b157d4d2..1456b543 100644
--- a/main.lsf
+++ b/main.lsf
@@ -11,6 +11,8 @@ Static main
 	StackSize 0 2048
 	Object src/main_02000C6C.o
 	Object asm/main_02000DE0.o
+	Object src/main_02001188.o
+	Object asm/main_0200119C.o
 	Object src/main_0200330C.o
 	Object asm/main_02003328.o
 	Object src/main_0200383C.o
@@ -21,6 +23,8 @@ Static main
 	Object asm/main_02008240.o
 	Object src/main_02008254.o
 	Object asm/main_020082C4.o
+	Object src/main_02008BD4.o
+	Object asm/main_02008BF4.o
 	Object src/debug.o
 	Object src/directory_file_mngr.o
 	Object src/directory_file.o
diff --git a/src/ground_bg.c b/src/ground_bg.c
index 2a93c55e..58a0eb8a 100644
--- a/src/ground_bg.c
+++ b/src/ground_bg.c
@@ -1,6 +1,8 @@
 #include "ground_bg.h"
 #include "file_rom.h"
 #include "main_0200330C.h"
+#include "main_02001188.h"
+#include "main_02008BD4.h"
 
 // TODO: Move these to headers
 #define RGB_R 0
@@ -41,8 +43,6 @@ extern struct UnkStruct_2324CBC *ov11_02324CBC;
 
 extern void FileClose(struct file_stream* file);
 extern void* MemAlloc(u32 len, u32 flags);
-extern void MemFree(void* ptr);
-extern void UnloadFile(struct iovec* ptr);
 extern void sub_0200A590(struct UnkStruct_2324CBC_Sub98 *, s32 id, const RGB_Array *src);
 extern void sub_0200A504(struct UnkStruct_2324CBC_Sub98 *);
 extern s32 sprintf(u8* str, const u8* format, ...);
diff --git a/src/main_02001188.c b/src/main_02001188.c
new file mode 100644
index 00000000..2ecc398e
--- /dev/null
+++ b/src/main_02001188.c
@@ -0,0 +1,8 @@
+#include "main_02001188.h"
+
+extern void MemLocateUnset(struct mem_arena *arena, void *ptr);
+
+void MemFree(void * ptr)
+{
+    MemLocateUnset(0, ptr);
+}
diff --git a/src/main_02008BD4.c b/src/main_02008BD4.c
new file mode 100644
index 00000000..f15f42a2
--- /dev/null
+++ b/src/main_02008BD4.c
@@ -0,0 +1,8 @@
+#include "main_02008BD4.h"
+#include "main_02001188.h"
+
+void UnloadFile(struct iovec* iov) {
+    MemFree(iov->iov_base);
+    iov->iov_base = 0;
+    iov->iov_len = 0;
+}
diff --git a/src/overlay_13_EntryOverlay13.c b/src/overlay_13_EntryOverlay13.c
index e1c6da30..664c33f3 100644
--- a/src/overlay_13_EntryOverlay13.c
+++ b/src/overlay_13_EntryOverlay13.c
@@ -1,7 +1,7 @@
 #include "overlay_13_EntryOverlay13.h"
+#include "main_02001188.h"
 
 extern void* MemAlloc(u32 len, u32 flags);
-extern void MemFree(void* ptr);
 void sub_0201F2E4(void);
 void sub_020348E4(const u8 *);
 extern void ov11_022E6E8C(u32);
diff --git a/src/overlay_15_0238AE6C.c b/src/overlay_15_0238AE6C.c
index 28da0c1a..c47766e0 100644
--- a/src/overlay_15_0238AE6C.c
+++ b/src/overlay_15_0238AE6C.c
@@ -1,11 +1,11 @@
 #include "overlay_15_0238AE6C.h"
+#include "main_02001188.h"
 
 extern unkStruct_ov15_0238AE6C* OVERLAY15_UNKNOWN_POINTER__NA_238B180;
 
 extern void ov15_0238AD78(u8);
 extern u16 ov15_0238A140(void);
 extern void Debug_Print0(const char* fmt);
-extern void MemFree(void* ptr);
 extern int ov15_0238A234(void);
 extern int IsDialogueBoxActive(s8);
 extern void HidePortraitBox(int);
diff --git a/src/overlay_17_0238A71C.c b/src/overlay_17_0238A71C.c
index fe63a6b6..b2098610 100644
--- a/src/overlay_17_0238A71C.c
+++ b/src/overlay_17_0238A71C.c
@@ -1,7 +1,7 @@
 #include "overlay_17_0238A71C.h"
+#include "main_02001188.h"
 
 extern void sub_0203C760(void);
-extern void MemFree(void *);
 extern void *OVERLAY17_UNKNOWN_POINTER__NA_238BE00;
 
 void ov17_0238A71C(void)
diff --git a/src/overlay_28_0238A58C.c b/src/overlay_28_0238A58C.c
index 4de38b59..241ba97d 100644
--- a/src/overlay_28_0238A58C.c
+++ b/src/overlay_28_0238A58C.c
@@ -1,4 +1,5 @@
 #include "overlay_28_0238A58C.h"
+#include "main_02001188.h"
 
 extern void* ov28_0238AD80;
 
@@ -6,7 +7,6 @@ extern void ov28_0238AB5C(s32);
 extern void sub_02025C14();
 extern void sub_02027170();
 extern void sub_02027228();
-extern void MemFree(void* ptr);
 
 void ov28_0238A58C(void)
 {
diff --git a/src/overlay_31_02382820.c b/src/overlay_31_02382820.c
index 8b2c3b8e..8d45ba26 100644
--- a/src/overlay_31_02382820.c
+++ b/src/overlay_31_02382820.c
@@ -3,6 +3,7 @@
 #include "dungeon_util_static.h"
 #include "number_util.h"
 #include "weather.h"
+#include "main_02001188.h"
 
 extern const u8 DUNGEON_MENU_SWITCH_STR1[];// = "[dungeon:0]";
 
@@ -50,7 +51,6 @@ extern struct struct_1* sub_0202ABB0(s8);
 
 extern void CloseTextBox(s8);
 extern void CloseParentMenu(s8);
-extern void MemFree(void* ptr);
 
 extern void ov29_022EA428(u32, u32);
 extern void AdvanceFrame(u8);
diff --git a/src/overlay_31_02383880.c b/src/overlay_31_02383880.c
index 03e1a313..895f7599 100644
--- a/src/overlay_31_02383880.c
+++ b/src/overlay_31_02383880.c
@@ -2,6 +2,7 @@
 #include "dungeon.h"
 #include "main_0202593C.h"
 #include "overlay_31_02383478.h"
+#include "main_02001188.h"
 
 extern struct dungeon* DUNGEON_PTR[];
 extern struct loc_struct* OVERLAY31_UNKNOWN_POINTER__NA_238A26C;
@@ -13,7 +14,6 @@ extern s32 sub_020282F4(s8);
 extern void CloseInventoryMenu(s8);
 extern void ov29_0234E988(u8*);
 extern void CloseTextBox2();
-extern void MemFree(void* ptr);
 extern void DrawTextInWindow(struct window*, u32, u32, u8*);
 
 u8 ov31_0238372C(struct position* x)