diff --git a/lib/NitroSDK/src/os_ownerInfo.c b/lib/NitroSDK/src/os_ownerInfo.c index 7a091a07..f50e0026 100644 --- a/lib/NitroSDK/src/os_ownerInfo.c +++ b/lib/NitroSDK/src/os_ownerInfo.c @@ -1,7 +1,6 @@ #include extern void MTi_CpuCopy16(void *, void *, u32); -extern void MI_CpuCopy8(void *, void *, u32); void OS_GetMacAddress(u8 *macAddr) { MI_CpuCopy8(OS_GetSystemWork()->nvramUserInfo + ((sizeof(NVRAMConfig) + 3) & ~3), macAddr, 6); diff --git a/lib/NitroSDK/src/rtc_internal.c b/lib/NitroSDK/src/rtc_internal.c new file mode 100644 index 00000000..79e540db --- /dev/null +++ b/lib/NitroSDK/src/rtc_internal.c @@ -0,0 +1,122 @@ +#include + +static BOOL RtcSendPxiCommand(u32 command); + +// BOOL RTCi_ResetAsync (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_RESET); +// } +// +// BOOL RTCi_SetHourFormatAsync (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_SET_HOUR_FORMAT); +// } + +BOOL Rtci_ReadRawDateTimeAsync (void) +{ + return RtcSendPxiCommand(RTC_PXI_COMMAND_READ_DATETIME); +} + +// BOOL RTCi_WriteRawDateTimeAsync (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_WRITE_DATETIME); +// } + +BOOL Rtci_ReadRawDateAsync (void) +{ + return RtcSendPxiCommand(RTC_PXI_COMMAND_READ_DATE); +} + +// BOOL RTCi_WriteRawDateAsync (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_WRITE_DATE); +// } + +BOOL Rtci_ReadRawTimeAsync (void) +{ + return RtcSendPxiCommand(RTC_PXI_COMMAND_READ_TIME); +} + +// BOOL RTCi_WriteRawTimeAsync (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_WRITE_TIME); +// } + +// BOOL RTCi_ReadRawPulseAsync (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_READ_PULSE); +// } +// +// BOOL RTCi_WriteRawPulseAsync (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_WRITE_PULSE); +// } +// +// BOOL RTCi_ReadRawAlarm1Async (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_READ_ALARM1); +// } +// +// BOOL RTCi_WriteRawAlarm1Async (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_WRITE_ALARM1); +// } +// +// BOOL RTCi_ReadRawAlarm2Async (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_READ_ALARM2); +// } +// +// BOOL RTCi_WriteRawAlarm2Async (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_WRITE_ALARM2); +// } + +// BOOL RTCi_ReadRawStatus1Async (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_READ_STATUS1); +// } +// +// BOOL RTCi_WriteRawStatus1Async (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_WRITE_STATUS1); +// } + +// BOOL RTCi_ReadRawStatus2Async (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_READ_STATUS2); +// } + +BOOL Rtci_WriteRawStatus2Async (void) +{ + return RtcSendPxiCommand(RTC_PXI_COMMAND_WRITE_STATUS2); +} + +// BOOL RTCi_ReadRawAdjustAsync (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_READ_ADJUST); +// } +// +// BOOL RTCi_WriteRawAdjustAsync (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_WRITE_ADJUST); +// } +// +// BOOL RTCi_ReadRawFreeAsync (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_READ_FREE); +// } +// +// BOOL RTCi_WriteRawFreeAsync (void) +// { +// return RtcSendPxiCommand(RTC_PXI_COMMAND_WRITE_FREE); +// } + +static BOOL RtcSendPxiCommand (u32 command) +{ + if (0 > PXI_SendWordByFifo(PXI_FIFO_TAG_RTC, ((command << RTC_PXI_COMMAND_SHIFT) & RTC_PXI_COMMAND_MASK), 0)) { + return FALSE; + } + + return TRUE; +} diff --git a/lib/include/nitro.h b/lib/include/nitro.h index 7430dd9f..85980b59 100644 --- a/lib/include/nitro.h +++ b/lib/include/nitro.h @@ -8,6 +8,7 @@ #include #include #include +#include #include #include diff --git a/lib/include/nitro/mi.h b/lib/include/nitro/mi.h index 72ef6895..be4b3240 100644 --- a/lib/include/nitro/mi.h +++ b/lib/include/nitro/mi.h @@ -2,6 +2,7 @@ #define NITRO_MI_H_ #include +#include #include #include diff --git a/lib/include/nitro/mi/memory.h b/lib/include/nitro/mi/memory.h new file mode 100644 index 00000000..41304c2e --- /dev/null +++ b/lib/include/nitro/mi/memory.h @@ -0,0 +1,139 @@ +#ifndef NITRO_MI_MEMORY_H_ +#define NITRO_MI_MEMORY_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +//#include +#include + +void MIi_CpuClear16(u16 data, void * destp, u32 size); +void MIi_CpuCopy16(const void * srcp, void * destp, u32 size); +void MIi_CpuSend16(const void * srcp, volatile void * destp, u32 size); + +void MIi_CpuClear32(u32 data, void * destp, u32 size); +void MIi_CpuCopy32(const void * srcp, void * destp, u32 size); +void MIi_CpuSend32(const void * srcp, volatile void * destp, u32 size); + +void MIi_CpuClearFast(u32 data, void * destp, u32 size); +void MIi_CpuCopyFast(const void * srcp, void * destp, u32 size); + +static inline void MI_CpuFill32 (void * dest, u32 data, u32 size) +{ + // SDK_ASSERTMSG((size & 3) == 0, "size & 3 must be 0"); + // SDK_ASSERTMSG(((u32)dest & 3) == 0, "destination address must be in 4-byte alignment"); + + MIi_CpuClear32(data, dest, size); +} + +static inline void MI_CpuCopy32 (const void * src, void * dest, u32 size) +{ + // SDK_ASSERTMSG((size & 3) == 0, "size & 3 must be 0"); + // SDK_ASSERTMSG(((u32)src & 3) == 0, "source address must be in 4-byte alignment"); + // SDK_ASSERTMSG(((u32)dest & 3) == 0, "destination address must be in 4-byte alignment"); + + MIi_CpuCopy32(src, dest, size); +} + +static inline void MI_CpuClear32 (void * dest, u32 size) +{ + MI_CpuFill32(dest, 0, size); +} + +static inline void MI_CpuSend32 (const void * src, volatile void * dest, u32 size) +{ + // SDK_ASSERTMSG((size & 3) == 0, "size & 3 must be 0"); + // SDK_ASSERTMSG(((u32)src & 3) == 0, "source address must be in 4-byte alignment"); + // SDK_ASSERTMSG(((u32)dest & 3) == 0, "destination address must be in 4-byte alignment"); + + MIi_CpuSend32(src, dest, size); +} + +static inline void MI_CpuFill16 (void * dest, u16 data, u32 size) +{ + // SDK_ASSERTMSG((size & 1) == 0, "size & 1 must be 0"); + // SDK_ASSERTMSG(((u32)dest & 1) == 0, "source address must be in 2-byte alignment"); + + MIi_CpuClear16(data, dest, size); +} + +static inline void MI_CpuCopy16 (const void * src, void * dest, u32 size) +{ + // SDK_ASSERTMSG((size & 1) == 0, "size & 1 must be 0"); + // SDK_ASSERTMSG(((u32)src & 1) == 0, "source address must be in 2-byte alignment"); + // SDK_ASSERTMSG(((u32)dest & 1) == 0, "destination address must be in 2-byte alignment"); + + MIi_CpuCopy16(src, dest, size); +} + +static inline void MI_CpuClear16 (void * dest, u32 size) +{ + MI_CpuFill16(dest, 0, size); +} + +static inline void MI_CpuSend16 (const void * src, volatile void * dest, u32 size) +{ + // SDK_ASSERTMSG((size & 1) == 0, "size & 1 must be 0"); + // SDK_ASSERTMSG(((u32)src & 1) == 0, "source address must be in 2-byte alignment"); + // SDK_ASSERTMSG(((u32)dest & 1) == 0, "destination address must be in 2-byte alignment"); + + MIi_CpuSend16(src, dest, size); +} + +static inline void MI_CpuFillFast (void * dest, u32 data, u32 size) +{ + // SDK_ASSERTMSG((size & 3) == 0, "size & 3 must be 0"); + // SDK_ASSERTMSG(((u32)dest & 3) == 0, "source address must be in 4-byte alignment"); + + MIi_CpuClearFast(data, dest, size); +} + +static inline void MI_CpuCopyFast (const void * src, void * dest, u32 size) +{ + // SDK_ASSERTMSG((size & 3) == 0, "size & 3 must be 0"); + // SDK_ASSERTMSG(((u32)src & 3) == 0, "source address must be in 4-byte alignment"); + // SDK_ASSERTMSG(((u32)dest & 3) == 0, "destination address must be in 4-byte alignment"); + + MIi_CpuCopyFast(src, dest, size); +} + +static inline void MI_CpuClearFast (void * dest, u32 size) +{ + MI_CpuFillFast(dest, 0, size); +} + +void MI_CpuFill8(void * dest, u8 data, u32 size); + +void MI_CpuCopy8(const void * src, void * dest, u32 size); + +static inline void MI_CpuClear8 (void * dest, u32 size) +{ + MI_CpuFill8(dest, 0, size); +} + +#ifndef SDK_ASM + #define MI_ReadWord(adrs) (*(vu32 *)(adrs)) +#endif + +#ifndef SDK_ASM + #define MI_WriteWord(adrs, val) do { (*(vu32 *)(adrs)) = (u32)(val); } while (0) +#endif + +void MI_Copy16B(register const void * pSrc, register void * pDest); +void MI_Copy32B(register const void * pSrc, register void * pDest); +void MI_Copy36B(register const void * pSrc, register void * pDest); +void MI_Copy48B(register const void * pSrc, register void * pDest); +void MI_Copy64B(register const void * pSrc, register void * pDest); +void MI_Copy128B(register const void * pSrc, register void * pDest); + +void MI_Zero32B(register void * pDest); +void MI_Zero36B(register void * pDest); +void MI_Zero48B(register void * pDest); +void MI_Zero64B(register void * pDest); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/lib/include/nitro/pxi.h b/lib/include/nitro/pxi.h index e019e7e8..105c7320 100644 --- a/lib/include/nitro/pxi.h +++ b/lib/include/nitro/pxi.h @@ -2,5 +2,20 @@ #define NITRO_PXI_H_ #include +#include +#include +#include -#endif //NITRO_PXI_H_ +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef SDK_ARM9 +#else +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/lib/include/nitro/pxi/common/compparam.h b/lib/include/nitro/pxi/common/compparam.h new file mode 100644 index 00000000..32a948e1 --- /dev/null +++ b/lib/include/nitro/pxi/common/compparam.h @@ -0,0 +1,27 @@ +#ifndef NITRO_PXI_COMMON_COMPPARAM_H_ +#define NITRO_PXI_COMMON_COMPPARAM_H_ + +#include +#include +//#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +static inline void PXI_SetComponentParam (u32 param) +{ + MI_WriteWord(HW_COMPONENT_PARAM, param); +} + +static inline u32 PXI_GetComponentParam (void) +{ + return MI_ReadWord(HW_COMPONENT_PARAM); +} + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/lib/include/nitro/pxi/common/fifo.h b/lib/include/nitro/pxi/common/fifo.h new file mode 100644 index 00000000..39c7f15e --- /dev/null +++ b/lib/include/nitro/pxi/common/fifo.h @@ -0,0 +1,93 @@ +#ifndef NITRO_PXI_COMMON_FIFO_H_ +#define NITRO_PXI_COMMON_FIFO_H_ + +#include +//#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum { + PXI_FIFO_TAG_EX = 0, + PXI_FIFO_TAG_USER_0, + PXI_FIFO_TAG_USER_1, + PXI_FIFO_TAG_SYSTEM, + PXI_FIFO_TAG_NVRAM, + PXI_FIFO_TAG_RTC, + PXI_FIFO_TAG_TOUCHPANEL, + PXI_FIFO_TAG_SOUND, + PXI_FIFO_TAG_PM, + PXI_FIFO_TAG_MIC, + PXI_FIFO_TAG_WM, + PXI_FIFO_TAG_FS, + PXI_FIFO_TAG_OS, + PXI_FIFO_TAG_CTRDG, + PXI_FIFO_TAG_CARD, + PXI_FIFO_TAG_WVR, + PXI_FIFO_TAG_CTRDG_Ex, + PXI_FIFO_TAG_CTRDG_PHI, + PXI_MAX_FIFO_TAG = 32 +} PXIFifoTag; + +#define PXI_FIFO_DEVICE_TEST PXI_FIFO_TAG_USR_0 +#define PXI_FIFO_DEVICE_FLASH PXI_FIFO_TAG_NVRAM +#define PXI_FIFO_DEVICE_RTC PXI_FIFO_TAG_RTC +#define PXI_FIFO_DEVICE_TOUCHPANEL PXI_FIFO_TAG_TOUCHPANEL +#define PXI_MAX_DEVICES PXI_MAX_FIFO_TAG + +typedef enum { + PXI_FIFO_SUCCESS = 0, + PXI_FIFO_FAIL_SEND_ERR = -1, + PXI_FIFO_FAIL_SEND_FULL = -2, + PXI_FIFO_FAIL_RECV_ERR = -3, + PXI_FIFO_FAIL_RECV_EMPTY = -4, + PXI_FIFO_NO_CALLBACK_ENTRY = -5 +} PXIFifoStatus; + +#define PXI_FIFOMESSAGE_BITSZ_TAG 5 +#define PXI_FIFOMESSAGE_BITSZ_ERR 1 +#define PXI_FIFOMESSAGE_BITSZ_DATA 26 + +typedef union { + struct { + u32 tag : PXI_FIFOMESSAGE_BITSZ_TAG; + u32 err : PXI_FIFOMESSAGE_BITSZ_ERR; + u32 data : PXI_FIFOMESSAGE_BITSZ_DATA; + } e; + u32 raw; +} PXIFifoMessage; + +typedef void (*PXIFifoCallback) (PXIFifoTag tag, u32 data, BOOL err); +typedef void (*PXIFifoEmtpyCallback) (void); + +static inline BOOL PXI_IsFifoError (PXIFifoStatus status) +{ + return PXI_FIFO_SUCCESS == status; +} + +void PXI_InitFifo(void); +void PXI_SetFifoRecvCallback(int fifotag, PXIFifoCallback callback); + +BOOL PXI_IsCallbackReady(int fifotag, PXIProc proc); + +static inline BOOL PXI_IsArm7CallbackReady (int fifotag) +{ + return PXI_IsCallbackReady(fifotag, PXI_PROC_ARM7); +} + +static inline BOOL PXI_IsArm9CallbackReady (int fifotag) +{ + return PXI_IsCallbackReady(fifotag, PXI_PROC_ARM9); +} + +void PXI_SetFifoSendCallback(PXIFifoEmtpyCallback callback); +int PXI_SendWordByFifo(int fifotag, u32 data, BOOL err); +void PXIi_HandlerRecvFifoNotEmpty(void); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/lib/include/nitro/pxi/common/regname.h b/lib/include/nitro/pxi/common/regname.h new file mode 100644 index 00000000..2ba5fcf3 --- /dev/null +++ b/lib/include/nitro/pxi/common/regname.h @@ -0,0 +1,59 @@ +#ifndef NITRO_PXI_COMMON_REGNAME_H_ +#define NITRO_PXI_COMMON_REGNAME_H_ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +typedef enum { + PXI_PROC_ARM9 = 0, + PXI_PROC_ARM7 = 1 +} PXIProc; + +#ifdef SDK_ARM9 + #define PXI_PROC_ARM PXI_PROC_ARM9 + + #define reg_PXI_FIFO_CNT reg_PXI_SUBP_FIFO_CNT + #define REG_PXI_FIFO_CNT_ERR_MASK REG_PXI_SUBP_FIFO_CNT_ERR_MASK + #define REG_PXI_FIFO_CNT_SEND_CL_MASK REG_PXI_SUBP_FIFO_CNT_SEND_CL_MASK + #define REG_PXI_FIFO_CNT_SEND_FULL_MASK REG_PXI_SUBP_FIFO_CNT_SEND_FULL_MASK + #define REG_PXI_FIFO_CNT_SEND_TI_MASK REG_PXI_SUBP_FIFO_CNT_SEND_TI_MASK + #define REG_PXI_FIFO_CNT_RECV_RI_MASK REG_PXI_SUBP_FIFO_CNT_RECV_RI_MASK + #define REG_PXI_FIFO_CNT_RECV_EMP_MASK REG_PXI_SUBP_FIFO_CNT_RECV_EMP_MASK + #define REG_PXI_FIFO_CNT_E_MASK REG_PXI_SUBP_FIFO_CNT_E_MASK + + #define reg_PXI_INTF reg_PXI_SUBPINTF + #define REG_PXI_INTF_I_MASK REG_PXI_SUBPINTF_I_MASK + #define REG_PXI_INTF_IREQ_MASK REG_PXI_SUBPINTF_IREQ_MASK + #define REG_PXI_INTF_SEND_MASK REG_PXI_SUBPINTF_A9STATUS_MASK + #define REG_PXI_INTF_SEND_SHIFT REG_PXI_SUBPINTF_A9STATUS_SHIFT + #define REG_PXI_INTF_RECV_MASK REG_PXI_SUBPINTF_A7STATUS_MASK + #define REG_PXI_INTF_RECV_SHIFT REG_PXI_SUBPINTF_A7STATUS_SHIFT +#else + #define PXI_PROC_ARM PXI_PROC_ARM7 + #define reg_PXI_FIFO_CNT reg_PXI_MAINP_FIFO_CNT + #define REG_PXI_FIFO_CNT_ERR_MASK REG_PXI_MAINP_FIFO_CNT_ERR_MASK + #define REG_PXI_FIFO_CNT_SEND_CL_MASK REG_PXI_MAINP_FIFO_CNT_SEND_CL_MASK + #define REG_PXI_FIFO_CNT_SEND_FULL_MASK REG_PXI_MAINP_FIFO_CNT_SEND_FULL_MASK + #define REG_PXI_FIFO_CNT_SEND_TI_MASK REG_PXI_MAINP_FIFO_CNT_SEND_TI_MASK + #define REG_PXI_FIFO_CNT_RECV_RI_MASK REG_PXI_MAINP_FIFO_CNT_RECV_RI_MASK + #define REG_PXI_FIFO_CNT_RECV_EMP_MASK REG_PXI_MAINP_FIFO_CNT_RECV_EMP_MASK + #define REG_PXI_FIFO_CNT_E_MASK REG_PXI_MAINP_FIFO_CNT_E_MASK + + #define reg_PXI_INTF reg_PXI_MAINPINTF + + #define REG_PXI_INTF_I_MASK REG_PXI_MAINPINTF_I_MASK + #define REG_PXI_INTF_IREQ_MASK REG_PXI_MAINPINTF_IREQ_MASK + #define REG_PXI_INTF_SEND_MASK REG_PXI_MAINPINTF_A9STATUS_MASK + #define REG_PXI_INTF_SEND_SHIFT REG_PXI_MAINPINTF_A9STATUS_SHIFT + #define REG_PXI_INTF_RECV_MASK REG_PXI_MAINPINTF_A7STATUS_MASK + #define REG_PXI_INTF_RECV_SHIFT REG_PXI_MAINPINTF_A7STATUS_SHIFT +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/lib/include/nitro/rtc.h b/lib/include/nitro/rtc.h new file mode 100644 index 00000000..f95a1521 --- /dev/null +++ b/lib/include/nitro/rtc.h @@ -0,0 +1,24 @@ +#ifndef NITRO_RTC_H_ +#define NITRO_RTC_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include + +#ifdef SDK_ARM7 + #include + #include + #include +#else + #include + #include +#endif + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/lib/include/nitro/rtc/ARM9/api.h b/lib/include/nitro/rtc/ARM9/api.h new file mode 100644 index 00000000..f9e2cef6 --- /dev/null +++ b/lib/include/nitro/rtc/ARM9/api.h @@ -0,0 +1,147 @@ +#ifndef NITRO_RTC_ARM9_API_H_ +#define NITRO_RTC_ARM9_API_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include + +typedef enum RTCWeek { + RTC_WEEK_SUNDAY = 0, + RTC_WEEK_MONDAY, + RTC_WEEK_TUESDAY, + RTC_WEEK_WEDNESDAY, + RTC_WEEK_THURSDAY, + RTC_WEEK_FRIDAY, + RTC_WEEK_SATURDAY, + RTC_WEEK_MAX +} RTCWeek; + +typedef enum RTCAlarmChan { + RTC_ALARM_CHAN_1 = 0, + RTC_ALARM_CHAN_2, + RTC_ALARM_CHAN_MAX +} RTCAlarmChan; + +typedef enum RTCAlarmStatus { + RTC_ALARM_STATUS_OFF = 0, + RTC_ALARM_STATUS_ON, + RTC_ALARM_STATUS_MAX +} RTCAlarmStatus; + +#define RTC_ALARM_ENABLE_NONE 0x0000 +#define RTC_ALARM_ENABLE_WEEK 0x0001 +#define RTC_ALARM_ENABLE_HOUR 0x0002 +#define RTC_ALARM_ENABLE_MINUTE 0x0004 +#define RTC_ALARM_ENABLE_ALL (RTC_ALARM_ENABLE_WEEK | RTC_ALARM_ENABLE_HOUR | RTC_ALARM_ENABLE_MINUTE) + +typedef enum RTCResult { + RTC_RESULT_SUCCESS = 0, + RTC_RESULT_BUSY, + RTC_RESULT_ILLEGAL_PARAMETER, + RTC_RESULT_SEND_ERROR, + RTC_RESULT_INVALID_COMMAND, + RTC_RESULT_ILLEGAL_STATUS, + RTC_RESULT_FATAL_ERROR, + RTC_RESULT_MAX +} RTCResult; + +typedef void (*RTCCallback) (RTCResult result, void * arg); +typedef void (*RTCInterrupt) (void); + +typedef struct RTCDate { + u32 year; + u32 month; + u32 day; + RTCWeek week; +} RTCDate; + +typedef struct RTCTime { + u32 hour; + u32 minute; + u32 second; +} RTCTime; + +typedef struct RTCTimeEx { + s32 hour; + s32 minute; + s32 second; + s32 millisecond; +} RTCTimeEx; + +typedef struct RTCAlarmParam { + RTCWeek week; + u32 hour; + u32 minute; + u32 enable; +} RTCAlarmParam; + +void RTC_Init(void); + +RTCResult RTC_GetDate(RTCDate * date); +RTCResult RTC_GetTime(RTCTime * time); +RTCResult RTC_GetDateTime(RTCDate * date, RTCTime * time); +RTCResult RTC_GetDateTimeExByTick(RTCDate * date, RTCTimeEx * time); + +RTCResult RTC_SetDate(const RTCDate * date); +RTCResult RTC_SetTime(const RTCTime * time); +RTCResult RTC_SetDateTime(const RTCDate * date, const RTCTime * time); + +RTCResult RTC_GetAlarmStatus(RTCAlarmChan chan, RTCAlarmStatus * status); +RTCResult RTC_GetAlarmParam(RTCAlarmChan chan, RTCAlarmParam * param); + +RTCResult RTC_SetAlarmStatus(RTCAlarmChan chan, const RTCAlarmStatus * status); +RTCResult RTC_SetAlarmParam(RTCAlarmChan chan, const RTCAlarmParam * param); + +RTCResult RTC_GetDateAsync(RTCDate * date, RTCCallback callback, void * arg); +RTCResult RTC_GetTimeAsync(RTCTime * time, RTCCallback callback, void * arg); +RTCResult RTC_GetDateTimeAsync(RTCDate * date, RTCTime * time, RTCCallback callback, void * arg); + +RTCResult RTC_SetDateAsync(const RTCDate * date, RTCCallback callback, void * arg); +RTCResult RTC_SetTimeAsync(const RTCTime * time, RTCCallback callback, void * arg); +RTCResult RTC_SetDateTimeAsync(const RTCDate * date, const RTCTime * time, RTCCallback callback, void * arg); + +RTCResult RTC_GetAlarmStatusAsync(RTCAlarmChan chan, RTCAlarmStatus * status, RTCCallback callback, void * arg); +RTCResult RTC_GetAlarmParamAsync(RTCAlarmChan chan, RTCAlarmParam * param, RTCCallback callback, void * arg); + +void RTC_SetAlarmInterrupt(RTCInterrupt interrupt); + +RTCResult RTC_SetAlarmStatusAsync(RTCAlarmChan chan, const RTCAlarmStatus * status, RTCCallback callback, void * arg); +RTCResult RTC_SetAlarmParamAsync(RTCAlarmChan chan, const RTCAlarmParam * param, RTCCallback callback, void * arg); + +BOOL Rtci_ResetAsync(void); +BOOL Rtci_SetHourFormatAsync(void); +BOOL Rtci_ReadRawDateTimeAsync(void); +BOOL Rtci_WriteRawDateTimeAsync(void); +BOOL Rtci_ReadRawDateAsync(void); +BOOL Rtci_WriteRawDateAsync(void); +BOOL Rtci_ReadRawTimeAsync(void); +BOOL Rtci_WriteRawTimeAsync(void); +BOOL Rtci_ReadRawPulseAsync(void); +BOOL Rtci_WriteRawPulseAsync(void); +BOOL Rtci_ReadRawAlarm1Async(void); +BOOL Rtci_WriteRawAlarm1Async(void); +BOOL Rtci_ReadRawAlarm2Async(void); +BOOL Rtci_WriteRawAlarm2Async(void); +BOOL Rtci_ReadRawStatus1Async(void); +BOOL Rtci_WriteRawStatus1Async(void); +BOOL Rtci_ReadRawStatus2Async(void); +BOOL Rtci_WriteRawStatus2Async(void); +BOOL Rtci_ReadRawAdjustAsync(void); +BOOL Rtci_WriteRawAdjustAsync(void); +BOOL Rtci_ReadRawFreeAsync(void); +BOOL Rtci_WriteRawFreeAsync(void); + +RTCResult Rtci_SetRegStatus2Async(const RTCRawStatus2 * status2, RTCCallback callback, void * arg); +RTCResult Rtci_SetRegAdjustAsync(const RTCRawAdjust * adjust, RTCCallback callback, void * arg); +RTCResult Rtci_SetRegAdjust(const RTCRawAdjust * Adjust); +RTCResult Rtci_SetRegStatus2(const RTCRawStatus2 * status2); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/lib/include/nitro/rtc/ARM9/convert.h b/lib/include/nitro/rtc/ARM9/convert.h new file mode 100644 index 00000000..18856b53 --- /dev/null +++ b/lib/include/nitro/rtc/ARM9/convert.h @@ -0,0 +1,24 @@ +#ifndef NITRO_RTC_ARM9_CONVERT_H_ +#define NITRO_RTC_ARM9_CONVERT_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +s32 Rtc_ConvertDateToDay(const RTCDate * date); +s32 Rtci_ConvertTimeToSecond(const RTCTime * time); +s64 Rtc_ConvertDateTimeToSecond(const RTCDate * date, const RTCTime * time); + +void Rtc_ConvertDayToDate(RTCDate * date, s32 day); +void Rtci_ConvertSecondToTime(RTCTime * time, s32 sec); +void Rtc_ConvertSecondToDateTime(RTCDate * date, RTCTime * time, s64 sec); + +RTCWeek Rtc_GetDayOfWeek(RTCDate * date); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/lib/include/nitro/rtc/common/fifo.h b/lib/include/nitro/rtc/common/fifo.h new file mode 100644 index 00000000..f7034818 --- /dev/null +++ b/lib/include/nitro/rtc/common/fifo.h @@ -0,0 +1,51 @@ +#ifndef NITRO_RTC_COMMON_FIFO_H_ +#define NITRO_RTC_COMMON_FIFO_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#define RTC_PXI_COMMAND_MASK 0x00007f00 +#define RTC_PXI_COMMAND_SHIFT 8 +#define RTC_PXI_RESULT_BIT_MASK 0x00008000 +#define RTC_PXI_RESULT_MASK 0x000000ff +#define RTC_PXI_RESULT_SHIFT 0 + +#define RTC_PXI_COMMAND_RESET 0x00 +#define RTC_PXI_COMMAND_SET_HOUR_FORMAT 0x01 +#define RTC_PXI_COMMAND_READ_DATETIME 0x10 +#define RTC_PXI_COMMAND_READ_DATE 0x11 +#define RTC_PXI_COMMAND_READ_TIME 0x12 +#define RTC_PXI_COMMAND_READ_PULSE 0x13 +#define RTC_PXI_COMMAND_READ_ALARM1 0x14 +#define RTC_PXI_COMMAND_READ_ALARM2 0x15 +#define RTC_PXI_COMMAND_READ_STATUS1 0x16 +#define RTC_PXI_COMMAND_READ_STATUS2 0x17 +#define RTC_PXI_COMMAND_READ_ADJUST 0x18 +#define RTC_PXI_COMMAND_READ_FREE 0x19 +#define RTC_PXI_COMMAND_WRITE_DATETIME 0x20 +#define RTC_PXI_COMMAND_WRITE_DATE 0x21 +#define RTC_PXI_COMMAND_WRITE_TIME 0x22 +#define RTC_PXI_COMMAND_WRITE_PULSE 0x23 +#define RTC_PXI_COMMAND_WRITE_ALARM1 0x24 +#define RTC_PXI_COMMAND_WRITE_ALARM2 0x25 +#define RTC_PXI_COMMAND_WRITE_STATUS1 0x26 +#define RTC_PXI_COMMAND_WRITE_STATUS2 0x27 +#define RTC_PXI_COMMAND_WRITE_ADJUST 0x28 +#define RTC_PXI_COMMAND_WRITE_FREE 0x29 +#define RTC_PXI_COMMAND_INTERRUPT 0x30 + +typedef enum RTCPxiResult { + RTC_PXI_RESULT_SUCCESS = 0, + RTC_PXI_RESULT_INVALID_COMMAND, + RTC_PXI_RESULT_ILLEGAL_STATUS, + RTC_PXI_RESULT_BUSY, + RTC_PXI_RESULT_FATAL_ERROR, + RTC_PXI_RESULT_MAX +} RTCPxiResult; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/lib/include/nitro/rtc/common/type.h b/lib/include/nitro/rtc/common/type.h new file mode 100644 index 00000000..88158c53 --- /dev/null +++ b/lib/include/nitro/rtc/common/type.h @@ -0,0 +1,118 @@ +#ifndef NITRO_RTC_COMMON_TYPE_H_ +#define NITRO_RTC_COMMON_TYPE_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include + +#define RTC_INTERRUPT_MODE_NONE 0x0 +#define RTC_INTERRUPT_MODE_32kHz 0x8 +#define RTC_INTERRUPT_MODE_PULSE 0x1 +#define RTC_INTERRUPT_MODE_MINUTE_EDGE 0x2 +#define RTC_INTERRUPT_MODE_MINUTE_PULSE1 0x3 +#define RTC_INTERRUPT_MODE_ALARM 0x4 +#define RTC_INTERRUPT_MODE_MINUTE_PULSE2 0x7 + +#define RTC_INTERRUPT_MASK_32kHz 0x8 +#define RTC_INTERRUPT_MASK_PULSE 0xb +#define RTC_INTERRUPT_MASK_MINUTE_EDGE 0xb + +#define RTC_PULSE_DUTY_1HZ 0x01 +#define RTC_PULSE_DUTY_2HZ 0x02 +#define RTC_PULSE_DUTY_4HZ 0x04 +#define RTC_PULSE_DUTY_8HZ 0x08 +#define RTC_PULSE_DUTY_16HZ 0x10 + +typedef struct RTCRawDate { + u32 year :8; + u32 month :5; + u32 dummy0 :3; + u32 day :6; + u32 dummy1 :2; + u32 week :3; + u32 dummy2 :5; +} RTCRawDate; + +typedef struct RTCRawTime { + u32 hour :6; + u32 afternoon :1; + u32 dummy0 :1; + u32 minute :7; + u32 dummy1 :1; + u32 second :7; + u32 dummy2 :9; +} RTCRawTime; + +typedef struct RTCRawStatus1 { + u16 reset :1; + u16 format :1; + u16 dummy0 :2; + u16 intr1 :1; + u16 intr2 :1; + u16 bld :1; + u16 poc :1; + u16 dummy1 :8; +} RTCRawStatus1; + +typedef struct RTCRawStatus2 { + u16 intr_mode :4; + u16 dummy0 :2; + u16 intr2_mode :1; + u16 test :1; + u16 dummy1 :8; +} RTCRawStatus2; + +typedef struct RTCRawAlarm { + u32 week :3; + u32 dummy0 :4; + u32 we :1; + u32 hour :6; + u32 afternoon :1; + u32 he :1; + u32 minute :7; + u32 me :1; + u32 dummy2 :8; +} RTCRawAlarm; + +typedef struct RTCRawPulse { + u32 pulse :5; + u32 dummy :27; +} RTCRawPulse; + +typedef struct RTCRawAdjust { + u32 adjust :8; + u32 dummy :24; +} RTCRawAdjust; + +typedef struct RTCRawFree { + u32 free :8; + u32 dummy :24; +} RTCRawFree; + +typedef union RTCRawData { + struct { + RTCRawDate date; + RTCRawTime time; + } t; + struct { + RTCRawStatus1 status1; + RTCRawStatus2 status2; + union { + RTCRawPulse pulse; + RTCRawAlarm alarm; + RTCRawAdjust adjust; + RTCRawFree free; + }; + } a; + u32 words[2]; + u16 halfs[4]; + u8 bytes[8]; +} RTCRawData; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/main.lsf b/main.lsf index 75709602..d6087ff8 100644 --- a/main.lsf +++ b/main.lsf @@ -294,7 +294,7 @@ Static main Object lib/NitroSDK/asm/spi_tp.o Object lib/NitroSDK/asm/spi_pm.o Object lib/NitroSDK/asm/rtc_external.o - Object lib/NitroSDK/asm/rtc_internal.o + Object lib/NitroSDK/src/rtc_internal.o Object lib/NitroSDK/asm/rtc_convert.o Object lib/NitroSDK/asm/card_common.o Object lib/NitroSDK/asm/card_spi.o