mirror of
https://github.com/pret/pmd-red.git
synced 2026-04-24 15:07:09 -05:00
sync agb_flash and io_reg with pokeemerald
This commit is contained in:
DizzyEggg
parent
0d27fb2516
commit
4aa5a9011a
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@ -137,6 +137,8 @@
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#define REG_OFFSET_DMA3CNT_H 0xde
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#define REG_OFFSET_TMCNT 0x100
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#define REG_OFFSET_TMCNT_L 0x100
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#define REG_OFFSET_TMCNT_H 0x102
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#define REG_OFFSET_TM0CNT 0x100
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#define REG_OFFSET_TM0CNT_L 0x100
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#define REG_OFFSET_TM0CNT_H 0x102
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@ -298,6 +300,8 @@
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#define REG_ADDR_DMA3CNT_H (REG_BASE + REG_OFFSET_DMA3CNT_H)
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#define REG_ADDR_TMCNT (REG_BASE + REG_OFFSET_TMCNT)
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#define REG_ADDR_TMCNT_L (REG_BASE + REG_OFFSET_TMCNT_L)
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#define REG_ADDR_TMCNT_H (REG_BASE + REG_OFFSET_TMCNT_H)
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#define REG_ADDR_TM0CNT (REG_BASE + REG_OFFSET_TM0CNT)
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#define REG_ADDR_TM0CNT_L (REG_BASE + REG_OFFSET_TM0CNT_L)
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#define REG_ADDR_TM0CNT_H (REG_BASE + REG_OFFSET_TM0CNT_H)
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@ -457,7 +461,9 @@
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#define REG_DMA3CNT_L (*(vu16 *)REG_ADDR_DMA3CNT_L)
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#define REG_DMA3CNT_H (*(vu16 *)REG_ADDR_DMA3CNT_H)
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#define REG_TMCNT(n) (*(vu16 *)(REG_ADDR_TMCNT + ((n) * 4)))
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#define REG_TMCNT(n) (*(vu32 *)(REG_ADDR_TMCNT + ((n) * 4)))
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#define REG_TMCNT_L(n) (*(vu16 *)(REG_ADDR_TMCNT_L + ((n) * 4)))
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#define REG_TMCNT_H(n) (*(vu16 *)(REG_ADDR_TMCNT_H + ((n) * 4)))
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#define REG_TM0CNT (*(vu32 *)REG_ADDR_TM0CNT)
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#define REG_TM0CNT_L (*(vu16 *)REG_ADDR_TM0CNT_L)
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#define REG_TM0CNT_H (*(vu16 *)REG_ADDR_TM0CNT_H)
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@ -476,6 +482,7 @@
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#define REG_SIODATA32 (*(vu32 *)REG_ADDR_SIODATA32)
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#define REG_SIOMLT_SEND (*(vu16 *)REG_ADDR_SIOMLT_SEND)
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#define REG_SIOMLT_RECV (*(vu64 *)REG_ADDR_SIOMLT_RECV)
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#define REG_SIOMULTI(n) (*(vu16 *)(REG_ADDR_SIOMULTI0 + (n) * 2))
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#define REG_SIOMULTI0 (*(vu16 *)REG_ADDR_SIOMULTI0)
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#define REG_SIOMULTI1 (*(vu16 *)REG_ADDR_SIOMULTI1)
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#define REG_SIOMULTI2 (*(vu16 *)REG_ADDR_SIOMULTI2)
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@ -495,23 +502,24 @@
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// I/O register fields
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// DISPCNT
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#define DISPCNT_MODE_0 0x0000 // BG0: text, BG1: text, BG2: text, BG3: text
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#define DISPCNT_MODE_1 0x0001 // BG0: text, BG1: text, BG2: affine, BG3: off
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#define DISPCNT_MODE_2 0x0002 // BG0: off, BG1: off, BG2: affine, BG3: affine
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#define DISPCNT_MODE_3 0x0003 // Bitmap mode, 240x160, BGR555 color
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#define DISPCNT_MODE_4 0x0004 // Bitmap mode, 240x160, 256 color palette
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#define DISPCNT_MODE_5 0x0005 // Bitmap mode, 160x128, BGR555 color
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#define DISPCNT_OBJ_1D_MAP 0x0040
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#define DISPCNT_FORCED_BLANK 0x0080
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#define DISPCNT_BG0_ON 0x0100
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#define DISPCNT_BG1_ON 0x0200
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#define DISPCNT_BG2_ON 0x0400
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#define DISPCNT_BG3_ON 0x0800
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#define DISPCNT_BG_ALL_ON 0x0F00
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#define DISPCNT_OBJ_ON 0x1000
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#define DISPCNT_WIN0_ON 0x2000
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#define DISPCNT_WIN1_ON 0x4000
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#define DISPCNT_OBJWIN_ON 0x8000
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#define DISPCNT_MODE_0 0x0000 // BG0: text, BG1: text, BG2: text, BG3: text
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#define DISPCNT_MODE_1 0x0001 // BG0: text, BG1: text, BG2: affine, BG3: off
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#define DISPCNT_MODE_2 0x0002 // BG0: off, BG1: off, BG2: affine, BG3: affine
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#define DISPCNT_MODE_3 0x0003 // Bitmap mode, 240x160, BGR555 color
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#define DISPCNT_MODE_4 0x0004 // Bitmap mode, 240x160, 256 color palette
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#define DISPCNT_MODE_5 0x0005 // Bitmap mode, 160x128, BGR555 color
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#define DISPCNT_HBLANK_INTERVAL 0x0020 // Allow access to OAM during H-Blank
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#define DISPCNT_OBJ_1D_MAP 0x0040
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#define DISPCNT_FORCED_BLANK 0x0080
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#define DISPCNT_BG0_ON 0x0100
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#define DISPCNT_BG1_ON 0x0200
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#define DISPCNT_BG2_ON 0x0400
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#define DISPCNT_BG3_ON 0x0800
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#define DISPCNT_BG_ALL_ON 0x0F00
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#define DISPCNT_OBJ_ON 0x1000
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#define DISPCNT_WIN0_ON 0x2000
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#define DISPCNT_WIN1_ON 0x4000
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#define DISPCNT_OBJWIN_ON 0x8000
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// DISPSTAT
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#define DISPSTAT_VBLANK 0x0001 // in V-Blank
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@ -573,14 +581,19 @@
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#define WINOUT_WINOBJ_CLR (1 << 13)
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#define WINOUT_WINOBJ_ALL (WINOUT_WINOBJ_BG_ALL | WINOUT_WINOBJ_OBJ | WINOUT_WINOBJ_CLR)
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#define WIN_RANGE(a, b) (((a) << 8) | (b))
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#define WIN_RANGE2(a, b) ((b) | ((a) << 8))
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// BLDCNT
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// Bits 0-5 select layers for the 1st target
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#define BLDCNT_TGT1_BG0 (1 << 0)
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#define BLDCNT_TGT1_BG1 (1 << 1)
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#define BLDCNT_TGT1_BG2 (1 << 2)
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#define BLDCNT_TGT1_BG3 (1 << 3)
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#define BLDCNT_TGT1_BG_ALL (BLDCNT_TGT1_BG0 | BLDCNT_TGT1_BG1 | BLDCNT_TGT1_BG2 | BLDCNT_TGT1_BG3)
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#define BLDCNT_TGT1_OBJ (1 << 4)
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#define BLDCNT_TGT1_BD (1 << 5)
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#define BLDCNT_TGT1_ALL (BLDCNT_TGT1_BG_ALL | BLDCNT_TGT1_OBJ | BLDCNT_TGT1_BD)
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// Bits 6-7 select the special effect
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#define BLDCNT_EFFECT_NONE (0 << 6) // no special effect
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#define BLDCNT_EFFECT_BLEND (1 << 6) // 1st+2nd targets mixed (controlled by BLDALPHA)
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@ -591,8 +604,10 @@
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#define BLDCNT_TGT2_BG1 (1 << 9)
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#define BLDCNT_TGT2_BG2 (1 << 10)
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#define BLDCNT_TGT2_BG3 (1 << 11)
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#define BLDCNT_TGT2_BG_ALL (BLDCNT_TGT2_BG0 | BLDCNT_TGT2_BG1 | BLDCNT_TGT2_BG2 | BLDCNT_TGT2_BG3)
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#define BLDCNT_TGT2_OBJ (1 << 12)
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#define BLDCNT_TGT2_BD (1 << 13)
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#define BLDCNT_TGT2_ALL (BLDCNT_TGT2_BG_ALL | BLDCNT_TGT2_OBJ | BLDCNT_TGT2_BD)
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// BLDALPHA
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#define BLDALPHA_BLEND(target1, target2) (((target2) << 8) | (target1))
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@ -74,7 +74,7 @@ u16 SetFlashTimerIntr(u8 timerNum, void (**intrFunc)(void))
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return 1;
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sTimerNum = timerNum;
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sTimerReg = ®_TMCNT(sTimerNum);
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sTimerReg = ®_TMCNT_L(sTimerNum);
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*intrFunc = FlashTimerIntr;
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return 0;
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}
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@ -127,7 +127,8 @@ void SetReadFlash1(u16 *dest)
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}
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}
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void ReadFlash_Core(u8 *src, u8 *dest, u32 size)
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// Using volatile here to make sure the flash memory will ONLY be read as bytes, to prevent any compiler optimizations.
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void ReadFlash_Core(vu8 *src, u8 *dest, u32 size)
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{
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while (size-- != 0)
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{
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@ -139,10 +140,10 @@ void ReadFlash(u16 sectorNum, u32 offset, u8 *dest, u32 size)
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{
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u8 *src;
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u16 i;
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u16 readFlash_Core_Buffer[0x40];
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u16 *funcSrc;
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u16 *funcDest;
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void (*readFlash_Core)(u8 *, u8 *, u32);
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vu16 readFlash_Core_Buffer[0x40];
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vu16 *funcSrc;
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vu16 *funcDest;
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void (*readFlash_Core)(vu8 *, u8 *, u32);
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REG_WAITCNT = (REG_WAITCNT & ~WAITCNT_SRAM_MASK) | WAITCNT_SRAM_8;
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@ -152,8 +153,8 @@ void ReadFlash(u16 sectorNum, u32 offset, u8 *dest, u32 size)
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sectorNum %= SECTORS_PER_BANK;
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}
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funcSrc = (u16 *)ReadFlash_Core;
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funcSrc = (u16 *)((s32)funcSrc & ~1);
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funcSrc = (vu16 *)ReadFlash_Core;
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funcSrc = (vu16 *)((s32)funcSrc & ~1);
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funcDest = readFlash_Core_Buffer;
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i = ((s32)ReadFlash - (s32)ReadFlash_Core) >> 1;
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@ -164,7 +165,7 @@ void ReadFlash(u16 sectorNum, u32 offset, u8 *dest, u32 size)
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i--;
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}
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readFlash_Core = (void (*)(u8 *, u8 *, u32))((s32)readFlash_Core_Buffer + 1);
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readFlash_Core = (void (*)(vu8 *, u8 *, u32))((s32)readFlash_Core_Buffer + 1);
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src = FLASH_BASE + (sectorNum << gFlash->sector.shift) + offset;
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@ -185,9 +186,9 @@ u32 VerifyFlashSector_Core(u8 *src, u8 *tgt, u32 size)
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u32 VerifyFlashSector(u16 sectorNum, u8 *src)
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{
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u16 i;
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u16 verifyFlashSector_Core_Buffer[0x80];
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u16 *funcSrc;
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u16 *funcDest;
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vu16 verifyFlashSector_Core_Buffer[0x80];
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vu16 *funcSrc;
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vu16 *funcDest;
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u8 *tgt;
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u16 size;
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u32 (*verifyFlashSector_Core)(u8 *, u8 *, u32);
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@ -200,8 +201,8 @@ u32 VerifyFlashSector(u16 sectorNum, u8 *src)
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sectorNum %= SECTORS_PER_BANK;
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}
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funcSrc = (u16 *)VerifyFlashSector_Core;
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funcSrc = (u16 *)((s32)funcSrc & ~1);
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funcSrc = (vu16 *)VerifyFlashSector_Core;
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funcSrc = (vu16 *)((s32)funcSrc & ~1);
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funcDest = verifyFlashSector_Core_Buffer;
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i = ((s32)VerifyFlashSector - (s32)VerifyFlashSector_Core) >> 1;
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@ -223,9 +224,9 @@ u32 VerifyFlashSector(u16 sectorNum, u8 *src)
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u32 VerifyFlashSectorNBytes(u16 sectorNum, u8 *src, u32 n)
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{
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u16 i;
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u16 verifyFlashSector_Core_Buffer[0x80];
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u16 *funcSrc;
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u16 *funcDest;
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vu16 verifyFlashSector_Core_Buffer[0x80];
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vu16 *funcSrc;
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vu16 *funcDest;
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u8 *tgt;
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u32 (*verifyFlashSector_Core)(u8 *, u8 *, u32);
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@ -237,8 +238,8 @@ u32 VerifyFlashSectorNBytes(u16 sectorNum, u8 *src, u32 n)
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REG_WAITCNT = (REG_WAITCNT & ~WAITCNT_SRAM_MASK) | WAITCNT_SRAM_8;
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funcSrc = (u16 *)VerifyFlashSector_Core;
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funcSrc = (u16 *)((s32)funcSrc & ~1);
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funcSrc = (vu16 *)VerifyFlashSector_Core;
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funcSrc = (vu16 *)((s32)funcSrc & ~1);
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funcDest = verifyFlashSector_Core_Buffer;
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i = ((s32)VerifyFlashSector - (s32)VerifyFlashSector_Core) >> 1;
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