From 09dc26aca0f60797a24e50265b30f00b48db6a15 Mon Sep 17 00:00:00 2001 From: Seth Barberee Date: Tue, 18 Jun 2024 09:57:32 -0700 Subject: [PATCH] decomp more math funcs --- asm/math.s | 279 ----------------------------------------------------- src/math.c | 166 ++++++++++++++++++++++++++++++- 2 files changed, 164 insertions(+), 281 deletions(-) diff --git a/asm/math.s b/asm/math.s index dd0479918..03bf69661 100644 --- a/asm/math.s +++ b/asm/math.s @@ -5,285 +5,6 @@ .text - thumb_func_start u24_8_div -u24_8_div: - push {r4-r7,lr} - mov r7, r10 - mov r6, r9 - mov r5, r8 - push {r5-r7} - sub sp, 0x4 - cmp r1, 0 - bne _08009EB8 - ldr r0, _08009EB4 - b _08009F58 - .align 2, 0 -_08009EB4: .4byte 0x7fffffff -_08009EB8: - cmp r0, 0 - bne _08009EC0 - movs r0, 0 - b _08009F58 -_08009EC0: - lsrs r7, r0, 24 - lsls r6, r0, 8 - mov r10, r1 - movs r0, 0 - mov r9, r0 - movs r5, 0 - movs r4, 0 - movs r1, 0x1 - mov r8, r1 - movs r2, 0x3F - str r2, [sp] -_08009ED6: - lsls r5, 1 - adds r0, r4, 0 - movs r1, 0x80 - lsls r1, 24 - ands r0, r1 - cmp r0, 0 - beq _08009EE8 - mov r2, r8 - orrs r5, r2 -_08009EE8: - movs r1, 0x2 - negs r1, r1 - lsls r4, 1 - adds r0, r7, 0 - movs r2, 0x80 - lsls r2, 24 - ands r0, r2 - cmp r0, 0 - beq _08009EFE - mov r0, r8 - orrs r4, r0 -_08009EFE: - lsls r7, 1 - adds r0, r6, 0 - movs r2, 0x80 - lsls r2, 24 - ands r0, r2 - cmp r0, 0 - beq _08009F10 - mov r0, r8 - orrs r7, r0 -_08009F10: - lsls r6, 1 - ands r6, r1 - adds r0, r5, 0 - adds r1, r4, 0 - movs r2, 0 - mov r3, r10 - bl u32_pair_less_than - lsls r0, 24 - cmp r0, 0 - bne _08009F3A - adds r0, r4, 0 - movs r1, 0x1 - mov r2, r10 - subs r4, r2 - movs r2, 0 - subs r5, r2 - cmp r0, r4 - bcs _08009F3C - subs r5, 0x1 - b _08009F3C -_08009F3A: - movs r1, 0 -_08009F3C: - mov r0, r9 - lsls r0, 1 - mov r9, r0 - cmp r1, 0 - beq _08009F4C - mov r1, r8 - orrs r0, r1 - mov r9, r0 -_08009F4C: - ldr r2, [sp] - subs r2, 0x1 - str r2, [sp] - cmp r2, 0 - bge _08009ED6 - mov r0, r9 -_08009F58: - add sp, 0x4 - pop {r3-r5} - mov r8, r3 - mov r9, r4 - mov r10, r5 - pop {r4-r7} - pop {r1} - bx r1 - thumb_func_end u24_8_div - - thumb_func_start sub_8009F68 -sub_8009F68: - push {r4-r7,lr} - adds r5, r0, 0 - adds r6, r1, 0 - adds r4, r6, 0 - cmp r6, 0 - bge _08009F76 - negs r4, r6 -_08009F76: - movs r7, 0x80 - lsls r7, 1 - cmp r4, 0 - beq _08009FA0 -_08009F7E: - movs r0, 0x1 - ands r0, r4 - cmp r0, 0 - beq _08009F90 - adds r0, r7, 0 - adds r1, r5, 0 - bl s24_8_mul - adds r7, r0, 0 -_08009F90: - adds r0, r5, 0 - adds r1, r5, 0 - bl s24_8_mul - adds r5, r0, 0 - asrs r4, 1 - cmp r4, 0 - bne _08009F7E -_08009FA0: - cmp r6, 0 - bge _08009FB0 - movs r0, 0x80 - lsls r0, 1 - adds r1, r7, 0 - bl s24_8_div - b _08009FB2 -_08009FB0: - adds r0, r7, 0 -_08009FB2: - pop {r4-r7} - pop {r1} - bx r1 - thumb_func_end sub_8009F68 - - thumb_func_start sub_8009FB8 -sub_8009FB8: - push {r4-r7,lr} - adds r5, r0, 0 - adds r6, r1, 0 - cmp r5, 0 - bge _08009FC4 - negs r5, r5 -_08009FC4: - cmp r6, 0 - bge _08009FCA - negs r6, r6 -_08009FCA: - cmp r5, r6 - bge _08009FD4 - adds r4, r5, 0 - adds r5, r6, 0 - adds r6, r4, 0 -_08009FD4: - cmp r6, 0 - beq _0800A016 - movs r7, 0x2 -_08009FDA: - adds r0, r6, 0 - adds r1, r5, 0 - bl s24_8_div - adds r4, r0, 0 - adds r1, r4, 0 - bl s24_8_mul - adds r4, r0, 0 - movs r0, 0x80 - lsls r0, 3 - adds r1, r4, r0 - adds r0, r4, 0 - bl s24_8_div - adds r4, r0, 0 - adds r0, r5, 0 - adds r1, r4, 0 - bl s24_8_mul - lsls r0, 1 - adds r5, r0 - adds r0, r6, 0 - adds r1, r4, 0 - bl s24_8_mul - adds r6, r0, 0 - subs r7, 0x1 - cmp r7, 0 - bge _08009FDA -_0800A016: - adds r0, r5, 0 - pop {r4-r7} - pop {r1} - bx r1 - thumb_func_end sub_8009FB8 - - thumb_func_start sub_800A020 -sub_800A020: - push {r4,lr} - adds r3, r0, 0 - ldr r4, _0800A044 - lsrs r2, r1, 16 - str r2, [r3] - lsls r0, r1, 16 - str r0, [r3, 0x4] - movs r0, 0x80 - lsls r0, 8 - ands r0, r1 - cmp r0, 0 - beq _0800A03C - orrs r2, r4 - str r2, [r3] -_0800A03C: - pop {r4} - pop {r0} - bx r0 - .align 2, 0 -_0800A044: .4byte 0xffff0000 - thumb_func_end sub_800A020 - - thumb_func_start sub_800A048 -sub_800A048: - push {lr} - ldrh r1, [r0] - lsls r2, r1, 16 - ldr r0, [r0, 0x4] - lsrs r1, r0, 16 - orrs r2, r1 - movs r1, 0x80 - lsls r1, 8 - ands r0, r1 - cmp r0, 0 - beq _0800A060 - adds r2, 0x1 -_0800A060: - adds r0, r2, 0 - pop {r1} - bx r1 - thumb_func_end sub_800A048 - - thumb_func_start sub_800A068 -sub_800A068: - push {lr} - ldrb r1, [r0] - lsls r2, r1, 24 - ldr r0, [r0, 0x4] - lsrs r1, r0, 8 - orrs r2, r1 - movs r1, 0x80 - lsls r1, 8 - ands r0, r1 - cmp r0, 0 - beq _0800A080 - adds r2, 0x1 -_0800A080: - adds r0, r2, 0 - pop {r1} - bx r1 - thumb_func_end sub_800A068 - thumb_func_start sub_800A088 sub_800A088: push {lr} diff --git a/src/math.c b/src/math.c index de958007a..e7b4816b7 100644 --- a/src/math.c +++ b/src/math.c @@ -2,10 +2,10 @@ #include "globaldata.h" #include "math.h" -extern u24_8 u24_8_div(u24_8 x, u24_8 y); // decomp in progress: https://decomp.me/scratch/pMyGD - #include "data/math.h" +u24_8 u24_8_div(u24_8 x, u24_8 y); + u32 fast_mod_3(s32 x) { if (x < 0x100) { return gFastMod3Lookup[x]; @@ -159,3 +159,165 @@ u24_8 u24_8_mul(u24_8 x, u24_8 y) { return out_l; } + +u24_8 u24_8_div(u24_8 x, u24_8 y) +{ + bool8 bVar1; + u32 r9; + u32 r2; + u32 r4; + u32 r5; + u32 r6; + u32 r7; + u32 r8; + int counter; + s32 sl; + s32 flag; + s32 save; + + if (y == 0) { + return 0x7fffffff; + } + else if (x == 0) { + return 0; + } + else { + r7 = x >> 0x18; + r6 = x << 8; + sl = y; + r9 = 0; + r5 = 0; + r4 = 0; + r2 = 0; + r8 = 1; + + + for(counter = 0x3f; counter >= 0; counter--) + { + r5 <<= 1; + if ((r4 & 0x80000000) != 0) { + r5 |= r8; + } + flag = -2; + r4 <<= 1; + if ((r7 & 0x80000000) != 0) { + r4 |= r8; + } + r7 <<= 1; + if ((r6 & 0x80000000) != 0) { + r7 |= r8; + } + r6 <<= 1; + r6 &= flag; + if (u32_pair_less_than(r5,r4,0,sl) == 0) { + save = r4; + bVar1 = 1; + r4 = r4 - sl; + r5 = r5 - r2; // WHY???? + if (save < r4) { + r5--; + } + } + else { + bVar1 = 0; + } + r9 <<= 1; + if (bVar1) { + r9 |= r8; + } + } + } + return r9; +} + +s32 sub_8009F68(s32 x, s32 y) +{ + s32 uVar1; + s32 sVar1; + + uVar1 = y; + if (y < 0) { + uVar1 = -y; + } + sVar1 = 0x100; + for (; uVar1 != 0; uVar1 >>= 1) { + if ((uVar1 & 1) != 0) { + sVar1 = s24_8_mul(sVar1, x); + } + x = s24_8_mul(x, x); + } + if (y >= 0) { + return sVar1; + } + else + return s24_8_div(0x100,sVar1); +} + +s32 sub_8009FB8(s32 x, s32 y) +{ + s32 r4; + s32 counter; + + s32 r5; + s32 r6; + + r5 = x; + r6 = y; + + if (r5 < 0) { + r5 = -r5; + } + if (r6 < 0) { + r6 = -r6; + } + if (r5 < r6) { + r4 = r5; + r5 = r6; + r6 = r4; + } + if (r6 != 0) { + for(counter = 2; counter >= 0; counter--) + { + r4 = s24_8_div(r6,r5); + r4 = s24_8_mul(r4,r4); + r4 = s24_8_div(r4,r4 + 0x400); + r5 = r5 + s24_8_mul(r5,r4) * 2; + r6 = s24_8_mul(r6,r4); + } + } + return r5; +} + +void sub_800A020(s32 *param_1, u32 param_2) +{ + register u32 temp asm("r4"); + + temp = 0xffff0000; + param_1[0] = param_2 >> 0x10; + param_1[1] = param_2 << 0x10; + if ((param_2 & 0x8000) != 0) { + param_1[0] |= temp; + } +} + +u32 sub_800A048(u32 *param_1) +{ + u32 uVar1; + + uVar1 = ((u16)param_1[0] << 0x10) | (param_1[1] >> 0x10); + if ((param_1[1] & 0x8000) != 0) { + uVar1++; + } + return uVar1; +} + +UNUSED u32 sub_800A068(u32 *param_1) +{ + u32 uVar1; + + uVar1 = ((u8)param_1[0] << 0x18) | param_1[1] >> 8; + if ((param_1[1] & 0x8000) != 0) { + uVar1++; + } + return uVar1; +}