dolphin/Source/Core/Core/PowerPC/JitILCommon
magumagu ac54c6a4e2 Make address translation respect the CPU translation mode.
The PowerPC CPU has bits in MSR (DR and IR) which control whether
addresses are translated. We should respect these instead of mixing
physical addresses and translated addresses into the same address space.

This is mostly mass-renaming calls to memory accesses APIs from places
which expect address translation to use a different version from those
which do not expect address translation.

This does very little on its own, but it's the first step to a correct BAT
implementation.
2015-02-11 13:56:22 -08:00
..
IR.cpp JIT: simplify ISI handling. 2015-01-01 19:25:48 -08:00
IR.h JIT: simplify ISI handling. 2015-01-01 19:25:48 -08:00
JitILBase_Branch.cpp Make address translation respect the CPU translation mode. 2015-02-11 13:56:22 -08:00
JitILBase_FloatingPoint.cpp Fix FPRF flag setting 2014-10-21 04:56:35 -07:00
JitILBase_Integer.cpp Symbolicize explicit uses of x86 registers where possible (GPRs only for now). 2014-09-06 13:18:31 -04:00
JitILBase_LoadStore.cpp Make address translation respect the CPU translation mode. 2015-02-11 13:56:22 -08:00
JitILBase_LoadStoreFloating.cpp Include CommonTypes.h instead of Common.h. 2014-09-08 15:39:58 -04:00
JitILBase_LoadStorePaired.cpp Include CommonTypes.h instead of Common.h. 2014-09-08 15:39:58 -04:00
JitILBase_Paired.cpp Include CommonTypes.h instead of Common.h. 2014-09-08 15:39:58 -04:00
JitILBase_SystemRegisters.cpp Include CommonTypes.h instead of Common.h. 2014-09-08 15:39:58 -04:00
JitILBase.h Fix Fastmem in JitIL for massive speed gains. 2014-09-14 16:21:54 +12:00