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c1ba2fcea0
Arm64GPRCache already uses STP when flushing two adjacent registers in the same FlushRegisters call, so we can accomplish this by tweaking PPCAnalyst so that registers we've paired get flushed at the same time. I had to rework the bitwise logic in Jit.cpp and the STP logic in the lwm implementation, since there is no longer any guarantee that every register that goes "out of use" at a given instruction is actually used by that instruction. |
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| .. | ||
| Android | ||
| Core | ||
| DSPSpy | ||
| DSPTool | ||
| PCH | ||
| UnitTests | ||
| VSProps | ||
| .clang-format | ||
| CMakeLists.txt | ||
| dolphin-emu.sln | ||