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0f72b69dc7
If the last write to a register comes before the last read of it, we can write the register to ppcState after the last write instead of after the last read. This will hopefully help spread out m_ppc_state writes across a code block, improving pipelining. Also, if there's a conditional branch that's after the last write but before the last read, instead of needing to emit one m_ppc_state write on each side of the branch, we now only need to emit one m_ppc_state write. A note about the changes made to stmw and mfcr: These instructions don't write to any GPRs or CRs respectively – they only read from them. With this commit, there are no longer any cases where registers get written back to m_ppc_state after an instruction that just reads from them, so we can get rid of all STP logic from these two instructions. lmw still needs its STP logic, since that one does write to registers. |
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| .. | ||
| CachedInterpreter | ||
| Interpreter | ||
| Jit64 | ||
| Jit64Common | ||
| JitArm64 | ||
| JitArmCommon | ||
| JitCommon | ||
| SignatureDB | ||
| BreakPoints.cpp | ||
| BreakPoints.h | ||
| ConditionRegister.cpp | ||
| ConditionRegister.h | ||
| CPUCoreBase.h | ||
| Expression.cpp | ||
| Expression.h | ||
| GDBStub.cpp | ||
| GDBStub.h | ||
| Gekko.h | ||
| JitInterface.cpp | ||
| JitInterface.h | ||
| MMU.cpp | ||
| MMU.h | ||
| PowerPC.cpp | ||
| PowerPC.h | ||
| PPCAnalyst.cpp | ||
| PPCAnalyst.h | ||
| PPCCache.cpp | ||
| PPCCache.h | ||
| PPCSymbolDB.cpp | ||
| PPCSymbolDB.h | ||
| PPCTables.cpp | ||
| PPCTables.h | ||