Commit Graph

3300 Commits

Author SHA1 Message Date
JosJuice
f6aca69ea0 PPCAnalyst: Remove unused member isBranchTarget
Branch targets always start a new block, so this variable isn't useful.
2024-05-24 20:51:39 +02:00
Admiral H. Curtiss
578a3ce543
Merge pull request #12722 from JosJuice/jitarm64-mtfsfix-minor
JitArm64: Minor mtfsfix optimization
2024-05-22 23:54:29 +02:00
Admiral H. Curtiss
abc8aa2237
Merge pull request #12764 from Sintendo/jitarm64-temp-regs
JitArm64: Skip temp regs where possible
2024-05-21 22:06:21 +02:00
JosJuice
892bba9768 Jit64: Remove outdated comment about R12
This comment was added 15 years ago in 1c1425a406. The bug the comment
refers to was fixed one day later in 41ce35deb3.
2024-05-18 14:54:33 +02:00
OatmealDome
50386c4e39
Merge pull request #12740 from mitaclaw/breakpoint-before-fpu-exception
Jit64/JitArm64: Check Breakpoints Before FPU Availability
2024-05-08 01:26:08 -04:00
Bram Speeckaert
b63808a652 JitArm64: rlwimix - Conditionally skip temp reg allocation 2024-05-07 21:12:34 +02:00
Bram Speeckaert
f7c97ae654 JitArm64: srawx - Conditionally skip temp reg allocation 2024-05-07 21:12:24 +02:00
Bram Speeckaert
0189692ea3 JitArm64: divwx - Conditionally skip temp reg allocation 2024-05-07 21:11:49 +02:00
Bram Speeckaert
defe97d9f1 JitArm64: addex - Skip temp reg allocation 2024-05-07 21:11:49 +02:00
Bram Speeckaert
5d647251f7 JitArm64: subfic - Conditionally skip temp reg allocation 2024-05-07 21:11:49 +02:00
Admiral H. Curtiss
3029d8a47f
Merge pull request #12729 from JosJuice/no-discard-at-breakpoint
PPCAnalyst: Prevent discarding registers around breakpoints
2024-05-04 18:07:02 +02:00
Admiral H. Curtiss
c26373bd95
Merge pull request #12738 from mitaclaw/expression-sprs
Expression: Support All SPRs + MSR
2024-05-04 17:35:12 +02:00
Admiral H. Curtiss
0daf4d1281
Merge pull request #12762 from mitaclaw/dead-config-code
PowerPC: Remove Dead Config Code
2024-05-04 16:23:36 +02:00
Tilka
c442c0d5e5
Merge pull request #10957 from Pokechu22/std-bitcast
Replace Common::BitCast with std::bit_cast
2024-05-04 08:24:59 +01:00
mitaclaw
2b337aec58 PowerPC: Remove Dead Config Code 2024-05-03 21:54:47 -07:00
Pokechu22
fbbfea8e8e Replace Common::BitCast with std::bit_cast 2024-05-03 18:43:51 -07:00
mitaclaw
076bdf7a24 Expression: Support All SPRs + MSR 2024-05-03 17:56:58 -07:00
Guilherme Janczak
0859d2c472
improve NetBSD-specific code
NetBSD doesn't put packages in /usr/local like /CMakeLists.txt thought.
The `#ifdef __NetBSD__` around iconv was actually breaking compilation
on NetBSD when using the system libiconv (there's also a GNU iconv
package)
A C program included from C++ source broke on NetBSD specifically, work
around it.

This doesn't fix compilation on NetBSD, which is currently broken, but
is closer to correct.
2024-05-03 15:12:29 +00:00
mitaclaw
756ea81ab2 Jit64: Smaller Instruction Breakpoint Condition
Also some static_asserts in JitArm64.
2024-04-28 15:54:15 -07:00
mitaclaw
307a1e3ab8 Jit64/JitArm64: Check Breakpoints Before FPU Availability
CachedInterpreter already does it in the expected order.
2024-04-26 10:58:16 -07:00
JosJuice
e8154a529f JitArm64: Increase farcode & nearcode cache size
This is a JitArm64 version of 219610d8a0.

Due to limitations on how far you can jump with a single AArch64 branch
instruction, going above the former limit of 128 MiB of code (counting
nearcode and farcode combined) requires a bit of restructuring. With the
restructuring in place, the limit now is 256 MiB. See the new large
comment in Jit.h for a description of the new memory layout.
2024-04-22 08:31:48 +02:00
Tilka
b6f0e8876e
Merge pull request #12731 from JosJuice/jitarm64-mfcr-ubfx
JitArm64: Skip UBFX in mfcr
2024-04-21 20:56:46 +01:00
Jordan Woyak
a89336001a
Merge pull request #12733 from mitaclaw/instructionNumber
JitState: Remove Unused instructionNumber
2024-04-21 14:39:25 -05:00
Jordan Woyak
d6bcbd0115
Merge pull request #12734 from mitaclaw/assert-dyna_rec
JIT: Fix Incorrect Assert Category
2024-04-21 14:38:41 -05:00
mitaclaw
e3721bee1b JIT: Fix Incorrect Assert Category 2024-04-21 09:07:47 -07:00
mitaclaw
e7dbd298a8 JitState: Remove Unused instructionNumber 2024-04-21 08:51:29 -07:00
JosJuice
e64cdca405 JitArm64: Skip UBFX in mfcr
We can implement the same behavior in one instruction less.
2024-04-21 16:13:33 +02:00
JosJuice
3bc9008715 PPCAnalyst: Prevent discarding registers around breakpoints
Fixes https://bugs.dolphin-emu.org/issues/13526.
2024-04-21 08:50:04 +02:00
JosJuice
13e9d5c889 Jit64: Improve register handling in fp_arith
This lets us avoid the "ugly" case.
2024-04-20 17:50:54 +02:00
JosJuice
2bb59ff0dc Jit64: Inline avx_op into fp_arith
This will let us manage registers better in the next commit.
2024-04-20 17:50:54 +02:00
JosJuice
2c2e06bf39 Jit64: Add extra cases for reversible avx_op
Optimization.
2024-04-20 17:50:54 +02:00
JosJuice
bb3306701b Jit64: Flatten avx_op
Reduces indentation and places the "ugly" case last. No behavior change.
2024-04-20 17:50:54 +02:00
JosJuice
4ac52cf053 JitArm64: Minor mtfsfix optimization
BFI takes two cycles on many CPUs, whereas AND (immediate) only takes
one.
2024-04-20 16:55:29 +02:00
Tilka
017f72f43e
Merge pull request #12672 from JosJuice/jit64-extract-with-byte-offset
Jit64: Clean up ExtractWithByteOffset
2024-04-20 12:41:29 +01:00
mitaclaw
65ff0146b9 Change JitState::downcountAmount to u32 2024-04-19 04:08:34 -07:00
mitaclaw
672be6a8cf PPCSymbolDB: GetDescription by std::string_view
Should save a lot of deep copies.
2024-04-13 00:19:01 -07:00
Admiral H. Curtiss
0c1a76398b
Merge pull request #12691 from mitaclaw/jit-profiling-restoration
JitCache: Software Profiling Restoration
2024-04-13 01:35:25 +02:00
mitaclaw
3073e8fd40 CachedInterpreter: Skip Updating Instruction PERFMON When There Are None 2024-04-10 04:09:37 -07:00
mitaclaw
30c63fa4a6 Common: Remove Unused PerformanceCounter Code 2024-04-09 13:43:32 -07:00
mitaclaw
ee8bcf2ccc JitCache: Software Profiling Restoration
Rekindle software JIT profiling with a std::chrono conversion and a config connection.
2024-04-09 13:43:31 -07:00
Admiral H. Curtiss
69aca2fbfc
Merge pull request #11141 from JosJuice/jit64-soft-fma-nans-preserve
Jit64: Preserve inputs when software_fma && m_accurate_nans
2024-04-09 06:04:21 +02:00
mitaclaw
cf74c0d683 PPCCache: Avoid Global System Accessor 2024-04-08 19:49:57 -07:00
JosJuice
5e58a46361 Jit64: Preserve inputs when software_fma && m_accurate_nans
When writing the software FMA code, I didn't realize that we can't
overwrite d if d is the same register as one of the inputs and
HandleNaNs is going to be called. This fixes that.
2024-04-06 21:38:58 +02:00
JosJuice
ad43b03253 HW: Remove calls to GetPointer
Typically when someone uses GetPointer, it's because they want to read
from a range of memory. GetPointer is unsafe to use for this. While it
does check that the passed-in address is valid, it doesn't know the size
of the range that will be accessed, so it can't check that the end
address is valid. The safer alternative GetPointerForRange should be
used instead.

Note that there is still the problem of many callers not checking for
nullptr.

This is part 2 of a series of changes removing the use of GetPointer
throughout the code base. After this, VideoCommon is the one major part
of Dolphin that remains.
2024-03-31 21:58:05 +02:00
JosJuice
fb75ae410f Jit64: Clean up ExtractWithByteOffset
RCOpArg::ExtractWithByteOffset is only used in one place: a special case
of rlwinmx. ExtractWithByteOffset first stores the value of the
specified register into m_ppc_state (unless it's already there), and
then returns an offset into m_ppc_state. Our use of this function has
two undesirable properties (except in the trivial case `offset == 0`):

1. ExtractWithByteOffset calls StoreFromRegister without going through
   any of the usual functions. This violated an assumption I made when
   working on my constant propagation PR and led to a hard-to-find bug.
2. If the specified register is in a host register and is dirty,
   ExtractWithByteOffset will store its value to m_ppc_state even when
   it's unnecessary. In particular, this always happens when rlwinmx
   uses the same register as input and output, since rlwinmx always
   allocates a host register for the output and marks it as dirty.

Since ExtractWithByteOffset is only used in one place, I figure we might
as well inline it there. This commit does that, and also alters
rlwinmx's logic so the special case code is only triggered when the
input is already in m_ppc_state.

Input in `m_ppc_state`, before (11 bytes):

mov         esi, dword ptr [rbp-104]
mov         dword ptr [rbp-104], esi
movzx       esi, byte ptr [rbp-101]

Input in `m_ppc_state`, after (5 bytes):

movzx       esi, byte ptr [rbp-101]

Input in host register, before (8 bytes):

mov         dword ptr [rbp-104], esi
movzx       esi, byte ptr [rbp-101]

Input in host register, after (3 bytes):

shr         edi, 0x18
2024-03-30 22:47:44 +01:00
JosJuice
f30d3c9092
Merge pull request #12662 from JosJuice/jitarm64-imm-rc0-sxtw
JitArm64: Skip SXTW in ComputeRC0(u64)
2024-03-29 15:36:33 +01:00
JosJuice
5f6a054ffc
Merge pull request #12661 from Sintendo/arm64divwux
JitArm64: Optimize divwux
2024-03-29 15:36:18 +01:00
Bram Speeckaert
2580837c60 JitArm64: Optimize divwux
When the divisor is a constant value, we can emit more efficient code.
For powers of two, we can use bit shifts. For other values, we can
instead use a multiplication by magic constant method.

- Example 1 - Division by 16 (power of two)
Before:
mov    w24, #0x10                ; =16
udiv   w27, w25, w24

After:
lsr    w27, w25, #4

- Example 2 - Division by 10 (fast)
Before:
mov    w25, #0xa                 ; =10
udiv   w27, w26, w25

After:
mov    w27, #0xcccd              ; =52429
movk   w27, #0xcccc, lsl #16
umull  x27, w26, w27
lsr    x27, x27, #35

- Example 3 - Division by 127 (slow)
Before:
mov    w26, #0x7f                ; =127
udiv   w27, w27, w26

After:
mov    w26, #0x408               ; =1032
movk   w26, #0x8102, lsl #16
umaddl x27, w27, w26, x26
lsr    x27, x27, #38
2024-03-23 20:13:15 +01:00
Bram Speeckaert
749ee2ff5e Jit64: Refactor divwux
Now that we've moved the logic to DivUtils, refactor the Jit64 code to
use it.
2024-03-23 20:13:15 +01:00
Bram Speeckaert
825a10616c DivUtils: Add unsigned division magic function
Takes the logic from Jit64 and moves it into DivUtils, so it can be
reused by other backends as well.
2024-03-23 20:13:15 +01:00