Commit Graph

523 Commits

Author SHA1 Message Date
comex
a9b4016cd3 Merge pull request #1166 from FioraAeterna/flaglocking
JIT+Emitter: support locking flags
2014-09-30 02:57:53 -04:00
comex
2eebdff01b Remove useless STACKALIGN macro.
It only ever did anything on 32-bit OS X.

Anyway, it wasn't even on the right functions, and these days
ABI_PushRegistersAndAdjustStack should handle maintaining the ABI
correctly.
2014-09-30 01:42:47 -04:00
skidau
f675b33640 Merge pull request #1164 from FioraAeterna/bpcarry
JIT: fix carry merging across breakpoints
2014-09-30 13:25:24 +10:00
skidau
9d9984e96f Merge pull request #1159 from FioraAeterna/blocklinkdebug
JIT: enable block linking and idle skipping in debug mode
2014-09-30 13:24:16 +10:00
skidau
7828ddd542 Merge pull request #1150 from FioraAeterna/extsmerge
JIT: merge lbz + extsb
2014-09-30 13:19:45 +10:00
comex
4c031bed4b Merge pull request #1179 from lioncash/casts
Jit_Integer: Get rid of some cast noise in boolX
2014-09-28 23:58:09 -04:00
skidau
c7f3858379 Merge pull request #1138 from FioraAeterna/arithetweak
JIT: a small optimization for subfex and friends
2014-09-29 13:51:44 +10:00
Lioncash
7e825fdca5 Jit_Integer: Get rid of some cast noise in boolX 2014-09-28 13:28:16 -04:00
skidau
6bea53ab11 Clean-up the leftover dspARAMAddresses code that was no longer needed. 2014-09-28 15:38:35 +10:00
skidau
afccf2276d Merge pull request #1012 from skidau/aram-dma-exceptions
Compile the ARAM DMA exception checks into the JIT block
2014-09-28 14:48:38 +10:00
Fiora
3878187721 Interpreter: remove debug printf in psq_l 2014-09-27 20:44:45 -07:00
skidau
7184019090 Increased the savestate internal version.
Added a small note for instant dma.
2014-09-28 11:51:14 +10:00
skidau
86b6dfe4b3 Added a instant ARAM DMA mode which is enabled automatically when required.
Detects a situation where the game is writing to the dcache at the address being DMA'd. As we do not have dcache emulation, invalid data is being DMA'd causing audio glitches. The following code detects this and enables the DMA to complete instantly before the invalid data is written.
Added accurate ARAM DMA transfer timing.
Removed the addition of DSP exception checking.
2014-09-27 20:47:29 +10:00
skidau
4b37fdfa45 Added a CompileExceptionCheck function to the JitInterface and re-routed the existing code to utilise the interface. 2014-09-27 20:16:26 +10:00
skidau
945d431171 Added OPTYPE_LOADPS and OPTYPE_STOREPS instruction types to the PPC table.
Updated ARAM DMA and FIFO write exception checking to uses these types.

Conflicts:
	Source/Core/Core/PowerPC/Interpreter/Interpreter_Tables.cpp
	Source/Core/Core/PowerPC/PPCTables.h
2014-09-27 20:16:26 +10:00
skidau
d09e2abb0d Compile the ARAM DMA exception checks into the JIT block in a similar style to FIFO writes. This ensures that the ARAM DMA is handled soon after the DMA completes. Fixes issue 7122 and issue 7342. 2014-09-27 20:16:25 +10:00
Fiora
ac1fc9ad03 JIT+Emitter: support locking flags
This helps us avoid accidentally clobbering flags between two instructions
when the flags are expected to be maintained. Dolphin will of course crash
immediately, but at least it will crash loudly and alert us of the mistake,
instead of forcing hours of bisecting to find the subtle way in which the JIT
has managed to sneak a flag-modifying instruction where there shouldn't be one.
2014-09-26 20:47:06 -07:00
Fiora
39d4306a2e JIT: fix carry merging across breakpoints
More precisely, don't do it.
2014-09-26 13:21:01 -07:00
Fiora
ba39c35f24 JIT: fix branch merging, take 2
NOT doesn't set flags.
2014-09-25 22:33:40 -07:00
skidau
30d77b38c5 Merge pull request #1127 from Sonicadvance1/QGR-BitField
Change the QGR union over to a BitField union.
2014-09-26 14:53:24 +10:00
skidau
9d746b89a2 Merge pull request #1162 from FioraAeterna/fixmerges
JIT: fix bugs with ComputeRC in branch merging patch
2014-09-26 14:46:53 +10:00
Fiora
f9ab25152c JIT: fix bugs with ComputeRC in branch merging patch
We really, really need to be sure the input to ComputeRC is a register.
2014-09-25 21:45:25 -07:00
skidau
146725f64a Merge pull request #1125 from Sintendo/fresjumps
Change fres/frsqrte jumps
2014-09-26 14:45:19 +10:00
comex
9cdd842080 Add a fake SContext definition for _M_GENERIC. 2014-09-25 18:47:34 -04:00
Fiora
23fbcecf13 JIT: enable block linking and idle skipping in debug mode
They can still be turned off, just don't force them off.
Also remove some dated comments.
2014-09-25 07:12:10 -07:00
comex
8dccb0c743 Fix fastmem in JitIL after 755bd2c4.
That commit reorganized fastmem a bit; I wrote it before the patch to
support fastmem in JitIL landed, and forgot to edit it to account for
the fact.  Since JitILBase now derives from Jitx86Base, the HandleFault
override can just be removed.
2014-09-25 01:15:58 -04:00
Sintendo
29cca5c84f Change fres/frsqrte jumps 2014-09-24 21:58:01 +02:00
Fiora
bfab5f1e91 JIT: generic branch merging
Why merge just cmps and rlwinm when we can merge ALL the branches?
2014-09-24 12:34:18 -07:00
Ryan Houdek
76697922b4 Implement XER optimization on ARMv7 JIT core
Not completely optimized; there's room for improvement here.
2014-09-24 12:27:54 -07:00
Fiora
5fce109ce1 Reorganize carry to store flags separately instead of part of XER
Also correct behavior with regards to which bits in XER are treated as zero
based on a hwtest (probably doesn't affect any real games, but might as well
be correct).
2014-09-24 12:27:47 -07:00
skidau
788a719718 Merge pull request #1153 from skidau/twx-bindtoreg
Replaced KillImmediate with BindToRegister in the tw instruction.
2014-09-24 13:31:44 +10:00
skidau
a83792e914 Merge pull request #1074 from FioraAeterna/earlyflush
JIT: flush a register if it won't be used for the rest of the block
2014-09-24 13:30:02 +10:00
skidau
65eb0ff2fe Replaced KillImmediate with BindToRegister in the tw instruction. Fixes the error "WriteNormalOp - a1 and a2 cannot both be memory" which appeared on starting Monopoly Streets. 2014-09-23 18:00:41 +10:00
skidau
cbf102794e Merge pull request #1130 from Sonicadvance1/AArch64-jit-extXx
[AArch64] Implement instructions.
2014-09-23 13:52:30 +10:00
skidau
fb18d5376f Merge pull request #1142 from lioncash/linucks
Fix some warnings on Linux
2014-09-23 13:43:18 +10:00
Fiora
88f2fbe1a4 JIT: fix merged bclr with comex's BLR optimizations 2014-09-22 18:22:31 -07:00
Fiora
f103234e2b JIT: flush a register if it won't be used for the rest of the block
This should dramatically reduce code size in the case of blocks with
lots of branches, and certainly doesn't hurt elsewhere either.

This can probably be improved a good bit through smarter tracking of register
usage, e.g. discarding registers that are going to be overwritten, but this
is a good start and should help reduce code size and register pressure.
Unlike that sort of change, this is a "safe" patch; it only flushes registers,
which can't affect correctness, unlike actually discarding data.

As part of this, refactor PPCAnalyst to support distinguishing between
float and integer registers (to properly handle instructions that access
both, like floating-point loads and stores).

Also update every instruction in the interpreter flags table I could find
that didn't have all the correct flags.
2014-09-22 16:00:25 -07:00
Fiora
de86d2003a JIT: merge lbz + extsb
PPC has no 8-bit sign-extended load, so this instruction pair is very common.
x86 can do it in one op (movsx), so merge them when possible.
2014-09-22 15:41:54 -07:00
Lioncash
836ff6d506 Fix some warnings on Linux 2014-09-21 20:13:22 -04:00
Lioncash
dc79755303 Android: Silence a few warnings 2014-09-21 19:51:27 -04:00
Ryan Houdek
1cb07ffc14 [AArch64] Implement twi and tw. 2014-09-21 14:17:04 -05:00
Fiora
505b1bd562 JIT: a small optimization for subfex and friends 2014-09-21 12:16:26 -07:00
Ryan Houdek
078147d424 [AArch64] Implement mfmsr 2014-09-21 07:38:21 -05:00
Ryan Houdek
9530800fd0 [AArch64] Implement mtsprin and mfsprin 2014-09-21 07:38:16 -05:00
Ryan Houdek
2bcea19492 [AArch64] Implement mtsr and mfsr 2014-09-21 07:36:14 -05:00
Ryan Houdek
0f8c5bda40 [AArch64] Implement mcrf. 2014-09-20 21:19:25 -05:00
Ryan Houdek
e708e8d5a0 [AArch64] Implement negx. 2014-09-20 16:17:16 -05:00
Ryan Houdek
75590a99cb [AArch64] Implement cntlzwx. 2014-09-20 14:52:56 -05:00
Ryan Houdek
76d2f331f0 [AArch64] Implement extshx and extsbx. 2014-09-20 14:46:53 -05:00
Ryan Houdek
9d7598266f Change the QGR union over to a BitField union.
Makes it easier to generate a QGR in my unit test, cleaner overall of course.
2014-09-20 13:15:44 -05:00