Commit Graph

165 Commits

Author SHA1 Message Date
JosJuice
05864ceddd PPCAnalyst: Clear crInUse on HLE
This should have been done when rebasing 6cc4f593e5 after the merge of
3a00ff625e. There are no correctness implications as far as I know,
only very minor performance implications.
2023-12-03 14:20:45 +01:00
JosJuice
bddcf60673 PPCAnalyst: Don't discard CR before gather pipe interrupt check
This fixes a frequently occurring JitArm64 assert caused by merging
6cc4f593e5 without adapting it to the changes made in 5902b5b113.
2023-11-29 21:53:13 +01:00
JosJuice
80171adf1e PPCTables: Retire FL_EVIL
FL_EVIL is only used for blocking instructions from being reordered.
There are three types of instructions which have FL_EVIL set:

1. CR operations. The previous commits improved our CR analysis
   and removed FL_EVIL from these instructions.
2. Load/store operations. These are always blocked from reordering
   due to always having canCauseException set.
3. isync. I don't know if we actually need to prevent reordering
   around this one, since as far as I know we only do reorderings
   that are guaranteed to not change the behavior of the program.
   But just in case, I've renamed FL_EVIL to FL_NO_REORDER instead of
   removing it entirely, so that it can be used for this instruction.
2023-11-28 18:59:34 +01:00
JosJuice
f494a3d9e8 PPCAnalyst: Remove CanSwapAdjacentOps's OPCD check
Other than the CR instructions, which we now analyze properly,
all the covered instructions are not integer operations and also
have either FL_ENDBLOCK or FL_EVIL set, so there are two other
checks in CanSwapAdjacentOps that will reject them.
2023-11-28 18:59:34 +01:00
JosJuice
96d622bb61 PPCAnalyst: Run cror reordering after cmp reordering
We would rather have cror be close to the cmp than the branch.
2023-11-28 18:59:34 +01:00
JosJuice
40e0dd93be PPCAnalyst: Allow more reordering of CR operations
This is possible with the improved CR analysis implemented
in the previous commits.
2023-11-28 18:59:34 +01:00
JosJuice
da63cee711 PPCAnalyst: More strict a_flags checks in CanSwapAdjacentOps
If for instance instruction a sets OE and instruction b
reads it, we shouldn't permit reordering.
2023-11-28 18:59:34 +01:00
JosJuice
6cc4f593e5 PPCAnalyst: Add in-register/discard analysis for CR
This brings the analysis done for condition registers
more in line with the analysis done for GPRs and FPRs.

This gets rid of the old wantsCR member, which wasn't actually
used anyway. In case someone wants it again in the future, they
can compute the bitwise inverse of crDiscardable.
2023-11-28 18:58:47 +01:00
JosJuice
d6987b98be PPCAnalyst: Perform CR analysis for crXXX 2023-11-28 18:51:03 +01:00
Tilka
ac4da97159
Merge pull request #12075 from JosJuice/gpr-block-inputs
PPCAnalyst: Fix gprBlockInputs calculation
2023-11-28 09:23:23 +00:00
JosJuice
3a00ff625e PPCAnalyst: Don't discard registers across HLE'd functions
Not sure if this was causing correctness issues – it depends on whether
the HLE code was actually reading the discarded registers – but it was
at least causing annoying assert messages in one piece of homebrew.
2023-11-27 21:40:42 +01:00
JosJuice
5902b5b113 PPCAnalyst: Don't discard before gather pipe interrupt check
This bug has been lurking in the code ever since I added the discard
functionality. It doesn't seem to be triggered all that often,
and on top of that the emitted code only runs conditionally, so I'm not
sure if people have been affected by this bug in practice or not.
2023-09-10 12:54:52 +02:00
JosJuice
f3ad246fff PPCAnalyst: Simplify gprBlockInputs calculation
No need for the gprDefined variable.
2023-07-27 23:10:59 +02:00
JosJuice
8c2d73e8c2 PPCAnalyst: Fix gprBlockInputs calculation
This analysis needs to scan backwards, not forwards.
2023-07-27 23:09:46 +02:00
JosJuice
061ec365a8 PPCAnalyst: Reduce number of iterations in ReorderInstructionsCore
We can utilize the fact that if swapping two instructions causes another
swap to become possible, that swap involves one of the two instructions
we just swapped. There's need to search for new swap opportunities as
far back as the beginning of the block; we can just go one step back.
2023-06-09 19:45:51 +02:00
Admiral H. Curtiss
23843583bf
PowerPC: Refactor to class, move to System. 2023-04-09 21:48:37 +02:00
Admiral H. Curtiss
e5941428d1
PowerPC/PPCTables: Pass instruction address to GetOpInfo(). 2023-04-05 20:09:32 +02:00
Admiral H. Curtiss
8dabd1a025
PowerPC/MMU: Refactor to class, move to System. 2023-03-28 03:47:51 +02:00
Pokechu22
164ea57790 Split PPCTables from Interpreter_Tables
This also allows use of constexpr in both places. Some additional work was needed in PPCTables due to mutable data associated with each opcode.
2023-03-16 18:36:25 -07:00
Admiral H. Curtiss
3458c58c7d
Merge pull request #11503 from JosJuice/ppcanalyst-read-cr
PPCAnalyst: Actually check if instructions want CR
2023-02-14 00:55:24 +01:00
JosJuice
7cecb28bdf DolphinQt: Properly lock CPU before accessing emulated memory
This fixes a problem I was having where using frame advance with the
debugger open would frequently cause panic alerts about invalid addresses
due to the CPU thread changing MSR.DR while the host thread was trying
to access memory.

To aid in tracking down all the places where we weren't properly locking
the CPU, I've created a new type (in Core.h) that you have to pass as a
reference or pointer to functions that require running as the CPU thread.
2023-02-12 11:27:50 +01:00
JosJuice
e27339039c PPCAnalyst: Actually check if instructions want CR 2023-01-28 20:16:17 +01:00
JosJuice
9d2c4aa325 PPCAnalyst: Use bitsets for CR analysis
Currently we're only performing CR analysis for CR0 and CR1, but I
would like to do it for all CRs. Bitsets are appropriate for this.
2023-01-28 20:16:16 +01:00
Admiral H. Curtiss
a5217c07b8
PPCAnalyst: Remove unused variables and methods in BlockRegStats. 2022-10-08 03:26:42 +02:00
Minty-Meeo
8fec3224fc Index SymbolDB when generated from address
Otherwise every function will be the same color in the code view widget.
2022-05-03 21:20:00 -05:00
JosJuice
20b2300ce1 PPCAnalyst: Count outputs as being in use
In a code block where a guest register is accessed at least twice and the
last access is a write and the register is not discardable immediately
after the second-to-last instruction (perhaps there is an instruction
in between that can cause an exception), currently Dolphin's JITs will
flush the register after the second-to-last instruction.

It would be better if we replaced the flush after the second-to-last
instruction with a flush that only happens if the exception path is
taken. This change accomplishes that by marking guest registers as
"in use" not just when they are used as inputs but also when they are
used as outputs, preventing the loop in DoJit from flushing the
register until after the last access.
2022-02-14 22:09:21 +01:00
JosJuice
e5ef597642
Merge pull request #10172 from JosJuice/reorder-exception
PPCAnalyst: Less strict interrupt checks in CanSwapAdjacentOps
2022-01-09 19:41:16 +01:00
Admiral H. Curtiss
e08171fa24
Config: Port remaining Core settings to new config system (partial). 2022-01-05 00:54:15 +01:00
JosJuice
ab8b2f9fe0 PPCAnalyst: Less strict interrupt checks in CanSwapAdjacentOps
When these checks were originally added, we didn't have the nice
canCauseException attribute. Now we do, so let's use it.
2022-01-01 20:25:04 +01:00
Léo Lam
dc7ea16705
Merge pull request #10284 from JosJuice/no-blr-cr
PPCAnalyst: Don't treat blr as writing to CR
2022-01-01 17:39:59 +01:00
Admiral H. Curtiss
b3a3ecd2b4
PPCAnalyzer: Most member functions can be const. 2021-12-31 17:46:45 +01:00
Admiral H. Curtiss
d6331c1e71
Config: Port remaining Interface settings to new config system. 2021-12-31 17:40:04 +01:00
JosJuice
b6395a7c49 PPCAnalyst: Don't treat blr as writing to CR
This piece of code is rather hard to understand, but my best guess
at what it's trying to do is that it tries to create opportunities
to skip writing CRs back to ppcState if we know that there are no
CR instructions (or branch instructions, etc) between an instruction
that writes to a CR register and the next blr. This is technically
inaccurate emulation, but as long as games don't do anything too
weird with their ABIs, I suppose it doesn't break anything.

So why do I want to get rid of it? Well, other than breaking some
hypothetical weird game, I imagine it could trip up people trying
to debug a game who are looking at the CR contents. And the code
is just plain confusing. (blr clearly doesn't write to CRs!)
2021-12-21 21:29:55 +01:00
JosJuice
9f525d69c8 Jit: Raise program exception on floating point exceptions
This is done entirely through interpreter fallbacks. It would
probably be possible to implement this using host exception
handlers instead, but I think it would be a lot of complexity
for a rarely used feature, so let's not do it for now.

For performance reasons, there are two settings for this feature:
One setting which does enables just what True Crime: New York City
needs and one setting which enables it all. The latter makes
almost all float instructions fall back to the interpreter.
2021-10-13 17:42:56 +02:00
Pierre Bourdon
e149ad4f0a
treewide: convert GPLv2+ license info to SPDX tags
SPDX standardizes how source code conveys its copyright and licensing
information. See https://spdx.github.io/spdx-spec/1-rationale/ . SPDX
tags are adopted in many large projects, including things like the Linux
kernel.
2021-07-05 04:35:56 +02:00
JosJuice
66e912a252 PPCAnalyst: Treat frspx output as single 2021-05-15 23:27:33 +02:00
JosJuice
77afb0f4c3 PPCAnalyst: Apply "bitexact" analysis to fprIsSingle
This lets us set fprIsSingle to true in more cases.
2021-05-15 23:27:33 +02:00
JosJuice
b980797a16 PPCAnalyst: Fix broken bitexact analysis
`code` points to the first instruction in the block, not the
current instruction.
2021-05-15 18:19:04 +02:00
JosJuice
2a9d88739c JitArm64: Skip accurate single/double conversion if store-safe 2021-04-25 15:56:58 +02:00
JosJuice
b3b5016f54 Jits: Fix interpreter fallback handling of discarded registers
When the interpreter writes to a discarded register, its type
must be changed so that it is no longer considered discarded.

Fixes a 62ce1c7 regression.
2021-04-25 13:01:40 +02:00
JosJuice
62ce1c7653 Jits: Discard registers which we know will be overwritten
This commit adds a new "discarded" state for registers.
Discarding a register is like flushing it, but without
actually writing its value back to memory. We can discard
a register only when it is guaranteed that no instruction
will read from the register before it is next written to.

Discarding reduces the register pressure a little, and can
also let us skip a few flushes on interpreter fallbacks.
2021-03-24 20:48:44 +01:00
JosJuice
901170e299 PPCTables: Use u64 for instruction flags
We've run out of space :(
2021-03-24 20:48:36 +01:00
JosJuice
1845c5948d PPCAnalyst: Rework the store-safe logic
The output of instructions like fabsx and ps_sel is store-safe
if and only if the relevant inputs are. The old code was always
marking the output as store-safe if the output was a single,
and never otherwise.

Also, the old code was treating the output of psq_l/psq_lu as
store-safe, which seems incorrect (if dequantization is disabled).
2021-03-24 12:02:09 +01:00
Lioncash
ef75e9acd8 Core: Convert logging over to fmt pt.5
Converts the remaining PowerPC code over to fmt-capable logging.

Now, all that's left to convert over are the lingering remnants within
the frontend code.
2020-11-25 13:23:48 -05:00
Lioncash
febd1c3dba Core: Replace usages of StringFromFormat with fmt where applicable
Migrates usages of StringFromFormat over to using fmt.
2019-11-11 07:32:57 -05:00
Techjar
ff972e3673 Reformat repo to clang-format 7.0 rules 2019-05-06 18:48:04 +00:00
degasus
b8b4b4a383 PowerPC: More idle loop detections. 2019-04-20 20:52:39 +02:00
degasus
55db7c7a05 Jit64: Optimized idle skipping detection. 2019-04-20 20:52:39 +02:00
degasus
5333c17cca Jit: Fix branch following.
The idea of this code was to not unroll loops, but it was completely broken.
So we've unrolled all loops, but only up to the second iteration.
Honestly, a better check would test if we branch to code which is already in the compiling block. But this is out of scope for now.

But testing shows that this unrolling actually improve the performance. So instead of fixing this bug, this check can be dropped.
2018-07-28 16:35:42 +02:00
spycrab
df61e527da Core/PowerPC: Add option to disable branch following 2018-07-09 22:58:40 +02:00