Commit Graph

2186 Commits

Author SHA1 Message Date
booto
27cb407ecf PowerPC: Add Broadway's PVR (retail Wii) 2019-05-23 19:56:41 -04:00
Connor McLaughlin
68877c52d1
Merge pull request #8027 from MerryMage/MOVAPS
Jit64: Prefer MOVAPS where possible
2019-05-22 15:05:17 +10:00
Techjar
ff972e3673 Reformat repo to clang-format 7.0 rules 2019-05-06 18:48:04 +00:00
Léo Lam
ab9ece9bca Replace MathUtil::Clamp with std::clamp 2019-05-04 23:12:17 +02:00
Léo Lam
6f84984b7b Use attribute [[fallthrough]] 2019-05-04 23:04:18 +02:00
Léo Lam
99a4ca8de7
Merge pull request #7839 from ShFil119/impr/redundant
Remove redundant initialization
2019-05-04 22:50:51 +02:00
booto
2ff0486335 Debugger/Memory: Add support for address spaces
Different address spaces can be chosen in the memory view panel.
 * Effective (or virtual): Probably the view people mostly want. Address
   translation goes through MMU.
 * Auxiliary: ARAM address space. Does not display anything in Wii mode.
 * Physical: Physical address space. Only supports mem1 and mem2 (wii
   mode) so far.
2019-05-02 21:14:30 -04:00
Léo Lam
f4d7b537cc
Merge pull request #7958 from Craftyawesome/cpu-emulation-order
Re-order cpu emulation options from fastest to slowest
2019-05-01 17:56:19 +02:00
Filip Gawin
c110ffcdaa Remove redundant initialization 2019-04-30 01:22:24 +02:00
MerryMage
e06111e86f EmuCodeBlock: Prefer MOVAPS to MOVSD in ConvertDoubleToSingle
* The high half of the register is immediately masked so the value in it is irrelevant.
* MOVSD produces an unnecessary dependency on the high half of regOp.
* MOVAPS is implemented as a register rename on modern microarchitectures.
2019-04-27 12:57:03 +01:00
Scott Mansell
033f1d725f Fix un-initialized powerpc.xer_* variables 2019-04-27 15:38:02 +12:00
degasus
6ec4ade3b6 Interpreter: Drop idle skipping in interpreter.
And reimplement it in the cached interpreter based on the idle loop detection.
2019-04-20 20:52:39 +02:00
degasus
55abe1a085 Jit64: Refactor WriteIdleExit helper. 2019-04-20 20:52:39 +02:00
degasus
b8b4b4a383 PowerPC: More idle loop detections. 2019-04-20 20:52:39 +02:00
degasus
55db7c7a05 Jit64: Optimized idle skipping detection. 2019-04-20 20:52:39 +02:00
Markus Wick
f1620f25f4
Merge pull request #7981 from degasus/interpreter_psq_l
Interpreter: Fix psq_l with QUANTIZE_FLOAT.
2019-04-16 22:27:07 +02:00
Markus Wick
dbfdb16fbb
Merge pull request #7990 from MerryMage/fprf
EmuCodeBlock: Correct zero handling in SetFPRF for SSE4.1
2019-04-16 22:13:05 +02:00
MerryMage
e4d83a56a5 EmuCodeBlock: Correct zero handling in SetFPRF for SSE4.1 2019-04-12 20:03:42 +01:00
degasus
399768c91b Interpreter: Fix psq_l with QUANTIZE_FLOAT.
psq_l with QUANTIZE_FLOAT does not use the FPU, so it does not trim the precision of the u32 input data.
We already have the helper ConvertToDouble for floating point u32->u64 convertion used in lfs, so let's use it here as well.
2019-04-11 10:12:59 +02:00
Markus Wick
849ede9d0a
Merge pull request #7639 from CrystalGamma/pr-quantize
PowerPC: Thread state through PS (de)quantize helpers
2019-04-11 10:11:08 +02:00
CrystalGamma
e5c8b889ef PowerPC: Thread state through PS quantize helper 2019-04-11 10:03:36 +02:00
CrystalGamma
e12cdbefa5 PowerPC: Thread state through PS dequantize helper 2019-04-11 10:03:36 +02:00
Markus Wick
d90d641ec7
Merge pull request #7889 from CrystalGamma/pr-floathelpers
PowerPC: Thread state through float helpers
2019-04-10 23:14:39 +02:00
Craftyawesome
20cc4508f0 Re-order cpu emulation options from fastest to slowest
Based on https://bugs.dolphin-emu.org/issues/11658

Update arrays.xml
2019-04-04 10:51:12 -04:00
CrystalGamma
b00a7045aa PowerPC: Thread state through float helpers 2019-04-02 19:59:29 +02:00
CrystalGamma
95b06d183e PowerPC: Thread state through the address helpers 2019-04-02 19:52:59 +02:00
CrystalGamma
e3075f3834 PowerPC: Factor out CR helpers into POD class 2019-03-08 20:42:09 +01:00
Mat M
2d379446b5
Merge pull request #7642 from MerryMage/fprf-whole
EmuCodeBlock: Fix bug in SetFPRF: Should only consider lower double
2018-12-28 06:37:43 -05:00
Mat M
b7db1f020b
Merge pull request #7624 from lioncash/paired-single
PowerPC: Remove separate macros for paired singles
2018-12-28 06:32:45 -05:00
Mat M
8c9f553734
Merge pull request #7620 from lioncash/paired
Interpreter: Handle HID2.PSE and HID2.LSQE bits
2018-12-28 06:30:37 -05:00
MerryMage
77e9aa48bc Jit64: Remove Jitx86Base class 2018-12-28 09:15:26 +00:00
Tilka
bfb9b1aca5
Merge pull request #7602 from CrystalGamma/stop-g_jit
stop using g_jit outside of JitInterface
2018-12-27 23:12:14 +01:00
MerryMage
26bc38d25d Jit64: Fix instruction breakpoints
Broken by 5236dc3.
2018-12-27 20:11:26 +00:00
Lioncash
244d083f0e PowerPC: Remove separate macros for paired singles
Previously, PowerPC.h had four macros in it like so:

\#define rPS0(i) (*(double*)(&PowerPC::ppcState.ps[i][0]))
\#define rPS1(i) (*(double*)(&PowerPC::ppcState.ps[i][1]))

\#define riPS0(i) (*(u64*)(&PowerPC::ppcState.ps[i][0]))
\#define riPS1(i) (*(u64*)(&PowerPC::ppcState.ps[i][1]))

Casting between object representations like this is undefined behavior.
Given this is used heavily with the interpreter (that is, the most
accurate, but slowest CPU backend), we don't exactly want to allow
undefined behavior to creep into it.

Instead, this adds a helper struct for operating with the paired singles,
and replaces the four macros with a single macro for accessing the
paired-singles/floating-point registers.

This way, it's left up to the caller to explicitly decide how it wants to interpret
the data (and makes it more obvious where different interpretations of
the same data are occurring at, as there'll be a call to one of the
[x]AsDouble() functions).
2018-12-25 10:35:09 -05:00
MerryMage
0deed2a5af EmuCodeBlock: Fix bug in SetFPRF: Should only consider lower double 2018-12-24 19:02:43 +00:00
Markus Wick
e7b53540d8
Merge pull request #7634 from MerryMage/downcount-on-exit
Jit64: Check downcount at block exit, not block entry
2018-12-23 19:34:12 +01:00
MerryMage
5236dc31a6 Jit64: Check downcount at block exit, not block entry 2018-12-23 18:03:29 +00:00
Markus Wick
54f37c3bae
Merge pull request #7631 from MerryMage/crXXX-AeqB
Jit_SystemRegisters: Special-case crXXX for CRBA == CRBB
2018-12-23 17:55:09 +01:00
degasus
64378c90da JitArm64: Fix RC calculation of srawix.
Seems like it was missed from the early implementation.
2018-12-22 17:31:14 +01:00
MerryMage
174d2b0230 crXXX: Avoid loading twice when CRBA == CRBB 2018-12-21 11:33:18 +00:00
MerryMage
07c146e7e2 crXXX: Remove unnecessary CRBA == CRBD constraint for crclr and crset 2018-12-21 11:20:06 +00:00
CrystalGamma
2f490e44fb stop using g_jit outside of JitInterface
Replace g_jit in x86-64 ASM routines code by m_jit member reference
2018-12-15 01:58:58 +01:00
Lioncash
52cae18b01 Interpreter: Handle paired-single HID2.PSE and HID2.LSQE bits
These bits enable or disable paired-single execution based on how
they're set. If PSE isn't set, then all paired-single instructions are
illegal. If PSE is set, but LSQE isn't set, then psq_l, psq_lu, psq_st
and psq_stu are illegal to execute.

Also thanks go out to my roommate @Veegie for letting me use his Wii as
a blasting ground for tests, since mine isn't on hand right now. It only
caught on fire twice and only burned down half of the house through the
process; what a team player.
2018-12-13 22:48:05 -05:00
Lioncash
c87a2f57b4 Interpreter_SystemRegisters: Handle reserved/read-only bits for HID2 in mtspr 2018-12-13 11:39:40 -05:00
Pierre Bourdon
ef562ec2f1 Analytics: add simple framework for game quirks reporting
And use it for reporting games that rely on ICache emulation to some
degree. We know of a few but it would be interesting to get a more
exhaustive list from crowdsourcing.
2018-11-15 03:32:49 +01:00
MerryMage
df08a77812 Jit_LoadStore: Ra needs to be ReadWrite when writeback is required
This was an erronous change in 534db3b, Ra was previously loaded but was changed to not being loaded.
Why is loading necessary? Loading is necessary because when a memory exception occurs, the current
register values are flushed. This occurs before a new value is loaded into Ra, so the previous value
is required in Ra.
2018-11-10 10:57:15 +00:00
MerryMage
342067abfa JitRegCache: Remove old interface 2018-10-28 17:57:46 +00:00
MerryMage
08c41090b2 JitRegCache: Add RegistersInUse 2018-10-28 17:57:46 +00:00
MerryMage
096392f295 JitRegCache: Add PreloadRegisters function 2018-10-28 17:57:46 +00:00
MerryMage
e699b6b283 Jit: Remove OpArg variant of ComputeRC 2018-10-28 17:57:46 +00:00