mirror of
https://github.com/devkitPro/buildscripts.git
synced 2026-03-22 01:54:32 -05:00
*** empty log message ***
This commit is contained in:
Dave Murphy
parent
9710813c84
commit
ea30b6c3a7
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@ -12,7 +12,7 @@ NEWLIB_VER=1.14.0
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LIBOGC_VER=20050812
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LIBGBA_VER=20060410
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LIBNDS_VER=20060410
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ELF2FLT_VER=20060412
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ELF2FLT_VER=20060506
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BINUTILS="binutils-$BINUTILS_VER.tar.bz2"
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GCC_CORE="gcc-core-$GCC_VER.tar.bz2"
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@ -1,6 +1,6 @@
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diff -Naurb gcc-4.1.0-20060219/gcc/c-incpath.c gcc-4.1.0-20060219-arm/gcc/c-incpath.c
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--- gcc-4.1.0-20060219/gcc/c-incpath.c Sat Jun 25 03:02:01 2005
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+++ gcc-4.1.0-20060219-arm/gcc/c-incpath.c Mon Feb 20 13:44:13 2006
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diff -Naurb gcc-4.1.0/gcc/c-incpath.c gcc-4.1.0-arm/gcc/c-incpath.c
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--- gcc-4.1.0/gcc/c-incpath.c Sat Jun 25 03:02:01 2005
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+++ gcc-4.1.0-arm/gcc/c-incpath.c Wed Apr 12 16:00:30 2006
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@@ -331,13 +331,18 @@
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cpp_dir *p;
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@ -27,9 +27,9 @@ diff -Naurb gcc-4.1.0-20060219/gcc/c-incpath.c gcc-4.1.0-20060219-arm/gcc/c-incp
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#endif
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p = xmalloc (sizeof (cpp_dir));
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diff -Naurb gcc-4.1.0-20060219/gcc/config/arm/t-arm-elf gcc-4.1.0-20060219-arm/gcc/config/arm/t-arm-elf
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--- gcc-4.1.0-20060219/gcc/config/arm/t-arm-elf Wed Sep 1 12:14:21 2004
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+++ gcc-4.1.0-20060219-arm/gcc/config/arm/t-arm-elf Mon Feb 20 13:44:13 2006
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diff -Naurb gcc-4.1.0/gcc/config/arm/t-arm-elf gcc-4.1.0-arm/gcc/config/arm/t-arm-elf
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--- gcc-4.1.0/gcc/config/arm/t-arm-elf Wed Sep 1 12:14:21 2004
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+++ gcc-4.1.0-arm/gcc/config/arm/t-arm-elf Wed Apr 12 16:00:30 2006
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@@ -23,8 +23,8 @@
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# MULTILIB_DIRNAMES += fpu soft
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# MULTILIB_EXCEPTIONS += *mthumb/*mhard-float*
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@ -41,9 +41,85 @@ diff -Naurb gcc-4.1.0-20060219/gcc/config/arm/t-arm-elf gcc-4.1.0-20060219-arm/g
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#
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# MULTILIB_OPTIONS += fno-leading-underscore/fleading-underscore
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# MULTILIB_DIRNAMES += elf under
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diff -Naurb gcc-4.1.0-20060219/gcc/version.c gcc-4.1.0-20060219-arm/gcc/version.c
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--- gcc-4.1.0-20060219/gcc/version.c Wed Mar 16 06:04:10 2005
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+++ gcc-4.1.0-20060219-arm/gcc/version.c Mon Feb 20 13:47:44 2006
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diff -Naurb gcc-4.1.0/gcc/gcc.c gcc-4.1.0-arm/gcc/gcc.c
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--- gcc-4.1.0/gcc/gcc.c Sat Jan 21 18:29:08 2006
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+++ gcc-4.1.0-arm/gcc/gcc.c Fri May 5 10:18:31 2006
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@@ -3250,8 +3250,6 @@
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gcc_libexec_prefix = make_relative_prefix (argv[0],
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standard_bindir_prefix,
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standard_libexec_prefix);
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- if (gcc_exec_prefix)
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- putenv (concat ("GCC_EXEC_PREFIX=", gcc_exec_prefix, NULL));
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}
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else
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gcc_libexec_prefix = make_relative_prefix (gcc_exec_prefix,
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@@ -6148,10 +6146,10 @@
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/* We need to check standard_exec_prefix/just_machine_suffix/specs
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for any override of as, ld and libraries. */
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- specs_file = alloca (strlen (standard_exec_prefix)
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+ specs_file = alloca (strlen (gcc_exec_prefix)
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+ strlen (just_machine_suffix) + sizeof ("specs"));
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- strcpy (specs_file, standard_exec_prefix);
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+ strcpy (specs_file, gcc_exec_prefix);
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strcat (specs_file, just_machine_suffix);
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strcat (specs_file, "specs");
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if (access (specs_file, R_OK) == 0)
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diff -Naurb gcc-4.1.0/gcc/prefix.c gcc-4.1.0-arm/gcc/prefix.c
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--- gcc-4.1.0/gcc/prefix.c Sat Jun 25 03:02:01 2005
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+++ gcc-4.1.0-arm/gcc/prefix.c Fri May 5 10:18:51 2006
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@@ -246,13 +246,16 @@
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The returned string is always malloc-ed, and the caller is
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responsible for freeing it. */
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+
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+static const char *old_prefix = PREFIX;
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+
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char *
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update_path (const char *path, const char *key)
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{
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char *result, *p;
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- const int len = strlen (std_prefix);
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+ const int len = strlen (old_prefix);
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- if (! strncmp (path, std_prefix, len)
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+ if (! strncmp (path, old_prefix, len)
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&& (IS_DIR_SEPARATOR(path[len])
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|| path[len] == '\0')
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&& key != 0)
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@@ -354,4 +357,6 @@
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set_std_prefix (const char *prefix, int len)
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{
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std_prefix = save_string (prefix, len);
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+
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+ putenv (concat ("GCC_EXEC_PREFIX=", std_prefix, NULL));
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}
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diff -Naurb gcc-4.1.0/gcc/toplev.c gcc-4.1.0-arm/gcc/toplev.c
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--- gcc-4.1.0/gcc/toplev.c Sat Feb 4 22:13:20 2006
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+++ gcc-4.1.0-arm/gcc/toplev.c Wed Apr 26 16:49:36 2006
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@@ -82,6 +82,7 @@
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#include "value-prof.h"
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#include "alloc-pool.h"
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#include "tree-mudflap.h"
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+#include "prefix.h"
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#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
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#include "dwarf2out.h"
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@@ -1434,6 +1435,10 @@
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progname = p;
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xmalloc_set_program_name (progname);
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+
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+ p = getenv("GCC_EXEC_PREFIX");
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+ set_std_prefix (p, strlen(p));
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+
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hex_init ();
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diff -Naurb gcc-4.1.0/gcc/version.c gcc-4.1.0-arm/gcc/version.c
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--- gcc-4.1.0/gcc/version.c Wed Mar 16 06:04:10 2005
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+++ gcc-4.1.0-arm/gcc/version.c Wed Apr 12 16:00:30 2006
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@@ -8,7 +8,7 @@
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in parentheses. You may also wish to include a number indicating
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the revision of your modified compiler. */
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File diff suppressed because it is too large
Load Diff
924
dkpsp/patches/gcc-4.1.0.patch
Normal file
924
dkpsp/patches/gcc-4.1.0.patch
Normal file
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@ -0,0 +1,924 @@
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diff -Nbaur gcc-4.1.0/config.sub gcc-4.1.0-psp/config.sub
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--- gcc-4.1.0/config.sub Fri Dec 16 12:57:40 2005
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+++ gcc-4.1.0-psp/config.sub Sun May 7 22:34:17 2006
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@@ -264,6 +264,7 @@
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| mipsisa64sb1 | mipsisa64sb1el \
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| mipsisa64sr71k | mipsisa64sr71kel \
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| mipstx39 | mipstx39el \
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+ | mipsallegrex | mipsallegrexel \
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| mn10200 | mn10300 \
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| mt \
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| msp430 \
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@@ -346,6 +347,7 @@
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| mipsisa64sb1-* | mipsisa64sb1el-* \
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| mipsisa64sr71k-* | mipsisa64sr71kel-* \
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| mipstx39-* | mipstx39el-* \
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+ | mipsallegrex-* | mipsallegrexel-* \
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| mmix-* \
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| mt-* \
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| msp430-* \
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@@ -688,6 +690,10 @@
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*mint | -mint[0-9]* | *MiNT | *MiNT[0-9]*)
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basic_machine=m68k-atari
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os=-mint
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+ ;;
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+ psp)
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+ basic_machine=mipsallegrexel-psp
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+ os=-elf
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;;
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mips3*-*)
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basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'`
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diff -Nbaur gcc-4.1.0/gcc/c-incpath.c gcc-4.1.0-psp/gcc/c-incpath.c
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--- gcc-4.1.0/gcc/c-incpath.c Sat Jun 25 03:02:01 2005
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+++ gcc-4.1.0-psp/gcc/c-incpath.c Sun May 7 22:34:29 2006
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@@ -331,13 +331,18 @@
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cpp_dir *p;
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#if defined (HAVE_DOS_BASED_FILE_SYSTEM)
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- /* Convert all backslashes to slashes. The native CRT stat()
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- function does not recognize a directory that ends in a backslash
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- (unless it is a drive root dir, such "c:\"). Forward slashes,
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- trailing or otherwise, cause no problems for stat(). */
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- char* c;
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- for (c = path; *c; c++)
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- if (*c == '\\') *c = '/';
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+ /* Remove unnecessary trailing slashes. On some versions of MS
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+ Windows, trailing _forward_ slashes cause no problems for stat().
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+ On newer versions, stat() does not recognise a directory that ends
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+ in a '\\' or '/', unless it is a drive root dir, such as "c:/",
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+ where it is obligatory. */
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+ int pathlen = strlen (path);
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+ char* end = path + pathlen - 1;
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+ /* Preserve the lead '/' or lead "c:/". */
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+ char* start = path + (pathlen > 2 && path[1] == ':' ? 3 : 1);
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+
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+ for (; end > start && IS_DIR_SEPARATOR (*end); end--)
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+ *end = 0;
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#endif
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p = xmalloc (sizeof (cpp_dir));
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diff -Nbaur gcc-4.1.0/gcc/config/mips/allegrex.md gcc-4.1.0-psp/gcc/config/mips/allegrex.md
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--- gcc-4.1.0/gcc/config/mips/allegrex.md Thu Jan 1 00:00:00 1970
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+++ gcc-4.1.0-psp/gcc/config/mips/allegrex.md Sun May 7 22:34:17 2006
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@@ -0,0 +1,183 @@
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+;; Sony ALLEGREX instructions.
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+;; Copyright (C) 2005 Free Software Foundation, Inc.
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+;;
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+;; This file is part of GCC.
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+;;
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+;; GCC is free software; you can redistribute it and/or modify
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+;; it under the terms of the GNU General Public License as published by
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+;; the Free Software Foundation; either version 2, or (at your option)
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+;; any later version.
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+;;
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+;; GCC is distributed in the hope that it will be useful,
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+;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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+;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+;; GNU General Public License for more details.
|
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+;;
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+;; You should have received a copy of the GNU General Public License
|
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+;; along with GCC; see the file COPYING. If not, write to
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+;; the Free Software Foundation, 59 Temple Place - Suite 330,
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+;; Boston, MA 02111-1307, USA.
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+
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+; Multiply Add and Subtract.
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+
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+(define_insn "allegrex_madd"
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+ [(set (match_operand:SI 0 "register_operand" "+l")
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+ (plus:SI (mult:SI (match_operand:SI 1 "register_operand" "d")
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+ (match_operand:SI 2 "register_operand" "d"))
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+ (match_dup 0)))
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+ (clobber (match_scratch:SI 3 "=h"))]
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+ "TARGET_ALLEGREX"
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+ "madd\t%1,%2"
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+ [(set_attr "type" "imadd")
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+ (set_attr "mode" "SI")])
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+
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+(define_insn "allegrex_msub"
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+ [(set (match_operand:SI 0 "register_operand" "+l")
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+ (minus:SI (match_dup 0)
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+ (mult:SI (match_operand:SI 1 "register_operand" "d")
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+ (match_operand:SI 2 "register_operand" "d"))))
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+ (clobber (match_scratch:SI 3 "=h"))]
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+ "TARGET_ALLEGREX"
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+ "msub\t%1,%2"
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+ [(set_attr "type" "imadd")
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+ (set_attr "mode" "SI")])
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+
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+
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+; Min and max.
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+
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+(define_insn "sminsi3"
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+ [(set (match_operand:SI 0 "register_operand" "=d")
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+ (smin:SI (match_operand:SI 1 "register_operand" "d")
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+ (match_operand:SI 2 "register_operand" "d")))]
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+ "TARGET_ALLEGREX"
|
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+ "min\t%0,%1,%2"
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+ [(set_attr "type" "arith")
|
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+ (set_attr "mode" "SI")])
|
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+
|
||||
+(define_insn "smaxsi3"
|
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+ [(set (match_operand:SI 0 "register_operand" "=d")
|
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+ (smax:SI (match_operand:SI 1 "register_operand" "d")
|
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+ (match_operand:SI 2 "register_operand" "d")))]
|
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+ "TARGET_ALLEGREX"
|
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+ "max\t%0,%1,%2"
|
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+ [(set_attr "type" "arith")
|
||||
+ (set_attr "mode" "SI")])
|
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+
|
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+
|
||||
+; Extended shift instructions.
|
||||
+
|
||||
+(define_insn "allegrex_bitrev"
|
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+ [(set (match_operand:SI 0 "register_operand" "=d")
|
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+ (unspec:SI [(match_operand:SI 1 "register_operand" "d")]
|
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+ UNSPEC_BITREV))]
|
||||
+ "TARGET_ALLEGREX"
|
||||
+ "bitrev\t%0,%1"
|
||||
+ [(set_attr "type" "arith")
|
||||
+ (set_attr "mode" "SI")])
|
||||
+
|
||||
+(define_insn "allegrex_wsbh"
|
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+ [(set (match_operand:SI 0 "register_operand" "=d")
|
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+ (unspec:SI [(match_operand:SI 1 "register_operand" "d")]
|
||||
+ UNSPEC_WSBH))]
|
||||
+ "TARGET_ALLEGREX"
|
||||
+ "wsbh\t%0,%1"
|
||||
+ [(set_attr "type" "arith")
|
||||
+ (set_attr "mode" "SI")])
|
||||
+
|
||||
+(define_insn "allegrex_wsbw"
|
||||
+ [(set (match_operand:SI 0 "register_operand" "=d")
|
||||
+ (unspec:SI [(match_operand:SI 1 "register_operand" "d")]
|
||||
+ UNSPEC_WSBW))]
|
||||
+ "TARGET_ALLEGREX"
|
||||
+ "wsbw\t%0,%1"
|
||||
+ [(set_attr "type" "arith")
|
||||
+ (set_attr "mode" "SI")])
|
||||
+
|
||||
+
|
||||
+; Count leading ones, count trailing zeros, and count trailing ones (clz is
|
||||
+; already defined).
|
||||
+
|
||||
+(define_insn "allegrex_clo"
|
||||
+ [(set (match_operand:SI 0 "register_operand" "=d")
|
||||
+ (unspec:SI [(match_operand:SI 1 "register_operand" "d")]
|
||||
+ UNSPEC_CLO))]
|
||||
+ "TARGET_ALLEGREX"
|
||||
+ "clo\t%0,%1"
|
||||
+ [(set_attr "type" "clz")
|
||||
+ (set_attr "mode" "SI")])
|
||||
+
|
||||
+(define_expand "ctzsi2"
|
||||
+ [(set (match_operand:SI 0 "register_operand")
|
||||
+ (ctz:SI (match_operand:SI 1 "register_operand")))]
|
||||
+ "TARGET_ALLEGREX"
|
||||
+{
|
||||
+ rtx r1;
|
||||
+
|
||||
+ r1 = gen_reg_rtx (SImode);
|
||||
+ emit_insn (gen_allegrex_bitrev (r1, operands[1]));
|
||||
+ emit_insn (gen_clzsi2 (operands[0], r1));
|
||||
+ DONE;
|
||||
+})
|
||||
+
|
||||
+(define_expand "allegrex_cto"
|
||||
+ [(set (match_operand:SI 0 "register_operand")
|
||||
+ (unspec:SI [(match_operand:SI 1 "register_operand")]
|
||||
+ UNSPEC_CTO))]
|
||||
+ "TARGET_ALLEGREX"
|
||||
+{
|
||||
+ rtx r1;
|
||||
+
|
||||
+ r1 = gen_reg_rtx (SImode);
|
||||
+ emit_insn (gen_allegrex_bitrev (r1, operands[1]));
|
||||
+ emit_insn (gen_allegrex_clo (operands[0], r1));
|
||||
+ DONE;
|
||||
+})
|
||||
+
|
||||
+
|
||||
+; Misc.
|
||||
+
|
||||
+(define_insn "allegrex_sync"
|
||||
+ [(unspec_volatile [(const_int 0)] UNSPEC_SYNC)]
|
||||
+ "TARGET_ALLEGREX"
|
||||
+ "sync"
|
||||
+ [(set_attr "type" "unknown")
|
||||
+ (set_attr "mode" "none")])
|
||||
+
|
||||
+(define_insn "allegrex_cache"
|
||||
+ [(unspec_volatile [(match_operand:SI 0 "const_int_operand" "")
|
||||
+ (match_operand:SI 1 "register_operand" "d")]
|
||||
+ UNSPEC_CACHE)]
|
||||
+ "TARGET_ALLEGREX"
|
||||
+ "cache\t%0,0(%1)"
|
||||
+ [(set_attr "type" "unknown")
|
||||
+ (set_attr "mode" "none")])
|
||||
+
|
||||
+
|
||||
+; Floating-point builtins.
|
||||
+
|
||||
+(define_insn "allegrex_ceil_w_s"
|
||||
+ [(set (match_operand:SI 0 "register_operand" "=f")
|
||||
+ (unspec:SI [(match_operand:SF 1 "register_operand" "f")]
|
||||
+ UNSPEC_CEIL_W_S))]
|
||||
+ "TARGET_ALLEGREX"
|
||||
+ "ceil.w.s\t%0,%1"
|
||||
+ [(set_attr "type" "fcvt")
|
||||
+ (set_attr "mode" "SF")])
|
||||
+
|
||||
+(define_insn "allegrex_floor_w_s"
|
||||
+ [(set (match_operand:SI 0 "register_operand" "=f")
|
||||
+ (unspec:SI [(match_operand:SF 1 "register_operand" "f")]
|
||||
+ UNSPEC_FLOOR_W_S))]
|
||||
+ "TARGET_ALLEGREX"
|
||||
+ "floor.w.s\t%0,%1"
|
||||
+ [(set_attr "type" "fcvt")
|
||||
+ (set_attr "mode" "SF")])
|
||||
+
|
||||
+(define_insn "allegrex_round_w_s"
|
||||
+ [(set (match_operand:SI 0 "register_operand" "=f")
|
||||
+ (unspec:SI [(match_operand:SF 1 "register_operand" "f")]
|
||||
+ UNSPEC_ROUND_W_S))]
|
||||
+ "TARGET_ALLEGREX"
|
||||
+ "round.w.s\t%0,%1"
|
||||
+ [(set_attr "type" "fcvt")
|
||||
+ (set_attr "mode" "SF")])
|
||||
diff -Nbaur gcc-4.1.0/gcc/config/mips/mips.c gcc-4.1.0-psp/gcc/config/mips/mips.c
|
||||
--- gcc-4.1.0/gcc/config/mips/mips.c Fri Dec 9 08:15:58 2005
|
||||
+++ gcc-4.1.0-psp/gcc/config/mips/mips.c Sun May 7 22:34:17 2006
|
||||
@@ -179,6 +179,12 @@
|
||||
MIPS_VOID_FTYPE_V2HI_V2HI,
|
||||
MIPS_VOID_FTYPE_V4QI_V4QI,
|
||||
|
||||
+ /* For the Sony ALLEGREX. */
|
||||
+ MIPS_SI_FTYPE_QI,
|
||||
+ MIPS_SI_FTYPE_HI,
|
||||
+ MIPS_VOID_FTYPE_VOID,
|
||||
+ MIPS_SI_FTYPE_SF,
|
||||
+
|
||||
/* The last type. */
|
||||
MIPS_MAX_FTYPE_MAX
|
||||
};
|
||||
@@ -220,6 +226,11 @@
|
||||
/* As above, but the instruction only sets a single $fcc register. */
|
||||
MIPS_BUILTIN_CMP_SINGLE,
|
||||
|
||||
+ /* The builtin corresponds to the ALLEGREX cache instruction. Operand 0
|
||||
+ is the function code (must be less than 32) and operand 1 is the base
|
||||
+ address. */
|
||||
+ MIPS_BUILTIN_CACHE,
|
||||
+
|
||||
/* For generating bposge32 branch instructions in MIPS32 DSP ASE. */
|
||||
MIPS_BUILTIN_BPOSGE32
|
||||
};
|
||||
@@ -405,6 +416,7 @@
|
||||
static rtx mips_expand_builtin_compare (enum mips_builtin_type,
|
||||
enum insn_code, enum mips_fp_condition,
|
||||
rtx, tree);
|
||||
+static rtx mips_expand_builtin_cache (enum insn_code icode, rtx, tree);
|
||||
static rtx mips_expand_builtin_bposge (enum mips_builtin_type, rtx);
|
||||
static void mips_encode_section_info (tree, rtx, int);
|
||||
|
||||
@@ -721,6 +733,7 @@
|
||||
|
||||
/* MIPS II */
|
||||
{ "r6000", PROCESSOR_R6000, 2 },
|
||||
+ { "allegrex", PROCESSOR_ALLEGREX, 2 },
|
||||
|
||||
/* MIPS III */
|
||||
{ "r4000", PROCESSOR_R4000, 3 },
|
||||
@@ -10169,6 +10182,67 @@
|
||||
BPOSGE_BUILTIN (32, MASK_DSP)
|
||||
};
|
||||
|
||||
+/* Builtin functions for the Sony ALLEGREX processor.
|
||||
+
|
||||
+ These have the `__builtin_allgrex_' prefix instead of `__builtin_mips_'
|
||||
+ to maintain compatibility with Sony's ALLEGREX GCC port.
|
||||
+
|
||||
+ Some of the builtins may seem redundant, but they are the same as the
|
||||
+ builtins defined in the Sony compiler. I chose to map redundant and
|
||||
+ trivial builtins to the original instruction instead of creating
|
||||
+ duplicate patterns specifically for the ALLEGREX (as Sony does). */
|
||||
+
|
||||
+/* Define a MIPS_BUILTIN_DIRECT function for instruction CODE_FOR_allegrex_<INSN>.
|
||||
+ FUNCTION_TYPE and TARGET_FLAGS are builtin_description fields. */
|
||||
+#define DIRECT_ALLEGREX_BUILTIN(INSN, FUNCTION_TYPE, TARGET_FLAGS) \
|
||||
+ { CODE_FOR_allegrex_ ## INSN, 0, "__builtin_allegrex_" #INSN, \
|
||||
+ MIPS_BUILTIN_DIRECT, FUNCTION_TYPE, TARGET_FLAGS }
|
||||
+
|
||||
+/* Same as the above, but mapped to an instruction that doesn't share the
|
||||
+ NAME. NAME is the name of the builtin without the builtin prefix. */
|
||||
+#define DIRECT_ALLEGREX_NAMED_BUILTIN(NAME, INSN, FUNCTION_TYPE, TARGET_FLAGS) \
|
||||
+ { CODE_FOR_ ## INSN, 0, "__builtin_allegrex_" #NAME, \
|
||||
+ MIPS_BUILTIN_DIRECT, FUNCTION_TYPE, TARGET_FLAGS }
|
||||
+
|
||||
+/* Define a MIPS_BUILTIN_DIRECT_NO_TARGET function for instruction
|
||||
+ CODE_FOR_allegrex_<INSN>. FUNCTION_TYPE and TARGET_FLAGS are
|
||||
+ builtin_description fields. */
|
||||
+#define DIRECT_ALLEGREX_NO_TARGET_BUILTIN(INSN, FUNCTION_TYPE, TARGET_FLAGS) \
|
||||
+ { CODE_FOR_allegrex_ ## INSN, 0, "__builtin_allegrex_" #INSN, \
|
||||
+ MIPS_BUILTIN_DIRECT_NO_TARGET, FUNCTION_TYPE, TARGET_FLAGS }
|
||||
+
|
||||
+/* Define a builtin with a specific function TYPE. */
|
||||
+#define SPECIAL_ALLEGREX_BUILTIN(TYPE, INSN, FUNCTION_TYPE, TARGET_FLAGS) \
|
||||
+ { CODE_FOR_allegrex_ ## INSN, 0, "__builtin_allegrex_" #INSN, \
|
||||
+ MIPS_BUILTIN_ ## TYPE, FUNCTION_TYPE, TARGET_FLAGS }
|
||||
+
|
||||
+static const struct builtin_description allegrex_bdesc[] =
|
||||
+{
|
||||
+ DIRECT_ALLEGREX_BUILTIN(bitrev, MIPS_SI_FTYPE_SI, 0),
|
||||
+ DIRECT_ALLEGREX_BUILTIN(wsbh, MIPS_SI_FTYPE_SI, 0),
|
||||
+ DIRECT_ALLEGREX_BUILTIN(wsbw, MIPS_SI_FTYPE_SI, 0),
|
||||
+ DIRECT_ALLEGREX_NAMED_BUILTIN(clz, clzsi2, MIPS_SI_FTYPE_SI, 0),
|
||||
+ DIRECT_ALLEGREX_BUILTIN(clo, MIPS_SI_FTYPE_SI, 0),
|
||||
+ DIRECT_ALLEGREX_NAMED_BUILTIN(ctz, ctzsi2, MIPS_SI_FTYPE_SI, 0),
|
||||
+ DIRECT_ALLEGREX_BUILTIN(cto, MIPS_SI_FTYPE_SI, 0),
|
||||
+ DIRECT_ALLEGREX_NAMED_BUILTIN(rotr, rotrsi3, MIPS_SI_FTYPE_SI_SI, 0),
|
||||
+ DIRECT_ALLEGREX_NAMED_BUILTIN(rotl, rotlsi3, MIPS_SI_FTYPE_SI_SI, 0),
|
||||
+
|
||||
+ DIRECT_ALLEGREX_NAMED_BUILTIN(seb, extendqisi2, MIPS_SI_FTYPE_QI, 0),
|
||||
+ DIRECT_ALLEGREX_NAMED_BUILTIN(seh, extendhisi2, MIPS_SI_FTYPE_HI, 0),
|
||||
+ DIRECT_ALLEGREX_NAMED_BUILTIN(max, smaxsi3, MIPS_SI_FTYPE_SI_SI, 0),
|
||||
+ DIRECT_ALLEGREX_NAMED_BUILTIN(min, sminsi3, MIPS_SI_FTYPE_SI_SI, 0),
|
||||
+
|
||||
+ DIRECT_ALLEGREX_NO_TARGET_BUILTIN(sync, MIPS_VOID_FTYPE_VOID, 0),
|
||||
+ SPECIAL_ALLEGREX_BUILTIN(CACHE, cache, MIPS_VOID_FTYPE_SI_SI, 0),
|
||||
+
|
||||
+ DIRECT_ALLEGREX_NAMED_BUILTIN(sqrt_s, sqrtsf2, MIPS_SF_FTYPE_SF, 0),
|
||||
+ DIRECT_ALLEGREX_BUILTIN(ceil_w_s, MIPS_SI_FTYPE_SF, 0),
|
||||
+ DIRECT_ALLEGREX_BUILTIN(floor_w_s, MIPS_SI_FTYPE_SF, 0),
|
||||
+ DIRECT_ALLEGREX_BUILTIN(round_w_s, MIPS_SI_FTYPE_SF, 0),
|
||||
+ DIRECT_ALLEGREX_NAMED_BUILTIN(trunc_w_s, fix_truncsfsi2_insn, MIPS_SI_FTYPE_SF, 0)
|
||||
+};
|
||||
+
|
||||
/* This helps provide a mapping from builtin function codes to bdesc
|
||||
arrays. */
|
||||
|
||||
@@ -10189,6 +10263,7 @@
|
||||
{
|
||||
{ mips_bdesc, ARRAY_SIZE (mips_bdesc), PROCESSOR_MAX },
|
||||
{ sb1_bdesc, ARRAY_SIZE (sb1_bdesc), PROCESSOR_SB1 },
|
||||
+ { allegrex_bdesc, ARRAY_SIZE (allegrex_bdesc), PROCESSOR_ALLEGREX },
|
||||
{ dsp_bdesc, ARRAY_SIZE (dsp_bdesc), PROCESSOR_MAX }
|
||||
};
|
||||
|
||||
@@ -10292,6 +10367,9 @@
|
||||
case MIPS_BUILTIN_BPOSGE32:
|
||||
return mips_expand_builtin_bposge (type, target);
|
||||
|
||||
+ case MIPS_BUILTIN_CACHE:
|
||||
+ return mips_expand_builtin_cache (icode, target, arglist);
|
||||
+
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
@@ -10310,8 +10388,8 @@
|
||||
tree V4QI_type_node;
|
||||
unsigned int offset;
|
||||
|
||||
- /* We have only builtins for -mpaired-single, -mips3d and -mdsp. */
|
||||
- if (!TARGET_PAIRED_SINGLE_FLOAT && !TARGET_DSP)
|
||||
+ /* We have only builtins for -mpaired-single, -mips3d and -mdsp and the Sony ALLEGREX. */
|
||||
+ if (!TARGET_PAIRED_SINGLE_FLOAT && !TARGET_DSP && !TARGET_ALLEGREX)
|
||||
return;
|
||||
|
||||
if (TARGET_PAIRED_SINGLE_FLOAT)
|
||||
@@ -10376,6 +10454,44 @@
|
||||
double_type_node, double_type_node, NULL_TREE);
|
||||
}
|
||||
|
||||
+ if (TARGET_ALLEGREX)
|
||||
+ {
|
||||
+ types[MIPS_SI_FTYPE_QI]
|
||||
+ = build_function_type_list (intSI_type_node,
|
||||
+ intQI_type_node,
|
||||
+ NULL_TREE);
|
||||
+
|
||||
+ types[MIPS_SI_FTYPE_HI]
|
||||
+ = build_function_type_list (intSI_type_node,
|
||||
+ intHI_type_node,
|
||||
+ NULL_TREE);
|
||||
+
|
||||
+ types[MIPS_SI_FTYPE_SI]
|
||||
+ = build_function_type_list (intSI_type_node,
|
||||
+ intSI_type_node,
|
||||
+ NULL_TREE);
|
||||
+
|
||||
+ types[MIPS_SI_FTYPE_SI_SI]
|
||||
+ = build_function_type_list (intSI_type_node,
|
||||
+ intSI_type_node, intSI_type_node,
|
||||
+ NULL_TREE);
|
||||
+
|
||||
+ types[MIPS_VOID_FTYPE_VOID]
|
||||
+ = build_function_type_list (void_type_node, void_type_node, NULL_TREE);
|
||||
+
|
||||
+ types[MIPS_VOID_FTYPE_SI_SI]
|
||||
+ = build_function_type_list (void_type_node,
|
||||
+ intSI_type_node, intSI_type_node, NULL_TREE);
|
||||
+
|
||||
+ types[MIPS_SF_FTYPE_SF]
|
||||
+ = build_function_type_list (float_type_node,
|
||||
+ float_type_node, NULL_TREE);
|
||||
+
|
||||
+ types[MIPS_SI_FTYPE_SF]
|
||||
+ = build_function_type_list (intSI_type_node,
|
||||
+ float_type_node, NULL_TREE);
|
||||
+ }
|
||||
+
|
||||
if (TARGET_DSP)
|
||||
{
|
||||
V2HI_type_node = build_vector_type_for_mode (intHI_type_node, V2HImode);
|
||||
@@ -10557,6 +10673,10 @@
|
||||
|
||||
switch (i)
|
||||
{
|
||||
+ case 0:
|
||||
+ emit_insn (GEN_FCN (icode) (0));
|
||||
+ break;
|
||||
+
|
||||
case 2:
|
||||
emit_insn (GEN_FCN (icode) (ops[0], ops[1]));
|
||||
break;
|
||||
@@ -10765,6 +10885,28 @@
|
||||
rtx symbol = XEXP (rtl, 0);
|
||||
SYMBOL_REF_FLAGS (symbol) |= SYMBOL_FLAG_LONG_CALL;
|
||||
}
|
||||
+}
|
||||
+
|
||||
+/* Expand a __builtin_allegrex_cache() function. Make sure the passed
|
||||
+ cache function code is less than 32. */
|
||||
+
|
||||
+static rtx
|
||||
+mips_expand_builtin_cache (enum insn_code icode, rtx target, tree arglist)
|
||||
+{
|
||||
+ rtx op0, op1;
|
||||
+
|
||||
+ op0 = mips_prepare_builtin_arg (icode, 0, &arglist);
|
||||
+ op1 = mips_prepare_builtin_arg (icode, 1, &arglist);
|
||||
+
|
||||
+ if (GET_CODE (op0) == CONST_INT)
|
||||
+ if (INTVAL (op0) < 0 || INTVAL (op0) > 0x1f)
|
||||
+ {
|
||||
+ error ("invalid function code '%d'", INTVAL (op0));
|
||||
+ return const0_rtx;
|
||||
+ }
|
||||
+
|
||||
+ emit_insn (GEN_FCN (icode) (op0, op1));
|
||||
+ return target;
|
||||
}
|
||||
|
||||
#include "gt-mips.h"
|
||||
diff -Nbaur gcc-4.1.0/gcc/config/mips/mips.h gcc-4.1.0-psp/gcc/config/mips/mips.h
|
||||
--- gcc-4.1.0/gcc/config/mips/mips.h Fri Feb 17 21:38:59 2006
|
||||
+++ gcc-4.1.0-psp/gcc/config/mips/mips.h Sun May 7 22:34:17 2006
|
||||
@@ -59,6 +59,7 @@
|
||||
PROCESSOR_R9000,
|
||||
PROCESSOR_SB1,
|
||||
PROCESSOR_SR71000,
|
||||
+ PROCESSOR_ALLEGREX,
|
||||
PROCESSOR_MAX
|
||||
};
|
||||
|
||||
@@ -194,6 +195,7 @@
|
||||
#define TARGET_MIPS9000 (mips_arch == PROCESSOR_R9000)
|
||||
#define TARGET_SB1 (mips_arch == PROCESSOR_SB1)
|
||||
#define TARGET_SR71K (mips_arch == PROCESSOR_SR71000)
|
||||
+#define TARGET_ALLEGREX (mips_arch == PROCESSOR_ALLEGREX)
|
||||
|
||||
/* Scheduling target defines. */
|
||||
#define TUNE_MIPS3000 (mips_tune == PROCESSOR_R3000)
|
||||
@@ -208,6 +210,7 @@
|
||||
#define TUNE_MIPS7000 (mips_tune == PROCESSOR_R7000)
|
||||
#define TUNE_MIPS9000 (mips_tune == PROCESSOR_R9000)
|
||||
#define TUNE_SB1 (mips_tune == PROCESSOR_SB1)
|
||||
+#define TUNE_ALLEGREX (mips_tune == PROCESSOR_ALLEGREX)
|
||||
|
||||
/* True if the pre-reload scheduler should try to create chains of
|
||||
multiply-add or multiply-subtract instructions. For example,
|
||||
@@ -578,6 +581,9 @@
|
||||
&& !TARGET_MIPS5500 \
|
||||
&& !TARGET_MIPS16)
|
||||
|
||||
+/* ISA has just the integer condition move instructions (movn,movz) */
|
||||
+#define ISA_HAS_INT_CONDMOVE (TARGET_ALLEGREX)
|
||||
+
|
||||
/* ISA has the mips4 FP condition code instructions: FP-compare to CC,
|
||||
branch on CC, and move (both FP and non-FP) on CC. */
|
||||
#define ISA_HAS_8CC (ISA_MIPS4 \
|
||||
@@ -594,7 +600,8 @@
|
||||
|
||||
/* ISA has conditional trap instructions. */
|
||||
#define ISA_HAS_COND_TRAP (!ISA_MIPS1 \
|
||||
- && !TARGET_MIPS16)
|
||||
+ && !TARGET_MIPS16 \
|
||||
+ && !TARGET_ALLEGREX)
|
||||
|
||||
/* ISA has integer multiply-accumulate instructions, madd and msub. */
|
||||
#define ISA_HAS_MADD_MSUB ((ISA_MIPS32 \
|
||||
@@ -612,6 +619,7 @@
|
||||
#define ISA_HAS_CLZ_CLO ((ISA_MIPS32 \
|
||||
|| ISA_MIPS32R2 \
|
||||
|| ISA_MIPS64 \
|
||||
+ || TARGET_ALLEGREX \
|
||||
) && !TARGET_MIPS16)
|
||||
|
||||
/* ISA has double-word count leading zeroes/ones instruction (not
|
||||
@@ -659,6 +667,7 @@
|
||||
|| TARGET_MIPS5400 \
|
||||
|| TARGET_MIPS5500 \
|
||||
|| TARGET_SR71K \
|
||||
+ || TARGET_ALLEGREX \
|
||||
))
|
||||
|
||||
/* ISA has 64-bit rotate right instruction. */
|
||||
@@ -692,11 +701,13 @@
|
||||
/* ISA includes the MIPS32r2 seb and seh instructions. */
|
||||
#define ISA_HAS_SEB_SEH (!TARGET_MIPS16 \
|
||||
&& (ISA_MIPS32R2 \
|
||||
+ || TARGET_ALLEGREX \
|
||||
))
|
||||
|
||||
/* ISA includes the MIPS32/64 rev 2 ext and ins instructions. */
|
||||
#define ISA_HAS_EXT_INS (!TARGET_MIPS16 \
|
||||
&& (ISA_MIPS32R2 \
|
||||
+ || TARGET_ALLEGREX \
|
||||
))
|
||||
|
||||
/* True if the result of a load is not available to the next instruction.
|
||||
@@ -727,7 +738,8 @@
|
||||
#define ISA_HAS_HILO_INTERLOCKS (ISA_MIPS32 \
|
||||
|| ISA_MIPS32R2 \
|
||||
|| ISA_MIPS64 \
|
||||
- || TARGET_MIPS5500)
|
||||
+ || TARGET_MIPS5500 \
|
||||
+ || TARGET_ALLEGREX)
|
||||
|
||||
/* Add -G xx support. */
|
||||
|
||||
@@ -1138,6 +1150,11 @@
|
||||
/* Define if loading short immediate values into registers sign extends. */
|
||||
#define SHORT_IMMEDIATES_SIGN_EXTEND
|
||||
|
||||
+/* The [d]clz instructions have the natural values at 0. */
|
||||
+
|
||||
+#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
|
||||
+ ((VALUE) = GET_MODE_BITSIZE (MODE), true)
|
||||
+
|
||||
/* The [d]clz instructions have the natural values at 0. */
|
||||
|
||||
#define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) \
|
||||
diff -Nbaur gcc-4.1.0/gcc/config/mips/mips.md gcc-4.1.0-psp/gcc/config/mips/mips.md
|
||||
--- gcc-4.1.0/gcc/config/mips/mips.md Fri Jul 29 18:25:27 2005
|
||||
+++ gcc-4.1.0-psp/gcc/config/mips/mips.md Sun May 7 22:34:17 2006
|
||||
@@ -142,6 +142,21 @@
|
||||
(UNSPEC_MTHLIP 365)
|
||||
(UNSPEC_WRDSP 366)
|
||||
(UNSPEC_RDDSP 367)
|
||||
+
|
||||
+ ;; Sony ALLEGREX instructions
|
||||
+ (UNSPEC_WSBH 401)
|
||||
+ (UNSPEC_WSBW 402)
|
||||
+
|
||||
+ (UNSPEC_CLO 403)
|
||||
+ (UNSPEC_CTO 404)
|
||||
+
|
||||
+ (UNSPEC_CACHE 405)
|
||||
+ (UNSPEC_SYNC 406)
|
||||
+
|
||||
+ (UNSPEC_CEIL_W_S 407)
|
||||
+ (UNSPEC_FLOOR_W_S 408)
|
||||
+ (UNSPEC_ROUND_W_S 409)
|
||||
+
|
||||
]
|
||||
)
|
||||
|
||||
@@ -1601,9 +1616,9 @@
|
||||
(mult:DI
|
||||
(any_extend:DI (match_operand:SI 1 "register_operand" "d"))
|
||||
(any_extend:DI (match_operand:SI 2 "register_operand" "d")))))]
|
||||
- "!TARGET_64BIT && ISA_HAS_MSAC"
|
||||
+ "!TARGET_64BIT && (ISA_HAS_MSAC || TARGET_ALLEGREX)"
|
||||
{
|
||||
- if (TARGET_MIPS5500)
|
||||
+ if (TARGET_MIPS5500 || TARGET_ALLEGREX)
|
||||
return "msub<u>\t%1,%2";
|
||||
else
|
||||
return "msac<u>\t$0,%1,%2";
|
||||
@@ -1718,12 +1733,12 @@
|
||||
(mult:DI (any_extend:DI (match_operand:SI 1 "register_operand" "d"))
|
||||
(any_extend:DI (match_operand:SI 2 "register_operand" "d")))
|
||||
(match_operand:DI 3 "register_operand" "0")))]
|
||||
- "(TARGET_MAD || ISA_HAS_MACC)
|
||||
+ "(TARGET_MAD || ISA_HAS_MACC || TARGET_ALLEGREX)
|
||||
&& !TARGET_64BIT"
|
||||
{
|
||||
if (TARGET_MAD)
|
||||
return "mad<u>\t%1,%2";
|
||||
- else if (TARGET_MIPS5500)
|
||||
+ else if (TARGET_MIPS5500 || TARGET_ALLEGREX)
|
||||
return "madd<u>\t%1,%2";
|
||||
else
|
||||
/* See comment in *macc. */
|
||||
@@ -1995,6 +2010,32 @@
|
||||
;;
|
||||
;; ....................
|
||||
;;
|
||||
+;; FIND FIRST BIT INSTRUCTION
|
||||
+;;
|
||||
+;; ....................
|
||||
+;;
|
||||
+
|
||||
+(define_expand "ffs<mode>2"
|
||||
+ [(set (match_operand:GPR 0 "register_operand" "")
|
||||
+ (ffs:GPR (match_operand:GPR 1 "register_operand" "")))]
|
||||
+ "ISA_HAS_CLZ_CLO"
|
||||
+{
|
||||
+ rtx r1, r2, r3, r4;
|
||||
+
|
||||
+ r1 = gen_reg_rtx (<MODE>mode);
|
||||
+ r2 = gen_reg_rtx (<MODE>mode);
|
||||
+ r3 = gen_reg_rtx (<MODE>mode);
|
||||
+ r4 = gen_reg_rtx (<MODE>mode);
|
||||
+ emit_insn (gen_neg<mode>2 (r1, operands[1]));
|
||||
+ emit_insn (gen_and<mode>3 (r2, operands[1], r1));
|
||||
+ emit_insn (gen_clz<mode>2 (r3, r2));
|
||||
+ emit_move_insn (r4, GEN_INT (GET_MODE_BITSIZE (<MODE>mode)));
|
||||
+ emit_insn (gen_sub<mode>3 (operands[0], r4, r3));
|
||||
+ DONE;
|
||||
+})
|
||||
+;;
|
||||
+;; ....................
|
||||
+;;
|
||||
;; NEGATION and ONE'S COMPLEMENT
|
||||
;;
|
||||
;; ....................
|
||||
@@ -4193,6 +4234,25 @@
|
||||
[(set_attr "type" "shift")
|
||||
(set_attr "mode" "<MODE>")])
|
||||
|
||||
+(define_expand "rotl<mode>3"
|
||||
+ [(set (match_operand:GPR 0 "register_operand")
|
||||
+ (rotate:GPR (match_operand:GPR 1 "register_operand")
|
||||
+ (match_operand:SI 2 "arith_operand")))]
|
||||
+ "ISA_HAS_ROTR_<MODE>"
|
||||
+{
|
||||
+ rtx temp;
|
||||
+
|
||||
+ if (GET_CODE (operands[2]) == CONST_INT)
|
||||
+ temp = GEN_INT (GET_MODE_BITSIZE (<MODE>mode) - INTVAL (operands[2]));
|
||||
+ else
|
||||
+ {
|
||||
+ temp = gen_reg_rtx (<MODE>mode);
|
||||
+ emit_insn (gen_neg<mode>2 (temp, operands[2]));
|
||||
+ }
|
||||
+ emit_insn (gen_rotr<mode>3 (operands[0], operands[1], temp));
|
||||
+ DONE;
|
||||
+})
|
||||
+
|
||||
;;
|
||||
;; ....................
|
||||
;;
|
||||
@@ -5306,7 +5366,7 @@
|
||||
(const_int 0)])
|
||||
(match_operand:GPR 2 "reg_or_0_operand" "dJ,0")
|
||||
(match_operand:GPR 3 "reg_or_0_operand" "0,dJ")))]
|
||||
- "ISA_HAS_CONDMOVE"
|
||||
+ "ISA_HAS_CONDMOVE || ISA_HAS_INT_CONDMOVE"
|
||||
"@
|
||||
mov%T4\t%0,%z2,%1
|
||||
mov%t4\t%0,%z3,%1"
|
||||
@@ -5336,8 +5396,12 @@
|
||||
(if_then_else:GPR (match_dup 5)
|
||||
(match_operand:GPR 2 "reg_or_0_operand")
|
||||
(match_operand:GPR 3 "reg_or_0_operand")))]
|
||||
- "ISA_HAS_CONDMOVE"
|
||||
+ "ISA_HAS_CONDMOVE || ISA_HAS_INT_CONDMOVE"
|
||||
{
|
||||
+ if (ISA_HAS_INT_CONDMOVE
|
||||
+ && GET_MODE_CLASS (GET_MODE (cmp_operands[0])) == MODE_FLOAT)
|
||||
+ FAIL;
|
||||
+
|
||||
gen_conditional_move (operands);
|
||||
DONE;
|
||||
})
|
||||
@@ -5428,3 +5492,6 @@
|
||||
; The MIPS DSP Instructions.
|
||||
|
||||
(include "mips-dsp.md")
|
||||
+
|
||||
+; Sony ALLEGREX instructions.
|
||||
+(include "allegrex.md")
|
||||
diff -Nbaur gcc-4.1.0/gcc/config/mips/psp.h gcc-4.1.0-psp/gcc/config/mips/psp.h
|
||||
--- gcc-4.1.0/gcc/config/mips/psp.h Thu Jan 1 00:00:00 1970
|
||||
+++ gcc-4.1.0-psp/gcc/config/mips/psp.h Sun May 7 22:34:17 2006
|
||||
@@ -0,0 +1,31 @@
|
||||
+/* Support for Sony's Playstation Portable (PSP).
|
||||
+ Copyright (C) 2005 Free Software Foundation, Inc.
|
||||
+ Contributed by Marcus R. Brown <mrbrown@ocgnet.org>
|
||||
+
|
||||
+This file is part of GCC.
|
||||
+
|
||||
+GCC is free software; you can redistribute it and/or modify
|
||||
+it under the terms of the GNU General Public License as published by
|
||||
+the Free Software Foundation; either version 2, or (at your option)
|
||||
+any later version.
|
||||
+
|
||||
+GCC is distributed in the hope that it will be useful,
|
||||
+but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
+GNU General Public License for more details.
|
||||
+
|
||||
+You should have received a copy of the GNU General Public License
|
||||
+along with GCC; see the file COPYING. If not, write to
|
||||
+the Free Software Foundation, 59 Temple Place - Suite 330,
|
||||
+Boston, MA 02111-1307, USA. */
|
||||
+
|
||||
+/* Override the startfile spec to include crt0.o. */
|
||||
+#undef STARTFILE_SPEC
|
||||
+#define STARTFILE_SPEC "crt0%O%s crti%O%s crtbegin%O%s"
|
||||
+
|
||||
+#undef SUBTARGET_CPP_SPEC
|
||||
+#define SUBTARGET_CPP_SPEC "-DPSP=1 -D__psp__=1 -D_PSP=1"
|
||||
+
|
||||
+/* Get rid of the .pdr section. */
|
||||
+#undef SUBTARGET_ASM_SPEC
|
||||
+#define SUBTARGET_ASM_SPEC "-mno-pdr"
|
||||
diff -Nbaur gcc-4.1.0/gcc/config/mips/t-allegrex gcc-4.1.0-psp/gcc/config/mips/t-allegrex
|
||||
--- gcc-4.1.0/gcc/config/mips/t-allegrex Thu Jan 1 00:00:00 1970
|
||||
+++ gcc-4.1.0-psp/gcc/config/mips/t-allegrex Sun May 7 22:34:17 2006
|
||||
@@ -0,0 +1,29 @@
|
||||
+# Suppress building libgcc1.a, since the MIPS compiler port is complete
|
||||
+# and does not need anything from libgcc1.a.
|
||||
+LIBGCC1 =
|
||||
+CROSS_LIBGCC1 =
|
||||
+
|
||||
+EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crti.o crtn.o
|
||||
+# Don't let CTOR_LIST end up in sdata section.
|
||||
+CRTSTUFF_T_CFLAGS = -G 0
|
||||
+
|
||||
+# Assemble startup files.
|
||||
+$(T)crti.o: $(srcdir)/config/mips/crti.asm $(GCC_PASSES)
|
||||
+ $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
|
||||
+ -c -o $(T)crti.o -x assembler-with-cpp $(srcdir)/config/mips/crti.asm
|
||||
+
|
||||
+$(T)crtn.o: $(srcdir)/config/mips/crtn.asm $(GCC_PASSES)
|
||||
+ $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
|
||||
+ -c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/mips/crtn.asm
|
||||
+
|
||||
+# We must build libgcc2.a with -G 0, in case the user wants to link
|
||||
+# without the $gp register.
|
||||
+TARGET_LIBGCC2_CFLAGS = -G 0
|
||||
+
|
||||
+# Build the libraries for both hard and soft floating point
|
||||
+
|
||||
+MULTILIB_OPTIONS =
|
||||
+MULTILIB_DIRNAMES =
|
||||
+
|
||||
+LIBGCC = stmp-multilib
|
||||
+INSTALL_LIBGCC = install-multilib
|
||||
diff -Nbaur gcc-4.1.0/gcc/config.gcc gcc-4.1.0-psp/gcc/config.gcc
|
||||
--- gcc-4.1.0/gcc/config.gcc Mon Feb 6 16:07:46 2006
|
||||
+++ gcc-4.1.0-psp/gcc/config.gcc Sun May 7 22:34:17 2006
|
||||
@@ -406,12 +406,6 @@
|
||||
tm_defines="${tm_defines} FBSD_MAJOR=5" ;;
|
||||
*-*-freebsd6 | *-*-freebsd[6].*)
|
||||
tm_defines="${tm_defines} FBSD_MAJOR=6" ;;
|
||||
- *-*-freebsd7 | *-*-freebsd[7].*)
|
||||
- tm_defines="${tm_defines} FBSD_MAJOR=7" ;;
|
||||
- *-*-freebsd8 | *-*-freebsd[8].*)
|
||||
- tm_defines="${tm_defines} FBSD_MAJOR=8" ;;
|
||||
- *-*-freebsd9 | *-*-freebsd[9].*)
|
||||
- tm_defines="${tm_defines} FBSD_MAJOR=9" ;;
|
||||
*)
|
||||
echo 'Please update *-*-freebsd* in gcc/config.gcc'
|
||||
exit 1
|
||||
@@ -756,11 +750,6 @@
|
||||
tmake_file=bfin/t-bfin-elf
|
||||
use_collect2=no
|
||||
;;
|
||||
-bfin*-uclinux*)
|
||||
- tm_file="${tm_file} dbxelf.h elfos.h bfin/elf.h bfin/uclinux.h"
|
||||
- tmake_file=bfin/t-bfin-elf
|
||||
- use_collect2=no
|
||||
- ;;
|
||||
bfin*-*)
|
||||
tm_file="${tm_file} dbxelf.h elfos.h bfin/elf.h"
|
||||
tmake_file=bfin/t-bfin
|
||||
@@ -1582,6 +1571,18 @@
|
||||
mipstx39-*-elf* | mipstx39el-*-elf*)
|
||||
tm_file="elfos.h ${tm_file} mips/r3900.h mips/elf.h"
|
||||
tmake_file=mips/t-r3900
|
||||
+ use_fixproto=yes
|
||||
+ ;;
|
||||
+mipsallegrex-*-elf* | mipsallegrexel-*-elf*)
|
||||
+ tm_file="elfos.h ${tm_file} mips/elf.h"
|
||||
+ tmake_file=mips/t-allegrex
|
||||
+ target_cpu_default="MASK_SINGLE_FLOAT|MASK_DIVIDE_BREAKS"
|
||||
+ tm_defines="MIPS_ISA_DEFAULT=2 MIPS_CPU_STRING_DEFAULT=\\\"allegrex\\\" MIPS_ABI_DEFAULT=ABI_EABI"
|
||||
+ case ${target} in
|
||||
+ mipsallegrex*-psp-elf*)
|
||||
+ tm_file="${tm_file} mips/psp.h"
|
||||
+ ;;
|
||||
+ esac
|
||||
use_fixproto=yes
|
||||
;;
|
||||
mmix-knuth-mmixware)
|
||||
diff -Nbaur gcc-4.1.0/gcc/gcc.c gcc-4.1.0-psp/gcc/gcc.c
|
||||
--- gcc-4.1.0/gcc/gcc.c Sat Jan 21 18:29:08 2006
|
||||
+++ gcc-4.1.0-psp/gcc/gcc.c Sun May 7 22:34:29 2006
|
||||
@@ -3250,8 +3250,6 @@
|
||||
gcc_libexec_prefix = make_relative_prefix (argv[0],
|
||||
standard_bindir_prefix,
|
||||
standard_libexec_prefix);
|
||||
- if (gcc_exec_prefix)
|
||||
- putenv (concat ("GCC_EXEC_PREFIX=", gcc_exec_prefix, NULL));
|
||||
}
|
||||
else
|
||||
gcc_libexec_prefix = make_relative_prefix (gcc_exec_prefix,
|
||||
@@ -6148,10 +6146,10 @@
|
||||
|
||||
/* We need to check standard_exec_prefix/just_machine_suffix/specs
|
||||
for any override of as, ld and libraries. */
|
||||
- specs_file = alloca (strlen (standard_exec_prefix)
|
||||
+ specs_file = alloca (strlen (gcc_exec_prefix)
|
||||
+ strlen (just_machine_suffix) + sizeof ("specs"));
|
||||
|
||||
- strcpy (specs_file, standard_exec_prefix);
|
||||
+ strcpy (specs_file, gcc_exec_prefix);
|
||||
strcat (specs_file, just_machine_suffix);
|
||||
strcat (specs_file, "specs");
|
||||
if (access (specs_file, R_OK) == 0)
|
||||
diff -Nbaur gcc-4.1.0/gcc/prefix.c gcc-4.1.0-psp/gcc/prefix.c
|
||||
--- gcc-4.1.0/gcc/prefix.c Sat Jun 25 03:02:01 2005
|
||||
+++ gcc-4.1.0-psp/gcc/prefix.c Sun May 7 22:34:29 2006
|
||||
@@ -246,13 +246,16 @@
|
||||
The returned string is always malloc-ed, and the caller is
|
||||
responsible for freeing it. */
|
||||
|
||||
+
|
||||
+static const char *old_prefix = PREFIX;
|
||||
+
|
||||
char *
|
||||
update_path (const char *path, const char *key)
|
||||
{
|
||||
char *result, *p;
|
||||
- const int len = strlen (std_prefix);
|
||||
+ const int len = strlen (old_prefix);
|
||||
|
||||
- if (! strncmp (path, std_prefix, len)
|
||||
+ if (! strncmp (path, old_prefix, len)
|
||||
&& (IS_DIR_SEPARATOR(path[len])
|
||||
|| path[len] == '\0')
|
||||
&& key != 0)
|
||||
@@ -354,4 +357,6 @@
|
||||
set_std_prefix (const char *prefix, int len)
|
||||
{
|
||||
std_prefix = save_string (prefix, len);
|
||||
+
|
||||
+ putenv (concat ("GCC_EXEC_PREFIX=", std_prefix, NULL));
|
||||
}
|
||||
diff -Nbaur gcc-4.1.0/gcc/toplev.c gcc-4.1.0-psp/gcc/toplev.c
|
||||
--- gcc-4.1.0/gcc/toplev.c Sat Feb 4 22:13:20 2006
|
||||
+++ gcc-4.1.0-psp/gcc/toplev.c Sun May 7 22:34:29 2006
|
||||
@@ -82,6 +82,7 @@
|
||||
#include "value-prof.h"
|
||||
#include "alloc-pool.h"
|
||||
#include "tree-mudflap.h"
|
||||
+#include "prefix.h"
|
||||
|
||||
#if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
|
||||
#include "dwarf2out.h"
|
||||
@@ -1434,6 +1435,10 @@
|
||||
progname = p;
|
||||
|
||||
xmalloc_set_program_name (progname);
|
||||
+
|
||||
+ p = getenv("GCC_EXEC_PREFIX");
|
||||
+ set_std_prefix (p, strlen(p));
|
||||
+
|
||||
|
||||
hex_init ();
|
||||
|
||||
diff -Nbaur gcc-4.1.0/gcc/version.c gcc-4.1.0-psp/gcc/version.c
|
||||
--- gcc-4.1.0/gcc/version.c Wed Mar 16 06:04:10 2005
|
||||
+++ gcc-4.1.0-psp/gcc/version.c Sun May 7 22:37:23 2006
|
||||
@@ -8,7 +8,7 @@
|
||||
in parentheses. You may also wish to include a number indicating
|
||||
the revision of your modified compiler. */
|
||||
|
||||
-#define VERSUFFIX ""
|
||||
+#define VERSUFFIX " (PSPDEV 20060507)"
|
||||
|
||||
/* This is the location of the online document giving instructions for
|
||||
reporting bugs. If you distribute a modified version of GCC,
|
||||
@@ -17,7 +17,7 @@
|
||||
forward us bugs reported to you, if you determine that they are
|
||||
not bugs in your modifications.) */
|
||||
|
||||
-const char bug_report_url[] = "<URL:http://gcc.gnu.org/bugs.html>";
|
||||
+const char bug_report_url[] = "<URL:http://devkitpro.sourceforge.net/bugs.shtml>";
|
||||
|
||||
/* The complete version string, assembled from several pieces.
|
||||
BASEVER, DATESTAMP, and DEVPHASE are defined by the Makefile. */
|
||||
8016
dkpsp/patches/newlib-1.14.0.patch
Normal file
8016
dkpsp/patches/newlib-1.14.0.patch
Normal file
File diff suppressed because it is too large
Load Diff
|
|
@ -57,6 +57,7 @@ cd pspsdk
|
|||
./configure || { echo "ERROR RUNNING PSPSDK CONFIGURE"; exit 1; }
|
||||
$MAKE install-data || { echo "ERROR INSTALLING PSPSDK HEADERS"; exit 1; }
|
||||
|
||||
cd $BUILDSCRIPTDIR
|
||||
|
||||
#---------------------------------------------------------------------------------
|
||||
# build and install newlib
|
||||
|
|
|
|||
Loading…
Reference in New Issue
Block a user