diff --git a/dkarm-eabi/patches/gdb-6.6.patch b/dkarm-eabi/patches/gdb-6.6.patch new file mode 100644 index 0000000..aca936c --- /dev/null +++ b/dkarm-eabi/patches/gdb-6.6.patch @@ -0,0 +1,556 @@ +diff -Nbaur gdb-6.6/configure gdb-6.6-mingw/configure +--- gdb-6.6/configure Tue Nov 14 23:26:39 2006 ++++ gdb-6.6-mingw/configure Tue Jun 12 18:33:14 2007 +@@ -3271,7 +3271,7 @@ + + # Host dirs don't like to share a cache file either, horribly enough. + # This seems to be due to autoconf 2.5x stupidity. +-host_configargs="--cache-file=./config.cache --build=${build_alias} --host=${host_alias} --target=${target_alias} ${extra_host_args} ${baseargs}" ++host_configargs="${cache_file_option} --build=${build_alias} --host=${host_alias} --target=${target_alias} ${extra_host_args} ${baseargs}" + + target_configargs=${baseargs} + +diff -Nbaur gdb-6.6/configure.in gdb-6.6-mingw/configure.in +--- gdb-6.6/configure.in Mon Dec 18 07:22:58 2006 ++++ gdb-6.6-mingw/configure.in Tue Jun 12 18:33:14 2007 +@@ -2024,7 +2024,7 @@ + + # Host dirs don't like to share a cache file either, horribly enough. + # This seems to be due to autoconf 2.5x stupidity. +-host_configargs="--cache-file=./config.cache --build=${build_alias} --host=${host_alias} --target=${target_alias} ${extra_host_args} ${baseargs}" ++host_configargs="${cache_file_option} --build=${build_alias} --host=${host_alias} --target=${target_alias} ${extra_host_args} ${baseargs}" + + target_configargs=${baseargs} + +diff -Nbaur gdb-6.6/gdb/Makefile.in gdb-6.6-mingw/gdb/Makefile.in +--- gdb-6.6/gdb/Makefile.in Fri Nov 24 19:54:14 2006 ++++ gdb-6.6-mingw/gdb/Makefile.in Tue Jun 12 18:33:14 2007 +@@ -2983,7 +2983,7 @@ + insight$(EXEEXT): gdbtk-main.o libgdb.a $(ADD_DEPS) \ + $(CDEPS) $(TDEPLIBS) + rm -f insight$(EXEEXT) +- $(CC_LD) $(INTERNAL_LDFLAGS) $(WIN32LDAPP) \ ++ $(CC_LD) -mwindows $(INTERNAL_LDFLAGS) $(WIN32LDAPP) \ + -o insight$(EXEEXT) gdbtk-main.o libgdb.a \ + $(TDEPLIBS) $(TUI_LIBRARY) $(CLIBS) $(LOADLIBES) + +diff -Nbaur gdb-6.6/gdb/config/i386/mingw.mh gdb-6.6-mingw/gdb/config/i386/mingw.mh +--- gdb-6.6/gdb/config/i386/mingw.mh Thu Jan 1 00:00:00 1970 ++++ gdb-6.6-mingw/gdb/config/i386/mingw.mh Tue Jun 12 18:33:15 2007 +@@ -0,0 +1,5 @@ ++MH_CFLAGS=-D_POSIX_ ++XM_FILE=xm-mingw32.h ++NATDEPFILES= i386-nat.o win32-nat.o corelow.o ++NAT_FILE=nm-mingw32.h ++XM_CLIBS= +diff -Nbaur gdb-6.6/gdb/config/i386/mingw.mt gdb-6.6-mingw/gdb/config/i386/mingw.mt +--- gdb-6.6/gdb/config/i386/mingw.mt Thu Jan 1 00:00:00 1970 ++++ gdb-6.6-mingw/gdb/config/i386/mingw.mt Tue Jun 12 18:33:15 2007 +@@ -0,0 +1,4 @@ ++# Target: Intel x86 running Win32 (MinGW) ++TDEPFILES= i386-tdep.o i386-win32-tdep.o i387-tdep.o ++DEPRECATED_TM_FILE= tm-mingw32.h ++GDBSERVER_DEPFILES= +diff -Nbaur gdb-6.6/gdb/config/i386/nm-mingw32.h gdb-6.6-mingw/gdb/config/i386/nm-mingw32.h +--- gdb-6.6/gdb/config/i386/nm-mingw32.h Thu Jan 1 00:00:00 1970 ++++ gdb-6.6-mingw/gdb/config/i386/nm-mingw32.h Tue Jun 12 18:33:15 2007 +@@ -0,0 +1,38 @@ ++/* Native definitions for Intel x86 running MinGW. ++ Copyright (C) 2002 Free Software Foundation, Inc. ++ ++ This file is part of GDB. ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, write to the Free Software ++ Foundation, Inc., 59 Temple Place - Suite 330, ++ Boston, MA 02111-1307, USA. */ ++ ++#define NO_PTRACE_H ++ ++#define I386_USE_GENERIC_WATCHPOINTS ++ ++#include "i386/nm-i386.h" ++ ++/* Support for hardware-assisted breakpoints and watchpoints. */ ++ ++#define I386_DR_LOW_SET_CONTROL(VAL) cygwin_set_dr7 (VAL) ++extern void cygwin_set_dr7 (unsigned); ++ ++#define I386_DR_LOW_SET_ADDR(N,ADDR) cygwin_set_dr (N,ADDR) ++extern void cygwin_set_dr (int, CORE_ADDR); ++ ++#define I386_DR_LOW_RESET_ADDR(N) ++ ++#define I386_DR_LOW_GET_STATUS() cygwin_get_dr6 () ++extern unsigned cygwin_get_dr6 (void); +diff -Nbaur gdb-6.6/gdb/config/i386/tm-mingw32.h gdb-6.6-mingw/gdb/config/i386/tm-mingw32.h +--- gdb-6.6/gdb/config/i386/tm-mingw32.h Thu Jan 1 00:00:00 1970 ++++ gdb-6.6-mingw/gdb/config/i386/tm-mingw32.h Tue Jun 12 18:33:15 2007 +@@ -0,0 +1,21 @@ ++/* Macro definitions for i386 running under Win32. ++ Copyright 1999 Free Software Foundation, Inc. ++ ++ This file is part of GDB. ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, write to the Free Software ++ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ ++ ++#include "i386/tm-cygwin.h" ++ +diff -Nbaur gdb-6.6/gdb/config/i386/xm-mingw32.h gdb-6.6-mingw/gdb/config/i386/xm-mingw32.h +--- gdb-6.6/gdb/config/i386/xm-mingw32.h Thu Jan 1 00:00:00 1970 ++++ gdb-6.6-mingw/gdb/config/i386/xm-mingw32.h Tue Jun 12 18:33:15 2007 +@@ -0,0 +1,25 @@ ++/* Definitions for hosting on WIN32, building with MinGW, for GDB. ++ Copyright 1999 Free Software Foundation, Inc. ++ ++This file is part of GDB. ++ ++This program is free software; you can redistribute it and/or modify ++it under the terms of the GNU General Public License as published by ++the Free Software Foundation; either version 2 of the License, or ++(at your option) any later version. ++ ++This program is distributed in the hope that it will be useful, ++but WITHOUT ANY WARRANTY; without even the implied warranty of ++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++GNU General Public License for more details. ++ ++You should have received a copy of the GNU General Public License ++along with this program; if not, write to the Free Software ++Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ ++ ++#include "fopen-bin.h" ++#define getkey getch ++#define DIRNAME_SEPARATOR ';' ++ ++/* Define this if source files use \r\n rather than just \n. */ ++#define CRLF_SOURCE_FILES +diff -Nbaur gdb-6.6/gdb/defs.h gdb-6.6-mingw/gdb/defs.h +--- gdb-6.6/gdb/defs.h Thu Sep 21 14:50:51 2006 ++++ gdb-6.6-mingw/gdb/defs.h Tue Jun 12 18:33:15 2007 +@@ -1167,7 +1167,7 @@ + /* FIXME, this doesn't work very well if host and executable + filesystems conventions are different. */ + +-#ifdef __MSDOS__ ++#if defined(__MSDOS__) || (!defined (__CYGWIN__) && defined (_WIN32)) + # define CANT_FORK + # define GLOBAL_CURDIR + # define DIRNAME_SEPARATOR ';' +diff -Nbaur gdb-6.6/gdb/tui/tui-io.c gdb-6.6-mingw/gdb/tui/tui-io.c +--- gdb-6.6/gdb/tui/tui-io.c Fri Dec 23 19:10:02 2005 ++++ gdb-6.6-mingw/gdb/tui/tui-io.c Tue Jun 12 18:33:24 2007 +@@ -113,8 +113,11 @@ + + /* For gdb 5.3, prefer to continue the pipe hack as a backup wheel. */ + #define TUI_USE_PIPE_FOR_READLINE +-/*#undef TUI_USE_PIPE_FOR_READLINE*/ + ++/* but remove for mingw host */ ++#ifdef __MINGW32__ ++#undef TUI_USE_PIPE_FOR_READLINE ++#endif + /* TUI output files. */ + static struct ui_file *tui_stdout; + static struct ui_file *tui_stderr; +diff -Nbaur gdb-6.6/gdb/win32-nat.c gdb-6.6-mingw/gdb/win32-nat.c +--- gdb-6.6/gdb/win32-nat.c Mon May 22 00:04:39 2006 ++++ gdb-6.6-mingw/gdb/win32-nat.c Tue Jun 12 18:33:24 2007 +@@ -43,7 +43,11 @@ + #include + #include + #include ++ ++#if defined (__CYGWIN__) + #include ++#endif /* __CYGWIN__ */ ++ + #include + + #include "buildsym.h" +@@ -81,7 +85,65 @@ + CONTEXT_DEBUGGER = (CONTEXT_FULL | CONTEXT_FLOATING_POINT) + }; + #endif +-#include ++#ifndef __MINGW32__ ++ #include ++#else ++ #define NOTE_INFO_PROCESS 1 ++ #define NOTE_INFO_THREAD 2 ++ #define NOTE_INFO_MODULE 3 ++ ++ struct win32_core_process_info ++ { ++ DWORD pid; ++ int signal; ++ int command_line_size; ++ char command_line[1]; ++ } ++ #ifdef __GNUC__ ++ __attribute__ ((packed)) ++ #endif ++ ; ++ ++ struct win32_core_thread_info ++ { ++ DWORD tid; ++ BOOL is_active_thread; ++ CONTEXT thread_context; ++ } ++ #ifdef __GNUC__ ++ __attribute__ ((packed)) ++ #endif ++ ; ++ ++ struct win32_core_module_info ++ { ++ void* base_address; ++ int module_name_size; ++ char module_name[1]; ++ } ++ #ifdef __GNUC__ ++ __attribute__ ((packed)) ++ #endif ++ ; ++ ++ struct win32_pstatus ++ { ++ unsigned long data_type; ++ union ++ { ++ struct win32_core_process_info process_info; ++ struct win32_core_thread_info thread_info; ++ struct win32_core_module_info module_info; ++ } data ; ++ } ++ #ifdef __GNUC__ ++ __attribute__ ((packed)) ++ #endif ++ ; ++ ++ typedef struct win32_pstatus win32_pstatus_t ; ++ ++#endif + #include + + #define CONTEXT_DEBUGGER_DR CONTEXT_DEBUGGER | CONTEXT_DEBUG_REGISTERS \ +@@ -446,30 +508,23 @@ + static BOOL WINAPI (*psapi_GetModuleInformation) (HANDLE, HMODULE, LPMODULEINFO, DWORD) = NULL; + static DWORD WINAPI (*psapi_GetModuleFileNameExA) (HANDLE, HMODULE, LPSTR, DWORD) = NULL; + +-static int +-psapi_get_dll_name (DWORD BaseAddress, char *dll_name_ret) +-{ +- DWORD len; +- MODULEINFO mi; +- int i; +- HMODULE dh_buf[1]; +- HMODULE *DllHandle = dh_buf; +- DWORD cbNeeded; +- BOOL ok; + ++BOOL ++load_psapi () ++{ + if (!psapi_loaded || + psapi_EnumProcessModules == NULL || + psapi_GetModuleInformation == NULL || + psapi_GetModuleFileNameExA == NULL) + { + if (psapi_loaded) +- goto failed; ++ return FALSE; + psapi_loaded = 1; + psapi_module_handle = LoadLibrary ("psapi.dll"); + if (!psapi_module_handle) + { + /* printf_unfiltered ("error loading psapi.dll: %u", GetLastError ()); */ +- goto failed; ++ return FALSE; + } + psapi_EnumProcessModules = GetProcAddress (psapi_module_handle, "EnumProcessModules"); + psapi_GetModuleInformation = GetProcAddress (psapi_module_handle, "GetModuleInformation"); +@@ -478,8 +533,24 @@ + if (psapi_EnumProcessModules == NULL || + psapi_GetModuleInformation == NULL || + psapi_GetModuleFileNameExA == NULL) +- goto failed; ++ return FALSE; + } ++ return TRUE; ++} ++ ++int ++psapi_get_dll_name (DWORD BaseAddress, char *dll_name_ret) ++{ ++ DWORD len; ++ MODULEINFO mi; ++ int i; ++ HMODULE dh_buf[1]; ++ HMODULE *DllHandle = dh_buf; ++ DWORD cbNeeded; ++ BOOL ok; ++ ++ if (!load_psapi ()) ++ goto failed; + + cbNeeded = 0; + ok = (*psapi_EnumProcessModules) (current_process_handle, +@@ -507,14 +578,14 @@ + DllHandle[i], + &mi, + sizeof (mi))) +- error (_("Can't get module info")); ++ error ("Can't get module info"); + + len = (*psapi_GetModuleFileNameExA) (current_process_handle, + DllHandle[i], + dll_name_ret, + MAX_PATH); + if (len == 0) +- error (_("Error getting dll name: %u."), (unsigned) GetLastError ()); ++ error ("Error getting dll name: %u\n", (unsigned) GetLastError ()); + + if ((DWORD) (mi.lpBaseOfDll) == BaseAddress) + return 1; +@@ -525,6 +596,30 @@ + return 0; + } + ++int ++psapi_get_module_filename (HANDLE hProcess, ++ HMODULE hModule, ++ LPTSTR lpFilename, ++ DWORD nSize) ++{ ++ DWORD len; ++ ++ if (!load_psapi ()) ++ goto failed; ++ ++ len = (*psapi_GetModuleFileNameExA) (hProcess, ++ hModule, ++ lpFilename, ++ nSize); ++ if (len == 0) ++ error ("Error getting file name: %u\n", (unsigned) GetLastError ()); ++ ++failed: ++ lpFilename[0] = '\0'; ++ return 0; ++} ++ ++ + /* Encapsulate the information required in a call to + symbol_file_add_args */ + struct safe_symbol_file_add_args +@@ -753,7 +848,13 @@ + so = XZALLOC (struct so_list); + so->lm_info = (struct lm_info *) xmalloc (sizeof (struct lm_info)); + so->lm_info->load_addr = load_addr; ++ ++#ifdef __CYGWIN__ + cygwin_conv_to_posix_path (buf, so->so_name); ++#else ++ strcpy( so->so_name, buf); ++#endif ++ + strcpy (so->so_original_name, so->so_name); + + solib_end->next = so; +@@ -1734,6 +1835,7 @@ + + if (!ok) + { ++#ifdef __CYGWIN__ + /* Try fall back to Cygwin pid */ + pid = cygwin_internal (CW_CYGWIN_PID_TO_WINPID, pid); + +@@ -1741,6 +1843,7 @@ + ok = DebugActiveProcess (pid); + + if (!ok) ++#endif /* __CYGWIN__ */ + error (_("Can't attach to process.")); + } + +@@ -1800,13 +1903,14 @@ + static char * + win32_pid_to_exec_file (int pid) + { ++ static char path[MAX_PATH + 1]; ++ char *path_ptr = NULL; ++#ifdef __CYGWIN__ + /* Try to find the process path using the Cygwin internal process list + pid isn't a valid pid, unfortunately. Use current_event.dwProcessId + instead. */ + /* TODO: Also find native Windows processes using CW_GETPINFO_FULL. */ + +- static char path[MAX_PATH + 1]; +- char *path_ptr = NULL; + int cpid; + struct external_pinfo *pinfo; + +@@ -1824,6 +1928,13 @@ + } + } + cygwin_internal (CW_UNLOCK_PINFO); ++#else ++ if (!psapi_get_module_filename (current_process_handle, NULL, path, MAX_PATH)) ++ printf_unfiltered ("error reading the process's file name: %lu", ++ GetLastError ()); ++ else ++ path_ptr = path; ++#endif + return path_ptr; + } + +@@ -1873,8 +1984,16 @@ + char *toexec; + char shell[MAX_PATH + 1]; /* Path to shell */ + const char *sh; ++#if defined (__MINGW32__) ++ /* BEGIN: Fragment of Al Stevens's patch for GDB on Win9x */ ++ HANDLE hStdInput = 0; ++ HANDLE hStdOutput = 0; ++ HANDLE hStdError = 0; ++ /* END: Fragment of Al Stevens's patch for GDB on Win9x */ ++#else /* !__MINGW32__ */ + int tty; + int ostdin, ostdout, ostderr; ++#endif /* !__MINGW32__ */ + const char *inferior_io_terminal = get_inferior_io_terminal (); + + if (!exec_file) +@@ -1886,7 +2005,12 @@ + if (!useshell) + { + flags = DEBUG_ONLY_THIS_PROCESS; ++#ifdef __CYGWIN__ + cygwin_conv_to_win32_path (exec_file, real_path); ++#else ++ strcpy (real_path, exec_file); ++#endif ++ + toexec = real_path; + } + else +@@ -1895,7 +2019,11 @@ + sh = getenv ("SHELL"); + if (!sh) + sh = "/bin/sh"; ++#ifdef __CYGWIN__ + cygwin_conv_to_win32_path (sh, shell); ++#else ++ strcpy (shell, sh); ++#endif + newallargs = alloca (sizeof (" -c 'exec '") + strlen (exec_file) + + strlen (allargs) + 2); + sprintf (newallargs, " -c 'exec %s %s'", exec_file, allargs); +@@ -1946,10 +2074,12 @@ + len = strlen (conv_path_names[j]); + if (strncmp (conv_path_names[j], in_env[i], len) == 0) + { +- if (cygwin_posix_path_list_p (in_env[i] + len)) ++#ifdef __CYGWIN__ ++ if (cygwin_posix_path_list_p (env[i] + len)) + envlen += len +- + cygwin_posix_to_win32_path_list_buf_size (in_env[i] + len); ++ + cygwin_posix_to_win32_path_list_buf_size (env[i] + len); + else ++#endif + envlen += strlen (in_env[i]) + 1; + break; + } +@@ -1976,12 +2106,14 @@ + len = strlen (conv_path_names[j]); + if (strncmp (conv_path_names[j], env[i], len) == 0) + { ++#ifdef __CYGWIN__ + if (cygwin_posix_path_list_p (env[i] + len)) + { + memcpy (temp, env[i], len); + cygwin_posix_to_win32_path_list (env[i] + len, temp + len); + } + else ++#endif + strcpy (temp, env[i]); + break; + } +@@ -1996,6 +2128,20 @@ + *temp = 0; + } + ++#if defined (__MINGW32__) ++ /* BEGIN: Fragment of Al Stevens's patch for GDB on Win9x */ ++ if ( new_console) ++ { ++ hStdInput = GetStdHandle( STD_INPUT_HANDLE); ++ hStdOutput = GetStdHandle( STD_OUTPUT_HANDLE); ++ hStdError = GetStdHandle( STD_ERROR_HANDLE); ++ ++ SetStdHandle( STD_INPUT_HANDLE, INVALID_HANDLE_VALUE); ++ SetStdHandle( STD_OUTPUT_HANDLE, INVALID_HANDLE_VALUE); ++ SetStdHandle( STD_ERROR_HANDLE, INVALID_HANDLE_VALUE); ++ } ++ /* END: Fragment of Al Stevens's patch for GDB on Win9x */ ++#else /* !__MINGW32__ */ + if (!inferior_io_terminal) + tty = ostdin = ostdout = ostderr = -1; + else +@@ -2016,6 +2162,7 @@ + dup2 (tty, 2); + } + } ++#endif /* !__MINGW32__ */ + + win32_init_thread_list (); + ret = CreateProcess (0, +@@ -2028,6 +2175,16 @@ + NULL, /* current directory */ + &si, + &pi); ++#if defined (__MINGW32__) ++ /* BEGIN: Fragment of Al Stevens's patch for GDB on Win9x */ ++ if ( new_console) ++ { ++ SetStdHandle( STD_INPUT_HANDLE, hStdInput); ++ SetStdHandle( STD_OUTPUT_HANDLE, hStdOutput); ++ SetStdHandle( STD_ERROR_HANDLE, hStdError); ++ } ++ /* END: Fragment of Al Stevens's patch for GDB on Win9x */ ++#else /* !__MINGW32__ */ + if (tty >= 0) + { + close (tty); +@@ -2038,6 +2195,7 @@ + close (ostdout); + close (ostderr); + } ++#endif /* !__MINGW32__ */ + + if (!ret) + error (_("Error creating process %s, (error %d)."), diff --git a/dkpsp/patches/gdb-6.6.patch b/dkpsp/patches/gdb-6.6.patch new file mode 100644 index 0000000..0c603e9 --- /dev/null +++ b/dkpsp/patches/gdb-6.6.patch @@ -0,0 +1,2209 @@ +diff -Nbaur gdb-6.6/bfd/archures.c gdb-6.6-psp/bfd/archures.c +--- gdb-6.6/bfd/archures.c Wed Oct 25 07:49:20 2006 ++++ gdb-6.6-psp/bfd/archures.c Fri Jun 15 16:17:50 2007 +@@ -162,6 +162,7 @@ + .#define bfd_mach_mips16 16 + .#define bfd_mach_mips5 5 + .#define bfd_mach_mips_sb1 12310201 {* octal 'SB', 01 *} ++.#define bfd_mach_mips_allegrex 10111431 {* octal 'AL', 31 *} + .#define bfd_mach_mipsisa32 32 + .#define bfd_mach_mipsisa32r2 33 + .#define bfd_mach_mipsisa64 64 +diff -Nbaur gdb-6.6/bfd/bfd-in2.h gdb-6.6-psp/bfd/bfd-in2.h +--- gdb-6.6/bfd/bfd-in2.h Mon Nov 13 20:39:21 2006 ++++ gdb-6.6-psp/bfd/bfd-in2.h Fri Jun 15 16:17:50 2007 +@@ -1791,6 +1791,7 @@ + #define bfd_mach_mips16 16 + #define bfd_mach_mips5 5 + #define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01 */ ++#define bfd_mach_mips_allegrex 10111431 /* octal 'AL', 31 */ + #define bfd_mach_mipsisa32 32 + #define bfd_mach_mipsisa32r2 33 + #define bfd_mach_mipsisa64 64 +diff -Nbaur gdb-6.6/bfd/cpu-mips.c gdb-6.6-psp/bfd/cpu-mips.c +--- gdb-6.6/bfd/cpu-mips.c Wed May 4 16:53:06 2005 ++++ gdb-6.6-psp/bfd/cpu-mips.c Fri Jun 15 16:17:50 2007 +@@ -86,6 +86,7 @@ + I_mipsisa64, + I_mipsisa64r2, + I_sb1, ++ I_allegrex, + }; + + #define NN(index) (&arch_info_struct[(index) + 1]) +@@ -118,7 +119,8 @@ + N (32, 32, bfd_mach_mipsisa32r2,"mips:isa32r2", FALSE, NN(I_mipsisa32r2)), + N (64, 64, bfd_mach_mipsisa64, "mips:isa64", FALSE, NN(I_mipsisa64)), + N (64, 64, bfd_mach_mipsisa64r2,"mips:isa64r2", FALSE, NN(I_mipsisa64r2)), +- N (64, 64, bfd_mach_mips_sb1, "mips:sb1", FALSE, 0), ++ N (64, 64, bfd_mach_mips_sb1, "mips:sb1", FALSE, NN(I_sb1)), ++ N (32, 32, bfd_mach_mips_allegrex, "mips:allegrex", FALSE, 0), + }; + + /* The default architecture is mips:3000, but with a machine number of +diff -Nbaur gdb-6.6/bfd/doc/bfd.info gdb-6.6-psp/bfd/doc/bfd.info +--- gdb-6.6/bfd/doc/bfd.info Mon Dec 18 07:22:55 2006 ++++ gdb-6.6-psp/bfd/doc/bfd.info Fri Jun 15 16:23:15 2007 +@@ -1,5 +1,6 @@ +-This is ../.././bfd/doc/bfd.info, produced by makeinfo version 4.8 from +-../.././bfd/doc/bfd.texinfo. ++This is ../../../../../gdb-6.6-psp/bfd/doc/bfd.info, produced by ++makeinfo version 4.8 from ++../../../../../gdb-6.6-psp/bfd/doc/bfd.texinfo. + + START-INFO-DIR-ENTRY + * Bfd: (bfd). The Binary File Descriptor library. +@@ -10445,67 +10446,67 @@ + +  + Tag Table: +-Node: Top730 +-Node: Overview1069 +-Node: History2120 +-Node: How It Works3066 +-Node: What BFD Version 2 Can Do4609 +-Node: BFD information loss5924 +-Node: Canonical format8456 +-Node: BFD front end12828 +-Node: Memory Usage39748 +-Node: Initialization40976 +-Node: Sections41435 +-Node: Section Input41918 +-Node: Section Output43283 +-Node: typedef asection45769 +-Node: section prototypes70370 +-Node: Symbols80050 +-Node: Reading Symbols81645 +-Node: Writing Symbols82752 +-Node: Mini Symbols84461 +-Node: typedef asymbol85435 +-Node: symbol handling functions90353 +-Node: Archives95695 +-Node: Formats99421 +-Node: Relocations102369 +-Node: typedef arelent103096 +-Node: howto manager118907 +-Node: Core Files184002 +-Node: Targets185819 +-Node: bfd_target187789 +-Node: Architectures207965 +-Node: Opening and Closing229606 +-Node: Internal240608 +-Node: File Caching246941 +-Node: Linker Functions248855 +-Node: Creating a Linker Hash Table250528 +-Node: Adding Symbols to the Hash Table252266 +-Node: Differing file formats253166 +-Node: Adding symbols from an object file254914 +-Node: Adding symbols from an archive257065 +-Node: Performing the Final Link259479 +-Node: Information provided by the linker260721 +-Node: Relocating the section contents261875 +-Node: Writing the symbol table263626 +-Node: Hash Tables266668 +-Node: Creating and Freeing a Hash Table267866 +-Node: Looking Up or Entering a String269116 +-Node: Traversing a Hash Table270369 +-Node: Deriving a New Hash Table Type271158 +-Node: Define the Derived Structures272224 +-Node: Write the Derived Creation Routine273305 +-Node: Write Other Derived Routines275929 +-Node: BFD back ends277244 +-Node: What to Put Where277514 +-Node: aout277694 +-Node: coff284012 +-Node: elf308489 +-Node: mmo309352 +-Node: File layout310280 +-Node: Symbol-table315927 +-Node: mmo section mapping319696 +-Node: GNU Free Documentation License323348 +-Node: BFD Index343077 ++Node: Top768 ++Node: Overview1107 ++Node: History2158 ++Node: How It Works3104 ++Node: What BFD Version 2 Can Do4647 ++Node: BFD information loss5962 ++Node: Canonical format8494 ++Node: BFD front end12866 ++Node: Memory Usage39786 ++Node: Initialization41014 ++Node: Sections41473 ++Node: Section Input41956 ++Node: Section Output43321 ++Node: typedef asection45807 ++Node: section prototypes70408 ++Node: Symbols80088 ++Node: Reading Symbols81683 ++Node: Writing Symbols82790 ++Node: Mini Symbols84499 ++Node: typedef asymbol85473 ++Node: symbol handling functions90391 ++Node: Archives95733 ++Node: Formats99459 ++Node: Relocations102407 ++Node: typedef arelent103134 ++Node: howto manager118945 ++Node: Core Files184040 ++Node: Targets185857 ++Node: bfd_target187827 ++Node: Architectures208003 ++Node: Opening and Closing229644 ++Node: Internal240646 ++Node: File Caching246979 ++Node: Linker Functions248893 ++Node: Creating a Linker Hash Table250566 ++Node: Adding Symbols to the Hash Table252304 ++Node: Differing file formats253204 ++Node: Adding symbols from an object file254952 ++Node: Adding symbols from an archive257103 ++Node: Performing the Final Link259517 ++Node: Information provided by the linker260759 ++Node: Relocating the section contents261913 ++Node: Writing the symbol table263664 ++Node: Hash Tables266706 ++Node: Creating and Freeing a Hash Table267904 ++Node: Looking Up or Entering a String269154 ++Node: Traversing a Hash Table270407 ++Node: Deriving a New Hash Table Type271196 ++Node: Define the Derived Structures272262 ++Node: Write the Derived Creation Routine273343 ++Node: Write Other Derived Routines275967 ++Node: BFD back ends277282 ++Node: What to Put Where277552 ++Node: aout277732 ++Node: coff284050 ++Node: elf308527 ++Node: mmo309390 ++Node: File layout310318 ++Node: Symbol-table315965 ++Node: mmo section mapping319734 ++Node: GNU Free Documentation License323386 ++Node: BFD Index343115 +  + End Tag Table +diff -Nbaur gdb-6.6/bfd/elfxx-mips.c gdb-6.6-psp/bfd/elfxx-mips.c +--- gdb-6.6/bfd/elfxx-mips.c Fri Nov 3 00:58:10 2006 ++++ gdb-6.6-psp/bfd/elfxx-mips.c Fri Jun 15 16:17:50 2007 +@@ -5012,6 +5012,9 @@ + case E_MIPS_MACH_SB1: + return bfd_mach_mips_sb1; + ++ case E_MIPS_MACH_ALLEGREX: ++ return bfd_mach_mips_allegrex; ++ + default: + switch (flags & EF_MIPS_ARCH) + { +@@ -9124,6 +9127,10 @@ + val = E_MIPS_ARCH_64 | E_MIPS_MACH_SB1; + break; + ++ case bfd_mach_mips_allegrex: ++ val = E_MIPS_ARCH_2 | E_MIPS_MACH_ALLEGREX; ++ break; ++ + case bfd_mach_mipsisa32: + val = E_MIPS_ARCH_32; + break; +@@ -10881,6 +10888,7 @@ + /* MIPS II extensions. */ + { bfd_mach_mips4000, bfd_mach_mips6000 }, + { bfd_mach_mipsisa32, bfd_mach_mips6000 }, ++ { bfd_mach_mips_allegrex, bfd_mach_mips6000 }, + + /* MIPS I extensions. */ + { bfd_mach_mips6000, bfd_mach_mips3000 }, +diff -Nbaur gdb-6.6/config.sub gdb-6.6-psp/config.sub +--- gdb-6.6/config.sub Tue Sep 26 06:22:50 2006 ++++ gdb-6.6-psp/config.sub Fri Jun 15 16:17:50 2007 +@@ -267,6 +267,7 @@ + | mipsisa64sb1 | mipsisa64sb1el \ + | mipsisa64sr71k | mipsisa64sr71kel \ + | mipstx39 | mipstx39el \ ++ | mipsallegrex | mipsallegrexel \ + | mn10200 | mn10300 \ + | mt \ + | msp430 \ +@@ -348,6 +349,7 @@ + | mipsisa64sb1-* | mipsisa64sb1el-* \ + | mipsisa64sr71k-* | mipsisa64sr71kel-* \ + | mipstx39-* | mipstx39el-* \ ++ | mipsallegrex-* | mipsallegrexel-* \ + | mmix-* \ + | mt-* \ + | msp430-* \ +@@ -689,6 +691,10 @@ + *mint | -mint[0-9]* | *MiNT | *MiNT[0-9]*) + basic_machine=m68k-atari + os=-mint ++ ;; ++ psp) ++ basic_machine=mipsallegrexel-psp ++ os=-elf + ;; + mips3*-*) + basic_machine=`echo $basic_machine | sed -e 's/mips3/mips64/'` +diff -Nbaur gdb-6.6/configure gdb-6.6-psp/configure +--- gdb-6.6/configure Tue Nov 14 23:26:39 2006 ++++ gdb-6.6-psp/configure Fri Jun 15 16:14:32 2007 +@@ -3271,7 +3271,7 @@ + + # Host dirs don't like to share a cache file either, horribly enough. + # This seems to be due to autoconf 2.5x stupidity. +-host_configargs="--cache-file=./config.cache --build=${build_alias} --host=${host_alias} --target=${target_alias} ${extra_host_args} ${baseargs}" ++host_configargs="${cache_file_option} --build=${build_alias} --host=${host_alias} --target=${target_alias} ${extra_host_args} ${baseargs}" + + target_configargs=${baseargs} + +diff -Nbaur gdb-6.6/configure.in gdb-6.6-psp/configure.in +--- gdb-6.6/configure.in Mon Dec 18 07:22:58 2006 ++++ gdb-6.6-psp/configure.in Fri Jun 15 16:14:32 2007 +@@ -2024,7 +2024,7 @@ + + # Host dirs don't like to share a cache file either, horribly enough. + # This seems to be due to autoconf 2.5x stupidity. +-host_configargs="--cache-file=./config.cache --build=${build_alias} --host=${host_alias} --target=${target_alias} ${extra_host_args} ${baseargs}" ++host_configargs="${cache_file_option} --build=${build_alias} --host=${host_alias} --target=${target_alias} ${extra_host_args} ${baseargs}" + + target_configargs=${baseargs} + +diff -Nbaur gdb-6.6/gdb/Makefile.in gdb-6.6-psp/gdb/Makefile.in +--- gdb-6.6/gdb/Makefile.in Fri Nov 24 19:54:14 2006 ++++ gdb-6.6-psp/gdb/Makefile.in Fri Jun 15 16:14:32 2007 +@@ -2983,7 +2983,7 @@ + insight$(EXEEXT): gdbtk-main.o libgdb.a $(ADD_DEPS) \ + $(CDEPS) $(TDEPLIBS) + rm -f insight$(EXEEXT) +- $(CC_LD) $(INTERNAL_LDFLAGS) $(WIN32LDAPP) \ ++ $(CC_LD) -mwindows $(INTERNAL_LDFLAGS) $(WIN32LDAPP) \ + -o insight$(EXEEXT) gdbtk-main.o libgdb.a \ + $(TDEPLIBS) $(TUI_LIBRARY) $(CLIBS) $(LOADLIBES) + +diff -Nbaur gdb-6.6/gdb/config/i386/mingw.mh gdb-6.6-psp/gdb/config/i386/mingw.mh +--- gdb-6.6/gdb/config/i386/mingw.mh Thu Jan 1 00:00:00 1970 ++++ gdb-6.6-psp/gdb/config/i386/mingw.mh Fri Jun 15 16:14:33 2007 +@@ -0,0 +1,5 @@ ++MH_CFLAGS=-D_POSIX_ ++XM_FILE=xm-mingw32.h ++NATDEPFILES= i386-nat.o win32-nat.o corelow.o ++NAT_FILE=nm-mingw32.h ++XM_CLIBS= +diff -Nbaur gdb-6.6/gdb/config/i386/mingw.mt gdb-6.6-psp/gdb/config/i386/mingw.mt +--- gdb-6.6/gdb/config/i386/mingw.mt Thu Jan 1 00:00:00 1970 ++++ gdb-6.6-psp/gdb/config/i386/mingw.mt Fri Jun 15 16:14:33 2007 +@@ -0,0 +1,4 @@ ++# Target: Intel x86 running Win32 (MinGW) ++TDEPFILES= i386-tdep.o i386-win32-tdep.o i387-tdep.o ++DEPRECATED_TM_FILE= tm-mingw32.h ++GDBSERVER_DEPFILES= +diff -Nbaur gdb-6.6/gdb/config/i386/nm-mingw32.h gdb-6.6-psp/gdb/config/i386/nm-mingw32.h +--- gdb-6.6/gdb/config/i386/nm-mingw32.h Thu Jan 1 00:00:00 1970 ++++ gdb-6.6-psp/gdb/config/i386/nm-mingw32.h Fri Jun 15 16:14:33 2007 +@@ -0,0 +1,38 @@ ++/* Native definitions for Intel x86 running MinGW. ++ Copyright (C) 2002 Free Software Foundation, Inc. ++ ++ This file is part of GDB. ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, write to the Free Software ++ Foundation, Inc., 59 Temple Place - Suite 330, ++ Boston, MA 02111-1307, USA. */ ++ ++#define NO_PTRACE_H ++ ++#define I386_USE_GENERIC_WATCHPOINTS ++ ++#include "i386/nm-i386.h" ++ ++/* Support for hardware-assisted breakpoints and watchpoints. */ ++ ++#define I386_DR_LOW_SET_CONTROL(VAL) cygwin_set_dr7 (VAL) ++extern void cygwin_set_dr7 (unsigned); ++ ++#define I386_DR_LOW_SET_ADDR(N,ADDR) cygwin_set_dr (N,ADDR) ++extern void cygwin_set_dr (int, CORE_ADDR); ++ ++#define I386_DR_LOW_RESET_ADDR(N) ++ ++#define I386_DR_LOW_GET_STATUS() cygwin_get_dr6 () ++extern unsigned cygwin_get_dr6 (void); +diff -Nbaur gdb-6.6/gdb/config/i386/tm-mingw32.h gdb-6.6-psp/gdb/config/i386/tm-mingw32.h +--- gdb-6.6/gdb/config/i386/tm-mingw32.h Thu Jan 1 00:00:00 1970 ++++ gdb-6.6-psp/gdb/config/i386/tm-mingw32.h Fri Jun 15 16:14:33 2007 +@@ -0,0 +1,21 @@ ++/* Macro definitions for i386 running under Win32. ++ Copyright 1999 Free Software Foundation, Inc. ++ ++ This file is part of GDB. ++ ++ This program is free software; you can redistribute it and/or modify ++ it under the terms of the GNU General Public License as published by ++ the Free Software Foundation; either version 2 of the License, or ++ (at your option) any later version. ++ ++ This program is distributed in the hope that it will be useful, ++ but WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ GNU General Public License for more details. ++ ++ You should have received a copy of the GNU General Public License ++ along with this program; if not, write to the Free Software ++ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ ++ ++#include "i386/tm-cygwin.h" ++ +diff -Nbaur gdb-6.6/gdb/config/i386/xm-mingw32.h gdb-6.6-psp/gdb/config/i386/xm-mingw32.h +--- gdb-6.6/gdb/config/i386/xm-mingw32.h Thu Jan 1 00:00:00 1970 ++++ gdb-6.6-psp/gdb/config/i386/xm-mingw32.h Fri Jun 15 16:14:33 2007 +@@ -0,0 +1,25 @@ ++/* Definitions for hosting on WIN32, building with MinGW, for GDB. ++ Copyright 1999 Free Software Foundation, Inc. ++ ++This file is part of GDB. ++ ++This program is free software; you can redistribute it and/or modify ++it under the terms of the GNU General Public License as published by ++the Free Software Foundation; either version 2 of the License, or ++(at your option) any later version. ++ ++This program is distributed in the hope that it will be useful, ++but WITHOUT ANY WARRANTY; without even the implied warranty of ++MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++GNU General Public License for more details. ++ ++You should have received a copy of the GNU General Public License ++along with this program; if not, write to the Free Software ++Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ ++ ++#include "fopen-bin.h" ++#define getkey getch ++#define DIRNAME_SEPARATOR ';' ++ ++/* Define this if source files use \r\n rather than just \n. */ ++#define CRLF_SOURCE_FILES +diff -Nbaur gdb-6.6/gdb/defs.h gdb-6.6-psp/gdb/defs.h +--- gdb-6.6/gdb/defs.h Thu Sep 21 14:50:51 2006 ++++ gdb-6.6-psp/gdb/defs.h Fri Jun 15 16:14:33 2007 +@@ -1167,7 +1167,7 @@ + /* FIXME, this doesn't work very well if host and executable + filesystems conventions are different. */ + +-#ifdef __MSDOS__ ++#if defined(__MSDOS__) || (!defined (__CYGWIN__) && defined (_WIN32)) + # define CANT_FORK + # define GLOBAL_CURDIR + # define DIRNAME_SEPARATOR ';' +diff -Nbaur gdb-6.6/gdb/tui/tui-io.c gdb-6.6-psp/gdb/tui/tui-io.c +--- gdb-6.6/gdb/tui/tui-io.c Fri Dec 23 19:10:02 2005 ++++ gdb-6.6-psp/gdb/tui/tui-io.c Fri Jun 15 16:14:33 2007 +@@ -113,8 +113,11 @@ + + /* For gdb 5.3, prefer to continue the pipe hack as a backup wheel. */ + #define TUI_USE_PIPE_FOR_READLINE +-/*#undef TUI_USE_PIPE_FOR_READLINE*/ + ++/* but remove for mingw host */ ++#ifdef __MINGW32__ ++#undef TUI_USE_PIPE_FOR_READLINE ++#endif + /* TUI output files. */ + static struct ui_file *tui_stdout; + static struct ui_file *tui_stderr; +diff -Nbaur gdb-6.6/gdb/win32-nat.c gdb-6.6-psp/gdb/win32-nat.c +--- gdb-6.6/gdb/win32-nat.c Mon May 22 00:04:39 2006 ++++ gdb-6.6-psp/gdb/win32-nat.c Fri Jun 15 16:14:33 2007 +@@ -43,7 +43,11 @@ + #include + #include + #include ++ ++#if defined (__CYGWIN__) + #include ++#endif /* __CYGWIN__ */ ++ + #include + + #include "buildsym.h" +@@ -81,7 +85,65 @@ + CONTEXT_DEBUGGER = (CONTEXT_FULL | CONTEXT_FLOATING_POINT) + }; + #endif +-#include ++#ifndef __MINGW32__ ++ #include ++#else ++ #define NOTE_INFO_PROCESS 1 ++ #define NOTE_INFO_THREAD 2 ++ #define NOTE_INFO_MODULE 3 ++ ++ struct win32_core_process_info ++ { ++ DWORD pid; ++ int signal; ++ int command_line_size; ++ char command_line[1]; ++ } ++ #ifdef __GNUC__ ++ __attribute__ ((packed)) ++ #endif ++ ; ++ ++ struct win32_core_thread_info ++ { ++ DWORD tid; ++ BOOL is_active_thread; ++ CONTEXT thread_context; ++ } ++ #ifdef __GNUC__ ++ __attribute__ ((packed)) ++ #endif ++ ; ++ ++ struct win32_core_module_info ++ { ++ void* base_address; ++ int module_name_size; ++ char module_name[1]; ++ } ++ #ifdef __GNUC__ ++ __attribute__ ((packed)) ++ #endif ++ ; ++ ++ struct win32_pstatus ++ { ++ unsigned long data_type; ++ union ++ { ++ struct win32_core_process_info process_info; ++ struct win32_core_thread_info thread_info; ++ struct win32_core_module_info module_info; ++ } data ; ++ } ++ #ifdef __GNUC__ ++ __attribute__ ((packed)) ++ #endif ++ ; ++ ++ typedef struct win32_pstatus win32_pstatus_t ; ++ ++#endif + #include + + #define CONTEXT_DEBUGGER_DR CONTEXT_DEBUGGER | CONTEXT_DEBUG_REGISTERS \ +@@ -446,30 +508,23 @@ + static BOOL WINAPI (*psapi_GetModuleInformation) (HANDLE, HMODULE, LPMODULEINFO, DWORD) = NULL; + static DWORD WINAPI (*psapi_GetModuleFileNameExA) (HANDLE, HMODULE, LPSTR, DWORD) = NULL; + +-static int +-psapi_get_dll_name (DWORD BaseAddress, char *dll_name_ret) +-{ +- DWORD len; +- MODULEINFO mi; +- int i; +- HMODULE dh_buf[1]; +- HMODULE *DllHandle = dh_buf; +- DWORD cbNeeded; +- BOOL ok; + ++BOOL ++load_psapi () ++{ + if (!psapi_loaded || + psapi_EnumProcessModules == NULL || + psapi_GetModuleInformation == NULL || + psapi_GetModuleFileNameExA == NULL) + { + if (psapi_loaded) +- goto failed; ++ return FALSE; + psapi_loaded = 1; + psapi_module_handle = LoadLibrary ("psapi.dll"); + if (!psapi_module_handle) + { + /* printf_unfiltered ("error loading psapi.dll: %u", GetLastError ()); */ +- goto failed; ++ return FALSE; + } + psapi_EnumProcessModules = GetProcAddress (psapi_module_handle, "EnumProcessModules"); + psapi_GetModuleInformation = GetProcAddress (psapi_module_handle, "GetModuleInformation"); +@@ -478,8 +533,24 @@ + if (psapi_EnumProcessModules == NULL || + psapi_GetModuleInformation == NULL || + psapi_GetModuleFileNameExA == NULL) +- goto failed; ++ return FALSE; + } ++ return TRUE; ++} ++ ++int ++psapi_get_dll_name (DWORD BaseAddress, char *dll_name_ret) ++{ ++ DWORD len; ++ MODULEINFO mi; ++ int i; ++ HMODULE dh_buf[1]; ++ HMODULE *DllHandle = dh_buf; ++ DWORD cbNeeded; ++ BOOL ok; ++ ++ if (!load_psapi ()) ++ goto failed; + + cbNeeded = 0; + ok = (*psapi_EnumProcessModules) (current_process_handle, +@@ -507,14 +578,14 @@ + DllHandle[i], + &mi, + sizeof (mi))) +- error (_("Can't get module info")); ++ error ("Can't get module info"); + + len = (*psapi_GetModuleFileNameExA) (current_process_handle, + DllHandle[i], + dll_name_ret, + MAX_PATH); + if (len == 0) +- error (_("Error getting dll name: %u."), (unsigned) GetLastError ()); ++ error ("Error getting dll name: %u\n", (unsigned) GetLastError ()); + + if ((DWORD) (mi.lpBaseOfDll) == BaseAddress) + return 1; +@@ -525,6 +596,30 @@ + return 0; + } + ++int ++psapi_get_module_filename (HANDLE hProcess, ++ HMODULE hModule, ++ LPTSTR lpFilename, ++ DWORD nSize) ++{ ++ DWORD len; ++ ++ if (!load_psapi ()) ++ goto failed; ++ ++ len = (*psapi_GetModuleFileNameExA) (hProcess, ++ hModule, ++ lpFilename, ++ nSize); ++ if (len == 0) ++ error ("Error getting file name: %u\n", (unsigned) GetLastError ()); ++ ++failed: ++ lpFilename[0] = '\0'; ++ return 0; ++} ++ ++ + /* Encapsulate the information required in a call to + symbol_file_add_args */ + struct safe_symbol_file_add_args +@@ -753,7 +848,13 @@ + so = XZALLOC (struct so_list); + so->lm_info = (struct lm_info *) xmalloc (sizeof (struct lm_info)); + so->lm_info->load_addr = load_addr; ++ ++#ifdef __CYGWIN__ + cygwin_conv_to_posix_path (buf, so->so_name); ++#else ++ strcpy( so->so_name, buf); ++#endif ++ + strcpy (so->so_original_name, so->so_name); + + solib_end->next = so; +@@ -1734,6 +1835,7 @@ + + if (!ok) + { ++#ifdef __CYGWIN__ + /* Try fall back to Cygwin pid */ + pid = cygwin_internal (CW_CYGWIN_PID_TO_WINPID, pid); + +@@ -1741,6 +1843,7 @@ + ok = DebugActiveProcess (pid); + + if (!ok) ++#endif /* __CYGWIN__ */ + error (_("Can't attach to process.")); + } + +@@ -1800,13 +1903,14 @@ + static char * + win32_pid_to_exec_file (int pid) + { ++ static char path[MAX_PATH + 1]; ++ char *path_ptr = NULL; ++#ifdef __CYGWIN__ + /* Try to find the process path using the Cygwin internal process list + pid isn't a valid pid, unfortunately. Use current_event.dwProcessId + instead. */ + /* TODO: Also find native Windows processes using CW_GETPINFO_FULL. */ + +- static char path[MAX_PATH + 1]; +- char *path_ptr = NULL; + int cpid; + struct external_pinfo *pinfo; + +@@ -1824,6 +1928,13 @@ + } + } + cygwin_internal (CW_UNLOCK_PINFO); ++#else ++ if (!psapi_get_module_filename (current_process_handle, NULL, path, MAX_PATH)) ++ printf_unfiltered ("error reading the process's file name: %lu", ++ GetLastError ()); ++ else ++ path_ptr = path; ++#endif + return path_ptr; + } + +@@ -1873,8 +1984,16 @@ + char *toexec; + char shell[MAX_PATH + 1]; /* Path to shell */ + const char *sh; ++#if defined (__MINGW32__) ++ /* BEGIN: Fragment of Al Stevens's patch for GDB on Win9x */ ++ HANDLE hStdInput = 0; ++ HANDLE hStdOutput = 0; ++ HANDLE hStdError = 0; ++ /* END: Fragment of Al Stevens's patch for GDB on Win9x */ ++#else /* !__MINGW32__ */ + int tty; + int ostdin, ostdout, ostderr; ++#endif /* !__MINGW32__ */ + const char *inferior_io_terminal = get_inferior_io_terminal (); + + if (!exec_file) +@@ -1886,7 +2005,12 @@ + if (!useshell) + { + flags = DEBUG_ONLY_THIS_PROCESS; ++#ifdef __CYGWIN__ + cygwin_conv_to_win32_path (exec_file, real_path); ++#else ++ strcpy (real_path, exec_file); ++#endif ++ + toexec = real_path; + } + else +@@ -1895,7 +2019,11 @@ + sh = getenv ("SHELL"); + if (!sh) + sh = "/bin/sh"; ++#ifdef __CYGWIN__ + cygwin_conv_to_win32_path (sh, shell); ++#else ++ strcpy (shell, sh); ++#endif + newallargs = alloca (sizeof (" -c 'exec '") + strlen (exec_file) + + strlen (allargs) + 2); + sprintf (newallargs, " -c 'exec %s %s'", exec_file, allargs); +@@ -1946,10 +2074,12 @@ + len = strlen (conv_path_names[j]); + if (strncmp (conv_path_names[j], in_env[i], len) == 0) + { +- if (cygwin_posix_path_list_p (in_env[i] + len)) ++#ifdef __CYGWIN__ ++ if (cygwin_posix_path_list_p (env[i] + len)) + envlen += len +- + cygwin_posix_to_win32_path_list_buf_size (in_env[i] + len); ++ + cygwin_posix_to_win32_path_list_buf_size (env[i] + len); + else ++#endif + envlen += strlen (in_env[i]) + 1; + break; + } +@@ -1976,12 +2106,14 @@ + len = strlen (conv_path_names[j]); + if (strncmp (conv_path_names[j], env[i], len) == 0) + { ++#ifdef __CYGWIN__ + if (cygwin_posix_path_list_p (env[i] + len)) + { + memcpy (temp, env[i], len); + cygwin_posix_to_win32_path_list (env[i] + len, temp + len); + } + else ++#endif + strcpy (temp, env[i]); + break; + } +@@ -1996,6 +2128,20 @@ + *temp = 0; + } + ++#if defined (__MINGW32__) ++ /* BEGIN: Fragment of Al Stevens's patch for GDB on Win9x */ ++ if ( new_console) ++ { ++ hStdInput = GetStdHandle( STD_INPUT_HANDLE); ++ hStdOutput = GetStdHandle( STD_OUTPUT_HANDLE); ++ hStdError = GetStdHandle( STD_ERROR_HANDLE); ++ ++ SetStdHandle( STD_INPUT_HANDLE, INVALID_HANDLE_VALUE); ++ SetStdHandle( STD_OUTPUT_HANDLE, INVALID_HANDLE_VALUE); ++ SetStdHandle( STD_ERROR_HANDLE, INVALID_HANDLE_VALUE); ++ } ++ /* END: Fragment of Al Stevens's patch for GDB on Win9x */ ++#else /* !__MINGW32__ */ + if (!inferior_io_terminal) + tty = ostdin = ostdout = ostderr = -1; + else +@@ -2016,6 +2162,7 @@ + dup2 (tty, 2); + } + } ++#endif /* !__MINGW32__ */ + + win32_init_thread_list (); + ret = CreateProcess (0, +@@ -2028,6 +2175,16 @@ + NULL, /* current directory */ + &si, + &pi); ++#if defined (__MINGW32__) ++ /* BEGIN: Fragment of Al Stevens's patch for GDB on Win9x */ ++ if ( new_console) ++ { ++ SetStdHandle( STD_INPUT_HANDLE, hStdInput); ++ SetStdHandle( STD_OUTPUT_HANDLE, hStdOutput); ++ SetStdHandle( STD_ERROR_HANDLE, hStdError); ++ } ++ /* END: Fragment of Al Stevens's patch for GDB on Win9x */ ++#else /* !__MINGW32__ */ + if (tty >= 0) + { + close (tty); +@@ -2038,6 +2195,7 @@ + close (ostdout); + close (ostderr); + } ++#endif /* !__MINGW32__ */ + + if (!ret) + error (_("Error creating process %s, (error %d)."), +diff -Nbaur gdb-6.6/include/bin-bugs.h gdb-6.6-psp/include/bin-bugs.h +--- gdb-6.6/include/bin-bugs.h Fri Jul 23 16:40:19 2004 ++++ gdb-6.6-psp/include/bin-bugs.h Fri Jun 15 16:17:50 2007 +@@ -1,3 +1,3 @@ + #ifndef REPORT_BUGS_TO +-#define REPORT_BUGS_TO "" ++#define REPORT_BUGS_TO "" + #endif +diff -Nbaur gdb-6.6/include/elf/common.h gdb-6.6-psp/include/elf/common.h +--- gdb-6.6/include/elf/common.h Wed Oct 25 07:49:18 2006 ++++ gdb-6.6-psp/include/elf/common.h Fri Jun 15 16:17:50 2007 +@@ -93,6 +93,7 @@ + #define ET_HIOS 0xFEFF /* Operating system-specific */ + #define ET_LOPROC 0xFF00 /* Processor-specific */ + #define ET_HIPROC 0xFFFF /* Processor-specific */ ++#define ET_PSPEXEC 0xFFA0 /* Sony PSP executable file */ + + /* Values for e_machine, which identifies the architecture. These numbers + are officially assigned by registry@caldera.com. See below for a list of +diff -Nbaur gdb-6.6/include/elf/mips.h gdb-6.6-psp/include/elf/mips.h +--- gdb-6.6/include/elf/mips.h Sat Oct 28 11:13:49 2006 ++++ gdb-6.6-psp/include/elf/mips.h Fri Jun 15 16:17:50 2007 +@@ -216,6 +216,7 @@ + #define E_MIPS_MACH_5400 0x00910000 + #define E_MIPS_MACH_5500 0x00980000 + #define E_MIPS_MACH_9000 0x00990000 ++#define E_MIPS_MACH_ALLEGREX 0x00A20000 + + /* Processor specific section indices. These sections do not actually + exist. Symbols with a st_shndx field corresponding to one of these +diff -Nbaur gdb-6.6/include/opcode/mips.h gdb-6.6-psp/include/opcode/mips.h +--- gdb-6.6/include/opcode/mips.h Tue Jun 6 11:49:48 2006 ++++ gdb-6.6-psp/include/opcode/mips.h Fri Jun 15 16:17:50 2007 +@@ -213,6 +213,83 @@ + #define OP_SH_UDI4 6 + #define OP_MASK_UDI4 0xfffff + ++#define OP_SH_VFPU_DELTA 0 ++#define OP_MASK_VFPU_DELTA 0xfffc ++#define OP_SH_VFPU_IMM3 16 ++#define OP_MASK_VFPU_IMM3 0x7 ++#define OP_SH_VFPU_IMM5 16 ++#define OP_MASK_VFPU_IMM5 0x1f ++#define OP_SH_VFPU_IMM8 16 ++#define OP_MASK_VFPU_IMM8 0xff ++#define OP_SH_VFPU_CC 18 /* Condition code. */ ++#define OP_MASK_VFPU_CC 0x7 ++#define OP_SH_VFPU_CONST 16 ++#define OP_MASK_VFPU_CONST 0x1f ++#define OP_SH_VFPU_COND 0 /* Conditional compare. */ ++#define OP_MASK_VFPU_COND 0xf ++#define OP_SH_VFPU_VMTVC 0 ++#define OP_MASK_VFPU_VMTVC 0xff ++#define OP_SH_VFPU_VMFVC 8 ++#define OP_MASK_VFPU_VMFVC 0xff ++#define OP_SH_VFPU_RWB 1 ++#define OP_MASK_VFPU_RWB 0x1 ++#define OP_SH_VFPU_ROT 16 /* Rotators used in vrot. */ ++#define OP_MASK_VFPU_ROT 0x1f ++#define OP_SH_VFPU_FLOAT16 0 ++#define OP_MASK_VFPU_FLOAT16 0xffff ++ ++/* VFPU registers. */ ++#define OP_SH_VFPU_VD 0 ++#define OP_MASK_VFPU_VD 0x7f ++#define OP_SH_VFPU_VS 8 ++#define OP_MASK_VFPU_VS 0x7f ++#define OP_SH_VFPU_VT 16 ++#define OP_MASK_VFPU_VT 0x7f ++#define OP_SH_VFPU_VT_LO 16 /* Bits 0-4 of vt. */ ++#define OP_MASK_VFPU_VT_LO 0x1f ++#define OP_SH_VFPU_VT_HI 5 /* Right-shifted. */ ++#define OP_MASK_VFPU_VT_HI1 0x1 /* Bit 5 of vt. */ ++#define OP_MASK_VFPU_VT_HI2 0x3 /* Bits 5-6 of vt. */ ++/* Special handling of vs in vmmul instructions. */ ++#define VFPU_OP_VT_VS_VD 0xff800000 ++#define VFPU_OPCODE_VMMUL 0xf0000000 ++ ++/* VFPU prefix instruction operands. The *_SH_* values really specify where ++ the bitfield begins, as VFPU prefix instructions have four operands ++ encoded within the immediate field. */ ++#define VFPU_SH_PFX_NEG 16 ++#define VFPU_MASK_PFX_NEG 0x1 /* Negation. */ ++#define VFPU_SH_PFX_CST 12 ++#define VFPU_MASK_PFX_CST 0x1 /* Constant. */ ++#define VFPU_SH_PFX_ABS_CSTHI 8 ++#define VFPU_MASK_PFX_ABS_CSTHI 0x1 /* Abs/Constant (bit 2). */ ++#define VFPU_MASK_PFX_SWZ_CSTLO 0x3 /* Swizzle/Constant (bits 0-1). */ ++#define VFPU_SH_PFX_MASK 8 ++#define VFPU_MASK_PFX_MASK 0x1 /* Mask. */ ++#define VFPU_MASK_PFX_SAT 0x3 /* Saturation. */ ++ ++/* Special handling of the vrot instructions. */ ++#define VFPU_MASK_OP_SIZE 0x8080 /* Masks the operand size (pair, triple, quad). */ ++#define VFPU_OP_SIZE_PAIR 0x80 ++#define VFPU_OP_SIZE_TRIPLE 0x8000 ++#define VFPU_OP_SIZE_QUAD 0x8080 ++/* Note that these are within the rotators field, and not the full opcode. */ ++#define VFPU_SH_ROT_HI 2 ++#define VFPU_MASK_ROT_HI 0x3 ++#define VFPU_SH_ROT_LO 0 ++#define VFPU_MASK_ROT_LO 0x3 ++#define VFPU_SH_ROT_NEG 4 /* Negation. */ ++#define VFPU_MASK_ROT_NEG 0x1 ++ ++/* VFPU 16-bit floating-point format. */ ++#define VFPU_FLOAT16_EXP_MAX 0x1f ++#define VFPU_SH_FLOAT16_SIGN 15 ++#define VFPU_MASK_FLOAT16_SIGN 0x1 ++#define VFPU_SH_FLOAT16_EXP 10 ++#define VFPU_MASK_FLOAT16_EXP 0x1f ++#define VFPU_SH_FLOAT16_FRAC 0 ++#define VFPU_MASK_FLOAT16_FRAC 0x3ff ++ + /* This structure holds information for a particular instruction. */ + + struct mips_opcode +@@ -301,6 +378,29 @@ + Requires that "+A" or "+E" occur first to set position. + Enforces: 32 < (pos+size) <= 64. + ++ Sony Allegrex VFPU instructions: ++ "?o" ++ "?0" - "?3" ++ "?4" - "?7" ++ "?a" ++ "?b" ++ "?c" ++ "?e" ++ "?f" ++ "?i" ++ "?q" ++ "?r" ++ "?u" ++ "?w" ++ "?d" ++ "?m" ++ "?n" ++ "?s" ++ "?t" ++ "?v" ++ "?x" ++ "?z" ++ + Floating point instructions: + "D" 5 bit destination register (OP_*_FD) + "M" 3 bit compare condition code (OP_*_CCC) (only used for mips4 and up) +@@ -517,6 +617,8 @@ + #define INSN_5400 0x01000000 + /* NEC VR5500 instruction. */ + #define INSN_5500 0x02000000 ++/* Sony Allegrex instruction. */ ++#define INSN_ALLEGREX 0x10000000 + + /* MDMX ASE */ + #define INSN_MDMX 0x04000000 +@@ -571,6 +673,7 @@ + #define CPU_MIPS64 64 + #define CPU_MIPS64R2 65 + #define CPU_SB1 12310201 /* octal 'SB', 01. */ ++#define CPU_ALLEGREX 10111431 /* octal 'AL', 31. */ + + /* Test for membership in an ISA including chip specific ISAs. INSN + is pointer to an element of the opcode table; ISA is the specified +@@ -592,6 +695,7 @@ + || (cpu == CPU_VR4120 && ((insn)->membership & INSN_4120) != 0) \ + || (cpu == CPU_VR5400 && ((insn)->membership & INSN_5400) != 0) \ + || (cpu == CPU_VR5500 && ((insn)->membership & INSN_5500) != 0) \ ++ || (cpu == CPU_ALLEGREX && ((insn)->membership & INSN_ALLEGREX) != 0) \ + || 0) /* Please keep this term for easier source merging. */ + + /* This is a list of macro expanded instructions. +@@ -708,6 +812,16 @@ + M_LL_AB, + M_LLD_AB, + M_LS_A, ++ M_LVHIP, ++ M_LVHIS, ++ M_LVIP, ++ M_LVIQ, ++ M_LVIS, ++ M_LVIT, ++ M_LVLQ_AB, ++ M_LVRQ_AB, ++ M_LVQ_AB, ++ M_LVQ_AB_2, + M_LW_A, + M_LW_AB, + M_LWC0_A, +@@ -797,6 +911,10 @@ + M_SUB_I, + M_SUBU_I, + M_SUBU_I_2, ++ M_SVLQ_AB, ++ M_SVQ_AB, ++ M_SVRQ_AB, ++ M_SVS_AB, + M_TEQ_I, + M_TGE_I, + M_TGEU_I, +@@ -811,14 +929,24 @@ + M_ULH_A, + M_ULHU, + M_ULHU_A, ++ M_ULVQ, ++ M_ULVQ_AB, ++ M_ULVS, + M_ULW, + M_ULW_A, + M_USH, + M_USH_A, ++ M_USVQ, ++ M_USVQ_AB, ++ M_USVS, + M_USW, + M_USW_A, + M_USD, + M_USD_A, ++ M_VCMOVP, ++ M_VCMOVQ, ++ M_VCMOVS, ++ M_VCMOVT, + M_XOR_I, + M_COP0, + M_COP1, +diff -Nbaur gdb-6.6/opcodes/mips-dis.c gdb-6.6-psp/opcodes/mips-dis.c +--- gdb-6.6/opcodes/mips-dis.c Sat Sep 16 19:12:17 2006 ++++ gdb-6.6-psp/opcodes/mips-dis.c Fri Jun 15 16:17:50 2007 +@@ -136,6 +136,139 @@ + "c0_taglo", "c0_taghi", "c0_errorepc", "c0_desave", + }; + ++static const char * const vfpu_sreg_names[128] = { ++ "S000", "S010", "S020", "S030", "S100", "S110", "S120", "S130", ++ "S200", "S210", "S220", "S230", "S300", "S310", "S320", "S330", ++ "S400", "S410", "S420", "S430", "S500", "S510", "S520", "S530", ++ "S600", "S610", "S620", "S630", "S700", "S710", "S720", "S730", ++ "S001", "S011", "S021", "S031", "S101", "S111", "S121", "S131", ++ "S201", "S211", "S221", "S231", "S301", "S311", "S321", "S331", ++ "S401", "S411", "S421", "S431", "S501", "S511", "S521", "S531", ++ "S601", "S611", "S621", "S631", "S701", "S711", "S721", "S731", ++ "S002", "S012", "S022", "S032", "S102", "S112", "S122", "S132", ++ "S202", "S212", "S222", "S232", "S302", "S312", "S322", "S332", ++ "S402", "S412", "S422", "S432", "S502", "S512", "S522", "S532", ++ "S602", "S612", "S622", "S632", "S702", "S712", "S722", "S732", ++ "S003", "S013", "S023", "S033", "S103", "S113", "S123", "S133", ++ "S203", "S213", "S223", "S233", "S303", "S313", "S323", "S333", ++ "S403", "S413", "S423", "S433", "S503", "S513", "S523", "S533", ++ "S603", "S613", "S623", "S633", "S703", "S713", "S723", "S733" ++}; ++ ++static const char * const vfpu_vpreg_names[128] = { ++ "C000", "C010", "C020", "C030", "C100", "C110", "C120", "C130", ++ "C200", "C210", "C220", "C230", "C300", "C310", "C320", "C330", ++ "C400", "C410", "C420", "C430", "C500", "C510", "C520", "C530", ++ "C600", "C610", "C620", "C630", "C700", "C710", "C720", "C730", ++ "R000", "R001", "R002", "R003", "R100", "R101", "R102", "R103", ++ "R200", "R201", "R202", "R203", "R300", "R301", "R302", "R303", ++ "R400", "R401", "R402", "R403", "R500", "R501", "R502", "R503", ++ "R600", "R601", "R602", "R603", "R700", "R701", "R702", "R703", ++ "C002", "C012", "C022", "C032", "C102", "C112", "C122", "C132", ++ "C202", "C212", "C222", "C232", "C302", "C312", "C322", "C332", ++ "C402", "C412", "C422", "C432", "C502", "C512", "C522", "C532", ++ "C602", "C612", "C622", "C632", "C702", "C712", "C722", "C732", ++ "R020", "R021", "R022", "R023", "R120", "R121", "R122", "R123", ++ "R220", "R221", "R222", "R223", "R320", "R321", "R322", "R323", ++ "R420", "R421", "R422", "R423", "R520", "R521", "R522", "R523", ++ "R620", "R621", "R622", "R623", "R720", "R721", "R722", "R723" ++}; ++ ++static const char * const vfpu_vtreg_names[128] = { ++ "C000", "C010", "C020", "C030", "C100", "C110", "C120", "C130", ++ "C200", "C210", "C220", "C230", "C300", "C310", "C320", "C330", ++ "C400", "C410", "C420", "C430", "C500", "C510", "C520", "C530", ++ "C600", "C610", "C620", "C630", "C700", "C710", "C720", "C730", ++ "R000", "R001", "R002", "R003", "R100", "R101", "R102", "R103", ++ "R200", "R201", "R202", "R203", "R300", "R301", "R302", "R303", ++ "R400", "R401", "R402", "R403", "R500", "R501", "R502", "R503", ++ "R600", "R601", "R602", "R603", "R700", "R701", "R702", "R703", ++ "C001", "C011", "C021", "C031", "C101", "C111", "C121", "C131", ++ "C201", "C211", "C221", "C231", "C301", "C311", "C321", "C331", ++ "C401", "C411", "C421", "C431", "C501", "C511", "C521", "C531", ++ "C601", "C611", "C621", "C631", "C701", "C711", "C721", "C731", ++ "R010", "R011", "R012", "R013", "R110", "R111", "R112", "R113", ++ "R210", "R211", "R212", "R213", "R310", "R311", "R312", "R313", ++ "R410", "R411", "R412", "R413", "R510", "R511", "R512", "R513", ++ "R610", "R611", "R612", "R613", "R710", "R711", "R712", "R713" ++}; ++ ++static const char * const vfpu_vqreg_names[128] = { ++ "C000", "C010", "C020", "C030", "C100", "C110", "C120", "C130", ++ "C200", "C210", "C220", "C230", "C300", "C310", "C320", "C330", ++ "C400", "C410", "C420", "C430", "C500", "C510", "C520", "C530", ++ "C600", "C610", "C620", "C630", "C700", "C710", "C720", "C730", ++ "R000", "R001", "R002", "R003", "R100", "R101", "R102", "R103", ++ "R200", "R201", "R202", "R203", "R300", "R301", "R302", "R303", ++ "R400", "R401", "R402", "R403", "R500", "R501", "R502", "R503", ++ "R600", "R601", "R602", "R603", "R700", "R701", "R702", "R703", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "" ++}; ++ ++static const char * const vfpu_mpreg_names[128] = { ++ "M000", "", "M020", "", "M100", "", "M120", "", ++ "M200", "", "M220", "", "M300", "", "M320", "", ++ "M400", "", "M420", "", "M500", "", "M520", "", ++ "M600", "", "M620", "", "M700", "", "M720", "", ++ "E000", "", "E002", "", "E100", "", "E102", "", ++ "E200", "", "E202", "", "E300", "", "E302", "", ++ "E400", "", "E402", "", "E500", "", "E502", "", ++ "E600", "", "E602", "", "E700", "", "E702", "", ++ "M002", "", "M022", "", "M102", "", "M122", "", ++ "M202", "", "M222", "", "M302", "", "M322", "", ++ "M402", "", "M422", "", "M502", "", "M522", "", ++ "M602", "", "M622", "", "M702", "", "M722", "", ++ "E020", "", "E022", "", "E120", "", "E122", "", ++ "E220", "", "E222", "", "E320", "", "E322", "", ++ "E420", "", "E422", "", "E520", "", "E522", "", ++ "E620", "", "E622", "", "E720", "", "E722", "" ++}; ++ ++static const char * const vfpu_mtreg_names[128] = { ++ "M000", "M010", "", "", "M100", "M110", "", "", ++ "M200", "M210", "", "", "M300", "M310", "", "", ++ "M400", "M410", "", "", "M500", "M510", "", "", ++ "M600", "M610", "", "", "M700", "M710", "", "", ++ "E000", "E001", "", "", "E100", "E101", "", "", ++ "E200", "E201", "", "", "E300", "E301", "", "", ++ "E400", "E401", "", "", "E500", "E501", "", "", ++ "E600", "E601", "", "", "E700", "E701", "", "", ++ "M001", "M011", "", "", "M101", "M111", "", "", ++ "M201", "M211", "", "", "M301", "M311", "", "", ++ "M401", "M411", "", "", "M501", "M511", "", "", ++ "M601", "M611", "", "", "M701", "M711", "", "", ++ "E010", "E011", "", "", "E110", "E111", "", "", ++ "E210", "E211", "", "", "E310", "E311", "", "", ++ "E410", "E411", "", "", "E510", "E511", "", "", ++ "E610", "E611", "", "", "E710", "E711", "", "" ++}; ++ ++static const char * const vfpu_mqreg_names[128] = { ++ "M000", "", "", "", "M100", "", "", "", ++ "M200", "", "", "", "M300", "", "", "", ++ "M400", "", "", "", "M500", "", "", "", ++ "M600", "", "", "", "M700", "", "", "", ++ "E000", "", "", "", "E100", "", "", "", ++ "E200", "", "", "", "E300", "", "", "", ++ "E400", "", "", "", "E500", "", "", "", ++ "E600", "", "", "", "E700", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "" ++}; ++ + static const struct mips_cp0sel_name mips_cp0sel_names_mips3264[] = + { + { 16, 1, "c0_config1" }, +@@ -312,6 +445,55 @@ + "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31" + }; + ++static const char * const vfpu_cond_names[16] = { ++ "FL", "EQ", "LT", "LE", "TR", "NE", "GE", "GT", ++ "EZ", "EN", "EI", "ES", "NZ", "NN", "NI", "NS" ++}; ++ ++static const char * const vfpu_const_names[20] = { ++ "", ++ "VFPU_HUGE", ++ "VFPU_SQRT2", ++ "VFPU_SQRT1_2", ++ "VFPU_2_SQRTPI", ++ "VFPU_2_PI", ++ "VFPU_1_PI", ++ "VFPU_PI_4", ++ "VFPU_PI_2", ++ "VFPU_PI", ++ "VFPU_E", ++ "VFPU_LOG2E", ++ "VFPU_LOG10E", ++ "VFPU_LN2", ++ "VFPU_LN10", ++ "VFPU_2PI", ++ "VFPU_PI_6", ++ "VFPU_LOG10TWO", ++ "VFPU_LOG2TEN", ++ "VFPU_SQRT3_2" ++}; ++ ++#define VFPU_NUM_CONSTANTS \ ++ ((sizeof vfpu_const_names) / (sizeof (vfpu_const_names[0]))) ++const unsigned int vfpu_num_constants = VFPU_NUM_CONSTANTS; ++ ++static const char * const vfpu_rwb_names[4] = { ++ "wt", "wb", "", "" ++}; ++ ++static const char * const pfx_cst_names[8] = { ++ "0", "1", "2", "1/2", "3", "1/3", "1/4", "1/6" ++}; ++ ++static const char * const pfx_swz_names[4] = { ++ "x", "y", "z", "w" ++}; ++ ++static const char * const pfx_sat_names[4] = { ++ "", "[0:1]", "", "[-1:1]" ++}; ++ ++ + struct mips_abi_choice + { + const char * name; +@@ -387,6 +569,8 @@ + mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, + { "mips5", 1, bfd_mach_mips5, CPU_MIPS5, ISA_MIPS5, + mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, ++ { "allegrex", 1, bfd_mach_mips_allegrex, CPU_ALLEGREX, ISA_MIPS2, ++ mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, + + /* For stock MIPS32, disassemble all applicable MIPS-specified ASEs. + Note that MIPS-3D and MDMX are not applicable to MIPS32. (See +@@ -1198,6 +1382,349 @@ + case 'Z': + (*info->fprintf_func) (info->stream, "$v%ld", + (l >> OP_SH_FT) & OP_MASK_FT); ++ break; ++ ++ case '?': ++ /* VFPU extensions. */ ++ d++; ++ switch (*d) ++ { ++ case '\0': ++ /* xgettext:c-format */ ++ (*info->fprintf_func) (info->stream, ++ _("# internal error, incomplete VFPU extension sequence (?)")); ++ return; ++ ++ case 'o': ++ delta = (l >> OP_SH_VFPU_DELTA) & OP_MASK_VFPU_DELTA; ++ if (delta & 0x8000) ++ delta |= ~0xffff; ++ (*info->fprintf_func) (info->stream, "%d", ++ delta); ++ break; ++ ++ case '0': ++ case '1': ++ case '2': ++ case '3': ++ { ++ unsigned int pos = *d, base = '0'; ++ unsigned int negation = (l >> (pos - (base - VFPU_SH_PFX_NEG))) & VFPU_MASK_PFX_NEG; ++ unsigned int constant = (l >> (pos - (base - VFPU_SH_PFX_CST))) & VFPU_MASK_PFX_CST; ++ unsigned int abs_consthi = ++ (l >> (pos - (base - VFPU_SH_PFX_ABS_CSTHI))) & VFPU_MASK_PFX_ABS_CSTHI; ++ unsigned int swz_constlo = (l >> ((pos - base) * 2)) & VFPU_MASK_PFX_SWZ_CSTLO; ++ ++ if (negation) ++ (*info->fprintf_func) (info->stream, "-"); ++ if (constant) ++ { ++ (*info->fprintf_func) (info->stream, "%s", ++ pfx_cst_names[(abs_consthi << 2) | swz_constlo]); ++ } ++ else ++ { ++ if (abs_consthi) ++ (*info->fprintf_func) (info->stream, "|%s|", ++ pfx_swz_names[swz_constlo]); ++ else ++ (*info->fprintf_func) (info->stream, "%s", ++ pfx_swz_names[swz_constlo]); ++ } ++ } ++ break; ++ ++ case '4': ++ case '5': ++ case '6': ++ case '7': ++ { ++ unsigned int pos = *d, base = '4'; ++ unsigned int mask = (l >> (pos - (base - VFPU_MASK_PFX_MASK))) & VFPU_MASK_PFX_MASK; ++ unsigned int saturation = (l >> ((pos - base) * 2)) & VFPU_MASK_PFX_SAT; ++ ++ if (mask) ++ (*info->fprintf_func) (info->stream, "m"); ++ else ++ (*info->fprintf_func) (info->stream, "%s", ++ pfx_sat_names[saturation]); ++ } ++ break; ++ ++ case 'a': ++ { ++ unsigned int c = (l >> OP_SH_VFPU_CONST) & OP_MASK_VFPU_CONST; ++ if (c < vfpu_num_constants) ++ { ++ (*info->fprintf_func) (info->stream, "%s", ++ vfpu_const_names[c]); ++ } ++ break; ++ } ++ ++ case 'b': ++ /* 5-bit immediate value. */ ++ (*info->fprintf_func) (info->stream, "%ld", ++ (l >> OP_SH_VFPU_IMM5) & OP_MASK_VFPU_IMM5); ++ break; ++ ++ case 'c': ++ /* VFPU condition code. */ ++ (*info->fprintf_func) (info->stream, "%ld", ++ (l >> OP_SH_VFPU_CC) & OP_MASK_VFPU_CC); ++ break; ++ ++ case 'e': ++ /* 3-bit immediate value. */ ++ (*info->fprintf_func) (info->stream, "%ld", ++ (l >> OP_SH_VFPU_IMM3) & OP_MASK_VFPU_IMM3); ++ break; ++ ++ case 'f': ++ /* Conditional compare. */ ++ (*info->fprintf_func) (info->stream, "%s", ++ vfpu_cond_names[(l >> OP_SH_VFPU_COND) & OP_MASK_VFPU_COND]); ++ /* Apparently this specifier is unused. */ ++ d++; ++ break; ++ ++ case 'i': ++ /* 8-bit immediate value. */ ++ (*info->fprintf_func) (info->stream, "0x%02lx", ++ (l >> OP_SH_VFPU_IMM8) & OP_MASK_VFPU_IMM8); ++ break; ++ ++ case 'q': ++ /* VFPU control register (vmtvc). */ ++ (*info->fprintf_func) (info->stream, "$%ld", ++ (l >> OP_SH_VFPU_VMTVC) & OP_MASK_VFPU_VMTVC); ++ break; ++ ++ case 'r': ++ /* VFPU control register (vmfvc). */ ++ (*info->fprintf_func) (info->stream, "$%ld", ++ (l >> OP_SH_VFPU_VMFVC) & OP_MASK_VFPU_VMFVC); ++ break; ++ ++ case 'u': ++ /* Convert a VFPU 16-bit floating-point number to IEEE754. */ ++ { ++ union float2int { ++ unsigned int i; ++ float f; ++ } float2int; ++ unsigned short float16 = (l >> OP_SH_VFPU_FLOAT16) & OP_MASK_VFPU_FLOAT16; ++ unsigned int sign = (float16 >> VFPU_SH_FLOAT16_SIGN) & VFPU_MASK_FLOAT16_SIGN; ++ int exponent = (float16 >> VFPU_SH_FLOAT16_EXP) & VFPU_MASK_FLOAT16_EXP; ++ unsigned int fraction = float16 & VFPU_MASK_FLOAT16_FRAC; ++ char signchar = '+' + ((sign == 1) * 2); ++ ++ if (exponent == VFPU_FLOAT16_EXP_MAX) ++ { ++ if (fraction == 0) ++ (*info->fprintf_func) (info->stream, "%cInf", signchar); ++ else ++ (*info->fprintf_func) (info->stream, "%cNaN", signchar); ++ } ++ else if (exponent == 0 && fraction == 0) ++ { ++ (*info->fprintf_func) (info->stream, "%c0", signchar); ++ } ++ else ++ { ++ if (exponent == 0) ++ { ++ do ++ { ++ fraction <<= 1; ++ exponent--; ++ } ++ while (!(fraction & (VFPU_MASK_FLOAT16_FRAC + 1))); ++ ++ fraction &= VFPU_MASK_FLOAT16_FRAC; ++ } ++ ++ /* Convert to 32-bit single-precision IEEE754. */ ++ float2int.i = sign << 31; ++ float2int.i |= (exponent + 112) << 23; ++ float2int.i |= fraction << 13; ++ (*info->fprintf_func) (info->stream, "%g", float2int.f); ++ } ++ } ++ break; ++ ++ case 'w': ++ { ++ const char *elements[4]; ++ unsigned int opcode = l & VFPU_MASK_OP_SIZE; ++ unsigned int rotators = (l >> OP_SH_VFPU_ROT) & OP_MASK_VFPU_ROT; ++ unsigned int opsize, rothi, rotlo, negation, i; ++ ++ /* Determine the operand size so we'll know how many elements to output. */ ++ if (opcode == VFPU_OP_SIZE_PAIR) ++ opsize = 2; ++ else if (opcode == VFPU_OP_SIZE_TRIPLE) ++ opsize = 3; ++ else ++ opsize = (opcode == VFPU_OP_SIZE_QUAD) * 4; /* Sanity check. */ ++ ++ rothi = (rotators >> VFPU_SH_ROT_HI) & VFPU_MASK_ROT_HI; ++ rotlo = (rotators >> VFPU_SH_ROT_LO) & VFPU_MASK_ROT_LO; ++ negation = (rotators >> VFPU_SH_ROT_NEG) & VFPU_MASK_ROT_NEG; ++ ++ if (rothi == rotlo) ++ { ++ if (negation) ++ { ++ elements[0] = "-s"; ++ elements[1] = "-s"; ++ elements[2] = "-s"; ++ elements[3] = "-s"; ++ } ++ else ++ { ++ elements[0] = "s"; ++ elements[1] = "s"; ++ elements[2] = "s"; ++ elements[3] = "s"; ++ } ++ } ++ else ++ { ++ elements[0] = "0"; ++ elements[1] = "0"; ++ elements[2] = "0"; ++ elements[3] = "0"; ++ } ++ if (negation) ++ elements[rothi] = "-s"; ++ else ++ elements[rothi] = "s"; ++ elements[rotlo] = "c"; ++ ++ (*info->fprintf_func) (info->stream, "["); ++ i = 0; ++ for (;;) ++ { ++ (*info->fprintf_func) (info->stream, "%s", ++ elements[i++]); ++ if (i >= opsize) ++ break; ++ (*info->fprintf_func) (info->stream, ","); ++ } ++ (*info->fprintf_func) (info->stream, "]"); ++ } ++ break; ++ ++ case 'd': ++ case 'm': ++ case 'n': ++ case 's': ++ case 't': ++ case 'v': ++ case 'x': ++ { ++ unsigned int vreg = 0; ++ ++ /* The first char specifies the bitfield that contains the register number. */ ++ switch (*d) ++ { ++ case 'd': ++ case 'v': ++ case 'x': ++ vreg = (l >> OP_SH_VFPU_VD) & OP_MASK_VFPU_VD; ++ break; ++ ++ case 'm': ++ /* Combine bits 0-4 of vt with bits 5-6 of vt. */ ++ vreg = ((l >> OP_SH_VFPU_VT_LO) & OP_MASK_VFPU_VT_LO) ++ | ((l & OP_MASK_VFPU_VT_HI2) << OP_SH_VFPU_VT_HI); ++ break; ++ ++ case 'n': ++ /* Combine bits 0-4 of vt with bit 5 of vt. */ ++ vreg = ((l >> OP_SH_VFPU_VT_LO) & OP_MASK_VFPU_VT_LO) ++ | ((l & OP_MASK_VFPU_VT_HI1) << OP_SH_VFPU_VT_HI); ++ break; ++ ++ case 's': ++ { ++ unsigned int temp_vreg = l >> OP_SH_VFPU_VS; ++ ++ vreg = temp_vreg & OP_MASK_VFPU_VS; ++ if ((l & VFPU_OP_VT_VS_VD) == VFPU_OPCODE_VMMUL) ++ { ++ /* vmmul instructions have the RXC bit (bit 13) inverted. */ ++ if (temp_vreg & 0x20) ++ vreg = temp_vreg & 0x5f; ++ else ++ vreg |= 0x20; ++ } ++ } ++ break; ++ ++ case 't': ++ vreg = (l >> OP_SH_VFPU_VT) & OP_MASK_VFPU_VT; ++ break; ++ } ++ ++ /* The next char is the register set vreg comes from. */ ++ d++; ++ switch (*d) ++ { ++ case '0': ++ (*info->fprintf_func) (info->stream, "%s.s", ++ vfpu_sreg_names[vreg]); ++ break; ++ ++ case '1': ++ (*info->fprintf_func) (info->stream, "%s.p", ++ vfpu_vpreg_names[vreg]); ++ break; ++ ++ case '2': ++ (*info->fprintf_func) (info->stream, "%s.t", ++ vfpu_vtreg_names[vreg]); ++ break; ++ ++ case '3': ++ (*info->fprintf_func) (info->stream, "%s.q", ++ vfpu_vqreg_names[vreg]); ++ break; ++ ++ case '5': ++ (*info->fprintf_func) (info->stream, "%s.p", ++ vfpu_mpreg_names[vreg]); ++ break; ++ ++ case '6': ++ (*info->fprintf_func) (info->stream, "%s.t", ++ vfpu_mtreg_names[vreg]); ++ break; ++ ++ case '7': ++ (*info->fprintf_func) (info->stream, "%s.q", ++ vfpu_mqreg_names[vreg]); ++ break; ++ ++ default: ++ /* xgettext:c-format */ ++ (*info->fprintf_func) (info->stream, ++ _("# internal error, undefined vreg modifier(%c)"), ++ *d); ++ break; ++ } ++ ++ /* The last char is unused for disassembly. */ ++ d++; ++ } ++ break; ++ ++ case 'z': ++ (*info->fprintf_func) (info->stream, "%s", ++ vfpu_rwb_names[(l >> OP_SH_VFPU_RWB) & OP_MASK_VFPU_RWB]); ++ break; ++ } + break; + + default: +diff -Nbaur gdb-6.6/opcodes/mips-opc.c gdb-6.6-psp/opcodes/mips-opc.c +--- gdb-6.6/opcodes/mips-opc.c Tue Jun 6 11:49:48 2006 ++++ gdb-6.6-psp/opcodes/mips-opc.c Fri Jun 15 16:17:50 2007 +@@ -112,6 +112,7 @@ + #define N5 (INSN_5400 | INSN_5500) + #define N54 INSN_5400 + #define N55 INSN_5500 ++#define AL INSN_ALLEGREX + + #define G1 (T3 \ + ) +@@ -299,6 +300,7 @@ + {"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL|RD_s|RD_t, 0, I2|T3 }, + {"bnel", "s,I,p", 0, (int) M_BNEL_I, INSN_MACRO, 0, I2|T3 }, + {"break", "", 0x0000000d, 0xffffffff, TRAP, 0, I1 }, ++{"break", "B", 0x0000000d, 0xfc00003f, TRAP, 0, I32|AL }, + {"break", "c", 0x0000000d, 0xfc00ffff, TRAP, 0, I1 }, + {"break", "c,q", 0x0000000d, 0xfc00003f, TRAP, 0, I1 }, + {"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_S|RD_T|WR_CC|FP_D, 0, I1 }, +@@ -465,8 +467,8 @@ + {"flushd", "", 0xbc020000, 0xffffffff, 0, 0, L1 }, + {"flushid", "", 0xbc030000, 0xffffffff, 0, 0, L1 }, + {"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM|RD_b, 0, L1 }, +-{"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b, 0, I3|I32|T3}, +-{"cache", "k,A(b)", 0, (int) M_CACHE_AB, INSN_MACRO, 0, I3|I32|T3}, ++{"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b, 0, I3|I32|T3|AL}, ++{"cache", "k,A(b)", 0, (int) M_CACHE_AB, INSN_MACRO, 0, I3|I32|T3|AL}, + {"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D|RD_S|FP_D, 0, I3|I33 }, + {"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I3|I33 }, + {"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I2 }, +@@ -480,7 +482,9 @@ + {"cftc1", "d,T", 0x41000023, 0xffe007ff, TRAP|LCD|WR_d|RD_C1|FP_S, 0, MT32 }, + {"cftc2", "d,E", 0x41000025, 0xffe007ff, TRAP|LCD|WR_d|RD_C2, 0, MT32 }, + {"clo", "U,s", 0x70000021, 0xfc0007ff, WR_d|WR_t|RD_s, 0, I32|N55 }, ++{"clo", "d,s", 0x00000017, 0xfc1f07ff, WR_d|RD_s, 0, AL }, + {"clz", "U,s", 0x70000020, 0xfc0007ff, WR_d|WR_t|RD_s, 0, I32|N55 }, ++{"clz", "d,s", 0x00000016, 0xfc1f07ff, WR_d|RD_s, 0, AL }, + {"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD|RD_t|WR_CC, 0, I1 }, + {"ctc1", "t,G", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, 0, I1 }, + {"ctc1", "t,S", 0x44c00000, 0xffe007ff, COD|RD_t|WR_CC|FP_S, 0, I1 }, +@@ -505,13 +509,15 @@ + {"cvt.ps.s","D,V,T", 0x46000026, 0xffe0003f, WR_D|RD_S|RD_T|FP_S|FP_D, 0, I5|I33 }, + {"cvt.pw.ps", "D,S", 0x46c00024, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, M3D }, + {"dabs", "d,v", 0, (int) M_DABS, INSN_MACRO, 0, I3 }, ++{"max", "d,v,t", 0x0000002c, 0xfc0007ff, WR_d|RD_s|RD_t, 0, AL }, + {"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I3 }, + {"dadd", "t,r,I", 0, (int) M_DADD_I, INSN_MACRO, 0, I3 }, + {"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_t|RD_s, 0, I3 }, + {"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_t|RD_s, 0, I3 }, ++{"min", "d,v,t", 0x0000002d, 0xfc0007ff, WR_d|RD_s|RD_t, 0, AL }, + {"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I3 }, + {"daddu", "t,r,I", 0, (int) M_DADDU_I, INSN_MACRO, 0, I3 }, +-{"dbreak", "", 0x7000003f, 0xffffffff, 0, 0, N5 }, ++{"dbreak", "", 0x7000003f, 0xffffffff, 0, 0, N5|AL }, + {"dclo", "U,s", 0x70000025, 0xfc0007ff, RD_s|WR_d|WR_t, 0, I64|N55 }, + {"dclz", "U,s", 0x70000024, 0xfc0007ff, RD_s|WR_d|WR_t, 0, I64|N55 }, + /* dctr and dctw are used on the r5000. */ +@@ -598,7 +604,7 @@ + {"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, I3 }, + {"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, 0, I3 }, + {"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, 0, I3 }, +-{"dret", "", 0x7000003e, 0xffffffff, 0, 0, N5 }, ++{"dret", "", 0x7000003e, 0xffffffff, 0, 0, N5|AL }, + {"drol", "d,v,t", 0, (int) M_DROL, INSN_MACRO, 0, I3 }, + {"drol", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, 0, I3 }, + {"dror", "d,v,t", 0, (int) M_DROR, INSN_MACRO, 0, I3 }, +@@ -639,16 +645,16 @@ + {"ei", "t", 0x41606020, 0xffe0ffff, WR_t|WR_C0, 0, I33 }, + {"emt", "", 0x41600be1, 0xffffffff, TRAP, 0, MT32 }, + {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP|WR_t, 0, MT32 }, +-{"eret", "", 0x42000018, 0xffffffff, 0, 0, I3|I32 }, ++{"eret", "", 0x42000018, 0xffffffff, 0, 0, I3|I32|AL }, + {"evpe", "", 0x41600021, 0xffffffff, TRAP, 0, MT32 }, + {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP|WR_t, 0, MT32 }, +-{"ext", "t,r,+A,+C", 0x7c000000, 0xfc00003f, WR_t|RD_s, 0, I33 }, ++{"ext", "t,r,+A,+C", 0x7c000000, 0xfc00003f, WR_t|RD_s, 0, I33|AL }, + {"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D|RD_S|FP_D, 0, I3|I33 }, + {"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I3|I33 }, + {"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I2 }, + {"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D|RD_S|FP_S, 0, I2 }, + {"hibernate","", 0x42000023, 0xffffffff, 0, 0, V1 }, +-{"ins", "t,r,+A,+B", 0x7c000004, 0xfc00003f, WR_t|RD_s, 0, I33 }, ++{"ins", "t,r,+A,+B", 0x7c000004, 0xfc00003f, WR_t|RD_s, 0, I33|AL }, + {"jr", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, 0, I1 }, + /* jr.hb is officially MIPS{32,64}R2, but it works on R1 as jr with + the same hazard barrier effect. */ +@@ -686,18 +692,10 @@ + {"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t|RD_b, 0, I3 }, + {"ld", "t,o(b)", 0, (int) M_LD_OB, INSN_MACRO, 0, I1 }, + {"ld", "t,A(b)", 0, (int) M_LD_AB, INSN_MACRO, 0, I1 }, +-{"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, 0, I2 }, +-{"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, 0, I2 }, +-{"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, 0, I2 }, +-{"ldc1", "E,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, 0, I2 }, +-{"l.d", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, 0, I2 }, /* ldc1 */ +-{"l.d", "T,o(b)", 0, (int) M_L_DOB, INSN_MACRO, 0, I1 }, +-{"l.d", "T,A(b)", 0, (int) M_L_DAB, INSN_MACRO, 0, I1 }, +-{"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, CLD|RD_b|WR_CC, 0, I2 }, +-{"ldc2", "E,A(b)", 0, (int) M_LDC2_AB, INSN_MACRO, 0, I2 }, +-{"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, CLD|RD_b|WR_CC, 0, I2 }, +-{"ldc3", "E,A(b)", 0, (int) M_LDC3_AB, INSN_MACRO, 0, I2 }, +-{"ldl", "t,o(b)", 0x68000000, 0xfc000000, LDD|WR_t|RD_b, 0, I3 }, ++/* ldc1 is at the bottom of the table. */ ++/* ldc2 is at the bottom of the table. */ ++/* ldc3 is at the bottom of the table. */ ++{"ldl", "t,o(b)", 0x68000000, 0xfc000000, LDD|WR_t|RD_b, 0, I3|AL }, + {"ldl", "t,A(b)", 0, (int) M_LDL_AB, INSN_MACRO, 0, I3 }, + {"ldr", "t,o(b)", 0x6c000000, 0xfc000000, LDD|WR_t|RD_b, 0, I3 }, + {"ldr", "t,A(b)", 0, (int) M_LDR_AB, INSN_MACRO, 0, I3 }, +@@ -727,8 +725,7 @@ + {"lwc1", "E,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, 0, I1 }, + {"l.s", "T,o(b)", 0xc4000000, 0xfc000000, CLD|RD_b|WR_T|FP_S, 0, I1 }, /* lwc1 */ + {"l.s", "T,A(b)", 0, (int) M_LWC1_AB, INSN_MACRO, 0, I1 }, +-{"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, CLD|RD_b|WR_CC, 0, I1 }, +-{"lwc2", "E,A(b)", 0, (int) M_LWC2_AB, INSN_MACRO, 0, I1 }, ++/* lwc2 is at the bottom of the table. */ + {"lwc3", "E,o(b)", 0xcc000000, 0xfc000000, CLD|RD_b|WR_CC, 0, I1 }, + {"lwc3", "E,A(b)", 0, (int) M_LWC3_AB, INSN_MACRO, 0, I1 }, + {"lwl", "t,o(b)", 0x88000000, 0xfc000000, LDD|RD_b|WR_t, 0, I1 }, +@@ -762,11 +759,13 @@ + {"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0, I4|I33 }, + {"madd.ps", "D,R,S,T", 0x4c000026, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I5|I33 }, + {"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, L1 }, ++{"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, 0, AL }, + {"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|MOD_HILO, 0, I32|N55 }, + {"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, 0, G1 }, + {"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, 0, G1 }, + {"maddp", "s,t", 0x70000441, 0xfc00ffff, RD_s|RD_t|MOD_HILO, 0, SMT }, + {"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, L1 }, ++{"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, 0, AL }, + {"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|MOD_HILO, 0, I32|N55 }, + {"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, 0, G1 }, + {"maddu", "d,s,t", 0x70000001, 0xfc0007ff, RD_s|RD_t|WR_HILO|WR_d|IS_M, 0, G1 }, +@@ -806,7 +805,7 @@ + /* mfc2 is at the bottom of the table. */ + /* mfhc2 is at the bottom of the table. */ + /* mfc3 is at the bottom of the table. */ +-{"mfdr", "t,G", 0x7000003d, 0xffe007ff, LCD|WR_t|RD_C0, 0, N5 }, ++{"mfdr", "t,G", 0x7000003d, 0xffe007ff, LCD|WR_t|RD_C0, 0, N5|AL }, + {"mfhi", "d", 0x00000010, 0xffff07ff, WR_d|RD_HI, 0, I1 }, + {"mfhi", "d,9", 0x00000010, 0xff9f07ff, WR_d|RD_HI, 0, D32 }, + {"mflo", "d", 0x00000012, 0xffff07ff, WR_d|RD_LO, 0, I1 }, +@@ -826,7 +825,7 @@ + {"movf.l", "X,Y,N", 0x46a00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, 0, MX|SB1 }, + {"movf.s", "D,S,N", 0x46000011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, 0, I4|I32 }, + {"movf.ps", "D,S,N", 0x46c00011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, 0, I5|I33 }, +-{"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I4|I32 }, ++{"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I4|I32|AL }, + {"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_d|RD_s, 0, L1 }, + {"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, 0, I4|I32 }, + {"movn.l", "D,S,t", 0x46a00013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, 0, MX|SB1 }, +@@ -839,7 +838,7 @@ + {"movt.l", "X,Y,N", 0x46a10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, 0, MX|SB1 }, + {"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, 0, I4|I32 }, + {"movt.ps", "D,S,N", 0x46c10011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, 0, I5|I33 }, +-{"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I4|I32 }, ++{"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I4|I32|AL }, + {"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_d|RD_s, 0, L1 }, + {"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, 0, I4|I32 }, + {"movz.l", "D,S,t", 0x46a00012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, 0, MX|SB1 }, +@@ -856,8 +855,10 @@ + {"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, 0, I4|I33 }, + {"msub.ps", "D,R,S,T", 0x4c00002e, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, 0, I5|I33 }, + {"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, L1 }, ++{"msub", "s,t", 0x0000002e, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, 0, AL }, + {"msub", "s,t", 0x70000004, 0xfc00ffff, RD_s|RD_t|MOD_HILO, 0, I32|N55 }, + {"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, L1 }, ++{"msubu", "s,t", 0x0000002f, 0xfc00ffff, RD_s|RD_t|WR_HILO|IS_M, 0, AL }, + {"msubu", "s,t", 0x70000005, 0xfc00ffff, RD_s|RD_t|MOD_HILO, 0, I32|N55 }, + {"mtpc", "t,P", 0x4080c801, 0xffe0ffc1, COD|RD_t|WR_C0, 0, M1|N5 }, + {"mtps", "t,P", 0x4080c800, 0xffe0ffc1, COD|RD_t|WR_C0, 0, M1|N5 }, +@@ -871,7 +872,7 @@ + /* mtc2 is at the bottom of the table. */ + /* mthc2 is at the bottom of the table. */ + /* mtc3 is at the bottom of the table. */ +-{"mtdr", "t,G", 0x7080003d, 0xffe007ff, COD|RD_t|WR_C0, 0, N5 }, ++{"mtdr", "t,G", 0x7080003d, 0xffe007ff, COD|RD_t|WR_C0, 0, N5|AL }, + {"mthi", "s", 0x00000011, 0xfc1fffff, RD_s|WR_HI, 0, I1 }, + {"mthi", "s,7", 0x00000011, 0xfc1fe7ff, RD_s|WR_HI, 0, D32 }, + {"mtlo", "s", 0x00000013, 0xfc1fffff, RD_s|WR_LO, 0, I1 }, +@@ -1028,13 +1029,13 @@ + {"rol", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, 0, I1 }, + {"ror", "d,v,t", 0, (int) M_ROR, INSN_MACRO, 0, I1 }, + {"ror", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, 0, I1 }, +-{"ror", "d,w,<", 0x00200002, 0xffe0003f, WR_d|RD_t, 0, N5|I33|SMT }, +-{"rorv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, 0, N5|I33|SMT }, +-{"rotl", "d,v,t", 0, (int) M_ROL, INSN_MACRO, 0, I33|SMT }, +-{"rotl", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, 0, I33|SMT }, +-{"rotr", "d,v,t", 0, (int) M_ROR, INSN_MACRO, 0, I33|SMT }, +-{"rotr", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, 0, I33|SMT }, +-{"rotrv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, 0, I33|SMT }, ++{"ror", "d,w,<", 0x00200002, 0xffe0003f, WR_d|RD_t, 0, N5|I33|SMT|AL }, ++{"rorv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, 0, N5|I33|SMT|AL }, ++{"rotl", "d,v,t", 0, (int) M_ROL, INSN_MACRO, 0, I33|SMT|AL }, ++{"rotl", "d,v,I", 0, (int) M_ROL_I, INSN_MACRO, 0, I33|SMT|AL }, ++{"rotr", "d,v,t", 0, (int) M_ROR, INSN_MACRO, 0, I33|SMT|AL }, ++{"rotr", "d,v,I", 0, (int) M_ROR_I, INSN_MACRO, 0, I33|SMT|AL }, ++{"rotrv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t|RD_s|WR_d, 0, I33|SMT|AL }, + {"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D|RD_S|FP_D, 0, I3|I33 }, + {"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I3|I33 }, + {"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D|RD_S|FP_S|FP_D, 0, I2 }, +@@ -1066,24 +1067,18 @@ + {"sdbbp", "c,q", 0x0000000e, 0xfc00003f, TRAP, 0, G2 }, + {"sdbbp", "", 0x7000003f, 0xffffffff, TRAP, 0, I32 }, + {"sdbbp", "B", 0x7000003f, 0xfc00003f, TRAP, 0, I32 }, +-{"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, 0, I2 }, +-{"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, 0, I2 }, +-{"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, 0, I2 }, +-{"sdc1", "E,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, 0, I2 }, +-{"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, SM|RD_C2|RD_b, 0, I2 }, +-{"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, 0, I2 }, +-{"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM|RD_C3|RD_b, 0, I2 }, +-{"sdc3", "E,A(b)", 0, (int) M_SDC3_AB, INSN_MACRO, 0, I2 }, +-{"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, 0, I2 }, +-{"s.d", "T,o(b)", 0, (int) M_S_DOB, INSN_MACRO, 0, I1 }, +-{"s.d", "T,A(b)", 0, (int) M_S_DAB, INSN_MACRO, 0, I1 }, +-{"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM|RD_t|RD_b, 0, I3 }, ++/* sdc1 is at the bottom of the table. */ ++/* sdc2 is at the bottom of the table. */ ++/* sdc3 is at the bottom of the table. */ ++/* s.d (sdc1 is at the bottom of the table. */ ++ ++{"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM|RD_t|RD_b, 0, I3|AL }, + {"sdl", "t,A(b)", 0, (int) M_SDL_AB, INSN_MACRO, 0, I3 }, + {"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM|RD_t|RD_b, 0, I3 }, + {"sdr", "t,A(b)", 0, (int) M_SDR_AB, INSN_MACRO, 0, I3 }, + {"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM|RD_S|RD_t|RD_b|FP_D, 0, I4|I33 }, +-{"seb", "d,w", 0x7c000420, 0xffe007ff, WR_d|RD_t, 0, I33 }, +-{"seh", "d,w", 0x7c000620, 0xffe007ff, WR_d|RD_t, 0, I33 }, ++{"seb", "d,w", 0x7c000420, 0xffe007ff, WR_d|RD_t, 0, I33|AL }, ++{"seh", "d,w", 0x7c000620, 0xffe007ff, WR_d|RD_t, 0, I33|AL }, + {"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d|RD_s|RD_t, 0, L1 }, + {"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d|RD_s|RD_t, 0, L1 }, + {"seq", "d,v,t", 0, (int) M_SEQ, INSN_MACRO, 0, I1 }, +@@ -1175,8 +1170,7 @@ + {"swc1", "E,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, 0, I1 }, + {"s.s", "T,o(b)", 0xe4000000, 0xfc000000, SM|RD_T|RD_b|FP_S, 0, I1 }, /* swc1 */ + {"s.s", "T,A(b)", 0, (int) M_SWC1_AB, INSN_MACRO, 0, I1 }, +-{"swc2", "E,o(b)", 0xe8000000, 0xfc000000, SM|RD_C2|RD_b, 0, I1 }, +-{"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO, 0, I1 }, ++/* swc2 is at the bottom of the table. */ + {"swc3", "E,o(b)", 0xec000000, 0xfc000000, SM|RD_C3|RD_b, 0, I1 }, + {"swc3", "E,A(b)", 0, (int) M_SWC3_AB, INSN_MACRO, 0, I1 }, + {"swl", "t,o(b)", 0xa8000000, 0xfc000000, SM|RD_t|RD_b, 0, I1 }, +@@ -1260,7 +1254,8 @@ + {"wait", "J", 0x42000020, 0xfe00003f, TRAP, 0, I32|N55 }, + {"waiti", "", 0x42000020, 0xffffffff, TRAP, 0, L1 }, + {"wrpgpr", "d,w", 0x41c00000, 0xffe007ff, RD_t, 0, I33 }, +-{"wsbh", "d,w", 0x7c0000a0, 0xffe007ff, WR_d|RD_t, 0, I33 }, ++{"wsbh", "d,w", 0x7c0000a0, 0xffe007ff, WR_d|RD_t, 0, I33|AL }, ++{"wsbw", "d,t", 0x7c0000e0, 0xffe007ff, WR_d|RD_t, 0, AL }, + {"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d|RD_s|RD_t, 0, I1 }, + {"xor", "t,r,I", 0, (int) M_XOR_I, INSN_MACRO, 0, I1 }, + {"xor.ob", "X,Y,Q", 0x7800000d, 0xfc20003f, WR_D|RD_S|RD_T|FP_D, 0, MX|SB1 }, +@@ -1338,6 +1333,319 @@ + {"udi15", "s,+3", 0x7000001f, 0xfc00003f, WR_d|RD_s|RD_t, 0, I33 }, + {"udi15", "+4", 0x7000001f, 0xfc00003f, WR_d|RD_s|RD_t, 0, I33 }, + ++/* Sony Allegrex CPU core. */ ++{"bitrev", "d,t", 0x7c000520, 0xffe007ff, WR_d|RD_t, 0, AL }, ++{"mfic", "t,G", 0x70000024, 0xffe007ff, LCD|WR_t|RD_C0, 0, AL }, ++{"mtic", "t,G", 0x70000026, 0xffe007ff, COD|RD_t|WR_C0, 0, AL }, ++ ++/* Sony Allegrex VFPU instructions. */ ++{"bvf", "?c,p", 0x49000000, 0xffe30000, CBD|RD_CC, 0, AL }, ++{"bvfl", "?c,p", 0x49020000, 0xffe30000, CBL|RD_CC, 0, AL }, ++{"bvt", "?c,p", 0x49010000, 0xffe30000, CBD|RD_CC, 0, AL }, ++{"bvtl", "?c,p", 0x49030000, 0xffe30000, CBL|RD_CC, 0, AL }, ++{"lv.s", "?m0x,?o(b)", 0xc8000000, 0xfc000000, CLD|RD_s|WR_CC, 0, AL }, ++{"lv.s", "?m0x,A(b)", 0, (int) M_LVQ_AB, INSN_MACRO, 0, AL }, ++{"ulv.s", "?m0x,o(b)", 0, (int) M_ULVS, INSN_MACRO, 0, AL }, ++{"lv.q", "?n3x,?o(b)", 0xd8000000, 0xfc000002, CLD|RD_s|WR_CC, 0, AL }, ++{"lv.q", "?n3x,A(b)", 0, (int) M_LVQ_AB_2, INSN_MACRO, 0, AL }, ++{"ulv.q", "?n3x,?o(b)", 0, (int) M_ULVQ, INSN_MACRO, 0, AL }, ++{"ulv.q", "?n3x,A(b)", 0, (int) M_ULVQ_AB, INSN_MACRO, 0, AL }, ++{"lvi.s", "?t0x,l?y0", 0, (int) M_LVIS, INSN_MACRO, 0, AL }, ++{"lvi.p", "?t1x,?[l?y0,l?y1?]", 0, (int) M_LVIP, INSN_MACRO, 0, AL }, ++{"lvi.t", "?t2x,?[l?y0,l?y1,l?y2?]", 0, (int) M_LVIT, INSN_MACRO, 0, AL }, ++{"lvi.q", "?t3x,?[l?y0,l?y1,l?y2,l?y3?]", 0, (int) M_LVIQ, INSN_MACRO, 0, AL }, ++{"lvhi.s", "?t0x,?[?u?y0,?u?y1?]", 0, (int) M_LVHIS, INSN_MACRO, 0, AL }, ++{"lvhi.p", "?t1x,?[?u?y0,?u?y1,?u?y2,?u?y3?]", 0, (int) M_LVHIP, INSN_MACRO, 0, AL }, ++{"sv.s", "?m0x,?o(b)", 0xe8000000, 0xfc000000, SM|RD_s|RD_C2, 0, AL }, ++{"sv.s", "?m0x,A(b)", 0, (int) M_SVS_AB, INSN_MACRO, 0, AL }, ++{"usv.s", "?m0x,o(b)", 0, (int) M_USVS, INSN_MACRO, 0, AL }, ++{"sv.q", "?n3x,?o(b)", 0xf8000000, 0xfc000002, SM|RD_s|RD_C2, 0, AL }, ++{"sv.q", "?n3x,?o(b),?z", 0xf8000000, 0xfc000000, SM|RD_s|RD_C2, 0, AL }, ++{"sv.q", "?n3x,A(b)", 0, (int) M_SVQ_AB, INSN_MACRO, 0, AL }, ++{"sv.q", "?n3x,A(b),?z", 0, (int) M_SVQ_AB, INSN_MACRO, 0, AL }, ++{"sv.q", "?n3x,A,?z", 0, (int) M_SVQ_AB, INSN_MACRO, 0, AL }, ++{"usv.q", "?n3x,?o(b)", 0, (int) M_USVQ, INSN_MACRO, 0, AL }, ++{"usv.q", "?n3x,A(b)", 0, (int) M_USVQ_AB, INSN_MACRO, 0, AL }, ++{"vwb.q", "?n3x,?o(b)", 0xf8000002, 0xfc000002, SM|RD_s|RD_C2, 0, AL }, ++{"lvl.q", "?n3x,?o(b)", 0xd4000000, 0xfc000002, CLD|RD_s|WR_CC, 0, AL }, ++{"lvl.q", "?n3x,A(b)", 0, (int) M_LVLQ_AB, INSN_MACRO, 0, AL }, ++{"lvr.q", "?n3x,?o(b)", 0xd4000002, 0xfc000002, CLD|RD_s|WR_CC, 0, AL }, ++{"lvr.q", "?n3x,A(b)", 0, (int) M_LVRQ_AB, INSN_MACRO, 0, AL }, ++{"svl.q", "?n3x,?o(b)", 0xf4000000, 0xfc000002, SM|RD_s|RD_C2, 0, AL }, ++{"svl.q", "?n3x,A(b)", 0, (int) M_SVLQ_AB, INSN_MACRO, 0, AL }, ++{"svr.q", "?n3x,?o(b)", 0xf4000002, 0xfc000002, SM|RD_s|RD_C2, 0, AL }, ++{"svr.q", "?n3x,A(b)", 0, (int) M_SVRQ_AB, INSN_MACRO, 0, AL }, ++{"mtv", "t,?d0z", 0x48e00000, 0xffe0ff80, LCD|WR_t|WR_C2, 0, AL }, ++{"mfv", "t,?d0z", 0x48600000, 0xffe0ff80, COD|RD_t|WR_CC|RD_C2, 0, AL }, ++{"mtvc", "t,?q", 0x48e00000, 0xffe0ff00, LCD|WR_t|WR_C2, 0, AL }, ++{"mfvc", "t,?q", 0x48600000, 0xffe0ff00, COD|RD_t|WR_CC|RD_C2, 0, AL }, ++{"vmtvc", "?q,?s0y", 0xd0510000, 0xffff8000, WR_C2, 0, AL }, ++{"vmfvc", "?d0z,?r", 0xd0500000, 0xffff0080, RD_C2, 0, AL }, ++{"vadd.q", "?d3d,?s3s,?t3t", 0x60008080, 0xff808080, RD_C2, 0, AL }, ++{"vsub.q", "?d3d,?s3s,?t3t", 0x60808080, 0xff808080, RD_C2, 0, AL }, ++{"vdiv.q", "?x3z,?s3y,?t3x", 0x63808080, 0xff808080, RD_C2, 0, AL }, ++{"vmul.q", "?d3d,?s3s,?t3t", 0x64008080, 0xff808080, RD_C2, 0, AL }, ++{"vdot.q", "?d0d,?s3s,?t3t", 0x64808080, 0xff808080, RD_C2, 0, AL }, ++{"vscl.q", "?d3d,?s3s,?t0x", 0x65008080, 0xff808080, RD_C2, 0, AL }, ++{"vhdp.q", "?d0d,?s3y,?t3t", 0x66008080, 0xff808080, RD_C2, 0, AL }, ++{"vcmp.q", "?f2,?s3s,?t3t", 0x6c008080, 0xff8080f0, RD_C2, 0, AL }, ++{"vcmp.q", "?f1,?s3s", 0x6c008080, 0xffff80f0, RD_C2, 0, AL }, ++{"vcmp.q", "?f0", 0x6c008080, 0xfffffff0, RD_C2, 0, AL }, ++{"vmin.q", "?d3d,?s3s,?t3t", 0x6d008080, 0xff808080, RD_C2, 0, AL }, ++{"vmax.q", "?d3d,?s3s,?t3t", 0x6d808080, 0xff808080, RD_C2, 0, AL }, ++{"vsgn.q", "?d3d,?s3s", 0xd04a8080, 0xffff8080, RD_C2, 0, AL }, ++{"vcst.q", "?d3d,?a", 0xd0608080, 0xffe0ff80, RD_C2, 0, AL }, ++{"vscmp.q", "?d3d,?s3s,?t3t", 0x6e808080, 0xff808080, RD_C2, 0, AL }, ++{"vsge.q", "?d3d,?s3s,?t3t", 0x6f008080, 0xff808080, RD_C2, 0, AL }, ++{"vslt.q", "?d3d,?s3s,?t3t", 0x6f808080, 0xff808080, RD_C2, 0, AL }, ++{"vi2uc.q", "?d0m,?s3w", 0xd03c8080, 0xffff8080, RD_C2, 0, AL }, ++{"vi2c.q", "?d0m,?s3w", 0xd03d8080, 0xffff8080, RD_C2, 0, AL }, ++{"vi2us.q", "?d1m,?s3w", 0xd03e8080, 0xffff8080, RD_C2, 0, AL }, ++{"vi2s.q", "?d1m,?s3w", 0xd03f8080, 0xffff8080, RD_C2, 0, AL }, ++{"vmov.q", "?d3d,?s3s", 0xd0008080, 0xffff8080, RD_C2, 0, AL }, ++{"vabs.q", "?d3d,?s3w", 0xd0018080, 0xffff8080, RD_C2, 0, AL }, ++{"vneg.q", "?d3d,?s3w", 0xd0028080, 0xffff8080, RD_C2, 0, AL }, ++{"vidt.q", "?d3d", 0xd0038080, 0xffffff80, RD_C2, 0, AL }, ++{"vsat0.q", "?d3z,?s3s", 0xd0048080, 0xffff8080, RD_C2, 0, AL }, ++{"vsat1.q", "?d3z,?s3s", 0xd0058080, 0xffff8080, RD_C2, 0, AL }, ++{"vzero.q", "?d3d", 0xd0068080, 0xffffff80, RD_C2, 0, AL }, ++{"vone.q", "?d3d", 0xd0078080, 0xffffff80, RD_C2, 0, AL }, ++{"vrcp.q", "?x3z,?s3y", 0xd0108080, 0xffff8080, RD_C2, 0, AL }, ++{"vrsq.q", "?x3z,?s3y", 0xd0118080, 0xffff8080, RD_C2, 0, AL }, ++{"vsin.q", "?x3z,?s3y", 0xd0128080, 0xffff8080, RD_C2, 0, AL }, ++{"vcos.q", "?x3z,?s3y", 0xd0138080, 0xffff8080, RD_C2, 0, AL }, ++{"vexp2.q", "?x3z,?s3y", 0xd0148080, 0xffff8080, RD_C2, 0, AL }, ++{"vlog2.q", "?x3z,?s3y", 0xd0158080, 0xffff8080, RD_C2, 0, AL }, ++{"vsqrt.q", "?x3z,?s3y", 0xd0168080, 0xffff8080, RD_C2, 0, AL }, ++{"vasin.q", "?x3z,?s3y", 0xd0178080, 0xffff8080, RD_C2, 0, AL }, ++{"vnrcp.q", "?x3z,?s3y", 0xd0188080, 0xffff8080, RD_C2, 0, AL }, ++{"vnsin.q", "?x3z,?s3y", 0xd01a8080, 0xffff8080, RD_C2, 0, AL }, ++{"vrexp2.q", "?x3z,?s3y", 0xd01c8080, 0xffff8080, RD_C2, 0, AL }, ++{"vrndi.q", "?d3z", 0xd0218080, 0xffffff80, RD_C2, 0, AL }, ++{"vrndf1.q", "?d3z", 0xd0228080, 0xffffff80, RD_C2, 0, AL }, ++{"vrndf2.q", "?d3z", 0xd0238080, 0xffffff80, RD_C2, 0, AL }, ++{"vf2h.q", "?d1m,?s3s", 0xd0328080, 0xffff8080, RD_C2, 0, AL }, ++{"vsrt1.q", "?d3d,?s3s", 0xd0408080, 0xffff8080, RD_C2, 0, AL }, ++{"vsrt2.q", "?d3d,?s3s", 0xd0418080, 0xffff8080, RD_C2, 0, AL }, ++{"vsrt3.q", "?d3d,?s3s", 0xd0488080, 0xffff8080, RD_C2, 0, AL }, ++{"vsrt4.q", "?d3d,?s3s", 0xd0498080, 0xffff8080, RD_C2, 0, AL }, ++{"vbfy1.q", "?d3d,?s3s", 0xd0428080, 0xffff8080, RD_C2, 0, AL }, ++{"vbfy2.q", "?d3d,?s3s", 0xd0438080, 0xffff8080, RD_C2, 0, AL }, ++{"vocp.q", "?d3d,?s3y", 0xd0448080, 0xffff8080, RD_C2, 0, AL }, ++{"vfad.q", "?d0d,?s3s", 0xd0468080, 0xffff8080, RD_C2, 0, AL }, ++{"vavg.q", "?d0d,?s3s", 0xd0478080, 0xffff8080, RD_C2, 0, AL }, ++{"vf2in.q", "?d3m,?s3s,?b", 0xd2008080, 0xffe08080, RD_C2, 0, AL }, ++{"vf2iz.q", "?d3m,?s3s,?b", 0xd2208080, 0xffe08080, RD_C2, 0, AL }, ++{"vf2iu.q", "?d3m,?s3s,?b", 0xd2408080, 0xffe08080, RD_C2, 0, AL }, ++{"vf2id.q", "?d3m,?s3s,?b", 0xd2608080, 0xffe08080, RD_C2, 0, AL }, ++{"vi2f.q", "?d3d,?s3w,?b", 0xd2808080, 0xffe08080, RD_C2, 0, AL }, ++{"vcmov.q", "?d3d,?s3s,?e", 0, (int) M_VCMOVQ, INSN_MACRO, 0, AL }, ++{"vcmovt.q", "?d3d,?s3s,?e", 0xd2a08080, 0xfff88080, RD_C2, 0, AL }, ++{"vcmovf.q", "?d3d,?s3s,?e", 0xd2a88080, 0xfff88080, RD_C2, 0, AL }, ++{"vmmul.q", "?v7z,?s7y,?t7x", 0xf0008080, 0xff808080, RD_C2, 0, AL }, ++{"vtfm4.q", "?v3z,?s7y,?t3x", 0xf1808080, 0xff808080, RD_C2, 0, AL }, ++{"vhtfm4.q", "?v3z,?s7y,?t3x", 0xf1808000, 0xff808080, RD_C2, 0, AL }, ++{"vmscl.q", "?x7z,?s7y,?t0x", 0xf2008080, 0xff808080, RD_C2, 0, AL }, ++{"vqmul.q", "?v3z,?s3y,?t3x", 0xf2808080, 0xff808080, RD_C2, 0, AL }, ++{"vmmov.q", "?x7z,?s7y", 0xf3808080, 0xffff8080, RD_C2, 0, AL }, ++{"vmidt.q", "?d7z", 0xf3838080, 0xffffff80, RD_C2, 0, AL }, ++{"vmzero.q", "?d7z", 0xf3868080, 0xffffff80, RD_C2, 0, AL }, ++{"vmone.q", "?d7z", 0xf3878080, 0xffffff80, RD_C2, 0, AL }, ++{"vrot.q", "?x3z,?s0y,?w", 0xf3a08080, 0xffe08080, RD_C2, 0, AL }, ++{"vt4444.q", "?d1z,?s3w", 0xd0598080, 0xffff8080, RD_C2, 0, AL }, ++{"vt5551.q", "?d1z,?s3w", 0xd05a8080, 0xffff8080, RD_C2, 0, AL }, ++{"vt5650.q", "?d1z,?s3w", 0xd05b8080, 0xffff8080, RD_C2, 0, AL }, ++{"vadd.t", "?d2d,?s2s,?t2t", 0x60008000, 0xff808080, RD_C2, 0, AL }, ++{"vsub.t", "?d2d,?s2s,?t2t", 0x60808000, 0xff808080, RD_C2, 0, AL }, ++{"vdiv.t", "?x2z,?s2y,?t2x", 0x63808000, 0xff808080, RD_C2, 0, AL }, ++{"vmul.t", "?d2d,?s2s,?t2t", 0x64008000, 0xff808080, RD_C2, 0, AL }, ++{"vdot.t", "?d0d,?s2s,?t2t", 0x64808000, 0xff808080, RD_C2, 0, AL }, ++{"vscl.t", "?d2d,?s2s,?t0x", 0x65008000, 0xff808080, RD_C2, 0, AL }, ++{"vhdp.t", "?d0d,?s2y,?t2t", 0x66008000, 0xff808080, RD_C2, 0, AL }, ++{"vcrs.t", "?d2d,?s2y,?t2x", 0x66808000, 0xff808080, RD_C2, 0, AL }, ++{"vcmp.t", "?f2,?s2s,?t2t", 0x6c008000, 0xff8080f0, RD_C2, 0, AL }, ++{"vcmp.t", "?f1,?s2s", 0x6c008000, 0xffff80f0, RD_C2, 0, AL }, ++{"vcmp.t", "?f0", 0x6c008000, 0xfffffff0, RD_C2, 0, AL }, ++{"vmin.t", "?d2d,?s2s,?t2t", 0x6d008000, 0xff808080, RD_C2, 0, AL }, ++{"vmax.t", "?d2d,?s2s,?t2t", 0x6d808000, 0xff808080, RD_C2, 0, AL }, ++{"vsgn.t", "?d2d,?s2s", 0xd04a8000, 0xffff8080, RD_C2, 0, AL }, ++{"vcst.t", "?d2d,?a", 0xd0608000, 0xffe0ff80, RD_C2, 0, AL }, ++{"vscmp.t", "?d2d,?s2s,?t2t", 0x6e808000, 0xff808080, RD_C2, 0, AL }, ++{"vsge.t", "?d2d,?s2s,?t2t", 0x6f008000, 0xff808080, RD_C2, 0, AL }, ++{"vslt.t", "?d2d,?s2s,?t2t", 0x6f808000, 0xff808080, RD_C2, 0, AL }, ++{"vmov.t", "?d2d,?s2s", 0xd0008000, 0xffff8080, RD_C2, 0, AL }, ++{"vabs.t", "?d2d,?s2w", 0xd0018000, 0xffff8080, RD_C2, 0, AL }, ++{"vneg.t", "?d2d,?s2w", 0xd0028000, 0xffff8080, RD_C2, 0, AL }, ++{"vsat0.t", "?d2z,?s2s", 0xd0048000, 0xffff8080, RD_C2, 0, AL }, ++{"vsat1.t", "?d2z,?s2s", 0xd0058000, 0xffff8080, RD_C2, 0, AL }, ++{"vzero.t", "?d2d", 0xd0068000, 0xffffff80, RD_C2, 0, AL }, ++{"vone.t", "?d2d", 0xd0078000, 0xffffff80, RD_C2, 0, AL }, ++{"vrcp.t", "?x2z,?s2y", 0xd0108000, 0xffff8080, RD_C2, 0, AL }, ++{"vrsq.t", "?x2z,?s2y", 0xd0118000, 0xffff8080, RD_C2, 0, AL }, ++{"vsin.t", "?x2z,?s2y", 0xd0128000, 0xffff8080, RD_C2, 0, AL }, ++{"vcos.t", "?x2z,?s2y", 0xd0138000, 0xffff8080, RD_C2, 0, AL }, ++{"vexp2.t", "?x2z,?s2y", 0xd0148000, 0xffff8080, RD_C2, 0, AL }, ++{"vlog2.t", "?x2z,?s2y", 0xd0158000, 0xffff8080, RD_C2, 0, AL }, ++{"vsqrt.t", "?x2z,?s2y", 0xd0168000, 0xffff8080, RD_C2, 0, AL }, ++{"vasin.t", "?x2z,?s2y", 0xd0178000, 0xffff8080, RD_C2, 0, AL }, ++{"vnrcp.t", "?x2z,?s2y", 0xd0188000, 0xffff8080, RD_C2, 0, AL }, ++{"vnsin.t", "?x2z,?s2y", 0xd01a8000, 0xffff8080, RD_C2, 0, AL }, ++{"vrexp2.t", "?x2z,?s2y", 0xd01c8000, 0xffff8080, RD_C2, 0, AL }, ++{"vrndi.t", "?d2z", 0xd0218000, 0xffffff80, RD_C2, 0, AL }, ++{"vrndf1.t", "?d2z", 0xd0228000, 0xffffff80, RD_C2, 0, AL }, ++{"vrndf2.t", "?d2z", 0xd0238000, 0xffffff80, RD_C2, 0, AL }, ++{"vocp.t", "?d2d,?s2y", 0xd0448000, 0xffff8080, RD_C2, 0, AL }, ++{"vfad.t", "?d0d,?s2s", 0xd0468000, 0xffff8080, RD_C2, 0, AL }, ++{"vavg.t", "?d0d,?s2s", 0xd0478000, 0xffff8080, RD_C2, 0, AL }, ++{"vf2in.t", "?d2m,?s2s,?b", 0xd2008000, 0xffe08080, RD_C2, 0, AL }, ++{"vf2iz.t", "?d2m,?s2s,?b", 0xd2208000, 0xffe08080, RD_C2, 0, AL }, ++{"vf2iu.t", "?d2m,?s2s,?b", 0xd2408000, 0xffe08080, RD_C2, 0, AL }, ++{"vf2id.t", "?d2m,?s2s,?b", 0xd2608000, 0xffe08080, RD_C2, 0, AL }, ++{"vi2f.t", "?d2d,?s2w,?b", 0xd2808000, 0xffe08080, RD_C2, 0, AL }, ++{"vcmov.t", "?d2d,?s2s,?e", 0, (int) M_VCMOVT, INSN_MACRO, 0, AL }, ++{"vcmovt.t", "?d2d,?s2s,?e", 0xd2a08000, 0xfff88080, RD_C2, 0, AL }, ++{"vcmovf.t", "?d2d,?s2s,?e", 0xd2a88000, 0xfff88080, RD_C2, 0, AL }, ++{"vmmul.t", "?v6z,?s6y,?t6x", 0xf0008000, 0xff808080, RD_C2, 0, AL }, ++{"vtfm3.t", "?v2z,?s6y,?t2x", 0xf1008000, 0xff808080, RD_C2, 0, AL }, ++{"vhtfm3.t", "?v2z,?s6y,?t2x", 0xf1000080, 0xff808080, RD_C2, 0, AL }, ++{"vmscl.t", "?x6z,?s6y,?t0x", 0xf2008000, 0xff808080, RD_C2, 0, AL }, ++{"vmmov.t", "?x6z,?s6y", 0xf3808000, 0xffff8080, RD_C2, 0, AL }, ++{"vmidt.t", "?d6z", 0xf3838000, 0xffffff80, RD_C2, 0, AL }, ++{"vmzero.t", "?d6z", 0xf3868000, 0xffffff80, RD_C2, 0, AL }, ++{"vmone.t", "?d6z", 0xf3878000, 0xffffff80, RD_C2, 0, AL }, ++{"vrot.t", "?x2z,?s0y,?w", 0xf3a08000, 0xffe08080, RD_C2, 0, AL }, ++{"vcrsp.t", "?d2z,?s2y,?t2x", 0xf2808000, 0xff808080, RD_C2, 0, AL }, ++{"vadd.p", "?d1d,?s1s,?t1t", 0x60000080, 0xff808080, RD_C2, 0, AL }, ++{"vsub.p", "?d1d,?s1s,?t1t", 0x60800080, 0xff808080, RD_C2, 0, AL }, ++{"vdiv.p", "?x1z,?s1y,?t1x", 0x63800080, 0xff808080, RD_C2, 0, AL }, ++{"vmul.p", "?d1d,?s1s,?t1t", 0x64000080, 0xff808080, RD_C2, 0, AL }, ++{"vdot.p", "?d0d,?s1s,?t1t", 0x64800080, 0xff808080, RD_C2, 0, AL }, ++{"vscl.p", "?d1d,?s1s,?t0x", 0x65000080, 0xff808080, RD_C2, 0, AL }, ++{"vhdp.p", "?d0d,?s1y,?t1t", 0x66000080, 0xff808080, RD_C2, 0, AL }, ++{"vdet.p", "?d0d,?s1s,?t1x", 0x67000080, 0xff808080, RD_C2, 0, AL }, ++{"vcmp.p", "?f2,?s1s,?t1t", 0x6c000080, 0xff8080f0, RD_C2, 0, AL }, ++{"vcmp.p", "?f1,?s1s", 0x6c000080, 0xffff80f0, RD_C2, 0, AL }, ++{"vcmp.p", "?f0", 0x6c000080, 0xfffffff0, RD_C2, 0, AL }, ++{"vmin.p", "?d1d,?s1s,?t1t", 0x6d000080, 0xff808080, RD_C2, 0, AL }, ++{"vmax.p", "?d1d,?s1s,?t1t", 0x6d800080, 0xff808080, RD_C2, 0, AL }, ++{"vsgn.p", "?d1d,?s1s", 0xd04a0080, 0xffff8080, RD_C2, 0, AL }, ++{"vcst.p", "?d1d,?a", 0xd0600080, 0xffe0ff80, RD_C2, 0, AL }, ++{"vscmp.p", "?d1d,?s1s,?t1t", 0x6e800080, 0xff808080, RD_C2, 0, AL }, ++{"vsge.p", "?d1d,?s1s,?t1t", 0x6f000080, 0xff808080, RD_C2, 0, AL }, ++{"vslt.p", "?d1d,?s1s,?t1t", 0x6f800080, 0xff808080, RD_C2, 0, AL }, ++{"vus2i.p", "?d3m,?s1y", 0xd03a0080, 0xffff8080, RD_C2, 0, AL }, ++{"vs2i.p", "?d3m,?s1y", 0xd03b0080, 0xffff8080, RD_C2, 0, AL }, ++{"vi2us.p", "?d0m,?s1w", 0xd03e0080, 0xffff8080, RD_C2, 0, AL }, ++{"vi2s.p", "?d0m,?s1w", 0xd03f0080, 0xffff8080, RD_C2, 0, AL }, ++{"vmov.p", "?d1d,?s1s", 0xd0000080, 0xffff8080, RD_C2, 0, AL }, ++{"vabs.p", "?d1d,?s1w", 0xd0010080, 0xffff8080, RD_C2, 0, AL }, ++{"vneg.p", "?d1d,?s1w", 0xd0020080, 0xffff8080, RD_C2, 0, AL }, ++{"vidt.p", "?d1d", 0xd0030080, 0xffffff80, RD_C2, 0, AL }, ++{"vsat0.p", "?d1z,?s1s", 0xd0040080, 0xffff8080, RD_C2, 0, AL }, ++{"vsat1.p", "?d1z,?s1s", 0xd0050080, 0xffff8080, RD_C2, 0, AL }, ++{"vzero.p", "?d1d", 0xd0060080, 0xffffff80, RD_C2, 0, AL }, ++{"vone.p", "?d1d", 0xd0070080, 0xffffff80, RD_C2, 0, AL }, ++{"vrcp.p", "?x1z,?s1y", 0xd0100080, 0xffff8080, RD_C2, 0, AL }, ++{"vrsq.p", "?x1z,?s1y", 0xd0110080, 0xffff8080, RD_C2, 0, AL }, ++{"vsin.p", "?x1z,?s1y", 0xd0120080, 0xffff8080, RD_C2, 0, AL }, ++{"vcos.p", "?x1z,?s1y", 0xd0130080, 0xffff8080, RD_C2, 0, AL }, ++{"vexp2.p", "?x1z,?s1y", 0xd0140080, 0xffff8080, RD_C2, 0, AL }, ++{"vlog2.p", "?x1z,?s1y", 0xd0150080, 0xffff8080, RD_C2, 0, AL }, ++{"vsqrt.p", "?x1z,?s1y", 0xd0160080, 0xffff8080, RD_C2, 0, AL }, ++{"vasin.p", "?x1z,?s1y", 0xd0170080, 0xffff8080, RD_C2, 0, AL }, ++{"vnrcp.p", "?x1z,?s1y", 0xd0180080, 0xffff8080, RD_C2, 0, AL }, ++{"vnsin.p", "?x1z,?s1y", 0xd01a0080, 0xffff8080, RD_C2, 0, AL }, ++{"vrexp2.p", "?x1z,?s1y", 0xd01c0080, 0xffff8080, RD_C2, 0, AL }, ++{"vrndi.p", "?d1z", 0xd0210080, 0xffffff80, RD_C2, 0, AL }, ++{"vrndf1.p", "?d1z", 0xd0220080, 0xffffff80, RD_C2, 0, AL }, ++{"vrndf2.p", "?d1z", 0xd0230080, 0xffffff80, RD_C2, 0, AL }, ++{"vf2h.p", "?d0m,?s1s", 0xd0320080, 0xffff8080, RD_C2, 0, AL }, ++{"vh2f.p", "?d3d,?s1y", 0xd0330080, 0xffff8080, RD_C2, 0, AL }, ++{"vbfy1.p", "?d1d,?s1s", 0xd0420080, 0xffff8080, RD_C2, 0, AL }, ++{"vocp.p", "?d1d,?s1y", 0xd0440080, 0xffff8080, RD_C2, 0, AL }, ++{"vsocp.p", "?d3z,?s1y", 0xd0450080, 0xffff8080, RD_C2, 0, AL }, ++{"vfad.p", "?d0d,?s1s", 0xd0460080, 0xffff8080, RD_C2, 0, AL }, ++{"vavg.p", "?d0d,?s1s", 0xd0470080, 0xffff8080, RD_C2, 0, AL }, ++{"vf2in.p", "?d1m,?s1s,?b", 0xd2000080, 0xffe08080, RD_C2, 0, AL }, ++{"vf2iz.p", "?d1m,?s1s,?b", 0xd2200080, 0xffe08080, RD_C2, 0, AL }, ++{"vf2iu.p", "?d1m,?s1s,?b", 0xd2400080, 0xffe08080, RD_C2, 0, AL }, ++{"vf2id.p", "?d1m,?s1s,?b", 0xd2600080, 0xffe08080, RD_C2, 0, AL }, ++{"vi2f.p", "?d1d,?s1w,?b", 0xd2800080, 0xffe08080, RD_C2, 0, AL }, ++{"vcmov.p", "?d1d,?s1s,?e", 0, (int) M_VCMOVP, INSN_MACRO, 0, AL }, ++{"vcmovt.p", "?d1d,?s1s,?e", 0xd2a00080, 0xfff88080, RD_C2, 0, AL }, ++{"vcmovf.p", "?d1d,?s1s,?e", 0xd2a80080, 0xfff88080, RD_C2, 0, AL }, ++{"vmmul.p", "?v5z,?s5y,?t5x", 0xf0000080, 0xff808080, RD_C2, 0, AL }, ++{"vtfm2.p", "?v1z,?s5y,?t1x", 0xf0800080, 0xff808080, RD_C2, 0, AL }, ++{"vhtfm2.p", "?v1z,?s5y,?t1x", 0xf0800000, 0xff808080, RD_C2, 0, AL }, ++{"vmscl.p", "?x5z,?s5y,?t0x", 0xf2000080, 0xff808080, RD_C2, 0, AL }, ++{"vmmov.p", "?x5z,?s5y", 0xf3800080, 0xffff8080, RD_C2, 0, AL }, ++{"vmidt.p", "?d5z", 0xf3830080, 0xffffff80, RD_C2, 0, AL }, ++{"vmzero.p", "?d5z", 0xf3860080, 0xffffff80, RD_C2, 0, AL }, ++{"vmone.p", "?d5z", 0xf3870080, 0xffffff80, RD_C2, 0, AL }, ++{"vrot.p", "?x1z,?s0y,?w", 0xf3a00080, 0xffe08080, RD_C2, 0, AL }, ++{"vadd.s", "?d0d,?s0s,?t0t", 0x60000000, 0xff808080, RD_C2, 0, AL }, ++{"vsub.s", "?d0d,?s0s,?t0t", 0x60800000, 0xff808080, RD_C2, 0, AL }, ++{"vdiv.s", "?x0d,?s0s,?t0t", 0x63800000, 0xff808080, RD_C2, 0, AL }, ++{"vmul.s", "?d0d,?s0s,?t0t", 0x64000000, 0xff808080, RD_C2, 0, AL }, ++{"vcmp.s", "?f2,?s0s,?t0t", 0x6c000000, 0xff8080f0, RD_C2, 0, AL }, ++{"vcmp.s", "?f1,?s0s", 0x6c000000, 0xffff80f0, RD_C2, 0, AL }, ++{"vcmp.s", "?f0", 0x6c000000, 0xfffffff0, RD_C2, 0, AL }, ++{"vmin.s", "?d0d,?s0s,?t0t", 0x6d000000, 0xff808080, RD_C2, 0, AL }, ++{"vmax.s", "?d0d,?s0s,?t0t", 0x6d800000, 0xff808080, RD_C2, 0, AL }, ++{"vsgn.s", "?d0d,?s0s", 0xd04a0000, 0xffff8080, RD_C2, 0, AL }, ++{"vcst.s", "?d0d,?a", 0xd0600000, 0xffe0ff80, RD_C2, 0, AL }, ++{"vscmp.s", "?d0d,?s0s,?t0t", 0x6e800000, 0xff808080, RD_C2, 0, AL }, ++{"vsge.s", "?d0d,?s0s,?t0t", 0x6f000000, 0xff808080, RD_C2, 0, AL }, ++{"vslt.s", "?d0d,?s0s,?t0t", 0x6f800000, 0xff808080, RD_C2, 0, AL }, ++{"vus2i.s", "?d1m,?s0y", 0xd03a0000, 0xffff8080, RD_C2, 0, AL }, ++{"vs2i.s", "?d1m,?s0y", 0xd03b0000, 0xffff8080, RD_C2, 0, AL }, ++{"vmov.s", "?d0d,?s0s", 0xd0000000, 0xffff8080, RD_C2, 0, AL }, ++{"vabs.s", "?d0d,?s0w", 0xd0010000, 0xffff8080, RD_C2, 0, AL }, ++{"vneg.s", "?d0d,?s0w", 0xd0020000, 0xffff8080, RD_C2, 0, AL }, ++{"vsat0.s", "?d0z,?s0s", 0xd0040000, 0xffff8080, RD_C2, 0, AL }, ++{"vsat1.s", "?d0z,?s0s", 0xd0050000, 0xffff8080, RD_C2, 0, AL }, ++{"vzero.s", "?d0d", 0xd0060000, 0xffffff80, RD_C2, 0, AL }, ++{"vone.s", "?d0d", 0xd0070000, 0xffffff80, RD_C2, 0, AL }, ++{"vrcp.s", "?x0d,?s0s", 0xd0100000, 0xffff8080, RD_C2, 0, AL }, ++{"vrsq.s", "?x0d,?s0s", 0xd0110000, 0xffff8080, RD_C2, 0, AL }, ++{"vsin.s", "?x0d,?s0s", 0xd0120000, 0xffff8080, RD_C2, 0, AL }, ++{"vcos.s", "?x0d,?s0s", 0xd0130000, 0xffff8080, RD_C2, 0, AL }, ++{"vexp2.s", "?x0d,?s0s", 0xd0140000, 0xffff8080, RD_C2, 0, AL }, ++{"vlog2.s", "?x0d,?s0s", 0xd0150000, 0xffff8080, RD_C2, 0, AL }, ++{"vsqrt.s", "?x0d,?s0s", 0xd0160000, 0xffff8080, RD_C2, 0, AL }, ++{"vasin.s", "?x0d,?s0s", 0xd0170000, 0xffff8080, RD_C2, 0, AL }, ++{"vnrcp.s", "?x0d,?s0y", 0xd0180000, 0xffff8080, RD_C2, 0, AL }, ++{"vnsin.s", "?x0d,?s0y", 0xd01a0000, 0xffff8080, RD_C2, 0, AL }, ++{"vrexp2.s", "?x0d,?s0y", 0xd01c0000, 0xffff8080, RD_C2, 0, AL }, ++{"vrnds.s", "?s0y", 0xd0200000, 0xffff80ff, RD_C2, 0, AL }, ++{"vrndi.s", "?d0d", 0xd0210000, 0xffffff80, RD_C2, 0, AL }, ++{"vrndf1.s", "?d0d", 0xd0220000, 0xffffff80, RD_C2, 0, AL }, ++{"vrndf2.s", "?d0d", 0xd0230000, 0xffffff80, RD_C2, 0, AL }, ++{"vh2f.s", "?d1d,?s0y", 0xd0330000, 0xffff8080, RD_C2, 0, AL }, ++{"vsbz.s", "?d0d,?s0s", 0xd0360000, 0xffff8080, RD_C2, 0, AL }, ++{"vsbn.s", "?d0d,?s0s,?t0t", 0x61000000, 0xff808080, RD_C2, 0, AL }, ++{"vlgb.s", "?d0d,?s0s", 0xd0370000, 0xffff8080, RD_C2, 0, AL }, ++{"vocp.s", "?d0d,?s0y", 0xd0440000, 0xffff8080, RD_C2, 0, AL }, ++{"vsocp.s", "?d1z,?s0y", 0xd0450000, 0xffff8080, RD_C2, 0, AL }, ++{"vf2in.s", "?d0m,?s0s,?b", 0xd2000000, 0xffe08080, RD_C2, 0, AL }, ++{"vf2iz.s", "?d0m,?s0s,?b", 0xd2200000, 0xffe08080, RD_C2, 0, AL }, ++{"vf2iu.s", "?d0m,?s0s,?b", 0xd2400000, 0xffe08080, RD_C2, 0, AL }, ++{"vf2id.s", "?d0m,?s0s,?b", 0xd2600000, 0xffe08080, RD_C2, 0, AL }, ++{"vi2f.s", "?d0d,?s0w,?b", 0xd2800000, 0xffe08080, RD_C2, 0, AL }, ++{"vcmov.s", "?d0d,?s0s,?e", 0, (int) M_VCMOVS, INSN_MACRO, 0, AL }, ++{"vcmovt.s", "?d0d,?s0s,?e", 0xd2a00000, 0xfff88080, RD_C2, 0, AL }, ++{"vcmovf.s", "?d0d,?s0s,?e", 0xd2a80000, 0xfff88080, RD_C2, 0, AL }, ++{"vwbn.s", "?d0d,?s0s,?i", 0xd3000000, 0xff008080, RD_C2, 0, AL }, ++{"vpfxs", "?0,?1,?2,?3", 0xdc000000, 0xff000000, RD_C2, 0, AL }, ++{"vpfxt", "?0,?1,?2,?3", 0xdd000000, 0xff000000, RD_C2, 0, AL }, ++{"vpfxd", "?4,?5,?6,?7", 0xde000000, 0xff000000, RD_C2, 0, AL }, ++{"viim.s", "?t0d,j", 0xdf000000, 0xff800000, RD_C2, 0, AL }, ++{"vfim.s", "?t0d,?u", 0xdf800000, 0xff800000, RD_C2, 0, AL }, ++{"vnop", "", 0xffff0000, 0xffffffff, RD_C2, 0, AL }, ++{"vflush", "", 0xffff040d, 0xffffffff, RD_C2, 0, AL }, ++{"vsync", "", 0xffff0320, 0xffffffff, RD_C2, 0, AL }, ++{"vsync", "i", 0xffff0000, 0xffff0000, RD_C2, 0, AL }, ++ + /* Coprocessor 2 move/branch operations overlap with VR5400 .ob format + instructions so they are here for the latters to take precedence. */ + {"bc2f", "p", 0x49000000, 0xffff0000, CBD|RD_CC, 0, I1 }, +@@ -1379,6 +1687,36 @@ + {"mfc3", "t,G,H", 0x4c000000, 0xffe007f8, LCD|WR_t|RD_C3, 0, I32 }, + {"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD|RD_t|WR_C3|WR_CC, 0, I1 }, + {"mtc3", "t,G,H", 0x4c800000, 0xffe007f8, COD|RD_t|WR_C3|WR_CC, 0, I32 }, ++ ++/* Coprocessor 2 load/store operations overlap with the Allegrex VFPU ++ instructions so they are here for the latters to take precedence. */ ++/* COP1 ldc1 and sdc1 and COP3 ldc3 and sdc3 also overlap with the VFPU. */ ++{"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, 0, I2 }, ++{"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, 0, I2 }, ++{"ldc1", "T,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, 0, I2 }, ++{"ldc1", "E,A(b)", 0, (int) M_LDC1_AB, INSN_MACRO, 0, I2 }, ++{"l.d", "T,o(b)", 0xd4000000, 0xfc000000, CLD|RD_b|WR_T|FP_D, 0, I2 }, /* ldc1 */ ++{"l.d", "T,o(b)", 0, (int) M_L_DOB, INSN_MACRO, 0, I1 }, ++{"l.d", "T,A(b)", 0, (int) M_L_DAB, INSN_MACRO, 0, I1 }, ++{"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, CLD|RD_b|WR_CC, 0, I2 }, ++{"ldc2", "E,A(b)", 0, (int) M_LDC2_AB, INSN_MACRO, 0, I2 }, ++{"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, CLD|RD_b|WR_CC, 0, I2 }, ++{"ldc3", "E,A(b)", 0, (int) M_LDC3_AB, INSN_MACRO, 0, I2 }, ++{"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, CLD|RD_b|WR_CC, 0, I1 }, ++{"lwc2", "E,A(b)", 0, (int) M_LWC2_AB, INSN_MACRO, 0, I1 }, ++{"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, 0, I2 }, ++{"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, 0, I2 }, ++{"sdc1", "T,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, 0, I2 }, ++{"sdc1", "E,A(b)", 0, (int) M_SDC1_AB, INSN_MACRO, 0, I2 }, ++{"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, 0, I2 }, ++{"s.d", "T,o(b)", 0, (int) M_S_DOB, INSN_MACRO, 0, I1 }, ++{"s.d", "T,A(b)", 0, (int) M_S_DAB, INSN_MACRO, 0, I1 }, ++{"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, SM|RD_C2|RD_b, 0, I2 }, ++{"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, 0, I2 }, ++{"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM|RD_C3|RD_b, 0, I2 }, ++{"sdc3", "E,A(b)", 0, (int) M_SDC3_AB, INSN_MACRO, 0, I2 }, ++{"swc2", "E,o(b)", 0xe8000000, 0xfc000000, SM|RD_C2|RD_b, 0, I1 }, ++{"swc2", "E,A(b)", 0, (int) M_SWC2_AB, INSN_MACRO, 0, I1 }, + + /* No hazard protection on coprocessor instructions--they shouldn't + change the state of the processor and if they do it's up to the +diff -Nbaur gdb-6.6/sim/common/sim-signal.c gdb-6.6-psp/sim/common/sim-signal.c +--- gdb-6.6/sim/common/sim-signal.c Tue Nov 29 02:43:06 2005 ++++ gdb-6.6-psp/sim/common/sim-signal.c Fri Jun 15 16:17:50 2007 +@@ -27,7 +27,7 @@ + to not think the process has died (so it can be debugged at the point of + failure). */ + +-#ifdef _MSC_VER ++#if defined(_MSC_VER) || defined (__MINGW32__) + #ifndef SIGTRAP + #define SIGTRAP 5 + #endif