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please actually work this time im asking nicely
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ProjectRevoTPP
parent
6b611a3046
commit
947ba577d9
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@ -29,8 +29,8 @@ stdlib/cfreer.o stdlib/malignr.o stdlib/vallocr.o stdlib/pvallocr.o \
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stdlib/mallinfor.o stdlib/mallstatsr.o stdlib/msizer.o stdlib/malloptr.o \
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stdio/vfiprintf.o
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S_SRCS := arm/setjmp.S arm/trap.S
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S_OBJS := $(S_SRCS:%.S=%.o)
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S_SRCS := arm/setjmp.s arm/trap.s
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S_OBJS := $(S_SRCS:%.s=%.o)
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OBJS := $(C_OBJS) $(S_OBJS)
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102
libc/arm/setjmp.s
Executable file
102
libc/arm/setjmp.s
Executable file
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@ -0,0 +1,102 @@
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/* This is a simple version of setjmp and longjmp.
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Nick Clifton, Cygnus Solutions, 13 June 1997. */
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/* ANSI concatenation macros. */
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#define CONCAT(a, b) CONCAT2(a, b)
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#define CONCAT2(a, b) a ## b
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#ifdef __USER_LABEL_PREFIX__
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#define FUNCTION( name ) CONCAT (__USER_LABEL_PREFIX__, name)
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#else
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#error __USER_LABEL_PREFIX__ is not defined
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#endif
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.text
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.code 32
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.align 2
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/* int setjmp (jmp_buf); */
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.globl FUNCTION(setjmp)
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FUNCTION(setjmp):
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/* Save all the callee-preserved registers into the jump buffer. */
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stmea a1!, { v1-v7, fp, ip, sp, lr }
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#if 0 /* Simulator does not cope with FP instructions yet.... */
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#ifndef __SOFTFP__
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/* Save the floating point registers */
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sfmea f4, 4, [a1]
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#endif
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#endif
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/* When setting up the jump buffer return 0. */
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mov a1, #0
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/* Return to caller, see comment in longjmp below */
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#ifdef __APCS_26__
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movs pc, lr
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#else
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tst lr, #1
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moveq pc, lr
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.word 0xe12fff1e /* bx lr */
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#endif
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/* volatile void longjmp (jmp_buf, int); */
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.globl FUNCTION(longjmp)
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FUNCTION(longjmp):
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/* If we have stack extension code it ought to be handled here. */
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/* Restore the registers, retrieving the state when setjmp() was called. */
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ldmfd a1!, { v1-v7, fp, ip, sp, lr }
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#if 0 /* Simulator does not cope with FP instructions yet.... */
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#ifndef __SOFTFP__
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/* Restore floating point registers as well */
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lfmfd f4, 4, [a1]
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#endif
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#endif
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/* Put the return value into the integer result register.
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But if it is zero then return 1 instead. */
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movs a1, a2
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moveq a1, #1
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/* Arm/Thumb interworking support:
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The interworking scheme expects functions to use a BX instruction
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to return control to their parent. Since we need this code to work
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in both interworked and non-interworked environments as well as with
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older processors which do not have the BX instruction we do the
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following:
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Test the return address.
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If the bottom bit is clear perform an "old style" function exit.
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(We know that we are in ARM mode and returning to an ARM mode caller).
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Otherwise use the BX instruction to perform the function exit.
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We know that we will never attempt to perform the BX instruction on
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an older processor, because that kind of processor will never be
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interworked, and a return address with the bottom bit set will never
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be generated.
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In addition, we do not actually assemble the BX instruction as this would
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require us to tell the assembler that the processor is an ARM7TDMI and
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it would store this information in the binary. We want this binary to be
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able to be linked with binaries compiled for older processors however, so
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we do not want such information stored there.
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If we are running using the APCS-26 convention however, then we never
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test the bottom bit, because this is part of the processor status.
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Instead we just do a normal return, since we know that we cannot be
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returning to a Thumb caller - the Thumb doe snot support APCS-26
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*/
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#ifdef __APCS_26__
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movs pc, lr
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#else
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tst lr, #1
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moveq pc, lr
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.word 0xe12fff1e /* bx lr */
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#endif
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93
libc/arm/trap.s
Executable file
93
libc/arm/trap.s
Executable file
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@ -0,0 +1,93 @@
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/* Run-time exception support */
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#include "swi.h"
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/* .text is used instead of .section .text so it works with arm-aout too. */
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.text
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.align 0
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.global __rt_stkovf_split_big
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.global __rt_stkovf_split_small
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/* The following functions are provided for software stack checking.
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If hardware stack-checking is being used then the code can be
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compiled without the PCS entry checks, and simply rely on VM
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management to extend the stack for a thread.
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The stack extension event occurs when the PCS function entry code
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would result in a stack-pointer beneath the stack-limit register
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value. The system relies on the following map:
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+-----------------------------------+ <-- end of stack block
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| ... |
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| ... |
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| active stack |
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| ... | <-- sp (stack-pointer) somewhere in here
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| ... |
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+-----------------------------------+ <-- sl (stack-limit)
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| stack-extension handler workspace |
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+-----------------------------------+ <-- base of stack block
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The "stack-extension handler workspace" is an amount of memory in
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which the stack overflow support code must execute. It must be
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large enough to deal with the worst case path through the extension
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code. At the moment the compiler expects this to be AT LEAST
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256bytes. It uses this fact to code functions with small local
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data usage within the overflow space.
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In a true target environment We may need to increase the space
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between sl and the true limit to allow for the stack extension
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code, SWI handlers and for undefined instruction handlers of the
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target environment. */
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__rt_stkovf_split_small:
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mov ip,sp @ Ensure we can calculate the stack required
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@ and fall through to...
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__rt_stkovf_split_big:
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@ in: sp = current stack-pointer (beneath stack-limit)
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@ sl = current stack-limit
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@ ip = low stack point we require for the current function
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@ lr = return address into the current function
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@ fp = frame-pointer
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@ original sp --> +----------------------------------+
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@ | pc (12 ahead of PCS entry store) |
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@ current fp ---> +----------------------------------+
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@ | lr (on entry) pc (on exit) |
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@ +----------------------------------+
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@ | sp ("original sp" on entry) |
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@ +----------------------------------+
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@ | fp (on entry to function) |
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@ +----------------------------------+
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@ | |
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@ | ..argument and work registers.. |
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@ | |
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@ current sp ---> +----------------------------------+
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@
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@ The "current sl" is somewhere between "original sp" and "current sp"
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@ but above "true sl". The "current sl" should be at least 256bytes
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@ above the "true sl". The 256byte stack guard should be large enough
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@ to deal with the worst case function entry stacking (160bytes) plus
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@ the stack overflow handler stacking requirements, plus the stack
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@ required for the memory allocation routines.
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@
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@ Normal PCS entry (before stack overflow check) can stack 16
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@ standard registers (64bytes) and 8 floating point registers
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@ (96bytes). This gives a minimum stack guard of 160bytes (excluding
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@ the stack required for the code). (Actually only a maximum of
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@ 14standard registers are ever stacked on entry to a function).
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@
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@ NOTE: Structure returns are performed by the caller allocating a
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@ dummy space on the stack and passing in a "phantom" arg1 into
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@ the function. This means that we do not need to worry about
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@ preserving the stack under "sp" even on function return.
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@
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@ Code should never poke values beneath sp. The sp register
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@ should always be "dropped" first to cover the data. This
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@ protects the data against any events that may try and use
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@ the stack.
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SUB ip, sp, ip @ extra stack required for function
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@ Add stack extension code here. If desired a new stack chunk
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@ can be allocated, and the register state updated suitably.
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@ We now know how much extra stack the function requires.
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@ Terminate the program for the moment:
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swi SWI_Exit
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