mirror of
https://github.com/lesserkuma/GBA_MultiMenu.git
synced 2026-03-22 17:54:11 -05:00
321 lines
7.5 KiB
C
321 lines
7.5 KiB
C
/*
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GBA Multi Game Menu
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Author: Lesserkuma (github.com/lesserkuma)
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*/
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#include <gba.h>
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#include <stdio.h>
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#include <string.h>
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#include "main.h"
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#include "flash.h"
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u8 flash_type;
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u8 *itemlist;
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u32 flash_sector_size;
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u32 flash_itemlist_sector_offset;
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u32 flash_status_sector_offset;
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u32 flash_save_sector_offset;
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EWRAM_BSS u8 sram_register_backup[4];
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EWRAM_BSS u8 data_buffer[SRAM_SIZE];
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void FlashCalcOffsets(void)
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{
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u32 own_size = (u32)(&__rom_end__) - 0x8000000;
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flash_itemlist_sector_offset = own_size;
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flash_itemlist_sector_offset = 0x40000 - (flash_itemlist_sector_offset % 0x40000) + flash_itemlist_sector_offset;
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flash_itemlist_sector_offset = _DIV_CEIL(flash_itemlist_sector_offset, flash_sector_size);
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flash_status_sector_offset = flash_itemlist_sector_offset + 1;
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flash_save_sector_offset = flash_status_sector_offset + 1;
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itemlist = (u8 *)(AGB_ROM + flash_itemlist_sector_offset * flash_sector_size);
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}
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IWRAM_CODE void FlashDetectType(void)
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{
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u32 data;
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u16 ie = REG_IE;
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REG_IE = ie & 0xFFFE;
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// 2G cart with 6600M0U0BE (369-in-1)
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_FLASH_WRITE(0, 0xFF);
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_FLASH_WRITE(0, 0x90);
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data = *(vu32 *)AGB_ROM;
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_FLASH_WRITE(0, 0xFF);
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if (data == 0x88B0008A)
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{
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REG_IE = ie;
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flash_type = 1;
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flash_sector_size = 0x40000;
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FlashCalcOffsets();
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return;
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}
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// 512M cart with MSP55LV100S (Zelda Classic Collection 7-in-1)
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_FLASH_WRITE(0, 0xF0F0);
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_FLASH_WRITE(0xAAA, 0xAAA9);
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_FLASH_WRITE(0x555, 0x5556);
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_FLASH_WRITE(0xAAA, 0x9090);
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data = *(vu32 *)AGB_ROM;
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_FLASH_WRITE(0, 0xF0F0);
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if (data == 0x7E7D0102)
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{
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REG_IE = ie;
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flash_type = 2;
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flash_sector_size = 0x20000;
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FlashCalcOffsets();
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return;
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}
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// Unknown type
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REG_IE = ie;
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flash_type = 0;
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flash_sector_size = 0x20000;
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FlashCalcOffsets();
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return;
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}
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IWRAM_CODE void FlashEraseSector(u32 address)
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{
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if (flash_type == 0)
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{
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FlashDetectType();
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}
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vu8 _flash_type = flash_type;
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vu16 ie = REG_IE;
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REG_IE = ie & 0xFFFE;
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if (_flash_type == 1)
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{
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_FLASH_WRITE(address, 0xFF);
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_FLASH_WRITE(address, 0x60);
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_FLASH_WRITE(address, 0xD0);
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_FLASH_WRITE(address, 0x20);
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_FLASH_WRITE(address, 0xD0);
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while (1)
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{
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__asm("nop");
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if ((*((vu16 *)(AGB_ROM + address)) & 0x80) == 0x80)
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{
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break;
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}
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}
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_FLASH_WRITE(address, 0xFF);
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}
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else if (_flash_type == 2)
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{
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_FLASH_WRITE(0xAAA, 0xAAA9);
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_FLASH_WRITE(0x555, 0x5556);
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_FLASH_WRITE(0xAAA, 0x8080);
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_FLASH_WRITE(0xAAA, 0xAAA9);
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_FLASH_WRITE(0x555, 0x5556);
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_FLASH_WRITE(address, 0x3030);
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while (1)
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{
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__asm("nop");
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if ((*((vu16 *)(AGB_ROM + address))) == 0xFFFF)
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{
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break;
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}
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}
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_FLASH_WRITE(address, 0xF0F0);
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}
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REG_IE = ie;
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}
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IWRAM_CODE void FlashWriteData(u32 address, u32 length)
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{
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if (flash_type == 0)
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{
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FlashDetectType();
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}
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u8 _flash_type = flash_type;
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vu16 *p_rom = (vu16 *)(AGB_ROM + address);
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vu16 ie = REG_IE;
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REG_IE = ie & 0xFFFE;
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if (_flash_type == 1)
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{
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for (int j = 0; j < (int)(length / 0x400); j++)
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{
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_FLASH_WRITE(address + (j * 0x400), 0xEA);
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while (1)
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{
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__asm("nop");
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if ((p_rom[(j * 0x200)] & 0x80) == 0x80)
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{
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break;
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}
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}
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_FLASH_WRITE(address + (j * 0x400), 0x1FF);
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for (int i = 0; i < 0x400; i += 2)
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{
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_FLASH_WRITE(address + (j * 0x400) + i, data_buffer[(j * 0x400) + i + 1] << 8 | data_buffer[(j * 0x400) + i]);
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}
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_FLASH_WRITE(address + (j * 0x400), 0xD0);
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while (1)
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{
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__asm("nop");
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if ((p_rom[(j * 0x200)] & 0x80) == 0x80)
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{
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break;
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}
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}
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}
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_FLASH_WRITE(address, 0xFF);
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}
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else if (_flash_type == 2)
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{
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for (int j = 0; j < (int)(length / 0x20); j++)
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{
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_FLASH_WRITE(0xAAA, 0xAAA9);
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_FLASH_WRITE(0x555, 0x5556);
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_FLASH_WRITE(address + (j * 0x20), 0x2526);
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_FLASH_WRITE(address + (j * 0x20), 0x0F0F);
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u16 data = 0;
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for (int i = 0; i < 0x20; i += 2)
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{
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__asm("nop");
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data = data_buffer[(j * 0x20) + i + 1] << 8 | data_buffer[(j * 0x20) + i];
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_FLASH_WRITE(address + (j * 0x20) + i, data);
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}
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_FLASH_WRITE(address + (j * 0x20), 0x292A);
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while (1)
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{
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__asm("nop");
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if (p_rom[(j * 0x10) + 0x0F] == data)
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{
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break;
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}
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}
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}
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_FLASH_WRITE(address, 0xF0F0);
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}
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REG_IE = ie;
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}
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IWRAM_CODE void DrawBootStatusLine(u8 begin, u8 end)
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{
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for (int i = begin; i < end; i++)
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{
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((u16 *)AGB_VRAM)[(120 * 159) + i] = 0;
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}
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}
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IWRAM_CODE u8 BootGame(ItemConfig config, FlashStatus status)
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{
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u32 _flash_sector_size = flash_sector_size;
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u32 _flash_save_block_offset = flash_save_sector_offset;
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u32 _flash_status_block_offset = flash_status_sector_offset;
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// Check if supported flash chip is present
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FlashDetectType();
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u8 _flash_type = flash_type;
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if (_flash_type == 0)
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return 1;
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// Temporarily store SRAM values at mapper registers
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sram_register_backup[0] = *(vu8 *)MAPPER_CONFIG1;
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sram_register_backup[1] = *(vu8 *)MAPPER_CONFIG2;
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sram_register_backup[2] = *(vu8 *)MAPPER_CONFIG3;
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sram_register_backup[3] = *(vu8 *)MAPPER_CONFIG4;
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// Enable SRAM access
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*(vu8 *)MAPPER_CONFIG4 = 1;
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// Write previous SRAM to flash
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if (status.battery_present) {
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if (status.last_boot_save_type != SRAM_NONE)
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{
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for (int i = 0; i < SRAM_SIZE; i++)
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{
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data_buffer[i] = ((vu8 *)AGB_SRAM)[i];
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}
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data_buffer[2] = sram_register_backup[0];
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data_buffer[3] = sram_register_backup[1];
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data_buffer[4] = sram_register_backup[2];
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data_buffer[5] = sram_register_backup[3];
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FlashEraseSector((_flash_save_block_offset + status.last_boot_save_index) * _flash_sector_size);
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FlashWriteData((_flash_save_block_offset + status.last_boot_save_index) * _flash_sector_size, SRAM_SIZE);
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}
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// Save status to flash
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status.last_boot_save_index = config.save_index;
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status.last_boot_save_type = config.save_type;
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memset((void *)data_buffer, 0, 0x1000);
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memcpy(data_buffer, &status, sizeof(status));
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FlashEraseSector(_flash_status_block_offset * flash_sector_size);
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FlashWriteData(_flash_status_block_offset * flash_sector_size, 0x1000);
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}
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// Disable SRAM access
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*(vu8 *)MAPPER_CONFIG4 = 0;
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// Read new SRAM from flash
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if (config.save_type != SRAM_NONE)
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{
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for (int i = 0; i < SRAM_SIZE; i += 2)
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{
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data_buffer[i] = *((vu16 *)(AGB_ROM + ((_flash_save_block_offset + config.save_index) * _flash_sector_size) + i)) & 0xFF;
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data_buffer[i + 1] = *((vu16 *)(AGB_ROM + ((_flash_save_block_offset + config.save_index) * _flash_sector_size) + i)) >> 8;
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}
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}
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// Fade out
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REG_BLDCNT = 0x00FF;
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for (u8 i = 0; i < 17; i++)
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{
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REG_BLDY = i;
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SystemCall(5);
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}
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// Disable interrupts
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REG_IE = 0;
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// Set mapper configuration
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*(vu8 *)MAPPER_CONFIG1 = ((config.rom_offset / 0x40) & 0xF) << 4; // flash bank (0~7)
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*(vu8 *)MAPPER_CONFIG2 = 0x40 + (config.rom_offset % 0x40); // ROM offset (in 512 KB blocks) within current flash bank
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*(vu8 *)MAPPER_CONFIG3 = 0x40 - config.rom_size; // accessible ROM size (in 512 KB blocks)
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// Wait until menu ROM is no longer visible
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u16 timeout = 0xFFFF;
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while (((vu16 *)AGB_ROM)[0x58] == 0x4B4C)
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{
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if (!timeout--)
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{
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REG_IE = 1;
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REG_BLDY = 0;
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SystemCall(5);
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return 2;
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}
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}
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// Lock mapper
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*(vu8 *)MAPPER_CONFIG2 |= 0x80;
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// Restore SRAM values at mapper registers
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*(vu8 *)MAPPER_CONFIG1 = sram_register_backup[0];
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*(vu8 *)MAPPER_CONFIG2 = sram_register_backup[1];
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*(vu8 *)MAPPER_CONFIG3 = sram_register_backup[2];
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*(vu8 *)MAPPER_CONFIG4 = sram_register_backup[3];
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// Write buffer to SRAM
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for (int i = 0; i < SRAM_SIZE; i++)
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{
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((vu8 *)AGB_SRAM)[i] = data_buffer[i];
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}
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// Clear palette
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for (int i = 0; i < SCREEN_WIDTH * SCREEN_HEIGHT >> 1; i++)
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{
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((vu16 *)AGB_VRAM)[i] = 0;
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}
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REG_BLDY = 0;
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// Soft Reset system call
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__asm("swi 0"); // Soft reset
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return 3;
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}
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